diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2020-03-21 18:49:33 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2020-03-22 11:45:18 -0700 |
| commit | 2a3dd384599dc3e092a1aa1e2a3757482a158bc3 (patch) | |
| tree | 39c13c9ffa9cb04ee013a92f5a0065b0ad241bd5 | |
| parent | 577aca86627ce8b6cb89bfb25f8e1d0689aeaef6 (diff) | |
| download | platform_external_arm-trusted-firmware-2a3dd384599dc3e092a1aa1e2a3757482a158bc3.tar.gz platform_external_arm-trusted-firmware-2a3dd384599dc3e092a1aa1e2a3757482a158bc3.tar.bz2 platform_external_arm-trusted-firmware-2a3dd384599dc3e092a1aa1e2a3757482a158bc3.zip | |
Tegra: fixup GIC init from the 'on_finish' handler
Commit e9e19fb2fe684a740afc4820b3ee4cc38ad67d70 accidentally removed the
GIC init routine required to initialze the distributor on system resume.
This patch fixes this anomaly and initializes the distributor on system
resume.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I3fdc694404faa509952f2d90b1f16541165e583e
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_pm.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/plat/nvidia/tegra/common/tegra_pm.c b/plat/nvidia/tegra/common/tegra_pm.c index 5ec6f849e..0430048e2 100644 --- a/plat/nvidia/tegra/common/tegra_pm.c +++ b/plat/nvidia/tegra/common/tegra_pm.c @@ -152,16 +152,18 @@ void tegra_pwr_domain_on_finish(const psci_power_state_t *target_state) const plat_params_from_bl2_t *plat_params; /* - * Initialize the GIC cpu and distributor interfaces - */ - tegra_gic_pcpu_init(); - - /* * Check if we are exiting from deep sleep. */ if (target_state->pwr_domain_state[PLAT_MAX_PWR_LVL] == PSTATE_ID_SOC_POWERDN) { + /* + * On entering System Suspend state, the GIC loses power + * completely. Initialize the GIC global distributor and + * GIC cpu interfaces. + */ + tegra_gic_init(); + /* Restart console output. */ console_switch_state(CONSOLE_FLAG_RUNTIME); @@ -183,6 +185,11 @@ void tegra_pwr_domain_on_finish(const psci_power_state_t *target_state) * access */ tegra_memctrl_tzram_setup(TEGRA_TZRAM_BASE, TEGRA_TZRAM_SIZE); + } else { + /* + * Initialize the GIC cpu and distributor interfaces + */ + tegra_gic_pcpu_init(); } /* |