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authorDan Murphy <dmurphy@ti.com>2011-10-09 09:34:45 -0500
committerZiyann <jaraidaniel@gmail.com>2014-10-01 12:57:00 +0200
commit62f5e77a490ad550be2aadf1da2c557dd632403e (patch)
tree56fbd239707f2c228a8e48c9e27850ffeea55b31 /arch
parent95399f6bdae5f22f87a0168823d7d226d19d1cdb (diff)
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ARM: OMAP4: Add nonsecure TILER carveout
Add a 32MB nonsecure TILER carveout to be used by framebuffer. Change-Id: I186dd37046ef731e0896e98de7c079b3af038c07 Signed-off-by: Dan Murphy <dmurphy@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/omap4_ion.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap4_ion.c b/arch/arm/mach-omap2/omap4_ion.c
index a86c5c0e11b..2bf290c25a3 100644
--- a/arch/arm/mach-omap2/omap4_ion.c
+++ b/arch/arm/mach-omap2/omap4_ion.c
@@ -23,6 +23,7 @@
#define OMAP4_RAMCONSOLE_SIZE SZ_2M
#define OMAP4_ION_HEAP_SECURE_INPUT_SIZE (SZ_1M * 90)
#define OMAP4_ION_HEAP_TILER_SIZE (SZ_128M - SZ_32M)
+#define OMAP_ION_HEAP_NONSECURE_TILER_SIZE SZ_32M
#define OMAP4_ION_HEAP_LARGE_SURFACES_SIZE SZ_32M
#define PHYS_ADDR_SMC_SIZE (SZ_1M * 3)
@@ -32,7 +33,7 @@
OMAP4_ION_HEAP_SECURE_INPUT_SIZE)
static struct ion_platform_data omap4_ion_data = {
- .nr = 3,
+ .nr = 4,
.heaps = {
{
.type = ION_HEAP_TYPE_CARVEOUT,
@@ -56,6 +57,14 @@ static struct ion_platform_data omap4_ion_data = {
.base = 0x80000000 + SZ_512M + OMAP4_RAMCONSOLE_SIZE,
.size = OMAP4_ION_HEAP_LARGE_SURFACES_SIZE,
},
+ {
+ .type = OMAP_ION_HEAP_TYPE_TILER,
+ .id = OMAP_ION_HEAP_NONSECURE_TILER,
+ .name = "nonsecure_tiler",
+ .base = 0x80000000 + SZ_512M + SZ_2M +
+ OMAP4_ION_HEAP_LARGE_SURFACES_SIZE,
+ .size = OMAP_ION_HEAP_NONSECURE_TILER_SIZE,
+ },
},
};