aboutsummaryrefslogtreecommitdiffstats
path: root/doc/README.generic_usb_ohci
blob: 494dd1f5d92bfa404d47671ae27f6525394f2698 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
Notes on the the generic USB-OHCI driver
========================================

This driver (drivers/usb_ohci.[ch]) is the result of the merge of
various existing OHCI drivers that were basically identical beside
cpu/board dependant initalization. This initalization has been moved
into cpu/board directories and are called via the hooks below.

Configuration options
----------------------

	CONFIG_USB_OHCI_NEW: enable the new OHCI driver

	CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:

		  - extern int usb_board_init(void);
		  - extern int usb_board_stop(void);
		  - extern int usb_cpu_init_fail(void);

	CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:

		  - extern int usb_cpu_init(void);
		  - extern int usb_cpu_stop(void);
		  - extern int usb_cpu_init_fail(void);

	CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
				registers

	CFG_USB_OHCI_SLOT_NAME: slot name

	CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
				     root hub.


Endianness issues
------------------

The USB bus operates in little endian, but unfortunately there are
OHCI controllers that operate in big endian such as ppc4xx and
mpc5xxx. For these the config option

	CFG_OHCI_BE_CONTROLLER

needs to be defined.


PCI Controllers
----------------

You'll need to define

	CONFIG_PCI_OHCI

PCI Controllers need to do byte swapping on register accesses, so they
should to define:

	CFG_OHCI_SWAP_REG_ACCESS