diff options
Diffstat (limited to 'include/asm-arm/arch-at91sam9/at91cap9.h')
| -rw-r--r-- | include/asm-arm/arch-at91sam9/at91cap9.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91sam9/at91cap9.h b/include/asm-arm/arch-at91sam9/at91cap9.h index d1b33a069a..0b52228138 100644 --- a/include/asm-arm/arch-at91sam9/at91cap9.h +++ b/include/asm-arm/arch-at91sam9/at91cap9.h @@ -101,13 +101,25 @@ #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) +#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR_REVB (0xfffffd50 - AT91_BASE_SYS) +#define AT91_GPBR_REVC (0xfffffd60 - AT91_BASE_SYS) #define AT91_USART0 AT91CAP9_BASE_US0 #define AT91_USART1 AT91CAP9_BASE_US1 #define AT91_USART2 AT91CAP9_BASE_US2 /* + * SCKCR flags + */ +#define AT91CAP9_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ +#define AT91CAP9_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ +#define AT91CAP9_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ +#define AT91CAP9_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ +#define AT91CAP9_SCKCR_OSCSEL_RC (0 << 3) +#define AT91CAP9_SCKCR_OSCSEL_32 (1 << 3) + +/* * Internal Memory. */ #define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ |