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| author | Simon Glass <sjg@chromium.org> | 2014-11-14 18:18:38 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:01 -0700 |
| commit | 3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0 (patch) | |
| tree | fc4597857ff5299dbbb4abeb752ad3027000655b /include/fdtdec.h | |
| parent | 05efc3961cf01916b32ef58a3965d46a11636e68 (diff) | |
| download | u-boot-midas-3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0.tar.gz u-boot-midas-3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0.tar.bz2 u-boot-midas-3ac839352db2fb464e1e6e6a4bc50f06fb29cdb0.zip | |
x86: ivybridge: Add SATA init
Add code to set up the SATA interfaces on boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/fdtdec.h')
| -rw-r--r-- | include/fdtdec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h index abfd678424..0a0afce516 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -120,6 +120,7 @@ enum fdt_compat_id { COMPAT_INTEL_LPC, /* Intel Low Pin Count I/F */ COMPAT_INTEL_MICROCODE, /* Intel microcode update */ COMPAT_MEMORY_SPD, /* Memory SPD information */ + COMPAT_INTEL_PANTHERPOINT_AHCI, /* Intel Pantherpoint AHCI */ COMPAT_COUNT, }; |