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author | Wolfgang Denk <wd@pollux.(none)> | 2005-09-23 11:05:55 +0200 |
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committer | Wolfgang Denk <wd@pollux.(none)> | 2005-09-23 11:05:55 +0200 |
commit | 0c8721a466b5e0eca7e7fbe1007777fa82100541 (patch) | |
tree | 1f53decded27502be8593137739291a3de406d94 /include/configs/csb472.h | |
parent | a6e6cf00367c0779eadb49915e40c55f0a787957 (diff) | |
download | u-boot-midas-0c8721a466b5e0eca7e7fbe1007777fa82100541.tar.gz u-boot-midas-0c8721a466b5e0eca7e7fbe1007777fa82100541.tar.bz2 u-boot-midas-0c8721a466b5e0eca7e7fbe1007777fa82100541.zip |
Cleanup (PPC4xx is AMCC now)
Diffstat (limited to 'include/configs/csb472.h')
-rw-r--r-- | include/configs/csb472.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 4e5dcfcf07..a00cafbe2e 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -291,7 +291,7 @@ * Cache configuration * */ -#define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ +#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */ /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 |