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author | TsiChung Liew <Tsi-Chung.Liew@freescale.com> | 2008-10-21 10:03:07 +0000 |
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committer | John Rigby <jrigby@freescale.com> | 2008-11-03 09:45:58 -0700 |
commit | 012522fef3b382469125beb46a315ab4dee02fb0 (patch) | |
tree | 9bc6b0cc47ec08dd3efb07a75eaa50fd04ec5f32 /include/configs/M5282EVB.h | |
parent | ac2331aee99ad36be0fcfed8c49922e3c61b576d (diff) | |
download | u-boot-midas-012522fef3b382469125beb46a315ab4dee02fb0.tar.gz u-boot-midas-012522fef3b382469125beb46a315ab4dee02fb0.tar.bz2 u-boot-midas-012522fef3b382469125beb46a315ab4dee02fb0.zip |
ColdFire: Modules header files cleanup
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/configs/M5282EVB.h')
-rw-r--r-- | include/configs/M5282EVB.h | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index a8a265564d..15590cfcd5 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -165,7 +165,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE 0xffe00000 +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 @@ -212,18 +212,10 @@ /*----------------------------------------------------------------------- * Memory bank definitions */ -#define CONFIG_SYS_CS0_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_CS0_SIZE 2*1024*1024 -#define CONFIG_SYS_CS0_WIDTH 16 -#define CONFIG_SYS_CS0_RO 0 -#define CONFIG_SYS_CS0_WS 6 -/* -#define CONFIG_SYS_CS3_BASE 0xE0000000 -#define CONFIG_SYS_CS3_SIZE 1*1024*1024 -#define CONFIG_SYS_CS3_WIDTH 16 -#define CONFIG_SYS_CS3_RO 0 -#define CONFIG_SYS_CS3_WS 6 -*/ +#define CONFIG_SYS_CS0_BASE 0xFFE00000 +#define CONFIG_SYS_CS0_CTRL 0x00001980 +#define CONFIG_SYS_CS0_MASK 0x001F0001 + /*----------------------------------------------------------------------- * Port configuration */ |