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authorPatrice Chotard <patrice.chotard@st.com>2018-01-19 18:02:40 +0100
committerTom Rini <trini@konsulko.com>2018-01-28 09:39:15 -0500
commit990dba649852d79a3ac5f9540a713f6207cf7ea8 (patch)
treefd36d56ba6c9e344287fa52d73134b8c6842d83c /fs/btrfs/compression.c
parenta93feb2edc60b9db76ec794bff5ad0fcb10ce3eb (diff)
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clk: clk_stm32f: Fix PLLSAICFGR_PLLSAIP_4 divider value
PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR register, available combination are : 00: PLLSAIP = 2 01: PLLSAIP = 4 10: PLLSAIP = 6 11: PLLSAIP = 8 Previously, the divider value was incorrectly set to 6. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'fs/btrfs/compression.c')
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