* Patch by Yuli Barcohen, 26 Jan 2004:

  Allow bzip2 compression for small memory footprint boards

* Patch by Brad Kemp, 21 Jan 2004:
  Add support for CFI flash driver for both the Intel and the AMD
  command sets.

* Patch by Travis Sawyer, 20 Jan 2004:
  Fix pci bridge auto enumeration of sibling p2p bridges.

* Patch by Tolunay Orkun, 12 Jan 2004:
  Add some delays as needed for Intel LXT971A PHY support

* Patches by Stephan Linz, 09 Jan 2004:
  - avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
  - make DK1C20 board configuration related to ASMI conform to
    documentation

1 files changed, 15 insertions, 5 deletions

diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c
index 20acc0713e..39b7e8e33b 100644
--- a/drivers/pci_auto.c
+++ b/drivers/pci_auto.c
@@ -163,7 +163,8 @@ static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
 
 	/* Configure bus number registers */
 	pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
-	pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus + 1);
+	/* TBS: passed in sub_bus is correct, removed the +1 */
+	pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
 	pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
 
 	if (pci_mem)
@@ -284,6 +285,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 	unsigned int sub_bus = PCI_BUS(dev);
 	unsigned short class;
 	unsigned char prg_iface;
+	int n;
 
 	pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
 
@@ -294,11 +296,19 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 		pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io);
 
 		DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
-		pciauto_prescan_setup_bridge(hose, dev, sub_bus);
-
-		pci_hose_scan_bus(hose, hose->current_busno);
-
+		
+		/* TBS: Passing in current_busno allows for sibling P2P bridges */
+		pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
+		/* 
+		 * TBS: need to figure out if this is a subordinate bridge on the bus 
+		 * to be able to properly set the pri/sec/sub bridge registers.
+		 */
+		n = pci_hose_scan_bus(hose, hose->current_busno);
+
+		/* TBS: figure out the deepest we've gone for this leg */
+		sub_bus = max(n, sub_bus);
 		pciauto_postscan_setup_bridge(hose, dev, sub_bus);
+
 		sub_bus = hose->current_busno;
 		break;