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| author | Haiying Wang <haiying.wang@freescale.com> | 2006-07-28 12:41:18 -0400 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2006-07-31 09:27:57 -0500 |
| commit | 239db37c94f7a92941c4465feceb867c609241c5 (patch) | |
| tree | 56a8bd3e0bb3ec68ee22a7a73c6d39cb9ab7dfdf /cpu | |
| parent | 492900b985439fbce1a118afde1e35def870db03 (diff) | |
| download | u-boot-midas-239db37c94f7a92941c4465feceb867c609241c5.tar.gz u-boot-midas-239db37c94f7a92941c4465feceb867c609241c5.tar.bz2 u-boot-midas-239db37c94f7a92941c4465feceb867c609241c5.zip | |
Move get_board_sys_clk to board directory
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc86xx/speed.c | 66 |
1 files changed, 0 insertions, 66 deletions
diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c index 8088b870a4..e130705378 100644 --- a/cpu/mpc86xx/speed.c +++ b/cpu/mpc86xx/speed.c @@ -30,72 +30,6 @@ #include <asm/processor.h> -#ifdef MPC8641HPCN -/* - * get_board_sys_clk - * Reads the FPGA on board for CONFIG_SYS_CLK_FREQ - */ - -unsigned long get_board_sys_clk(ulong dummy) -{ - u8 i, go_bit, rd_clks; - ulong val = 0; - - go_bit = in8(PIXIS_BASE + PIXIS_VCTL); - go_bit &= 0x01; - - rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); - rd_clks &= 0x1C; - - /* - * Only if both go bit and the SCLK bit in VCFGEN0 are set - * should we be using the AUX register. Remember, we also set the - * GO bit to boot from the alternate bank on the on-board flash - */ - - if (go_bit) { - if (rd_clks == 0x1c) - i = in8(PIXIS_BASE + PIXIS_AUX); - else - i = in8(PIXIS_BASE + PIXIS_SPD); - } else { - i = in8(PIXIS_BASE + PIXIS_SPD); - } - - i &= 0x07; - - switch (i) { - case 0: - val = 33000000; - break; - case 1: - val = 40000000; - break; - case 2: - val = 50000000; - break; - case 3: - val = 66000000; - break; - case 4: - val = 83000000; - break; - case 5: - val = 100000000; - break; - case 6: - val = 134000000; - break; - case 7: - val = 166000000; - break; - } - - return val; -} - -#endif - void get_sys_info (sys_info_t *sysInfo) { volatile immap_t *immap = (immap_t *)CFG_IMMR; |