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| author | Dave Liu <daveliu@freescale.com> | 2009-11-12 07:26:37 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-11-12 08:09:49 -0600 |
| commit | 3ad95deb30ac73bd57e966d321215a17d3236f9f (patch) | |
| tree | 342daf9b3dfaa0998ae2c1b562a48eb68b407538 /cpu/pxa/cpu.c | |
| parent | 4f127980e0d4ba179b4628ebf8e8642210731055 (diff) | |
| download | u-boot-midas-3ad95deb30ac73bd57e966d321215a17d3236f9f.tar.gz u-boot-midas-3ad95deb30ac73bd57e966d321215a17d3236f9f.tar.bz2 u-boot-midas-3ad95deb30ac73bd57e966d321215a17d3236f9f.zip | |
fsl-ddr: Fix the chip-select interleaving issue
commit 1542fbdeec0d1e2a6df13189df8dcb1ce8802be3
introduced one new bug to chip-select interleaving.
Single DDR controller also can do the chip-select
interleaving if there is dual-rank or qual-rank DIMMs.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/pxa/cpu.c')
0 files changed, 0 insertions, 0 deletions