diff options
author | wdenk <wdenk> | 2003-09-13 19:01:12 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-09-13 19:01:12 +0000 |
commit | 531716e1710083f91d9fa351f89d18e271b5c577 (patch) | |
tree | b16f8f3683078ee64ac2b87c2f3c1c37c60f9a93 /board | |
parent | b70e7a00c8bc6feb5f5718ba1c6d4fedb294483a (diff) | |
download | u-boot-midas-531716e1710083f91d9fa351f89d18e271b5c577.tar.gz u-boot-midas-531716e1710083f91d9fa351f89d18e271b5c577.tar.bz2 u-boot-midas-531716e1710083f91d9fa351f89d18e271b5c577.zip |
* Patch by David Müller, 13 Sep 2003:
various changes to VCMA9 board specific files
* Add I2C support for MGT5100 / MPC5200
Diffstat (limited to 'board')
-rw-r--r-- | board/mpl/vcma9/cmd_vcma9.c | 46 | ||||
-rw-r--r-- | board/mpl/vcma9/config.mk | 14 | ||||
-rw-r--r-- | board/mpl/vcma9/memsetup.S | 59 | ||||
-rw-r--r-- | board/mpl/vcma9/vcma9.c | 127 | ||||
-rw-r--r-- | board/mpl/vcma9/vcma9.h | 26 |
5 files changed, 209 insertions, 63 deletions
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c index 32fa33403f..3b0453521d 100644 --- a/board/mpl/vcma9/cmd_vcma9.c +++ b/board/mpl/vcma9/cmd_vcma9.c @@ -41,9 +41,12 @@ static uchar cs8900_chksum(ushort data) #endif extern void print_vcma9_info(void); -extern int vcma9_cantest(void); +extern int vcma9_cantest(int); extern int vcma9_nandtest(void); -extern int vcma9_dactest(void); +extern int vcma9_nanderase(void); +extern int vcma9_nandread(ulong); +extern int vcma9_nandwrite(ulong); +extern int vcma9_dactest(int); extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* ------------------------------------------------------------------------- */ @@ -126,18 +129,53 @@ int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #endif #if 0 if (strcmp(argv[1], "cantest") == 0) { - vcma9_cantest(); + if (argc >= 3) + vcma9_cantest(strcmp(argv[2], "s") ? 0 : 1); + else + vcma9_cantest(0); return 0; } if (strcmp(argv[1], "nandtest") == 0) { vcma9_nandtest(); return 0; } + if (strcmp(argv[1], "nanderase") == 0) { + vcma9_nanderase(); + return 0; + } + if (strcmp(argv[1], "nandread") == 0) { + ulong offset = 0; + + if (argc >= 3) + offset = simple_strtoul(argv[2], NULL, 16); + + vcma9_nandread(offset); + return 0; + } + if (strcmp(argv[1], "nandwrite") == 0) { + ulong offset = 0; + + if (argc >= 3) + offset = simple_strtoul(argv[2], NULL, 16); + + vcma9_nandwrite(offset); + return 0; + } if (strcmp(argv[1], "dactest") == 0) { - vcma9_dactest(); + if (argc >= 3) + vcma9_dactest(strcmp(argv[2], "s") ? 0 : 1); + else + vcma9_dactest(0); return 0; } #endif return (do_mplcommon(cmdtp, flag, argc, argv)); } + +U_BOOT_CMD( + vcma9, 6, 1, do_vcma9, + "vcma9 - VCMA9 specific commands\n", + "flash mem [SrcAddr]\n - updates U-Boot with image in memory\n" +); + diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk index 95d69cc6cc..942d42ef6a 100644 --- a/board/mpl/vcma9/config.mk +++ b/board/mpl/vcma9/config.mk @@ -1,5 +1,5 @@ # -# (C) Copyright 2002 +# (C) Copyright 2002, 2003 # David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> # # MPL VCMA9 board with S3C2410X (ARM920T) cpu @@ -8,17 +8,17 @@ # # -# MPL VCMA9 has 1 bank of 64 MB DRAM -# -# 3000'0000 to 3400'0000 +# MPL VCMA9 has 1 bank of minimal 16 MB DRAM +# from 0x30000000 # # Linux-Kernel is expected to be at 3000'8000, entry 3000'8000 -# optionally with a ramdisk at 3080'0000 +# optionally with a ramdisk at 3040'0000 # -# we load ourself to 33F8'0000 +# we load ourself to 30F8'0000 # -# download area is 3300'0000 +# download area is 3080'0000 # +#TEXT_BASE = 0x30F80000 TEXT_BASE = 0x33F80000 diff --git a/board/mpl/vcma9/memsetup.S b/board/mpl/vcma9/memsetup.S index 7b4193d0e8..ab6590153c 100644 --- a/board/mpl/vcma9/memsetup.S +++ b/board/mpl/vcma9/memsetup.S @@ -34,7 +34,9 @@ /* some parameters for the board */ -#define BWSCON 0x48000000 +#define BWSCON 0x48000000 +#define PLD_BASE 0x2C000000 +#define SDRAM_REG 0x2C000106 /* BWSCON */ #define DW8 (0x0) @@ -43,6 +45,9 @@ #define WAIT (0x1<<2) #define UBLB (0x1<<3) +/* BANKSIZE */ +#define BURST_EN (0x1<<7) + #define B1_BWSCON (DW16) #define B2_BWSCON (DW32) #define B3_BWSCON (DW32) @@ -130,24 +135,39 @@ memsetup: /* memory control configuration */ /* make r0 relative the current location so that it */ /* reads SMRDATA out of FLASH rather than memory ! */ - ldr r0, =SMRDATA + ldr r0, =CSDATA ldr r1, _TEXT_BASE sub r0, r0, r1 ldr r1, =BWSCON /* Bus Width Status Controller */ - add r2, r0, #13*4 + add r2, r0, #CSDATA_END-CSDATA 0: ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne 0b + /* PLD access is now possible */ + /* r0 == SDRAMDATA */ + /* r1 == SDRAM controller regs */ + ldr r2, =PLD_BASE + ldrb r3, [r2, #SDRAM_REG-PLD_BASE] + mov r4, #SDRAMDATA1_END-SDRAMDATA + /* calculate start and end point */ + mla r0, r3, r4, r0 + add r2, r0, r4 +0: + ldr r3, [r0], #4 + str r3, [r1], #4 + cmp r2, r0 + bne 0b + /* everything is fine now */ mov pc, lr .ltorg /* the literal pools origin */ -SMRDATA: +CSDATA: .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) @@ -155,9 +175,38 @@ SMRDATA: .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) +CSDATA_END: + +SDRAMDATA: +/* 4Mx8x4 */ + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + BURST_EN + .word 0x30 + .word 0x30 +SDRAMDATA1_END: + +/* 8Mx8x4 (not implemented yet) */ + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + BURST_EN + .word 0x30 + .word 0x30 + +/* 2Mx8x4 (not implemented yet) */ + .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) + .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) + .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32 + BURST_EN + .word 0x30 + .word 0x30 + +/* 4Mx8x2 (not implemented yet) */ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) - .word 0x32 + .word 0x32 + BURST_EN .word 0x30 .word 0x30 diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c index 359e565761..33cec02529 100644 --- a/board/mpl/vcma9/vcma9.c +++ b/board/mpl/vcma9/vcma9.c @@ -130,16 +130,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - /* * NAND flash initialization. */ @@ -162,9 +152,16 @@ static inline void NF_Reset(void) static inline void NF_Init(void) { +#if 0 /* a little bit too optimistic */ #define TACLS 0 #define TWRPH0 3 #define TWRPH1 0 +#else +#define TACLS 0 +#define TWRPH0 4 +#define TWRPH1 2 +#endif + NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0)); /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */ /* 1 1 1 1, 1 xxx, r xxx, r xxx */ @@ -177,15 +174,12 @@ void nand_init(void) { S3C2410_NAND * const nand = S3C2410_GetBase_NAND(); - unsigned totlen; NF_Init(); #ifdef DEBUG printf("NAND flash probing at 0x%.8lX\n", (ulong)nand); #endif - totlen = nand_probe((ulong)nand) >> 20; - - printf ("%4lu MB\n", totlen >> 20); + printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20); } #endif @@ -193,29 +187,40 @@ nand_init(void) * Get some Board/PLD Info */ -static uchar Get_PLD_ID(void) +static u8 Get_PLD_ID(void) +{ + VCMA9_PLD * const pld = VCMA9_GetBase_PLD(); + + return(pld->ID); +} + +static u8 Get_PLD_BOARD(void) { - return(*(volatile uchar *)PLD_ID_REG); + VCMA9_PLD * const pld = VCMA9_GetBase_PLD(); + + return(pld->BOARD); } -static uchar Get_PLD_BOARD(void) +static u8 Get_PLD_SDRAM(void) { - return(*(volatile uchar *)PLD_BOARD_REG); + VCMA9_PLD * const pld = VCMA9_GetBase_PLD(); + + return(pld->SDRAM); } -static uchar Get_PLD_Version(void) +static u8 Get_PLD_Version(void) { return((Get_PLD_ID() >> 4) & 0x0F); } -static uchar Get_PLD_Revision(void) +static u8 Get_PLD_Revision(void) { return(Get_PLD_ID() & 0x0F); } static int Get_Board_Config(void) { - uchar config = Get_PLD_BOARD() & 0x03; + u8 config = Get_PLD_BOARD() & 0x03; if (config == 3) return 1; @@ -228,6 +233,54 @@ static uchar Get_Board_PCB(void) return(((Get_PLD_BOARD() >> 4) & 0x03) + 'A'); } +static u8 Get_SDRAM_ChipNr(void) +{ + switch ((Get_PLD_SDRAM() >> 4) & 0x0F) { + case 0: return 4; + case 1: return 1; + case 2: return 2; + default: return 0; + } +} + +static ulong Get_SDRAM_ChipSize(void) +{ + switch (Get_PLD_SDRAM() & 0x0F) { + case 0: return 16 * (1024*1024); + case 1: return 32 * (1024*1024); + case 2: return 8 * (1024*1024); + case 3: return 8 * (1024*1024); + default: return 0; + } +} +static const char * Get_SDRAM_ChipGeom(void) +{ + switch (Get_PLD_SDRAM() & 0x0F) { + case 0: return "4Mx8x4"; + case 1: return "8Mx8x4"; + case 2: return "2Mx8x4"; + case 3: return "4Mx8x2"; + default: return "unknown"; + } +} + +static void Show_VCMA9_Info(char *board_name, char *serial) +{ + printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n", + board_name, serial, Get_Board_PCB(), Get_PLD_Version(), Get_PLD_Revision()); + printf("SDRAM: %d chips %s\n", Get_SDRAM_ChipNr(), Get_SDRAM_ChipGeom()); +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = Get_SDRAM_ChipSize() * Get_SDRAM_ChipNr(); + + return 0; +} + /* ------------------------------------------------------------------------- */ /* @@ -240,8 +293,6 @@ int checkboard(void) int i; backup_t *b = (backup_t *) s; - puts("Board: "); - i = getenv_r("serial#", s, 32); if ((i < 0) || strncmp (s, "VCMA9", 5)) { get_backup_values (b); @@ -249,32 +300,23 @@ int checkboard(void) puts ("### No HW ID - assuming VCMA9"); } else { b->serial_name[5] = 0; - printf ("%s-%d PCB Rev %c SN: %s", b->serial_name, Get_Board_Config(), - Get_Board_PCB(), &b->serial_name[6]); + Show_VCMA9_Info(b->serial_name, &b->serial_name[6]); } } else { s[5] = 0; - printf ("%s-%d PCB Rev %c SN: %s", s, Get_Board_Config(), Get_Board_PCB(), - &s[6]); + Show_VCMA9_Info(s, &s[6]); } - printf("\n"); + /*printf("\n");*/ return(0); } -void print_vcma9_rev(void) -{ - printf("Board: VCMA9-%d PCB Rev: %c (PLD Ver: %d, Rev: %d)\n", - Get_Board_Config(), Get_Board_PCB(), - Get_PLD_Version(), Get_PLD_Revision()); -} - extern void mem_test_reloc(void); int last_stage_init(void) { mem_test_reloc(); - print_vcma9_rev(); + checkboard(); show_stdio_dev(); check_env(); return 0; @@ -295,6 +337,15 @@ int overwrite_console(void) * Print VCMA9 Info ************************************************************************/ void print_vcma9_info(void) -{ - print_vcma9_rev(); +{ + unsigned char s[50]; + int i; + + if ((i = getenv_r("serial#", s, 32)) < 0) { + puts ("### No HW ID - assuming VCMA9"); + printf("i %d", i*24); + } else { + s[5] = 0; + Show_VCMA9_Info(s, &s[6]); + } } diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h index 068eb212e6..c0167d5168 100644 --- a/board/mpl/vcma9/vcma9.h +++ b/board/mpl/vcma9/vcma9.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2002 + * (C) Copyright 2002, 2003 * David Mueller, ELSOFT AG, d.mueller@elsoft.ch * * See file CREDITS for list of people who contributed to this @@ -116,11 +116,19 @@ static inline u32 NF_Read_ECC(void) #endif - -#define PLD_BASE_ADDRESS 0x2C000100 -#define PLD_ID_REG (PLD_BASE_ADDRESS + 0) -#define PLD_NIC_REG (PLD_BASE_ADDRESS + 1) -#define PLD_CAN_REG (PLD_BASE_ADDRESS + 2) -#define PLD_MISC_REG (PLD_BASE_ADDRESS + 3) -#define PLD_GPCD_REG (PLD_BASE_ADDRESS + 4) -#define PLD_BOARD_REG (PLD_BASE_ADDRESS + 5) +/* VCMA9 PLD regsiters */ +typedef struct { + S3C24X0_REG8 ID; + S3C24X0_REG8 NIC; + S3C24X0_REG8 CAN; + S3C24X0_REG8 MISC; + S3C24X0_REG8 GPCD; + S3C24X0_REG8 BOARD; + S3C24X0_REG8 SDRAM; +} /*__attribute__((__packed__))*/ VCMA9_PLD; + +#define VCMA9_PLD_BASE 0x2C000100 +static inline VCMA9_PLD * const VCMA9_GetBase_PLD(void) +{ + return (VCMA9_PLD * const)VCMA9_PLD_BASE; +} |