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| author | Peter Barada <peter.barada@logicpd.com> | 2012-11-13 07:40:28 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-12-10 08:54:02 -0700 |
| commit | 8c4445d26633f43fcd04add3d6cdc3bc41d14841 (patch) | |
| tree | e2cab89ccff5955681182e71200a8d1053585528 /board/timll | |
| parent | d7aff44a00e5de3de2ed18a3329edf5ff9d3aada (diff) | |
| download | u-boot-midas-8c4445d26633f43fcd04add3d6cdc3bc41d14841.tar.gz u-boot-midas-8c4445d26633f43fcd04add3d6cdc3bc41d14841.tar.bz2 u-boot-midas-8c4445d26633f43fcd04add3d6cdc3bc41d14841.zip | |
Pass sdrc timing values through board_sdrc_timings structure
Instead of passing individual registers by value to board_get_mem_timings,
pass a board_mem_timings structure pointer for the board files to fill in.
Pass same structure pointer to write_sdrc_timings. This saves about
90 bytes of space in SPL.
Signed-off-by: Peter Barada <peter.barada@logicpd.com>
Diffstat (limited to 'board/timll')
| -rw-r--r-- | board/timll/devkit8000/devkit8000.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index 35f5e15fc2..85685ee7c0 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -188,16 +188,15 @@ int spl_start_uboot(void) * provides the timing values back to the function that configures * the memory. We have either one or two banks of 128MB DDR. */ -void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, - u32 *mr) +void get_board_mem_timings(struct board_sdrc_timings *timings) { /* General SDRC config */ - *mcfg = MICRON_V_MCFG_165(128 << 20); - *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + timings->mcfg = MICRON_V_MCFG_165(128 << 20); + timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; /* AC timings */ - *ctrla = MICRON_V_ACTIMA_165; - *ctrlb = MICRON_V_ACTIMB_165; + timings->ctrla = MICRON_V_ACTIMA_165; + timings->ctrlb = MICRON_V_ACTIMB_165; - *mr = MICRON_V_MR_165; + timings->mr = MICRON_V_MR_165; } |