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| author | Kumar Gala <galak@kernel.crashing.org> | 2007-11-29 02:10:09 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-12-11 22:34:20 -0600 |
| commit | 04db400892da37b76a585e332a0c137954ad2015 (patch) | |
| tree | 201c757a3032f786588d94c0fde8469a865b40b5 /board/sbc8560 | |
| parent | 2714223f8e04ab3e4133ff65872eef366d90bfea (diff) | |
| download | u-boot-midas-04db400892da37b76a585e332a0c137954ad2015.tar.gz u-boot-midas-04db400892da37b76a585e332a0c137954ad2015.tar.bz2 u-boot-midas-04db400892da37b76a585e332a0c137954ad2015.zip | |
Stop using immap_t on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/sbc8560')
| -rw-r--r-- | board/sbc8560/sbc8560.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index e02fb55678..47df884ce5 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -195,8 +195,7 @@ const iop_conf_t iop_conf_tab[4][32] = { int board_early_init_f (void) { #if defined(CONFIG_PCI) - volatile immap_t *immr = (immap_t *)CFG_IMMR; - volatile ccsr_pcix_t *pci = &immr->im_pcix; + volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR); pci->peer &= 0xfffffffdf; /* disable master abort */ #endif @@ -266,7 +265,7 @@ long int initdram (int board_type) extern long spd_sdram (void); #if 0 #if !defined(CONFIG_RAM_AS_FLASH) - volatile ccsr_lbc_t *lbc= &immap->im_lbc; + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); sys_info_t sysinfo; uint temp_lbcdll = 0; #endif @@ -335,8 +334,7 @@ long int initdram (int board_type) * enable errors */ uint *p = 0; uint i = 0; - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_ddr_t *ddr= &immap->im_ddr; + volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR); dma_init(); for (*p = 0; p < (uint *)(8 * 1024); p++) { if (((unsigned int)p & 0x1f) == 0) { dcbz(p); } @@ -423,8 +421,7 @@ long int fixed_sdram (void) #define CFG_DDR_CONTROL 0xc2000000 #ifndef CFG_RAMBOOT - volatile immap_t *immap = (immap_t *)CFG_IMMR; - volatile ccsr_ddr_t *ddr= &immap->im_ddr; + volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR); ddr->cs0_bnds = 0x00000007; ddr->cs1_bnds = 0x0010001f; |