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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/o2dnt | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-midas-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-midas-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 u-boot-midas-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/o2dnt')
-rw-r--r-- | board/o2dnt/flash.c | 32 | ||||
-rw-r--r-- | board/o2dnt/o2dnt.c | 14 |
2 files changed, 23 insertions, 23 deletions
diff --git a/board/o2dnt/flash.c b/board/o2dnt/flash.c index 1cf78c7b82..9f3088004a 100644 --- a/board/o2dnt/flash.c +++ b/board/o2dnt/flash.c @@ -55,7 +55,7 @@ typedef volatile unsigned char FLASH_PORT_WIDTHV; #define FLASH_CYCLE1 0x0555 #define FLASH_CYCLE2 0x02aa -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -82,25 +82,25 @@ unsigned long flash_init (void) flash_preinit(); /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { memset(&flash_info[i], 0, sizeof(flash_info_t)); flash_info[i].flash_id = FLASH_UNKNOWN; } /* Query flash chip */ flash_info[0].size = - flash_get_size((FPW *)CFG_FLASH_BASE, &flash_info[0]); + flash_get_size((FPW *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); size += flash_info[0].size; /* get the h/w and s/w protection status in sync */ flash_sync_real_protect(&flash_info[0]); -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, - flash_get_info(CFG_MONITOR_BASE)); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); #endif #ifdef CONFIG_ENV_IS_IN_FLASH @@ -135,7 +135,7 @@ static flash_info_t *flash_get_info(ulong base) int i; flash_info_t * info; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->size && info->start[0] <= base && @@ -143,7 +143,7 @@ static flash_info_t *flash_get_info(ulong base) break; } - return (i == CFG_MAX_FLASH_BANKS ? 0 : info); + return (i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info); } /*----------------------------------------------------------------------- @@ -328,7 +328,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) udelay (1000); while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) INTEL_SUSPEND;/* suspend erase */ flash_reset(info); /* reset to read mode */ @@ -337,7 +337,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) } /* show that we're waiting */ - if ((get_timer(last)) > CFG_HZ) { /* every second */ + if ((get_timer(last)) > CONFIG_SYS_HZ) { /* every second */ putc ('.'); last = get_timer(0); } @@ -425,7 +425,7 @@ static int write_data (flash_info_t *info, FPWV *dest, FPW data) /* wait while polling the status register */ while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) INTEL_RESET; /* restore read mode */ return (1); } @@ -464,7 +464,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) start = get_timer (0); while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) { - if (get_timer (start) > CFG_FLASH_UNLOCK_TOUT) { + if (get_timer (start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) { printf ("Flash lock bit operation timed out\n"); rc = 1; break; @@ -494,7 +494,7 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) { if (get_timer (start) > - CFG_FLASH_UNLOCK_TOUT) { + CONFIG_SYS_FLASH_UNLOCK_TOUT) { printf ("Flash lock bit operation timed out\n"); rc = 1; break; @@ -550,7 +550,7 @@ static unsigned char intel_sector_protected (flash_info_t *info, ushort sector) /* * first, wait for the WSM to be finished. The rationale for * waiting for the WSM to become idle for at most - * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy + * CONFIG_SYS_FLASH_ERASE_TOUT is as follows. The WSM can be busy * because of: (1) erase, (2) program or (3) lock bit * configuration. So we just wait for the longest timeout of * the (1)-(3), i.e. the erase timeout. @@ -563,7 +563,7 @@ static unsigned char intel_sector_protected (flash_info_t *info, ushort sector) start = get_timer (0); while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { - if (get_timer (start) > CFG_FLASH_ERASE_TOUT) { + if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) { *addr = (FPW) INTEL_RESET; /* restore read mode */ printf("WSM busy too long, can't get prot status\n"); return 1; diff --git a/board/o2dnt/o2dnt.c b/board/o2dnt/o2dnt.c index 19faf52aff..c72a7414e4 100644 --- a/board/o2dnt/o2dnt.c +++ b/board/o2dnt/o2dnt.c @@ -65,7 +65,7 @@ static void sdram_start (int hi_addr) /* * ATTENTION: Although partially referenced initdram does NOT make real use - * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE + * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ phys_size_t initdram (int board_type) @@ -86,9 +86,9 @@ phys_size_t initdram (int board_type) /* find RAM size using SDRAM CS0 only */ sdram_start(0); - test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); sdram_start(1); - test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); if (test1 > test2) { sdram_start(0); dramsize = test1; @@ -114,11 +114,11 @@ phys_size_t initdram (int board_type) if (!dramsize) sdram_start(0); - test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); if (!dramsize) { sdram_start(1); - test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); } if (test1 > test2) { @@ -164,10 +164,10 @@ void flash_afterinit(ulong size) { if (size == 0x800000) { /* adjust mapping */ *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START = - START_REG(CFG_BOOTCS_START | size); + START_REG(CONFIG_SYS_BOOTCS_START | size); *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP = - STOP_REG(CFG_BOOTCS_START | size, size); + STOP_REG(CONFIG_SYS_BOOTCS_START | size, size); } } |