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| author | Wolfgang Denk <wd@denx.de> | 2011-06-02 23:18:32 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-06-02 23:18:32 +0200 |
| commit | 4c9640865b1c16f5d23ed36afce780b6474136f2 (patch) | |
| tree | 89da47049f8c8f203d343684506d7a5a2332d9fb /arch | |
| parent | b79003627d0cf5ec1443e40d8faa7471657f0f33 (diff) | |
| download | u-boot-midas-4c9640865b1c16f5d23ed36afce780b6474136f2.tar.gz u-boot-midas-4c9640865b1c16f5d23ed36afce780b6474136f2.tar.bz2 u-boot-midas-4c9640865b1c16f5d23ed36afce780b6474136f2.zip | |
Minor coding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/u8500/lowlevel.S | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-u8500/gpio.h | 36 |
2 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S index 743071c569..cffdfd1381 100644 --- a/arch/arm/cpu/armv7/u8500/lowlevel.S +++ b/arch/arm/cpu/armv7/u8500/lowlevel.S @@ -28,8 +28,8 @@ lowlevel_init: .align 5 .globl reset_cpu reset_cpu: - ldr r0, =CFG_PRCMU_BASE - ldr r1, =0x1 - str r1, [r0, #0x228] + ldr r0, =CFG_PRCMU_BASE + ldr r1, =0x1 + str r1, [r0, #0x228] _loop_forever: b _loop_forever diff --git a/arch/arm/include/asm/arch-u8500/gpio.h b/arch/arm/include/asm/arch-u8500/gpio.h index 769def19b5..7b5c97d0fc 100644 --- a/arch/arm/include/asm/arch-u8500/gpio.h +++ b/arch/arm/include/asm/arch-u8500/gpio.h @@ -38,25 +38,25 @@ struct gpio_register { - u32 gpio_dat; /* data register *//*0x000 */ - u32 gpio_dats; /* data Set register *//*0x004 */ - u32 gpio_datc; /* data Clear register *//*0x008 */ - u32 gpio_pdis; /* Pull disable register *//*0x00C */ - u32 gpio_dir; /* data direction register *//*0x010 */ - u32 gpio_dirs; /* data dir Set register *//*0x014 */ - u32 gpio_dirc; /* data dir Clear register *//*0x018 */ - u32 gpio_slpm; /* Sleep mode register *//*0x01C */ - u32 gpio_afsa; /* AltFun A Select reg *//*0x020 */ - u32 gpio_afsb; /* AltFun B Select reg *//*0x024 */ - u32 gpio_lowemi;/* low EMI Select reg *//*0x028 */ + u32 gpio_dat; /* data register : 0x000 */ + u32 gpio_dats; /* data Set register : 0x004 */ + u32 gpio_datc; /* data Clear register : 0x008 */ + u32 gpio_pdis; /* Pull disable register : 0x00C */ + u32 gpio_dir; /* data direction register : 0x010 */ + u32 gpio_dirs; /* data dir Set register : 0x014 */ + u32 gpio_dirc; /* data dir Clear register : 0x018 */ + u32 gpio_slpm; /* Sleep mode register : 0x01C */ + u32 gpio_afsa; /* AltFun A Select reg : 0x020 */ + u32 gpio_afsb; /* AltFun B Select reg : 0x024 */ + u32 gpio_lowemi;/* low EMI Select reg : 0x028 */ u32 reserved_1[(0x040 - 0x02C) >> 2]; /*0x028-0x3C Reserved*/ - u32 gpio_rimsc; /* rising edge intr set/clear *//*0x040 */ - u32 gpio_fimsc; /* falling edge intr set/clear register *//*0x044 */ - u32 gpio_mis; /* masked interrupt status register *//*0x048 */ - u32 gpio_ic; /* Interrupt Clear register *//*0x04C */ - u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register *//*0x050 */ - u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register *//*0x054 */ - u32 gpio_wks; /* Wakeup Status register *//*0x058 */ + u32 gpio_rimsc; /* rising edge intr set/clear : 0x040 */ + u32 gpio_fimsc; /* falling edge intr set/clear register : 0x044 */ + u32 gpio_mis; /* masked interrupt status register : 0x048 */ + u32 gpio_ic; /* Interrupt Clear register : 0x04C */ + u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register : 0x050 */ + u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register : 0x054 */ + u32 gpio_wks; /* Wakeup Status register : 0x058 */ }; /* Error values returned by functions */ |