Add MACH_TYPE records for several AT91 boards.

Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.

Signed-off-by:	Peter Pearse <peter.pearse@arm.com>
Signed-off-by:	Ulf Samuelsson <ulf@atmel.com>

13 files changed, 516 insertions, 139 deletions

diff --git a/board/at91rm9200dk/Makefile b/board/at91rm9200dk/Makefile
index 0fcafd9b0f..7dfc27f0a7 100644
--- a/board/at91rm9200dk/Makefile
+++ b/board/at91rm9200dk/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS	:= at91rm9200dk.o at45.o flash.o
+COBJS	:= at91rm9200dk.o at45.o flash.o led.o mux.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/common/soft_i2c.c b/common/soft_i2c.c
index 0f6e3a938d..c5d7e205e5 100644
--- a/common/soft_i2c.c
+++ b/common/soft_i2c.c
@@ -29,7 +29,7 @@
 #ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
 #include <ioports.h>
 #endif
-#ifdef CONFIG_AT91RM9200DK		/* need this for the at91rm9200dk */
+#ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #endif
diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile
index eaabad26a0..ab4c52c8fb 100644
--- a/cpu/arm920t/at91rm9200/Makefile
+++ b/cpu/arm920t/at91rm9200/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).a
 
 COBJS	= bcm5221.o dm9161.o ether.o i2c.o interrupts.o \
-	  lxt972.o serial.o usb.o
+	  lxt972.o serial.o usb.o spi.o
 SOBJS	= lowlevel_init.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/arm920t/at91rm9200/dm9161.c b/cpu/arm920t/at91rm9200/dm9161.c
index 968f653081..1beb6e8ba1 100644
--- a/cpu/arm920t/at91rm9200/dm9161.c
+++ b/cpu/arm920t/at91rm9200/dm9161.c
@@ -95,7 +95,7 @@ UCHAR dm9161_GetLinkSpeed (AT91PS_EMAC p_mac)
 		return TRUE;
 	}
 
-	if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) {
+	if ((stat1 & DM9161_100BASE_TX_HD) && (stat2 & DM9161_100HDX)) {
 		/*set MII for 100BaseTX and Half Duplex  */
 		p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
 				~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
@@ -140,7 +140,7 @@ UCHAR dm9161_InitPhy (AT91PS_EMAC p_mac)
 	at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue);
 	/* set FDX, SPD, Link, INTR masks */
 	IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK |
-		     DM9161_LINK_MASK | DM9161_INTR_MASK);
+			DM9161_LINK_MASK | DM9161_INTR_MASK);
 	at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue);
 	at91rm9200_EmacDisableMDIO (p_mac);
 
@@ -174,10 +174,11 @@ UCHAR dm9161_AutoNegotiate (AT91PS_EMAC p_mac, int *status)
 	if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
 		return FALSE;
 
-	/* Set the Auto_negotiation Advertisement Register */
-	/* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
+	/* Set the Auto_negotiation Advertisement Register	*/
+	/* MII advertising for Next page, 100BaseTxFD and HD,	*/
+	/* 10BaseTFD and HD, IEEE 802.3 */
 	PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX |
-		  DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
+			DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
 	if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar))
 		return FALSE;
 
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 346f0d09ea..b9c364bc67 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,9 @@
 
 #include <config.h>
 #include <version.h>
-
+#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+#include	<led.h>
+#endif
 
 /*
  *************************************************************************
@@ -116,6 +118,69 @@ reset:
 	orr	r0,r0,#0xd3
 	msr	cpsr,r0
 
+#if	CONFIG_AT91RM9200
+#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+	bl LED_init
+	bl red_LED_on
+#endif
+
+#ifdef CONFIG_BOOTBINFUNC
+/* code based on entry.S from ATMEL */
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define CKGR_MOR 0
+	/* Get the CKGR Base Address */
+	ldr     r1, =AT91C_BASE_CKGR
+
+/* Main oscillator Enable register	APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
+/*	ldr 	r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
+	ldr 	r0, =0x0000FF01
+	str     r0, [r1, #CKGR_MOR]
+	/* Add loop to compensate Main Oscillator startup time */
+	ldr 	r0, =0x00000010
+LoopOsc:
+	subs    r0, r0, #1
+	bhi     LoopOsc
+	/* scratch stack */
+	ldr 	r1, =0x00204000
+	/* Insure word alignment */
+	bic     r1, r1, #3
+	/* Init stack SYS	 */
+	mov     sp, r1
+	/*
+	 * This does a lot more than just set up the memory, which
+	 * is why it's called lowlevelinit
+	 */
+	bl	lowlevelinit /* in memsetup.S */
+	bl	icache_enable;
+	/* ------------------------------------
+	 * Read/modify/write CP15 control register
+	 * -------------------------------------
+	 * read cp15 control register (cp15 r1) in r0
+	 * ------------------------------------
+	 */
+	mrc     p15, 0, r0, c1, c0, 0
+	/* Reset bit :Little Endian end fast bus mode */
+	ldr     r3, =0xC0000080
+	/* Set bit :Asynchronous clock mode, Not Fast Bus */
+	ldr     r4, =0xC0000000
+	bic     r0, r0, r3
+	orr     r0, r0, r4
+	/* write r0 in cp15 control register (cp15 r1) */
+	mcr     p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_BOOTBINFUNC */
+	/*
+	 * relocate exeception table
+	 */
+	ldr	r0, =_start
+	ldr	r1, =0x0
+	mov	r2, #16
+copyex:
+	subs	r2, r2, #1
+	ldr	r3, [r0], #4
+	str	r3, [r1], #4
+	bne	copyex
+#endif
+
 /* turn off the watchdog */
 #if defined(CONFIG_S3C2400)
 # define pWTCON		0x15300000
@@ -160,6 +225,26 @@ reset:
 	bl	cpu_init_crit
 #endif
 
+#ifdef	CONFIG_AT91RM9200
+#ifdef CONFIG_BOOTBINFUNC
+relocate:				/* relocate U-Boot to RAM	    */
+	adr	r0, _start		/* r0 <- current position of code   */
+	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
+	cmp     r0, r1                  /* don't reloc during debug         */
+	beq     stack_setup
+
+	ldr	r2, _armboot_start
+	ldr	r3, _bss_start
+	sub	r2, r3, r2		/* r2 <- size of armboot            */
+	add	r2, r0, r2		/* r2 <- source end address         */
+
+copy_loop:
+	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
+	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
+	cmp	r0, r2			/* until source end addreee [r2]    */
+	ble	copy_loop
+#endif /* CONFIG_BOOTBINFUNC */
+#else
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
@@ -178,7 +263,7 @@ copy_loop:
 	cmp	r0, r2			/* until source end addreee [r2]    */
 	ble	copy_loop
 #endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
-
+#endif
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
@@ -262,7 +347,11 @@ cpu_init_crit:
 	 * find a lowlevel_init.S in your board directory.
 	 */
 	mov	ip, lr
+#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+
+#else
 	bl	lowlevel_init
+#endif
 	mov	lr, ip
 	mov	pc, lr
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/drivers/dataflash.c b/drivers/dataflash.c
index 17eb8597f8..3b068d7125 100644
--- a/drivers/dataflash.c
+++ b/drivers/dataflash.c
@@ -26,18 +26,67 @@
 AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
 static AT91S_DataFlash DataFlashInst;
 
+#ifdef CONFIG_AT91SAM9260EK
+int cs[][CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+	{CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
+};
+#elif defined(CONFIG_AT91SAM9263EK)
+int cs[][CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}	/* Logical adress, CS */
+};
+#else
 int cs[][CFG_MAX_DATAFLASH_BANKS] = {
 	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
 	{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
 };
+#endif
 
 /*define the area offsets*/
+#if defined(CONFIG_AT91SAM9261EK) || defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AT91SAM9263EK)
+#if	defined(CONFIG_NEW_PARTITION)
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0x00000000,	0x00003FFF, 	FLAG_PROTECT_SET,	0,    		"Bootstrap"},  	/* ROM code */
+	{0x00004200,	0x000083FF, 	FLAG_PROTECT_CLEAR,	0,    		"Environment"},	/* u-boot environment */
+	{0x00008400,	0x0003DDFF,	FLAG_PROTECT_SET,	0,    		"U-Boot"},     	/* u-boot code */
+	{0x0003DE00,	0x00041FFF,	FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"MON"},	       	/* Room for alternative boot monitor */
+	{0x00042000,	0x0018BFFF,	FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"OS"},	       	/* data area size to tune */
+	{0x0018C000,	0xFFFFFFFF,	FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"FS"},	       	/* data area size to tune */
+};
+#else
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0, 0x3fff, FLAG_PROTECT_SET},			/* ROM code */
+	{0x4000, 0x7fff, FLAG_PROTECT_CLEAR},		/* u-boot environment */
+	{0x8000, 0x37fff, FLAG_PROTECT_SET},		/* u-boot code */
+	{0x38000, 0x1fffff, FLAG_PROTECT_CLEAR},	/* data area size to tune */
+};
+#endif
+#elif defined(CONFIG_NEW_PARTITION)
+/*define the area offsets*/
+/* Invalid partitions should be defined with start > end */ 
+dataflash_protect_t area_list[NB_DATAFLASH_AREA*CFG_MAX_DATAFLASH_BANKS] = {
+	{0x00000000, 0x000083ff, FLAG_PROTECT_SET,	0,		"Bootstrap"},	/* ROM code */
+	{0x00008400, 0x00020fff, FLAG_PROTECT_SET,	0,		"U-Boot"},	/* u-boot code */
+	{0x00021000, 0x000293ff, FLAG_PROTECT_CLEAR,	0,		"Environment"},	/* u-boot environment 8Kb */
+	{0x00029400, 0x00041fff, FLAG_PROTECT_INVALID,	0,		"<Unused>"},	/* Rest of Sector 1 */
+	{0x00042000, 0x0018Bfff, FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"OS"},	/* data area size to tune */
+	{0x0018C000, 0xffffffff, FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"FS"},	/* data area size to tune */
+
+	{0x00000000, 0xffffffff, FLAG_PROTECT_CLEAR,	FLAG_SETENV,	"Data"},	/* data area */
+	{0xffffffff, 0x00000000, FLAG_PROTECT_INVALID,	0,		"<Invalid>"},	/* Invalid */
+	{0xffffffff, 0x00000000, FLAG_PROTECT_INVALID,	0,		"<Invalid>"},	/* Invalid */
+	{0xffffffff, 0x00000000, FLAG_PROTECT_INVALID,	0,		"<Invalid>"},	/* Invalid */
+	{0xffffffff, 0x00000000, FLAG_PROTECT_INVALID,	0,		"<Invalid>"},	/* Invalid */
+	{0xffffffff, 0x00000000, FLAG_PROTECT_INVALID,	0,		"<Invalid>"},	/* Invalid */
+};
+#else
 dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
 	{0, 0x7fff, FLAG_PROTECT_SET},			/* ROM code */
 	{0x8000, 0x1ffff, FLAG_PROTECT_SET},		/* u-boot code */
 	{0x20000, 0x27fff, FLAG_PROTECT_CLEAR},		/* u-boot environment */
 	{0x28000, 0x1fffff, FLAG_PROTECT_CLEAR},	/* data area size to tune */
 };
+#endif
 
 extern void AT91F_SpiInit (void);
 extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc);
@@ -45,22 +94,28 @@ extern int AT91F_DataFlashRead (AT91PS_DataFlash pDataFlash,
 				unsigned long addr,
 				unsigned long size, char *buffer);
 extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash,
-				    unsigned char *src,
-			            int dest,
-				    int size );
+				unsigned char *src,
+				int dest,
+				int size );
 
 int AT91F_DataflashInit (void)
 {
 	int i, j;
 	int dfcode;
+	int part = 0;
+	int last_part;
+	int found[CFG_MAX_DATAFLASH_BANKS];
+	unsigned char protected;
 
 	AT91F_SpiInit ();
 
 	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+		found[i] = 0;
 		dataflash_info[i].Desc.state = IDLE;
 		dataflash_info[i].id = 0;
 		dataflash_info[i].Device.pages_number = 0;
-		dfcode = AT91F_DataflashProbe (cs[i][1], &dataflash_info[i].Desc);
+		dfcode = AT91F_DataflashProbe (cs[i][1], 
+				&dataflash_info[i].Desc);
 
 		switch (dfcode) {
 		case AT45DB161:
@@ -72,6 +127,7 @@ int AT91F_DataflashInit (void)
 			dataflash_info[i].Desc.DataFlash_state = IDLE;
 			dataflash_info[i].logical_address = cs[i][0];
 			dataflash_info[i].id = dfcode;
+			found[i] += dfcode;;
 			break;
 
 		case AT45DB321:
@@ -83,6 +139,7 @@ int AT91F_DataflashInit (void)
 			dataflash_info[i].Desc.DataFlash_state = IDLE;
 			dataflash_info[i].logical_address = cs[i][0];
 			dataflash_info[i].id = dfcode;
+			found[i] += dfcode;;
 			break;
 
 		case AT45DB642:
@@ -94,7 +151,9 @@ int AT91F_DataflashInit (void)
 			dataflash_info[i].Desc.DataFlash_state = IDLE;
 			dataflash_info[i].logical_address = cs[i][0];
 			dataflash_info[i].id = dfcode;
+			found[i] += dfcode;;
 			break;
+
 		case AT45DB128:
 			dataflash_info[i].Device.pages_number = 16384;
 			dataflash_info[i].Device.pages_size = 1056;
@@ -104,9 +163,11 @@ int AT91F_DataflashInit (void)
 			dataflash_info[i].Desc.DataFlash_state = IDLE;
 			dataflash_info[i].logical_address = cs[i][0];
 			dataflash_info[i].id = dfcode;
+			found[i] += dfcode;;
 			break;
 
 		default:
+			dfcode = 0;
 			break;
 		}
 		/* set the last area end to the dataflash size*/
@@ -114,16 +175,64 @@ int AT91F_DataflashInit (void)
 				(dataflash_info[i].Device.pages_number *
 				dataflash_info[i].Device.pages_size)-1;
 
+		last_part=0;
 		/* set the area addresses */
 		for(j = 0; j<NB_DATAFLASH_AREA; j++) {
-			dataflash_info[i].Device.area_list[j].start = area_list[j].start + dataflash_info[i].logical_address;
-			dataflash_info[i].Device.area_list[j].end = area_list[j].end + dataflash_info[i].logical_address;
-			dataflash_info[i].Device.area_list[j].protected = area_list[j].protected;
+			if(found[i]!=0) {
+				dataflash_info[i].Device.area_list[j].start = 
+					area_list[part].start + 
+					dataflash_info[i].logical_address;
+				if(area_list[part].end == 0xffffffff) {
+					dataflash_info[i].Device.area_list[j].end = 
+						dataflash_info[i].end_address + 
+						dataflash_info	[i].logical_address;
+					last_part = 1;
+				} else {
+					dataflash_info[i].Device.area_list[j].end = 
+						area_list[part].end + 
+						dataflash_info[i].logical_address;
+				}
+				protected = area_list[part].protected;
+				/* Set the environment according to the label...*/
+				if(protected == FLAG_PROTECT_INVALID) {
+					dataflash_info[i].Device.area_list[j].protected = 
+						FLAG_PROTECT_INVALID;
+				} else {
+					dataflash_info[i].Device.area_list[j].protected = 
+						protected;
+				}
+				strcpy((char*)(dataflash_info[i].Device.area_list[j].label),
+						(const char *)area_list[part].label);
+			}
+			part++;
 		}
 	}
-	return (1);
+	return found[0];
 }
 
+#ifdef	CONFIG_NEW_DF_PARTITION
+int AT91F_DataflashSetEnv (void)
+{
+	int i, j;
+	int part;
+	unsigned char env;
+	unsigned char s[32];	/* Will fit a long int in hex */
+	unsigned long start;
+	for (i = 0, part= 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+		for(j = 0; j<NB_DATAFLASH_AREA; j++) {
+			env = area_list[part].setenv;
+			/* Set the environment according to the label...*/
+			if((env & FLAG_SETENV) == FLAG_SETENV) {
+				start = 
+				dataflash_info[i].Device.area_list[j].start;
+				sprintf(s,"%X",start);
+				setenv(area_list[part].label,s);
+			}
+			part++;
+		}
+	}
+}
+#endif
 
 void dataflash_print_info (void)
 {
@@ -131,25 +240,25 @@ void dataflash_print_info (void)
 
 	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
 		if (dataflash_info[i].id != 0) {
-			printf ("DataFlash:");
+			printf("DataFlash:");
 			switch (dataflash_info[i].id) {
 			case AT45DB161:
-				printf ("AT45DB161\n");
+				printf("AT45DB161\n");
 				break;
 
 			case AT45DB321:
-				printf ("AT45DB321\n");
+				printf("AT45DB321\n");
 				break;
 
 			case AT45DB642:
-				printf ("AT45DB642\n");
+				printf("AT45DB642\n");
 				break;
 			case AT45DB128:
-				printf ("AT45DB128\n");
+				printf("AT45DB128\n");
 				break;
 			}
 
-			printf ("Nb pages: %6d\n"
+			printf("Nb pages: %6d\n"
 				"Page Size: %6d\n"
 				"Size=%8d bytes\n"
 				"Logical address: 0x%08X\n",
@@ -159,28 +268,44 @@ void dataflash_print_info (void)
 				dataflash_info[i].Device.pages_size,
 				(unsigned int) dataflash_info[i].logical_address);
 			for (j=0; j< NB_DATAFLASH_AREA; j++) {
-				printf ("Area %i:\t%08lX to %08lX %s\n", j,
-					dataflash_info[i].Device.area_list[j].start,
-					dataflash_info[i].Device.area_list[j].end,
-					(dataflash_info[i].Device.area_list[j].protected ==
-					FLAG_PROTECT_SET) ? "(RO)" : "");
+				switch(dataflash_info[i].Device.area_list[j].protected) {
+				case	FLAG_PROTECT_SET:
+				case	FLAG_PROTECT_CLEAR:
+					printf("Area %i:\t%08lX to %08lX %s", j,
+						dataflash_info[i].Device.area_list[j].start,
+						dataflash_info[i].Device.area_list[j].end,
+						(dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : "    ");
+#ifdef	CONFIG_NEW_DF_PARTITION
+						printf(" %s\n",	dataflash_info[i].Device.area_list[j].label);
+#else
+						printf("\n");
+#endif
+					break;
+#ifdef	CONFIG_NEW_DF_PARTITION
+				case	FLAG_PROTECT_INVALID:
+					break;
+#endif
+				}
 			}
 		}
 	}
 }
 
 
-/*------------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataflashSelect 					*/
-/* Object              : Select the correct device				*/
-/*------------------------------------------------------------------------------*/
-AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, unsigned long *addr)
+/*---------------------------------------------------------------------------*/
+/* Function Name       : AT91F_DataflashSelect 				     */
+/* Object              : Select the correct device			     */
+/*---------------------------------------------------------------------------*/
+AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, 
+				unsigned long *addr)
 {
 	char addr_valid = 0;
 	int i;
 
 	for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++)
-		if ((*addr & 0xFF000000) == dataflash_info[i].logical_address) {
+		if ( dataflash_info[i].id
+			&& ((((int) addr) & 0xFF000000) ==
+			dataflash_info[i].logical_address)) {
 			addr_valid = 1;
 			break;
 		}
@@ -194,10 +319,10 @@ AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, unsigned long *
 	return (pFlash);
 }
 
-/*------------------------------------------------------------------------------*/
-/* Function Name       : addr_dataflash 					*/
-/* Object              : Test if address is valid				*/
-/*------------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name       : addr_dataflash 		    		     */
+/* Object              : Test if address is valid			     */
+/*---------------------------------------------------------------------------*/
 int addr_dataflash (unsigned long addr)
 {
 	int addr_valid = 0;
@@ -213,25 +338,27 @@ int addr_dataflash (unsigned long addr)
 
 	return addr_valid;
 }
-/*-----------------------------------------------------------------------------*/
-/* Function Name       : size_dataflash 					*/
-/* Object              : Test if address is valid regarding the size		*/
-/*-----------------------------------------------------------------------------*/
-int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size)
+/*---------------------------------------------------------------------------*/
+/* Function Name       : size_dataflash 				     */
+/* Object              : Test if address is valid regarding the size	     */
+/*---------------------------------------------------------------------------*/
+int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, 
+			unsigned long size)
 {
 	/* is outside the dataflash */
 	if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size *
 		pdataFlash->pDevice->pages_number)) return 0;
 	/* is too large for the dataflash */
 	if (size > ((pdataFlash->pDevice->pages_size *
-		pdataFlash->pDevice->pages_number) - ((int)addr & 0x0FFFFFFF))) return 0;
+		pdataFlash->pDevice->pages_number) - 
+		((int)addr & 0x0FFFFFFF))) return 0;
 
 	return 1;
 }
-/*-----------------------------------------------------------------------------*/
-/* Function Name       : prot_dataflash 					*/
-/* Object              : Test if destination area is protected			*/
-/*-----------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name       : prot_dataflash 				     */
+/* Object              : Test if destination area is protected		     */
+/*---------------------------------------------------------------------------*/
 int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)
 {
 int area;
@@ -241,17 +368,23 @@ int area;
 			(addr < pdataFlash->pDevice->area_list[area].end))
 			break;
 	}
-	if (area == NB_DATAFLASH_AREA) return -1;
+	if (area == NB_DATAFLASH_AREA) 
+		return -1;
+
 	/*test protection value*/
-	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET) return 0;
+	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET) 
+		return 0;
+	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID) 
+		return 0;
 
 	return 1;
 }
-/*-----------------------------------------------------------------------------*/
-/* Function Name       : dataflash_real_protect				*/
-/* Object              : protect/unprotect area				*/
-/*-----------------------------------------------------------------------------*/
-int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr)
+/*--------------------------------------------------------------------------*/
+/* Function Name       : dataflash_real_protect				    */
+/* Object              : protect/unprotect area				    */
+/*--------------------------------------------------------------------------*/
+int dataflash_real_protect (int flag, unsigned long start_addr, 
+				unsigned long end_addr)
 {
 int i,j, area1, area2, addr_valid = 0;
 	/* find dataflash */
@@ -267,27 +400,38 @@ int i,j, area1, area2, addr_valid = 0;
 	}
 	/* find start area */
 	for (area1=0; area1 < NB_DATAFLASH_AREA; area1++) {
-		if (start_addr == dataflash_info[i].Device.area_list[area1].start) break;
+		if (start_addr == dataflash_info[i].Device.area_list[area1].start) 
+			break;
 	}
 	if (area1 == NB_DATAFLASH_AREA) return -1;
 	/* find end area */
 	for (area2=0; area2 < NB_DATAFLASH_AREA; area2++) {
-		if (end_addr == dataflash_info[i].Device.area_list[area2].end) break;
+		if (end_addr == dataflash_info[i].Device.area_list[area2].end) 
+			break;
 	}
-	if (area2 == NB_DATAFLASH_AREA) return -1;
+	if (area2 == NB_DATAFLASH_AREA) 
+		return -1;
 
 	/*set protection value*/
 	for(j = area1; j < area2+1 ; j++)
-		if (flag == 0) dataflash_info[i].Device.area_list[j].protected = FLAG_PROTECT_CLEAR;
-		else dataflash_info[i].Device.area_list[j].protected = FLAG_PROTECT_SET;
+		if(dataflash_info[i].Device.area_list[j].protected 
+				!= FLAG_PROTECT_INVALID) {
+			if (flag == 0) {
+				dataflash_info[i].Device.area_list[j].protected 
+					= FLAG_PROTECT_CLEAR;
+			} else {
+				dataflash_info[i].Device.area_list[j].protected 
+					= FLAG_PROTECT_SET;
+			}
+		}
 
 	return (area2-area1+1);
 }
 
-/*------------------------------------------------------------------------------*/
-/* Function Name       : read_dataflash 					*/
-/* Object              : dataflash memory read					*/
-/*------------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name       : read_dataflash 				     */
+/* Object              : dataflash memory read				     */
+/*---------------------------------------------------------------------------*/
 int read_dataflash (unsigned long addr, unsigned long size, char *result)
 {
 	unsigned long AddrToRead = addr;
@@ -305,12 +449,12 @@ int read_dataflash (unsigned long addr, unsigned long size, char *result)
 }
 
 
-/*-----------------------------------------------------------------------------*/
-/* Function Name       : write_dataflash 				       */
-/* Object              : write a block in dataflash			       */
-/*-----------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name       : write_dataflash 				     */
+/* Object              : write a block in dataflash			     */
+/*---------------------------------------------------------------------------*/
 int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
-		     unsigned long size)
+			unsigned long size)
 {
 	unsigned long AddrToWrite = addr_dest;
 	AT91PS_DataFlash pFlash = &DataFlashInst;
@@ -329,7 +473,8 @@ int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
 	if (AddrToWrite == -1)
 		return -1;
 
-	return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src, AddrToWrite, size);
+	return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src, 
+						AddrToWrite, size);
 }
 
 
@@ -339,22 +484,22 @@ void dataflash_perror (int err)
 	case ERR_OK:
 		break;
 	case ERR_TIMOUT:
-		printf ("Timeout writing to DataFlash\n");
+		printf("Timeout writing to DataFlash\n");
 		break;
 	case ERR_PROTECTED:
-		printf ("Can't write to protected DataFlash sectors\n");
+		printf("Can't write to protected/invalid DataFlash sectors\n");
 		break;
 	case ERR_INVAL:
-		printf ("Outside available DataFlash\n");
+		printf("Outside available DataFlash\n");
 		break;
 	case ERR_UNKNOWN_FLASH_TYPE:
-		printf ("Unknown Type of DataFlash\n");
+		printf("Unknown Type of DataFlash\n");
 		break;
 	case ERR_PROG_ERROR:
-		printf ("General DataFlash Programming Error\n");
+		printf("General DataFlash Programming Error\n");
 		break;
 	default:
-		printf ("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
+		printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
 		break;
 	}
 }
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
index 97d470484c..0e01005a91 100644
--- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
@@ -27,9 +27,9 @@
 
 typedef volatile unsigned int AT91_REG;		/* Hardware register definition */
 
-/******************************************************************************/
-/*        SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface        */
-/******************************************************************************/
+/*****************************************************************************/
+/*        SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface       */
+/*****************************************************************************/
 typedef struct _AT91S_TC
 {
 	AT91_REG	 TC_CCR; 	/* Channel Control Register */
@@ -45,24 +45,24 @@ typedef struct _AT91S_TC
 	AT91_REG	 TC_IMR; 	/* Interrupt Mask Register */
 } AT91S_TC, *AT91PS_TC;
 
-#define AT91C_TC_TIMER_DIV1_CLOCK	((unsigned int) 0x0 <<  0) /* (TC) MCK/2 */
-#define AT91C_TC_TIMER_DIV2_CLOCK	((unsigned int) 0x1 <<  0) /* (TC) MCK/8 */
-#define AT91C_TC_TIMER_DIV3_CLOCK	((unsigned int) 0x2 <<  0) /* (TC) MCK/32 */
-#define AT91C_TC_TIMER_DIV4_CLOCK	((unsigned int) 0x3 <<  0) /* (TC) MCK/128 */
-#define AT91C_TC_SLOW_CLOCK		((unsigned int) 0x4 <<  0) /* (TC) SLOW CLK */
-#define AT91C_TC_XC0_CLOCK		((unsigned int) 0x5 <<  0) /* (TC) XC0 */
-#define AT91C_TC_XC1_CLOCK		((unsigned int) 0x6 <<  0) /* (TC) XC1 */
-#define AT91C_TC_XC2_CLOCK		((unsigned int) 0x7 <<  0) /* (TC) XC2 */
-#define AT91C_TCB_TC0XC0S_NONE		((unsigned int) 0x1)       /* (TCB) None signal connected to XC0 */
-#define AT91C_TCB_TC1XC1S_NONE		((unsigned int) 0x1 <<  2) /* (TCB) None signal connected to XC1 */
-#define AT91C_TCB_TC2XC2S_NONE		((unsigned int) 0x1 <<  4) /* (TCB) None signal connected to XC2 */
-#define AT91C_TC_CLKDIS			((unsigned int) 0x1 <<  1) /* (TC) Counter Clock Disable Command */
-#define AT91C_TC_SWTRG			((unsigned int) 0x1 <<  2) /* (TC) Software Trigger Command */
-#define AT91C_TC_CLKEN			((unsigned int) 0x1 <<  0) /* (TC) Counter Clock Enable Command */
-
-/******************************************************************************/
-/*                  SOFTWARE API DEFINITION  FOR Usart                        */
-/******************************************************************************/
+#define AT91C_TC_TIMER_DIV1_CLOCK ((unsigned int) 0x0 <<  0) /* (TC) MCK/2 */
+#define AT91C_TC_TIMER_DIV2_CLOCK ((unsigned int) 0x1 <<  0) /* (TC) MCK/8 */
+#define AT91C_TC_TIMER_DIV3_CLOCK ((unsigned int) 0x2 <<  0) /* (TC) MCK/32 */
+#define AT91C_TC_TIMER_DIV4_CLOCK ((unsigned int) 0x3 <<  0) /* (TC) MCK/128 */
+#define AT91C_TC_SLOW_CLOCK	  ((unsigned int) 0x4 <<  0) /* (TC) SLOW CLK*/
+#define AT91C_TC_XC0_CLOCK	  ((unsigned int) 0x5 <<  0) /* (TC) XC0 */
+#define AT91C_TC_XC1_CLOCK	  ((unsigned int) 0x6 <<  0) /* (TC) XC1 */
+#define AT91C_TC_XC2_CLOCK	  ((unsigned int) 0x7 <<  0) /* (TC) XC2 */
+#define AT91C_TCB_TC0XC0S_NONE	  ((unsigned int) 0x1)       /* (TCB) None signal connected to XC0 */
+#define AT91C_TCB_TC1XC1S_NONE	  ((unsigned int) 0x1 <<  2) /* (TCB) None signal connected to XC1 */
+#define AT91C_TCB_TC2XC2S_NONE	  ((unsigned int) 0x1 <<  4) /* (TCB) None signal connected to XC2 */
+#define AT91C_TC_CLKDIS		  ((unsigned int) 0x1 <<  1) /* (TC) Counter Clock Disable Command */
+#define AT91C_TC_SWTRG		  ((unsigned int) 0x1 <<  2) /* (TC) Software Trigger Command */
+#define AT91C_TC_CLKEN		  ((unsigned int) 0x1 <<  0) /* (TC) Counter Clock Enable Command */
+
+/*****************************************************************************/
+/*                  SOFTWARE API DEFINITION  FOR Usart                       */
+/*****************************************************************************/
 typedef struct _AT91S_USART
 {
 	AT91_REG	 US_CR; 	/* Control Register */
@@ -94,9 +94,9 @@ typedef struct _AT91S_USART
 	AT91_REG	 US_PTSR; 	/* PDC Transfer Status Register */
 } AT91S_USART, *AT91PS_USART;
 
-/******************************************************************************/
-/*          SOFTWARE API DEFINITION  FOR Clock Generator Controler            */
-/******************************************************************************/
+/*****************************************************************************/
+/*          SOFTWARE API DEFINITION  FOR Clock Generator Controler           */
+/*****************************************************************************/
 typedef struct _AT91S_CKGR
 {
 	AT91_REG	 CKGR_MOR; 	/* Main Oscillator Register */
@@ -141,9 +141,9 @@ typedef struct _AT91S_CKGR
 #define AT91C_CKGR_USB_96M	((unsigned int) 0x1   << 28)	/* (CKGR) Divider for USB Ports */
 #define AT91C_CKGR_USB_PLL	((unsigned int) 0x1   << 29)	/* (CKGR) PLL Use */
 
-/******************************************************************************/
-/*        SOFTWARE API DEFINITION  FOR Parallel Input Output Controler        */
-/******************************************************************************/
+/*****************************************************************************/
+/*        SOFTWARE API DEFINITION  FOR Parallel Input Output Controler       */
+/*****************************************************************************/
 typedef struct _AT91S_PIO
 {
 	AT91_REG	 PIO_PER; 	/* PIO Enable Register */
@@ -184,9 +184,9 @@ typedef struct _AT91S_PIO
 } AT91S_PIO, *AT91PS_PIO;
 
 
-/******************************************************************************/
-/*              SOFTWARE API DEFINITION  FOR Debug Unit                       */
-/******************************************************************************/
+/*****************************************************************************/
+/*              SOFTWARE API DEFINITION  FOR Debug Unit                      */
+/*****************************************************************************/
 typedef struct _AT91S_DBGU
 {
 	AT91_REG	 DBGU_CR; 	/* Control Register */
@@ -242,9 +242,9 @@ typedef struct _AT91S_DBGU
 #define AT91C_US_PAR_NONE	((unsigned int) 0x4 <<  9) /* (DBGU) No Parity */
 #define AT91C_US_NBSTOP_1_BIT	((unsigned int) 0x0 << 12) /* (USART) 1 stop bit */
 
-/******************************************************************************/
-/*      SOFTWARE API DEFINITION  FOR Static Memory Controller 2 Interface     */
-/******************************************************************************/
+/*****************************************************************************/
+/*      SOFTWARE API DEFINITION  FOR Static Memory Controller 2 Interface    */
+/*****************************************************************************/
 typedef struct _AT91S_SMC2
 {
 	AT91_REG	 SMC2_CSR[8]; 	/* SMC2 Chip Select Register */
@@ -267,9 +267,9 @@ typedef struct _AT91S_SMC2
 #define AT91C_SMC2_RWSETUP		((unsigned int) 0x7 << 24) /* (SMC2) Read and Write Signal Setup Time */
 #define AT91C_SMC2_RWHOLD		((unsigned int) 0x7 << 29) /* (SMC2) Read and Write Signal Hold Time */
 
-/******************************************************************************/
-/*           SOFTWARE API DEFINITION  FOR Power Management Controler          */
-/******************************************************************************/
+/*****************************************************************************/
+/*           SOFTWARE API DEFINITION  FOR Power Management Controler         */
+/*****************************************************************************/
 typedef struct _AT91S_PMC
 {
 	AT91_REG	 PMC_SCER; 	/* System Clock Enable Register */
@@ -341,9 +341,9 @@ typedef struct _AT91S_PMC
 /*-------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------*/
 /*-------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------*/
 
-/******************************************************************************/
-/*              SOFTWARE API DEFINITION  FOR Ethernet MAC                     */
-/******************************************************************************/
+/*****************************************************************************/
+/*              SOFTWARE API DEFINITION  FOR Ethernet MAC                    */
+/*****************************************************************************/
 typedef struct _AT91S_EMAC
 {
 	AT91_REG	 EMAC_CTL; 	/* Network Control Register */
@@ -424,11 +424,11 @@ typedef struct _AT91S_EMAC
 #define AT91C_EMAC_MDIO		((unsigned int) 0x1 <<  1) /* (EMAC) */
 #define AT91C_EMAC_IDLE		((unsigned int) 0x1 <<  2) /* (EMAC) */
 
-/* -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register -------- */
+/* -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register ------- */
 #define AT91C_EMAC_LEN		((unsigned int) 0x7FF <<  0) /* (EMAC) */
 #define AT91C_EMAC_NCRC		((unsigned int) 0x1 << 15) /* (EMAC) */
 
-/* -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register -------- */
+/* -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register ------- */
 #define AT91C_EMAC_OVR		((unsigned int) 0x1 <<  0) /* (EMAC) */
 #define AT91C_EMAC_COL		((unsigned int) 0x1 <<  1) /* (EMAC) */
 #define AT91C_EMAC_RLE		((unsigned int) 0x1 <<  2) /* (EMAC) */
@@ -442,7 +442,7 @@ typedef struct _AT91S_EMAC
 #define AT91C_EMAC_REC		((unsigned int) 0x1 <<  1) /* (EMAC) */
 #define AT91C_EMAC_RSR_OVR	((unsigned int) 0x1 <<  2) /* (EMAC) */
 
-/* -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- */
+/* -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register ------- */
 #define AT91C_EMAC_DONE		((unsigned int) 0x1 <<  0) /* (EMAC) */
 #define AT91C_EMAC_RCOM		((unsigned int) 0x1 <<  1) /* (EMAC) */
 #define AT91C_EMAC_RBNA		((unsigned int) 0x1 <<  2) /* (EMAC) */
@@ -456,8 +456,8 @@ typedef struct _AT91S_EMAC
 #define AT91C_EMAC_ROVR		((unsigned int) 0x1 << 10) /* (EMAC) */
 #define AT91C_EMAC_HRESP	((unsigned int) 0x1 << 11) /* (EMAC) */
 
-/* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- */
-/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- */
+/* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register ------- */
+/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register ------ */
 /* -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- */
 /* -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- */
 #define AT91C_EMAC_DATA		((unsigned int) 0xFFFF <<  0) /* (EMAC) */
@@ -471,9 +471,9 @@ typedef struct _AT91S_EMAC
 #define AT91C_EMAC_HIGH		((unsigned int) 0x1  << 30) /* (EMAC) */
 #define AT91C_EMAC_LOW		((unsigned int) 0x1  << 31) /* (EMAC) */
 
-/******************************************************************************/
-/*           SOFTWARE API DEFINITION  FOR Serial Parallel Interface           */
-/******************************************************************************/
+/*****************************************************************************/
+/*           SOFTWARE API DEFINITION  FOR Serial Parallel Interface          */
+/*****************************************************************************/
 typedef struct _AT91S_SPI
 {
 	AT91_REG	 SPI_CR; 	/* Control Register */
@@ -536,7 +536,7 @@ typedef struct _AT91S_SPI
 #define AT91C_SPI_SPIENS	((unsigned int) 0x1 << 16) /* (SPI) Enable Status */
 
 /* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */
-/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */
+/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register ------- */
 /* -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- */
 /* -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- */
 #define AT91C_SPI_CPOL		((unsigned int) 0x1  <<  0) /* (SPI) Clock Polarity */
@@ -555,9 +555,9 @@ typedef struct _AT91S_SPI
 #define AT91C_SPI_DLYBS		((unsigned int) 0xFF << 16) /* (SPI) Serial Clock Baud Rate */
 #define AT91C_SPI_DLYBCT	((unsigned int) 0xFF << 24) /* (SPI) Delay Between Consecutive Transfers */
 
-/******************************************************************************/
-/*           SOFTWARE API DEFINITION  FOR Peripheral Data Controller          */
-/******************************************************************************/
+/*****************************************************************************/
+/*           SOFTWARE API DEFINITION  FOR Peripheral Data Controller         */
+/*****************************************************************************/
 typedef struct _AT91S_PDC
 {
 	AT91_REG	 PDC_RPR; 	/* Receive Pointer Register */
@@ -692,11 +692,15 @@ typedef struct _AT91S_PDC
 #define AT91C_PIO_PA7		((unsigned int) 1 <<  7)	/* Pin Controlled by PA7 */
 #define AT91C_PA7_ETXCK_EREFCK	((unsigned int) AT91C_PIO_PA7)	/* Ethernet MAC Transmit Clock/Reference Clock */
 
+#define AT91C_PIO_PB0		((unsigned int) 1 <<  0)	/* Pin Controlled by PB3 */
+#define AT91C_PIO_PB1		((unsigned int) 1 <<  1)	/* Pin Controlled by PB3 */
+#define AT91C_PIO_PB2		((unsigned int) 1 <<  2)	/* Pin Controlled by PB3 */
 #define AT91C_PIO_PB3		((unsigned int) 1 <<  3)	/* Pin Controlled by PB3 */
 #define AT91C_PIO_PB4		((unsigned int) 1 <<  4)	/* Pin Controlled by PB4 */
 #define AT91C_PIO_PB5		((unsigned int) 1 <<  5)	/* Pin Controlled by PB5 */
 #define AT91C_PIO_PB6		((unsigned int) 1 <<  6)	/* Pin Controlled by PB6 */
 #define AT91C_PIO_PB7		((unsigned int) 1 <<  7)	/* Pin Controlled by PB7 */
+#define AT91C_PIO_PB22		((unsigned int) 1 << 22) 	/* Pin Controlled by PB22 */
 #define AT91C_PIO_PB25		((unsigned int) 1 << 25)	/* Pin Controlled by PB25 */
 #define AT91C_PB25_DSR1		((unsigned int) AT91C_PIO_PB25)	/* USART 1 Data Set ready */
 #define AT91C_PB25_EF100	((unsigned int) AT91C_PIO_PB25)	/* Ethernet MAC Force 100 Mbits */
@@ -737,19 +741,36 @@ typedef struct _AT91S_PDC
 #define AT91C_PIOC_CODR		((AT91_REG *)	0xFFFFF834) /* (PIOC) Clear Output Data Register */
 #define AT91C_PIOC_PDSR		((AT91_REG *)	0xFFFFF83C) /* (PIOC) Pin Data Status Register */
 
-#define AT91C_BASE_SPI		((AT91PS_SPI)	0xFFFE0000) /* (SPI) Base Address */
-#define AT91C_BASE_EMAC		((AT91PS_EMAC)	0xFFFBC000) /* (EMAC) Base Address */
+#define AT91C_BASE_AIC		((AT91PS_AIC)	0xFFFFF000) /* (AIC) Base Address */
+#define AT91C_BASE_DBGU		((AT91PS_DBGU)	0xFFFFF200) /* (DBGU) Base Address */
+#define AT91C_BASE_PIOA		((AT91PS_PIO)	0xFFFFF400) /* (PIOA) Base Address */
+#define AT91C_BASE_PIOB		((AT91PS_PIO)	0xFFFFF600) /* (PIOB) Base Address */
+#define AT91C_BASE_PIOC		((AT91PS_PIO)	0xFFFFF800) /* (PIOC) Base Address */
+#define AT91C_BASE_PIOD		((AT91PS_PIO)	0xFFFFFA00) /* (PIOC) Base Address */
 #define AT91C_BASE_PMC		((AT91PS_PMC)	0xFFFFFC00) /* (PMC) Base Address */
+#if	0
+#define AT91C_BASE_ST		((AT91PS_ST)	0xFFFFFD00) /* (PMC) Base Address */
+#define AT91C_BASE_RTC		((AT91PS_RTC)	0xFFFFFE00) /* (PMC) Base Address */
+#define AT91C_BASE_MC		((AT91PS_MC)	0xFFFFFF00) /* (PMC) Base Address */
+#endif
+
 #define AT91C_BASE_TC0		((AT91PS_TC)	0xFFFA0000) /* (TC0) Base Address */
-#define AT91C_BASE_DBGU		((AT91PS_DBGU)	0xFFFFF200) /* (DBGU) Base Address */
+#define AT91C_BASE_TC1		((AT91PS_TC)	0xFFFA4000) /* (TC0) Base Address */
+#if	0
+#define AT91C_BASE_UDP		((AT91PS_UDP)	0xFFFB0000) /* (TC0) Base Address */
+#define AT91C_BASE_MCI		((AT91PS_MCI)	0xFFFB4000) /* (TC0) Base Address */
+#define AT91C_BASE_TWI		((AT91PS_TWI)	0xFFFB8000) /* (TC0) Base Address */
+#endif
+#define AT91C_BASE_EMAC		((AT91PS_EMAC)	0xFFFBC000) /* (EMAC) Base Address */
+#define AT91C_BASE_US0		((AT91PS_USART)	0xFFFC0000) /* (US0) Base Address */
+#define AT91C_BASE_US1		((AT91PS_USART) 0xFFFC4000) /* (US1) Base Address */
+#define AT91C_BASE_US2		((AT91PS_USART) 0xFFFC8000) /* (US1) Base Address */
+#define AT91C_BASE_US3		((AT91PS_USART) 0xFFFCC000) /* (US1) Base Address */
+#define AT91C_BASE_SPI		((AT91PS_SPI)	0xFFFE0000) /* (SPI) Base Address */
+
 #define AT91C_BASE_CKGR		((AT91PS_CKGR)	0xFFFFFC20) /* (CKGR) Base Address */
-#define AT91C_BASE_PIOC		((AT91PS_PIO)	0xFFFFF800) /* (PIOC) Base Address */
-#define AT91C_BASE_PIOB		((AT91PS_PIO)	0xFFFFF600) /* (PIOB) Base Address */
-#define AT91C_BASE_PIOA		((AT91PS_PIO)	0xFFFFF400) /* (PIOA) Base Address */
 #define AT91C_EBI_CSA		((AT91_REG *)	0xFFFFFF60) /* (EBI) Chip Select Assignment Register */
 #define AT91C_BASE_SMC2		((AT91PS_SMC2)	0xFFFFFF70) /* (SMC2) Base Address */
-#define AT91C_BASE_US0		((AT91PS_USART)	0xFFFC0000) /* (US0) Base Address */
-#define AT91C_BASE_US1		((AT91PS_USART) 0xFFFC4000) /* (US1) Base Address */
 #define AT91C_TCB0_BMR		((AT91_REG *)	0xFFFA00C4) /* (TCB0) TC Block Mode Register */
 #define AT91C_TCB0_BCR		((AT91_REG *)	0xFFFA00C0) /* (TCB0) TC Block Control Register */
 #define AT91C_PIOC_PDR		((AT91_REG *)	0xFFFFF804) /* (PIOC) PIO Disable Register */
diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
index 7d7888ed8c..f6a5b4f161 100644
--- a/include/asm-arm/mach-types.h
+++ b/include/asm-arm/mach-types.h
@@ -736,7 +736,11 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_LN2410SBC            725
 #define MACH_TYPE_CB3RUFC              726
 #define MACH_TYPE_MP2USB               727
+#define MACH_TYPE_AT91SAM9261EK        848
 #define MACH_TYPE_PDNB3               1002
+#define MACH_TYPE_AT91SAM9260EK       1099
+#define MACH_TYPE_AT91RM9200DF        1119
+#define MACH_TYPE_AT91SAM9263EK       1202
 
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
@@ -9402,6 +9406,71 @@ extern unsigned int __machine_arch_type;
 # define machine_is_mp2usb()	(0)
 #endif
 
+#ifdef CONFIG_MACH_AT91SAM9261EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AT91SAM9261EK
+# endif
+# define machine_is_at91sam9261ek()	\
+		(machine_arch_type == MACH_TYPE_AT91SAM9261EK)
+#else
+# define machine_is_at91sam9261ek()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9260EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AT91SAM9260EK
+# endif
+# define machine_is_at91sam9260ek()	\
+		(machine_arch_type == MACH_TYPE_AT91SAM9260EK)
+#else
+# define machine_is_at91sam9260ek()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9263EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AT91SAM9263EK
+# endif
+# define machine_is_at91sam9263ek()	\
+	(machine_arch_type == MACH_TYPE_AT91SAM9263EK)
+#else
+# define machine_is_at91sam9263ek()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AT91RM9200DF
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AT91RM9200DF
+# endif
+# define machine_is_at91rm9200df()	\
+	(machine_arch_type == MACH_TYPE_AT91RM9200DF)
+#else
+# define machine_is_at91rm9200df()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9263EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AT91SAM9263EK
+# endif
+# define machine_is_at91sam9263ek()	\
+	(machine_arch_type == MACH_TYPE_AT91SAM9263EK)
+#else
+# define machine_is_at91sam9263ek()	(0)
+#endif
+
 /*
  * These have not yet been registered
  */
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 14801b565c..3d91e99b97 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -76,5 +76,6 @@
 #define CONFIG_CMD_USB		/* USB Support			*/
 #define CONFIG_CMD_VFD		/* VFD support (TRAB)		*/
 #define CONFIG_CMD_XIMG		/* Load part of Multi Image	*/
+#define CONFIG_CMD_MUX		/* AT91 MMC/SPI Mux Support     */
 
 #endif	/* _CONFIG_CMD_ALL_H */
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index ecfa21d828..a65c5f3422 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -163,6 +163,11 @@
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_AT91C_USE_RMII
 
+/* AC Characteristics */
+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
+#define DATAFLASH_TCSS	(0xC << 16)
+#define DATAFLASH_TCHS	(0x1 << 24)
+
 #define CONFIG_HAS_DATAFLASH		1
 #define CFG_SPI_WRITE_TOUT		(5*CFG_HZ)
 #define CFG_MAX_DATAFLASH_BANKS 	2
diff --git a/include/dataflash.h b/include/dataflash.h
index 650454e7ee..c597e69f17 100644
--- a/include/dataflash.h
+++ b/include/dataflash.h
@@ -38,13 +38,47 @@
 #include "config.h"
 
 /*number of protected area*/
-#define NB_DATAFLASH_AREA	4
+#ifdef	CONFIG_NEW_PARTITION
+# define NB_DATAFLASH_AREA	6
+#else
+# define NB_DATAFLASH_AREA	4
+#endif
+
+#ifdef CFG_NO_FLASH
+
+/*-----------------------------------------------------------------------
+ * return codes from flash_write():
+ */
+# define ERR_OK				0
+# define ERR_TIMOUT			1
+# define ERR_NOT_ERASED			2
+# define ERR_PROTECTED			4
+# define ERR_INVAL			8
+# define ERR_ALIGN			16
+# define ERR_UNKNOWN_FLASH_VENDOR	32
+# define ERR_UNKNOWN_FLASH_TYPE		64
+# define ERR_PROG_ERROR			128
+
+/*-----------------------------------------------------------------------
+ * Protection Flags for flash_protect():
+ */
+# define FLAG_PROTECT_SET		0x01
+# define FLAG_PROTECT_CLEAR		0x02
+# define FLAG_PROTECT_INVALID		0x03
+
+/*-----------------------------------------------------------------------
+ * Set Environment according to label:
+ */
+# define	FLAG_SETENV		0x80
+#endif /* CFG_NO_FLASH */
 
 /*define the area structure*/
 typedef struct {
 	unsigned long start;
 	unsigned long end;
 	unsigned char protected;
+	unsigned char setenv;
+	unsigned char label[20];	
 } dataflash_protect_t;
 
 typedef unsigned int AT91S_DataFlashStatus;
@@ -96,6 +130,7 @@ typedef struct _AT91S_DATAFLASH_INFO {
 	AT91S_DataflashDesc Desc;
 	AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
 	unsigned long logical_address;
+	unsigned long end_address;
 	unsigned int id;			/* device id */
 } AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
 
@@ -106,6 +141,7 @@ typedef struct _AT91S_DATAFLASH_INFO {
 #define AT45DB321	0x34
 #define AT45DB642	0x3c
 #define AT45DB128	0x10
+#define	PAGES_PER_BLOCK	8
 
 #define AT91C_DATAFLASH_TIMEOUT		10000	/* For AT91F_DataFlashWaitReady */
 
@@ -168,6 +204,7 @@ typedef struct _AT91S_DATAFLASH_INFO {
 
 extern int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size);
 extern int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr);
+extern int addr2ram(ulong addr);
 extern int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr);
 extern int addr_dataflash (unsigned long addr);
 extern int read_dataflash (unsigned long addr, unsigned long size, char *result);
@@ -175,4 +212,8 @@ extern int write_dataflash (unsigned long addr, unsigned long dest, unsigned lon
 extern void dataflash_print_info (void);
 extern void dataflash_perror (int err);
 
+#ifdef	CONFIG_NEW_DF_PARTITION
+extern int AT91F_DataflashSetEnv (void); #endif
+#endif
+
 #endif
diff --git a/include/dm9161.h b/include/dm9161.h
index f5bfb1960d..d5d0e8d3ab 100644
--- a/include/dm9161.h
+++ b/include/dm9161.h
@@ -43,9 +43,9 @@
 #define DM9161_COLLISION_TEST    (1 << 7)
 
 /*--Bit definitions: DM9161_BMSR */
-#define DM9161_100BASE_T4        (1 << 15)
+#define DM9161_100BASE_TX        (1 << 15)
 #define DM9161_100BASE_TX_FD     (1 << 14)
-#define DM9161_100BASE_T4_HD     (1 << 13)
+#define DM9161_100BASE_TX_HD     (1 << 13)
 #define DM9161_10BASE_T_FD       (1 << 12)
 #define DM9161_10BASE_T_HD       (1 << 11)
 #define DM9161_MF_PREAMB_SUPPR   (1 << 6)
diff --git a/include/flash.h b/include/flash.h
index 43b9c6bdca..b0bf733f18 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -119,6 +119,11 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
  */
 #define FLAG_PROTECT_SET	0x01
 #define FLAG_PROTECT_CLEAR	0x02
+#define	FLAG_PROTECT_INVALID	0x03
+/*-----------------------------------------------------------------------
+ * Set Environment according to label:
+ */
+#define	FLAG_SETENV		0x80
 
 /*-----------------------------------------------------------------------
  * Device IDs