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| author | Heiko Schocher <hs@denx.de> | 2011-02-22 09:08:28 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-04-30 00:44:53 +0200 |
| commit | 4074296b1c72f31fc88f11071da3b266a28507bc (patch) | |
| tree | b58fca50ebb9e5ed953d7958565943173db09fcf | |
| parent | 8d564640c69ec66f29516950700d0c0651cc07d0 (diff) | |
| download | u-boot-midas-4074296b1c72f31fc88f11071da3b266a28507bc.tar.gz u-boot-midas-4074296b1c72f31fc88f11071da3b266a28507bc.tar.bz2 u-boot-midas-4074296b1c72f31fc88f11071da3b266a28507bc.zip | |
powerpc, 83xx: add kmsupx5 board support
The Keymile SUPx5 board series is based on a PBEC8321 but
contains an additional PBUS FPGA (LPXF) on local bus CS2.
Signed-off-by: Thomas Reufer <thomas.reufer@keymile.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Kim Phillips <kim.phillips@freescale.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rw-r--r-- | boards.cfg | 1 | ||||
| -rw-r--r-- | include/configs/kmsupx5.h | 91 |
3 files changed, 93 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index e5d861178c..e2a4ba931b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -427,6 +427,7 @@ Heiko Schocher <hs@denx.de> ids8247 MPC8247 jupiter MPC5200 kmeter1 MPC8360 + kmsupx5 MPC8321 mgcoge MPC8247 mgcoge2ne MPC8247 mgcoge2un ARM926EJS (Kirkwood SoC) diff --git a/boards.cfg b/boards.cfg index d4f34b3f06..e02c70d8fb 100644 --- a/boards.cfg +++ b/boards.cfg @@ -493,6 +493,7 @@ kmeter1 powerpc mpc83xx km83xx keymile MVBLM7 powerpc mpc83xx mvblm7 matrix_vision SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_LP SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_SP +kmsupx5 powerpc mpc83xx km83xx keymile suvd3 powerpc mpc83xx km83xx keymile TQM834x powerpc mpc83xx tqm834x tqc tuda1 powerpc mpc83xx km83xx keymile diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h new file mode 100644 index 0000000000..55ed3f6a49 --- /dev/null +++ b/include/configs/kmsupx5.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Dave Liu <daveliu@freescale.com> + * + * Copyright (C) 2007 Logic Product Development, Inc. + * Peter Barada <peterb@logicpd.com> + * + * Copyright (C) 2007 MontaVista Software, Inc. + * Anton Vorontsov <avorontsov@ru.mvista.com> + * + * (C) Copyright 2008 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * (C) Copyright 2010 + * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com + * + * (C) Copyright 2010-2011 + * Thomas Reufer, KEYMILE Ltd, thomas.reufer@keymile.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_KMSUPX5 1 /* Keymile PBEC8321 board specific */ +#define CONFIG_HOSTNAME supx5 +#define CONFIG_KM_BOARD_NAME "supx5" + +#define CONFIG_SYS_TEXT_BASE 0xF0000000 + +/* include common defines/options for all 8321 Keymile boards */ +#include "km8321-common.h" + +/* + * Init Local Bus Memory Controller: + * + * Bank Bus Machine PortSz Size Device + * ---- --- ------- ------ ----- ------ + * 2 Local GPCM 8 bit 256MB LPXF + * 3 Local not used + * + */ + +/* + * LPXF on the local bus CS2 + * Window base at flash base + * Window size: 256 MB + */ + +#define CONFIG_SYS_LPXF_BASE 0xA0000000 /* LPXF */ +#define CONFIG_SYS_LPXF_SIZE 256 /* Megabytes */ + +#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LPXF_BASE +#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) + +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LPXF_BASE | \ + BR_PS_8 | \ + BR_MS_GPCM | \ + BR_V) + +#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) | \ + OR_GPCM_CSNT | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_2 | \ + (OR_GPCM_TRLX & \ + (~OR_GPCM_EHTR)) | /* EHTR = 0 */ \ + OR_GPCM_EAD) + +/* LPXF: icache cacheable, but dcache-inhibit and guarded */ +#define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ + BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT5U (CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \ + BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ + BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U + +/* Bank 3 not used */ +#define CONFIG_SYS_IBAT6L (0) +#define CONFIG_SYS_IBAT6U (0) +#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L +#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U + +#endif /* __CONFIG_H */ |