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author | Thierry Reding <thierry.reding@avionic-design.de> | 2011-11-17 00:04:06 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-24 10:23:31 +0100 |
commit | 0350c6b924146814ab5390dd5f74665088354a21 (patch) | |
tree | 6d7f691d5b7169bb1e6b1ae16376386cda2b427c | |
parent | 09743ba635be487766d959f8d86f2bdb8686ad92 (diff) | |
download | u-boot-midas-0350c6b924146814ab5390dd5f74665088354a21.tar.gz u-boot-midas-0350c6b924146814ab5390dd5f74665088354a21.tar.bz2 u-boot-midas-0350c6b924146814ab5390dd5f74665088354a21.zip |
tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000.
NVIDIA's flashing tools assume that the bootloader is loaded at address
0x00108000. Instead of requiring non-standard builds of those tools
which allow a load address of 0x00E08000, this commit just switches all
Tegra2 boards to use the standard load address.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r-- | include/configs/tegra2-common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index ffea4013eb..e6f385fac3 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -151,7 +151,7 @@ #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_TEXT_BASE 0x00E08000 +#define CONFIG_SYS_TEXT_BASE 0x00108000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE |