path: root/gcc-4.8.3/gcc/ChangeLog

2014-05-22  Release Manager

	* GCC 4.8.3 released.

2014-05-15  Peter Bergner  <bergner@vnet.ibm.com>

	Backport from mainline
	2014-05-15  Peter Bergner  <bergner@vnet.ibm.com>

	PR target/61193
	* config/rs6000/htmxlintrin.h (_HTM_TBEGIN_STARTED): New define.
	(__TM_simple_begin): Use it.
	(__TM_begin): Likewise.

2014-05-14  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc-protos.h (sparc_absnegfloat_split_legitimate):
	Delete.
	* config/sparc/sparc.c (sparc_absnegfloat_split_legitimate): Likewise.
	* config/sparc/sparc.md (fptype_ut699): New attribute.
	(in_branch_delay): Return false if -mfix-ut699 is specified and
	fptype_ut699 is set to single.
	(truncdfsf2): Add fptype_ut699 attribute.
	(fix_truncdfsi2): Likewise.
	(floatsisf2): Change fptype attribute.
	(fix_truncsfsi2): Likewise.
	(negtf2_notv9): Delete.
	(negtf2_v9): Likewise.
	(negtf2_hq): New instruction.
	(negtf2): New instruction and splitter.
	(negdf2_notv9): Rewrite.
	(abstf2_notv9): Delete.
	(abstf2_hq_v9): Likewise.
	(abstf2_v9): Likewise.
	(abstf2_hq): New instruction.
	(abstf2): New instruction and splitter.
	(absdf2_notv9): Rewrite.

2014-05-14  Matthias Klose  <doko@ubuntu.com>

	Revert:
	2014-05-08  Manuel López-Ibáñez  <manu@gcc.gnu.org>
		    Matthias Klose  <doko@ubuntu.com>

	PR driver/61106
	* optc-gen.awk: Fix option handling for -Wunused-parameter.

2014-05-13  Peter Bergner  <bergner@vnet.ibm.com>

	* doc/sourcebuild.texi: (dfp_hw): Document.
	(p8vector_hw): Likewise.
	(powerpc_eabi_ok): Likewise.
	(powerpc_elfv2): Likewise.
	(powerpc_htm_ok): Likewise.
	(ppc_recip_hw): Likewise.
	(vsx_hw): Likewise.

2014-05-12  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

	Backport from mainline
	2014-05-12  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

	PR target/60991
	* config/avr/avr.c (avr_out_store_psi): Use correct constant
	to restore Y.

2014-05-09  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2014-05-09 trunk r210267

	PR target/61055
	* config/avr/avr.md (cc): Add new attribute set_vzn.
	(addqi3, addqq3, adduqq3, subqi3, subqq3, subuqq3, negqi2) [cc]:
	Set cc insn attribute to set_vzn instead of set_zn for alternatives
	with INC, DEC or NEG.
	* config/avr/avr.c (avr_notice_update_cc): Handle SET_VZN.
	(avr_out_plus_1): ADIW sets cc0 to CC_SET_CZN.
	INC, DEC and ADD+ADC set cc0 to CC_CLOBBER.

2014-05-09  Richard Sandiford  <rdsandiford@googlemail.com>

	* builtins.c (expand_builtin_setjmp_receiver): Emit a use of
	the hard frame pointer.  Synchronize commentary with mainline.
	* cse.c (cse_insn): Only check for volatile asms.
	* cselib.c (cselib_process_insn): Likewise.
	* dse.c (scan_insn): Likewise.
	* stmt.c (expand_nl_goto_receiver): Emit a use and a clobber of
	the hard frame pointer.

2014-05-08  Manuel López-Ibáñez  <manu@gcc.gnu.org>
	    Matthias Klose  <doko@ubuntu.com>

	PR driver/61106
	* optc-gen.awk: Fix option handling for -Wunused-parameter.

2014-05-08  Uros Bizjak  <ubizjak@gmail.com>

	PR target/59952
	* config/i386/i386.c (ix86_option_override_internal): Remove PTA_RTM
	from core-avx2.

2014-05-08  Charles Baylis  <charles.baylis@linaro.org>

	Backport from mainline
	2014-04-07  Charles Baylis  <charles.baylis@linaro.org>

	PR target/60609
	* config/arm/arm.h (ASM_OUTPUT_CASE_END): Remove.
	(LABEL_ALIGN_AFTER_BARRIER): Align barriers which occur after
	ADDR_DIFF_VEC.

2014-05-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config.gcc (aarch64*-*-*): Use ISA flags from aarch64-arches.def.
	Do not define target_cpu_default2 to generic.

2014-05-06  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-04-14  Richard Biener  <rguenther@suse.de>

	PR middle-end/55022
	* fold-const.c (negate_expr_p): Don't negate directional rounding
	division.
	(fold_negate_expr): Likewise.

2014-05-06  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-04-17  Richard Biener  <rguenther@suse.de>

	PR middle-end/60849
	* tree-ssa-propagate.c (valid_gimple_rhs_p): Only allow effective
	boolean results for comparisons.

	2014-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60766
	* tree-ssa-loop-ivopts.c (cand_value_at): Compute in an
	unsigned type.
	(may_eliminate_iv): Convert cand_value_at result to desired
	type.

	2014-04-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60903
	* tree-ssa-loop-im.c (execute_sm_if_changed): Properly apply
	IRREDUCIBLE_LOOP loop flags to newly created BBs and edges.

2014-05-05  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-04-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/60895
	* tree-inline.c (declare_return_variable): Use mark_addressable.

	2014-04-07  Richard Biener  <rguenther@suse.de>

	PR middle-end/60750
	* tree-ssa-operands.c (maybe_add_call_vops): Also add VDEFs
	for noreturn calls.
	* tree-cfgcleanup.c (fixup_noreturn_call): Do not remove VDEFs.

	2014-04-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59817
	PR tree-optimization/60453
	* graphite-scop-detection.c (graphite_can_represent_scev): Complete
	recursion to catch all CHRECs in the scalar evolution and restrict
	the predicate for the remains appropriately.

	2014-04-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60836
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Force
	initial PHI args to be gimple values.

2014-05-05  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2014-04-25  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/60960
	* tree-vect-generic.c (expand_vector_operation): Only call
	expand_vector_divmod if type's mode satisfies VECTOR_MODE_P.

2014-05-04  Peter Bergner  <bergner@vnet.ibm.com>

	* config/rs6000/rs6000.h (RS6000_BTM_HARD_FLOAT): New define.
	(RS6000_BTM_COMMON): Add RS6000_BTM_HARD_FLOAT.
	(TARGET_EXTRA_BUILTINS): Add TARGET_HARD_FLOAT.
	* config/rs6000/rs6000-builtin.def (BU_MISC_1):
	Use RS6000_BTM_HARD_FLOAT.
	(BU_MISC_2): Likewise.
	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle
	RS6000_BTM_HARD_FLOAT.
	(rs6000_option_override_internal): Enforce -mhard-float if -mhard-dfp
	is explicitly used.
	(rs6000_invalid_builtin): Add hard floating builtin support.
	(rs6000_expand_builtin): Relax the gcc_assert to allow the new
	hard float builtins.
	(rs6000_builtin_mask_names): Add RS6000_BTM_HARD_FLOAT.

2014-05-03  Joey Ye  <joey.ye@arm.com>

	Backport from mainline r209463
	2014-04-17  Joey Ye  <joey.ye@arm.com>

	* opts.c (OPT_fif_conversion, OPT_fif_conversion2): Disable for Og.

2014-05-03  Oleg Endo  <olegendo@gcc.gnu.org>

	Back port from mainline
	PR target/61026
	* config/sh/sh.c: Include stdlib headers before everything else.

2014-05-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR tree-optimization/60930
	* gimple-ssa-strength-reduction.c (create_mul_imm_cand):  Reject
	creating a multiply candidate by folding two constant
	multiplicands when the result overflows.

2014-05-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64.h (TARGET_SIMD): Take AARCH64_ISA_SIMD
	into account.
	(TARGET_FLOAT): Take AARCH64_ISA_FP into account.

2014-04-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from mainline
	2014-04-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* doc/extend.texi (PowerPC Built-in Functions): Document new
	powerpc extended divide, bcd, pack/unpack 128-bit, builtin
	functions.
	(PowerPC AltiVec/VSX Built-in Functions): Likewise.

	* config/rs6000/predicates.md (const_0_to_3_operand): New
	predicate to match 0..3 integer constants.

	* config/rs6000/rs6000-builtin.def (BU_DFP_MISC_1): Add new macros
	to support adding miscellaneous builtin functions.
	(BU_DFP_MISC_2): Likewise.
	(BU_P7_MISC_1): Likewise.
	(BU_P7_MISC_2): Likewise.
	(BU_P8V_MISC_3): Likewise.
	(BU_MISC_1): Likewise.
	(BU_MISC_2): Likewise.
	(DIVWE): Add extended divide builtin functions.
	(DIVWEO): Likewise.
	(DIVWEU): Likewise.
	(DIVWEUO): Likewise.
	(DIVDE): Likewise.
	(DIVDEO): Likewise.
	(DIVDEU): Likewise.
	(DIVDEUO): Likewise.
	(DXEX): Add decimal floating-point builtin functions.
	(DXEXQ): Likewise.
	(DDEDPD): Likewise.
	(DDEDPDQ): Likewise.
	(DENBCD): Likewise.
	(DENBCDQ): Likewise.
	(DIEX): Likewise.
	(DIEXQ): Likewise.
	(DSCLI): Likewise.
	(DSCLIQ): Likewise.
	(DSCRI): Likewise.
	(DSCRIQ): Likewise.
	(CDTBCD): Add new BCD builtin functions.
	(CBCDTD): Likewise.
	(ADDG6S): Likewise.
	(BCDADD): Likewise.
	(BCDADD_LT): Likewise.
	(BCDADD_EQ): Likewise.
	(BCDADD_GT): Likewise.
	(BCDADD_OV): Likewise.
	(BCDSUB): Likewise.
	(BCDSUB_LT): Likewise.
	(BCDSUB_EQ): Likewise.
	(BCDSUB_GT): Likewise.
	(BCDSUB_OV): Likewise.
	(PACK_TD): Add new pack/unpack 128-bit type builtin functions.
	(UNPACK_TD): Likewise.
	(PACK_TF): Likewise.
	(UNPACK_TF): Likewise.
	(UNPACK_TF_0): Likewise.
	(UNPACK_TF_1): Likewise.
	(PACK_V1TI): Likewise.
	(UNPACK_V1TI): Likewise.

	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
	support for decimal floating point builtin functions.
	(rs6000_expand_ternop_builtin): Add checks for the new builtin
	functions that take constant arguments.
	(rs6000_invalid_builtin): Add decimal floating point builtin
	support.
	(rs6000_init_builtins): Setup long double, _Decimal64, and
	_Decimal128 types for new builtin functions.
	(builtin_function_type): Set the unsigned flags appropriately for
	the new builtin functions.
	(rs6000_opt_masks): Add support for decimal floating point builtin
	functions.

	* config/rs6000/rs6000.h (RS6000_BTM_DFP): Add support for decimal
	floating point builtin functions.
	(RS6000_BTM_COMMON): Likewise.
	(RS6000_BTI_long_double): Likewise.
	(RS6000_BTI_dfloat64): Likewise.
	(RS6000_BTI_dfloat128): Likewise.
	(long_double_type_internal_node): Likewise.
	(dfloat64_type_internal_node): Likewise.
	(dfloat128_type_internal_node): Likewise.

	* config/rs6000/altivec.h (UNSPEC_BCDADD): Add support for ISA
	2.07 bcd arithmetic instructions.
	(UNSPEC_BCDSUB): Likewise.
	(UNSPEC_BCD_OVERFLOW): Likewise.
	(UNSPEC_BCD_ADD_SUB): Likewise.
	(bcd_add_sub): Likewise.
	(BCD_TEST): Likewise.
	(bcd<bcd_add_sub>): Likewise.
	(bcd<bcd_add_sub>_test): Likewise.
	(bcd<bcd_add_sub>_test2): Likewise.
	(bcd<bcd_add_sub>_<code>): Likewise.
	(peephole2 for combined bcd ops): Likewise.

	* config/rs6000/dfp.md (UNSPEC_DDEDPD): Add support for new
	decimal floating point builtin functions.
	(UNSPEC_DENBCD): Likewise.
	(UNSPEC_DXEX): Likewise.
	(UNSPEC_DIEX): Likewise.
	(UNSPEC_DSCLI): Likewise.
	(UNSPEC_DSCRI): Likewise.
	(D64_D128): Likewise.
	(dfp_suffix): Likewise.
	(dfp_ddedpd_<mode>): Likewise.
	(dfp_denbcd_<mode>): Likewise.
	(dfp_dxex_<mode>): Likewise.
	(dfp_diex_<mode>): Likewise.
	(dfp_dscli_<mode>): Likewise.
	(dfp_dscri_<mode>): Likewise.

	* config/rs6000/rs6000.md (UNSPEC_ADDG6S): Add support for new BCD
	builtin functions.
	(UNSPEC_CDTBCD): Likewise.
	(UNSPEC_CBCDTD): Likewise.
	(UNSPEC_DIVE): Add support for new extended divide builtin
	functions.
	(UNSPEC_DIVEO): Likewise.
	(UNSPEC_DIVEU): Likewise.
	(UNSPEC_DIVEUO): Likewise.
	(UNSPEC_UNPACK_128BIT): Add support for new builtin functions to
	pack/unpack 128-bit types.
	(UNSPEC_PACK_128BIT): Likewise.
	(idiv_ldiv): New mode attribute to set the 32/64-bit divide type.
	(udiv<mode>3): Use idiv_ldiv mode attribute.
	(div<mode>3): Likewise.
	(addg6s): Add new BCD builtin functions.
	(cdtbcd): Likewise.
	(cbcdtd): Likewise.
	(UNSPEC_DIV_EXTEND): Add support for new extended divide
	instructions.
	(div_extend): Likewise.
	(div<div_extend>_<mode>"): Likewise.
	(FP128_64): Add support for new builtin functions to pack/unpack
	128-bit types.
	(unpack<mode>): Likewise.
	(unpacktf_0): Likewise.
	(unpacktf_1): Likewise.
	(unpack<mode>_dm): Likewise.
	(unpack<mode>_nodm): Likewise.
	(pack<mode>): Likewise.
	(unpackv1ti): Likewise.
	(packv1ti): Likewise.

2014-04-29  Pat Haugen  <pthaugen@us.ibm.com>

	Backport from mainline
	2014-04-17  Pat Haugen  <pthaugen@us.ibm.com>

	* config/rs6000/rs6000.md (addti3, subti3): New.

2014-04-28  Pat Haugen  <pthaugen@us.ibm.com>

	Backport from mainline
	2014-04-28  Pat Haugen  <pthaugen@us.ibm.com>

	* config/rs6000/sync.md (AINT mode_iterator): Move definition.
	(loadsync_<mode>): Change mode.
	(load_quadpti, store_quadpti): New.
	(atomic_load<mode>, atomic_store<mode>): Add support for TI mode.
	* config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

2014-04-28  Eric Botcazou  <ebotcazou@adacore.com>

	* configure.ac: Tweak GAS check for LEON instructions on SPARC.
	* configure: Regenerate.
	* config/sparc/sparc.opt (muser-mode): New option.
	* config/sparc/sync.md (atomic_compare_and_swap<mode>_1): Do not enable
	for LEON3.
	(atomic_compare_and_swap_leon3_1): New instruction for LEON3.
	* doc/invoke.texi (SPARC options): Document -muser-mode.

2014-04-25  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/60941
	* config/sparc/sparc.md (ashlsi3_extend): Delete.

2014-04-22  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from main line:
	2014-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtins.def (VBPERMQ): Add vbpermq builtin
	for ISA 2.07.

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	vbpermq builtins.

	* config/rs6000/altivec.md (UNSPEC_VBPERMQ): Add support for the
	vbpermq instruction.
	(altivec_vbpermq): Likewise.

	PR target/60672
	* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
	enable use of xxsldwi and xxpermdi builtin functions.
	(vec_xxpermdi): Likewise.

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document use of vec_xxsldwi and vec_xxpermdi builtins.

2014-04-23  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-04-21  Uros Bizjak  <ubizjak@gmail.com>

	PR target/60909
	* config/i386/i386.c (ix86_expand_builtin)
	<case IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Use temporary
	register for target RTX.
	<case IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Ditto.

2014-04-23  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-04-02  Richard Biener  <rguenther@suse.de>

	PR middle-end/60729
	* optabs.c (expand_abs_nojump): Honor flag_trapv only for
	MODE_INTs.  Properly use negv_optab.
	(expand_abs): Likewise.

	2014-04-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60740
	* graphite-scop-detection.c (stmt_simple_for_scop_p): Iterate
	over all GIMPLE_COND operands.

2014-04-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/60635
	* gimplify.c (gimple_regimplify_operands): Update the
	re-gimplifed stmt.

2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from the trunk, subversion id 209546.

	2014-04-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60735
	* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case):
	If mode is DDmode and TARGET_E500_DOUBLE allow move.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some
	more debug information for E500 if -mdebug=reg.

2014-04-18  Richard Henderson  <rth@redhat.com>

	* config/aarch64/aarch64.c (aarch64_register_move_cost): Pass a mode
	to GET_MODE_SIZE, not a reg_class_t.

2014-04-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_xxmrghw_<mode>): Adjust for
	little-endian.
	(vsx_xxmrglw_<mode>): Likewise.

2014-04-15  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/60839
	Revert the following patch

	2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port mainline subversion id 209025.
	2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60735
	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
	software floating point or no floating point registers, do not
	allow any type in the FPRs.  Eliminate a test for SPE SIMD types
	in GPRs that occurs after we tested for GPRs that would never be
	true.

	* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
	Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
	since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
	specifically allow DDmode, since that does not use the SPE SIMD
	instructions.

2014-04-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/60769
	* lra-constraints.c (simplify_operand_subreg): Force reload of
	paradoxical subreg if it is not in the class contents.

2014-04-10  Jakub Jelinek  <jakub@redhat.com>

	Backport from mainline
	2014-03-12  Jakub Jelinek  <jakub@redhat.com>
		    Marc Glisse  <marc.glisse@inria.fr>

	PR tree-optimization/60502
	* tree-ssa-reassoc.c (eliminate_not_pairs): Use build_all_ones_cst
	instead of build_low_bits_mask.

	2013-06-13  Marc Glisse  <marc.glisse@inria.fr>

	* tree.c (build_all_ones_cst): New function.
	* tree.h (build_all_ones_cst): Declare it.

	2013-05-10  Marc Glisse  <marc.glisse@inria.fr>

	* tree.c (build_minus_one_cst): New function.
	* tree.h (build_minus_one_cst): Declare new function.

2014-04-10  Jakub Jelinek  <jakub@redhat.com>

	Backport from mainline
	2014-03-28  Jakub Jelinek  <jakub@redhat.com>

	PR target/60693
	* config/i386/i386.c (ix86_copy_addr_to_reg): Call copy_addr_to_reg
	also if addr has VOIDmode.

	2014-03-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/60516
	* config/i386/i386.c (ix86_expand_epilogue): Adjust REG_CFA_ADJUST_CFA
	note creation for the 2010-08-31 changes.

	2014-03-06  Jakub Jelinek  <jakub@redhat.com>
		    Meador Inge  <meadori@codesourcery.com>

	PR target/58595
	* config/arm/arm.c (arm_tls_symbol_p): Remove.
	(arm_legitimize_address): Call legitimize_tls_address for any
	arm_tls_referenced_p expression, handle constant addend.  Call it
	before testing for !TARGET_ARM.
	(thumb_legitimize_address): Don't handle arm_tls_symbol_p here.

2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r208750
	2014-03-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set):  Generate a
	pattern for vector nor instead of subtract from splat(-1).
	(altivec_expand_vec_perm_const_le): Likewise.

	Backport from mainline r209235
	2014-04-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set): Use vnand
	instead of vnor to exploit possible fusion opportunity in the
	future.
	(altivec_expand_vec_perm_const_le): Likewise.

2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Revert following patch
	2014-04-08  Pat Haugen  <pthaugen@us.ibm.com>

	Backport from mainline
	2014-04-08  Pat Haugen  <pthaugen@us.ibm.com>

	* config/rs6000/sync.md (AINT mode_iterator): Move definition.
	(loadsync_<mode>): Change mode.
	(load_quadpti, store_quadpti): New.
	(atomic_load<mode>, atomic_store<mode>): Add support for TI mode.
	* config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

2014-04-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r202642
	2013-09-17  Alan Modra  <amodra@gmail.com>

	PR target/57589
	* config/rs6000/driver-rs6000.c (elf_platform): Revert 2013-06-11
	patch (r199972).

2014-04-08  Pat Haugen  <pthaugen@us.ibm.com>

	Backport from mainline
	2014-04-08  Pat Haugen  <pthaugen@us.ibm.com>

	* config/rs6000/sync.md (AINT mode_iterator): Move definition.
	(loadsync_<mode>): Change mode.
	(load_quadpti, store_quadpti): New.
	(atomic_load<mode>, atomic_store<mode>): Add support for TI mode.
	* config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ.

2014-04-07  Martin Jambor  <mjambor@suse.cz>

	PR ipa/60640
	* ipa-cp.c (propagate_constants_accross_call): Do not propagate
	accross thunks.

2014-04-07  Dominique d'Humieres <dominiq@lps.ens.fr>

	Backport from mainline
	2013-09-14  Iain Sandoe <iains@gcc.gnu.org>

	PR target/48094
	* config/darwin.c (darwin_objc2_section): Note if ObjC Metadata
	is seen.
	(darwin_objc1_section): Likewise.
	(darwin_file_end): Emit Image Info section when required.

2014-04-05  Alan Modra  <amodra@gmail.com>

	Apply from mainline
	2014-01-28  Alan Modra  <amodra@gmail.com>
	* Makefile.in (BUILD_CPPFLAGS): Do not use ALL_CPPFLAGS.
	* configure.ac <recursive call for build != host>: Define
	GENERATOR_FILE.  Comment.  Use CXX_FOR_BUILD, CXXFLAGS_FOR_BUILD
	and LD_FOR_BUILD too.
	* configure: Regenerate.

2014-04-04  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	Backport from mainline r208895:
	2014-03-28  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (fusion_gpr_load_p): Refuse optimization
	if it would clobber the stack pointer, even temporarily.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port from main line:
	2014-04-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document vec_vgbbd.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port mainline subversion id 209025.
	2014-04-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60735
	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
	software floating point or no floating point registers, do not
	allow any type in the FPRs.  Eliminate a test for SPE SIMD types
	in GPRs that occurs after we tested for GPRs that would never be
	true.

	* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
	Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
	since the FMOVE64 type is DFmode/DDmode.  If TARGET_E500_DOUBLE,
	specifically allow DDmode, since that does not use the SPE SIMD
	instructions.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r205308
	2013-11-23  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro.
	(rs6000_xcoff_select_section): Place decls with stricter alignment
	into named sections.
	(rs6000_xcoff_unique_section): Allow unique sections for
	uninitialized data with strict alignment.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2013-11-15  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* gcc/configure: Regenerate.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port from trunk
	2013-04-25  Alan Modra  <amodra@gmail.com>

	PR target/57052
	* config/rs6000/rs6000.md (rotlsi3_internal7): Rename to
	rotlsi3_internal7le and condition on !BYTES_BIG_ENDIAN.
	(rotlsi3_internal8be): New BYTES_BIG_ENDIAN insn.
	Repeat for many other rotate/shift and mask patterns using subregs.
	Name lshiftrt insns.
	(ashrdisi3_noppc64): Rename to ashrdisi3_noppc64be and condition
	on WORDS_BIG_ENDIAN.

	2013-06-07  Alan Modra  <amodra@gmail.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
	override user -mfp-in-toc.
	(offsettable_ok_by_alignment): Consider just the current access
	rather than the whole object, unless BLKmode.  Handle
	CONSTANT_POOL_ADDRESS_P constants that lack a decl too.
	(use_toc_relative_ref): Allow CONSTANT_POOL_ADDRESS_P constants
	for -mcmodel=medium.
	* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't
	override user -mfp-in-toc or -msum-in-toc.  Default to
	-mno-fp-in-toc for -mcmodel=medium.

	2013-06-18  Alan Modra  <amodra@gmail.com>

	* config/rs6000/rs6000.h (enum data_align): New.
	(LOCAL_ALIGNMENT, DATA_ALIGNMENT): Use rs6000_data_alignment.
	(DATA_ABI_ALIGNMENT): Define.
	(CONSTANT_ALIGNMENT): Correct comment.
	* config/rs6000/rs6000-protos.h (rs6000_data_alignment): Declare.
	* config/rs6000/rs6000.c (rs6000_data_alignment): New function.

	2013-07-11  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.md (""*tls_gd_low<TLSmode:tls_abi_suffix>"):
	Require GOT register as additional operand in UNSPEC.
	("*tls_ld_low<TLSmode:tls_abi_suffix>"): Likewise.
	("*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"): Likewise.
	("*tls_got_tprel_low<TLSmode:tls_abi_suffix>"): Likewise.
	("*tls_gd<TLSmode:tls_abi_suffix>"): Update splitter.
	("*tls_ld<TLSmode:tls_abi_suffix>"): Likewise.
	("tls_got_dtprel_<TLSmode:tls_abi_suffix>"): Likewise.
	("tls_got_tprel_<TLSmode:tls_abi_suffix>"): Likewise.

	2014-01-23  Pat Haugen  <pthaugen@us.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
	force flag_ira_loop_pressure if set via command line.

	2014-02-06  Alan Modra  <amodra@gmail.com>

	PR target/60032
	* config/rs6000/rs6000.c (rs6000_secondary_memory_needed_mode): Only
	change SDmode to DDmode when lra_in_progress.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	V1TImode Support
	Back port from trunk
	2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
	(VEC_M): Likewise.
	(VEC_N): Likewise.
	(VEC_R): Likewise.
	(VEC_base): Likewise.
	(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
	registers, we need to swap double words in little endian mode.

	* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
	to be a container mode for 128-bit integer operations added in ISA
	2.07.  Unlike TImode and PTImode, the preferred register set is
	the Altivec/VMX registers for the 128-bit operations.

	* config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add
	declarations.
	(rs6000_split_128bit_ok_p): Likewise.

	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
	macros for creating ISA 2.07 normal and overloaded builtin
	functions with 3 arguments.
	(BU_P8V_OVERLOAD_3): Likewise.
	(VPERM_1T): Add support for V1TImode in 128-bit vector operations
	for use as overloaded functions.
	(VPERM_1TI_UNS): Likewise.
	(VSEL_1TI): Likewise.
	(VSEL_1TI_UNS): Likewise.
	(ST_INTERNAL_1ti): Likewise.
	(LD_INTERNAL_1ti): Likewise.
	(XXSEL_1TI): Likewise.
	(XXSEL_1TI_UNS): Likewise.
	(VPERM_1TI): Likewise.
	(VPERM_1TI_UNS): Likewise.
	(XXPERMDI_1TI): Likewise.
	(SET_1TI): Likewise.
	(LXVD2X_V1TI): Likewise.
	(STXVD2X_V1TI): Likewise.
	(VEC_INIT_V1TI): Likewise.
	(VEC_SET_V1TI): Likewise.
	(VEC_EXT_V1TI): Likewise.
	(EQV_V1TI): Likewise.
	(NAND_V1TI): Likewise.
	(ORC_V1TI): Likewise.
	(VADDCUQ): Add support for 128-bit integer arithmetic instructions
	added in ISA 2.07.  Add both normal 'altivec' builtins, and the
	overloaded builtin.
	(VADDUQM): Likewise.
	(VSUBCUQ): Likewise.
	(VADDEUQM): Likewise.
	(VADDECUQ): Likewise.
	(VSUBEUQM): Likewise.
	(VSUBECUQ): Likewise.

	* config/rs6000/rs6000-c.c (__int128_type): New static to hold
	__int128_t and __uint128_t types.
	(__uint128_type): Likewise.
	(altivec_categorize_keyword): Add support for vector __int128_t,
	vector __uint128_t, vector __int128, and vector unsigned __int128
	as a container type for TImode operations that need to be done in
	VSX/Altivec registers.
	(rs6000_macro_to_expand): Likewise.
	(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
	to support 128-bit integer instructions vaddcuq, vadduqm,
	vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
	(altivec_resolve_overloaded_builtin): Add support for V1TImode.

	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
	for V1TImode, and set up preferences to use VSX/Altivec
	registers.  Setup VSX reload handlers.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_init_hard_regno_mode_ok): Likewise.
	(rs6000_preferred_simd_mode): Likewise.
	(vspltis_constant): Do not allow V1TImode as easy altivec
	constants.
	(easy_altivec_constant): Likewise.
	(output_vec_const_move): Likewise.
	(rs6000_expand_vector_set): Convert V1TImode set and extract to
	simple move.
	(rs6000_expand_vector_extract): Likewise.
	(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
	addressing.
	(rs6000_const_vec): Add support for V1TImode.
	(rs6000_emit_le_vsx_load): Swap double words when loading or
	storing TImode/V1TImode.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_le_vsx_move): Likewise.
	(rs6000_emit_move): Add support for V1TImode.
	(altivec_expand_ld_builtin): Likewise.
	(altivec_expand_st_builtin): Likewise.
	(altivec_expand_vec_init_builtin): Likewise.
	(altivec_expand_builtin): Likewise.
	(rs6000_init_builtins): Add support for V1TImode type.  Add
	support for ISA 2.07 128-bit integer builtins.  Define type names
	for the VSX/Altivec vector types.
	(altivec_init_builtins): Add support for overloaded vector
	functions with V1TImode type.
	(rs6000_preferred_reload_class): Prefer Altivec registers for
	V1TImode.
	(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
	external function.
	(rs6000_split_128bit_ok_p): Likewise.
	(rs6000_handle_altivec_attribute): Create V1TImode from vector
	__int128_t and vector __uint128_t.

	* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
	and mode attributes.
	(VSX_M): Likewise.
	(VSX_M2): Likewise.
	(VSm): Likewise.
	(VSs): Likewise.
	(VSr): Likewise.
	(VSv): Likewise.
	(VS_scalar): Likewise.
	(VS_double): Likewise.
	(vsx_set_v1ti): New builtin function to create V1TImode from
	TImode.

	* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
	whether we support the ISA 2.07 128-bit integer arithmetic
	instructions.
	(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
	(enum rs6000_builtin_type_index): Add fields to hold V1TImode
	and TImode types for use with the builtin functions.
	(V1TI_type_node): Likewise.
	(unsigned_V1TI_type_node): Likewise.
	(intTI_type_internal_node): Likewise.
	(uintTI_type_internal_node): Likewise.

	* config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA
	2.07 128-bit builtin functions.
	(UNSPEC_VADDEUQM): Likewise.
	(UNSPEC_VADDECUQ): Likewise.
	(UNSPEC_VSUBCUQ): Likewise.
	(UNSPEC_VSUBEUQM): Likewise.
	(UNSPEC_VSUBECUQ): Likewise.
	(VM): Add V1TImode to vector mode iterators.
	(VM2): Likewise.
	(VI_unit): Likewise.
	(altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.
	(altivec_vaddcuq): Likewise.
	(altivec_vsubuqm): Likewise.
	(altivec_vsubcuq): Likewise.
	(altivec_vaddeuqm): Likewise.
	(altivec_vaddecuq): Likewise.
	(altivec_vsubeuqm): Likewise.
	(altivec_vsubecuq): Likewise.

	* config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector
	mode iterators.
	(BOOL_128): Likewise.
	(BOOL_REGS_OUTPUT): Likewise.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(BOOL_REGS_AND_CR0): Likewise.

	* config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07
	128-bit integer builtin support.
	(vec_vadduqm): Likewise.
	(vec_vaddecuq): Likewise.
	(vec_vaddeuqm): Likewise.
	(vec_vsubecuq): Likewise.
	(vec_vsubeuqm): Likewise.
	(vec_vsubcuq): Likewise.
	(vec_vsubuqm): Likewise.

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
	vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
	128-bit integer add/subtract to ISA 2.07.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Apply mainline r207798
	2014-02-26  Alan Modra  <amodra@gmail.com>
	PR target/58675
	PR target/57935
	* config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use
	find_replacement on parts of insn rtl that might be reloaded.

	Backport from mainline r208287
	2014-03-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_preferred_reload_class): Disallow
	reload of PLUS rtx's outside of GENERAL_REGS or BASE_REGS; relax
	constraint on constants to permit them being loaded into
	GENERAL_REGS or BASE_REGS.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r207699.
	2014-02-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60137
	* config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter
	for VSX/Altivec vectors that land in GPR registers.

	Backport from mainline r207808.
	2014-02-15  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60203
	* config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints.
	(mov<mode>_internal, TFmode/TDmode): Split TFmode/TDmode moves
	into 64-bit and 32-bit moves.  On 64-bit moves, add support for
	using direct move instructions on ISA 2.07.  Also adjust
	instruction length for 64-bit.
	(mov<mode>_64bit, TFmode/TDmode): Likewise.
	(mov<mode>_32bit, TFmode/TDmode): Likewise.

	Backport from mainline r207868.
	2014-02-18  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/60203
	* config/rs6000/rs6000.md (mov<mode>_64bit, TF/TDmode moves):
	Split 64-bit moves into 2 patterns.  Do not allow the use of
	direct move for TDmode in little endian, since the decimal value
	has little endian bytes within a word, but the 64-bit pieces are
	ordered in a big endian fashion, and normal subreg's of TDmode are
	not allowed.
	(mov<mode>_64bit_dm): Likewise.
	(movtd_64bit_nodm): Likewise.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r207658
	2014-02-06  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/sysv4.h (ENDIAN_SELECT): Do not attempt to enforce
	big-endian mode for -mcall-aixdesc, -mcall-freebsd, -mcall-netbsd,
	-mcall-openbsd, or -mcall-linux.
	(CC1_ENDIAN_BIG_SPEC): Remove.
	(CC1_ENDIAN_LITTLE_SPEC): Remove.
	(CC1_ENDIAN_DEFAULT_SPEC): Remove.
	(CC1_SPEC): Remove (always empty) %cc1_endian_... spec.
	(SUBTARGET_EXTRA_SPECS): Remove %cc1_endian_big, %cc1_endian_little,
	and %cc1_endian_default.
	* config/rs6000/sysv4le.h (CC1_ENDIAN_DEFAULT_SPEC): Remove.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Little Endian Vector API Support
	Backport from mainline r206443
	2014-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Remove
	two duplicate entries.

	Backport from mainline r206494
	2014-01-09  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* doc/invoke.texi: Add -maltivec={be,le} options, and document
	default element-order behavior for -maltivec.
	* config/rs6000/rs6000.opt: Add -maltivec={be,le} options.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure
	that -maltivec={le,be} implies -maltivec; disallow -maltivec=le
	when targeting big endian, at least for now.
	* config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG.

	Backport from mainline r206541
	2014-01-10  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtin.def: Fix pasto for VPKSDUS.

	Backport from mainline r206590
	2014-01-13  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Implement -maltivec=be for vec_insert and vec_extract.

	Backport from mainline r206641
	2014-01-15  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* config/rs6000/altivec.md (mulv8hi3): Explicitly generate vmulesh
	and vmulosh rather than call gen_vec_widen_smult_*.
	(vec_widen_umult_even_v16qi): Test VECTOR_ELT_ORDER_BIG rather
	than BYTES_BIG_ENDIAN to determine use of even or odd instruction.
	(vec_widen_smult_even_v16qi): Likewise.
	(vec_widen_umult_even_v8hi): Likewise.
	(vec_widen_smult_even_v8hi): Likewise.
	(vec_widen_umult_odd_v16qi): Likewise.
	(vec_widen_smult_odd_v16qi): Likewise.
	(vec_widen_umult_odd_v8hi): Likewise.
	(vec_widen_smult_odd_v8hi): Likewise.
	(vec_widen_umult_hi_v16qi): Explicitly generate vmuleub and
	vmuloub rather than call gen_vec_widen_umult_*.
	(vec_widen_umult_lo_v16qi): Likewise.
	(vec_widen_smult_hi_v16qi): Explicitly generate vmulesb and
	vmulosb rather than call gen_vec_widen_smult_*.
	(vec_widen_smult_lo_v16qi): Likewise.
	(vec_widen_umult_hi_v8hi): Explicitly generate vmuleuh and vmulouh
	rather than call gen_vec_widen_umult_*.
	(vec_widen_umult_lo_v8hi): Likewise.
	(vec_widen_smult_hi_v8hi): Explicitly gnerate vmulesh and vmulosh
	rather than call gen_vec_widen_smult_*.
	(vec_widen_smult_lo_v8hi): Likewise.

	Backport from mainline r207062
	2014-01-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Remove
	correction for little endian...
	* config/rs6000/vsx.md (vsx_xxpermdi2_<mode>_1): ...and move it to
	here.

	Backport from mainline r207262
	2014-01-29  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const):  Use
	CODE_FOR_altivec_vmrg*_direct rather than CODE_FOR_altivec_vmrg*.
	* config/rs6000/vsx.md (vsx_mergel_<mode>): Adjust for
	-maltivec=be with LE targets.
	(vsx_mergeh_<mode>): Likewise.
	* config/rs6000/altivec.md (UNSPEC_VMRG[HL]_DIRECT): New
	unspecs.
	(mulv8hi3): Use gen_altivec_vmrg[hl]w_direct.
	(altivec_vmrghb): Replace with define_expand and new
	*altivec_vmrghb_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrghb_direct): New define_insn.
	(altivec_vmrghh): Replace with define_expand and new
	*altivec_vmrghh_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrghh_direct): New define_insn.
	(altivec_vmrghw): Replace with define_expand and new
	*altivec_vmrghw_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrghw_direct): New define_insn.
	(*altivec_vmrghsf): Adjust for endianness.
	(altivec_vmrglb): Replace with define_expand and new
	*altivec_vmrglb_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrglb_direct): New define_insn.
	(altivec_vmrglh): Replace with define_expand and new
	*altivec_vmrglh_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrglh_direct): New define_insn.
	(altivec_vmrglw): Replace with define_expand and new
	*altivec_vmrglw_internal insn; adjust for -maltivec=be with LE
	targets.
	(altivec_vmrglw_direct): New define_insn.
	(*altivec_vmrglsf): Adjust for endianness.
	(vec_widen_umult_hi_v16qi): Use gen_altivec_vmrghh_direct.
	(vec_widen_umult_lo_v16qi): Use gen_altivec_vmrglh_direct.
	(vec_widen_smult_hi_v16qi): Use gen_altivec_vmrghh_direct.
	(vec_widen_smult_lo_v16qi): Use gen_altivec_vmrglh_direct.
	(vec_widen_umult_hi_v8hi): Use gen_altivec_vmrghw_direct.
	(vec_widen_umult_lo_v8hi): Use gen_altivec_vmrglw_direct.
	(vec_widen_smult_hi_v8hi): Use gen_altivec_vmrghw_direct.
	(vec_widen_smult_lo_v8hi): Use gen_altivec_vmrglw_direct.

	Backport from mainline r207318
	2014-01-30  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc/config/rs6000/rs6000.c (rs6000_expand_vector_init): Use
	gen_vsx_xxspltw_v4sf_direct instead of gen_vsx_xxspltw_v4sf;
	remove element index adjustment for endian (now handled in vsx.md
	and altivec.md).
	(altivec_expand_vec_perm_const): Use
	gen_altivec_vsplt[bhw]_direct instead of gen_altivec_vsplt[bhw].
	* gcc/config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTW): New unspec.
	(vsx_xxspltw_<mode>): Adjust element index for little endian.
	* gcc/config/rs6000/altivec.md (altivec_vspltb): Divide into a
	define_expand and a new define_insn *altivec_vspltb_internal;
	adjust for -maltivec=be on a little endian target.
	(altivec_vspltb_direct): New.
	(altivec_vsplth): Divide into a define_expand and a new
	define_insn *altivec_vsplth_internal; adjust for -maltivec=be on a
	little endian target.
	(altivec_vsplth_direct): New.
	(altivec_vspltw): Divide into a define_expand and a new
	define_insn *altivec_vspltw_internal; adjust for -maltivec=be on a
	little endian target.
	(altivec_vspltw_direct): New.
	(altivec_vspltsf): Divide into a define_expand and a new
	define_insn *altivec_vspltsf_internal; adjust for -maltivec=be on
	a little endian target.

	Backport from mainline r207326
	2014-01-30  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove
	unused variable "field".
	* config/rs6000/vsx.md (vsx_mergel_<mode>): Add missing DONE.
	(vsx_mergeh_<mode>): Likewise.
	* config/rs6000/altivec.md (altivec_vmrghb): Likewise.
	(altivec_vmrghh): Likewise.
	(altivec_vmrghw): Likewise.
	(altivec_vmrglb): Likewise.
	(altivec_vmrglh): Likewise.
	(altivec_vmrglw): Likewise.
	(altivec_vspltb): Add missing uses.
	(altivec_vsplth): Likewise.
	(altivec_vspltw): Likewise.
	(altivec_vspltsf): Likewise.

	Backport from mainline r207414
	2014-02-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (UNSPEC_VSUMSWS_DIRECT): New unspec.
	(altivec_vsumsws): Add handling for -maltivec=be with a little
	endian target.
	(altivec_vsumsws_direct): New.
	(reduc_splus_<mode>): Call gen_altivec_vsumsws_direct instead of
	gen_altivec_vsumsws.

	Backport from mainline r207415
	2014-02-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_le): Generalize
	for vector types other than V16QImode.
	* config/rs6000/altivec.md (altivec_vperm_<mode>): Change to a
	define_expand, and call altivec_expand_vec_perm_le when producing
	code with little endian element order.
	(*altivec_vperm_<mode>_internal): New insn having previous
	behavior of altivec_vperm_<mode>.
	(altivec_vperm_<mode>_uns): Change to a define_expand, and call
	altivec_expand_vec_perm_le when producing code with little endian
	element order.
	(*altivec_vperm_<mode>_uns_internal): New insn having previous
	behavior of altivec_vperm_<mode>_uns.

	Backport from mainline r207520
	2014-02-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* altivec.md (UNSPEC_VPACK_UNS_UNS_MOD_DIRECT): New unspec.
	(UNSPEC_VUNPACK_HI_SIGN_DIRECT): Likewise.
	(UNSPEC_VUNPACK_LO_SIGN_DIRECT): Likewise.
	(mulv8hi3): Use gen_altivec_vpkuwum_direct instead of
	gen_altivec_vpkuwum.
	(altivec_vpkpx): Test for VECTOR_ELT_ORDER_BIG instead of for
	BYTES_BIG_ENDIAN.
	(altivec_vpks<VI_char>ss): Likewise.
	(altivec_vpks<VI_char>us): Likewise.
	(altivec_vpku<VI_char>us): Likewise.
	(altivec_vpku<VI_char>um): Likewise.
	(altivec_vpku<VI_char>um_direct): New (copy of
	altivec_vpku<VI_char>um that still relies on BYTES_BIG_ENDIAN, for
	internal use).
	(altivec_vupkhs<VU_char>): Emit vupkls* instead of vupkhs* when
	target is little endian and -maltivec=be is not specified.
	(*altivec_vupkhs<VU_char>_direct): New (copy of
	altivec_vupkhs<VU_char> that always emits vupkhs*, for internal
	use).
	(altivec_vupkls<VU_char>): Emit vupkhs* instead of vupkls* when
	target is little endian and -maltivec=be is not specified.
	(*altivec_vupkls<VU_char>_direct): New (copy of
	altivec_vupkls<VU_char> that always emits vupkls*, for internal
	use).
	(altivec_vupkhpx): Emit vupklpx instead of vupkhpx when target is
	little endian and -maltivec=be is not specified.
	(altivec_vupklpx): Emit vupkhpx instead of vupklpx when target is
	little endian and -maltivec=be is not specified.

	Backport from mainline r207521
	2014-02-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_vsum2sws): Adjust code
	generation for -maltivec=be.
	(altivec_vsumsws): Simplify redundant test.

	Backport from mainline r207525
	2014-02-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Change
	CODE_FOR_altivec_vpku[hw]um to
	CODE_FOR_altivec_vpku[hw]um_direct.
	* config/rs6000/altivec.md (vec_unpacks_hi_<VP_small_lc>): Change
	UNSPEC_VUNPACK_HI_SIGN to UNSPEC_VUNPACK_HI_SIGN_DIRECT.
	(vec_unpacks_lo_<VP_small_lc>): Change UNSPEC_VUNPACK_LO_SIGN to
	UNSPEC_VUNPACK_LO_SIGN_DIRECT.

	Backport from mainline r207814.
	2014-02-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_xxpermdi_<mode>): Handle little
	endian targets.

	Backport from mainline r207815.
	2014-02-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (p8_vmrgew): Handle little endian
	targets.
	(p8_vmrgow): Likewise.

	Backport from mainline r207919.
	2014-02-19  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (vspltis_constant): Fix most significant
	bit of zero.

	Backport from mainline 208019
	2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_lvxl): Rename as
	*altivec_lvxl_<mode>_internal and use VM2 iterator instead of
	V4SI.
	(altivec_lvxl_<mode>): New define_expand incorporating
	-maltivec=be semantics where needed.
	(altivec_lvx): Rename as *altivec_lvx_<mode>_internal.
	(altivec_lvx_<mode>): New define_expand incorporating -maltivec=be
	semantics where needed.
	(altivec_stvx): Rename as *altivec_stvx_<mode>_internal.
	(altivec_stvx_<mode>): New define_expand incorporating
	-maltivec=be semantics where needed.
	(altivec_stvxl): Rename as *altivec_stvxl_<mode>_internal and use
	VM2 iterator instead of V4SI.
	(altivec_stvxl_<mode>): New define_expand incorporating
	-maltivec=be semantics where needed.
	* config/rs6000/rs6000-builtin.def: Add new built-in definitions
	LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, LVXL_V16QI,
	LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, LVX_V8HI, LVX_V16QI,
	STVX_V2DF, STVX_V2DI, STVX_V4SF, STVX_V4SI, STVX_V8HI, STVX_V16QI,
	STVXL_V2DF, STVXL_V2DI, STVXL_V4SF, STVXL_V4SI, STVXL_V8HI,
	STVXL_V16QI.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Replace
	ALTIVEC_BUILTIN_LVX with ALTIVEC_BUILTIN_LVX_<MODE> throughout;
	similarly for ALTIVEC_BUILTIN_LVXL, ALTIVEC_BUILTIN_STVX, and
	ALTIVEC_BUILTIN_STVXL.
	* config/rs6000/rs6000-protos.h (altivec_expand_lvx_be): New
	prototype.
	(altivec_expand_stvx_be): Likewise.
	* config/rs6000/rs6000.c (swap_selector_for_mode): New function.
	(altivec_expand_lvx_be): Likewise.
	(altivec_expand_stvx_be): Likewise.
	(altivec_expand_builtin): Add cases for
	ALTIVEC_BUILTIN_STVX_<MODE>, ALTIVEC_BUILTIN_STVXL_<MODE>,
	ALTIVEC_BUILTIN_LVXL_<MODE>, and ALTIVEC_BUILTIN_LVX_<MODE>.
	(altivec_init_builtins): Add definitions for
	__builtin_altivec_lvxl_<mode>, __builtin_altivec_lvx_<mode>,
	__builtin_altivec_stvx_<mode>, and
	__builtin_altivec_stvxl_<mode>.

	Backport from mainline 208021
	2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_vsumsws): Replace second
	vspltw with vsldoi.
	(reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of
	gen_altivec_vsumsws.

	Backport from mainline 208049
	2014-02-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace
	define_insn with define_expand and new define_insn
	*altivec_lve<VI_char>x_internal.
	(altivec_stve<VI_char>x): Replace define_insn with define_expand
	and new define_insn *altivec_stve<VI_char>x_internal.
	* config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New
	prototype.
	* config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by
	lve*x built-ins.
	(altivec_expand_stvex_be): New function.

	Backport from mainline
	2014-02-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Relax assert
	to permit subregs.

	Backport from mainline
	2014-02-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	* config/rs6000/vector.md (*vector_unordered<mode>): Change split
	to use canonical form for nor<mode>3.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2014-02-04  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.opt (-mlra): Add switch to enable the LRA
	register allocator.

	* config/rs6000/rs6000.c (TARGET_LRA_P): Add support for -mlra to
	enable the LRA register allocator.  Back port the changes from the
	trunk to enable LRA.
	(rs6000_legitimate_offset_address_p): Likewise.
	(legitimate_lo_sum_address_p): Likewise.
	(use_toc_relative_ref): Likewise.
	(rs6000_legitimate_address_p): Likewise.
	(rs6000_emit_move): Likewise.
	(rs6000_secondary_memory_needed_mode): Likewise.
	(rs6000_alloc_sdmode_stack_slot): Likewise.
	(rs6000_lra_p): Likewise.

	* config/rs6000/sync.md (load_lockedti): Copy TI/PTI variables by
	64-bit parts to force the register allocator to allocate even/odd
	register pairs for the quad word atomic instructions.
	(store_conditionalti): Likewise.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port from mainline
	2014-01-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/59909
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
	-mquad-memory-atomic.  Update -mquad-memory documentation to say
	it is only used for non-atomic loads/stores.

	* config/rs6000/predicates.md (quad_int_reg_operand): Allow either
	-mquad-memory or -mquad-memory-atomic switches.

	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add
	-mquad-memory-atomic to ISA 2.07 support.

	* config/rs6000/rs6000.opt (-mquad-memory-atomic): Add new switch
	to separate support of normal quad word memory operations (ldq,
	stq) from the atomic quad word memory operations.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
	support to separate non-atomic quad word operations from atomic
	quad word operations.  Disable non-atomic quad word operations in
	little endian mode so that we don't have to swap words after the
	load and before the store.
	(quad_load_store_p): Add comment about atomic quad word support.
	(rs6000_opt_masks): Add -mquad-memory-atomic to the list of
	options printed with -mdebug=reg.

	* config/rs6000/rs6000.h (TARGET_SYNC_TI): Use
	-mquad-memory-atomic as the test for whether we have quad word
	atomic instructions.
	(TARGET_SYNC_HI_QI): If either -mquad-memory-atomic,
	-mquad-memory, or -mp8-vector are used, allow byte/half-word
	atomic operations.

	* config/rs6000/sync.md (load_lockedti): Insure that the address
	is a proper indexed or indirect address for the lqarx instruction.
	On little endian systems, swap the hi/lo registers after the lqarx
	instruction.
	(load_lockedpti): Use indexed_or_indirect_operand predicate to
	insure the address is valid for the lqarx instruction.
	(store_conditionalti): Insure that the address is a proper indexed
	or indirect address for the stqcrx. instruction.  On little endian
	systems, swap the hi/lo registers before doing the stqcrx.
	instruction.
	(store_conditionalpti): Use indexed_or_indirect_operand predicate to
	insure the address is valid for the stqcrx. instruction.

	* gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
	Define __QUAD_MEMORY__ and __QUAD_MEMORY_ATOMIC__ based on what
	type of quad memory support is available.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Apply mainline r202190, powerpc64le multilibs and multiarch dir
	2013-09-03  Alan Modra  <amodra@gmail.com>

	* config.gcc (powerpc*-*-linux*): Add support for little-endian
	multilibs to big-endian target and vice versa.
	* config/rs6000/t-linux64: Use := assignment on all vars.
	(MULTILIB_EXTRA_OPTS): Remove fPIC.
	(MULTILIB_OSDIRNAMES): Specify using mapping from multilib_options.
	* config/rs6000/t-linux64le: New file.
	* config/rs6000/t-linux64bele: New file.
	* config/rs6000/t-linux64lebe: New file.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Back port from mainline
	2014-01-16  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/59844
	* config/rs6000/rs6000.md (reload_vsx_from_gprsf): Add little
	endian support, remove tests for WORDS_BIG_ENDIAN.
	(p8_mfvsrd_3_<mode>): Likewise.
	(reload_gpr_from_vsx<mode>): Likewise.
	(reload_gpr_from_vsxsf): Likewise.
	(p8_mfvsrd_4_disf): Likewise.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2013-04-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/56843
	* config/rs6000/rs6000.c (rs6000_emit_swdiv_high_precision): Remove.
	(rs6000_emit_swdiv_low_precision): Remove.
	(rs6000_emit_swdiv): Rewrite to handle between one and four
	iterations of Newton-Raphson generally; modify required number of
	iterations for some cases.
	* config/rs6000/rs6000.h (RS6000_RECIP_HIGH_PRECISION_P): Remove.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline
	2013-08-19  Peter Bergner  <bergner@vnet.ibm.com>
		    Jakub Jelinek  <jakub@redhat.com>

	* builtins.def (BUILT_IN_FABSD32): New DFP ABS builtin.
	(BUILT_IN_FABSD64): Likewise.
	(BUILT_IN_FABSD128): Likewise.
	* builtins.c (expand_builtin): Add support for
	new DFP ABS builtins.
	(fold_builtin_1): Likewise.
	* config/rs6000/dfp.md
	(*abstd2_fpr): Handle non-overlapping destination
	and source operands.
	(*nabstd2_fpr): Likewise.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Apply mainline r205060.
	2013-11-20  Alan Modra  <amodra@gmail.com>
	* config/rs6000/sysv4.h (CC1_ENDIAN_LITTLE_SPEC): Define as empty.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Default
	to strict alignment on older processors when little-endian.
	* config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Default to power8
	for ELFv2.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	POWER ELFv2 ABI Support
	Backport from mainline r204842:

	2013-11-15  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* doc/invoke.texi (-mabi=elfv1, -mabi=elfv2): Document.

	Backport from mainline r204809:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/sysv4le.h (LINUX64_DEFAULT_ABI_ELFv2): Define.

	Backport from mainline r204808:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Alan Modra  <amodra@gmail.com>

	* config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2.
	(RS6000_SAVE_TOC): Remove.
	(RS6000_TOC_SAVE_SLOT): New macro.
	* config/rs6000/rs6000.c (rs6000_parm_offset): New function.
	(rs6000_parm_start): Use it.
	(rs6000_function_arg_advance_1): Likewise.
	(rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT.
	(rs6000_emit_epilogue): Likewise.
	(rs6000_call_aix): Likewise.
	(rs6000_output_function_prologue): Do not save/restore r11
	around calling _mcount for ABI_ELFv2.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Alan Modra  <amodra@gmail.com>

	* config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space):
	Add prototype.
	* config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove.
	(REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space.
	* config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function.
	(rs6000_function_parms_need_stack): Likewise.
	(rs6000_reg_parm_stack_space): Likewise.
	(rs6000_function_arg): Do not replace BLKmode by Pmode when
	returning a register argument.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Michael Gschwind  <mkg@us.ibm.com>

	* config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro.
	(ALTIVEC_ARG_MAX_RETURN): Likewise.
	(FUNCTION_VALUE_REGNO_P): Use them.
	* config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define.
	(rs6000_return_in_msb): New function.
	(rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates.
	Handle aggregates of up to 16 bytes for ELFv2.
	(rs6000_function_value): Handle ELFv2 homogeneous aggregates.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Michael Gschwind  <mkg@us.ibm.com>

	* config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.
	* config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.
	(rs6000_discover_homogeneous_aggregate): Likewise.
	(rs6000_function_arg_boundary): Handle homogeneous aggregates.
	(rs6000_function_arg_advance_1): Likewise.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.
	(rs6000_psave_function_arg): Handle BLKmode arguments.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Michael Gschwind  <mkg@us.ibm.com>

	* config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.
	* config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.
	(rs6000_discover_homogeneous_aggregate): Likewise.
	(rs6000_function_arg_boundary): Handle homogeneous aggregates.
	(rs6000_function_arg_advance_1): Likewise.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.
	(rs6000_psave_function_arg): Handle BLKmode arguments.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (machine_function): New member
	r2_setup_needed.
	(rs6000_emit_prologue): Set r2_setup_needed if necessary.
	(rs6000_output_mi_thunk): Set r2_setup_needed.
	(rs6000_output_function_prologue): Output global entry point
	prologue and local entry point marker if needed for ABI_ELFv2.
	Output -mprofile-kernel code here.
	(output_function_profiler): Do not output -mprofile-kernel
	code here; moved to rs6000_output_function_prologue.
	(rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2.

	(rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2.
	(rs6000_output_function_entry): Likewise.
	(rs6000_assemble_integer): Likewise.
	(rs6000_elf_encode_section_info): Likewise.
	(rs6000_elf_declare_function_name): Do not create dot symbols
	or .opd section for ABI_ELFv2.

	(rs6000_trampoline_size): Update for ABI_ELFv2 trampolines.
	(rs6000_trampoline_init): Likewise.
	(rs6000_elf_file_end): Call file_end_indicate_exec_stack
	for ABI_ELFv2.

	(rs6000_call_aix): Handle ELFv2 indirect calls.  Do not check
	for function descriptors in ABI_ELFv2.

	* config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support
	on ABI_AIX only, not ABI_ELFv2.
	("*call_value_indirect_aix<mode>"): Likewise.
	("*call_indirect_elfv2<mode>"): New pattern.
	("*call_value_indirect_elfv2<mode>"): Likewise.

	* config/rs6000/predicates.md ("symbol_ref_operand"): Do not
	check for function descriptors in ABI_ELFv2.
	("current_file_function_operand"): Likewise.

	* config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]:
	(toc): Undefine.
	(FUNC_NAME): Define ELFv2 variant.
	(JUMP_TARGET): Likewise.
	(FUNC_START): Likewise.
	(HIDDEN_FUNC): Likewise.
	(FUNC_END): Likeiwse.

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1
	and --with-abi=elfv2.
	* config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi".
	* config/rs6000/rs6000.opt (mabi=elfv1): New option.
	(mabi=elfv2): Likewise.
	* config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2.
	* config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI
	if !RS6000_BI_ARCH.
	(ELFv2_ABI_CHECK): New macro.
	(SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set
	rs6000_current_abi to ABI_AIX or ABI_ELFv2.
	(GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version.
	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine
	_CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2.
	(debug_stack_info): Likewise.
	(rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX.
	(rs6000_legitimize_tls_address): Likewise.
	(rs6000_conditional_register_usage): Likewise.
	(rs6000_emit_move): Likewise.
	(init_cumulative_args): Likewise.
	(rs6000_function_arg_advance_1): Likewise.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.
	(rs6000_output_function_entry): Likewise.
	(rs6000_assemble_integer): Likewise.
	(rs6000_savres_strategy): Likewise.
	(rs6000_stack_info): Likewise.
	(rs6000_function_ok_for_sibcall): Likewise.
	(rs6000_emit_load_toc_table): Likewise.
	(rs6000_savres_routine_name): Likewise.
	(ptr_regno_for_savres): Likewise.
	(rs6000_emit_prologue): Likewise.
	(rs6000_emit_epilogue): Likewise.
	(rs6000_output_function_epilogue): Likewise.
	(output_profile_hook): Likewise.
	(output_function_profiler): Likewise.
	(rs6000_trampoline_size): Likewise.
	(rs6000_trampoline_init): Likewise.
	(rs6000_elf_output_toc_section_asm_op): Likewise.
	(rs6000_elf_encode_section_info): Likewise.
	(rs6000_elf_reloc_rw_mask): Likewise.
	(rs6000_elf_declare_function_name): Likewise.
	(rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX,
	except that rs6000_compat_align_parm is always assumed false.
	(rs6000_gimplify_va_arg): Likewise.
	(rs6000_call_aix): Update comment.
	(rs6000_sibcall_aix): Likewise.
	* config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"):
	Treat ABI_ELFv2 the same as ABI_AIX.
	("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise.
	("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise.
	("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise.
	("load_toc_aix_si"): Likewise.
	("load_toc_aix_di"): Likewise.
	("call"): Likewise.
	("call_value"): Likewise.
	("*call_local_aix<mode>"): Likewise.
	("*call_value_local_aix<mode>"): Likewise.
	("*call_nonlocal_aix<mode>"): Likewise.
	("*call_value_nonlocal_aix<mode>"): Likewise.
	("*call_indirect_aix<mode>"): Likewise.
	("*call_value_indirect_aix<mode>"): Likewise.
	("sibcall"): Likewise.
	("sibcall_value"): Likewise.
	("*sibcall_aix<mode>"): Likewise.
	("*sibcall_value_aix<mode>"): Likewise.
	* config/rs6000/predicates.md ("symbol_ref_operand"): Likewise.
	("current_file_function_operand"): Likewise.

	Backport from mainline r204807:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_arg_partial_bytes): Simplify logic
	by making use of the fact that for vector / floating point arguments
	passed both in VRs/FPRs and in the fixed parameter area, the partial
	bytes mechanism is in fact not used.

	Backport from mainline r204806:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_psave_function_arg): New function.
	(rs6000_finish_function_arg): Likewise.
	(rs6000_function_arg): Use rs6000_psave_function_arg and
	rs6000_finish_function_arg to handle both vector and floating
	point arguments that are also passed in GPRs / the stack.

	Backport from mainline r204805:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Remove TYPE argument.
	(USE_ALTIVEC_FOR_ARG_P): Likewise.
	(rs6000_darwin64_record_arg_advance_recurse): Update uses.
	(rs6000_function_arg_advance_1):Likewise.
	(rs6000_darwin64_record_arg_recurse): Likewise.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.

	Backport from mainline r204804:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Replace
	"DEFAULT_ABI != ABI_AIX" test by testing for ABI_V4 or ABI_DARWIN.
	(rs6000_savres_strategy): Likewise.
	(rs6000_return_addr): Likewise.
	(rs6000_emit_load_toc_table): Replace "DEFAULT_ABI != ABI_AIX" by
	testing for ABI_V4 (since ABI_DARWIN is impossible here).
	(rs6000_emit_prologue): Likewise.
	(legitimate_lo_sum_address_p): Simplify DEFAULT_ABI test.
	(rs6000_elf_declare_function_name): Remove duplicated test.
	* config/rs6000/rs6000.md ("load_toc_v4_PIC_1"): Explicitly test
	for ABI_V4 (instead of "DEFAULT_ABI != ABI_AIX" test).
	("load_toc_v4_PIC_1_normal"): Likewise.
	("load_toc_v4_PIC_1_476"): Likewise.
	("load_toc_v4_PIC_1b"): Likewise.
	("load_toc_v4_PIC_1b_normal"): Likewise.
	("load_toc_v4_PIC_1b_476"): Likewise.
	("load_toc_v4_PIC_2"): Likewise.
	("load_toc_v4_PIC_3b"): Likewise.
	("load_toc_v4_PIC_3c"): Likewise.
	* config/rs6000/rs6000.h (RS6000_REG_SAVE): Simplify DEFAULT_ABI test.
	(RS6000_SAVE_AREA): Likewise.
	(FP_ARG_MAX_REG): Likewise.
	(RETURN_ADDRESS_OFFSET): Likewise.
	* config/rs6000/sysv.h (TARGET_TOC): Test for ABI_V4 instead
	of ABI_AIX.
	(SUBTARGET_OVERRIDE_OPTIONS): Likewise.
	(MINIMAL_TOC_SECTION_ASM_OP): Likewise.

	Backport from mainline r204803:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_call_indirect_aix): Rename to ...
	(rs6000_call_aix): ... this.  Handle both direct and indirect calls.
	Create call insn directly instead of via various gen_... routines.
	Mention special registers used by the call in CALL_INSN_FUNCTION_USAGE.
	(rs6000_sibcall_aix): New function.
	* config/rs6000/rs6000.md (TOC_SAVE_OFFSET_32BIT): Remove.
	(TOC_SAVE_OFFSET_64BIT): Likewise.
	(AIX_FUNC_DESC_TOC_32BIT): Likewise.
	(AIX_FUNC_DESC_TOC_64BIT): Likewise.
	(AIX_FUNC_DESC_SC_32BIT): Likewise.
	(AIX_FUNC_DESC_SC_64BIT): Likewise.
	("call" expander): Call rs6000_call_aix.
	("call_value" expander): Likewise.
	("call_indirect_aix<ptrsize>"): Replace this pattern ...
	("call_indirect_aix<ptrsize>_nor11"): ... and this pattern ...
	("*call_indirect_aix<mode>"): ... by this insn pattern.
	("call_value_indirect_aix<ptrsize>"): Replace this pattern ...
	("call_value_indirect_aix<ptrsize>_nor11"): ... and this pattern ...
	("*call_value_indirect_aix<mode>"): ... by this insn pattern.
	("*call_nonlocal_aix32", "*call_nonlocal_aix64"): Replace by ...
	("*call_nonlocal_aix<mode>"): ... this pattern.
	("*call_value_nonlocal_aix32", "*call_value_nonlocal_aix64"): Replace
	("*call_value_nonlocal_aix<mode>"): ... by this pattern.
	("*call_local_aix<mode>"): New insn pattern.
	("*call_value_local_aix<mode>"): Likewise.
	("sibcall" expander): Call rs6000_sibcall_aix.
	("sibcall_value" expander): Likewise.  Move earlier in file.
	("*sibcall_nonlocal_aix<mode>"): Replace by ...
	("*sibcall_aix<mode>"): ... this pattern.
	("*sibcall_value_nonlocal_aix<mode>"): Replace by ...
	("*sibcall_value_aix<mode>"): ... this pattern.
	* config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): Remove.
	(rs6000_call_aix): Add prototype.
	(rs6000_sibcall_aix): Likewise.

	Backport from mainline r204799:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a
	RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn.
	Instead, add USEs of all modified call-saved CR fields to the
	insn storing the result to the stack slot, and provide an
	appropriate REG_FRAME_RELATED_EXPR for that insn.
	* config/rs6000/rs6000.md ("*crsave"): New insn pattern.
	* config/rs6000/predicates.md ("crsave_operation"): New predicate.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	ELFv2 ABI Call Support
	Backport from mainline r204798:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
		    Alan Modra  <amodra@gmail.com>

	* function.c (assign_parms): Use all.reg_parm_stack_space instead
	of re-evaluating REG_PARM_STACK_SPACE target macro.
	(locate_and_pad_parm): New parameter REG_PARM_STACK_SPACE.  Use it
	instead of evaluating target macro REG_PARM_STACK_SPACE every time.
	(assign_parm_find_entry_rtl): Update call.
	* calls.c (initialize_argument_information): Update call.
	(emit_library_call_value_1): Likewise.
	* expr.h (locate_and_pad_parm): Update prototype.

	Backport from mainline r204797:

	2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* calls.c (store_unaligned_arguments_into_pseudos): Skip PARALLEL
	arguments.

	Backport from mainline r197003:

	2013-03-23  Eric Botcazou  <ebotcazou@adacore.com>

	* calls.c (expand_call): Add missing guard to code handling return
	of non-BLKmode structures in MSB.
	* function.c (expand_function_end): Likewise.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r201750.
	Note: Default setting of -mcompat-align-parm inverted!

	2013-08-14  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/57949
	* doc/invoke.texi: Add documentation of mcompat-align-parm
	option.
	* config/rs6000/rs6000.opt: Add mcompat-align-parm option.
	* config/rs6000/rs6000.c (rs6000_function_arg_boundary): For AIX
	and Linux, correct BLKmode alignment when 128-bit alignment is
	required and compatibility flag is not set.
	(rs6000_gimplify_va_arg): For AIX and Linux, honor specified
	alignment for zero-size arguments when compatibility flag is not
	set.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Little Endian Vector Support
	Backport from mainline r205333
	2013-11-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Correct
	for little endian.

	Backport from mainline r205241
	2013-11-21  Bill Schmidt  <wschmidt@vnet.ibm.com>

	* config/rs6000/vector.md (vec_pack_trunc_v2df): Revert previous
	little endian change.
	(vec_pack_sfix_trunc_v2df): Likewise.
	(vec_pack_ufix_trunc_v2df): Likewise.
	* config/rs6000/rs6000.c (rs6000_expand_interleave): Correct
	double checking of endianness.

	Backport from mainline r205146
	2013-11-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_set_<mode>): Adjust for little endian.
	(vsx_extract_<mode>): Likewise.
	(*vsx_extract_<mode>_one_le): New LE variant on
	*vsx_extract_<mode>_zero.
	(vsx_extract_v4sf): Adjust for little endian.

	Backport from mainline r205080
	2013-11-19  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Adjust
	V16QI vector splat case for little endian.

	Backport from mainline r205045:

	2013-11-19  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/vector.md ("mov<mode>"): Do not call
	rs6000_emit_le_vsx_move to move into or out of GPRs.
	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Assert
	source and destination are not GPR hard regs.

	Backport from mainline r204920
	2011-11-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_frame_related): Add split_reg
	parameter and use it in REG_FRAME_RELATED_EXPR note.
	(emit_frame_save): Call rs6000_frame_related with extra NULL_RTX
	parameter.
	(rs6000_emit_prologue): Likewise, but for little endian VSX
	stores, pass the source register of the store instead.

	Backport from mainline r204862
	2013-11-15  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (UNSPEC_VPERM_X, UNSPEC_VPERM_UNS_X):
	Remove.
	(altivec_vperm_<mode>): Revert earlier little endian change.
	(*altivec_vperm_<mode>_internal): Remove.
	(altivec_vperm_<mode>_uns): Revert earlier little endian change.
	(*altivec_vperm_<mode>_uns_internal): Remove.
	* config/rs6000/vector.md (vec_realign_load_<mode>): Revise
	commentary.

	Backport from mainline r204441
	2013-11-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal):
	Remove restriction against use of VSX instructions when generating
	code for little endian mode.

	Backport from mainline r204440
	2013-11-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (mulv4si3): Ensure we generate vmulouh
	for both big and little endian.
	(mulv8hi3): Swap input operands for merge high and merge low
	instructions for little endian.

	Backport from mainline r204439
	2013-11-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (vec_widen_umult_even_v16qi): Change
	define_insn to define_expand that uses even patterns for big
	endian and odd patterns for little endian.
	(vec_widen_smult_even_v16qi): Likewise.
	(vec_widen_umult_even_v8hi): Likewise.
	(vec_widen_smult_even_v8hi): Likewise.
	(vec_widen_umult_odd_v16qi): Likewise.
	(vec_widen_smult_odd_v16qi): Likewise.
	(vec_widen_umult_odd_v8hi): Likewise.
	(vec_widen_smult_odd_v8hi): Likewise.
	(altivec_vmuleub): New define_insn.
	(altivec_vmuloub): Likewise.
	(altivec_vmulesb): Likewise.
	(altivec_vmulosb): Likewise.
	(altivec_vmuleuh): Likewise.
	(altivec_vmulouh): Likewise.
	(altivec_vmulesh): Likewise.
	(altivec_vmulosh): Likewise.

	Backport from mainline r204395
	2013-11-05  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vector.md (vec_pack_sfix_trunc_v2df): Adjust for
	little endian.
	(vec_pack_ufix_trunc_v2df): Likewise.

	Backport from mainline r204363
	2013-11-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (vec_widen_umult_hi_v16qi): Swap
	arguments to merge instruction for little endian.
	(vec_widen_umult_lo_v16qi): Likewise.
	(vec_widen_smult_hi_v16qi): Likewise.
	(vec_widen_smult_lo_v16qi): Likewise.
	(vec_widen_umult_hi_v8hi): Likewise.
	(vec_widen_umult_lo_v8hi): Likewise.
	(vec_widen_smult_hi_v8hi): Likewise.
	(vec_widen_smult_lo_v8hi): Likewise.

	Backport from mainline r204350
	2013-11-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (*vsx_le_perm_store_<mode> for VSX_D):
	Replace the define_insn_and_split with a define_insn and two
	define_splits, with the split after reload re-permuting the source
	register to its original value.
	(*vsx_le_perm_store_<mode> for VSX_W): Likewise.
	(*vsx_le_perm_store_v8hi): Likewise.
	(*vsx_le_perm_store_v16qi): Likewise.

	Backport from mainline r204321
	2013-11-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vector.md (vec_pack_trunc_v2df):  Adjust for
	little endian.

	Backport from mainline r204321
	2013-11-02  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for
	little endian.

	Backport from mainline r203980
	2013-10-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (mulv8hi3): Adjust for little endian.

	Backport from mainline r203930
	2013-10-22  Bill Schmidt  <wschmidt@vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse
	meaning of merge-high and merge-low masks for little endian; avoid
	use of vector-pack masks for little endian for mismatched modes.

	Backport from mainline r203877
	2013-10-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Adjust for
	little endian.
	(vec_unpacku_hi_v8hi): Likewise.
	(vec_unpacku_lo_v16qi): Likewise.
	(vec_unpacku_lo_v8hi): Likewise.

	Backport from mainline r203863
	2013-10-19  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (vspltis_constant): Make sure we check
	all elements for both endian flavors.

	Backport from mainline r203714
	2013-10-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for
	endianness.
	(vec_unpacks_lo_v4sf): Likewise.
	(vec_unpacks_float_hi_v4si): Likewise.
	(vec_unpacks_float_lo_v4si): Likewise.
	(vec_unpacku_float_hi_v4si): Likewise.
	(vec_unpacku_float_lo_v4si): Likewise.

	Backport from mainline r203713
	2013-10-16  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_concat_<mode>): Adjust output for LE.
	(vsx_concat_v2sf): Likewise.

	Backport from mainline r203458
	2013-10-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (*vsx_le_perm_load_v2di): Generalize to
	handle vector float as well.
	(*vsx_le_perm_load_v4si): Likewise.
	(*vsx_le_perm_store_v2di): Likewise.
	(*vsx_le_perm_store_v4si): Likewise.

	Backport from mainline r203457
	2013-10-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vector.md (vec_realign_load<mode>): Generate vperm
	directly to circumvent subtract from splat{31} workaround.
	* config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_le): New
	prototype.
	* config/rs6000/rs6000.c (altivec_expand_vec_perm_le): New.
	* config/rs6000/altivec.md (define_c_enum "unspec"): Add
	UNSPEC_VPERM_X and UNSPEC_VPERM_UNS_X.
	(altivec_vperm_<mode>): Convert to define_insn_and_split to
	separate big and little endian logic.
	(*altivec_vperm_<mode>_internal): New define_insn.
	(altivec_vperm_<mode>_uns): Convert to define_insn_and_split to
	separate big and little endian logic.
	(*altivec_vperm_<mode>_uns_internal): New define_insn.
	(vec_permv16qi): Add little endian logic.

	Backport from mainline r203247
	2013-10-07  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const_le): New.
	(altivec_expand_vec_perm_const): Call it.

	Backport from mainline r203246
	2013-10-07  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/vector.md (mov<mode>): Emit permuted move
	sequences for LE VSX loads and stores at expand time.
	* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New
	prototype.
	* config/rs6000/rs6000.c (rs6000_const_vec): New.
	(rs6000_gen_le_vsx_permute): New.
	(rs6000_gen_le_vsx_load): New.
	(rs6000_gen_le_vsx_store): New.
	(rs6000_gen_le_vsx_move): New.
	* config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New.
	(*vsx_le_perm_load_v4si): New.
	(*vsx_le_perm_load_v8hi): New.
	(*vsx_le_perm_load_v16qi): New.
	(*vsx_le_perm_store_v2di): New.
	(*vsx_le_perm_store_v4si): New.
	(*vsx_le_perm_store_v8hi): New.
	(*vsx_le_perm_store_v16qi): New.
	(*vsx_xxpermdi2_le_<mode>): New.
	(*vsx_xxpermdi4_le_<mode>): New.
	(*vsx_xxpermdi8_le_V8HI): New.
	(*vsx_xxpermdi16_le_V16QI): New.
	(*vsx_lxvd2x2_le_<mode>): New.
	(*vsx_lxvd2x4_le_<mode>): New.
	(*vsx_lxvd2x8_le_V8HI): New.
	(*vsx_lxvd2x16_le_V16QI): New.
	(*vsx_stxvd2x2_le_<mode>): New.
	(*vsx_stxvd2x4_le_<mode>): New.
	(*vsx_stxvd2x8_le_V8HI): New.
	(*vsx_stxvd2x16_le_V16QI): New.

	Backport from mainline r201235
	2013-07-24  Bill Schmidt  <wschmidt@linux.ibm.com>
	            Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/altivec.md (altivec_vpkpx): Handle little endian.
	(altivec_vpks<VI_char>ss): Likewise.
	(altivec_vpks<VI_char>us): Likewise.
	(altivec_vpku<VI_char>us): Likewise.
	(altivec_vpku<VI_char>um): Likewise.

	Backport from mainline r201208
	2013-07-24  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>
	            Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/vector.md (vec_realign_load_<mode>): Reorder input
	operands to vperm for little endian.
	* config/rs6000/rs6000.c (rs6000_expand_builtin): Use lvsr instead
	of lvsl to create the control mask for a vperm for little endian.

	Backport from mainline r201195
	2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	            Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse
	two operands for little-endian.

	Backport from mainline r201193
	2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	            Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct
	selection of field for vector splat in little endian mode.

	Backport from mainline r201149
	2013-07-22  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>
	            Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix
	endianness when selecting field to splat.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline r205123:

	2013-11-20  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Do not
	allow subregs of TDmode in FPRs of smaller size in little-endian.
	(rs6000_split_multireg_move): When splitting an access to TDmode
	in FPRs, do not use simplify_gen_subreg.

	Backport from mainline r204927:

	2013-11-17  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_move): Use low word of
	sdmode_stack_slot also in little-endian mode.

2014-04-04  Bill Schmidt <wschmidt@linux.vnet.ibm.com>

	Power8 HTM Support
	Backport from mainline
	2013-12-03  Peter Bergner  <bergner@vnet.ibm.com>

	* config/rs6000/htmintrin.h (_TEXASR_INSTRUCTION_FETCH_CONFLICT): Fix
	typo in macro name.
	(_TEXASRU_INSTRUCTION_FETCH_CONFLICT): Likewise.

	Backport from mainline r205233.
	2013-11-21  Peter Bergner  <bergner@vnet.ibm.com>

	* doc/extend.texi: Document htm builtins.

	Backport from mainline
	2013-07-17  Iain Sandoe  <iain@codesourcery.com>

	* config/rs6000/darwin.h (REGISTER_NAMES): Add HTM registers.

	Backport from mainline
	2013-07-16  Peter Bergner <bergner@vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
	enable extra ISA flags with TARGET_HTM.

	2013-07-16  Jakub Jelinek  <jakub@redhat.com>
		    Peter Bergner  <bergner@vnet.ibm.com>

	* config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM
	registers in the comment.
	(DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers.
	(DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS
	rather than FIRST_PSEUDO_REGISTERS.

	* config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md.
	* config/rs6000/rs6000.opt: Add -mhtm option.
	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_HTM.
	(ISA_2_7_MASKS_SERVER): Add OPTION_MASK_HTM.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__HTM__ if the HTM instructions are available.
	* config/rs6000/predicates.md (u3bit_cint_operand, u10bit_cint_operand)
	(htm_spr_reg_operand): New define_predicates.
	* config/rs6000/rs6000.md (define_attr "type"): Add htm.
	(TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): New define_constants.
	Include htm.md.
	* config/rs6000/rs6000-builtin.def (BU_HTM_0, BU_HTM_1, BU_HTM_2)
	(BU_HTM_3, BU_HTM_SPR0, BU_HTM_SPR1): Add support macros for defining
	HTM builtin functions.
	* config/rs6000/rs6000.c (RS6000_BUILTIN_H): New macro.
	(rs6000_reg_names, alt_reg_names): Add HTM SPR register names.
	(rs6000_init_hard_regno_mode_ok): Add support for HTM instructions.
	(rs6000_builtin_mask_calculate): Likewise.
	(rs6000_option_override_internal): Likewise.
	(bdesc_htm): Add new HTM builtin support.
	(htm_spr_num): New function.
	(htm_spr_regno): Likewise.
	(rs6000_htm_spr_icode): Likewise.
	(htm_expand_builtin): Likewise.
	(htm_init_builtins): Likewise.
	(rs6000_expand_builtin): Add support for HTM builtin functions.
	(rs6000_init_builtins): Likewise.
	(rs6000_invalid_builtin, rs6000_opt_mask): Add support for -mhtm option.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mhtm.
	(TARGET_HTM, MASK_HTM): Define macros.
	(FIRST_PSEUDO_REGISTER): Adjust for new HTM SPR registers.
	(FIXED_REGISTERS): Likewise.
	(CALL_USED_REGISTERS): Likewise.
	(CALL_REALLY_USED_REGISTERS): Likewise.
	(REG_ALLOC_ORDER): Likewise.
	(enum reg_class): Likewise.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS): Likewise.
	(REGISTER_NAMES): Likewise.
	(ADDITIONAL_REGISTER_NAMES): Likewise.
	(RS6000_BTC_SPR, RS6000_BTC_VOID, RS6000_BTC_32BIT, RS6000_BTC_64BIT)
	(RS6000_BTC_MISC_MASK, RS6000_BTM_HTM): New macros.
	(RS6000_BTM_COMMON): Add RS6000_BTM_HTM.
	* config/rs6000/htm.md: New file.
	* config/rs6000/htmintrin.h: New file.
	* config/rs6000/htmxlintrin.h: New file.

2014-04-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Power8 Base Support
	Apply mainline
	2013-11-23  Alan Modra  <amodra@gmail.com>
	* config/rs6000/vsx.md (fusion peepholes): Disable when !TARGET_VSX.

	Backport from mainline
	2013-11-12  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/59054
	* config/rs6000/rs6000.md (movdi_internal32): Eliminate
	constraints that would allow DImode into the traditional Altivec
	registers, but cause undesirable code generation when loading 0 as
	a constant.
	(movdi_internal64): Likewise.
	(cmp<mode>_fpr): Do not use %x for CR register output.
	(extendsfdf2_fpr): Fix constraints when -mallow-upper-df and
	-mallow-upper-sf debug switches are used.

	Backport from mainline
	2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
	fields to the reg_addr array that describes the valid addressing
	mode for any register, general purpose registers, floating point
	registers, and Altivec registers.
	(FIRST_RELOAD_REG_CLASS): Likewise.
	(LAST_RELOAD_REG_CLASS): Likewise.
	(struct reload_reg_map_type): Likewise.
	(reload_reg_map_type): Likewise.
	(RELOAD_REG_VALID): Likewise.
	(RELOAD_REG_MULTIPLE): Likewise.
	(RELOAD_REG_INDEXED): Likewise.
	(RELOAD_REG_OFFSET): Likewise.
	(RELOAD_REG_PRE_INCDEC): Likewise.
	(RELOAD_REG_PRE_MODIFY): Likewise.
	(reg_addr): Likewise.
	(mode_supports_pre_incdec_p): New helper functions to say whether
	a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
	(mode_supports_pre_modify_p): Likewise.
	(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
	print the valid address mode bits for each mode.
	(rs6000_debug_print_mode): Likewise.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_setup_reg_addr_masks): New function to set up the address
	mask bits for each type.
	(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
	Call rs6000_setup_reg_addr_masks to set up the address mask bits.
	(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
	mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
	PRE_MODIFY are supported.
	(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
	registers, instead of {src,dest}_av_p.
	(rs6000_print_options_internal): Tweak the debug output slightly.

	Backport from mainline
	2013-10-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtin.def (XSRDPIM): Use floatdf2,
	ceildf2, btruncdf2, instead of vsx_* name.

	* config/rs6000/vsx.md (vsx_add<mode>3): Change arithmetic
	iterators to only do V2DF and V4SF here.  Move the DF code to
	rs6000.md where it is combined with SF mode.  Replace <VSv> with
	just 'v' since only vector operations are handled with these insns
	after moving the DF support to rs6000.md.
	(vsx_sub<mode>3): Likewise.
	(vsx_mul<mode>3): Likewise.
	(vsx_div<mode>3): Likewise.
	(vsx_fre<mode>2): Likewise.
	(vsx_neg<mode>2): Likewise.
	(vsx_abs<mode>2): Likewise.
	(vsx_nabs<mode>2): Likewise.
	(vsx_smax<mode>3): Likewise.
	(vsx_smin<mode>3): Likewise.
	(vsx_sqrt<mode>2): Likewise.
	(vsx_rsqrte<mode>2): Likewise.
	(vsx_fms<mode>4): Likewise.
	(vsx_nfma<mode>4): Likewise.
	(vsx_copysign<mode>3): Likewise.
	(vsx_btrunc<mode>2): Likewise.
	(vsx_floor<mode>2): Likewise.
	(vsx_ceil<mode>2): Likewise.
	(vsx_smaxsf3): Delete scalar ops that were moved to rs6000.md.
	(vsx_sminsf3): Likewise.
	(vsx_fmadf4): Likewise.
	(vsx_fmsdf4): Likewise.
	(vsx_nfmadf4): Likewise.
	(vsx_nfmsdf4): Likewise.
	(vsx_cmpdf_internal1): Likewise.

	* config/rs6000/rs6000.h (TARGET_SF_SPE): Define macros to make it
	simpler to select whether a target has SPE or traditional floating
	point support in iterators.
	(TARGET_DF_SPE): Likewise.
	(TARGET_SF_FPR): Likewise.
	(TARGET_DF_FPR): Likewise.
	(TARGET_SF_INSN): Macros to say whether floating point support
	exists for a given operation for expanders.
	(TARGET_DF_INSN): Likewise.

	* config/rs6000/rs6000.c (Ftrad): New mode attributes to allow
	combining of SF/DF mode operations, using both traditional and VSX
	registers.
	(Fvsx): Likewise.
	(Ff): Likewise.
	(Fv): Likewise.
	(Fs): Likewise.
	(Ffre): Likewise.
	(FFRE): Likewise.
	(abs<mode>2): Combine SF/DF modes using traditional floating point
	instructions.  Add support for using the upper DF registers with
	VSX support, and SF registers with power8-vector support.  Update
	expanders for operations supported by both the SPE and traditional
	floating point units.
	(abs<mode>2_fpr): Likewise.
	(nabs<mode>2): Likewise.
	(nabs<mode>2_fpr): Likewise.
	(neg<mode>2): Likewise.
	(neg<mode>2_fpr): Likewise.
	(add<mode>3): Likewise.
	(add<mode>3_fpr): Likewise.
	(sub<mode>3): Likewise.
	(sub<mode>3_fpr): Likewise.
	(mul<mode>3): Likewise.
	(mul<mode>3_fpr): Likewise.
	(div<mode>3): Likewise.
	(div<mode>3_fpr): Likewise.
	(sqrt<mode>3): Likewise.
	(sqrt<mode>3_fpr): Likewise.
	(fre<Fs>): Likewise.
	(rsqrt<mode>2): Likewise.
	(cmp<mode>_fpr): Likewise.
	(smax<mode>3): Likewise.
	(smin<mode>3): Likewise.
	(smax<mode>3_vsx): Likewise.
	(smin<mode>3_vsx): Likewise.
	(negsf2): Delete SF operations that are merged with DF.
	(abssf2): Likewise.
	(addsf3): Likewise.
	(subsf3): Likewise.
	(mulsf3): Likewise.
	(divsf3): Likewise.
	(fres): Likewise.
	(fmasf4_fpr): Likewise.
	(fmssf4_fpr): Likewise.
	(nfmasf4_fpr): Likewise.
	(nfmssf4_fpr): Likewise.
	(sqrtsf2): Likewise.
	(rsqrtsf_internal1): Likewise.
	(smaxsf3): Likewise.
	(sminsf3): Likewise.
	(cmpsf_internal1): Likewise.
	(copysign<mode>3_fcpsgn): Add VSX/power8-vector support.
	(negdf2): Delete DF operations that are merged with SF.
	(absdf2): Likewise.
	(nabsdf2): Likewise.
	(adddf3): Likewise.
	(subdf3): Likewise.
	(muldf3): Likewise.
	(divdf3): Likewise.
	(fred): Likewise.
	(rsqrtdf_internal1): Likewise.
	(fmadf4_fpr): Likewise.
	(fmsdf4_fpr): Likewise.
	(nfmadf4_fpr): Likewise.
	(nfmsdf4_fpr): Likewise.
	(sqrtdf2): Likewise.
	(smaxdf3): Likewise.
	(smindf3): Likewise.
	(cmpdf_internal1): Likewise.
	(lrint<mode>di2): Use TARGET_<MODE>_FPR macro.
	(btrunc<mode>2): Delete separate expander, and combine with the
	insn and add VSX instruction support.  Use TARGET_<MODE>_FPR.
	(btrunc<mode>2_fpr): Likewise.
	(ceil<mode>2): Likewise.
	(ceil<mode>2_fpr): Likewise.
	(floor<mode>2): Likewise.
	(floor<mode>2_fpr): Likewise.
	(fma<mode>4_fpr): Combine SF and DF fused multiply/add support.
	Add support for using the upper registers with VSX and
	power8-vector.  Move insns to be closer to the define_expands. On
	VSX systems, prefer the traditional form of FMA over the VSX
	version, since the traditional form allows the target not to
	overlap with the inputs.
	(fms<mode>4_fpr): Likewise.
	(nfma<mode>4_fpr): Likewise.
	(nfms<mode>4_fpr): Likewise.

	Backport from mainline
	2013-09-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow
	DFmode, DImode, and SFmode in the upper VSX registers based on the
	-mupper-regs-{df,sf} flags.  Fix wu constraint to be ALTIVEC_REGS
	if -mpower8-vector.  Combine -mvsx-timode handling with the rest
	of the VSX register handling.

	* config/rs6000/rs6000.md (f32_lv): Use %x0 for VSX regsters.
	(f32_sv): Likewise.
	(zero_extendsidi2_lfiwzx): Add support for loading into the
	Altivec registers with -mpower8-vector.  Use wu/wv constraints to
	only do VSX memory options on Altivec registers.
	(extendsidi2_lfiwax): Likewise.
	(extendsfdf2_fpr): Likewise.
	(mov<mode>_hardfloat, SF/SD modes): Likewise.
	(mov<mode>_hardfloat32, DF/DD modes): Likewise.
	(mov<mode>_hardfloat64, DF/DD modes): Likewise.
	(movdi_internal64): Likewise.

	Backport from mainline
	2013-09-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_vector_reload): Delete, combine
	reload helper function arrays into a single array reg_addr.
	(reload_fpr_gpr): Likewise.
	(reload_gpr_vsx): Likewise.
	(reload_vsx_gpr): Likewise.
	(struct rs6000_reg_addr): Likewise.
	(reg_addr): Likewise.
	(rs6000_debug_reg_global): Change rs6000_vector_reload,
	reload_fpr_gpr, reload_gpr_vsx, reload_vsx_gpr uses to reg_addr.
	(rs6000_init_hard_regno_mode_ok): Likewise.
	(rs6000_secondary_reload_direct_move): Likewise.
	(rs6000_secondary_reload): Likewise.

	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add new
	constraints: wu, ww, and wy.  Repurpose wv constraint added during
	power8 changes.  Put wg constraint in alphabetical order.

	* config/rs6000/rs6000.opt (-mvsx-scalar-float): New debug switch
	for future work to add ISA 2.07 VSX single precision support.
	(-mvsx-scalar-double): Change default from -1 to 1, update
	documentation comment.
	(-mvsx-scalar-memory): Rename debug switch to -mupper-regs-df.
	(-mupper-regs-df): New debug switch to control whether DF values
	can go in the traditional Altivec registers.
	(-mupper-regs-sf): New debug switch to control whether SF values
	can go in the traditional Altivec registers.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print wu, ww,
	and wy constraints.
	(rs6000_init_hard_regno_mode_ok): Use ssize_t instead of int for
	loop variables.  Rename -mvsx-scalar-memory to -mupper-regs-df.
	Add new constraints, wu/ww/wy.  Repurpose wv constraint.
	(rs6000_debug_legitimate_address_p): Print if we are running
	before, during, or after reload.
	(rs6000_secondary_reload): Add a comment.
	(rs6000_opt_masks): Add -mupper-regs-df, -mupper-regs-sf.

	* config/rs6000/constraints.md (wa constraint): Sort w<x>
	constraints.  Update documentation string.
	(wd constraint): Likewise.
	(wf constraint): Likewise.
	(wg constraint): Likewise.
	(wn constraint): Likewise.
	(ws constraint): Likewise.
	(wt constraint): Likewise.
	(wx constraint): Likewise.
	(wz constraint): Likewise.
	(wu constraint): New constraint for ISA 2.07 SFmode scalar
	instructions.
	(ww constraint): Likewise.
	(wy constraint): Likewise.
	(wv constraint): Repurpose ISA 2.07 constraint that did not use in
	the previous submissions.
	* doc/md.texi (PowerPC and IBM RS6000): Likewise.

	Backport from mainline
	2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/58673
	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
	restrict TImode addresses to single indirect registers if both
	-mquad-memory and -mvsx-timode are used.
	(rs6000_output_move_128bit): Use quad_load_store_p to determine if
	we should emit load/store quad.  Remove using %y for quad memory
	addresses.

	* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
	constraints to allow load/store quad on machines where TImode is
	not allowed in VSX registers.  Use 'n' instead of 'F' constraint
	for TImode to load integer constants.

	Backport from mainline
	2013-10-02  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/58587
	* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Turn off
	setting -mvsx-timode by default until the underlying problem is
	fixed.
	(RS6000_CPU, power7 defaults): Likewise.

	Backport from trunk
	2013-08-16  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/58160
	* config/rs6000/predicates.md (fusion_gpr_mem_load): Allow the
	memory rtx to contain ZERO_EXTEND and SIGN_EXTEND.

	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Pass operands
	array instead of each individual operand as a separate argument.
	(emit_fusion_gpr_load): Likewise.
	(expand_fusion_gpr_load): Add new function declaration.

	* config/rs6000/rs6000.c (fusion_gpr_load_p): Change the calling
	signature to have the operands passed as an array, instead of as
	separate arguments.  Allow ZERO_EXTEND to be in the memory
	address, and also SIGN_EXTEND if -mpower8-fusion-sign.  Do not
	depend on the register live/dead flags when peepholes are run.
	(expand_fusion_gpr_load): New function to be called from the
	peephole2 pass, to change the register that addis sets to be the
	target register.
	(emit_fusion_gpr_load): Change the calling signature to have the
	operands passed as an array, instead of as separate arguments.
	Allow ZERO_EXTEND to be in the memory address, and also
	SIGN_EXTEND if -mpower8-fusion-sign.

	* config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): Delete unused
	unspec enumeration.
	(power8 fusion peephole/peephole2): Rework the fusion peepholes to
	adjust the register addis loads up in the peephole2 pass.  Do not
	depend on the register live/dead state when the peephole pass is
	done.

	Backport from trunk
	2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean
	expanders to rs6000.md.
	(ior<mode>3): Likewise.
	(and<mode>3): Likewise.
	(one_cmpl<mode>2): Likewise.
	(nor<mode>3): Likewise.
	(andc<mode>3): Likewise.
	(eqv<mode>3): Likewise.
	(nand<mode>3): Likewise.
	(orc<mode>3): Likewise.

	* config/rs6000/rs6000-protos.h (rs6000_split_logical): New
	declaration.

	* config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support
	to split multi-word logical operations.
	(rs6000_split_logical_di): Likewise.
	(rs6000_split_logical): Likewise.

	* config/rs6000/vsx.md (VSX_L2): Delete, no longer used.
	(vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,
	and allow TImode operations in 32-bit.
	(vsx_and<mode>3_64bit): Likewise.
	(vsx_ior<mode>3_32bit): Likewise.
	(vsx_ior<mode>3_64bit): Likewise.
	(vsx_xor<mode>3_32bit): Likewise.
	(vsx_xor<mode>3_64bit): Likewise.
	(vsx_one_cmpl<mode>2_32bit): Likewise.
	(vsx_one_cmpl<mode>2_64bit): Likewise.
	(vsx_nor<mode>3_32bit): Likewise.
	(vsx_nor<mode>3_64bit): Likewise.
	(vsx_andc<mode>3_32bit): Likewise.
	(vsx_andc<mode>3_64bit): Likewise.
	(vsx_eqv<mode>3_32bit): Likewise.
	(vsx_eqv<mode>3_64bit): Likewise.
	(vsx_nand<mode>3_32bit): Likewise.
	(vsx_nand<mode>3_64bit): Likewise.
	(vsx_orc<mode>3_32bit): Likewise.
	(vsx_orc<mode>3_64bit): Likewise.

	* config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector
	logical types in GPRs.

	* config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit
	logical insns to rs6000.md, and allow TImode operations in
	32-bit.
	(altivec_ior<mode>3): Likewise.
	(altivec_xor<mode>3): Likewise.
	(altivec_one_cmpl<mode>2): Likewise.
	(altivec_nor<mode>3): Likewise.
	(altivec_andc<mode>3): Likewise.

	* config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode
	attributes for moving the 128-bit logical operations into
	rs6000.md.
	(BOOL_REGS_OUTPUT): Likewise.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(BOOL_REGS_AND_CR0): Likewise.
	(one_cmpl<mode>2): Add support for DI logical operations on
	32-bit, splitting the operations to 32-bit.
	(anddi3): Likewise.
	(iordi3): Likewise.
	(xordi3): Likewise.
	(and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator
	changes to combine the 32/64-bit code, allow logical operations on
	TI mode in 32-bit, and to use similar match_operator patterns like
	scalar mode uses.  Combine the Altivec and VSX code for logical
	operations, and move it here.
	(ior<mode>3, 128-bit types): Likewise.
	(xor<mode>3, 128-bit types): Likewise.
	(one_cmpl<mode>3, 128-bit types): Likewise.
	(nor<mode>3, 128-bit types): Likewise.
	(andc<mode>3, 128-bit types): Likewise.
	(eqv<mode>3, 128-bit types): Likewise.
	(nand<mode>3, 128-bit types): Likewise.
	(orc<mode>3, 128-bit types): Likewise.
	(and<mode>3_internal): Likewise.
	(bool<mode>3_internal): Likewise.
	(boolc<mode>3_internal1): Likewise.
	(boolc<mode>3_internal2): Likewise.
	(boolcc<mode>3_internal1): Likewise.
	(boolcc<mode>3_internal2): Likewise.
	(eqv<mode>3_internal1): Likewise.
	(eqv<mode>3_internal2): Likewise.
	(one_cmpl1<mode>3_internal): Likewise.

	Back port from mainline:
	2013-06-06  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* lib/target-supports.exp (check_p8vector_hw_available) Add power8
	support.
	(check_effective_target_powerpc_p8vector_ok): Likewise.
	(is-effective-target): Likewise.
	(check_vect_support_and_set_flags): Likewise.

	Backport from mainline
	2013-07-31  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/predicates.md (fusion_gpr_addis): New predicates
	to support power8 load fusion.
	(fusion_gpr_mem_load): Likewise.

	* config/rs6000/rs6000-modes.def (PTImode): Update a comment.

	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New
	declarations for power8 load fusion.
	(emit_fusion_gpr_load): Likewise.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): If
	tuning for power8, turn on fusion mode by default.  Turn on sign
	extending fusion mode if normal fusion mode is on, and we are at
	-O2 or -O3.
	(fusion_gpr_load_p): New function, return true if we can fuse an
	addis instruction with a dependent load to a GPR.
	(emit_fusion_gpr_load): Emit the instructions for power8 load
	fusion to GPRs.

	* config/rs6000/vsx.md (VSX_M2): New iterator for fusion
	peepholes.
	(VSX load fusion peepholes): New peepholes to fuse together an
	addi instruction with a VSX load instruction.

	* config/rs6000/rs6000.md (GPR load fusion peepholes): New
	peepholes to fuse an addis instruction with a load to a GPR base
	register.  If we are supporting sign extending fusions, convert
	sign extending loads to zero extending loads and add an explicit
	sign extension.

	Backport from mainline
	2013-07-18  Pat Haugen <pthaugen@us.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Adjust flag
	interaction for new Power8 flags and VSX.

	Back port from the trunk
	2013-06-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/57744
	* config/rs6000/rs6000.h (MODES_TIEABLE_P): Do not allow PTImode
	to tie with any other modes.  Eliminate Altivec vector mode tests,
	since these are a subset of ALTIVEC or VSX vector modes.  Simplify
	code, to return 0 if testing MODE2 for a condition, if we've
	already tested MODE1 for the same condition.

	Backport from mainline
	2013-06-28  Pat Haugen <pthaugen@us.ibm.com>

	* config/rs6000/rs6000.md (define_insn ""): Fix insn type.

	Back port from the trunk
	2013-06-26  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* config/rs6000/power8.md: New.
	* config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor
	setting for power8 entry.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md.
	* config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust
	test for Power4/Power5 only.
	(insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8
	support.
	(force_new_group): Adjust comment.
	* config/rs6000/rs6000.md: Include power8.md.

	Back port from the trunk
	2013-06-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/57615
	* config/rs6000/rs6000.md (mov<mode>_ppc64): Call
	rs6000_output_move_128bit to handle emitting quad memory
	operations.  Set attribute length to 8 bytes.

	Back port from the trunk
	2013-06-13  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Move
	test for clearing quad memory on 32-bit later.

	Back port from the trunk

	2013-06-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* config/rs6000/rs6000.c (emit_load_locked): Add support for
	power8 byte, half-word, and quad-word atomic instructions.
	(emit_store_conditional): Likewise.
	(rs6000_expand_atomic_compare_and_swap): Likewise.
	(rs6000_expand_atomic_op): Likewise.

	* config/rs6000/sync.md (larx): Add new modes for power8.
	(stcx): Likewise.
	(AINT): New mode iterator to include TImode as well as normal
	integer modes on power8.
	(fetchop_pred): Use int_reg_operand instead of gpc_reg_operand so
	that VSX registers are not considered.  Use AINT mode iterator
	instead of INT1 to allow inclusion of quad word atomic operations
	on power8.
	(load_locked<mode>): Likewise.
	(store_conditional<mode>): Likewise.
	(atomic_compare_and_swap<mode>): Likewise.
	(atomic_exchange<mode>): Likewise.
	(atomic_nand<mode>): Likewise.
	(atomic_fetch_<fetchop_name><mode>): Likewise.
	(atomic_nand_fetch<mode>): Likewise.
	(mem_thread_fence): Use gen_loadsync_<mode> instead of enumerating
	each type.
	(ATOMIC): On power8, add QImode, HImode modes.
	(load_locked<QHI:mode>_si): Varients of load_locked for QI/HI
	modes that promote to SImode.
	(load_lockedti): Convert TImode arguments to PTImode, so that we
	get a guaranteed even/odd register pair.
	(load_lockedpti): Likewise.
	(store_conditionalti): Likewise.
	(store_conditionalpti): Likewise.

	* config/rs6000/rs6000.md (QHI): New mode iterator for power8
	atomic load/store instructions.
	(HSI): Likewise.

	Back port from the trunk

	2013-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* config/rs6000/vector.md (GPR move splitter): Do not split moves
	of vectors in GPRS if they are direct moves or quad word load or
	store moves.

	* config/rs6000/rs6000-protos.h (rs6000_output_move_128bit): Add
	declaration.
	(direct_move_p): Likewise.
	(quad_load_store_p): Likewise.

	* config/rs6000/rs6000.c (enum rs6000_reg_type): Simplify register
	classes into bins based on the physical register type.
	(reg_class_to_reg_type): Likewise.
	(IS_STD_REG_TYPE): Likewise.
	(IS_FP_VECT_REG_TYPE): Likewise.
	(reload_fpr_gpr): Arrays to determine what insn to use if we can
	use direct move instructions.
	(reload_gpr_vsx): Likewise.
	(reload_vsx_gpr): Likewise.
	(rs6000_init_hard_regno_mode_ok): Precalculate the register type
	information that is a simplification of register classes.  Also
	precalculate direct move reload helpers.
	(direct_move_p): New function to return true if the operation can
	be done as a direct move instruciton.
	(quad_load_store_p): New function to return true if the operation
	is a quad memory operation.
	(rs6000_legitimize_address): If quad memory, only allow register
	indirect for TImode addresses.
	(rs6000_legitimate_address_p): Likewise.
	(enum reload_reg_type): Delete, replace with rs6000_reg_type.
	(rs6000_reload_register_type): Likewise.
	(register_to_reg_type): Return register type.
	(rs6000_secondary_reload_simple_move): New helper function for
	secondary reload and secondary memory needed to identify anything
	that is a simple move, and does not need reloading.
	(rs6000_secondary_reload_direct_move): New helper function for
	secondary reload to identify cases that can be done with several
	instructions via the direct move instructions.
	(rs6000_secondary_reload_move): New helper function for secondary
	reload to identify moves between register types that can be done.
	(rs6000_secondary_reload): Add support for quad memory operations
	and for direct move.
	(rs6000_secondary_memory_needed): Likewise.
	(rs6000_debug_secondary_memory_needed): Change argument names.
	(rs6000_output_move_128bit): New function to return the move to
	use for 128-bit moves, including knowing about the various
	limitations of quad memory operations.

	* config/rs6000/vsx.md (vsx_mov<mode>): Add support for quad
	memory operations.  call rs6000_output_move_128bit for the actual
	instruciton(s) to generate.
	(vsx_movti_64bit): Likewise.

	* config/rs6000/rs6000.md (UNSPEC_P8V_FMRGOW): New unspec values.
	(UNSPEC_P8V_MTVSRWZ): Likewise.
	(UNSPEC_P8V_RELOAD_FROM_GPR): Likewise.
	(UNSPEC_P8V_MTVSRD): Likewise.
	(UNSPEC_P8V_XXPERMDI): Likewise.
	(UNSPEC_P8V_RELOAD_FROM_VSX): Likewise.
	(UNSPEC_FUSION_GPR): Likewise.
	(FMOVE128_GPR): New iterator for direct move.
	(f32_lv): New mode attribute for load/store of SFmode/SDmode
	values.
	(f32_sv): Likewise.
	(f32_dm): Likewise.
	(zero_extend<mode>di2_internal1): Add support for power8 32-bit
	loads and direct move instructions.
	(zero_extendsidi2_lfiwzx): Likewise.
	(extendsidi2_lfiwax): Likewise.
	(extendsidi2_nocell): Likewise.
	(floatsi<mode>2_lfiwax): Likewise.
	(lfiwax): Likewise.
	(floatunssi<mode>2_lfiwzx): Likewise.
	(lfiwzx): Likewise.
	(fix_trunc<mode>_stfiwx): Likewise.
	(fixuns_trunc<mode>_stfiwx): Likewise.
	(mov<mode>_hardfloat, 32-bit floating point): Likewise.
	(mov<move>_hardfloat64, 64-bit floating point): Likewise.
	(parity<mode>2_cmpb): Set length/type attr.
	(unnamed shift right patterns, mov<mode>_internal2): Change type attr
	for 'mr.' to fast_compare.
	(bpermd_<mode>): Change type attr to popcnt.
	(p8_fmrgow_<mode>): New insns for power8 direct move support.
	(p8_mtvsrwz_1): Likewise.
	(p8_mtvsrwz_2): Likewise.
	(reload_fpr_from_gpr<mode>): Likewise.
	(p8_mtvsrd_1): Likewise.
	(p8_mtvsrd_2): Likewise.
	(p8_xxpermdi_<mode>): Likewise.
	(reload_vsx_from_gpr<mode>): Likewise.
	(reload_vsx_from_gprsf): Likewise.
	(p8_mfvsrd_3_<mode>): LIkewise.
	(reload_gpr_from_vsx<mode>): Likewise.
	(reload_gpr_from_vsxsf): Likewise.
	(p8_mfvsrd_4_disf): Likewise.
	(multi-word GPR splits): Do not split direct moves or quad memory
	operations.

	Backport from the trunk

	2013-06-06  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
	Document new power8 builtins.

	* config/rs6000/vector.md (and<mode>3): Add a clobber/scratch of a
	condition code register, to allow 128-bit logical operations to be
	done in the VSX or GPR registers.
	(nor<mode>3): Use the canonical form for nor.
	(eqv<mode>3): Add expanders for power8 xxleqv, xxlnand, xxlorc,
	vclz*, and vpopcnt* vector instructions.
	(nand<mode>3): Likewise.
	(orc<mode>3): Likewise.
	(clz<mode>2): LIkewise.
	(popcount<mode>2): Likewise.

	* config/rs6000/predicates.md (int_reg_operand): Rework tests so
	that only the GPRs are recognized.

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	support for new power8 builtins.

	* config/rs6000/rs6000-builtin.def (xscvspdpn): Add new power8
	builtin functions.
	(xscvdpspn): Likewise.
	(vclz): Likewise.
	(vclzb): Likewise.
	(vclzh): Likewise.
	(vclzw): Likewise.
	(vclzd): Likewise.
	(vpopcnt): Likewise.
	(vpopcntb): Likewise.
	(vpopcnth): Likewise.
	(vpopcntw): Likewise.
	(vpopcntd): Likewise.
	(vgbbd): Likewise.
	(vmrgew): Likewise.
	(vmrgow): Likewise.
	(eqv): Likewise.
	(eqv_v16qi3): Likewise.
	(eqv_v8hi3): Likewise.
	(eqv_v4si3): Likewise.
	(eqv_v2di3): Likewise.
	(eqv_v4sf3): Likewise.
	(eqv_v2df3): Likewise.
	(nand): Likewise.
	(nand_v16qi3): Likewise.
	(nand_v8hi3): Likewise.
	(nand_v4si3): Likewise.
	(nand_v2di3): Likewise.
	(nand_v4sf3): Likewise.
	(nand_v2df3): Likewise.
	(orc): Likewise.
	(orc_v16qi3): Likewise.
	(orc_v8hi3): Likewise.
	(orc_v4si3): Likewise.
	(orc_v2di3): Likewise.
	(orc_v4sf3): Likewise.
	(orc_v2df3): Likewise.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Only
	allow power8 quad mode in 64-bit.
	(rs6000_builtin_vectorized_function): Add support to vectorize
	ISA 2.07 count leading zeros, population count builtins.
	(rs6000_expand_vector_init): On ISA 2.07 use xscvdpspn to form
	V4SF vectors instead of xscvdpsp to avoid IEEE related traps.
	(builtin_function_type): Add vgbbd builtin function which takes an
	unsigned argument.
	(altivec_expand_vec_perm_const): Add support for new power8 merge
	instructions.

	* config/rs6000/vsx.md (VSX_L2): New iterator for 128-bit types,
	that does not include TImdoe for use with 32-bit.
	(UNSPEC_VSX_CVSPDPN): Support for power8 xscvdpspn and xscvspdpn
	instructions.
	(UNSPEC_VSX_CVDPSPN): Likewise.
	(vsx_xscvdpspn): Likewise.
	(vsx_xscvspdpn): Likewise.
	(vsx_xscvdpspn_scalar): Likewise.
	(vsx_xscvspdpn_directmove): Likewise.
	(vsx_and<mode>3): Split logical operations into 32-bit and
	64-bit. Add support to do logical operations on TImode as well as
	VSX vector types.  Allow logical operations to be done in either
	VSX registers or in general purpose registers in 64-bit mode.  Add
	splitters if GPRs were used. For AND, add clobber of CCmode to
	allow use of ANDI on GPRs.  Rewrite nor to use the canonical RTL
	encoding.
	(vsx_and<mode>3_32bit): Likewise.
	(vsx_and<mode>3_64bit): Likewise.
	(vsx_ior<mode>3): Likewise.
	(vsx_ior<mode>3_32bit): Likewise.
	(vsx_ior<mode>3_64bit): Likewise.
	(vsx_xor<mode>3): Likewise.
	(vsx_xor<mode>3_32bit): Likewise.
	(vsx_xor<mode>3_64bit): Likewise.
	(vsx_one_cmpl<mode>2): Likewise.
	(vsx_one_cmpl<mode>2_32bit): Likewise.
	(vsx_one_cmpl<mode>2_64bit): Likewise.
	(vsx_nor<mode>3): Likewise.
	(vsx_nor<mode>3_32bit): Likewise.
	(vsx_nor<mode>3_64bit): Likewise.
	(vsx_andc<mode>3): Likewise.
	(vsx_andc<mode>3_32bit): Likewise.
	(vsx_andc<mode>3_64bit): Likewise.
	(vsx_eqv<mode>3_32bit): Add support for power8 xxleqv, xxlnand,
	and xxlorc instructions.
	(vsx_eqv<mode>3_64bit): Likewise.
	(vsx_nand<mode>3_32bit): Likewise.
	(vsx_nand<mode>3_64bit): Likewise.
	(vsx_orc<mode>3_32bit): Likewise.
	(vsx_orc<mode>3_64bit): Likewise.

	* config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Update comment.

	* config/rs6000/altivec.md (UNSPEC_VGBBD): Add power8 vgbbd
	instruction.
	(p8_vmrgew): Add power8 vmrgew and vmrgow instructions.
	(p8_vmrgow): Likewise.
	(altivec_and<mode>3): Add clobber of CCmode to allow AND using
	GPRs to be split under VSX.
	(p8v_clz<mode>2): Add power8 count leading zero support.
	(p8v_popcount<mode>2): Add power8 population count support.
	(p8v_vgbbd): Add power8 gather bits by bytes by doubleword
	support.

	* config/rs6000/rs6000.md (eqv<mode>3): Add support for powerp eqv
	instruction.

	* config/rs6000/altivec.h (vec_eqv): Add defines to export power8
	builtin functions.
	(vec_nand): Likewise.
	(vec_vclz): Likewise.
	(vec_vclzb): Likewise.
	(vec_vclzd): Likewise.
	(vec_vclzh): Likewise.
	(vec_vclzw): Likewise.
	(vec_vgbbd): Likewise.
	(vec_vmrgew): Likewise.
	(vec_vmrgow): Likewise.
	(vec_vpopcnt): Likewise.
	(vec_vpopcntb): Likewise.
	(vec_vpopcntd): Likewise.
	(vec_vpopcnth): Likewise.
	(vec_vpopcntw): Likewise.

	Backport from trunk

	2013-05-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* config/rs6000/vector.md (VEC_I): Add support for new power8 V2DI
	instructions.
	(VEC_A): Likewise.
	(VEC_C): Likewise.
	(vrotl<mode>3): Likewise.
	(vashl<mode>3): Likewise.
	(vlshr<mode>3): Likewise.
	(vashr<mode>3): Likewise.

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	support for power8 V2DI builtins.

	* config/rs6000/rs6000-builtin.def (abs_v2di): Add support for
	power8 V2DI builtins.
	(vupkhsw): Likewise.
	(vupklsw): Likewise.
	(vaddudm): Likewise.
	(vminsd): Likewise.
	(vmaxsd): Likewise.
	(vminud): Likewise.
	(vmaxud): Likewise.
	(vpkudum): Likewise.
	(vpksdss): Likewise.
	(vpkudus): Likewise.
	(vpksdus): Likewise.
	(vrld): Likewise.
	(vsld): Likewise.
	(vsrd): Likewise.
	(vsrad): Likewise.
	(vsubudm): Likewise.
	(vcmpequd): Likewise.
	(vcmpgtsd): Likewise.
	(vcmpgtud): Likewise.
	(vcmpequd_p): Likewise.
	(vcmpgtsd_p): Likewise.
	(vcmpgtud_p): Likewise.
	(vupkhsw): Likewise.
	(vupklsw): Likewise.
	(vaddudm): Likewise.
	(vmaxsd): Likewise.
	(vmaxud): Likewise.
	(vminsd): Likewise.
	(vminud): Likewise.
	(vpksdss): Likewise.
	(vpksdus): Likewise.
	(vpkudum): Likewise.
	(vpkudus): Likewise.
	(vrld): Likewise.
	(vsld): Likewise.
	(vsrad): Likewise.
	(vsrd): Likewise.
	(vsubudm): Likewise.

	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add
	support for power8 V2DI instructions.

	* config/rs6000/altivec.md (UNSPEC_VPKUHUM): Add support for
	power8 V2DI instructions.  Combine pack and unpack insns to use an
	iterator for each mode.  Check whether a particular mode supports
	Altivec instructions instead of just checking TARGET_ALTIVEC.
	(UNSPEC_VPKUWUM): Likewise.
	(UNSPEC_VPKSHSS): Likewise.
	(UNSPEC_VPKSWSS): Likewise.
	(UNSPEC_VPKUHUS): Likewise.
	(UNSPEC_VPKSHUS): Likewise.
	(UNSPEC_VPKUWUS): Likewise.
	(UNSPEC_VPKSWUS): Likewise.
	(UNSPEC_VPACK_SIGN_SIGN_SAT): Likewise.
	(UNSPEC_VPACK_SIGN_UNS_SAT): Likewise.
	(UNSPEC_VPACK_UNS_UNS_SAT): Likewise.
	(UNSPEC_VPACK_UNS_UNS_MOD): Likewise.
	(UNSPEC_VUPKHSB): Likewise.
	(UNSPEC_VUNPACK_HI_SIGN): Likewise.
	(UNSPEC_VUNPACK_LO_SIGN): Likewise.
	(UNSPEC_VUPKHSH): Likewise.
	(UNSPEC_VUPKLSB): Likewise.
	(UNSPEC_VUPKLSH): Likewise.
	(VI2): Likewise.
	(VI_char): Likewise.
	(VI_scalar): Likewise.
	(VI_unit): Likewise.
	(VP): Likewise.
	(VP_small): Likewise.
	(VP_small_lc): Likewise.
	(VU_char): Likewise.
	(add<mode>3): Likewise.
	(altivec_vaddcuw): Likewise.
	(altivec_vaddu<VI_char>s): Likewise.
	(altivec_vadds<VI_char>s): Likewise.
	(sub<mode>3): Likewise.
	(altivec_vsubcuw): Likewise.
	(altivec_vsubu<VI_char>s): Likewise.
	(altivec_vsubs<VI_char>s): Likewise.
	(altivec_vavgs<VI_char>): Likewise.
	(altivec_vcmpbfp): Likewise.
	(altivec_eq<mode>): Likewise.
	(altivec_gt<mode>): Likewise.
	(altivec_gtu<mode>): Likewise.
	(umax<mode>3): Likewise.
	(smax<mode>3): Likewise.
	(umin<mode>3): Likewise.
	(smin<mode>3): Likewise.
	(altivec_vpkuhum): Likewise.
	(altivec_vpkuwum): Likewise.
	(altivec_vpkshss): Likewise.
	(altivec_vpkswss): Likewise.
	(altivec_vpkuhus): Likewise.
	(altivec_vpkshus): Likewise.
	(altivec_vpkuwus): Likewise.
	(altivec_vpkswus): Likewise.
	(altivec_vpks<VI_char>ss): Likewise.
	(altivec_vpks<VI_char>us): Likewise.
	(altivec_vpku<VI_char>us): Likewise.
	(altivec_vpku<VI_char>um): Likewise.
	(altivec_vrl<VI_char>): Likewise.
	(altivec_vsl<VI_char>): Likewise.
	(altivec_vsr<VI_char>): Likewise.
	(altivec_vsra<VI_char>): Likewise.
	(altivec_vsldoi_<mode>): Likewise.
	(altivec_vupkhsb): Likewise.
	(altivec_vupkhs<VU_char>): Likewise.
	(altivec_vupkls<VU_char>): Likewise.
	(altivec_vupkhsh): Likewise.
	(altivec_vupklsb): Likewise.
	(altivec_vupklsh): Likewise.
	(altivec_vcmpequ<VI_char>_p): Likewise.
	(altivec_vcmpgts<VI_char>_p): Likewise.
	(altivec_vcmpgtu<VI_char>_p): Likewise.
	(abs<mode>2): Likewise.
	(vec_unpacks_hi_v16qi): Likewise.
	(vec_unpacks_hi_v8hi): Likewise.
	(vec_unpacks_lo_v16qi): Likewise.
	(vec_unpacks_hi_<VP_small_lc>): Likewise.
	(vec_unpacks_lo_v8hi): Likewise.
	(vec_unpacks_lo_<VP_small_lc>): Likewise.
	(vec_pack_trunc_v8h): Likewise.
	(vec_pack_trunc_v4si): Likewise.
	(vec_pack_trunc_<mode>): Likewise.

	* config/rs6000/altivec.h (vec_vaddudm): Add defines for power8
	V2DI builtins.
	(vec_vmaxsd): Likewise.
	(vec_vmaxud): Likewise.
	(vec_vminsd): Likewise.
	(vec_vminud): Likewise.
	(vec_vpksdss): Likewise.
	(vec_vpksdus): Likewise.
	(vec_vpkudum): Likewise.
	(vec_vpkudus): Likewise.
	(vec_vrld): Likewise.
	(vec_vsld): Likewise.
	(vec_vsrad): Likewise.
	(vec_vsrd): Likewise.
	(vec_vsubudm): Likewise.
	(vec_vupkhsw): Likewise.
	(vec_vupklsw): Likewise.

	2013-05-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add
	documentation for the power8 crypto builtins.

	* config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md.

	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support
	macros for defining power8 builtin functions.
	(BU_P8V_AV_2): Likewise.
	(BU_P8V_AV_P): Likewise.
	(BU_P8V_VSX_1): Likewise.
	(BU_P8V_OVERLOAD_1): Likewise.
	(BU_P8V_OVERLOAD_2): Likewise.
	(BU_CRYPTO_1): Likewise.
	(BU_CRYPTO_2): Likewise.
	(BU_CRYPTO_3): Likewise.
	(BU_CRYPTO_OVERLOAD_1): Likewise.
	(BU_CRYPTO_OVERLOAD_2): Likewise.
	(XSCVSPDP): Fix typo, point to the correct instruction.
	(VCIPHER): Add power8 crypto builtins.
	(VCIPHERLAST): Likewise.
	(VNCIPHER): Likewise.
	(VNCIPHERLAST): Likewise.
	(VPMSUMB): Likewise.
	(VPMSUMH): Likewise.
	(VPMSUMW): Likewise.
	(VPERMXOR_V2DI): Likewise.
	(VPERMXOR_V4SI: Likewise.
	(VPERMXOR_V8HI: Likewise.
	(VPERMXOR_V16QI: Likewise.
	(VSHASIGMAW): Likewise.
	(VSHASIGMAD): Likewise.
	(VPMSUM): Likewise.
	(VPERMXOR): Likewise.
	(VSHASIGMA): Likewise.

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__CRYPTO__ if the crypto instructions are available.
	(altivec_overloaded_builtins): Add support for overloaded power8
	builtins.

	* config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add
	support for power8 crypto builtins.
	(builtin_function_type): Likewise.
	(altivec_init_builtins): Add support for builtins that take vector
	long long (V2DI) arguments.

	* config/rs6000/crypto.md: New file, define power8 crypto
	instructions.

	2013-05-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
		    Pat Haugen <pthaugen@us.ibm.com>
		    Peter Bergner <bergner@vnet.ibm.com>

	* doc/invoke.texi (Option Summary): Add power8 options.
	(RS/6000 and PowerPC Options): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use
	constraints.md instead of rs6000.h.  Reorder w* constraints.  Add
	wm, wn, wr documentation.

	* gcc/config/rs6000/constraints.md (wm): New constraint for VSX
	registers if direct move instructions are enabled.
	(wn): New constraint for no registers.
	(wq): New constraint for quad word even GPR registers.
	(wr): New constraint if 64-bit instructions are enabled.
	(wv): New constraint if power8 vector instructions are enabled.
	(wQ): New constraint for quad word memory locations.

	* gcc/config/rs6000/predicates.md (const_0_to_15_operand): New
	constraint for 0..15 for crypto instructions.
	(gpc_reg_operand): If VSX allow registers in VSX registers as well
	as GPR and floating point registers.
	(int_reg_operand): New predicate to match only GPR registers.
	(base_reg_operand): New predicate to match base registers.
	(quad_int_reg_operand): New predicate to match even GPR registers
	for quad memory operations.
	(vsx_reg_or_cint_operand): New predicate to allow vector logical
	operations in both GPR and VSX registers.
	(quad_memory_operand): New predicate for quad memory operations.
	(reg_or_indexed_operand): New predicate for direct move support.

	* gcc/config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED):
	Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS.
	(ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8).
	(POWERPC_MASKS): Add power8 options.
	(power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the
	various options.

	* gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
	Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8.

	* gcc/config/rs6000/rs6000.opt (-mvsx-timode): Add documentation.
	(-mpower8-fusion): New power8 options.
	(-mpower8-fusion-sign): Likewise.
	(-mpower8-vector): Likewise.
	(-mcrypto): Likewise.
	(-mdirect-move): Likewise.
	(-mquad-memory): Likewise.

	* gcc/config/rs6000/rs6000.c (power8_cost): Initial definition for
	power8.
	(rs6000_hard_regno_mode_ok): Make PTImode only match even GPR
	registers.
	(rs6000_debug_reg_print): Print the base register class if
	-mdebug=reg.
	(rs6000_debug_vector_unit): Add p8_vector.
	(rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint
	definitions.  Also print fusion state.
	(rs6000_init_hard_regno_mode_ok): Set up power8 constraints.
	(rs6000_builtin_mask_calculate): Add power8 builtin support.
	(rs6000_option_override_internal): Add support for power8.
	(rs6000_common_init_builtins): Add debugging for skipped builtins
	if -mdebug=builtin.
	(rs6000_adjust_cost): Add power8 support.
	(rs6000_issue_rate): Likewise.
	(insn_must_be_first_in_group): Likewise.
	(insn_must_be_last_in_group): Likewise.
	(force_new_group): Likewise.
	(rs6000_register_move_cost): Likewise.
	(rs6000_opt_masks): Likewise.

	* config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a
	power8 capable assembler, default to power7 options.
	(TARGET_DIRECT_MOVE): Likewise.
	(TARGET_CRYPTO): Likewise.
	(TARGET_P8_VECTOR): Likewise.
	(VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support.
	(VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise.
	(TARGET_XSCVDPSPN): Likewise.
	(TARGET_XSCVSPDPN): Likewsie.
	(TARGET_SYNC_HI_QI): Likewise.
	(TARGET_SYNC_TI): Likewise.
	(MASK_CRYPTO): Likewise.
	(MASK_DIRECT_MOVE): Likewise.
	(MASK_P8_FUSION): Likewise.
	(MASK_P8_VECTOR): Likewise.
	(REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the
	TFmode temporary used by some of the direct move instructions to
	get two FP temporary registers does not force creation of a stack
	frame.
	(VLOGICAL_REGNO_P): Allow vector logical operations in GPRs.
	(MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so
	that any VSX registers are tieable, even if they are also an
	Altivec vector mode.
	(r6000_reg_class_enum): Add wm, wr, wv constraints.
	(RS6000_BTM_P8_VECTOR): Power8 builtin support.
	(RS6000_BTM_CRYPTO): Likewise.
	(RS6000_BTM_COMMON): Likewise.

	* config/rs6000/rs6000.md (cpu attribute): Add power8.
	* config/rs6000/rs6000-opts.h (PROCESSOR_POWER8): Likewise.
	(enum rs6000_vector): Add power8 vector support.


	Backport from mainline
	2013-03-20  Pat Haugen <pthaugen@us.ibm.com>

	* config/rs6000/predicates.md (indexed_address, update_address_mem
	update_indexed_address_mem): New predicates.
	* config/rs6000/vsx.md (vsx_extract_<mode>_zero): Set correct "type"
	attribute for load/store instructions.
	* config/rs6000/dfp.md (movsd_store): Likewise.
	(movsd_load): Likewise.
	* config/rs6000/rs6000.md (zero_extend<mode>di2_internal1): Likewise.
	(unnamed HI->DI extend define_insn): Likewise.
	(unnamed SI->DI extend define_insn): Likewise.
	(unnamed QI->SI extend define_insn): Likewise.
	(unnamed QI->HI extend define_insn): Likewise.
	(unnamed HI->SI extend define_insn): Likewise.
	(unnamed HI->SI extend define_insn): Likewise.
	(extendsfdf2_fpr): Likewise.
	(movsi_internal1): Likewise.
	(movsi_internal1_single): Likewise.
	(movhi_internal): Likewise.
	(movqi_internal): Likewise.
	(movcc_internal1): Correct mnemonic for stw insn. Set correct "type"
	attribute for load/store instructions.
	(mov<mode>_hardfloat): Set correct "type" attribute for load/store
	instructions.
	(mov<mode>_softfloat): Likewise.
	(mov<mode>_hardfloat32): Likewise.
	(mov<mode>_hardfloat64): Likewise.
	(mov<mode>_softfloat64): Likewise.
	(movdi_internal32): Likewise.
	(movdi_internal64): Likewise.
	(probe_stack_<mode>): Likewise.

	Backport from mainline
	2013-03-20  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_R): Add 32-bit integer, binary
	floating point, and decimal floating point to reload iterator.

	* config/rs6000/constraints.md (wl constraint): New constraints to
	return FLOAT_REGS if certain options are used to reduce the number
	of separate patterns that exist in the file.
	(wx constraint): Likewise.
	(wz constraint): Likewise.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): If
	-mdebug=reg, print wg, wl, wx, and wz constraints.
	(rs6000_init_hard_regno_mode_ok): Initialize new constraints.
	Initialize the reload functions for 64-bit binary/decimal floating
	point types.
	(reg_offset_addressing_ok_p): If we are on a power7 or later, use
	LFIWZX and STFIWX to load/store 32-bit decimal types, and don't
	create the buffer on the stack to overcome not having a 32-bit
	load and store.
	(rs6000_emit_move): Likewise.
	(rs6000_secondary_memory_needed_rtx): Likewise.
	(rs6000_alloc_sdmode_stack_slot): Likewise.
	(rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f
	via xxlxor, just like DFmode 0.0.

	* config/rs6000/rs6000.h (TARGET_NO_SDMODE_STACK): New macro)
	(define as 1 if we are running on a power7 or newer.
	(enum r6000_reg_class_enum): Add new constraints.

	* config/rs6000/dfp.md (movsd): Delete, combine with binary
	floating point moves in rs6000.md.  Combine power6x (mfpgpr) moves
	with other moves by using conditional constraits (wg).  Use LFIWZX
	and STFIWX for loading SDmode on power7.  Use xxlxor to create
	0.0f.
	(movsd splitter): Likewise.
	(movsd_hardfloat): Likewise.
	(movsd_softfloat): Likewise.

	* config/rs6000/rs6000.md (FMOVE32): New iterators to combine
	binary and decimal floating point moves.
	(fmove_ok): New attributes to combine binary and decimal floating
	point moves, and to combine power6x (mfpgpr) moves along normal
	floating moves.
	(real_value_to_target): Likewise.
	(f32_lr): Likewise.
	(f32_lm): Likewise.
	(f32_li): Likewise.
	(f32_sr): Likewise.
	(f32_sm): Likewise.
	(f32_si): Likewise.
	(movsf): Combine binary and decimal floating point moves.  Combine
	power6x (mfpgpr) moves with other moves by using conditional
	constraits (wg).  Use LFIWZX and STFIWX for loading SDmode on
	power7.
	(mov<mode> for SFmode/SDmode); Likewise.
	(SFmode/SDmode splitters): Likewise.
	(movsf_hardfloat): Likewise.
	(mov<mode>_hardfloat for SFmode/SDmode): Likewise.
	(movsf_softfloat): Likewise.
	(mov<mode>_softfloat for SFmode/SDmode): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000 constraints): Document wl)
	(wx and wz constraints.

	* config/rs6000/constraints.md (wg constraint): New constraint to
	return FLOAT_REGS if -mmfpgpr (power6x) was used.

	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wg
	constraint.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): If
	-mdebug=reg, print wg, wl, wx, and wz constraints.
	(rs6000_init_hard_regno_mode_ok): Initialize new constraints.
	Initialize the reload functions for 64-bit binary/decimal floating
	point types.
	(reg_offset_addressing_ok_p): If we are on a power7 or later, use
	LFIWZX and STFIWX to load/store 32-bit decimal types, and don't
	create the buffer on the stack to overcome not having a 32-bit
	load and store.
	(rs6000_emit_move): Likewise.
	(rs6000_secondary_memory_needed_rtx): Likewise.
	(rs6000_alloc_sdmode_stack_slot): Likewise.
	(rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f
	via xxlxor, just like DFmode 0.0.


	* config/rs6000/dfp.md (movdd): Delete, combine with binary
	floating point moves in rs6000.md.  Combine power6x (mfpgpr) moves
	with other moves by using conditional constraits (wg).  Use LFIWZX
	and STFIWX for loading SDmode on power7.
	(movdd splitters): Likewise.
	(movdd_hardfloat32): Likewise.
	(movdd_softfloat32): Likewise.
	(movdd_hardfloat64_mfpgpr): Likewise.
	(movdd_hardfloat64): Likewise.
	(movdd_softfloat64): Likewise.

	* config/rs6000/rs6000.md (FMOVE64): New iterators to combine
	64-bit binary and decimal floating point moves.
	(FMOVE64X): Likewise.
	(movdf): Combine 64-bit binary and decimal floating point moves.
	Combine power6x (mfpgpr) moves with other moves by using
	conditional constraits (wg).
	(mov<mode> for DFmode/DDmode): Likewise.
	(DFmode/DDmode splitters): Likewise.
	(movdf_hardfloat32): Likewise.
	(mov<mode>_hardfloat32 for DFmode/DDmode): Likewise.
	(movdf_softfloat32): Likewise.
	(movdf_hardfloat64_mfpgpr): Likewise.
	(movdf_hardfloat64): Likewise.
	(mov<mode>_hardfloat64 for DFmode/DDmode): Likewise.
	(movdf_softfloat64): Likewise.
	(mov<mode>_softfloat64 for DFmode/DDmode): Likewise.
	(reload_<mode>_load): Move to later in the file so they aren't in
	the middle of the floating point move insns.
	(reload_<mode>_store): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000 constraints): Document wg
	constraint.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print out wg
	constraint if -mdebug=reg.
	(rs6000_initi_hard_regno_mode_ok): Enable wg constraint if
	-mfpgpr.  Enable using dd reload support if needed.

	* config/rs6000/dfp.md (movtd): Delete, combine with 128-bit
	binary and decimal floating point moves in rs6000.md.
	(movtd_internal): Likewise.

	* config/rs6000/rs6000.md (FMOVE128): Combine 128-bit binary and
	decimal floating point moves.
	(movtf): Likewise.
	(movtf_internal): Likewise.
	(mov<mode>_internal, TDmode/TFmode): Likewise.
	(movtf_softfloat): Likewise.
	(mov<mode>_softfloat, TDmode/TFmode): Likewise.

	* config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with
	movdi_internal64, using wg constraint for move direct operations.
	(movdi_internal64): Likewise.

	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print
	MODES_TIEABLE_P for selected modes.  Print the numerical value of
	the various virtual registers. Use GPR/FPR first/last values)
	(instead of hard coding the register numbers.  Print which modes
	have reload functions registered.
	(rs6000_option_override_internal): If -mdebug=reg, trace the
	options settings before/after setting cpu, target and subtarget
	settings.
	(rs6000_secondary_reload_trace): Improve the RTL dump for
	-mdebug=addr and for secondary reload failures in
	rs6000_secondary_reload_inner.
	(rs6000_secondary_reload_fail): Likewise.
	(rs6000_secondary_reload_inner): Likewise.

	* config/rs6000/rs6000.md (FIRST_GPR_REGNO): Add convenience
	macros for first/last GPR and FPR registers.
	(LAST_GPR_REGNO): Likewise.
	(FIRST_FPR_REGNO): Likewise.
	(LAST_FPR_REGNO): Likewise.

	* config/rs6000/vector.md (mul<mode>3): Use the combined macro
	VECTOR_UNIT_ALTIVEC_OR_VSX_P instead of separate calls to
	VECTOR_UNIT_ALTIVEC_P and VECTOR_UNIT_VSX_P.
	(vcond<mode><mode>): Likewise.
	(vcondu<mode><mode>): Likewise.
	(vector_gtu<mode>): Likewise.
	(vector_gte<mode>): Likewise.
	(xor<mode>3): Don't allow logical operations on TImode in 32-bit
	to prevent the compiler from converting DImode operations to
	TImode.
	(ior<mode>3): Likewise.
	(and<mode>3): Likewise.
	(one_cmpl<mode>2): Likewise.
	(nor<mode>3): Likewise.
	(andc<mode>3): Likewise.

	* config/rs6000/constraints.md (wt constraint): New constraint
	that returns VSX_REGS if TImode is allowed in VSX registers.

	* config/rs6000/predicates.md (easy_fp_constant): 0.0f is an easy
	constant under VSX.

	* config/rs6000/rs6000-modes.def (PTImode): Define, PTImode is
	similar to TImode, but it is restricted to being in the GPRs.

	* config/rs6000/rs6000.opt (-mvsx-timode): New switch to allow
	TImode to occupy a single VSX register.

	* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Default to
	-mvsx-timode for power7/power8.
	(power7 cpu): Likewise.
	(power8 cpu): Likewise.

	* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Make
	sure that TFmode/TDmode take up two registers if they are ever
	allowed in the upper VSX registers.
	(rs6000_hard_regno_mode_ok): If -mvsx-timode, allow TImode in VSX
	registers.
	(rs6000_init_hard_regno_mode_ok): Likewise.
	(rs6000_debug_reg_global): Add debugging for PTImode and wt
	constraint.  Print if LRA is turned on.
	(rs6000_option_override_internal): Give an error if -mvsx-timode
	and VSX is not enabled.
	(invalid_e500_subreg): Handle PTImode, restricting it to GPRs.  If
	-mvsx-timode, restrict TImode to reg+reg addressing, and PTImode
	to reg+offset addressing.  Use PTImode when checking offset
	addresses for validity.
	(reg_offset_addressing_ok_p): Likewise.
	(rs6000_legitimate_offset_address_p): Likewise.
	(rs6000_legitimize_address): Likewise.
	(rs6000_legitimize_reload_address): Likewise.
	(rs6000_legitimate_address_p): Likewise.
	(rs6000_eliminate_indexed_memrefs): Likewise.
	(rs6000_emit_move): Likewise.
	(rs6000_secondary_reload): Likewise.
	(rs6000_secondary_reload_inner): Handle PTImode.  Allow 64-bit
	reloads to fpr registers to continue to use reg+offset addressing)
	(but 64-bit reloads to altivec registers need reg+reg addressing.
	Drop test for PRE_MODIFY, since VSX loads/stores no longer support
	it.  Treat LO_SUM like a PLUS operation.
	(rs6000_secondary_reload_class): If type is 64-bit, prefer to use
	FLOAT_REGS instead of VSX_RGS to allow use of reg+offset
	addressing.
	(rs6000_cannot_change_mode_class): Do not allow TImode in VSX
	registers to share a register with a smaller sized type, since VSX
	puts scalars in the upper 64-bits.
	(print_operand): Add support for PTImode.
	(rs6000_register_move_cost): Use VECTOR_MEM_VSX_P instead of
	VECTOR_UNIT_VSX_P to catch types that can be loaded in VSX
	registers, but don't have arithmetic support.
	(rs6000_memory_move_cost): Add test for VSX.
	(rs6000_opt_masks): Add -mvsx-timode.

	* config/rs6000/vsx.md (VSm): Change to use 64-bit aligned moves
	for TImode.
	(VSs): Likewise.
	(VSr): Use wt constraint for TImode.
	(VSv): Drop TImode support.
	(vsx_movti): Delete, replace with versions for 32-bit and 64-bit.
	(vsx_movti_64bit): Likewise.
	(vsx_movti_32bit): Likewise.
	(vec_store_<mode>): Use VSX iterator instead of vector iterator.
	(vsx_and<mode>3): Delete use of '?' constraint on inputs, just put
	one '?' on the appropriate output constraint.  Do not allow TImode
	logical operations on 32-bit systems.
	(vsx_ior<mode>3): Likewise.
	(vsx_xor<mode>3): Likewise.
	(vsx_one_cmpl<mode>2): Likewise.
	(vsx_nor<mode>3): Likewise.
	(vsx_andc<mode>3): Likewise.
	(vsx_concat_<mode>): Likewise.
	(vsx_xxpermdi_<mode>): Fix thinko for non V2DF/V2DI modes.

	* config/rs6000/rs6000.h (MASK_VSX_TIMODE): Map from
	OPTION_MASK_VSX_TIMODE.
	(enum rs6000_reg_class_enum): Add RS6000_CONSTRAINT_wt.
	(STACK_SAVEAREA_MODE): Use PTImode instead of TImode.

	* config/rs6000/rs6000.md (INT mode attribute): Add PTImode.
	(TI2 iterator): New iterator for TImode, PTImode.
	(wd mode attribute): Add values for vector types.
	(movti_string): Replace TI move operations with operations for
	TImode and PTImode.  Add support for TImode being allowed in VSX
	registers.
	(mov<mode>_string, TImode/PTImode): Likewise.
	(movti_ppc64): Likewise.
	(mov<mode>_ppc64, TImode/PTImode): Likewise.
	(TI mode splitters): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000 constraints): Document wt
	constraint.

2014-04-04  Richard Biener  <rguenther@suse.de>

	* tree-ssanames.c (make_ssa_name_fn): Fix assert.

2014-04-02  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_expand_insv): Use GET_MODE_BITSIZE.

2014-04-01  Richard Biener  <rguenther@suse.de>

	* gimple.h (struct gimple_statement_base): Align subcode to
	16 bits.

2014-04-01  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* doc/invoke.texi (mapp-regs): Clarify.

2014-03-31  H.J. Lu  <hongjiu.lu@intel.com>

	PR rtl-optimization/60700
	Backport from mainline
	2013-07-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	PR rtl-optimization/57637
	* function.c (move_insn_for_shrink_wrap): Also check the
	GEN set of the LIVE problem for the liveness analysis
	if it exists, otherwise give up.

2014-03-30  Kaz Kojima  <kkojima@gcc.gnu.org>

	Backport from mainline
	2014-03-19  Kaz Kojima  <kkojima@gcc.gnu.org>

	PR target/60039
	* config/sh/sh.md (udivsi3_i1): Clobber R1 register.

2014-03-26  Martin Jambor  <mjambor@suse.cz>

	PR ipa/60419
	* ipa.c (symtab_remove_unreachable_nodes): Clear thunk and
	alias flags of nodes in the border.

2014-03-26  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/60452
	* rtlanal.c (rtx_addr_can_trap_p_1): Fix head comment.
	<case REG>: Return 1 for invalid offsets from the frame pointer.

2014-03-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60429
	* tree-ssa-structalias.c (get_constraint_for_ptr_offset): Remove
	duplicated line.

2014-03-23  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/60601
	* bb-reorder.c (fix_up_fall_thru_edges): Test EDGE_FALLTHRU everywhere.

	* gcc.c (eval_spec_function): Initialize save_growing_value.

2014-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/60568
	* config/i386/i386.c (x86_output_mi_thunk): Surround UNSPEC_GOT
	into CONST, put pic register as first operand of PLUS.  Use
	gen_const_mem for both 32-bit and 64-bit PIC got loads.

2014-03-20  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc.c (sparc_do_work_around_errata): Implement work
	around for store forwarding issue in the FPU on the UT699.
	* config/sparc/sparc.md (in_branch_delay): Return false for single FP
	loads and operations if -mfix-ut699 is specified.
	(divtf3_hq): Tweak attribute.
	(sqrttf2_hq): Likewise.

2014-03-18  Kai Tietz  <ktietz@redhat.com>

	PR rtl-optimization/56356
	* sdbout.c (sdbout_parms): Verify that parms'
	incoming argument is valid.
	(sdbout_reg_parms): Likewise.

2014-03-18  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc.c (sparc_do_work_around_errata): Speed up and use
	proper constant for the store mode.

2014-03-17  Mikael Pettersson  <mikpelinux@gmail.com>
	    Committed by Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline:

	2013-06-20  Joern Rennecke <joern.rennecke@embecosm.com>

	PR rtl-optimization/57425
	PR rtl-optimization/57569
	* alias.c (write_dependence_p): Remove parameters mem_mode and
	canon_mem_addr.  Add parameters x_mode, x_addr and x_canonicalized.
	Changed all callers.
	(canon_anti_dependence): Get comments and semantics in sync.
	Add parameter mem_canonicalized.  Changed all callers.
	* rtl.h (canon_anti_dependence): Update prototype.

	2013-06-16  Joern Rennecke <joern.rennecke@embecosm.com>

	PR rtl-optimization/57425
	PR rtl-optimization/57569
	* alias.c (write_dependence_p): Add new parameters mem_mode,
	canon_mem_addr and mem_canonicalized.  Change type of writep to bool.
	Changed all callers.
	(canon_anti_dependence): New function.
	* cse.c (check_dependence): Use canon_anti_dependence.
	* cselib.c (cselib_invalidate_mem): Likewise.
	* rtl.h (canon_anti_dependence): Declare.

2014-03-17  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-03-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60429
	PR tree-optimization/60485
	* tree-ssa-structalias.c (set_union_with_increment): Properly
	take into account all fields that overlap the shifted vars.
	(do_sd_constraint): Likewise.
	(do_ds_constraint): Likewise.
	(get_constraint_for_ptr_offset): Likewise.

2014-03-15  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc-protos.h (tls_call_delay): Delete.
	(eligible_for_call_delay): New prototype.
	* config/sparc/sparc.c (tls_call_delay): Rename into...
	(eligible_for_call_delay): ...this.  Return false if the instruction
	cannot be put in the delay slot of a branch.
	(eligible_for_restore_insn): Simplify.
	(eligible_for_return_delay): Return false if the instruction cannot be
	put in the delay slot of a branch and simplify.
	(eligible_for_sibcall_delay): Return false if the instruction cannot be
	put in the delay slot of a branch.
	* config/sparc/sparc.md (fix_ut699): New attribute.
	(tls_call_delay): Delete.
	(in_call_delay): Reimplement.
	(eligible_for_sibcall_delay): Rename into...
	(in_sibcall_delay): ...this.
	(eligible_for_return_delay): Rename into...
	(in_return_delay): ...this.
	(in_branch_delay): Reimplement.
	(in_uncond_branch_delay): Delete.
	(in_annul_branch_delay): Delete.

2014-03-14  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2014-03-14 trunk r208562.

	PR target/59396
	* config/avr/avr.c (avr_set_current_function): Pass function name
	through default_strip_name_encoding before sanity checking instead
	of skipping the first char of the assembler name.

2014-03-13  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2014-03-13 trunk r208532.
	
	PR target/60486
	* config/avr/avr.c (avr_out_plus): Swap cc_plus and cc_minus in
	calls of avr_out_plus_1.

2014-03-13  Joey Ye  <joey.ye@arm.com>

	Backport from mainline
	2014-03-12  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	PR tree-optimization/60454
	* tree-ssa-math-opts.c (find_bswap_1): Fix bswap detection.

2014-03-06  Matthias Klose  <doko@ubuntu.com>

	* Makefile.in (s-mlib): Only pass MULTIARCH_DIRNAME if
	MULTILIB_OSDIRNAMES is not defined.

2014-03-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/60276
	* tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Avoid
	a -Wsign-compare warning.

	* Makefile.in (tree-ssa-uninit.o): Depend on $(PARAMS_H).

	Backport from mainline
	2014-02-21  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56490
	* params.def (PARAM_UNINIT_CONTROL_DEP_ATTEMPTS): New param.
	* tree-ssa-uninit.c: Include params.h.
	(compute_control_dep_chain): Add num_calls argument, return false
	if it exceed PARAM_UNINIT_CONTROL_DEP_ATTEMPTS param, pass
	num_calls to recursive call.
	(find_predicates): Change dep_chain into normal array, add num_calls
	variable and adjust compute_control_dep_chain caller.
	(find_def_preds): Likewise.

	2014-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/43546
	* expr.c (compress_float_constant): If x is a hard register,
	extend into a pseudo and then move to x.

	2014-02-11  Richard Henderson  <rth@redhat.com>
		    Jakub Jelinek  <jakub@redhat.com>

	PR debug/59776
	* tree-sra.c (load_assign_lhs_subreplacements): Add VIEW_CONVERT_EXPR
	around drhs if type conversion to lacc->type is not useless.

	2014-02-08  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/60026
	* ipa-cp.c (determine_versionability): Fail at -O0
	or __attribute__((optimize (0))) or -fno-ipa-cp functions.
	* tree-sra.c (ipa_sra_preliminary_function_checks): Similarly.

	2014-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR target/60062
	* tree.h (opts_for_fn): New inline function.
	(opt_for_fn): Define.
	* config/i386/i386.c (ix86_function_regparm): Use
	opt_for_fn (decl, optimize) instead of optimize.

	2014-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/57499
	* tree-eh.c (cleanup_empty_eh): Bail out on totally empty
	bb with no successors.

2014-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60382
	* tree-vect-loop.c (vect_is_simple_reduction_1): Do not consider
	dead PHIs a reduction.

2014-02-25  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-02-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60276
	* tree-vectorizer.h (struct _stmt_vec_info): Add min_neg_dist field.
	(STMT_VINFO_MIN_NEG_DIST): New macro.
	* tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Record
	STMT_VINFO_MIN_NEG_DIST.
	* tree-vect-stmts.c (vectorizable_load): Verify if assumptions
	made for negative dependence distances still hold.

2014-02-25  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-02-21  Richard Biener  <rguenther@suse.de>

	PR middle-end/60291
	* tree-ssa-live.c (mark_all_vars_used_1): Do not walk
	DECL_INITIAL for globals not in the current function context.

	2014-02-20  Richard Biener  <rguenther@suse.de>

	PR middle-end/60221
	* tree-eh.c (execute_cleanup_eh_1): Also cleanup empty EH
	regions at -O0.

	2014-02-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60183
	* tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating
	loads.
	(tree_ssa_phiprop): Calculate and free post-dominators.

2014-02-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/55426
	* config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Allow 128 to 64-bit
	conversions.

2014-02-24  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.c (pa_output_move_double): Don't valididate when
	adjusting offsetable addresses.

2014-02-23  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.md: Correct ashrsi_reg / lshrsi_reg names

2014-02-23  Edgar E. Iglesias <edgar.iglesias@xilinx.com>

	* config/microblaze/microblaze.h: Remove SECONDARY_MEMORY_NEEDED
	definition.

2014-02-23  David Holsgrove <david.holsgrove@xilinx.com>

	* /config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk
	and define TARGET_ASM_OUTPUT_MI_THUNK and
	TARGET_ASM_CAN_OUTPUT_MI_THUNK.

2014-02-23  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/predicates.md: Add cmp_op predicate.
	* config/microblaze/microblaze.md: Add branch_compare instruction 
	which uses cmp_op predicate and emits cmp insn before branch.
	* config/microblaze/microblaze.c (microblaze_emit_compare): Rename 
	to microblaze_expand_conditional_branch and consolidate logic.
	(microblaze_expand_conditional_branch): emit branch_compare
	insn instead of handling cmp op separate from branch insn.

2014-02-21  Martin Jambor  <mjambor@suse.cz>

	PR ipa/55260
	* ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Uce correct
	info when checking whether lattices are bottom.

2014-02-21  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode
	mode for mask of V8SFmode permutation.

2014-02-20  Richard Henderson  <rth@redhat.com>

	PR c++/60272
	* builtins.c (expand_builtin_atomic_compare_exchange): Conditionalize
	on failure the store back into EXPECT.  Always make a new pseudo for
	OLDVAL.

2014-02-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/57896
	* config/i386/i386.c (expand_vec_perm_interleave2): Don't call
	gen_reg_rtx if d->testing_p.
	(expand_vec_perm_pshufb2, expand_vec_perm_even_odd_1,
	expand_vec_perm_broadcast_1): Return early if d->testing_p and
	we will certainly return true.

2014-02-20  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (replace_uses_by): Mark altered BBs before
	doing the substitution.

2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/60207
	* config/i386/i386.c (construct_container): Remove TFmode check
	for X86_64_INTEGER_CLASS.

2014-02-19  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-02-19  Uros Bizjak  <ubizjak@gmail.com>

	PR target/59794
	* config/i386/i386.c (type_natural_mode): Warn for ABI changes
	only when -Wpsabi is enabled.

2014-02-19  Terry Guo  <terry.guo@arm.com>

	Backport from mainline
	2014-02-08  Terry Guo  <terry.guo@arm.com>

	* doc/invoke.texi: Document ARM -march=armv7e-m.

2014-02-18  Kai Tietz  <ktietz@redhat.com>

	Backport from mainline
	2014-02-18  Kai Tietz  <ktietz@redhat.com>

	PR target/60193
	* config/i386/i386.c (ix86_expand_prologue): Use
	rax register as displacement for restoring %r10, %rax.
	Additional fix wrong offset for restoring both-registers.

2014-02-18  Eric Botcazou  <ebotcazou@adacore.com>

	* ipa-prop.c (compute_complex_ancestor_jump_func): Replace overzealous
	assertion with conditional return.

2014-02-18  Jakub Jelinek  <jakub@redhat.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR driver/60233
	* config/i386/driver-i386.c (host_detect_local_cpu): If
	YMM state is not saved by the OS, also clear has_f16c.  Move
	CPUID 0x80000001 handling before YMM state saving checking.

2014-02-14  Roland McGrath  <mcgrathr@google.com>

	* configure.ac (HAVE_AS_IX86_UD2): New test for 'ud2' mnemonic.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/i386/i386.md (trap) [HAVE_AS_IX86_UD2]: Use the mnemonic
	instead of ASM_SHORT.

2014-02-13  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-02-13  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (xop_vmfrcz<mode>2): Generate const0 in
	operands[2], not operands[3].

2014-02-13  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* config/s390/s390.c (s390_asm_output_function_label): Fix crash
	caused by bad second argument to warning_at() with -mhotpatch and
	nested functions (e.g. with gfortran).

2014-02-12  H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2014-02-12  H.J. Lu  <hongjiu.lu@intel.com>
		    Uros Bizjak  <ubizjak@gmail.com>

	PR target/60151
	* configure.ac (HAVE_AS_GOTOFF_IN_DATA): Pass --32 to GNU assembler.

2014-02-12  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/60116
	* combine.c (try_combine): Also remove dangling REG_DEAD notes on the
	other_insn once the combination has been validated.

2014-02-10  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

	* config/microblaze/microblaze.md: Add movsi4_rev insn pattern.
	* config/microblaze/predicates.md: Add reg_or_mem_operand predicate.

2014-02-10  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

	* config/microblaze/microblaze.c: Extend mcpu version format

2014-02-10  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.h: Define SIZE_TYPE and PTRDIFF_TYPE.

2014-02-10  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2014-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59903
	* tree-vect-loop.c (vect_transform_loop): Guard multiple-types
	check properly.

	2014-02-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60115
	* tree-eh.c (tree_could_trap_p): Unify TARGET_MEM_REF and
	MEM_REF handling.  Properly verify that the accesses are not
	out of the objects bound.

2014-02-05  James Greenhalgh  <james.greenhalgh@arm.com>

	Backport from mainline.
	2014-02-05  James Greenhalgh  <james.greenhalgh@arm.com>

	PR target/59718
	* doc/invoke.texi (-march): Clarify documentation for ARM.
	(-mtune): Likewise.
	(-mcpu): Likewise.

2014-02-04  John David Anglin  <danglin@gcc.gnu.org>

	PR target/59777
	* config/pa/pa.c (legitimize_tls_address): Return original address
	if not passed a SYMBOL_REF rtx.
	(hppa_legitimize_address): Call legitimize_tls_address for all TLS
	addresses.
	(pa_emit_move_sequence): Simplify TLS source operands.
	(pa_legitimate_constant_p): Reject all TLS constants.
	* config/pa/pa.h (PA_SYMBOL_REF_TLS_P): Correct comment.
	(CONSTANT_ADDRESS_P): Reject TLS CONST addresses.

2014-02-04  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-02-02  Uros Bizjak  <ubizjak@gmail.com>

	PR target/60017
	* config/i386/i386.c (classify_argument): Fix handling of bit_offset
	when calculating size of integer atomic types.

2014-02-02  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-01-30  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/f16cintrin.h (_cvtsh_ss): Avoid -Wnarrowing warning.

2014-01-31  Richard Henderson  <rth@redhat.com>

	PR middle-end/60004
	* tree-eh.c (lower_try_finally_switch): Delay lowering finally block
	until after else_eh is processed.

2014-01-30  David Holsgrove <david.holsgrove@xilinx.com>

	Backport from mainline
	* config/microblaze/microblaze.md(cstoresf4, cbranchsf4): Replace
	comparison_operator with ordered_comparison_operator.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/sync.md (atomic_fetch_sub): Fix negation and
	avoid clobbering a live register.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins):
	Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}.
	* config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins):
	Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier
	insns before bundling.
	* config/tilegx/tilegx.md (tile_network_barrier): Update comment.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (tilegx_expand_builtin): Set
	PREFETCH_SCHEDULE_BARRIER_P to true for prefetches.
	* config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilepro/tilepro.md (ctzdi2): Use register_operand
	predicate.
	(clzdi2): Ditto.
	(ffsdi2): Ditto.

2014-01-25  Walter Lee  <walt@tilera.com>

	Backport from mainline
	2014-01-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (tilegx_expand_to_rtl_hook): New.
	(TARGET_EXPAND_TO_RTL_HOOK): Define.

2014-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2014-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59929
	* config/i386/i386.md (pushsf splitter): Get stack adjustment
	from push operand if code of push isn't PRE_DEC.

2014-01-23  David Holsgrove <david.holsgrove@xilinx.com>

	Backport from mainline.
	* config/microblaze/microblaze.md: Add trap insn and attribute

2014-01-23  Marek Polacek  <polacek@redhat.com>

	Backport from mainline
	2013-10-21  Marek Polacek  <polacek@redhat.com>

	PR middle-end/58809
	* fold-const.c (fold_range_test): Return 0 if the type is not
	an integral type.

2014-01-22  David Holsgrove <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.md: Correct bswaphi2 insn.

2014-01-22  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-01-20  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_avoid_lea_for_addr): Return false
	for SImode_address_operand operands, having only a REG argument.

	2014-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/59880
	* config/i386/i386.c (ix86_avoid_lea_for_addr): Return false
	if operands[1] is a REG or ZERO_EXTEND of a REG.

	2014-01-18  Uros Bizjak  <ubizjak@gmail.com>
		    H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59379
	* config/i386/i386.md (*lea<mode>): Zero-extend return register
	to DImode for zero-extended addresses.

2014-01-21  Andrew Pinski <apinski@cavium.com>
	    Steve Ellcey  <sellcey@mips.com>

	PR target/59462
	* config/mips/mips.c (mips_print_operand): Check operand mode instead
	of operator mode.

2014-01-21  Andrey Belevantsev  <abel@ispras.ru>

	Backport from mainline
	2013-12-23  Andrey Belevantsev  <abel@ispras.ru>

	PR rtl-optimization/57422
	* sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling
	add_to_hard_reg_set.

2014-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/59860
	* tree.h (fold_builtin_strcat): New prototype.
	* builtins.c (fold_builtin_strcat): No longer static.  Add len
	argument, if non-NULL, don't call c_strlen.  Optimize
	directly into __builtin_memcpy instead of __builtin_strcpy.
	(fold_builtin_2): Adjust fold_builtin_strcat caller.
	* gimple-fold.c (gimple_fold_builtin): Handle BUILT_IN_STRCAT.

2014-01-20  Richard Biener  <rguenther@suse.de>

	PR middle-end/59860
	* builtins.c (fold_builtin_strcat): Remove case better handled
	by tree-ssa-strlen.c.

2014-01-19  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.c (pa_attr_length_millicode_call): Correct length of
	long non-pic millicode calls.

2014-01-17  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short
	call to $$dyncall when TARGET_LONG_CALLS is true.

2014-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2014-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59794
	* config/i386/i386.c (type_natural_mode): Add a bool parameter
	to indicate if type is used for function return value.  Warn
	ABI change if the vector mode isn't available for function
	return value.
	(ix86_function_arg_advance): Pass false to type_natural_mode.
	(ix86_function_arg): Likewise.
	(ix86_gimplify_va_arg): Likewise.
	(function_arg_32): Don't warn ABI change.
	(ix86_function_value): Pass true to type_natural_mode.
	(ix86_return_in_memory): Likewise.
	(ix86_struct_value_rtx): Removed.
	(TARGET_STRUCT_VALUE_RTX): Likewise.

2014-01-17  Charles Baylis  <charles.baylis@linaro.org>

	Backport from mainline
	2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb
	patterns.
	* config/arm/ldmstm.md: Regenerate.

	2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (arm_hard_general_register_operand):
	New predicate.
	(arm_hard_register_operand): Remove.
	* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
	for all patterns.
	* config/arm/ldmstm.md: Regenerate.

	2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
	vfp_hard_register_operand.

2014-01-17  Kugan Vivekanandarajah  <kuganv@linaro.org>

	Backport from mainline
	2014-01-15  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
	    Kugan Vivekanandarajah  <kuganv@linaro.org>

	PR target/59695
	* config/aarch64/aarch64.c (aarch64_build_constant): Fix incorrect
	truncation.

2014-01-17  Terry Guo  <terry.guo@arm.com>

	PR target/59826
	* config/arm/arm.md (prefetch): Set insn type attribute to load1.

2014-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/59839
	* config/i386/i386.c (ix86_expand_builtin): If target doesn't
	satisfy operand 0 predicate for gathers, use a new pseudo as
	subtarget.

2014-01-16  Richard Henderson <rth@redhat.com>

	PR debug/54694
	* reginfo.c (global_regs_decl): Globalize.
	* rtl.h (global_regs_decl): Declare.
	* ira.c (do_reload): Diagnose frame_pointer_needed and it
	reserved via global_regs.

2014-01-16  Peter Bergner  <bergner@vnet.ibm.com>

	Backport from mainline
	2014-01-15  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_hard_regno_mode_ok): Use
	VALID_AVX256_REG_OR_OI_MODE.

	2013-09-05  Peter Bergner  <bergner@vnet.ibm.com>

	PR target/58139
	* reginfo.c (choose_hard_reg_mode): Scan through all mode classes
	looking for widest mode.

2014-01-16  Marek Polacek  <polacek@redhat.com>

	Backported from mainline
	2014-01-16  Marek Polacek  <polacek@redhat.com>

	PR middle-end/59827
	* gimple-low.c (gimple_check_call_args): Don't use DECL_ARG_TYPE if
	it is error_mark_node.

2014-01-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	PR target/59803
	* config/s390/s390.c (s390_preferred_reload_class): Don't return
	ADDR_REGS for invalid symrefs in non-PIC code.

2014-01-14  Uros Bizjak  <ubizjak@gmail.com>

	Revert:
	2014-01-08  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_data_alignment): Calculate max_align
	from prefetch_block tune setting.

2014-01-13  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2014-01-10  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59745
	* tree-predcom.c (tree_predictive_commoning_loop): Call
	free_affine_expand_cache if giving up because components is NULL.

2014-01-10  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/arm/arm.c (arm_expand_neon_args): Call expand_expr
	with EXPAND_MEMORY for NEON_ARG_MEMORY; check if the returned
	rtx is const0_rtx or not.

2014-01-10  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_expand_tbegin): Remove jump over CC
	extraction in good case.

2014-01-10  Huacai Chen  <chenhc@lemote.com>

	* config/mips/driver-native.c (host_detect_local_cpu): Handle new
	kernel strings for Loongson-2E/2F/3A.

2014-01-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59715
	* tree-flow.h (split_critical_edges): Declare.
	* tree-cfg.c (split_critical_edges): Export.
	* tree-ssa-sink.c (execute_sink_code): Split critical edges.

2014-01-09  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.h (ISA_HAS_WSBH): Define.
	* config/mips/mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): New
	constants.
	(bswaphi2, bswapsi2, bswapdi2, wsbh, dsbh, dshd): New patterns.

2014-01-09  Richard Sandiford  <rdsandiford@googlemail.com>

	PR rtl-optimization/59137
	* reorg.c (steal_delay_list_from_target): Call update_block for
	elided insns.
	(steal_delay_list_from_fallthrough, relax_delay_slots): Likewise.

2014-01-09  Richard Sandiford  <rdsandiford@googlemail.com>

	Revert:
	2012-10-07  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.c (mips_truncated_op_cost): New function.
	(mips_rtx_costs): Adjust test for BADDU.
	* config/mips/mips.md (*baddu_di<mode>): Push truncates to operands.

	2012-10-02  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into...
	(*baddu_si): ...this new pattern.

2014-01-09  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59125
	PR tree-optimization/54570
	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): When inlining
	is not complete do not treat component-references with offset zero
	but different fields as equal.
	* tree-object-size.c: Include tree-phinodes.h and ssa-iterators.h.
	(compute_object_sizes): Apply TLC.  Propagate the constant
	results into all uses and fold their stmts.
	* passes.def (pass_all_optimizations): Move pass_object_sizes
	after the first pass_forwprop and before pass_fre.

	2013-12-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59362
	* tree-object-size.c (object_sizes): Change into array of
	vec<unsigned HOST_WIDE_INT>.
	(compute_builtin_object_size): Check computed bitmap for
	non-NULL instead of object_sizes.  Call safe_grow on object_sizes
	vector if new SSA_NAMEs appeared.
	(init_object_sizes): Check computed bitmap for non-NULL.
	Call safe_grow on object_sizes elements instead of initializing
	it with XNEWVEC.
	(fini_object_sizes): Call release on object_sizes elements, don't
	set it to NULL.

2014-01-09  Richard Earnshaw  <rearnsha@arm.com>

	PR rtl-optimization/54300
	* regcprop.c (copyprop_hardreg_forward_1): Ensure any unused
	outputs in a single-set are killed from the value chains.

2014-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/59724
	* ifcvt.c (cond_exec_process_if_block): Don't call
	flow_find_head_matching_sequence with 0 longest_match.
	* cfgcleanup.c (flow_find_head_matching_sequence): Count even
	non-active insns if !stop_after.
	(try_head_merge_bb): Revert 2014-01-07 changes.

2014-01-09  Hans-Peter Nilsson  <hp@axis.com>

	Backport from mainline
	2013-12-23  Hans-Peter Nilsson  <hp@axis.com>

	PR middle-end/59584
	* config/cris/predicates.md (cris_nonsp_register_operand):
	New define_predicate.
	* config/cris/cris.md: Replace register_operand with
	cris_nonsp_register_operand for destinations in all
	define_splits where a register is set more than once.

2014-01-08   H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2013-12-25   H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59587
	* config/i386/i386.c (struct ptt): Add a field for processor name.
	(processor_target_table): Sync with processor_type.  Add
	processor names.
	(cpu_names): Removed.
	(ix86_option_override_internal): Default x_ix86_tune_string
	to processor_target_table[TARGET_CPU_DEFAULT].name.
	(ix86_function_specific_print): Assert arch and tune <
	PROCESSOR_max.  Use processor_target_table to print arch and
	tune names.
	* config/i386/i386.h (TARGET_CPU_DEFAULT): Default to
	PROCESSOR_GENERIC32.
	(target_cpu_default): Removed.
	(processor_type): Reordered.

2014-01-08  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2014-01-05  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_data_alignment): Calculate max_align
	from prefetch_block tune setting.
	(nocona_cost): Correct size of prefetch block to 64.

2014-01-08  Martin Jambor  <mjambor@suse.cz>

	PR ipa/59610
	* ipa-prop.c (ipa_compute_jump_functions): Bail out if not optimizing.
	(parm_preserved_before_stmt_p): Assume modification present when not
	optimizing.

2014-01-07  John David Anglin  <danglin@gcc.gnu.org>

	PR target/59652
	* config/pa/pa.c (pa_legitimate_address_p): Return false before reload
	for 14-bit register offsets when INT14_OK_STRICT is false.

2014-01-07  Roland Stigge  <stigge@antcom.de>
	    Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR 57386/target
	* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p):
	Only check TFmode for SPE constants.  Don't check TImode or TDmode.

2014-01-07  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/58668
	* cfgcleanup.c (flow_find_cross_jump): Don't count
	any jumps if dir_p is NULL.  Remove p1 variable and make USE/CLOBBER
	check consistent with other places.
	(flow_find_head_matching_sequence): Don't count USE or CLOBBER insns.
	(try_head_merge_bb): Adjust for the flow_find_head_matching_sequence
	counting change.
	* ifcvt.c (count_bb_insns): Don't count USE or CLOBBER insns.

2014-01-07  Mike Stump  <mikestump@comcast.net>
	    Jakub Jelinek  <jakub@redhat.com>

	PR pch/59436
	* tree.h (struct tree_optimization_option): Change optabs
	type from unsigned char * to void *.
	* optabs.c (init_tree_optimization_optabs): Adjust
	TREE_OPTIMIZATION_OPTABS initialization.

2014-01-07  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2013-12-16  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58956
	PR middle-end/59470
	* gimple.h (walk_stmt_load_store_addr_fn): New typedef.
	(walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Use it
	for callback params.
	* gimple.c (walk_stmt_load_store_ops): Likewise.
	(walk_stmt_load_store_addr_ops): Likewise.  Adjust all callback
	calls to supply the gimple operand containing the base tree
	as an extra argument.
	* tree-ssa-ter.c (find_ssaname, find_ssaname_in_store): New helper
	functions.
	(find_replaceable_in_bb): For calls or GIMPLE_ASM, only set
	same_root_var if USE is used somewhere in the stores of the stmt.
	* ipa-prop.c (visit_ref_for_mod_analysis): Remove name of the stmt
	argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.
	* ipa-pure-const.c (check_load, check_store, check_ipa_load,
	check_ipa_store): Likewise.
	* gimple.c (gimple_ior_addresses_taken_1): Likewise.
	* ipa-split.c (test_nonssa_use, mark_nonssa_use): Likewise.
	(verify_non_ssa_vars, visit_bb): Adjust their callers.
	* cfgexpand.c (add_scope_conflicts_1): Use
	walk_stmt_load_store_addr_fn type for visit variable.
	(visit_op, visit_conflict): Remove name of the stmt
	argument and ATTRIBUTE_UNUSED, add another unnamed tree argument.
	* tree-sra.c (asm_visit_addr): Likewise.  Remove name of the data
	argument and ATTRIBUTE_UNUSED.
	* cgraphbuild.c (mark_address, mark_load, mark_store): Add another
	unnamed tree argument.

2014-01-03  Andreas Schwab  <schwab@linux-m68k.org>

	* config/m68k/m68k.c (handle_move_double): Handle pushes with
	overlapping registers also for registers other than the stack
	pointer.

2014-01-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/59625
	* config/i386/i386.c (ix86_avoid_jump_mispredicts): Don't consider
	asm goto as jump.

2014-01-01  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/59647
	* cse.c (cse_process_notes_1): Don't substitute negative VOIDmode
	new_rtx into UNSIGNED_FLOAT rtxes.

2013-12-28  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (output file options): Document -fada-spec-parent.

2013-12-26  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/driver-i386.c (decode_caches_intel): Add missing entries.

2013-12-20  Jakub Jelinek  <jakub@redhat.com>

	PR c++/59255
	Backported from mainline
	2013-08-19  Dehao Chen  <dehao@google.com>

	* value-prof.c (gimple_ic): Fix the bug of adding EH edge.

2013-12-19  James Greenhalgh  <james.greenhalgh@arm.com>

	Backport from Mainline.
	2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to...
	(cmgeu): ...This.
	(cmhi): Rename to...
	(cmgtu): ...This.
	* config/aarch64/aarch64-simd.md
	(simd_mode): Add SF.
	(aarch64_vcond_internal): Use new names for unsigned comparison insns.
	(aarch64_cm<optab><mode>): Rewrite to not use UNSPECs.
	* config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to...
	(cstore<mode>_neg): ...This.
	* config/aarch64/iterators.md
	(VALLF): new.
	(unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>.
	(COMPARISONS): New.
	(UCOMPARISONS): Likewise.
	(optab): Add missing comparisons.
	(n_optab): New.
	(cmp_1): Likewise.
	(cmp_2): Likewise.
	(CMP): Likewise.
	(cmp): Remove.
	(VCMP_S): Likewise.
	(VCMP_U): Likewise.
	(V_cmp_result): Add DF, SF modes.
	(v_cmp_result): Likewise.
	(v): Likewise.
	(vmtype): Likewise.
	* config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New.

	Partial Backport from mainline.
	2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/arm_neon.h
	(vc<eq, lt, le, gt, ge, tst><qsd>_<u><8,16,32,64>): Remap
	to builtins or C as appropriate.

2013-12-19  Dominik Vogt  <vogt@linux.vnet.ibm.com>
	    Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	Backport from mainline
	2013-12-19  Dominik Vogt  <vogt@linux.vnet.ibm.com>
	* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
	constant
	(s390_hotpatch_trampoline_halfwords_max): New constant
	(s390_hotpatch_trampoline_halfwords): New static variable
	(get_hotpatch_attribute): New function
	(s390_handle_hotpatch_attribute): New function
	(s390_attribute_table): New target specific attribute table to implement
	the hotpatch attribute
	(s390_option_override): Parse hotpatch options
	(s390_function_num_hotpatch_trampoline_halfwords): New function
	(s390_can_inline_p): Implement target hook to
	suppress hotpatching for explicitly inlined functions
	(s390_asm_output_function_label): Generate hotpatch prologue
	(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table
	(TARGET_CAN_INLINE_P): Define to implement target hook
	* config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=
	* config/s390/s390-protos.h (s390_asm_output_function_label): Add
	prototype
	* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
	function label generation for hotpatching
	(FUNCTION_BOUNDARY): Align functions to eight bytes
	* doc/extend.texi: Document hotpatch attribute
	* doc/invoke.texi: Document -mhotpatch option

2013-12-18  Eric Botcazou  <ebotcazou@adacore.com>

	* config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko.

2013-12-12  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/59470
	* lra-coalesce.c (lra_coalesce): Invalidate inheritance pseudo
	values if necessary.

2013-12-12  Jakub Jelinek  <jakub@redhat.com>

	PR libgomp/59467
	* gimplify.c (omp_check_private): Add copyprivate argument, if it
	is true, don't check omp_privatize_by_reference.
	(gimplify_scan_omp_clauses): For OMP_CLAUSE_COPYPRIVATE verify
	decl is private in outer context.  Adjust omp_check_private caller.

2013-12-10  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/58295
	* simplify-rtx.c (simplify_truncation): Restrict the distribution for
	WORD_REGISTER_OPERATIONS targets.

2013-12-10  Kai Tietz  <ktietz@redhat.com>

	PR target/56807
	* config/i386/i386.c (ix86_expand_prologue): Address saved
	registers stack-relative, not via frame-pointer.

2013-12-09  Alan Modra  <amodra@gmail.com>

	Apply from mainline
	2013-12-05  Alan Modra  <amodra@gmail.com>
	* configure.ac (BUILD_CXXFLAGS) Don't use ALL_CXXFLAGS for
	build != host.
	<recursive call for build != host>: Clear GMPINC.  Don't bother
	saving CFLAGS.
	* configure: Regenerate.

2013-12-08  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-12-06  Uros Bizjak  <ubizjak@gmail.com>

	PR target/59405
	* config/i386/i386.c (type_natural_mode): Properly handle
	size 8 for !TARGET_64BIT.

2013-12-07  Ralf Corsépius  <ralf.corsepius@rtems.org>

	* config.gcc (microblaze*-*-rtems*): Add TARGET_BIG_ENDIAN_DEFAULT.

2013-12-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59388
	* tree-ssa-reassoc.c (update_range_test): If op == range->exp,
	gimplify tem after stmt rather than before it.

2013-12-06  Oleg Endo  <olegendo@gcc.gnu.org>

	Backport from mainline
	2013-11-26  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/58314
	PR target/50751
	* config/sh/sh.c (max_mov_insn_displacement, disp_addr_displacement):
	Prefix function names with 'sh_'.  Make them non-static.
	* config/sh/sh-protos.h (sh_disp_addr_displacement,
	sh_max_mov_insn_displacement): Add declarations.
	* config/sh/constraints.md (Q): Reject QImode.
	(Sdd): Use match_code "mem".
	(Snd): Fix erroneous matching of non-memory operands.
	* config/sh/predicates.md (short_displacement_mem_operand): New
	predicate.
	(general_movsrc_operand): Disallow PC relative QImode loads.
	* config/sh/sh.md (*mov<mode>_reg_reg): Remove it.
	(*movqi, *movhi): Merge both insns into...
	(*mov<mode>): ... this new insn.  Replace generic 'm' constraints with
	'Snd' and 'Sdd' constraints.  Calculate insn length dynamically based
	on the operand types.

2013-12-06  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59334
	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Fix bug
	in previous commit.

	2013-11-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59330
	* tree-ssa-dce.c (eliminate_unnecessary_stmts): Simplify
	and fix delayed marking of free calls not necessary.

2013-12-06  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59288
	* tree-vect-loop.c (get_initial_def_for_induction): Do not
	re-analyze the PHI but use STMT_VINFO_LOOP_PHI_EVOLUTION_PART.

	2013-11-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59164
	* tree-vect-loop.c (vect_analyze_loop_operations): Adjust
	check whether we can create an epilogue loop to reflect the
	cases where we create one.

	2013-09-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58137
	* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size):
	Do not create vectors of pointers.
	* tree-vect-loop.c (get_initial_def_for_induction): Use proper
	types for the components of the vector initializer.
	* tree-cfg.c (verify_gimple_assign_binary): Remove special-casing
	allowing pointer vectors with PLUS_EXPR/MINUS_EXPR.

2013-12-06  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/51244
	PR target/59343
	* config/sh/sh.md (*cbranch_t): Check that there are no labels between
	the s1 insn and the testing insn.  Remove REG_DEAD note	from s1 insn.

2013-12-05  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-19  Richard Biener  <rguenther@suse.de>

	PR middle-end/58956
	* tree-ssa-ter.c (find_replaceable_in_bb): Avoid forwarding
	loads into stmts that may clobber it.

2013-12-04  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/58726
	* combine.c (force_to_mode): Fix comment typo.  Don't destructively
	modify x for ROTATE, ROTATERT and IF_THEN_ELSE.

2013-12-04  Jakub Jelinek  <jakub@redhat.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR target/59163
	* config/i386/i386.c (ix86_legitimate_combined_insn): If for
	!TARGET_AVX there is misaligned MEM operand with vector mode
	and get_attr_ssememalign is 0, return false.
	(ix86_expand_special_args_builtin): Add get_pointer_alignment
	computed alignment and for non-temporal loads/stores also
	at least GET_MODE_ALIGNMENT as MEM_ALIGN.
	* config/i386/sse.md
	(<sse>_loadu<ssemodesuffix><avxsizesuffix>,
	<sse>_storeu<ssemodesuffix><avxsizesuffix>,
	<sse2>_loaddqu<avxsizesuffix>,
	<sse2>_storedqu<avxsizesuffix>, <sse3>_lddqu<avxsizesuffix>,
	sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps,
	sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps,
	*vec_interleave_highv2df, *vec_interleave_lowv2df,
	*vec_extractv2df_1_sse, sse2_loadhpd, sse2_loadlpd, sse2_movsd,
	sse4_1_<code>v8qiv8hi2, sse4_1_<code>v4qiv4si2,
	sse4_1_<code>v4hiv4si2, sse4_1_<code>v2qiv2di2,
	sse4_1_<code>v2hiv2di2, sse4_1_<code>v2siv2di2, sse4_2_pcmpestr,
	*sse4_2_pcmpestr_unaligned, sse4_2_pcmpestri, sse4_2_pcmpestrm,
	sse4_2_pcmpestr_cconly, sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned,
	sse4_2_pcmpistri, sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add
	ssememalign attribute.
	* config/i386/i386.md (ssememalign): New define_attr.

2013-12-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/59011
	* gimplify.c (nonlocal_vla_vars): New variable.
	(gimplify_var_or_parm_decl): Put VAR_DECLs for VLAs into
	nonlocal_vla_vars chain.
	(gimplify_body): Call declare_vars on nonlocal_vla_vars chain
	if outer_bind has DECL_INITIAL (current_function_decl) block.

	PR target/58864
	* optabs.c (emit_conditional_move): Save and restore
	pending_stack_adjust and stack_pointer_delta if cmove can't be used.

2013-12-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59358
	* tree-vrp.c (union_ranges): To check for the partially
	overlapping ranges or adjacent ranges, also compare *vr0max
	with vr1max.

2013-12-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/59139
	* tree-ssa-loop-niter.c (chain_of_csts_start): Properly match
	code in get_val_for.
	(get_val_for): Use gcc_checking_asserts.

2013-11-27  Tom de Vries  <tom@codesourcery.com>
	    Marc Glisse  <marc.glisse@inria.fr>

	PR middle-end/59037
	* fold-const.c (fold_indirect_ref_1): Don't create out-of-bounds
	BIT_FIELD_REF.
	* gimplify.c (gimple_fold_indirect_ref): Same.

2013-12-01  Eric Botcazou  <ebotcazou@adacore.com>

	* config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an
	identifier node.

2013-12-01  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* expr.c (emit_group_store): Fix off-by-one BITFIELD_END argument.

2013-11-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	Backport from mainline
	2013-11-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/iterators.md (vrint_conds): New int attribute.
	* config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute.
	(smax<mode>3): Likewise.
	(smin<mode>3): Likewise.

2013-11-28  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-11-27  Uros Bizjak  <ubizjak@gmail.com>
		    Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	PR target/56788
	* gcc.target/i386/xop-frczX.c: New test.

2013-11-28  Terry Guo  <terry.guo@arm.com>

	Backport mainline r205391
	2013-11-26  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (require_pic_register): Handle high pic base
	register for thumb-1.
	(arm_load_pic_register): Also initialize high pic base register.
	* doc/invoke.texi: Update documentation for option -mpic-register.

2013-11-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2013-11-26  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/59014
	* tree-vrp.c (register_edge_assert_for_1): Don't look
	through conversions from non-integral types or through
	narrowing conversions.

2013-11-27  Eric Botcazou  <ebotcazou@adacore.com>

	PR middle-end/59138
	* expr.c (emit_group_store): Don't write past the end of the structure.
	(store_bit_field): Fix formatting.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-09-17  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/sparc/t-rtems: Add leon3 multilibs.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-08-09  Eric Botcazou  <ebotcazou@adacore.com>

	* configure.ac: Add GAS check for LEON instructions on SPARC.
	* configure: Regenerate.
	* config.in: Likewise.
	* config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the
	sparc*-*-* block.
	* config/sparc/sparc.opt (LEON, LEON3): New masks.
	* config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG
	for LEON or LEON3.
	(ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3.
	(AS_LEON_FLAG): New macro.
	* config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon
	and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined.
	Deal with LEON and LEON3 for the memory model.
	* config/sparc/sync.md (atomic_compare_and_swap<mode>): Enable if LEON3
	(atomic_compare_and_swap<mode>_1): Likewise.
	(*atomic_compare_and_swap<mode>_1): Likewise.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-07-23  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (SPARC Options): Document new leon3 processor value.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-07-22  Eric Botcazou  <ebotcazou@adacore.com>

	* config.gcc (sparc*-*-*): Accept leon3 processor.
	(sparc-leon*-*): Merge with sparc*-*-* and add leon3 support.
	* doc/invoke.texi (SPARC Options): Adjust -mfix-ut699 entry.
	* config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_LEON3.
	* config/sparc/sparc.opt (enum processor_type): Add leon3.
	(mfix-ut699): Adjust comment.
	* config/sparc/sparc.h (TARGET_CPU_leon3): New define.
	(CPP_CPU32_DEFAULT_SPEC): Add leon3 support.
	(CPP_CPU_SPEC): Likewise.
	(ASM_CPU_SPEC): Likewise.
	* config/sparc/sparc.c (leon3_cost): New constant.
	(sparc_option_override): Add leon3 support.
	(mem_ref): New function.
	(sparc_gate_work_around_errata): Return true if -mfix-ut699 is enabled.
	(sparc_do_work_around_errata): Look into the instruction in the delay
	slot and adjust accordingly.  Add fix for the data cache nullify issues
	of the UT699.  Change insertion position for the NOP.
	* config/sparc/leon.md (leon_fpalu, leon_fpmds, write_buf): Delete.
	(leon3_load): New reservation.
	(leon_store): Bump latency to 2.
	(grfpu): New automaton.
	(grfpu_alu): New unit.
	(grfpu_ds): Likewise.
	(leon_fp_alu): Adjust.
	(leon_fp_mult): Delete.
	(leon_fp_div): Split into leon_fp_divs and leon_fp_divd.
	(leon_fp_sqrt): Split into leon_fp_sqrts and leon_fp_sqrtd.
	* config/sparc/sparc.md (cpu): Add leon3.
	* config/sparc/sync.md (atomic_exchangesi): Disable if -mfix-ut699.
	(swapsi): Likewise.
	(atomic_test_and_set): Likewise.
	(ldstub): Likewise.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-04-10  Steven Bosscher  <steven@gcc.gnu.org>

	* config/sparc/sparc.c: Include tree-pass.h.
	(TARGET_MACHINE_DEPENDENT_REORG): Do not redefine.
	(sparc_reorg): Rename to sparc_do_work_around_errata.  Move to
	head of file.  Change return type.  Split off gate function.
	(sparc_gate_work_around_errata): New function.
	(pass_work_around_errata): New pass definition.
	(insert_pass_work_around_errata) New pass insert definition to
	insert pass_work_around_errata just after delayed-branch scheduling.
	(sparc_option_override): Insert the pass.
	* config/sparc/t-sparc (sparc.o): Add TREE_PASS_H dependence.

2013-11-24  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	Backport from mainline
	2013-05-28  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (SPARC Options): Document -mfix-ut699.
	* builtins.c (expand_builtin_mathfn) <BUILT_IN_SQRT>: Try to widen the
	mode if the instruction isn't available in the original mode.
	* config/sparc/sparc.opt (mfix-ut699): New option.
	* config/sparc/sparc.md (muldf3_extend): Disable if -mfix-ut699.
	(divdf3): Turn into expander.
	(divdf3_nofix): New insn.
	(divdf3_fix): Likewise.
	(divsf3): Disable if -mfix-ut699.
	(sqrtdf2): Turn into expander.
	(sqrtdf2_nofix): New insn.
	(sqrtdf2_fix): Likewise.
	(sqrtsf2): Disable if -mfix-ut699.

2013-11-22  Eric Botcazou  <ebotcazou@adacore.com>

	* print-rtl.c (print_rtx) <case MEM>: Output a space if no MEM_EXPR.

2013-11-21  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	PR bootstrap/57683
	Backport from mainline: r197467 and r198999.
	2013-04-03  Jeff Law  <law@redhat.com>

	* Makefile.in (lra-constraints.o): Depend on $(OPTABS_H).
	(lra-eliminations.o): Likewise.

	2013-05-16  Jeff Law  <law@redhat.com>

	* Makefile.in (tree-switch-conversion.o): Depend on $(OPTABS_H).

2013-11-20  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/59207
	* config/sparc/sparc.c (sparc_fold_builtin) <case CODE_FOR_pdist_vis>:
	Make sure neg2_ovf is set before being used.

2013-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
	    Dominik Vogt  <vogt@linux.vnet.ibm.com>

	Backport from mainline
	* config/s390/s390.c (s390_canonicalize_comparison): Don't fold
	int comparisons with an out of range condition code.
	(s390_optimize_nonescaping_tx): Skip empty BBs.
	Generate the new tbegin RTX when removing the FPR clobbers (with
	two SETs).
	(s390_expand_tbegin): Fix the retry loop counter.  Copy CC to the
	result before doing the retry calculations.
	(s390_init_builtins): Make tbegin "returns_twice" and tabort
	"noreturn".
	* config/s390/s390.md (UNSPECV_TBEGIN_TDB): New constant used for
	the TDB setting part of an tbegin.
	("tbegin_1", "tbegin_nofloat_1"): Add a set for the TDB.
	("tx_assist"): Set unused argument to an immediate zero instead of
	loading zero into a GPR and pass it as argument.
	* config/s390/htmxlintrin.h (__TM_simple_begin, __TM_begin):
	Remove inline and related attributes.
	(__TM_nesting_depth, __TM_is_user_abort, __TM_is_named_user_abort)
	(__TM_is_illegal, __TM_is_footprint_exceeded)
	(__TM_is_nested_too_deep, __TM_is_conflict): Fix format value
	check.

2013-11-19  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-11-18  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_decompose_address): Use REG_P instead of
	ix86_address_subreg_operand.  Move subreg checks to
	ix86_validate_address_register.  Move address override check to
	ix86_legitimate_address_p.
	(ix86_validate_address_register): New function.
	(ix86_legitimate_address_p): Call ix86_validate_address_register
	to validate base and index registers.  Add address override check
	from ix86_decompose_address.
	(ix86_decompose_address): Remove.

	Backport from mainline
	2013-11-17  Uros Bizjak  <ubizjak@gmail.com>

	PR target/59153
	* config/i386/i386.c (ix86_address_subreg_operand): Do not
	reject non-integer subregs.
	(ix86_decompose_address): Do not reject invalid CONST_INT RTXes.
	Move check for invalid x32 constant addresses ...
	(ix86_legitimate_address_p): ... here.

2013-11-19  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-07  Richard Biener  <rguenther@suse.de>

	* tree-dfa.c (get_ref_base_and_extent): Fix casting.

2013-11-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57517
	* tree-predcom.c (combinable_refs_p): Verify the combination
	is always executed when the refs are.

2013-11-19  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-11-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/58941
	* tree-dfa.c (get_ref_base_and_extent): Merge common code
	in MEM_REF and TARGET_MEM_REF handling.  Make sure to
	process trailing array detection before diving into the
	view-converted object (and possibly apply some extra offset).

2013-11-18  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-10-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58794
	* fold-const.c (operand_equal_p): Compare FIELD_DECL operand
	of COMPONENT_REFs with OEP_CONSTANT_ADDRESS_OF left in place.

	2013-10-21  Richard Biener  <rguenther@suse.de>

	PR middle-end/58742
	* fold-const.c (fold_binary_loc): Fold ((T) (X /[ex] C)) * C
	to (T) X for sign-changing conversions (or no conversion).

	2013-11-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58653
	* tree-predcom.c (ref_at_iteration): Rewrite to generate
	a MEM_REF.
	(prepare_initializers_chain): Adjust.

	PR tree-optimization/59047
	* tree-predcom.c (ref_at_iteration): Handle bitfield accesses
	properly.

	2013-10-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58143
	* tree-ssa-loop-im.c (arith_code_with_undefined_signed_overflow):
	New function.
	(rewrite_to_defined_overflow): Likewise.
	(move_computations_dom_walker::before_dom): Rewrite stmts
	with undefined signed overflow that are not always executed
	into unsigned arithmetic.

2013-11-14  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-11-10  Uros Bizjak  <ubizjak@gmail.com>

	* mode-switching.c (optimize_mode_switching): Mark block as
	nontransparent, if last_mode at block exit is different from no_mode.

	Backport from mainline
	2013-11-06  Uros Bizjak  <ubizjak@gmail.com>

	PR target/59021
	* config/i386/i386.c (ix86_avx_u128_mode_needed): Require
	AVX_U128_DIRTY mode for call_insn RTXes that use AVX256 registers.
	(ix86_avx_u128_mode_needed): Return AVX_U128_DIRTY mode for call_insn
	RTXes that return in AVX256 register.

2013-11-14  Jakub Jelinek  <jakub@redhat.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR target/59101
	* config/i386/i386.md (*anddi_2): Only allow CCZmode if
	operands[2] satisfies_constraint_Z that might have bit 31 set.

2013-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	Backported from mainline
	2013-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59088
	* config/i386/i386.c (initial_ix86_tune_features): Set
	X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and
	X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for m_HASWELL.

2013-11-11  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	Backported from mainline
	2013-10-30  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/58854
	* config/arm/arm.c (arm_expand_epilogue_apcs_frame): Emit blockage

2013-11-11  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2013-11-06  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58970
	* expr.c (get_bit_range): Handle *offset == NULL_TREE.
	(expand_assignment): If *bitpos is negative, set *offset
	and adjust *bitpos, so that it is not negative.

	2013-11-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/58997
	* loop-iv.c (iv_subreg): For IV_UNKNOWN_EXTEND, expect
	get_iv_value to be in iv->mode rather than iv->extend_mode.
	(iv_extend): Likewise.  Otherwise, if iv->extend != extend,
	use lowpart_subreg on get_iv_value before calling simplify_gen_unary.
	* loop-unswitch.c (may_unswitch_on): Make sure op[i] is in the right
	mode.

2013-11-10  Karlson2k  <k2k@narod.ru>
	    Kai Tietz  <ktietz@redhat.com>

	Merged from trunk
	PR plugins/52872
	* configure.ac: Adding for exported symbols check
	and for rdynamic-check executable-extension.
	* configure: Regenerated.

2013-11-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/59034
	* config/i386/i386.md (push peepholer/splitter): Use Pmode
	with stack_pointer_rtx.

2013-11-05  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos.

2013-11-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58984
	* ipa-prop.c (ipa_load_from_parm_agg_1): Add SIZE_P argument,
	set *SIZE_P if non-NULL on success.
	(ipa_load_from_parm_agg, ipa_analyze_indirect_call_uses): Adjust
	callers.
	(ipcp_transform_function): Likewise.  Punt if size of access
	is different from TYPE_SIZE on v->value's type.

2013-11-03  H.J. Lu  <hongjiu.lu@intel.com>

	Backport from mainline
	2013-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/58690
	* config/i386/i386.c (ix86_copy_addr_to_reg): New function.
	(ix86_expand_movmem): Replace copy_addr_to_reg with
	ix86_copy_addr_to_reg.
	(ix86_expand_setmem): Likewise.

2013-10-29  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	PR rtl-optimization/58079
	* combine.c (combine_simplify_rtx): Avoid using SUBST if
	simplify_comparison has widened a comparison with an integer.

2013-10-29  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/58789
	Backport from mainline
	2013-05-09  Martin Jambor  <mjambor@suse.cz>

	PR lto/57084
	* gimple-fold.c (canonicalize_constructor_val): Call
	cgraph_get_create_real_symbol_node instead of cgraph_get_create_node.

	Backport from mainline
	2013-03-16  Jan Hubicka  <jh@suse.cz>

	* cgraph.h (cgraph_get_create_real_symbol_node): Declare.
	* cgraph.c (cgraph_get_create_real_symbol_node): New function.
	* cgrpahbuild.c: Use cgraph_get_create_real_symbol_node instead
	of cgraph_get_create_node.
	* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.

2013-10-28  Tom de Vries  <tom@codesourcery.com>

	* cfgexpand.c (gimple_expand_cfg): Remove test for parm_birth_insn.
	Don't commit insertions after NOTE_INSN_FUNCTION_BEG.

2013-10-26  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-10-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/58779
	* config/i386/i386.c (put_condition_code) <case GTU, case LEU>:
	Remove CCCmode handling.
	<case LTU>: Return 'c' suffix for CCCmode.
	<case GEU>: Return 'nc' suffix for CCCmode.
	(ix86_cc_mode) <case GTU, case LEU>: Do not generate overflow checks.
	* config/i386/i386.md (*sub<mode>3_cconly_overflow): Remove.
	(*sub<mode>3_cc_overflow): Ditto.
	(*subsi3_zext_cc_overflow): Ditto.

2013-10-26  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-10-19  Uros Bizjak  <ubizjak@gmail.com>

	PR target/58792
	* config/i386/i386.c (ix86_function_value_regno): Add DX_REG,
	ST1_REG and XMM1_REG for 32bit and 64bit targets.  Also add DI_REG
	and SI_REG for 64bit SYSV ABI targets.

2013-08-25  Richard Henderson  <rth@twiddle.net>

	PR rtl/58542
	* optabs.c (maybe_emit_atomic_exchange): Use create_input_operand
	instead of create_convert_operand_to.
	(maybe_emit_sync_lock_test_and_set): Likewise.
	(expand_atomic_compare_and_swap): Likewise.
	(maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes.

2013-10-25  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/58831
	* alias.c (init_alias_analysis): At the beginning of each iteration, set
	the reg_seen[N] bit if static_reg_base_value[N] is non-null.

2013-10-25  Eric Botcazou  <ebotcazou@adacore.com>

	* recog.c (search_ofs): New static variable moved from...
	(peep2_find_free_register): ...here.
	(peephole2_optimize): Initialize it.

2013-10-24  David Edelsohn  <dje.gcc@gmail.com>

	Backport from mainline
	2013-10-23  David Edelsohn  <dje.gcc@gmail.com>

	PR target/58838
	* config/rs6000/rs6000.md (mulsi3_internal1 and splitter): Add
	TARGET_32BIT final condition.
	(mulsi3_internal2 and splitter): Same.

2013-10-23  Tom de Vries  <tom@codesourcery.com>

	PR tree-optimization/58805
	* tree-ssa-tail-merge.c (stmt_local_def): Add gimple_vdef check.

2013-10-23  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-06-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57488
	* tree-ssa-pre.c (insert): Clear NEW sets before each iteration.

2013-10-16  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	Backport from mainline
	2013-10-16  Ganesh Gopalasubramanian
	            <Ganesh.Gopalasubramanian@amd.com>

	* config/i386/i386.c (ix86_option_override_internal): Enable FMA4
	for AMD bdver3.

2013-10-16  Jakub Jelinek  <jakub@redhat.com>

	* BASE-VER: Set to 4.8.3.
	* DEV-PHASE: Set to prerelease.

2013-10-16  Release Manager

	* GCC 4.8.2 released.

2013-10-12  James Greenhalgh  <james.greenhalgh@arm.com>

	Backport from mainline.
	2013-10-12  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/arm_neon.h
	(vtbx<1,3>_<psu>8): Fix register constriants.

2013-10-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58670
	* stmt.c (expand_asm_operands): Add FALLTHRU_BB argument,
	if any labels are in FALLTHRU_BB, use a special label emitted
	immediately after the asm goto insn rather than label_rtx
	of the LABEL_DECL.
	(expand_asm_stmt): Adjust caller.
	* cfgrtl.c (commit_one_edge_insertion): Force splitting of
	edge if the last insn in predecessor is a jump with single successor,
	but it isn't simplejump_p.

2013-10-09  Jakub Jelinek  <jakub@redhat.com>

	Backport from mainline
	2013-09-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58539
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Honor
	the fact that debug statements are not taking part in loop-closed
	SSA construction.

2013-10-07  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_register_info): Make the call-saved FPR
	loop to work also for 31bit ABI.
	Save the stack pointer for frame_size > 0.

2013-10-07  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.md ("tbegin", "tbegin_nofloat", "tbegin_retry")
	("tbegin_retry_nofloat", "tend", "tabort", "tx_assist"): Remove
	constraint letters from expanders.
	("tbegin_retry", "tbegin_retry_nofloat"): Change predicate of the
	retry count to general_operand.
	("tabort"): Give operand 0 a mode.
	("tabort_1"): Add mode and constraint letter for operand 0.
	* doc/extend.texi: Fix protoype of __builtin_non_tx_store.

2013-10-04  Marcus Shawcroft  <marcus.shawcroft@arm.com>

	Backport from mainline.

	PR target/58460
	* config/aarch64/aarch64.md (*add_<shift>_<mode>)
	(*add_<shift>_si_uxtw,*add_mul_imm_<mode>)
	(*sub_<shift>_<mode>)
	(*sub_<shift>_si_uxtw,*sub_mul_imm_<mode>, *sub_mul_imm_si_uxtw):
	Remove k constraint.

2013-10-02  John David Anglin  <danglin@gcc.gnu.org>

	* config.gcc (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file.

2013-10-01  Jakub Jelinek  <jakub@redhat.com>
	    Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	PR target/58574
	* config/s390/s390.c (s390_chunkify_start): Handle tablejump_p first,
	continue when done, for other jumps look through PARALLEL
	unconditionally.

2013-09-30  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58564
	* fold-const.c (fold_ternary_loc): For A < 0 : <sign bit of A> : 0
	optimization, punt if sign_bit_p looked through any zero extension.

2013-09-27  Paulo Matos  <pmatos@broadcom.com>

	Backport from mainline.

	PR middle-end/58463
	2013-03-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56716
	* tree-ssa-structalias.c (perform_var_substitution): Adjust
	dumping for ref nodes.

2013-09-27  Paulo Matos  <pmatos@broadcom.com>

	Backport from mainline.

	2013-09-27  Paulo Matos  <pmatos@broadcom.com>
	PR middle-end/58463
	* gcc.dg/pr58463.c: New test.

2013-09-23  Eric Botcazou  <ebotcazou@adacore.com>

	* tree-ssa-ccp.c (insert_clobber_before_stack_restore): Recurse on copy
	assignment statements.

2013-09-23  Alan Modra  <amodra@gmail.com>

	PR target/58330
	* config/rs6000/rs6000.md (bswapdi2_64bit): Disable for volatile mems.

2013-09-23  Alan Modra  <amodra@gmail.com>

	* config/rs6000/predicates.md (add_cint_operand): New.
	(reg_or_add_cint_operand, small_toc_ref): Use add_cint_operand.
	* config/rs6000/rs6000.md (largetoc_high_plus): Restrict offset
	using add_cint_operand.
	(largetoc_high_plus_aix): Likewise.
	* config/rs6000/rs6000.c (toc_relative_expr_p): Use add_cint_operand.

2013-09-20  John David Anglin  <danglin@gcc.gnu.org>

	PR middle-end/56791
	* config/pa/pa.c (pa_option_override): Disable auto increment and
	decrement instructions until reload is completed.

	* config/pa/pa.md: In "scc" insn patterns, change output template to
	handle const0_rtx in reg_or_0_operand operands.

2013-09-19  Jakub Jelinek  <jakub@redhat.com>

	* omp-low.c (expand_omp_sections): Always pass len - 1 to
	GOMP_sections_start, even if !exit_reachable.

2013-09-18  Richard Earnshaw  <rearnsha@arm.com>

	* arm.c (arm_expand_prologue): Validate architecture supports
	LDRD/STRD before accepting tuning preferences.
	(arm_expand_epilogue): Likewise.

2013-09-18  Daniel Morris  <danielm@ecoscentric.com>
	    Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/58458
	* doc/implement-cxx.texi: Fix references to the C++ standards.

2013-09-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR tree-optimization/58088
	* fold-const.c (mask_with_trailing_zeros): New function.
	(fold_binary_loc): Make sure we don't recurse infinitely
	when the X in (X & C1) | C2 is a tree of the form (Y * K1) & K2.
	Use mask_with_trailing_zeros where appropriate.

2013-09-14  John David Anglin  <danglin@gcc.gnu.org>

	PR target/58382
	* config/pa/pa.c (pa_expand_prologue): Change mode in gen_rtx_POST_INC
	calls to word_mode.

2013-09-13  Christian Bruel  <christian.bruel@st.com>

	PR target/58314
	* config/sh/sh.md (mov<mode>_reg_reg): Allow memory reloads.

2013-09-11  Andi Kleen  <ak@linux.intel.com>

	Backport from mainline
	* doc/extend.texi: Use __atomic_store_n instead of
	__atomic_store in HLE example.

2013-09-11  Andi Kleen  <ak@linux.intel.com>

	Backport from mainline
	* doc/extend.texi: Dont use __atomic_clear in HLE
	example.  Fix typo.

2013-09-11  Andi Kleen  <ak@linux.intel.com>

	Backport from mainline
	* doc/extend.texi: Document that __atomic_clear and
	  __atomic_test_and_set should only be used with bool.

2013-09-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/58377
	* passes.c (init_optimization_passes): Split critical edges
	before late uninit warning pass in the -Og pipeline.

2013-09-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58385
	* fold-const.c (build_range_check): If both low and high are NULL,
	use omit_one_operand_loc to preserve exp side-effects.

2013-09-10  Richard Earnshaw  <rearnsha@arm.com>

	PR target/58361
	* arm/vfp.md (combine_vcvt_f32_<FCVTI32typename>): Fix pattern to
	support conditional execution.
	(combine_vcvt_f64_<FCVTI32typename>): Likewise.

2013-09-10  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/58365
	* cfgcleanup.c (merge_memattrs): Also clear MEM_READONLY_P
	resp. MEM_NOTRAP_P if they differ, or set MEM_VOLATILE_P if
	it differs.

2013-09-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58364
	* tree-ssa-reassoc.c (init_range_entry): For BIT_NOT_EXPR on
	BOOLEAN_TYPE, only invert in_p and continue with arg0 if
	the current range can't be an unconditional true or false.

2013-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/57735
	Backport from mainline
	2013-04-30  Richard Sandiford  <rsandifo@linux.vnet.ibm.com>

	* explow.c (plus_constant): Pass "mode" to immed_double_int_const.
	Use gen_int_mode rather than GEN_INT.

2013-09-09  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57521
	* tree-if-conv.c (if_convertible_bb_p): Verify that at least
	one edge is non-critical.
	(find_phi_replacement_condition): Make sure to use a non-critical
	edge.  Cleanup and remove old bug workarounds.
	(bb_postdominates_preds): Remove.
	(if_convertible_loop_p_1): Do not compute post-dominators.
	(combine_blocks): Do not free post-dominators.
	(main_tree_if_conversion): Likewise.

2013-09-09  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-09-03  Richard Biener  <rguenther@suse.de>

	PR middle-end/57656
	* fold-const.c (negate_expr_p): Fix division case.
	(negate_expr): Likewise.

2013-09-09  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57685
	* tree-vrp.c (register_edge_assert_for_1): Recurse only for
	single-use operands to avoid exponential complexity.

2013-09-09  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58223
	* tree-loop-distribution.c (has_anti_dependence): Rename to ...
	(has_anti_or_output_dependence): ... this and adjust to also
	look for output dependences.
	(mark_nodes_having_upstream_mem_writes): Adjust.
	(rdg_flag_uses): Likewise.

2013-09-03  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58246
	* tree-ssa-dce.c (mark_aliased_reaching_defs_necessary_1): Properly
	handle the dominance check inside a basic-block.

2013-09-03  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58228
	* tree-vect-data-refs.c (vect_analyze_data_ref_access): Do not
	allow invariant loads in nested loop vectorization.

2013-09-03  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-08-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/58010
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Remove
	assert that we have a loop-closed PHI.

2013-09-01  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-08-31  Uros Bizjak  <ubizjak@gmail.com>

	* config/alpha/alpha.c (alpha_emit_conditional_move): Update
	"cmp" RTX before signed_comparison_operator check to account
	for "code" changes.

2013-09-01  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.md: Allow "const 0" operand 1 in "scc" insns.

2013-08-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58277
	* tree-ssa-strlen.c (strlen_enter_block): If do_invalidate gave up
	after seeing too many stmts with vdef in between dombb and current
	bb, invalidate everything.

2013-08-29  Oleg Endo  <olegendo@gcc.gnu.org>

	Backport from mainline
	2013-08-05  Oleg Endo  <olegendo@gcc.gnu.org>

	PR other/12081
	* recog.h (rtx (*insn_gen_fn) (rtx, ...)): Replace typedef with	new
	class insn_gen_fn.
	* expr.c (move_by_pieces_1, store_by_pieces_2): Replace argument
	rtx (*) (rtx, ...) with insn_gen_fn.
	* genoutput.c (output_insn_data): Cast gen_? function pointers to
	insn_gen_fn::stored_funcptr.  Add initializer braces.

	Backport from mainline
	2013-08-07  Oleg Endo  <olegendo@gcc.gnu.org>

	PR other/12081
	* config/rs6000/rs6000.c (gen_2arg_fn_t): Remove typedef.
	(rs6000_emit_swdiv_high_precision, rs6000_emit_swdiv_low_precision,
	rs6000_emit_swrsqrt): Don't cast result of GEN_FCN to gen_2arg_fn_t.

2013-08-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2013-05-27  Richard Biener  <rguenther@suse.de>

	PR middle-end/57381
	PR tree-optimization/57417
	* tree-ssa-sccvn.c (vn_reference_fold_indirect): Fix test
	for unchanged base.
	(set_ssa_val_to): Compare addresses using
	get_addr_base_and_unit_offset.

	PR tree-optimization/57396
	* tree-affine.c (double_int_constant_multiple_p): Properly
	return false for val == 0 and div != 0.

	PR tree-optimization/57343
	* tree-ssa-loop-niter.c (number_of_iterations_ne_max): Do not
	use multiple_of_p if not TYPE_OVERFLOW_UNDEFINED.
	(number_of_iterations_cond): Do not build the folded tree.

2013-08-28  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/58257
	* omp-low.c (copy_var_decl): Copy over TREE_NO_WARNING flag.

2013-08-28  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-06-24  Richard Biener  <rguenther@suse.de>

	PR middle-end/56977
	* passes.c (init_optimization_passes): Move pass_fold_builtins
	and pass_dce earlier with -Og.

2013-08-28  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-08-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Update
	Haswell processor detection.

	Backport from mainline
	2013-08-27  Christian Widmer  <shadow@umbrox.de>

	PR target/57927
	* config/i386/driver-i386.c (host_detect_local_cpu): Add detection
	of Ivy Bridge and Haswell processors.  Assume core-avx2 for unknown
	AVX2 capable processors.

2013-08-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/58218
	* config/i386/x86-64.h (TARGET_SECTION_TYPE_FLAGS): Define.
	* config/i386/i386.c (x86_64_elf_section_type_flags): New function.

	PR tree-optimization/58209
	* tree-tailcall.c (find_tail_calls): Give up for pointer result types
	if m or a is non-NULL.

2013-08-21  Richard Earnshaw  <rearnsha@arm.com>

	PR target/56979
	* arm.c (aapcs_vfp_allocate): Decompose the argument if the
	suggested mode for the assignment isn't compatible with the
	registers required.

2013-08-20  Alan Modra  <amodra@gmail.com>

	PR target/57865
	* config/rs6000/rs6000.c (rs6000_emit_prologue): Correct ool_adjust.
	(rs6000_emit_epilogue): Likewise.

2013-08-19  Peter Bergner  <bergner@vnet.ibm.com>
	    Jakub Jelinek  <jakub@redhat.com>

	Backport from mainline
	* config/rs6000/dfp.md (*negtd2_fpr): Handle non-overlapping
	destination and source operands.

2013-08-18  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58006
	* tree-parloops.c (take_address_of): Don't ICE if get_name
	returns NULL.
	(eliminate_local_variables_stmt): Remove clobber stmts.

2013-08-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58164
	* gimple.c (walk_stmt_load_store_addr_ops): For visit_addr
	walk gimple_goto_dest of GIMPLE_GOTO.

	PR tree-optimization/58165
	* tree-call-cdce.c (shrink_wrap_one_built_in_call): If
	bi_call must be the last stmt in a bb, don't split_block, instead
	use fallthru edge from it and give up if there is none.
	Release conds vector when returning early.

2013-08-15  David Given  <dg@cowlark.com>

	Backport from mainline
	2013-04-26  Vladimir Makarov  <vmakarov@redhat.com>

	* lra-constraints.c (process_alt_operands): Use #if HAVE_ATTR_enable
	instead of #ifdef.

2013-08-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/58145
	* tree-sra.c (build_ref_for_offset): If prev_base has
	TREE_THIS_VOLATILE or TREE_SIDE_EFFECTS, propagate it to MEM_REF.

2013-08-14  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/htmxlintrin.h: Add file missing from last commit.
	* config/s390/htmintrin.h: Likewise.
	* config/s390/s390intrin.h: Likewise.

2013-08-14  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-08-13  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (*sse2_maskmovdqu): Emit addr32 prefix
	when Pmode != word_mode.  Add length_address attribute.
	(sse3_monitor_<mode>): Merge from sse3_monitor and
	sse3_monitor64_<mode> insn patterns.  Emit addr32 prefix when
	Pmode != word_mode.  Update insn length attribute.
	* config/i386/i386.c (ix86_option_override_internal): Update
	ix86_gen_monitor selection for merged sse3_monitor insn.

2013-08-14  Jakub Jelinek  <jakub@redhat.com>
	    Alexandre Oliva  <aoliva@redhat.com>

	PR target/58067
	* config/i386/i386.c (ix86_delegitimize_address): For CM_MEDIUM_PIC
	and CM_LARGE_PIC ix86_cmodel fall thru into the -m32 code, handle
	there also UNSPEC_PLTOFF.

2013-08-13  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/56417
	* asan.c (instrument_strlen_call): Fix typo in comment.
	Use char * type even for the lhs of POINTER_PLUS_EXPR.

2013-08-13  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-06-06  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/57459
	* lra-constraints.c (update_ebb_live_info): Fix typo for operand
	type when setting live regs.

2013-08-13  Marek Polacek  <polacek@redhat.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57980
	* tree-tailcall.c (process_assignment): Return false
	when not dealing with integers or floats.

2013-08-12  Andrew Haley  <aph@redhat.com>

	Backport from mainline:
	* 2013-07-11  Andreas Schwab  <schwab@suse.de>

	* config/aarch64/aarch64-linux.h (CPP_SPEC): Define.

2013-08-13  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-08-12  Perez Read  <netfirewall@gmail.com>

	PR target/58132
	* config/i386/i386.md (*movabs<mode>_1):  Add <ptrsize> PTR before
	operand 0 for intel asm alternative.
	(*movabs<mode>_2): Ditto for operand 1.

2013-08-09  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	Backport from mainline:
	2013-08-09  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* config/arm/neon.md (vcond): Fix floating-point vector
	comparisons against 0.

2013-08-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	Backport from mainline:
	2013-08-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon.md (movmisalign<mode>): Disable when we
	don't allow unaligned accesses.
	(*movmisalign<mode>_neon_store): Likewise.
	(*movmisalign<mode>_neon_load): Likewise.
	(*movmisalign<mode>_neon_store): Likewise.
	(*movmisalign<mode>_neon_load): Likewise.

2013-08-06  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/58041
	* gimple-ssa-strength-reduction.c (replace_ref): Make sure built
	MEM_REF has proper alignment information.

2013-08-05  Richard Earnshaw  <rearnsha@arm.com>

	PR rtl-optimization/57708
	* recog.c (peep2_find_free_register): Validate all regs in a
	multi-reg mode.

2013-08-02  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add
	the implied StoreLoad barrier for atomic operations if before.

2013-08-02  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	Backports from mainline:
	2013-06-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to
	UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT.
	(struct machine_function): Add tbegin_p.
	(s390_canonicalize_comparison): Fold CC mode compares to
	conditional jump if possible.
	(s390_emit_jump): Return the emitted jump.
	(s390_branch_condition_mask, s390_branch_condition_mnemonic):
	Handle CCRAWmode compares.
	(s390_option_override): Default to -mhtm if available.
	(s390_reg_clobbered_rtx): Handle floating point regs as well.
	(s390_regs_ever_clobbered): Use s390_regs_ever_clobbered also for
	FPRs instead of df_regs_ever_live_p.
	(s390_optimize_nonescaping_tx): New function.
	(s390_init_frame_layout): Extend clobbered_regs array to cover
	FPRs as well.
	(s390_emit_prologue): Call s390_optimize_nonescaping_tx.
	(s390_expand_tbegin): New function.
	(enum s390_builtin): New enum definition.
	(code_for_builtin): New array definition.
	(s390_init_builtins): New function.
	(s390_expand_builtin): New function.
	(TARGET_INIT_BUILTINS): Define.
	(TARGET_EXPAND_BUILTIN): Define.
	* common/config/s390/s390-common.c (processor_flags_table): Add PF_TX.
	* config/s390/predicates.md (s390_comparison): Handle CCRAWmode.
	(s390_alc_comparison): Likewise.
	* config/s390/s390-modes.def: Add CCRAWmode.
	* config/s390/s390.h (processor_flags): Add PF_TX.
	(TARGET_CPU_HTM): Define macro.
	(TARGET_HTM): Define macro.
	(TARGET_CPU_CPP_BUILTINS): Define __HTM__ for htm.
	* config/s390/s390.md: Rename UNSPEC_CCU_TO_INT to
	UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT.
	(UNSPECV_TBEGIN, UNSPECV_TBEGINC, UNSPECV_TEND, UNSPECV_TABORT)
	(UNSPECV_ETND, UNSPECV_NTSTG, UNSPECV_PPA): New unspecv enum
	values.
	(TBEGIN_MASK, TBEGINC_MASK): New constants.
	("*cc_to_int"): Move up.
	("*mov<mode>cc", "*cjump_64", "*cjump_31"): Accept integer
	constants other than 0.
	("*ccraw_to_int"): New insn and splitter definition.
	("tbegin", "tbegin_nofloat", "tbegin_retry")
	("tbegin_retry_nofloat", "tbeginc", "tend", "tabort")
	("tx_assist"): New expander.
	("tbegin_1", "tbegin_nofloat_1", "*tbeginc_1", "*tend_1")
	("*tabort_1", "etnd", "ntstg", "*ppa"): New insn definition.
	* config/s390/s390.opt: Add -mhtm option.
	* config/s390/s390-protos.h (s390_emit_jump): Add return type.
	* config/s390/htmxlintrin.h: New file.
	* config/s390/htmintrin.h: New file.
	* config/s390/s390intrin.h: New file.
	* doc/extend.texi: Document htm builtins.
	* config.gcc: Add the new header files to extra_headers.

	2013-07-17  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c: (s390_expand_builtin): Allow -mhtm to be
	enabled without -march=zEC12.
	* config/s390/s390.h (TARGET_HTM): Do not require EC12 machine
	flags to be set.

2013-08-01  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

	Backport from mainline
	2013-05-13  Ganesh Gopalasubramanian
		    <Ganesh.Gopalasubramanian@amd.com>

	* config/i386/i386.c (processor_target_table): Modified default
	alignment values for AMD BD and BT architectures.

2013-07-31  Sriraman Tallam  <tmsriram@google.com>

	* config/i386/i386.c (dispatch_function_versions): Fix array
	indexing of function_version_info to match actual_versions.

2013-07-31  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config.gcc (*-*-rtems*): Use __cxa_atexit by default.
	* config/rs6000/rtems.h (TARGET_LIBGCC_SDATA_SECTION): Define.

2013-07-31  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	Backport from mainline
	2013-03-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Define.

	2013-07-23  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/linux-unwind.h: Use the proper dwarf to hard reg
	mapping for FPRs when creating the fallback framestate.

	2013-07-29  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	* config/s390/s390.md ("movcc"): Swap load and store instructions.

2013-07-25  Terry Guo  <terry.guo@arm.com>

	Backport from mainline:
	2013-07-25  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for
	shift_add/shift_sub0/shift_sub1 RTXs.

2013-07-22  Iain Sandoe  <iain@codesourcery.com>

	Backport from mainline:
	2013-07-22  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (nonlocal_goto_receiver): Delete insn if
	it is not needed after split.

	2013-07-20  Iain Sandoe  <iain@codesourcery.com>

	PR target/51784
	* config/i386/i386.c (output_set_got) [TARGET_MACHO]: Adjust to emit a
	second label for nonlocal goto receivers. Don't output pic base labels
	unless we're producing PIC; mark that action unreachable().
	(ix86_save_reg): If the function contains a nonlocal label, save the
	PIC base reg.
	* config/darwin-protos.h (machopic_should_output_picbase_label): New.
	* gcc/config/darwin.c (emitted_pic_label_num): New GTY.
	(update_pic_label_number_if_needed): New.
	(machopic_output_function_base_name): Adjust for nonlocal receiver
	case.
	(machopic_should_output_picbase_label): New.
	* config/i386/i386.md (enum unspecv): UNSPECV_NLGR: New.
	(nonlocal_goto_receiver): New insn and split.

2013-07-19 Wei Mi  <wmi@google.com>

	Backport from mainline:
	2013-07-18  Vladimir Makarov  <vmakarov@redhat.com>
		    Wei Mi  <wmi@google.com>

	PR rtl-optimization/57878
	* lra-assigns.c (assign_by_spills): Move non_reload_pseudos to the
	top. Promote lra_assert to gcc_assert.
	(reload_pseudo_compare_func): Check regs first for reload pseudos.

2013-07-11  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2013-07-19 trunk r201051.

	PR target/57516
	* config/avr/avr-fixed.md (round<mode>3_const): Turn expander to insn.
	* config/avr/avr.md (adjust_len): Add `round'.
	* config/avr/avr-protos.h (avr_out_round): New prototype.
	(avr_out_plus): Add `out_label' argument.
	* config/avr/avr.c (avr_out_plus_1): Add `out_label' argument.
	(avr_out_plus): Pass down `out_label' to avr_out_plus_1.
	Handle the case where `insn' is just a pattern.
	(avr_out_bitop): Handle the case where `insn' is just a pattern.
	(avr_out_round): New function.
	(avr_adjust_insn_length): Handle ADJUST_LEN_ROUND.

2013-07-19  Kirill Yukhin  <kirill.yukhin@intel.com>

	* config/i386/bmiintrin.h (_bextr_u32): New.
	(_bextr_u64): Ditto.
	(_blsi_u32): New.
	(_blsi_u64): Ditto.
	(_blsr_u32): Ditto.
	(_blsr_u64): Ditto.
	(_blsmsk_u32): Ditto.
	(_blsmsk_u64): Ditto.
	(_tzcnt_u32): Ditto.
	(_tzcnt_u64): Ditto.

2013-07-17  James Greenhalgh  <james.greenhalgh@arm.com>

	Backport From mainline:
	2013-07-03  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_simd_expand_builtin): Handle AARCH64_SIMD_STORE1.
	* config/aarch64/aarch64-simd-builtins.def (ld1): New.
	(st1): Likewise.
	* config/aarch64/aarch64-simd.md
	(aarch64_ld1<VALL:mode>): New.
	(aarch64_st1<VALL:mode>): Likewise.
	* config/aarch64/arm_neon.h
	(vld1<q>_<fpsu><8, 16, 32, 64>): Convert to RTL builtins.

2013-07-11  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2013-07-11 trunk r200901.

	PR target/57631
	* config/avr/avr.c (avr_set_current_function): Sanity-check signal
	name seen by assembler/linker if available.

2013-07-10  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2013-07-10 trunk r200872.

	PR target/57844
	* config/avr/avr.c (avr_prologue_setup_frame): Trunk -size to mode
	of my_fp.

2013-07-10  Georg-Johann Lay  <avr@gjlay.de>

	Backport from 2013-07-10 trunk r200870.

	PR target/57506
	* config/avr/avr-mcus.def (atmega16hva, atmega16hva2, atmega16hvb)
	(atmega16m1, atmega16u4, atmega32a, atmega32c1, atmega32hvb)
	(atmega32m1, atmega32u4, atmega32u6, atmega64c1, atmega64m1):
	Remove duplicate devices.
	* config/avr/gen-avr-mmcu-texi.c (print_mcus): Fail on duplicate MCUs.
	* config/avr/t-multilib: Regenerate.
	* config/avr/avr-tables.opt: Regenerate.
	* doc/avr-mmcu.texi: Regenerate.

2013-07-10  Georg-Johann Lay  <avr@gjlay.de>

	PR target/56987
	* config/avr/avr.opt (Waddr-space-convert): Fix typo.

2013-07-09  Joseph Myers  <joseph@codesourcery.com>

	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Only
	adjust register size for TDmode and TFmode for VSX registers.

2013-07-08  Kai Tietz  <ktietz@redhat.com>

	Backport from mainline
	PR target/56892
	* config/i386/i386.c (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define as
	hook_bool_const_tree_true.

2013-07-08  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-07-07  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Do not check
	signature_TM2_ebx, it interferes with signature_INTEL_ebx.

	Backport from mainline
	2013-07-06  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (sse_movlhps): Change alternative 3
	of operand 2 to "m".

2013-07-08  Eric Botcazou  <ebotcazou@adacore.com>

	* Makefile.in (tree-ssa-reassoc.o): Add dependency on $(PARAMS_H).

2013-07-08  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/57829
	* simplify-rtx.c (simplify_binary_operation_1) <case IOR>: Ensure that
	mask bits outside of mode are just sign-extension from mode to HWI.

2013-07-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/57777
	* config/i386/predicates.md (vsib_address_operand): Disallow
	SYMBOL_REF or LABEL_REF in parts.disp if TARGET_64BIT && flag_pic.

2013-06-30  Terry Guo  <terry.guo@arm.com>

	Backport from mainline
	2013-03-27  Bin Cheng  <bin.cheng@arm.com>

	PR target/56102
	* config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix
	rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with
	mult-word mode.

2013-06-28  Jakub Jelinek  <jakub@redhat.com>

	PR target/57736
	* config/i386/i386.c (ix86_expand_builtin): If target == NULL
	and mode is VOIDmode, don't create a VOIDmode pseudo to copy result
	into.

2013-06-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/57623
	* config/i386/i386.md (bmi_bextr_<mode>): Swap predicates and
	constraints of operand 1 and 2.

	PR target/57623
	* config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments
	to match RTL canonicalization.  Swap predicates and
	constraints of operand 1 and 2.

	* tree-vect-stmts.c (vectorizable_store): Move ptr_incr var
	decl before the loop, initialize to NULL.
	(vectorizable_load): Initialize ptr_incr to NULL.

2013-06-24  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/57358
	* ipa-prop.c (parm_ref_data_preserved_p): Always return true when
	not optimizing.

2013-06-24  Alan Modra  <amodra@gmail.com>

	* config/rs6000/rs6000.c (vspltis_constant): Correct for little-endian.
	(gen_easy_altivec_constant): Likewise.
	* config/rs6000/predicates.md (easy_vector_constant_add_self,
	easy_vector_constant_msb): Likewise.

2013-06-21  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-06-20  Uros Bizjak  <ubizjak@gmail.com>

	PR target/57655
	* config/i386/i386.c (construct_container): Report error if
	long double is used with disabled x87 float returns.

2013-06-20  Wei Mi  <wmi@google.com>

	Backport from mainline
	2013-06-19  Wei Mi  <wmi@google.com>

	PR rtl-optimization/57518
	* ira.c (set_paradoxical_subreg): Set pdx_subregs[regno]
	if regno is used in paradoxical subreg.
	(update_equiv_regs): Check pdx_subregs[regno] before
	set a reg to be equivalent with a mem.


2013-06-20  David Edelsohn  <dje.gcc@gmail.com>

	Backport from mainline
	2013-06-19  David Edelsohn  <dje.gcc@gmail.com>

	PR driver/57652
	* collect2.c (collect_atexit): New.
	(collect_exit): Delete.
	(main): Register collect_atexit with atexit.
	(collect_wait): Change collect_exit to exit.
	(do_wait): Same.
	* collect2.h (collect_exit): Delete.
	* tlink.c (do_tlink): Rename exit to ret. Change collect_exit to exit.

2013-06-19  Matthias Klose  <doko@ubuntu.com>

	PR driver/57651
	* file-find.h (find_a_file): Add a mode parameter.
	* file-find.c (find_a_file): Likewise.
	* gcc-ar.c (main): Call find_a_file with R_OK for the plugin,
	with X_OK for the executables.
	* collect2.c (main): Call find_a_file with X_OK.

2013-06-19  Igor Zamyatin  <igor.zamyatin@intel.com>

	* doc/invoke.texi (core-avx2): Document.
	(atom): Updated with MOVBE.

2013-06-19  Jakub Jelinek  <jakub@redhat.com>

	PR driver/57651
	* gcc-ar.c (main): If not CROSS_DIRECTORY_STRUCTURE, look for
	PERSONALITY in $PATH derived prefixes.

2013-06-19  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/56544
	* doc/cpp.texi [Standard Predefined Macros, __cplusplus]: Document
	that now in C++ the value is correct per the C++ standards.

2013-06-19  Alan Modra  <amodra@gmail.com>

	Apply mainline patches
	2013-06-13  Alan Modra  <amodra@gmail.com>
	* config/rs6000/rs6000.h (LONG_DOUBLE_LARGE_FIRST): Define.
	* config/rs6000/rs6000.md (signbittf2): New insn.
	(extenddftf2_internal): Use LONG_DOUBLE_LARGE_FIRST.
	(abstf2_internal, cmptf_internal2): Likewise.
	* config/rs6000/spe.md (spe_abstf2_cmp, spe_abstf2_tst): Likewise.

	2013-06-11  Anton Blanchard  <anton@samba.org>
	* config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Calculate
	correct shift value in little-endian mode.

	2013-06-07  Alan Modra  <amodra@gmail.com>
	* config/rs6000/rs6000.c (setup_incoming_varargs): Round up
	va_list_gpr_size.

	2013-06-04  Alan Modra  <amodra@gmail.com>
	* config/rs6000/rs6000.c (output_toc): Correct little-endian float
	constant output.

	2013-05-10  Alan Modra  <amodra@gmail.com>
	* configure.ac (HAVE_AS_TLS): Swap powerpc64 and powerpc cases.
	(HAVE_LD_LARGE_TOC): Don't mention AIX in help text.
	* configure: Regenerate.

	2013-05-09  Alan Modra  <amodra@gmail.com>
	* configure.ac (HAVE_AS_TLS): Enable tests for powerpcle and
	powerpc64le.
	* configure: Regenerate.

	2013-05-07  Anton Blanchard  <anton@samba.org>
	* configure.ac (HAVE_LD_LARGE_TOC): Use right linker emulation
	for powerpc64 little endian.
	* configure: Regenerate.

	2013-05-06  Alan Modra  <amodra@gmail.com>
	* config/rs6000/linux.h (DEFAULT_ASM_ENDIAN): Define.
	(LINK_OS_LINUX_EMUL): Use ENDIAN_SELECT.
	* config/rs6000/linux64.h (DEFAULT_ASM_ENDIAN): Define.
	* config/rs6000/sysv4le.h (DEFAULT_ASM_ENDIAN): Define.
	(LINK_TARGET_SPEC): Use ENDIAN_SELECT.
	* config/rs6000/sysv4.h (DEFAULT_ASM_ENDIAN): Define as -mbig.

	2013-05-06  Alan Modra  <amodra@gmail.com>
	* config/rs6000/sysv4.h (ENDIAN_SELECT): Define, extracted from
	(ASM_SPEC): ..here.  Emit DEFAULT_ASM_ENDIAN too.
	(DEFAULT_ASM_ENDIAN): Define.
	(CC1_SPEC, LINK_TARGET_SPEC): Use ENDIAN_SELECT.
	* config/rs6000/linux64.h (ASM_SPEC32): Remove endian options.
	Update -K PIC clause from sysv4.h.
	(ASM_SPEC_COMMON): Use ENDIAN_SELECT.
	(LINK_OS_LINUX_EMUL32, LINK_OS_LINUX_EMUL64): Likewise.

	2013-05-06  Alan Modra  <amodra@gmail.com>
	* config/rs6000/rs6000.md (bswapdi 2nd splitter): Don't swap words
	twice for little-endian.
	(ashrdi3_no_power, ashrdi3): Support little-endian.

	2013-04-25  Alan Modra  <amodra@gmail.com>
	* config.gcc: Support little-endian powerpc-linux targets.
	* config/rs6000/linux.h (LINK_OS_LINUX_EMUL): Define.
	(LINK_OS_LINUX_SPEC): Define.
	* config/rs6000/linuxspe.h (TARGET_DEFAULT):
	Preserve MASK_LITTLE_ENDIAN.
	* config/rs6000/default64.h (TARGET_DEFAULT): Likewise.
	* config/rs6000/linuxaltivec.h (TARGET_DEFAULT): Likewise.
	* config/rs6000/linux64.h (OPTION_LITTLE_ENDIAN): Don't zero.
	(LINK_OS_LINUX_EMUL32, LINK_OS_LINUX_EMUL64): Define.
	(LINK_OS_LINUX_SPEC32, LINK_OS_LINUX_SPEC64): Use above.
	* config/rs6000/rs6000.c (output_toc): Don't use .tc for TARGET_ELF.
	Correct fp word order for little-endian.  Don't shift toc entries
	smaller than a word for little-endian.
	* config/rs6000/rs6000.md (bswaphi2, bswapsi2 split): Comment.
	(bswapdi2 splits): Correct low-part subreg for little-endian.
	Remove wrong BYTES_BIG_ENDIAN tests, and rename vars to remove
	low/high where such is correct only for be.
	* config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Allow
	little-endian for -mcall-aixdesc.

2013-06-12  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.c (ipa_get_indirect_edge_target_1): Check that param_index is
	within bounds at the beginning of the function.

2013-06-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57537
	* tree-vect-patterns.c (vect_recog_widen_mult_pattern): If
	vect_handle_widen_op_by_const, convert oprnd1 to half_type1.

2013-06-10  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-06-10  Uros Bizjak  <ubizjak@gmail.com>

	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use
	cmp_code to construct REG_EQUAL note.

2013-06-10  Oleg Endo  <olegendo@gcc.gnu.org>

	Backport from mainline
	2013-05-20  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/56547
	* config/sh/sh.md (fmasf4): Remove empty constraints strings.
	(*fmasf4, *fmasf4_media): New insns.

2013-06-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/57568
	* config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure
	that operands[2] doesn't overlap with operands[0].

2013-06-07  Richard Sandiford  <rsandifo@linux.vnet.ibm.com>

	* recog.c (offsettable_address_addr_space_p): Fix calculation of
	address mode.  Move pointer mode initialization to the same place.

2013-06-07  Sofiane Naci  <sofiane.naci@arm.com>

	Backport from mainline
	* config/aarch64/aarch64.md (*movdi_aarch64): Define "simd" attribute.

2013-06-07  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-06-05  Uros Bizjak  <ubizjak@gmail.com>

	* config/alpha/alpha.c (alpha_emit_conditional_move): Swap all
	GE, GT, GEU and GTU compares, modulo DImode compares with zero.

	Backport from mainline
	2013-05-23  Uros Bizjak  <ubizjak@gmail.com>

	PR target/57379
	* config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE.
	* config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct
	REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec.

2013-06-04  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	Backport from mainline.
	2013-05-22  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.h (MALLOC_ABI_ALIGNMENT): New #define.

2013-06-03  James Greenhalgh  <james.greenhalgh@arm.com>

	Backport from mainline.
	2013-04-25  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64.c (aarch64_print_operand): Fix asm_fprintf
	format specifier in 'X' case.

2013-05-31  Richard Henderson  <rth@redhat.com>

	PR target/56742
	* config/i386/i386.c (ix86_seh_fixup_eh_fallthru): New.
	(ix86_reorg): Call it.

2012-05-31  Jakub Jelinek  <jakub@redhat.com>

	* BASE-VER: Set to 4.8.2.
	* DEV-PHASE: Set to prerelease.

2013-05-31  Release Manager

	* GCC 4.8.1 released.

2013-05-24  Greta Yorsh  <Greta.Yorsh@arm.com>

	Backport from mainline
	2013-05-02  Greta Yorsh  <Greta.Yorsh@arm.com>

	PR target/56732
	* config/arm/arm.c (arm_expand_epilogue): Check really_return before
	generating simple_return for naked functions.

2013-05-24  Alexander Ivchenko  <alexander.ivchenko@intel.com>

	PR tree-ssa/57385
	* tree-ssa-sccvn.c (fully_constant_vn_reference_p): Check
	that index is not negative.

2013-05-23  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/57347
	* tree.h (contains_bitfld_component_ref_p): Declare.
	* tree-sra.c (contains_bitfld_comp_ref_p): Move...
	* tree.c (contains_bitfld_component_ref_p): ...here.  Adjust its caller.
	* ipa-prop.c (determine_known_aggregate_parts): Check that LHS does
	not access a bit-field.  Assert all final offsets are byte-aligned.

2013-05-23  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/57341
	* ira.c (validate_equiv_mem_from_store): Use anti_dependence
	instead of true_dependence.

2013-05-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/57344
	* expmed.c (store_split_bit_field): If op0 is a REG or
	SUBREG of a REG, don't lower unit.  Handle unit not being
	always BITS_PER_WORD.

2013-05-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/57356
	* config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups
	for non-sse2 targets.
	(*movti_internal): Simplify mode attribute calculation.

2013-05-22  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-05-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57318
	* tree-ssa-loop-ivcanon.c (tree_estimate_loop_size): Do not
	estimate stmts with side-effects as likely eliminated.

	2013-05-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57330
	* cgraph.c (cgraph_redirect_edge_call_stmt_to_callee): Properly
	preserve the call stmts fntype.

	2013-05-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57303
	* tree-ssa-sink.c (statement_sink_location): Properly handle
	self-assignments.

2013-05-21  Magnus Granberg  <baldrick@free.fr>

	PR plugins/56754
	* Makefile.in (PLUGIN_HEADERS): Add $(TARGET_H).

2013-05-21  Eric Botcazou  <ebotcazou@adacore.com>

	Backport from mainline
	2013-05-14  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sp64-elf.h (CPP_SUBTARGET_SPEC): Delete.
	* config/sparc/openbsd64.h (CPP_SUBTARGET_SPEC): Likewise.

2013-05-17  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/57281
	PR rtl-optimization/57300
	* config/i386/i386.md (extendsidi2_1 dead reg splitter): Remove.
	(extendsidi2_1 peephole2s): Add instead 2 new peephole2s, that undo
	what the other splitter did if the registers are dead.

2013-05-17  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Determine
	cache parameters using detect_caches_amd also for CYRIX,
	NSC and TM2 signatures.

	2013-05-16  Uros Bizjak  <ubizjak@gmail.com>
		    Dzianis Kahanovich  <mahatma@eu.by>

	PR target/45359
	PR target/46396
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	VIA/Centaur processors and determine their cache parameters
	using detect_caches_amd.

	2013-05-15  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_option_override_internal): Update
	processor_alias_table for missing PTA_PRFCHW and PTA_FXSR flags.  Add
	PTA_POPCNT to corei7 entry. Do not enable SSE prefetch on
	non-SSE 3dNow! targets.  Enable TARGET_PRFCHW for TARGET_3DNOW targets.
	* config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW instead
	of TARGET_3DNOW.
	(*prefetch_3dnow): Enable for TARGET_PRFCHW only.

2013-05-17  Jakub Jelinek  <jakub@redhat.com>

	* gcc.c (SANITIZER_SPEC): Reject -fsanitize=address -fsanitize=thread
	linking.

	PR tree-optimization/57051
	* fold-const.c (const_binop) <case VEC_LSHIFT_EXPR,
	case VEC_RSHIFT_EXPR>: Fix BYTES_BIG_ENDIAN handling.

2013-05-16  Jakub Jelinek  <jakub@redhat.com>

	* omp-low.c (extract_omp_for_data): For collapsed loops,
	if at least one of the loops is known at compile time to
	iterate zero times, set count to 0.
	(expand_omp_regimplify_p): New function.
	(expand_omp_for_generic): For collapsed loops, if at least
	one of the loops isn't known to iterate at least once,
	add runtime check with setting count to 0.
	(expand_omp_for_static_nochunk, expand_omp_for_static_chunk):
	For unsigned types if it isn't known at compile time that
	the loop will iterate at least once, add runtime check to bypass
	the whole loop if initial condition isn't true.

2013-05-14  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/57251
	* expr.c (expand_expr_real_2) <case WIDEN_MULT_EXPR>: Handle
	the case when both op0 and op1 have VOIDmode.

2013-05-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57230
	* tree-ssa-strlen.c (handle_char_store): Add missing integer_zerop
	check.

2013-05-12  Joern Rennecke  <joern.rennecke@embecosm.com>

	* config/epiphany/epiphany.c (epiphany_init): Check size of
	NUM_MODES_FOR_MODE_SWITCHING.
	(epiphany_expand_prologue):
	Remove CONFIG_REGNUM initial value handling code.
	(epiphany_optimize_mode_switching): Handle EPIPHANY_MSW_ENTITY_CONFIG.
	(epiphany_mode_needed, epiphany_mode_entry_exit): Likewise.
	(emit_set_fp_mode, epiphany_mode_after): Likewise.
	(epiphany_mode_needed) <Handle EPIPHANY_MSW_ENTITY_AND>:
	Don't return 1 for FP_MODE_NONE.
	* config/epiphany/epiphany.h (NUM_MODES_FOR_MODE_SWITCHING):
	Add value for EPIPHANY_MSW_ENTITY_CONFIG.
	(EPIPHANY_MSW_ENTITY_CONFIG, EPIPHANY_MSW_ENTITY_NUM): Define.
	* config/epiphany/epiphany.md (save_config): New pattern.

2013-05-10  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib.
	Add mthumb/march=armv7-a multilib.
	Add mthumb/march=armv7-r multilib.
	Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib.

2013-05-10  Ralf Corsépius  <ralf.corsepius@rtems.org>

	PR target/57237
	* config/v850/t-rtems: Add more multilibs.

2013-05-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57214
	* tree-ssa-loop-ivcanon.c (propagate_constants_for_unrolling): Do
	not propagate from SSA names that occur in abnormal PHI nodes.

2013-05-10  Alan Modra  <amodra@gmail.com>

	PR target/55033
	* varasm.c (default_elf_select_section): Move !DECL_P check..
	(get_named_section): ..to here before calling get_section_name.
	Adjust assertion.
	(default_section_type_flags): Add DECL_P check.
	* config/i386/winnt.c (i386_pe_section_type_flags): Likewise.
	* config/rs6000/rs6000.c (rs6000_xcoff_section_type_flags): Likewise.

2013-05-09  Joern Rennecke  <joern.rennecke@embecosm.com>

	* config/epiphany/epiphany.c (epiphany_expand_prologue):
	When using gen_stack_adjust_str with a register offset, add a
	REG_FRAME_RELATED_EXPR note.

2013-05-09  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/56988
	* ipa-prop.h (ipa_agg_replacement_value): New flag by_ref.
	* ipa-cp.c (find_aggregate_values_for_callers_subset): Fill in the
	by_ref flag of ipa_agg_replacement_value structures.
	(known_aggs_to_agg_replacement_list): Likewise.
	* ipa-prop.c (write_agg_replacement_chain): Stream by_ref flag.
	(read_agg_replacement_chain): Likewise.
	(ipcp_transform_function): Also check that by_ref flags match.

2013-05-08  Diego Novillo  <dnovillo@google.com>

	PR bootstrap/54659

	Revert:

	2012-08-17  Diego Novillo  <dnovillo@google.com>

		PR bootstrap/54281
		* configure.ac: Add libintl.h to AC_CHECK_HEADERS list.
		* config.in: Regenerate.
		* configure: Regenerate.
		* intl.h: Always include libintl.h if HAVE_LIBINTL_H is
		set.

2013-05-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR tree-optimization/57200
	* tree-ssa-loop-niter.c (do_warn_aggressive_loop_optimizations):
	Only call inform if the preceding warning_at returns true.

2013-05-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57149
	* tree-ssa-uninit.c (uninit_undefined_value_p): New inline.
	(can_skip_redundant_opnd, compute_uninit_opnds_pos,
	collect_phi_def_edges, execute_late_warn_uninitialized): Use
	uninit_undefined_value_p instead of ssa_undefined_value_p.

	PR debug/57184
	* expr.c (expand_expr_addr_expr_1): Handle COMPOUND_LITERAL_EXPR
	for modifier == EXPAND_INITIALIZER.

2013-05-07  Richard Biener  <rguenther@suse.de>

	Backport from mainline
	2013-05-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57185
	* tree-parloops.c (add_field_for_reduction): Handle anonymous
	SSA names properly.

	2013-04-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/57000
	* tree-ssa-reassoc.c (pass_reassoc): Add TODO_update_ssa_only_virtuals.

2013-05-06  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport from trunk
	2013-05-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/57150
	* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode
	to save TFmode registers and DImode to save TImode registers for
	caller save operations.
	(HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to
	mark being partially clobbered since they only use the first
	double word.

	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode
	and TDmode only use the upper 64-bits of each VSX register.

2013-05-06  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/57108
	* config/sh/sh.md (tstsi_t_zero_extract_eq): Use QIHISIDI mode iterator.

2013-05-06  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-05-06  Uros Bizjak  <ubizjak@gmail.com>

	PR target/57106
	* config/i386/i386.c (add_parameter_dependencies): Add dependence
	between "first_arg" and "insn", not "last" and "insn".

2013-05-03  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/57130
	* combine.c (make_compound_operation) <case SUBREG>: Pass
	SET instead of COMPARE as in_code to the recursive call
	if needed.

	Backported from mainline
	2013-04-26  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57051
	* fold-const.c (const_binop): Handle VEC_LSHIFT_EXPR
	and VEC_RSHIFT_EXPR if shift count is a multiple of element
	bitsize.

	2013-04-12  Marc Glisse  <marc.glisse@inria.fr>

	* fold-const.c (fold_binary_loc): Call const_binop also for mixed
	vector-scalar operations.

2013-05-03  Marek Polacek  <polacek@redhat.com>

	Backport from mainline
	2013-04-25  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/57066
	* builtins.c (fold_builtin_logb): Return +Inf for -Inf.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	* lra-constraints.c (process_alt_operands): Add checking alt
	number to choose the best alternative.

	2013-05-01  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/57091
	* lra-constraints.c (best_small_class_operands_num): Remove.
	(process_alt_operands): Remove small_class_operands_num.  Take
	small classes operands into losers and only if the operand is not
	matched.  Modify debugging output.
	(curr_insn_transform): Remove best_small_class_operands_num.
	Print insn name.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-04-29  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/57097
	* lra-constraints.c (process_alt_operands): Discourage a bit more
	using memory for pseudos.  Print cost dump for alternatives.
	Modify cost values for conflicts with early clobbers.
	(curr_insn_transform): Spill pseudos reassigned to NO_REGS.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-04-24  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimizations/57046
	* lra-constraints (split_reg): Set up lra_risky_transformations_p
	for multi-reg splits.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-04-22  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/57018
	* lra-eliminations.c (mark_not_eliminable): Prevent elimination of
	a set sp if no stack realignment.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-04-18  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56999
	* lra-coalesce.c (coalescable_pseudo_p): Remove 2nd parameter and
	related code.
	(lra_coalesce): Remove split_origin_bitmap and related code.
	* lra.c (lra): Coalesce after undoing inheritance. Recreate live
	ranges if necessary.

2013-05-02  Vladimir Makarov  <vmakarov@redhat.com>

	Backport from mainline
	2013-04-19  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56847
	* lra-constraints.c (process_alt_operands): Discourage alternative
	with non-matche doffsettable memory constraint fro memory with
	known offset.

2013-05-02  Ian Bolton  <ian.bolton@arm.com>

	Backport from mainline
	2013-03-28  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64.md (aarch64_can_eliminate): Keep frame
	record only when desired or required.

2013-04-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57104
	* tsan.c (instrument_expr): Don't instrument accesses to
	DECL_HARD_REGISTER VAR_DECLs.

2013-04-30  Uros Bizjak  <ubizjak@gmail.com>

	Backport from mainline
	2013-04-29  Uros Bizjak  <ubizjak@gmail.com>

	PR target/44578
	* config/i386/i386.md (*zero_extendsidi2_rex64): Add "!" to m->?*y
	alternative.
	(*zero_extendsidi2): Ditto.

	Backport from mainline
	2013-04-29  Uros Bizjak  <ubizjak@gmail.com>

	PR target/57098
	* config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory.

2013-04-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/57103
	* tree-cfg.c (move_stmt_op): Fix condition under which to update
	TREE_BLOCK.
	(move_stmt_r): Remove redundant checking.

2013-04-29  Christian Bruel  <christian.bruel@st.com>

	PR target/57108
	* sh.md (tstsi_t_zero_extract_eq): Set mode for operand 0.

2013-04-29  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/57083
	* tree-vrp.c (extract_range_from_binary_expr_1): For LSHIFT_EXPR with
	non-singleton shift count range, zero extend low_bound for uns case.

2013-04-28  Eric Botcazou  <ebotcazou@gcc.gnu.org>

	* stor-layout.c (finalize_size_functions): Allocate a structure and
	reset cfun before dumping the functions.

2013-04-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/56866
	* config/i386/i386.c (ix86_expand_mul_widen_evenodd): Don't
	use xop_pmacsdqh if uns_p.
	* config/i386/sse.md (xop_rotr<mode>3): Fix up computation of
	the immediate rotate count.

2013-04-25  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/57003
	* regcprop.c (copyprop_hardreg_forward_1): If ksvd.ignore_set_reg,
	call note_stores with kill_clobbered_value callback again after
	killing regs_invalidated_by_call.

2013-04-25  Ian Bolton  <ian.bolton@arm.com>

	Backported from mainline.
	2013-03-22  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64.c (aarch64_print_operand): New
	format specifier for printing a constant in hex.
	* config/aarch64/aarch64.md (insv_imm<mode>): Use the X
	format specifier for printing second operand.

2013-04-24  James Greenhalgh  <james.greenhalgh@arm.com>

	Backported from mainline.
	2013-04-24  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/arm_neon.h (vld1<q>_lane*): Fix constraints.
	(vld1<q>_dup_<sufp><8, 16, 32, 64>): Likewise.
	(vld1<q>_<sufp><8, 16, 32, 64>): Likewise.

2013-04-24  Greta Yorsh  <Greta.Yorsh@arm.com>

	Backported from mainline.
	PR target/56797
	* config/arm/arm.c (load_multiple_sequence): Require SP
	as base register for loads if SP is in the register list.

2013-04-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	    Steven Bosscher <steven@gcc.gnu.org>

	Backported from mainline.
	PR rtl-optimization/56605
	* loop-iv.c (implies_p): Handle equal RTXs and subregs.

2013-04-22  Marek Polacek  <polacek@redhat.com>

	Backported from mainline.
	2013-04-22  Marek Polacek  <polacek@redhat.com>

	PR sanitizer/56990
	* tsan.c (instrument_expr): Don't instrument expression
	in case its size is zero.

2013-04-22  Yufeng Zhang  <yufeng.zhang@arm.com>

	Backported from mainline.
	2013-04-10  Yufeng Zhang  <yufeng.zhang@arm.com>
	* config/aarch64/aarch64.c (aarch64_print_extension): New function.
	(aarch64_start_file): Use the new function.

2013-04-18  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56984
	* tree-vrp.c (register_edge_assert_for_2): For (x >> M) < N
	and (x >> M) >= N don't register any assertion if N << M is the
	minimum value.

2013-04-17  David Edelsohn  <dje.gcc@gmail.com>

	PR target/56948
	* config/rs6000/vsx.md (vsx_mov<mode>): Add j->r alternative.

2013-04-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56962
	* gimple-ssa-strength-reduction.c (record_increment): Only set
	initializer if gimple_assign_rhs_code is {,POINTER_}PLUS_EXPR and
	either rhs1 or rhs2 is equal to c->base_expr.

2013-04-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* emit-rtl.c (reset_all_used_flags): New function.
	(verify_rtl_sharing): Call reset_all_used_flags before and after
	performing the checks.

2013-04-15  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/56890
	* config/sparc/sparc.c (enum sparc_mode_class): Add H_MODE value.
	(S_MODES): Set H_MODE bit.
	(SF_MODES): Set only S_MODE and SF_MODE bits.
	(DF_MODES): Set SF_MODES and only D_MODE and DF_MODE bits.
	(sparc_init_modes) <MODE_INT>: Set H_MODE bit for sub-word modes.
	<MODE_VECTOR_INT>: Do not set SF_MODE for sub-word modes.
	<MODE_FLOAT>: Likewise.

2013-04-12  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/56903
	* config/i386/i386.c (ix86_hard_regno_mode_ok): Add
	lra_in_progress for return.

2013-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56918
	PR tree-optimization/56920
	* fold-const.c (int_const_binop_1): Use op1.mul_with_sign (op2, ...)
	instead of op1 - op2.  Pass 2 * TYPE_PRECISION (type) as second
	argument to rshift method.

2013-04-12  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* ifcvt.c (end_ifcvt_sequence): Mark a and b for unsharing as
	well.

2013-04-11  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/48184
	* params.def (PARAM_ALIGN_THRESHOLD): Increase the minimum
	value to 1.

2013-04-11  James Greenhalgh  <james.greenhalgh@arm.com>

	Backported from mainline.
	2013-04-11  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Fix
	floating-point vector comparisons against 0.

2013-04-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56899
	* fold-const.c (extract_muldiv_1): Apply distributive law
	only if TYPE_OVERFLOW_WRAPS (ctype).

2013-04-10  David S. Miller  <davem@davemloft.net>

	* config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=supersparc
	or -mcpu=hypersparc.

2013-04-10  Jakub Jelinek  <jakub@redhat.com>

	Backported from mainline
	2013-04-09  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56883
	* omp-low.c (expand_omp_for_generic, expand_omp_for_static_nochunk,
	expand_omp_for_static_chunk): Use simple_p = true in
	force_gimple_operand_gsi calls when assigning to addressable decls.

2013-04-09  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/48762
	* params.def (PARAM_MAX_CSE_INSNS): Increase the minimum
	value to 1.

2013-04-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_expand_insv): Only accept insertions
	within mode size.

2013-04-08  Marek Polacek  <polacek@redhat.com>

	PR rtl-optimization/48182
	* params.def (PARAM_MIN_CROSSJUMP_INSNS): Increase the minimum
	value to 1.

2013-04-06  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR target/55487
	* config/pa/pa.c (legitimize_pic_address): Before incrementing label
	nuses, make sure we have a label.

2013-04-04  Ian Lance Taylor  <iant@google.com>

	Backport from mainline:
	* doc/standards.texi (Standards): The Go frontend supports the Go
	1 language standard.

2013-04-04  Marek Polacek  <polacek@redhat.com>

	Backport from mainline:
	2013-04-04  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/48186
	* predict.c (maybe_hot_frequency_p): Return false if
	HOT_BB_FREQUENCY_FRACTION is 0.
	(cgraph_maybe_hot_edge_p): Likewise.

2013-04-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	Backport from mainline:
	2013-03-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/56720
	* config/arm/iterators.md (v_cmp_result): New mode attribute.
	* config/arm/neon.md (vcond<mode><mode>): Handle unordered cases.

2013-04-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56837
	* tree-loop-distribution.c (classify_partition): For non-zero
	values require that the value has the same precision as its
	mode to be useful as memset value.

2013-04-03  Roland McGrath  <mcgrathr@google.com>

	Backport from mainline:
	2013-03-26  Roland McGrath  <mcgrathr@google.com>

	* config/arm/arm.c (arm_print_operand: case 'w'): Use fputs rather
	than fprintf with a non-constant, non-format string.

2013-04-03  Marek Polacek  <polacek@redhat.com>

	Backport from mainline:
	2013-04-03  Marek Polacek  <polacek@redhat.com>

	PR sanitizer/55702
	* tsan.c (instrument_func_exit): Allow BUILT_IN_RETURN
	functions.

2013-04-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56817
	* tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely):
	Split out ...
	(tree_unroll_loops_completely_1): ... new function to manually
	walk the loop tree, properly defering outer loops of unrolled
	loops to later iterations.

2013-04-02  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/56745
	* ifcvt.c (cond_exec_find_if_block): Don't try to optimize
	if then_bb has no successors and else_bb is EXIT_BLOCK_PTR.

2013-04-02  Wei Mi  <wmi@google.com>

	* config/i386/i386.c (ix86_rtx_costs): Set proper rtx cost for
	ashl<mode>3_mask, *<shift_insn><mode>3_mask and
	*<rotate_insn><mode>3_mask in i386.md.

2013-04-01  Wei Mi  <wmi@google.com>

	* config/i386/i386.md (*ashl<mode>3_mask): Rewrite as define_insn.
	Truncate operand 2 using %b asm operand modifier.
	(*<shift_insn><mode>3_mask): Ditto.
	(*<rotate_insn><mode>3_mask): Ditto.

2013-04-01  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*movsf_internal): Change type of
	alternatives 3,4 to imov.

2013-03-29  Paolo Carlini  <paolo.carlini@oracle.com>

	PR lto/56777
	* doc/invoke.texi ([-fwhole-program]): Fix typo.

2013-03-29  Kirill Yukhin  <kirill.yukhin@intel.com>

	* config/i386/avx2intrin.h (_mm256_broadcastsi128_si256):
	Fix declaration name.

2013-03-28  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/invoke.texi (AVR Options): Tweak link for AVR-LibC user manual.
	* doc/extend.texi (Named Address Spaces): Ditto.
	(Variable Attributes): Ditto.

2013-03-28  Eric Botcazou  <ebotcazou@adacore.com>

	* toplev.c (process_options): Do not disable -fomit-frame-pointer on a
	general basis if unwind info is requested and ACCUMULATE_OUTGOING_ARGS
	is not enabled.

2013-03-27  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (tilegx_expand_prologue): Avoid
	double-decrement of next_scratch_regno.

2013-03-27  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.md (insn_v1mulu): Fix predicates on
	input operands.
	(insn_v1mulus): Ditto.
	(insn_v2muls): Ditto.

2013-03-27  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.h (ASM_OUTPUT_ADDR_VEC_ELT): Delete
	extra tab.
	(ASM_OUTPUT_ADDR_DIFF_ELT): Ditto.

2013-03-27  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.md (*sibcall_insn): Fix type atribute for jr.
	(*sibcall_value): Ditto.

2013-03-27  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-27  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.md (insn_mnz_<mode>): Replaced by ...
	(insn_mnz_v8qi): ... this ...
	(insn_mnz_v4hi): ... and this.  Replace (const_int 0) with the
	vector equivalent.
	(insn_v<n>mnz): Replaced by ...
	(insn_v1mnz): ... this ...
	(insn_v2mnz): ... and this.  Replace (const_int 0) with the vector
	equivalent.
	(insn_mz_<mode>): Replaced by ...
	(insn_mz_v8qi): ... this ...
	(insn_mz_v4hi): ... and this.  Replace (const_int 0) with the
	vector equivalent.
	(insn_v<n>mz): Replaced by ...
	(insn_v1mz): ... this ...
	(insn_v2mz): ... and this.  Replace (const_int 0) with the vector
	equivalent.

2013-03-26  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (SPARC options): Remove -mlittle-endian.

2013-03-26  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/rtems.opt: Add -pthread option.

2013-03-26  Sofiane Naci  <sofiane.naci@arm.com>

	* config/aarch64/aarch64.c (aarch64_classify_address): Support
	PC-relative load in SI modes and above only.

2013-03-26  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-26  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define.
	* config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define.

2013-03-26  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
	TILEGX_INSN_SHUFFLEBYTES1.
	* config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
	shufflebytes1.
	(tilegx_builtins): Ditto.
	* config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.

2013-03-26  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (expand_set_cint64_one_inst): Inline
	tests for constraint J, K, N, P.

2013-03-26  Walter Lee  <walt@tilera.com>

	Backport from mainline:
	2013-03-25  Walter Lee  <walt@tilera.com>

	* config/tilegx/tilegx.c (tilegx_asm_preferred_eh_data_format):
	Use indirect/pcrel encoding.
	* config/tilepro/tilepro.c (tilepro_asm_preferred_eh_data_format):
	Ditto.

2013-03-25  Richard Biener  <rguenther@suse.de>

	PR middle-end/56694
	* tree-eh.c (lower_eh_must_not_throw): Strip BLOCKs from the
	must-not-throw stmt location.

2012-03-22  Jakub Jelinek  <jakub@redhat.com>

	* BASE-VER: Set to 4.8.1.
	* DEV-PHASE: Set to prerelease.

2013-03-22  Release Manager

	* GCC 4.8.0 released.

2013-03-21  Walter Lee  <walt@tilera.com>

	* config/tilegx/sync.md (atomic_test_and_set): New pattern.

2013-03-21  Mark Wielaard  <mjw@redhat.com>

	* dwarf2out.c (size_of_aranges): Skip DECL_IGNORED_P functions.

2013-03-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56661
	* tree-ssa-sccvn.c (visit_use): Only value-number calls if
	the result does not have to be distinct.

2013-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56635
	* tree-ssa-phiopt.c (cond_if_else_store_replacement_1): Give up
	if lhs of then_assign and else_assign don't have compatible types.

2013-03-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/56640
	* config/arm/arm.h (REG_CLASS_NAMES): Add "SFP_REG" and "AFP_REG"
	class names.  Remove trailing comma after "ALL_REGS".

2013-03-16  Jakub Jelinek  <jakub@redhat.com>

	* DEV-PHASE: Set to prerelease.

2013-03-14  Andi Kleen  <ak@linux.intel.com>

	PR target/56619
	* doc/extend.texi: Document __ATOMIC_HLE_ACQUIRE,
	__ATOMIC_HLE_RELEASE. Document __builtin_ia32 TSX intrincs.
	Document _x* TSX intrinsics.

2013-03-14  Edgar E. Iglesias <edgar.iglesias@xilinx.com>
	    David Holsgrove <david.holsgrove@xilinx.com>

	* configure.ac: Add MicroBlaze TLS support detection.
	* configure: Regenerate.
	* config/microblaze/microblaze-protos.h
	(microblaze_cannot_force_const_mem, microblaze_tls_referenced_p,
	symbol_mentioned_p, label_mentioned_p): Add prototypes.
	* config/microblaze/microblaze.c (microblaze_address_type): Add
	ADDRESS_TLS and tls_reloc address types.
	(microblaze_address_info): Add tls_reloc.
	(TARGET_HAVE_TLS): Define.
	(get_tls_get_addr, microblaze_tls_symbol_p, microblaze_tls_operand_p_1,
	microblaze_tls_referenced_p, microblaze_cannot_force_const_mem,
	symbol_mentioned_p, label_mentioned_p, tls_mentioned_p,
	load_tls_operand, microblaze_call_tls_get_addr,
	microblaze_legitimize_tls_address): New functions.
	(microblaze_classify_unspec): Handle UNSPEC_TLS.
	(get_base_reg): Use microblaze_tls_symbol_p.
	(microblaze_classify_address): Handle TLS.
	(microblaze_legitimate_pic_operand): Use symbol_mentioned_p,
	label_mentioned_p and microblaze_tls_referenced_p.
	(microblaze_legitimize_address): Handle TLS.
	(microblaze_address_insns): Handle ADDRESS_TLS.
	(pic_address_needs_scratch): Handle TLS.
	(print_operand_address): Handle TLS.
	(microblaze_expand_prologue): Check TLS_NEEDS_GOT.
	(microblaze_expand_move): Handle TLS.
	(microblaze_legitimate_constant_p): Check
	microblaze_cannot_force_const_mem and microblaze_tls_symbol_p.
	(TARGET_CANNOT_FORCE_CONST_MEM): Define.
	* config/microblaze/microblaze.h (TLS_NEEDS_GOT): Define
	(PIC_OFFSET_TABLE_REGNUM): Set.
	* config/microblaze/linux.h (TLS_NEEDS_GOT): Define.
	* config/microblaze/microblaze.md (UNSPEC_TLS): Define.
	(addsi3, movsi_internal2, movdf_internal): Update constraints
	* config/microblaze/predicates.md (arith_plus_operand): Define
	(move_operand): Redefine as move_src_operand, check
	microblaze_tls_referenced_p.

2013-03-14  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64.md: (*and<mode>3nr_compare0): Use CC_NZ.
	(*and_<SHIFT:optab><mode>3nr_compare0): Likewise.

2013-03-14  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64.c (aarch64_select_cc_mode): Return correct
	CC mode for AND.

2013-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/53265
	* common.opt (Waggressive-loop-optimizations): New option.
	* tree-ssa-loop-niter.c: Include tree-pass.h.
	(do_warn_aggressive_loop_optimizations): New function.
	(record_estimate): Call it.  Don't add !is_exit bounds to loop->bounds
	if number_of_latch_executions returned constant.
	(estimate_numbers_of_iterations_loop): Call number_of_latch_executions
	early.  If number_of_latch_executions returned constant, set
	nb_iterations_upper_bound back to it.
	* cfgloop.h (struct loop): Add warned_aggressive_loop_optimizations
	field.
	* Makefile.in (tree-ssa-loop-niter.o): Depend on $(TREE_PASS_H).
	* doc/invoke.texi (-Wno-aggressive-loop-optimizations): Document.

	* config/aarch64/t-aarch64-linux (MULTARCH_DIRNAME): Remove.
	(MULTILIB_OSDIRNAMES): Set.
	* genmultilib: If defaultosdirname doesn't start with :: , set
	defaultosdirname2 instead, clear it and emit two . multilib_raw
	entries instead of just one.

2013-03-14  Kaz Kojima  <kkojima@gcc.gnu.org>

	* config/sh/linux.h (TARGET_DEFAULT): Remove MASK_USERMODE.
	(SUBTARGET_OVERRIDE_OPTIONS): Set TARGET_USERMODE as default.
	* config/sh/netbsd-elf.h (TARGET_DEFAULT): Remove MASK_USERMODE.
	(SUBTARGET_OVERRIDE_OPTIONS): New.

2013-03-13  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/49880
	* config/sh/sh.opt (FPU_SINGLE_ONLY): New mask.
	(musermode): Convert to Var(TARGET_USERMODE).
	* config/sh/sh.h (SELECT_SH2A_SINGLE_ONLY, SELECT_SH4_SINGLE_ONLY,
	MASK_ARCH): Add MASK_FPU_SINGLE_ONLY.
	* config/sh/sh.c (sh_option_override): Use
	TARGET_FPU_DOUBLE || TARGET_FPU_SINGLE_ONLY for call-fp case.
	* config/sh/sh.md (udivsi3_i1, divsi3_i1): Remove ! TARGET_SH4
	condition.
	(udivsi3_i4, divsi3_i4): Use TARGET_FPU_DOUBLE condition instead of
	TARGET_SH4.
	(udivsi3_i4_single, divsi3_i4_single): Use
	TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE instead of TARGET_HARD_SH4.

2013-03-13  Dave Korn  <dave.korn.cygwin@....>

	* config/i386/cygwin.h (SHARED_LIBGCC_SPEC): Make shared libgcc the
	default setting.

2013-03-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56608
	* tree-vect-slp.c (vect_schedule_slp): Do not remove scalar
	calls when vectorizing basic-blocks.

2013-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR plugins/45078
	* config.gcc: On arm, mips, sh and sparc add vxworks-dummy.h to
	tm_file.

2013-03-12  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (-Waddr-space-convert): Move into the table earlier.

2013-03-11  Jan Hubicka  <jh@suse.cz>

	PR lto/56557
	* lto-streamer-out.c (output_symbol_p): Skip references from
	constructors of external variables.

2013-03-11  Jan Hubicka  <jh@suse.cz>

	PR middle-end/56571
	* valtrack.c (cleanup_auto_inc_dec): Unshare clobbers originating
	from pseudos.
	* emit-rtl.c (verify_rtx_sharing): Likewise.
	(copy_insn_1): Likewise.
	* rtl.c (copy_rtx): Likewise.

2013-03-11  Georg-Johann Lay  <avr@gjlay.de>

	PR target/56591
	* config/avr/avr.c (avr_print_operand): Add space after '%c' in
	output_operand_lossage message.

2013-03-11  Richard Earnshaw  <rearnsha@arm.com>

	PR target/56470
	* arm.c (shift_op): Validate RTL pattern on the fly.
	(arm_print_operand, case 'S'): Don't use shift_operator to validate
	the RTL.

2013-03-10  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR target/56347
	* config/pa/pa.md (call_value): Check for calls to powf and direct to
	new call patterns that clobber %fr12.
	(call_val_powf, call_val_powf_pic, call_val_powf_64bit): New insn,
	split and postreload patterns.
	* config/pa/pa.c (pa_conditional_register_usage): Revert marking
	registers %fr12 and %fr12R as call used.

2013-03-09  Steven Bosscher  <steven@gcc.gnu.org>

	* dse.c (delete_dead_store_insn): Respect TDF_DETAILS.
	(canon_address, record_store, replace_read, check_mem_read_rtx,
	scan_insn, dse_step1, dse_step2_init, dse_step2_spill,
	dse_step4, dse_step5_nospill, dse_step5_spill, dse_step6,
	rest_of_handle_dse): Likewise.

2013-03-09  Richard Sandiford  <rdsandiford@googlemail.com>

	PR middle-end/56524
	* tree.h (tree_optimization_option): Rename target_optabs to optabs.
	Add base_optabs.
	(TREE_OPTIMIZATION_OPTABS): Update after previous field change.
	(TREE_OPTIMIZATION_BASE_OPTABS): New macro.
	(save_optabs_if_changed): Replace with...
	(init_tree_optimization_optabs): ...this.
	* optabs.c (save_optabs_if_changed): Rename to...
	(init_tree_optimization_optabs): ...this.  Take the optimization node
	as argument.  Do nothing if the base optabs are already correct.
	Reuse the existing TREE_OPTIMIZATION_OPTABS memory if we need
	to recompute optabs.
	* function.h (function): Remove optabs field.
	* function.c (invoke_set_current_function_hook): Call
	init_tree_optimization_optabs.  Use the result to initialize
	this_fn_optabs.

2013-02-27  Aldy Hernandez  <aldyh@redhat.com>

	* trans-mem.c (expand_transaction): Do not set PR_INSTRUMENTEDCODE
	if GTMA_HAS_NO_INSTRUMENTATION.
	(generate_tm_state): Keep GTMA_HAS_NO_INSTRUMENTATION bit.
	(ipa_tm_transform_transaction): Set GTMA_HAS_NO_INSTRUMENTATION.
	* gimple.h (GTMA_HAS_NO_INSTRUMENTATION): Define.
	* gimple-pretty-print.c (dump_gimple_transaction): Handle
	GTMA_HAS_NO_INSTRUMENTATION.

2013-03-08  Jakub Jelinek  <jakub@redhat.com>

	* config/gnu-user.h (LIBTSAN_EARLY_SPEC): Don't link against
	libasan_preinit.o.

2013-03-08  Marek Polacek  <polacek@redhat.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56478
	* predict.c (is_comparison_with_loop_invariant_p): Change the
	type of loop_step to tree.
	(predict_loops): Adjust.
	(predict_iv_comparison): Perform the computations on double_ints.

2013-03-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56570
	* tree-cfg.c (verify_expr_location_1): Verify locations for
	DECL_DEBUG_EXPR.
	* tree-sra.c (create_access_replacement): Strip locations
	from DECL_DEBUG_EXPRs.

2013-03-08  Richard Biener  <rguenther@suse.de>

	* tree-inline.c (expand_call_inline): Do not associate
	a BLOCK with the location in BLOCK_SOURCE_LOCATION.
	* tree-cfg.c (verify_location): Verify BLOCK_SOURCE_LOCATION.

2013-03-08  Richard Biener  <rguenther@suse.de>

	* tree-ssa-ter.c (is_replaceable_p): Do not TER across location
	or block changes with -Og.  Fix for location / block encoding
	changes and PHI arguments with locations.

2013-03-07  Steven Bosscher  <steven@gcc.gnu.org>

	* bitmap.c (struct bitmap_descriptor_d): Use unsigned HOST_WIDEST_INT
	for all counters.
	(struct output_info): Likewise.
	(register_overhead): Remove bad gcc_assert.
	(bitmap_find_bit): If there is only a single bitmap element, do not
	count a miss as a search.
	(print_statistics): Update for counter type changes.
	(dump_bitmap_statistics): Likewise.  Print headers such that they
	are properly lined up with the printed counters.

2013-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56559
	* tree-ssa-reassoc.c (zero_one_operation): When looking at rhs2,
	check that it has only a single use.

2013-03-07  Richard Biener  <rguenther@suse.de>

	* doc/invoke.texi (fwhole-program): Discourage use in combination
	with -flto.

2013-03-06  Jakub Jelinek  <jakub@redhat.com>

	* config/arm/t-arm (TM_H, OPTIONS_H_EXTRA): Add arm-cores.def.

	PR tree-optimization/56539
	* tree-tailcall.c (adjust_return_value_with_ops): Use GSI_SAME_STMT
	instead of GSI_CONTINUE_LINKING as last argument to
	force_gimple_operand_gsi.  Adjust function comment.

	* config/aarch64/t-aarch64 (TM_H, OPTIONS_H_EXTRA): Add
	aarch64-cores.def.

	PR middle-end/56548
	* expr.c (expand_cond_expr_using_cmove): When expanding cmove in
	promoted mode, convert the result back to the original mode.

2013-03-06  Richard Biener  <rguenther@suse.de>

	PR middle-end/56294
	* tree-into-ssa.c (insert_phi_nodes_for): Add dumping.
	(insert_updated_phi_nodes_compare_uids): New function.
	(update_ssa): Sort symbols_to_rename after UID before
	traversing it to insert PHI nodes.

2013-03-06  Richard Biener  <rguenther@suse.de>

	PR middle-end/50494
	* tree-vect-data-refs.c (vect_can_force_dr_alignment_p):
	Do not adjust alignment of DECL_IN_CONSTANT_POOL decls.

	Revert
	2013-02-13  Richard Biener  <rguenther@suse.de>

	PR lto/50494
	* varasm.c (output_constant_def_1): Get the decl representing
	the constant as argument.
	(output_constant_def): Wrap output_constant_def_1.
	(make_decl_rtl): Use output_constant_def_1 with the decl
	representing the constant.
	(build_constant_desc): Optionally re-use a decl already
	representing the constant.
	(tree_output_constant_def): Adjust.

2013-03-06  Joey Ye  <joey.ye@arm.com>

	PR lto/50293
	* gcc.c (convert_white_space): New function.
	(main): Handles white space in function name.

2013-03-06  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/56529
	* config/sh/sh.c (sh_option_override): Check for TARGET_DYNSHIFT
	instead of TARGET_SH2 for call-table case.  Do not set sh_div_strategy
	to SH_DIV_CALL_TABLE for TARGET_SH2.
	* config.gcc (sh_multilibs): Add m2 and m2a to sh*-*-linux* multilib
	list.
	* doc/invoke.texi (SH options): Document mdiv= call-div1, call-fp,
	call-table options.

2013-03-05  Sterling Augustine  <saugustine@google.com>
	    Cary Coutant  <ccoutant@google.com>

	PR debug/55364
	* dwarf2out.c (resolve_addr): Don't call
	remove_loc_list_addr_table_entries a second time for the same
	expression.

2013-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR debug/56510
	* cfgexpand.c (expand_debug_parm_decl): Call copy_rtx on incoming.
	(avoid_complex_debug_insns): New function.
	(expand_debug_locations): Call it.

	PR rtl-optimization/56484
	* ifcvt.c (noce_process_if_block): If else_bb is NULL, avoid extending
	lifetimes of hard registers on small register class machines.

2013-03-05  David Holsgrove  <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze-protos.h: Rename
	microblaze_is_interrupt_handler to microblaze_is_interrupt_variant.
	* config/microblaze/microblaze.c (microblaze_attribute_table): Add
	fast_interrupt.
	(microblaze_fast_interrupt_function_p): New function.
	(microblaze_is_interrupt_handler): Rename to
	microblaze_is_interrupt_variant and add fast_interrupt check.
	(microblaze_must_save_register): Use microblaze_is_interrupt_variant.
	(save_restore_insns): Likewise.
	(compute_frame_size): Likewise.
	(microblaze_function_prologue): Add FAST_INTERRUPT_NAME.
	(microblaze_globalize_label): Likewise.
	* config/microblaze/microblaze.h: Define FAST_INTERRUPT_NAME.
	* config/microblaze/microblaze.md: Use wrapper
	microblaze_is_interrupt_variant.

2013-03-05  Kai Tietz  <ktietz@redhat.com>

	* sdbout.c (sdbout_one_type): Switch to current function's section
	supporting cold/hot.

2013-03-05  David Holsgrove  <david.holsgrove@xilinx.com>

	* doc/invoke.texi (MicroBlaze): Add -mbig-endian, -mlittle-endian,
	-mxl-reorder.

2013-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* ggc-common.c (gt_pch_save): For ENABLE_VALGRIND_CHECKING,
	if VALGRIND_GET_VBITS is defined, temporarily make object
	memory all defined, and restore previous valgrind addressability
	and definability afterwards.  Free this_object at the end.

	PR middle-end/56461
	* lra.c (lra): Call lra_clear_live_ranges if live_p,
	right before calling lra_create_live_ranges, also call it
	when clearing live_p.  Only call lra_clear_live_ranges
	at the end if live_p.

	PR middle-end/56461
	* sched-deps.c (delete_dep_node): Free DEP_REPLACE.

2013-03-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56521
	* tree-ssa-sccvn.c (set_value_id_for_result): Always initialize
	value-id.

2013-03-05  Steven Bosscher  <steven@gcc.gnu.org>

	PR c++/55135
	* except.h (remove_unreachable_eh_regions): New prototype.
	* except.c (remove_eh_handler_splicer): New function, split out
	of remove_eh_handler.
	(remove_eh_handler): Use remove_eh_handler_splicer.  Add comment
	warning about running it on many EH regions one at a time.
	(remove_unreachable_eh_regions_worker): New function, walk the
	EH tree in depth-first order and remove non-marked regions.
	(remove_unreachable_eh_regions): New function.
	* tree-eh.c (mark_reachable_handlers): New function, split out
	from remove_unreachable_handlers.
	(remove_unreachable_handlers): Use mark_reachable_handlers and
	remove_unreachable_eh_regions.
	(remove_unreachable_handlers_no_lp): Use mark_reachable_handlers
	and remove_unreachable_eh_regions.

2013-03-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/56525
	* loop-init.c (fix_loop_structure): Remove loops in two stages,
	not freeing them until the end.

2013-03-05  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.h: Define DWARF2_ASM_LINE_DEBUG_INFO.

2013-03-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56270
	* tree-vect-slp.c (vect_schedule_slp): Clear vectorized stmts
	of loads after scheduling an SLP instance.

2013-03-05  Jakub Jelinek  <jakub@redhat.com>

	* Makefile.in (dg_target_exps): Add aarch64.exp, epiphany.exp and
	tic6x.exp.
	(check_gcc_parallelize): Run guality.exp as a separate job from
	vect.exp with unsorted.exp and $(dg_target_exps) separately from
	struct-layout-1.exp with stackalign.exp.

	* alias.c (init_alias_analysis): Clear reg_known_equiv_p bitmap.

	PR middle-end/56461
	* tree-vect-slp.c (vect_supported_load_permutation_p): Free
	load_index sbitmap even if some bit in it isn't set.

	PR middle-end/56461
	* tree-ssa-loop-niter.c (bb_queue): Remove typedef.
	(discover_iteration_bound_by_body_walk): Change queues to
	vec<vec<basic_block> > and queue to vec<basic_block>.  Fix up
	spelling in comment.  Call safe_push on queues[bound_index] directly.
	Release queues[queue_index] in every iteration unconditionally.
	Release bounds vector.

	PR middle-end/56461
	* tree-vect-stmts.c (free_stmt_vec_info_vec): Call
	free_stmt_vec_info on any left-over stmt_vec_info in the vector.
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Release
	inner_phis vector.

2013-03-05  Richard Biener  <rguenther@suse.de>

	PR lto/56515
	* tree-inline.c (remap_blocks_to_null): New function.
	(expand_call_inline): When expanding a call stmt without
	an associated block inline remap all callee blocks to NULL.

2013-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/56494
	* simplify-rtx.c (simplify_truncation): If C is narrower than A,
	optimize (truncate:A (subreg:B (truncate:C X) 0)) into
	(subreg:A (truncate:C X) 0) instead of (truncate:A X).

	PR middle-end/56461
	* sel-sched-ir.c (free_sched_pools): Release
	succs_info_pool.stack[succs_info_pool.max_top] vectors too
	if succs_info_pool.max_top isn't -1.

	PR bootstrap/56509
	* opts.c (opts_obstack, opts_concat): Moved to...
	* opts-common.c (opts_obstack, opts_concat): ... here.

2013-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* diagnostic.c (diagnostic_append_note): Save and restore old prefix.

2013-03-04  Martin Jambor  <mjambor@suse.cz>

	* tree-dfa.c (get_or_create_ssa_default_def): Use parameter fn in
	all appropriate places.

2013-01-04  Eric Botcazou  <ebotcazou@adacore.com>

	PR tree-optimization/56424
	* ipa-split.c (split_function): Do not set the RSO flag if result is
	not by reference and its type is a register type.

2013-03-04  David Holsgrove  <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.c (microblaze_valid_pic_const): New.
	(microblaze_legitimate_pic_operand): Likewise.
	* config/microblaze/microblaze.h (LEGITIMATE_PIC_OPERAND_P): Call
	new function microblaze_legitimate_pic_operand.
	* config/microblaze/microblaze-protos.h
	(microblaze_legitimate_pic_operand): Declare.

2013-03-04  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/predicates.md (call_insn_simple_operand):
	New predicate for supported rtx code types.
	* config/microblaze/microblaze.md (call_internal1): Use
	call_insn_simple_operand predicate.

2013-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* tree-loop-distribution.c (ldist_gen): Call partition_free after each
	partitions.ordered_remove.

	PR middle-end/56461
	* tree-vect-stmts.c (vectorizable_conversion): Don't call
	vec_oprnds0.create (1) for modifier == NONE.

	PR middle-end/56461
	* tree-vect-stmts.c (vectorizable_shift): Don't call create methods
	on vec_oprnds0 or vec_oprnds1 before loop, only call it on
	vec_oprnds1 right before pushing anything to it for
	scalar_shift_arg.

	PR middle-end/56461
	* tree-vect-loop.c (destroy_loop_vec_info): For !clean_stmts, just
	set nbbs to 0 instead of having separate code path.
	(vect_analyze_loop_form): Call destroy_loop_vec_info with true
	instead of false as last argument if returning NULL.

2013-03-03  Sandra Loosemore  <sandra@codesourcery.com>

	* target.def (TARGET_OPTION_VALID_ATTRIBUTE_P): Update comments;
	the attribute is now called "target" instead of "option".
	(TARGET_OPTION_PRAGMA_PARSE): Likewise, for the pragma.
	* doc/tm.texi.in (Target Attributes):  Likewise document the correct
	attribute/pragma name for TARGET_OPTION_VALID_P and
	TARGET_OPTION_PRAGMA_PARSE.  Also copy-edit and correct markup.
	* doc/tm.texi: Regenerated.

2013-03-02  David Holsgrove  <david.holsgrove@xilinx.com>

	* config/microblaze/microblaze.c:
	Check mcpu, pcmp requirement and set TARGET_REORDER to 0 if not met.
	* config/microblaze/microblaze.h: Add -mxl-reorder to
	DRIVER_SELF_SPECS.
	* config/microblaze/microblaze.md: New bswapsi2 and bswaphi2.
	instructions emitted if TARGET_REORDER.
	* config/microblaze/microblaze.opt: New option -mxl-reorder set to 1
	or 0 for -m/-mno case, but initialises as 2 to detect default use case
	separately.

2013-03-01  Xinliang David Li  <davidxl@google.com>

	* tree-ssa-uninit.c (compute_control_dep_chain): Limit post-dom
	walk length.

2013-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* tree-ssa-loop-ivcanon.c (tree_estimate_loop_size): Release path
	vector even when returning true.  Fix up function comment formatting.

	PR middle-end/56461
	* ira-build.c (ira_loop_nodes_count): New variable.
	(create_loop_tree_nodes): Initialize it.
	(finish_loop_tree_nodes): Use it instead of looking at current_loops.

	PR middle-end/56461
	* tree-vect-data-refs.c (vect_permute_store_chain): Avoid using copy
	method on dr_chain and result_chain.
	* tree-vect-stmts.c (vectorizable_store): Only call
	result_chain.create if j == 0.

	PR middle-end/56461
	* tree-vect-stmts.c (vect_create_vectorized_promotion_stmts): Call
	vec_oprnds0->release (); rather than vec_oprnds0->truncate (0)
	before overwriting it.

2013-03-01  Tobias Burnus  <burnus@net-b.de>

	* doc/extended.texi (C Extensions): Change order in @menu
	to match @node.
	(Other MIPS Built-in Functions): Move last MIPS entry before
	"picoChip Built-in Functions".
	(SH Built-in Functions): Move after RX Built-in Functions.
	* doc/gcc.texi (Introduction): Change order in @menu to match @node.
	* doc/md.texi (Constraints): Ditto.
	* gty.texi (Type Information): Ditto.
	(User-provided marking routines for template types): Make subsection.
	* doc/invoke.texi (AArch64 Options): Move before
	"Adapteva Epiphany Options".

2013-02-28  Konstantin Serebryany  <konstantin.s.serebryany@gmail.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/56454
	* asan.c (gate_asan): Lookup no_sanitize_address instead of
	no_address_safety_analysis attribute.
	* doc/extend.texi (no_address_safety_attribute): Rename to
	no_sanitize_address attribute, mention no_address_safety_analysis
	attribute as deprecated alias.

2013-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* tree-vectorizer.h (vect_get_slp_defs): Change 3rd argument
	type to vec<vec<tree> > *.
	* tree-vect-slp.c (vect_get_slp_defs): Likewise.  Change vec_defs
	to be vec<tree> instead of vec<tree> *, set vec_defs
	to vNULL and call vec_defs.create (number_of_vects), adjust other
	uses of vec_defs.
	* tree-vect-stmts.c (vect_get_vec_defs, vectorizable_call,
	vectorizable_condition): Adjust vect_get_slp_defs callers.

2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64.c
	(aarch64_float_const_representable): Remove unused variable.

2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64.c (aarch64_mangle_type): Make static.

2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_init_simd_builtins): Make static.

2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64.c
	(aarch64_simd_make_constant): Make static.

2013-02-28  Martin Jambor  <mjambor@suse.cz>

	* tree-sra.c (load_assign_lhs_subreplacements): Do not put replacements
	with no initialization to the RHS of debug statements.

2013-02-28  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/56294
	* tree-sra.c (analyze_access_subtree): Create replacement declarations.
	Adjust dumping.
	(get_access_replacement): Do not call create_access_replacement.
	Assert a replacement exists.
	(get_repl_default_def_ssa_name): Create the replacement declaration
	itself.

2013-02-28  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/arm.c (arm_output_mi_thunk): Call final_start_function and
	final_end_function.

2013-02-28  Marek Polacek  <polacek@redhat.com>

	PR rtl-optimization/56466
	* loop-unroll.c (unroll_and_peel_loops): Call fix_loop_structure
	if we're changing a loop.
	(peel_loops_completely): Likewise.

2013-02-28  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/55813
	* doc/invoke.texi ([-Wctor-dtor-privacy]): Complete.

2013-02-28  Georg-Johann Lay  <avr@gjlay.de>

	PR target/56445
	* config/avr/avr.c (avr_init_builtins): Use 'n' instead of empty
	macro parameters with: FX_FTYPE_FX, FX_FTYPE_FX_INT, INT_FTYPE_FX,
	INTX_FTYPE_FX, FX_FTYPE_INTX.
	* config/avr/builtins.def: Adjust respective DEF_BUILTIN.

2013-02-28  Georg-Johann Lay  <avr@gjlay.de>

	* avr/avr-mcus.def (ata5272, ata5505, attiny1634, ata6285)
	(ata6286, atmega8a, atmega48pa, ata5790, ata5790n, ata5795)
	(atmega164pa, atmega165pa, atmega168pa, atmega16hva, atmega16hvb)
	(atmega16hvbrevb, atmega16m1, atmega16u4, atmega26hvg, atmega32a)
	(atmega32a, atmega3250pa, atmega3290pa, atmega32c1, atmega32m1)
	(atmega32u4, atmega32u6, atmega64a, atmega6490a, atmega6490p)
	(atmega64c1, atmega64m1, atmega64rfa2, atmega64rfr2, atmega32hvb)
	(atmega32hvbrevb, atmega16hva2, atmega48hvf, at90pwm161)
	(atmega128a, atmega1284, atmxt112sl, atmxt224, atmxt224e)
	(atmxt336s, atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4)
	(atxmega32e5, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3)
	(atxmega64c3, atxmega64d4, atxmega128a3u, atxmega128b1)
	(atxmega128b3, atxmega128c3, atxmega128d4, atmxt540s, atmxt540sreva)
	(atxmega192a3u, atxmega192c3, atxmega256a3u, atxmega256c3)
	(atxmega384c3, atxmega384d3, atxmega128a4u): New AVR_MCU.
	(avrxmega6): Increase max flash segments from 5 to 6.
	* config/avr/t-multilib: Regenerate.
	* config/avr/avr-tables.opt: Regenerate.
	* doc/avr-mmcu.texi: Regenerate.

2013-02-28  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.h (device_to_arch): Rename to device_to_ld.
	(avr_device_to_arch): Rename to avr_device_to_ld.
	(avr_device_to_as): New prototype.
	(EXTRA_SPEC_FUNCTIONS): Add device_to_as.
	(ASM_SPEC): Use device_to_as to get -mmcu= and -mno-skip-bug=.
	* config/avr/driver-avr.c (avr_device_to_as): New.
	(avr_device_to_arch): Rename to avr_device_to_ld.

2013-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* tree-vect-data-refs.c (vect_permute_load_chain): Avoid using copy
	method on dr_chain and result_chain.

	PR middle-end/56461
	* tree-ssa-loop-niter.c (maybe_lower_iteration_bound): Call
	pointer_set_destroy on not_executed_last_iteration.

	PR middle-end/56461
	* tree-vect-loop.c (vectorizable_reduction): Release vect_defs vector.

	PR middle-end/56461
	* ipa-pure-const.c (propagate): Use FOR_EACH_FUNCTION instead of
	FOR_EACH_DEFINED_FUNCTION when freeing state.

	PR middle-end/56461
	* df-scan.c (df_insn_delete): Use df_scan_free_mws_vec before
	pool_free.
	(df_insn_rescan_debug_internal): Use df_scan_free_mws_vec before
	overwriting it.

	PR middle-end/56461
	* ipa-cp.c (decide_whether_version_node): Call vec_free on
	known_aggs[i].items and release known_aggs vector.

	PR middle-end/56461
	* ipa-reference.c (propagate): Free node_info even for alias nodes.

2013-02-27  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/microblaze.c (microblaze_emit_compare):
	Use xor for EQ/NE comparisions.
	* config/microblaze/microblaze.md (cstoresf4): Add constraints
	(cbranchsf4): Adjust operator to comparison_operator.

2013-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* tree-flow.h (edge_var_map_vector): Change into va_heap, vl_embed
	vector.
	* tree-ssa.c (redirect_edge_var_map_add): Use vec_safe_reserve and
	vec_safe_push, always update *slot.
	(redirect_edge_var_map_clear): Use vec_free.
	(redirect_edge_var_map_dup): Use vec_safe_copy and vec_safe_reserve.
	(free_var_map_entry): Use vec_free.
	* tree-cfgcleanup.c (remove_forwarder_block_with_phi): Use
	FOR_EACH_VEC_SAFE_ELT instead of FOR_EACH_VEC_ELT.

2013-02-27  Andrey Belevantsev  <abel@ispras.ru>

	PR middle-end/45472
	* sel-sched-ir.c (merge_expr): Also change vinsn of merged expr
	when the may_trap_p bit of the exprs being merged differs.
	Reorder tests for speculativeness in the logical and operator.

2013-02-27  Jakub Jelinek  <jakub@redhat.com>

	* incpath.c (add_standard_paths): Use reconcat instead of concat
	where appropriate and avoid leaking memory.

	* opts.h: Include obstack.h.
	(opts_concat): New prototype.
	(opts_obstack): New declaration.
	* opts.c (opts_concat): New function.
	(opts_obstack): New variable.
	(init_options_struct): Call gcc_init_obstack on opts_obstack.
	(finish_options): Use opts_concat instead of concat
	and XOBNEWVEC instead of XNEWVEC.
	* opts-common.c (generate_canonical_option, decode_cmdline_option,
	generate_option): Likewise.
	* Makefile.in (OPTS_H): Depend on $(OBSTACK_H).
	* lto-wrapper.c (main): Call gcc_init_obstack on opts_obstack.

	PR target/56455
	* stmt.c (expand_switch_as_decision_tree_p): If flag_pic
	and ASM_OUTPUT_ADDR_DIFF_ELT isn't defined, return true.

2013-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56461
	* lra-spills.c (lra_spill): Free spill_hard_reg at the end.

2013-02-26  Joern Rennecke  <joern.rennecke@embecosm.com>

	* config/arm/arm.c (const_ok_for_dimode_op): Back out last change.
	(arm_block_move_unaligned_straight): Likewise.
	(arm_adjust_block_mem): Likewise.

2013-02-26  Joern Rennecke  <joern.rennecke@embecosm.com>

	PR target/48901
	* config/lm32/lm32.c (gen_int_relational): Remove unused variables
	temp, cond and label.
	* config/lm32/lm32.md (ashlsi3): Remove unused variable one.

	PR target/52500
	* config/c6x/c6x.c (dbx_register_map): Change to unsigned.
	* config/c6x/c6x.h (dbx_register_map): Update declaration.

	PR target/52501
	* config/cr16/cr16-protos.h: Move end of RTX_CODE guard below end
	of prologue/epilogue functions.

	PR target/52550
	* config/tilegx/tilegx.c (tilegx_expand_prologue):
	Remove unused variable cfa_offset.
	* config/tilepro/tilepro.c (tilepro_expand_prologue): Likewise.

	PR target/54639
	* config/mn10300/mn10300.c (mn10300_expand_epilogue): Avoid offset
	type promotion to unsigned.

	PR target/54640
	* config/arm/arm.c (const_ok_for_dimode_op): Make code consistent
	for HOST_WIDE_INT of 32 bit / same size as int.
	(arm_block_move_unaligned_straight): Likewise.
	(arm_adjust_block_mem): Likewise.

	PR target/54662
	* config/mep/t-mep (mep-pragma.o): Use ALL_COMPILERFLAGS instead of
	ALL_CFLAGS.

2013-02-26  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/56426
	* tree-ssa-loop.c (tree_ssa_loop_init): Always call
	scev_initialize.

2013-02-26  Richard Biener  <rguenther@suse.de>

	PR target/56444
	* config/mn10300/mn10300.c (mn10300_scan_for_setlb_lcc): Remove
	unused variable loops.

2013-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56448
	* fold-const.c (operand_equal_p) <case tcc_reference>: Don't look at
	TREE_SIDE_EFFECTS if flags contain OEP_CONSTANT_ADDRESS_OF.
	Clear OEP_CONSTANT_ADDRESS_OF from flags before recursing on second or
	later operands of the references, or even first operand for
	INDIRECT_REF, TARGET_MEM_REF or MEM_REF.

	PR tree-optimization/56443
	* tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): For
	overaligned types, pass TYPE_UNSIGNED (scalar_type) as second argument
	to type_for_mode langhook.

2013-02-25  Matt Turner  <mattst88@gmail.com>

	* doc/invoke.texi: Document r4700.

2013-02-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56175
	* tree-ssa-forwprop.c (hoist_conversion_for_bitop_p): New predicate,
	split out from ...
	(simplify_bitwise_binary): ... here.  Also guard the conversion
	of (type) X op CST to (type) (X op ((type-x) CST)) with it.

2013-02-25  Catherine Moore  <clm@codesourcery.com>

	Revert:
	2013-02-24  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Tom de Vries  <tom@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>
	    Iain Sandoe  <iain@codesourcery.com>
	    Nathan Froyd  <froydnj@codesourcery.com>
	    Chao-ying Fu  <fu@mips.com>

	* doc/extend.texi (micromips, nomicromips, nocompression):
	Document new function attributes.
	* doc/invoke.texi (minterlink-compressed, mmicromips,
	m14k, m14ke, m14kec): Document new options.
	(minterlink-mips16): Update documentation.
	* doc/md.texi (ZC, ZD): Document new constraints.
	* configure.ac (gcc_cv_as_micromips): Check if linker
	supports the .set micromips directive.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/micromips.md: New file.
	* constraints.md (ZC, AD): New constraints.
	* config/mips/predicates.md (movep_src_register): New predicate.
	(movep_src_operand): New predicate.
	(non_volatile_mem_operand): New predicate.
	* config/mips/mips.md (multimem): New type.
	(length): Differentiate between 17-bit and 18-bit branch offsets.
	(MOVEP1, MOVEP2): New mode iterator.
	(mov_<load>l): Use ZC constraint.
	(mov_<load>r): Likewise.
	(mov_<store>l): Likewise.
	(mov_<store>r): Likewise.
	(*branch_equality<mode>_inverted): Add microMIPS support.
	(*branch_equality<mode>): Likewise.
	(*jump_absolute): Likewise.
	(indirect_jump_<mode>): Likewise.
	(tablejump_<mode>): Likewise.
	(<optab>_internal): Likewise.
	(sibcall_internal): Likewise.
	(sibcall_value_internal): Likewise.
	(prefetch): Use constraint ZD.
	* config/mips/mips.opt (minterlink-compressed): New option.
	(minterlink-mips16): Now an alias for minterlink-compressed.
	(mmicromips): New option.
	* config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint.
	(compare_and_swap_12): Likewise.
	(sync_add<mode>): Likewise.
	(sync_<optab>_12): Likewise.
	(sync_old_<optab>_12): Likewise.
	(sync_new_<optab>_12): Likewise.
	(sync_nand_12): Likewise.
	(sync_old_nand_12): Likewise.
	(sync_new_nand_12): Likewise.
	(sync_sub<mode>): Likewise.
	(sync_old_add<mode>): Likewise.
	(sync_old_sub<mode>): Likewise.
	(sync_new_add<mode>): Likewise.
	(sync_new_sub<mode>): Likewise.
	(sync_<optab><mode>): Likewise.
	(sync_old_<optab><mode>): Likewise.
	(sync_new_<optab><mode>): Likewise.
	(sync_nand<mode>): Likewise.
	(sync_old_nand<mode>): Likewise.
	(sync_new_nand<mode>): Likewise.
	(sync_lock_test_and_set<mode>): Likewise.
	(test_and_set_12): Likewise.
	(atomic_compare_and_swap<mode>): Likewise.
	(atomic_exchange<mode>_llsc): Likewise.
	(atomic_fetch_add<mode>_llsc): Likewise.
	* config/mips/mips-cpus.def (m14kc, m14k): New processors.
	* config/mips/mips-protos.h (umips_output_save_restore): New prototype.
	(umips_save_restore_pattern_p): Likewise.
	(umips_load_store_pair_p): Likewise.
	(umips_output_load_store_pair): Likewise.
	(umips_movep_target_p): Likewise.
	(umips_12bit_offset_address_p): Likewise.
	* config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS.
	(mips_base_mips16): Rename this...
	(mips_base_compression_flags): ...to this. Update all uses.
	(mips_attribute_table): Add micromips, nomicromips and nocompression.
	(mips_mips16_decl_p): Delete.
	(mips_nomips16_decl_p): Delete.
	(mips_get_compress_on_flags): New function.
	(mips_get_compress_off_flags): New function.
	(mips_get_compress_mode): New function.
	(mips_get_compress_on_name): New function.
	(mips_get_compress_off_name): New function.
	(mips_insert_attributes): Support multiple compression types.
	(mips_merge_decl_attributes): Likewise.
	(umips_12bit_offset_address_p): New function.
	(mips_start_function_definition): Emit .set micromips directive.
	(mips_call_may_need_jalx_p): New function.
	(mips_function_ok_for_sibcall): Add microMIPS support.
	(mips_print_operand_punctuation): Support short delay slots and
	compact jumps.
	(umips_swm_mask, umips_swm_encoding): New.
	(umips_build_save_restore): New function.
	(mips_for_each_saved_gpr_and_fpr): Add microMIPS support.
	(was_mips16_p): Remove.
	(old_compression_mode): New.
	(mips_set_compression_mode): New function.
	(mips_set_current_function): Add microMIPS support.
	(mips_option_override): Likewise.
	(umips_save_restore_pattern_p): New function.
	(umips_output_save_restore): New function.
	(umips_load_store_pair_p_1): New function.
	(umips_load_store_pair_p): New function.
	(umips_output_load_store_pair_1): New function.
	(umips_output_load_store_pair): New function.
	(umips_movep_target_p) New function.
	(mips_prepare_pch_save): Add microMIPS support.
	* config/mips/mips.h (TARGET_COMPRESSION): New.
	(TARGET_CPU_CPP_BUILTINS): Update macro
	to use new compression flags and to support microMIPS.
	(MIPS_ISA_LEVEL_SPEC): Add m14k processors.
	(MIPS_ARCH_FLOAT_SPEC): Likewise.
	(ISA_HAS_LWXS): Include TARGET_MICROMIPS.
	(ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS.
	(ASM_SPEC): Support mmicromips and mno-micromips.
	(M16STORE_REG_P): New macro.
	(MIPS_CALL): Support TARGET_MICROMIPS.
	(MICROMIPS_J): New macro.
	(mips_base_mips16): Rename this...
	(mips_base_compression_flags): ...to this.
	(UMIPS_12BIT_OFFSET_P): New macro.
	* config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS.
	(MULTILIB_DIRNAMES): Likewise.

2013-02-25  Tom de Vries  <tom@codesourcery.com>

	PR rtl-optimization/56131
	* insn-notes.def (INSN_NOTE_BASIC_BLOCK): Update comment.
	* cfgrtl.c (delete_insn): Don't reorder NOTE_INSN_DELETED_LABEL and
	NOTE_INSN_BASIC_BLOCK if BLOCK_FOR_INSN == NULL.

2013-02-25  Tobias Burnus  <burnus@net-b.de>

	* doc/invoke.texi (-fsanitize=): Move from optimization
	to debugging options.

2013-02-25  Andrey Belevantsev  <abel@ispras.ru>

	* sched-deps.c (sched_analyze_insn): Fix typo in comment.

2013-02-25  Andrey Belevantsev  <abel@ispras.ru>
	    Alexander Monakov  <amonakov@ispras.ru>

	PR middle-end/56077
	* sched-deps.c (sched_analyze_insn): When reg_pending_barrier,
	flush pending lists also on non-jumps.  Adjust comment.

2013-02-24  Catherine Moore  <clm@codesourcery.com>
	    Maciej W. Rozycki  <macro@codesourcery.com>
	    Tom de Vries  <tom@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>
	    Iain Sandoe  <iain@codesourcery.com>
	    Nathan Froyd  <froydnj@codesourcery.com>
	    Chao-ying Fu  <fu@mips.com>

	* doc/extend.texi (micromips, nomicromips, nocompression):
	Document new function attributes.
	* doc/invoke.texi (minterlink-compressed, mmicromips,
	m14k, m14ke, m14kec): Document new options.
	(minterlink-mips16): Update documentation.
	* doc/md.texi (ZC, ZD): Document new constraints.
	* configure.ac (gcc_cv_as_micromips): Check if linker
	supports the .set micromips directive.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/micromips.md: New file.
	* constraints.md (ZC, AD): New constraints.
	* config/mips/predicates.md (movep_src_register): New predicate.
	(movep_src_operand): New predicate.
	(non_volatile_mem_operand): New predicate.
	* config/mips/mips.md (multimem): New type.
	(length): Differentiate between 17-bit and 18-bit branch offsets.
	(MOVEP1, MOVEP2): New mode iterator.
	(mov_<load>l): Use ZC constraint.
	(mov_<load>r): Likewise.
	(mov_<store>l): Likewise.
	(mov_<store>r): Likewise.
	(*branch_equality<mode>_inverted): Add microMIPS support.
	(*branch_equality<mode>): Likewise.
	(*jump_absolute): Likewise.
	(indirect_jump_<mode>): Likewise.
	(tablejump_<mode>): Likewise.
	(<optab>_internal): Likewise.
	(sibcall_internal): Likewise.
	(sibcall_value_internal): Likewise.
	(prefetch): Use constraint ZD.
	* config/mips/mips.opt (minterlink-compressed): New option.
	(minterlink-mips16): Now an alias for minterlink-compressed.
	(mmicromips): New option.
	* config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint.
	(compare_and_swap_12): Likewise.
	(sync_add<mode>): Likewise.
	(sync_<optab>_12): Likewise.
	(sync_old_<optab>_12): Likewise.
	(sync_new_<optab>_12): Likewise.
	(sync_nand_12): Likewise.
	(sync_old_nand_12): Likewise.
	(sync_new_nand_12): Likewise.
	(sync_sub<mode>): Likewise.
	(sync_old_add<mode>): Likewise.
	(sync_old_sub<mode>): Likewise.
	(sync_new_add<mode>): Likewise.
	(sync_new_sub<mode>): Likewise.
	(sync_<optab><mode>): Likewise.
	(sync_old_<optab><mode>): Likewise.
	(sync_new_<optab><mode>): Likewise.
	(sync_nand<mode>): Likewise.
	(sync_old_nand<mode>): Likewise.
	(sync_new_nand<mode>): Likewise.
	(sync_lock_test_and_set<mode>): Likewise.
	(test_and_set_12): Likewise.
	(atomic_compare_and_swap<mode>): Likewise.
	(atomic_exchange<mode>_llsc): Likewise.
	(atomic_fetch_add<mode>_llsc): Likewise.
	* config/mips/mips-cpus.def (m14kc, m14k): New processors.
	* config/mips/mips-protos.h (umips_output_save_restore): New prototype.
	(umips_save_restore_pattern_p): Likewise.
	(umips_load_store_pair_p): Likewise.
	(umips_output_load_store_pair): Likewise.
	(umips_movep_target_p): Likewise.
	(umips_12bit_offset_address_p): Likewise.
	* config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS.
	(mips_base_mips16): Rename this...
	(mips_base_compression_flags): ...to this. Update all uses.
	(mips_attribute_table): Add micromips, nomicromips and nocompression.
	(mips_mips16_decl_p): Delete.
	(mips_nomips16_decl_p): Delete.
	(mips_get_compress_on_flags): New function.
	(mips_get_compress_off_flags): New function.
	(mips_get_compress_mode): New function.
	(mips_get_compress_on_name): New function.
	(mips_get_compress_off_name): New function.
	(mips_insert_attributes): Support multiple compression types.
	(mips_merge_decl_attributes): Likewise.
	(umips_12bit_offset_address_p): New function.
	(mips_start_function_definition): Emit .set micromips directive.
	(mips_call_may_need_jalx_p): New function.
	(mips_function_ok_for_sibcall): Add microMIPS support.
	(mips_print_operand_punctuation): Support short delay slots and
	compact jumps.
	(umips_swm_mask, umips_swm_encoding): New.
	(umips_build_save_restore): New function.
	(mips_for_each_saved_gpr_and_fpr): Add microMIPS support.
	(was_mips16_p): Remove.
	(old_compression_mode): New.
	(mips_set_compression_mode): New function.
	(mips_set_current_function): Add microMIPS support.
	(mips_option_override): Likewise.
	(umips_save_restore_pattern_p): New function.
	(umips_output_save_restore): New function.
	(umips_load_store_pair_p_1): New function.
	(umips_load_store_pair_p): New function.
	(umips_output_load_store_pair_1): New function.
	(umips_output_load_store_pair): New function.
	(umips_movep_target_p) New function.
	(mips_prepare_pch_save): Add microMIPS support.
	* config/mips/mips.h (TARGET_COMPRESSION): New.
	(TARGET_CPU_CPP_BUILTINS): Update macro
	to use new compression flags and to support microMIPS.
	(MIPS_ISA_LEVEL_SPEC): Add m14k processors.
	(MIPS_ARCH_FLOAT_SPEC): Likewise.
	(ISA_HAS_LWXS): Include TARGET_MICROMIPS.
	(ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS.
	(ASM_SPEC): Support mmicromips and mno-micromips.
	(M16STORE_REG_P): New macro.
	(MIPS_CALL): Support TARGET_MICROMIPS.
	(MICROMIPS_J): New macro.
	(mips_base_mips16): Rename this...
	(mips_base_compression_flags): ...to this.
	(UMIPS_12BIT_OFFSET_P): New macro.
	* config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS.
	(MULTILIB_DIRNAMES): Likewise.

2013-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR target/52555
	* target-globals.c (save_target_globals): For init_reg_sets and
	target_reinit remporarily set this_fn_optabs to this_target_optabs.

2013-02-22  James Grennahlgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add copyright header.
	* config/aarch64/t-aarch64
	(aarch64-builtins.o): Depend on aarch64-simd-builtins.def.

2013-02-22  Vladimir Makarov  <vmakarov@redhat.com>

	PR inline-asm/56148
	* lra-constraints.c (process_alt_operands): Reload operand
	conflicting with earlier clobber only if no more other conflicting
	operands.

2013-02-22  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/56393
	* config/gnu-user.h (LIBASAN_EARLY_SPEC): Link in libasan_preinit.o
	if not linking a shared library.

2013-02-22  Seth LaForge  <sethml@google.com>

	* config.gcc (arm*-*-eabi*): Treat arm*eb as big-endian.

2013-02-22  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm.md (split for extendsidi): Update condition.
	(zero_extend<mode>di2,extend<mode>di2): Add an alternative.
	* config/arm/iterators.md (qhs_extenddi_cstr): Likewise.
	(qhs_zextenddi_cstr): Likewise.

2013-02-21  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56420
	* expmed.c (EXACT_POWER_OF_2_OR_ZERO_P): Do subtraction in uhwi, to
	avoid signed wrapping.
	(expand_mult): Handle properly multiplication by
	((dword_type) -1) << (BITS_PER_WORD - 1).  Improve multiplication by
	((dword_type) 1) << (BITS_PER_WORD - 1).  Avoid undefined behavior
	in the compiler if coeff is HOST_WIDE_INT_MIN.
	(expand_divmod): Don't make ext_op1 static, change it's type to uhwi.
	Avoid undefined behavior in -INTVAL (op1).

	PR rtl-optimization/50339
	* lower-subreg.h (struct lower_subreg_choices): Add splitting_ashiftrt
	field.
	* lower-subreg.c (compute_splitting_shift): Handle ASHIFTRT.
	(compute_costs): Call compute_splitting_shift also for ASHIFTRT
	into splitting_ashiftrt field.
	(find_decomposable_shift_zext, resolve_shift_zext): Handle also
	ASHIFTRT.
	(dump_choices): Fix up printing LSHIFTRT choices, print ASHIFTRT
	choices.

2013-02-20  Aldy Hernandez  <aldyh@redhat.com>

	PR middle-end/56108
	* trans-mem.c (execute_tm_mark): Do not expand transactions that
	are sure to go irrevocable.

2013-02-21  Hans-Peter Nilsson  <hp@axis.com>

	* doc/rtl.texi (vec_concat, vec_duplicate): Mention that
	scalars are valid operands.

2013-02-21  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/56310
	* ipa-cp.c (agg_replacements_to_vector): New parameter index, copy
	only matching indices and non-negative final offsets.
	(intersect_aggregates_with_edge): Pass src_idx to
	agg_replacements_to_vector.  Pass src_idx insstead of index to
	intersect_with_agg_replacements.

2013-02-21  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.c (good_cloning_opportunity_p): Dump the real threshold
	instead of hard-wired defaults.

2013-02-21  Maciej W. Rozycki  <macro@codesourcery.com>

	* doc/invoke.texi (MIPS Options): Update documentation of the
	floating-point multiply-accumulate instruction restrictions.

2013-02-21  Kostya Serebryany  <kcc@google.com>

	* config/i386/i386.c (ix86_asan_shadow_offset): Use 0x7fff8000 as
	asan_shadow_offset on x86_64 linux.

2013-02-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56415
	Revert
	2013-02-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56273
	* tree-vrp.c (simplify_cond_using_ranges): Disable for the
	first VRP run.

2013-02-21  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/56258
	* doc/invoke.texi (-fdump-rtl-pro_and_epilogue): Use @item
	instead of @itemx.

	PR inline-asm/56405
	* expr.c (expand_expr_real_1) <case TARGET_MEM_REF, MEM_REF>: Don't
	use movmisalign or extract_bit_field for EXPAND_MEMORY modifier.

2013-02-20  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/56265
	* ipa-prop.c (ipa_make_edge_direct_to_target): Fixup callgraph when
	target is referenced for first time.

2013-02-20  Richard Biener  <rguenther@suse.de>

	* tree-call-cdce.c (tree_call_cdce): Do not remove unused locals.
	* tree-ssa-forwprop.c (ssa_forward_propagate_and_combine): Likewise.
	* tree-ssa-dce.c (perform_tree_ssa_dce): Likewise.
	* tree-ssa-copyrename.c (copy_rename_partition_coalesce): Do
	not return anything.
	(rename_ssa_copies): Do not remove unused locals.
	* tree-ssa-ccp.c (do_ssa_ccp): Likewise.
	* tree-ssanames.c (pass_release_ssa_names): Remove unused locals first.
	* passes.c (execute_function_todo): Do not schedule unused locals
	removal if cleanup_tree_cfg did something.
	* tree-ssa-live.c (remove_unused_locals): Dump statistics
	about the number of removed locals.

2013-02-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56398
	* tree-vect-loop-manip.c (adjust_debug_stmts): Skip
	SSA default defs.

2013-02-20  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/55334
	* ipa-cp.c (initialize_node_lattices): Disable IPA-CP through and to
	restricted pointers to arrays.

2013-02-20  Richard Biener  <rguenther@suse.de>
	Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56396
	* tree-ssa-ccp.c (n_const_val): New static variable.
	(get_value): Return NULL for SSA names we don't have a lattice
	entry for.
	(ccp_initialize): Initialize n_const_val.
	* tree-ssa-copy.c (n_copy_of): New static variable.
	(init_copy_prop): Initialize n_copy_of.
	(get_value): Return NULL_TREE for SSA names we don't have a
	lattice entry for.

2013-02-20  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.c (initialize_node_lattices): Fix dumping condition.

2013-02-20  Richard Biener  <rguenther@suse.de>

	* genpreds.c (write_lookup_constraint): Do not compare first
	letter of the constraint again.

2013-02-20  Richard Biener  <rguenther@suse.de>

	* tree-ssa-loop-ivopts.c (alloc_use_cost_map): Use bitmap_count_bits
	and ceil_log2.
	(get_use_iv_cost): Terminate hashtable walk when coming across
	an empty entry.

2013-02-20  Igor Zamyatin  <igor.zamyatin@intel.com>

	* config/i386/i386.c (initial_ix86_tune_features): Turn on fp
	reassociation for avx2 targets.

2012-02-19  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/microblaze.c: microblaze_has_clz = 0
	Add version check for v8.10.a to enable microblaze_has_clz
	* config/microblaze/microblaze.h: Add TARGET_HAS_CLZ as combined
	version and TARGET_PATTERN_COMPARE check
	* config/microblaze/microblaze.md: New clzsi2 instruction

2012-02-19  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/microblaze.md (call_value_intern): Check symbol is
	function before branching.

2012-02-19  Andrey Belevantsev  <abel@ispras.ru>

	* sel-sched-dump.c (dump_insn_rtx_flags): Explicitly set
	DUMP_INSN_RTX_UID.
	(dump_insn_rtx_1): Pass PATTERN (insn) to str_pattern_slim.

2012-02-19  Andrey Belevantsev  <abel@ispras.ru>

	PR middle-end/55889
	* sel-sched.c: Include ira.h.
	(implicit_clobber_conflict_p): New function.
	(moveup_expr): Use it.
	* Makefile.in (sel-sched.o): Depend on ira.h.

2013-02-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56384
	* tree-ssa-sccvn.h (struct vn_phi_s): Add type member.
	(vn_hash_type): Split out from ...
	(vn_hash_constant_with_type): ... here.
	* tree-ssa-sccvn.c (vn_phi_compute_hash): Use vn_hash_type.
	(vn_phi_eq): Compare types from vn_phi_s structure.
	(vn_phi_lookup): Populate vn_phi_s type.
	(vn_phi_insert): Likewise.

2013-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56350
	* tree-vect-loop.c (vectorizable_reduction): If orig_stmt, return false
	if haven't found reduction or nested cycle operand, rather than
	asserting we must find it.

	PR tree-optimization/56381
	* tree-ssa-pre.c (create_expression_by_pieces): Fix up last argument
	to fold_build3.

2013-02-18  Aldy Hernandez  <aldyh@redhat.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR target/52555
	* genopinit.c (raw_optab_handler): Use this_fn_optabs.
	(swap_optab_enable): Same.
	(init_all_optabs): Use argument instead of global.
	* tree.h (struct tree_optimization_option): New field target_optabs.
	* expr.h (init_all_optabs): Add argument to prototype.
	(TREE_OPTIMIZATION_OPTABS): New.
	(save_optabs_if_changed): Protoize.
	* optabs.h: Declare this_fn_optabs.
	* optabs.c (save_optabs_if_changed): New.
	Declare this_fn_optabs.
	(init_optabs): Add argument to init_all_optabs() call.
	* function.c (invoke_set_current_function_hook): Handle per
	function optabs.
	* function.h (struct function): New field optabs.
	* config/mips/mips.c (mips_set_mips16_mode): Handle when
	optimization_current_node has changed.
	* target-globals.h (save_target_globals_default_opts): Protoize.
	* target-globals.c (save_target_globals_default_opts): New.

2013-02-18  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR target/56347
	* config/pa/pa.c (pa_conditional_register_usage): On HP-UX, mark
	registers %fr12 and %fr12R as call used.

	PR target/56214
	* config/pa/predicates.md (base14_operand): Except for BLKmode, QImode
	and HImode, require all displacements to be an integer multiple of
	their mode size.
	* config/pa/pa.c (pa_legitimate_address_p): For REG+BASE addresses,
	only allow QImode and HImode when reload is in progress and strict is
	true.  Likewise for symbolic addresses.  Use base14_operand to check
	displacements in REG+BASE addresses.

2013-02-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56366
	* tree-vect-loop.c (get_initial_def_for_induction): Properly
	handle sign-conversion of outer-loop initial induction value.

2013-02-18  Richard Biener  <rguenther@suse.de>

	PR middle-end/56349
	* cfghooks.c (merge_blocks): If we merge a latch into another
	block adjust references to it.
	* cfgloop.c (flow_loops_find): Reset latch before recomputing it.
	(verify_loop_structure): Verify that a recorded latch is in fact
	a latch.

2013-02-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56321
	* tree-ssa-reassoc.c (propagate_op_to_single_use): Properly
	order SSA name release and virtual operand unlinking.

2013-02-17  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/microblaze.md (save_stack_block): Define.
	(restore_stack_block): Likewise.

2013-02-16  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/linux.h (TARGET_SUPPORTS_PIC): Define as 1.
	* config/microblaze/microblaze.h (TARGET_SUPPORTS_PIC): Define as 1.
	* config/microblaze/microblaze.c (microblaze_option_override):
	Bail out early for PIC modes when target does not support PIC.

2013-02-16  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/microblaze.c (microblaze_asm_trampoline_template):
	Replace with a microblaze version.
	(microblaze_trampoline_init): Adapt for microblaze.
	* config/microblaze/microblaze.h (TRAMPOLINE_SIZE): Adapt for
	microblaze.

2013-02-16  Jakub Jelinek  <jakub@redhat.com>
	    Dodji Seketeli  <dodji@redhat.com>

	PR asan/56330
	* asan.c (get_mem_refs_of_builtin_call): White space and style
	cleanup.
	(instrument_mem_region_access): Do not forget to always put
	instrumentation of the of 'base' and 'base + len' in a "if (len !=
	0) statement, even for cases where either 'base' or 'base + len'
	are not instrumented -- because they have been previously
	instrumented.  Simplify the logic by putting all the statements
	instrument 'base + len' inside a sequence, and then insert that
	sequence right before the current insertion point.  Then, to
	instrument 'base + len', just get an iterator on that statement.
	And do not forget to update the pointer to iterator the function
	received as argument.

2013-02-15  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56348
	* lra-assigns.c (reload_pseudo_compare_func): Prefer bigger pseudos.

2013-02-15  Steven Bosscher  <steven@gcc.gnu.org>

	* graph.c (start_graph_dump): Print dumpfile base as digraph label.
	(clean_graph_dump_file): Pass base to start_graph_dump.

2013-02-14  Richard Henderson  <rth@redhat.com>

	PR target/55941
	* lower-subreg.c (simple_move): Check dest mode instead of src mode.

2013-02-14  Steven Bosscher  <steven@gcc.gnu.org>

	* collect2-aix.h: Define F_LOADONLY.

2013-02-14  Richard Biener  <rguenther@suse.de>

	PR lto/50494
	* varasm.c (output_constant_def_1): Get the decl representing
	the constant as argument.
	(output_constant_def): Wrap output_constant_def_1.
	(make_decl_rtl): Use output_constant_def_1 with the decl
	representing the constant.
	(build_constant_desc): Optionally re-use a decl already
	representing the constant.
	(tree_output_constant_def): Adjust.

2013-02-14  Dodji Seketeli  <dodji@redhat.com>

	Fix an asan crash
	* asan.c (instrument_builtin_call):  Really put the length of the
	second source argument into src1_len.

2013-02-13  Jakub Jelinek  <jakub@redhat.com>

	* asan.c (create_cond_insert_point): Add create_then_fallthru_edge
	argument.  If it is false, don't create edge from then_bb to
	fallthru_bb.
	(insert_if_then_before_iter): Pass true to it.
	(build_check_stmt): Pass false to it.
	(transform_statements): Flush hash table only on extended basic
	block boundaries, rather than at the beginning of every bb.
	Don't flush hash table on nonfreeing_call_p calls.
	* tree-flow.h (nonfreeing_call_p): New prototype.
	* tree-ssa-phiopt.c (nonfreeing_call_p): No longer static.

2013-02-13  David S. Miller  <davem@davemloft.net>

	* expmed.c (expand_shift_1): Only strip scalar integer subregs.

2013-02-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/56184
	* ira.c (max_regno_before_ira): Move from ...
	(ira): ... here.
	(fix_reg_equiv_init): Use max_regno_before_ira instead of
	vec_safe_length.

2013-02-13  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.c (ix86_asan_shadow_offset): Revert last change.

2013-02-13  Richard Biener  <rguenther@suse.de>

	PR lto/56295
	* gimple-streamer-out.c (output_gimple_stmt): Undo wrapping
	globals in MEM_REFs.

2013-02-13  Richard Biener  <rguenther@suse.de>

	* loop-init.c (loop_optimizer_init): Clear loop state when
	re-initializing preserved loops.
	* loop-unswitch.c (unswitch_single_loop): Return whether
	we unswitched the loop.  Do not verify loop state here.
	(unswitch_loops): When we unswitched a loop discover new
	loops.

2013-02-13  Kostya Serebryany  <kcc@google.com>

	* config/i386/i386.c: Use 0x7fff8000 as asan_shadow_offset on x86_64
	linux.
	* sanitizer.def: Rename __asan_init to __asan_init_v1.

2013-02-12  Dodji Seketeli  <dodji@redhat.com>

	Avoid instrumenting duplicated memory access in the same basic block
	* Makefile.in (asan.o): Add new dependency on hash-table.h
	* asan.c (struct asan_mem_ref, struct mem_ref_hasher): New types.
	(asan_mem_ref_init, asan_mem_ref_get_end, get_mem_ref_hash_table)
	(has_stmt_been_instrumented_p, empty_mem_ref_hash_table)
	(free_mem_ref_resources, has_mem_ref_been_instrumented)
	(has_stmt_been_instrumented_p, update_mem_ref_hash_table)
	(get_mem_ref_of_assignment): New functions.
	(get_mem_refs_of_builtin_call): Extract from
	instrument_builtin_call and tweak a little bit to make it fit with
	the new signature.
	(instrument_builtin_call): Use the new
	get_mem_refs_of_builtin_call.  Use gimple_call_builtin_p instead
	of is_gimple_builtin_call.
	(instrument_derefs, instrument_mem_region_access): Insert the
	instrumented memory reference into the hash table.
	(maybe_instrument_assignment): Renamed instrument_assignment into
	this, and change it to advance the iterator when instrumentation
	actually happened and return true in that case.  This makes it
	homogeneous with maybe_instrument_assignment, and thus give a
	chance to callers to be more 'regular'.
	(transform_statements): Clear the memory reference hash table
	whenever we enter a new BB, when we cross a function call, or when
	we are done transforming statements.  Use
	maybe_instrument_assignment instead of instrumentation.  No more
	need to special case maybe_instrument_assignment and advance the
	iterator after calling it; it's now handled just like
	maybe_instrument_call.  Update comment.

2013-02-13  Richard Biener  <rguenther@suse.de>

	* config/mn10300/mn10300.c (mn10300_scan_for_setlb_lcc):
	Fix loop discovery code.

2013-02-12  Vladimir Makarov  <vmakarov@redhat.com>

	PR inline-asm/56148
	* lra-constraints.c (process_alt_operands): Match early clobber
	operand with itself.  Check conflicts with earlyclobber only if
	the operand is not reloaded.  Prefer to reload conflicting operand
	if earlyclobber and matching operands are the same.

2013-02-12  Richard Biener  <rguenther@suse.de>

	PR lto/56297
	* lto-streamer-out.c (write_symbol): Do not output symbols
	for hard register variables.

2013-02-12  Georg-Johann Lay  <avr@gjlay.de>

	PR target/54222
	* config/avr/avr-dimode.md (umulsidi3, mulsidi3): New expanders.
	(umulsidi3_insn, mulsidi3_insn): New insns.

2013-02-12  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/arm-protos.h (struct cpu_vec_costs): New struct type.
	(struct tune_params): Add vec_costs field.
	* config/arm/arm.c (arm_builtin_vectorization_cost)
	(arm_add_stmt_cost): New functions.
	(TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST)
	(TARGET_VECTORIZE_ADD_STMT_COST): Define.
	(arm_default_vec_cost): New struct of type cpu_vec_costs.
	(arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune)
	(arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune)
	(arm_cortex_a15_tune, arm_cortex_a5_tune, arm_cortex_a9_tune)
	(arm_v6m_tune, arm_fa726te_tune): Define new vec_costs field.

2013-02-12  Richard Biener  <rguenther@suse.de>

	PR lto/56295
	* gimple-streamer-in.c (input_gimple_stmt): Strip MEM_REFs off
	decls again if possible.

2013-02-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/56288
	* tree-ssa.c (verify_ssa_name): Fix check, move
	SSA_NAME_IN_FREE_LIST check up.

2013-02-12  Jakub Jelinek  <jakub@redhat.com>
	    Steven Bosscher   <steven@gcc.gnu.org>

	PR rtl-optimization/56151
	* optabs.c (add_equal_note): Don't return 0 if target is a MEM,
	equal to op0 or op1, and last_insn pattern is CODE operation
	with MEM dest and one of the operands matches that MEM.

2013-02-11  Sriraman Tallam  <tmsriramgoogle.com>

	* doc/extend.texi: Document Function Multiversioning and "default"
	parameter string to target attribute.
	* config/i386/i386.c (get_builtin_code_for_version): Return 0 if
	target attribute parameter is "default".
	(ix86_compare_version_priority): Remove checks for target attribute.
	(ix86_mangle_function_version_assembler_name): Change error to sorry.
	Remove check for target attribute equal to NULL. Add assert.
	(ix86_generate_version_dispatcher_body): Change error to sorry.

2013-02-11  Iain Sandoe  <iain@codesourcery.com>
	    Jack Howarth  <howarth@bromo.med.uc.edu>
	    Patrick Marlier  <patrick.marlier@gmail.com>

	PR libitm/55693
	* config/darwin.h: Replace ENDFILE_SPEC with TM_DESTRUCTOR and
	define ENDFILE_SPEC as TM_DESTRUCTOR.
	* config/i386/darwin.h (ENDFILE_SPEC): Use TM_DESTRUCTOR.

2013-02-11  Alexander Potapenko  <glider@google.com>
	    Jack Howarth  <howarth@bromo.med.uc.edu>
	    Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/55617
	* config/darwin.c (cdtor_record): Rename ctor_record.
	(sort_cdtor_records): Rename sort_ctor_records.
	(finalize_dtors): New routine to sort destructors by
	priority before use in assemble_integer.
	(machopic_asm_out_destructor): Use finalize_dtors if needed.

2013-02-11  Uros Bizjak  <ubizjak@gmail.com>

	PR rtl-optimization/56275
	* simplify-rtx.c (avoid_constant_pool_reference): Check that
	offset is non-negative and less than cmode size before
	calling simplify_subreg.

2013-02-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56264
	* cfgloop.h (fix_loop_structure): Adjust prototype.
	* loop-init.c (fix_loop_structure): Return the number of
	newly discovered loops.
	* tree-cfgcleanup.c (repair_loop_structures): When new loops
	are discovered, do a full loop-closed SSA rewrite.

2013-02-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56273
	* tree-vrp.c (simplify_cond_using_ranges): Disable for the
	first VRP run.
	(check_array_ref): Fix missing newline in dumps.
	(search_for_addr_array): Likewise.

2013-02-09  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/aix61.h (OS_MISSING_ALTIVEC): Undefine.

2013-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/56256
	* config/rs6000/rs6000.h (ASSEMBLER_DIALECT): Define.

2013-02-08  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56246
	* lra-constraints.c (simplify_operand_subreg): Try to reuse
	reload pseudo.
	* lra.c (lra): Clear lra_optional_reload_pseudos only when all
	constraints are satisfied.

2013-02-08  Jeff Law  <law@redhat.com>

	PR debug/53948
	* emit-rtl.c (reg_is_parm_p): New function.
	* regs.h (reg_is_parm_p): New prototype.
	* ira-conflicts.c (ira_build_conflicts): Allow parameters in
	callee-clobbered registers.

2013-02-08  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/56043
	* config/rs6000/rs6000.c (rs6000_builtin_vectorized_libmass):
	If there is no implicit builtin declaration, just return NULL.

2013-02-08  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (FMAMODEM): New mode iterator.
	(fma<mode>4, fms<mode>4, fnma<mode>4, fnms<mode>4): Use FMAMODEM
	mode iterator. Do not use TARGET_SSE_MATH in insn constraint.

2013-02-08  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/gnu-user.h (TARGET_CAN_SPLIT_STACK): Define only
	when HAVE_GAS_CFI_PERSONALITY_DIRECTIVE is set.
	* config/i386/gnu-user64.h (TARGET_CAN_SPLIT_STACK): Ditto.

2013-02-08  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config.gcc (microblaze*-linux*): Add TARGET_BIG_ENDIAN_DEFAULT.
	(microblaze*-*-elf): Likewise.
	* config/microblaze/linux.h: Add -mbig-endian / -mlittle-endian to
	LINK_SPEC.
	* config/microblaze/microblaze-c.c: Add builtin defines for
	_LITTLE_ENDIAN and _BIG_ENDIAN.
	* config/microblaze/microblaze.h: Add TARGET_ENDIAN_DEFAULT and
	add to TARGET_DEFAULT flags.
	Expand ASM_SPEC and LINK_SPEC.
	Update BYTES_BIG_ENDIAN and WORDS_BIG_ENDIAN.
	* config/microblaze/microblaze.md: Update extendsidi2 and
	movdi_internal instructions to use low-order / high-order reg
	print_operands.
	* config/microblaze/microblaze.opt: Add mbig-endian and mlittle-endian
	options and inversemask / mask of LITTLE_ENDIAN.
	* config/microblaze/t-microblaze: Expand multilib options to
	include mlittle-endian (le) and update exceptions patterns.

2013-02-08  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/56195
	* lra-constraints.c (get_reload_reg): Don't reuse regs
	if they have smaller mode than requested, if they have
	wider mode than requested, try to return a SUBREG.

	PR tree-optimization/56250
	* fold-const.c (extract_muldiv_1) <case NEGATE_EXPR>: Don't optimize
	if type is unsigned and code isn't MULT_EXPR.

2013-02-08  Georg-Johann Lay  <avr@gjlay.de>

	PR tree-optimization/56064
	* fixed-value.c (fixed_from_double_int): Sign/zero extend payload
	bits according to mode.
	* fixed-value.h (fixed_from_double_int)
	(const_fixed_from_double_int): Adjust comments.

2013-02-08  Richard Biener  <rguenther@suse.de>

	PR lto/56231
	* lto-streamer.h (struct data_in): Remove current_file, current_line
	and current_col members.
	* lto-streamer-out.c (lto_output_location): Stream changed bits
	en-block for efficiency.
	* lto-streamer-in.c (clear_line_info): Remove.
	(lto_input_location): Cache current file, line and column
	globally via local statics.  Read changed bits en-block.
	(input_function): Do not call clear_line_info.
	(lto_read_body): Likewise.
	(lto_input_toplevel_asms): Likewise.

2013-02-08  Michael Matz  <matz@suse.de>

	PR tree-optimization/52448
	* tree-ssa-phiopt.c (struct name_to_bb): Add phase member.
	(nt_call_phase): New static.
	(add_or_mark_expr): Only mark accesses with newer phase than any
	call seen.
	(nonfreeing_call_p): New.
	(nt_init_block): Update nt_call_phase, mark blocks as visited.
	(nt_fini_block): Keep blocks marked as visited.
	(get_non_trapping): Initialize nt_call_phase, and reset aux pointer.

2013-02-08  Richard Biener  <rguenther@suse.de>

	* ira.c (ira): Free broken dominator information.

2013-02-08  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_spill_class): Use INTEGER_CLASS_P macro.

2013-02-08  Marek Polacek  <polacek@redhat.com>

	* cfgloop.c (verify_loop_structure): Add more checking of headers.

2013-02-08  Richard Biener  <rguenther@suse.de>

	PR middle-end/56181
	* cfgloop.h (flow_loops_find): Adjust.
	(bb_loop_header_p): Declare.
	* cfgloop.c (bb_loop_header_p): New function split out from ...
	(flow_loops_find): ... here.  Adjust function signature,
	support incremental loop structure update.
	(verify_loop_structure): Cleanup.  Verify a loop is a loop.
	* cfgloopmanip.c (fix_loop_structure): Move ...
	* loop-init.c (fix_loop_structure): ... here.
	(apply_loop_flags): Split out from ...
	(loop_optimizer_init): ... here.
	(fix_loop_structure): Use apply_loop_flags.  Use flow_loops_find
	in incremental mode, only remove dead loops here.

2013-02-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/54222
	* config/avr/avr.md (unspec) <UNSPEC_ROUND>: Add.
	* config/avr/avr-fixed.md (ALL4QA, ALL124QA): New mode iterators.
	(round<mode>3, round<mode>3_const): New expanders for fixed-mode.
	(*round<mode>3.libgcc): New insns for fixed-modes.
	* config/avr/builtins.def (ABSxx): Use a non-NULL LIBNAME.
	(ROUNDxx, COUNTLSxx, BITSxx, xxBITS): New DEF_BUILTINs.
	(ROUNDFX, COUNTLSFX, ABSFX): New DEF_BUILTINs.
	* config/avr/stdfix.h (absFX, bitsFX, FXbits): Remove inline
	implementations.  Define to __builtin_avr_absFX,
	__builtin_avr_bitsFX, __builtin_avr_FXbits, respectively.
	(roundFX, countlsFX): Define to __builtin_avr_roundFX,
	__builtin_avr_countlsFX, respectively.
	* config/avr/avr-c.c (target.h): Include it.
	(enum avr_builtin_id): New enum.
	(avr_resolve_overloaded_builtin): New static function.
	(avr_register_target_pragmas): Use it to set
	targetm.resolve_overloaded_builtin.
	* config/avr/avr.c (avr_init_builtins): Supply myriads of local
	tree nodes used by DEF_BUILTIN.
	(avr_expand_builtin) <AVR_BUILTIN_ROUNDxx>: Sanity-check them.
	(avr_fold_builtin) <AVR_BUILTIN_BITSxx>: Fold to VIEW_COVERT_EXPR.
	<AVR_BUILTIN_xxBITS>: Same.

2013-02-08  Richard Biener  <rguenther@suse.de>

	* cfgloop.c (verify_loop_structure): Properly handle
	a loop exiting to another loop header.
	* ira-int.h (ira_loops): Remove.
	* ira.c (ira_loops): Remove.
	(ira): Use loop_optimizer_init and loop_optimizer_finalize.
	(do_reload): Use loop_optimizer_finalize.
	* ira-build.c (create_loop_tree_nodes): Use get_loops and
	number_of_loops to access the loop tree.
	(more_one_region_p): Likewise.
	(finish_loop_tree_nodes): Likewise.
	(rebuild_regno_allocno_maps): Likewise.
	(mark_loops_for_removal): Likewise.
	(mark_all_loops_for_removal): Likewise.
	(remove_unnecessary_regions): Likewise.
	(ira_build): Likewise.
	* ira-emit.c (setup_entered_from_non_parent_p): Likewise.

2013-02-08  Richard Biener  <rguenther@suse.de>

	* Makefile.in (tree-tailcall.o): Add $(CFGLOOP_H) dependency.
	* ipa-pure-const.c (analyze_function): Avoid calling
	mark_irreducible_loops twice.
	* tree-tailcall.c (tree_optimize_tail_calls_1): Mark loops for fixup.

2013-02-07  David S. Miller  <davem@davemloft.net>

	* dwarf2out.c (based_loc_descr): Perform leaf register remapping
	on 'reg'.
	* var-tracking.c (vt_add_function_parameter): Test the presence of
	HAVE_window_save properly and do not remap argument registers when
	we have a leaf function.

2013-02-07  Uros Bizjak  <ubizjak@gmail.com>

	PR bootstrap/56227
	* ggc-page.c (ggc_print_statistics): Use HOST_LONG_LONG_FORMAT
	instead of "ll".
	* config/i386/i386.c (ix86_print_operand): Ditto.

2013-02-07  Vladimir Makarov  <vmakarov@redhat.com>

	* lra-constraints.c (process_alt_operands): Fix recently added comment.

2013-02-07  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56225
	* lra-constraints.c (process_alt_operands): Check that reload hard
	reg can hold value for strict_low_part.

2013-02-07  Jakub Jelinek  <jakub@redhat.com>

	PR debug/56154
	* dwarf2out.c (dwarf2_debug_hooks): Set end_function hook to
	dwarf2out_end_function.
	(in_first_function_p, maybe_at_text_label_p,
	first_loclabel_num_not_at_text_label): New variables.
	(dwarf2out_var_location): In the first function find out
	lowest loclabel_num N where .LVLN is known not to be equal to .Ltext0.
	(find_empty_loc_ranges_at_text_label, dwarf2out_end_function): New
	functions.

2013-02-07  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/56178
	* cse.c (cse_insn): Do not create a REG_EQUAL note if the source is a
	SUBREG of a register.  Tidy up related block of code.
	* fwprop.c (forward_propagate_and_simplify): Do not create a REG_EQUAL
	note if the source is a register or a SUBREG of a register.

2013-02-07  Jakub Jelinek  <jakub@redhat.com>

	PR target/56228
	* config/rs6000/rs6000.md (ptrm): New mode attr.
	(call_indirect_aix<ptrsize>, call_indirect_aix<ptrsize>_nor11,
	call_value_indirect_aix<pttrsize>,
	call_value_indirect_aix<pttrsize>_nor11): Use <ptrm> instead of
	m in constraints.

2013-02-07  Michael Haubenwallner  <michael.haubenwallner@salomon.at>

	* collect2.c (main): Set aix64_flag for -G and -bsvr4 too, disable
	if -bnortl. Convert to strcmp and strncmp.

2013-02-07  Alan Modra  <amodra@gmail.com>

	PR target/54009
	* config/rs6000/rs6000.c (mem_operand_gpr): Check that LO_SUM
	addresses won't wrap when offsetting.
	(rs6000_secondary_reload): Provide secondary reloads needed for
	wrapping LO_SUM addresses.

2013-02-06  Thomas Schwinge  <thomas@codesourcery.com>

	* config/gnu.h (GNU_USER_TARGET_OS_CPP_BUILTINS): Never define
	MACH, just __MACH__.

2013-02-06  Richard Biener  <rguenther@suse.de>

	* tracer.c (tracer): Mark loops with LOOPS_NEED_FIXUP
	instead of calling fix_loop_structure.

2013-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56217
	* omp-low.c (use_pointer_for_field): Return false if
	lower_send_shared_vars doesn't generate any copy-out code.

2013-02-06  Tom de Vries  <tom@codesourcery.com>

	PR rtl-optimization/56131
	* cfgrtl.c (delete_insn): Use NOTE_BASIC_BLOCK instead of BLOCK_FOR_INSN
	to get the bb of a NOTE_INSN_BASIC_BLOCK.  Handle the case that the bb
	of the label is NULL.  Add comment.

2013-02-05  Jakub Jelinek  <jakub@redhat.com>

	* tree.h (struct tree_decl_with_vis): Remove thread_local field.

	PR sanitizer/55374
	* config/gnu-user.h (LIBTSAN_EARLY_SPEC): Define.
	(STATIC_LIBTSAN_LIBS): Likewise.
	* gcc.c (ADD_STATIC_LIBTSAN_LIBS, LIBTSAN_EARLY_SPEC): Define.
	(LIBTSAN_SPEC): Add ADD_STATIC_LIBTSAN_LIBS, if LIBTSAN_EARLY_SPEC
	is defined, don't add anything else beyond that.
	(SANITIZER_EARLY_SPEC, SANITIZER_SPEC): Define.
	(LINK_COMMAND_SPEC): Use them.

	PR tree-optimization/56205
	* tree-stdarg.c (check_all_va_list_escapes): Return true if
	there are any PHI nodes that set non-va_list_escape_vars SSA_NAME
	and some va_list_escape_vars SSA_NAME appears in some PHI argument.

2013-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/53342
	PR tree-optimization/53185
	* tree-vectorizer.h (vect_check_strided_load): Remove.
	* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Do
	not disallow peeling for vectorized strided loads.
	(vect_check_strided_load): Make static and simplify.
	(vect_analyze_data_refs): Adjust.
	* tree-vect-stmts.c (vectorizable_load): Handle peeled loops
	correctly when vectorizing strided loads.

2013-02-05  Richard Biener  <rguenther@suse.de>

	* doc/install.texi: Refer to ISL, not PPL.

2013-02-05  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/55789
	* params.def (PARAM_EARLY_INLINER_MAX_ITERATIONS): Drop to 1.

2013-02-05  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/55789
	* cgraphclones.c (cgraph_remove_node_and_inline_clones): Remove
	the dead call anyway.

2013-02-05  Eric Botcazou  <ebotcazou@adacore.com>

	PR sanitizer/55374
	* config/gnu-user.h (LIBASAN_EARLY_SPEC): Add missing guard.

2013-02-04  Alexander Potapenko  <glider@google.com>
	    Jack Howarth  <howarth@bromo.med.uc.edu>
	    Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/55617
	* config/darwin.c (sort_ctor_records): Stabilized qsort
	on constructor priority by using original position.
	(finalize_ctors): New routine to sort constructors by
	priority before use in assemble_integer.
	(machopic_asm_out_constructor): Use finalize_ctors if needed.

2013-02-04  Jakub Jelinek  <jakub@redhat.com>

	PR libstdc++/54314
	* config/i386/winnt.c (i386_pe_assemble_visibility): Don't warn
	about visibility on artificial decls.
	* config/sol2.c (solaris_assemble_visibility): Likewise.

2013-02-04  Kai Tietz  <ktietz@redhat.com>

	PR target/56186
	* config/i386/i386.c (function_value_ms_64): Add additional valtype
	argument and improve checking of return-argument types for 16-byte
	modes.
	(ix86_function_value_1): Add additional valtype argument on call
	of function_value_64.
	(return_in_memory_ms_64): Sync 16-byte sized mode handling with
	handling infunction_value_64 function.

2013-02-04  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>

	* reload.c (subst_reloads): Fix DEBUG_RELOAD build issue.

2013-02-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56188
	* tree-ssa-structalias.c (label_visit): Consider case with
	initially non-empty points-to set.
	(perform_var_substitution): Dump node mapping and clean up.

2013-02-04  Richard Guenther  <rguenther@suse.de>

	PR lto/56168
	* lto-symtab.c (lto_symtab_merge_decls_1): Make non-builtin
	node prevail as last resort.
	(lto_symtab_merge_decls): Remove guard on LTRANS here.
	(lto_symtab_prevailing_decl): Builtins are their own prevailing decl.

2013-02-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56113
	* tree-ssa-structalias.c (equiv_class_lookup, equiv_class_add):
	Merge into ...
	(equiv_class_lookup_or_add): ... this.
	(label_visit): Adjust and fix error in previous patch.
	(perform_var_substitution): Adjust.

2013-02-03  Oleg Endo  <olegendo@gcc.gnu.org>

	* config/sh/divtab.c: Fix formatting and comments throughout the file.
	* config/sh/sh4-300.md: Likewise.
	* config/sh/sh4a.md: Likewise.
	* config/sh/constraints.md: Likewise.
	* config/sh/sh.md: Likewise.
	* config/sh/netbsd-elf.h: Likewise.
	* config/sh/predicates.md: Likewise.
	* config/sh/sh-protos.h: Likewise.
	* config/sh/ushmedia.h: Likewise.
	* config/sh/linux.h: Likewise.
	* config/sh/sh.c: Likewise.
	* config/sh/superh.h: Likewise.
	* config/sh/elf.h: Likewise.
	* config/sh/sh4.md: Likewise.
	* config/sh/sh.h: Likewise.

2013-02-03  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	* config/pa/constraints.md: Adjust unused letters.  Change "T"
	constraint to match_test floating_point_store_memory_operand().
	* config/pa/predicates.md (reg_plus_base_memory_operand): New.
	(base14_operand): New.
	(floating_point_store_memory_operand): New.
	(integer_store_memory_operand): Revise to use base14_operand and
	reg_plus_base_memory_operand.
	(move_dest_operand): Allow symbolic_memory_operands.
	(symbolic_memory_operand): Check for LO_SOM.
	(symbolic_operand): Change default case to break.
	* config/pa/pa.md: Remove unamed DFmode and SFmode patterns to force
	CONST_DOUBLE values to be reloaded by putting them into memory when
	the destination is a floating point register.
	(movdf): Remove code to handle CONST_DOUBLE.
	(movsf): Likewise.
	(reload_indf_r1): New.
	(reload_insf_r1): New.
	Consistently use "Q" and "T" constraints with integer and floating
	point move instructions, respectively.
	(movdi): Remove FAIL.
	Change predicate for source operand unamed DImode move from
	general_operand to move_src_operand.
	(umulsidi3): Change predicate for destination operand to
	register_operand.
	Likewise for similar unamed patterns.
	* config/pa/pa-protos.h (pa_legitimize_reload_address): Declare.
	* config/pa/pa.c (pa_symbolic_expression_p): Remove extra parenthesis.
	(hppa_legitimize_address): Simplify mask calculation.
	(pa_emit_move_sequence): Revised handling of secondary reloads from
	REG+D addresses for floating point loads and stores.  Directly handle
	loading CONST0_RTX (mode) to a floating point register.
	(pa_secondary_reload): Handle reloading DF and SFmode constant values
	to floating point registers.  Don't restrict secondary reloads to
	floating point registers to integer modes.  Revise some comments and
	cleanup some code.
	(TARGET_LEGITIMATE_ADDRESS_P): Define.
	(pa_legitimate_address_p): New.
	(pa_legitimize_reload_address): New.
	* config/pa/pa.h (STRICT_REG_OK_FOR_INDEX_P): New.
	(STRICT_REG_OK_FOR_BASE_P): New.
	(GO_IF_LEGITIMATE_ADDRESS): Delete.  Update some related comments.
	(LEGITIMIZE_RELOAD_ADDRESS): Revise to use pa_legitimize_reload_address.

2013-02-03  David Edelsohn  <dje.gcc@gmail.com>
	    Andrew Dixie  <andrewd@gentrack.com>

	* collect2.c (GCC_CHECK_HDR): Do not scan objects with F_LOADONLY
	flag set.

2013-02-03  Richard Sandiford  <rdsandiford@googlemail.com>

	* expmed.c (extract_bit_field_1): Pass the full width of the
	structure to get_best_reg_extraction_insn.

2013-02-01  David Edelsohn  <dje.gcc@gmail.com>

	PR target/54601
	* configure.ac (use_cxa_atexit): Add AIX.
	* configure: Regenerate.

	* config/rs6000/aix61.h (STARTFILE_SPEC): Add crtcxa.o.

2013-02-01  Jakub Jelinek  <jakub@redhat.com>

	PR debug/54793
	* final.c (need_profile_function): New variable.
	(final_start_function): Drop ATTRIBUTE_UNUSED from first argument.
	If first of NOTE_INSN_BASIC_BLOCK or NOTE_INSN_FUNCTION_BEG
	is only preceeded by NOTE_INSN_VAR_LOCATION or NOTE_INSN_DELETED
	notes, targetm.asm_out.function_prologue doesn't emit anything,
	HAVE_prologue and profiler should be emitted before prologue,
	set need_profile_function instead of emitting it.
	(final_scan_insn): If need_profile_function, emit
	profile_function on the first NOTE_INSN_BASIC_BLOCK or
	NOTE_INSN_FUNCTION_BEG note.

2013-02-01  Richard Henderson  <rth@redhat.com>

	* config/rs6000/rs6000.md (smulditi3): New.
	(umulditi3): New.

	* config/alpha/alpha.md (umulditi3): New.

2013-02-01  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2.
	(ASM_OUTPUT_ALIGNED_LOCAL): New.

2013-02-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56113
	* tree-ssa-structalias.c (label_visit): Reduce work for
	single-predecessor nodes.

2013-02-01  Eric Botcazou  <ebotcazou@adacore.com>

	* fold-const.c (make_range_step) <TRUTH_NOT_EXPR>: Bail out if the
	range isn't testing for zero.

2013-01-31  Steven Bosscher  <steven@gcc.gnu.org>

	PR middle-end/56113
	* fwprop.c (fwprop_init): Set up loops without CFG modifications.

2013-01-31  Hiroyuki Ono  <hiroyuki.ono.jc@renesas.com>
	    Nick Clifton  <nickc@redhat.com>

	* config/v850/constraints.md (Q): Define as a memory constraint.
	* config/v850/predicates.md (label_ref_operand): New predicate.
	(e3v5_shift_operand): New predicate.
	(ior_operator): New predicate.
	* config/v850/t-v850: Add e3v5 multilib.
	* config/v850/v850-protos.h (v850_adjust_insn_length): Prototype.
	(v850_gen_movdi): Prototype.
	* config/v850/v850.c: Add support for e3v5 architecture.
	Rename all uses of TARGET_V850E || TARGET_V850E2_ALL to
	TARGET_V850E_UP.
	(construct_save_jarl): Add e3v5 long JARL support.
	(v850_adjust_insn_length): New function.  Adjust length of call
	insns when using e3v5 instructions.
	(v850_gen_movdi): New function: Generate instructions to move a
	DImode value.
	* config/v850/v850.h (TARGET_CPU_v850e3v5): Define.
	(CPP_SPEC): Define __v850e3v5__ as appropriate.
	(TARGET_USE_FPU): Enable for e3v5.
	(CONST_OK_FOR_W): New macro.
	(ADJUST_INSN_LENGTH): Define.
	* config/v850/v850.md (UNSPEC_LOOP): Define.
	(attr cpu): Add v850e3v5.
	Rename all uses of TARGET_V850E2 to TARGET_V850E2V3_UP.
	(movdi): New pattern.
	(movdi_internal): New pattern.
	(cbranchsf4): Conditionalize on TARGET_USE_FPU.
	(cbranchdf4): Conditionalize on TARGET_USE_FPU.
	(cstoresf4): Likewise.
	(cstoredf4): Likewise.
	(insv): New pattern.
	(rotlso3_a): New pattern.
	(rotlsi3_b): New pattern
	(rotlsi3_v850e3v5): New pattern.
	(doloop_begin): New pattern.
	(fix_loop_counter): New pattern.
	(doloop_end): New pattern.
	(branch_normal): Add e3v5 long branch support.
	(branch_invert): Likewise.
	(branch_z_normal): Likewise.
	(branch_z_invert): Likewise.
	(branch_nz_normal): Likewise.
	(branch_nz_invert): Likewise.
	(call_internal_short): Add e3v5 register-indirect JARL support.
	(call_internal_long): Likewise.
	(call_value_internal_short): Likewise.
	(call_value_internal_long): Likewise.
	* config/v850/v850.opt (mv850e3v5, mv850e2v4): New options.
	(mloop): New option.
	* config.gcc: Add support for configuring v840e3v5 target.
	* doc/invoke.texi: Document new v850 specific command line options.

2013-01-31  Paul Koning  <ni1d@arrl.net>

	PR debug/55059
	PR debug/54508
	* dwarf2out.c (prune_unused_types_mark): Mark all of parent's
	children if parent is a class.
	(prune_unused_types_prune): Don't add DW_AT_declaration.

2013-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56157
	* tree-vect-slp.c (vect_get_slp_defs): More thoroughly try to
	match up operand with SLP child.

2013-01-31  Jason Merrill  <jason@redhat.com>

	PR debug/54410
	* dwarf2out.c (gen_struct_or_union_type_die): Always schedule template
	parameters the first time.
	(gen_scheduled_generic_parms_dies): Check completeness here.

2013-01-31  Richard Biener  <rguenther@suse.de>

	PR middle-end/53073
	* common.opt (faggressive-loop-optimizations): New flag,
	enabled by default.
	* doc/invoke.texi (faggressive-loop-optimizations): Document.
	* tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Guard
	infer_loop_bounds_from_undefined by it.

2013-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56150
	* tree-ssa-loop-manip.c (find_uses_to_rename_stmt): Do not
	visit virtual operands.
	(find_uses_to_rename_bb): Likewise.

2013-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56150
	* tree-ssa-tail-merge.c (gimple_equal_p): Properly handle
	mixed store non-store stmts.

2013-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/55374
	* gcc.c (LIBASAN_SPEC): Define just to ADD_STATIC_LIBASAN_LIBS if
	LIBASAN_EARLY_SPEC is defined.
	(LIBASAN_EARLY_SPEC): Define to empty string if not already defined.
	(LINK_COMMAND_SPEC): Add LIBASAN_EARLY_SPEC for -fsanitize=address,
	before %o.
	* config/gnu-user.h (LIBASAN_EARLY_SPEC): Define.

	PR c++/55742
	* config/i386/i386.c (ix86_valid_target_attribute_inner_p): Diagnose
	invalid args instead of ICEing on it.
	(ix86_valid_target_attribute_tree): Return error_mark_node if
	ix86_valid_target_attribute_inner_p failed.
	(ix86_valid_target_attribute_p): Return false only if
	ix86_valid_target_attribute_tree returned error_mark_node.  Allow
	target("default") attribute.
	(sorted_attr_string): Change argument from const char * to tree,
	merge in all target attribute arguments rather than just one.
	Formatting fix.  Use XNEWVEC instead of xmalloc and XDELETEVEC
	instead of free.  Avoid using strcat.
	(ix86_mangle_function_version_assembler_name): Mangle
	target("default") as if no target attribute is present.  Adjust
	sorted_attr_string caller.  Avoid leaking memory.  Use XNEWVEC
	instead of xmalloc and XDELETEVEC instead of free.
	(ix86_function_versions): Don't return true if one of the decls
	doesn't have target attribute.  If they don't and one of the decls
	is DECL_FUNCTION_VERSIONED, report an error.  Adjust
	sorted_attr_string caller.  Use XDELETEVEC instead of free.
	(ix86_supports_function_versions): Remove.
	(make_name): Fix up formatting.
	(make_dispatcher_decl): Remove resolver_name and its initialization.
	Avoid leaking memory.
	(is_function_default_version): Return true if there is
	target("default") attribute rather than no target attribute at all.
	(make_resolver_func): Avoid leaking memory.
	(ix86_generate_version_dispatcher_body): Likewise.
	(TARGET_OPTION_SUPPORTS_FUNCTION_VERSIONS): Remove.
	* target.def (supports_function_versions): Remove.
	* doc/tm.texi.in (SUPPORTS_FUNCTION_VERSIONS): Remove.
	* doc/tm.texi: Regenerated.

2013-01-30  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56144
	* lra-constraints.c (get_reload_reg): Don't reuse reload pseudo
	for values with side effects.

2013-01-30  Richard Biener  <rguenther@suse.de>

	* sparseset.h (sparseset_bit_p): Use gcc_checking_assert.
	(sparseset_pop): Likewise.
	* cfganal.c (compute_idf): Likewise.  Increase work-stack size
	to be able to use quick_push in the worker loop.

2013-01-30  Marek Polacek  <polacek@redhat.com>

	* cfgcleanup.c (cleanup_cfg): Don't mark affected BBs.

2013-01-30  Richard Biener  <rguenther@suse.de>

	PR lto/56147
	* lto-symtab.c (lto_symtab_merge_decls_1): Guard DECL_BUILT_IN check.

2013-01-30  Georg-Johann Lay  <avr@gjlay.de>

	PR tree-optimization/56064
	* fixed-value.c (fixed_from_double_int): New function.
	* fixed-value.h (fixed_from_double_int): New prototype.
	(const_fixed_from_double_int): New static inline function.
	* fold-const.c (native_interpret_fixed): New static function.
	(native_interpret_expr) <FIXED_POINT_TYPE>: Use it.
	(can_native_interpret_type_p) <FIXED_POINT_TYPE>: Return true.
	(native_encode_fixed): New static function.
	(native_encode_expr) <FIXED_CST>: Use it.
	(native_interpret_int): Move double_int worker code to...
	* double-int.c (double_int::from_buffer): ...this new static method.
	* double-int.h (double_int::from_buffer): Prototype it.

2013-01-30  Richard Biener  <rguenther@suse.de>

	* tree-ssa-structalias.c (final_solutions, final_solutions_obstack):
	New pointer-map and obstack.
	(init_alias_vars): Allocate pointer-map and obstack.
	(delete_points_to_sets): Free them.
	(find_what_var_points_to): Cache result.
	(find_what_p_points_to): Adjust for changed interface of
	find_what_var_points_to.
	(compute_points_to_sets): Likewise.
	(ipa_pta_execute): Likewise.

2013-01-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (HAVE_AS_SPARC_NOBITS): New test.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/sparc/sparc.c (sparc_solaris_elf_asm_named_section): Emit
	#nobits/#progbits if supported.

2013-01-29  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/56121
	* config/sh/sh.md (bclr_m2a, bset_m2a, bst_m2a, bld_m2a, bldsign_m2a,
	bld_reg, *bld_regqi, band_m2a, bandreg_m2a, bor_m2a, borreg_m2a,
	bxor_m2a, bxorreg_m2a): Add satisfies_constraint_K03 condition.

2013-01-29  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/cortex-a7.md (cortex_a7_neon, cortex_a7_all): Remove.
	(cortex_a7_idiv): Use cortex_a7_both instead of cortex_a7_all.

2013-01-29  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL.
	* config/arm/cortex-a7.md (cortex_a7_call): Update required units.

2013-01-29  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm-protos.h (arm_mac_accumulator_is_result): New
	declaration.
	* config/arm/arm.c (arm_mac_accumulator_is_result): New function.
	* config/arm/cortex-a7.md: New bypasses using
	arm_mac_accumulator_is_result.

2013-01-29  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/cortex-a7.md (cortex_a7_neon_mul):  New reservation.
	(cortex_a7_neon_mla): Likewise.
	(cortex_a7_fpfmad): New reservation.
	(cortex_a7_fpmacs): Use ffmas and update required units.
	(cortex_a7_fpmuld): Update required units and latency.
	(cortex_a7_fpmacd): Likewise.
	(cortex_a7_fdivs, cortex_a7_fdivd): Likewise.
	(cortex_a7_neon). Likewise.
	(bypass) Update participating units.

2013-01-29  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute.
	* config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type
	from fmac to ffma.
	* config/arm/vfp11.md (vfp_farith): Use ffmas.
	(vfp_fmul): Use ffmad.
	* config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas.
	(cortex_r4_fmacd): Use ffmad.
	* config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas.
	* config/arm/cortex-a9.md (cortex_a9_fmacs):  Use ffmas.
	(cortex_a9_fmacd): Use ffmad.
	* config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas.
	(cortex_a8_vfp_macd): Use ffmad.
	* config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas.
	(cortex_a5_fpmacd): Use ffmad.
	* config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas.
	(cortex_a15_vfp_macd): Use ffmad.
	* config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad.

2013-01-29  Jason Merrill  <jason@redhat.com>

	PR libstdc++/54314
	* varasm.c (default_assemble_visibility): Don't warn about
	visibility on artificial decls.

2013-01-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56113
	* tree-ssa-structalias.c (equiv_class_lookup): Also return
	the bitmap leader.
	(label_visit): Free duplicate bitmaps and record the leader instead.
	(perform_var_substitution): Adjust.

2013-01-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55270
	* tree-ssa-dom.c (eliminate_degenerate_phis): If we changed
	the CFG, schedule loops for fixup.

2013-01-29  Nick Clifton  <nickc@redhat.com>

	* config/rl78/rl78.c (rl78_regno_mode_code_ok_for_base_p): Allow
	SP_REG.

2013-01-28  Leif Ekblad  <leif@rdos.net>

	* config.gcc (i[34567]86-*-rdos*, x86_64-*-rdos*): New targets.
	* config/i386/i386.h (TARGET_RDOS): New macro.
	(DEFAULT_LARGE_SECTION_THRESHOLD): New macro.
	* config/i386/i386.c (ix86_option_override_internal): For 64bit
	TARGET_RDOS, set ix86_cmodel to CM_MEDIUM_PIC and flag_pic to 1.
	* config/i386/i386.opt (mlarge-data-threshold): Initialize to
	DEFAULT_LARGE_SECTION_THRESHOLD.
	* config/i386/i386.md (R14_REG, R15_REG): New constants.
	* config/i386/rdos.h: New file.
	* config/i386/rdos64.h: New file.

2013-01-28  Bernd Schmidt  <bernds@codesourcery.com>

	PR other/54814
	* reload.c (find_valid_class_1): Use in_hard_reg_set_p instead of
	TEST_HARD_REG_BIT.

2013-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/56117
	* sched-deps.c (sched_analyze_2) <case PREFETCH>: For use_cselib
	call cselib_lookup_from_insn on the MEM before calling
	add_insn_mem_dependence.

2013-01-28  Richard Biener  <rguenther@suse.de>

	* tree-inline.c (remap_gimple_stmt): Do not assing a BLOCK
	to a stmt that didn't have one.
	(copy_phis_for_bb): Likewise for PHI arguments.
	(copy_debug_stmt): Likewise for debug stmts.

2013-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56034
	* tree-loop-distribution.c (enum partition_kind): Add PKIND_REDUCTION.
	(partition_builtin_p): Adjust.
	(generate_code_for_partition): Handle PKIND_REDUCTION.  Assert
	it is the last partition.
	(rdg_flag_uses): Check SSA_NAME_IS_DEFAULT_DEF before looking
	up the vertex for the definition.
	(classify_partition): Classify whether a partition is a
	PKIND_REDUCTION, thus has uses outside of the loop.
	(ldist_gen): Inherit PKIND_REDUCTION when merging partitions.
	Merge all PKIND_REDUCTION partitions into the last partition.
	(tree_loop_distribution): Seed partitions from reductions as well.

2013-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56125
	* tree-ssa-math-opts.c (gimple_expand_builtin_pow): Don't optimize
	pow(x,c) into sqrt(x) * powi(x, n/2) or
	1.0 / (sqrt(x) * powi(x, abs(n/2))) if c is an integer or when
	optimizing for size.
	Don't optimize pow(x,c) into powi(x, n/3) * powi(cbrt(x), n%3) or
	1.0 / (powi(x, abs(n)/3) * powi(cbrt(x), abs(n)%3)) if 2c is an
	integer.

	PR tree-optimization/56094
	* gimplify.c (force_gimple_operand_1): Temporarily set input_location
	to UNKNOWN_LOCATION while gimplifying expr.

2013-01-27  Uros Bizjak  <ubizjak@gmail.com>

	PR target/56114
	* config/i386/i386.md (*movabs<mode>_1): Add square brackets around
	operand 0 in movabs insn template for -masm=intel asm alternative.
	(*movabs<mode>_2): Ditto for operand 1.

2013-01-26  David Holsgrove  <david.holsgrove@xilinx.com>

	PR target/54663
	* config.gcc (microblaze*-linux*): Add tmake_file to allow building
	of microblaze-c.o

2013-01-26  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config.gcc (microblaze*-*-*): Rename microblaze*-*-elf, update
	tm_file.

2013-01-25  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* config/aarch64/aarch64.c (TARGET_FIXED_CONDITION_CODE_REGS):
	Undef to avoid warning.

2013-01-25  Michael Haubenwallner  <michael.haubenwallner@salomon.at>

	* configure.ac (gcc_cv_ld_static_dynamic): Define for AIX native ld.
	* configure: Regenerate.

2013-01-25  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56098
	* tree-ssa-phiopt.c (nt_init_block): Don't call add_or_mark_expr
	for stmts with volatile ops.
	(cond_store_replacement): Don't optimize if assign has volatile ops.
	(cond_if_else_store_replacement_1): Don't optimize if either
	then_assign or else_assign have volatile ops.
	(hoist_adjacent_loads): Don't optimize if either def1 or def2 have
	volatile ops.

2013-01-25  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Built-in Macros): Document __XMEGA__.

2013-01-25  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (Example of asm with clobbered asm reg): Fix
	missing ':' in asm example.

2013-01-25  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Separate sq<r>dmulh_lane
	entries into lane and laneq entries.
	* config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh_lane<mode>):
	Remove AdvSIMD scalar modes.
	(aarch64_sq<r>dmulh_laneq<mode>): New.
	(aarch64_sq<r>dmulh_lane<mode>): New RTL pattern for Scalar AdvSIMD
	modes.
	* config/aarch64/arm_neon.h: Fix all the vq<r>dmulh_lane* intrinsics'
	builtin implementations to relfect changes in RTL in aarch64-simd.md.
	* config/aarch64/iterators.md (VCOND): New.
	(VCONQ): New.

2013-01-25  Georg-Johann Lay  <avr@gjlay.de>

	PR target/54222
	* config/avr/builtins.def (DEF_BUILTIN): Add LIBNAME argument.
	Add NULL LIBNAME argument to existing definitions.
	(ABSHR, ABSR, ABSLR, ABSLLR, ABSHK, ABSK, ABSLK, ABSLLK): New.
	* config/avr/avr-c.c (DEF_BUILTIN): Add LIBNAME argument.
	* config/avr/avr.c (DEF_BUILTIN): Same.
	(avr_init_builtins): Pass down LIBNAME to add_builtin_function.
	(avr_expand_builtin): Expand to a vanilla call if a libgcc
	implementation is available (DECL_ASSEMBLER_NAME is set).
	(avr_fold_absfx): New static function.
	(avr_fold_builtin): Use it to handle: AVR_BUILTIN_ABSHR,
	AVR_BUILTIN_ABSR, AVR_BUILTIN_ABSLR, AVR_BUILTIN_ABSLLR,
	AVR_BUILTIN_ABSHK, AVR_BUILTIN_ABSK, AVR_BUILTIN_ABSLK,
	AVR_BUILTIN_ABSLLK.
	* config/avr/stdfix.h (abshr, absr, abslr, absllr)
	(abshk, absk, abslk, absllk): Provide as static inline functions.

2013-01-25  Marek Polacek  <polacek@redhat.com>

	PR tree-optimization/56035
	* cfgloopmanip.c (fix_loop_structure): Remove redundant condition.

2012-01-24  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*movti_internal_rex64): Add (o,e) alternative.
	(*movtf_internal_rex64): Add (!o,C) alternative
	(*movxf_internal_rex64): Ditto.
	(*movdf_internal_rex64): Add (?r,C) and (?m,C) alternatives.

2013-01-24  Shenghou Ma  <minux.ma@gmail.com>

	* doc/invoke.texi: fix typo.
	* doc/objc.texi: fix typo.

2013-01-24  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.md (*and<mode>3_mips16): Use the "W" constraint
	for the first two alternatives.

2013-01-24  Diego Novillo  <dnovillo@google.com>

	* Makefile.in (GGC): Remove.  Replace all instances with ggc-page.o.
	(ggc-zone.o): Remove.
	* configure.ac: Remove option --with-gc.
	* configure: Re-generate.
	* doc/install.texi: Remove documentation for --with-gc.
	* gengtype.c (write_enum_defn): Remove.  Update all users.
	(write_Types_process_field): Remove generation of gt_e_* argument.
	(output_type_enum): Remove.  Update all users.
	(write_enum_defn): Remove.  Update all users.
	(enum alloc_zone): Remove.  Update all users.
	(write_splay_tree_allocator_def): Remove generation of gt_e_* argument.
	* ggc-common.c (ggc_splay_alloc): Remove first argument.
	Update all callers.
	(struct ptr_data): Remove field TYPE.  Update all users.
	(gt_pch_note_object): Remove argument TYPE.  Update all users.
	* ggc-internal.h (ggc_pch_alloc_object): Remove last argument.
	Update all users.
	* ggc-none.c (ggc_alloc_typed_stat): Remove.
	(struct alloc_zone): Remove.
	(ggc_internal_alloc_zone_stat): Remove.
	(ggc_internal_cleared_alloc_zone_stat): Remove.
	* ggc-page.c (ggc_alloc_typed_stat): Remove.
	(ggc_pch_count_object): Remove last argument.  Update all users.
	(ggc_pch_alloc_object): Remove last argument.  Update all users.
	(struct alloc_zone): Remove.
	* ggc-zone.c: Remove.
	* ggc.h (gt_pch_note_object): Remove last argument.  Update all users.
	(struct alloc_zone): Remove.
	(ggc_alloc_typed_stat): Remove.
	(ggc_alloc_typed): Remove.
	(ggc_splay_alloc): Remove first argument.
	(rtl_zone): Remove.  Update all users.
	(tree_zone): Remove.  Update all users.
	(tree_id_zone): Remove.  Update all users.
	(ggc_internal_zone_alloc_stat): Remove.  Update all users.
	(ggc_internal_zone_cleared_alloc_stat): Remove.  Update all users.
	(ggc_internal_zone_vec_alloc_stat): Remove.  Update all users.
	* tree-ssanames.c: Remove references to zone allocator in comments.

2013-01-24  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.c (avr_out_fract): Make register numbers that
	might be outside of source operand signed.

2013-01-24  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/constraints.md (Yf): New constraint.
	* config/i386/i386.md (*movdf_internal_rex64): Use Yf*f instead
	of f constraint to conditionaly disable x87 register preferences.
	(*movdf_internal): Ditto.
	(*movsf_internal): Ditto.

2013-01-24  Steven Bosscher  <steven@gcc.gnu.org>

	PR inline-asm/55934
	* lra-assigns.c (assign_by_spills): Throw away the pattern of asms
	that have operands with impossible constraints.
	Add a FIXME for a speed-up opportunity.
	* lra-constraints.c (process_alt_operands): Verify that a class
	selected from constraints on asms is valid for the operand mode.
	(curr_insn_transform): Remove incorrect comment.

2013-01-23  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.c (rs6000_delegitimize_address): Check that
	TOC operand is a valid symbol ref in the constant pool.

2013-01-23  Edgar E. Iglesias  <edgar.iglesias@gmail.com>

	* config/microblaze/linux.h: Add TARGET_OS_CPP_BUILTINS

2013-01-23  Georg-Johann Lay  <avr@gjlay.de>

	PR target/54222
	* config/avr/stdfix.h: New file.
	* t-avr (stdfix-gcc.h): New rule to build it.
	(EXTRA_HEADERS): Set it to install stdfix.h, stdfix-gcc.h.

2013-01-23  Kostya Serebryany  <kcc@google.com>

	* config/darwin.h: remove dependency on
	CoreFoundation (asan on Mac OS).

2013-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/49069
	* config/arm/arm.md (cbranchdi4, cstoredi4): Use s_register_operand
	instead of cmpdi_operand for first comparison operand.
	Don't assert that comparison operands aren't both constants.

2013-01-22  Jonathan Wakely  <jwakely.gcc@gmail.com>

	* doc/install.texi (Downloading the Source): Update references to
	downloading separate components.

2013-01-22  Jonathan Wakely  <jwakely.gcc@gmail.com>

	* doc/extend.texi (__int128): Improve grammar.

2013-01-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/56028
	* config/i386/i386.md (*movti_internal_rex64): Change (o,riF)
	alternative to (o,r).
	(*movdi_internal_rex64): Remove (!o,n) alternative.
	(DImode immediate->memory splitter): Remove.
	(DImode immediate->memory peephole2): Remove.
	(movtf): Enable for TARGET_64BIT || TARGET_SSE.
	(*movtf_internal_rex64): Rename from *movtf_internal. Change (!o,F*r)
	alternative to (!o,*r).
	(*movtf_internal_sse): New pattern.
	(*movxf_internal_rex64): New pattern.
	(*movxf_internal): Disable for TARGET_64BIT.
	(*movdf_internal_rex64): Remove (!o,F) alternative.

2013-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56074
	* dumpfile.c (dump_loc): Only print loc if LOCATION_LOCUS (loc)
	isn't UNKNOWN_LOCATION nor BUILTINS_LOCATION.
	* tree-vect-loop-manip.c (find_loop_location): Also ignore
	stmt locations where LOCATION_LOCUS of the stmt location is
	UNKNOWN_LOCATION or BUILTINS_LOCATION.

	PR target/55686
	* config/i386/i386.md (UNSPEC_STOS): New.
	(strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1,
	*strsetqi_1): Add UNSPEC_STOS.

2013-01-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/56067
	* doc/invoke.texi: Remove left over -Wsynth example.

2013-01-21  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56051
	* fold-const.c (fold_binary_loc): Don't fold
	X < (cast) (1 << Y) into (X >> Y) != 0 if cast is either
	a narrowing conversion, or widening conversion from signed
	to unsigned.

2013-01-21  Uros Bizjak  <ubizjak@gmail.com>

	PR rtl-optimization/56023
	* haifa-sched.c (fix_inter_tick): Do not update ticks of instructions,
	dependent on debug instruction.

2013-01-21  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/56022
	* function.c (allocate_struct_function): Call
	invoke_set_current_function_hook earlier.

2013-01-21  Jakub Jelinek  <jakub@redhat.com>

	* reload1.c (init_reload): Only initialize reload_obstack
	during the first call.

2013-01-21  Marek Polacek  <polacek@redhat.com>

	* cfgloop.c (verify_loop_structure): Fix up grammar.

2013-01-21  Yi-Hsiu Hsu  <ahsu@marvell.com>

	* config/arm/marvell-pj4.md (pj4_shift_conds, pj4_alu_shift,
	pj4_alu_shift_conds, pj4_shift): Handle simple_alu_shift.

2013-01-21  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/56058
	* config/arm/marvell-pj4.md: Update copyright year.
	Fix up use of alu to alu_reg and simple_alu_imm.

2013-01-21  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (enabled): Do not disable fma4 for TARGET_FMA.

2013-01-20  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/55433
	* lra-constraints.c (curr_insn_transform): Don't reuse original
	insn for secondary memory move when memory mode should be different.

2013-01-20  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	* config/pa/pa.md (atomic_loaddi, atomic_loaddi_1, atomic_storedi,
	atomic_storedi_1): New patterns.

2013-01-20  Venkataramanan Kumar  <venkataramanan.kumar@amd.com>

	btver2 pipeline descriptions.
	* config/i386/i386.c: Enable CPU_BTVER2 to use btver2 pipeline
	descriptions.
	* config/i386/i386.md (btver2_decode): New type attributes.
	* config/i386/sse.md (btver2_decode, btver2_sse_attr): New
	type attributes.
	* config/i386/btver2.md: New file describing btver2 pipelines.

2013-01-19  Andrew Pinski  <apinski@cavium.com>

	PR tree-optimization/52631
	* tree-ssa-sccvn (visit_use): Before looking up the original
	statement, try looking up the simplified expression.

2013-01-19  Anthony Green  <green@moxielogic.com>

	* config/moxie/moxie.c (moxie_expand_prologue): Set
	current_function_static_stack_size.

2013-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/56029
	* tree-phinodes.c (reserve_phi_args_for_new_edge): Set
	gimple_phi_arg_location for the new arg to UNKNOWN_LOCATION.

2013-01-18  Sharad Singhai  <singhai@google.com>

	PR tree-optimization/55995
	* dumpfile.c (dump_loc): Print location only if available.
	* tree-vectorizer.c (increase_alignment): Intialize vect_location.

2013-01-18  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/55433
	* lra-constraints.c (curr_insn_transform): Reuse original insn for
	secondary memory move.
	(inherit_reload_reg): Use rclass instead of cl for
	check_secondary_memory_needed_p.

2013-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/56015
	* expr.c (expand_expr_real_2) <case COMPLEX_EXPR>: Handle
	the case where writing real complex part of target modifies op1.

2013-01-18  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_vcond_internal<mode>): Handle unordered cases.
	* config/aarch64/iterators.md (v_cmp_result): New.

2013-01-18  Yi-Hsiu Hsu  <ahsu@marvell.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/marvell-pj4.md: New file.
	* config/arm/arm.c (arm_issue_rate): Add marvell_pj4.
	* config/arm/arm.md (generic_sched): Add marvell_pj4.
	(generic_vfp): Likewise.
	* config/arm/arm-cores.def: Add marvell-pj4.
	* config/arm/arm-tune.md: Regenerate.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/bpabi.h (BE8_LINK_SPEC): Add marvell_pj4.
	* doc/invoke.texi: Document marvell-pj4.

2013-01-18  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/arm_neon.h: Map scalar types to standard types.

2013-01-18  Alexandre Oliva  <aoliva@redhat.com>

	PR debug/54114
	PR debug/54402
	PR debug/49888
	* var-tracking.c (negative_power_of_two_p): New.
	(global_get_addr_cache, local_get_addr_cache): New.
	(get_addr_from_global_cache, get_addr_from_local_cache): New.
	(vt_canonicalize_addr): Rewrite using the above.  Adjust the
	heading comment.
	(vt_stack_offset_p): Remove.
	(vt_canon_true_dep): Always canonicalize loc's address.
	(clobber_overlapping_mems): Make sure we have a MEM.
	(local_get_addr_clear_given_value): New.
	(val_reset): Clear local cached entries.
	(compute_bb_dataflow): Create and release the local cache.
	Disable duplicate MEMs clobbering.
	(emit_notes_in_bb): Clobber MEMs likewise.
	(vt_emit_notes): Create and release the local cache.
	(vt_initialize, vt_finalize): Create and release the global
	cache, respectively.
	* alias.c (rtx_equal_for_memref_p): Compare operands of ENTRY_VALUEs.

2013-01-18  Alexandre Oliva  <aoliva@redhat.com>

	PR libmudflap/53359
	* tree-mudflap.c (mudflap_finish_file): Skip deferred decls
	not found in the symtab.

2013-01-18  Alexandre Oliva  <aoliva@redhat.com>

	PR debug/56006
	PR rtl-optimization/55547
	PR rtl-optimization/53827
	PR debug/53671
	PR debug/49888
	* alias.c (offset_overlap_p): New, factored out of...
	(memrefs_conflict_p): ... this.  Use absolute sizes.  Retain
	the conservative special case for symbolic constants.  Don't
	adjust zero sizes on alignment.

2013-01-18  Bernd Schmidt  <bernds@codesourcery.com>

	PR rtl-optimization/52573
	* regrename.c (build_def_use): Ignore REG_DEAD notes if there is a
	REG_UNUSED for the same register.

2013-01-17  Richard Biener  <rguenther@suse.de>
	    Marek Polacek  <polacek@redhat.com>

	PR rtl-optimization/55833
	* loop-unswitch.c (unswitch_loops): Move loop verification...
	(unswitch_single_loop): ...here.  Call mark_irreducible_loops.
	* cfgloopmanip.c (fix_loop_placement): Add IRRED_INVALIDATED parameter.
	Set it to true when we're removing a loop from hierarchy tree in
	an irreducible region.
	(fix_bb_placements): Adjust caller.
	(fix_loop_placements): Likewise.

2013-01-17  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/builtins.def (DEF_BUILTIN): Factor out
	"__builtin_avr_" from NAME, turn NAME to an uppercase identifier.
	Factor out 'CODE_FOR_' from ICODE, use 'nothing' instead of '-1'.
	Remove ID.  Adjust comments.
	* config/avr/avr-c.c (avr_builtin_name): Remove.
	(avr_cpu_cpp_builtins): Use DEF_BUILTIN instead of for-loop.
	* config/avr/avr.c (avr_tolower): New static function.
	(DEF_BUILTIN): Remove parameter ID.  Prefix ICODE by 'CODE_FOR_'.
	Stringify NAME, prefix it with "__builtin_avr_" and lowercase it.
	(avr_expand_builtin): Assert insn_code != CODE_FOR_nothing for
	default expansion.

2013-01-17  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/55273
	* loop-iv.c (iv_number_of_iterations): Consider zero iteration case.

2013-01-17  Uros Bizjak  <ubizjak@gmail.com>

	PR target/55981
	* config/i386/sync.md (atomic_store<mode>): Always generate SWImode
	store through atomic_store<mode>_1.
	(atomic_store<mode>_1): Macroize insn using SWI mode iterator.

2013-01-17  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimizations/55264
	* ipa-inline-transform.c (can_remove_node_now_p_1): Never return true
	for virtual methods.
	* ipa.c (symtab_remove_unreachable_nodes): Never return true for
	virtual methods before inlining is over.
	* cgraph.h (cgraph_only_called_directly_or_aliased_p): Return false for
	virtual functions.
	* cgraphclones.c (cgraph_create_virtual_clone): Mark clones as
	non-virtual.

2013-01-16  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/56005
	* sched-deps.c (sched_analyze_2): Check deps->readonly for adding
	pending reads for prefetch.

2013-01-16  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64.md
	(*cstoresi_neg_uxtw): New pattern.
	(*cmovsi_insn_uxtw): New pattern.
	(*<optab>si3_uxtw): New pattern.
	(*<LOGICAL:optab>_<SHIFT:optab>si3_uxtw): New pattern.
	(*<optab>si3_insn_uxtw): New pattern.
	(*bswapsi2_uxtw): New pattern.

2013-01-16  Richard Biener  <rguenther@suse.de>

	* tree-inline.c (tree_function_versioning): Remove set but
	never used variable.

2013-01-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55964
	* tree-flow.h (rename_variables_in_loop): Remove.
	(rename_variables_in_bb): Likewise.
	* tree-loop-distribution.c (update_phis_for_loop_copy): Remove.
	(copy_loop_before): Adjust and delete update-ssa status.
	* tree-vect-loop-manip.c (rename_variables_in_bb): Make static.
	(rename_variables_in_bb): Likewise.  Properly walk over predecessors.
	(rename_variables_in_loop): Remove.
	(slpeel_update_phis_for_duplicate_loop): Likewise.
	(slpeel_tree_duplicate_loop_to_edge_cfg): Handle nested loops,
	use available cfg machinery instead of duplicating it.
	Update PHI nodes and perform poor-mans SSA update here.
	(slpeel_tree_peel_loop_to_edge): Adjust.

2013-01-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/54767
	PR tree-optimization/53465
	* tree-vrp.c (vrp_meet_1): Revert original fix for PR53465.
	(vrp_visit_phi_node): For PHI arguments coming via backedges
	drop all symbolical range information.
	(execute_vrp): Compute backedges.

2013-01-16  Richard Biener  <rguenther@suse.de>

	* doc/install.texi: Update CLooG and ISL requirements to
	0.18.0 and 0.11.1.

2013-01-16  Christian Bruel  <christian.bruel@st.com>

	PR target/55301
	* config/sh/sh.c (sh_expand_prologue): Postpone new_stack mem symbol.
	(broken_move): Handle UNSPECV_SP_SWITCH_B.
	* config/sh/sh.md (sp_switch_1): Use set (reg:SI SP_REG).

2013-01-16  DJ Delorie  <dj@redhat.com>

	* config/sh/sh.md (UNSPECV_SP_SWITCH_B): New.
	(UNSPECV_SP_SWITCH_E): New.
	(sp_switch_1): Change to an unspec.
	(sp_switch_2): Change to an unspec.  Don't use post-inc when we
	replace $r15.

2013-01-16  Uros Bizjak  <ubizjak@gmail.com>

	* emit-rtl.c (need_atomic_barrier_p): Mask memory model argument
	with MEMMODEL_MASK before comparing with MEMMODEL_* memory types.
	* optabs.c (maybe_emit_sync_lock_test_and_set): Ditto.
	(expand_mem_thread_fence): Ditto.
	(expand_mem_signal_fence): Ditto.
	(expand_atomic_load): Ditto.
	(expand_atomic_store): Ditto.

2013-01-16  Alexandre Oliva  <aoliva@redhat.com>

	PR rtl-optimization/55547
	PR rtl-optimization/53827
	PR debug/53671
	PR debug/49888
	* alias.c (memrefs_conflict_p): Set sizes to negative after
	AND adjustments.

2013-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/55940
	* function.c (thread_prologue_and_epilogue_insns): Always
	add crtl->drap_reg to set_up_by_prologue.set, even if
	stack_realign_drap is false.

2013-01-15  Jan-Benedict Glaw  <jbglaw@lug-owl.de>

	* config/vax/vax.md (add<mode>3, sub<mode>3, mul<mode>3, div<mode>3,
	and<mode>3, *and<mode>_const_int, ior<mode>3, xor<mode>3, ashrsi3,
	*call): Fix indention.

2013-01-15  Tom de Vries  <tom@codesourcery.com>

	PR target/55876
	* optabs.c (widen_operand): Use gen_lowpart instead of gen_rtx_SUBREG.
	Update comment.

2013-01-15  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/55153
	* sched-deps.c (sched_analyze_2): Add pending reads for prefetch.

2013-01-15  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/55920
	* tree-sra.c (analyze_access_subtree): Do not mark non-removable
	accesses as grp_to_be_debug_replaced.

2013-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/55920
	* tree-sra.c (sra_modify_assign): If for lacc->grp_to_be_debug_replaced
	there is non-useless type conversion needed from debug rhs to lhs,
	use build_debug_ref_for_model and/or VIEW_CONVERT_EXPR.

2013-01-15  Joseph Myers  <joseph@codesourcery.com>
	    Mikael Pettersson  <mikpe@it.uu.se>

	PR target/43961
	* config/arm/arm.h (ADDR_VEC_ALIGN): Align SImode jump tables for
	Thumb.
	(ASM_OUTPUT_CASE_LABEL): Remove.
	(ASM_OUTPUT_BEFORE_CASE_LABEL): Define to empty.
	* final.c (shorten_branches): Update alignment of labels before
	jump tables if CASE_VECTOR_SHORTEN_MODE.

2013-01-15  Richard Biener  <rguenther@suse.de>

	PR bootstrap/55961
	* system.h: Do not include gmp.h for building host tools.

2013-01-15  Richard Biener  <rguenther@suse.de>

	PR middle-end/55882
	* emit-rtl.c (set_mem_attributes_minus_bitpos): Correctly
	account for bitpos when computing alignment.

2013-01-15  Vladimir Yakovlev  <vladimir.b.yakovlev@intel.com>

	* config/i386/i386-c.c (ix86_target_macros_internal): New case.
	(ix86_target_macros_internal): Likewise.

	* config/i386/i386.c (m_CORE2I7): Removed.
	(m_CORE_HASWELL): New macro.
	(m_CORE_ALL): Likewise.
	(initial_ix86_tune_features): m_CORE2I7 is replaced by m_CORE_ALL.
	(initial_ix86_arch_features): Likewise.
	(processor_target_table): Initializations for Core avx2.
	(cpu_names): New names "core-avx2".
	(ix86_option_override_internal): Changed PROCESSOR_COREI7 by
	PROCESSOR_CORE_HASWELL.
	(ix86_issue_rate): New case.
	(ia32_multipass_dfa_lookahead): Likewise.
	(ix86_sched_init_global): Likewise.

	* config/i386/i386.h (TARGET_HASWELL): New macro.
	(target_cpu_default): New TARGET_CPU_DEFAULT_haswell.
	(processor_type): New PROCESSOR_HASWELL.

2013-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/55955
	* tree-vect-loop.c (vectorizable_reduction): Give up early on
	*SHIFT_EXPR and *ROTATE_EXPR codes.

	PR tree-optimization/48766
	* opts.c (common_handle_option): For -fwrapv disable -ftrapv, for
	-ftrapv disable -fwrapv.

2013-01-14  Georg-Johann Lay  <avr@gjlay.de>

	PR target/55974
	* config/avr/avr-c.c (avr_cpu_cpp_builtins): Define __FLASH
	etc. to 1 and not to __flash.
	Use LL suffix for __INT24_MAX__ with -mint8.
	Use ULL suffix for __UINT24_MAX__ with -mint8.

2013-01-14  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-arch.h
	(struct base_arch_s): Use typedef avr_arch_t instead.
	(struct arch_info_s): Use typedef avr_arch_info_t instead.
	(struct mcu_type_s): Use typedef avr_mcu_t instead.
	* config/avr/avr.c: Same.
	* config/avr/avr-devices.c: Same.
	* config/avr/driver-avr.c: Same.
	* config/avr/gen-avr-mmcu-texi.c: Same.
	* config/avr/avr-mcus.def: Adjust comment.

2013-01-14  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New.
	* config/aarch64/iterators.md (VALLDI): New.

2013-01-14  Uros Bizjak  <ubizjak@gmail.com>
	    Andi Kleen  <ak@linux.intel.com>

	PR target/55948
	* config/i386/sync.md (atomic_store<mode>_1): New pattern.
	(atomic_store<mode>): Call atomic_store<mode>_1 for IX86_HLE_RELEASE
	memmodel flag.

2013-01-14  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-stdint.h: Remove trailing blanks.
	* config/avr/avr-log.h: Same.
	* config/avr/avr-arch.h: Same.
	* config/avr/avr-devices.c: Same.
	* config/avr/avr-dimode.md: Same.
	* config/avr/predicates.md: Same.
	* config/avr/avr-c.c: Same.  And fix typo.

	* config/avr/avr-protos.h: Same.  And:
	(function_arg_regno_p): Rename to avr_function_arg_regno_p.
	(init_cumulative_args): Rename to avr_init_cumulative_args.
	(expand_prologue): Rename to avr_expand_prologue.
	(expand_epilogue): Rename to avr_expand_epilogue.
	(adjust_insn_length): Rename to avr_adjust_insn_length.
	(notice_update_cc): Rename to avr_notice_update_cc.
	(final_prescan_insn): Rename to avr_final_prescan_insn.
	* config/avr/avr.c: Same.
	* config/avr/avr.h: Same.
	* config/avr/avr.md: Remove trailing blanks.
	(prologue): Use avr_expand_prologue.
	(epilogue, sibcall_epilogue): Use avr_expand_epilogue.

2013-01-14  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_expr_location, verify_expr_location_1,
	verify_location, collect_subblocks): New functions.
	(verify_gimple_in_cfg): Verify that locations only reference
	BLOCKs in the functions BLOCK tree.

2013-01-14  Richard Biener  <rguenther@suse.de>

	* tree-cfgcleanup.c (remove_forwarder_block): Unshare propagated
	PHI argument.
	* graphite-sese-to-poly.c (insert_out_of_ssa_copy): Properly
	unshare reference.
	(insert_out_of_ssa_copy_on_edge): Likewise.
	(rewrite_close_phi_out_of_ssa): Likewise.
	* tree-ssa.c (insert_debug_temp_for_var_def): Properly unshare
	debug expressions.
	* tree-ssa-pre.c (insert_into_preds_of_block): Properly unshare
	propagated constants.
	* tree-cfg.c (tree_node_can_be_shared): Handled component-refs
	can not be shared.

2013-01-14  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-modes.def: Add GPL copyright notice.

2013-01-13  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sync.md (mem_thread_fence): Mask operands[0] with
	MEMMODEL_MASK to determine memory model.
	(atomic_store<mode>): Ditto from operands[2].
	* config/i386/i386.c (ix86_memmodel_check): Declare "strong" as bool.

2013-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR fortran/55935
	* gimple-fold.c (get_symbol_constant_value): Call unshare_expr.
	(fold_gimple_assign): Don't call unshare_expr here.
	(fold_ctor_reference): Call unshare_expr.

2013-01-13  Terry Guo  <terry.guo@arm.com>

	* Makefile.in (s-mlib): New argument MULTILIB_REUSE.
	* doc/fragments.texi: Document MULTILIB_REUSE.
	* gcc.c (multilib_reuse): New internal spec.
	(set_multilib_dir): Also search multilib from multilib_reuse.
	* genmultilib (tmpmultilib3): Refactor code.
	(tmpmultilib4): Ditto.
	(multilib_reuse): New multilib argument.

2013-01-13  Richard Sandiford  <rdsandiford@googlemail.com>

	* Makefile.in: Update copyright.

2013-01-12  Tom de Vries  <tom@codesourcery.com>

	PR middle-end/55890
	* calls.c (expand_call): Check if arg_nr is valid.

2013-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* doc/extend.texi (X86 Built-in Functions): Add whitespace in
	__builtin_ia32_paddb256 and __builtin_ia32_pavgb256
	documentation.  Add missing '__' in front of
	__builtin_ia32_packssdw256.

2013-01-11  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	PR target/55719
	* config/s390/s390.c (s390_preferred_reload_class): Do not return
	NO_REGS for larl operands.
	(s390_reload_larl_operand): Use s390_load_address instead of
	emit_move_insn.

2013-01-11  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_node_sharing_1): Split out from ...
	(verify_node_sharing): ... here.
	(verify_gimple_in_cfg): Use verify_node_sharing_1 for walk_tree.

2013-01-11  Eric Botcazou  <ebotcazou@adacore.com>

	* configure.ac (Tree checking): Set TREECHECKING to yes if enabled.
	Substitute TREECHECKING.
	* configure: Regenerate.
	* Makefile.in (TREECHECKING): New.

2013-01-11  Richard Guenther  <rguenther@suse.de>

	PR tree-optimization/44061
	* tree-vrp.c (extract_range_basic): Compute zero as
	value-range for __builtin_constant_p of function parameters.

2013-01-10  Richard Sandiford  <rdsandiford@googlemail.com>

	Update copyright years.

2013-01-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/55672
	* lra-eliminations.c (mark_not_eliminable): Permit addition with
	const to be eliminable.

2013-01-10  David Edelsohn  <dje.gcc@gmail.com>

	* configure.ac (HAVE_AS_TLS): Add check for powerpc-ibm-aix.
	* configure: Regenerate.

2013-01-10  Richard Biener  <rguenther@suse.de>

	* builtins.c (expand_builtin_init_trampoline): Use set_mem_attributes.

2013-01-10  Richard Biener  <rguenther@suse.de>

	PR bootstrap/55792
	* tree-into-ssa.c (rewrite_add_phi_arguments): Do not set
	locations for virtual PHI arguments.
	(rewrite_update_phi_arguments): Likewise.

2013-01-10  Joel Sherrill  <joel.sherrill@OARcorp.com>

	* config/v850/rtems.h (ASM_SPEC): Pass -m8byte-align and -mgcc-abi
	on to assembler.

2013-01-10  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/55921
	* tree-complex.c (expand_complex_asm): New function.
	(expand_complex_operations_1): Call it for GIMPLE_ASM.

2013-01-10  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	PR target/55718
	* config/s390/s390.c (s390_symref_operand_p)
	(s390_loadrelative_operand_p): Merge the two functions.
	(s390_check_qrst_address, print_operand_address): Add parameters
	to s390_loadrelative_operand_p invokation.
	(s390_check_symref_alignment): Use s390_loadrelative_operand_p.
	(s390_reload_larl_operand, s390_secondary_reload): Use
	s390_loadrelative_operand_p instead of s390_symref_operand_p.
	(legitimize_pic_address): Handle @GOTENT and @PLT + addend.

2013-01-09  Mike Stump  <mikestump@comcast.net>

	* dse.c (record_store): Remove unnecessary assert.

2013-01-09  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/55569
	* cfgloopmanip.c (scale_loop_profile): Make ITERATION_BOUND gcov_type.
	* cfgloop.h (scale_loop_profile): Likewise.

2013-01-09  Jan Hubicka  <jh@suse.cz>

	PR lto/45375
	* ipa-inline.c (ipa_inline): Remove extern inlines and virtual
	functions.
	* cgraphclones.c (cgraph_clone_node): Cpoy also LTO file data.

2013-01-09  Richard Sandiford  <rdsandiford@googlemail.com>

	PR middle-end/55114
	* expr.h (maybe_emit_group_store): Declare.
	* expr.c (maybe_emit_group_store): New function.
	* builtins.c (expand_builtin_int_roundingfn): Call it.
	(expand_builtin_int_roundingfn_2): Likewise.

2013-01-09  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/55829
	* lra-constraints.c (match_reload): Add code for absent output.
	(curr_insn_transform): Add code for reloads of matched inputs
	without output.

2013-01-09  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (*vec_interleave_highv2df): Change mode
	attribute of movddup insn to DF.
	(*vec_interleave_lowv2df): Ditto.
	(vec_dupv2df): Ditto.

2013-01-09  Jan Hubicka  <jh@suse.cz>

	PR tree-optimiation/55875
	* tree-ssa-loop-niter.c (number_of_iterations_cond): Add
	EVERY_ITERATION parameter.
	(number_of_iterations_exit): Check if exit is executed every iteration.
	(idx_infer_loop_bounds): Similarly here.
	(n_of_executions_at_most): Simplify
	to only test for cases where statement is dominated by the
	particular bound; handle correctly the "postdominance" test.
	(scev_probably_wraps_p): Use max loop iterations info
	as a global bound first.

2013-01-09  Nguyen Duy Dat  <dat.nguyen.yn@rvc.renesas.com>
	    Nick Clifton  <nickc@redhat.com>

	* config/v850/v850.md (cbranchsf4): New pattern.
	(cstoresf4): New pattern.
	(cbranchdf4): New pattern.
	(cstoredf4): New pattern.
	(movsicc): Disallow floating point comparisons.
	(cmpsf_le_insn): Fix order of operators.
	(cmpsf_lt_insn): Likewise.
	(cmpsf_eq_insn): Likewise.
	(cmpdf_le_insn): Likewise.
	(cmpdf_lt_insn): Likewise.
	(cmpdf_eq_insn): Likewise.
	(cmpsf_ge_insn): Use LE comparison.
	(cmpdf_ge_insn): Likewise.
	(cmpsf_gt_insn): Use LT comparison.
	(cmpdf_gt_insn): Likewise.
	(cmpsf_ne_insn): Delete pattern.
	(cmpdf_ne_insn): Delete pattern.
	* config/v850/v850.c (v850_gen_float_compare): Use
	gen_cmpdf_eq_insn for NE comparison.
	(v850_float_z_comparison_operator)
	(v850_float_nz_comparison_operator): Move from here ...
	* config/v850/predicates.md: ... to here.  Move GT and GE
	comparisons into v850_float_z_comparison_operator.
	* config/v850/v850-protos.h (v850_float_z_comparison_operator):
	Delete prototype.
	(v850_float_nz_comparison_operator): Likewise.

2013-01-09  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	* config/pa/pa.c (pa_emit_move_sequence): Replace calls to gen_insv
	with calls to gen_insvsi/gen_insvdi.

2013-01-09  Venkataramanan Kumar  <venkataramanan.kumar@amd.com>

	* config/i386/i386.c (initial_ix86_tune_features): Set up
	X86_TUNE_AVX128_OPTIMAL for m_BTVER2.

2013-01-09  Steven Bosscher  <steven@gcc.gnu.org>
	    Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/48189
	* predict.c (predict_loops): If max is 0, don't call compare_tree_int.
	If nitercst is 0, don't predict the exit edge.

2013-01-08  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* config/aarch64/aarch64.c (aarch64_print_operand): Replace %r
	in asm_fprintf with reg_names.
	(aarch64_print_operand_address): Likewise.
	(aarch64_return_addr): Likewise.
	* config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove.

2013-01-08  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	* config/pa/pa.h (VAL_U6_BITS_P): Define.
	(INT_U6_BITS): Likewise.
	* config/pa/predicates.md (uint6_operand): New predicate.
	(shift5_operand, shift6_operand): Likewise.
	* config/pa/pa.md (lshrsi3, rotrsi3): Use shift5_operand instead of
	arith32_operand.
	(lshrdi3): Use shift6_operand.
	(shrpsi4, shrpdi4): New insn patterns.
	(extzv): Delete expander.
	(extzvsi, extzvdi): New expanders.  Use uint5_operand and uint6_operand
	predicates in unamed zero extract patterns.  Tighten common constraint.
	(extv): Delete expander.
	(extvsi, extvdi): New expanders.  Use uint5_operand and uint6_operand
	predicates in unamed sign extract patterns.  Tighten common constraint.
	(insv): Delete expander.
	(insvsi, insvdi): New expanders.  Use uint5_operand and uint6_operand
	predicates in unamed insert patterns.  Tighten common constraint.
	Change uint32_operand predicate to uint6_operand predicate in unamed
	DImode pattern to insert constant values of type 1...1xxxx.

2013-01-04  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/55823
	* ipa-prop.c (update_indirect_edges_after_inlining): Fix ordering
	issue.

2013-01-08  Jakub Jelinek  <jakub@redhat.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR rtl-optimization/55845
	* df-problems.c (can_move_insns_across): Stop scanning at
	volatile_insn_p source instruction or give up if
	across_from .. across_to range contains any volatile_insn_p
	instructions.

2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd.md (vec_init<mode>): New.
	* config/aarch64/aarch64-protos.h (aarch64_expand_vector_init):
	Declare.
	* config/aarch64/aarch64.c (aarch64_simd_dup_constant,
	aarch64_simd_make_constant, aarch64_expand_vector_init): New.

2013-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR fortran/55341
	* asan.c (asan_clear_shadow): New function.
	(asan_emit_stack_protection): Use it.

2013-01-08  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_simd_vec_<su>mult_lo_<mode>,
	aarch64_simd_vec_<su>mult_hi_<mode>): Separate instruction and operand
	with tab instead of space.

2013-01-08  Nick Clifton  <nickc@redhat.com>

	* config/rl78/rl78.c (rl78_expand_prologue): Always select
	register bank 0 at the start of an interrupt handler.
	* config/rl78/rl78.md (mulsi3_g13): Correct values for MDBL and
	MDBH registers.

2013-01-08  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_simd_bsl<mode>_internal): Add floating-point modes.
	(aarch64_simd_bsl): Likewise.
	(aarch64_vcond_internal<mode>): Likewise.
	(vcond<mode><mode>): Likewise.
	(aarch64_cm<cmp><mode>): Fix constraints, add new modes.
	* config/aarch64/iterators.md (V_cmp_result): Add V2DF.

2013-01-08  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_builtin_vectorized_function): Handle sqrt, sqrtf.

2013-01-08  Martin Jambor  <mjambor@suse.cz>

	PR debug/55579
	* tree-sra.c (analyze_access_subtree): Return true also after
	potentially creating a debug-only replacement.

2013-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/55890
	* tree-ssa-ccp.c (evaluate_stmt): Use gimple_call_builtin_p.

	PR tree-optimization/54120
	* tree-vrp.c (range_fits_type_p): Don't allow
	src_precision < precision from signed vr to unsigned_p
	if vr->min or vr->max is negative.
	(simplify_float_conversion_using_ranges): Test can_float_p
	against CODE_FOR_nothing.

2013-01-08  Jakub Jelinek  <jakub@redhat.com>
	    Richard Biener  <rguenther@suse.de>

	PR middle-end/55851
	* fold-const.c (int_binop_types_match_p): Allow all INTEGRAL_TYPE_P
	types instead of just INTEGER_TYPE types.

2013-01-07  Mark Kettenis  <kettenis@openbsd.org>

	* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE, LIBGCC2_TF_CEXT,
	TF_SIZE): Define.

2013-01-07  Steve Ellcey  <sellcey@mips.com>

	PR target/42661
	* config/mips/mips.opt: Change mad to mmad to match documentation.

2013-01-07  Georg-Johann Lay  <avr@gjlay.de>

	PR target/55897
	* doc/extend.texi (AVR Named Address Spaces): __memx goes into
	.progmemx.data now.

2013-01-07  Georg-Johann Lay  <avr@gjlay.de>

	PR target/55897
	* config/avr/avr.h (ADDR_SPACE_COUNT): New enum.
	(avr_addrspace_t): Add .section_name field.
	* config/avr/avr.c (progmem_section): Use ADDR_SPACE_COUNT as
	array size.
	(avr_addrspace): Same.  Initialize .section_name.  Remove last
	NULL entry.  Put __memx into .progmemx.data.
	(progmem_section_prefix): Remove.
	(avr_asm_init_sections): No need to initialize progmem_section.
	(avr_asm_named_section): Use avr_addrspace[].section_name to get
	section name prefix.
	(avr_asm_select_section): Ditto.  And use get_unnamed_section to
	retrieve the progmem section.
	* avr-c.c (avr_cpu_cpp_builtins): Use ADDR_SPACE_COUNT as loop
	boundary to run over avr_addrspace[].
	(avr_register_target_pragmas): Ditto.

2013-01-06  Jakub Jelinek  <jakub@redhat.com>

	* varasm.c (output_constant_def_contents): For asan_protect_global
	protected strings, adjust DECL_ALIGN if needed, before testing for
	anchored symbols.
	(place_block_symbol): Adjust size for asan protected STRING_CSTs if
	TREE_CONSTANT_POOL_ADDRESS_P.  Increase alignment for asan protected
	normal decls.
	(output_object_block): For asan protected decls, emit asan padding
	after their contents.
	* asan.c (asan_protect_global): Don't check TREE_ASM_WRITTEN here.
	(asan_finish_file): Test it here instead.

2013-01-07  Nick Clifton  <nickc@redhat.com>
	    Matthias Klose  <doko@debian.org>
	    Doug Kwan  <dougkwan@google.com>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR driver/55470
	* collect2.c (main): Support -fuse-ld=bfd and -fuse-ld=gold.

	* common.opt: Add fuse-ld=bfd and fuse-ld=gold.

	* gcc.c (LINK_COMMAND_SPEC): Pass -fuse-ld=* to collect2.

	* opts.c (comman_handle_option): Ignore -fuse-ld=bfd and -fuse-ld=gold.

	* doc/invoke.texi: Document -fuse-ld=bfd and -fuse-ld=gold.

2013-01-07  Georg-Johann Lay  <avr@gjlay.de>

	PR target/54461
	* doc/install.texi (Cross-Compiler-Specific Options): Document
	--with-avrlibc.

2013-01-07  Tejas Belagod  <tejas.belagod@arm.com>

	* config/aarch64/arm_neon.h (vmovn_high_is16, vmovn_high_s32,
	vmovn_high_s64, vmovn_high_u16, vmovn_high_u32, vmovn_high_u64,
	vqmovn_high_s16, vqmovn_high_s32, vqmovn_high_s64, vqmovn_high_u16,
	vqmovn_high_u32, vqmovn_high_u64, vqmovun_high_s16, vqmovun_high_s32,
	vqmovun_high_s64): Fix source operand number and update copyright.

2013-01-07  Richard Biener  <rguenther@suse.de>

	PR middle-end/55890
	* gimple.h (gimple_call_builtin_p): New overload.
	* gimple.c (validate_call): New function.
	(gimple_call_builtin_p): Likewise.
	* tree-ssa-structalias.c (find_func_aliases_for_builtin_call):
	Use gimple_call_builtin_p.
	(find_func_clobbers): Likewise.
	* tree-ssa-strlen.c (adjust_last_stmt): Likewise.
	(strlen_optimize_stmt): Likewise.

2013-01-07  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/arm_neon.h (vld1_dup_*): Make argument const.
	(vld1q_dup_*): Likewise.
	(vld1_*): Likewise.
	(vld1q_*): Likewise.
	(vld1_lane_*): Likewise.
	(vld1q_lane_*): Likewise.

2013-01-07  Richard Biener  <rguenther@suse.de>

	* lto-streamer.h (LTO_minor_version): Bump to 2.

2013-01-07  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-protos.h
	(aarch64_const_double_zero_rtx_p): Rename to...
	(aarch64_float_const_zero_rtx_p): ...this.
	(aarch64_float_const_representable_p): New.
	(aarch64_output_simd_mov_immediate): Likewise.
	* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): Refactor
	move immediate case.
	* config/aarch64/aarch64.c
	(aarch64_const_double_zero_rtx_p): Rename to...
	(aarch64_float_const_zero_rtx_p): ...this.
	(aarch64_print_operand): Allow printing of new constants.
	(aarch64_valid_floating_const): New.
	(aarch64_legitimate_constant_p): Check for valid floating-point
	constants.
	(aarch64_simd_valid_immediate): Likewise.
	(aarch64_vect_float_const_representable_p): New.
	(aarch64_float_const_representable_p): Likewise.
	(aarch64_simd_imm_zero_p): Also allow for floating-point 0.0.
	(aarch64_output_simd_mov_immediate): New.
	* config/aarch64/aarch64.md (*movsf_aarch64): Add new alternative.
	(*movdf_aarch64): Likewise.
	* config/aarch64/constraints.md (Ufc): New.
	(Y): call aarch64_float_const_zero_rtx.
	* config/aarch64/predicates.md (aarch64_fp_compare_operand): New.

2013-01-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55888
	PR tree-optimization/55862
	* tree-ssa-pre.c (phi_translate_1): Revert previous change.
	(valid_in_sets): Check if a NAME has a leader in AVAIL_OUT,
	not if it is contained therein.

2013-01-07  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/t-avr: Typo.

2013-01-07  Georg-Johann Lay  <avr@gjlay.de>

	PR55243
	* config/avr/t-avr: Don't automatically rebuild
	$(srcdir)/config/avr/t-multilib
	$(srcdir)/config/avr/avr-tables.opt
	$(srcdir)/doc/avr-mmcu.texi
	(avr-mcus): New phony target to build them on request.
	(s-avr-mlib, s-avr-mmcu-texi): Remove.
	* avr/avr-mcus.def: Adjust comments.

2013-01-07  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (DEFAULT_PCC_STRUCT_RETURN): Remove.

2013-01-06  Richard Sandiford  <rdsandiford@googlemail.com>

	* file-find.c, file-find.h, realmpfr.c: Add FSF as copyright holder.

2013-01-06  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tilepro/gen-mul-tables.cc: Put copyright on one line.

2013-01-05  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/aix53.h (LIB_SPEC): Add -lpthreads when compiling
	to generate profiling.
	* config/rs6000/aix64.h (LIB_SPEC): Same.

2013-01-04  Andrew Pinski  <apinski@cavium.com>

	* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
	New function.
	(TARGET_FIXED_CONDITION_CODE_REGS): Define.

2013-01-04  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.c (ix86_legitimize_address): Call convert_to_mode
	unconditionally.
	(ix86_expand_move): Ditto.
	(ix86_zero_extend_to_Pmode): Ditto.
	(ix86_expand_call): Ditto.
	(ix86_expand_special_args_builtin): Ditto.
	(ix86_expand_builtin): Ditto.

2013-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55862
	* tree-ssa-pre.c (phi_translate_1): Valueize SSA names after
	translating them through PHI nodes.

2013-01-04  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/55755
	* tree-sra.c (sra_modify_assign): Do not check that an access has no
	children when trying to avoid producing a VIEW_CONVERT_EXPR.

2013-01-04  Marek Polacek  <polacek@redhat.com>

	PR middle-end/55859
	* opts.c (default_options_optimization): Clarify error message.

2013-01-04  Richard Biener  <rguenther@suse.de>

	PR middle-end/55863
	* fold-const.c (split_tree): Undo -X - 1 to ~X folding for
	reassociation.

2013-01-03  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR target/53789
	* config/pa/pa.md (movsi): Revert previous change.
	* config/pa/pa.c (pa_legitimate_constant_p): Reject all TLS symbol
	references.

2013-01-03  Richard Henderson  <rth@redhat.com>

	* config/i386/i386.c (ix86_expand_move): Always assign to op1
	after eliminating TLS symbols.

2013-01-03  Marc Glisse  <marc.glisse@inria.fr>

	PR bootstrap/50167
	* graphite-interchange.c (pdr_stride_in_loop): Use gmp_fprintf.
	* graphite-poly.c (debug_gmp_value): Likewise.

2013-01-03  Uros Bizjak  <ubizjak@gmail.com>

	PR target/55712
	* config/i386/i386-c.c (ix86_target_macros_internal): Depending on
	selected code model, define __code_mode_small__, __code_model_medium__,
	__code_model_large__, __code_model_32__ or __code_model_kernel__.
	* config/i386/cpuid.h (__cpuid, __cpuid_count) [__i386__]: Prefix
	xchg temporary register with %k.  Declare temporary register as
	early clobbered.
	[__x86_64__]: For medium and large code models, preserve %rbx register.

2013-01-03  Richard Biener  <rguenther@suse.de>

	* tree-data-ref.c (dump_conflict_function): Use less vertical spacing.
	(dump_subscript): Adjust.
	(finalize_ddr_dependent): Do not dump redundant info.
	(analyze_siv_subscript): Adjust.
	(subscript_dependence_tester): Likewise.
	(compute_affine_dependence): Likewise.

2013-01-03  Richard Biener  <rguenther@suse.de>

	Revert
	2013-01-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55857
	* tree-vect-stmts.c (vectorizable_load): Do not setup
	re-alignment for invariant loads.

	2013-01-02  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.c (vectorizable_load): When vectorizing an
	invariant load do not generate a vector load from the scalar location.

2013-01-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (vect_analyze_loop_form): Clarify reason
	for not vectorizing.
	* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Do
	not build INDIRECT_REFs, call get_name once only.
	(vect_create_data_ref_ptr): Likewise.  Dump base object kind
	based on DR_BASE_OBJECT, not DR_BASE_ADDRESS.

2013-01-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/55857
	* tree-vect-stmts.c (vectorizable_load): Do not setup
	re-alignment for invariant loads.

2013-01-03  Richard Biener  <rguenther@suse.de>

	PR lto/55848
	* lto-symtab.c (lto_symtab_merge_decls_1): As last resort, always
	prefer a built-in decl.

2013-01-03  Jakub Jelinek  <jakub@redhat.com>

	* gcc.c (process_command): Update copyright notice dates.
	* gcov.c (print_version): Likewise.
	* gcov-dump.c (print_version): Likewise.

	PR rtl-optimization/55838
	* loop-iv.c (iv_number_of_iterations): Call lowpart_subreg on
	iv0.step, iv1.step and step.

2013-01-03  Jakub Jelinek  <jakub@redhat.com>
	    Marc Glisse  <marc.glisse@inria.fr>

	PR tree-optimization/55832
	* fold-const.c (fold_binary_loc): For ABS_EXPR<x> >= 0 and
	ABS_EXPR<x> < 0 folding use constant_boolean_node instead of
	integer_{one,zero}_node.

2013-01-03  Jakub Jelinek  <jakub@redhat.com>

	PR debug/54402
	* params.def (PARAM_MAX_VARTRACK_REVERSE_OP_SIZE): New param.
	* var-tracking.c (reverse_op): Don't add reverse ops to
	VALUEs that have already
	PARAM_VALUE (PARAM_MAX_VARTRACK_REVERSE_OP_SIZE) or longer locs list.

2013-01-02  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/contrib.texi: Note years as release manager for Mark Mitchell.

2013-01-02  Teresa Johnson  <tejohnson@google.com>

	* dumpfile.c (dump_loc): Print filename with location.
	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Use
	new location_t parameter to emit complete unroll message with
	new dump framework.
	(canonicalize_loop_induction_variables): Compute loops location
	and pass to try_unroll_loop_completely.
	* loop-unroll.c (report_unroll_peel): New function.
	(peel_loops_completely): Use new dump format with location
	for main dumpfile message, and invoke report_unroll_peel on success.
	(decide_unrolling_and_peeling): Ditto.
	(decide_peel_once_rolling): Remove old dumpfile message subsumed
	by report_unroll_peel.
	(decide_peel_completely): Ditto.
	(decide_unroll_constant_iterations): Ditto.
	(decide_unroll_runtime_iterations): Ditto.
	(decide_peel_simple): Ditto.
	(decide_unroll_stupid): Ditto.
	* cfgloop.c (get_loop_location): New function.
	* cfgloop.h (get_loop_location): Declare.

2013-01-02  Sriraman Tallam  <tmsriram@google.com>

	* config/i386/i386.c (fold_builtin_cpu): Remove unnecessary checks for
	NULL.

2013-01-02  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR middle-end/55198
	* expr.c (expand_expr_real_1): Don't use bitfield extraction for non
	BLKmode objects when EXPAND_MEMORY is specified.

2013-01-02  Sriraman Tallam  <tmsriram@google.com>

	* config/i386/i386.c (ix86_get_function_versions_dispatcher): Fix bug
	in loop predicate.
	(fold_builtin_cpu): Do not share cpu model decls across statements.

2013-01-02  Jason Merrill  <jason@redhat.com>

	PR c++/55804
	* tree.c (build_array_type_1): Revert earlier change.

2013-01-02  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and
	"cortex-a57".
	* config/aarch64/aarch64-tune.md: Re-generate.

2013-01-02  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.c (vectorizable_load): When vectorizing an
	invariant load do not generate a vector load from the scalar location.

2013-01-02  Richard Biener  <rguenther@suse.de>

	PR bootstrap/55784
	* configure.ac: Add $GMPINC to CFLAGS/CXXFLAGS.
	* configure: Regenerate.

2013-01-02  Richard Sandiford  <rdsandiford@googlemail.com>

	* builtins.c (expand_builtin_mathfn, expand_builtin_mathfn_2)
	(expand_builtin_mathfn_ternary, expand_builtin_mathfn_3)
	(expand_builtin_int_roundingfn_2): Keep the original target around
	for the fallback case.

2013-01-02  Richard Sandiford  <rdsandiford@googlemail.com>

	* tree-vrp.c (range_fits_type_p): Require the MSB of the double_int
	to be clear for sign changes.

2013-01-01  Jan Hubicka  <jh@suse.cz>

	* ipa-inline-analysis.c: Fix formatting.

2013-01-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/55831
	* tree-vect-loop.c (get_initial_def_for_induction): Use
	gsi_after_labels instead of gsi_start_bb.

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