aboutsummaryrefslogtreecommitdiffstats
path: root/gcc-4.4.3/gcc/config/sparc/sparc.opt
blob: 35a280ffc100d712727ee11cb9cc67753c96d69e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
; Options for the SPARC port of the compiler
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; <http://www.gnu.org/licenses/>.

mfpu
Target Report Mask(FPU)
Use hardware FP

mhard-float
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP

msoft-float
Target RejectNegative InverseMask(FPU)
Do not use hardware FP

munaligned-doubles
Target Report Mask(UNALIGNED_DOUBLES)
Assume possible double misalignment

mimpure-text
Target Report
Pass -assert pure-text to linker

mapp-regs
Target Report Mask(APP_REGS)
Use ABI reserved registers

mhard-quad-float
Target Report RejectNegative Mask(HARD_QUAD)
Use hardware quad FP instructions

msoft-quad-float
Target Report RejectNegative InverseMask(HARD_QUAD)
Do not use hardware quad fp instructions

mv8plus
Target Report Mask(V8PLUS)
Compile for V8+ ABI

mvis
Target Report Mask(VIS)
Use UltraSPARC Visual Instruction Set extensions

mptr64
Target Report RejectNegative Mask(PTR64)
Pointers are 64-bit

mptr32
Target Report RejectNegative InverseMask(PTR64)
Pointers are 32-bit

m64
Target Report RejectNegative Mask(64BIT)
Use 64-bit ABI

m32
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit ABI

mstack-bias
Target Report Mask(STACK_BIAS)
Use stack bias

mfaster-structs
Target Report Mask(FASTER_STRUCTS)
Use structs on stronger alignment for double-word copies

mrelax
Target
Optimize tail call instructions in assembler and linker

mcpu=
Target RejectNegative Joined
Use features of and schedule code for given CPU

mtune=
Target RejectNegative Joined
Schedule code for given CPU

mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model

mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.

Mask(LITTLE_ENDIAN)
;; Generate code for little-endian

Mask(LONG_DOUBLE_128)
;; Use 128-bit long double

Mask(SPARCLITE)
;; Generate code for SPARClite

Mask(SPARCLET)
;; Generate code for SPARClet

Mask(V8)
;; Generate code for SPARC-V8

Mask(V9)
;; Generate code for SPARC-V9

Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.