From 9f57376006c7afb1561fe3e7a8d8be64f3196acd Mon Sep 17 00:00:00 2001 From: Steve Ellcey Date: Thu, 19 Mar 2015 15:09:08 -0700 Subject: Update MSA Support in MIPS GCC. Change-Id: Id87035be4552719dc05096bb98b49d4bed91a07a --- gcc-4.9/gcc/testsuite/lib/target-supports.exp | 115 ++++++++++++++++---------- 1 file changed, 72 insertions(+), 43 deletions(-) (limited to 'gcc-4.9/gcc/testsuite/lib') diff --git a/gcc-4.9/gcc/testsuite/lib/target-supports.exp b/gcc-4.9/gcc/testsuite/lib/target-supports.exp index 0e226a2d6..36a0b6c1b 100644 --- a/gcc-4.9/gcc/testsuite/lib/target-supports.exp +++ b/gcc-4.9/gcc/testsuite/lib/target-supports.exp @@ -1335,15 +1335,25 @@ proc check_msa_hw_available { } { #if !defined(__mips_msa) #error "MSA NOT AVAIL" #else + #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)) + #error "MSA NOT AVAIL FOR ISA REV < 2" + #endif + #if !defined(__mips_hard_float) + #error "MSA HARD_FLOAT REQUIRED" + #endif + #if __mips_fpr != 64 + #error "MSA 64 FPR REQUIRED" + #endif #include int main() { v8i16 v = __builtin_msa_ldi_h (0); + v[0] = 0; return v[0]; } #endif - } "-mmsa -mfp64 -mnan=2008 -mips32r2 -mhard-float" + } "-mmsa" } }] } @@ -2156,16 +2166,16 @@ proc check_effective_target_vect_int { } { if { [istarget i?86-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [istarget spu-*-*] - || [istarget x86_64-*-*] - || [istarget sparc*-*-*] - || [istarget alpha*-*-*] - || [istarget ia64-*-*] - || [istarget aarch64*-*-*] - || [check_effective_target_arm32] - || ([istarget mips*-*-*] - && ([check_effective_target_mips_msa_nomips16_nomicromips] - || [check_effective_target_mips_loongson])) } { + || [istarget spu-*-*] + || [istarget x86_64-*-*] + || [istarget sparc*-*-*] + || [istarget alpha*-*-*] + || [istarget ia64-*-*] + || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mips_loongson])) } { set et_vect_int_saved 1 } } @@ -3003,6 +3013,15 @@ proc check_effective_target_mips_msa { } { #if !defined(__mips_msa) #error "MSA NOT AVAIL" #else + #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)) + #error "MSA NOT AVAIL FOR ISA REV < 2" + #endif + #if !defined(__mips_hard_float) + #error "MSA HARD_FLOAT REQUIRED" + #endif + #if __mips_fpr != 64 + #error "MSA 64 FPR REQUIRED" + #endif #include int main() @@ -3012,7 +3031,7 @@ proc check_effective_target_mips_msa { } { return v[0]; } #endif - } "-mmsa -mfp64 -mnan=2008 -mips32r2 -mhard-float" ] + } "-mmsa" ] } # Return 1 if this is an ARM target that adheres to the ABI for the ARM @@ -3401,15 +3420,15 @@ proc check_effective_target_vect_shift { } { } else { set et_vect_shift_saved 0 if { ([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) - || [istarget ia64-*-*] - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget aarch64*-*-*] - || [check_effective_target_arm32] - || ([istarget mips*-*-*] - && ([check_effective_target_mips_msa_nomips16_nomicromips] - || [check_effective_target_mips_loongson])) } { + && ![istarget powerpc-*-linux*paired*]) + || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mips_loongson])) } { set et_vect_shift_saved 1 } } @@ -3428,7 +3447,7 @@ proc check_effective_target_vect_shift_char { } { } else { set et_vect_shift_char_saved 0 if { ([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) + && ![istarget powerpc-*-linux*paired*]) || [check_effective_target_arm32] || ([istarget mips*-*-*] && [check_effective_target_mips_msa_nomips16_nomicromips]) } { @@ -3520,7 +3539,7 @@ proc check_effective_target_vect_double { } { set et_vect_double_saved 1 } elseif { [istarget mips*-*-*] && [check_effective_target_mips_msa_nomips16_nomicromips] } { - set et_vect_dpouble_saved 1 + set et_vect_double_saved 1 } } @@ -3540,7 +3559,7 @@ proc check_effective_target_vect_long_long { } { } else { set et_vect_long_long_saved 0 if { [istarget i?86-*-*] - || [istarget x86_64-*-*] + || [istarget x86_64-*-*] || ([istarget mips*-*-*] && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_long_long_saved 1 @@ -3631,7 +3650,7 @@ proc check_effective_target_vect_perm { } { || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] - || [istarget spu-*-*] + || [istarget spu-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget mips*-*-*] @@ -3661,7 +3680,7 @@ proc check_effective_target_vect_perm_byte { } { || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] - || [istarget spu-*-*] + || [istarget spu-*-*] || ([istarget mips-*.*] && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_perm_byte_saved 1 @@ -4068,7 +4087,9 @@ proc check_effective_target_vect_pack_trunc { } { || [istarget aarch64*-*-*] || [istarget spu-*-*] || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok] - && [check_effective_target_arm_little_endian]) } { + && [check_effective_target_arm_little_endian]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa]) } { set et_vect_pack_trunc_saved 1 } } @@ -4094,6 +4115,8 @@ proc check_effective_target_vect_unpack { } { || [istarget spu-*-*] || [istarget ia64-*-*] || [istarget aarch64*-*-*] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok] && [check_effective_target_arm_little_endian]) } { set et_vect_unpack_saved 1 @@ -4336,6 +4359,8 @@ proc check_effective_target_vect_condition { } { || [istarget i?86-*-*] || [istarget spu-*-*] || [istarget x86_64-*-*] + || [istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips] || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { set et_vect_cond_saved 1 } @@ -4357,7 +4382,9 @@ proc check_effective_target_vect_cond_mixed { } { set et_vect_cond_mixed_saved 0 if { [istarget i?86-*-*] || [istarget x86_64-*-*] - || [istarget powerpc*-*-*] } { + || [istarget powerpc*-*-*] + || [istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips] } { set et_vect_cond_mixed_saved 1 } } @@ -5741,6 +5768,7 @@ proc check_effective_target_mempcpy {} { proc check_vect_support_and_set_flags { } { global DEFAULT_VECTCFLAGS + global MULTI_VECTCFLAGS global dg-do-what-default if [istarget powerpc-*paired*] { @@ -5782,29 +5810,30 @@ proc check_vect_support_and_set_flags { } { set dg-do-what-default compile } } elseif { [istarget mips*-*-*] } { + if { 0 && ([check_effective_target_mpaired_single] + || [check_effective_target_mips_loongson]) + && [check_effective_target_nomips16] + && [check_effective_target_mpaired_single] } { + lappend MULTI_VECTCFLAGS "-mpaired-single" + set dg-do-what-default run + } if { ([check_effective_target_mips_msa_nomips16_nomicromips]) } { - lappend DEFAULT_VECTCFLAGS "-mmsa" "-mfp64" "-mnan=2008" "-mips32r2" "-mhard-float" + lappend MULTI_VECTCFLAGS "-mmsa" - if { [check_effective_target_msa_runtime] } { - set dg-do-what-default run - } else { - set dg-do-what-default compile - } - } - } elseif { [istarget mips*-*-*] - && ([check_effective_target_mpaired_single] - || [check_effective_target_mips_loongson]) - && [check_effective_target_nomips16] } { - if { [check_effective_target_mpaired_single] } { - lappend DEFAULT_VECTCFLAGS "-mpaired-single" + if { [check_effective_target_msa_runtime] } { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } + } else { + return 0 } - set dg-do-what-default run } elseif [istarget sparc*-*-*] { lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis" if [check_effective_target_ultrasparc_hw] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default compile } } elseif [istarget alpha*-*-*] { # Alpha's vectorization capabilities are extremely limited. -- cgit v1.2.3