From d64d815b3af9d2653d924ea2e1ebb21ee8b043b7 Mon Sep 17 00:00:00 2001 From: Caroline Tice Date: Mon, 29 Jan 2018 13:36:52 -0800 Subject: [GCC] Update with latest retpoline fixes from Intel. Intel has updated their retpoline patches since we created our original patch. This CL updates our retpoline changes to match the latest from Intel. Bug: None Test: Tested extensively in ChromeOS. Built x86 platform & kernel images in Android. Change-Id: Id1a18cb1f1f4461832a017cb5c5d59e5400d9d08 --- .../gcc.target/i386/indirect-thunk-register-1.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 gcc-4.9/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c (limited to 'gcc-4.9/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c') diff --git a/gcc-4.9/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c b/gcc-4.9/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c new file mode 100644 index 000000000..0cf8daeb5 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/i386/indirect-thunk-register-1.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mindirect-branch=thunk -mindirect-branch-register -fno-pic" } */ + +typedef void (*dispatch_t)(long offset); + +dispatch_t dispatch; + +void +male_indirect_jump (long offset) +{ + dispatch(offset); +} + +/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */ +/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */ +/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */ +/* { dg-final { scan-assembler "mov\[ \t\](%eax|%rax), \\((%esp|%rsp)\\)" } } */ +/* { dg-final { scan-assembler {\tpause} } } */ +/* { dg-final { scan-assembler-not "push(?:l|q)\[ \t\]*_?dispatch" } } */ +/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" } } */ +/* { dg-final { scan-assembler-not "__x86_indirect_thunk\n" } } */ -- cgit v1.2.3