From 1bc5aee63eb72b341f506ad058502cd0361f0d10 Mon Sep 17 00:00:00 2001 From: Ben Cheng Date: Tue, 25 Mar 2014 22:37:19 -0700 Subject: Initial checkin of GCC 4.9.0 from trunk (r208799). Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba --- gcc-4.9/gcc/config/microblaze/microblaze.opt | 127 +++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 gcc-4.9/gcc/config/microblaze/microblaze.opt (limited to 'gcc-4.9/gcc/config/microblaze/microblaze.opt') diff --git a/gcc-4.9/gcc/config/microblaze/microblaze.opt b/gcc-4.9/gcc/config/microblaze/microblaze.opt new file mode 100644 index 000000000..ae07dced3 --- /dev/null +++ b/gcc-4.9/gcc/config/microblaze/microblaze.opt @@ -0,0 +1,127 @@ +; Options for the MicroBlaze port of the compiler +; +; Copyright (C) 2009-2014 Free Software Foundation, Inc. +; +; Contributed by Michael Eager . +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 3, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT +; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +; License for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; . */ + +Zxl-mode-bootstrap +Driver + +Zxl-mode-executable +Driver + +Zxl-mode-novectors +Driver + +Zxl-mode-xilkernel +Driver + +Zxl-mode-xmdstub +Driver + +msoft-float +Target Report RejectNegative Mask(SOFT_FLOAT) +Use software emulation for floating point (default) + +mhard-float +Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) +Use hardware floating point instructions + +msmall-divides +Target Mask(SMALL_DIVIDES) +Use table lookup optimization for small signed integer divisions + +mcpu= +Target RejectNegative Joined Var(microblaze_select_cpu) +-mcpu=PROCESSOR Use features of and schedule code for given CPU + +mmemcpy +Target Mask(MEMCPY) +Don't optimize block moves, use memcpy + +mbig-endian +Target Report RejectNegative InverseMask(LITTLE_ENDIAN) +Assume target CPU is configured as big endian + +mlittle-endian +Target Report RejectNegative Mask(LITTLE_ENDIAN) +Assume target CPU is configured as little endian + +mxl-soft-mul +Target Mask(SOFT_MUL) +Use the soft multiply emulation (default) + +mxl-reorder +Target Var(TARGET_REORDER) Init(2) +Use reorder instructions (swap and byte reversed load/store) (default) + +mxl-soft-div +Target Mask(SOFT_DIV) +Use the software emulation for divides (default) + +mxl-barrel-shift +Target Mask(BARREL_SHIFT) +Use the hardware barrel shifter instead of emulation + +mxl-pattern-compare +Target Mask(PATTERN_COMPARE) +Use pattern compare instructions + +mxl-stack-check +Target Mask(STACK_CHECK) Warn(%qs is deprecated; use -fstack-check) +Check for stack overflow at runtime + +mxl-gp-opt +Target Mask(XLGPOPT) +Use GP relative sdata/sbss sections + +mno-clearbss +Target RejectNegative Var(flag_zero_initialized_in_bss, 0) Warn(%qs is deprecated; use -fno-zero-initialized-in-bss) +Clear the BSS to zero and place zero initialized in BSS + +mxl-multiply-high +Target Mask(MULTIPLY_HIGH) +Use multiply high instructions for high part of 32x32 multiply + +mxl-float-convert +Target Mask(FLOAT_CONVERT) +Use hardware floating point conversion instructions + +mxl-float-sqrt +Target Mask(FLOAT_SQRT) +Use hardware floating point square root instruction + +mxl-mode-executable +Target Mask(XL_MODE_EXECUTABLE) +Description for mxl-mode-executable + +mxl-mode-xmdstub +Target Mask(XL_MODE_XMDSTUB) +Description for mxl-mode-xmdstub + +mxl-mode-bootstrap +Target Mask(XL_MODE_BOOTSTRAP) +Description for mxl-mode-bootstrap + +mxl-mode-novectors +Target Mask(XL_MODE_NOVECTORS) +Description for mxl-mode-novectors + +mxl-mode-xilkernel +Target -- cgit v1.2.3