From 3f73d6ef90458b45bbbb33ef4c2b174d4662a22d Mon Sep 17 00:00:00 2001 From: Jing Yu Date: Wed, 15 Feb 2012 15:40:16 -0800 Subject: Sync down FSF r184235@google/gcc-4_6_2-mobile branch 1) Get mostly new patches from FSF gcc-4.6 branch 2) Fix PR52129 3) Insert GNU-stack note for all ARM targets Change-Id: I2b9926981210e517e4021242908074319a91d6bd --- gcc-4.6/gcc/longlong.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) (limited to 'gcc-4.6/gcc/longlong.h') diff --git a/gcc-4.6/gcc/longlong.h b/gcc-4.6/gcc/longlong.h index 1bab76db3..acb31851c 100644 --- a/gcc-4.6/gcc/longlong.h +++ b/gcc-4.6/gcc/longlong.h @@ -343,23 +343,24 @@ UDItype __umulsidi3 (USItype, USItype); #else #define smul_ppmm(xh, xl, m0, m1) \ do { \ - register SItype r0 __asm__ ("0"); \ - register SItype r1 __asm__ ("1") = m0; \ + register SItype __r0 __asm__ ("0"); \ + register SItype __r1 __asm__ ("1") = (m0); \ \ __asm__ ("mr\t%%r0,%3" \ - : "=r" (r0), "=r" (r1) \ - : "r" (r1), "r" (m1)); \ - (xh) = r0; (xl) = r1; \ + : "=r" (__r0), "=r" (__r1) \ + : "r" (__r1), "r" (m1)); \ + (xh) = __r0; (xl) = __r1; \ } while (0) + #define sdiv_qrnnd(q, r, n1, n0, d) \ - do { \ - register SItype r0 __asm__ ("0") = n0; \ - register SItype r1 __asm__ ("1") = n1; \ + do { \ + register SItype __r0 __asm__ ("0") = (n1); \ + register SItype __r1 __asm__ ("1") = (n0); \ \ - __asm__ ("dr\t%%r0,%3" \ - : "=r" (r0), "=r" (r1) \ - : "r" (r0), "r" (r1), "r" (d)); \ - (q) = r0; (r) = r1; \ + __asm__ ("dr\t%%r0,%4" \ + : "=r" (__r0), "=r" (__r1) \ + : "r" (__r0), "r" (__r1), "r" (d)); \ + (q) = __r1; (r) = __r0; \ } while (0) #endif /* __zarch__ */ #endif -- cgit v1.2.3