From 2f2d3b42b0ea0c4871518c7b6176bd2b55ae527d Mon Sep 17 00:00:00 2001
From: Jing Yu <jingyu@google.com>
Date: Mon, 13 Dec 2010 12:58:16 -0800
Subject: Fix a thumb1 code generation bug.

The problem was caused by backporting a patch from upstream without
its necessary dependencies. This patch changes the implementation of
cbranchqi4 so that we keep the optimization without generating
bad code.

Change-Id: Icbaf443ac6e85774cb664036941bf829c5e4c31e
---
 gcc-4.4.3/README.google         |  6 ++++++
 gcc-4.4.3/gcc/config/arm/arm.md | 43 ++++++++++++++++++-----------------------
 2 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/gcc-4.4.3/README.google b/gcc-4.4.3/README.google
index bcb9ca671..2a1437b8e 100644
--- a/gcc-4.4.3/README.google
+++ b/gcc-4.4.3/README.google
@@ -2082,3 +2082,9 @@ gcc/tree-inline.c
   Backport r164399 from upstream gcc-4_4-branch (b/3068369).
   Owner: raksit
   Status: In upstream branches 4.3 and onwards.
+
+gcc/config/arm/arm.md
+  Fix bug 3264814, which was caused by missing dependencies of a previous back
+  port.
+  Owner: dougkwan
+  Status: local.
diff --git a/gcc-4.4.3/gcc/config/arm/arm.md b/gcc-4.4.3/gcc/config/arm/arm.md
index 952cde42e..e9de45efd 100644
--- a/gcc-4.4.3/gcc/config/arm/arm.md
+++ b/gcc-4.4.3/gcc/config/arm/arm.md
@@ -6411,6 +6411,25 @@
 	      (pc)))]
   "TARGET_THUMB1"
   "
+  /* A pattern to recognize a special situation and optimize for it.
+     On the thumb, zero-extension from memory is preferrable to sign-extension
+     due to the available addressing modes.  Hence, convert a signed comparison
+     with zero into an unsigned comparison with 127 if possible. */
+  if ((GET_CODE (operands[0]) == LT
+       || GET_CODE (operands[0]) == GE)
+       && memory_operand (XEXP (operands[0], 0), QImode)
+       && const0_operand (XEXP (operands[0], 1), QImode))
+  {
+    rtx xops[4];
+    xops[1] = gen_reg_rtx (SImode);
+    emit_insn (gen_zero_extendqisi2 (xops[1], XEXP (operands[0], 0)));
+    xops[2] = GEN_INT (127);
+    xops[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]) == GE ? LEU : GTU,
+                              VOIDmode, xops[1], xops[2]);
+    xops[3] = operands[3];
+    emit_insn (gen_cbranchsi4 (xops[0], xops[1], xops[2], xops[3]));
+    DONE;
+  }
   if (thumb1_cmpneg_operand (operands[2], SImode))
     {
       emit_jump_insn (gen_cbranchsi4_scratch (NULL, operands[1], operands[2],
@@ -6421,30 +6440,6 @@
     operands[2] = force_reg (SImode, operands[2]);
   ")
 
-;; A pattern to recognize a special situation and optimize for it.
-;; On the thumb, zero-extension from memory is preferrable to sign-extension
-;; due to the available addressing modes.  Hence, convert a signed comparison
-;; with zero into an unsigned comparison with 127 if possible.
-(define_expand "cbranchqi4"
-  [(set (pc) (if_then_else
-	      (match_operator 0 "lt_ge_comparison_operator"
-	       [(match_operand:QI 1 "memory_operand" "")
-	        (match_operand:QI 2 "const0_operand" "")])
-	      (label_ref (match_operand 3 "" ""))
-	      (pc)))]
-  "TARGET_THUMB1"
-{
-  rtx xops[3];
-  xops[1] = gen_reg_rtx (SImode);
-  emit_insn (gen_zero_extendqisi2 (xops[1], operands[1]));
-  xops[2] = GEN_INT (127);
-  xops[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]) == GE ? LEU : GTU,
-			    VOIDmode, xops[1], xops[2]);
-  xops[3] = operands[3];
-  emit_insn (gen_cbranchsi4 (xops[0], xops[1], xops[2], xops[3]));
-  DONE;
-})
-
 (define_insn "*cbranchsi4_insn"
   [(set (pc) (if_then_else
 	      (match_operator 0 "arm_comparison_operator"
-- 
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