| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
| |
Intel has updated their retpoline patches since we created our
original patch. This CL updates our retpoline changes to match
the latest from Intel.
Bug: None
Test: Tested extensively in ChromeOS. Built x86 platform & kernel
images in Android.
Change-Id: Id1a18cb1f1f4461832a017cb5c5d59e5400d9d08
|
|
|
|
|
|
|
|
|
|
|
|
| |
This applies the Intel GCC code patches, to allow compiling
with appropriate flags for mitigating the indirect branch variant of
the speculative execution security flaw.
Bug: None
Test: This is already in place in ChromeOS and has been tested on
the ChromeOS kernels.
Change-Id: Ideffb433b697f1fe7e4ca2c1eaa968160abfcc8b
|
|\ |
|
| |
| |
| |
| |
| | |
Bug: http://b.android.com/68956
Change-Id: I60bef8715de7920d72ebc9a6bd7f18ceaea05966
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This feature gets enabled with binutils 2.27 upgrade, but
breaks unittests in chromium os:
- https://bugs.chromium.org/p/chromium/issues/detail?id=738188
This is because of the upstream gcc bug for which the
patches were not backported to 4.9.x branches:
- https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65248
BUG: None
TEST: Chromium OS unittests pass again.
Change-Id: I9827cbe56378727f979991993d06de0b4c6b5478
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The kernel security team asked us to fix this bug
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46639
This CL does that.
Note: This CL depends on
https://android-review.googlesource.com/329799
Bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46639
Test: Ran build.py for all toolchain versions; used resulting
compilers to build bullhead, angler and fugu plaform images.
Ran checkbuild.py.
Change-Id: I1e1abf594cff56c6ed6dc228a1d084da18c11420
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Remove the 'throw()' from posix_memalign declaration if __GLIBC__ is
not defined, so that it matches declaration in bionic's stdlib.h (avoid
conflicting decl error). Can't remove 'throw ()' altogether, because
it IS in glibc's stdlib.h, which this has to match in ChromeOS.
BUG=b:31366027
TEST=successfully built ChromeOS for x86, x86_64, arm, arm64 and ran
HWTests on all; successfully built chromiumos-sdk. Built Android
platform & kernel. Successfully ran NDK checkbuild.py script.
Change-Id: I0a8b4daf5d10f56f7a318738a0946e4ad5b7dd90
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The previous version of the unified GCC compiler (Android & ChromeOS)
caused some ChromeOS tests to fail. It also caused an Android NDK
test case to fail. This CL fixes those problems. In particular it
does the following:
- Fix some file formatting errors from previous unification patch.
- Update ChangeLog files to reflect Android backport patches.
- Find and incorporate a few missing pieces from the following backports
backports from trunk r221007, r221675, r222011, r212011, r214942,
r214957, r215012, r215016, r218115, r218733, r218746, r220491. This
involved small changes in the following files:
gcc/cfghoks.c
gcc/cfgloop.c
gcc/cfgloop.h
gcc/except.c
gcc/loop-init.c
gcc/omp-low.c
- Fix minor Android test case regression introduced in the previous
unification patch.
Change-Id: I482e3a34e3ed97c7ba609fe2954b4781f02ec617
|
| |
| |
| |
| |
| |
| |
| |
| | |
This CL updates Android's GCC to match ChromeOS's GCC (with
appropriate patches applied in both places to make sure no
cherry-picked changes are lost).
Change-Id: I390140c449b0e5df9ee78a06268319c8c510302f
|
|/
|
|
|
|
|
|
|
| |
This reverts commit f1c3ad6cac0465017759cce0cb381ce66760d907.
[Change no longer needed since we're switching to a
different gcc for the mingw build.]
Change-Id: I03a57335e9ca94c6848cb71bbc1a451f0c0ef18f
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Theses changes are intended to restore the ability to build
toolchain/gcc cross compiler for non-Android targets (in this specific
case, to allow us to compile toolchain/gcc as part of the mingw-w64
build).
What has happened over time is that references android-specific
synbols and constructs have crept into the non-target-specific
portions of the gcc code. I've done my best to push these things
back into the config/* subtree.
Bug: 26523949
Change-Id: I59334e791875632d51093207c298052a034d2f4a
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
On big length 'rep movs' are less efficient than libcall of
highly-optimized Bionic memcpy.
Change-Id: I9435b9e438e0e40c28c505c43ec7f9797384afd6
Signed-off-by: Andrew Senkevich <andrew.senkevich@intel.com>
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
PR bootstrap/66638
* tree-ssa-loop-niter.c (loop_exits_before_overflow):
Skip if assertion failed. Remove assertion itself.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@225008
138bc75d-0d04-0410-961f-82ee72b054a4
Bug: 26224556
Change-Id: I2fa31bfe44978659a554a413c64d796b357338b5
Signed-off-by: Than McIntosh <thanm@google.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
2015-11-25 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/67954
* lra-constraints.c (curr_insn_transform): Add check on scratch
pseudo when change class to NO_REGS. Add an assert.
Bug: 26144438
Change-Id: I976c78c466b9d430afe86742026bbcc568db825d
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Change the default guard flavor for -fstack-protector on x86 from global
to TLS. The original default was intended to provide compatibility with
pre-4.2. versions of Android, which is less of concern now.
Bug: 25183510
Change-Id: I71931e778efed2ba0fa2a6740f8d5510776c113f
|
|/ /
| |
| |
| |
| |
| |
| |
| | |
Simplify BASE-VER for gcc from 4.9.x-google to 4.9, so
as to be consistent with NDK versioning naming scheme.
Bug: 25487043
Change-Id: I4f0e2a0998f35840467248ad004ee81dedfdfc28
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Cherry-pick from trunk:
commit 39f4504dbc88d17c496cdf7b12fb0d32277d281d
Author: pinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue Jun 3 22:42:47 2014 +0000
2014-06-03 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
(aarch64_rtx_costs): Use aarch64_if_then_else_costs.
Bug: 24985248
Change-Id: Ic03ba2552615fca0aa0de6af47f47ae4cf074e3b
|
|/
|
|
|
|
|
|
|
|
| |
This bug was inherited from the google/gcc-4_9 branch; a
change was "temporarily" patched out in r216495, then never
restored.
Bug: 23822150
Change-Id: Ibfc9f65e108e9c9b3dca263920bdae3cc6f75080
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
... with peeling limit set to 400 instead of 200 as it used to be.
[4.9] Another backport from trunk of additional slm tuning.
2014-11-21 Evgeny Stupachenko <evstupac@gmail.com>
* config/i386/i386.c (ix86_option_override_internal): Increase
PARAM_MAX_COMPLETELY_PEELED_INSNS.
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
Signed-off-by: Egor Kochetov <egor.kochetov@intel.com>
(cherry picked from commit 1f170f4a426b1ed354345de5aaba634036854e43)
Change-Id: Ie395a6602c8305530ebc02f9006d84f98365857a
|
|\
| |
| |
| |
| |
| |
| |
| |
| | |
* changes:
backport fix for PR65735
backport patch to fix PR65177
backport patch to fix PR65048
backport patch for PR 64878: do not jump thread across more than one back-edge
port revision 219584 from linaro/gcc-4_9-branch
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
PR tree-optimization/65735
* tree-ssa-threadedge.c (fsm_find_control_statement_thread_paths):
Remove visited_phis argument, add visited_bbs, avoid recursing into the
same bb rather than just into the same phi node.
(thread_through_normal_block): Adjust caller.
* gcc.c-torture/compile/pr65735.c: New test.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
PR tree-optimization/65177
* tree-ssa-threadupdate.c (verify_seme): Renamed verify_jump_thread.
(bb_in_bbs): New.
(duplicate_seme_region): Renamed duplicate_thread_path. Redirect all
edges not adjacent on the path to the original code.
* gcc.dg/tree-ssa/ssa-dom-thread-10.c: New.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
PR tree-optimization/65048
* tree-ssa-threadupdate.c (valid_jump_thread_path): New.
(thread_through_all_blocks): Call valid_jump_thread_path. Remove invalid
FSM jump-thread paths.
PR tree-optimization/65048
* gcc.dg/tree-ssa/ssa-dom-thread-9.c: New.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
2015-02-04 Sebastian Pop <s.pop@samsung.com>
Brian Rzycki <b.rzycki@samsung.com>
PR tree-optimization/64878
* tree-ssa-threadedge.c: Include tree-ssa-loop.h.
(fsm_find_control_statement_thread_paths): Add parameter seen_loop_phi.
Stop recursion at loop phi nodes after having visited a loop phi node.
* testsuite/gcc.dg/tree-ssa/ssa-dom-thread-8.c: New.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
gcc/
2015-01-14 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218451.
2014-12-06 James Greenhalgh <james.greenhalgh@arm.com>
Sebastian Pop <s.pop@samsung.com>
Brian Rzycki <b.rzycki@samsung.com>
PR tree-optimization/54742
* params.def (max-fsm-thread-path-insns, max-fsm-thread-length,
max-fsm-thread-paths): New.
* doc/invoke.texi (max-fsm-thread-path-insns, max-fsm-thread-length,
max-fsm-thread-paths): Documented.
* tree-cfg.c (split_edge_bb_loc): Export.
* tree-cfg.h (split_edge_bb_loc): Declared extern.
* tree-ssa-threadedge.c (simplify_control_stmt_condition): Restore the
original value of cond when simplification fails.
(fsm_find_thread_path): New.
(fsm_find_control_statement_thread_paths): New.
(thread_through_normal_block): Call find_control_statement_thread_paths.
* tree-ssa-threadupdate.c (dump_jump_thread_path): Pretty print
EDGE_FSM_THREAD.
(verify_seme): New.
(duplicate_seme_region): New.
(thread_through_all_blocks): Generate code for EDGE_FSM_THREAD edges
calling duplicate_seme_region.
* tree-ssa-threadupdate.h (jump_thread_edge_type): Add EDGE_FSM_THREAD.
gcc/testsuite/
2015-01-14 Yvan Roux <yvan.roux@linaro.org>
Backport from trunk r218451.
2014-12-06 James Greenhalgh <james.greenhalgh@arm.com>
Sebastian Pop <s.pop@samsung.com>
Brian Rzycki <b.rzycki@samsung.com>
PR tree-optimization/54742
* gcc.dg/tree-ssa/ssa-dom-thread-6.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: New test.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Backported from GCC 5.
2015-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Properly handle mvn-register and add EON+shift pattern and cost appropriately
* config/aarch64/aarch64.md
(*eor_one_cmpl_<SHIFT:optab><mode>3_alt): New pattern.
(*eor_one_cmpl_<SHIFT:optab>sidi3_alt_ze): Likewise.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle MVN-shift
appropriately. Handle alternative EON form.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222637 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Properly cost FABD pattern
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle pattern for
fabd in ABS case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222638 138bc75d-0d04-0410-961f-82ee72b054a4
2015-05-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Remember to cost operand 0 in FP compare-with-0.0 case
* config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case):
Add cost of op0 in the compare-with-fpzero case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222673 138bc75d-0d04-0410-961f-82ee72b054a4
2015-05-01 Wilco Dijkstra <wdijkstr@arm.com>
Fix aarch64_rtx_costs of PLUS/MINUS
* gcc/config/aarch64/aarch64.c (aarch64_rtx_costs):
Calculate cost of op0 and op1 in PLUS and MINUS cases.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@222676 138bc75d-0d04-0410-961f-82ee72b054a4
2015-07-27 Wilco Dijkstra <wdijkstr@arm.com>
Improve spill code - swap order in shl pattern
* config/aarch64/aarch64.md (aarch64_ashl_sisd_or_int_<mode>3):
Place integer variant first.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@226247 138bc75d-0d04-0410-961f-82ee72b054a4
2015-07-27 Wilco Dijkstra <wdijkstr@arm.com>
Improve spill code - swap order in shr patterns
* gcc/config/aarch64/aarch64.md (aarch64_lshr_sisd_or_int_<mode>3):
Place integer variant first.
(aarch64_ashr_sisd_or_int_<mode>3): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@226253 138bc75d-0d04-0410-961f-82ee72b054a4
2015-08-04 Pawel Kupidura <pawel.kupidura@arm.com>
* config/aarch64/aarch64.c: Change inner loop statement cost
to be consistent with other targets.
Change-Id: If5b10466302d733fcae6eacc9d128fdb8f95c0de
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@226575 138bc75d-0d04-0410-961f-82ee72b054a4
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Backport from trunk
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Refactor aarch64_address_costs.
gcc/
* config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
(cpu_addrcost_table): Use it.
* config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
(aarch64_address_cost): Rewrite using aarch64_classify_address,
move it.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210493 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Add cost tables for Cortex-A57
gcc/
* config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
(cortexa57_vector_cost): Likewise.
(cortexa57_tunings): Use them.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210494 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Better estimate cost of building a constant
gcc/
* config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
emit instructions, return number of instructions which would
be emitted.
(aarch64_add_constant): Update call to aarch64_build_constant.
(aarch64_output_mi_thunk): Likewise.
(aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
a CONST_DOUBLE.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210496 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Add cost tables for Cortex-A57
gcc/
* config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
(cortexa57_vector_cost): Likewise.
(cortexa57_tunings): Use them.
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Wrap aarch64_rtx_costs to dump verbose output
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
(TARGET_RTX_COSTS): Call it.
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Better estimate cost of building a constant
gcc/
* config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
emit instructions, return number of instructions which would
be emitted.
(aarch64_add_constant): Update call to aarch64_build_constant.
(aarch64_output_mi_thunk): Likewise.
(aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
a CONST_DOUBLE.
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Factor out common MULT cases
gcc/
* config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
to...
(aarch64_strip_extend): ...this, don't strip shifts, check RTX is
well formed.
(aarch64_rtx_mult_cost): New.
(aarch64_rtx_costs): Use it, refactor as appropriate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210497 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Set default costs and handle vector modes.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210498 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Improve SET cost.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
for SET RTX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210499 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Cost memory accesses using address costs
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
costs when costing loads and stores to memory.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210500 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Better cost logical operations
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
logical operations.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210501 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Improve costs for sign/zero extend operations
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
ZERO_EXTEND and SIGN_EXTEND better.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210502 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Improve costs for rotate and shift operations.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
rotates and shifts.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210503 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philip Tomsich <philipp.tomsich@theobroma-systems.com>
Improve costs for sign/zero extracts
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
SIGN/ZERO_EXTRACT.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210504 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Improve costs for div/mod
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
DIV/MOD.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210505 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cost comparisons, flag setting operators and IF_THEN_ELSE
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
operators.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210506 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cost more Floating point RTX.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210507 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cost TRUNCATE
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210508 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Cost for SYMBOL_REF, HIGH and LO_SUM
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
HIGH, LO_SUM.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210509 138bc75d-0d04-0410-961f-82ee72b054a4
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Dump a message if we are unable to cost an insn.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
where we were unable to cost an RTX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210510 138bc75d-0d04-0410-961f-82ee72b054a4
2014-08-26 Evandro Menezes <e.menezes@samsung.com>
Fix typos in cost data structure.
* config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
qi cost; add di cost.
(cortexa57_addrcost_table): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@214503 138bc75d-0d04-0410-961f-82ee72b054a4
|
|\ \ \
| |_|/
|/| |
| | |
| | |
| | |
| | | |
* changes:
PR tree-optimization/48052
PR tree-optimization/52563, tree-optimization/62173
Cherry-pick: PR tree-optimization/65447
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
commit 05032b10839cf0498c992c819bf2358e86c22bb0
Author: amker <amker@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue Jun 2 10:19:18 2015 +0000
PR tree-optimization/48052
* cfgloop.h (struct control_iv): New.
(struct loop): New field control_ivs.
* tree-ssa-loop-niter.c : Include "stor-layout.h".
(number_of_iterations_lt): Set no_overflow information.
(number_of_iterations_exit): Init control iv in niter struct.
(record_control_iv): New.
(estimate_numbers_of_iterations_loop): Call record_control_iv.
(loop_exits_before_overflow): New. Interface factored out of
scev_probably_wraps_p.
(scev_probably_wraps_p): Factor loop niter related code into
loop_exits_before_overflow.
(free_numbers_of_iterations_estimates_loop): Free control ivs.
* tree-ssa-loop-niter.h (free_loop_control_ivs): New.
gcc/testsuite/ChangeLog
PR tree-optimization/48052
* gcc.dg/tree-ssa/scev-8.c: New.
* gcc.dg/tree-ssa/scev-9.c: New.
* gcc.dg/tree-ssa/scev-10.c: New.
* gcc.dg/vect/pr48052.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224020 138bc75d-0d04-0410-961f-82ee72b054a4
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
commit 5fe66b3cf99994fd9c8c68cea43aa1cf42eaa76d
Author: amker <amker@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue Jun 2 03:33:35 2015 +0000
PR tree-optimization/52563
PR tree-optimization/62173
* tree-ssa-loop-ivopts.c (struct iv): New field. Reorder fields.
(alloc_iv, set_iv): New parameter.
(determine_biv_step): Delete.
(find_bivs): Inline original determine_biv_step. Pass new
argument to set_iv.
(idx_find_step): Use no_overflow information for conversion.
* tree-scalar-evolution.c (analyze_scalar_evolution_in_loop): Let
resolve_mixers handle folded_casts.
(instantiate_scev_name): Change bool parameter to bool pointer.
(instantiate_scev_poly, instantiate_scev_binary): Ditto.
(instantiate_array_ref, instantiate_scev_not): Ditto.
(instantiate_scev_3, instantiate_scev_2): Ditto.
(instantiate_scev_1, instantiate_scev_r): Ditto.
(instantiate_scev_convert, ): Change parameter. Pass argument
to chrec_convert_aggressive.
(instantiate_scev): Change argument.
(resolve_mixers): New parameter and set it.
(scev_const_prop): New argument.
* tree-scalar-evolution.h (resolve_mixers): New parameter.
* tree-chrec.c (convert_affine_scev): Call chrec_convert instead
of chrec_conert_1.
(chrec_convert): New parameter. Move definition below.
(chrec_convert_aggressive): New parameter and set it. Call
convert_affine_scev.
* tree-chrec.h (chrec_convert): New parameter.
(chrec_convert_aggressive): Ditto.
gcc/testsuite/ChangeLog
PR tree-optimization/52563
PR tree-optimization/62173
* gcc.dg/tree-ssa/scev-3.c: Remove xfail.
* gcc.dg/tree-ssa/scev-4.c: Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224009 138bc75d-0d04-0410-961f-82ee72b054a4
|
| |/
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
commit ad478851f7dd45438a9b33ecd7f30a4e6ab00388
Author: amker <amker@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Wed May 20 05:15:56 2015 +0000
PR tree-optimization/65447
* tree-ssa-loop-ivopts.c (struct iv_use): New fields.
(dump_use, dump_uses): Support to dump sub use.
(record_use): New parameters to support sub use. Remove call to
dump_use.
(record_sub_use, record_group_use): New functions.
(compute_max_addr_offset, split_all_small_groups): New functions.
(group_address_uses, rewrite_use_address): New functions.
(strip_offset): New declaration.
(find_interesting_uses_address): Call record_group_use.
(add_candidate): New assertion.
(infinite_cost_p): Move definition forward.
(add_costs): Check INFTY cost and return immediately.
(get_computation_cost_at): Clear setup cost and dependent bitmap
for sub uses.
(determine_use_iv_cost_address): Compute cost for sub uses.
(rewrite_use_address_1): Rename from old rewrite_use_address.
(free_loop_data): Free sub uses.
(tree_ssa_iv_optimize_loop): Call group_address_uses.
gcc/testsuite
PR tree-optimization/65447
* gcc.dg/tree-ssa/pr65447.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@223433 138bc75d-0d04-0410-961f-82ee72b054a4
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
1) Add missing _GCOV_fopen if !__KERNEL__
2) Use _fullpath
Change-Id: Id10cedf85e9a3409c284b77321675f61d37e76c2
|
| | |
| | |
| | |
| | | |
Change-Id: Ic2549845a10d16620d492cbf91a8cfc4cb2e6c61
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
For NDK toolchains, always enable the fix of cortex-a53 erratum 843419.
Use -mno-fix-cortex-a53-843419 to disable this workaround.
Change-Id: I69b8a71113abb172138bf0986697a94e42a5117e
|
| |/
|/|
| |
| |
| | |
With this change, -fexceptions and -frtti become default options
when compiling C++ sources.
|
| |
| |
| |
| |
| |
| |
| | |
BUG=23157315
This reverts commit 659b5199aa009008a003062ff828f44b6bd70b65.
Change-Id: I3564560d3aa57c039c6bc78e0cd630cea3a4bb8b
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
2014-11-19 Wilco Dijkstra <wdijkstr@arm.com>
PR target/61915
* config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move cost.
Change-Id: Ifaa0c2d1a72955e42f3882c68d1e52acf5a790e7
Signed-off-by: Junmo Park <junmoz.park@samsung.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
2015-03-11 Junmo Park <junmoz.park@samsung.com>
* config/arm/cortex-a57.md (cortex_a57_crypto_simple): Add
crypto_sha256_fast.
(cortex_a57_crypto_complex): Add crypto_sha256_slow.
2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/cortex-a57.md: Remove duplicate of file accidentally
introduced in revision 219724.
2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/cortex-a57.md: New.
* config/aarch64/aarch64.md: Include it.
* config/aarch64/aarch64-cores.def (cortex-a57): Tune for it.
* config/aarch64/aarch64-tune.md: Regenerate.
Change-Id: Id089f9d746c222a7ffe224b69e3249f083bbaf3b
Signed-off-by: Junmo Park <junmoz.park@samsung.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
BUG=23157315
2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[AArch64 costs 5/18] Factor out common MULT cases
gcc/
* config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
to...
(aarch64_strip_extend): ...this, don't strip shifts, check RTX is
well formed.
(aarch64_rtx_mult_cost): New.
(aarch64_rtx_costs): Use it, refactor as appropriate.
Change-Id: I298e5af1b4006f37d873b113c8d05643e897f6f1
|
|/
|
|
|
|
|
|
|
| |
After call to pointer_map_insert, the caller need to write the value.
This fixes the following regression,
gfortran.dg/array_constructor_6.f90
gfortran.dg/subref_array_pointer_2.f90
Change-Id: Ic7aec96c24d17c527291aefe30e726989ecd9a8f
|
|\
| |
| |
| | |
support them."
|
| |
| |
| |
| |
| |
| |
| | |
does not support them.
Change-Id: I0b36e48a9dd0317b65442291752500880b549fb6
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
|
|/
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This change is re-based and modified to work with the older context, as the
context code is changed a lot in GCC trunk.
It is about to insert some barriers on stack-pointer register, so that the
adjust-stack-pointer code does not get scheduled before any code in the
fuction epilogue, which may access some stack space without explicit use of
stack pointer.
Examples are a load from an auto array and some access to an area of alloca.
Anyway, the barriers would make all such alias dependences not violated.
For more details, please refer to GCC bug 63293.
(Personally I think there may be a bit too many barriers generated.)
Change-Id: I61ea54e500b6965feab69a62165d10b6c3a21c20
|
|
|
|
| |
Change-Id: I3d6f06fc613c8f8b6a82143dc44b7338483aac5d
|
|
|
|
|
|
|
|
|
|
|
|
| |
The update is necessary so that LRA is able to detect the conflict
between these regisers and LRA registers.
The change is a back-port from GCC 5.0 r217783, and please refer to
gcc bug 63762 for some details. That bug report has an example, which
is about VFP register file, but the issue applies to ARM integer
register file too, with the same mechanism. The change is mainly about
Thumb, although theoretically not limitted to.
Change-Id: I1fedb410ae5ca39f168dab874f310d7337ab9bcc
|
|
|
|
| |
Change-Id: I54a6469aa140e7b24853237ac51398f8e8f4ea95
|