| Commit message (Collapse) | Author | Age | Files | Lines |
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This backports upstream patch to add support of vrdn<*>_f64 intrinisics
for aarch64. This is needed because glibc 2.27 uses some of them.
Author: mshawcroft <mshawcroft@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue Apr 22 08:39:48 2014 +0000
[AArch64] vrnd<*>_f64 patch
This patch adds vrnd<*>_f64 aarch64 intrinsics. A testcase for those
intrinsics is added. Run a complete LE and BE regression run with no
regressions.
BUG=chromium:834385
TEST=./setup_board --board kevin --nousepkg
cross-aarch64-cros-linux-gnu-glibc builds for glibc 2.27
Change-Id: Iaf9508a433e35d3304e44ac4b6c93071ff6c5ec0
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Change-Id: I3d6f06fc613c8f8b6a82143dc44b7338483aac5d
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This source drop uses svn version r212828 of google/gcc-4.9 branch.
We also cherry-picked r213062, r213063 and r213064 to fix windows
build issues.
All gcc-4.9 patches before July 3rd are ported to google/gcc-4.9.
The following prior commits has not been merged to google branch yet.
(They are included in this commit).
e7af147f979e657fe2df00808e5b4319b0e088c6,
baf87df3cb2683649ba7e9872362a7e721117c23, and
c231900e5dcc14d8296bd9f62b45997a49d4d5e7.
Change-Id: I4bea3ea470387ff751c2be4cb0d4a12059b9299b
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To use FP_LO_REGS for the 2nd SIMD register with h[index]
See:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61202
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/SQDMULH_advsimd_elt_scalar.html
Google BUG 14825026
Change-Id: Ifd870e8ab851d93bda6734aee04d09db17461bdd
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Change-Id: I48a3c08bb98542aa215912a75f03c0890e497dba
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