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* [4.8, REAPPLY] Release basic tuning for new Silvermont architecturePavel Chupin2014-06-196-25/+882
| | | | | | | | Reapplying https://android-review.googlesource.com/#/c/59726 after 4.8.3 merge Change-Id: I855de6c963d423f68899f90aada1758ae6f6c0d9 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Merge GCC 4.8.3Andrew Hsieh2014-06-199-391/+503
| | | | Change-Id: I0abe59f7705b3eccc6b2f123af75b2e30917696a
* revert 41eff3d706b202f682f64fcc7773c64abd59ac45Andrew Hsieh2014-06-196-885/+26
| | | | | | | | | For the purpose of merging gcc-4.8.3, will put it back. https://android-review.googlesource.com/#/c/59726 [4.7, 4.8] Release basic tuning for new Silvermont architecture Change-Id: Id2b9e714418b3cf0a7eef0f599c39ba81df47d13
* revert 01b34967a57ca33621130d36e007214b93bdfeaaAndrew Hsieh2014-06-193-320/+79
| | | | | | | | | For the purpose of merging gcc-4.8.3, will put it back. https://android-review.googlesource.com/#/c/60083 [4.7, 4.8] Extended Silvermont tuning Change-Id: If13a6989286c0ab57def1dd65f0bbd2f6ed8d807
* revert 03518e5fd50ca1389a55a9d443d7277ec03d1cdeAndrew Hsieh2014-06-192-8/+0
| | | | | | | | | For the purpose of merging gcc-4.8.3, will put it back. https://android-review.googlesource.com/#/c/71782 [4.6, 4.8] Add -mtune=intel support Change-Id: Ie340828ac3809fd6694985dd52c3392b661fb9b2
* revert a108aa5cbab7efe4eedd19f68d7a9bbe021b2168Andrew Hsieh2014-06-191-2/+2
| | | | | | | | | For the purpose of merging gcc-4.8.3, will put it back. https://android-review.googlesource.com/#/c/80436 [4.7, 4.8] Backport of two patches for additional SLM-tuning. Change-Id: I4e5e08ee8c6a9f863b4696a6eb18c2cdbf16cd1f
* [4.6,4.8,4.9] Porting ARM NEON intrinsics to SSE x86Anton Konovalov2014-06-071-0/+8641
| | | | | | | | Added arm_neon.h to gcc 4.6, 4.8 and 4.9 toolchains. Updated config.gcc files. Change-Id: If9c12c3e31f5256b178816dffb41c86af0912db0 Signed-off-by: Anton Konovalov <anton.konovalov@intel.com> Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Merge "[4.8] Add -mlong-double-128 and make it default for 64-bit Bionic"Andrew Hsieh2014-02-064-6/+26
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| * [4.8] Add -mlong-double-128 and make it default for 64-bit BionicPavel Chupin2014-02-054-6/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport of r207428: 2014-02-03 H.J. Lu <hongjiu.lu@intel.com> gcc/ * config/i386/i386.c (flag_opts): Add -mlong-double-128. (ix86_option_override_internal): Default long double to 64-bit for 32-bit Bionic and to 128-bit for 64-bit Bionic. * config/i386/i386.h (LONG_DOUBLE_TYPE_SIZE): Use 128 if TARGET_LONG_DOUBLE_128 is true. (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Likewise. * config/i386/i386.opt (mlong-double-80): Negate -mlong-double-64. (mlong-double-64): Negate -mlong-double-128. (mlong-double-128): New option. * config/i386/i386-c.c (ix86_target_macros): Define __LONG_DOUBLE_128__ for TARGET_LONG_DOUBLE_128. * doc/invoke.texi: Document -mlong-double-128. gcc/testsuite/ * gcc.target/i386/long-double-64-1.c: Verify __multf3 isn't used. * gcc.target/i386/long-double-64-4.c: Likewise. * gcc.target/i386/long-double-80-1.c: Likewise. * gcc.target/i386/long-double-80-2.c: Likewise. * gcc.target/i386/long-double-80-3.c: Likewise. * gcc.target/i386/long-double-80-4.c: Likewise. * gcc.target/i386/long-double-80-5.c: Likewise. * gcc.target/i386/long-double-64-2.c: Limit to ia32. Verify __multf3 isn't used. * gcc.target/i386/long-double-64-3.c: Likewise. * gcc.target/i386/long-double-128-1.c: New test. * gcc.target/i386/long-double-128-2.c: Likewise. * gcc.target/i386/long-double-128-3.c: Likewise. * gcc.target/i386/long-double-128-4.c: Likewise. * gcc.target/i386/long-double-128-5.c: Likewise. * gcc.target/i386/long-double-128-6.c: Likewise. * gcc.target/i386/long-double-128-7.c: Likewise. * gcc.target/i386/long-double-128-8.c: Likewise. * gcc.target/i386/long-double-128-9.c: Likewise. * gcc.target/i386/long-double-64-5.c: Likewise. * gcc.target/i386/long-double-64-6.c: Likewise. * gcc.target/i386/long-double-64-7.c: Likewise. * gcc.target/i386/long-double-64-8.c: Likewise. * gcc.target/i386/long-double-64-9.c: Likewise. * gcc.target/i386/long-double-80-10.c: Likewise. * gcc.target/i386/long-double-80-8.c: Likewise. * gcc.target/i386/long-double-80-9.c: Likewise. Change-Id: I2e1ce44792dd78df521fa485f2c0d2303dbb83bd Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* | [4.7, 4.8] Backport of two patches for additional SLM-tuning.Alexander Ivchenko2014-01-301-2/+2
|/ | | | | | | | | | | | | | | | | | | We don't have config/i386/x86-tune.def in 4.8, instead initial_ix86_tune_features is modified. This one is for 4.8 only. 2013-09-12 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/x86-tune.def: Turn on X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE for SLM. Update HImode imul cost for Silvermont 2013-12-13 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/i386.c (slm_cost): Fix imul cost for HI. Change-Id: I3e6e7b157897e93bc3874738635db4ecf4e7f587 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* [4.6, 4.8] Add -mtune=intel supportPavel Chupin2013-12-092-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is backport of r205719 and r205754 from trunk. Now -mtune=intel matches -mtune=slm for 4.8 and -mtune=atom for 4.6. As written in gcc-4.8 docs: Produce code optimized for the most current Intel processors, which are Haswell and Silvermont for this version of GCC. If you know the CPU on which your code will run, then you should use the corresponding -mtune or -march option instead of -mtune=intel. But, if you want your application performs better on both Haswell and Silvermont, then you should use this option. As new Intel processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of GCC, code generation controlled by this option will change to reflect the most current Intel processors at the time that version of GCC is released. There is no -march=intel option because -march indicates the instruction set the compiler can use, and there is no common instruction set applicable to all processors. In contrast, -mtune indicates the processor (or, in this case, collection of processors) for which the code is optimized. Change-Id: I3ec4c3b5423d9b3547cd8e3aa77a18af3fd89598 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Remove *.orig; update libgo testdataAndrew Hsieh2013-12-032-61043/+0
| | | | | | | 1. *.orig files are artifact after patch 2. restore 3 testdata which were reset to zero-byte in last rebase Change-Id: I32e80c33349249cb11397b57698c2a241793652c
* [4.8] Merge GCC 4.8.2synergydev2013-10-179-93/+61332
| | | | Change-Id: I0f1fcf69c5076d8534c5c45562745e1a37adb197
* [4.8] Simplify GCC 4.8 BASE-VERAndrew Hsieh2013-08-071-1/+1
| | | | | | | | | Change 4.8.1 -> 4.8 to simplify and shield NDK make-standalone-toolchain.sh from gcc minor version upgrade Also correct a comment based on upstream Change-Id: I95791e24937d02fffa6e116761d834705020c911
* [4.8] Merge GCC 4.8.1Ben Cheng2013-08-056-103/+159
| | | | Change-Id: Ic8a60b7563f5172440fd40788605163a0cca6e30
* [4.7, 4.8] Extended Silvermont tuning.Pavel Chupin2013-06-043-79/+320
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport r199546 from trunk: 2013-05-31 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> Igor Zamyatin <igor.zamyatin@intel.com> Silvermont (SLM) architecture performance tuning. * config/i386/i386.h (enum ix86_tune_indices): Add X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS. (TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define. * config/i386/i386.c (initial_ix86_tune_features) <X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS>: Initialize. (ix86_lea_outperforms): Handle Silvermont tuning. (ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms call. (ix86_use_lea_for_mov): Likewise. (ix86_avoid_lea_for_addr): Likewise. (ix86_lea_for_add_ok): Likewise. (exact_dependency_1): New function. (exact_store_load_dependency): Likewise. (ix86_adjust_cost): Handle Silvermont tuning. (do_reoder_for_imul): Likewise. (swap_top_of_ready_list): New function. (ix86_sched_reorder): Changed to handle Silvermont tuning. * config/i386/i386.md (peepholes that split memory operand in fp converts): New. Also backport r199611 with fixes for the patch above and previous SLM patch: 2013-06-03 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> * config/i386/i386.c (ix86_lea_outperforms): Fix formatting. (ix86_avoid_lea_for_addr): Likewise. (exact_dependency_1): Likewise. (ix86_adjust_cost): Likewise. (swap_top_of_ready_list): Fix formatting and !reload_completed check removed. (do_reorder_for_imul): Fix typo, formatting and !reload_completed check removed. (ix86_sched_reorder): Fix typo and formatting. (fold_builtin_cpu): Move M_INTEL_SLM at the end of processor types list. * config/i386/cpuinfo.c (INTEL_SLM): New enum value. Note that [4.7] part of the patch doesn't contain some of optimizations (IMUL) due to missed dependencies. [4.8] part of this backport is complete. Change-Id: I4b5f92b025aab217046f5b393527636f3cf25669 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* [4.7, 4.8] Release basic tuning for new Silvermont architecturePavel Chupin2013-05-306-26/+885
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support new switches: -march=slm/-mtune=slm This is backport of trunk r199444: 2013-05-30 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> Igor Zamyatin <igor.zamyatin@intel.com> Silvermont (SLM) architecture pipeline model, tuning and insn selection. * config.gcc: Add slm config options and target. * config/i386/slm.md: New. * config/i386/driver-i386.c (host_detect_local_cpu): Check * movbe. * gcc/config/i386/i386-c.c (ix86_target_macros_internal): New * case PROCESSOR_SLM. (ix86_target_macros_internal): Likewise. * gcc/config/i386/i386.c (slm_cost): New cost. (m_SLM): New macro flag. (initial_ix86_tune_features): Set m_SLM. (x86_accumulate_outgoing_args): Likewise. (x86_arch_always_fancy_math_387): Likewise. (processor_target_table): Add slm cost. (cpu_names): Add slm cpu name. (x86_option_override_internal): Set SLM ISA. (ix86_issue_rate): New case PROCESSOR_SLM. (ia32_multipass_dfa_lookahead): Likewise. (fold_builtin_cpu): Add slm. * config/i386/i386.h (TARGET_SLM): New target macro. (target_cpu_default): Add TARGET_CPU_DEFAULT_slm. (processor_type): Add PROCESSOR_SLM. * config/i386/i386.md (cpu): Add new value "slm". (slm.md): Include slm.md. * libgcc/config/i386/cpuinfo.c (INTEL_SLM): New enum value. Change-Id: I3ad6f5584e3fd5de52ac608dc699daaad24f2fe4 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Remove hardcoded -m32 in compiler optionsPavel Chupin2013-05-221-1/+1
| | | | | | | | | | | | | It's required for x86_64 targets where we obviously don't want to enforce -m32. It shouldn't affect standard i686 targets because i686 is enforced on configure stage and it effectively removes 64-bit support, keeping -m32 default. Patch changes 4.7 and 4.8 only. x86_64 targets are not expected to be supported in older gcc versions due to many issues and dependencies. Change-Id: Id15a677a9d3b1712eb95aba92c2c5bd98f9ed1cc Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Update -mstack-protector-guard= support based on upstream commentsAndrew Hsieh2013-04-173-7/+8
| | | | | | See http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00764.html Change-Id: I8aad144f579def5629fcb7cb29a68d057b809be2
* Misc fixesAndrew Hsieh2013-04-041-1/+1
| | | | | | | | | | 1. Fixed darwin build of GCC 4.8/X86 by removing trailing ',' from the last item of enum. Not discovered before because GCC 4.8 now builds with -Wall -Werror, and gcc-4.2.1 in darwin is picky about that 2. Fixed -fuse-ld=mcld Change-Id: I7b65edfb76841f14c3290acb5a98f556d00e1139
* [4.8] Use memalign instead of posix_memalign in GCC x86 mm_malloc.hAndrew Hsieh2013-04-021-0/+6
| | | | | | | | | | | | | | | | posix_memalign doesn't exist in NDK. Code inludes ?mmintrin.h which in turn includes mm_malloc.h may fail to link For AOSP platform build which uses the same compiler, add -DHAVE_POSIX_MEMALIGN to restore the original behavior. Other than non-zero return value which _mm_alloc already ignores, both paths are functioanlly identical (under the hood dlmalloc.c in 32-bit ensure alignment is at least 16-byte) See 0457b0db02c4b229eab11c01025df948032c31a7 Change-Id: I2e83d544a4ac2f4549de3b41a85e009a0a085476
* [4.8] Support OpenMPAndrew Hsieh2013-04-021-1/+1
| | | | | | | | | See b6e375800c9a2f02a732cbdf5e87a860c3d954e1, 1271761f530c0050154e8d526b95f952df551751, 92c478dba755a1a2f6f00ff390666acbffd41982 and 51df2e98d22e2c6f5d2a16860bc8fc3644179c1d. Change-Id: I7b01524a5516dd31b26a68cccc616a066893db39
* [4.8] Add -mstack-protector-guard= to x86 compilersAndrew Hsieh2013-04-024-4/+29
| | | | | | | | | | | | | | | | | | | | To choose between "global" (default) and "tls" (new) for -fstack-protector, -fstack-protector-all, and -fstack-protector-strong (GCC 4.6+). Note that this alone doesn't enable any -fstack-protector* For NDK: The default "global" generates code backward compatible with older bionic For AOSP: build may add "-mstack-protector-guard=tls" to build platform code with new bionic (*1) Related CL: ad88a0863110798cef5169dcf917e18b967a7cf6 (*1) e804643b6dfcfb5842dea4b714601c6dd89f4944 Change-Id: I341c9022530b37ca289d94e1174dfa86a8eaa1bf
* [4.8] Enable x86/arm gcc defaults; Remove march/mtune/mfpmath hardcoded valuesAndrew Hsieh2013-04-021-1/+8
| | | | | | | | | | | See c779c1ff50bde450eb49b3998353804602c4d963 Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0004-Enable-x86-gcc-defaults.patch Also see 5578813961a205a7c5d3e9da8a1b5ec00d4dac3c They should be passed in configure to work correctly. See https://android-review.googlesource.com/50815 Change-Id: I0be1f1111870070f25d92d390d2738b52315865d
* [4.8] Enable assembler linker default for securityAndrew Hsieh2013-04-021-1/+2
| | | | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0009-Enable-assembler-linker-default-for-security.patch See 7e66b0108987a56a58c6150672fe7cf8cf88e69a Change-Id: Ia668c962b7251dd673cc028dac8a111b1aeeb47d
* [GCC 4.8] Initial check-in of GCC 4.8.0Ben Cheng2013-03-28154-0/+108242
Change-Id: I0719d8a6d0f69b367a6ab6f10eb75622dbf12771
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