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* Delete old versions of GCC.Dan Albert2015-06-171189-876542/+0
| | | | Change-Id: I710f125d905290e1024cbd67f48299861790c66c
* [gcc] Remove "-mstackrealign" option turned on by default on x86.Alexander Ivchenko2014-10-142-2/+2
| | | | | | | | For ndk docs change, please refer to: https://android-review.googlesource.com/#/c/110100/ Change-Id: Icbe13a158511d519312b2a1d3e606c9dd2bff4af Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* Setup x86_64 ABI and add -mssse3 to x86 ABIPavel Chupin2014-06-201-1/+1
| | | | | | | | | | | 32-bit: replace -msse3 by -mssse3 64-bit: setup default options as -msse4.2 -mpopcnt Note: when multilib compiler is used -m32 will match 32-bit options and -m64 or default (neither -m32 nor -m64) will match 64-bit options. Change-Id: Ia20a03f54e3ff5857108e9ab0ae1c4c7c1e6cc7f Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* [4.7, 4.8] Backport of two patches for additional SLM-tuning.Alexander Ivchenko2014-01-301-1/+1
| | | | | | | | | | | | | | | | | | | We don't have config/i386/x86-tune.def in 4.8, instead initial_ix86_tune_features is modified. This one is for 4.8 only. 2013-09-12 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/x86-tune.def: Turn on X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE for SLM. Update HImode imul cost for Silvermont 2013-12-13 Yuri Rumyantsev <ysrumyan@gmail.com> * config/i386/i386.c (slm_cost): Fix imul cost for HI. Change-Id: I3e6e7b157897e93bc3874738635db4ecf4e7f587 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* Backport fix to set mips_dbx_regno entries to IGNORED_DWARF_REGNUM by defaultSteve Ellcey2013-10-252-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2012-12-12 Steve Ellcey <sellcey@mips.com> * config/mips/mips.c (mips_option_override): Set mips_dbx_regno entries to IGNORED_DWARF_REGNUM by default. 2012-12-10 Steve Ellcey <sellcey@mips.com> PR target/54061 rtl.h (IGNORED_DWARF_REGNUM): New. * dwarf2out.c (reg_loc_descriptor): Check for IGNORED_DWARF_REGNUM. (mem_loc_descriptor): Ditto. * config/mips/mips.h (ALL_COP_REG_FIRST): New. (ALL_COP_REG_LAST): New. (ALL_COP_REG_NUM): Redefine using above macros. * config/mips/mips.c (mips_option_override): Set mips_dbx_regno coprocessor entries to IGNORED_DWARF_REGNUM. Error reads: target C++: libicui18n <= external/icu4c/i18n/olsontz.cpp external/icu4c/i18n/decimfmt.cpp: In member function 'virtual icu_50::UnicodeString& icu_50::DecimalFormat::format(const icu_50::StringPiece&, icu_50::UnicodeString&, icu_50::FieldPositionIterator*, UErrorCode&) const': external/icu4c/i18n/decimfmt.cpp:1322:1: internal compiler error: in dbx_reg_number, at dwarf2out.c:10185 See http://gcc.gnu.org/ml/gcc-patches/2012-12/msg00830.html Change-Id: I84110b5b54d8d9262043811eddb0edc1c42303f8
* Extend MIPS GCC4.6/4.7/4.8 -mldc1-sdc1 to control ldxc1/sdxc1 tooIceberg Fu2013-08-302-3/+3
| | | | | | | | | | | | | -mldc1-sdc1 now also controls codegen of ldxc1/sdxc1, the indexed versions (where address of load/store is computed from sum of two registers) of ldc1/sdc1 which are already controlled by this option. Although double (or struct containing double) is always aligned and the stock does guarantee 8-byte alignment, this option is to workaround issue when double is allocated from a custom allocator w/o honoring 8-byte minimal alignment. Change-Id: I79433976509b885b5699d62693fd3154bb752abf
* Add MXU support in gcc4.6/4.7/4.8 with -mmxuAndrew Hsieh2013-08-152-0/+5
| | | | | | For Ingenic MXU. Change-Id: Ie7b465c971e3642b3244ac1a77b6f86be4ab4fea
* [4.6,4.7] Always enable --eh-frame-hdr for static executableAndrew Hsieh2013-08-075-1/+20
| | | | | | | See 23e3137ee2897464b051599b85a09f130d3ad05d for the reason why. backport 4.8 patch from http://gcc.gnu.org/ml/gcc-patches/2012-09/msg00969.html Change-Id: I9496e11f314e5e2ec9359b993016723ab6366dad
* Add an internal switch -minline-thumb1-jumptable to ARM gcc4.6/4.7/4.8Lai Wei-Chih2013-08-024-3/+9
| | | | | | | | | | | | | | | | | | | | Default is off (ie. no changes of behavior), meaning that gcc may generate thumb1 jumptable helper calls (eg. __gnu_thumb1_case_sqi) for switch/case. Use -minline-thumb1-jumptable to compile code which can be linked with compiler-rt where helper __gnu_thumb1_case_* doesn't exist. This is mainly for use to compile NDK gabi++/stlport/libc++ to be independent of libgcc.a. The only affected binaries are all in armeabi. ABIs armeabi-v7a and x86/mips aren't affected. Size differences are libgabi++_static.a 176286 -> 176538 +0.1% libstlport_static.a 1406346 -> 1413318 +0.5% libc++_static.a 2426814 -> 2439074 +0.5% Change-Id: I582898955b28e53e988a91bc1a64b76fba677e58
* [4.7, 4.8] Extended Silvermont tuning.Pavel Chupin2013-06-043-5/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport r199546 from trunk: 2013-05-31 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> Igor Zamyatin <igor.zamyatin@intel.com> Silvermont (SLM) architecture performance tuning. * config/i386/i386.h (enum ix86_tune_indices): Add X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS. (TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define. * config/i386/i386.c (initial_ix86_tune_features) <X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS>: Initialize. (ix86_lea_outperforms): Handle Silvermont tuning. (ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms call. (ix86_use_lea_for_mov): Likewise. (ix86_avoid_lea_for_addr): Likewise. (ix86_lea_for_add_ok): Likewise. (exact_dependency_1): New function. (exact_store_load_dependency): Likewise. (ix86_adjust_cost): Handle Silvermont tuning. (do_reoder_for_imul): Likewise. (swap_top_of_ready_list): New function. (ix86_sched_reorder): Changed to handle Silvermont tuning. * config/i386/i386.md (peepholes that split memory operand in fp converts): New. Also backport r199611 with fixes for the patch above and previous SLM patch: 2013-06-03 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> * config/i386/i386.c (ix86_lea_outperforms): Fix formatting. (ix86_avoid_lea_for_addr): Likewise. (exact_dependency_1): Likewise. (ix86_adjust_cost): Likewise. (swap_top_of_ready_list): Fix formatting and !reload_completed check removed. (do_reorder_for_imul): Fix typo, formatting and !reload_completed check removed. (ix86_sched_reorder): Fix typo and formatting. (fold_builtin_cpu): Move M_INTEL_SLM at the end of processor types list. * config/i386/cpuinfo.c (INTEL_SLM): New enum value. Note that [4.7] part of the patch doesn't contain some of optimizations (IMUL) due to missed dependencies. [4.8] part of this backport is complete. Change-Id: I4b5f92b025aab217046f5b393527636f3cf25669 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* [4.7, 4.8] Release basic tuning for new Silvermont architecturePavel Chupin2013-05-306-25/+881
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support new switches: -march=slm/-mtune=slm This is backport of trunk r199444: 2013-05-30 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> Igor Zamyatin <igor.zamyatin@intel.com> Silvermont (SLM) architecture pipeline model, tuning and insn selection. * config.gcc: Add slm config options and target. * config/i386/slm.md: New. * config/i386/driver-i386.c (host_detect_local_cpu): Check * movbe. * gcc/config/i386/i386-c.c (ix86_target_macros_internal): New * case PROCESSOR_SLM. (ix86_target_macros_internal): Likewise. * gcc/config/i386/i386.c (slm_cost): New cost. (m_SLM): New macro flag. (initial_ix86_tune_features): Set m_SLM. (x86_accumulate_outgoing_args): Likewise. (x86_arch_always_fancy_math_387): Likewise. (processor_target_table): Add slm cost. (cpu_names): Add slm cpu name. (x86_option_override_internal): Set SLM ISA. (ix86_issue_rate): New case PROCESSOR_SLM. (ia32_multipass_dfa_lookahead): Likewise. (fold_builtin_cpu): Add slm. * config/i386/i386.h (TARGET_SLM): New target macro. (target_cpu_default): Add TARGET_CPU_DEFAULT_slm. (processor_type): Add PROCESSOR_SLM. * config/i386/i386.md (cpu): Add new value "slm". (slm.md): Include slm.md. * libgcc/config/i386/cpuinfo.c (INTEL_SLM): New enum value. Change-Id: I3ad6f5584e3fd5de52ac608dc699daaad24f2fe4 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Remove hardcoded -m32 in compiler optionsPavel Chupin2013-05-221-1/+1
| | | | | | | | | | | | | It's required for x86_64 targets where we obviously don't want to enforce -m32. It shouldn't affect standard i686 targets because i686 is enforced on configure stage and it effectively removes 64-bit support, keeping -m32 default. Patch changes 4.7 and 4.8 only. x86_64 targets are not expected to be supported in older gcc versions due to many issues and dependencies. Change-Id: Id15a677a9d3b1712eb95aba92c2c5bd98f9ed1cc Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Fix ARM/GCC-4.7,4.8 generates insufficient alignment for NEON vst/vldAndrew Hsieh2013-05-151-2/+6
| | | | | | | | | | | | | | GCC allocates memory buffer and passes it as the first hidden argument for function return large composite type (ie. > 4 bytes for all NDK toolchain). Problem is that GCC doesn't observe the aligement required by the type, and ARM EABI only requires stack to be aligned to 8-byte. Please see http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57271 for external bug tracking this issue and testcase. This CL offers temp relief before formal one Change-Id: I8004bc4208487e539ba8b0c9686c44ac86c37d83
* Add new GCC/MIPS option -mldc1-sdc1Andrew Hsieh2013-04-262-1/+5
| | | | | | | | ldc1/sdc1 needs memory to be 8-byte aligned. This option is on by default for arch supports it, but can be turned off by "-mno-ldc1-sdc1" to workaround issue, for example. Change-Id: I14291dc4280e75f6c765c933b60eb1b7cd44f974
* Merge "[4.7] x32: Backport x32 support into 4.7"Andrew Hsieh2013-04-2225-263/+492
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| * [4.7] x32: Backport x32 support into 4.7Pavel Chupin2013-04-1825-263/+492
| | | | | | | | | | | | | | | | This patch contains all gcc changes required to build x32 compiler. They are backported from 4.8/trunk. Change-Id: I923f639c1f0cee5812b0f555a39bab0bd0723865 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* | Fix GCC4.4.3/4.6/4.7 to supress -export-dynamic for statically linked programsAndrew Hsieh2013-04-121-2/+3
|/ | | | | | | | | r191401 | jingyu | 2012-09-18 01:33:05 +0800 (Tue, 18 Sep 2012) | 6 lines 2012-09-17 Ben Cheng <bccheng@google.com * config/arm/linux-elf.h (LINUX_TARGET_LINK_SPEC): Suppress the dynamic linker commands for statically linked programs. Change-Id: Ib8a27fb054ddb12242d500ef8b3ceb2b0215cb3e
* Misc fixesAndrew Hsieh2013-04-041-1/+1
| | | | | | | | | | 1. Fixed darwin build of GCC 4.8/X86 by removing trailing ',' from the last item of enum. Not discovered before because GCC 4.8 now builds with -Wall -Werror, and gcc-4.2.1 in darwin is picky about that 2. Fixed -fuse-ld=mcld Change-Id: I7b65edfb76841f14c3290acb5a98f556d00e1139
* Fixed GCC 4.6/4.7 ICE gen_thumb_movhi_clobber at config/arm/arm.md:5832Andrew Hsieh2013-03-052-1/+2
| | | | | | | See issue https://code.google.com/p/android/issues/detail?id=52732, and fix http://gcc.gnu.org/ml/gcc-patches/2010-12/msg00732.html Change-Id: If4759a637e5fb6f9c351c11b79d7f9f682ca2ab2
* Fix MIPS GCC to emit -m elf32ltsmip for linkerAndrew Hsieh2013-02-281-0/+1
| | | | | | | | | | ARM/X86 GCC in NDK explicitly emit -m armelf_linux_eabi and -m elf_i386, respectively, for linker. Fix MIPS to do the same, to help mclinker which is built vanilla and relies on either filename (eg. eg. arm-linux-androideabi-ld.mcd implies arm) or -mtriple/-march/-m to figure out the target Change-Id: I236786d0e90a3152225de1eea5e73e3de4ac3f84
* Use memalign instead of posix_memalign in GCC x86 mm_malloc.hAndrew Hsieh2013-02-201-0/+6
| | | | | | | | | | | | | | posix_memalign doesn't exist in NDK. Code inludes ?mmintrin.h which in turn includes mm_malloc.h may fail to link For AOSP platform build which uses the same compiler, add -DHAVE_POSIX_MEMALIGN to restore the original behavior. Other than non-zero return value which _mm_alloc already ignores, both paths are functioanlly identical (under the hood dlmalloc.c in 32-bit ensure alignment is at least 16-byte) Change-Id: I55e9bb8b80e1b55baa9744920df10fcf83218300
* Remove march/mtune/mfpmath hardcoded valuesPavel Chupin2013-01-311-2/+1
| | | | | | | | They should be passed in configure to work correctly. See https://android-review.googlesource.com/50815 Change-Id: I2aeb0375132ba985a51c397ee386af1ff4a47c32 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Fix OpenMPAndrew Hsieh2012-12-276-11/+15
| | | | | | | | | | | | | | Based on 1271761f530c0050154e8d526b95f952df551751, 92c478dba755a1a2f6f00ff390666acbffd41982, and 51df2e98d22e2c6f5d2a16860bc8fc3644179c1d. With the following modifications: 1. Translate -pthread to -lc instead of -lpthread Android doesn't have (has pthread* in libc.so instead) 2. Because of 1., we can restore to the original order of LINUX_OR_ANDROID_LD Change-Id: I505250c32b9908cb17bb269dc26e73c91669c07f
* Support OpenMP+Bionic on ICS/GCC-4.7.2 for task parallelismGeunsik Lim2012-12-252-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch supports OpenMP library to parallelize the existing C/C++ code (e.g: for task parallelism) rapidly/easily without any modification of android platform on multicore embedded devices. The original patch is made by Keith Obenschain (using GCC 4.4.3). . Archive - https://android-review.googlesource.com/#/c/34491/ I just moved GCC version from 4.4.3 to 4.7.2 for ktoolchain version 2.5. The patch is good to me when I evaluate a lot of C/C++ source code with OpenMP's #parama. we move the version of OpenMP from version 2.5 to version 3.1. Please, refer to the "kandroid toolchain" menu in www.kandroid.org to compile source code including bionic and openmp library on real Android devices. http://kandroid.org/board/board.php?board=toolchain&command=body&no=16 I tested Openmp library with the latest GCC 4.7.2 on Android/ARM devices as following. Please refer to the below example. geunsik@rhel6$> ./arm-linux-androideabi-gcc openmptest.c -L /usr/local/ktoolchain-cortexa9-ver2.5-20120515-bionic/arm-linux-androideabi/lib -lgomp -o openmptest [ENTER] geunsik@rhel6$> geunsik@rhel6$> geunsik@rhel6$> file ./openmptest ./openmptest: ELF 32-bit LSB executable, ARM, version 1 (SYSV), dynamically linked (uses shared libs), not stripped Change-Id: I20cb3c1ac5c000445c043310158179723bd69fe2 Signed-off-by: Geunsik Lim <leemgs@gmail.com> Acked-by: Geunsik Lim <geunsik.lim@gmail.com>
* Enable MIPS floating-point madd/msub/nmadd/nmsub/recip/rsqrt with 32-bit FPU.Chao-ying Fu2012-12-112-9/+4
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* Backport r193554 to GCC4.7/x86 resotre earlier cmov behaviorAndrew Hsieh2012-12-062-2/+7
| | | | | | See http://gcc.gnu.org/viewcvs?view=revision&revision=193554 Change-Id: I069da55efd2d75fc8b5ad518090660131d6fec05
* Enable armv7/thumb2 multilib for arm-eabi.Ben Cheng2012-11-291-12/+17
| | | | | | | | | | | Configured multilib: > arm-eabi-gcc -print-multi-lib .; thumb;@mthumb thumb/thumb2;@mthumb@march=armv7 Change-Id: Ie6d951929432610a7317dd37bdf12cb97544e1b4
* Add -mstack-protector-guard= to x86 compilersAndrew Hsieh2012-11-014-4/+30
| | | | | | | | | | | | | | | | | | | | To choose between "global" (default) and "tls" (new) for -fstack-protector, -fstack-protector-all, and -fstack-protector-strong (GCC 4.6+). Note that this alone doesn't enable any -fstack-protector* For NDK: The default "global" generates code backward compatible with older bionic For AOSP: build may add "-mstack-protector-guard=tls" to build platform code with new bionic (*1) Related CL: https://android-review.googlesource.com/#/c/45416 (*1) https://android-review.googlesource.com/#/c/45784 Change-Id: Iedf5b7ae5148572db2e35f0add93bc3d13511304
* Return to %gs:20 code generation for -fstack-protector on x86Pavel Chupin2012-10-301-4/+4
| | | | | | | | | After https://android-review.googlesource.com/#/c/45416 bionic provides stack-protector random value per each thread at %gs:20. Therefore return compiler back to %gs:20 code gen, same as for glibc. Change-Id: I76c68f0c99846d247f34e0ea781a7f1c305659b9 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Merge "Port MIPS Android support to GCC-4.6/4.7"Andrew Hsieh2012-10-232-11/+44
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| * Port MIPS Android support to GCC-4.6/4.7Andrew Hsieh2012-10-232-11/+44
| | | | | | | | | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0008-Port-MIPS-Android-support-to-GCC-4.6.patch Change-Id: I486ea194683b370dcb038488a92fadef7e2da1ac
* | Merge "Enable x86/arm gcc defaults"Andrew Hsieh2012-10-233-4/+12
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| * Enable x86/arm gcc defaultsAndrew Hsieh2012-10-233-4/+12
| | | | | | | | | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0004-Enable-x86-gcc-defaults.patch Change-Id: I6cb6ba8b29b7ba4f242f788a57bf0460289f0cbd
* | Enable assembler linker default for securityAndrew Hsieh2012-10-235-5/+17
|/ | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0009-Enable-assembler-linker-default-for-security.patch Change-Id: I0211ee770e9d4db036361390fcb5892d4e39356f
* [4.7] 64-bit long double for bionicAndrew Hsieh2012-10-094-3/+30
| | | | | | | See Related CL 65cadbba7f7e816b4b2bff752808b7429d0d0f2a done to GCC 4.6 Change-Id: Ia2da804331e82e47f62925a8e9ab819507501fc9
* [4.7] Disable warning: the mangling of <va_list> has changed in GCC 4.4Andrew Hsieh2012-10-081-0/+13
| | | | | | | | Please see commit message of the same fix for 4.6 and 4.4.3 GCC 4.6 a9fcd9b1ecb8954f67738a94b8553ab234d6def5 GCC 4.4.3 329ca6fa5d9972ad6dad8387036b4dbe9cfa1f27 Change-Id: I74847332d32fdcda7dcad4fc03013cb96109ac39
* Backport r186560 and r185958 from gcc trunk to gcc-4.7/gcc/configAndrew Hsieh2012-10-043-18/+67
| | | | Change-Id: Ic600504cdb0bed5a01f8b0bf6232be60fb45eea2
* Initial check-in of gcc 4.7.2.Ben Cheng2012-10-011186-0/+875084
Change-Id: I4a2f5a921c21741a0e18bda986d77e5f1bef0365
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