Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Delete old versions of GCC. | Dan Albert | 2015-06-17 | 1 | -6484/+0 |
| | | | | Change-Id: I710f125d905290e1024cbd67f48299861790c66c | ||||
* | Extend MIPS GCC4.6/4.7/4.8 -mldc1-sdc1 to control ldxc1/sdxc1 too | Iceberg Fu | 2013-08-30 | 1 | -2/+2 |
| | | | | | | | | | | | | | -mldc1-sdc1 now also controls codegen of ldxc1/sdxc1, the indexed versions (where address of load/store is computed from sum of two registers) of ldc1/sdc1 which are already controlled by this option. Although double (or struct containing double) is always aligned and the stock does guarantee 8-byte alignment, this option is to workaround issue when double is allocated from a custom allocator w/o honoring 8-byte minimal alignment. Change-Id: I79433976509b885b5699d62693fd3154bb752abf | ||||
* | Enable MIPS floating-point madd/msub/nmadd/nmsub/recip/rsqrt with 32-bit FPU. | Chao-ying Fu | 2012-12-11 | 1 | -4/+2 |
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* | Add gcc-4.6. Synced to @180989 | Jing Yu | 2011-12-19 | 1 | -0/+6486 |
Change-Id: Ie3676586e1d8e3c8cd9f07d022f450d05fa08439 svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6-mobile |