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* Delete old versions of GCC.Dan Albert2015-06-17176-117411/+0
| | | | Change-Id: I710f125d905290e1024cbd67f48299861790c66c
* [gcc] Remove "-mstackrealign" option turned on by default on x86.Alexander Ivchenko2014-10-141-1/+1
| | | | | | | | For ndk docs change, please refer to: https://android-review.googlesource.com/#/c/110100/ Change-Id: Icbe13a158511d519312b2a1d3e606c9dd2bff4af Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* [4.6,4.8,4.9] Neon2SSE porting solution updatePavel Chupin2014-09-121-3051/+11030
| | | | | | | | | | Improve NEON instrinsics coverage from ~41% to ~93%. This change brings new intrinsics and modifies old ones for better maintainability. Also take into account that IA32 now supports SSSE3 by default, so we can get rid of SSSE3 checks. Change-Id: I599c3b93dcf92d0c94bdb786a4aad705f075893b Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Setup x86_64 ABI and add -mssse3 to x86 ABIPavel Chupin2014-06-201-1/+1
| | | | | | | | | | | 32-bit: replace -msse3 by -mssse3 64-bit: setup default options as -msse4.2 -mpopcnt Note: when multilib compiler is used -m32 will match 32-bit options and -m64 or default (neither -m32 nor -m64) will match 64-bit options. Change-Id: Ia20a03f54e3ff5857108e9ab0ae1c4c7c1e6cc7f Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* [4.6,4.8,4.9] Porting ARM NEON intrinsics to SSE x86Anton Konovalov2014-06-071-0/+8641
| | | | | | | | Added arm_neon.h to gcc 4.6, 4.8 and 4.9 toolchains. Updated config.gcc files. Change-Id: If9c12c3e31f5256b178816dffb41c86af0912db0 Signed-off-by: Anton Konovalov <anton.konovalov@intel.com> Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* [4.6] Fix build of 4.6 compiler using newer 4.8. Backport of two patchesAlexander Ivchenko2014-05-221-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from 4.6.4 release: 2012-09-21 Richard Guenther <rguenther@suse.de> PR middle-end/54638 Backport from mainline 2012-04-19 Richard Guenther <rguenther@suse.de> * ira-int.h (ira_allocno_object_iter_cond): Avoid out-of-bound array access. 2012-04-20 Thomas Schwinge <thomas@codesourcery.com> * config/alpha/linux-unwind.h (alpha_fallback_frame_state): Use siginfo_t instead of struct siginfo. * config/bfin/linux-unwind.h (bfin_fallback_frame_state): Likewise. * config/i386/linux-unwind.h (x86_fallback_frame_state): Likewise. * config/ia64/linux-unwind.h (ia64_fallback_frame_state) (ia64_handle_unwabi): Likewise. * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. * config/pa/linux-unwind.h (pa32_fallback_frame_state): Likewise. * config/sh/linux-unwind.h (shmedia_fallback_frame_state) (sh_fallback_frame_state): Likewise. * config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Likewise. Change-Id: If84780aad73abf47ba08bef806ac0b728c4e1c02 Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>
* Fix host 64-bit gcc4.6 buildAndrew Hsieh2014-03-051-1/+1
| | | | | | | | | | | | | | ANDROID_CC1_SPEC should be used with argument, otherwise it's not expanded and fail compilation. Note that we are not building 64-bit 4.6 target toolchain. 64-bit target toolchains are built from 4.7 and up instead. This issue only occurs when building 64-bit host compiler (x86_64), eg. aosp/prebuilts/gcc/linux-x86/host. The argument doesn't matter, although we put "-fPIC" to be consistent with its 32-bit counterpart Change-Id: I746b14a6e4471a4bd62fb4e29b574669d4b7a9d1
* [4.6, 4.8] Add -mtune=intel supportPavel Chupin2013-12-092-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is backport of r205719 and r205754 from trunk. Now -mtune=intel matches -mtune=slm for 4.8 and -mtune=atom for 4.6. As written in gcc-4.8 docs: Produce code optimized for the most current Intel processors, which are Haswell and Silvermont for this version of GCC. If you know the CPU on which your code will run, then you should use the corresponding -mtune or -march option instead of -mtune=intel. But, if you want your application performs better on both Haswell and Silvermont, then you should use this option. As new Intel processors are deployed in the marketplace, the behavior of this option will change. Therefore, if you upgrade to a newer version of GCC, code generation controlled by this option will change to reflect the most current Intel processors at the time that version of GCC is released. There is no -march=intel option because -march indicates the instruction set the compiler can use, and there is no common instruction set applicable to all processors. In contrast, -mtune indicates the processor (or, in this case, collection of processors) for which the code is optimized. Change-Id: I3ec4c3b5423d9b3547cd8e3aa77a18af3fd89598 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Misc fixesAndrew Hsieh2013-04-041-1/+1
| | | | | | | | | | 1. Fixed darwin build of GCC 4.8/X86 by removing trailing ',' from the last item of enum. Not discovered before because GCC 4.8 now builds with -Wall -Werror, and gcc-4.2.1 in darwin is picky about that 2. Fixed -fuse-ld=mcld Change-Id: I7b65edfb76841f14c3290acb5a98f556d00e1139
* Use memalign instead of posix_memalign in GCC x86 mm_malloc.hAndrew Hsieh2013-02-201-0/+6
| | | | | | | | | | | | | | posix_memalign doesn't exist in NDK. Code inludes ?mmintrin.h which in turn includes mm_malloc.h may fail to link For AOSP platform build which uses the same compiler, add -DHAVE_POSIX_MEMALIGN to restore the original behavior. Other than non-zero return value which _mm_alloc already ignores, both paths are functioanlly identical (under the hood dlmalloc.c in 32-bit ensure alignment is at least 16-byte) Change-Id: I55e9bb8b80e1b55baa9744920df10fcf83218300
* Remove march/mtune/mfpmath hardcoded valuesPavel Chupin2013-01-311-2/+1
| | | | | | | | They should be passed in configure to work correctly. See https://android-review.googlesource.com/50815 Change-Id: I2aeb0375132ba985a51c397ee386af1ff4a47c32 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Fix OpenMPAndrew Hsieh2012-12-272-2/+2
| | | | | | | | | | | | | | Based on 1271761f530c0050154e8d526b95f952df551751, 92c478dba755a1a2f6f00ff390666acbffd41982, and 51df2e98d22e2c6f5d2a16860bc8fc3644179c1d. With the following modifications: 1. Translate -pthread to -lc instead of -lpthread Android doesn't have (has pthread* in libc.so instead) 2. Because of 1., we can restore to the original order of LINUX_OR_ANDROID_LD Change-Id: I505250c32b9908cb17bb269dc26e73c91669c07f
* Add -mstack-protector-guard= to x86 compilersAndrew Hsieh2012-11-014-4/+33
| | | | | | | | | | | | | | | | | | | | To choose between "global" (default) and "tls" (new) for -fstack-protector, -fstack-protector-all, and -fstack-protector-strong (GCC 4.6+). Note that this alone doesn't enable any -fstack-protector* For NDK: The default "global" generates code backward compatible with older bionic For AOSP: build may add "-mstack-protector-guard=tls" to build platform code with new bionic (*1) Related CL: https://android-review.googlesource.com/#/c/45416 (*1) https://android-review.googlesource.com/#/c/45784 Change-Id: Iedf5b7ae5148572db2e35f0add93bc3d13511304
* Return to %gs:20 code generation for -fstack-protector on x86Pavel Chupin2012-10-301-4/+4
| | | | | | | | | After https://android-review.googlesource.com/#/c/45416 bionic provides stack-protector random value per each thread at %gs:20. Therefore return compiler back to %gs:20 code gen, same as for glibc. Change-Id: I76c68f0c99846d247f34e0ea781a7f1c305659b9 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Merge "Enable x86/arm gcc defaults"Andrew Hsieh2012-10-231-1/+9
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| * Enable x86/arm gcc defaultsAndrew Hsieh2012-10-231-1/+9
| | | | | | | | | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0004-Enable-x86-gcc-defaults.patch Change-Id: I6cb6ba8b29b7ba4f242f788a57bf0460289f0cbd
* | Enable assembler linker default for securityAndrew Hsieh2012-10-231-1/+2
|/ | | | | | | Used to be local NDK patch at $NDK/build/tools/toolchain-patches/ gcc/0009-Enable-assembler-linker-default-for-security.patch Change-Id: I0211ee770e9d4db036361390fcb5892d4e39356f
* Backport from trunk r190598 and r190599: 64-bit long double for bionicPavel Chupin2012-08-244-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2012-08-22 H.J. Lu <hongjiu.lu@intel.com> Replace REAL_VALUE_TO_TARGET_LONG_DOUBLE with real_to_target PR target/54347 * config/i386/i386.c (ix86_split_to_parts): Replace REAL_VALUE_TO_TARGET_LONG_DOUBLE with real_to_target. 2012-08-22 H.J. Lu <hongjiu.lu@intel.com> Add -mlong-double-64/-mlong-double-80 to i386 gcc/ * doc/invoke.texi: Document -mlong-double-64/-mlong-double-80. * config/i386/i386.c (flag_opts): Add -mlong-double-64. (TARGET_HAS_BIONIC): Default long double to 64-bit for Bionic. * config/i386/i386.h (LONG_DOUBLE_TYPE_SIZE): Use 64 if TARGET_LONG_DOUBLE_64 is true. (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): New macro. (WIDEST_HARDWARE_FP_SIZE): Defined to 80. * config/i386/i386.opt (mlong-double-80): New option. (mlong-double-64): Likewise. * config/i386/i386-c.c (ix86_target_macros): Define __LONG_DOUBLE_64__ for TARGET_LONG_DOUBLE_64. gcc/testsuite/ * gcc.target/i386/long-double-64-1.c: New file. * gcc.target/i386/long-double-64-2.c: Likewise. * gcc.target/i386/long-double-64-3.c: Likewise. * gcc.target/i386/long-double-64-4.c: Likewise. * gcc.target/i386/long-double-80-1.c: Likewise. * gcc.target/i386/long-double-80-2.c: Likewise. * gcc.target/i386/long-double-80-3.c: Likewise. * gcc.target/i386/long-double-80-4.c: Likewise. * gcc.target/i386/long-double-80-5.c: Likewise. * gcc.target/i386/long-double-80-6.c: Likewise. * gcc.target/i386/long-double-80-7.c: Likewise. libgcc/ * config/i386/t-linux (HOST_LIBGCC2_CFLAGS): New. Change-Id: I85b1e7105e24272e6d43115797b4914b93c2a598 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* Backport from trunk r189840: stack-protector runtime fixPavel Chupin2012-08-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | 2012-07-25 Sergey Melnikov <sergey.melnikov@intel.com> * config/i386/i386.md (stack_protect_set): Disable the pattern for Android since Android libc (bionic) does not provide random value for stack protection guard at gs:0x14. Guard value will be provided from external symbol (default implementation). (stack_protect_set_<mode>): Likewise. (stack_protect_test): Likewise. (stack_protect_test_<mode>): Likewise. * gcc/defaults.h: Define macro TARGET_HAS_BIONIC to 0 - target * does not have Bionic by default * config/linux.h: Redefine macro TARGET_HAS_BIONIC to * (OPTION_BIONIC) Macro OPTION_BIONIC is defined in this file and provides Bionic accessibility status Change-Id: I56ae8fd7fef7c21977072e7f3c24b93030f0b813 Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
* 2012-05-07 Jing Yu <jingyu@google.com>Jing Yu2012-05-072-14/+64
| | | | | | | | | | | | | | | | | | | | | | Backport r186560 and r185958 from gcc trunk 2012-05-03 Enkovich Ilya <ilya.enkovich@intel.com> * config/linux-android.h (ANDROID_STARTFILE_SPEC): Fix shared case. (ANDROID_ENDFILE_SPEC): Likewise. * config/i386/linux.h (TARGET_OS_CPP_BUILTINS): Add Android builtins. (LINUX_TARGET_CC1_SPEC): New. (CC1_SPEC): Support Android. (LINUX_TARGET_LINK_SPEC): New. (LINK_SPEC): Support Android. (LIB_SPEC): New. (STARTFILE_SPEC): New. (LINUX_TARGET_ENDFILE_SPEC): New. (ENDFILE_SPEC): Support Android. * config/i386/linux64.h: Likewise. Change-Id: I0cda19435822a3a3bb0ef1ece16ce0b282a0322b
* Sync down FSF r184235@google/gcc-4_6_2-mobile branchJing Yu2012-02-1515-123/+1252
| | | | | | | | 1) Get mostly new patches from FSF gcc-4.6 branch 2) Fix PR52129 3) Insert GNU-stack note for all ARM targets Change-Id: I2b9926981210e517e4021242908074319a91d6bd
* Add gcc-4.6. Synced to @180989Jing Yu2011-12-19175-0/+99532
Change-Id: Ie3676586e1d8e3c8cd9f07d022f450d05fa08439 svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6-mobile
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