| Commit message (Collapse) | Author | Age | Files | Lines |
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See http://code.google.com/p/android/issues/detail?id=20862
Disable r172951 in -O0 to fix issue.
r172951 optimizes the case when the estimated funciton size
is small, all branches in funciton become short jump, ie. the
function doesn't contain far jump which clobber register "lr".
Unfortunately the estimation may not be correct before register
allocation because spill code may increase the function size and
invalidate the assumption about whether to save/restore "lr" or not.
Fortunately, "lr" is already save/restored when the funciton use r4-r7
or contains spill code. r172951 works because register allocator must
exhaust r4-r7 before spill code, so the size estimation when r4-r7
are NOT used is accurate.
Unfortunately this isn't the case in -O0 when compiler doesn't use
r4-r7 at all yet somehow the size estimation is wrong. Disable it for -O0
r172951 | carrot | 2011-04-26 09:55:33 +0800 (Tue, 26 Apr 2011) | 5 lines
* gcc/config/arm/arm.c (SHORTEST_FAR_JUMP_LENGTH): New constant.
(estimate_function_length): New function.
(thumb_far_jump_used_p): No far jump is needed in short function.
Change-Id: I0973d2141787332fc61501fbe76dc7c44c9d1282
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r179983 | rsandifo | 2011-10-14 22:39:32 +0800 (Fri, 14 Oct 2011) | 12 lines
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* gcc.dg/di-longlong64-sync-1.c: New test.
* gcc.dg/di-sync-multithread.c: New test.
* gcc.target/arm/di-longlong64-sync-withhelpers.c: New test.
* gcc.target/arm/di-longlong64-sync-withldrexd.c: New test.
* lib/target-supports.exp: (arm_arch_*_ok): Series of effective-target
tests for v5, v6, v6k, and v7-a, and add-options helpers.
(check_effective_target_arm_arm_ok): New helper.
(check_effective_target_sync_longlong): New helper.
r179982 | rsandifo | 2011-10-14 22:39:10 +0800 (Fri, 14 Oct 2011) | 8 lines
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* config/arm/linux-atomic-64bit.c: New (based on linux-atomic.c).
* config/arm/linux-atomic.c: Change comment to point to 64bit version.
(SYNC_LOCK_RELEASE): Instantiate 64bit version.
* config/arm/t-linux-eabi: Pull in linux-atomic-64bit.c.
r179981 | rsandifo | 2011-10-14 22:38:58 +0800 (Fri, 14 Oct 2011) | 44 lines
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* config/arm/arm.c (arm_output_ldrex): Support ldrexd.
(arm_output_strex): Support strexd.
(arm_output_it): New helper to output it in Thumb2 mode only.
(arm_output_sync_loop): Support DI mode. Change comment to
not support const_int.
(arm_expand_sync): Support DI mode.
* config/arm/arm.h (TARGET_HAVE_LDREXBHD): Split into LDREXBH
and LDREXD.
* config/arm/iterators.md (NARROW): move from sync.md.
(QHSD): New iterator for all current ARM integer modes.
(SIDI): New iterator for SI and DI modes only.
* config/arm/sync.md (sync_predtab): New mode_attr.
(sync_compare_and_swapsi): Fold into sync_compare_and_swap<mode>.
(sync_lock_test_and_setsi): Fold into sync_lock_test_and_setsi<mode>.
(sync_<sync_optab>si): Fold into sync_<sync_optab><mode>.
(sync_nandsi): Fold into sync_nand<mode>.
(sync_new_<sync_optab>si): Fold into sync_new_<sync_optab><mode>.
(sync_new_nandsi): Fold into sync_new_nand<mode>.
(sync_old_<sync_optab>si): Fold into sync_old_<sync_optab><mode>.
(sync_old_nandsi): Fold into sync_old_nand<mode>.
(sync_compare_and_swap<mode>): Support SI & DI.
(sync_lock_test_and_set<mode>): Likewise.
(sync_<sync_optab><mode>): Likewise.
(sync_nand<mode>): Likewise.
(sync_new_<sync_optab><mode>): Likewise.
(sync_new_nand<mode>): Likewise.
(sync_old_<sync_optab><mode>): Likewise.
(sync_old_nand<mode>): Likewise.
(arm_sync_compare_and_swapsi): Turn into iterator on SI & DI.
(arm_sync_lock_test_and_setsi): Likewise.
(arm_sync_new_<sync_optab>si): Likewise.
(arm_sync_new_nandsi): Likewise.
(arm_sync_old_<sync_optab>si): Likewise.
(arm_sync_old_nandsi): Likewise.
(arm_sync_compare_and_swap<mode> NARROW): use sync_predtab, fix indent.
(arm_sync_lock_test_and_setsi<mode> NARROW): Likewise.
(arm_sync_new_<sync_optab><mode> NARROW): Likewise.
(arm_sync_new_nand<mode> NARROW): Likewise.
(arm_sync_old_<sync_optab><mode> NARROW): Likewise.
(arm_sync_old_nand<mode> NARROW): Likewise.
r179980 | rsandifo | 2011-10-14 22:38:42 +0800 (Fri, 14 Oct 2011) | 6 lines
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
PR target/48126
* config/arm/arm.c (arm_output_sync_loop): Move label before barrier.
r179979 | rsandifo | 2011-10-14 22:38:30 +0800 (Fri, 14 Oct 2011) | 5 lines
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.
Change-Id: Ic27fcf0b49e835cefdafb24fbba2f6023059d2b3
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Disable this obsolete warning for Android, because none of the exposed
APIs NDK is impacted by this change of ARM ABI. This warning can be
triggered very easily by compiling the following code using
arm-linux-androideabi-g++:
typedef __builtin_va_list __gnuc_va_list;
typedef __gnuc_va_list va_list;
void foo(va_list v) { }
We could advise developer to add "-Wno-psabi", but doing so also
categorically deny other cases guarded by "warn_psabi". Hence the
decision to disable it case by case here.
Related discussion:
https://groups.google.com/d/msg/android-ndk/-/7XLgL08iv0sJ
Change-Id: I2c5c42e4593d3a1806f7840ccaa3e59d8d1c2315
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1) Get mostly new patches from FSF gcc-4.6 branch
2) Fix PR52129
3) Insert GNU-stack note for all ARM targets
Change-Id: I2b9926981210e517e4021242908074319a91d6bd
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Change-Id: Ie3676586e1d8e3c8cd9f07d022f450d05fa08439
svn://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6-mobile
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