1137 files changed, 351456 insertions, 0 deletions

diff --git a/gcc-4.9/libgcc/config/aarch64/crti.S b/gcc-4.9/libgcc/config/aarch64/crti.S
new file mode 100644
index 000000000..9f607b7cc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/crti.S
@@ -0,0 +1,68 @@
+# Machine description for AArch64 architecture.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+# This file creates a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+#ifdef __ELF__
+#define TYPE(x) .type x,function
+#else
+#define TYPE(x)
+#endif
+
+	# Note - this macro is complemented by the FUNC_END macro
+	# in crtn.S.  If you change this macro you must also change
+	# that macro match.
+.macro FUNC_START
+	#  Create a stack frame and save any call-preserved registers
+	stp	x29, x30, [sp, #-16]!
+	stp	x27, x28, [sp, #-16]!
+	stp	x25, x26, [sp, #-16]!
+	stp	x23, x24, [sp, #-16]!
+	stp	x21, x22, [sp, #-16]!
+	stp	x19, x20, [sp, #-16]!
+.endm
+
+	.section	".init"
+	.align 2
+	.global	_init
+	TYPE(_init)
+_init:
+	FUNC_START
+
+
+	.section	".fini"
+	.align	2
+	.global	_fini
+	TYPE(_fini)
+_fini:
+	FUNC_START
+
+# end of crti.S
diff --git a/gcc-4.9/libgcc/config/aarch64/crtn.S b/gcc-4.9/libgcc/config/aarch64/crtn.S
new file mode 100644
index 000000000..2a412394d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/crtn.S
@@ -0,0 +1,61 @@
+# Machine description for AArch64 architecture.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	# Note - this macro is complemented by the FUNC_START macro
+	# in crti.S.  If you change this macro you must also change
+	# that macro match.
+	#
+	# Note - we do not try any fancy optimizations of the return
+	# sequences here, it is just not worth it.  Instead keep things
+	# simple.  Restore all the save resgisters, including the link
+	# register and then perform the correct function return instruction.
+.macro FUNC_END
+	ldp	x19, x20, [sp], #16
+	ldp	x21, x22, [sp], #16
+	ldp	x23, x24, [sp], #16
+	ldp	x25, x26, [sp], #16
+	ldp	x27, x28, [sp], #16
+	ldp	x29, x30, [sp], #16
+	ret
+.endm
+
+
+	.section	".init"
+	;;
+	FUNC_END
+
+	.section	".fini"
+	;;
+	FUNC_END
+
+# end of crtn.S
diff --git a/gcc-4.9/libgcc/config/aarch64/linux-unwind.h b/gcc-4.9/libgcc/config/aarch64/linux-unwind.h
new file mode 100644
index 000000000..6b5b3cd1d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/linux-unwind.h
@@ -0,0 +1,156 @@
+/* Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef inhibit_libc
+
+#include <signal.h>
+#include <sys/ucontext.h>
+
+
+/* Since insns are always stored LE, on a BE system the opcodes will
+   be loaded byte-reversed.  Therefore, define two sets of opcodes,
+   one for LE and one for BE.  */
+
+#if __AARCH64EB__
+#define MOVZ_X8_8B	0x681180d2
+#define SVC_0		0x010000d4
+#else
+#define MOVZ_X8_8B	0xd2801168
+#define SVC_0		0xd4000001
+#endif
+
+#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
+
+static _Unwind_Reason_Code
+aarch64_fallback_frame_state (struct _Unwind_Context *context,
+			      _Unwind_FrameState * fs)
+{
+  /* The kernel creates an rt_sigframe on the stack immediately prior
+     to delivering a signal.
+
+     This structure must have the same shape as the linux kernel
+     equivalent.  */
+  struct rt_sigframe
+  {
+    siginfo_t info;
+    struct ucontext uc;
+  };
+
+  struct rt_sigframe *rt_;
+  _Unwind_Ptr new_cfa;
+  unsigned *pc = context->ra;
+  struct sigcontext *sc;
+  struct _aarch64_ctx *extension_marker;
+  int i;
+
+  /* A signal frame will have a return address pointing to
+     __default_sa_restorer. This code is hardwired as:
+
+     0xd2801168         movz x8, #0x8b
+     0xd4000001         svc  0x0
+   */
+  if (pc[0] != MOVZ_X8_8B || pc[1] != SVC_0)
+    {
+      return _URC_END_OF_STACK;
+    }
+
+  rt_ = context->cfa;
+  sc = &rt_->uc.uc_mcontext;
+
+/* This define duplicates the definition in aarch64.md */
+#define SP_REGNUM 31
+
+  new_cfa = (_Unwind_Ptr) sc;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
+
+  for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++)
+    {
+      fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset =
+	(_Unwind_Ptr) & (sc->regs[i]) - new_cfa;
+    }
+
+  /* The core context may be extended with an arbitrary set of
+     additional contexts appended sequentially. Each additional
+     context contains a magic identifier and size in bytes.  The size
+     field can be used to skip over unrecognized context extensions.
+     The end of the context sequence is marked by a context with magic
+     0 or size 0.  */
+  for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved;
+       extension_marker->magic;
+       extension_marker = (struct _aarch64_ctx *)
+       ((unsigned char *) extension_marker + extension_marker->size))
+    {
+      if (extension_marker->magic == FPSIMD_MAGIC)
+	{
+	  struct fpsimd_context *ctx =
+	    (struct fpsimd_context *) extension_marker;
+	  int i;
+
+	  for (i = 0; i < AARCH64_DWARF_NUMBER_V; i++)
+	    {
+	      _Unwind_Sword offset;
+
+	      fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET;
+
+	      /* sigcontext contains 32 128bit registers for V0 to
+		 V31.  The kernel will have saved the contents of the
+		 V registers.  We want to unwind the callee save D
+		 registers.  Each D register comprises the least
+		 significant half of the corresponding V register.  We
+		 need to offset into the saved V register dependent on
+		 our endianness to find the saved D register.  */
+
+	      offset = (_Unwind_Ptr) & (ctx->vregs[i]) - new_cfa;
+
+	      /* The endianness adjustment code below expects that a
+		 saved V register is 16 bytes.  */
+	      gcc_assert (sizeof (ctx->vregs[0]) == 16);
+#if defined (__AARCH64EB__)
+	      offset = offset + 8;
+#endif
+	      fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset;
+	    }
+	}
+      else
+	{
+	  /* There is context provided that we do not recognize!  */
+	}
+    }
+
+  fs->regs.reg[31].how = REG_SAVED_OFFSET;
+  fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa;
+
+  fs->signal_frame = 1;
+
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET;
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset =
+    (_Unwind_Ptr) (sc->pc) - new_cfa;
+
+  fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+
+  return _URC_NO_REASON;
+}
+
+#endif
diff --git a/gcc-4.9/libgcc/config/aarch64/sfp-exceptions.c b/gcc-4.9/libgcc/config/aarch64/sfp-exceptions.c
new file mode 100644
index 000000000..f3a95e8ab
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/sfp-exceptions.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2012-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#include "sfp-machine.h"
+
+void
+__sfp_handle_exceptions (int _fex)
+{
+  const float fp_max = __FLT_MAX__;
+  const float fp_min = __FLT_MIN__;
+  const float fp_1e32 = 1.0e32f;
+  const float fp_zero = 0.0;
+  const float fp_one = 1.0;
+  unsigned fpsr;
+
+  if (_fex & FP_EX_INVALID)
+    {
+      __asm__ __volatile__ ("fdiv\ts0, %s0, %s0"
+			    :
+			    : "w" (fp_zero)
+			    : "s0");
+      __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));
+    }
+  if (_fex & FP_EX_DIVZERO)
+    {
+      __asm__ __volatile__ ("fdiv\ts0, %s0, %s1"
+			    :
+			    : "w" (fp_one), "w" (fp_zero)
+			    : "s0");
+      __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));
+    }
+  if (_fex & FP_EX_OVERFLOW)
+    {
+      __asm__ __volatile__ ("fadd\ts0, %s0, %s1"
+			    :
+			    : "w" (fp_max), "w" (fp_1e32)
+			    : "s0");
+      __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));
+    }
+  if (_fex & FP_EX_UNDERFLOW)
+    {
+      __asm__ __volatile__ ("fmul\ts0, %s0, %s0"
+			    :
+			    : "w" (fp_min)
+			    : "s0");
+      __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));
+    }
+  if (_fex & FP_EX_INEXACT)
+    {
+      __asm__ __volatile__ ("fsub\ts0, %s0, %s1"
+			    :
+			    : "w" (fp_max), "w" (fp_one)
+			    : "s0");
+      __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));
+    }
+}
diff --git a/gcc-4.9/libgcc/config/aarch64/sfp-machine.h b/gcc-4.9/libgcc/config/aarch64/sfp-machine.h
new file mode 100644
index 000000000..203e478db
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/sfp-machine.h
@@ -0,0 +1,125 @@
+/* Machine description for AArch64 architecture.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define _FP_W_TYPE_SIZE		64
+#define _FP_W_TYPE		unsigned long long
+#define _FP_WS_TYPE		signed long long
+#define _FP_I_TYPE		long long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+/* The type of the result of a floating point comparison.  This must
+   match __libgcc_cmp_return__ in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1)
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* This appears to be in line with the VFP conventions in the v7-a
+   ARM-ARM. Need to check with the v8 version.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define FP_EX_INVALID	0x01
+#define FP_EX_DIVZERO	0x02
+#define FP_EX_OVERFLOW	0x04
+#define FP_EX_UNDERFLOW	0x08
+#define FP_EX_INEXACT	0x10
+#define FP_EX_SHIFT 8
+#define FP_EX_ALL \
+	(FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \
+	 | FP_EX_INEXACT)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+void __sfp_handle_exceptions (int);
+
+#define FP_HANDLE_EXCEPTIONS			\
+  do {						\
+    if (__builtin_expect (_fex, 0))		\
+      __sfp_handle_exceptions (_fex);		\
+  } while (0);
+
+#define FP_TRAPPING_EXCEPTIONS ((_fpcr >> FP_EX_SHIFT) & FP_EX_ALL)
+
+#define FP_RND_NEAREST		0x000000
+#define FP_RND_PINF		0x400000
+#define FP_RND_MINF		0x800000
+#define FP_RND_ZERO		0xc00000
+#define FP_RND_MASK		0xc00000
+
+#define _FP_DECL_EX \
+  unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST
+
+#define FP_INIT_ROUNDMODE			\
+  do {						\
+    __asm__ __volatile__ ("mrs	%0, fpcr"	\
+			  : "=r" (_fpcr));	\
+  } while (0)
+
+#define FP_ROUNDMODE (_fpcr & FP_RND_MASK)
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __AARCH64EB__
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/aarch64/sync-cache.c b/gcc-4.9/libgcc/config/aarch64/sync-cache.c
new file mode 100644
index 000000000..8d206c913
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/sync-cache.c
@@ -0,0 +1,72 @@
+/* Machine description for AArch64 architecture.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+void __aarch64_sync_cache_range (const void *, const void *);
+
+void
+__aarch64_sync_cache_range (const void *base, const void *end)
+{
+  unsigned icache_lsize;
+  unsigned dcache_lsize;
+  static unsigned int cache_info = 0;
+  const char *address;
+
+  if (! cache_info)
+    /* CTR_EL0 [3:0] contains log2 of icache line size in words.
+       CTR_EL0 [19:16] contains log2 of dcache line size in words.  */
+    asm volatile ("mrs\t%0, ctr_el0":"=r" (cache_info));
+
+  icache_lsize = 4 << (cache_info & 0xF);
+  dcache_lsize = 4 << ((cache_info >> 16) & 0xF);
+
+  /* Loop over the address range, clearing one cache line at once.
+     Data cache must be flushed to unification first to make sure the
+     instruction cache fetches the updated data.  'end' is exclusive,
+     as per the GNU definition of __clear_cache.  */
+
+  /* Make the start address of the loop cache aligned.  */
+  address = (const char*) ((__UINTPTR_TYPE__) base
+			   & ~ (__UINTPTR_TYPE__) (dcache_lsize - 1));
+
+  for (; address < (const char *) end; address += dcache_lsize)
+    asm volatile ("dc\tcvau, %0"
+		  :
+		  : "r" (address)
+		  : "memory");
+
+  asm volatile ("dsb\tish" : : : "memory");
+
+  /* Make the start address of the loop cache aligned.  */
+  address = (const char*) ((__UINTPTR_TYPE__) base
+			   & ~ (__UINTPTR_TYPE__) (icache_lsize - 1));
+
+  for (; address < (const char *) end; address += icache_lsize)
+    asm volatile ("ic\tivau, %0"
+		  :
+		  : "r" (address)
+		  : "memory");
+
+  asm volatile ("dsb\tish; isb" : : : "memory");
+}
diff --git a/gcc-4.9/libgcc/config/aarch64/t-aarch64 b/gcc-4.9/libgcc/config/aarch64/t-aarch64
new file mode 100644
index 000000000..118cc43e5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/t-aarch64
@@ -0,0 +1,21 @@
+# Machine description for AArch64 architecture.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c
diff --git a/gcc-4.9/libgcc/config/aarch64/t-softfp b/gcc-4.9/libgcc/config/aarch64/t-softfp
new file mode 100644
index 000000000..586dca224
--- /dev/null
+++ b/gcc-4.9/libgcc/config/aarch64/t-softfp
@@ -0,0 +1,9 @@
+softfp_float_modes := tf
+softfp_int_modes := si di ti
+softfp_extensions := sftf dftf
+softfp_truncations := tfsf tfdf
+softfp_exclude_libgcc2 := n
+
+TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes
+
+LIB2ADD += $(srcdir)/config/aarch64/sfp-exceptions.c
diff --git a/gcc-4.9/libgcc/config/alpha/crtfastmath.c b/gcc-4.9/libgcc/config/alpha/crtfastmath.c
new file mode 100644
index 000000000..8a7117692
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/crtfastmath.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2001-2014 Free Software Foundation, Inc.
+ * Contributed by Richard Henderson (rth@redhat.com)
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+/* Assume OSF/1 compatible interfaces.  */
+
+extern void __ieee_set_fp_control (unsigned long int);
+
+#define IEEE_MAP_DMZ  (1UL<<12)       /* Map denorm inputs to zero */
+#define IEEE_MAP_UMZ  (1UL<<13)       /* Map underflowed outputs to zero */
+
+static void __attribute__((constructor))
+set_fast_math (void)
+{
+  __ieee_set_fp_control (IEEE_MAP_DMZ | IEEE_MAP_UMZ);
+}
diff --git a/gcc-4.9/libgcc/config/alpha/libgcc-alpha-ldbl.ver b/gcc-4.9/libgcc/config/alpha/libgcc-alpha-ldbl.ver
new file mode 100644
index 000000000..aa7f7c28b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/libgcc-alpha-ldbl.ver
@@ -0,0 +1,50 @@
+# Copyright (C) 2006-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+%ifdef __LONG_DOUBLE_128__
+
+# long double 128 bit support in libgcc_s.so.1 is only available
+# when configured with --with-long-double-128.  Make sure all the
+# symbols are available at @@GCC_LDBL_* versions to make it clear
+# there is a configurable symbol set.
+
+%exclude {
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+
+  __divtc3
+  __multc3
+  __powitf2
+}
+
+%inherit GCC_LDBL_3.0 GCC_3.0
+GCC_LDBL_3.0 {
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+}
+
+%inherit GCC_LDBL_4.0.0 GCC_4.0.0
+GCC_LDBL_4.0.0 {
+  __divtc3
+  __multc3
+  __powitf2
+}
+
+%endif
diff --git a/gcc-4.9/libgcc/config/alpha/linux-unwind.h b/gcc-4.9/libgcc/config/alpha/linux-unwind.h
new file mode 100644
index 000000000..b5bfd1c91
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/linux-unwind.h
@@ -0,0 +1,101 @@
+/* DWARF2 EH unwinding support for Alpha Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef inhibit_libc
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#include <signal.h>
+#include <sys/ucontext.h>
+
+#define MD_FALLBACK_FRAME_STATE_FOR alpha_fallback_frame_state
+
+static _Unwind_Reason_Code
+alpha_fallback_frame_state (struct _Unwind_Context *context,
+			    _Unwind_FrameState *fs)
+{
+  unsigned int *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+  int i;
+
+  if (pc[0] != 0x47fe0410		/* mov $30,$16 */
+      || pc[2] != 0x00000083)		/* callsys */
+    return _URC_END_OF_STACK;
+  if (context->cfa == 0)
+    return _URC_END_OF_STACK;
+  if (pc[1] == 0x201f0067)		/* lda $0,NR_sigreturn */
+    sc = context->cfa;
+  else if (pc[1] == 0x201f015f)		/* lda $0,NR_rt_sigreturn */
+    {
+      struct rt_sigframe {
+	siginfo_t info;
+	struct ucontext uc;
+      } *rt_ = context->cfa;
+      sc = &rt_->uc.uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->sc_regs[30];
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 30;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+  for (i = 0; i < 30; ++i)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= (long) &sc->sc_regs[i] - new_cfa;
+    }
+  for (i = 0; i < 31; ++i)
+    {
+      fs->regs.reg[i+32].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i+32].loc.offset
+	= (long) &sc->sc_fpregs[i] - new_cfa;
+    }
+  fs->regs.reg[64].how = REG_SAVED_OFFSET;
+  fs->regs.reg[64].loc.offset = (long)&sc->sc_pc - new_cfa;
+  fs->retaddr_column = 64;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#define MD_FROB_UPDATE_CONTEXT alpha_frob_update_context
+
+/* Fix up for signal handlers that don't have S flag set.  */
+
+static void
+alpha_frob_update_context (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs ATTRIBUTE_UNUSED)
+{
+  unsigned int *pc = context->ra;
+
+  if (pc[0] == 0x47fe0410		/* mov $30,$16 */
+      && pc[2] == 0x00000083		/* callsys */
+      && (pc[1] == 0x201f0067		/* lda $0,NR_sigreturn */
+	  || pc[1] == 0x201f015f))	/* lda $0,NR_rt_sigreturn */
+    _Unwind_SetSignalFrame (context, 1);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/alpha/qrnnd.S b/gcc-4.9/libgcc/config/alpha/qrnnd.S
new file mode 100644
index 000000000..358ed4c5c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/qrnnd.S
@@ -0,0 +1,175 @@
+ # Alpha 21064 __udiv_qrnnd
+ # Copyright (C) 1992-2014 Free Software Foundation, Inc.
+
+ # This file is part of GCC.
+
+ # The GNU MP Library is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3 of the License, or (at your
+ # option) any later version.
+
+ # This file is distributed in the hope that it will be useful, but
+ # WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ # or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Library General Public
+ # License for more details.
+
+ # Under Section 7 of GPL version 3, you are granted additional
+ # permissions described in the GCC Runtime Library Exception, version
+ # 3.1, as published by the Free Software Foundation.
+
+ # You should have received a copy of the GNU General Public License and
+ # a copy of the GCC Runtime Library Exception along with this program;
+ # see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ # <http://www.gnu.org/licenses/>.
+
+#ifdef __ELF__
+.section .note.GNU-stack,""
+#endif
+
+        .set noreorder
+        .set noat
+
+	.text
+
+	.globl __udiv_qrnnd
+	.ent __udiv_qrnnd
+#ifdef __VMS__
+__udiv_qrnnd..en:
+	.frame $29,0,$26,0
+	.prologue
+#else
+__udiv_qrnnd:
+	.frame $30,0,$26,0
+	.prologue 0
+#endif
+
+#define cnt	$2
+#define tmp	$3
+#define rem_ptr	$16
+#define n1	$17
+#define n0	$18
+#define d	$19
+#define qb	$20
+#define AT	$at
+
+	ldiq	cnt,16
+	blt	d,$largedivisor
+
+$loop1:	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	d,n1,qb
+	subq	n1,d,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	d,n1,qb
+	subq	n1,d,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	d,n1,qb
+	subq	n1,d,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	d,n1,qb
+	subq	n1,d,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	subq	cnt,1,cnt
+	bgt	cnt,$loop1
+	stq	n1,0(rem_ptr)
+	bis	$31,n0,$0
+	ret	$31,($26),1
+
+$largedivisor:
+	and	n0,1,$4
+
+	srl	n0,1,n0
+	sll	n1,63,tmp
+	or	tmp,n0,n0
+	srl	n1,1,n1
+
+	and	d,1,$6
+	srl	d,1,$5
+	addq	$5,$6,$5
+
+$loop2:	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	$5,n1,qb
+	subq	n1,$5,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	$5,n1,qb
+	subq	n1,$5,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	$5,n1,qb
+	subq	n1,$5,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	cmplt	n0,0,tmp
+	addq	n1,n1,n1
+	bis	n1,tmp,n1
+	addq	n0,n0,n0
+	cmpule	$5,n1,qb
+	subq	n1,$5,tmp
+	cmovne	qb,tmp,n1
+	bis	n0,qb,n0
+	subq	cnt,1,cnt
+	bgt	cnt,$loop2
+
+	addq	n1,n1,n1
+	addq	$4,n1,n1
+	bne	$6,$Odd
+	stq	n1,0(rem_ptr)
+	bis	$31,n0,$0
+	ret	$31,($26),1
+
+$Odd:
+	/* q' in n0. r' in n1 */
+	addq	n1,n0,n1
+
+	cmpult	n1,n0,tmp	# tmp := carry from addq
+	subq	n1,d,AT
+	addq	n0,tmp,n0
+	cmovne	tmp,AT,n1
+
+	cmpult	n1,d,tmp
+	addq	n0,1,AT
+	cmoveq	tmp,AT,n0
+	subq	n1,d,AT
+	cmoveq	tmp,AT,n1
+
+	stq	n1,0(rem_ptr)
+	bis	$31,n0,$0
+	ret	$31,($26),1
+
+#ifdef __VMS__
+	.link
+	.align 3
+__udiv_qrnnd:
+	.pdesc	__udiv_qrnnd..en,null
+#endif
+	.end	__udiv_qrnnd
diff --git a/gcc-4.9/libgcc/config/alpha/t-alpha b/gcc-4.9/libgcc/config/alpha/t-alpha
new file mode 100644
index 000000000..0b6ffb1ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/t-alpha
@@ -0,0 +1,2 @@
+# This is a support routine for longlong.h, used by libgcc2.c.
+LIB2ADD += $(srcdir)/config/alpha/qrnnd.S
diff --git a/gcc-4.9/libgcc/config/alpha/t-ieee b/gcc-4.9/libgcc/config/alpha/t-ieee
new file mode 100644
index 000000000..5fdc729ec
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/t-ieee
@@ -0,0 +1,2 @@
+# All alphas get an IEEE complaint set of libraries.
+HOST_LIBGCC2_CFLAGS += -mieee
diff --git a/gcc-4.9/libgcc/config/alpha/t-linux b/gcc-4.9/libgcc/config/alpha/t-linux
new file mode 100644
index 000000000..fabf38f9c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/t-linux
@@ -0,0 +1 @@
+SHLIB_MAPFILES += $(srcdir)/config/alpha/libgcc-alpha-ldbl.ver
diff --git a/gcc-4.9/libgcc/config/alpha/t-vms b/gcc-4.9/libgcc/config/alpha/t-vms
new file mode 100644
index 000000000..870e44c8d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/t-vms
@@ -0,0 +1,11 @@
+# This object must be linked with in order to make the executable debuggable.
+# vms-ld handles it automatically when passed -g.
+vms-dwarf2.o: $(srcdir)/config/alpha/vms-dwarf2.S
+	$(gcc_compile) -c -x assembler-with-cpp $<
+
+vms-dwarf2eh.o: $(srcdir)/config/alpha/vms-dwarf2eh.S
+	$(gcc_compile) -c -x assembler-with-cpp $<
+
+LIB2ADD += $(srcdir)/config/alpha/vms-gcc_shell_handler.c
+
+HOST_LIBGCC2_CFLAGS=-mpointer-size=64
diff --git a/gcc-4.9/libgcc/config/alpha/vms-dwarf2.S b/gcc-4.9/libgcc/config/alpha/vms-dwarf2.S
new file mode 100644
index 000000000..2c1751ce5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/vms-dwarf2.S
@@ -0,0 +1,77 @@
+/* VMS dwarf2 section sequentializer.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Douglas B. Rupp (rupp@gnat.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Linking with this file forces Dwarf2 debug sections to be
+   sequentially loaded by the VMS linker, enabling GDB to read them.  */
+
+.section	.debug_abbrev,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_abbrev
+$dwarf2.debug_abbrev:
+	
+.section	.debug_aranges,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_aranges
+$dwarf2.debug_aranges:
+	
+.section	.debug_frame,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_frame
+$dwarf2.debug_frame:		
+	
+.section	.debug_info,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_info
+$dwarf2.debug_info:		
+	
+.section	.debug_line,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_line
+$dwarf2.debug_line:		
+	
+.section	.debug_loc,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_loc
+$dwarf2.debug_loc:		
+	
+.section	.debug_macinfo,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_macinfo
+$dwarf2.debug_macinfo:		
+	
+.section	.debug_pubnames,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_pubnames
+$dwarf2.debug_pubnames:		
+	
+.section	.debug_str,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_str
+$dwarf2.debug_str:		
+	
+.section	.debug_zzzzzz,NOWRT
+		.align 0
+		.globl	$dwarf2.debug_zzzzzz
+$dwarf2.debug_zzzzzz:		
diff --git a/gcc-4.9/libgcc/config/alpha/vms-dwarf2eh.S b/gcc-4.9/libgcc/config/alpha/vms-dwarf2eh.S
new file mode 100644
index 000000000..8f8072f99
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/vms-dwarf2eh.S
@@ -0,0 +1,30 @@
+/* VMS dwarf2 exception handling section sequentializer.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by Douglas B. Rupp (rupp@gnat.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Linking with this file forces the Dwarf2 EH section to be
+   individually loaded by the VMS linker an the unwinder to read it.  */
+
+.section	.eh_frame,NOWRT
+		.align 0
diff --git a/gcc-4.9/libgcc/config/alpha/vms-gcc_shell_handler.c b/gcc-4.9/libgcc/config/alpha/vms-gcc_shell_handler.c
new file mode 100644
index 000000000..199c416c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/vms-gcc_shell_handler.c
@@ -0,0 +1,123 @@
+/* Static condition handler for Alpha/VMS.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This file implements __gcc_shell_handler, the static VMS condition handler
+   used as the indirection wrapper around user level handlers installed with
+   establish_vms_condition_handler GCC builtin.
+
+   [ABI] in comments refers to the "HP OpenVMS calling standard" document
+   dated January 2005.  */
+
+#include <vms/chfdef.h>
+#include <vms/pdscdef.h>
+#include <vms/ssdef.h>
+
+typedef void * ADDR;
+typedef unsigned long long REG;
+
+#define REG_AT(addr) (*(REG *)(addr))
+
+/* Compute pointer to procedure descriptor (Procedure Value) from Frame
+   Pointer FP, according to the rules in [ABI-3.5.1 Current Procedure].  */
+#define PV_FOR(FP) \
+  (((FP) != 0) \
+    ? (((REG_AT (FP) & 0x7) == 0) ? *(PDSCDEF **)(FP) : (PDSCDEF *)(FP)) : 0)
+
+long
+__gcc_shell_handler (struct chf$signal_array *sig_arr,
+		     struct chf$mech_array *mech_arr);
+
+/* Helper for __gcc_shell_handler.  Fetch the pointer to procedure currently
+   registered as the VMS condition handler for the live function with a frame
+   pointer FP.  */
+
+static ADDR
+get_dyn_handler_pointer (REG fp)
+{
+  /* From the frame pointer we find the procedure descriptor, and fetch
+     the handler_data field from there.  This field contains the offset
+     from FP at which the address of the currently installed handler is
+     to be found.  */
+  
+  PDSCDEF * pd = PV_FOR (fp);
+  /* Procedure descriptor pointer for the live subprogram with FP as the frame
+     pointer, and to which _gcc_shell_handler is attached as a condition
+     handler.  */
+
+  REG handler_slot_offset;
+  /* Offset from FP at which the address of the currently established real
+     condition handler is to be found.  This offset is available from the
+     handler_data field of the procedure descriptor.  */
+
+  REG handler_data_offset;
+  /* The handler_data field position in the procedure descriptor, which
+     depends on the kind of procedure at hand.  */
+
+  switch (pd->pdsc$w_flags & 0xf)
+    {
+    case PDSC$K_KIND_FP_STACK:    /* [3.4.2 PD for stack frame procedures]  */
+      handler_data_offset = 40;
+      break;
+	
+    case PDSC$K_KIND_FP_REGISTER: /* [3.4.5 PD for reg frame procedures]  */
+      handler_data_offset = 32;
+      break;
+      
+    default:
+      handler_data_offset = 0;
+      break;
+    }
+
+  /* If we couldn't determine the handler_data field position, give up.  */
+  if (handler_data_offset == 0)
+    return 0;
+
+  /* Otherwise, fetch the fp offset at which the real handler address is to be
+     found, then fetch and return the latter in turn.  */
+     
+  handler_slot_offset = REG_AT ((REG)pd + handler_data_offset);
+
+  return (ADDR) REG_AT (fp + handler_slot_offset);
+}
+
+/* The static VMS condition handler for GCC code.  Fetch the address of the
+   currently established condition handler, then resignal if there is none or
+   call the handler with the VMS condition arguments.  */
+
+long
+__gcc_shell_handler (struct chf$signal_array *sig_arr,
+		     struct chf$mech_array *mech_arr)
+{
+  long ret;
+  long (*user_handler) (struct chf$signal_array *, struct chf$mech_array *);
+
+  user_handler = get_dyn_handler_pointer (mech_arr->chf$q_mch_frame);
+  if (!user_handler)
+    ret = SS$_RESIGNAL;
+  else
+    ret = user_handler (sig_arr, mech_arr);
+
+  return ret;
+}
+   
diff --git a/gcc-4.9/libgcc/config/alpha/vms-unwind.h b/gcc-4.9/libgcc/config/alpha/vms-unwind.h
new file mode 100644
index 000000000..8bb477786
--- /dev/null
+++ b/gcc-4.9/libgcc/config/alpha/vms-unwind.h
@@ -0,0 +1,292 @@
+/* Fallback frame unwinding for Alpha/VMS.
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <vms/pdscdef.h>
+#include <vms/libicb.h>
+#include <vms/chfctxdef.h>
+#include <vms/chfdef.h>
+
+#define MD_FALLBACK_FRAME_STATE_FOR alpha_vms_fallback_frame_state
+
+typedef void * ADDR;
+typedef unsigned long long REG;
+typedef PDSCDEF * PV;
+
+#define REG_AT(addr) (*(REG *)(addr))
+#define ADDR_AT(addr) (*(ADDR *)(addr))
+
+/* Compute pointer to procedure descriptor (Procedure Value) from Frame
+   Pointer FP, according to the rules in [ABI-3.5.1 Current Procedure].  */
+#define PV_FOR(FP) \
+  (((FP) != 0) \
+    ? (((REG_AT (FP) & 0x7) == 0) ? *(PDSCDEF **)(FP) : (PDSCDEF *)(FP)) : 0)
+
+extern int SYS$GL_CALL_HANDL;
+/* This is actually defined as a "long", but in system code where longs
+   are always 4bytes while GCC longs might be 8bytes.  */
+
+#define UPDATE_FS_FOR_CFA_GR(FS, GRN, LOC, CFA) \
+do { \
+(FS)->regs.reg[GRN].how = REG_SAVED_OFFSET;      \
+(FS)->regs.reg[GRN].loc.offset = (_Unwind_Sword) ((REG) (LOC) - (REG) (CFA)); \
+} while (0);
+
+#define GIVEUP_ON_FAILURE(STATUS) \
+  { if ((((STATUS) & 1) != 1)) return _URC_END_OF_STACK; }
+#define DENOTES_EXC_DISPATCHER(PV) ((PV) == (ADDR) (REG) SYS$GL_CALL_HANDL)
+
+#define RA_COLUMN (DWARF_ALT_FRAME_RETURN_COLUMN)
+
+static int
+alpha_vms_fallback_frame_state (struct _Unwind_Context *context,
+				_Unwind_FrameState *fs)
+{
+  static int eh_debug = -1;
+
+  /* Our goal is to update FS to reflect the state one step up CONTEXT, that
+     is: the CFA, return address and *saved* registers locations associated
+     with the function designated by CONTEXT->ra.  We are called when the
+     libgcc unwinder has not found any dwarf FDE for this address, which
+     typically happens when trying to propagate a language exception through a
+     signal global vector or frame based handler.
+
+     The CONTEXT->reg[] entries reflect the state/location of register saves
+     so designate values live at the CONTEXT->ra point.  Of precious value to
+     us here is the frame pointer (r29), which gets us a procedure value.  */
+
+  PV pv = (context->reg[29] != 0) ? PV_FOR (ADDR_AT (context->reg[29])) : 0;
+
+  int pkind = pv ? pv->pdsc$w_flags & 0xf : 0;
+  /* VMS procedure kind, as indicated by the procedure descriptor.  We only
+     know how to deal with FP_STACK or FP_REGISTER here.  */
+
+  ADDR new_cfa = 0;
+  /* CFA we will establish for the caller, computed in different ways,
+     e.g. depending whether we cross an exception dispatcher frame.  */
+
+  CHFCTX *chfctx = 0;
+  /* Pointer to the VMS CHF context associated with an exception dispatcher
+     frame, if we happen to come across one.  */
+
+  int i,j;
+
+  if (eh_debug == -1)
+    {
+      char * eh_debug_env = getenv ("EH_DEBUG");
+      eh_debug = eh_debug_env ? atoi (eh_debug_env) : 0;
+    }
+
+  if (eh_debug)
+    printf ("MD_FALLBACK running ...\n");
+
+  /* We only know how to deal with stack or reg frame procedures, so give
+     up if we're handed anything else.  */
+  if (pkind != PDSC$K_KIND_FP_STACK && pkind != PDSC$K_KIND_FP_REGISTER)
+    return _URC_END_OF_STACK;
+  
+  if (eh_debug)
+    printf ("FALLBACK: CTX FP = 0x%p, PV = 0x%p, EN = 0x%llx, RA = 0x%p\n",
+	    ADDR_AT (context->reg[29]), pv, pv->pdsc$q_entry, context->ra);
+
+  fs->retaddr_column = RA_COLUMN;
+
+  /* If PV designates a VMS exception vector or condition handler, we need to
+     do as if the caller was the signaling point and estabish the state of the
+     intermediate VMS code (CFA, RA and saved register locations) as if it was
+     a single regular function.  This requires special processing.
+
+     The datastructures available from an condition dispatcher frame (signal
+     context) do not contain the values of most callee-saved registers, so
+     whathever PV designates, we need to account for the registers it saves.
+
+     Besides, we need to express all the locations with respect to a
+     consistent CFA value, so we compute this first.  */
+
+  if (DENOTES_EXC_DISPATCHER (pv))
+    {
+      /* The CFA to establish is the signaling point's stack pointer. We
+	 compute it using the system invocation context unwinding services and
+	 save the CHF context data pointer along the way for later uses.  */
+
+      INVO_CONTEXT_BLK icb;
+      int status, invo_handle;
+
+      if (eh_debug)
+	printf ("FALLBACK: SYS$HANDLER\n");
+
+      icb.libicb$q_ireg [29] = REG_AT (context->reg[29]);
+      icb.libicb$q_ireg [30] = 0;
+      invo_handle = LIB$GET_INVO_HANDLE (&icb);
+
+      status = LIB$GET_INVO_CONTEXT (invo_handle, &icb);
+      GIVEUP_ON_FAILURE (status);
+
+      chfctx = (CHFCTX *) icb.libicb$ph_chfctx_addr;
+
+      status = LIB$GET_PREV_INVO_CONTEXT (&icb);
+      GIVEUP_ON_FAILURE (status);
+
+      new_cfa = (ADDR) icb.libicb$q_ireg[30];      
+    }
+  else
+    {
+      /* The CFA to establish is the SP value on entry of the procedure
+	 designated by PV, which we compute as the corresponding frame base
+	 register value + frame size.  Note that the frame base may differ
+	 from CONTEXT->cfa, typically if the caller has performed dynamic
+	 stack allocations.  */
+      
+      int  base_reg  = pv->pdsc$w_flags & PDSC$M_BASE_REG_IS_FP ? 29 : 30;
+      ADDR base_addr = ADDR_AT (context->reg[base_reg]);
+      
+      new_cfa = base_addr + pv->pdsc$l_size;
+    }
+
+  /* State to compute the caller's CFA by adding an offset to the current
+     one in CONTEXT.  */
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
+  fs->regs.cfa_offset = new_cfa - context->cfa;
+
+  /* Regular unwind first, accounting for the register saves performed by
+     the procedure designated by PV.  */
+
+  switch (pkind)
+    {
+    case PDSC$K_KIND_FP_STACK:
+      {
+	/* The saved registers are all located in the Register Save Area,
+	   except for the procedure value register (R27) found at the frame
+	   base address.  */
+
+	int  base_reg  = pv->pdsc$w_flags & PDSC$M_BASE_REG_IS_FP ? 29 : 30;
+	ADDR base_addr = ADDR_AT (context->reg[base_reg]);
+	ADDR rsa_addr  = base_addr + pv->pdsc$w_rsa_offset;
+
+	if (eh_debug)
+	  printf ("FALLBACK: STACK frame procedure\n");
+
+	UPDATE_FS_FOR_CFA_GR (fs, 27, base_addr, new_cfa);
+
+	/* The first RSA entry is for the return address register, R26.  */
+
+	UPDATE_FS_FOR_CFA_GR (fs, 26, rsa_addr, new_cfa);
+	UPDATE_FS_FOR_CFA_GR (fs, RA_COLUMN, rsa_addr, new_cfa);
+
+	/* The following entries are for registers marked as saved according
+	   to ireg_mask.  */
+	for (i = 0, j = 0; i < 32; i++)
+	  if ((1 << i) & pv->pdsc$l_ireg_mask)
+	    UPDATE_FS_FOR_CFA_GR (fs, i, rsa_addr + 8 * ++j, new_cfa);
+	
+	/* ??? floating point registers ?  */
+
+	break;
+      }
+
+    case PDSC$K_KIND_FP_REGISTER:
+      {
+	if (eh_debug)
+	  printf ("FALLBACK: REGISTER frame procedure\n");
+
+	fs->regs.reg[RA_COLUMN].how = REG_SAVED_REG;
+	fs->regs.reg[RA_COLUMN].loc.reg = pv->pdsc$b_save_ra;
+	
+	fs->regs.reg[29].how = REG_SAVED_REG;
+	fs->regs.reg[29].loc.reg = pv->pdsc$b_save_fp;
+	
+	break;
+      }
+
+    default:
+      /* Should never reach here.  */
+      return _URC_END_OF_STACK;
+    }
+
+  /* If PV designates an exception dispatcher, we have to adjust the return
+     address column to get at the signal occurrence point, and account for
+     what the CHF context contains.  */
+
+  if (DENOTES_EXC_DISPATCHER (pv))
+    {
+      /* The PC of the instruction causing the condition is available from the
+	 signal argument vector.  Extra saved register values are available
+	 from the mechargs array.  */
+
+      CHF$SIGNAL_ARRAY *sigargs
+	= (CHF$SIGNAL_ARRAY *) chfctx->chfctx$q_sigarglst;
+
+      CHF$MECH_ARRAY *mechargs
+	= (CHF$MECH_ARRAY *) chfctx->chfctx$q_mcharglst;
+
+      ADDR condpc_addr
+	= &((int *)(&sigargs->chf$l_sig_name)) [sigargs->chf$is_sig_args-2];
+
+      ADDR rei_frame_addr = (void *) mechargs->chf$q_mch_esf_addr;
+
+      /* Adjust the return address location.  */
+
+      UPDATE_FS_FOR_CFA_GR (fs, RA_COLUMN, condpc_addr, new_cfa);
+
+      /* The frame pointer at the condition point is available from the
+	 chf context directly.  */
+
+      UPDATE_FS_FOR_CFA_GR (fs, 29, &chfctx->chfctx$q_expt_fp, new_cfa);
+
+      /* Registers available from the mechargs array.  */
+
+      UPDATE_FS_FOR_CFA_GR (fs, 0, &mechargs->chf$q_mch_savr0, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 1, &mechargs->chf$q_mch_savr1, new_cfa);
+
+      UPDATE_FS_FOR_CFA_GR (fs, 16, &mechargs->chf$q_mch_savr16, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 17, &mechargs->chf$q_mch_savr17, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 18, &mechargs->chf$q_mch_savr18, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 19, &mechargs->chf$q_mch_savr19, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 20, &mechargs->chf$q_mch_savr20, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 21, &mechargs->chf$q_mch_savr21, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 22, &mechargs->chf$q_mch_savr22, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 23, &mechargs->chf$q_mch_savr23, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 24, &mechargs->chf$q_mch_savr24, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 25, &mechargs->chf$q_mch_savr25, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 26, &mechargs->chf$q_mch_savr26, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 27, &mechargs->chf$q_mch_savr27, new_cfa);
+      UPDATE_FS_FOR_CFA_GR (fs, 28, &mechargs->chf$q_mch_savr28, new_cfa);
+      
+      /* Registers R2 to R7 are available from the rei frame pointer.  */
+      
+      for (i = 2; i <= 7; i ++)
+	UPDATE_FS_FOR_CFA_GR (fs, i, rei_frame_addr+(i - 2)*8, new_cfa);
+      
+      /* ??? floating point registers ?  */
+    }
+
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+
+
diff --git a/gcc-4.9/libgcc/config/arc/asm.h b/gcc-4.9/libgcc/config/arc/asm.h
new file mode 100644
index 000000000..447f22ca0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/asm.h
@@ -0,0 +1,29 @@
+/* Assembler macros for the Synopsys DesignWare ARC CPU.
+
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define FUNC(X)         .type X,@function
+#define ENDFUNC(X)      .size X, .-X
diff --git a/gcc-4.9/libgcc/config/arc/crtg.S b/gcc-4.9/libgcc/config/arc/crtg.S
new file mode 100644
index 000000000..c375cee8c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/crtg.S
@@ -0,0 +1,51 @@
+/* Code to start and stop profiling for the Synopsys DesignWare ARC CPU.
+
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	.section .init
+	.global _init
+	.global _fini
+	.global __monstartup
+	mov_s	r0,_init
+	mov_s	r1,_fini
+	jl	__monstartup
+
+	.section .__arc_profile_desc, "a"
+	.global __arc_profile_desc_secstart
+	.balign	4
+__arc_profile_desc_secstart:
+	.section .__arc_profile_forward, "a"
+	.global __arc_profile_forward_secstart
+	.balign 4
+__arc_profile_forward_secstart:
+	.section .__arc_profile_counters, "aw"
+	.global __arc_profile_counters_secstart
+	.balign	4
+__arc_profile_counters_secstart:
+
+	.section .fini
+	.global _mcleanup
+	jl	_mcleanup
diff --git a/gcc-4.9/libgcc/config/arc/crtgend.S b/gcc-4.9/libgcc/config/arc/crtgend.S
new file mode 100644
index 000000000..667222beb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/crtgend.S
@@ -0,0 +1,33 @@
+/* Code to start and stop profiling for the Synopsys DesignWare ARC CPU.
+
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	.section .__arc_profile_desc, "a"
+	.global __arc_profile_desc_secend
+__arc_profile_desc_secend:
+	.section .__arc_profile_forward, "a"
+	.global __arc_profile_forward_secend
+__arc_profile_forward_secend:
diff --git a/gcc-4.9/libgcc/config/arc/crti.S b/gcc-4.9/libgcc/config/arc/crti.S
new file mode 100644
index 000000000..71d67cd53
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/crti.S
@@ -0,0 +1,41 @@
+/* .fini/.init stack frame setup for the Synopsys DesignWare ARC CPU.
+
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#  This file contains the stack frame setup for contents of the .fini and
+# .init sections.
+
+	.section .init
+	.global _init
+	.word 0
+_init:
+	push_s	blink
+
+	.section .fini
+	.global _fini
+	.word 0
+_fini:
+	push_s	blink
diff --git a/gcc-4.9/libgcc/config/arc/crtn.S b/gcc-4.9/libgcc/config/arc/crtn.S
new file mode 100644
index 000000000..d4be36bd5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/crtn.S
@@ -0,0 +1,38 @@
+/* Ensure .fini/.init return for the Synopsys DesignWare ARC CPU.
+
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+                on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return. This file is the last thing linked into any executable.
+
+	.section .init
+	pop_s	blink
+	j_s	[blink]
+
+
+	.section .fini
+	pop_s	blink
+	j_s	[blink]
diff --git a/gcc-4.9/libgcc/config/arc/divtab-arc700.c b/gcc-4.9/libgcc/config/arc/divtab-arc700.c
new file mode 100644
index 000000000..0074819d0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/divtab-arc700.c
@@ -0,0 +1,70 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+In addition to the permissions in the GNU General Public License, the
+Free Software Foundation gives you unlimited permission to link the
+compiled version of this file into combinations with other programs,
+and to distribute those combinations without any restriction coming
+from the use of this file.  (The General Public License restrictions
+do apply in other respects; for example, they cover modification of
+the file, and distribution when not linked into a combine
+executable.)
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Calculate division table for ARC700 integer division
+   Contributed by Joern Rennecke
+   joern.rennecke@arc.com  */
+
+#include <stdio.h>
+#include <math.h>
+
+int
+main ()
+{
+  int i, j;
+  unsigned x;
+  double q, r, err, max_err = -1;
+
+  puts("/* This table has been generated by divtab-arc700.c.  */");
+  puts("\
+/* 1/512 .. 1/256, normalized.  There is a leading 1 in bit 31.\n\
+   For powers of two, we list unnormalized numbers instead.  The values\n\
+   for powers of 2 are loaded, but not used.  The value for 1 is actually\n\
+   the first instruction after .Lmuldiv.  */\n\
+	.balign 4");
+  puts (".Ldivtab:\n");
+  for (i = 256; i >= 2; --i)
+    {
+      j = i < 0 ? -i : i;
+      if (j & (j-1))
+	while (j < 128)
+	  j += j;
+      else
+	/* Power of two. */
+	j *= 128;
+      q = 4.*(1<<30)*128/j;
+      r = ceil (q);
+      printf ("\t.long\t0x%X\n", (unsigned) r);
+      err = r - q;
+      if (err > max_err)
+	max_err = err;
+    }
+#if 0
+  printf ("\t/* maximum error: %f */\n", max_err);
+#endif
+  exit (0);
+}
diff --git a/gcc-4.9/libgcc/config/arc/dp-hack.h b/gcc-4.9/libgcc/config/arc/dp-hack.h
new file mode 100644
index 000000000..30cd0680b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/dp-hack.h
@@ -0,0 +1,101 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* This file selects the double-precision parts of fp-bit.c that are
+   still needed for some ARC hardware variants; it also renames functions
+   that duplicate asm-coded functionality so that their results can be
+   used to compare with the optimized versions for debugging.  */
+
+#define FINE_GRAINED_LIBRARIES
+#define ARC_DP_DEBUG 1
+#if !defined (__ARC_NORM__) || ARC_DP_DEBUG
+#define L_pack_df
+#define L_unpack_df
+#define L_make_df
+#define L_thenan_df
+#define L_sf_to_df
+#endif
+#ifndef __ARC_NORM__
+#define L_addsub_df
+#elif ARC_DP_DEBUG
+#define L_addsub_df
+#define __adddf3 __adddf3_c
+#define __subdf3 __subdf3_c
+#endif
+#ifndef __ARC_NORM__
+#define L_mul_df
+#define L_div_df
+#elif (!defined (__ARC700__) && !defined (__ARC_MUL64__) \
+       && !defined(__ARC_MUL32BY16__))
+#define L_mul_df
+#define L_div_df
+#undef QUIET_NAN
+#define QUIET_NAN 0xfffffffffffffLL
+#elif ARC_DP_DEBUG
+#define L_mul_df
+#define __muldf3 __muldf3_c
+#define L_div_df
+#define __divdf3 __divdf3_c
+#endif
+#ifndef __ARC_NORM__
+#define L_df_to_sf
+#define L_si_to_df
+#define L_df_to_si
+#define L_tf_to_usi /* need to defined this instead of df_to_usi */
+#define L_usi_to_df
+#elif ARC_DP_DEBUG
+#define L_df_to_sf
+#define __truncdfsf2 __truncdfsf2_c
+#define L_si_to_df
+#define __floatsidf __floatsidf_c
+#define L_df_to_si
+#define __fixdfsi __fixdfsi_c
+#define L_tf_to_usi
+#define __fixunsdfsi __fixunsdfsi_c
+#define L_usi_to_df
+#define __floatunsidf __floatunsidf_c
+#endif
+#ifndef __ARC_NORM__
+#define L_fpcmp_parts_df
+#define L_compare_df
+#define L_eq_df
+#define L_ne_df
+#define L_gt_df
+#define L_ge_df
+#define L_lt_df
+#define L_le_df
+#define L_unord_df
+#define L_negate_df
+#elif ARC_DP_DEBUG
+#define L_fpcmp_parts_df
+#define L_eq_df
+#define __eqdf2 __eqdf2_c
+#define L_gt_df
+#define __gtdf2 __gtdf2_c
+#define L_ge_df
+#define __gedf2 __gedf2_c
+#define L_unord_df
+#define __unorddf2 __unorddf2_c
+#endif
diff --git a/gcc-4.9/libgcc/config/arc/fp-hack.h b/gcc-4.9/libgcc/config/arc/fp-hack.h
new file mode 100644
index 000000000..dbd9f0c18
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/fp-hack.h
@@ -0,0 +1,85 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* This file selects the single-precision parts of fp-bit.c that are
+   still needed for some ARC hardware variants; it also renames functions
+   that duplicate asm-coded functionality so that their results can be
+   used to compare with the optimized versions for debugging.  */
+
+#define ARC_FP_DEBUG 1
+#define FINE_GRAINED_LIBRARIES
+#if !defined (__ARC_NORM__) || ARC_FP_DEBUG
+#define L_pack_sf
+#define L_unpack_sf
+#define L_make_sf
+#define L_thenan_sf
+#endif
+#ifndef __ARC_NORM__
+#define L_addsub_sf
+#define L_mul_sf
+#define L_div_sf
+#define L_sf_to_df
+#define L_si_to_sf
+#define L_sf_to_si
+#define L_usi_to_sf
+#elif ARC_FP_DEBUG
+#define L_addsub_sf
+#define __addsf3 __addsf3_c
+#define __subsf3 __subsf3_c
+#define L_mul_sf
+#define __mulsf3 __mulsf3_c
+#define L_div_sf
+#define __divsf3 __divsf3_c
+#define L_sf_to_df
+#define __extendsfdf2 __extendsfdf2_c
+#define L_si_to_sf
+#define __floatsisf __floatsisf_c
+#define L_sf_to_si
+#define __fixsfsi __fixsfsi_c
+#define L_usi_to_sf
+#define __floatunsisf __floatunsisf_c
+#endif
+#ifndef __ARC_NORM__
+#define L_fpcmp_parts_sf
+#define L_compare_sf
+#define L_eq_sf
+#define L_ne_sf
+#define L_gt_sf
+#define L_ge_sf
+#define L_lt_sf
+#define L_le_sf
+#define L_unord_sf
+#define L_negate_sf
+#elif ARC_FP_DEBUG
+#define L_fpcmp_parts_sf
+#define L_eq_sf
+#define __eqsf2 __eqsf2_c
+#define L_gt_sf
+#define __gtsf2 __gtsf2_c
+#define L_ge_sf
+#define __gesf2 __gesf2_c
+#define L_unord_sf
+#define __unordsf2 __unordsf2_c
+#endif
diff --git a/gcc-4.9/libgcc/config/arc/gmon/atomic.h b/gcc-4.9/libgcc/config/arc/gmon/atomic.h
new file mode 100644
index 000000000..5db837857
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/atomic.h
@@ -0,0 +1,26 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* File deliberately left blank. */
diff --git a/gcc-4.9/libgcc/config/arc/gmon/auxreg.h b/gcc-4.9/libgcc/config/arc/gmon/auxreg.h
new file mode 100644
index 000000000..b23f7b779
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/auxreg.h
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define	LP_START	0x02
+#define	LP_END		0x03
+#define IDENTITY	0x04
+#define STATUS32	0x0a
+#define	COUNT0		0x21 /* Timer 0 count */
+#define	CONTROL0	0x22 /* Timer 0 control */
+#define	LIMIT0		0x23 /* Timer 0 limit */
+#define INT_VECTOR_BASE	0x25
+#define D_CACHE_BUILD	0x72
+#define DC_FLDL		0x4c
diff --git a/gcc-4.9/libgcc/config/arc/gmon/dcache_linesz.S b/gcc-4.9/libgcc/config/arc/gmon/dcache_linesz.S
new file mode 100644
index 000000000..e532d374d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/dcache_linesz.S
@@ -0,0 +1,55 @@
+/* This file contains code to do profiling.
+
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../asm.h"
+#include "auxreg.h"
+/*  This file contains code to do profiling.  */
+	.weak	__profile_timer_cycles
+	.global __profile_timer_cycles
+	.set	__profile_timer_cycles, 200
+	.text
+	; For Arctangent-A5, if no data cache is present, a read of the
+	; cache build register returns the ID register.  For ARC600 and
+	; later, the version field will be zero.
+	.global	__dcache_linesz
+	.balign	4
+__dcache_linesz:
+	lr	r12,[D_CACHE_BUILD]
+	extb_s	r0,r12
+	breq_s	r0,0,.Lsz_nocache
+	brge	r0,0x20,.Lsz_havecache
+	lr	r0,[IDENTITY]
+	breq	r12,r0,.Lsz_nocache
+.Lsz_havecache:
+	lsr_s	r12,r12,16
+	mov_s	r0,16
+	bmsk_s	r12,r12,3
+	asl_s	r0,r0,r12
+	j_s	[blink]
+.Lsz_nocache:
+	mov_s	r0,1
+	j_s	[blink]
diff --git a/gcc-4.9/libgcc/config/arc/gmon/gmon.c b/gcc-4.9/libgcc/config/arc/gmon/gmon.c
new file mode 100644
index 000000000..3fd608352
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/gmon.c
@@ -0,0 +1,450 @@
+/*-
+ * Copyright (c) 1983, 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ * Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#if 0
+#include <sys/param.h>
+#include <sys/time.h>
+#endif
+#include <sys/gmon.h>
+#include <sys/gmon_out.h>
+
+#include <stddef.h>
+#include <errno.h>
+#include <stdio.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#if 0
+#include <libc-internal.h>
+#include <not-cancel.h>
+
+#ifdef USE_IN_LIBIO
+# include <wchar.h>
+#endif
+#endif
+#define internal_function
+#define weak_alias(fun,aliasid) extern __typeof(fun) aliasid __attribute__ ((weak, alias (#fun)));
+#define __libc_enable_secure 0
+
+/*  Head of basic-block list or NULL. */
+struct __bb *__bb_head attribute_hidden;
+
+struct gmonparam _gmonparam attribute_hidden = { GMON_PROF_OFF };
+
+/*
+ * See profil(2) where this is described:
+ */
+static int	s_scale;
+#define		SCALE_1_TO_1	0x10000L
+
+#define ERR(s) write (STDERR_FILENO, s, sizeof (s) - 1)
+
+void moncontrol (int mode);
+void __moncontrol (int mode);
+static void write_hist (int fd) internal_function;
+static void write_call_graph (int fd) internal_function;
+static void write_bb_counts (int fd) internal_function;
+
+/*
+ * Control profiling
+ *	profiling is what mcount checks to see if
+ *	all the data structures are ready.
+ */
+void
+__moncontrol (int mode)
+{
+  struct gmonparam *p = &_gmonparam;
+
+  /* Don't change the state if we ran into an error.  */
+  if (p->state == GMON_PROF_ERROR)
+    return;
+
+  if (mode)
+    {
+      /* start */
+      __profil((void *) p->kcount, p->kcountsize, p->lowpc, s_scale);
+      p->state = GMON_PROF_ON;
+    }
+  else
+    {
+      /* stop */
+      __profil(NULL, 0, 0, 0);
+      p->state = GMON_PROF_OFF;
+    }
+}
+weak_alias (__moncontrol, moncontrol)
+
+
+void
+__monstartup (u_long lowpc, u_long highpc)
+{
+  register int o;
+  char *cp;
+  struct gmonparam *p = &_gmonparam;
+  int linesz;
+
+  /*
+   * round lowpc and highpc to multiples of the density we're using
+   * so the rest of the scaling (here and in gprof) stays in ints.
+   */
+  p->lowpc = ROUNDDOWN(lowpc, HISTFRACTION * sizeof(HISTCOUNTER));
+  if (sizeof *p->froms % sizeof(HISTCOUNTER) != 0)
+    {
+      p->highpc = ROUNDUP(highpc, HISTFRACTION * sizeof(HISTCOUNTER));
+      p->textsize = p->highpc - p->lowpc;
+      p->kcountsize = ROUNDUP((p->textsize + HISTFRACTION - 1) / HISTFRACTION,
+			      sizeof (*p->froms));
+    }
+  else
+    {
+      /* Avoid odd scales by rounding up highpc to get kcountsize rounded.  */
+      p->textsize = ROUNDUP (highpc - p->lowpc,
+			     HISTFRACTION * sizeof (*p->froms));
+      p->highpc = p->lowpc + p->textsize;
+      p->kcountsize = p->textsize / HISTFRACTION;
+    }
+  p->hashfraction = HASHFRACTION;
+  p->log_hashfraction = -1;
+  /* The following test must be kept in sync with the corresponding
+     test in mcount.c.  */
+  if ((HASHFRACTION & (HASHFRACTION - 1)) == 0) {
+      /* if HASHFRACTION is a power of two, mcount can use shifting
+	 instead of integer division.  Precompute shift amount. */
+      p->log_hashfraction = ffs(p->hashfraction * sizeof(*p->froms)) - 1;
+  }
+  p->tolimit = p->textsize * ARCDENSITY / 100;
+  if (p->tolimit < MINARCS)
+    p->tolimit = MINARCS;
+  else if (p->tolimit > MAXARCS)
+    p->tolimit = MAXARCS;
+  p->tossize = p->tolimit * sizeof(struct tostruct);
+
+  /* p->kcount must not share cache lines with the adjacent data, because
+     we use uncached accesses while profiling.  */
+  linesz = __dcache_linesz ();
+  cp = calloc (ROUNDUP (p->kcountsize, linesz) + p->tossize
+	       + (linesz - 1), 1);
+  if (! cp)
+    {
+      ERR("monstartup: out of memory\n");
+      p->tos = NULL;
+      p->state = GMON_PROF_ERROR;
+      /* In case we loose the error state due to a race,
+	 prevent invalid writes also by clearing tolimit.  */
+      p->tolimit = 0;
+      return;
+    }
+  p->tos = (struct tostruct *)cp;
+  cp += p->tossize;
+  cp = (char *) ROUNDUP ((ptrdiff_t) cp, linesz);
+  p->kcount = (HISTCOUNTER *)cp;
+  cp += ROUNDUP (p->kcountsize, linesz);
+
+  p->tos[0].link = 0;
+
+  o = p->highpc - p->lowpc;
+  if (p->kcountsize < (u_long) o)
+    {
+#ifndef hp300
+      s_scale = ((float)p->kcountsize / o ) * SCALE_1_TO_1;
+#else
+      /* avoid floating point operations */
+      int quot = o / p->kcountsize;
+
+      if (quot >= 0x10000)
+	s_scale = 1;
+      else if (quot >= 0x100)
+	s_scale = 0x10000 / quot;
+      else if (o >= 0x800000)
+	s_scale = 0x1000000 / (o / (p->kcountsize >> 8));
+      else
+	s_scale = 0x1000000 / ((o << 8) / p->kcountsize);
+#endif
+    } else
+      s_scale = SCALE_1_TO_1;
+
+  __moncontrol(1);
+}
+weak_alias (__monstartup, monstartup)
+
+
+static void
+internal_function
+write_hist (int fd)
+{
+  u_char tag = GMON_TAG_TIME_HIST;
+  struct arc_gmon_hist_hdr thdr __attribute__ ((aligned (__alignof__ (char *))));
+  int r;
+
+  if (_gmonparam.kcountsize > 0)
+    {
+      *(char **) thdr.low_pc = (char *) _gmonparam.lowpc;
+      *(char **) thdr.high_pc = (char *) _gmonparam.highpc;
+      *(int32_t *) thdr.hist_size = (_gmonparam.kcountsize
+				     / sizeof (HISTCOUNTER));
+      *(int32_t *) thdr.prof_rate = __profile_frequency ();
+      strncpy (thdr.dimen, "seconds", sizeof (thdr.dimen));
+      thdr.dimen_abbrev = 's';
+
+      r = write (fd, &tag, sizeof tag);
+      if (r != sizeof tag)
+	return;
+      r = write (fd, &thdr, sizeof thdr);
+      if (r != sizeof thdr)
+	return;
+      r = write (fd,_gmonparam.kcount, _gmonparam.kcountsize);
+      if ((unsigned) r != _gmonparam.kcountsize)
+	return;
+    }
+}
+
+
+static void
+internal_function
+write_call_graph (int fd)
+{
+#define NARCS_PER_WRITE	64
+#define BYTES_PER_ARC (1 + sizeof (struct gmon_cg_arc_record))
+#define BYTES_PER_WRITE (BYTES_PER_ARC * NARCS_PER_WRITE)
+  ARCINDEX to_index;
+  u_long frompc, selfpc, count;
+  char buffer[BYTES_PER_WRITE], *p;
+  u_long *prof_desc = __arc_profile_desc_secstart;
+  u_long *prof_count = __arc_profile_counters_secstart;
+  u_long *prof_desc_end = __arc_profile_desc_secend;
+  u_long *prof_forward = __arc_profile_forward_secstart;
+
+  for (p = buffer; p < buffer + BYTES_PER_WRITE; p += BYTES_PER_ARC)
+    *p = GMON_TAG_CG_ARC;
+  p = buffer;
+  frompc = *prof_desc++ & -2;
+  while (prof_desc < prof_desc_end)
+    {
+      selfpc = *prof_desc++;
+      if (selfpc & 1)
+	{
+	  frompc = selfpc & -2;
+	  selfpc = *prof_desc++;
+	}
+      count = *prof_count++;
+      if (selfpc)
+	{
+	  struct arc
+	    {
+	      char *frompc;
+	      char *selfpc;
+	      int32_t count;
+	    }
+	  arc;
+
+	  if (!count)
+	    continue;
+	  arc.frompc = (char *) frompc;
+	  arc.selfpc = (char *) selfpc;
+	  arc.count  = count;
+	  memcpy (p + 1, &arc, sizeof arc);
+	  p += 1 + sizeof arc;
+
+	  if (p == buffer + BYTES_PER_WRITE)
+	    {
+	      write (fd, buffer, BYTES_PER_WRITE);
+	      p = buffer;
+	    }
+	}
+      else
+	{
+	  for (to_index = count;
+	       to_index != 0;
+	       to_index = _gmonparam.tos[to_index].link)
+	    {
+	      struct arc
+		{
+		  char *frompc;
+		  char *selfpc;
+		  int32_t count;
+		}
+	      arc;
+
+	      arc.frompc = (char *) frompc;
+	      arc.selfpc = (char *) _gmonparam.tos[to_index].selfpc;
+	      arc.count  = _gmonparam.tos[to_index].count;
+	      memcpy (p + 1, &arc, sizeof arc);
+	      p += 1 + sizeof arc;
+
+	      if (p == buffer + BYTES_PER_WRITE)
+		{
+		  write (fd, buffer, BYTES_PER_WRITE);
+		  p = buffer;
+		}
+	    }
+	}
+    }
+  while (prof_forward < __arc_profile_forward_secend)
+    {
+      /* ??? The 'call count' is actually supposed to be a fixed point
+	 factor, with 16 bits each before and after the point.
+	 It would be much nicer if we figured out the actual number
+	 of calls to the caller, and multiplied that with the fixed point
+	 factor to arrive at the estimated calls for the callee.  */
+      memcpy (p + 1, prof_forward, 3 * sizeof *prof_forward);
+      prof_forward += 3;
+      p += 1 + 3 * sizeof *prof_forward;
+      if (p == buffer + BYTES_PER_WRITE)
+	{
+	  write (fd, buffer, BYTES_PER_WRITE);
+	  p = buffer;
+	}
+    }
+  if (p != buffer)
+    write (fd, buffer, p - buffer);
+}
+
+
+static void
+internal_function
+write_bb_counts (int fd)
+{
+  struct __bb *grp;
+  u_char tag = GMON_TAG_BB_COUNT;
+  size_t ncounts;
+  size_t i;
+
+  struct { unsigned long address; long count; } bbbody[8];
+  size_t nfilled;
+
+  /* Write each group of basic-block info (all basic-blocks in a
+     compilation unit form a single group). */
+
+  for (grp = __bb_head; grp; grp = grp->next)
+    {
+      ncounts = grp->ncounts;
+      write (fd, &tag, 1);
+      write (fd, &ncounts, sizeof ncounts);
+      for (nfilled = i = 0; i < ncounts; ++i)
+	{
+	  if (nfilled == sizeof (bbbody) / sizeof (bbbody[0]))
+	    {
+	      write (fd, bbbody, sizeof bbbody);
+	      nfilled = 0;
+	    }
+
+	  bbbody[nfilled].address = grp->addresses[i];
+	  bbbody[nfilled++].count = grp->counts[i];
+	}
+      if (nfilled > 0)
+	write (fd, bbbody, nfilled * sizeof bbbody[0]);
+    }
+}
+
+
+static void
+write_gmon (void)
+{
+    struct gmon_hdr ghdr __attribute__ ((aligned (__alignof__ (int))));
+    int fd = -1;
+    char *env;
+
+#ifndef O_NOFOLLOW
+# define O_NOFOLLOW	0
+#endif
+
+    env = getenv ("GMON_OUT_PREFIX");
+    if (env != NULL && !__libc_enable_secure)
+      {
+	size_t len = strlen (env);
+	char buf[len + 20];
+	snprintf (buf, sizeof (buf), "%s.%u", env, getpid ());
+	fd = open (buf, O_CREAT|O_TRUNC|O_WRONLY|O_NOFOLLOW, 0666);
+      }
+
+    if (fd == -1)
+      {
+	fd = open ("gmon.out", O_CREAT|O_TRUNC|O_WRONLY|O_NOFOLLOW,
+			      0666);
+	if (fd < 0)
+	  {
+	    perror ("_mcleanup: gmon.out");
+	    return;
+	  }
+      }
+
+    /* write gmon.out header: */
+    memset (&ghdr, '\0', sizeof (struct gmon_hdr));
+    memcpy (&ghdr.cookie[0], GMON_MAGIC, sizeof (ghdr.cookie));
+    *(int32_t *) ghdr.version = GMON_VERSION;
+    write (fd, &ghdr, sizeof (struct gmon_hdr));
+
+    /* write PC histogram: */
+    write_hist (fd);
+
+    /* write call-graph: */
+    write_call_graph (fd);
+
+    /* write basic-block execution counts: */
+    write_bb_counts (fd);
+
+    close (fd);
+}
+
+
+void
+__write_profiling (void)
+{
+  int save = _gmonparam.state;
+  _gmonparam.state = GMON_PROF_OFF;
+  if (save == GMON_PROF_ON)
+    write_gmon ();
+  _gmonparam.state = save;
+}
+#ifndef SHARED
+/* This symbol isn't used anywhere in the DSO and it is not exported.
+   This would normally mean it should be removed to get the same API
+   in static libraries.  But since profiling is special in static libs
+   anyway we keep it.  But not when building the DSO since some
+   quality assurance tests will otherwise trigger.  */
+weak_alias (__write_profiling, write_profiling)
+#endif
+
+
+void
+_mcleanup (void)
+{
+  __moncontrol (0);
+
+  if (_gmonparam.state != GMON_PROF_ERROR)
+    write_gmon ();
+
+  /* free the memory. */
+  if (_gmonparam.tos != NULL)
+    free (_gmonparam.tos);
+}
diff --git a/gcc-4.9/libgcc/config/arc/gmon/machine-gmon.h b/gcc-4.9/libgcc/config/arc/gmon/machine-gmon.h
new file mode 100644
index 000000000..2199d5abb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/machine-gmon.h
@@ -0,0 +1,65 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef MACHINE_GMON_H
+#define MACHINE_GMON_H
+
+/* We can't fake out own <sys/types.h> header because the newlib / uclibc
+   headers in GCC_FOR_TARGET take precedence.  */
+
+#define __BEGIN_DECLS
+#define __END_DECLS
+
+#define __THROW
+
+extern int __dcache_linesz (void);
+
+#define _MCOUNT_DECL(countp, selfpc) \
+  static inline void _mcount_internal (void *countp, u_long selfpc)
+
+extern void _mcount (void);
+extern void _mcount_call (void);
+
+/* N.B.: the calling point might be a sibcall, thus blink does not necessarily
+  hold the caller's address.  r8 doesn't hold the caller's address, either,
+  but rather a pointer to the counter data structure associated with the
+  caller.
+  This function must be compiled with optimization turned on in order to
+  enable a sibcall for the final call to selfpc; this is important when trying
+  to profile a program with deep tail-recursion that would get a stack
+  overflow otherwise.  */
+#define MCOUNT \
+void \
+_mcount_call (void) \
+{ \
+  register void *countp __asm("r8"); \
+  register u_long selfpc __asm("r9"); \
+  _mcount_internal (countp, selfpc); \
+  ((void (*)(void)) selfpc) (); \
+}
+
+extern int __profil (u_short *,size_t, size_t, u_int);
+
+#endif /* MACHINE_GMON_H */
diff --git a/gcc-4.9/libgcc/config/arc/gmon/mcount.c b/gcc-4.9/libgcc/config/arc/gmon/mcount.c
new file mode 100644
index 000000000..ebd71e00d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/mcount.c
@@ -0,0 +1,206 @@
+/*-
+ * Copyright (c) 1983, 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#if !defined(lint) && !defined(KERNEL) && defined(LIBC_SCCS)
+static char sccsid[] = "@(#)mcount.c	8.1 (Berkeley) 6/4/93";
+#endif
+
+#if 0
+#include <unistd.h>
+#include <sys/param.h>
+#endif
+#include <sys/gmon.h>
+
+/* This file provides the machine-dependent definitions of the _MCOUNT_DECL
+   and MCOUNT macros.  */
+#include <machine-gmon.h>
+
+#include <atomic.h>
+
+/*
+ * mcount is called on entry to each function compiled with the profiling
+ * switch set.  _mcount(), which is declared in a machine-dependent way
+ * with _MCOUNT_DECL, does the actual work and is either inlined into a
+ * C routine or called by an assembly stub.  In any case, this magic is
+ * taken care of by the MCOUNT definition in <machine/profile.h>.
+ *
+ * _mcount updates data structures that represent traversals of the
+ * program's call graph edges.  frompc and selfpc are the return
+ * address and function address that represents the given call graph edge.
+ *
+ * Note: the original BSD code used the same variable (frompcindex) for
+ * both frompcindex and frompc.  Any reasonable, modern compiler will
+ * perform this optimization.
+ */
+_MCOUNT_DECL(count_ptr, selfpc)	/* _mcount; may be static, inline, etc */
+{
+	register ARCINDEX *frompcindex;
+	register struct tostruct *top, *prevtop;
+	register struct gmonparam *p;
+	register ARCINDEX toindex;
+
+	/* Check for nested function trampoline.  */
+	if (selfpc & 2)
+	  selfpc = *(u_long *) (selfpc + 10);
+
+	p = &_gmonparam;
+	/*
+	 * check that we are profiling
+	 * and that we aren't recursively invoked.
+	 */
+#if 0
+	if (catomic_compare_and_exchange_bool_acq (&p->state, GMON_PROF_BUSY,
+						   GMON_PROF_ON))
+	  return;
+#elif defined (__ARC700__)
+/* ??? This could temporarily lose the ERROR / OFF condition in a race,
+   but doing an actual compare_and_exchange would be too costly.  It would
+   be better if we had a semaphore independent of the 'sticky' state, but
+   then we could run into ABI compatibility problems with the size of struct
+   gmonparam.  */
+	{
+	  u_long old_state;
+
+	  __asm ("ex %0,%1": "=r" (old_state), "+m" (p->state)
+		 : "0" (GMON_PROF_BUSY));
+	  if (old_state != GMON_PROF_ON)
+	    {
+	      switch (old_state)
+		{
+		case GMON_PROF_OFF:
+		  __asm ("ex %0,%1": "+r" (old_state), "+m" (p->state));
+		  if (old_state == GMON_PROF_BUSY
+		      /* Switching off while we say we are busy while profiling
+			 was actually already switched off is all right.  */
+		      || old_state == GMON_PROF_OFF)
+		    break;
+		  /* It is not clear if we should allow switching on
+		     profiling at this point, and how to handle further races.
+		     For now, record an error in this case.  */
+		  /* Fall through.  */
+		default: /* We expect here only GMON_PROF_ERROR.  */
+		  p->state = GMON_PROF_ERROR;
+		  break;
+		case GMON_PROF_BUSY: break;
+		}
+	      return;
+	    }
+	}
+#else /* ??? No semaphore primitives available.  */
+	if (p->state != GMON_PROF_ON)
+	  return;
+	p->state = GMON_PROF_BUSY;
+#endif
+
+	frompcindex = count_ptr;
+	toindex = *frompcindex;
+	if (toindex == 0) {
+		/*
+		 *	first time traversing this arc
+		 */
+		toindex = ++p->tos[0].link;
+		if (toindex >= (ARCINDEX) p->tolimit)
+			/* halt further profiling */
+			goto overflow;
+
+		*frompcindex = toindex;
+		top = &p->tos[toindex];
+		top->selfpc = selfpc;
+		top->count = 1;
+		top->link = 0;
+		goto done;
+	}
+	top = &p->tos[toindex];
+	if (top->selfpc == selfpc) {
+		/*
+		 * arc at front of chain; usual case.
+		 */
+		top->count++;
+		goto done;
+	}
+	/*
+	 * have to go looking down chain for it.
+	 * top points to what we are looking at,
+	 * prevtop points to previous top.
+	 * we know it is not at the head of the chain.
+	 */
+	for (; /* goto done */; ) {
+		if (top->link == 0) {
+			/*
+			 * top is end of the chain and none of the chain
+			 * had top->selfpc == selfpc.
+			 * so we allocate a new tostruct
+			 * and link it to the head of the chain.
+			 */
+			toindex = ++p->tos[0].link;
+			if (toindex >= (ARCINDEX) p->tolimit)
+				goto overflow;
+
+			top = &p->tos[toindex];
+			top->selfpc = selfpc;
+			top->count = 1;
+			top->link = *frompcindex;
+			*frompcindex = toindex;
+			goto done;
+		}
+		/*
+		 * otherwise, check the next arc on the chain.
+		 */
+		prevtop = top;
+		top = &p->tos[top->link];
+		if (top->selfpc == selfpc) {
+			/*
+			 * there it is.
+			 * increment its count
+			 * move it to the head of the chain.
+			 */
+			top->count++;
+			toindex = prevtop->link;
+			prevtop->link = top->link;
+			top->link = *frompcindex;
+			*frompcindex = toindex;
+			goto done;
+		}
+
+	}
+done:
+	p->state = GMON_PROF_ON;
+	return;
+overflow:
+	p->state = GMON_PROF_ERROR;
+	return;
+}
+
+/*
+ * Actual definition of mcount function.  Defined in <machine/profile.h>,
+ * which is included by <sys/gmon.h>.
+ */
+MCOUNT
diff --git a/gcc-4.9/libgcc/config/arc/gmon/prof-freq-stub.S b/gcc-4.9/libgcc/config/arc/gmon/prof-freq-stub.S
new file mode 100644
index 000000000..4a48c5202
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/prof-freq-stub.S
@@ -0,0 +1,40 @@
+/* This file contains code to do profiling.
+
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../asm.h"
+/*  This file contains code to do profiling.  */
+	.weak	__profile_frequency_value
+	.global __profile_frequency_value
+	.set	__profile_frequency_value, 1000
+	.text
+	.balign	4
+	.global __profile_frequency
+	FUNC(__profile_frequency)
+__profile_frequency:
+	mov_s	r0,__profile_frequency_value
+	j_s	[blink]
+	ENDFUNC(__profile_frequency)
diff --git a/gcc-4.9/libgcc/config/arc/gmon/prof-freq.c b/gcc-4.9/libgcc/config/arc/gmon/prof-freq.c
new file mode 100644
index 000000000..4ae82d8ac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/prof-freq.c
@@ -0,0 +1,60 @@
+/* Return frequency of ticks reported by profil.  Generic version. */
+/*-
+ * Copyright (c) 1983, 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+
+#include <sys/types.h>
+#include <sys/time.h>
+#if 0
+#include <libc-internal.h>
+#else
+#include "sys/gmon.h"
+#endif
+
+int
+__profile_frequency (void)
+{
+  /*
+   * Discover the tick frequency of the machine if something goes wrong,
+   * we return 0, an impossible hertz.
+   */
+  struct itimerval tim;
+
+  tim.it_interval.tv_sec = 0;
+  tim.it_interval.tv_usec = 1;
+  tim.it_value.tv_sec = 0;
+  tim.it_value.tv_usec = 0;
+  setitimer(ITIMER_REAL, &tim, 0);
+  setitimer(ITIMER_REAL, 0, &tim);
+  if (tim.it_interval.tv_usec < 2)
+    return 0;
+  return (1000000 / tim.it_interval.tv_usec);
+}
diff --git a/gcc-4.9/libgcc/config/arc/gmon/profil.S b/gcc-4.9/libgcc/config/arc/gmon/profil.S
new file mode 100644
index 000000000..b9ca79e6a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/profil.S
@@ -0,0 +1,153 @@
+/* This file contains code to do profiling.
+
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../asm.h"
+#include "auxreg.h"
+/*  This file contains code to do profiling.  */
+	.weak	__profile_timer_cycles
+	.global __profile_timer_cycles
+	.set	__profile_timer_cycles, 200
+
+        .section .bss
+        .global __profil_offset
+        .align 4
+        .type	__profil_offset, @object
+        .size	__profil_offset, 4
+__profil_offset:
+        .zero   4
+
+	.text
+	.global	__dcache_linesz
+	.global __profil
+	FUNC(__profil)
+.Lstop_profiling:
+	sr	r0,[CONTROL0]
+	j_s	[blink]
+	.balign	4
+__profil:
+.Lprofil:
+	breq_s	r0,0,.Lstop_profiling
+	; r0: buf r1: bufsiz r2: offset r3: scale
+	bxor.f	r3,r3,15; scale must be 0x8000, i.e. 1/2; generate 0.
+	push_s	blink
+	lsr_s	r2,r2,1
+	mov_s	r8,r0
+	flag.ne	1	; halt if wrong scale
+	sub_s	r0,r0,r2
+	st	r0,[__profil_offset]
+	bl	__dcache_linesz
+	pop_s	blink
+	bbit1.d	r0,0,nocache
+	mov_s	r0,r8
+#ifdef __ARC700__
+	add_s	r1,r1,31
+	lsr.f	lp_count,r1,5
+	lpne	2f
+	sr	r0,[DC_FLDL]
+	add_s	r0,r0,32
+#else /* !__ARC700__ */
+# FIX ME: set up loop according to cache line size
+	lr	r12,[D_CACHE_BUILD]
+	sub_s	r0,r0,16
+	sub_s	r1,r1,1
+	lsr_s	r12,r12,16
+	asr_s	r1,r1,4
+	bmsk_s	r12,r12,3
+	asr_s	r1,r1,r12
+	add.f	lp_count,r1,1
+	mov_s	r1,16
+	asl_s	r1,r1,r12
+	lpne	2f
+	add	r0,r0,r1
+	sr	r0,[DC_FLDL]
+#endif /* __ARC700__ */
+2:	b_s	.Lcounters_cleared
+nocache:
+.Lcounters_cleared:
+	lr	r1,[INT_VECTOR_BASE] ; disable timer0 interrupts
+	sr	r3,[CONTROL0]
+	sr	r3,[COUNT0]
+0:	ld_s	r0,[pcl,1f-0b+((0b-.Lprofil) & 2)] ; 1f@GOTOFF
+0:	ld_s	r12,[pcl,1f+4-0b+((0b-.Lprofil) & 2)] ; 1f@GOTOFF + 4
+	st_s	r0,[r1,24]; timer0 uses vector3
+	st_s	r12,[r1,24+4]; timer0 uses vector3
+	;sr	10000,[LIMIT0]
+	sr	__profile_timer_cycles,[LIMIT0]
+	mov_s	r12,3	; enable timer interrupts; count only when not halted.
+	sr	r12,[CONTROL0]
+	lr	r12,[STATUS32]
+	bset_s	r12,r12,1 ; allow level 1 interrupts
+	flag	r12
+	mov_s	r0,0
+	j_s	[blink]
+	.balign	4
+1:	j	__profil_irq
+	ENDFUNC(__profil)
+
+	FUNC(__profil_irq)
+	.balign 4	; make final jump unaligned to avoid delay penalty
+	.balign 32,0,12	; make sure the code spans no more that two cache lines
+	nop_s
+__profil_irq:
+	push_s	r0
+	ld	r0,[__profil_offset]
+	push_s	r1
+	lsr	r1,ilink1,2
+	push_s	r2
+	ldw.as.di r2,[r0,r1]
+	add1	r0,r0,r1
+	ld_s	r1,[sp,4]
+	add_s	r2,r2,1
+	bbit1	r2,16,nostore
+	stw.di	r2,[r0]
+nostore:ld.ab	r2,[sp,8]
+	pop_s	r0
+	j.f	[ilink1]
+	ENDFUNC(__profil_irq)
+
+; could save one cycle if the counters were allocated at link time and
+; the contents of __profil_offset were pre-computed at link time, like this:
+#if 0
+; __profil_offset needs to be PROVIDEd as __profile_base-text/4
+	.global	__profil_offset
+	.balign 4
+__profil_irq:
+	push_s	r0
+	lsr	r0,ilink1,2
+	add1	r0,__profil_offset,r0
+	push_s	r1
+	ldw.di	r1,[r0]
+
+
+	add_s	r1,r1,1
+	bbit1	r1,16,nostore
+	stw.di	r1,[r0]
+nostore:pop_s	r1
+	pop_s	r0
+	j	[ilink1]
+#endif /* 0 */
diff --git a/gcc-4.9/libgcc/config/arc/gmon/sys/gmon.h b/gcc-4.9/libgcc/config/arc/gmon/sys/gmon.h
new file mode 100644
index 000000000..33564ba7a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/sys/gmon.h
@@ -0,0 +1,217 @@
+/*-
+ * Copyright (c) 1982, 1986, 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ * Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)gmon.h	8.2 (Berkeley) 1/4/94
+ */
+
+#ifndef	_SYS_GMON_H
+#define	_SYS_GMON_H	1
+
+#if 0
+#include <features.h>
+#include <sys/types.h>
+#else
+#include <sys/types.h>
+#include "machine-gmon.h"
+#define attribute_hidden __attribute__ ((visibility("hidden")))
+#endif
+
+#include <stdint.h>
+
+/*
+ * See gmon_out.h for gmon.out format.
+ */
+
+/* structure emitted by "gcc -a".  This must match struct bb in
+   gcc/libgcc2.c.  It is OK for gcc to declare a longer structure as
+   long as the members below are present.  */
+struct __bb
+{
+  long			zero_word;
+  const char		*filename;
+  long			*counts;
+  long			ncounts;
+  struct __bb		*next;
+  const unsigned long	*addresses;
+};
+
+extern struct __bb *__bb_head;
+
+/*
+ * histogram counters are unsigned shorts (according to the kernel).
+ */
+#define	HISTCOUNTER	unsigned short
+
+/*
+ * fraction of text space to allocate for histogram counters here, 1/2
+ */
+#define	HISTFRACTION	2
+
+/*
+ * Fraction of text space to allocate for from hash buckets.
+ * The value of HASHFRACTION is based on the minimum number of bytes
+ * of separation between two subroutine call points in the object code.
+ * Given MIN_SUBR_SEPARATION bytes of separation the value of
+ * HASHFRACTION is calculated as:
+ *
+ *	HASHFRACTION = MIN_SUBR_SEPARATION / (2 * sizeof(short) - 1);
+ *
+ * For example, on the VAX, the shortest two call sequence is:
+ *
+ *	calls	$0,(r0)
+ *	calls	$0,(r0)
+ *
+ * which is separated by only three bytes, thus HASHFRACTION is
+ * calculated as:
+ *
+ *	HASHFRACTION = 3 / (2 * 2 - 1) = 1
+ *
+ * Note that the division above rounds down, thus if MIN_SUBR_FRACTION
+ * is less than three, this algorithm will not work!
+ *
+ * In practice, however, call instructions are rarely at a minimal
+ * distance.  Hence, we will define HASHFRACTION to be 2 across all
+ * architectures.  This saves a reasonable amount of space for
+ * profiling data structures without (in practice) sacrificing
+ * any granularity.
+ */
+#define	HASHFRACTION	2
+
+/*
+ * Percent of text space to allocate for tostructs.
+ * This is a heuristic; we will fail with a warning when profiling programs
+ * with a very large number of very small functions, but that's
+ * normally OK.
+ * 2 is probably still a good value for normal programs.
+ * Profiling a test case with 64000 small functions will work if
+ * you raise this value to 3 and link statically (which bloats the
+ * text size, thus raising the number of arcs expected by the heuristic).
+ */
+#define ARCDENSITY	3
+
+/*
+ * Always allocate at least this many tostructs.  This
+ * hides the inadequacy of the ARCDENSITY heuristic, at least
+ * for small programs.
+ */
+#define MINARCS		50
+
+/*
+ * The type used to represent indices into gmonparam.tos[].
+ */
+#define	ARCINDEX	u_long
+
+/* 
+ * Maximum number of arcs we want to allow.
+ * Used to be max representable value of ARCINDEX minus 2, but now 
+ * that ARCINDEX is a long, that's too large; we don't really want 
+ * to allow a 48 gigabyte table.
+ * The old value of 1<<16 wasn't high enough in practice for large C++
+ * programs; will 1<<20 be adequate for long?  FIXME
+ */
+#define MAXARCS		(1 << 20)
+
+struct tostruct {
+	u_long		selfpc;
+	long		count;
+	ARCINDEX	link;
+};
+
+/*
+ * a raw arc, with pointers to the calling site and
+ * the called site and a count.
+ */
+struct rawarc {
+	u_long	raw_frompc;
+	u_long	raw_selfpc;
+	long	raw_count;
+};
+
+/*
+ * general rounding functions.
+ */
+#define ROUNDDOWN(x,y)	(((x)/(y))*(y))
+#define ROUNDUP(x,y)	((((x)+(y)-1)/(y))*(y))
+
+/*
+ * The profiling data structures are housed in this structure.
+ */
+struct gmonparam {
+	long int	state;
+	u_short		*kcount;
+	u_long		kcountsize;
+	ARCINDEX	*froms;
+	u_long		fromssize;
+	struct tostruct	*tos;
+	u_long		tossize;
+	long		tolimit;
+	u_long		lowpc;
+	u_long		highpc;
+	u_long		textsize;
+	u_long		hashfraction;
+	long		log_hashfraction;
+};
+extern struct gmonparam _gmonparam;
+
+/*
+ * Possible states of profiling.
+ */
+#define	GMON_PROF_ON	0
+#define	GMON_PROF_BUSY	1
+#define	GMON_PROF_ERROR	2
+#define	GMON_PROF_OFF	3
+
+/*
+ * Sysctl definitions for extracting profiling information from the kernel.
+ */
+#define	GPROF_STATE	0	/* int: profiling enabling variable */
+#define	GPROF_COUNT	1	/* struct: profile tick count buffer */
+#define	GPROF_FROMS	2	/* struct: from location hash bucket */
+#define	GPROF_TOS	3	/* struct: destination/count structure */
+#define	GPROF_GMONPARAM	4	/* struct: profiling parameters (see above) */
+
+__BEGIN_DECLS
+
+/* Set up data structures and start profiling.  */
+extern void __monstartup (u_long __lowpc, u_long __highpc) __THROW;
+extern void monstartup (u_long __lowpc, u_long __highpc) __THROW;
+
+/* Clean up profiling and write out gmon.out.  */
+extern void _mcleanup (void) __THROW;
+
+extern void __write_profiling (void);
+extern int attribute_hidden __profile_frequency (void);
+
+extern u_long __arc_profile_desc_secstart[], __arc_profile_desc_secend[];
+extern u_long __arc_profile_forward_secstart[], __arc_profile_forward_secend[];
+extern u_long __arc_profile_counters_secstart[];
+
+__END_DECLS
+
+#endif /* sys/gmon.h */
diff --git a/gcc-4.9/libgcc/config/arc/gmon/sys/gmon_out.h b/gcc-4.9/libgcc/config/arc/gmon/sys/gmon_out.h
new file mode 100644
index 000000000..13feb006a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/gmon/sys/gmon_out.h
@@ -0,0 +1,55 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define GMON_TAG_TIME_HIST 0
+#define GMON_TAG_CG_ARC 1
+#define GMON_TAG_BB_COUNT 2
+
+#define GMON_MAGIC "gmon"
+#define GMON_VERSION 1
+
+struct arc_gmon_hist_hdr
+{
+  char low_pc[4];
+  char high_pc[4];
+  char hist_size[4];
+  char prof_rate[4];
+  char dimen[15];
+  char dimen_abbrev;
+};
+
+struct gmon_cg_arc_record
+{
+  char afrompc[4];
+  char selfpc[4];
+  char count[4];
+};
+
+struct gmon_hdr
+{
+  char cookie[4];
+  char version[4];
+  char c[12];
+};
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/adddf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/adddf3.S
new file mode 100644
index 000000000..80b6455ac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/adddf3.S
@@ -0,0 +1,524 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+#if 0 /* DEBUG */
+	.global __adddf3
+	.balign 4
+__adddf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __adddf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __adddf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	bl abort
+	.global __subdf3
+	.balign 4
+__subdf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __subdf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __subdf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	bl abort
+#define __adddf3 __adddf3_asm
+#define __subdf3 __subdf3_asm
+#endif /* DEBUG */
+/* N.B. This is optimized for ARC700.
+  ARC600 has very different scheduling / instruction selection criteria.  */
+
+/* inputs: DBL0, DBL1 (r0-r3)
+   output: DBL0 (r0, r1)
+   clobber: r2-r10, r12, flags
+   All NaN highword bits must be 1.  NaN low word is random.  */
+
+	.balign 4
+	.global __adddf3
+	.global __subdf3
+	.long 0x7ff00000 ; exponent mask
+	FUNC(__adddf3)
+	FUNC(__subdf3)
+__subdf3:
+	bxor_l DBL1H,DBL1H,31
+__adddf3:
+	ld r9,[pcl,-8]
+	bmsk r4,DBL0H,30
+	xor r10,DBL0H,DBL1H
+	and r6,DBL1H,r9
+	sub.f r12,r4,r6
+	asr_s r12,r12,20
+	blo .Ldbl1_gt
+	brhs r4,r9,.Linf_nan
+	brhs r12,32,.Large_shift
+	brne r12,0,.Lsmall_shift
+	brge r10,0,.Ladd_same_exp ; r12 == 0
+
+/* After subtracting, we need to normalize; when shifting to place the
+  leading 1 into position for the implicit 1 and adding that to DBL0H,
+  we increment the exponent.  Thus, we have to subtract one more than
+  the shift count from the exponent beforehand.  Iff the exponent drops thus
+  below zero (before adding in the fraction with the leading one), we have
+  generated a denormal number.  Denormal handling is basicallly reducing the
+  shift count so that we produce a zero exponent instead; however, this way
+  the shift count can become zero (if we started out with exponent 1).
+  Therefore, a simple min operation is not good enough, since we don't
+  want to handle a zero normalizing shift in the main path.
+  On the plus side, we don't need to check for denorm input, the result
+  of subtracing these looks just the same as denormals generated during
+  subtraction.  */
+	bmsk r7,DBL1H,30
+	cmp r4,r7
+	cmp.eq DBL0L,DBL1L
+	blo .L_rsub_same_exp
+	sub.f DBL0L,DBL0L,DBL1L
+	bmsk r12,DBL0H,19
+	bic DBL1H,DBL0H,r12
+	sbc.f r4,r4,r7
+	beq_l .Large_cancel
+	norm DBL1L,r4
+	b.d .Lsub_done_same_exp
+	sub r12,DBL1L,9
+
+	.balign 4
+.Linf_nan:
+	; If both inputs are inf, but with different signs, the result is NaN.
+	asr r12,r10,31
+	or_s DBL1H,DBL1H,r12
+	j_s.d [blink]
+	or.eq DBL0H,DBL0H,DBL1H
+
+	.balign 4
+.L_rsub_same_exp:
+	rsub.f DBL0L,DBL0L,DBL1L
+	bmsk r12,DBL1H,19
+	bic_s DBL1H,DBL1H,r12
+	sbc.f r4,r7,r4
+	beq_l .Large_cancel
+	norm DBL1L,r4
+
+	sub r12,DBL1L,9
+.Lsub_done_same_exp:
+	asl_s r12,r12,20
+	sub_s DBL1L,DBL1L,10
+	sub DBL0H,DBL1H,r12
+	xor.f 0,DBL0H,DBL1H
+	bmi .Ldenorm
+.Lpast_denorm:
+	neg_s r12,DBL1L
+	lsr r7,DBL0L,r12
+	asl r12,r4,DBL1L
+	asl_s DBL0L,DBL0L,DBL1L
+	add_s r12,r12,r7
+	j_s.d [blink]
+	add_l DBL0H,DBL0H,r12
+	.balign 4
+.Ladd_same_exp:
+	/* This is a special case because we can't test for need to shift
+	   down by checking if bit 20 of DBL0H changes.  OTOH, here we know
+	   that we always need to shift down.  */
+	; The implicit 1 of DBL0 is not shifted together with the
+	;  fraction, thus effectively doubled, compensating for not setting
+	;  implicit1 for DBL1
+	add_s r12,DBL0L,DBL1L
+	lsr.f 0,r12,2 ; round to even
+	breq r6,0,.Ldenorm_add
+	adc.f DBL0L,DBL0L,DBL1L
+	sub r7,DBL1H,DBL0H
+	sub1 r7,r7,r9 ; boost exponent by 2/2
+	rrc DBL0L,DBL0L
+	asr.f r7,r7 ; DBL1.fraction/2 - DBL0.fraction/2 ; exp++
+	add.cs.f DBL0L,DBL0L,0x80000000
+	add_l DBL0H,DBL0H,r7 ; DBL0.implicit1 not shifted for DBL1.implicit1
+	add.cs DBL0H,DBL0H,1
+	bic.f 0,r9,DBL0H ; check for overflow -> infinity.
+	jne_l [blink]
+	and DBL0H,DBL0H,0xfff00000
+	j_s.d [blink]
+	mov_s DBL0L,0
+	.balign 4
+.Large_shift:
+	brhs r12,55,.Lret_dbl0
+	bmsk_s DBL1H,DBL1H,19
+	brne r6,0,.Lno_denorm_large_shift
+	brhi.d r12,33,.Lfixed_denorm_large_shift
+	sub_s r12,r12,1
+	breq r12,31, .Lfixed_denorm_small_shift
+.Lshift32:
+	mov_s r12,DBL1L
+	mov_s DBL1L,DBL1H
+	brlt.d r10,0,.Lsub
+	mov_s DBL1H,0
+	b_s .Ladd
+.Ldenorm_add:
+	cmp_s r12,DBL1L
+	mov_s DBL0L,r12
+	j_s.d [blink]
+	adc DBL0H,r4,DBL1H
+
+.Lret_dbl0:
+	j_s [blink]
+	.balign 4
+.Lsmall_shift:
+	breq.d r6,0,.Ldenorm_small_shift
+	bmsk_s DBL1H,DBL1H,19
+	bset_s DBL1H,DBL1H,20
+.Lfixed_denorm_small_shift:
+	neg r8,r12
+	asl r4,DBL1H,r8
+	lsr_l DBL1H,DBL1H,r12
+	lsr r5,DBL1L,r12
+	asl r12,DBL1L,r8
+	brge.d r10,0,.Ladd
+	or DBL1L,r4,r5
+/* subtract, abs(DBL0) > abs(DBL1) */
+/* DBL0H, DBL0L: original values
+   DBL1H, DBL1L: fraction with explicit leading 1, shifted into place
+   r4:  orig. DBL0H & 0x7fffffff
+   r6:  orig. DBL1H & 0x7ff00000
+   r9:  0x7ff00000
+   r10: orig. DBL0H ^ DBL1H
+   r12: guard bits */
+	.balign 4
+.Lsub:
+	neg.f r12,r12
+	mov_s r7,DBL1H
+	bmsk r5,DBL0H,19
+	sbc.f DBL0L,DBL0L,DBL1L
+	bic DBL1H,DBL0H,r5
+	bset r5,r5,20
+	sbc.f r4,r5,r7
+	beq_l .Large_cancel_sub
+	norm DBL1L,r4
+	bmsk r6,DBL1H,30
+.Lsub_done:
+	sub_s DBL1L,DBL1L,9
+	breq DBL1L,1,.Lsub_done_noshift
+	asl r5,DBL1L,20
+	sub_s DBL1L,DBL1L,1
+	brlo r6,r5,.Ldenorm_sub
+	sub DBL0H,DBL1H,r5
+.Lpast_denorm_sub:
+	neg_s DBL1H,DBL1L
+	lsr r6,r12,DBL1H
+	asl_s r12,r12,DBL1L
+	and r8,r6,1
+	add1.f 0,r8,r12
+	add.ne.f r12,r12,r12
+	asl r8,DBL0L,DBL1L
+	lsr r12,DBL0L,DBL1H
+	adc.f DBL0L,r8,r6
+	asl r5,r4,DBL1L
+	add_s DBL0H,DBL0H,r12
+	j_s.d [blink]
+	adc DBL0H,DBL0H,r5
+
+	.balign 4
+.Lno_denorm_large_shift:
+	breq.d r12,32,.Lshift32
+	bset_l DBL1H,DBL1H,20
+.Lfixed_denorm_large_shift:
+	neg r8,r12
+	asl r4,DBL1H,r8
+	lsr r5,DBL1L,r12
+	asl.f 0,DBL1L,r8
+	lsr DBL1L,DBL1H,r12
+	or r12,r4,r5
+	tst.eq r12,1
+	or.ne r12,r12,2
+	brlt.d r10,0,.Lsub
+	mov_s DBL1H,0
+	b_l .Ladd
+
+	; If a denorm is produced without shifting, we have an exact result -
+	; no need for rounding.
+	.balign 4
+.Ldenorm_sub:
+	lsr DBL1L,r6,20
+	xor DBL0H,r6,DBL1H
+	brne.d DBL1L,1,.Lpast_denorm_sub
+	sub_s DBL1L,DBL1L,1
+.Lsub_done_noshift:
+	add.f 0,r12,r12
+	btst.eq DBL0L,0
+	cmp.eq r12,r12
+	add.cs.f DBL0L,DBL0L,1
+	bclr r4,r4,20
+	j_s.d [blink]
+	adc DBL0H,DBL1H,r4
+
+	.balign 4
+.Ldenorm_small_shift:
+	brne.d r12,1,.Lfixed_denorm_small_shift
+	sub_l r12,r12,1
+	brlt r10,0,.Lsub
+.Ladd: ; bit 20 of DBL1H is clear and bit 0 of r12 does not matter
+	add.f DBL0L,DBL0L,DBL1L
+	add_s DBL1H,DBL1H,DBL0H
+	add.cs DBL1H,DBL1H,1
+	xor_l DBL0H,DBL0H,DBL1H
+	bbit0 DBL0H,20,.Lno_shiftdown
+	lsr.f DBL0H,DBL1H
+	and r4,DBL0L,2
+	bmsk DBL0H,DBL0H,18
+	sbc DBL0H,DBL1H,DBL0H
+	rrc.f DBL0L,DBL0L
+	or.f r12,r12,r4
+	cmp.eq r12,r12
+	add.cs.f DBL0L,DBL0L,1
+	bic.f 0,r9,DBL0H ; check for generating infinity with possible ...
+	jne.d [blink]    ; ... non-zero fraction
+	add.cs DBL0H,DBL0H,1
+	mov_s DBL0L,0
+	bmsk DBL1H,DBL0H,19
+	j_s.d [blink]
+	bic_s DBL0H,DBL0H,DBL1H
+.Lno_shiftdown:
+	mov_s DBL0H,DBL1H
+	add.f 0,r12,r12
+	btst.eq DBL0L,0
+	cmp.eq r12,r12
+	add.cs.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.cs DBL0H,DBL0H,1
+	.balign 4
+.Ldenorm:
+	bmsk DBL0H,DBL1H,30
+	lsr r12,DBL0H,20
+	xor_s DBL0H,DBL0H,DBL1H
+	sub_l DBL1L,r12,1
+	bgt .Lpast_denorm
+	j_s.d [blink]
+	add_l DBL0H,DBL0H,r4
+
+	.balign 4
+.Large_cancel:
+	;DBL0L: mantissa DBL1H: sign & exponent
+	norm.f DBL1L,DBL0L
+	bmsk DBL0H,DBL1H,30
+	add_s DBL1L,DBL1L,22
+	mov.mi DBL1L,21
+	add_s r12,DBL1L,1
+	asl_s r12,r12,20
+	beq_s .Lret0
+	brhs.d DBL0H,r12,.Lpast_denorm_large_cancel
+	sub DBL0H,DBL1H,r12
+	bmsk DBL0H,DBL1H,30
+	lsr r12,DBL0H,20
+	xor_s DBL0H,DBL0H,DBL1H
+	sub.f DBL1L,r12,1
+	jle [blink]
+.Lpast_denorm_large_cancel:
+	rsub.f r7,DBL1L,32
+	lsr r7,DBL0L,r7
+	asl_s DBL0L,DBL0L,DBL1L
+	mov.ls r7,DBL0L
+	add_s DBL0H,DBL0H,r7
+	j_s.d [blink]
+	mov.ls DBL0L,0
+.Lret0:
+	j_s.d	[blink]
+	mov_l	DBL0H,0
+
+/* r4:DBL0L:r12 : unnormalized result fraction
+   DBL1H: result sign and exponent         */
+/* When seeing large cancellation, only the topmost guard bit might be set.  */
+	.balign 4
+.Large_cancel_sub:
+	norm.f DBL1L,DBL0L
+	bpnz.d 0f
+	bmsk DBL0H,DBL1H,30
+	mov r5,22<<20
+	bne.d 1f
+	mov_s DBL1L,21
+	bset r5,r5,5+20
+	add_s DBL1L,DBL1L,32
+	brne r12,0,1f
+	j_s.d	[blink]
+	mov_l	DBL0H,0
+	.balign 4
+0:	add r5,DBL1L,23
+	asl r5,r5,20
+	add_s DBL1L,DBL1L,22
+1:	brlo DBL0H,r5,.Ldenorm_large_cancel_sub
+	sub DBL0H,DBL1H,r5
+.Lpast_denorm_large_cancel_sub:
+	rsub.f r7,DBL1L,32
+	lsr r12,r12,r7
+	lsr r7,DBL0L,r7
+	asl_s DBL0L,DBL0L,DBL1L
+	add.ge DBL0H,DBL0H,r7
+	add_s DBL0L,DBL0L,r12
+	add.lt DBL0H,DBL0H,DBL0L
+	mov.eq DBL0L,r12
+	j_s.d [blink]
+	mov.lt DBL0L,0
+	.balign 4
+.Ldenorm_large_cancel_sub:
+	lsr r5,DBL0H,20
+	xor_s DBL0H,DBL0H,DBL1H
+	brgt.d r5,1,.Lpast_denorm_large_cancel_sub
+	sub DBL1L,r5,1
+	j_l [blink] ; denorm, no shift -> no rounding needed.
+
+/* r4: DBL0H & 0x7fffffff
+   r6: DBL1H & 0x7ff00000
+   r9: 0x7ff00000
+   r10: sign difference
+   r12: shift count (negative) */
+	.balign 4
+.Ldbl1_gt:
+	brhs r6,r9,.Lret_dbl1 ; inf or NaN
+	neg r8,r12
+	brhs r8,32,.Large_shift_dbl0
+.Lsmall_shift_dbl0:
+	breq.d r6,0,.Ldenorm_small_shift_dbl0
+	bmsk_s DBL0H,DBL0H,19
+	bset_s DBL0H,DBL0H,20
+.Lfixed_denorm_small_shift_dbl0:
+	asl r4,DBL0H,r12
+	lsr DBL0H,DBL0H,r8
+	lsr r5,DBL0L,r8
+	asl r12,DBL0L,r12
+	brge.d r10,0,.Ladd_dbl1_gt
+	or DBL0L,r4,r5
+/* subtract, abs(DBL0) < abs(DBL1) */
+/* DBL0H, DBL0L: fraction with explicit leading 1, shifted into place
+   DBL1H, DBL1L: original values
+   r6:  orig. DBL1H & 0x7ff00000
+   r9:  0x7ff00000
+   r12: guard bits */
+	.balign 4
+.Lrsub:
+	neg.f r12,r12
+	bmsk r7,DBL1H,19
+	mov_s r5,DBL0H
+	sbc.f DBL0L,DBL1L,DBL0L
+	bic DBL1H,DBL1H,r7
+	bset r7,r7,20
+	sbc.f r4,r7,r5
+	beq_l .Large_cancel_sub
+	norm DBL1L,r4
+	b_l .Lsub_done ; note: r6 is already set up.
+
+.Lret_dbl1:
+	mov_s DBL0H,DBL1H
+	j_s.d [blink]
+	mov_l DBL0L,DBL1L
+	.balign 4
+.Ldenorm_small_shift_dbl0:
+	sub.f r8,r8,1
+	bne.d .Lfixed_denorm_small_shift_dbl0
+	add_s r12,r12,1
+	brlt r10,0,.Lrsub
+.Ladd_dbl1_gt: ; bit 20 of DBL0H is clear and bit 0 of r12 does not matter
+	add.f DBL0L,DBL0L,DBL1L
+	add_s DBL0H,DBL0H,DBL1H
+	add.cs DBL0H,DBL0H,1
+	xor DBL1H,DBL0H,DBL1H
+	bbit0 DBL1H,20,.Lno_shiftdown_dbl1_gt
+	lsr.f DBL1H,DBL0H
+	and r4,DBL0L,2
+	bmsk DBL1H,DBL1H,18
+	sbc DBL0H,DBL0H,DBL1H
+	rrc.f DBL0L,DBL0L
+	or.f r12,r12,r4
+	cmp.eq r12,r12
+	add.cs.f DBL0L,DBL0L,1
+	bic.f 0,r9,DBL0H ; check for generating infinity with possible ...
+	jne.d [blink]    ; ... non-zero fraction
+	add.cs DBL0H,DBL0H,1
+	mov_s DBL0L,0
+	bmsk DBL1H,DBL0H,19
+	j_s.d [blink]
+	bic_s DBL0H,DBL0H,DBL1H
+.Lno_shiftdown_dbl1_gt:
+	add.f 0,r12,r12
+	btst.eq DBL0L,0
+	cmp.eq r12,r12
+	add.cs.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.cs DBL0H,DBL0H,1
+
+	.balign 4
+.Large_shift_dbl0:
+	brhs r8,55,.Lret_dbl1
+	bmsk_s DBL0H,DBL0H,19
+	brne r6,0,.Lno_denorm_large_shift_dbl0
+	add_s r12,r12,1
+	brne.d r8,33,.Lfixed_denorm_large_shift_dbl0
+	sub r8,r8,1
+	bset_s DBL0H,DBL0H,20
+.Lshift32_dbl0:
+	mov_s r12,DBL0L
+	mov_s DBL0L,DBL0H
+	brlt.d r10,0,.Lrsub
+	mov_s DBL0H,0
+	b_s .Ladd_dbl1_gt
+
+	.balign 4
+.Lno_denorm_large_shift_dbl0:
+	breq.d r8,32,.Lshift32_dbl0
+	bset_l DBL0H,DBL0H,20
+.Lfixed_denorm_large_shift_dbl0:
+	asl r4,DBL0H,r12
+	lsr r5,DBL0L,r8
+	asl.f 0,DBL0L,r12
+	lsr DBL0L,DBL0H,r8
+	or r12,r4,r5
+	tst.eq r12,1
+	or.ne r12,r12,2
+	brlt.d r10,0,.Lrsub
+	mov_s DBL0H,0
+	b_l .Ladd_dbl1_gt
+	ENDFUNC(__adddf3)
+	ENDFUNC(__subdf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/addsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/addsf3.S
new file mode 100644
index 000000000..45ed09321
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/addsf3.S
@@ -0,0 +1,344 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+#if 0 /* DEBUG */
+	.global __addsf3
+	FUNC(__addsf3)
+	.balign 4
+__addsf3:
+	push_s blink
+	push_s r1
+	bl.d __addsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __addsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__addsf3)
+	.global __subsf3
+	FUNC(__subsf3)
+	.balign 4
+__subsf3:
+	push_s blink
+	push_s r1
+	bl.d __subsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __subsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__subsf3)
+#define __addsf3 __addsf3_asm
+#define __subsf3 __subsf3_asm
+#endif /* DEBUG */
+/* N.B. This is optimized for ARC700.
+  ARC600 has very different scheduling / instruction selection criteria.  */
+
+/* inputs: r0, r1
+   output: r0
+   clobber: r1-r10, r12, flags  */
+
+	.balign 4
+	.global __addsf3
+	.global __subsf3
+	FUNC(__addsf3)
+	FUNC(__subsf3)
+	.long 0x7f800000 ; exponent mask
+__subsf3:
+	bxor_l r1,r1,31
+__addsf3:
+	ld r9,[pcl,-8]
+	bmsk r4,r0,30
+	xor r10,r0,r1
+	and r6,r1,r9
+	sub.f r12,r4,r6
+	asr_s r12,r12,23
+	blo .Ldbl1_gt
+	brhs r4,r9,.Linf_nan
+	brne r12,0,.Lsmall_shift
+	brge r10,0,.Ladd_same_exp ; r12 == 0
+/* After subtracting, we need to normalize; when shifting to place the
+  leading 1 into position for the implicit 1 and adding that to DBL0,
+  we increment the exponent.  Thus, we have to subtract one more than
+  the shift count from the exponent beforehand.  Iff the exponent drops thus
+  below zero (before adding in the fraction with the leading one), we have
+  generated a denormal number.  Denormal handling is basicallly reducing the
+  shift count so that we produce a zero exponent instead; FWIW, this way
+  the shift count can become zero (if we started out with exponent 1).
+  On the plus side, we don't need to check for denorm input, the result
+  of subtracing these looks just the same as denormals generated during
+  subtraction.  */
+	bmsk r7,r1,30
+	breq	r4,r7,.Lret0
+	sub.f r5,r4,r7
+	lsr r12,r4,23
+	neg.cs r5,r5
+	norm r3,r5
+	bmsk r2,r0,22
+	sub_s r3,r3,6
+	min r12,r12,r3
+	bic r1,r0,r2
+	sub_s r3,r12,1
+	asl_s r12,r12,23
+	asl r2,r5,r3
+	sub_s r1,r1,r12
+	add_s r0,r1,r2
+	j_s.d [blink]
+	bxor.cs r0,r0,31
+	.balign 4
+.Linf_nan:
+	; If both inputs are inf, but with different signs, the result is NaN.
+	asr r12,r10,31
+	or_s r1,r1,r12
+	j_s.d [blink]
+	or.eq r0,r0,r1
+	.balign 4
+.Ladd_same_exp:
+	/* This is a special case because we can't test for need to shift
+	   down by checking if bit 23 of DBL0 changes.  OTOH, here we know
+	   that we always need to shift down.  */
+	; adding the two floating point numbers together makes the sign
+	; cancel out and apear as carry; the exponent is doubled, and the
+	; fraction also in need of shifting left by one. The two implicit
+	; ones of the sources make an implicit 1 of the result, again
+	; non-existent in a place shifted by one.
+	add.f	r0,r0,r1
+	btst_s	r0,1
+	breq	r6,0,.Ldenorm_add
+	add.ne	r0,r0,1 ; round to even.
+	rrc	r0,r0
+	bmsk	r1,r9,23
+	add	r0,r0,r1 ; increment exponent
+	bic.f	0,r9,r0; check for overflow -> infinity.
+	jne_l	[blink]
+	mov_s	r0,r9
+	j_s.d	[blink]
+	bset.cs	r0,r0,31
+
+.Ldenorm_add:
+	j_s.d [blink]
+	add r0,r4,r1
+
+.Lret_dbl0:
+        j_s [blink]
+
+	.balign 4
+.Lsmall_shift:
+	brhi r12,25,.Lret_dbl0
+	breq.d r6,0,.Ldenorm_small_shift
+	bmsk_s r1,r1,22
+	bset_s r1,r1,23
+.Lfixed_denorm_small_shift:
+	neg r8,r12
+	asl r5,r1,r8
+	brge.d r10,0,.Ladd
+	lsr_l r1,r1,r12
+/* subtract, abs(DBL0) > abs(DBL1) */
+/* DBL0: original values
+   DBL1: fraction with explicit leading 1, shifted into place
+   r4:  orig. DBL0 & 0x7fffffff
+   r6:  orig. DBL1 & 0x7f800000
+   r9:  0x7f800000
+   r10: orig. DBL0H ^ DBL1H
+   r5 : guard bits */
+	.balign 4
+.Lsub:
+	neg.f r12,r5
+	bmsk r3,r0,22
+	bset r5,r3,23
+	sbc.f r4,r5,r1
+	beq.d .Large_cancel_sub
+	bic r7,r0,r3
+	norm r3,r4
+	bmsk r6,r7,30
+.Lsub_done:
+	sub_s r3,r3,6
+	breq r3,1,.Lsub_done_noshift
+	asl r5,r3,23
+	sub_l r3,r3,1
+	brlo r6,r5,.Ldenorm_sub
+	sub r0,r7,r5
+	neg_s r1,r3
+	lsr.f r2,r12,r1
+	asl_s r12,r12,r3
+	btst_s	r2,0
+	bmsk.eq.f r12,r12,30
+	asl r5,r4,r3
+	add_s r0,r0,r2
+	adc.ne r0,r0,0
+	j_s.d [blink]
+	add_l r0,r0,r5
+
+.Lret0:
+	j_s.d	[blink]
+	mov_l	r0,0
+
+	.balign 4
+.Ldenorm_small_shift:
+	brne.d	r12,1,.Lfixed_denorm_small_shift
+	sub_s	r12,r12,1
+	brlt.d	r10,0,.Lsub
+	mov_s	r5,r12 ; zero r5, and align following code
+.Ladd: ; Both bit 23 of DBL1 and bit 0 of r5 are clear.
+	bmsk	r2,r0,22
+	add_s	r2,r2,r1
+	bbit0.d	r2,23,.Lno_shiftdown
+	add_s	r0,r0,r1
+	bic.f	0,r9,r0; check for overflow -> infinity; eq : infinity
+	bmsk	r1,r2,22
+	lsr.ne.f r2,r2,2; cc: even ; hi: might round down
+	lsr.ne	r1,r1,1
+	rcmp.hi	r5,1; hi : round down
+	bclr.hi	r0,r0,0
+	j_l.d	[blink]
+	sub_s	r0,r0,r1
+
+/* r4: DBL0H & 0x7fffffff
+   r6: DBL1H & 0x7f800000
+   r9: 0x7f800000
+   r10: sign difference
+   r12: shift count (negative) */
+	.balign 4
+.Ldbl1_gt:
+	brhs r6,r9,.Lret_dbl1 ; inf or NaN
+	neg r8,r12
+	brhi r8,25,.Lret_dbl1
+.Lsmall_shift_dbl0:
+	breq.d r6,0,.Ldenorm_small_shift_dbl0
+	bmsk_s r0,r0,22
+	bset_s r0,r0,23
+.Lfixed_denorm_small_shift_dbl0:
+	asl r5,r0,r12
+	brge.d r10,0,.Ladd_dbl1_gt
+	lsr r0,r0,r8
+/* subtract, abs(DBL0) < abs(DBL1) */
+/* DBL0: fraction with explicit leading 1, shifted into place
+   DBL1: original value
+   r6:  orig. DBL1 & 0x7f800000
+   r9:  0x7f800000
+   r5: guard bits */
+	.balign 4
+.Lrsub:
+	neg.f r12,r5
+	bmsk r5,r1,22
+	bic r7,r1,r5
+	bset r5,r5,23
+	sbc.f r4,r5,r0
+	bne.d .Lsub_done ; note: r6 is already set up.
+	norm r3,r4
+	/* Fall through */
+
+/* r4:r12 : unnormalized result fraction
+   r7: result sign and exponent         */
+/* When seeing large cancellation, only the topmost guard bit might be set.  */
+	.balign 4
+.Large_cancel_sub:
+	breq_s	r12,0,.Lret0
+	sub	r0,r7,24<<23
+	xor.f	0,r0,r7 ; test if exponent is negative
+	tst.pl	r9,r0  ; test if exponent is zero
+	jpnz	[blink] ; return if non-denormal result
+	bmsk	r6,r7,30
+	lsr	r3,r6,23
+	xor	r0,r6,r7
+	sub_s	r3,r3,24-22
+	j_s.d	[blink]
+	bset	r0,r0,r3
+
+	; If a denorm is produced, we have an exact result -
+	; no need for rounding.
+	.balign 4
+.Ldenorm_sub:
+	sub r3,r6,1
+	lsr.f r3,r3,23
+	xor r0,r6,r7
+	neg_s r1,r3
+	asl.ne r4,r4,r3
+	lsr_s r12,r12,r1
+	add_s r0,r0,r4
+	j_s.d [blink]
+	add.ne r0,r0,r12
+
+	.balign 4
+.Lsub_done_noshift:
+	add.f 0,r12,r12
+	btst.eq r4,0
+	bclr r4,r4,23
+	add r0,r7,r4
+	j_s.d [blink]
+	adc.ne r0,r0,0
+
+	.balign 4
+.Lno_shiftdown:
+	add.f 0,r5,r5
+	btst.eq r0,0
+	cmp.eq r5,r5
+	j_s.d [blink]
+	add.cs r0,r0,1
+
+.Lret_dbl1:
+	j_s.d [blink]
+	mov_l r0,r1
+	.balign 4
+.Ldenorm_small_shift_dbl0:
+	sub.f r8,r8,1
+	bne.d .Lfixed_denorm_small_shift_dbl0
+	add_s r12,r12,1
+	brlt.d r10,0,.Lrsub
+	mov r5,0
+.Ladd_dbl1_gt: ; both bit 23 of DBL0 and bit 0 of r5 are clear.
+	bmsk	r2,r1,22
+	add_s	r2,r2,r0
+	bbit0.d	r2,23,.Lno_shiftdown_dbl1_gt
+	add_s	r0,r1,r0
+	bic.f	0,r9,r0; check for overflow -> infinity; eq : infinity
+	bmsk	r1,r2,22
+	lsr.ne.f r2,r2,2; cc: even ; hi: might round down
+	lsr.ne	r1,r1,1
+	rcmp.hi	r5,1; hi : round down
+	bclr.hi	r0,r0,0
+	j_l.d	[blink]
+	sub_s	r0,r0,r1
+
+	.balign	4
+.Lno_shiftdown_dbl1_gt:
+	add.f	0,r5,r5
+	btst.eq	r0,0
+	cmp.eq	r5,r5
+	j_s.d	[blink]
+	add.cs	r0,r0,1
+	ENDFUNC(__addsf3)
+	ENDFUNC(__subsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc-ieee-754.h b/gcc-4.9/libgcc/config/arc/ieee-754/arc-ieee-754.h
new file mode 100644
index 000000000..64e6d2309
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc-ieee-754.h
@@ -0,0 +1,56 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __LITTLE_ENDIAN__
+#define DBL0L r0
+#define DBL0H r1
+#define DBL1L r2
+#define DBL1H r3
+#else
+#define DBL0L r1
+#define DBL0H r0
+#define DBL1L r3
+#define DBL1H r2
+#endif
+#define add_l add
+#define asr_l asr
+#define j_l j
+#define jne_l jne
+#define jeq_l jeq
+#define or_l or
+#define mov_l mov
+#define b_l b
+#define beq_l beq
+#define bne_l bne
+#define brne_l brne
+#define bset_l bset
+#define sub_l sub
+#define sub1_l sub1
+#define lsr_l lsr
+#define xor_l xor
+#define bic_l bic
+#define bmsk_l bmsk
+#define bxor_l bxor
+#define bcs_s blo_s
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divdf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divdf3.S
new file mode 100644
index 000000000..2381ba67d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divdf3.S
@@ -0,0 +1,421 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   to calculate a := b/x as b*y, with y := 1/x:
+   - x is in the range [1..2)
+   - calculate 15..18 bit inverse y0 using a table of approximating polynoms.
+     Precision is higher for polynoms used to evaluate input with larger
+     value.
+   - Do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+      The truncation error for the either is less than 1 + x/2 ulp.
+      A 31 bit inverse can be simply calculated by using x with implicit 1
+      and chaining the multiplies.  For a 32 bit inverse, we multiply y0^2
+      with the bare fraction part of x, then add in y0^2 for the implicit
+      1 of x.
+    - If calculating a 31 bit inverse, the systematic error is less than
+      -1 ulp; likewise, for 32 bit, it is less than -2 ulp.
+    - If we calculate our seed with a 32 bit fraction, we can archive a
+      tentative result strictly better than -2 / +2.5 (1) ulp/128, i.e. we
+      only need to take the step to calculate the 2nd stage rest and
+      rounding adjust 1/32th of the time.  However, if we use a 20 bit
+      fraction for the seed, the negative error can exceed -2 ulp/128, (2)
+      thus for a simple add / tst check, we need to do the 2nd stage
+      rest calculation/ rounding adjust 1/16th of the time.
+      (1): The inexactness of the 32 bit inverse contributes an error in the
+      range of (-1 .. +(1+x/2) ) ulp/128.  Leaving out the low word of the
+      rest contributes an error < +1/x ulp/128 .  In the interval [1,2),
+      x/2 + 1/x <= 1.5 .
+      (2): Unless proven otherwise.  I have not actually looked for an
+      example where -2 ulp/128 is exceeded, and my calculations indicate
+      that the excess, if existent, is less than -1/512 ulp.
+    ??? The algorithm is still based on the ARC700 optimized code.
+    Maybe we could make better use of 32x16 bit multiply, or 64 bit multiply
+    results.
+ */
+#include "../arc-ieee-754.h"
+#define mlo acc2
+#define mhi acc1
+#define mul64(b,c) mullw 0,b,c` machlw 0,b,c
+#define mulu64(b,c) mululw 0,b,c` machulw 0,b,c
+
+/* N.B. fp-bit.c does double rounding on denormal numbers.  */
+#if 0 /* DEBUG */
+	.global __divdf3
+	FUNC(__divdf3)
+	.balign 4
+__divdf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __divdf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __divdf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	and r12,DBL0H,DBL1H
+	bic.f 0,0x7ff80000,r12 ; both NaN -> OK
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__divdf3)
+#define __divdf3 __divdf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divdf3)
+	.balign 4
+.L7ff00000:
+	.long 0x7ff00000
+.Ldivtab:
+	.long 0xfc0fffe1
+	.long 0xf46ffdfb
+	.long 0xed1ffa54
+	.long 0xe61ff515
+	.long 0xdf7fee75
+	.long 0xd91fe680
+	.long 0xd2ffdd52
+	.long 0xcd1fd30c
+	.long 0xc77fc7cd
+	.long 0xc21fbbb6
+	.long 0xbcefaec0
+	.long 0xb7efa100
+	.long 0xb32f92bf
+	.long 0xae8f83b7
+	.long 0xaa2f7467
+	.long 0xa5ef6479
+	.long 0xa1cf53fa
+	.long 0x9ddf433e
+	.long 0x9a0f3216
+	.long 0x965f2091
+	.long 0x92df0f11
+	.long 0x8f6efd05
+	.long 0x8c1eeacc
+	.long 0x88eed876
+	.long 0x85dec615
+	.long 0x82eeb3b9
+	.long 0x800ea10b
+	.long 0x7d3e8e0f
+	.long 0x7a8e7b3f
+	.long 0x77ee6836
+	.long 0x756e5576
+	.long 0x72fe4293
+	.long 0x709e2f93
+	.long 0x6e4e1c7f
+	.long 0x6c0e095e
+	.long 0x69edf6c5
+	.long 0x67cde3a5
+	.long 0x65cdd125
+	.long 0x63cdbe25
+	.long 0x61ddab3f
+	.long 0x600d991f
+	.long 0x5e3d868c
+	.long 0x5c6d7384
+	.long 0x5abd615f
+	.long 0x590d4ecd
+	.long 0x576d3c83
+	.long 0x55dd2a89
+	.long 0x545d18e9
+	.long 0x52dd06e9
+	.long 0x516cf54e
+	.long 0x4ffce356
+	.long 0x4e9cd1ce
+	.long 0x4d3cbfec
+	.long 0x4becae86
+	.long 0x4aac9da4
+	.long 0x496c8c73
+	.long 0x483c7bd3
+	.long 0x470c6ae8
+	.long 0x45dc59af
+	.long 0x44bc4915
+	.long 0x43ac3924
+	.long 0x428c27fb
+	.long 0x418c187a
+	.long 0x407c07bd
+
+__divdf3_support: /* This label makes debugger output saner.  */
+	.balign 4
+.Ldenorm_dbl1:
+	brge r6, \
+		0x43500000,.Linf_NaN ; large number / denorm -> Inf
+	bmsk.f r12,DBL1H,19
+	mov.eq r12,DBL1L
+	mov.eq DBL1L,0
+	sub.eq r7,r7,32
+	norm.f r11,r12 ; flag for x/0 -> Inf check
+	beq_s .Linf_NaN
+	mov.mi r11,0
+	add.pl r11,r11,1
+	add_s r12,r12,r12
+	asl r8,r12,r11
+	rsub r12,r11,31
+	lsr r12,DBL1L,r12
+	tst_s DBL1H,DBL1H
+	or r8,r8,r12
+	lsr r4,r8,26
+	lsr DBL1H,r8,12
+	ld.as r4,[r10,r4]
+	bxor.mi DBL1H,DBL1H,31
+	sub r11,r11,11
+	asl DBL1L,DBL1L,r11
+	sub r11,r11,1
+	mulu64 (r4,r8)
+	sub r7,r7,r11
+	b.d .Lpast_denorm_dbl1
+	asl r7,r7,20
+
+.Linf_NaN:
+	tst_s DBL0L,DBL0L ; 0/0 -> NaN
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr.eq.f DBL0H,DBL0H,31
+	bmsk DBL0H,DBL1H,30
+	xor_s DBL0H,DBL0H,DBL1H
+	sub.eq DBL0H,DBL0H,1
+	mov_s DBL0L,0
+	j_s.d [blink]
+	or DBL0H,DBL0H,r9
+	.balign 4
+.Lret0_2:
+	xor_s DBL1H,DBL1H,DBL0H
+	mov_s DBL0L,0
+	bmsk DBL0H,DBL1H,30
+	j_s.d [blink]
+	xor_s DBL0H,DBL0H,DBL1H
+	.balign 4
+	.global __divdf3
+/* N.B. the spacing between divtab and the sub3 to get its address must
+   be a multiple of 8.  */
+__divdf3:
+	asl r8,DBL1H,12
+	lsr r4,r8,26
+	sub3 r10,pcl,51;(.-.Ldivtab) >> 3
+	ld.as r9,[pcl,-104]; [pcl,(-((.-.L7ff00000) >> 2))] ; 0x7ff00000
+	ld.as r4,[r10,r4]
+	lsr r12,DBL1L,20
+	and.f r7,DBL1H,r9
+	or r8,r8,r12
+	mulu64 (r4,r8)
+	beq.d .Ldenorm_dbl1
+.Lpast_denorm_dbl1:
+	and.f r6,DBL0H,r9
+	breq.d r7,r9,.Linf_nan_dbl1
+	asl r4,r4,12
+	sub r4,r4,mhi
+	mululw 0,r4,r4
+	machulw r5,r4,r4
+	bne.d .Lnormal_dbl0
+	lsr r8,r8,1
+
+	.balign 4
+.Ldenorm_dbl0:
+	bmsk.f r12,DBL0H,19
+	; wb stall
+	mov.eq r12,DBL0L
+	sub.eq r6,r6,32
+	norm.f r11,r12 ; flag for 0/x -> 0 check
+	brge r7, \
+		0x43500000, .Lret0_2 ; denorm/large number -> 0
+	beq_s .Lret0_2
+	mov.mi r11,0
+	add.pl r11,r11,1
+	asl r12,r12,r11
+	sub r6,r6,r11
+	add.f 0,r6,31
+	lsr r10,DBL0L,r6
+	mov.mi r10,0
+	add r6,r6,11+32
+	neg.f r11,r6
+	asl DBL0L,DBL0L,r11
+	mov.pl DBL0L,0
+	sub r6,r6,32-1
+	b.d .Lpast_denorm_dbl0
+	asl r6,r6,20
+
+	.balign 4
+.Linf_nan_dbl1: ; 0/Inf -> NaN Inf/Inf -> NaN x/Inf-> 0 x/NaN -> NaN
+	or.f 0,r6,DBL0L
+	cmp.ne r6,r9
+	not_s DBL0L,DBL1H
+	sub_s.ne DBL0L,DBL0L,DBL0L
+	tst_s DBL0H,DBL0H
+	add_s DBL0H,DBL1H,DBL0L
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+
+	.balign 4
+.Lnormal_dbl0:
+	breq.d r6,r9,.Linf_nan_dbl0
+	asl r12,DBL0H,11
+	lsr r10,DBL0L,21
+.Lpast_denorm_dbl0:
+	bset r8,r8,31
+	mulu64 (r5,r8)
+	add_s r12,r12,r10
+	bset r5,r12,31
+	cmp r5,r8
+	cmp.eq DBL0L,DBL1L
+	lsr.cc r5,r5,1
+	sub r4,r4,mhi ; u1.31 inverse, about 30 bit
+	mululw 0,r5,r4
+	machulw r11,r5,r4 ; result fraction highpart
+	lsr r8,r8,2 ; u3.29
+	add r5,r6, /* wait for immediate */ \
+		0x3fe00000
+	mulu64 (r11,r8) ; u-28.31
+	asl_s DBL1L,DBL1L,9 ; u-29.23:9
+	sbc r6,r5,r7
+	mov r12,mlo ; u-28.31
+	mulu64 (r11,DBL1L) ; mhi: u-28.23:9
+	add.cs DBL0L,DBL0L,DBL0L
+	asl_s DBL0L,DBL0L,6 ; u-26.25:7
+	asl r10,r11,23
+	sub_l DBL0L,DBL0L,r12
+	lsr r7,r11,9
+	sub r5,DBL0L,mhi ; rest msw ; u-26.31:0
+	mul64 (r5,r4) ; mhi: result fraction lowpart
+	xor.f 0,DBL0H,DBL1H
+	and DBL0H,r6,r9
+	add_s DBL0H,DBL0H,r7
+	bclr r12,r9,20 ; 0x7fe00000
+	brhs.d r6,r12,.Linf_denorm
+	bxor.mi DBL0H,DBL0H,31
+	add.f r12,mhi,0x11
+	asr r9,r12,5
+	sub.mi DBL0H,DBL0H,1
+	add.f DBL0L,r9,r10
+	tst r12,0x1c
+	jne.d [blink]
+	add.cs DBL0H,DBL0H,1
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in double
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  Since we want to know
+	   only the sign bit, it is sufficient to calculate only the
+	   highpart of the lower 64 bits.  */
+	mulu64 (r11,DBL1L) ; rest before considering r12 in r5 : -mlo
+	sub.f DBL0L,DBL0L,1
+	asl r12,r9,2 ; u-22.30:2
+	sub.cs DBL0H,DBL0H,1
+	sub.f r12,r12,2
+	mov r10,mlo ; rest before considering r12 in r5 : -r10
+	mululw 0,r12,DBL1L
+	machulw r7,r12,DBL1L ; mhi: u-51.32
+	asl r5,r5,25 ; s-51.7:25
+	lsr r10,r10,7 ; u-51.30:2
+	mulu64 (r12,r8) ; mlo: u-51.31:1
+	sub r5,r5,r10
+	add.mi r5,r5,DBL1L ; signed multiply adjust for r12*DBL1L
+	bset r7,r7,0 ; make sure that the result is not zero, and that
+	sub r5,r5,r7 ; a highpart zero appears negative
+	sub.f r5,r5,mlo ; rest msw
+	add.pl.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.eq DBL0H,DBL0H,1
+
+.Linf_nan_dbl0:
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+	.balign 4
+.Linf_denorm:
+	lsr r12,r6,28
+	brlo.d r12,0xc,.Linf
+.Ldenorm:
+	asr r6,r6,20
+	neg r9,r6
+	mov_s DBL0H,0
+	brhs.d r9,54,.Lret0
+	bxor.mi DBL0H,DBL0H,31
+	add r12,mhi,1
+	and r12,r12,-4
+	rsub r7,r6,5
+	asr r10,r12,28
+	bmsk r4,r12,27
+	min r7,r7,31
+	asr DBL0L,r4,r7
+	add DBL1H,r11,r10
+	abs.f r10,r4
+	sub.mi r10,r10,1
+	add.f r7,r6,32-5
+	asl r4,r4,r7
+	mov.mi r4,r10
+	add.f r10,r6,23
+	rsub r7,r6,9
+	lsr r7,DBL1H,r7
+	asl r10,DBL1H,r10
+	or.pnz DBL0H,DBL0H,r7
+	or.mi r4,r4,r10
+	mov.mi r10,r7
+	add.f DBL0L,r10,DBL0L
+	add.cs.f DBL0H,DBL0H,1 ; carry clear after this point
+	bxor.f 0,r4,31
+	add.pnz.f DBL0L,DBL0L,1
+	add.cs.f DBL0H,DBL0H,1
+	jne_s [blink]
+	/* Calculation so far was not conclusive; calculate further rest.  */
+	mulu64 (r11,DBL1L) ; rest before considering r12 in r5 : -mlo
+	asr.f r12,r12,3
+	asl r5,r5,25 ; s-51.7:25
+	mov r11,mlo ; rest before considering r12 in r5 : -r11
+	mulu64 (r12,r8) ; u-51.31:1
+	and r9,DBL0L,1 ; tie-breaker: round to even
+	lsr r11,r11,7 ; u-51.30:2
+	mov DBL1H,mlo ; u-51.31:1
+	mulu64 (r12,DBL1L) ; u-51.62:2
+	sub.mi r11,r11,DBL1L ; signed multiply adjust for r12*DBL1L
+	add_s DBL1H,DBL1H,r11
+	sub DBL1H,DBL1H,r5 ; -rest msw
+	add_s DBL1H,DBL1H,mhi ; -rest msw
+	add.f 0,DBL1H,DBL1H ; can't ror.f by 32 :-(
+	tst_s DBL1H,DBL1H
+	cmp.eq mlo,r9
+	add.cs.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.cs DBL0H,DBL0H,1
+
+.Lret0:
+	/* return +- 0 */
+	j_s.d [blink]
+	mov_s DBL0L,0
+.Linf:
+	mov_s DBL0H,r9
+	mov_s DBL0L,0
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+	ENDFUNC(__divdf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divsf3.S
new file mode 100644
index 000000000..77b257d84
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/divsf3.S
@@ -0,0 +1,274 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   - calculate 15..18 bit inverse using a table of approximating polynoms.
+     precision is higher for polynoms used to evaluate input with larger
+     value.
+   - do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+ */
+#include "../arc-ieee-754.h"
+#define mlo acc2
+#define mhi acc1
+#define mul64(b,c) mullw 0,b,c` machlw 0,b,c
+#define mulu64(b,c) mululw 0,b,c` machulw 0,b,c
+
+#if 0 /* DEBUG */
+	.global __divsf3
+	FUNC(__divsf3)
+	.balign 4
+__divsf3:
+	push_s blink
+	push_s r1
+	bl.d __divsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __divsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+#if 1
+	bne abort
+	jeq_s [blink]
+	b abort
+#else
+	bne abort
+	j_s [blink]
+#endif
+	ENDFUNC(__divsf3)
+#define __divsf3 __divsf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divsf3)
+	.balign 4
+.Ldivtab:
+	.long 0xfc0ffff0
+	.long 0xf46ffefd
+	.long 0xed1ffd2a
+	.long 0xe627fa8e
+	.long 0xdf7ff73b
+	.long 0xd917f33b
+	.long 0xd2f7eea3
+	.long 0xcd1fe986
+	.long 0xc77fe3e7
+	.long 0xc21fdddb
+	.long 0xbcefd760
+	.long 0xb7f7d08c
+	.long 0xb32fc960
+	.long 0xae97c1ea
+	.long 0xaa27ba26
+	.long 0xa5e7b22e
+	.long 0xa1cfa9fe
+	.long 0x9ddfa1a0
+	.long 0x9a0f990c
+	.long 0x9667905d
+	.long 0x92df878a
+	.long 0x8f6f7e84
+	.long 0x8c27757e
+	.long 0x88f76c54
+	.long 0x85df630c
+	.long 0x82e759c5
+	.long 0x8007506d
+	.long 0x7d3f470a
+	.long 0x7a8f3da2
+	.long 0x77ef341e
+	.long 0x756f2abe
+	.long 0x72f7212d
+	.long 0x709717ad
+	.long 0x6e4f0e44
+	.long 0x6c1704d6
+	.long 0x69e6fb44
+	.long 0x67cef1d7
+	.long 0x65c6e872
+	.long 0x63cedf18
+	.long 0x61e6d5cd
+	.long 0x6006cc6d
+	.long 0x5e36c323
+	.long 0x5c76b9f3
+	.long 0x5abeb0b7
+	.long 0x5916a79b
+	.long 0x57769e77
+	.long 0x55de954d
+	.long 0x54568c4e
+	.long 0x52d6834d
+	.long 0x51667a7f
+	.long 0x4ffe71b5
+	.long 0x4e9e68f1
+	.long 0x4d466035
+	.long 0x4bf65784
+	.long 0x4aae4ede
+	.long 0x496e4646
+	.long 0x48363dbd
+	.long 0x47063547
+	.long 0x45de2ce5
+	.long 0x44be2498
+	.long 0x43a61c64
+	.long 0x4296144a
+	.long 0x41860c0e
+	.long 0x407e03ee
+.L7f800000:
+	.long 0x7f800000
+	.balign 4
+	.global __divsf3_support
+__divsf3_support:
+.Linf_NaN:
+	bclr.f 0,r0,31 ; 0/0 -> NaN
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	bic_s r0,r0,r1
+	sub.eq r0,r0,1
+	j_s.d [blink]
+	or r0,r0,r9
+.Lret0:
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	j_s.d [blink]
+	bic_s r0,r0,r1
+/* N.B. the spacing between divtab and the sub3 to get its address must
+   be a multiple of 8.  */
+__divsf3:
+	ld.as r9,[pcl,-9]; [pcl,(-((.-.L7f800000) >> 2))] ; 0x7f800000
+	sub3 r3,pcl,37;(.-.Ldivtab) >> 3
+	lsr r2,r1,17
+	and.f r11,r1,r9
+	bmsk r5,r2,5
+	beq.d .Ldenorm_fp1
+	asl r6,r1,8
+	and.f r2,r0,r9
+	ld.as r5,[r3,r5]
+	asl r4,r1,9
+	bset r6,r6,31
+	breq.d r11,r9,.Linf_nan_fp1
+.Lpast_denorm_fp1:
+	mululw 0,r5,r4
+	machulw r8,r5,r4
+	breq.d r2,r9,.Linf_nan_fp0
+	asl r5,r5,13
+	sub r7,r5,r8
+	mululw 0,r7,r6
+	machulw r8,r7,r6
+	beq.d .Ldenorm_fp0
+	asl r12,r0,8
+	mulu64 (r8,r7)
+	bset r3,r12,31
+.Lpast_denorm_fp0:
+	cmp_s r3,r6
+	lsr.cc r3,r3,1
+	add_s r2,r2, /* wait for immediate */ \
+		0x3f000000
+	sub r7,r7,mhi ; u1.31 inverse, about 30 bit
+	mulu64 (r3,r7)
+	sbc r2,r2,r11
+	xor.f 0,r0,r1
+	and r0,r2,r9
+	bclr r3,r9,23 ; 0x7f000000
+	brhs.d r2,r3,.Linf_denorm
+	bxor.mi r0,r0,31
+.Lpast_denorm:
+	add r3,mhi,0x22 ; round to nearest or higher
+	tst r3,0x3c ; check if rounding was unsafe
+	lsr r3,r3,6
+	jne.d [blink] ; return if rounding was safe.
+	add_s r0,r0,r3
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in single
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  */
+        add_s r3,r3,r3
+        sub_s r3,r3,1
+        mulu64 (r3,r6)
+	asr.f 0,r0,1 ; for round-to-even in case this is a denorm
+	rsub r2,r9,25
+        asl_s r12,r12,r2
+        sub.f 0,r12,mlo
+        j_s.d [blink]
+        sub.mi r0,r0,1
+.Linf_nan_fp1:
+	lsr_s r0,r0,31
+	bmsk.f 0,r1,22
+	asl_s r0,r0,31
+	bne_s 0f ; inf/inf -> nan
+	brne r2,r9,.Lsigned0 ; x/inf -> 0, but x/nan -> nan
+0:	j_s.d [blink]
+	mov r0,-1
+.Lsigned0:
+.Linf_nan_fp0:
+	tst_s r1,r1
+	j_s.d [blink]
+	bxor.mi r0,r0,31
+	.balign 4
+	.global __divsf3
+/* For denormal results, it is possible that an exact result needs
+   rounding, and thus the round-to-even rule has to come into play.  */
+.Linf_denorm:
+	brlo r2,0xc0000000,.Linf
+.Ldenorm:
+	asr_s r2,r2,23
+	bic r0,r0,r9
+	neg r9,r2
+	brlo.d r9,25,.Lpast_denorm
+	lsr r3,mlo,r9
+	/* Fall through: return +- 0 */
+	j_s [blink]
+.Linf:
+	j_s.d [blink]
+	or r0,r0,r9
+	.balign 4
+.Ldenorm_fp1:
+	norm.f r12,r6 ; flag for x/0 -> Inf check
+	add r6,r6,r6
+	rsub r5,r12,16
+	ror r5,r1,r5
+	bmsk r5,r5,5
+	bic.ne.f 0, \
+		0x60000000,r0 ; large number / denorm -> Inf
+	ld.as r5,[r3,r5]
+	asl r6,r6,r12
+	beq.d .Linf_NaN
+	and.f r2,r0,r9
+	add r4,r6,r6
+	asl_s r12,r12,23
+	bne.d .Lpast_denorm_fp1
+	add_s r2,r2,r12
+.Ldenorm_fp0:
+	mulu64 (r8,r7)
+	bclr r12,r12,31
+	norm.f r3,r12 ; flag for 0/x -> 0 check
+	bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
+	beq_s .Lret0
+	asl_s r12,r12,r3
+	asl_s r3,r3,23
+	add_s r12,r12,r12
+	add r11,r11,r3
+	b.d .Lpast_denorm_fp0
+	mov_s r3,r12
+	ENDFUNC(__divsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/muldf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/muldf3.S
new file mode 100644
index 000000000..59df77253
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/muldf3.S
@@ -0,0 +1,231 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __muldf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __muldf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	b abort
+#define __muldf3 __muldf3_asm
+#endif /* DEBUG */
+
+__muldf3_support: /* This label makes debugger output saner.  */
+	.balign 4
+	FUNC(__muldf3)
+.Ldenorm_2:
+	breq.d DBL1L,0,.Lret0_2 ; 0 input -> 0 output
+	norm.f r12,DBL1L
+	mov.mi r12,21
+	add.pl r12,r12,22
+	neg r11,r12
+	asl_s r12,r12,20
+	lsr.f DBL1H,DBL1L,r11
+	ror DBL1L,DBL1L,r11
+	sub_s DBL0H,DBL0H,r12
+	mov.eq DBL1H,DBL1L
+	sub_l DBL1L,DBL1L,DBL1H
+	/* Fall through.  */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	mululw 0,DBL0L,DBL1L
+	machulw r4,DBL0L,DBL1L
+	ld.as r9,[pcl,0x67] ; ((.L7ff00000-.+2)/4)]
+	bmsk r6,DBL0H,19
+	bset r6,r6,20
+	mov r8,acc2
+	mululw 0,r4,1
+	and r11,DBL0H,r9
+	breq.d r11,0,.Ldenorm_dbl0
+	and r12,DBL1H,r9
+	breq.d r12,0,.Ldenorm_dbl1
+	maclw 0,r6,DBL1L
+	machulw 0,r6,DBL1L
+	breq.d r11,r9,.Linf_nan
+	bmsk r10,DBL1H,19
+	breq.d r12,r9,.Linf_nan
+	bset r10,r10,20
+	maclw 0,r10,DBL0L
+	machulw r5,r10,DBL0L
+	add_s r12,r12,r11 ; add exponents
+	mov r4,acc2
+	mululw 0,r5,1
+	maclw 0,r6,r10
+	machulw r7,r6,r10 ; fraction product in r7:acc2:r4:r8
+	tst r8,r8
+	bclr r8,r9,30 ; 0x3ff00000
+	bset.ne r4,r4,0 ; put least significant word into sticky bit
+	bclr r6,r9,20 ; 0x7fe00000
+	lsr.f r10,r7,9
+	rsub.eq r8,r8,r9 ; 0x40000000
+	sub r12,r12,r8 ; subtract bias + implicit 1
+	brhs.d r12,r6,.Linf_denorm
+	rsub r10,r10,12
+.Lshift_frac:
+	neg r8,r10
+	asl r6,r4,r10
+	lsr DBL0L,r4,r8
+	add.f 0,r6,r6
+	btst.eq DBL0L,0
+	cmp.eq r4,r4 ; round to nearest / round to even
+	asl r4,acc2,r10
+	lsr r5,acc2,r8
+	adc.f DBL0L,DBL0L,r4
+	xor.f 0,DBL0H,DBL1H
+	asl r7,r7,r10
+	add_s r12,r12,r5
+	adc DBL0H,r12,r7
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+/* N.B. This is optimized for ARC700.
+  ARC600 has very different scheduling / instruction selection criteria.  */
+
+/* If one number is denormal, subtract some from the exponent of the other
+   one (if the other exponent is too small, return 0), and normalize the
+   denormal.  Then re-run the computation.  */
+.Lret0_2:
+	lsr_s DBL0H,DBL0H,31
+	asl_s DBL0H,DBL0H,31
+	j_s.d [blink]
+	mov_s DBL0L,0
+	.balign 4
+.Ldenorm_dbl0:
+	mov_s r12,DBL0L
+	mov_s DBL0L,DBL1L
+	mov_s DBL1L,r12
+	mov_s r12,DBL0H
+	mov_s DBL0H,DBL1H
+	mov_s DBL1H,r12
+	and r11,DBL0H,r9
+.Ldenorm_dbl1:
+	brhs r11,r9,.Linf_nan
+	brhs 0x3ca00001,r11,.Lret0
+	sub_s DBL0H,DBL0H,DBL1H
+	bmsk.f DBL1H,DBL1H,30
+	add_s DBL0H,DBL0H,DBL1H
+	beq.d .Ldenorm_2
+	norm r12,DBL1H
+	sub_s r12,r12,10
+	asl r5,r12,20
+	asl_s DBL1H,DBL1H,r12
+	sub DBL0H,DBL0H,r5
+	neg r5,r12
+	lsr r6,DBL1L,r5
+	asl_s DBL1L,DBL1L,r12
+	b.d __muldf3
+	add_s DBL1H,DBL1H,r6
+
+.Lret0:	xor_s DBL0H,DBL0H,DBL1H
+	bclr DBL1H,DBL0H,31
+	xor_s DBL0H,DBL0H,DBL1H
+	j_s.d [blink]
+	mov_s DBL0L,0
+
+	.balign 4
+.Linf_nan:
+	bclr r12,DBL1H,31
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr_s DBL0H,DBL0H,31
+	max r8,DBL0H,r12 ; either NaN -> NaN ; otherwise inf
+	or.f 0,DBL0H,DBL0L
+	mov_s DBL0L,0
+	or.ne.f DBL1L,DBL1L,r12
+	not_s DBL0H,DBL0L ; inf * 0 -> NaN
+	mov.ne DBL0H,r8
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+/* We have checked for infinity / NaN input before, and transformed
+   denormalized inputs into normalized inputs.  Thus, the worst case
+   exponent overflows are:
+       1 +     1 - 0x400 == 0xc02 : maximum underflow
+   0x7fe + 0x7fe - 0x3ff == 0xbfd ; maximum overflow
+   N.B. 0x7e and 0x7f are also values for overflow.
+
+   If (r12 <= -54), we have an underflow to zero.  */
+	.balign 4
+.Linf_denorm:
+	lsr r6,r12,28
+	brlo.d r6,0xc,.Linf
+	asr r6,r12,20
+	add.f r10,r10,r6
+	brgt.d r10,0,.Lshift_frac
+	mov_s r12,0
+	beq.d .Lround_frac
+	add r10,r10,32
+.Lshift32_frac:
+	tst r4,r4
+	mov r4,acc2
+	bset.ne r4,r4,1
+	mululw 0,r7,1
+	brge.d r10,1,.Lshift_frac
+	mov r7,0
+	breq.d r10,0,.Lround_frac
+	add r10,r10,32
+	brgt r10,21,.Lshift32_frac
+	b_s .Lret0
+
+.Lround_frac:
+	add.f 0,r4,r4
+	btst.eq acc2,0
+	mov_s DBL0L,acc2
+	mov_s DBL0H,r7
+	adc.eq.f DBL0L,DBL0L,0
+	j_s.d [blink]
+	adc.eq DBL0H,DBL0H,0
+
+.Linf:	mov_s DBL0L,0
+	xor.f DBL1H,DBL1H,DBL0H
+	mov_s DBL0H,r9
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+	ENDFUNC(__muldf3)
+
+	.balign 4
+.L7ff00000:
+	.long 0x7ff00000
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/mulsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/mulsf3.S
new file mode 100644
index 000000000..41681f542
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-dsp/mulsf3.S
@@ -0,0 +1,176 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __mulsf3
+	FUNC(__mulsf3)
+	.balign 4
+__mulsf3:
+	push_s blink
+	push_s r1
+	bl.d __mulsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __mulsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	and r12,r0,r1
+	bic.f 0,0x7f800000,r12
+	bne 0f
+	bmsk.f 0,r0,22
+	bmsk.ne.f r1,r1,22
+	jne_s [blink] ; both NaN -> OK
+0:	bl abort
+	ENDFUNC(__mulsf3)
+#define __mulsf3 __mulsf3_asm
+#endif /* DEBUG */
+
+	.balign	4
+	.global	__mulsf3
+	FUNC(__mulsf3)
+__mulsf3:
+	ld.as	r9,[pcl,80]; [pcl,((.L7f800000-.+2)/4)]
+	bmsk	r4,r1,22
+	bset	r2,r0,23
+	asl_s	r2,r2,8
+	bset	r3,r4,23
+	and	r11,r0,r9
+	breq.d	r11,0,.Ldenorm_dbl0
+	and	r12,r1,r9
+	breq.d	r12,0,.Ldenorm_dbl1
+	xor_s	r0,r0,r1
+	mululw	0,r2,r3
+	machulw	r6,r2,r3
+	breq.d	r11,r9,.Linf_nan_dbl0
+	ld.as	r4,[pcl,69]; [pcl,((.L7fffffff-.+2)/4)]
+	breq.d	r12,r9,.Linf_nan_dbl1
+.Lpast_denorm:
+	asl.f	0,r6,8
+	mov	r7,acc2
+	add.pl	r6,r6,r6
+	bclr.pl	r6,r6,23
+	add.pl.f r7,r7,r7
+	add.cs	r6,r6,1
+	lsr.f	0,r6,1
+	add_s	r12,r12,r11
+	adc.f	0,r7,r4
+	add_s	r12,r12, \
+		-0x3f800000
+	adc.f	r8,r6,r12
+	tst.pl	r8,r9
+	bic	r0,r0,r4
+	min	r3,r8,r9
+	jpnz.d	[blink]
+	add.pnz	r0,r0,r3
+; infinity or denormal number
+	add.ne.f r3,r3,r3
+	asr_s	r3,r3,23+1
+	bset	r6,r6,23
+	bpnz.d	.Linfinity
+	sub_s	r3,r3,1
+	neg_s	r2,r3
+	brhi.d	r2,24,.Lret_r0 ; right shift shift > 24 -> return +-0
+	lsr	r2,r6,r2
+	asl	r9,r6,r3
+	lsr.f	0,r2,1
+	tst	r7,r7
+	add_s	r0,r0,r2
+	bset.ne	r9,r9,0
+	adc.f	0,r9,r4
+	j_s.d	[blink]
+	add.cs	r0,r0,1
+.Linfinity:
+	j_s.d	[blink]
+	add_s	r0,r0,r9
+
+.Lret_r0: j_s [blink]
+
+	.balign	4
+.Ldenorm_dbl0:
+	bclr_s	r2,r2,31
+	norm.f	r4,r2
+	add_s	r2,r2,r2
+	asl	r2,r2,r4
+	breq.d	r12,r9,.Ldenorm_dbl0_inf_nan_dbl1
+	asl	r4,r4,23
+	mululw	0,r2,r3
+	machulw	r6,r2,r3
+	sub.ne.f r12,r12,r4
+	ld.as	r4,[pcl,28]; [pcl,((.L7fffffff-.+2)/4)]
+	bhi.d	.Lpast_denorm
+	xor_s	r0,r0,r1
+	bmsk	r1,r0,30
+	j_s.d	[blink]
+	bic_s	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl0_inf_nan_dbl1:
+	bmsk.f	0,r0,30
+	mov.eq	r1,-1
+.Linf_nan_dbl1:
+	xor_s	r1,r1,r0
+.Linf_nan_dbl0:
+	bclr_s	r1,r1,31
+	j_s.d	[blink]
+	xor_s	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl1:
+	breq.d	r11,r9,.Linf_nan_dbl0_2
+	norm.f	r3,r4
+	sub_s	r3,r3,7
+	asl	r4,r4,r3
+	mululw	0,r2,r4
+	machulw	r6,r2,r4
+	sub_s	r3,r3,1
+	asl_s	r3,r3,23
+	sub.ne.f r11,r11,r3
+	ld.as	r4,[pcl,11]; [pcl,((.L7fffffff-.+2)/4)]
+	bhi.d	.Lpast_denorm
+	bmsk	r8,r0,30
+	j_s.d	[blink]
+	bic	r0,r0,r8
+
+	.balign	4
+.Linf_nan_dbl0_2:
+	bclr_s	r1,r1,31
+	xor_s	r0,r0,r1
+	sub.eq	r1,r1,1 ; inf/nan * 0 -> nan
+	bic.f	0,r9,r1
+	j_s.d	[blink]
+	or.eq	r0,r0,r1 ; r1 nan -> result nan
+
+	.balign	4
+.L7f800000:
+	.long	0x7f800000
+.L7fffffff:
+	.long	0x7fffffff
+	ENDFUNC(__mulsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divdf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divdf3.S
new file mode 100644
index 000000000..100c8bc6c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divdf3.S
@@ -0,0 +1,410 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   to calculate a := b/x as b*y, with y := 1/x:
+   - x is in the range [1..2)
+   - calculate 15..18 bit inverse y0 using a table of approximating polynoms.
+     Precision is higher for polynoms used to evaluate input with larger
+     value.
+   - Do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+      The truncation error for the either is less than 1 + x/2 ulp.
+      A 31 bit inverse can be simply calculated by using x with implicit 1
+      and chaining the multiplies.  For a 32 bit inverse, we multiply y0^2
+      with the bare fraction part of x, then add in y0^2 for the implicit
+      1 of x.
+    - If calculating a 31 bit inverse, the systematic error is less than
+      -1 ulp; likewise, for 32 bit, it is less than -2 ulp.
+    - If we calculate our seed with a 32 bit fraction, we can archive a
+      tentative result strictly better than -2 / +2.5 (1) ulp/128, i.e. we
+      only need to take the step to calculate the 2nd stage rest and
+      rounding adjust 1/32th of the time.  However, if we use a 20 bit
+      fraction for the seed, the negative error can exceed -2 ulp/128, (2)
+      thus for a simple add / tst check, we need to do the 2nd stage
+      rest calculation/ rounding adjust 1/16th of the time.
+      (1): The inexactness of the 32 bit inverse contributes an error in the
+      range of (-1 .. +(1+x/2) ) ulp/128.  Leaving out the low word of the
+      rest contributes an error < +1/x ulp/128 .  In the interval [1,2),
+      x/2 + 1/x <= 1.5 .
+      (2): Unless proven otherwise.  I have not actually looked for an
+      example where -2 ulp/128 is exceeded, and my calculations indicate
+      that the excess, if existent, is less than -1/512 ulp.
+    ??? The algorithm is still based on the ARC700 optimized code.
+    Maybe we could make better use of 64 bit multiply results and/or mmed .
+ */
+#include "../arc-ieee-754.h"
+
+/* N.B. fp-bit.c does double rounding on denormal numbers.  */
+#if 0 /* DEBUG */
+	.global __divdf3
+	FUNC(__divdf3)
+	.balign 4
+__divdf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __divdf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __divdf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	and r12,DBL0H,DBL1H
+	bic.f 0,0x7ff80000,r12 ; both NaN -> OK
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__divdf3)
+#define __divdf3 __divdf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divdf3)
+	.balign 4
+.L7ff00000:
+	.long 0x7ff00000
+.Ldivtab:
+	.long 0xfc0fffe1
+	.long 0xf46ffdfb
+	.long 0xed1ffa54
+	.long 0xe61ff515
+	.long 0xdf7fee75
+	.long 0xd91fe680
+	.long 0xd2ffdd52
+	.long 0xcd1fd30c
+	.long 0xc77fc7cd
+	.long 0xc21fbbb6
+	.long 0xbcefaec0
+	.long 0xb7efa100
+	.long 0xb32f92bf
+	.long 0xae8f83b7
+	.long 0xaa2f7467
+	.long 0xa5ef6479
+	.long 0xa1cf53fa
+	.long 0x9ddf433e
+	.long 0x9a0f3216
+	.long 0x965f2091
+	.long 0x92df0f11
+	.long 0x8f6efd05
+	.long 0x8c1eeacc
+	.long 0x88eed876
+	.long 0x85dec615
+	.long 0x82eeb3b9
+	.long 0x800ea10b
+	.long 0x7d3e8e0f
+	.long 0x7a8e7b3f
+	.long 0x77ee6836
+	.long 0x756e5576
+	.long 0x72fe4293
+	.long 0x709e2f93
+	.long 0x6e4e1c7f
+	.long 0x6c0e095e
+	.long 0x69edf6c5
+	.long 0x67cde3a5
+	.long 0x65cdd125
+	.long 0x63cdbe25
+	.long 0x61ddab3f
+	.long 0x600d991f
+	.long 0x5e3d868c
+	.long 0x5c6d7384
+	.long 0x5abd615f
+	.long 0x590d4ecd
+	.long 0x576d3c83
+	.long 0x55dd2a89
+	.long 0x545d18e9
+	.long 0x52dd06e9
+	.long 0x516cf54e
+	.long 0x4ffce356
+	.long 0x4e9cd1ce
+	.long 0x4d3cbfec
+	.long 0x4becae86
+	.long 0x4aac9da4
+	.long 0x496c8c73
+	.long 0x483c7bd3
+	.long 0x470c6ae8
+	.long 0x45dc59af
+	.long 0x44bc4915
+	.long 0x43ac3924
+	.long 0x428c27fb
+	.long 0x418c187a
+	.long 0x407c07bd
+
+__divdf3_support: /* This label makes debugger output saner.  */
+	.balign 4
+.Ldenorm_dbl1:
+	brge r6, \
+		0x43500000,.Linf_NaN ; large number / denorm -> Inf
+	bmsk.f r12,DBL1H,19
+	mov.eq r12,DBL1L
+	mov.eq DBL1L,0
+	sub.eq r7,r7,32
+	norm.f r11,r12 ; flag for x/0 -> Inf check
+	beq_s .Linf_NaN
+	mov.mi r11,0
+	add.pl r11,r11,1
+	add_s r12,r12,r12
+	asl r8,r12,r11
+	rsub r12,r11,31
+	lsr r12,DBL1L,r12
+	tst_s DBL1H,DBL1H
+	or r8,r8,r12
+	lsr r4,r8,26
+	lsr DBL1H,r8,12
+	ld.as r4,[r10,r4]
+	bxor.mi DBL1H,DBL1H,31
+	sub r11,r11,11
+	asl DBL1L,DBL1L,r11
+	sub r11,r11,1
+	mulu64 r4,r8
+	sub r7,r7,r11
+	b.d .Lpast_denorm_dbl1
+	asl r7,r7,20
+
+	.balign 4
+.Ldenorm_dbl0:
+	bmsk.f r12,DBL0H,19
+	; wb stall
+	mov.eq r12,DBL0L
+	sub.eq r6,r6,32
+	norm.f r11,r12 ; flag for 0/x -> 0 check
+	brge r7, \
+		0x43500000, .Lret0_2 ; denorm/large number -> 0
+	beq_s .Lret0_2
+	mov.mi r11,0
+	add.pl r11,r11,1
+	asl r12,r12,r11
+	sub r6,r6,r11
+	add.f 0,r6,31
+	lsr r10,DBL0L,r6
+	mov.mi r10,0
+	add r6,r6,11+32
+	neg.f r11,r6
+	asl DBL0L,DBL0L,r11
+	mov.pl DBL0L,0
+	sub r6,r6,32-1
+	b.d .Lpast_denorm_dbl0
+	asl r6,r6,20
+
+.Linf_NaN:
+	tst_s DBL0L,DBL0L ; 0/0 -> NaN
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr.eq.f DBL0H,DBL0H,31
+	bmsk DBL0H,DBL1H,30
+	xor_s DBL0H,DBL0H,DBL1H
+	sub.eq DBL0H,DBL0H,1
+	mov_s DBL0L,0
+	j_s.d [blink]
+	or DBL0H,DBL0H,r9
+	.balign 4
+.Lret0_2:
+	xor_s DBL1H,DBL1H,DBL0H
+	mov_s DBL0L,0
+	bmsk DBL0H,DBL1H,30
+	j_s.d [blink]
+	xor_s DBL0H,DBL0H,DBL1H
+	.balign 4
+	.global __divdf3
+/* N.B. the spacing between divtab and the sub3 to get its address must
+   be a multiple of 8.  */
+__divdf3:
+	asl r8,DBL1H,12
+	lsr r4,r8,26
+	sub3 r10,pcl,61; (.-.Ldivtab) >> 3
+	ld.as r9,[pcl,-124]; [pcl,(-((.-.L7ff00000) >> 2))] ; 0x7ff00000
+	ld.as r4,[r10,r4]
+	lsr r12,DBL1L,20
+	and.f r7,DBL1H,r9
+	or r8,r8,r12
+	mulu64 r4,r8
+	beq.d .Ldenorm_dbl1
+.Lpast_denorm_dbl1:
+	and.f r6,DBL0H,r9
+	breq.d r7,r9,.Linf_nan_dbl1
+	asl r4,r4,12
+	sub r4,r4,mhi
+	mulu64 r4,r4
+	beq.d .Ldenorm_dbl0
+	lsr r8,r8,1
+	breq.d r6,r9,.Linf_nan_dbl0
+	asl r12,DBL0H,11
+	lsr r10,DBL0L,21
+.Lpast_denorm_dbl0:
+	bset r8,r8,31
+	mulu64 mhi,r8
+	add_s r12,r12,r10
+	bset r5,r12,31
+	cmp r5,r8
+	cmp.eq DBL0L,DBL1L
+	lsr.cc r5,r5,1
+	sub r4,r4,mhi ; u1.31 inverse, about 30 bit
+	mulu64 r5,r4 ; result fraction highpart
+	lsr r8,r8,2 ; u3.29
+	add r5,r6, /* wait for immediate */ \
+		0x3fe00000
+	mov r11,mhi ; result fraction highpart
+	mulu64 r11,r8 ; u-28.31
+	asl_s DBL1L,DBL1L,9 ; u-29.23:9
+	sbc r6,r5,r7
+	mov r12,mlo ; u-28.31
+	mulu64 r11,DBL1L ; mhi: u-28.23:9
+	add.cs DBL0L,DBL0L,DBL0L
+	asl_s DBL0L,DBL0L,6 ; u-26.25:7
+	asl r10,r11,23
+	sub_l DBL0L,DBL0L,r12
+	lsr r7,r11,9
+	sub r5,DBL0L,mhi ; rest msw ; u-26.31:0
+	mul64 r5,r4 ; mhi: result fraction lowpart
+	xor.f 0,DBL0H,DBL1H
+	and DBL0H,r6,r9
+	add_s DBL0H,DBL0H,r7
+	bclr r12,r9,20 ; 0x7fe00000
+	brhs.d r6,r12,.Linf_denorm
+	bxor.mi DBL0H,DBL0H,31
+	add.f r12,mhi,0x11
+	asr r9,r12,5
+	sub.mi DBL0H,DBL0H,1
+	add.f DBL0L,r9,r10
+	tst r12,0x1c
+	jne.d [blink]
+	add.cs DBL0H,DBL0H,1
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in double
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  Since we want to know
+	   only the sign bit, it is sufficient to calculate only the
+	   highpart of the lower 64 bits.  */
+	mulu64 r11,DBL1L ; rest before considering r12 in r5 : -mlo
+	sub.f DBL0L,DBL0L,1
+	asl r12,r9,2 ; u-22.30:2
+	sub.cs DBL0H,DBL0H,1
+	sub.f r12,r12,2
+	mov r10,mlo ; rest before considering r12 in r5 : -r10
+	mulu64 r12,DBL1L ; mhi: u-51.32
+	asl r5,r5,25 ; s-51.7:25
+	lsr r10,r10,7 ; u-51.30:2
+	mov r7,mhi ; u-51.32
+	mulu64 r12,r8 ; mlo: u-51.31:1
+	sub r5,r5,r10
+	add.mi r5,r5,DBL1L ; signed multiply adjust for r12*DBL1L
+	bset r7,r7,0 ; make sure that the result is not zero, and that
+	sub r5,r5,r7 ; a highpart zero appears negative
+	sub.f r5,r5,mlo ; rest msw
+	add.pl.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.eq DBL0H,DBL0H,1
+
+.Linf_nan_dbl1: ; 0/Inf -> NaN Inf/Inf -> NaN x/Inf-> 0 x/NaN -> NaN
+	or.f 0,r6,DBL0L
+	cmp.ne r6,r9
+	not_s DBL0L,DBL1H
+	sub_s.ne DBL0L,DBL0L,DBL0L
+	tst_s DBL0H,DBL0H
+	add_s DBL0H,DBL1H,DBL0L
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+.Linf_nan_dbl0:
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+	.balign 4
+.Linf_denorm:
+	lsr r12,r6,28
+	brlo.d r12,0xc,.Linf
+.Ldenorm:
+	asr r6,r6,20
+	neg r9,r6
+	mov_s DBL0H,0
+	brhs.d r9,54,.Lret0
+	bxor.mi DBL0H,DBL0H,31
+	add r12,mhi,1
+	and r12,r12,-4
+	rsub r7,r6,5
+	asr r10,r12,28
+	bmsk r4,r12,27
+	min r7,r7,31
+	asr DBL0L,r4,r7
+	add DBL1H,r11,r10
+	abs.f r10,r4
+	sub.mi r10,r10,1
+	add.f r7,r6,32-5
+	asl r4,r4,r7
+	mov.mi r4,r10
+	add.f r10,r6,23
+	rsub r7,r6,9
+	lsr r7,DBL1H,r7
+	asl r10,DBL1H,r10
+	or.pnz DBL0H,DBL0H,r7
+	or.mi r4,r4,r10
+	mov.mi r10,r7
+	add.f DBL0L,r10,DBL0L
+	add.cs.f DBL0H,DBL0H,1 ; carry clear after this point
+	bxor.f 0,r4,31
+	add.pnz.f DBL0L,DBL0L,1
+	add.cs.f DBL0H,DBL0H,1
+	jne_s [blink]
+	/* Calculation so far was not conclusive; calculate further rest.  */
+	mulu64 r11,DBL1L ; rest before considering r12 in r5 : -mlo
+	asr.f r12,r12,3
+	asl r5,r5,25 ; s-51.7:25
+	mov r11,mlo ; rest before considering r12 in r5 : -r11
+	mulu64 r12,r8 ; u-51.31:1
+	and r9,DBL0L,1 ; tie-breaker: round to even
+	lsr r11,r11,7 ; u-51.30:2
+	mov DBL1H,mlo ; u-51.31:1
+	mulu64 r12,DBL1L ; u-51.62:2
+	sub.mi r11,r11,DBL1L ; signed multiply adjust for r12*DBL1L
+	add_s DBL1H,DBL1H,r11
+	sub DBL1H,DBL1H,r5 ; -rest msw
+	add_s DBL1H,DBL1H,mhi ; -rest msw
+	add.f 0,DBL1H,DBL1H ; can't ror.f by 32 :-(
+	tst_s DBL1H,DBL1H
+	cmp.eq mlo,r9
+	add.cs.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.cs DBL0H,DBL0H,1
+
+.Lret0:
+	/* return +- 0 */
+	j_s.d [blink]
+	mov_s DBL0L,0
+.Linf:
+	mov_s DBL0H,r9
+	mov_s DBL0L,0
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+	ENDFUNC(__divdf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divsf3.S
new file mode 100644
index 000000000..ef54ffd7c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/divsf3.S
@@ -0,0 +1,274 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   - calculate 15..18 bit inverse using a table of approximating polynoms.
+     precision is higher for polynoms used to evaluate input with larger
+     value.
+   - do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+ */
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __divsf3
+	FUNC(__divsf3)
+	.balign 4
+__divsf3:
+	push_s blink
+	push_s r1
+	bl.d __divsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __divsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+#if 1
+	bne abort
+	jeq_s [blink]
+	b abort
+#else
+	bne abort
+	j_s [blink]
+#endif
+	ENDFUNC(__divsf3)
+#define __divsf3 __divsf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divsf3)
+	.balign 4
+.Ldivtab:
+	.long 0xfc0ffff0
+	.long 0xf46ffefd
+	.long 0xed1ffd2a
+	.long 0xe627fa8e
+	.long 0xdf7ff73b
+	.long 0xd917f33b
+	.long 0xd2f7eea3
+	.long 0xcd1fe986
+	.long 0xc77fe3e7
+	.long 0xc21fdddb
+	.long 0xbcefd760
+	.long 0xb7f7d08c
+	.long 0xb32fc960
+	.long 0xae97c1ea
+	.long 0xaa27ba26
+	.long 0xa5e7b22e
+	.long 0xa1cfa9fe
+	.long 0x9ddfa1a0
+	.long 0x9a0f990c
+	.long 0x9667905d
+	.long 0x92df878a
+	.long 0x8f6f7e84
+	.long 0x8c27757e
+	.long 0x88f76c54
+	.long 0x85df630c
+	.long 0x82e759c5
+	.long 0x8007506d
+	.long 0x7d3f470a
+	.long 0x7a8f3da2
+	.long 0x77ef341e
+	.long 0x756f2abe
+	.long 0x72f7212d
+	.long 0x709717ad
+	.long 0x6e4f0e44
+	.long 0x6c1704d6
+	.long 0x69e6fb44
+	.long 0x67cef1d7
+	.long 0x65c6e872
+	.long 0x63cedf18
+	.long 0x61e6d5cd
+	.long 0x6006cc6d
+	.long 0x5e36c323
+	.long 0x5c76b9f3
+	.long 0x5abeb0b7
+	.long 0x5916a79b
+	.long 0x57769e77
+	.long 0x55de954d
+	.long 0x54568c4e
+	.long 0x52d6834d
+	.long 0x51667a7f
+	.long 0x4ffe71b5
+	.long 0x4e9e68f1
+	.long 0x4d466035
+	.long 0x4bf65784
+	.long 0x4aae4ede
+	.long 0x496e4646
+	.long 0x48363dbd
+	.long 0x47063547
+	.long 0x45de2ce5
+	.long 0x44be2498
+	.long 0x43a61c64
+	.long 0x4296144a
+	.long 0x41860c0e
+	.long 0x407e03ee
+.L7f800000:
+	.long 0x7f800000
+	.balign 4
+	.global __divsf3_support
+__divsf3_support:
+.Linf_NaN:
+	bclr.f 0,r0,31 ; 0/0 -> NaN
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	bic_s r0,r0,r1
+	sub.eq r0,r0,1
+	j_s.d [blink]
+	or r0,r0,r9
+.Lret0:
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	j_s.d [blink]
+	bic_s r0,r0,r1
+/* N.B. the spacing between divtab and the sub3 to get its address must
+   be a multiple of 8.  */
+__divsf3:
+	lsr r2,r1,17
+	sub3 r3,pcl,37 ; (.-.Ldivtab) >> 3
+	bmsk_s r2,r2,5
+	ld.as r5,[r3,r2]
+	asl r4,r1,9
+	ld.as r9,[pcl,-13]; [pcl,(-((.-.L7f800000) >> 2))] ; 0x7f800000
+	mulu64 r5,r4
+	and.f r11,r1,r9
+	asl r6,r1,8
+	bset r6,r6,31
+	beq.d .Ldenorm_fp1
+	asl r5,r5,13
+	breq.d r11,r9,.Linf_nan_fp1
+	and.f r2,r0,r9
+	sub r7,r5,mhi
+	mulu64 r7,r6
+	beq.d .Ldenorm_fp0
+	asl r12,r0,8
+	breq.d r2,r9,.Linf_nan_fp0
+	mulu64 mhi,r7
+.Lpast_denorm_fp1:
+	bset r3,r12,31
+.Lpast_denorm_fp0:
+	cmp_s r3,r6
+	lsr.cc r3,r3,1
+	add_s r2,r2, /* wait for immediate */ \
+		0x3f000000
+	sub r7,r7,mhi ; u1.31 inverse, about 30 bit
+	mulu64 r3,r7
+	sbc r2,r2,r11
+	xor.f 0,r0,r1
+	and r0,r2,r9
+	bclr r3,r9,23 ; 0x7f000000
+	brhs.d r2,r3,.Linf_denorm
+	bxor.mi r0,r0,31
+.Lpast_denorm:
+	add r3,mhi,0x22 ; round to nearest or higher
+	tst r3,0x3c ; check if rounding was unsafe
+	lsr r3,r3,6
+	jne.d [blink] ; return if rounding was safe.
+	add_s r0,r0,r3
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in single
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  */
+        add_s r3,r3,r3
+        sub_s r3,r3,1
+        mulu64 r3,r6
+	asr.f 0,r0,1 ; for round-to-even in case this is a denorm
+	rsub r2,r9,25
+        asl_s r12,r12,r2
+        sub.f 0,r12,mlo
+        j_s.d [blink]
+        sub.mi r0,r0,1
+.Linf_nan_fp1:
+	lsr_s r0,r0,31
+	bmsk.f 0,r1,22
+	asl_s r0,r0,31
+	bne_s 0f ; inf/inf -> nan
+	brne r2,r9,.Lsigned0 ; x/inf -> 0, but x/nan -> nan
+0:	j_s.d [blink]
+	mov r0,-1
+.Lsigned0:
+.Linf_nan_fp0:
+	tst_s r1,r1
+	j_s.d [blink]
+	bxor.mi r0,r0,31
+	.balign 4
+	.global __divsf3
+/* For denormal results, it is possible that an exact result needs
+   rounding, and thus the round-to-even rule has to come into play.  */
+.Linf_denorm:
+	brlo r2,0xc0000000,.Linf
+.Ldenorm:
+	asr_s r2,r2,23
+	bic r0,r0,r9
+	neg r9,r2
+	brlo.d r9,25,.Lpast_denorm
+	lsr r3,mlo,r9
+	/* Fall through: return +- 0 */
+	j_s [blink]
+.Linf:
+	j_s.d [blink]
+	or r0,r0,r9
+	.balign 4
+.Ldenorm_fp1:
+	bclr r6,r6,31
+	norm.f r12,r6 ; flag for x/0 -> Inf check
+	add r6,r6,r6
+	rsub r5,r12,16
+	ror r5,r1,r5
+	asl r6,r6,r12
+	bmsk r5,r5,5
+	ld.as r5,[r3,r5]
+	add r4,r6,r6
+	; load latency
+	mulu64 r5,r4
+	bic.ne.f 0, \
+		0x60000000,r0 ; large number / denorm -> Inf
+	asl r5,r5,13
+	sub r7,r5,mhi
+	beq.d .Linf_NaN
+	mulu64 r7,r6
+	asl_s r12,r12,23
+	and.f r2,r0,r9
+	add_s r2,r2,r12
+	asl r12,r0,8
+	bne.d .Lpast_denorm_fp1
+.Ldenorm_fp0: mulu64 mhi,r7
+	bclr r12,r12,31
+	norm.f r3,r12 ; flag for 0/x -> 0 check
+	bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
+	beq_s .Lret0
+	asl_s r12,r12,r3
+	asl_s r3,r3,23
+	add_s r12,r12,r12
+	add r11,r11,r3
+	b.d .Lpast_denorm_fp0
+	mov_s r3,r12
+	ENDFUNC(__divsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/muldf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/muldf3.S
new file mode 100644
index 000000000..132b0093f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/muldf3.S
@@ -0,0 +1,234 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __muldf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __muldf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	and r12,DBL0H,DBL1H
+	bic.f 0,0x7ff80000,r12 ; both NaN -> OK
+	jeq_s [blink]
+	b abort
+#define __muldf3 __muldf3_asm
+#endif /* DEBUG */
+
+__muldf3_support: /* This label makes debugger output saner.  */
+	.balign 4
+	FUNC(__muldf3)
+.Ldenorm_2:
+	breq.d DBL1L,0,.Lret0_2 ; 0 input -> 0 output
+	norm.f r12,DBL1L
+	mov.mi r12,21
+	add.pl r12,r12,22
+	neg r11,r12
+	asl_s r12,r12,20
+	lsr.f DBL1H,DBL1L,r11
+	ror DBL1L,DBL1L,r11
+	sub_s DBL0H,DBL0H,r12
+	mov.eq DBL1H,DBL1L
+	sub_l DBL1L,DBL1L,DBL1H
+	/* Fall through.  */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	mulu64 DBL0L,DBL1L
+	ld.as r9,[pcl,0x68] ; ((.L7ff00000-.+2)/4)]
+	bmsk r6,DBL0H,19
+	bset r6,r6,20
+	and r11,DBL0H,r9
+	breq.d r11,0,.Ldenorm_dbl0
+	and r12,DBL1H,r9
+	breq.d r12,0,.Ldenorm_dbl1
+	mov r8,mlo
+	mov r4,mhi
+	mulu64 r6,DBL1L
+	breq.d r11,r9,.Linf_nan
+	bmsk r10,DBL1H,19
+	breq.d r12,r9,.Linf_nan
+	bset r10,r10,20
+	add.f r4,r4,mlo
+	adc r5,mhi,0
+	mulu64 r10,DBL0L
+	add_s r12,r12,r11 ; add exponents
+	add.f r4,r4,mlo
+	adc r5,r5,mhi
+	mulu64 r6,r10
+	tst r8,r8
+	bclr r8,r9,30 ; 0x3ff00000
+	bset.ne r4,r4,0 ; put least significant word into sticky bit
+	bclr r6,r9,20 ; 0x7fe00000
+	add.f r5,r5,mlo
+	adc r7,mhi,0 ; fraction product in r7:r5:r4
+	lsr.f r10,r7,9
+	rsub.eq r8,r8,r9 ; 0x40000000
+	sub r12,r12,r8 ; subtract bias + implicit 1
+	brhs.d r12,r6,.Linf_denorm
+	rsub r10,r10,12
+.Lshift_frac:
+	neg r8,r10
+	asl r6,r4,r10
+	lsr DBL0L,r4,r8
+	add.f 0,r6,r6
+	btst.eq DBL0L,0
+	cmp.eq r4,r4 ; round to nearest / round to even
+	asl r4,r5,r10
+	lsr r5,r5,r8
+	adc.f DBL0L,DBL0L,r4
+	xor.f 0,DBL0H,DBL1H
+	asl r7,r7,r10
+	add_s r12,r12,r5
+	adc DBL0H,r12,r7
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+/* N.B. This is optimized for ARC700.
+  ARC600 has very different scheduling / instruction selection criteria.  */
+
+/* If one number is denormal, subtract some from the exponent of the other
+   one (if the other exponent is too small, return 0), and normalize the
+   denormal.  Then re-run the computation.  */
+.Lret0_2:
+	lsr_s DBL0H,DBL0H,31
+	asl_s DBL0H,DBL0H,31
+	j_s.d [blink]
+	mov_s DBL0L,0
+	.balign 4
+.Ldenorm_dbl0:
+	mov_s r12,DBL0L
+	mov_s DBL0L,DBL1L
+	mov_s DBL1L,r12
+	mov_s r12,DBL0H
+	mov_s DBL0H,DBL1H
+	mov_s DBL1H,r12
+	and r11,DBL0H,r9
+.Ldenorm_dbl1:
+	brhs r11,r9,.Linf_nan
+	brhs 0x3ca00001,r11,.Lret0
+	sub_s DBL0H,DBL0H,DBL1H
+	bmsk.f DBL1H,DBL1H,30
+	add_s DBL0H,DBL0H,DBL1H
+	beq.d .Ldenorm_2
+	norm r12,DBL1H
+	sub_s r12,r12,10
+	asl r5,r12,20
+	asl_s DBL1H,DBL1H,r12
+	sub DBL0H,DBL0H,r5
+	neg r5,r12
+	lsr r6,DBL1L,r5
+	asl_s DBL1L,DBL1L,r12
+	b.d __muldf3
+	add_s DBL1H,DBL1H,r6
+
+.Lret0:	xor_s DBL0H,DBL0H,DBL1H
+	bclr DBL1H,DBL0H,31
+	xor_s DBL0H,DBL0H,DBL1H
+	j_s.d [blink]
+	mov_s DBL0L,0
+
+	.balign 4
+.Linf_nan:
+	bclr r12,DBL1H,31
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr_s DBL0H,DBL0H,31
+	max r8,DBL0H,r12 ; either NaN -> NaN ; otherwise inf
+	or.f 0,DBL0H,DBL0L
+	mov_s DBL0L,0
+	or.ne.f DBL1L,DBL1L,r12
+	not_s DBL0H,DBL0L ; inf * 0 -> NaN
+	mov.ne DBL0H,r8
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+/* We have checked for infinity / NaN input before, and transformed
+   denormalized inputs into normalized inputs.  Thus, the worst case
+   exponent overflows are:
+       1 +     1 - 0x400 == 0xc02 : maximum underflow
+   0x7fe + 0x7fe - 0x3ff == 0xbfd ; maximum overflow
+   N.B. 0x7e and 0x7f are also values for overflow.
+
+   If (r12 <= -54), we have an underflow to zero.  */
+	.balign 4
+.Linf_denorm:
+	lsr r6,r12,28
+	brlo.d r6,0xc,.Linf
+	asr r6,r12,20
+	add.f r10,r10,r6
+	brgt.d r10,0,.Lshift_frac
+	mov_s r12,0
+	beq.d .Lround_frac
+	add r10,r10,32
+.Lshift32_frac:
+	tst r4,r4
+	mov r4,r5
+	bset.ne r4,r4,1
+	mov r5,r7
+	brge.d r10,1,.Lshift_frac
+	mov r7,0
+	breq.d r10,0,.Lround_frac
+	add r10,r10,32
+	brgt r10,21,.Lshift32_frac
+	b_s .Lret0
+
+.Lround_frac:
+	add.f 0,r4,r4
+	btst.eq r5,0
+	mov_s DBL0L,r5
+	mov_s DBL0H,r7
+	adc.eq.f DBL0L,DBL0L,0
+	j_s.d [blink]
+	adc.eq DBL0H,DBL0H,0
+
+.Linf:	mov_s DBL0L,0
+	xor.f DBL1H,DBL1H,DBL0H
+	mov_s DBL0H,r9
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+	ENDFUNC(__muldf3)
+
+	.balign 4
+.L7ff00000:
+	.long 0x7ff00000
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/mulsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/mulsf3.S
new file mode 100644
index 000000000..ac346de25
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600-mul64/mulsf3.S
@@ -0,0 +1,180 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __mulsf3
+	FUNC(__mulsf3)
+	.balign 4
+__mulsf3:
+	push_s blink
+	push_s r1
+	bl.d __mulsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __mulsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	and r12,r0,r1
+	bic.f 0,0x7f800000,r12
+	bne 0f
+	bmsk.f 0,r0,22
+	bmsk.ne.f r1,r1,22
+	jne_s [blink] ; both NaN -> OK
+0:	bl abort
+	ENDFUNC(__mulsf3)
+#define __mulsf3 __mulsf3_asm
+#endif /* DEBUG */
+
+	.balign	4
+	.global	__mulsf3
+	FUNC(__mulsf3)
+__mulsf3:
+	ld.as	r9,[pcl,80]; [pcl,((.L7f800000-.+2)/4)]
+	bmsk	r4,r1,22
+	bset	r2,r0,23
+	asl_s	r2,r2,8
+	bset	r3,r4,23
+	mulu64	r2,r3
+	and	r11,r0,r9
+	breq.d	r11,0,.Ldenorm_dbl0
+	and	r12,r1,r9
+	breq.d	r12,0,.Ldenorm_dbl1
+	xor_s	r0,r0,r1
+	breq.d	r11,r9,.Linf_nan_dbl0
+	ld.as	r4,[pcl,70]; [pcl,((.L7fffffff-.+2)/4)]
+	breq.d	r12,r9,.Linf_nan_dbl1
+.Lpast_denorm:
+	asl.f	0,mhi,8
+	mov	r6,mhi
+	mov	r7,mlo
+	add.pl	r6,r6,r6
+	bclr.pl	r6,r6,23
+	add.pl.f r7,r7,r7
+	add.cs	r6,r6,1
+	lsr.f	0,r6,1
+	add_s	r12,r12,r11
+	adc.f	0,r7,r4
+	add_s	r12,r12, \
+		-0x3f800000
+	adc.f	r8,r6,r12
+	tst.pl	r8,r9
+	bic	r0,r0,r4
+	min	r3,r8,r9
+	jpnz.d	[blink]
+	add.pnz	r0,r0,r3
+; infinity or denormal number
+	add.ne.f r3,r3,r3
+	asr_s	r3,r3,23+1
+	bset	r6,r6,23
+	bpnz.d	.Linfinity
+	sub_s	r3,r3,1
+	neg_s	r2,r3
+	brhi.d	r2,24,.Lret_r0 ; right shift shift > 24 -> return +-0
+	lsr	r2,r6,r2
+	asl	r9,r6,r3
+	lsr.f	0,r2,1
+	tst	r7,r7
+	add_s	r0,r0,r2
+	bset.ne	r9,r9,0
+	adc.f	0,r9,r4
+	j_s.d	[blink]
+	add.cs	r0,r0,1
+.Linfinity:
+	j_s.d	[blink]
+	add_s	r0,r0,r9
+
+.Lret_r0: j_s [blink]
+
+	.balign	4
+.Ldenorm_dbl0:
+	bclr_s	r2,r2,31
+	norm.f	r4,r2
+	add_s	r2,r2,r2
+	asl	r2,r2,r4
+	mulu64	r2,r3
+	breq.d	r12,r9,.Ldenorm_dbl0_inf_nan_dbl1
+	asl	r4,r4,23
+	sub.ne.f r12,r12,r4
+	ld.as	r4,[pcl,29]; [pcl,((.L7fffffff-.+2)/4)]
+	bhi.d	.Lpast_denorm
+	xor_s	r0,r0,r1
+	bmsk	r1,r0,30
+	j_s.d	[blink]
+	bic_s	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl0_inf_nan_dbl1:
+	bmsk.f	0,r0,30
+	beq_s	.Lretnan
+	xor_s	r0,r0,r1
+.Linf_nan_dbl1:
+	xor_s	r1,r1,r0
+.Linf_nan_dbl0:
+	bclr_s	r1,r1,31
+	cmp_s	r1,r9
+	jls.d	[blink]
+	xor_s	r0,r0,r1
+; r1 NaN -> result NaN
+.Lretnan:
+	j_s.d [blink]
+	mov r0,-1
+
+	.balign	4
+.Ldenorm_dbl1:
+	breq.d	r11,r9,.Linf_nan_dbl0_2
+	norm.f	r3,r4
+	sub_s	r3,r3,7
+	asl	r4,r4,r3
+	mulu64	r2,r4
+	sub_s	r3,r3,1
+	asl_s	r3,r3,23
+	sub.ne.f r11,r11,r3
+	ld.as	r4,[pcl,11]; [pcl,((.L7fffffff-.+2)/4)]
+	bhi.d	.Lpast_denorm
+	bmsk	r8,r0,30
+	j_s.d	[blink]
+	bic	r0,r0,r8
+
+	.balign	4
+.Linf_nan_dbl0_2:
+	bclr_s	r1,r1,31
+	xor_s	r0,r0,r1
+	sub.eq	r1,r1,1 ; inf/nan * 0 -> nan
+	bic.f	0,r9,r1
+	j_s.d	[blink]
+	or.eq	r0,r0,r1 ; r1 nan -> result nan
+
+	.balign	4
+.L7f800000:
+	.long	0x7f800000
+.L7fffffff:
+	.long	0x7fffffff
+	ENDFUNC(__mulsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600/divsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600/divsf3.S
new file mode 100644
index 000000000..d8ea88183
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600/divsf3.S
@@ -0,0 +1,227 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __divsf3
+	FUNC(__divsf3)
+	.balign 4
+__divsf3:
+	push_s blink
+	push_s r1
+	bl.d __divsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __divsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+        jeq_s [blink]
+        and r12,r0,r1
+        bic.f 0,0x7f800000,r12 ; both NaN -> OK
+        jeq_s [blink]
+        bl abort
+	ENDFUNC(__divsf3)
+#define __divsf3 __divsf3_asm
+#endif /* DEBUG */
+
+	.balign 4
+__divdf3_support: /* This label makes debugger output saner.  */
+	FUNC(__divsf3)
+.Ldenorm_fp0:
+	norm.f r12,r2 ; flag for 0/x -> 0 check
+	bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
+	beq_s .Lret0_NaN
+	tst r1,r9
+	add_s r2,r2,r2
+	sub_s r12,r12,8
+	asl_s r2,r2,r12
+	asl_l r12,r12,23
+	bne.d .Lpast_denorm_fp0
+	add r5,r5,r12
+/* r0 is subnormal, r1 is subnormal or 0.  */
+
+	.balign 4
+.Ldenorm_fp1:
+	norm.f r12,r3 ; flag for  x/0 -> Inf check
+	bic.ne.f 0,0x60000000,r0 ; large number/denorm -> Inf
+	beq_s .Linf
+	add_s r3,r3,r3
+	sub_s r12,r12,8
+	asl_s r3,r3,r12
+	asl_s r12,r12,23
+	b.d .Lpast_denorm_fp1
+	add r4,r4,r12
+
+.Lret0_NaN:
+	bclr.f 0,r1,31 ; 0/0 -> NaN
+	bic r0,r10,r9
+	j_s.d [blink]
+	sub.eq r0,r0,1
+
+	.balign 4
+.Linf_nan_fp0:
+	bic.f 0,r9,r1 ; fp1 Inf -> result NaN
+	bic r1,r5,r9  ; fp1 sign
+	sub.eq r1,r1,1
+	j_s.d [blink]
+	xor_s r0,r0,r1
+.Linf_nan_fp1:
+	bic r0,r4,r9 ; fp0 sign
+	bmsk.f 0,r1,22 ; x/inf -> 0, x/nan -> nan
+	xor.eq r1,r1,r9
+	j_s.d [blink]
+	xor_s r0,r0,r1
+
+	.global __divsf3
+	.balign 4
+        .long 0x7f800000 ; exponent mask
+__divsf3:
+	ld r9,[pcl,-4]
+	bmsk r2,r0,22
+	xor r4,r0,r2
+	bmsk r3,r1,22
+	xor r5,r1,r3
+	and r11,r0,r9
+	breq.d r11,0,.Ldenorm_fp0
+	xor r10,r4,r5
+	breq r11,r9,.Linf_nan_fp0
+	bset_s r2,r2,23
+	and r11,r1,r9
+	breq r11,0,.Ldenorm_fp1
+	breq r11,r9,.Linf_nan_fp1
+.Lpast_denorm_fp0:
+	bset_s r3,r3,23
+.Lpast_denorm_fp1:
+	cmp r2,r3
+	asl_s r2,r2,6+1
+	asl_s r3,r3,7
+	add.lo r2,r2,r2
+	bclr r8,r9,30 ; exponent bias
+	bclr.lo r8,r8,23 ; reduce exp by one if fraction is shifted
+	sub r4,r4,r5
+	add r4,r4,r8
+	xor.f 0,r10,r4
+	bmi .Linf_denorm
+	and.f r12,r4,r9
+	beq .Ldenorm
+	sub_s r2,r2,r3 ; discard implicit 1
+	rsub r3,r3,1 ; prime r3 for two-insn divide-step use
+.Ldiv_23bit:
+	.rep 6
+	add1.f r2,r3,r2
+	sub.cc r2,r2,r3
+	.endr
+	breq r12,r9,.Linf
+	bmsk r0,r2,6
+	xor_s r2,r2,r0
+.Ldiv_17bit:
+	.rep 7
+	add1.f r2,r3,r2
+	sub.cc r2,r2,r3
+	.endr
+	asl_s r0,r0,7
+	bmsk r1,r2,6
+	xor_s r2,r2,r1
+	or_s r0,r0,r1
+.Ldiv_10bit:
+	.rep 7
+	add1.f r2,r3,r2
+	sub.cc r2,r2,r3
+	.endr
+	asl_s r0,r0,7
+	bmsk r1,r2,6
+	xor_s r2,r2,r1
+	or_s r0,r0,r1
+.Ldiv_3bit:
+	.rep 3
+	add1.f r2,r3,r2
+	sub.cc r2,r2,r3
+	.endr
+	asl_s r0,r0,3
+.Ldiv_0bit:
+	add1.f r1,r3,r2
+	sub.cc r1,r1,r3
+	bmsk_s r2,r2,2
+	tst r1,-0x7e ; 0xffffff82, test for rest or odd
+	bmsk_s r1,r1,0
+	add_s r0,r0,r2 ; assemble fraction
+	add_s r0,r0,r4 ; add in sign & exponent
+	j_s.d [blink]
+	add.ne r0,r0,r1 ; round to nearest / even
+
+	.balign 4
+.Linf:
+	j_s.d [blink]
+	or r0,r10,r9
+
+.Lret_r4:
+	j_s.d [blink]
+	mov_s r0,r4
+	.balign 4
+.Linf_denorm:
+	add.f r12,r4,r4
+	asr_l r12,r12,24
+	bpl .Linf
+	max r12,r12,-24
+.Ldenorm:
+	rsub r3,r3,1
+	add r1,pcl,68; .Ldenorm_tab-.
+	ldw.as r12,[r1,r12]
+	mov_s r0,0
+	lsr_s r2,r2
+	sub_s r1,r1,r12
+	j_s.d [r1]
+	bic r4,r10,r9
+	.short .Ldenorm_tab-.Lret_r4
+	.short .Ldenorm_tab-.Ldiv_0bit
+	.short .Ldenorm_tab-.Ldiv_3bit-2*8
+	.short .Ldenorm_tab-.Ldiv_3bit-1*8
+	.short .Ldenorm_tab-.Ldiv_3bit
+	.short .Ldenorm_tab-.Ldiv_10bit-6*8
+	.short .Ldenorm_tab-.Ldiv_10bit-5*8
+	.short .Ldenorm_tab-.Ldiv_10bit-3*8
+	.short .Ldenorm_tab-.Ldiv_10bit-3*8
+	.short .Ldenorm_tab-.Ldiv_10bit-2*8
+	.short .Ldenorm_tab-.Ldiv_10bit-1*8
+	.short .Ldenorm_tab-.Ldiv_10bit
+	.short .Ldenorm_tab-.Ldiv_17bit-6*8
+	.short .Ldenorm_tab-.Ldiv_17bit-5*8
+	.short .Ldenorm_tab-.Ldiv_17bit-4*8
+	.short .Ldenorm_tab-.Ldiv_17bit-3*8
+	.short .Ldenorm_tab-.Ldiv_17bit-2*8
+	.short .Ldenorm_tab-.Ldiv_17bit-1*8
+	.short .Ldenorm_tab-.Ldiv_17bit
+	.short .Ldenorm_tab-.Ldiv_23bit-5*8
+	.short .Ldenorm_tab-.Ldiv_23bit-4*8
+	.short .Ldenorm_tab-.Ldiv_23bit-3*8
+	.short .Ldenorm_tab-.Ldiv_23bit-2*8
+	.short .Ldenorm_tab-.Ldiv_23bit-1*8
+.Ldenorm_tab:
+	.short .Ldenorm_tab-.Ldiv_23bit
+	ENDFUNC(__divsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/arc600/mulsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/arc600/mulsf3.S
new file mode 100644
index 000000000..4a0736db0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/arc600/mulsf3.S
@@ -0,0 +1,179 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __mulsf3
+	FUNC(__mulsf3)
+	.balign 4
+__mulsf3:
+	push_s blink
+	push_s r1
+	bl.d __mulsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __mulsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	and r12,r0,r1
+	bic.f 0,0x7f800000,r12
+	bne 0f
+	bmsk.f 0,r0,22
+	bmsk.ne.f r1,r1,22
+	jne_s [blink] ; both NaN -> OK
+0:	bl abort
+	ENDFUNC(__mulsf3)
+#define __mulsf3 __mulsf3_asm
+#endif /* DEBUG */
+
+	.balign	4
+	.global	__mulsf3
+	FUNC(__mulsf3)
+__mulsf3:
+	ld.as	r9,[pcl,76]; [pcl,((.L7f800000-.+2)/4)]
+	bmsk	r4,r1,22
+	bset	r3,r4,23
+	bmsk	r2,r0,22
+	and	r11,r0,r9
+	breq.d	r11,0,.Ldenorm_dbl0
+	and	r12,r1,r9
+	xor_s	r0,r0,r1
+	breq.d	r11,r9,.Linf_nan_dbl0
+	bset_s	r2,r2,23
+	breq	r12,0,.Ldenorm_dbl1
+	breq	r12,r9,.Linf_nan_dbl1
+.Lpast_denorm:
+	mov r6,0
+	lsr.f r7,r2
+; We could so this a bit faster here with a 32 bit shift register and
+; inserting the r2 factor / retrieving the low result a byte at a time,
+; but that'd increase code size.
+	mov lp_count,24
+	.balign 4
+	lp 0f
+	add.cs r6,r6,r3
+	lsr.f r6,r6
+	rrc.f r7,r7
+0:
+	ld.as	r4,[pcl,59]; [pcl,((.L7fffffff-.+2)/4)]
+	asl.f 0,r6,8
+	add.pl	r6,r6,r6
+	bclr.pl	r6,r6,23
+	add.pl.f r7,r7,r7
+	add.cs	r6,r6,1
+	lsr.f	0,r6,1
+	add_s	r12,r12,r11
+	adc.f	0,r7,r4
+	add_s	r12,r12, \
+		-0x3f800000
+	adc.f	r8,r6,r12
+	tst.pl	r8,r9
+	bic	r0,r0,r4
+	min	r3,r8,r9
+	jpnz.d	[blink]
+	add.pnz	r0,r0,r3
+; infinity or denormal number
+	add.ne.f r3,r3,r3
+	asr_s	r3,r3,23+1
+	bset	r6,r6,23
+	bpnz.d	.Linfinity
+	sub_s	r3,r3,1
+	neg_s	r2,r3
+	brhi.d	r2,24,.Lret_r0 ; right shift shift > 24 -> return +-0
+	lsr	r2,r6,r2
+	asl	r9,r6,r3
+	lsr.f	0,r2,1
+	tst	r7,r7
+	add_s	r0,r0,r2
+	bset.ne	r9,r9,0
+	adc.f	0,r9,r4
+	j_s.d	[blink]
+	add.cs	r0,r0,1
+.Linfinity:
+	j_s.d	[blink]
+	add_s	r0,r0,r9
+
+.Lret_r0: j_s [blink]
+
+	.balign	4
+.Ldenorm_dbl0:
+	asl_s	r2,r2,8
+	norm.f	r4,r2
+	lsr_s	r2,r2,7
+	asl	r2,r2,r4
+	breq.d	r12,r9,.Ldenorm_dbl0_inf_nan_dbl1
+	asl	r4,r4,23
+	sub.ne.f r12,r12,r4
+	bhi.d	.Lpast_denorm
+	xor_s	r0,r0,r1
+	bmsk	r1,r0,30
+	j_s.d	[blink]
+	bic_s	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl0_inf_nan_dbl1:
+	bmsk.f	0,r0,30
+	beq_s   .Lretnan
+	xor_s	r0,r0,r1
+.Linf_nan_dbl1:
+	xor_s	r1,r1,r0
+	bclr_s	r1,r1,31
+	j_s.d	[blink]
+	xor_s	r0,r0,r1
+.Linf_nan_dbl0:
+	sub_s   r2,r1,1 ; inf/nan * 0 -> nan; inf * nan -> nan (use |r2| >= inf)
+	bic.f   0,r9,r2
+	xor_s   r0,r0,r1
+	bclr_s  r1,r1,31
+	xor_s   r0,r0,r1
+	jne_s   [blink]
+.Lretnan:
+	j_s.d   [blink]
+	mov     r0,-1
+	.balign	4
+.Ldenorm_dbl1:
+	norm.f	r3,r4
+	sub_s	r3,r3,7
+	asl	r4,r4,r3
+	sub_s	r3,r3,1
+	asl_s	r3,r3,23
+	sub.ne.f r11,r11,r3
+	bhi.d	.Lpast_denorm
+	mov_s	r3,r4
+	bmsk	r3,r0,30
+	j_s.d	[blink]
+	bic_s	r0,r0,r3
+
+	.balign	4
+.L7f800000:
+	.long	0x7f800000
+.L7fffffff:
+	.long	0x7fffffff
+	ENDFUNC(__mulsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/divdf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/divdf3.S
new file mode 100644
index 000000000..dd74ba67c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/divdf3.S
@@ -0,0 +1,416 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   to calculate a := b/x as b*y, with y := 1/x:
+   - x is in the range [1..2)
+   - calculate 15..18 bit inverse y0 using a table of approximating polynoms.
+     Precision is higher for polynoms used to evaluate input with larger
+     value.
+   - Do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+      The truncation error for the either is less than 1 + x/2 ulp.
+      A 31 bit inverse can be simply calculated by using x with implicit 1
+      and chaining the multiplies.  For a 32 bit inverse, we multiply y0^2
+      with the bare fraction part of x, then add in y0^2 for the implicit
+      1 of x.
+    - If calculating a 31 bit inverse, the systematic error is less than
+      -1 ulp; likewise, for 32 bit, it is less than -2 ulp.
+    - If we calculate our seed with a 32 bit fraction, we can archive a
+      tentative result strictly better than -2 / +2.5 (1) ulp/128, i.e. we
+      only need to take the step to calculate the 2nd stage rest and
+      rounding adjust 1/32th of the time.  However, if we use a 20 bit
+      fraction for the seed, the negative error can exceed -2 ulp/128, (2)
+      thus for a simple add / tst check, we need to do the 2nd stage
+      rest calculation/ rounding adjust 1/16th of the time.
+      (1): The inexactness of the 32 bit inverse contributes an error in the
+      range of (-1 .. +(1+x/2) ) ulp/128.  Leaving out the low word of the
+      rest contributes an error < +1/x ulp/128 .  In the interval [1,2),
+      x/2 + 1/x <= 1.5 .
+      (2): Unless proven otherwise.  I have not actually looked for an
+      example where -2 ulp/128 is exceeded, and my calculations indicate
+      that the excess, if existent, is less than -1/512 ulp.
+ */
+#include "arc-ieee-754.h"
+
+/* N.B. fp-bit.c does double rounding on denormal numbers.  */
+#if 0 /* DEBUG */
+	.global __divdf3
+	FUNC(__divdf3)
+	.balign 4
+__divdf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __divdf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __divdf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	and r12,DBL0H,DBL1H
+	bic.f 0,0x7ff80000,r12 ; both NaN -> OK
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__divdf3)
+#define __divdf3 __divdf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divdf3)
+__divdf3_support: /* This label makes debugger output saner.  */
+	.balign 4
+.Ldenorm_dbl1:
+	brge r6, \
+		0x43500000,.Linf_NaN ; large number / denorm -> Inf
+	bmsk.f r12,DBL1H,19
+	mov.eq r12,DBL1L
+	mov.eq DBL1L,0
+	sub.eq r7,r7,32
+	norm.f r11,r12 ; flag for x/0 -> Inf check
+	beq_s .Linf_NaN
+	mov.mi r11,0
+	add.pl r11,r11,1
+	add_s r12,r12,r12
+	asl r8,r12,r11
+	rsub r12,r11,31
+	lsr r12,DBL1L,r12
+	tst_s DBL1H,DBL1H
+	or r8,r8,r12
+	lsr r4,r8,26
+	lsr DBL1H,r8,12
+	ld.as r4,[r10,r4]
+	bxor.mi DBL1H,DBL1H,31
+	sub r11,r11,11
+	asl DBL1L,DBL1L,r11
+	sub r11,r11,1
+	mpyhu r5,r4,r8
+	sub r7,r7,r11
+	asl r4,r4,12
+	b.d .Lpast_denorm_dbl1
+	asl r7,r7,20
+	; wb stall
+
+	.balign 4
+.Ldenorm_dbl0:
+	bmsk.f r12,DBL0H,19
+	; wb stall
+	mov.eq r12,DBL0L
+	sub.eq r6,r6,32
+	norm.f r11,r12 ; flag for 0/x -> 0 check
+	brge r7, \
+		0x43500000, .Lret0_NaN ; denorm/large number -> 0
+	beq_s .Lret0_NaN
+	mov.mi r11,0
+	add.pl r11,r11,1
+	asl r12,r12,r11
+	sub r6,r6,r11
+	add.f 0,r6,31
+	lsr r10,DBL0L,r6
+	mov.mi r10,0
+	add r6,r6,11+32
+	neg.f r11,r6
+	asl DBL0L,DBL0L,r11
+	mov.pl DBL0L,0
+	sub r6,r6,32-1
+	b.d .Lpast_denorm_dbl0
+	asl r6,r6,20
+
+.Linf_NaN:
+	tst_s DBL0L,DBL0L ; 0/0 -> NaN
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr.eq.f DBL0H,DBL0H,31
+	bmsk DBL0H,DBL1H,30
+	xor_s DBL0H,DBL0H,DBL1H
+	sub.eq DBL0H,DBL0H,1
+	mov_s DBL0L,0
+	j_s.d [blink]
+	or DBL0H,DBL0H,r9
+	.balign 4
+.Lret0_NaN:
+	xor_s DBL1H,DBL1H,DBL0H
+	cmp_s r12,r9
+	mov_s DBL0L,0
+	bmsk DBL0H,DBL1H,30
+	xor_s DBL0H,DBL0H,DBL1H
+	j_s.d [blink]
+	sub.hi DBL0H,DBL0H,1
+.Linf_nan_dbl1: ; Inf/Inf -> NaN x/Inf-> 0 x/NaN -> NaN
+	not_s DBL0L,DBL1H
+	cmp r6,r9
+	sub_s.ne DBL0L,DBL0L,DBL0L
+	tst_s DBL0H,DBL0H
+	add_s DBL0H,DBL1H,DBL0L
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+.Linf_nan_dbl0:
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+	.balign 4
+	.global __divdf3
+/* N.B. the spacing between divtab and the add3 to get its address must
+   be a multiple of 8.  */
+__divdf3:
+	asl r8,DBL1H,12
+	lsr r12,DBL1L,20
+	lsr r4,r8,26
+	add3 r10,pcl,59 ; (.Ldivtab-.) >> 3
+	ld.as r4,[r10,r4]
+	ld.as r9,[pcl,180]; [pcl,(-((.-.L7ff00000) >> 2))] ; 0x7ff00000
+	or r8,r8,r12
+	mpyhu r5,r4,r8
+	and.f r7,DBL1H,r9
+	asl r4,r4,12 ; having the asl here is a concession to the XMAC pipeline.
+	beq.d .Ldenorm_dbl1
+	and r6,DBL0H,r9
+.Lpast_denorm_dbl1: ; wb stall
+	sub r4,r4,r5
+	mpyhu r5,r4,r4
+	breq.d r6,0,.Ldenorm_dbl0
+	lsr r8,r8,1
+	asl r12,DBL0H,11
+	lsr r10,DBL0L,21
+.Lpast_denorm_dbl0: ; wb stall
+	bset r8,r8,31
+	mpyhu r11,r5,r8
+	add_s r12,r12,r10
+	bset r5,r12,31
+	cmp r5,r8
+	cmp.eq DBL0L,DBL1L
+	; wb stall
+	lsr.cc r5,r5,1
+	sub r4,r4,r11 ; u1.31 inverse, about 30 bit
+	mpyhu r11,r5,r4 ; result fraction highpart
+	breq r7,r9,.Linf_nan_dbl1
+	lsr r8,r8,2 ; u3.29
+	add r5,r6, /* wait for immediate /  XMAC wb stall */ \
+		0x3fe00000
+	; wb stall (not for XMAC)
+	breq r6,r9,.Linf_nan_dbl0
+	mpyu r12,r11,r8 ; u-28.31
+	asl_s DBL1L,DBL1L,9 ; u-29.23:9
+	sbc r6,r5,r7
+	; resource conflict (not for XMAC)
+	mpyhu r5,r11,DBL1L ; u-28.23:9
+	add.cs DBL0L,DBL0L,DBL0L
+	asl_s DBL0L,DBL0L,6 ; u-26.25:7
+	asl r10,r11,23
+	sub_l DBL0L,DBL0L,r12
+	; wb stall (before 'and' for XMAC)
+	lsr r7,r11,9
+	sub r5,DBL0L,r5 ; rest msw ; u-26.31:0
+	mpyh r12,r5,r4 ; result fraction lowpart
+	xor.f 0,DBL0H,DBL1H
+	and DBL0H,r6,r9
+	add_s DBL0H,DBL0H,r7 ; (XMAC wb stall)
+	bxor.mi DBL0H,DBL0H,31
+	brhs r6, /*  wb stall / wait for immediate */ \
+		0x7fe00000,.Linf_denorm
+	add.f r12,r12,0x11
+	asr r9,r12,5
+	sub.mi DBL0H,DBL0H,1
+	add.f DBL0L,r9,r10
+	tst r12,0x1c
+	jne.d [blink]
+	add.cs DBL0H,DBL0H,1
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in double
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  Since we want to know
+	   only the sign bit, it is sufficient to calculate only the
+	   highpart of the lower 64 bits.  */
+	sub.f DBL0L,DBL0L,1
+	asl r12,r9,2 ; u-22.30:2
+	mpyu r10,r11,DBL1L ; rest before considering r12 in r5 : -r10
+	sub.cs DBL0H,DBL0H,1
+	sub.f r12,r12,2
+	; resource conflict (not for XMAC)
+	mpyhu r7,r12,DBL1L ; u-51.32
+	asl r5,r5,25 ; s-51.7:25
+	lsr r10,r10,7 ; u-51.30:2
+	; resource conflict (not for XMAC)
+	; resource conflict (not for XMAC)
+	mpyu r9,r12,r8 ; u-51.31:1
+	sub r5,r5,r10
+	add.mi r5,r5,DBL1L ; signed multiply adjust for r12*DBL1L
+	bset r7,r7,0 ; make sure that the result is not zero, and that
+	; wb stall (one earlier for XMAC)
+	sub r5,r5,r7 ; a highpart zero appears negative
+	sub.f r5,r5,r9 ; rest msw
+	add.pl.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.eq DBL0H,DBL0H,1
+
+	.balign 4
+.Linf_denorm:
+	brlo r6,0xc0000000,.Linf
+.Ldenorm:
+	asr r6,r6,20
+	neg r9,r6
+	mov_s DBL0H,0
+	brhs.d r9,54,.Lret0
+	bxor.mi DBL0H,DBL0H,31
+	add_l r12,r12,1
+	and r12,r12,-4
+	rsub r7,r6,5
+	asr r10,r12,28
+	bmsk r4,r12,27
+	asrs DBL0L,r4,r7
+	add DBL1H,r11,r10
+	add.f r7,r6,32-5
+	abss r10,r4
+	asl r4,r4,r7
+	mov.mi r4,r10
+	add.f r10,r6,23
+	rsub r7,r6,9
+	lsr r7,DBL1H,r7
+	asl r10,DBL1H,r10
+	or.pnz DBL0H,DBL0H,r7
+	or.mi r4,r4,r10
+	mov.mi r10,r7
+	add.f DBL0L,r10,DBL0L
+	add.cs.f DBL0H,DBL0H,1 ; carry clear after this point
+	bxor.f 0,r4,31
+	add.pnz.f DBL0L,DBL0L,1
+	add.cs.f DBL0H,DBL0H,1
+	jne_l [blink]
+	/* Calculation so far was not conclusive; calculate further rest.  */
+	mpyu r11,r11,DBL1L ; rest before considering r12 in r5 : -r11
+	asr.f r12,r12,3
+	asl r5,r5,25 ; s-51.7:25
+	; resource conflict (not for XMAC)
+	mpyu DBL1H,r12,r8 ; u-51.31:1
+	and r9,DBL0L,1 ; tie-breaker: round to even
+	lsr r11,r11,7 ; u-51.30:2
+	; resource conflict (not for XMAC)
+	mpyhu r8,r12,DBL1L ; u-51.32
+	sub.mi r11,r11,DBL1L ; signed multiply adjust for r12*DBL1L
+	add_s DBL1H,DBL1H,r11
+	; resource conflict (not for XMAC)
+	; resource conflict (not for XMAC)
+	mpyu r12,r12,DBL1L ; u-83.30:2
+	sub DBL1H,DBL1H,r5 ; -rest msw
+	add_s DBL1H,DBL1H,r8 ; -rest msw
+	add.f 0,DBL1H,DBL1H ; can't ror.f by 32 :-(
+	; wb stall (XMAC: Before add.f)
+	tst_s DBL1H,DBL1H
+	cmp.eq r12,r9
+	add.cs.f DBL0L,DBL0L,1
+	j_s.d [blink]
+	add.cs DBL0H,DBL0H,1
+
+.Lret0:
+	/* return +- 0 */
+	j_s.d [blink]
+	mov_s DBL0L,0
+.Linf:
+	mov_s DBL0H,r9
+	mov_s DBL0L,0
+	j_s.d [blink]
+	bxor.mi DBL0H,DBL0H,31
+
+	.balign 4
+.Ldivtab:
+	.long 0xfc0fffe1
+	.long 0xf46ffdfb
+	.long 0xed1ffa54
+	.long 0xe61ff515
+	.long 0xdf7fee75
+	.long 0xd91fe680
+	.long 0xd2ffdd52
+	.long 0xcd1fd30c
+	.long 0xc77fc7cd
+	.long 0xc21fbbb6
+	.long 0xbcefaec0
+	.long 0xb7efa100
+	.long 0xb32f92bf
+	.long 0xae8f83b7
+	.long 0xaa2f7467
+	.long 0xa5ef6479
+	.long 0xa1cf53fa
+	.long 0x9ddf433e
+	.long 0x9a0f3216
+	.long 0x965f2091
+	.long 0x92df0f11
+	.long 0x8f6efd05
+	.long 0x8c1eeacc
+	.long 0x88eed876
+	.long 0x85dec615
+	.long 0x82eeb3b9
+	.long 0x800ea10b
+	.long 0x7d3e8e0f
+	.long 0x7a8e7b3f
+	.long 0x77ee6836
+	.long 0x756e5576
+	.long 0x72fe4293
+	.long 0x709e2f93
+	.long 0x6e4e1c7f
+	.long 0x6c0e095e
+	.long 0x69edf6c5
+	.long 0x67cde3a5
+	.long 0x65cdd125
+	.long 0x63cdbe25
+	.long 0x61ddab3f
+	.long 0x600d991f
+	.long 0x5e3d868c
+	.long 0x5c6d7384
+	.long 0x5abd615f
+	.long 0x590d4ecd
+	.long 0x576d3c83
+	.long 0x55dd2a89
+	.long 0x545d18e9
+	.long 0x52dd06e9
+	.long 0x516cf54e
+	.long 0x4ffce356
+	.long 0x4e9cd1ce
+	.long 0x4d3cbfec
+	.long 0x4becae86
+	.long 0x4aac9da4
+	.long 0x496c8c73
+	.long 0x483c7bd3
+	.long 0x470c6ae8
+	.long 0x45dc59af
+	.long 0x44bc4915
+	.long 0x43ac3924
+	.long 0x428c27fb
+	.long 0x418c187a
+	.long 0x407c07bd
+.L7ff00000:
+	.long 0x7ff00000
+	ENDFUNC(__divdf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/divsf3-stdmul.S b/gcc-4.9/libgcc/config/arc/ieee-754/divsf3-stdmul.S
new file mode 100644
index 000000000..620209d1f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/divsf3-stdmul.S
@@ -0,0 +1,281 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+   - calculate 15..18 bit inverse using a table of approximating polynoms.
+     precision is higher for polynoms used to evaluate input with larger
+     value.
+   - do one newton-raphson iteration step to double the precision,
+     then multiply this with the divisor
+	-> more time to decide if dividend is subnormal
+     - the worst error propagation is on the side of the value range
+       with the least initial defect, thus giving us about 30 bits precision.
+ */
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __divsf3
+	FUNC(__divsf3)
+	.balign 4
+__divsf3:
+	push_s blink
+	push_s r1
+	bl.d __divsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __divsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+#if 1
+	bne abort
+	jeq_s [blink]
+	b abort
+#else
+	bne abort
+	j_s [blink]
+#endif
+	ENDFUNC(__divsf3)
+#define __divsf3 __divsf3_asm
+#endif /* DEBUG */
+
+	FUNC(__divsf3)
+	.balign 4
+.L7f800000:
+	.long 0x7f800000
+.Ldivtab:
+	.long 0xfc0ffff0
+	.long 0xf46ffefd
+	.long 0xed1ffd2a
+	.long 0xe627fa8e
+	.long 0xdf7ff73b
+	.long 0xd917f33b
+	.long 0xd2f7eea3
+	.long 0xcd1fe986
+	.long 0xc77fe3e7
+	.long 0xc21fdddb
+	.long 0xbcefd760
+	.long 0xb7f7d08c
+	.long 0xb32fc960
+	.long 0xae97c1ea
+	.long 0xaa27ba26
+	.long 0xa5e7b22e
+	.long 0xa1cfa9fe
+	.long 0x9ddfa1a0
+	.long 0x9a0f990c
+	.long 0x9667905d
+	.long 0x92df878a
+	.long 0x8f6f7e84
+	.long 0x8c27757e
+	.long 0x88f76c54
+	.long 0x85df630c
+	.long 0x82e759c5
+	.long 0x8007506d
+	.long 0x7d3f470a
+	.long 0x7a8f3da2
+	.long 0x77ef341e
+	.long 0x756f2abe
+	.long 0x72f7212d
+	.long 0x709717ad
+	.long 0x6e4f0e44
+	.long 0x6c1704d6
+	.long 0x69e6fb44
+	.long 0x67cef1d7
+	.long 0x65c6e872
+	.long 0x63cedf18
+	.long 0x61e6d5cd
+	.long 0x6006cc6d
+	.long 0x5e36c323
+	.long 0x5c76b9f3
+	.long 0x5abeb0b7
+	.long 0x5916a79b
+	.long 0x57769e77
+	.long 0x55de954d
+	.long 0x54568c4e
+	.long 0x52d6834d
+	.long 0x51667a7f
+	.long 0x4ffe71b5
+	.long 0x4e9e68f1
+	.long 0x4d466035
+	.long 0x4bf65784
+	.long 0x4aae4ede
+	.long 0x496e4646
+	.long 0x48363dbd
+	.long 0x47063547
+	.long 0x45de2ce5
+	.long 0x44be2498
+	.long 0x43a61c64
+	.long 0x4296144a
+	.long 0x41860c0e
+	.long 0x407e03ee
+__divsf3_support: /* This label makes debugger output saner.  */
+.Ldenorm_fp1:
+	bclr r6,r6,31
+	norm.f r12,r6 ; flag for x/0 -> Inf check
+	add r6,r6,r6
+	rsub r5,r12,16
+	ror r5,r1,r5
+	asl r6,r6,r12
+	bmsk r5,r5,5
+	ld.as r5,[r3,r5]
+	add r4,r6,r6
+	; load latency
+	mpyhu r7,r5,r4
+	bic.ne.f 0, \
+		0x60000000,r0 ; large number / denorm -> Inf
+	beq_s .Linf_NaN
+	asl r5,r5,13
+	; wb stall
+	; slow track
+	sub r7,r5,r7
+	mpyhu r8,r7,r6
+	asl_s r12,r12,23
+	and.f r2,r0,r9
+	add r2,r2,r12
+	asl r12,r0,8
+	; wb stall
+	bne.d .Lpast_denorm_fp1
+.Ldenorm_fp0:
+	mpyhu r8,r8,r7
+	bclr r12,r12,31
+	norm.f r3,r12 ; flag for 0/x -> 0 check
+	bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
+	beq_s .Lret0
+	asl_s r12,r12,r3
+	asl_s r3,r3,23
+	add_s r12,r12,r12
+	add r11,r11,r3
+	b.d .Lpast_denorm_fp0
+	mov_s r3,r12
+	.balign 4
+.Linf_NaN:
+	bclr.f 0,r0,31 ; 0/0 -> NaN
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	bic_s r0,r0,r1
+	sub.eq r0,r0,1
+	j_s.d [blink]
+	or r0,r0,r9
+.Lret0:
+	xor_s r0,r0,r1
+	bmsk r1,r0,30
+	j_s.d [blink]
+	bic_s r0,r0,r1
+.Linf_nan_fp1:
+	lsr_s r0,r0,31
+	bmsk.f 0,r1,22
+	asl_s r0,r0,31
+	bne_s 0f ; inf/inf -> nan
+	brne r2,r9,.Lsigned0 ; x/inf -> 0, but x/nan -> nan
+0:	j_s.d [blink]
+	mov r0,-1
+.Lsigned0:
+.Linf_nan_fp0:
+	tst_s r1,r1
+	j_s.d [blink]
+	bxor.mi r0,r0,31
+	.balign 4
+	.global __divsf3
+/* N.B. the spacing between divtab and the sub3 to get its address must
+   be a multiple of 8.  */
+__divsf3:
+	lsr r2,r1,17
+	sub3 r3,pcl,55;(.-.Ldivtab) >> 3
+	bmsk_s r2,r2,5
+	ld.as r5,[r3,r2]
+	asl r4,r1,9
+	ld.as r9,[pcl,-114]; [pcl,(-((.-.L7f800000) >> 2))] ; 0x7f800000
+	mpyhu r7,r5,r4
+	asl r6,r1,8
+	and.f r11,r1,r9
+	bset r6,r6,31
+	asl r5,r5,13
+	; wb stall
+	beq .Ldenorm_fp1
+	sub r7,r5,r7
+	mpyhu r8,r7,r6
+	breq.d r11,r9,.Linf_nan_fp1
+	and.f r2,r0,r9
+	beq.d .Ldenorm_fp0
+	asl r12,r0,8
+	; wb stall
+	breq r2,r9,.Linf_nan_fp0
+	mpyhu r8,r8,r7
+.Lpast_denorm_fp1:
+	bset r3,r12,31
+.Lpast_denorm_fp0:
+	cmp_s r3,r6
+	lsr.cc r3,r3,1
+	add_s r2,r2, /* wait for immediate */ \
+	/* wb stall */ \
+		0x3f000000
+	sub r7,r7,r8 ; u1.31 inverse, about 30 bit
+	mpyhu r3,r3,r7
+	sbc r2,r2,r11
+	xor.f 0,r0,r1
+	and r0,r2,r9
+	bxor.mi r0,r0,31
+	brhs r2, /* wb stall / wait for immediate */ \
+		0x7f000000,.Linf_denorm
+.Lpast_denorm:
+	add_s r3,r3,0x22 ; round to nearest or higher
+	tst r3,0x3c ; check if rounding was unsafe
+	lsr r3,r3,6
+	jne.d [blink] ; return if rounding was safe.
+	add_s r0,r0,r3
+        /* work out exact rounding if we fall through here.  */
+        /* We know that the exact result cannot be represented in single
+           precision.  Find the mid-point between the two nearest
+           representable values, multiply with the divisor, and check if
+           the result is larger than the dividend.  */
+        add_s r3,r3,r3
+        sub_s r3,r3,1
+        mpyu r3,r3,r6
+	asr.f 0,r0,1 ; for round-to-even in case this is a denorm
+	rsub r2,r9,25
+        asl_s r12,r12,r2
+	; wb stall
+	; slow track
+        sub.f 0,r12,r3
+        j_s.d [blink]
+        sub.mi r0,r0,1
+/* For denormal results, it is possible that an exact result needs
+   rounding, and thus the round-to-even rule has to come into play.  */
+.Linf_denorm:
+	brlo r2,0xc0000000,.Linf
+.Ldenorm:
+	asr_s r2,r2,23
+	bic r0,r0,r9
+	neg r9,r2
+	brlo.d r9,25,.Lpast_denorm
+	lsr r3,r3,r9
+	/* Fall through: return +- 0 */
+	j_s [blink]
+.Linf:
+	j_s.d [blink]
+	or r0,r0,r9
+	ENDFUNC(__divsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/divsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/divsf3.S
new file mode 100644
index 000000000..edc16a849
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/divsf3.S
@@ -0,0 +1,221 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __divsf3
+	FUNC(__divsf3)
+	.balign 4
+__divsf3:
+	push_s blink
+	push_s r1
+	bl.d __divsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __divsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+#if 1
+	bne abort
+	jeq_s [blink]
+	b abort
+#else
+	bne abort
+	j_s [blink]
+#endif
+	ENDFUNC(__divsf3)
+#define __divsf3 __divsf3_asm
+#endif /* DEBUG */
+
+	.balign 4
+__divdf3_support: /* This label makes debugger output saner.  */
+	FUNC(__divsf3)
+.Ldenorm_fp0:
+	norm.f r12,r2 ; flag for 0/x -> 0 check
+	bic.ne.f 0,0x60000000,r1 ; denorm/large number -> 0
+	beq_s .Lret0_NaN
+	tst r1,r9
+	add_s r2,r2,r2
+	sub_s r12,r12,8
+	asl_s r2,r2,r12
+	asl_l r12,r12,23
+	bne.d .Lpast_denorm_fp0
+	add r5,r5,r12
+/* r0 is subnormal, r1 is subnormal or 0.  */
+
+	.balign 4
+.Ldenorm_fp1:
+	norm.f r12,r3 ; flag for  x/0 -> Inf check
+	bic.ne.f 0,0x60000000,r0 ; large number/denorm -> Inf
+	beq_s .Linf
+	add_s r3,r3,r3
+	sub_s r12,r12,8
+	asl_s r3,r3,r12
+	asl_s r12,r12,23
+	b.d .Lpast_denorm_fp1
+	add r4,r4,r12
+
+.Lret0_NaN:
+	bclr.f 0,r1,31 ; 0/0 -> NaN
+	bic r0,r10,r9
+	j_s.d [blink]
+	sub.eq r0,r0,1
+
+	.global __divsf3
+	.balign 4
+        .long 0x7f800000 ; exponent mask
+__divsf3:
+	ld r9,[pcl,-4]
+	bmsk r2,r0,22
+	xor r4,r0,r2
+	bmsk r3,r1,22
+	xor r5,r1,r3
+	and r11,r0,r9
+	breq.d r11,0,.Ldenorm_fp0
+	xor r10,r4,r5
+	breq r11,r9,.Linf_nan_fp0
+	bset_s r2,r2,23
+	and r11,r1,r9
+	breq r11,0,.Ldenorm_fp1
+	breq r11,r9,.Linf_nan_fp1
+.Lpast_denorm_fp0:
+	bset_s r3,r3,23
+.Lpast_denorm_fp1:
+	cmp r2,r3
+	asl_s r2,r2,6+1
+	asl_s r3,r3,7
+	add.lo r2,r2,r2
+	bclr r8,r9,30 ; exponent bias
+	bclr.lo r8,r8,23 ; reduce exp by one if fraction is shifted
+	sub r4,r4,r5
+	add r4,r4,r8
+	xor.f 0,r10,r4
+	bmi .Linf_denorm
+	and r12,r4,r9
+	breq r12,0,.Ldenorm
+	sub_s r2,r2,r3 ; discard implicit 1
+.Ldiv_23bit:
+	.rep 6
+	divaw r2,r2,r3
+	.endr
+	breq r12,r9,.Linf
+	bmsk r0,r2,6
+	xor_s r2,r2,r0
+.Ldiv_17bit:
+	.rep 7
+	divaw r2,r2,r3
+	.endr
+	asl_s r0,r0,7
+	bmsk r1,r2,6
+	xor_s r2,r2,r1
+	or_s r0,r0,r1
+.Ldiv_10bit:
+	.rep 7
+	divaw r2,r2,r3
+	.endr
+	asl_s r0,r0,7
+	bmsk r1,r2,6
+	xor_s r2,r2,r1
+	or_s r0,r0,r1
+.Ldiv_3bit:
+	.rep 3
+	divaw r2,r2,r3
+	.endr
+	asl_s r0,r0,3
+.Ldiv_0bit:
+	divaw r1,r2,r3
+	bmsk_s r2,r2,2
+	tst r1,-0x7e ; 0xffffff82, test for rest or odd
+	bmsk_s r1,r1,0
+	add_s r0,r0,r2 ; assemble fraction
+	add_s r0,r0,r4 ; add in sign & exponent
+	j_s.d [blink]
+	add.ne r0,r0,r1 ; round to nearest / even
+
+	.balign 4
+.Linf_nan_fp0:
+	bic.f 0,r9,r1 ; fp1 Inf -> result NaN
+	bic r1,r5,r9  ; fp1 sign
+	sub.eq r1,r1,1
+	j_s.d [blink]
+	xor_s r0,r0,r1
+.Linf_nan_fp1:
+	bic r0,r4,r9 ; fp0 sign
+	bmsk.f 0,r1,22 ; x/inf -> 0, x/nan -> nan
+	xor.eq r1,r1,r9
+	j_s.d [blink]
+	xor_s r0,r0,r1
+.Linf:
+	j_s.d [blink]
+	or r0,r10,r9
+
+.Lret_r4:
+	j_s.d [blink]
+	mov_s r0,r4
+	.balign 4
+.Linf_denorm:
+	add.f r12,r4,r4
+	asr_l r12,r12,24
+	bpl .Linf
+	max r12,r12,-24
+.Ldenorm:
+	add r1,pcl,42; .Ldenorm_tab-.
+	ldb_s r12,[r12,r1]
+	mov_s r0,0
+	lsr_s r2,r2
+	sub_s r1,r1,r12
+	j_s.d [r1]
+	bic r4,r10,r9
+	.byte .Ldenorm_tab-.Lret_r4
+	.byte .Ldenorm_tab-.Ldiv_0bit
+	.byte .Ldenorm_tab-.Ldiv_3bit-8
+	.byte .Ldenorm_tab-.Ldiv_3bit-4
+	.byte .Ldenorm_tab-.Ldiv_3bit
+	.byte .Ldenorm_tab-.Ldiv_10bit-24
+	.byte .Ldenorm_tab-.Ldiv_10bit-20
+	.byte .Ldenorm_tab-.Ldiv_10bit-16
+	.byte .Ldenorm_tab-.Ldiv_10bit-12
+	.byte .Ldenorm_tab-.Ldiv_10bit-8
+	.byte .Ldenorm_tab-.Ldiv_10bit-4
+	.byte .Ldenorm_tab-.Ldiv_10bit
+	.byte .Ldenorm_tab-.Ldiv_17bit-24
+	.byte .Ldenorm_tab-.Ldiv_17bit-20
+	.byte .Ldenorm_tab-.Ldiv_17bit-16
+	.byte .Ldenorm_tab-.Ldiv_17bit-12
+	.byte .Ldenorm_tab-.Ldiv_17bit-8
+	.byte .Ldenorm_tab-.Ldiv_17bit-4
+	.byte .Ldenorm_tab-.Ldiv_17bit
+	.byte .Ldenorm_tab-.Ldiv_23bit-20
+	.byte .Ldenorm_tab-.Ldiv_23bit-16
+	.byte .Ldenorm_tab-.Ldiv_23bit-12
+	.byte .Ldenorm_tab-.Ldiv_23bit-8
+	.byte .Ldenorm_tab-.Ldiv_23bit-4
+.Ldenorm_tab:
+	.byte .Ldenorm_tab-.Ldiv_23bit
+	ENDFUNC(__divsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-df.c b/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-df.c
new file mode 100644
index 000000000..9142b4541
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-df.c
@@ -0,0 +1,161 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* We use a polynom similar to a Tchebycheff polynom to get an initial
+   seed, and then use a newton-raphson iteration step to get an
+   approximate result
+   If this result can't be rounded to the exact result with confidence, we
+   round to the value between the two closest representable values, and
+   test if the correctly rounded value is above or below this value.
+ 
+   Because of the Newton-raphson iteration step, an error in the seed at X
+   is amplified by X.  Therefore, we don't want a Tchebycheff polynom
+   or a polynom that is close to optimal according to the maximum norm
+   on the errro of the seed value; we want one that is close to optimal
+   according to the maximum norm on the error of the result, i.e. we
+   want the maxima of the polynom to increase linearily.
+   Given an interval [X0,X2) over which to approximate,
+   with X1 := (X0+X2)/2,  D := X1-X0, F := 1/D, and S := D/X1 we have,
+   like for Tchebycheff polynoms:
+   P(0) := 1
+   but then we have:
+   P(1) := X + S*D
+   P(2) := 2 * X^2 + S*D * X - D^2
+   Then again:
+   P(n+1) := 2 * X * P(n) - D^2 * P (n-1)
+ */
+
+static long double merr = 42.;
+
+double
+err (long double a0, long double a1, long double x)
+{
+  long double y0 = a0 + (x-1)*a1;
+
+  long double approx = 2. * y0 - y0 * x * y0;
+  long double true = 1./x;
+  long double err = approx - true;
+
+  if (err <= -1./65536./16384.)
+    printf ("ERROR EXCEEDS 1 ULP %.15f %.15f %.15f\n",
+	    (double)x, (double)approx, (double)true);
+  if (merr > err)
+    merr = err;
+  return err;
+}
+
+int
+main (void)
+{
+  long double T[5]; /* Taylor polynom */
+  long double P[5][5];
+  int i, j;
+  long double X0, X1, X2, S;
+  long double inc = 1./64;
+  long double D = inc*0.5;
+  long i0, i1, i2, io;
+
+  memset (P, 0, sizeof (P));
+  P[0][0] = 1.;
+  for (i = 1; i < 5; i++)
+    P[i][i] = 1 << i-1;
+  P[2][0] = -D*D;
+  for (X0 = 1.; X0 < 2.; X0 += inc)
+    {
+      X1 = X0 + inc * 0.5;
+      X2 = X0 + inc;
+      S = D / X1;
+      T[0] = 1./X1;
+      for (i = 1; i < 5; i++)
+	T[i] = T[i-1] * -T[0];
+#if 0
+      printf ("T %1.8f %f %f %f %f\n", (double)T[0], (double)T[1], (double)T[2],
+(double)T[3], (double)T[4]);
+#endif
+      P[1][0] = S*D;
+      P[2][1] = S*D;
+      for (i = 3; i < 5; i++)
+	{
+	  P[i][0] = -D*D*P[i-2][0];
+	  for (j = 1; j < i; j++)
+	    P[i][j] = 2*P[i-1][j-1]-D*D*P[i-2][j];
+	}
+#if 0
+      printf ("P3 %1.8f %f %f %f %f\n", (double)P[3][0], (double)P[3][1], (double)P[3][2],
+(double)P[3][3], (double)P[3][4]);
+      printf ("P4 %1.8f %f %f %f %f\n", (double)P[4][0], (double)P[4][1], (double)P[4][2],
+(double)P[4][3], (double)P[4][4]);
+#endif
+      for (i = 4; i > 1; i--)
+	{
+	  long double a = T[i]/P[i][i];
+
+	  for (j = 0; j < i; j++)
+	    T[j] -= a * P[i][j];
+	}
+#if 0
+      printf ("A %1.8f %f %f\n", (double)T[0], (double)T[1], (double)T[2]);
+#endif
+#if 0
+      i2 = T[2]*1024;
+      long double a = (T[2]-i/1024.)/P[2][2];
+      for (j = 0; j < 2; j++)
+	T[j] -= a * P[2][j];
+#else
+      i2 = 0;
+#endif
+	  long double T0, Ti1;
+      for (i = 0, i0 = 0; i < 4; i++)
+	{
+
+	  i1 = T[1]*4096. + i0 / (long double)(1 << 20) - 0.5;
+	  i1 = - (-i1 & 0x0fff);
+	  Ti1 = ((unsigned)(-i1 << 20) | i0) /-(long double)(1LL<<32LL);
+	  T0 = T[0] - (T[1]-Ti1)/P[1][1] * P[1][0] - (X1 - 1) * Ti1;
+	  i0 = T0 * 1024 * 1024 + 0.5;
+	  i0 &= 0xfffff;
+	}
+#if 0
+      printf ("A %1.8f %f %f\n", (double)T[0], (double)T[1], (double)T[2]);
+#endif
+      io = (unsigned)(-i1 << 20) | i0;
+      long double A1 = (unsigned)io/-65536./65536.;
+      long double A0 =  (unsigned)(io << 12)/65536./65536.;
+      long double Xm0 = 1./sqrt (-A1);
+      long double Xm1 = 0.5+0.5*-A0/A1;
+#if 0
+      printf ("%f %f %f %f\n", (double)A0, (double)A1, (double) Ti1, (double)X0);
+      printf ("%.12f %.12f %.12f\n",
+	      err (A0, A1, X0), err (A0, A1, X1), err (A0, A1, X2));
+      printf ("%.12f %.12f\n", (double)Xm0, (double)Xm1);
+      printf ("%.12f %.12f\n", err (A0, A1, Xm0), err (A0, A1, Xm1));
+#endif
+      printf ("\t.long 0x%x\n", io);
+   }
+#if 0
+  printf ("maximum error: %.15f %x %f\n", (double)merr, (unsigned)(long long)(-merr * 65536 * 65536), (double)log(-merr)/log(2));
+#endif
+  return 0;
+}
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-sf.c b/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-sf.c
new file mode 100644
index 000000000..ff0f08ba4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/divtab-arc-sf.c
@@ -0,0 +1,127 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* We use a polynom similar to a Tchebycheff polynom to get an initial
+   seed, and then use a newton-raphson iteration step to get an
+   approximate result
+   If this result can't be rounded to the exact result with confidence, we
+   round to the value between the two closest representable values, and
+   test if the correctly rounded value is above or below this value.
+ 
+   Because of the Newton-raphson iteration step, an error in the seed at X
+   is amplified by X.  Therefore, we don't want a Tchebycheff polynom
+   or a polynom that is close to optimal according to the maximum norm
+   on the errro of the seed value; we want one that is close to optimal
+   according to the maximum norm on the error of the result, i.e. we
+   want the maxima of the polynom to increase linearily.
+   Given an interval [X0,X2) over which to approximate,
+   with X1 := (X0+X2)/2,  D := X1-X0, F := 1/D, and S := D/X1 we have,
+   like for Tchebycheff polynoms:
+   P(0) := 1
+   but then we have:
+   P(1) := X + S*D
+   P(2) := 2 * X^2 + S*D * X - D^2
+   Then again:
+   P(n+1) := 2 * X * P(n) - D^2 * P (n-1)
+ */
+
+int
+main (void)
+{
+  long double T[5]; /* Taylor polynom */
+  long double P[5][5];
+  int i, j;
+  long double X0, X1, X2, S;
+  long double inc = 1./64;
+  long double D = inc*0.5;
+  long i0, i1, i2;
+
+  memset (P, 0, sizeof (P));
+  P[0][0] = 1.;
+  for (i = 1; i < 5; i++)
+    P[i][i] = 1 << i-1;
+  P[2][0] = -D*D;
+  for (X0 = 1.; X0 < 2.; X0 += inc)
+    {
+      X1 = X0 + inc * 0.5;
+      X2 = X1 + inc;
+      S = D / X1;
+      T[0] = 1./X1;
+      for (i = 1; i < 5; i++)
+	T[i] = T[i-1] * -T[0];
+#if 0
+      printf ("T %1.8f %f %f %f %f\n", (double)T[0], (double)T[1], (double)T[2],
+(double)T[3], (double)T[4]);
+#endif
+      P[1][0] = S*D;
+      P[2][1] = S*D;
+      for (i = 3; i < 5; i++)
+	{
+	  P[i][0] = -D*D*P[i-2][0];
+	  for (j = 1; j < i; j++)
+	    P[i][j] = 2*P[i-1][j-1]-D*D*P[i-2][j];
+	}
+#if 0
+      printf ("P3 %1.8f %f %f %f %f\n", (double)P[3][0], (double)P[3][1], (double)P[3][2],
+(double)P[3][3], (double)P[3][4]);
+      printf ("P4 %1.8f %f %f %f %f\n", (double)P[4][0], (double)P[4][1], (double)P[4][2],
+(double)P[4][3], (double)P[4][4]);
+#endif
+      for (i = 4; i > 1; i--)
+	{
+	  long double a = T[i]/P[i][i];
+
+	  for (j = 0; j < i; j++)
+	    T[j] -= a * P[i][j];
+	}
+#if 0
+      printf ("A %1.8f %f %f\n", (double)T[0], (double)T[1], (double)T[2]);
+#endif
+#if 0
+      i2 = T[2]*512;
+      long double a = (T[2]-i/512.)/P[2][2];
+      for (j = 0; j < 2; j++)
+	T[j] -= a * P[2][j];
+#else
+      i2 = 0;
+#endif
+      for (i = 0, i0 = 0; i < 4; i++)
+	{
+	  long double T0, Ti1;
+
+	  i1 = T[1]*8192. + i0 / (long double)(1 << 19) - 0.5;
+	  i1 = - (-i1 & 0x1fff);
+	  Ti1 = ((unsigned)(-i1 << 19) | i0) /-(long double)(1LL<<32LL);
+	  T0 = T[0] - (T[1]-Ti1)/P[1][1] * P[1][0] - (X1 - 1) * Ti1;
+	  i0 = T0 * 512 * 1024 + 0.5;
+	  i0 &= 0x7ffff;
+	}
+#if 0
+      printf ("A %1.8f %f %f\n", (double)T[0], (double)T[1], (double)T[2]);
+#endif
+      printf ("\t.long 0x%x\n", (-i1 << 19) | i0);
+   }
+  return 0;
+}
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/eqdf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/eqdf2.S
new file mode 100644
index 000000000..10401534a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/eqdf2.S
@@ -0,0 +1,76 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: DBL0, DBL1
+   output: z flag
+   clobber: r12, flags
+   For NaNs, bit 19.. bit 30 of the high word must be set.  */
+#if 0 /* DEBUG */
+	.global __eqdf2
+	.balign 4
+	FUNC(__eqdf2)
+__eqdf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __eqdf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __eqdf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	breq.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jne_s [blink]
+	bl abort
+0:	jeq_s [blink]
+	bl abort
+	ENDFUNC(__eqdf2)
+#define __eqdf2 __eqdf2_asm
+#endif /* DEBUG */
+	.global __eqdf2
+	.balign 4
+	HIDDEN_FUNC(__eqdf2)
+	/* Good performance as long as the difference in high word is
+	   well predictable (as seen from the branch predictor).  */
+__eqdf2:
+	brne.d DBL0H,DBL1H,.Lhighdiff
+	bmsk r12,DBL0H,20
+#ifdef DPFP_COMPAT
+	or.f 0,DBL0L,DBL1L
+	bset.ne r12,r12,21
+#endif /* DPFP_COMPAT */
+	add1.f	r12,r12,DBL0H /* set c iff NaN; also, clear z if NaN.  */
+	j_s.d	[blink]
+	cmp.cc	DBL0L,DBL1L
+	.balign 4
+.Lhighdiff:
+	or	r12,DBL0H,DBL1H
+	or.f	0,DBL0L,DBL1L
+	j_s.d	[blink]
+	bmsk.eq.f r12,r12,30
+	ENDFUNC(__eqdf2)
+/* ??? could we do better by speeding up some 'common' case of inequality?  */
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/eqsf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/eqsf2.S
new file mode 100644
index 000000000..8a56132c1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/eqsf2.S
@@ -0,0 +1,69 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: z flag
+   clobber: r12, flags
+   For NaNs, bit 22 .. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __eqsf2
+	.balign 4
+	FUNC(__eqsf2)
+__eqsf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __eqsf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __eqsf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	breq.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jne_s [blink]
+	bl abort
+0:	jeq_s [blink]
+	bl abort
+	ENDFUNC(__eqsf2)
+#define __eqsf2 __eqsf2_asm
+#endif /* DEBUG */
+	/* Good performance as long as the binary difference is
+	   well predictable (as seen from the branch predictor).  */
+	.global __eqsf2
+	.balign 4
+	HIDDEN_FUNC(__eqsf2)
+__eqsf2:
+	breq	r0, r1,.Lno_bdiff
+	or	r12,r0,r1
+	j_s.d	[blink]
+	bmsk.f	0,r12,30
+.Lno_bdiff:
+	bmsk r12,r0,23
+	add1.f	r12,r12,r0 /* set c iff NaN; also, clear z if NaN.  */
+	j_s.d	[blink]
+	cmp.cc	r0,r1
+	ENDFUNC(__eqsf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/extendsfdf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/extendsfdf2.S
new file mode 100644
index 000000000..cf6c98d23
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/extendsfdf2.S
@@ -0,0 +1,122 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __extendsfdf2
+	.balign 4
+	FUNC(__extendsfdf2)
+__extendsfdf2:
+	push_s blink
+	bl.d __extendsfdf2_c
+	push_s r0
+	ld_s r2,[sp]
+	st_s r1,[sp]
+	push_s r0
+	bl.d __extendsfdf2_asm
+	mov_s r0,r2
+	pop_s r2
+	pop_s r3
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__extendsfdf2)
+#define __extendsfdf2 __extendsfdf2_asm
+#endif /* DEBUG */
+#if 0 /* ARC600 */
+__extendsfdf2:
+	lsr r2,r0,23
+	tst r2,0xff
+	bic.ne.f r2,0xff
+	beq_s .Linf_nan_denorm_0
+..
+.Linf_nan_denorm:
+	bbit1 r0,30,.Linf_nan
+#endif
+	.global __extendsfdf2
+	.balign 4
+	FUNC(__extendsfdf2)
+__extendsfdf2:
+	add.f r1,r0,r0
+	norm r3,r1
+#ifdef __LITTLE_ENDIAN__
+	lsr_s DBL0H,r1,4
+	brhs r3,7,.Linf_nan_denorm_0
+	asl_s DBL0L,r0,29
+	add_s DBL0H,DBL0H, \
+		0x38000000
+#else
+	lsr r2,r1,4
+	brhs r3,7,.Linf_nan_denorm_0
+	asl_s DBL0L,r1,28
+	add DBL0H,r2, \
+		0x38000000
+#endif
+	j_s.d [blink]
+	bxor.cs DBL0H,DBL0H,31
+	.balign 4
+.Linf_nan_denorm_0:
+#ifdef __LITTLE_ENDIAN__
+	mov_s DBL0H,r0
+	jeq.d [blink]
+	mov.eq DBL0L,0
+#else
+	jeq_s [blink]
+#endif
+	bmi .Linf_nan
+	asl_s r0,r0,r3
+	rsub r3,r3,0x380+6
+#ifdef __LITTLE_ENDIAN__
+	asl_s r3,r3,20
+	lsr DBL0H,r0,9
+	asl_s DBL0L,r0,23
+	add_s DBL0H,DBL0H,r3
+	j_s.d [blink]
+	bxor.cs DBL0H,DBL0H,31
+#else
+	asl DBL0L,r0,23
+	lsr_s DBL0H,r0,9
+	asl_s r3,r3,20
+	bxor.cs DBL0H,DBL0H,31
+	j_s.d [blink]
+	add_l DBL0H,DBL0H,r3
+#endif
+.Linf_nan:
+#ifdef __LITTLE_ENDIAN__
+	lsr DBL0H,r0,3
+
+	or_s DBL0H,DBL0H,r0
+	j_s.d [blink]
+	mov_l DBL0L,0
+#else
+	lsr r3,r0,3
+	mov_s DBL0L,0
+	j_s.d [blink]
+	or_l DBL0H,r0,r3
+#endif
+	ENDFUNC(__extendsfdf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/fixdfsi.S b/gcc-4.9/libgcc/config/arc/ieee-754/fixdfsi.S
new file mode 100644
index 000000000..82c2c02b8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/fixdfsi.S
@@ -0,0 +1,85 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	FUNC(__fixdfsi)
+	.global __fixdfsi
+	.balign 4
+__fixdfsi:
+	push_s blink
+	push_s r0
+	bl.d __fixdfsi_c
+	push_s r1
+	mov_s r2,r0
+	pop_s r1
+	ld r0,[sp]
+	bl.d __fixdfsi_asm
+	st r2,[sp]
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__fixdfsi)
+#define __fixdfsi __fixdfsi_asm
+#endif /* DEBUG */
+
+/*      If the fraction has to be shifted left by a positive non-zero amount,
+        we have to combine bits from DBL0L and DBL0H.  If we shift right,
+        or shift by zero, we only want to have the bits from DBL0H in r0.  */
+
+	.global __fixdfsi
+	FUNC(__fixdfsi)
+	.balign 4
+__fixdfsi:
+	bbit0 DBL0H,30,.Lret0or1
+	asr r2,DBL0H,20
+	bmsk_s DBL0H,DBL0H,19
+	sub_s r2,r2,19; 0x3ff+20-0x400
+	neg_s r3,r2
+	asr.f 0,r3,11
+	bset_s DBL0H,DBL0H,20
+#ifdef __LITTLE_ENDIAN__
+	mov.cs DBL0L,DBL0H
+	asl DBL0H,DBL0H,r2
+#else
+	asl.cc DBL0H,DBL0H,r2
+	lsr.cs DBL0H,DBL0H,r3
+#endif
+	lsr_s DBL0L,DBL0L,r3
+
+	add.cc r0,r0,r1
+	j_s.d [blink]
+	neg.pl r0,r0
+.Lret0or1:
+	add.f r0,DBL0H,0x100000
+	lsr_s r0,r0,30
+
+	bmsk_s r0,r0,0
+	j_s.d [blink]
+	neg.mi r0,r0
+	ENDFUNC(__fixdfsi)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/fixsfsi.S b/gcc-4.9/libgcc/config/arc/ieee-754/fixsfsi.S
new file mode 100644
index 000000000..56ab2fd09
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/fixsfsi.S
@@ -0,0 +1,71 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __fixsfsi
+	FUNC(__fixsfsi)
+	.balign 4
+__fixsfsi:
+	push_s blink
+	bl.d __fixsfsi_c
+	push_s r0
+	ld_s r1,[sp]
+	st_s r0,[sp]
+	bl.d __fixsfsi_asm
+	mov_s r0,r1
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__fixsfsi)
+#define __fixsfsi __fixsfsi_asm
+#endif /* DEBUG */
+
+	.global __fixsfsi
+	FUNC(__fixsfsi)
+	.balign 4
+__fixsfsi:
+	bbit0 r0,30,.Lret0or1
+	lsr r2,r0,23
+	bmsk_s r0,r0,22
+	bset_s r0,r0,23
+	sub_s r2,r2,22;0x7f+23-0x80
+	asl.f 0,r2,24
+	neg r3,r2
+	asl.mi r0,r0,r2
+	lsr.pl r0,r0,r3
+	j_s.d [blink]
+	neg.cs r0,r0
+.Lret0or1:
+	add.f r0,r0,0x800000
+	lsr_s r0,r0,30
+
+	bmsk_s r0,r0,0
+	j_s.d [blink]
+	neg.mi r0,r0
+	ENDFUNC(__fixsfsi)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/fixunsdfsi.S b/gcc-4.9/libgcc/config/arc/ieee-754/fixunsdfsi.S
new file mode 100644
index 000000000..13af5dc6e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/fixunsdfsi.S
@@ -0,0 +1,80 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	FUNC(__fixunsdfsi)
+	.global __fixunsdfsi
+	.balign 4
+__fixunsdfsi:
+	push_s blink
+	push_s r0
+	bl.d __fixunsdfsi_c
+	push_s r1
+	mov_s r2,r0
+	pop_s r1
+	ld r0,[sp]
+	bl.d __fixunsdfsi_asm
+	st r2,[sp]
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__fixunsdfsi)
+#define __fixunsdfsi __fixunsdfsi_asm
+#endif /* DEBUG */
+
+	.global __fixunsdfsi
+	FUNC(__fixunsdfsi)
+	.balign 4
+__fixunsdfsi:
+	bbit0 DBL0H,30,.Lret0or1
+	lsr r2,DBL0H,20
+	bmsk_s DBL0H,DBL0H,19
+	sub_s r2,r2,19; 0x3ff+20-0x400
+	neg_s r3,r2
+	btst_s r3,10
+	bset_s DBL0H,DBL0H,20
+#ifdef __LITTLE_ENDIAN__
+	mov.ne DBL0L,DBL0H
+	asl DBL0H,DBL0H,r2
+#else
+	asl.eq DBL0H,DBL0H,r2
+	lsr.ne DBL0H,DBL0H,r3
+#endif
+	lsr DBL0L,DBL0L,r3
+	j_s.d [blink]
+	add.eq r0,r0,r1
+.Lret0:
+	j_s.d [blink]
+	mov_l r0,0
+.Lret0or1:
+	add_s DBL0H,DBL0H,0x100000
+	lsr_s DBL0H,DBL0H,30
+	j_s.d [blink]
+	bmsk_l r0,DBL0H,0
+	ENDFUNC(__fixunsdfsi)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/floatsidf.S b/gcc-4.9/libgcc/config/arc/ieee-754/floatsidf.S
new file mode 100644
index 000000000..2e2363aeb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/floatsidf.S
@@ -0,0 +1,77 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __floatsidf
+	.balign 4
+	FUNC(__floatsidf)
+__floatsidf:
+	push_s blink
+	bl.d __floatsidf_c
+	push_s r0
+	ld_s r2,[sp]
+	st_s r1,[sp]
+	push_s r0
+	bl.d __floatsidf_asm
+	mov_s r0,r2
+	pop_s r2
+	pop_s r3
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__floatsidf)
+#define __floatsidf __floatsidf_asm
+#endif /* DEBUG */
+
+	.global __floatsidf
+	.balign 4
+	FUNC(__floatsidf)
+__floatsidf:
+	abs.f r1,r0
+	jeq_s [blink]
+	lsr r2,r1
+	mov r12,-0x41d ; -(0x3ff+31-1)
+	norm r2,r2
+	bclr.cs r12,r12,11
+	rsub.f r3,r2,11
+	add_s r12,r2,r12
+	add_s r2,r2,21
+#ifdef __LITTLE_ENDIAN__
+	asl DBL0L,r1,r2
+	lsr_s DBL0H,r1,r3
+#else
+	lsr DBL0H,r1,r3
+	asl_s DBL0L,r1,r2
+#endif
+	asl_s r12,r12,20
+	mov.lo DBL0H,DBL0L
+	sub_s DBL0H,DBL0H,r12
+	j_s.d [blink]
+	mov.ls DBL0L,0
+	ENDFUNC(__floatsidf)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/floatsisf.S b/gcc-4.9/libgcc/config/arc/ieee-754/floatsisf.S
new file mode 100644
index 000000000..0e35fe06a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/floatsisf.S
@@ -0,0 +1,99 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __floatsisf
+	FUNC(__floatsisf)
+	.balign 4
+__floatsisf:
+	push_s blink
+	bl.d __floatsisf_c
+	push_s r0
+	ld_s r1,[sp]
+	st_s r0,[sp]
+	bl.d __floatsisf_asm
+	mov_s r0,r1
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__floatsisf)
+	.global __floatunsisf
+	FUNC(__floatunsisf)
+	.balign 4
+__floatunsisf:
+	push_s blink
+	bl.d __floatunsisf_c
+	push_s r0
+	ld_s r1,[sp]
+	st_s r0,[sp]
+	bl.d __floatunsisf_asm
+	mov_s r0,r1
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__floatunsisf)
+#define __floatsisf __floatsisf_asm
+#define __floatunsisf __floatunsisf_asm
+#endif /* DEBUG */
+
+	.global __floatunsisf
+	.global __floatsisf
+	FUNC(__floatsisf)
+	FUNC(__floatunsisf)
+	.balign 4
+__floatunsisf:
+	lsr_s r2,r0
+	mov_l r12,0x9d ; 0x7f + 31 - 1
+	norm r2,r2
+	brne_l r0,0,0f
+	j_s [blink]
+	.balign 4
+__floatsisf:
+	abs.f r0,r0
+	jeq_s [blink]
+	lsr_s r2,r0
+	mov_s r12,0x9d ; 0x7f + 31 - 1
+	norm r2,r2
+	bset.cs r12,r12,8
+0:	rsub.f r3,r2,8
+	bmsk r1,r0,r3
+	ror r1,r1,r3
+	lsr.pl r0,r0,r3
+	neg_s r3,r3
+	asl.mi r0,r0,r3
+	sub_s r12,r12,r2
+	asl_s r12,r12,23
+	bxor.pl.f r1,r1,31
+	add_s r0,r0,r12
+	j_s.d [blink]
+	add.pnz r0,r0,1
+	ENDFUNC(__floatunsisf)
+	ENDFUNC(__floatsisf)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/floatunsidf.S b/gcc-4.9/libgcc/config/arc/ieee-754/floatunsidf.S
new file mode 100644
index 000000000..4bdb965bc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/floatunsidf.S
@@ -0,0 +1,75 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __floatunsidf
+	.balign 4
+	FUNC(__floatunsidf)
+__floatunsidf:
+	push_s blink
+	bl.d __floatunsidf_c
+	push_s r0
+	ld_s r2,[sp]
+	st_s r1,[sp]
+	push_s r0
+	bl.d __floatunsidf_asm
+	mov_s r0,r2
+	pop_s r2
+	pop_s r3
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	bl abort
+	ENDFUNC(__floatunsidf)
+#define __floatunsidf __floatunsidf_asm
+#endif /* DEBUG */
+
+	.global __floatunsidf
+	.balign 4
+	FUNC(__floatunsidf)
+__floatunsidf:
+	lsr_s r1,r0
+	breq_s r0,0,.Lret0
+	norm r2,r1
+	mov r12,-0x41d ; -(0x3ff+31-1)
+	rsub.f r3,r2,11
+	add_s r12,r2,r12
+	add_s r2,r2,21
+#ifdef __LITTLE_ENDIAN__
+	lsr DBL0H,r0,r3
+	asl_s DBL0L,r0,r2
+#else
+	asl DBL0L,r0,r2
+	lsr_s DBL0H,r0,r3
+#endif
+	asl_s r12,r12,20
+	mov.lo DBL0H,DBL0L
+	sub_s DBL0H,DBL0H,r12
+.Lret0:	j_s.d [blink]
+	mov.ls DBL0L,0
+	ENDFUNC(__floatunsidf)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/gedf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/gedf2.S
new file mode 100644
index 000000000..72b71af5c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/gedf2.S
@@ -0,0 +1,86 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: DBL0, DBL1
+   output: c flags to be used for 'hs' condition
+   clobber: r12, flags  */
+/* For NaNs, bit 19.. bit 30 of the high word must be set.  */
+#if 0 /* DEBUG */
+	.global __gedf2
+	.balign 4
+	FUNC(__gedf2)
+__gedf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __gedf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __gedf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brge.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jlo [blink]
+	bl abort
+0:	jhs [blink]
+	bl abort
+	ENDFUNC(__gedf2)
+#define __gedf2 __gedf2_asm
+#endif /* DEBUG */
+	.global __gedf2
+	.balign	4
+	HIDDEN_FUNC(__gedf2)
+__gedf2:
+	or.f	r12,DBL0H,DBL1H
+	bmi.d	.Lneg
+	bmsk_s	r12,r12,20
+	add1.f	0,r12,DBL0H	; clear z; set c iff NaN
+	add1.cc.f r12,r12,DBL1H	; clear z; set c iff NaN
+	bbit1	DBL0H,31,.Lneg
+	cmp.cc	DBL0H,DBL1H
+	j_s.d	[blink]
+	cmp.eq	DBL0L,DBL1L
+	.balign 4
+.Lneg:	breq.d	DBL1H,0,.L0
+	add1.f	0,r12,DBL0H
+	add1.cc.f r12,r12,DBL1H
+	cmp.cc	DBL1H,DBL0H
+	j_s.d	[blink]
+	cmp.eq	DBL1L,DBL0L
+	.balign 4
+.L0:
+	bxor.f	0,DBL0H,31 ; check for high word of -0.
+	beq_s	.Lcheck_0
+	cmp.cc	DBL1H,DBL0H
+	j_s.d	[blink]
+	cmp.eq	DBL1L,DBL0L
+.Lcheck_0:
+	; high words suggest DBL0 may be -0, DBL1 +0; check low words.
+	cmp_s	DBL1H,DBL0L
+	j_s.d	[blink]
+	cmp.cc	DBL1H,DBL1L
+	ENDFUNC(__gedf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/gesf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/gesf2.S
new file mode 100644
index 000000000..896901acd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/gesf2.S
@@ -0,0 +1,75 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: c flag to be used for 'hs' condition
+   clobber: r12,flags  */
+/* For NaNs, bit 22.. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __gesf2
+	.balign 4
+	FUNC(__gesf2)
+__gesf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __gesf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __gesf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brge.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jlo [blink]
+	bl abort
+0:	jhs [blink]
+	bl abort
+	ENDFUNC(__gesf2)
+#define __gesf2 __gesf2_asm
+#endif /* DEBUG */
+	.global __gesf2
+	.balign	4
+	HIDDEN_FUNC(__gesf2)
+__gesf2:
+	or.f	r12,r0,r1
+	bmi.d	.Lneg
+	bmsk_s	r12,r12,23
+	add1.f	0,r12,r0 ; check for NaN
+	add1.cc.f r12,r12,r1
+	j_s.d	[blink]
+	cmp.cc	r0,r1
+	.balign	4
+.Lneg:	breq.d	r1,0,.L0
+	add1.f	0,r12,r0 ; check for NaN
+	add1.cc.f r12,r12,r1
+	j_s.d	[blink]
+	cmp.cc r1,r0
+	.balign	4
+.L0:	bxor.f	0,r0,31 ; check for -0
+	j_s.d	[blink]
+	cmp.hi	r1,r0
+	ENDFUNC(__gesf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/gtdf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/gtdf2.S
new file mode 100644
index 000000000..56c2a292e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/gtdf2.S
@@ -0,0 +1,86 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: DBL0, DBL1
+   output: c,z flags to be used for 'hi' condition
+   clobber: r12, flags  */
+/* For NaNs, bit 19.. bit 30 of the high word must be set.  */
+#if 0 /* DEBUG */
+	.global __gtdf2
+	.balign 4
+	FUNC(__gtdf2)
+__gtdf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __gtdf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __gtdf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brgt.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jls [blink]
+	bl abort
+0:	jhi [blink]
+	bl abort
+	ENDFUNC(__gtdf2)
+#define __gtdf2 __gtdf2_asm
+#endif /* DEBUG */
+	.global __gtdf2
+	.balign	4
+	HIDDEN_FUNC(__gtdf2)
+__gtdf2:
+	or.f	r12,DBL0H,DBL1H
+	bmi.d	.Lneg
+	bmsk_s	r12,r12,20
+	add1.f	0,r12,DBL0H	; clear z; set c iff NaN
+	add1.cc.f r12,r12,DBL1H	; clear z; set c iff NaN
+	; don't care: z may or may not be cleared if there is no NaN event
+	cmp.cc	DBL0H,DBL1H
+	j_s.d	[blink]
+	cmp.eq	DBL0L,DBL1L
+	.balign 4
+.Lneg:	breq.d	DBL0H,0,.L0
+	add1.f	0,r12,DBL1H
+	add1.cc.f r12,r12,DBL0H
+	cmp.cc	DBL1H,DBL0H
+	j_s.d	[blink]
+	cmp.eq	DBL1L,DBL0L
+	.balign 4
+.L0:
+	bxor.f	0,DBL1H,31
+	beq_s	.Lcheck_0
+	cmp.cc	DBL1H,DBL0H
+	j_s.d	[blink]
+	cmp.eq	DBL1L,DBL0L
+	.balign	4
+.Lcheck_0:
+	; high words suggest DBL0 may be +0, DBL1 -0; check low words.
+	j_s.d	[blink]
+	or.f	0,DBL0L,DBL1L
+	ENDFUNC(__gtdf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/gtsf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/gtsf2.S
new file mode 100644
index 000000000..6253d06ee
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/gtsf2.S
@@ -0,0 +1,75 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: c, z flags to be used for 'hi' condition
+   clobber: r12,flags  */
+/* For NaNs, bit 22.. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __gtsf2
+	.balign 4
+	FUNC(__gtsf2)
+__gtsf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __gtsf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __gtsf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brgt.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jls [blink]
+	bl abort
+0:	jhi [blink]
+	bl abort
+	ENDFUNC(__gtsf2)
+#define __gtsf2 __gtsf2_asm
+#endif /* DEBUG */
+	.global __gtsf2
+	.balign	4
+	HIDDEN_FUNC(__gtsf2)
+__gtsf2:
+	or.f	r12,r0,r1
+	bmi.d	.Lneg
+	bmsk_s	r12,r12,23
+	add1.f	0,r12,r0 ; check for NaN
+	add1.cc.f r12,r12,r1
+	j_s.d	[blink]
+	cmp.cc	r0,r1
+	.balign	4
+.Lneg:	breq.d	r0,0,.L0
+	add1.f	0,r12,r0 ; check for NaN
+	add1.cc.f r12,r12,r1
+	j_s.d	[blink]
+	cmp.cc r1,r0
+	.balign	4
+.L0:	bxor.f	0,r1,31 ; check for -0
+	j_s.d	[blink]
+	cmp.hi	r1,r0
+	ENDFUNC(__gtsf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/muldf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/muldf3.S
new file mode 100644
index 000000000..7826fe75f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/muldf3.S
@@ -0,0 +1,235 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* XMAC schedule: directly back-to-back multiplies stall; the third
+   instruction after a multiply stalls unless it is also a multiply.  */
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	push_s blink
+	push_s r2
+	push_s r3
+	push_s r0
+	bl.d __muldf3_c
+	push_s r1
+	ld_s r2,[sp,12]
+	ld_s r3,[sp,8]
+	st_s r0,[sp,12]
+	st_s r1,[sp,8]
+	pop_s r1
+	bl.d __muldf3_asm
+	pop_s r0
+	pop_s r3
+	pop_s r2
+	pop_s blink
+	cmp r0,r2
+	cmp.eq r1,r3
+	jeq_s [blink]
+	b abort
+#define __muldf3 __muldf3_asm
+#endif /* DEBUG */
+/* N.B. This is optimized for ARC700.
+  ARC600 has very different scheduling / instruction selection criteria.  */
+/* For the standard multiplier, instead of mpyu rx,DBL0L,DBL1L; tst rx,rx  ,
+   we can do:
+   sub rx,DBL0L,1; bic rx,DBL0L,rx; lsr rx,rx; norm rx,rx; asl.f 0,DBL1L,rx  */
+
+__muldf3_support: /* This label makes debugger output saner.  */
+/* If one number is denormal, subtract some from the exponent of the other
+   one (if the other exponent is too small, return 0), and normalize the
+   denormal.  Then re-run the computation.  */
+	.balign 4
+	FUNC(__muldf3)
+.Ldenorm_dbl0:
+	mov_s r12,DBL0L
+	mov_s DBL0L,DBL1L
+	mov_s DBL1L,r12
+	mov_s r12,DBL0H
+	mov_s DBL0H,DBL1H
+	mov_s DBL1H,r12
+	and r11,DBL0H,r9
+.Ldenorm_dbl1:
+	brhs r11,r9,.Linf_nan
+	brhs 0x3ca00001,r11,.Lret0
+	sub_s DBL0H,DBL0H,DBL1H
+	bmsk_s DBL1H,DBL1H,30
+	add_s DBL0H,DBL0H,DBL1H
+	breq_s DBL1H,0,.Ldenorm_2
+	norm r12,DBL1H
+
+	sub_s r12,r12,10
+	asl r5,r12,20
+	asl_s DBL1H,DBL1H,r12
+	sub DBL0H,DBL0H,r5
+	neg r5,r12
+	lsr r6,DBL1L,r5
+	asl_s DBL1L,DBL1L,r12
+	b.d __muldf3
+	add_s DBL1H,DBL1H,r6
+
+	.balign 4
+.Linf_nan:
+	bclr r12,DBL1H,31
+	xor_s DBL1H,DBL1H,DBL0H
+	bclr_s DBL0H,DBL0H,31
+	max r8,DBL0H,r12 ; either NaN -> NaN ; otherwise inf
+	or.f 0,DBL0H,DBL0L
+	mov_s DBL0L,0
+	or.ne.f DBL1L,DBL1L,r12
+	not_s DBL0H,DBL0L ; inf * 0 -> NaN
+	mov.ne DBL0H,r8
+	tst_s DBL1H,DBL1H
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+.Lret0:	xor_s DBL0H,DBL0H,DBL1H
+	bclr DBL1H,DBL0H,31
+	xor_s DBL0H,DBL0H,DBL1H
+	j_s.d [blink]
+	mov_l DBL0L,0
+
+	.balign 4
+.Ldenorm_2:
+	breq_s DBL1L,0,.Lret0 ; 0 input -> 0 output
+	norm.f r12,DBL1L
+
+	mov.mi r12,21
+	add.pl r12,r12,22
+	neg r11,r12
+	asl_s r12,r12,20
+	lsr.f DBL1H,DBL1L,r11
+	ror DBL1L,DBL1L,r11
+	sub_s DBL0H,DBL0H,r12
+	mov.eq DBL1H,DBL1L
+	sub_s DBL1L,DBL1L,DBL1H
+	/* Fall through.  */
+	.global __muldf3
+	.balign 4
+__muldf3:
+	ld.as r9,[pcl,0x4b] ; ((.L7ff00000-.+2)/4)]
+	mpyhu r4,DBL0L,DBL1L
+	bmsk r6,DBL0H,19
+	bset r6,r6,20
+	mpyu r7,r6,DBL1L
+	and r11,DBL0H,r9
+	breq r11,0,.Ldenorm_dbl0
+	mpyhu r8,r6,DBL1L
+	bmsk r10,DBL1H,19
+	bset r10,r10,20
+	mpyhu r5,r10,DBL0L
+	add.f r4,r4,r7
+	and r12,DBL1H,r9
+	mpyhu r7,r6,r10
+	breq r12,0,.Ldenorm_dbl1
+	adc.f r5,r5,r8
+	mpyu r8,r10,DBL0L
+	breq r11,r9,.Linf_nan
+	breq r12,r9,.Linf_nan
+	mpyu r6,r6,r10
+	add.cs r7,r7,1
+	add.f r4,r4,r8
+	mpyu r10,DBL1L,DBL0L
+	bclr r8,r9,30 ; 0x3ff00000
+	adc.f r5,r5,r6
+	; XMAC write-back stall / std. mult stall is one cycle later
+	bclr r6,r9,20 ; 0x7fe00000
+	add.cs r7,r7,1 ; fraction product in r7:r5:r4
+	tst r10,r10
+	bset.ne r4,r4,0 ; put least significant word into sticky bit
+	lsr.f r10,r7,9
+	add_l r12,r12,r11 ; add exponents
+	rsub.eq r8,r8,r9 ; 0x40000000
+	sub r12,r12,r8 ; subtract bias + implicit 1
+	brhs.d r12,r6,.Linf_denorm
+	rsub r10,r10,12
+.Lshift_frac:
+	neg r8,r10
+	asl r6,r4,r10
+	lsr DBL0L,r4,r8
+	add.f 0,r6,r6
+	btst.eq DBL0L,0
+	cmp.eq r4,r4 ; round to nearest / round to even
+	asl r4,r5,r10
+	lsr r5,r5,r8
+	adc.f DBL0L,DBL0L,r4
+	xor.f 0,DBL0H,DBL1H
+	asl r7,r7,r10
+	add_s r12,r12,r5
+	adc DBL0H,r12,r7
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+
+/* We have checked for infinity / NaN input before, and transformed
+   denormalized inputs into normalized inputs.  Thus, the worst case
+   exponent overflows are:
+       1 +     1 - 0x400 == 0xc02 : maximum underflow
+   0x7fe + 0x7fe - 0x3ff == 0xbfd ; maximum overflow
+   N.B. 0x7e and 0x7f are also values for overflow.
+
+   If (r12 <= -54), we have an underflow to zero.  */
+	.balign 4
+.Linf_denorm:
+	brlo r12,0xc0000000,.Linf
+	asr r6,r12,20
+	mov_s r12,0
+	add.f r10,r10,r6
+	brgt r10,0,.Lshift_frac
+	beq_s .Lround_frac
+	add.f r10,r10,32
+.Lshift32_frac:
+	tst r4,r4
+	mov r4,r5
+	bset.ne r4,r4,1
+	mov r5,r7
+	mov r7,0
+	brge r10,1,.Lshift_frac
+	breq r10,0,.Lround_frac
+	add.f r10,r10,32
+	brgt r10,21,.Lshift32_frac
+	b_s .Lret0
+
+.Lround_frac:
+	add.f 0,r4,r4
+	btst.eq r5,0
+	mov_s DBL0L,r5
+	mov_s DBL0H,r7
+	adc.eq.f DBL0L,DBL0L,0
+	j_s.d [blink]
+
+	adc.eq DBL0H,DBL0H,0
+
+.Linf:	xor.f DBL1H,DBL1H,DBL0H
+	mov_s DBL0L,0
+	mov_s DBL0H,r9
+	j_s.d [blink]
+	bset.mi DBL0H,DBL0H,31
+	ENDFUNC(__muldf3)
+
+	.balign 4
+.L7ff00000:
+	.long 0x7ff00000
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/mulsf3.S b/gcc-4.9/libgcc/config/arc/ieee-754/mulsf3.S
new file mode 100644
index 000000000..4bd82f49c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/mulsf3.S
@@ -0,0 +1,180 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* XMAC schedule: directly back-to-back multiplies stall; the third
+   instruction after a multiply stalls unless it is also a multiply.  */
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	.global __mulsf3
+	FUNC(__mulsf3)
+	.balign 4
+__mulsf3:
+	push_s blink
+	push_s r1
+	bl.d __mulsf3_c
+	push_s r0
+	ld_s r1,[sp,4]
+	st_s r0,[sp,4]
+	bl.d __mulsf3_asm
+	pop_s r0
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	and r12,r0,r1
+	bic.f 0,0x7f800000,r12
+	bne 0f
+	bmsk.f 0,r0,22
+	bmsk.ne.f r1,r1,22
+	jne_s [blink] ; both NaN -> OK
+0:	bl abort
+	ENDFUNC(__mulsf3)
+#define __mulsf3 __mulsf3_asm
+#endif /* DEBUG */
+
+	.balign	4
+	.global	__mulsf3
+	FUNC(__mulsf3)
+__mulsf3:
+	ld.as	r9,[pcl,79]; [pcl,((.L7f800000-.+2)/4)]
+	bmsk	r4,r1,22
+	bset	r2,r0,23
+	asl_s	r2,r2,8
+	bset	r3,r4,23
+	mpyhu	r6,r2,r3
+	and	r11,r0,r9
+	breq	r11,0,.Ldenorm_dbl0
+	mpyu	r7,r2,r3
+	breq	r11,r9,.Linf_nan_dbl0
+	and	r12,r1,r9
+	asl.f	0,r6,8
+	breq	r12,0,.Ldenorm_dbl1
+.Lpast_denorm:
+	xor_s	r0,r0,r1
+.Lpast_denorm_dbl1:
+	add.pl	r6,r6,r6
+	bclr.pl	r6,r6,23
+	add.pl.f r7,r7,r7
+	ld.as	r4,[pcl,64]; [pcl,((.L7fffffff-.+2)/4)]
+	add.cs	r6,r6,1
+	lsr.f	0,r6,1
+	breq	r12,r9,.Linf_nan_dbl1
+	add_s	r12,r12,r11
+	adc.f	0,r7,r4
+	add_s	r12,r12, \
+		-0x3f800000
+	adc.f	r8,r6,r12
+	bic	r0,r0,r4
+	tst.pl	r8,r9
+	min	r3,r8,r9
+	jpnz.d	[blink]
+	add.pnz	r0,r0,r3
+; infinity or denormal number
+	add.ne.f r3,r3,r3
+	bpnz	.Linfinity
+	asr_s	r3,r3,23+1
+	bset	r6,r6,23
+	sub_s	r3,r3,1
+	neg_s	r2,r3
+	brhi	r2,24,.Lret_r0 ; right shift shift > 24 -> return +-0
+	lsr	r2,r6,r2
+	asl	r9,r6,r3
+	lsr.f	0,r2,1
+	tst	r7,r7
+	add_s	r0,r0,r2
+	bset.ne	r9,r9,0
+	adc.f	0,r9,r4
+	j_s.d	[blink]
+	add.cs	r0,r0,1
+.Linfinity:
+	j_s.d	[blink]
+	add_s	r0,r0,r9
+
+.Lret_r0: j_s [blink]
+
+	.balign	4
+.Linf_nan_dbl0:
+	sub_s	r2,r1,1 ; inf/nan * 0 -> nan; inf * nan -> nan (use |r2| >= inf)
+	bic.f	0,r9,r2
+	xor_s	r0,r0,r1
+	bclr_s	r1,r1,31
+	xor_s	r0,r0,r1
+	jne_s	[blink]
+.Lretnan:
+	j_s.d	[blink]
+	mov	r0,-1
+.Ldenorm_dbl0_inf_nan_dbl1:
+	bmsk.f	0,r0,30
+	beq_s	.Lretnan
+	xor_s	r0,r0,r1
+.Linf_nan_dbl1:
+	xor_s	r1,r1,r0
+	bclr_s	r1,r1,31
+	j_s.d	[blink]
+	xor_s	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl0:
+	bclr_s	r2,r2,31
+	norm.f	r4,r2
+	and	r12,r1,r9
+	add_s	r2,r2,r2
+	asl	r2,r2,r4
+	asl	r4,r4,23
+	mpyhu	r6,r2,r3
+	breq	r12,r9,.Ldenorm_dbl0_inf_nan_dbl1
+	sub.ne.f r12,r12,r4
+	mpyu	r7,r2,r3
+	bhi.d	.Lpast_denorm
+	asl.f	0,r6,8
+	xor_s	r0,r0,r1
+	bmsk	r1,r0,30
+	j_s.d	[blink]
+	bic_l	r0,r0,r1
+
+	.balign	4
+.Ldenorm_dbl1:
+	norm.f	r3,r4
+	xor_s	r0,r0,r1
+	sub_s	r3,r3,7
+	asl	r4,r4,r3
+	sub_s	r3,r3,1
+	asl_s	r3,r3,23
+	mpyhu	r6,r2,r4
+	sub.ne.f r11,r11,r3
+	bmsk	r8,r0,30
+	mpyu	r7,r2,r4
+	bhi.d	.Lpast_denorm_dbl1
+	asl.f	0,r6,8
+	j_s.d	[blink]
+	bic	r0,r0,r8
+
+	.balign	4
+.L7f800000:
+	.long	0x7f800000
+.L7fffffff:
+	.long	0x7fffffff
+	ENDFUNC(__mulsf3)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/orddf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/orddf2.S
new file mode 100644
index 000000000..5fcdf4cf9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/orddf2.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: c flag
+   clobber: r12, flags
+   For NaNs, bit 19 .. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __orddf2
+	.balign 4
+	FUNC(__orddf2)
+__orddf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __unorddf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __orddf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brne.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jcc [blink]
+	bl abort
+0:	jcs [blink]
+	bl abort
+	ENDFUNC(__orddf2)
+#define __orddf2 __orddf2_asm
+#endif /* DEBUG */
+	.global __orddf2
+	.balign 4
+	HIDDEN_FUNC(__orddf2)
+__orddf2:
+	bmsk r12,DBL0H,20
+	add1.f	r12,r12,DBL0H /* clear z; set c if NaN.  */
+	bmsk r12,DBL1H,20
+	j_s.d	[blink]
+	add1.cc.f r12,r12,DBL1H /* clear z; set c if NaN.  */
+	ENDFUNC(__orddf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/ordsf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/ordsf2.S
new file mode 100644
index 000000000..de764a164
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/ordsf2.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: c flag
+   clobber: r12, flags
+   For NaNs, bit 22 .. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __ordsf2
+	.balign 4
+	FUNC(__ordsf2)
+__ordsf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __unordsf2_c` push_s r0
+	mov r11,r0` pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __ordsf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	brne.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jcc [blink]
+	bl abort
+0:	jcs [blink]
+	bl abort
+	ENDFUNC(__ordsf2)
+#define __ordsf2 __ordsf2_asm
+#endif /* DEBUG */
+	.global __ordsf2
+	.balign 4
+	HIDDEN_FUNC(__ordsf2)
+__ordsf2:
+	bmsk r12,r0,23
+	add1.f	r12,r12,r0 /* clear z; set c if NaN.  */
+	bmsk r12,r1,23
+	j_s.d	[blink]
+	add1.cc.f r12,r12,r1 /* clear z; set c if NaN.  */
+	ENDFUNC(__ordsf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/truncdfsf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/truncdfsf2.S
new file mode 100644
index 000000000..87f40e486
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/truncdfsf2.S
@@ -0,0 +1,134 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+
+#if 0 /* DEBUG */
+	FUNC(__truncdfsf2)
+	.global __truncdfsf2
+	.balign 4
+__truncdfsf2:
+	push_s blink
+	push_s r0
+	bl.d __truncdfsf2_c
+	push_s r1
+	mov_s r2,r0
+	pop_s r1
+	ld r0,[sp]
+	bl.d __truncdfsf2_asm
+	st r2,[sp]
+	pop_s r1
+	pop_s blink
+	cmp r0,r1
+	jeq_s [blink]
+	and r12,r0,r1
+	bic.f 0,0x7f800000,r12
+	bne 0f
+	bmsk.f 0,r0,22
+	bmsk.ne.f r1,r1,22
+	jne_s [blink] ; both NaN -> OK
+0:	bl abort
+	ENDFUNC(__truncdfsf2)
+#define __truncdfsf2 __truncdfsf2_asm
+#endif /* DEBUG */
+
+	.global __truncdfsf2
+	.balign 4
+	FUNC(__truncdfsf2)
+__truncdfsf2:
+	lsr r2,DBL0H,20
+	asl_s DBL0H,DBL0H,12
+	sub r12,r2,0x380
+	bclr.f r3,r12,11
+	brhs r3,0xff,.Lill_exp
+	beq_l .Ldenorm0
+	asl_s r12,r12,23
+	tst DBL0L, \
+		0x2fffffff /* Check if msb guard bit wants rounding up.  */
+	lsr_s DBL0L,DBL0L,28
+	lsr_s DBL0H,DBL0H,8
+	add.ne DBL0L,DBL0L,1
+	add_s DBL0H,DBL0H,DBL0L
+	lsr_s DBL0H,DBL0H
+	btst_s r2,11
+	add_s r0,DBL0H,r12
+	j_s.d [blink]
+	bxor.ne r0,r0,31
+	.balign 4
+.Lill_exp:
+	bbit1 r2,10,.Linf_nan
+	bmsk_s r12,r12,9
+	rsub.f r12,r12,8+0x400-32 ; Go from 9 to 1 guard bit in MSW.  */
+	bhs_s .Lzero
+	lsr r3,DBL0L,21
+	rrc DBL0H,DBL0H ; insert leading 1
+	asl.f 0,DBL0L,8 ; check lower 24 guard bits
+	add_s r3,DBL0H,r3
+	add.pnz r3,r3,1 ; assemble fraction with compressed guard bits.
+	lsr r0,r3,r12
+	neg_s r12,r12
+	btst_s r0,1
+	asl.eq.f r3,r3,r12
+	add.ne r0,r0,1
+	btst_s r2,11
+	lsr_s r0,r0
+	j_s.d [blink]
+	bxor.ne r0,r0,31
+.Lzero:
+	lsr_s r2,r2,11
+	j_s.d [blink]
+	asl r0,r2,31
+.Ldenorm0:
+	asl_s r12,r12,20
+	tst DBL0L, \
+		0x5fffffff /* Check if msb guard bit wants rounding up.  */
+	lsr_s DBL0L,DBL0L,29
+	lsr_s DBL0H,DBL0H,9
+	add.ne DBL0L,DBL0L,1
+	bset_s DBL0H,DBL0H,23
+	add_s DBL0H,DBL0H,DBL0L
+	lsr_s DBL0H,DBL0H
+	j_s.d [blink]
+	add_l r0,DBL0H,r12
+
+/* We would generally say that NaNs must have a non-zero high fraction part,
+   but to allow hardware double precision floating point to interoperate
+   with single precision software floating point, we make an exception here.
+   The cost is to replace a tst_s DBL0H with an or.f DBL0L,DBL0L,DBL0H .
+   As we start out unaligned, and there is an odd number of other short insns,
+   we have a choice of letting this cost us a misalign penalty or
+   4 more bytes (if we align the code).  We choose the former here because
+   infinity / NaN is not expected to be prevalent in time-critical code.  */
+.Linf_nan:
+	or.f DBL0L,DBL0L,DBL0H
+	mov_s r0,1
+	add.ne r2,r2,1
+	tst r2,0x7ff
+	asl.ne r0,r0,23
+	btst_s r12,11
+	neg r0,r0
+	j_s.d [blink]
+	bxor.eq r0,r0,31
+	ENDFUNC(__truncdfsf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/uneqdf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/uneqdf2.S
new file mode 100644
index 000000000..3b9c7c902
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/uneqdf2.S
@@ -0,0 +1,73 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: DBL0, DBL1
+   output: z flag
+   clobber: r12, flags
+   For NaNs, bit 19.. bit 30 of the high word must be set.  */
+#if 0 /* DEBUG */
+	.global __uneqdf2
+	.balign 4
+	FUNC(__uneqdf2)
+__uneqdf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __eqdf2_c` push_s r0
+	push_s r0` ld_s r0, [sp,4]` ld_s r1, [sp,8]` ld_s r2,[sp,12]
+	bl.d __unorddf2_c` ld_s r3,[sp,16]
+	ld.ab r11,[sp,4]` tst r0,r0` mov.ne r11,0
+	pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __uneqdf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	breq.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jne_s [blink]
+	bl abort
+0:	jeq_s [blink]
+	bl abort
+	ENDFUNC(__uneqdf2)
+#define __uneqdf2 __uneqdf2_asm
+#endif /* DEBUG */
+	.global __uneqdf2
+	.balign 4
+	HIDDEN_FUNC(__uneqdf2)
+__uneqdf2:
+	cmp_s	DBL0H,DBL1H
+	cmp.eq	DBL0L,DBL1L
+	jeq_s	[blink]
+	or	r12,DBL0H,DBL1H
+	or.f	0,DBL0L,DBL1L
+	bclr.eq.f r12,r12,31
+	jeq_s	[blink]
+	mov_s	r12, \
+		0x7ff80000
+	bic.f	0,r12,DBL0H
+	j_s.d	[blink]
+	bic.ne.f r12,r12,DBL1H
+	ENDFUNC(__uneqdf2)
diff --git a/gcc-4.9/libgcc/config/arc/ieee-754/uneqsf2.S b/gcc-4.9/libgcc/config/arc/ieee-754/uneqsf2.S
new file mode 100644
index 000000000..b89d7494a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/ieee-754/uneqsf2.S
@@ -0,0 +1,69 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "arc-ieee-754.h"
+/* inputs: r0, r1
+   output: z flag
+   clobber: r12, flags
+   For NaNs, bit 22 .. bit 30 must be set.  */
+#if 0 /* DEBUG */
+	.global __uneqsf2
+	.balign 4
+	FUNC(__uneqsf2)
+__uneqsf2:
+	st.a r11,[sp,-4]` push_s blink` st.a r10,[sp,-4]` st.a r9,[sp,-4]
+	st.a r8,[sp,-4]` st.a r7,[sp,-4]` st.a r6,[sp,-4]` st.a r5,[sp,-4]
+	st.a r4,[sp,-4]` push_s r3` push_s r2` push_s r1`
+	bl.d __eqsf2_c` push_s r0
+	push_s r0` ld_s r0, [sp,4]
+	bl.d __unordsf2_c` ld_s r1,[sp,8]
+	ld.ab r11,[sp,4]` tst r0,r0` mov.ne r11,0
+	pop_s r0` pop_s r1` pop_s r2` pop_s r3
+	ld.ab r4,[sp,4]` ld.ab r5,[sp,4]` ld.ab r6,[sp,4]`
+	ld.ab r7,[sp,4]` ld.ab r8,[sp,4]` ld.ab r9,[sp,4]
+	bl.d __uneqsf2_asm` ld.ab r10,[sp,4]
+	pop_s blink
+	breq.d r11,0,0f
+	ld.ab r11,[sp,4]
+	jne_s [blink]
+	bl abort
+0:	jeq_s [blink]
+	bl abort
+	ENDFUNC(__uneqsf2)
+#define __uneqsf2 __uneqsf2_asm
+#endif /* DEBUG */
+	.global __uneqsf2
+	.balign 4
+	HIDDEN_FUNC(__uneqsf2)
+__uneqsf2:
+	mov_s	r12, \
+		0x7fc00000
+	bic.f	0,r12,r0
+	bic.ne.f r12,r12,r1
+	or	r12,r0,r1
+	bmsk.ne.f r12,r12,30
+	j_s.d	[blink]
+	cmp.ne	r0,r1
+	ENDFUNC(__uneqsf2)
diff --git a/gcc-4.9/libgcc/config/arc/initfini.c b/gcc-4.9/libgcc/config/arc/initfini.c
new file mode 100644
index 000000000..6db084ed3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/initfini.c
@@ -0,0 +1,157 @@
+/* .init/.fini section handling + C++ global constructor/destructor handling.
+   This file is based on crtstuff.c, sol2-crti.asm, sol2-crtn.asm.
+
+   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*  Declare a pointer to void function type.  */
+typedef void (*func_ptr) (void);
+
+#ifdef CRT_INIT
+
+/* NOTE:  In order to be able to support SVR4 shared libraries, we arrange
+   to have one set of symbols { __CTOR_LIST__, __DTOR_LIST__, __CTOR_END__,
+   __DTOR_END__ } per root executable and also one set of these symbols
+   per shared library.  So in any given whole process image, we may have
+   multiple definitions of each of these symbols.  In order to prevent
+   these definitions from conflicting with one another, and in order to
+   ensure that the proper lists are used for the initialization/finalization
+   of each individual shared library (respectively), we give these symbols
+   only internal (i.e. `static') linkage, and we also make it a point to
+   refer to only the __CTOR_END__ symbol in crtfini.o and the __DTOR_LIST__
+   symbol in crtinit.o, where they are defined.  */
+
+static func_ptr __CTOR_LIST__[1] __attribute__ ((section (".ctors")))
+     = { (func_ptr) (-1) };
+
+static func_ptr __DTOR_LIST__[1] __attribute__ ((section (".dtors")))
+     = { (func_ptr) (-1) };
+
+/* Run all the global destructors on exit from the program.  */
+ 
+/* Some systems place the number of pointers in the first word of the
+   table.  On SVR4 however, that word is -1.  In all cases, the table is
+   null-terminated.  On SVR4, we start from the beginning of the list and
+   invoke each per-compilation-unit destructor routine in order
+   until we find that null.
+
+   Note that this function MUST be static.  There will be one of these
+   functions in each root executable and one in each shared library, but
+   although they all have the same code, each one is unique in that it
+   refers to one particular associated `__DTOR_LIST__' which belongs to the
+   same particular root executable or shared library file.  */
+
+static void __do_global_dtors (void)
+asm ("__do_global_dtors") __attribute__ ((section (".text")));
+
+static void
+__do_global_dtors (void)
+{
+  func_ptr *p;
+  for (p = __DTOR_LIST__ + 1; *p; p++)
+    (*p) ();
+}
+
+/* .init section start.
+   This must appear at the start of the .init section.  */
+
+asm ("\n\
+	.section .init\n\
+	.global init\n\
+	.word 0\n\
+init:\n\
+	st blink,[sp,4]\n\
+	st fp,[sp]\n\
+	mov fp,sp\n\
+	sub sp,sp,16\n\
+");
+
+/* .fini section start.
+   This must appear at the start of the .init section.  */
+
+asm ("\n\
+	.section .fini\n\
+	.global fini\n\
+	.word 0\n\
+fini:\n\
+	st blink,[sp,4]\n\
+	st fp,[sp]\n\
+	mov fp,sp\n\
+	sub sp,sp,16\n\
+	bl.nd __do_global_dtors\n\
+");
+
+#endif /* CRT_INIT */
+
+#ifdef CRT_FINI
+
+/* Put a word containing zero at the end of each of our two lists of function
+   addresses.  Note that the words defined here go into the .ctors and .dtors
+   sections of the crtend.o file, and since that file is always linked in
+   last, these words naturally end up at the very ends of the two lists
+   contained in these two sections.  */
+
+static func_ptr __CTOR_END__[1] __attribute__ ((section (".ctors")))
+     = { (func_ptr) 0 };
+
+static func_ptr __DTOR_END__[1] __attribute__ ((section (".dtors")))
+     = { (func_ptr) 0 };
+
+/* Run all global constructors for the program.
+   Note that they are run in reverse order.  */
+
+static void __do_global_ctors (void)
+asm ("__do_global_ctors") __attribute__ ((section (".text")));
+
+static void
+__do_global_ctors (void)
+{
+  func_ptr *p;
+  for (p = __CTOR_END__ - 1; *p != (func_ptr) -1; p--)
+    (*p) ();
+}
+
+/* .init section end.
+   This must live at the end of the .init section.  */
+
+asm ("\n\
+	.section .init\n\
+	bl.nd __do_global_ctors\n\
+	ld blink,[fp,4]\n\
+	j.d blink\n\
+	ld.a fp,[sp,16]\n\
+");
+
+/* .fini section end.
+   This must live at the end of the .fini section.  */
+
+asm ("\n\
+	.section .fini\n\
+	ld blink,[fp,4]\n\
+	j.d blink\n\
+	ld.a fp,[sp,16]\n\
+");
+
+#endif /* CRT_FINI */
diff --git a/gcc-4.9/libgcc/config/arc/lib1funcs.S b/gcc-4.9/libgcc/config/arc/lib1funcs.S
new file mode 100644
index 000000000..65cfcab6b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/lib1funcs.S
@@ -0,0 +1,1418 @@
+; libgcc1 routines for Synopsys DesignWare ARC cpu.
+
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+		on behalf of Synopsys Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, if you link this library with other files,
+   some of which are compiled with GCC, to produce an executable,
+   this library does not by itself cause the resulting executable
+   to be covered by the GNU General Public License.
+   This exception does not however invalidate any other reasons why
+   the executable file might be covered by the GNU General Public License.  */
+
+ 
+ /* ANSI concatenation macros.  */
+ 
+ #define CONCAT1(a, b) CONCAT2(a, b)
+ #define CONCAT2(a, b) a ## b
+ 
+ /* Use the right prefix for global labels.  */
+ 
+ #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+ 
+#ifndef WORKING_ASSEMBLER
+#define abs_l abs
+#define asl_l asl
+#define mov_l mov
+#endif
+ 	
+#define FUNC(X)         .type SYM(X),@function
+#define HIDDEN_FUNC(X)	FUNC(X)` .hidden X
+#define ENDFUNC0(X)     .Lfe_##X: .size X,.Lfe_##X-X
+#define ENDFUNC(X)      ENDFUNC0(X)
+
+	
+	
+#ifdef  L_mulsi3
+	.section .text
+	.align 4
+
+	.global SYM(__mulsi3)
+SYM(__mulsi3):
+
+/* This the simple version.
+
+  while (a) 
+    {
+      if (a & 1)
+        r += b;
+      a >>= 1;
+      b <<= 1;
+    }
+*/
+
+#if defined (__ARC_MUL64__)
+	FUNC(__mulsi3)
+	mulu64 r0,r1
+	j_s.d [blink]
+	mov_s r0,mlo
+	ENDFUNC(__mulsi3)
+#elif defined (__ARC700__)
+	HIDDEN_FUNC(__mulsi3)
+	mpyu	r0,r0,r1
+	nop_s
+	j_s	[blink]
+	ENDFUNC(__mulsi3)
+#elif defined (__ARC_NORM__)
+	FUNC(__mulsi3)
+	norm.f	r2,r0
+	rsub	lp_count,r2,31
+	mov.mi	lp_count,32
+	mov_s	r2,r0
+	mov_s	r0,0
+	lpnz	@.Lend		; loop is aligned
+	lsr.f	r2,r2
+	add.cs	r0,r0,r1
+	add_s	r1,r1,r1
+.Lend:	j_s [blink]
+	ENDFUNC(__mulsi3)
+#elif !defined (__OPTIMIZE_SIZE__) && !defined(__ARC601__)
+	/* Up to 3.5 times faster than the simpler code below, but larger.  */
+	FUNC(__mulsi3)
+	ror.f	r2,r0,4
+	mov_s	r0,0
+	add3.mi	r0,r0,r1
+	asl.f	r2,r2,2
+	add2.cs	r0,r0,r1
+	jeq_s	[blink]
+.Loop:
+	add1.mi	r0,r0,r1
+	asl.f	r2,r2,2
+	add.cs	r0,r0,r1
+	asl_s	r1,r1,4
+	ror.f	r2,r2,8
+	add3.mi	r0,r0,r1
+	asl.f	r2,r2,2
+	bne.d	.Loop
+	add2.cs	r0,r0,r1
+	j_s	[blink]
+	ENDFUNC(__mulsi3)
+#elif !defined (__OPTIMIZE_SIZE__) /* __ARC601__ */
+	FUNC(__mulsi3)
+	lsr.f r2,r0
+	mov_s r0,0
+	mov_s r3,0
+	add.cs r0,r0,r1
+.Loop:
+	lsr.f r2,r2
+	add1.cs r0,r0,r1
+	lsr.f r2,r2
+	add2.cs r0,r0,r1
+	lsr.f r2,r2
+	add3.cs r0,r0,r1
+	bne.d .Loop	
+	add3 r1,r3,r1
+	j_s	[blink]
+	ENDFUNC(__mulsi3)
+#else
+/********************************************************/
+	FUNC(__mulsi3)
+	mov_s r2,0		; Accumulate result here.
+.Lloop:
+	bbit0 r0,0,@.Ly
+	add_s r2,r2,r1		; r += b
+.Ly:	
+	lsr_s r0,r0		; a >>= 1
+	asl_s r1,r1		; b <<= 1	
+	brne_s r0,0,@.Lloop	
+.Ldone:
+	j_s.d [blink]
+	mov_s r0,r2
+	ENDFUNC(__mulsi3)
+/********************************************************/
+#endif
+	
+#endif /* L_mulsi3 */
+
+#ifdef  L_umulsidi3
+	.section .text
+	.align 4
+
+	.global SYM(__umulsidi3)
+SYM(__umulsidi3):
+	HIDDEN_FUNC(__umulsidi3)
+/* We need ARC700 /ARC_MUL64 definitions of __umulsidi3 / __umulsi3_highpart
+   in case some code has been compiled without multiply support enabled,
+   but linked with the multiply-support enabled libraries.
+   For ARC601 (i.e. without a barrel shifter), we also use umuldisi3 as our
+   umulsi3_highpart implementation; the use of the latter label doesn't
+   actually benefit ARC601 platforms, but is useful when ARC601 code is linked
+   against other libraries.  */
+#if defined (__ARC700__) || defined (__ARC_MUL64__) || defined (__ARC601__)
+	.global SYM(__umulsi3_highpart)
+SYM(__umulsi3_highpart):
+	HIDDEN_FUNC(__umulsi3_highpart)
+#endif
+
+/* This the simple version.
+
+  while (a) 
+    {
+      if (a & 1)
+        r += b;
+      a >>= 1;
+      b <<= 1;
+    }
+*/
+#include "ieee-754/arc-ieee-754.h"
+
+#ifdef __ARC700__
+	mov_s	r12,DBL0L
+	mpyu	DBL0L,r12,DBL0H
+	j_s.d	[blink]
+	mpyhu	DBL0H,r12,DBL0H
+#elif defined (__ARC_MUL64__)
+/* Likewise for __ARC_MUL64__ */
+	mulu64 r0,r1
+	mov_s DBL0L,mlo
+	j_s.d [blink]
+	mov_s DBL0H,mhi
+#else /* !__ARC700__ && !__ARC_MUL64__ */
+/* Although it might look tempting to extend this to handle muldi3,
+   using mulsi3 twice with 2.25 cycles per 32 bit add is faster
+   than one loop with 3 or four cycles per 32 bit add.  */
+	asl.f r12,0		; Top part of b.
+	mov_s r2,0		; Accumulate result here.
+	bbit1.d r0,0,@.Ladd
+	mov_s r3,0
+.Llooptst:
+	rlc r12,r12
+	breq r0,0,@.Ldone	; while (a)
+.Lloop:
+	asl.f r1,r1		; b <<= 1
+	bbit0.d r0,1,@.Llooptst
+	lsr r0,r0		; a >>= 1
+	rlc r12,r12
+.Ladd:
+	add.f r3,r3,r1	; r += b
+	brne.d r0,0,@.Lloop	; while (a);
+	adc   r2,r2,r12
+.Ldone:
+	mov_s DBL0L,r3
+	j_s.d [blink]
+	mov DBL0H,r2
+#endif /* !__ARC700__*/
+	ENDFUNC(__umulsidi3)
+#if defined (__ARC700__) || defined (__ARC_MUL64__) || defined (__ARC601__)
+	ENDFUNC(__umulsi3_highpart)
+#endif
+#endif /* L_umulsidi3 */
+
+#ifdef  L_umulsi3_highpart
+#include "ieee-754/arc-ieee-754.h"
+/* For use without a barrel shifter, and for ARC700 / ARC_MUL64, the
+   mulsidi3 algorithms above look better, so for these, there is an
+   extra label up there.  */
+#if !defined (__ARC700__) && !defined (__ARC_MUL64__) && !defined (__ARC601__)
+	.global SYM(__umulsi3_highpart)
+SYM(__umulsi3_highpart):
+	HIDDEN_FUNC(__umulsi3_highpart)
+	mov_s r2,0
+	mov_s r3,32
+.Loop:
+	lsr.f r0,r0
+	add.cs.f r2,r2,r1
+	sub_s r3,r3,1
+	brne.d r0,0,.Loop
+	rrc r2,r2
+	j_s.d	[blink]
+/* Make the result register peephole-compatible with mulsidi3.  */
+	lsr DBL0H,r2,r3
+	ENDFUNC(__umulsi3_highpart)
+#endif /* !__ARC700__  && !__ARC601__ */
+#endif /* L_umulsi3_highpart */
+
+#ifdef L_divmod_tools
+
+; Utilities used by all routines.
+
+	.section .text
+
+/*
+unsigned long
+udivmodsi4(int modwanted, unsigned long num, unsigned long den)
+{
+  unsigned long bit = 1;
+  unsigned long res = 0;
+
+  while (den < num && bit && !(den & (1L<<31)))
+    {
+      den <<=1;
+      bit <<=1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>=1;
+      den >>=1;
+    }
+  if (modwanted) return num;
+  return res;
+}
+*/
+
+; inputs: r0 = numerator, r1 = denominator
+; outputs: r0 = quotient, r1 = remainder, r2/r3 trashed
+
+	.balign 4
+	.global SYM(__udivmodsi4)
+	FUNC(__udivmodsi4)
+SYM(__udivmodsi4):
+
+#if defined (__ARC700__)
+/* Normalize divisor and divident, and then use the appropriate number of
+   divaw (the number of result bits, or one more) to produce the result.
+   There are some special conditions that need to be tested:
+   - We can only directly normalize unsigned numbers that fit in 31 bit.  For
+     the divisor, we test early on that it is not 'negative'.
+   - divaw can't corrrectly process a divident that is larger than the divisor.
+     We handle this be checking that the divident prior to normalization is
+     not larger than the normalized divisor.  As we then already know then
+     that the divisor fits 31 bit, this check also makes sure that the
+     divident fits.
+   - ordinary normalization of the divident could make it larger than the
+     normalized divisor, which again would be unsuitable for divaw.
+     Thus, we want to shift left the divident by one less, except that we
+     want to leave it alone if it is already 31 bit.  To this end, we
+     double the input to norm with adds.
+   - If the divident has less bits than the divisor, that would leave us
+     with a negative number of divaw to execute.  Although we could use a
+     conditional loop to avoid excess divaw, and then the quotient could
+     be extracted correctly as there'd be more than enough zero bits, the
+     remainder would be shifted left too far, requiring a conditional shift
+     right.  The cost of that shift and the possible mispredict on the
+     conditional loop cost as much as putting in an early check for a zero
+     result.  */
+	bmsk	r3,r0,29
+	brne.d	r3,r0,.Large_dividend
+	norm.f	r2,r1
+	brlo	r0,r1,.Lret0
+	norm	r3,r0
+	asl_s	r1,r1,r2
+	sub_s	r3,r3,1
+	asl_l	r0,r0,r3	; not short to keep loop aligned
+	sub	lp_count,r2,r3
+	lp	.Ldiv_end
+	divaw	r0,r0,r1
+.Ldiv_end:sub_s	r3,r2,1
+	lsr	r1,r0,r2
+	j_s.d	[blink]
+	bmsk	r0,r0,r3
+
+	.balign 4
+.Large_dividend:
+	bmi	.Ltrivial
+	asl_s	r1,r1,r2
+	mov_s	r3,0
+	sub1.f	r4,r0,r1
+	mov.lo	r4,r0
+	mov.hs	r3,2
+	cmp	r4,r1
+	sub.hs	r4,r4,r1
+	add.hs	r3,r3,1
+	mov.f	lp_count,r2
+	lpne	.Ldiv_end2
+	divaw	r4,r4,r1
+.Ldiv_end2:asl	r0,r3,r2
+	lsr	r1,r4,r2
+	sub_s	r2,r2,1
+	bmsk	r4,r4,r2
+	j_s.d	[blink]
+	or.ne	r0,r0,r4
+
+.Lret0:
+	mov_s	r1,r0
+	j_s.d	[blink]
+	mov_l	r0,0
+	.balign	4
+.Ltrivial:
+	sub.f	r1,r0,r1
+	mov.c	r1,r0
+	mov_s	r0,1
+	j_s.d	[blink]
+	mov.c	r0,0
+#elif !defined (__OPTIMIZE_SIZE__)
+#ifdef __ARC_NORM__
+	lsr_s r2,r0
+	brhs.d r1,r2,.Lret0_3
+	norm r2,r2
+	norm r3,r1
+	sub_s r3,r3,r2
+	asl_s r1,r1,r3
+	sub1.f 0,r0,r1
+	lsr.cs r1,r1,1
+	sbc r2,r3,0
+	sub1 r0,r0,r1
+	cmp_s r0,r1
+	mov.f lp_count,r2
+#else /* ! __ARC_NORM__ */
+	lsr_s r2,r0
+	brhs.d r1,r2,.Lret0_3
+	mov lp_count,32
+.Lloop1:
+	asl_s r1,r1		; den <<= 1
+	brls.d r1,r2,@.Lloop1
+	sub lp_count,lp_count,1
+	sub_s r0,r0,r1
+	lsr_s r1,r1
+	cmp_s r0,r1
+	xor.f r2,lp_count,31
+	mov_s lp_count,r2
+#endif /* !__ARC_NORM__ */
+	sub.cc r0,r0,r1
+	mov_s r3,3
+	sbc r3,r3,0
+#ifndef __ARC601__
+	asl_s r3,r3,r2
+	rsub r1,r1,1
+	lpne @.Lloop2_end
+	add1.f r0,r1,r0
+	sub.cc r0,r0,r1
+.Lloop2_end:
+	lsr r1,r0,r2
+#else
+	rsub r1,r1,1
+	lpne @.Lloop2_end
+	asl_s r3,r3
+	add1.f r0,r1,r0
+	sub.cc r0,r0,r1
+.Lloop2_end:
+	lsr_s r1,r0
+	lsr.f lp_count,r2
+	mov.cc r1,r0
+	lpnz 1f
+	lsr_s r1,r1
+	lsr_s r1,r1
+1:
+#endif
+	bmsk r0,r0,r2
+	bclr r0,r0,r2
+	j_s.d [blink]
+	or_s r0,r0,r3
+.Lret0_3:
+#if 0 /* Slightly shorter, but slower.  */
+	lp .Loop3_end
+	brhi.d r1,r0,.Loop3_end
+	sub_s r0,r0,r1
+.Loop3_end
+	add_s r1,r1,r0
+	j_s.d [blink]
+	rsub r0,lp_count,32-1
+#else
+	mov_s r4,r1
+	sub.f r1,r0,r1
+	sbc r0,r0,r0
+	sub.cc.f r1,r1,r4
+	sbc r0,r0,0
+	sub.cc.f r1,r1,r4
+	sbc r0,r0,-3
+	j_s.d [blink]
+	add.cs r1,r1,r4
+#endif
+#else /* Arctangent-A5 */
+	breq_s r1,0,@.Ldivmodend
+	mov_s r2,1		; bit = 1
+	mov_s r3,0		; res = 0
+.Lloop1:
+  	brhs r1,r0,@.Lloop2
+	bbit1 r1,31,@.Lloop2
+	asl_s r1,r1		; den <<= 1
+	b.d @.Lloop1
+	asl_s r2,r2		; bit <<= 1
+.Lloop2:
+  	brlo r0,r1,@.Lshiftdown
+	sub_s r0,r0,r1		; num -= den
+	or_s r3,r3,r2		; res |= bit
+.Lshiftdown:
+	lsr_s r2,r2		; bit >>= 1
+	lsr_s r1,r1		; den >>= 1	
+	brne_s r2,0,@.Lloop2
+.Ldivmodend:
+	mov_s r1,r0		; r1 = mod
+	j.d [blink]
+	mov_s r0,r3		; r0 = res
+/******************************************************/
+#endif
+	ENDFUNC(__udivmodsi4)
+
+#endif
+
+#ifdef  L_udivsi3
+	.section .text
+	.align 4
+
+	.global SYM(__udivsi3)
+	FUNC(__udivsi3)
+SYM(__udivsi3):
+	b @SYM(__udivmodsi4)
+	ENDFUNC(__udivsi3)
+#if 0 /* interferes with linux loader */
+	.section .__arc_profile_forward, "a"
+	.long SYM(__udivsi3)
+	.long SYM(__udivmodsi4)
+	.long 65536
+#endif
+
+#endif /* L_udivsi3 */
+
+#ifdef  L_divsi3
+	.section .text
+	.align 4
+
+	.global SYM(__divsi3)
+	FUNC(__divsi3)
+
+#ifndef __ARC700__
+SYM(__divsi3):
+	/* A5 / ARC60? */
+	mov r7,blink
+	xor r6,r0,r1
+	abs_s r0,r0
+	bl.d @SYM(__udivmodsi4)
+	 abs_s r1,r1
+	tst r6,r6
+	j.d [r7]
+	 neg.mi r0,r0
+#else 	/* !ifndef __ARC700__ */
+	;; We can use the abs, norm, divaw and mpy instructions for ARC700
+#define MULDIV
+#ifdef MULDIV
+/* This table has been generated by divtab-arc700.c.  */
+/* 1/512 .. 1/256, normalized.  There is a leading 1 in bit 31.
+   For powers of two, we list unnormalized numbers instead.  The values
+   for powers of 2 are loaded, but not used.  The value for 1 is actually
+   the first instruction after .Lmuldiv.  */
+	.balign 4
+.Ldivtab:
+
+	.long	0x1000000
+	.long	0x80808081
+	.long	0x81020409
+	.long	0x81848DA9
+	.long	0x82082083
+	.long	0x828CBFBF
+	.long	0x83126E98
+	.long	0x83993053
+	.long	0x84210843
+	.long	0x84A9F9C9
+	.long	0x85340854
+	.long	0x85BF3762
+	.long	0x864B8A7E
+	.long	0x86D90545
+	.long	0x8767AB60
+	.long	0x87F78088
+	.long	0x88888889
+	.long	0x891AC73B
+	.long	0x89AE408A
+	.long	0x8A42F871
+	.long	0x8AD8F2FC
+	.long	0x8B70344B
+	.long	0x8C08C08D
+	.long	0x8CA29C05
+	.long	0x8D3DCB09
+	.long	0x8DDA5203
+	.long	0x8E78356E
+	.long	0x8F1779DA
+	.long	0x8FB823EF
+	.long	0x905A3864
+	.long	0x90FDBC0A
+	.long	0x91A2B3C5
+	.long	0x92492493
+	.long	0x92F11385
+	.long	0x939A85C5
+	.long	0x94458095
+	.long	0x94F20950
+	.long	0x95A02569
+	.long	0x964FDA6D
+	.long	0x97012E03
+	.long	0x97B425EE
+	.long	0x9868C80A
+	.long	0x991F1A52
+	.long	0x99D722DB
+	.long	0x9A90E7DA
+	.long	0x9B4C6F9F
+	.long	0x9C09C09D
+	.long	0x9CC8E161
+	.long	0x9D89D89E
+	.long	0x9E4CAD24
+	.long	0x9F1165E8
+	.long	0x9FD809FE
+	.long	0xA0A0A0A1
+	.long	0xA16B312F
+	.long	0xA237C32C
+	.long	0xA3065E40
+	.long	0xA3D70A3E
+	.long	0xA4A9CF1E
+	.long	0xA57EB503
+	.long	0xA655C43A
+	.long	0xA72F053A
+	.long	0xA80A80A9
+	.long	0xA8E83F58
+	.long	0xA9C84A48
+	.long	0xAAAAAAAB
+	.long	0xAB8F69E3
+	.long	0xAC769185
+	.long	0xAD602B59
+	.long	0xAE4C415D
+	.long	0xAF3ADDC7
+	.long	0xB02C0B03
+	.long	0xB11FD3B9
+	.long	0xB21642C9
+	.long	0xB30F6353
+	.long	0xB40B40B5
+	.long	0xB509E68B
+	.long	0xB60B60B7
+	.long	0xB70FBB5B
+	.long	0xB81702E1
+	.long	0xB92143FB
+	.long	0xBA2E8BA3
+	.long	0xBB3EE722
+	.long	0xBC52640C
+	.long	0xBD691048
+	.long	0xBE82FA0C
+	.long	0xBFA02FE9
+	.long	0xC0C0C0C1
+	.long	0xC1E4BBD6
+	.long	0xC30C30C4
+	.long	0xC4372F86
+	.long	0xC565C87C
+	.long	0xC6980C6A
+	.long	0xC7CE0C7D
+	.long	0xC907DA4F
+	.long	0xCA4587E7
+	.long	0xCB8727C1
+	.long	0xCCCCCCCD
+	.long	0xCE168A78
+	.long	0xCF6474A9
+	.long	0xD0B69FCC
+	.long	0xD20D20D3
+	.long	0xD3680D37
+	.long	0xD4C77B04
+	.long	0xD62B80D7
+	.long	0xD79435E6
+	.long	0xD901B204
+	.long	0xDA740DA8
+	.long	0xDBEB61EF
+	.long	0xDD67C8A7
+	.long	0xDEE95C4D
+	.long	0xE070381D
+	.long	0xE1FC780F
+	.long	0xE38E38E4
+	.long	0xE525982B
+	.long	0xE6C2B449
+	.long	0xE865AC7C
+	.long	0xEA0EA0EB
+	.long	0xEBBDB2A6
+	.long	0xED7303B6
+	.long	0xEF2EB720
+	.long	0xF0F0F0F1
+	.long	0xF2B9D649
+	.long	0xF4898D60
+	.long	0xF6603D99
+	.long	0xF83E0F84
+	.long	0xFA232CF3
+	.long	0xFC0FC0FD
+	.long	0xFE03F810
+	.long	0x2000000
+	.long	0x81020409
+	.long	0x82082083
+	.long	0x83126E98
+	.long	0x84210843
+	.long	0x85340854
+	.long	0x864B8A7E
+	.long	0x8767AB60
+	.long	0x88888889
+	.long	0x89AE408A
+	.long	0x8AD8F2FC
+	.long	0x8C08C08D
+	.long	0x8D3DCB09
+	.long	0x8E78356E
+	.long	0x8FB823EF
+	.long	0x90FDBC0A
+	.long	0x92492493
+	.long	0x939A85C5
+	.long	0x94F20950
+	.long	0x964FDA6D
+	.long	0x97B425EE
+	.long	0x991F1A52
+	.long	0x9A90E7DA
+	.long	0x9C09C09D
+	.long	0x9D89D89E
+	.long	0x9F1165E8
+	.long	0xA0A0A0A1
+	.long	0xA237C32C
+	.long	0xA3D70A3E
+	.long	0xA57EB503
+	.long	0xA72F053A
+	.long	0xA8E83F58
+	.long	0xAAAAAAAB
+	.long	0xAC769185
+	.long	0xAE4C415D
+	.long	0xB02C0B03
+	.long	0xB21642C9
+	.long	0xB40B40B5
+	.long	0xB60B60B7
+	.long	0xB81702E1
+	.long	0xBA2E8BA3
+	.long	0xBC52640C
+	.long	0xBE82FA0C
+	.long	0xC0C0C0C1
+	.long	0xC30C30C4
+	.long	0xC565C87C
+	.long	0xC7CE0C7D
+	.long	0xCA4587E7
+	.long	0xCCCCCCCD
+	.long	0xCF6474A9
+	.long	0xD20D20D3
+	.long	0xD4C77B04
+	.long	0xD79435E6
+	.long	0xDA740DA8
+	.long	0xDD67C8A7
+	.long	0xE070381D
+	.long	0xE38E38E4
+	.long	0xE6C2B449
+	.long	0xEA0EA0EB
+	.long	0xED7303B6
+	.long	0xF0F0F0F1
+	.long	0xF4898D60
+	.long	0xF83E0F84
+	.long	0xFC0FC0FD
+	.long	0x4000000
+	.long	0x82082083
+	.long	0x84210843
+	.long	0x864B8A7E
+	.long	0x88888889
+	.long	0x8AD8F2FC
+	.long	0x8D3DCB09
+	.long	0x8FB823EF
+	.long	0x92492493
+	.long	0x94F20950
+	.long	0x97B425EE
+	.long	0x9A90E7DA
+	.long	0x9D89D89E
+	.long	0xA0A0A0A1
+	.long	0xA3D70A3E
+	.long	0xA72F053A
+	.long	0xAAAAAAAB
+	.long	0xAE4C415D
+	.long	0xB21642C9
+	.long	0xB60B60B7
+	.long	0xBA2E8BA3
+	.long	0xBE82FA0C
+	.long	0xC30C30C4
+	.long	0xC7CE0C7D
+	.long	0xCCCCCCCD
+	.long	0xD20D20D3
+	.long	0xD79435E6
+	.long	0xDD67C8A7
+	.long	0xE38E38E4
+	.long	0xEA0EA0EB
+	.long	0xF0F0F0F1
+	.long	0xF83E0F84
+	.long	0x8000000
+	.long	0x84210843
+	.long	0x88888889
+	.long	0x8D3DCB09
+	.long	0x92492493
+	.long	0x97B425EE
+	.long	0x9D89D89E
+	.long	0xA3D70A3E
+	.long	0xAAAAAAAB
+	.long	0xB21642C9
+	.long	0xBA2E8BA3
+	.long	0xC30C30C4
+	.long	0xCCCCCCCD
+	.long	0xD79435E6
+	.long	0xE38E38E4
+	.long	0xF0F0F0F1
+	.long	0x10000000
+	.long	0x88888889
+	.long	0x92492493
+	.long	0x9D89D89E
+	.long	0xAAAAAAAB
+	.long	0xBA2E8BA3
+	.long	0xCCCCCCCD
+	.long	0xE38E38E4
+	.long	0x20000000
+	.long	0x92492493
+	.long	0xAAAAAAAB
+	.long	0xCCCCCCCD
+	.long	0x40000000
+	.long	0xAAAAAAAB
+	.long	0x80000000
+__muldiv:
+	neg	r4,r2
+	ld.as	r5,[pcl,r4]
+	abs_s	r12,r0
+        bic.f	0,r2,r4
+        mpyhu.ne r12,r12,r5
+	norm	r3,r2
+	xor.f	0,r0,r1
+        ; write port allocation stall
+        rsub	r3,r3,30
+        lsr	r0,r12,r3
+        j_s.d	[blink]
+        neg.mi	r0,r0
+
+	.balign	4
+SYM(__divsi3):
+	norm	r3,r1
+	abs_s	r2,r1
+	brhs	r3,23,__muldiv
+	norm	r4,r0
+	abs_l	r12,r0
+	brhs	r4,r3,.Lonebit
+	asl_s	r2,r2,r3
+	asl	r12,r12,r4
+	sub	lp_count,r3,r4
+	sub.f	r12,r12,r2
+	brge.d	r12,r2,.Lsbit
+	sub	r4,r3,r4
+	add.lo	r12,r12,r2
+	lp	.Ldivend
+.Ldivstart:divaw r12,r12,r2
+.Ldivend:xor_s	r1,r1,r0
+	sub	r0,r4,1
+	bmsk	r0,r12,r0
+	bset.hs	r0,r0,r4
+	tst_s	r1,r1
+	j_s.d	[blink]
+	neg.mi	r0,r0
+.Lonebit:
+	xor_s	r1,r1,r0
+	asr_s	r1,r1,31
+	sub1.f	0,r12,r2	; special case:	-2**(n+1) / 2**n
+	or	r0,r1,1
+	add.eq	r0,r0,r0
+	cmp_s	r12,r2
+	j_s.d	[blink]
+	mov.lo	r0,0
+.Lsbit:
+	; Need to handle special cases involving negative powers of two:
+	; r12,r2 are normalized dividend / divisor;
+	; divide anything by 0x80000000, or divide 0x80000000 by 0x40000000
+	add_s	r12,r12,r2
+	xor_s	r1,r1,r0
+	rsub	r4,r4,-1
+	ror	r0,r12,r4
+	tst_s	r2,r2
+	bmsk	r0,r0,r3
+	add.pl	r0,r0,r0
+	tst_s	r1,r1
+	j_s.d	[blink]
+	neg.mi	r0,r0
+#else /* !MULDIV */
+/* This version requires that divaw works with a divisor of 0x80000000U  */
+	abs_s	r2,r1
+	norm	r4,r0
+	neg_s	r3,r2
+	norm	r3,r3
+	abs_s	r12,r0
+	brhs	r4,r3,.Lonebit
+	asl_s	r2,r2,r3
+	asl	r12,r12,r4
+	sub	lp_count,r3,r4
+	cmp_s	r12,r2
+	sub.hs	r12,r12,r2
+	lp	.Ldivend
+.Ldivstart:divaw r12,r12,r2
+.Ldivend:xor_s	r1,r1,r0
+	sub_s	r0,r3,1
+	bmsk	r0,r12,r0
+	bset.hs	r0,r0,r3
+	tst_s	r1,r1
+	j_s.d	[blink]
+	negmi	r0,r0
+.Lonebit:
+	xor_s	r1,r1,r0
+	asr_s	r1,r1,31
+	cmp_s	r12,r2
+	mov_s	r0,0
+	j_s.d	[blink]
+	orhs	r0,r1,1
+#endif /* MULDIV */
+
+#endif	/* ifndef __ARC700__ */
+	ENDFUNC(__divsi3)
+
+	
+#endif /* L_divsi3 */
+
+#ifdef  L_umodsi3
+	.section .text
+	.align 4
+
+	.global SYM(__umodsi3)
+	FUNC(__umodsi3)
+SYM(__umodsi3):
+	mov r7,blink
+	bl.nd @SYM(__udivmodsi4)
+	j.d [r7]
+	mov r0,r1
+	ENDFUNC(__umodsi3)
+#if 0 /* interferes with linux loader */
+	.section .__arc_profile_forward, "a"
+	.long SYM(__umodsi3)
+	.long SYM(__udivmodsi4)
+	.long 65536
+#endif
+
+#endif /* L_umodsi3 */
+
+#ifdef  L_modsi3
+	.section .text
+	.align 4
+
+	.global SYM (__modsi3)
+	FUNC(__modsi3)
+SYM(__modsi3):
+#ifndef __ARC700__
+	/* A5 / ARC60? */
+	mov_s r12,blink
+	mov_s r6,r0
+	abs_s r0,r0
+	bl.d @SYM(__udivmodsi4)
+	 abs_s r1,r1
+	tst r6,r6
+	neg_s r0,r1
+	j_s.d [r12]
+	 mov.pl r0,r1
+#else /* __ARC700__ */
+	abs_s	r2,r1
+	norm.f	r4,r0
+	neg	r5,r2
+	norm	r3,r5
+	abs_l	r12,r0
+	brhs	r4,r3,.Lonebit
+	asl_s	r2,r2,r3
+	asl	r12,r12,r4
+	sub	lp_count,r3,r4
+	cmp_s	r12,r2
+	sub.hs	r12,r12,r2
+	tst_s	r0,r0
+	lp	.Ldivend
+.Ldivstart:divaw r12,r12,r2
+.Ldivend:
+	lsr	r0,r12,r3
+	j_s.d	[blink]
+	neg.mi	r0,r0
+	.balign	4
+.Lonebit:neg.pl	r5,r5
+	cmp_s	r12,r2
+	j_s.d	[blink]
+	sub.hs	r0,r0,r5
+#endif /* __ARC700__ */
+	ENDFUNC(__modsi3)
+
+#endif /* L_modsi3 */
+
+#ifdef L_clzsi2
+       .section .text
+       .align 4
+       .global SYM (__clzsi2)
+SYM(__clzsi2):	
+#ifdef __ARC_NORM__
+	HIDDEN_FUNC(__clzsi2)
+	norm.f	r0,r0
+	mov.n	r0,0
+	j_s.d	[blink]
+	add.pl	r0,r0,1
+	ENDFUNC(__clzsi2)
+#elif defined (__ARC601__)
+	FUNC(__clzsi2)
+	mov lp_count,10
+	mov_l r1,0
+	bset r2,r1,29
+	lp .Loop_end
+	brhs r0,r2,.Loop_end
+	add3 r0,r1,r0
+.Loop_end:
+	asl.f 0,r0
+	sub2 r0,lp_count,lp_count
+	sub.cs.f r0,r0,1
+	add r0,r0,31
+	j_s.d [blink]
+	add.pl r0,r0,1
+	ENDFUNC(__clzsi2)
+#else
+	FUNC(__clzsi2)
+	asl.f 0,r0,2
+	mov r1,-1
+.Lcheck:
+	bbit1.d r0,31,.Ldone
+	asl.pl r0,r0,3
+	bcs.d .Ldone_1
+	add_s r1,r1,3
+	bpnz.d .Lcheck
+	asl.f 0,r0,2
+	mov_s r0,32
+	j_s.d [blink]
+	mov.ne r0,r1
+.Ldone:
+	j_s.d [blink]
+	add_s r0,r1,1
+.Ldone_1:
+	j_s.d [blink]
+	sub_s r0,r1,1
+	ENDFUNC(__clzsi2)
+#endif
+#endif /* L_clzsi2 */
+       .section .text
+
+
+;;; MILLICODE THUNK LIB ;***************
+	
+;;; 	.macro push_regs from, to, offset
+;;; 		st_s "\from", [sp, \offset]
+;;; 		.if \to-\from
+;;; 			push_regs "(\from+1)", \to, "(\offset+4)"
+;;; 		.endif
+;;; 	.endm
+;;; 	push_regs 13, 18, 0
+;;;
+
+;;;;   	.macro sum from, to, three
+;;;;   		.long \from
+;;;;   		.long \three
+;;;;   		.local regno
+;;;;   		.set regno, \from+1
+;;;;   		.set shift, 32
+;;;;   		.set shift, shift - 1
+;;;;   #		st_s %shift @3 lsl #shift 
+;;;;   		.if \to-\from
+;;;;   		sum "(\from+1)", \to, "(\three)"
+;;;;   		.endif		
+;;;;   	.endm
+;;;;   	
+;;;;   	SUM 0,5, 9
+;;;;   	
+;	.altmacro		
+;;  	.macro push_regs from=0, to=3, offset
+;;  		st_s r\from, [sp, \offset]
+;;  		.if \to-\from
+;;  			push_regs "\from+1 ",\to,"(\offset+4)"
+;;  		.endif
+;;  	.endm
+;;  
+;;  	.macro expand_to_push from=13, to
+;;  ;		.section .text
+;;  ;		.align 4
+;;  ;		.global st_
+;;  ;		.type foo,
+;;  	st_13_to_25:
+;;  ;		push_regs \from, \to, 0
+;;  	push_regs 0,3		; 
+;;  	.endm
+;;  
+;;  	expand_to_push 13,18
+;;  
+;#endif
+
+#ifdef L_millicodethunk_st
+	.section .text
+	.align 4
+	.global SYM(__st_r13_to_r15)
+	.global SYM(__st_r13_to_r16)
+	.global SYM(__st_r13_to_r17)
+	.global SYM(__st_r13_to_r18)
+	.global SYM(__st_r13_to_r19)
+	.global SYM(__st_r13_to_r20)
+	.global SYM(__st_r13_to_r21)
+	.global SYM(__st_r13_to_r22)
+	.global SYM(__st_r13_to_r23)
+	.global SYM(__st_r13_to_r24)
+	.global SYM(__st_r13_to_r25)
+	HIDDEN_FUNC(__st_r13_to_r15)
+	HIDDEN_FUNC(__st_r13_to_r16)
+	HIDDEN_FUNC(__st_r13_to_r17)
+	HIDDEN_FUNC(__st_r13_to_r18)
+	HIDDEN_FUNC(__st_r13_to_r19)
+	HIDDEN_FUNC(__st_r13_to_r20)
+	HIDDEN_FUNC(__st_r13_to_r21)
+	HIDDEN_FUNC(__st_r13_to_r22)
+	HIDDEN_FUNC(__st_r13_to_r23)
+	HIDDEN_FUNC(__st_r13_to_r24)
+	HIDDEN_FUNC(__st_r13_to_r25)
+	.align 4
+SYM(__st_r13_to_r25):
+	st r25, [sp,48]
+SYM(__st_r13_to_r24):	
+	st r24, [sp,44]
+SYM(__st_r13_to_r23):	
+	st r23, [sp,40]
+SYM(__st_r13_to_r22):	
+	st r22, [sp,36]
+SYM(__st_r13_to_r21):	
+	st r21, [sp,32]
+SYM(__st_r13_to_r20):	
+	st r20, [sp,28]		
+SYM(__st_r13_to_r19):	
+	st r19, [sp,24]
+SYM(__st_r13_to_r18):	
+	st r18, [sp,20]
+SYM(__st_r13_to_r17):	
+	st r17, [sp,16]
+SYM(__st_r13_to_r16):	
+	st r16, [sp,12]
+SYM(__st_r13_to_r15):	
+#ifdef __ARC700__
+	st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
+#else
+	st_s r15, [sp,8]
+#endif
+	st_s r14, [sp,4]
+	j_s.d [%blink]
+	st_s r13, [sp,0]	
+	ENDFUNC(__st_r13_to_r15)
+	ENDFUNC(__st_r13_to_r16)
+	ENDFUNC(__st_r13_to_r17)
+	ENDFUNC(__st_r13_to_r18)
+	ENDFUNC(__st_r13_to_r19)
+	ENDFUNC(__st_r13_to_r20)
+	ENDFUNC(__st_r13_to_r21)
+	ENDFUNC(__st_r13_to_r22)
+	ENDFUNC(__st_r13_to_r23)
+	ENDFUNC(__st_r13_to_r24)
+	ENDFUNC(__st_r13_to_r25)
+#endif  /* L_millicodethunk_st */
+
+
+#ifdef L_millicodethunk_ld
+	.section .text
+	.align 4
+;	================================== 
+;	the loads
+
+	.global SYM(__ld_r13_to_r15)
+	.global SYM(__ld_r13_to_r16)
+	.global SYM(__ld_r13_to_r17)
+	.global SYM(__ld_r13_to_r18)
+	.global SYM(__ld_r13_to_r19)
+	.global SYM(__ld_r13_to_r20)
+	.global SYM(__ld_r13_to_r21)
+	.global SYM(__ld_r13_to_r22)
+	.global SYM(__ld_r13_to_r23)
+	.global SYM(__ld_r13_to_r24)
+	.global SYM(__ld_r13_to_r25)
+	HIDDEN_FUNC(__ld_r13_to_r15)
+	HIDDEN_FUNC(__ld_r13_to_r16)
+	HIDDEN_FUNC(__ld_r13_to_r17)
+	HIDDEN_FUNC(__ld_r13_to_r18)
+	HIDDEN_FUNC(__ld_r13_to_r19)
+	HIDDEN_FUNC(__ld_r13_to_r20)
+	HIDDEN_FUNC(__ld_r13_to_r21)
+	HIDDEN_FUNC(__ld_r13_to_r22)
+	HIDDEN_FUNC(__ld_r13_to_r23)
+	HIDDEN_FUNC(__ld_r13_to_r24)
+	HIDDEN_FUNC(__ld_r13_to_r25)
+SYM(__ld_r13_to_r25):
+	ld r25, [sp,48]
+SYM(__ld_r13_to_r24):
+	ld r24, [sp,44]
+SYM(__ld_r13_to_r23):
+	ld r23, [sp,40]
+SYM(__ld_r13_to_r22):
+	ld r22, [sp,36]
+SYM(__ld_r13_to_r21):
+	ld r21, [sp,32]
+SYM(__ld_r13_to_r20):
+	ld r20, [sp,28]		
+SYM(__ld_r13_to_r19):
+	ld r19, [sp,24]
+SYM(__ld_r13_to_r18):
+	ld r18, [sp,20]
+SYM(__ld_r13_to_r17):
+	ld r17, [sp,16]
+SYM(__ld_r13_to_r16):
+	ld r16, [sp,12]
+SYM(__ld_r13_to_r15):
+#ifdef __ARC700__
+	ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
+#else
+	ld_s r15, [sp,8]
+#endif
+	ld_s r14, [sp,4]
+	j_s.d [%blink]
+	ld_s r13, [sp,0]
+	ENDFUNC(__ld_r13_to_r15)
+	ENDFUNC(__ld_r13_to_r16)
+	ENDFUNC(__ld_r13_to_r17)
+	ENDFUNC(__ld_r13_to_r18)
+	ENDFUNC(__ld_r13_to_r19)
+	ENDFUNC(__ld_r13_to_r20)
+	ENDFUNC(__ld_r13_to_r21)
+	ENDFUNC(__ld_r13_to_r22)
+	ENDFUNC(__ld_r13_to_r23)
+	ENDFUNC(__ld_r13_to_r24)
+	ENDFUNC(__ld_r13_to_r25)
+
+#endif /* L_millicodethunk_ld */
+#ifdef L_millicodethunk_ret
+	.global SYM(__ld_r13_to_r14_ret)
+	.global SYM(__ld_r13_to_r15_ret)
+	.global SYM(__ld_r13_to_r16_ret)
+	.global SYM(__ld_r13_to_r17_ret)
+	.global SYM(__ld_r13_to_r18_ret)
+	.global SYM(__ld_r13_to_r19_ret)
+	.global SYM(__ld_r13_to_r20_ret)
+	.global SYM(__ld_r13_to_r21_ret)
+	.global SYM(__ld_r13_to_r22_ret)
+	.global SYM(__ld_r13_to_r23_ret)
+	.global SYM(__ld_r13_to_r24_ret)
+	.global SYM(__ld_r13_to_r25_ret)
+	HIDDEN_FUNC(__ld_r13_to_r14_ret)
+	HIDDEN_FUNC(__ld_r13_to_r15_ret)
+	HIDDEN_FUNC(__ld_r13_to_r16_ret)
+	HIDDEN_FUNC(__ld_r13_to_r17_ret)
+	HIDDEN_FUNC(__ld_r13_to_r18_ret)
+	HIDDEN_FUNC(__ld_r13_to_r19_ret)
+	HIDDEN_FUNC(__ld_r13_to_r20_ret)
+	HIDDEN_FUNC(__ld_r13_to_r21_ret)
+	HIDDEN_FUNC(__ld_r13_to_r22_ret)
+	HIDDEN_FUNC(__ld_r13_to_r23_ret)
+	HIDDEN_FUNC(__ld_r13_to_r24_ret)
+	HIDDEN_FUNC(__ld_r13_to_r25_ret)
+	.section .text
+	.align 4
+SYM(__ld_r13_to_r25_ret):
+	ld r25, [sp,48]
+SYM(__ld_r13_to_r24_ret):
+	ld r24, [sp,44]
+SYM(__ld_r13_to_r23_ret):
+	ld r23, [sp,40]
+SYM(__ld_r13_to_r22_ret):
+	ld r22, [sp,36]
+SYM(__ld_r13_to_r21_ret):
+	ld r21, [sp,32]
+SYM(__ld_r13_to_r20_ret):
+	ld r20, [sp,28]		
+SYM(__ld_r13_to_r19_ret):
+	ld r19, [sp,24]
+SYM(__ld_r13_to_r18_ret):
+	ld r18, [sp,20]
+SYM(__ld_r13_to_r17_ret):
+	ld r17, [sp,16]
+SYM(__ld_r13_to_r16_ret):
+	ld r16, [sp,12]
+SYM(__ld_r13_to_r15_ret):
+	ld r15, [sp,8]
+SYM(__ld_r13_to_r14_ret):
+	ld blink,[sp,r12]
+	ld_s r14, [sp,4]
+	ld.ab r13, [sp,r12]
+	j_s.d [%blink]
+	add_s sp,sp,4
+	ENDFUNC(__ld_r13_to_r14_ret)
+	ENDFUNC(__ld_r13_to_r15_ret)
+	ENDFUNC(__ld_r13_to_r16_ret)
+	ENDFUNC(__ld_r13_to_r17_ret)
+	ENDFUNC(__ld_r13_to_r18_ret)
+	ENDFUNC(__ld_r13_to_r19_ret)
+	ENDFUNC(__ld_r13_to_r20_ret)
+	ENDFUNC(__ld_r13_to_r21_ret)
+	ENDFUNC(__ld_r13_to_r22_ret)
+	ENDFUNC(__ld_r13_to_r23_ret)
+	ENDFUNC(__ld_r13_to_r24_ret)
+	ENDFUNC(__ld_r13_to_r25_ret)
+
+#endif /* L_millicodethunk_ret */
+
+#ifdef  L_adddf3
+#ifdef __ARC_NORM__
+#include "ieee-754/adddf3.S"
+#endif
+#endif
+
+#ifdef  L_muldf3
+#ifdef __ARC700__
+#include "ieee-754/muldf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
+#include "ieee-754/arc600-mul64/muldf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
+#include "ieee-754/arc600-dsp/muldf3.S"
+#endif
+#endif
+
+#ifdef  L_addsf3
+#ifdef __ARC_NORM__
+#include "ieee-754/addsf3.S"
+#endif
+#endif
+
+#ifdef  L_mulsf3
+#ifdef __ARC700__
+#include "ieee-754/mulsf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
+#include "ieee-754/arc600-mul64/mulsf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
+#include "ieee-754/arc600-dsp/mulsf3.S"
+#elif defined (__ARC_NORM__)
+#include "ieee-754/arc600/mulsf3.S"
+#endif
+#endif
+
+#ifdef  L_divdf3
+#ifdef __ARC700__
+#include "ieee-754/divdf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
+#include "ieee-754/arc600-mul64/divdf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
+#include "ieee-754/arc600-dsp/divdf3.S"
+#endif
+#endif
+
+#ifdef  L_divsf3
+#ifdef __ARC700__
+#include "ieee-754/divsf3-stdmul.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL64__)
+#include "ieee-754/arc600-mul64/divsf3.S"
+#elif defined (__ARC_NORM__) && defined(__ARC_MUL32BY16__)
+#include "ieee-754/arc600-dsp/divsf3.S"
+#elif defined (__ARC_NORM__)
+#include "ieee-754/arc600/divsf3.S"
+#endif
+#endif
+
+#ifdef L_extendsfdf2
+#ifdef __ARC_NORM__
+#include "ieee-754/extendsfdf2.S"
+#endif
+#endif
+
+#ifdef L_truncdfsf2
+#ifdef __ARC_NORM__
+#include "ieee-754/truncdfsf2.S"
+#endif
+#endif
+
+#ifdef L_floatsidf
+#ifdef __ARC_NORM__
+#include "ieee-754/floatsidf.S"
+#endif
+#endif
+
+#ifdef L_floatsisf
+#ifdef __ARC_NORM__
+#include "ieee-754/floatsisf.S"
+#endif
+#endif
+
+#ifdef L_floatunsidf
+#ifdef __ARC_NORM__
+#include "ieee-754/floatunsidf.S"
+#endif
+#endif
+
+#ifdef L_fixdfsi
+#ifdef __ARC_NORM__
+#include "ieee-754/fixdfsi.S"
+#endif
+#endif
+
+#ifdef L_fixsfsi
+#ifdef __ARC_NORM__
+#include "ieee-754/fixsfsi.S"
+#endif
+#endif
+
+#ifdef L_fixunsdfsi
+#ifdef __ARC_NORM__
+#include "ieee-754/fixunsdfsi.S"
+#endif
+#endif
+
+#ifdef L_eqdf2
+#ifdef __ARC_NORM__
+#include "ieee-754/eqdf2.S"
+#endif
+#endif
+
+#ifdef L_eqsf2
+#ifdef __ARC_NORM__
+#include "ieee-754/eqsf2.S"
+#endif
+#endif
+
+#ifdef L_gtdf2
+#ifdef __ARC_NORM__
+#include "ieee-754/gtdf2.S"
+#endif
+#endif
+
+#ifdef L_gtsf2
+#ifdef __ARC_NORM__
+#include "ieee-754/gtsf2.S"
+#endif
+#endif
+
+#ifdef L_gedf2
+#ifdef __ARC_NORM__
+#include "ieee-754/gedf2.S"
+#endif
+#endif
+
+#ifdef L_gesf2
+#ifdef __ARC_NORM__
+#include "ieee-754/gesf2.S"
+#endif
+#endif
+
+#ifdef L_uneqdf2
+#ifdef __ARC_NORM__
+#include "ieee-754/uneqdf2.S"
+#endif
+#endif
+
+#ifdef L_uneqsf2
+#ifdef __ARC_NORM__
+#include "ieee-754/uneqsf2.S"
+#endif
+#endif
+
+#ifdef L_orddf2
+#ifdef __ARC_NORM__
+#include "ieee-754/orddf2.S"
+#endif
+#endif
+
+#ifdef L_ordsf2
+#ifdef __ARC_NORM__
+#include "ieee-754/ordsf2.S"
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/arc/libgcc-excl.ver b/gcc-4.9/libgcc/config/arc/libgcc-excl.ver
new file mode 100644
index 000000000..b78ec672c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/libgcc-excl.ver
@@ -0,0 +1,43 @@
+# Exclude libgcc.so symbols for the Synopsys DesignWare ARC CPU.
+
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+# Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+#              on behalf of Synopsys Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.  */
+
+# Exclude various symbols which should not be visible in libgcc.so for ARC.
+# Floating point comparisons use a special lightweight ABI which is not
+# compatible with calls via a plt.  Moreover, the code is so compact that
+# it is better to include a separate copy in each dso.
+%exclude {
+  __eqsf2
+  __eqdf2
+  __gtsf2
+  __gtdf2
+  __gesf2
+  __gedf2
+  __uneqsf2
+  __uneqdf2
+  __ordsf2
+  __orddf2
+}
diff --git a/gcc-4.9/libgcc/config/arc/t-arc b/gcc-4.9/libgcc/config/arc/t-arc
new file mode 100644
index 000000000..4d258437e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/t-arc
@@ -0,0 +1,100 @@
+# GCC Makefile fragment for Synopsys DesignWare ARC
+
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+# Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+#              on behalf of Synopsys Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under the
+# terms of the GNU General Public License as published by the Free Software
+# Foundation; either version 3, or (at your option) any later version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+# FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more
+# details.
+
+# You should have received a copy of the GNU General Public License along
+# with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+CROSS_LIBGCC1 = libgcc1-asm.a
+LIB1ASMSRC = arc/lib1funcs.S
+LIB1ASMFUNCS = _mulsi3 _umulsidi3  _umulsi3_highpart \
+  _udivsi3 _divsi3 _umodsi3 _modsi3 \
+  _divmod_tools _clzsi2 \
+  _millicodethunk_st _millicodethunk_ld _millicodethunk_ret \
+  _adddf3 _muldf3 _addsf3 _mulsf3 _divsf3 _divdf3 _truncdfsf2 _extendsfdf2 \
+  _eqdf2 _eqsf2 _gedf2 _gesf2 _gtdf2 _gtsf2 _uneqdf2 _uneqsf2 _ordsf2 _orddf2 \
+  _fixdfsi _fixsfsi _floatsidf _floatsisf _fixunsdfsi _floatunsidf
+
+#LIBGCC2_CFLAGS = -g1 -O2 $(LIBGCC2_INCLUDES) $(GCC_CFLAGS)
+
+# For floating-point emulation, we mostly use hand-coded assembly.
+# We use fp-bit.c for debugging purposes, and some parts of it
+# as a fallback for hardware configurations for which the hand-coded
+# assembly support is incomplete, i.e., where there is no NORM and/or no
+# supported multiply instruction.  Using floating point on such a
+# configuration is generally inadvisable, but we got to provide support
+# somehow so that we can run the testsuites.
+# fp-hack.h / dp-hack.h take care of slecting the parts that are needed,
+# and (for debugging) of renaming functions so that they can be
+# used in an asm wrapper.
+
+LIB2ADD = fp-bit.c dp-bit.c
+
+dp-bit.c: $(srcdir)/fp-bit.c
+	echo '#ifndef __big_endian__' > dp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
+	echo '#endif' >> dp-bit.c
+	echo '#include "fp-bit.h"' >> dp-bit.c
+	echo '#include "config/arc/dp-hack.h"' >> dp-bit.c
+	grep -v 'include.*fp-bit.h' $(srcdir)/fp-bit.c >> dp-bit.c
+
+fp-bit.c: $(srcdir)/fp-bit.c
+	echo '#define FLOAT' > fp-bit.c
+	echo '#ifndef __big_endian__' >> fp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
+	echo '#endif' >> fp-bit.c
+	echo '#include "config/arc/fp-hack.h"' >> fp-bit.c
+	cat $(srcdir)/fp-bit.c >> fp-bit.c
+
+# .init/.fini section routines
+
+crtg.o: $(srcdir)/config/arc/crtg.S
+	$(crt_compile) -c -x assembler-with-cpp $<
+
+crtgend.o: $(srcdir)/config/arc/crtgend.S
+	$(crt_compile) -c -x assembler-with-cpp $<
+
+mcount.o: $(srcdir)/config/arc/gmon/mcount.c
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $< \
+	-fcall-saved-r0 -fcall-saved-r1 -fcall-saved-r2 -fcall-saved-r3 \
+	-fcall-saved-r4 -fcall-saved-r5 -fcall-saved-r6 -fcall-saved-r7 \
+	-fomit-frame-pointer
+
+gmon.o: $(srcdir)/config/arc/gmon/gmon.c
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -mno-sdata -c $< \
+	-fno-strict-aliasing \
+	-Wno-extra # suppress inane warning about missing initializer.
+	# Adding initializers for the remaining elements of gmonparam would
+	# make the code more brittle.
+
+prof-freq-stub.o: $(srcdir)/config/arc/gmon/prof-freq-stub.S
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $<
+
+prof-freq.o: $(srcdir)/config/arc/gmon/prof-freq.c
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $<
+
+dcache_linesz.o: $(srcdir)/config/arc/gmon/dcache_linesz.S
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $<
+
+profil.o: $(srcdir)/config/arc/gmon/profil.S
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $<
+
+profil-uclibc.o: $(srcdir)/config/arc/gmon/profil-uclibc.c
+	$(gcc_compile) -isystem $(srcdir)/config/arc/gmon -c $<
+
+libgmon.a: mcount.o gmon.o dcache_linesz.o $(PROFILE_OSDEP)
+	$(AR_CREATE_FOR_TARGET) $@ $^
diff --git a/gcc-4.9/libgcc/config/arc/t-arc-newlib b/gcc-4.9/libgcc/config/arc/t-arc-newlib
new file mode 100644
index 000000000..87c948828
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/t-arc-newlib
@@ -0,0 +1,22 @@
+# GCC Makefile fragment for the Synopsys DesignWare ARC CPU with newlib.
+
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+# Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+#              on behalf of Synopsys Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under the
+# terms of the GNU General Public License as published by the Free Software
+# Foundation; either version 3, or (at your option) any later version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+# FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more
+# details.
+
+# You should have received a copy of the GNU General Public License along
+# with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+PROFILE_OSDEP = prof-freq-stub.o profil.o
diff --git a/gcc-4.9/libgcc/config/arc/t-arc700-uClibc b/gcc-4.9/libgcc/config/arc/t-arc700-uClibc
new file mode 100644
index 000000000..bac08d3a6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arc/t-arc700-uClibc
@@ -0,0 +1,40 @@
+# GCC Makefile fragment for the Synopsys DesignWare ARC700 CPU with uClibc.
+
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+# Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
+#              on behalf of Synopsys Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.  */
+
+CRTSTUFF_T_CFLAGS += -mno-sdata
+
+# Compile crtbeginS.o and crtendS.o with pic.
+CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -mA7 -fPIC
+
+# Compile libgcc2.a with pic.
+TARGET_LIBGCC2_CFLAGS = -mA7 -fPIC
+
+PROFILE_OSDEP = prof-freq.o
+
+# Override t-slibgcc-elf-ver to hide some lib1func
+# routines which should not be called via PLT.
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/arc/libgcc-excl.ver
diff --git a/gcc-4.9/libgcc/config/arm/bpabi-lib.h b/gcc-4.9/libgcc/config/arm/bpabi-lib.h
new file mode 100644
index 000000000..193cc5604
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/bpabi-lib.h
@@ -0,0 +1,81 @@
+/* Configuration file for ARM BPABI targets, library renames.
+   Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery, LLC   
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Make __aeabi_AEABI_NAME an alias for __GCC_NAME.  */
+#define RENAME_LIBRARY(GCC_NAME, AEABI_NAME)		\
+  typeof (__##GCC_NAME) __aeabi_##AEABI_NAME \
+    __attribute__((alias ("__" #GCC_NAME)));
+
+/* Give some libgcc functions an additional __aeabi name.  */
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, lmul)
+#endif
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, lmul)
+#endif
+#ifdef L_fixdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, d2lz) \
+  extern DWtype __fixdfdi (DFtype) __attribute__((pcs("aapcs"))); \
+  extern UDWtype __fixunsdfdi (DFtype) __asm__("__aeabi_d2ulz") __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixunsdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, d2ulz) \
+  extern UDWtype __fixunsdfdi (DFtype) __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixsfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, f2lz) \
+  extern DWtype __fixsfdi (SFtype) __attribute__((pcs("aapcs"))); \
+  extern UDWtype __fixunssfdi (SFtype) __asm__("__aeabi_f2ulz") __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_fixunssfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, f2ulz) \
+  extern UDWtype __fixunssfdi (SFtype) __attribute__((pcs("aapcs")));
+#endif
+#ifdef L_floatdidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdidf, l2d)
+#endif
+#ifdef L_floatdisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, l2f)
+#endif
+
+/* These renames are needed on ARMv6M.  Other targets get them from
+   assembly routines.  */
+#ifdef L_fixunsdfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfsi, d2uiz)
+#endif
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfsi, f2uiz)
+#endif
+#ifdef L_floatundidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundidf, ul2d)
+#endif
+#ifdef L_floatundisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundisf, ul2f)
+#endif
+
+/* For ARM bpabi, we only want to use a "__gnu_" prefix for the fixed-point
+   helper functions - not everything in libgcc - in the interests of
+   maintaining backward compatibility.  */
+#define LIBGCC2_FIXEDBIT_GNU_PREFIX
+
+#if (!defined(__ARM_ARCH_EXT_IDIV__))
+# define TARGET_HAS_NO_HW_DIVIDE
+#endif
diff --git a/gcc-4.9/libgcc/config/arm/bpabi-v6m.S b/gcc-4.9/libgcc/config/arm/bpabi-v6m.S
new file mode 100644
index 000000000..0bf2e55ac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/bpabi-v6m.S
@@ -0,0 +1,318 @@
+/* Miscellaneous BPABI functions.  ARMv6M implementation
+
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+
+#ifdef L_aeabi_lcmp
+
+FUNC_START aeabi_lcmp
+	cmp	xxh, yyh
+	beq	1f
+	bgt	2f
+	mov	r0, #1
+	neg	r0, r0
+	RET
+2:
+	mov	r0, #1
+	RET
+1:
+	sub	r0, xxl, yyl
+	beq	1f
+	bhi	2f
+	mov	r0, #1
+	neg	r0, r0
+	RET
+2:
+	mov	r0, #1
+1:
+	RET
+	FUNC_END aeabi_lcmp
+
+#endif /* L_aeabi_lcmp */
+	
+#ifdef L_aeabi_ulcmp
+
+FUNC_START aeabi_ulcmp
+	cmp	xxh, yyh
+	bne	1f
+	sub	r0, xxl, yyl
+	beq	2f
+1:
+	bcs	1f
+	mov	r0, #1
+	neg	r0, r0
+	RET
+1:
+	mov	r0, #1
+2:
+	RET
+	FUNC_END aeabi_ulcmp
+
+#endif /* L_aeabi_ulcmp */
+
+.macro test_div_by_zero signed
+	cmp	yyh, #0
+	bne	7f
+	cmp	yyl, #0
+	bne	7f
+	cmp	xxh, #0
+	bne	2f
+	cmp	xxl, #0
+2:
+	.ifc	\signed, unsigned
+	beq	3f
+	mov	xxh, #0
+	mvn	xxh, xxh		@ 0xffffffff
+	mov	xxl, xxh
+3:
+	.else
+	beq	5f
+	blt	6f
+	mov	xxl, #0
+	mvn	xxl, xxl		@ 0xffffffff
+	lsr	xxh, xxl, #1		@ 0x7fffffff
+	b	5f
+6:	mov	xxh, #0x80
+	lsl	xxh, xxh, #24		@ 0x80000000
+	mov	xxl, #0
+5:
+	.endif
+	@ tailcalls are tricky on v6-m.
+	push	{r0, r1, r2}
+	ldr	r0, 1f
+	adr	r1, 1f
+	add	r0, r1
+	str	r0, [sp, #8]
+	@ We know we are not on armv4t, so pop pc is safe.
+	pop	{r0, r1, pc}
+	.align	2
+1:
+	.word	__aeabi_ldiv0 - 1b
+7:
+.endm
+
+#ifdef L_aeabi_ldivmod
+
+FUNC_START aeabi_ldivmod
+	test_div_by_zero signed
+
+	push {r0, r1}
+	mov r0, sp
+	push {r0, lr}
+	ldr r0, [sp, #8]
+	bl SYM(__gnu_ldivmod_helper)
+	ldr r3, [sp, #4]
+	mov lr, r3
+	add sp, sp, #8
+	pop {r2, r3}
+	RET
+	FUNC_END aeabi_ldivmod
+
+#endif /* L_aeabi_ldivmod */
+
+#ifdef L_aeabi_uldivmod
+
+FUNC_START aeabi_uldivmod
+	test_div_by_zero unsigned
+
+	push {r0, r1}
+	mov r0, sp
+	push {r0, lr}
+	ldr r0, [sp, #8]
+	bl SYM(__gnu_uldivmod_helper)
+	ldr r3, [sp, #4]
+	mov lr, r3
+	add sp, sp, #8
+	pop {r2, r3}
+	RET
+	FUNC_END aeabi_uldivmod
+	
+#endif /* L_aeabi_uldivmod */
+
+#ifdef L_arm_addsubsf3
+
+FUNC_START aeabi_frsub
+
+      push	{r4, lr}
+      mov	r4, #1
+      lsl	r4, #31
+      eor	r0, r0, r4
+      bl	__aeabi_fadd
+      pop	{r4, pc}
+
+      FUNC_END aeabi_frsub
+
+#endif /* L_arm_addsubsf3 */
+
+#ifdef L_arm_cmpsf2
+
+FUNC_START aeabi_cfrcmple
+
+	mov	ip, r0
+	mov	r0, r1
+	mov	r1, ip
+	b	6f
+
+FUNC_START aeabi_cfcmpeq
+FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
+
+	@ The status-returning routines are required to preserve all
+	@ registers except ip, lr, and cpsr.
+6:	push	{r0, r1, r2, r3, r4, lr}
+	bl	__lesf2
+	@ Set the Z flag correctly, and the C flag unconditionally.
+	cmp	r0, #0
+	@ Clear the C flag if the return value was -1, indicating
+	@ that the first operand was smaller than the second.
+	bmi 1f
+	mov	r1, #0
+	cmn	r0, r1
+1:
+	pop	{r0, r1, r2, r3, r4, pc}
+
+	FUNC_END aeabi_cfcmple
+	FUNC_END aeabi_cfcmpeq
+	FUNC_END aeabi_cfrcmple
+
+FUNC_START	aeabi_fcmpeq
+
+	push	{r4, lr}
+	bl	__eqsf2
+	neg	r0, r0
+	add	r0, r0, #1
+	pop	{r4, pc}
+
+	FUNC_END aeabi_fcmpeq
+
+.macro COMPARISON cond, helper, mode=sf2
+FUNC_START	aeabi_fcmp\cond
+
+	push	{r4, lr}
+	bl	__\helper\mode
+	cmp	r0, #0
+	b\cond	1f
+	mov	r0, #0
+	pop	{r4, pc}
+1:
+	mov	r0, #1
+	pop	{r4, pc}
+
+	FUNC_END aeabi_fcmp\cond
+.endm
+
+COMPARISON lt, le
+COMPARISON le, le
+COMPARISON gt, ge
+COMPARISON ge, ge
+
+#endif /* L_arm_cmpsf2 */
+
+#ifdef L_arm_addsubdf3
+
+FUNC_START aeabi_drsub
+
+      push	{r4, lr}
+      mov	r4, #1
+      lsl	r4, #31
+      eor	xxh, xxh, r4
+      bl	__aeabi_dadd
+      pop	{r4, pc}
+
+      FUNC_END aeabi_drsub
+
+#endif /* L_arm_addsubdf3 */
+
+#ifdef L_arm_cmpdf2
+
+FUNC_START aeabi_cdrcmple
+
+	mov	ip, r0
+	mov	r0, r2
+	mov	r2, ip
+	mov	ip, r1
+	mov	r1, r3
+	mov	r3, ip
+	b	6f
+
+FUNC_START aeabi_cdcmpeq
+FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
+
+	@ The status-returning routines are required to preserve all
+	@ registers except ip, lr, and cpsr.
+6:	push	{r0, r1, r2, r3, r4, lr}
+	bl	__ledf2
+	@ Set the Z flag correctly, and the C flag unconditionally.
+	cmp	r0, #0
+	@ Clear the C flag if the return value was -1, indicating
+	@ that the first operand was smaller than the second.
+	bmi 1f
+	mov	r1, #0
+	cmn	r0, r1
+1:
+	pop	{r0, r1, r2, r3, r4, pc}
+
+	FUNC_END aeabi_cdcmple
+	FUNC_END aeabi_cdcmpeq
+	FUNC_END aeabi_cdrcmple
+
+FUNC_START	aeabi_dcmpeq
+
+	push	{r4, lr}
+	bl	__eqdf2
+	neg	r0, r0
+	add	r0, r0, #1
+	pop	{r4, pc}
+
+	FUNC_END aeabi_dcmpeq
+
+.macro COMPARISON cond, helper, mode=df2
+FUNC_START	aeabi_dcmp\cond
+
+	push	{r4, lr}
+	bl	__\helper\mode
+	cmp	r0, #0
+	b\cond	1f
+	mov	r0, #0
+	pop	{r4, pc}
+1:
+	mov	r0, #1
+	pop	{r4, pc}
+
+	FUNC_END aeabi_dcmp\cond
+.endm
+
+COMPARISON lt, le
+COMPARISON le, le
+COMPARISON gt, ge
+COMPARISON ge, ge
+
+#endif /* L_arm_cmpdf2 */
diff --git a/gcc-4.9/libgcc/config/arm/bpabi.S b/gcc-4.9/libgcc/config/arm/bpabi.S
new file mode 100644
index 000000000..777230154
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/bpabi.S
@@ -0,0 +1,168 @@
+/* Miscellaneous BPABI functions.
+
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery, LLC.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+
+#ifdef L_aeabi_lcmp
+
+ARM_FUNC_START aeabi_lcmp
+	cmp	xxh, yyh
+	do_it	lt
+	movlt	r0, #-1
+	do_it	gt
+	movgt	r0, #1
+	do_it	ne
+	RETc(ne)
+	subs	r0, xxl, yyl
+	do_it	lo
+	movlo	r0, #-1
+	do_it	hi
+	movhi	r0, #1
+	RET
+	FUNC_END aeabi_lcmp
+
+#endif /* L_aeabi_lcmp */
+	
+#ifdef L_aeabi_ulcmp
+
+ARM_FUNC_START aeabi_ulcmp
+	cmp	xxh, yyh
+	do_it	lo
+	movlo	r0, #-1
+	do_it	hi
+	movhi	r0, #1
+	do_it	ne
+	RETc(ne)
+	cmp	xxl, yyl
+	do_it	lo
+	movlo	r0, #-1
+	do_it	hi
+	movhi	r0, #1
+	do_it	eq
+	moveq	r0, #0
+	RET
+	FUNC_END aeabi_ulcmp
+
+#endif /* L_aeabi_ulcmp */
+
+.macro test_div_by_zero signed
+/* Tail-call to divide-by-zero handlers which may be overridden by the user,
+   so unwinding works properly.  */
+#if defined(__thumb2__)
+	cbnz	yyh, 1f
+	cbnz	yyl, 1f
+	cmp	xxh, #0
+	do_it	eq
+	cmpeq	xxl, #0
+	.ifc \signed, unsigned
+	beq	2f
+	mov	xxh, #0xffffffff
+	mov	xxl, xxh
+2:
+	.else
+	do_it	lt, t
+	movlt	xxl, #0
+	movlt	xxh, #0x80000000
+	do_it	gt, t
+	movgt	xxh, #0x7fffffff
+	movgt	xxl, #0xffffffff
+	.endif
+	b	SYM (__aeabi_ldiv0) __PLT__
+1:
+#else
+	/* Note: Thumb-1 code calls via an ARM shim on processors which
+	   support ARM mode.  */
+	cmp	yyh, #0
+	cmpeq	yyl, #0
+	bne	2f
+	cmp	xxh, #0
+	cmpeq	xxl, #0
+	.ifc \signed, unsigned
+	movne	xxh, #0xffffffff
+	movne	xxl, #0xffffffff
+	.else
+	movlt	xxh, #0x80000000
+	movlt	xxl, #0
+	movgt	xxh, #0x7fffffff
+	movgt	xxl, #0xffffffff
+	.endif
+	b	SYM (__aeabi_ldiv0) __PLT__
+2:
+#endif
+.endm
+
+#ifdef L_aeabi_ldivmod
+
+ARM_FUNC_START aeabi_ldivmod
+	cfi_start	__aeabi_ldivmod, LSYM(Lend_aeabi_ldivmod)
+	test_div_by_zero signed
+
+	sub sp, sp, #8
+#if defined(__thumb2__)
+	mov ip, sp
+	push {ip, lr}
+#else
+	do_push {sp, lr}
+#endif
+98:	cfi_push 98b - __aeabi_ldivmod, 0xe, -0xc, 0x10
+	bl SYM(__gnu_ldivmod_helper) __PLT__
+	ldr lr, [sp, #4]
+	add sp, sp, #8
+	do_pop {r2, r3}
+	RET
+	cfi_end	LSYM(Lend_aeabi_ldivmod)
+	
+#endif /* L_aeabi_ldivmod */
+
+#ifdef L_aeabi_uldivmod
+
+ARM_FUNC_START aeabi_uldivmod
+	cfi_start	__aeabi_uldivmod, LSYM(Lend_aeabi_uldivmod)
+	test_div_by_zero unsigned
+
+	sub sp, sp, #8
+#if defined(__thumb2__)
+	mov ip, sp
+	push {ip, lr}
+#else
+	do_push {sp, lr}
+#endif
+98:	cfi_push 98b - __aeabi_uldivmod, 0xe, -0xc, 0x10
+	bl SYM(__gnu_uldivmod_helper) __PLT__
+	ldr lr, [sp, #4]
+	add sp, sp, #8
+	do_pop {r2, r3}
+	RET
+	cfi_end	LSYM(Lend_aeabi_uldivmod)
+
+#endif /* L_aeabi_divmod */
+	
diff --git a/gcc-4.9/libgcc/config/arm/bpabi.c b/gcc-4.9/libgcc/config/arm/bpabi.c
new file mode 100644
index 000000000..7b155ccc1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/bpabi.c
@@ -0,0 +1,56 @@
+/* Miscellaneous BPABI functions.
+
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery, LLC.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+extern long long __divdi3 (long long, long long);
+extern unsigned long long __udivdi3 (unsigned long long, 
+				     unsigned long long);
+extern long long __gnu_ldivmod_helper (long long, long long, long long *);
+extern unsigned long long __gnu_uldivmod_helper (unsigned long long, 
+						 unsigned long long, 
+						 unsigned long long *);
+
+
+long long
+__gnu_ldivmod_helper (long long a, 
+		      long long b, 
+		      long long *remainder)
+{
+  long long quotient;
+
+  quotient = __divdi3 (a, b);
+  *remainder = a - b * quotient;
+  return quotient;
+}
+
+unsigned long long
+__gnu_uldivmod_helper (unsigned long long a, 
+		       unsigned long long b,
+		       unsigned long long *remainder)
+{
+  unsigned long long quotient;
+
+  quotient = __udivdi3 (a, b);
+  *remainder = a - b * quotient;
+  return quotient;
+}
diff --git a/gcc-4.9/libgcc/config/arm/crti.S b/gcc-4.9/libgcc/config/arm/crti.S
new file mode 100644
index 000000000..517e15896
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/crti.S
@@ -0,0 +1,86 @@
+#   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+#   Written By Nick Clifton
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+# This file just make a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+#ifdef __ELF__
+#define TYPE(x) .type x,function
+#else
+#define TYPE(x)
+#endif
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+
+	# Note - this macro is complemented by the FUNC_END macro
+	# in crtn.S.  If you change this macro you must also change
+	# that macro match.
+.macro FUNC_START
+#ifdef __thumb__
+	.thumb
+	
+	push	{r3, r4, r5, r6, r7, lr}
+#else
+	.arm
+	#  Create a stack frame and save any call-preserved registers
+	mov	ip, sp
+	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc}
+	sub	fp, ip, #4
+#endif
+.endm
+		
+	.section	".init"
+	.align 2
+	.global	_init
+#ifdef __thumb__
+	.thumb_func
+#endif
+	TYPE(_init)
+_init:
+	FUNC_START
+	
+		
+	.section	".fini"
+	.align	2
+	.global	_fini
+#ifdef __thumb__
+	.thumb_func
+#endif
+	TYPE(_fini)
+_fini:
+	FUNC_START
+	
+# end of crti.S
diff --git a/gcc-4.9/libgcc/config/arm/crtn.S b/gcc-4.9/libgcc/config/arm/crtn.S
new file mode 100644
index 000000000..0f644efd0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/crtn.S
@@ -0,0 +1,82 @@
+#   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+#   Written By Nick Clifton
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+# 
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	# Note - this macro is complemented by the FUNC_START macro
+	# in crti.S.  If you change this macro you must also change
+	# that macro match.
+	#
+	# Note - we do not try any fancy optimizations of the return
+	# sequences here, it is just not worth it.  Instead keep things
+	# simple.  Restore all the save registers, including the link
+	# register and then perform the correct function return instruction.
+	# We also save/restore r3 to ensure stack alignment.
+.macro FUNC_END
+#ifdef __thumb__
+	.thumb
+	
+	pop	{r3, r4, r5, r6, r7}
+	pop	{r3}
+	mov	lr, r3
+#else
+	.arm
+	
+	sub	sp, fp, #40
+	ldmfd	sp, {r4, r5, r6, r7, r8, r9, sl, fp, sp, lr}
+#endif
+	
+#if defined __THUMB_INTERWORK__ || defined __thumb__
+	bx	lr
+#else
+	mov	pc, lr
+#endif
+.endm
+		
+	
+	.section	".init"
+	;;
+	FUNC_END
+	
+	.section	".fini"
+	;;
+	FUNC_END
+	
+# end of crtn.S
diff --git a/gcc-4.9/libgcc/config/arm/fp16.c b/gcc-4.9/libgcc/config/arm/fp16.c
new file mode 100644
index 000000000..f599e8b21
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/fp16.c
@@ -0,0 +1,143 @@
+/* Half-float conversion routines.
+
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+static inline unsigned short
+__gnu_f2h_internal(unsigned int a, int ieee)
+{
+  unsigned short sign = (a >> 16) & 0x8000;
+  int aexp = (a >> 23) & 0xff;
+  unsigned int mantissa = a & 0x007fffff;
+  unsigned int mask;
+  unsigned int increment;
+
+  if (aexp == 0xff)
+    {
+      if (!ieee)
+	return sign;
+      return sign | 0x7e00 | (mantissa >> 13);
+    }
+  
+  if (aexp == 0 && mantissa == 0)
+    return sign;
+
+  aexp -= 127;
+
+  /* Decimal point between bits 22 and 23.  */
+  mantissa |= 0x00800000;
+  if (aexp < -14)
+    {
+      mask = 0x00ffffff;
+      if (aexp >= -25)
+        mask >>= 25 + aexp;
+    }
+  else
+    mask = 0x00001fff;
+
+  /* Round.  */
+  if (mantissa & mask)
+    {
+      increment = (mask + 1) >> 1;
+      if ((mantissa & mask) == increment)
+	increment = mantissa & (increment << 1);
+      mantissa += increment;
+      if (mantissa >= 0x01000000)
+       	{
+	  mantissa >>= 1;
+	  aexp++;
+	}
+    }
+
+  if (ieee)
+    {
+      if (aexp > 15)
+	return sign | 0x7c00;
+    }
+  else
+    {
+      if (aexp > 16)
+	return sign | 0x7fff;
+    }
+
+  if (aexp < -24)
+    return sign;
+
+  if (aexp < -14)
+    {
+      mantissa >>= -14 - aexp;
+      aexp = -14;
+    }
+
+  /* We leave the leading 1 in the mantissa, and subtract one
+     from the exponent bias to compensate.  */
+  return sign | (((aexp + 14) << 10) + (mantissa >> 13));
+}
+
+unsigned int
+__gnu_h2f_internal(unsigned short a, int ieee)
+{
+  unsigned int sign = (unsigned int)(a & 0x8000) << 16;
+  int aexp = (a >> 10) & 0x1f;
+  unsigned int mantissa = a & 0x3ff;
+
+  if (aexp == 0x1f && ieee)
+    return sign | 0x7f800000 | (mantissa << 13);
+
+  if (aexp == 0)
+    {
+      int shift;
+
+      if (mantissa == 0)
+	return sign;
+
+      shift = __builtin_clz(mantissa) - 21;
+      mantissa <<= shift;
+      aexp = -shift;
+    }
+
+  return sign | (((aexp + 0x70) << 23) + (mantissa << 13));
+}
+
+unsigned short
+__gnu_f2h_ieee(unsigned int a)
+{
+  return __gnu_f2h_internal(a, 1);
+}
+
+unsigned int
+__gnu_h2f_ieee(unsigned short a)
+{
+  return __gnu_h2f_internal(a, 1);
+}
+
+unsigned short
+__gnu_f2h_alternative(unsigned int x)
+{
+  return __gnu_f2h_internal(x, 0);
+}
+
+unsigned int
+__gnu_h2f_alternative(unsigned short a)
+{
+  return __gnu_h2f_internal(a, 0);
+}
diff --git a/gcc-4.9/libgcc/config/arm/ieee754-df.S b/gcc-4.9/libgcc/config/arm/ieee754-df.S
new file mode 100644
index 000000000..406bb70ac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/ieee754-df.S
@@ -0,0 +1,1406 @@
+/* ieee754-df.S double-precision floating point support for ARM
+
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by Nicolas Pitre (nico@cam.org)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/*
+ * Notes: 
+ * 
+ * The goal of this code is to be as fast as possible.  This is
+ * not meant to be easy to understand for the casual reader.
+ * For slightly simpler code please see the single precision version
+ * of this file.
+ * 
+ * Only the default rounding mode is intended for best performances.
+ * Exceptions aren't supported yet, but that can be added quite easily
+ * if necessary without impacting performances.
+ */
+
+
+#ifndef __ARMEB__
+#define xl r0
+#define xh r1
+#define yl r2
+#define yh r3
+#else
+#define xh r0
+#define xl r1
+#define yh r2
+#define yl r3
+#endif
+
+
+#ifdef L_arm_negdf2
+
+ARM_FUNC_START negdf2
+ARM_FUNC_ALIAS aeabi_dneg negdf2
+
+	@ flip sign bit
+	eor	xh, xh, #0x80000000
+	RET
+
+	FUNC_END aeabi_dneg
+	FUNC_END negdf2
+
+#endif
+
+#ifdef L_arm_addsubdf3
+
+ARM_FUNC_START aeabi_drsub
+
+	eor	xh, xh, #0x80000000	@ flip sign bit of first arg
+	b	1f	
+
+ARM_FUNC_START subdf3
+ARM_FUNC_ALIAS aeabi_dsub subdf3
+
+	eor	yh, yh, #0x80000000	@ flip sign bit of second arg
+#if defined(__INTERWORKING_STUBS__)
+	b	1f			@ Skip Thumb-code prologue
+#endif
+
+ARM_FUNC_START adddf3
+ARM_FUNC_ALIAS aeabi_dadd adddf3
+
+1:	do_push	{r4, r5, lr}
+
+	@ Look for zeroes, equal values, INF, or NAN.
+	shift1	lsl, r4, xh, #1
+	shift1	lsl, r5, yh, #1
+	teq	r4, r5
+	do_it	eq
+	teqeq	xl, yl
+	do_it	ne, ttt
+	COND(orr,s,ne)	ip, r4, xl
+	COND(orr,s,ne)	ip, r5, yl
+	COND(mvn,s,ne)	ip, r4, asr #21
+	COND(mvn,s,ne)	ip, r5, asr #21
+	beq	LSYM(Lad_s)
+
+	@ Compute exponent difference.  Make largest exponent in r4,
+	@ corresponding arg in xh-xl, and positive exponent difference in r5.
+	shift1	lsr, r4, r4, #21
+	rsbs	r5, r4, r5, lsr #21
+	do_it	lt
+	rsblt	r5, r5, #0
+	ble	1f
+	add	r4, r4, r5
+	eor	yl, xl, yl
+	eor	yh, xh, yh
+	eor	xl, yl, xl
+	eor	xh, yh, xh
+	eor	yl, xl, yl
+	eor	yh, xh, yh
+1:
+	@ If exponent difference is too large, return largest argument
+	@ already in xh-xl.  We need up to 54 bit to handle proper rounding
+	@ of 0x1p54 - 1.1.
+	cmp	r5, #54
+	do_it	hi
+	RETLDM	"r4, r5" hi
+
+	@ Convert mantissa to signed integer.
+	tst	xh, #0x80000000
+	mov	xh, xh, lsl #12
+	mov	ip, #0x00100000
+	orr	xh, ip, xh, lsr #12
+	beq	1f
+#if defined(__thumb2__)
+	negs	xl, xl
+	sbc	xh, xh, xh, lsl #1
+#else
+	rsbs	xl, xl, #0
+	rsc	xh, xh, #0
+#endif
+1:
+	tst	yh, #0x80000000
+	mov	yh, yh, lsl #12
+	orr	yh, ip, yh, lsr #12
+	beq	1f
+#if defined(__thumb2__)
+	negs	yl, yl
+	sbc	yh, yh, yh, lsl #1
+#else
+	rsbs	yl, yl, #0
+	rsc	yh, yh, #0
+#endif
+1:
+	@ If exponent == difference, one or both args were denormalized.
+	@ Since this is not common case, rescale them off line.
+	teq	r4, r5
+	beq	LSYM(Lad_d)
+LSYM(Lad_x):
+
+	@ Compensate for the exponent overlapping the mantissa MSB added later
+	sub	r4, r4, #1
+
+	@ Shift yh-yl right per r5, add to xh-xl, keep leftover bits into ip.
+	rsbs	lr, r5, #32
+	blt	1f
+	shift1	lsl, ip, yl, lr
+	shiftop adds xl xl yl lsr r5 yl
+	adc	xh, xh, #0
+	shiftop adds xl xl yh lsl lr yl
+	shiftop adcs xh xh yh asr r5 yh
+	b	2f
+1:	sub	r5, r5, #32
+	add	lr, lr, #32
+	cmp	yl, #1
+	shift1	lsl,ip, yh, lr
+	do_it	cs
+	orrcs	ip, ip, #2		@ 2 not 1, to allow lsr #1 later
+	shiftop adds xl xl yh asr r5 yh
+	adcs	xh, xh, yh, asr #31
+2:
+	@ We now have a result in xh-xl-ip.
+	@ Keep absolute value in xh-xl-ip, sign in r5 (the n bit was set above)
+	and	r5, xh, #0x80000000
+	bpl	LSYM(Lad_p)
+#if defined(__thumb2__)
+	mov	lr, #0
+	negs	ip, ip
+	sbcs	xl, lr, xl
+	sbc	xh, lr, xh
+#else
+	rsbs	ip, ip, #0
+	rscs	xl, xl, #0
+	rsc	xh, xh, #0
+#endif
+
+	@ Determine how to normalize the result.
+LSYM(Lad_p):
+	cmp	xh, #0x00100000
+	bcc	LSYM(Lad_a)
+	cmp	xh, #0x00200000
+	bcc	LSYM(Lad_e)
+
+	@ Result needs to be shifted right.
+	movs	xh, xh, lsr #1
+	movs	xl, xl, rrx
+	mov	ip, ip, rrx
+	add	r4, r4, #1
+
+	@ Make sure we did not bust our exponent.
+	mov	r2, r4, lsl #21
+	cmn	r2, #(2 << 21)
+	bcs	LSYM(Lad_o)
+
+	@ Our result is now properly aligned into xh-xl, remaining bits in ip.
+	@ Round with MSB of ip. If halfway between two numbers, round towards
+	@ LSB of xl = 0.
+	@ Pack final result together.
+LSYM(Lad_e):
+	cmp	ip, #0x80000000
+	do_it	eq
+	COND(mov,s,eq)	ip, xl, lsr #1
+	adcs	xl, xl, #0
+	adc	xh, xh, r4, lsl #20
+	orr	xh, xh, r5
+	RETLDM	"r4, r5"
+
+	@ Result must be shifted left and exponent adjusted.
+LSYM(Lad_a):
+	movs	ip, ip, lsl #1
+	adcs	xl, xl, xl
+	adc	xh, xh, xh
+	tst	xh, #0x00100000
+	sub	r4, r4, #1
+	bne	LSYM(Lad_e)
+
+	@ No rounding necessary since ip will always be 0 at this point.
+LSYM(Lad_l):
+
+#if __ARM_ARCH__ < 5
+
+	teq	xh, #0
+	movne	r3, #20
+	moveq	r3, #52
+	moveq	xh, xl
+	moveq	xl, #0
+	mov	r2, xh
+	cmp	r2, #(1 << 16)
+	movhs	r2, r2, lsr #16
+	subhs	r3, r3, #16
+	cmp	r2, #(1 << 8)
+	movhs	r2, r2, lsr #8
+	subhs	r3, r3, #8
+	cmp	r2, #(1 << 4)
+	movhs	r2, r2, lsr #4
+	subhs	r3, r3, #4
+	cmp	r2, #(1 << 2)
+	subhs	r3, r3, #2
+	sublo	r3, r3, r2, lsr #1
+	sub	r3, r3, r2, lsr #3
+
+#else
+
+	teq	xh, #0
+	do_it	eq, t
+	moveq	xh, xl
+	moveq	xl, #0
+	clz	r3, xh
+	do_it	eq
+	addeq	r3, r3, #32
+	sub	r3, r3, #11
+
+#endif
+
+	@ determine how to shift the value.
+	subs	r2, r3, #32
+	bge	2f
+	adds	r2, r2, #12
+	ble	1f
+
+	@ shift value left 21 to 31 bits, or actually right 11 to 1 bits
+	@ since a register switch happened above.
+	add	ip, r2, #20
+	rsb	r2, r2, #12
+	shift1	lsl, xl, xh, ip
+	shift1	lsr, xh, xh, r2
+	b	3f
+
+	@ actually shift value left 1 to 20 bits, which might also represent
+	@ 32 to 52 bits if counting the register switch that happened earlier.
+1:	add	r2, r2, #20
+2:	do_it	le
+	rsble	ip, r2, #32
+	shift1	lsl, xh, xh, r2
+#if defined(__thumb2__)
+	lsr	ip, xl, ip
+	itt	le
+	orrle	xh, xh, ip
+	lslle	xl, xl, r2
+#else
+	orrle	xh, xh, xl, lsr ip
+	movle	xl, xl, lsl r2
+#endif
+
+	@ adjust exponent accordingly.
+3:	subs	r4, r4, r3
+	do_it	ge, tt
+	addge	xh, xh, r4, lsl #20
+	orrge	xh, xh, r5
+	RETLDM	"r4, r5" ge
+
+	@ Exponent too small, denormalize result.
+	@ Find out proper shift value.
+	mvn	r4, r4
+	subs	r4, r4, #31
+	bge	2f
+	adds	r4, r4, #12
+	bgt	1f
+
+	@ shift result right of 1 to 20 bits, sign is in r5.
+	add	r4, r4, #20
+	rsb	r2, r4, #32
+	shift1	lsr, xl, xl, r4
+	shiftop orr xl xl xh lsl r2 yh
+	shiftop orr xh r5 xh lsr r4 yh
+	RETLDM	"r4, r5"
+
+	@ shift result right of 21 to 31 bits, or left 11 to 1 bits after
+	@ a register switch from xh to xl.
+1:	rsb	r4, r4, #12
+	rsb	r2, r4, #32
+	shift1	lsr, xl, xl, r2
+	shiftop orr xl xl xh lsl r4 yh
+	mov	xh, r5
+	RETLDM	"r4, r5"
+
+	@ Shift value right of 32 to 64 bits, or 0 to 32 bits after a switch
+	@ from xh to xl.
+2:	shift1	lsr, xl, xh, r4
+	mov	xh, r5
+	RETLDM	"r4, r5"
+
+	@ Adjust exponents for denormalized arguments.
+	@ Note that r4 must not remain equal to 0.
+LSYM(Lad_d):
+	teq	r4, #0
+	eor	yh, yh, #0x00100000
+	do_it	eq, te
+	eoreq	xh, xh, #0x00100000
+	addeq	r4, r4, #1
+	subne	r5, r5, #1
+	b	LSYM(Lad_x)
+
+
+LSYM(Lad_s):
+	mvns	ip, r4, asr #21
+	do_it	ne
+	COND(mvn,s,ne)	ip, r5, asr #21
+	beq	LSYM(Lad_i)
+
+	teq	r4, r5
+	do_it	eq
+	teqeq	xl, yl
+	beq	1f
+
+	@ Result is x + 0.0 = x or 0.0 + y = y.
+	orrs	ip, r4, xl
+	do_it	eq, t
+	moveq	xh, yh
+	moveq	xl, yl
+	RETLDM	"r4, r5"
+
+1:	teq	xh, yh
+
+	@ Result is x - x = 0.
+	do_it	ne, tt
+	movne	xh, #0
+	movne	xl, #0
+	RETLDM	"r4, r5" ne
+
+	@ Result is x + x = 2x.
+	movs	ip, r4, lsr #21
+	bne	2f
+	movs	xl, xl, lsl #1
+	adcs	xh, xh, xh
+	do_it	cs
+	orrcs	xh, xh, #0x80000000
+	RETLDM	"r4, r5"
+2:	adds	r4, r4, #(2 << 21)
+	do_it	cc, t
+	addcc	xh, xh, #(1 << 20)
+	RETLDM	"r4, r5" cc
+	and	r5, xh, #0x80000000
+
+	@ Overflow: return INF.
+LSYM(Lad_o):
+	orr	xh, r5, #0x7f000000
+	orr	xh, xh, #0x00f00000
+	mov	xl, #0
+	RETLDM	"r4, r5"
+
+	@ At least one of x or y is INF/NAN.
+	@   if xh-xl != INF/NAN: return yh-yl (which is INF/NAN)
+	@   if yh-yl != INF/NAN: return xh-xl (which is INF/NAN)
+	@   if either is NAN: return NAN
+	@   if opposite sign: return NAN
+	@   otherwise return xh-xl (which is INF or -INF)
+LSYM(Lad_i):
+	mvns	ip, r4, asr #21
+	do_it	ne, te
+	movne	xh, yh
+	movne	xl, yl
+	COND(mvn,s,eq)	ip, r5, asr #21
+	do_it	ne, t
+	movne	yh, xh
+	movne	yl, xl
+	orrs	r4, xl, xh, lsl #12
+	do_it	eq, te
+	COND(orr,s,eq)	r5, yl, yh, lsl #12
+	teqeq	xh, yh
+	orrne	xh, xh, #0x00080000	@ quiet NAN
+	RETLDM	"r4, r5"
+
+	FUNC_END aeabi_dsub
+	FUNC_END subdf3
+	FUNC_END aeabi_dadd
+	FUNC_END adddf3
+
+ARM_FUNC_START floatunsidf
+ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
+
+	teq	r0, #0
+	do_it	eq, t
+	moveq	r1, #0
+	RETc(eq)
+	do_push	{r4, r5, lr}
+	mov	r4, #0x400		@ initial exponent
+	add	r4, r4, #(52-1 - 1)
+	mov	r5, #0			@ sign bit is 0
+	.ifnc	xl, r0
+	mov	xl, r0
+	.endif
+	mov	xh, #0
+	b	LSYM(Lad_l)
+
+	FUNC_END aeabi_ui2d
+	FUNC_END floatunsidf
+
+ARM_FUNC_START floatsidf
+ARM_FUNC_ALIAS aeabi_i2d floatsidf
+
+	teq	r0, #0
+	do_it	eq, t
+	moveq	r1, #0
+	RETc(eq)
+	do_push	{r4, r5, lr}
+	mov	r4, #0x400		@ initial exponent
+	add	r4, r4, #(52-1 - 1)
+	ands	r5, r0, #0x80000000	@ sign bit in r5
+	do_it	mi
+	rsbmi	r0, r0, #0		@ absolute value
+	.ifnc	xl, r0
+	mov	xl, r0
+	.endif
+	mov	xh, #0
+	b	LSYM(Lad_l)
+
+	FUNC_END aeabi_i2d
+	FUNC_END floatsidf
+
+ARM_FUNC_START extendsfdf2
+ARM_FUNC_ALIAS aeabi_f2d extendsfdf2
+
+	movs	r2, r0, lsl #1		@ toss sign bit
+	mov	xh, r2, asr #3		@ stretch exponent
+	mov	xh, xh, rrx		@ retrieve sign bit
+	mov	xl, r2, lsl #28		@ retrieve remaining bits
+	do_it	ne, ttt
+	COND(and,s,ne)	r3, r2, #0xff000000	@ isolate exponent
+	teqne	r3, #0xff000000		@ if not 0, check if INF or NAN
+	eorne	xh, xh, #0x38000000	@ fixup exponent otherwise.
+	RETc(ne)			@ and return it.
+
+	teq	r2, #0			@ if actually 0
+	do_it	ne, e
+	teqne	r3, #0xff000000		@ or INF or NAN
+	RETc(eq)			@ we are done already.
+
+	@ value was denormalized.  We can normalize it now.
+	do_push	{r4, r5, lr}
+	mov	r4, #0x380		@ setup corresponding exponent
+	and	r5, xh, #0x80000000	@ move sign bit in r5
+	bic	xh, xh, #0x80000000
+	b	LSYM(Lad_l)
+
+	FUNC_END aeabi_f2d
+	FUNC_END extendsfdf2
+
+ARM_FUNC_START floatundidf
+ARM_FUNC_ALIAS aeabi_ul2d floatundidf
+
+	orrs	r2, r0, r1
+	do_it	eq
+	RETc(eq)
+
+	do_push	{r4, r5, lr}
+
+	mov	r5, #0
+	b	2f
+
+ARM_FUNC_START floatdidf
+ARM_FUNC_ALIAS aeabi_l2d floatdidf
+
+	orrs	r2, r0, r1
+	do_it	eq
+	RETc(eq)
+
+	do_push	{r4, r5, lr}
+
+	ands	r5, ah, #0x80000000	@ sign bit in r5
+	bpl	2f
+#if defined(__thumb2__)
+	negs	al, al
+	sbc	ah, ah, ah, lsl #1
+#else
+	rsbs	al, al, #0
+	rsc	ah, ah, #0
+#endif
+2:
+	mov	r4, #0x400		@ initial exponent
+	add	r4, r4, #(52-1 - 1)
+
+	@ If FP word order does not match integer word order, swap the words.
+	.ifnc	xh, ah
+	mov	ip, al
+	mov	xh, ah
+	mov	xl, ip
+	.endif
+
+	movs	ip, xh, lsr #22
+	beq	LSYM(Lad_p)
+
+	@ The value is too big.  Scale it down a bit...
+	mov	r2, #3
+	movs	ip, ip, lsr #3
+	do_it	ne
+	addne	r2, r2, #3
+	movs	ip, ip, lsr #3
+	do_it	ne
+	addne	r2, r2, #3
+	add	r2, r2, ip, lsr #3
+
+	rsb	r3, r2, #32
+	shift1	lsl, ip, xl, r3
+	shift1	lsr, xl, xl, r2
+	shiftop orr xl xl xh lsl r3 lr
+	shift1	lsr, xh, xh, r2
+	add	r4, r4, r2
+	b	LSYM(Lad_p)
+
+	FUNC_END floatdidf
+	FUNC_END aeabi_l2d
+	FUNC_END floatundidf
+	FUNC_END aeabi_ul2d
+
+#endif /* L_addsubdf3 */
+
+#ifdef L_arm_muldivdf3
+
+ARM_FUNC_START muldf3
+ARM_FUNC_ALIAS aeabi_dmul muldf3
+	do_push	{r4, r5, r6, lr}
+
+	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+	mov	ip, #0xff
+	orr	ip, ip, #0x700
+	ands	r4, ip, xh, lsr #20
+	do_it	ne, tte
+	COND(and,s,ne)	r5, ip, yh, lsr #20
+	teqne	r4, ip
+	teqne	r5, ip
+	bleq	LSYM(Lml_s)
+
+	@ Add exponents together
+	add	r4, r4, r5
+
+	@ Determine final sign.
+	eor	r6, xh, yh
+
+	@ Convert mantissa to unsigned integer.
+	@ If power of two, branch to a separate path.
+	bic	xh, xh, ip, lsl #21
+	bic	yh, yh, ip, lsl #21
+	orrs	r5, xl, xh, lsl #12
+	do_it	ne
+	COND(orr,s,ne)	r5, yl, yh, lsl #12
+	orr	xh, xh, #0x00100000
+	orr	yh, yh, #0x00100000
+	beq	LSYM(Lml_1)
+
+#if __ARM_ARCH__ < 4
+
+	@ Put sign bit in r6, which will be restored in yl later.
+	and   r6, r6, #0x80000000
+
+	@ Well, no way to make it shorter without the umull instruction.
+	stmfd	sp!, {r6, r7, r8, r9, sl, fp}
+	mov	r7, xl, lsr #16
+	mov	r8, yl, lsr #16
+	mov	r9, xh, lsr #16
+	mov	sl, yh, lsr #16
+	bic	xl, xl, r7, lsl #16
+	bic	yl, yl, r8, lsl #16
+	bic	xh, xh, r9, lsl #16
+	bic	yh, yh, sl, lsl #16
+	mul	ip, xl, yl
+	mul	fp, xl, r8
+	mov	lr, #0
+	adds	ip, ip, fp, lsl #16
+	adc	lr, lr, fp, lsr #16
+	mul	fp, r7, yl
+	adds	ip, ip, fp, lsl #16
+	adc	lr, lr, fp, lsr #16
+	mul	fp, xl, sl
+	mov	r5, #0
+	adds	lr, lr, fp, lsl #16
+	adc	r5, r5, fp, lsr #16
+	mul	fp, r7, yh
+	adds	lr, lr, fp, lsl #16
+	adc	r5, r5, fp, lsr #16
+	mul	fp, xh, r8
+	adds	lr, lr, fp, lsl #16
+	adc	r5, r5, fp, lsr #16
+	mul	fp, r9, yl
+	adds	lr, lr, fp, lsl #16
+	adc	r5, r5, fp, lsr #16
+	mul	fp, xh, sl
+	mul	r6, r9, sl
+	adds	r5, r5, fp, lsl #16
+	adc	r6, r6, fp, lsr #16
+	mul	fp, r9, yh
+	adds	r5, r5, fp, lsl #16
+	adc	r6, r6, fp, lsr #16
+	mul	fp, xl, yh
+	adds	lr, lr, fp
+	mul	fp, r7, sl
+	adcs	r5, r5, fp
+	mul	fp, xh, yl
+	adc	r6, r6, #0
+	adds	lr, lr, fp
+	mul	fp, r9, r8
+	adcs	r5, r5, fp
+	mul	fp, r7, r8
+	adc	r6, r6, #0
+	adds	lr, lr, fp
+	mul	fp, xh, yh
+	adcs	r5, r5, fp
+	adc	r6, r6, #0
+	ldmfd	sp!, {yl, r7, r8, r9, sl, fp}
+
+#else
+
+	@ Here is the actual multiplication.
+	umull	ip, lr, xl, yl
+	mov	r5, #0
+	umlal	lr, r5, xh, yl
+	and	yl, r6, #0x80000000
+	umlal	lr, r5, xl, yh
+	mov	r6, #0
+	umlal	r5, r6, xh, yh
+
+#endif
+
+	@ The LSBs in ip are only significant for the final rounding.
+	@ Fold them into lr.
+	teq	ip, #0
+	do_it	ne
+	orrne	lr, lr, #1
+
+	@ Adjust result upon the MSB position.
+	sub	r4, r4, #0xff
+	cmp	r6, #(1 << (20-11))
+	sbc	r4, r4, #0x300
+	bcs	1f
+	movs	lr, lr, lsl #1
+	adcs	r5, r5, r5
+	adc	r6, r6, r6
+1:
+	@ Shift to final position, add sign to result.
+	orr	xh, yl, r6, lsl #11
+	orr	xh, xh, r5, lsr #21
+	mov	xl, r5, lsl #11
+	orr	xl, xl, lr, lsr #21
+	mov	lr, lr, lsl #11
+
+	@ Check exponent range for under/overflow.
+	subs	ip, r4, #(254 - 1)
+	do_it	hi
+	cmphi	ip, #0x700
+	bhi	LSYM(Lml_u)
+
+	@ Round the result, merge final exponent.
+	cmp	lr, #0x80000000
+	do_it	eq
+	COND(mov,s,eq)	lr, xl, lsr #1
+	adcs	xl, xl, #0
+	adc	xh, xh, r4, lsl #20
+	RETLDM	"r4, r5, r6"
+
+	@ Multiplication by 0x1p*: let''s shortcut a lot of code.
+LSYM(Lml_1):
+	and	r6, r6, #0x80000000
+	orr	xh, r6, xh
+	orr	xl, xl, yl
+	eor	xh, xh, yh
+	subs	r4, r4, ip, lsr #1
+	do_it	gt, tt
+	COND(rsb,s,gt)	r5, r4, ip
+	orrgt	xh, xh, r4, lsl #20
+	RETLDM	"r4, r5, r6" gt
+
+	@ Under/overflow: fix things up for the code below.
+	orr	xh, xh, #0x00100000
+	mov	lr, #0
+	subs	r4, r4, #1
+
+LSYM(Lml_u):
+	@ Overflow?
+	bgt	LSYM(Lml_o)
+
+	@ Check if denormalized result is possible, otherwise return signed 0.
+	cmn	r4, #(53 + 1)
+	do_it	le, tt
+	movle	xl, #0
+	bicle	xh, xh, #0x7fffffff
+	RETLDM	"r4, r5, r6" le
+
+	@ Find out proper shift value.
+	rsb	r4, r4, #0
+	subs	r4, r4, #32
+	bge	2f
+	adds	r4, r4, #12
+	bgt	1f
+
+	@ shift result right of 1 to 20 bits, preserve sign bit, round, etc.
+	add	r4, r4, #20
+	rsb	r5, r4, #32
+	shift1	lsl, r3, xl, r5
+	shift1	lsr, xl, xl, r4
+	shiftop orr xl xl xh lsl r5 r2
+	and	r2, xh, #0x80000000
+	bic	xh, xh, #0x80000000
+	adds	xl, xl, r3, lsr #31
+	shiftop adc xh r2 xh lsr r4 r6
+	orrs	lr, lr, r3, lsl #1
+	do_it	eq
+	biceq	xl, xl, r3, lsr #31
+	RETLDM	"r4, r5, r6"
+
+	@ shift result right of 21 to 31 bits, or left 11 to 1 bits after
+	@ a register switch from xh to xl. Then round.
+1:	rsb	r4, r4, #12
+	rsb	r5, r4, #32
+	shift1	lsl, r3, xl, r4
+	shift1	lsr, xl, xl, r5
+	shiftop orr xl xl xh lsl r4 r2
+	bic	xh, xh, #0x7fffffff
+	adds	xl, xl, r3, lsr #31
+	adc	xh, xh, #0
+	orrs	lr, lr, r3, lsl #1
+	do_it	eq
+	biceq	xl, xl, r3, lsr #31
+	RETLDM	"r4, r5, r6"
+
+	@ Shift value right of 32 to 64 bits, or 0 to 32 bits after a switch
+	@ from xh to xl.  Leftover bits are in r3-r6-lr for rounding.
+2:	rsb	r5, r4, #32
+	shiftop orr lr lr xl lsl r5 r2
+	shift1	lsr, r3, xl, r4
+	shiftop orr r3 r3 xh lsl r5 r2
+	shift1	lsr, xl, xh, r4
+	bic	xh, xh, #0x7fffffff
+	shiftop bic xl xl xh lsr r4 r2
+	add	xl, xl, r3, lsr #31
+	orrs	lr, lr, r3, lsl #1
+	do_it	eq
+	biceq	xl, xl, r3, lsr #31
+	RETLDM	"r4, r5, r6"
+
+	@ One or both arguments are denormalized.
+	@ Scale them leftwards and preserve sign bit.
+LSYM(Lml_d):
+	teq	r4, #0
+	bne	2f
+	and	r6, xh, #0x80000000
+1:	movs	xl, xl, lsl #1
+	adc	xh, xh, xh
+	tst	xh, #0x00100000
+	do_it	eq
+	subeq	r4, r4, #1
+	beq	1b
+	orr	xh, xh, r6
+	teq	r5, #0
+	do_it	ne
+	RETc(ne)
+2:	and	r6, yh, #0x80000000
+3:	movs	yl, yl, lsl #1
+	adc	yh, yh, yh
+	tst	yh, #0x00100000
+	do_it	eq
+	subeq	r5, r5, #1
+	beq	3b
+	orr	yh, yh, r6
+	RET
+
+LSYM(Lml_s):
+	@ Isolate the INF and NAN cases away
+	teq	r4, ip
+	and	r5, ip, yh, lsr #20
+	do_it	ne
+	teqne	r5, ip
+	beq	1f
+
+	@ Here, one or more arguments are either denormalized or zero.
+	orrs	r6, xl, xh, lsl #1
+	do_it	ne
+	COND(orr,s,ne)	r6, yl, yh, lsl #1
+	bne	LSYM(Lml_d)
+
+	@ Result is 0, but determine sign anyway.
+LSYM(Lml_z):
+	eor	xh, xh, yh
+	and	xh, xh, #0x80000000
+	mov	xl, #0
+	RETLDM	"r4, r5, r6"
+
+1:	@ One or both args are INF or NAN.
+	orrs	r6, xl, xh, lsl #1
+	do_it	eq, te
+	moveq	xl, yl
+	moveq	xh, yh
+	COND(orr,s,ne)	r6, yl, yh, lsl #1
+	beq	LSYM(Lml_n)		@ 0 * INF or INF * 0 -> NAN
+	teq	r4, ip
+	bne	1f
+	orrs	r6, xl, xh, lsl #12
+	bne	LSYM(Lml_n)		@ NAN * <anything> -> NAN
+1:	teq	r5, ip
+	bne	LSYM(Lml_i)
+	orrs	r6, yl, yh, lsl #12
+	do_it	ne, t
+	movne	xl, yl
+	movne	xh, yh
+	bne	LSYM(Lml_n)		@ <anything> * NAN -> NAN
+
+	@ Result is INF, but we need to determine its sign.
+LSYM(Lml_i):
+	eor	xh, xh, yh
+
+	@ Overflow: return INF (sign already in xh).
+LSYM(Lml_o):
+	and	xh, xh, #0x80000000
+	orr	xh, xh, #0x7f000000
+	orr	xh, xh, #0x00f00000
+	mov	xl, #0
+	RETLDM	"r4, r5, r6"
+
+	@ Return a quiet NAN.
+LSYM(Lml_n):
+	orr	xh, xh, #0x7f000000
+	orr	xh, xh, #0x00f80000
+	RETLDM	"r4, r5, r6"
+
+	FUNC_END aeabi_dmul
+	FUNC_END muldf3
+
+ARM_FUNC_START divdf3
+ARM_FUNC_ALIAS aeabi_ddiv divdf3
+	
+	do_push	{r4, r5, r6, lr}
+
+	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+	mov	ip, #0xff
+	orr	ip, ip, #0x700
+	ands	r4, ip, xh, lsr #20
+	do_it	ne, tte
+	COND(and,s,ne)	r5, ip, yh, lsr #20
+	teqne	r4, ip
+	teqne	r5, ip
+	bleq	LSYM(Ldv_s)
+
+	@ Subtract divisor exponent from dividend''s.
+	sub	r4, r4, r5
+
+	@ Preserve final sign into lr.
+	eor	lr, xh, yh
+
+	@ Convert mantissa to unsigned integer.
+	@ Dividend -> r5-r6, divisor -> yh-yl.
+	orrs	r5, yl, yh, lsl #12
+	mov	xh, xh, lsl #12
+	beq	LSYM(Ldv_1)
+	mov	yh, yh, lsl #12
+	mov	r5, #0x10000000
+	orr	yh, r5, yh, lsr #4
+	orr	yh, yh, yl, lsr #24
+	mov	yl, yl, lsl #8
+	orr	r5, r5, xh, lsr #4
+	orr	r5, r5, xl, lsr #24
+	mov	r6, xl, lsl #8
+
+	@ Initialize xh with final sign bit.
+	and	xh, lr, #0x80000000
+
+	@ Ensure result will land to known bit position.
+	@ Apply exponent bias accordingly.
+	cmp	r5, yh
+	do_it	eq
+	cmpeq	r6, yl
+	adc	r4, r4, #(255 - 2)
+	add	r4, r4, #0x300
+	bcs	1f
+	movs	yh, yh, lsr #1
+	mov	yl, yl, rrx
+1:
+	@ Perform first subtraction to align result to a nibble.
+	subs	r6, r6, yl
+	sbc	r5, r5, yh
+	movs	yh, yh, lsr #1
+	mov	yl, yl, rrx
+	mov	xl, #0x00100000
+	mov	ip, #0x00080000
+
+	@ The actual division loop.
+1:	subs	lr, r6, yl
+	sbcs	lr, r5, yh
+	do_it	cs, tt
+	subcs	r6, r6, yl
+	movcs	r5, lr
+	orrcs	xl, xl, ip
+	movs	yh, yh, lsr #1
+	mov	yl, yl, rrx
+	subs	lr, r6, yl
+	sbcs	lr, r5, yh
+	do_it	cs, tt
+	subcs	r6, r6, yl
+	movcs	r5, lr
+	orrcs	xl, xl, ip, lsr #1
+	movs	yh, yh, lsr #1
+	mov	yl, yl, rrx
+	subs	lr, r6, yl
+	sbcs	lr, r5, yh
+	do_it	cs, tt
+	subcs	r6, r6, yl
+	movcs	r5, lr
+	orrcs	xl, xl, ip, lsr #2
+	movs	yh, yh, lsr #1
+	mov	yl, yl, rrx
+	subs	lr, r6, yl
+	sbcs	lr, r5, yh
+	do_it	cs, tt
+	subcs	r6, r6, yl
+	movcs	r5, lr
+	orrcs	xl, xl, ip, lsr #3
+
+	orrs	lr, r5, r6
+	beq	2f
+	mov	r5, r5, lsl #4
+	orr	r5, r5, r6, lsr #28
+	mov	r6, r6, lsl #4
+	mov	yh, yh, lsl #3
+	orr	yh, yh, yl, lsr #29
+	mov	yl, yl, lsl #3
+	movs	ip, ip, lsr #4
+	bne	1b
+
+	@ We are done with a word of the result.
+	@ Loop again for the low word if this pass was for the high word.
+	tst	xh, #0x00100000
+	bne	3f
+	orr	xh, xh, xl
+	mov	xl, #0
+	mov	ip, #0x80000000
+	b	1b
+2:
+	@ Be sure result starts in the high word.
+	tst	xh, #0x00100000
+	do_it	eq, t
+	orreq	xh, xh, xl
+	moveq	xl, #0
+3:
+	@ Check exponent range for under/overflow.
+	subs	ip, r4, #(254 - 1)
+	do_it	hi
+	cmphi	ip, #0x700
+	bhi	LSYM(Lml_u)
+
+	@ Round the result, merge final exponent.
+	subs	ip, r5, yh
+	do_it	eq, t
+	COND(sub,s,eq)	ip, r6, yl
+	COND(mov,s,eq)	ip, xl, lsr #1
+	adcs	xl, xl, #0
+	adc	xh, xh, r4, lsl #20
+	RETLDM	"r4, r5, r6"
+
+	@ Division by 0x1p*: shortcut a lot of code.
+LSYM(Ldv_1):
+	and	lr, lr, #0x80000000
+	orr	xh, lr, xh, lsr #12
+	adds	r4, r4, ip, lsr #1
+	do_it	gt, tt
+	COND(rsb,s,gt)	r5, r4, ip
+	orrgt	xh, xh, r4, lsl #20
+	RETLDM	"r4, r5, r6" gt
+
+	orr	xh, xh, #0x00100000
+	mov	lr, #0
+	subs	r4, r4, #1
+	b	LSYM(Lml_u)
+
+	@ Result mightt need to be denormalized: put remainder bits
+	@ in lr for rounding considerations.
+LSYM(Ldv_u):
+	orr	lr, r5, r6
+	b	LSYM(Lml_u)
+
+	@ One or both arguments is either INF, NAN or zero.
+LSYM(Ldv_s):
+	and	r5, ip, yh, lsr #20
+	teq	r4, ip
+	do_it	eq
+	teqeq	r5, ip
+	beq	LSYM(Lml_n)		@ INF/NAN / INF/NAN -> NAN
+	teq	r4, ip
+	bne	1f
+	orrs	r4, xl, xh, lsl #12
+	bne	LSYM(Lml_n)		@ NAN / <anything> -> NAN
+	teq	r5, ip
+	bne	LSYM(Lml_i)		@ INF / <anything> -> INF
+	mov	xl, yl
+	mov	xh, yh
+	b	LSYM(Lml_n)		@ INF / (INF or NAN) -> NAN
+1:	teq	r5, ip
+	bne	2f
+	orrs	r5, yl, yh, lsl #12
+	beq	LSYM(Lml_z)		@ <anything> / INF -> 0
+	mov	xl, yl
+	mov	xh, yh
+	b	LSYM(Lml_n)		@ <anything> / NAN -> NAN
+2:	@ If both are nonzero, we need to normalize and resume above.
+	orrs	r6, xl, xh, lsl #1
+	do_it	ne
+	COND(orr,s,ne)	r6, yl, yh, lsl #1
+	bne	LSYM(Lml_d)
+	@ One or both arguments are 0.
+	orrs	r4, xl, xh, lsl #1
+	bne	LSYM(Lml_i)		@ <non_zero> / 0 -> INF
+	orrs	r5, yl, yh, lsl #1
+	bne	LSYM(Lml_z)		@ 0 / <non_zero> -> 0
+	b	LSYM(Lml_n)		@ 0 / 0 -> NAN
+
+	FUNC_END aeabi_ddiv
+	FUNC_END divdf3
+
+#endif /* L_muldivdf3 */
+
+#ifdef L_arm_cmpdf2
+
+@ Note: only r0 (return value) and ip are clobbered here.
+
+ARM_FUNC_START gtdf2
+ARM_FUNC_ALIAS gedf2 gtdf2
+	mov	ip, #-1
+	b	1f
+
+ARM_FUNC_START ltdf2
+ARM_FUNC_ALIAS ledf2 ltdf2
+	mov	ip, #1
+	b	1f
+
+ARM_FUNC_START cmpdf2
+ARM_FUNC_ALIAS nedf2 cmpdf2
+ARM_FUNC_ALIAS eqdf2 cmpdf2
+	mov	ip, #1			@ how should we specify unordered here?
+
+1:	str	ip, [sp, #-4]!
+
+	@ Trap any INF/NAN first.
+	mov	ip, xh, lsl #1
+	mvns	ip, ip, asr #21
+	mov	ip, yh, lsl #1
+	do_it	ne
+	COND(mvn,s,ne)	ip, ip, asr #21
+	beq	3f
+
+	@ Test for equality.
+	@ Note that 0.0 is equal to -0.0.
+2:	add	sp, sp, #4
+	orrs	ip, xl, xh, lsl #1	@ if x == 0.0 or -0.0
+	do_it	eq, e
+	COND(orr,s,eq)	ip, yl, yh, lsl #1	@ and y == 0.0 or -0.0
+	teqne	xh, yh			@ or xh == yh
+	do_it	eq, tt
+	teqeq	xl, yl			@ and xl == yl
+	moveq	r0, #0			@ then equal.
+	RETc(eq)
+
+	@ Clear C flag
+	cmn	r0, #0
+
+	@ Compare sign, 
+	teq	xh, yh
+
+	@ Compare values if same sign
+	do_it	pl
+	cmppl	xh, yh
+	do_it	eq
+	cmpeq	xl, yl
+
+	@ Result:
+	do_it	cs, e
+	movcs	r0, yh, asr #31
+	mvncc	r0, yh, asr #31
+	orr	r0, r0, #1
+	RET
+
+	@ Look for a NAN.
+3:	mov	ip, xh, lsl #1
+	mvns	ip, ip, asr #21
+	bne	4f
+	orrs	ip, xl, xh, lsl #12
+	bne	5f			@ x is NAN
+4:	mov	ip, yh, lsl #1
+	mvns	ip, ip, asr #21
+	bne	2b
+	orrs	ip, yl, yh, lsl #12
+	beq	2b			@ y is not NAN
+5:	ldr	r0, [sp], #4		@ unordered return code
+	RET
+
+	FUNC_END gedf2
+	FUNC_END gtdf2
+	FUNC_END ledf2
+	FUNC_END ltdf2
+	FUNC_END nedf2
+	FUNC_END eqdf2
+	FUNC_END cmpdf2
+
+ARM_FUNC_START aeabi_cdrcmple
+
+	mov	ip, r0
+	mov	r0, r2
+	mov	r2, ip
+	mov	ip, r1
+	mov	r1, r3
+	mov	r3, ip
+	b	6f
+	
+ARM_FUNC_START aeabi_cdcmpeq
+ARM_FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
+
+	@ The status-returning routines are required to preserve all
+	@ registers except ip, lr, and cpsr.
+6:	do_push	{r0, lr}
+	ARM_CALL cmpdf2
+	@ Set the Z flag correctly, and the C flag unconditionally.
+	cmp	r0, #0
+	@ Clear the C flag if the return value was -1, indicating
+	@ that the first operand was smaller than the second.
+	do_it	mi
+	cmnmi	r0, #0
+	RETLDM	"r0"
+
+	FUNC_END aeabi_cdcmple
+	FUNC_END aeabi_cdcmpeq
+	FUNC_END aeabi_cdrcmple
+	
+ARM_FUNC_START	aeabi_dcmpeq
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cdcmple
+	do_it	eq, e
+	moveq	r0, #1	@ Equal to.
+	movne	r0, #0	@ Less than, greater than, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_dcmpeq
+
+ARM_FUNC_START	aeabi_dcmplt
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cdcmple
+	do_it	cc, e
+	movcc	r0, #1	@ Less than.
+	movcs	r0, #0	@ Equal to, greater than, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_dcmplt
+
+ARM_FUNC_START	aeabi_dcmple
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cdcmple
+	do_it	ls, e
+	movls	r0, #1  @ Less than or equal to.
+	movhi	r0, #0	@ Greater than or unordered.
+	RETLDM
+
+	FUNC_END aeabi_dcmple
+
+ARM_FUNC_START	aeabi_dcmpge
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cdrcmple
+	do_it	ls, e
+	movls	r0, #1	@ Operand 2 is less than or equal to operand 1.
+	movhi	r0, #0	@ Operand 2 greater than operand 1, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_dcmpge
+
+ARM_FUNC_START	aeabi_dcmpgt
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cdrcmple
+	do_it	cc, e
+	movcc	r0, #1	@ Operand 2 is less than operand 1.
+	movcs	r0, #0  @ Operand 2 is greater than or equal to operand 1,
+			@ or they are unordered.
+	RETLDM
+
+	FUNC_END aeabi_dcmpgt
+
+#endif /* L_cmpdf2 */
+
+#ifdef L_arm_unorddf2
+
+ARM_FUNC_START unorddf2
+ARM_FUNC_ALIAS aeabi_dcmpun unorddf2
+
+	mov	ip, xh, lsl #1
+	mvns	ip, ip, asr #21
+	bne	1f
+	orrs	ip, xl, xh, lsl #12
+	bne	3f			@ x is NAN
+1:	mov	ip, yh, lsl #1
+	mvns	ip, ip, asr #21
+	bne	2f
+	orrs	ip, yl, yh, lsl #12
+	bne	3f			@ y is NAN
+2:	mov	r0, #0			@ arguments are ordered.
+	RET
+
+3:	mov	r0, #1			@ arguments are unordered.
+	RET
+
+	FUNC_END aeabi_dcmpun
+	FUNC_END unorddf2
+
+#endif /* L_unorddf2 */
+
+#ifdef L_arm_fixdfsi
+
+ARM_FUNC_START fixdfsi
+ARM_FUNC_ALIAS aeabi_d2iz fixdfsi
+
+	@ check exponent range.
+	mov	r2, xh, lsl #1
+	adds	r2, r2, #(1 << 21)
+	bcs	2f			@ value is INF or NAN
+	bpl	1f			@ value is too small
+	mov	r3, #(0xfffffc00 + 31)
+	subs	r2, r3, r2, asr #21
+	bls	3f			@ value is too large
+
+	@ scale value
+	mov	r3, xh, lsl #11
+	orr	r3, r3, #0x80000000
+	orr	r3, r3, xl, lsr #21
+	tst	xh, #0x80000000		@ the sign bit
+	shift1	lsr, r0, r3, r2
+	do_it	ne
+	rsbne	r0, r0, #0
+	RET
+
+1:	mov	r0, #0
+	RET
+
+2:	orrs	xl, xl, xh, lsl #12
+	bne	4f			@ x is NAN.
+3:	ands	r0, xh, #0x80000000	@ the sign bit
+	do_it	eq
+	moveq	r0, #0x7fffffff		@ maximum signed positive si
+	RET
+
+4:	mov	r0, #0			@ How should we convert NAN?
+	RET
+
+	FUNC_END aeabi_d2iz
+	FUNC_END fixdfsi
+
+#endif /* L_fixdfsi */
+
+#ifdef L_arm_fixunsdfsi
+
+ARM_FUNC_START fixunsdfsi
+ARM_FUNC_ALIAS aeabi_d2uiz fixunsdfsi
+
+	@ check exponent range.
+	movs	r2, xh, lsl #1
+	bcs	1f			@ value is negative
+	adds	r2, r2, #(1 << 21)
+	bcs	2f			@ value is INF or NAN
+	bpl	1f			@ value is too small
+	mov	r3, #(0xfffffc00 + 31)
+	subs	r2, r3, r2, asr #21
+	bmi	3f			@ value is too large
+
+	@ scale value
+	mov	r3, xh, lsl #11
+	orr	r3, r3, #0x80000000
+	orr	r3, r3, xl, lsr #21
+	shift1	lsr, r0, r3, r2
+	RET
+
+1:	mov	r0, #0
+	RET
+
+2:	orrs	xl, xl, xh, lsl #12
+	bne	4f			@ value is NAN.
+3:	mov	r0, #0xffffffff		@ maximum unsigned si
+	RET
+
+4:	mov	r0, #0			@ How should we convert NAN?
+	RET
+
+	FUNC_END aeabi_d2uiz
+	FUNC_END fixunsdfsi
+
+#endif /* L_fixunsdfsi */
+
+#ifdef L_arm_truncdfsf2
+
+ARM_FUNC_START truncdfsf2
+ARM_FUNC_ALIAS aeabi_d2f truncdfsf2
+
+	@ check exponent range.
+	mov	r2, xh, lsl #1
+	subs	r3, r2, #((1023 - 127) << 21)
+	do_it	cs, t
+	COND(sub,s,cs)	ip, r3, #(1 << 21)
+	COND(rsb,s,cs)	ip, ip, #(254 << 21)
+	bls	2f			@ value is out of range
+
+1:	@ shift and round mantissa
+	and	ip, xh, #0x80000000
+	mov	r2, xl, lsl #3
+	orr	xl, ip, xl, lsr #29
+	cmp	r2, #0x80000000
+	adc	r0, xl, r3, lsl #2
+	do_it	eq
+	biceq	r0, r0, #1
+	RET
+
+2:	@ either overflow or underflow
+	tst	xh, #0x40000000
+	bne	3f			@ overflow
+
+	@ check if denormalized value is possible
+	adds	r2, r3, #(23 << 21)
+	do_it	lt, t
+	andlt	r0, xh, #0x80000000	@ too small, return signed 0.
+	RETc(lt)
+
+	@ denormalize value so we can resume with the code above afterwards.
+	orr	xh, xh, #0x00100000
+	mov	r2, r2, lsr #21
+	rsb	r2, r2, #24
+	rsb	ip, r2, #32
+#if defined(__thumb2__)
+	lsls	r3, xl, ip
+#else
+	movs	r3, xl, lsl ip
+#endif
+	shift1	lsr, xl, xl, r2
+	do_it	ne
+	orrne	xl, xl, #1		@ fold r3 for rounding considerations. 
+	mov	r3, xh, lsl #11
+	mov	r3, r3, lsr #11
+	shiftop orr xl xl r3 lsl ip ip
+	shift1	lsr, r3, r3, r2
+	mov	r3, r3, lsl #1
+	b	1b
+
+3:	@ chech for NAN
+	mvns	r3, r2, asr #21
+	bne	5f			@ simple overflow
+	orrs	r3, xl, xh, lsl #12
+	do_it	ne, tt
+	movne	r0, #0x7f000000
+	orrne	r0, r0, #0x00c00000
+	RETc(ne)			@ return NAN
+
+5:	@ return INF with sign
+	and	r0, xh, #0x80000000
+	orr	r0, r0, #0x7f000000
+	orr	r0, r0, #0x00800000
+	RET
+
+	FUNC_END aeabi_d2f
+	FUNC_END truncdfsf2
+
+#endif /* L_truncdfsf2 */
diff --git a/gcc-4.9/libgcc/config/arm/ieee754-sf.S b/gcc-4.9/libgcc/config/arm/ieee754-sf.S
new file mode 100644
index 000000000..c9bca4d25
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/ieee754-sf.S
@@ -0,0 +1,1033 @@
+/* ieee754-sf.S single-precision floating point support for ARM
+
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by Nicolas Pitre (nico@cam.org)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/*
+ * Notes:
+ *
+ * The goal of this code is to be as fast as possible.  This is
+ * not meant to be easy to understand for the casual reader.
+ *
+ * Only the default rounding mode is intended for best performances.
+ * Exceptions aren't supported yet, but that can be added quite easily
+ * if necessary without impacting performances.
+ */
+
+#ifdef L_arm_negsf2
+	
+ARM_FUNC_START negsf2
+ARM_FUNC_ALIAS aeabi_fneg negsf2
+
+	eor	r0, r0, #0x80000000	@ flip sign bit
+	RET
+
+	FUNC_END aeabi_fneg
+	FUNC_END negsf2
+
+#endif
+
+#ifdef L_arm_addsubsf3
+
+ARM_FUNC_START aeabi_frsub
+
+	eor	r0, r0, #0x80000000	@ flip sign bit of first arg
+	b	1f
+
+ARM_FUNC_START subsf3
+ARM_FUNC_ALIAS aeabi_fsub subsf3
+
+	eor	r1, r1, #0x80000000	@ flip sign bit of second arg
+#if defined(__INTERWORKING_STUBS__)
+	b	1f			@ Skip Thumb-code prologue
+#endif
+
+ARM_FUNC_START addsf3
+ARM_FUNC_ALIAS aeabi_fadd addsf3
+
+1:	@ Look for zeroes, equal values, INF, or NAN.
+	movs	r2, r0, lsl #1
+	do_it	ne, ttt
+	COND(mov,s,ne)	r3, r1, lsl #1
+	teqne	r2, r3
+	COND(mvn,s,ne)	ip, r2, asr #24
+	COND(mvn,s,ne)	ip, r3, asr #24
+	beq	LSYM(Lad_s)
+
+	@ Compute exponent difference.  Make largest exponent in r2,
+	@ corresponding arg in r0, and positive exponent difference in r3.
+	mov	r2, r2, lsr #24
+	rsbs	r3, r2, r3, lsr #24
+	do_it	gt, ttt
+	addgt	r2, r2, r3
+	eorgt	r1, r0, r1
+	eorgt	r0, r1, r0
+	eorgt	r1, r0, r1
+	do_it	lt
+	rsblt	r3, r3, #0
+
+	@ If exponent difference is too large, return largest argument
+	@ already in r0.  We need up to 25 bit to handle proper rounding
+	@ of 0x1p25 - 1.1.
+	cmp	r3, #25
+	do_it	hi
+	RETc(hi)
+
+	@ Convert mantissa to signed integer.
+	tst	r0, #0x80000000
+	orr	r0, r0, #0x00800000
+	bic	r0, r0, #0xff000000
+	do_it	ne
+	rsbne	r0, r0, #0
+	tst	r1, #0x80000000
+	orr	r1, r1, #0x00800000
+	bic	r1, r1, #0xff000000
+	do_it	ne
+	rsbne	r1, r1, #0
+
+	@ If exponent == difference, one or both args were denormalized.
+	@ Since this is not common case, rescale them off line.
+	teq	r2, r3
+	beq	LSYM(Lad_d)
+LSYM(Lad_x):
+
+	@ Compensate for the exponent overlapping the mantissa MSB added later
+	sub	r2, r2, #1
+
+	@ Shift and add second arg to first arg in r0.
+	@ Keep leftover bits into r1.
+	shiftop adds r0 r0 r1 asr r3 ip
+	rsb	r3, r3, #32
+	shift1	lsl, r1, r1, r3
+
+	@ Keep absolute value in r0-r1, sign in r3 (the n bit was set above)
+	and	r3, r0, #0x80000000
+	bpl	LSYM(Lad_p)
+#if defined(__thumb2__)
+	negs	r1, r1
+	sbc	r0, r0, r0, lsl #1
+#else
+	rsbs	r1, r1, #0
+	rsc	r0, r0, #0
+#endif
+
+	@ Determine how to normalize the result.
+LSYM(Lad_p):
+	cmp	r0, #0x00800000
+	bcc	LSYM(Lad_a)
+	cmp	r0, #0x01000000
+	bcc	LSYM(Lad_e)
+
+	@ Result needs to be shifted right.
+	movs	r0, r0, lsr #1
+	mov	r1, r1, rrx
+	add	r2, r2, #1
+
+	@ Make sure we did not bust our exponent.
+	cmp	r2, #254
+	bhs	LSYM(Lad_o)
+
+	@ Our result is now properly aligned into r0, remaining bits in r1.
+	@ Pack final result together.
+	@ Round with MSB of r1. If halfway between two numbers, round towards
+	@ LSB of r0 = 0. 
+LSYM(Lad_e):
+	cmp	r1, #0x80000000
+	adc	r0, r0, r2, lsl #23
+	do_it	eq
+	biceq	r0, r0, #1
+	orr	r0, r0, r3
+	RET
+
+	@ Result must be shifted left and exponent adjusted.
+LSYM(Lad_a):
+	movs	r1, r1, lsl #1
+	adc	r0, r0, r0
+	tst	r0, #0x00800000
+	sub	r2, r2, #1
+	bne	LSYM(Lad_e)
+	
+	@ No rounding necessary since r1 will always be 0 at this point.
+LSYM(Lad_l):
+
+#if __ARM_ARCH__ < 5
+
+	movs	ip, r0, lsr #12
+	moveq	r0, r0, lsl #12
+	subeq	r2, r2, #12
+	tst	r0, #0x00ff0000
+	moveq	r0, r0, lsl #8
+	subeq	r2, r2, #8
+	tst	r0, #0x00f00000
+	moveq	r0, r0, lsl #4
+	subeq	r2, r2, #4
+	tst	r0, #0x00c00000
+	moveq	r0, r0, lsl #2
+	subeq	r2, r2, #2
+	cmp	r0, #0x00800000
+	movcc	r0, r0, lsl #1
+	sbcs	r2, r2, #0
+
+#else
+
+	clz	ip, r0
+	sub	ip, ip, #8
+	subs	r2, r2, ip
+	shift1	lsl, r0, r0, ip
+
+#endif
+
+	@ Final result with sign
+	@ If exponent negative, denormalize result.
+	do_it	ge, et
+	addge	r0, r0, r2, lsl #23
+	rsblt	r2, r2, #0
+	orrge	r0, r0, r3
+#if defined(__thumb2__)
+	do_it	lt, t
+	lsrlt	r0, r0, r2
+	orrlt	r0, r3, r0
+#else
+	orrlt	r0, r3, r0, lsr r2
+#endif
+	RET
+
+	@ Fixup and adjust bit position for denormalized arguments.
+	@ Note that r2 must not remain equal to 0.
+LSYM(Lad_d):
+	teq	r2, #0
+	eor	r1, r1, #0x00800000
+	do_it	eq, te
+	eoreq	r0, r0, #0x00800000
+	addeq	r2, r2, #1
+	subne	r3, r3, #1
+	b	LSYM(Lad_x)
+
+LSYM(Lad_s):
+	mov	r3, r1, lsl #1
+
+	mvns	ip, r2, asr #24
+	do_it	ne
+	COND(mvn,s,ne)	ip, r3, asr #24
+	beq	LSYM(Lad_i)
+
+	teq	r2, r3
+	beq	1f
+
+	@ Result is x + 0.0 = x or 0.0 + y = y.
+	teq	r2, #0
+	do_it	eq
+	moveq	r0, r1
+	RET
+
+1:	teq	r0, r1
+
+	@ Result is x - x = 0.
+	do_it	ne, t
+	movne	r0, #0
+	RETc(ne)
+
+	@ Result is x + x = 2x.
+	tst	r2, #0xff000000
+	bne	2f
+	movs	r0, r0, lsl #1
+	do_it	cs
+	orrcs	r0, r0, #0x80000000
+	RET
+2:	adds	r2, r2, #(2 << 24)
+	do_it	cc, t
+	addcc	r0, r0, #(1 << 23)
+	RETc(cc)
+	and	r3, r0, #0x80000000
+
+	@ Overflow: return INF.
+LSYM(Lad_o):
+	orr	r0, r3, #0x7f000000
+	orr	r0, r0, #0x00800000
+	RET
+
+	@ At least one of r0/r1 is INF/NAN.
+	@   if r0 != INF/NAN: return r1 (which is INF/NAN)
+	@   if r1 != INF/NAN: return r0 (which is INF/NAN)
+	@   if r0 or r1 is NAN: return NAN
+	@   if opposite sign: return NAN
+	@   otherwise return r0 (which is INF or -INF)
+LSYM(Lad_i):
+	mvns	r2, r2, asr #24
+	do_it	ne, et
+	movne	r0, r1
+	COND(mvn,s,eq)	r3, r3, asr #24
+	movne	r1, r0
+	movs	r2, r0, lsl #9
+	do_it	eq, te
+	COND(mov,s,eq)	r3, r1, lsl #9
+	teqeq	r0, r1
+	orrne	r0, r0, #0x00400000	@ quiet NAN
+	RET
+
+	FUNC_END aeabi_frsub
+	FUNC_END aeabi_fadd
+	FUNC_END addsf3
+	FUNC_END aeabi_fsub
+	FUNC_END subsf3
+
+ARM_FUNC_START floatunsisf
+ARM_FUNC_ALIAS aeabi_ui2f floatunsisf
+		
+	mov	r3, #0
+	b	1f
+
+ARM_FUNC_START floatsisf
+ARM_FUNC_ALIAS aeabi_i2f floatsisf
+	
+	ands	r3, r0, #0x80000000
+	do_it	mi
+	rsbmi	r0, r0, #0
+
+1:	movs	ip, r0
+	do_it	eq
+	RETc(eq)
+
+	@ Add initial exponent to sign
+	orr	r3, r3, #((127 + 23) << 23)
+
+	.ifnc	ah, r0
+	mov	ah, r0
+	.endif
+	mov	al, #0
+	b	2f
+
+	FUNC_END aeabi_i2f
+	FUNC_END floatsisf
+	FUNC_END aeabi_ui2f
+	FUNC_END floatunsisf
+
+ARM_FUNC_START floatundisf
+ARM_FUNC_ALIAS aeabi_ul2f floatundisf
+
+	orrs	r2, r0, r1
+	do_it	eq
+	RETc(eq)
+
+	mov	r3, #0
+	b	1f
+
+ARM_FUNC_START floatdisf
+ARM_FUNC_ALIAS aeabi_l2f floatdisf
+
+	orrs	r2, r0, r1
+	do_it	eq
+	RETc(eq)
+
+	ands	r3, ah, #0x80000000	@ sign bit in r3
+	bpl	1f
+#if defined(__thumb2__)
+	negs	al, al
+	sbc	ah, ah, ah, lsl #1
+#else
+	rsbs	al, al, #0
+	rsc	ah, ah, #0
+#endif
+1:
+	movs	ip, ah
+	do_it	eq, tt
+	moveq	ip, al
+	moveq	ah, al
+	moveq	al, #0
+
+	@ Add initial exponent to sign
+	orr	r3, r3, #((127 + 23 + 32) << 23)
+	do_it	eq
+	subeq	r3, r3, #(32 << 23)
+2:	sub	r3, r3, #(1 << 23)
+
+#if __ARM_ARCH__ < 5
+
+	mov	r2, #23
+	cmp	ip, #(1 << 16)
+	do_it	hs, t
+	movhs	ip, ip, lsr #16
+	subhs	r2, r2, #16
+	cmp	ip, #(1 << 8)
+	do_it	hs, t
+	movhs	ip, ip, lsr #8
+	subhs	r2, r2, #8
+	cmp	ip, #(1 << 4)
+	do_it	hs, t
+	movhs	ip, ip, lsr #4
+	subhs	r2, r2, #4
+	cmp	ip, #(1 << 2)
+	do_it	hs, e
+	subhs	r2, r2, #2
+	sublo	r2, r2, ip, lsr #1
+	subs	r2, r2, ip, lsr #3
+
+#else
+
+	clz	r2, ip
+	subs	r2, r2, #8
+
+#endif
+
+	sub	r3, r3, r2, lsl #23
+	blt	3f
+
+	shiftop add r3 r3 ah lsl r2 ip
+	shift1	lsl, ip, al, r2
+	rsb	r2, r2, #32
+	cmp	ip, #0x80000000
+	shiftop adc r0 r3 al lsr r2 r2
+	do_it	eq
+	biceq	r0, r0, #1
+	RET
+
+3:	add	r2, r2, #32
+	shift1	lsl, ip, ah, r2
+	rsb	r2, r2, #32
+	orrs	al, al, ip, lsl #1
+	shiftop adc r0 r3 ah lsr r2 r2
+	do_it	eq
+	biceq	r0, r0, ip, lsr #31
+	RET
+
+	FUNC_END floatdisf
+	FUNC_END aeabi_l2f
+	FUNC_END floatundisf
+	FUNC_END aeabi_ul2f
+
+#endif /* L_addsubsf3 */
+
+#ifdef L_arm_muldivsf3
+
+ARM_FUNC_START mulsf3
+ARM_FUNC_ALIAS aeabi_fmul mulsf3
+
+	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+	mov	ip, #0xff
+	ands	r2, ip, r0, lsr #23
+	do_it	ne, tt
+	COND(and,s,ne)	r3, ip, r1, lsr #23
+	teqne	r2, ip
+	teqne	r3, ip
+	beq	LSYM(Lml_s)
+LSYM(Lml_x):
+
+	@ Add exponents together
+	add	r2, r2, r3
+
+	@ Determine final sign.
+	eor	ip, r0, r1
+
+	@ Convert mantissa to unsigned integer.
+	@ If power of two, branch to a separate path.
+	@ Make up for final alignment.
+	movs	r0, r0, lsl #9
+	do_it	ne
+	COND(mov,s,ne)	r1, r1, lsl #9
+	beq	LSYM(Lml_1)
+	mov	r3, #0x08000000
+	orr	r0, r3, r0, lsr #5
+	orr	r1, r3, r1, lsr #5
+
+#if __ARM_ARCH__ < 4
+
+	@ Put sign bit in r3, which will be restored into r0 later.
+	and	r3, ip, #0x80000000
+
+	@ Well, no way to make it shorter without the umull instruction.
+	do_push	{r3, r4, r5}
+	mov	r4, r0, lsr #16
+	mov	r5, r1, lsr #16
+	bic	r0, r0, r4, lsl #16
+	bic	r1, r1, r5, lsl #16
+	mul	ip, r4, r5
+	mul	r3, r0, r1
+	mul	r0, r5, r0
+	mla	r0, r4, r1, r0
+	adds	r3, r3, r0, lsl #16
+	adc	r1, ip, r0, lsr #16
+	do_pop	{r0, r4, r5}
+
+#else
+
+	@ The actual multiplication.
+	umull	r3, r1, r0, r1
+
+	@ Put final sign in r0.
+	and	r0, ip, #0x80000000
+
+#endif
+
+	@ Adjust result upon the MSB position.
+	cmp	r1, #(1 << 23)
+	do_it	cc, tt
+	movcc	r1, r1, lsl #1
+	orrcc	r1, r1, r3, lsr #31
+	movcc	r3, r3, lsl #1
+
+	@ Add sign to result.
+	orr	r0, r0, r1
+
+	@ Apply exponent bias, check for under/overflow.
+	sbc	r2, r2, #127
+	cmp	r2, #(254 - 1)
+	bhi	LSYM(Lml_u)
+
+	@ Round the result, merge final exponent.
+	cmp	r3, #0x80000000
+	adc	r0, r0, r2, lsl #23
+	do_it	eq
+	biceq	r0, r0, #1
+	RET
+
+	@ Multiplication by 0x1p*: let''s shortcut a lot of code.
+LSYM(Lml_1):
+	teq	r0, #0
+	and	ip, ip, #0x80000000
+	do_it	eq
+	moveq	r1, r1, lsl #9
+	orr	r0, ip, r0, lsr #9
+	orr	r0, r0, r1, lsr #9
+	subs	r2, r2, #127
+	do_it	gt, tt
+	COND(rsb,s,gt)	r3, r2, #255
+	orrgt	r0, r0, r2, lsl #23
+	RETc(gt)
+
+	@ Under/overflow: fix things up for the code below.
+	orr	r0, r0, #0x00800000
+	mov	r3, #0
+	subs	r2, r2, #1
+
+LSYM(Lml_u):
+	@ Overflow?
+	bgt	LSYM(Lml_o)
+
+	@ Check if denormalized result is possible, otherwise return signed 0.
+	cmn	r2, #(24 + 1)
+	do_it	le, t
+	bicle	r0, r0, #0x7fffffff
+	RETc(le)
+
+	@ Shift value right, round, etc.
+	rsb	r2, r2, #0
+	movs	r1, r0, lsl #1
+	shift1	lsr, r1, r1, r2
+	rsb	r2, r2, #32
+	shift1	lsl, ip, r0, r2
+	movs	r0, r1, rrx
+	adc	r0, r0, #0
+	orrs	r3, r3, ip, lsl #1
+	do_it	eq
+	biceq	r0, r0, ip, lsr #31
+	RET
+
+	@ One or both arguments are denormalized.
+	@ Scale them leftwards and preserve sign bit.
+LSYM(Lml_d):
+	teq	r2, #0
+	and	ip, r0, #0x80000000
+1:	do_it	eq, tt
+	moveq	r0, r0, lsl #1
+	tsteq	r0, #0x00800000
+	subeq	r2, r2, #1
+	beq	1b
+	orr	r0, r0, ip
+	teq	r3, #0
+	and	ip, r1, #0x80000000
+2:	do_it	eq, tt
+	moveq	r1, r1, lsl #1
+	tsteq	r1, #0x00800000
+	subeq	r3, r3, #1
+	beq	2b
+	orr	r1, r1, ip
+	b	LSYM(Lml_x)
+
+LSYM(Lml_s):
+	@ Isolate the INF and NAN cases away
+	and	r3, ip, r1, lsr #23
+	teq	r2, ip
+	do_it	ne
+	teqne	r3, ip
+	beq	1f
+
+	@ Here, one or more arguments are either denormalized or zero.
+	bics	ip, r0, #0x80000000
+	do_it	ne
+	COND(bic,s,ne)	ip, r1, #0x80000000
+	bne	LSYM(Lml_d)
+
+	@ Result is 0, but determine sign anyway.
+LSYM(Lml_z):
+	eor	r0, r0, r1
+	bic	r0, r0, #0x7fffffff
+	RET
+
+1:	@ One or both args are INF or NAN.
+	teq	r0, #0x0
+	do_it	ne, ett
+	teqne	r0, #0x80000000
+	moveq	r0, r1
+	teqne	r1, #0x0
+	teqne	r1, #0x80000000
+	beq	LSYM(Lml_n)		@ 0 * INF or INF * 0 -> NAN
+	teq	r2, ip
+	bne	1f
+	movs	r2, r0, lsl #9
+	bne	LSYM(Lml_n)		@ NAN * <anything> -> NAN
+1:	teq	r3, ip
+	bne	LSYM(Lml_i)
+	movs	r3, r1, lsl #9
+	do_it	ne
+	movne	r0, r1
+	bne	LSYM(Lml_n)		@ <anything> * NAN -> NAN
+
+	@ Result is INF, but we need to determine its sign.
+LSYM(Lml_i):
+	eor	r0, r0, r1
+
+	@ Overflow: return INF (sign already in r0).
+LSYM(Lml_o):
+	and	r0, r0, #0x80000000
+	orr	r0, r0, #0x7f000000
+	orr	r0, r0, #0x00800000
+	RET
+
+	@ Return a quiet NAN.
+LSYM(Lml_n):
+	orr	r0, r0, #0x7f000000
+	orr	r0, r0, #0x00c00000
+	RET
+
+	FUNC_END aeabi_fmul
+	FUNC_END mulsf3
+
+ARM_FUNC_START divsf3
+ARM_FUNC_ALIAS aeabi_fdiv divsf3
+
+	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+	mov	ip, #0xff
+	ands	r2, ip, r0, lsr #23
+	do_it	ne, tt
+	COND(and,s,ne)	r3, ip, r1, lsr #23
+	teqne	r2, ip
+	teqne	r3, ip
+	beq	LSYM(Ldv_s)
+LSYM(Ldv_x):
+
+	@ Subtract divisor exponent from dividend''s
+	sub	r2, r2, r3
+
+	@ Preserve final sign into ip.
+	eor	ip, r0, r1
+
+	@ Convert mantissa to unsigned integer.
+	@ Dividend -> r3, divisor -> r1.
+	movs	r1, r1, lsl #9
+	mov	r0, r0, lsl #9
+	beq	LSYM(Ldv_1)
+	mov	r3, #0x10000000
+	orr	r1, r3, r1, lsr #4
+	orr	r3, r3, r0, lsr #4
+
+	@ Initialize r0 (result) with final sign bit.
+	and	r0, ip, #0x80000000
+
+	@ Ensure result will land to known bit position.
+	@ Apply exponent bias accordingly.
+	cmp	r3, r1
+	do_it	cc
+	movcc	r3, r3, lsl #1
+	adc	r2, r2, #(127 - 2)
+
+	@ The actual division loop.
+	mov	ip, #0x00800000
+1:	cmp	r3, r1
+	do_it	cs, t
+	subcs	r3, r3, r1
+	orrcs	r0, r0, ip
+	cmp	r3, r1, lsr #1
+	do_it	cs, t
+	subcs	r3, r3, r1, lsr #1
+	orrcs	r0, r0, ip, lsr #1
+	cmp	r3, r1, lsr #2
+	do_it	cs, t
+	subcs	r3, r3, r1, lsr #2
+	orrcs	r0, r0, ip, lsr #2
+	cmp	r3, r1, lsr #3
+	do_it	cs, t
+	subcs	r3, r3, r1, lsr #3
+	orrcs	r0, r0, ip, lsr #3
+	movs	r3, r3, lsl #4
+	do_it	ne
+	COND(mov,s,ne)	ip, ip, lsr #4
+	bne	1b
+
+	@ Check exponent for under/overflow.
+	cmp	r2, #(254 - 1)
+	bhi	LSYM(Lml_u)
+
+	@ Round the result, merge final exponent.
+	cmp	r3, r1
+	adc	r0, r0, r2, lsl #23
+	do_it	eq
+	biceq	r0, r0, #1
+	RET
+
+	@ Division by 0x1p*: let''s shortcut a lot of code.
+LSYM(Ldv_1):
+	and	ip, ip, #0x80000000
+	orr	r0, ip, r0, lsr #9
+	adds	r2, r2, #127
+	do_it	gt, tt
+	COND(rsb,s,gt)	r3, r2, #255
+	orrgt	r0, r0, r2, lsl #23
+	RETc(gt)
+
+	orr	r0, r0, #0x00800000
+	mov	r3, #0
+	subs	r2, r2, #1
+	b	LSYM(Lml_u)
+
+	@ One or both arguments are denormalized.
+	@ Scale them leftwards and preserve sign bit.
+LSYM(Ldv_d):
+	teq	r2, #0
+	and	ip, r0, #0x80000000
+1:	do_it	eq, tt
+	moveq	r0, r0, lsl #1
+	tsteq	r0, #0x00800000
+	subeq	r2, r2, #1
+	beq	1b
+	orr	r0, r0, ip
+	teq	r3, #0
+	and	ip, r1, #0x80000000
+2:	do_it	eq, tt
+	moveq	r1, r1, lsl #1
+	tsteq	r1, #0x00800000
+	subeq	r3, r3, #1
+	beq	2b
+	orr	r1, r1, ip
+	b	LSYM(Ldv_x)
+
+	@ One or both arguments are either INF, NAN, zero or denormalized.
+LSYM(Ldv_s):
+	and	r3, ip, r1, lsr #23
+	teq	r2, ip
+	bne	1f
+	movs	r2, r0, lsl #9
+	bne	LSYM(Lml_n)		@ NAN / <anything> -> NAN
+	teq	r3, ip
+	bne	LSYM(Lml_i)		@ INF / <anything> -> INF
+	mov	r0, r1
+	b	LSYM(Lml_n)		@ INF / (INF or NAN) -> NAN
+1:	teq	r3, ip
+	bne	2f
+	movs	r3, r1, lsl #9
+	beq	LSYM(Lml_z)		@ <anything> / INF -> 0
+	mov	r0, r1
+	b	LSYM(Lml_n)		@ <anything> / NAN -> NAN
+2:	@ If both are nonzero, we need to normalize and resume above.
+	bics	ip, r0, #0x80000000
+	do_it	ne
+	COND(bic,s,ne)	ip, r1, #0x80000000
+	bne	LSYM(Ldv_d)
+	@ One or both arguments are zero.
+	bics	r2, r0, #0x80000000
+	bne	LSYM(Lml_i)		@ <non_zero> / 0 -> INF
+	bics	r3, r1, #0x80000000
+	bne	LSYM(Lml_z)		@ 0 / <non_zero> -> 0
+	b	LSYM(Lml_n)		@ 0 / 0 -> NAN
+
+	FUNC_END aeabi_fdiv
+	FUNC_END divsf3
+
+#endif /* L_muldivsf3 */
+
+#ifdef L_arm_cmpsf2
+
+	@ The return value in r0 is
+	@
+	@   0  if the operands are equal
+	@   1  if the first operand is greater than the second, or
+	@      the operands are unordered and the operation is
+	@      CMP, LT, LE, NE, or EQ.
+	@   -1 if the first operand is less than the second, or
+	@      the operands are unordered and the operation is GT
+	@      or GE.
+	@
+	@ The Z flag will be set iff the operands are equal.
+	@
+	@ The following registers are clobbered by this function:
+	@   ip, r0, r1, r2, r3
+
+ARM_FUNC_START gtsf2
+ARM_FUNC_ALIAS gesf2 gtsf2
+	mov	ip, #-1
+	b	1f
+
+ARM_FUNC_START ltsf2
+ARM_FUNC_ALIAS lesf2 ltsf2
+	mov	ip, #1
+	b	1f
+
+ARM_FUNC_START cmpsf2
+ARM_FUNC_ALIAS nesf2 cmpsf2
+ARM_FUNC_ALIAS eqsf2 cmpsf2
+	mov	ip, #1			@ how should we specify unordered here?
+
+1:	str	ip, [sp, #-4]!
+
+	@ Trap any INF/NAN first.
+	mov	r2, r0, lsl #1
+	mov	r3, r1, lsl #1
+	mvns	ip, r2, asr #24
+	do_it	ne
+	COND(mvn,s,ne)	ip, r3, asr #24
+	beq	3f
+
+	@ Compare values.
+	@ Note that 0.0 is equal to -0.0.
+2:	add	sp, sp, #4
+	orrs	ip, r2, r3, lsr #1	@ test if both are 0, clear C flag
+	do_it	ne
+	teqne	r0, r1			@ if not 0 compare sign
+	do_it	pl
+	COND(sub,s,pl)	r0, r2, r3		@ if same sign compare values, set r0
+
+	@ Result:
+	do_it	hi
+	movhi	r0, r1, asr #31
+	do_it	lo
+	mvnlo	r0, r1, asr #31
+	do_it	ne
+	orrne	r0, r0, #1
+	RET
+
+	@ Look for a NAN. 
+3:	mvns	ip, r2, asr #24
+	bne	4f
+	movs	ip, r0, lsl #9
+	bne	5f			@ r0 is NAN
+4:	mvns	ip, r3, asr #24
+	bne	2b
+	movs	ip, r1, lsl #9
+	beq	2b			@ r1 is not NAN
+5:	ldr	r0, [sp], #4		@ return unordered code.
+	RET
+
+	FUNC_END gesf2
+	FUNC_END gtsf2
+	FUNC_END lesf2
+	FUNC_END ltsf2
+	FUNC_END nesf2
+	FUNC_END eqsf2
+	FUNC_END cmpsf2
+
+ARM_FUNC_START aeabi_cfrcmple
+
+	mov	ip, r0
+	mov	r0, r1
+	mov	r1, ip
+	b	6f
+
+ARM_FUNC_START aeabi_cfcmpeq
+ARM_FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
+
+	@ The status-returning routines are required to preserve all
+	@ registers except ip, lr, and cpsr.
+6:	do_push	{r0, r1, r2, r3, lr}
+	ARM_CALL cmpsf2
+	@ Set the Z flag correctly, and the C flag unconditionally.
+	cmp	r0, #0
+	@ Clear the C flag if the return value was -1, indicating
+	@ that the first operand was smaller than the second.
+	do_it	mi
+	cmnmi	r0, #0
+	RETLDM	"r0, r1, r2, r3"
+
+	FUNC_END aeabi_cfcmple
+	FUNC_END aeabi_cfcmpeq
+	FUNC_END aeabi_cfrcmple
+
+ARM_FUNC_START	aeabi_fcmpeq
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cfcmple
+	do_it	eq, e
+	moveq	r0, #1	@ Equal to.
+	movne	r0, #0	@ Less than, greater than, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_fcmpeq
+
+ARM_FUNC_START	aeabi_fcmplt
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cfcmple
+	do_it	cc, e
+	movcc	r0, #1	@ Less than.
+	movcs	r0, #0	@ Equal to, greater than, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_fcmplt
+
+ARM_FUNC_START	aeabi_fcmple
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cfcmple
+	do_it	ls, e
+	movls	r0, #1  @ Less than or equal to.
+	movhi	r0, #0	@ Greater than or unordered.
+	RETLDM
+
+	FUNC_END aeabi_fcmple
+
+ARM_FUNC_START	aeabi_fcmpge
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cfrcmple
+	do_it	ls, e
+	movls	r0, #1	@ Operand 2 is less than or equal to operand 1.
+	movhi	r0, #0	@ Operand 2 greater than operand 1, or unordered.
+	RETLDM
+
+	FUNC_END aeabi_fcmpge
+
+ARM_FUNC_START	aeabi_fcmpgt
+
+	str	lr, [sp, #-8]!
+	ARM_CALL aeabi_cfrcmple
+	do_it	cc, e
+	movcc	r0, #1	@ Operand 2 is less than operand 1.
+	movcs	r0, #0  @ Operand 2 is greater than or equal to operand 1,
+			@ or they are unordered.
+	RETLDM
+
+	FUNC_END aeabi_fcmpgt
+
+#endif /* L_cmpsf2 */
+
+#ifdef L_arm_unordsf2
+
+ARM_FUNC_START unordsf2
+ARM_FUNC_ALIAS aeabi_fcmpun unordsf2
+
+	mov	r2, r0, lsl #1
+	mov	r3, r1, lsl #1
+	mvns	ip, r2, asr #24
+	bne	1f
+	movs	ip, r0, lsl #9
+	bne	3f			@ r0 is NAN
+1:	mvns	ip, r3, asr #24
+	bne	2f
+	movs	ip, r1, lsl #9
+	bne	3f			@ r1 is NAN
+2:	mov	r0, #0			@ arguments are ordered.
+	RET
+3:	mov	r0, #1			@ arguments are unordered.
+	RET
+
+	FUNC_END aeabi_fcmpun
+	FUNC_END unordsf2
+
+#endif /* L_unordsf2 */
+
+#ifdef L_arm_fixsfsi
+
+ARM_FUNC_START fixsfsi
+ARM_FUNC_ALIAS aeabi_f2iz fixsfsi
+
+	@ check exponent range.
+	mov	r2, r0, lsl #1
+	cmp	r2, #(127 << 24)
+	bcc	1f			@ value is too small
+	mov	r3, #(127 + 31)
+	subs	r2, r3, r2, lsr #24
+	bls	2f			@ value is too large
+
+	@ scale value
+	mov	r3, r0, lsl #8
+	orr	r3, r3, #0x80000000
+	tst	r0, #0x80000000		@ the sign bit
+	shift1	lsr, r0, r3, r2
+	do_it	ne
+	rsbne	r0, r0, #0
+	RET
+
+1:	mov	r0, #0
+	RET
+
+2:	cmp	r2, #(127 + 31 - 0xff)
+	bne	3f
+	movs	r2, r0, lsl #9
+	bne	4f			@ r0 is NAN.
+3:	ands	r0, r0, #0x80000000	@ the sign bit
+	do_it	eq
+	moveq	r0, #0x7fffffff		@ the maximum signed positive si
+	RET
+
+4:	mov	r0, #0			@ What should we convert NAN to?
+	RET
+
+	FUNC_END aeabi_f2iz
+	FUNC_END fixsfsi
+
+#endif /* L_fixsfsi */
+
+#ifdef L_arm_fixunssfsi
+
+ARM_FUNC_START fixunssfsi
+ARM_FUNC_ALIAS aeabi_f2uiz fixunssfsi
+
+	@ check exponent range.
+	movs	r2, r0, lsl #1
+	bcs	1f			@ value is negative
+	cmp	r2, #(127 << 24)
+	bcc	1f			@ value is too small
+	mov	r3, #(127 + 31)
+	subs	r2, r3, r2, lsr #24
+	bmi	2f			@ value is too large
+
+	@ scale the value
+	mov	r3, r0, lsl #8
+	orr	r3, r3, #0x80000000
+	shift1	lsr, r0, r3, r2
+	RET
+
+1:	mov	r0, #0
+	RET
+
+2:	cmp	r2, #(127 + 31 - 0xff)
+	bne	3f
+	movs	r2, r0, lsl #9
+	bne	4f			@ r0 is NAN.
+3:	mov	r0, #0xffffffff		@ maximum unsigned si
+	RET
+
+4:	mov	r0, #0			@ What should we convert NAN to?
+	RET
+
+	FUNC_END aeabi_f2uiz
+	FUNC_END fixunssfsi
+
+#endif /* L_fixunssfsi */
diff --git a/gcc-4.9/libgcc/config/arm/lib1funcs.S b/gcc-4.9/libgcc/config/arm/lib1funcs.S
new file mode 100644
index 000000000..b617137e2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/lib1funcs.S
@@ -0,0 +1,1958 @@
+@ libgcc routines for ARM cpu.
+@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
+
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif  /* __ELF__ and __linux__ */
+
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+/* ------------------------------------------------------------------------ */
+
+/* We need to know what prefix to add to function names.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#error  __USER_LABEL_PREFIX__ not defined
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+#ifdef __ELF__
+#ifdef __thumb__
+#define __PLT__  /* Not supported in Thumb assembler (for now).  */
+#elif defined __vxworks && !defined __PIC__
+#define __PLT__ /* Not supported by the kernel loader.  */
+#else
+#define __PLT__ (PLT)
+#endif
+#define TYPE(x) .type SYM(x),function
+#define SIZE(x) .size SYM(x), . - SYM(x)
+#define LSYM(x) .x
+#else
+#define __PLT__
+#define TYPE(x)
+#define SIZE(x)
+#define LSYM(x) x
+#endif
+
+/* Function end macros.  Variants for interworking.  */
+
+#if defined(__ARM_ARCH_2__)
+# define __ARM_ARCH__ 2
+#endif
+
+#if defined(__ARM_ARCH_3__)
+# define __ARM_ARCH__ 3
+#endif
+
+#if defined(__ARM_ARCH_3M__) || defined(__ARM_ARCH_4__) \
+	|| defined(__ARM_ARCH_4T__)
+/* We use __ARM_ARCH__ set to 4 here, but in reality it's any processor with
+   long multiply instructions.  That includes v3M.  */
+# define __ARM_ARCH__ 4
+#endif
+	
+#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) \
+	|| defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
+	|| defined(__ARM_ARCH_5TEJ__)
+# define __ARM_ARCH__ 5
+#endif
+
+#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
+	|| defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
+	|| defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) \
+	|| defined(__ARM_ARCH_6M__)
+# define __ARM_ARCH__ 6
+#endif
+
+#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+	|| defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
+	|| defined(__ARM_ARCH_7EM__)
+# define __ARM_ARCH__ 7
+#endif
+
+#if defined(__ARM_ARCH_8A__)
+# define __ARM_ARCH__ 8
+#endif
+
+#ifndef __ARM_ARCH__
+#error Unable to determine architecture.
+#endif
+
+/* There are times when we might prefer Thumb1 code even if ARM code is
+   permitted, for example, the code might be smaller, or there might be
+   interworking problems with switching to ARM state if interworking is
+   disabled.  */
+#if (defined(__thumb__)			\
+     && !defined(__thumb2__)		\
+     && (!defined(__THUMB_INTERWORK__)	\
+	 || defined (__OPTIMIZE_SIZE__)	\
+	 || defined(__ARM_ARCH_6M__)))
+# define __prefer_thumb__
+#endif
+
+/* How to return from a function call depends on the architecture variant.  */
+
+#if (__ARM_ARCH__ > 4) || defined(__ARM_ARCH_4T__)
+
+# define RET		bx	lr
+# define RETc(x)	bx##x	lr
+
+/* Special precautions for interworking on armv4t.  */
+# if (__ARM_ARCH__ == 4)
+
+/* Always use bx, not ldr pc.  */
+#  if (defined(__thumb__) || defined(__THUMB_INTERWORK__))
+#    define __INTERWORKING__
+#   endif /* __THUMB__ || __THUMB_INTERWORK__ */
+
+/* Include thumb stub before arm mode code.  */
+#  if defined(__thumb__) && !defined(__THUMB_INTERWORK__)
+#   define __INTERWORKING_STUBS__
+#  endif /* __thumb__ && !__THUMB_INTERWORK__ */
+
+#endif /* __ARM_ARCH == 4 */
+
+#else
+
+# define RET		mov	pc, lr
+# define RETc(x)	mov##x	pc, lr
+
+#endif
+
+.macro	cfi_pop		advance, reg, cfa_offset
+#ifdef __ELF__
+	.pushsection	.debug_frame
+	.byte	0x4		/* DW_CFA_advance_loc4 */
+	.4byte	\advance
+	.byte	(0xc0 | \reg)	/* DW_CFA_restore */
+	.byte	0xe		/* DW_CFA_def_cfa_offset */
+	.uleb128 \cfa_offset
+	.popsection
+#endif
+.endm
+.macro	cfi_push	advance, reg, offset, cfa_offset
+#ifdef __ELF__
+	.pushsection	.debug_frame
+	.byte	0x4		/* DW_CFA_advance_loc4 */
+	.4byte	\advance
+	.byte	(0x80 | \reg)	/* DW_CFA_offset */
+	.uleb128 (\offset / -4)
+	.byte	0xe		/* DW_CFA_def_cfa_offset */
+	.uleb128 \cfa_offset
+	.popsection
+#endif
+.endm
+.macro cfi_start	start_label, end_label
+#ifdef __ELF__
+	.pushsection	.debug_frame
+LSYM(Lstart_frame):
+	.4byte	LSYM(Lend_cie) - LSYM(Lstart_cie) @ Length of CIE
+LSYM(Lstart_cie):
+        .4byte	0xffffffff	@ CIE Identifier Tag
+        .byte	0x1	@ CIE Version
+        .ascii	"\0"	@ CIE Augmentation
+        .uleb128 0x1	@ CIE Code Alignment Factor
+        .sleb128 -4	@ CIE Data Alignment Factor
+        .byte	0xe	@ CIE RA Column
+        .byte	0xc	@ DW_CFA_def_cfa
+        .uleb128 0xd
+        .uleb128 0x0
+
+	.align 2
+LSYM(Lend_cie):
+	.4byte	LSYM(Lend_fde)-LSYM(Lstart_fde)	@ FDE Length
+LSYM(Lstart_fde):
+	.4byte	LSYM(Lstart_frame)	@ FDE CIE offset
+	.4byte	\start_label	@ FDE initial location
+	.4byte	\end_label-\start_label	@ FDE address range
+	.popsection
+#endif
+.endm
+.macro cfi_end	end_label
+#ifdef __ELF__
+	.pushsection	.debug_frame
+	.align	2
+LSYM(Lend_fde):
+	.popsection
+\end_label:
+#endif
+.endm
+
+/* Don't pass dirn, it's there just to get token pasting right.  */
+
+.macro	RETLDM	regs=, cond=, unwind=, dirn=ia
+#if defined (__INTERWORKING__)
+	.ifc "\regs",""
+	ldr\cond	lr, [sp], #8
+	.else
+# if defined(__thumb2__)
+	pop\cond	{\regs, lr}
+# else
+	ldm\cond\dirn	sp!, {\regs, lr}
+# endif
+	.endif
+	.ifnc "\unwind", ""
+	/* Mark LR as restored.  */
+97:	cfi_pop 97b - \unwind, 0xe, 0x0
+	.endif
+	bx\cond	lr
+#else
+	/* Caller is responsible for providing IT instruction.  */
+	.ifc "\regs",""
+	ldr\cond	pc, [sp], #8
+	.else
+# if defined(__thumb2__)
+	pop\cond	{\regs, pc}
+# else
+	ldm\cond\dirn	sp!, {\regs, pc}
+# endif
+	.endif
+#endif
+.endm
+
+/* The Unified assembly syntax allows the same code to be assembled for both
+   ARM and Thumb-2.  However this is only supported by recent gas, so define
+   a set of macros to allow ARM code on older assemblers.  */
+#if defined(__thumb2__)
+.macro do_it cond, suffix=""
+	it\suffix	\cond
+.endm
+.macro shift1 op, arg0, arg1, arg2
+	\op	\arg0, \arg1, \arg2
+.endm
+#define do_push	push
+#define do_pop	pop
+#define COND(op1, op2, cond) op1 ## op2 ## cond
+/* Perform an arithmetic operation with a variable shift operand.  This
+   requires two instructions and a scratch register on Thumb-2.  */
+.macro shiftop name, dest, src1, src2, shiftop, shiftreg, tmp
+	\shiftop \tmp, \src2, \shiftreg
+	\name \dest, \src1, \tmp
+.endm
+#else
+.macro do_it cond, suffix=""
+.endm
+.macro shift1 op, arg0, arg1, arg2
+	mov	\arg0, \arg1, \op \arg2
+.endm
+#define do_push	stmfd sp!,
+#define do_pop	ldmfd sp!,
+#define COND(op1, op2, cond) op1 ## cond ## op2
+.macro shiftop name, dest, src1, src2, shiftop, shiftreg, tmp
+	\name \dest, \src1, \src2, \shiftop \shiftreg
+.endm
+#endif
+
+#ifdef __ARM_EABI__
+.macro ARM_LDIV0 name signed
+	cmp	r0, #0
+	.ifc	\signed, unsigned
+	movne	r0, #0xffffffff
+	.else
+	movgt	r0, #0x7fffffff
+	movlt	r0, #0x80000000
+	.endif
+	b	SYM (__aeabi_idiv0) __PLT__
+.endm
+#else
+.macro ARM_LDIV0 name signed
+	str	lr, [sp, #-8]!
+98:	cfi_push 98b - __\name, 0xe, -0x8, 0x8
+	bl	SYM (__div0) __PLT__
+	mov	r0, #0			@ About as wrong as it could be.
+	RETLDM	unwind=98b
+.endm
+#endif
+
+
+#ifdef __ARM_EABI__
+.macro THUMB_LDIV0 name signed
+#if defined(__ARM_ARCH_6M__)
+	.ifc \signed, unsigned
+	cmp	r0, #0
+	beq	1f
+	mov	r0, #0
+	mvn	r0, r0		@ 0xffffffff
+1:
+	.else
+	cmp	r0, #0
+	beq	2f
+	blt	3f
+	mov	r0, #0
+	mvn	r0, r0
+	lsr	r0, r0, #1	@ 0x7fffffff
+	b	2f
+3:	mov	r0, #0x80
+	lsl	r0, r0, #24	@ 0x80000000
+2:
+	.endif
+	push	{r0, r1, r2}
+	ldr	r0, 4f
+	adr	r1, 4f
+	add	r0, r1
+	str	r0, [sp, #8]
+	@ We know we are not on armv4t, so pop pc is safe.
+	pop	{r0, r1, pc}
+	.align	2
+4:
+	.word	__aeabi_idiv0 - 4b
+#elif defined(__thumb2__)
+	.syntax unified
+	.ifc \signed, unsigned
+	cbz	r0, 1f
+	mov	r0, #0xffffffff
+1:
+	.else
+	cmp	r0, #0
+	do_it	gt
+	movgt	r0, #0x7fffffff
+	do_it	lt
+	movlt	r0, #0x80000000
+	.endif
+	b.w	SYM(__aeabi_idiv0) __PLT__
+#else
+	.align	2
+	bx	pc
+	nop
+	.arm
+	cmp	r0, #0
+	.ifc	\signed, unsigned
+	movne	r0, #0xffffffff
+	.else
+	movgt	r0, #0x7fffffff
+	movlt	r0, #0x80000000
+	.endif
+	b	SYM(__aeabi_idiv0) __PLT__
+	.thumb
+#endif
+.endm
+#else
+.macro THUMB_LDIV0 name signed
+	push	{ r1, lr }
+98:	cfi_push 98b - __\name, 0xe, -0x4, 0x8
+	bl	SYM (__div0)
+	mov	r0, #0			@ About as wrong as it could be.
+#if defined (__INTERWORKING__)
+	pop	{ r1, r2 }
+	bx	r2
+#else
+	pop	{ r1, pc }
+#endif
+.endm
+#endif
+
+.macro FUNC_END name
+	SIZE (__\name)
+.endm
+
+.macro DIV_FUNC_END name signed
+	cfi_start	__\name, LSYM(Lend_div0)
+LSYM(Ldiv0):
+#ifdef __thumb__
+	THUMB_LDIV0 \name \signed
+#else
+	ARM_LDIV0 \name \signed
+#endif
+	cfi_end	LSYM(Lend_div0)
+	FUNC_END \name
+.endm
+
+.macro THUMB_FUNC_START name
+	.globl	SYM (\name)
+	TYPE	(\name)
+	.thumb_func
+SYM (\name):
+.endm
+
+/* Function start macros.  Variants for ARM and Thumb.  */
+
+#ifdef __thumb__
+#define THUMB_FUNC .thumb_func
+#define THUMB_CODE .force_thumb
+# if defined(__thumb2__)
+#define THUMB_SYNTAX .syntax divided
+# else
+#define THUMB_SYNTAX
+# endif
+#else
+#define THUMB_FUNC
+#define THUMB_CODE
+#define THUMB_SYNTAX
+#endif
+
+.macro FUNC_START name
+	.text
+	.globl SYM (__\name)
+	TYPE (__\name)
+	.align 0
+	THUMB_CODE
+	THUMB_FUNC
+	THUMB_SYNTAX
+SYM (__\name):
+.endm
+
+/* Special function that will always be coded in ARM assembly, even if
+   in Thumb-only compilation.  */
+
+#if defined(__thumb2__)
+
+/* For Thumb-2 we build everything in thumb mode.  */
+.macro ARM_FUNC_START name
+       FUNC_START \name
+       .syntax unified
+.endm
+#define EQUIV .thumb_set
+.macro  ARM_CALL name
+	bl	__\name
+.endm
+
+#elif defined(__INTERWORKING_STUBS__)
+
+.macro	ARM_FUNC_START name
+	FUNC_START \name
+	bx	pc
+	nop
+	.arm
+/* A hook to tell gdb that we've switched to ARM mode.  Also used to call
+   directly from other local arm routines.  */
+_L__\name:		
+.endm
+#define EQUIV .thumb_set
+/* Branch directly to a function declared with ARM_FUNC_START.
+   Must be called in arm mode.  */
+.macro  ARM_CALL name
+	bl	_L__\name
+.endm
+
+#else /* !(__INTERWORKING_STUBS__ || __thumb2__) */
+
+#ifdef __ARM_ARCH_6M__
+#define EQUIV .thumb_set
+#else
+.macro	ARM_FUNC_START name
+	.text
+	.globl SYM (__\name)
+	TYPE (__\name)
+	.align 0
+	.arm
+SYM (__\name):
+.endm
+#define EQUIV .set
+.macro  ARM_CALL name
+	bl	__\name
+.endm
+#endif
+
+#endif
+
+.macro	FUNC_ALIAS new old
+	.globl	SYM (__\new)
+#if defined (__thumb__)
+	.thumb_set	SYM (__\new), SYM (__\old)
+#else
+	.set	SYM (__\new), SYM (__\old)
+#endif
+.endm
+
+#ifndef __ARM_ARCH_6M__
+.macro	ARM_FUNC_ALIAS new old
+	.globl	SYM (__\new)
+	EQUIV	SYM (__\new), SYM (__\old)
+#if defined(__INTERWORKING_STUBS__)
+	.set	SYM (_L__\new), SYM (_L__\old)
+#endif
+.endm
+#endif
+
+#ifdef __ARMEB__
+#define xxh r0
+#define xxl r1
+#define yyh r2
+#define yyl r3
+#else
+#define xxh r1
+#define xxl r0
+#define yyh r3
+#define yyl r2
+#endif	
+
+#ifdef __ARM_EABI__
+.macro	WEAK name
+	.weak SYM (__\name)
+.endm
+#endif
+
+#ifdef __thumb__
+/* Register aliases.  */
+
+work		.req	r4	@ XXXX is this safe ?
+dividend	.req	r0
+divisor		.req	r1
+overdone	.req	r2
+result		.req	r2
+curbit		.req	r3
+#endif
+#if 0
+ip		.req	r12
+sp		.req	r13
+lr		.req	r14
+pc		.req	r15
+#endif
+
+/* ------------------------------------------------------------------------ */
+/*		Bodies of the division and modulo routines.		    */
+/* ------------------------------------------------------------------------ */	
+.macro ARM_DIV_BODY dividend, divisor, result, curbit
+
+#if __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__)
+
+#if defined (__thumb2__)
+	clz	\curbit, \dividend
+	clz	\result, \divisor
+	sub	\curbit, \result, \curbit
+	rsb	\curbit, \curbit, #31
+	adr	\result, 1f
+	add	\curbit, \result, \curbit, lsl #4
+	mov	\result, #0
+	mov	pc, \curbit
+.p2align 3
+1:
+	.set	shift, 32
+	.rept	32
+	.set	shift, shift - 1
+	cmp.w	\dividend, \divisor, lsl #shift
+	nop.n
+	adc.w	\result, \result, \result
+	it	cs
+	subcs.w	\dividend, \dividend, \divisor, lsl #shift
+	.endr
+#else
+	clz	\curbit, \dividend
+	clz	\result, \divisor
+	sub	\curbit, \result, \curbit
+	rsbs	\curbit, \curbit, #31
+	addne	\curbit, \curbit, \curbit, lsl #1
+	mov	\result, #0
+	addne	pc, pc, \curbit, lsl #2
+	nop
+	.set	shift, 32
+	.rept	32
+	.set	shift, shift - 1
+	cmp	\dividend, \divisor, lsl #shift
+	adc	\result, \result, \result
+	subcs	\dividend, \dividend, \divisor, lsl #shift
+	.endr
+#endif
+
+#else /* __ARM_ARCH__ < 5 || defined (__OPTIMIZE_SIZE__) */
+#if __ARM_ARCH__ >= 5
+
+	clz	\curbit, \divisor
+	clz	\result, \dividend
+	sub	\result, \curbit, \result
+	mov	\curbit, #1
+	mov	\divisor, \divisor, lsl \result
+	mov	\curbit, \curbit, lsl \result
+	mov	\result, #0
+	
+#else /* __ARM_ARCH__ < 5 */
+
+	@ Initially shift the divisor left 3 bits if possible,
+	@ set curbit accordingly.  This allows for curbit to be located
+	@ at the left end of each 4-bit nibbles in the division loop
+	@ to save one loop in most cases.
+	tst	\divisor, #0xe0000000
+	moveq	\divisor, \divisor, lsl #3
+	moveq	\curbit, #8
+	movne	\curbit, #1
+
+	@ Unless the divisor is very big, shift it up in multiples of
+	@ four bits, since this is the amount of unwinding in the main
+	@ division loop.  Continue shifting until the divisor is 
+	@ larger than the dividend.
+1:	cmp	\divisor, #0x10000000
+	cmplo	\divisor, \dividend
+	movlo	\divisor, \divisor, lsl #4
+	movlo	\curbit, \curbit, lsl #4
+	blo	1b
+
+	@ For very big divisors, we must shift it a bit at a time, or
+	@ we will be in danger of overflowing.
+1:	cmp	\divisor, #0x80000000
+	cmplo	\divisor, \dividend
+	movlo	\divisor, \divisor, lsl #1
+	movlo	\curbit, \curbit, lsl #1
+	blo	1b
+
+	mov	\result, #0
+
+#endif /* __ARM_ARCH__ < 5 */
+
+	@ Division loop
+1:	cmp	\dividend, \divisor
+	do_it	hs, t
+	subhs	\dividend, \dividend, \divisor
+	orrhs	\result,   \result,   \curbit
+	cmp	\dividend, \divisor,  lsr #1
+	do_it	hs, t
+	subhs	\dividend, \dividend, \divisor, lsr #1
+	orrhs	\result,   \result,   \curbit,  lsr #1
+	cmp	\dividend, \divisor,  lsr #2
+	do_it	hs, t
+	subhs	\dividend, \dividend, \divisor, lsr #2
+	orrhs	\result,   \result,   \curbit,  lsr #2
+	cmp	\dividend, \divisor,  lsr #3
+	do_it	hs, t
+	subhs	\dividend, \dividend, \divisor, lsr #3
+	orrhs	\result,   \result,   \curbit,  lsr #3
+	cmp	\dividend, #0			@ Early termination?
+	do_it	ne, t
+	movnes	\curbit,   \curbit,  lsr #4	@ No, any more bits to do?
+	movne	\divisor,  \divisor, lsr #4
+	bne	1b
+
+#endif /* __ARM_ARCH__ < 5 || defined (__OPTIMIZE_SIZE__) */
+
+.endm
+/* ------------------------------------------------------------------------ */	
+.macro ARM_DIV2_ORDER divisor, order
+
+#if __ARM_ARCH__ >= 5
+
+	clz	\order, \divisor
+	rsb	\order, \order, #31
+
+#else
+
+	cmp	\divisor, #(1 << 16)
+	movhs	\divisor, \divisor, lsr #16
+	movhs	\order, #16
+	movlo	\order, #0
+
+	cmp	\divisor, #(1 << 8)
+	movhs	\divisor, \divisor, lsr #8
+	addhs	\order, \order, #8
+
+	cmp	\divisor, #(1 << 4)
+	movhs	\divisor, \divisor, lsr #4
+	addhs	\order, \order, #4
+
+	cmp	\divisor, #(1 << 2)
+	addhi	\order, \order, #3
+	addls	\order, \order, \divisor, lsr #1
+
+#endif
+
+.endm
+/* ------------------------------------------------------------------------ */
+.macro ARM_MOD_BODY dividend, divisor, order, spare
+
+#if __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__)
+
+	clz	\order, \divisor
+	clz	\spare, \dividend
+	sub	\order, \order, \spare
+	rsbs	\order, \order, #31
+	addne	pc, pc, \order, lsl #3
+	nop
+	.set	shift, 32
+	.rept	32
+	.set	shift, shift - 1
+	cmp	\dividend, \divisor, lsl #shift
+	subcs	\dividend, \dividend, \divisor, lsl #shift
+	.endr
+
+#else /* __ARM_ARCH__ < 5 || defined (__OPTIMIZE_SIZE__) */
+#if __ARM_ARCH__ >= 5
+
+	clz	\order, \divisor
+	clz	\spare, \dividend
+	sub	\order, \order, \spare
+	mov	\divisor, \divisor, lsl \order
+	
+#else /* __ARM_ARCH__ < 5 */
+
+	mov	\order, #0
+
+	@ Unless the divisor is very big, shift it up in multiples of
+	@ four bits, since this is the amount of unwinding in the main
+	@ division loop.  Continue shifting until the divisor is 
+	@ larger than the dividend.
+1:	cmp	\divisor, #0x10000000
+	cmplo	\divisor, \dividend
+	movlo	\divisor, \divisor, lsl #4
+	addlo	\order, \order, #4
+	blo	1b
+
+	@ For very big divisors, we must shift it a bit at a time, or
+	@ we will be in danger of overflowing.
+1:	cmp	\divisor, #0x80000000
+	cmplo	\divisor, \dividend
+	movlo	\divisor, \divisor, lsl #1
+	addlo	\order, \order, #1
+	blo	1b
+
+#endif /* __ARM_ARCH__ < 5 */
+
+	@ Perform all needed substractions to keep only the reminder.
+	@ Do comparisons in batch of 4 first.
+	subs	\order, \order, #3		@ yes, 3 is intended here
+	blt	2f
+
+1:	cmp	\dividend, \divisor
+	subhs	\dividend, \dividend, \divisor
+	cmp	\dividend, \divisor,  lsr #1
+	subhs	\dividend, \dividend, \divisor, lsr #1
+	cmp	\dividend, \divisor,  lsr #2
+	subhs	\dividend, \dividend, \divisor, lsr #2
+	cmp	\dividend, \divisor,  lsr #3
+	subhs	\dividend, \dividend, \divisor, lsr #3
+	cmp	\dividend, #1
+	mov	\divisor, \divisor, lsr #4
+	subges	\order, \order, #4
+	bge	1b
+
+	tst	\order, #3
+	teqne	\dividend, #0
+	beq	5f
+
+	@ Either 1, 2 or 3 comparison/substractions are left.
+2:	cmn	\order, #2
+	blt	4f
+	beq	3f
+	cmp	\dividend, \divisor
+	subhs	\dividend, \dividend, \divisor
+	mov	\divisor,  \divisor,  lsr #1
+3:	cmp	\dividend, \divisor
+	subhs	\dividend, \dividend, \divisor
+	mov	\divisor,  \divisor,  lsr #1
+4:	cmp	\dividend, \divisor
+	subhs	\dividend, \dividend, \divisor
+5:
+
+#endif /* __ARM_ARCH__ < 5 || defined (__OPTIMIZE_SIZE__) */
+
+.endm
+/* ------------------------------------------------------------------------ */
+.macro THUMB_DIV_MOD_BODY modulo
+	@ Load the constant 0x10000000 into our work register.
+	mov	work, #1
+	lsl	work, #28
+LSYM(Loop1):
+	@ Unless the divisor is very big, shift it up in multiples of
+	@ four bits, since this is the amount of unwinding in the main
+	@ division loop.  Continue shifting until the divisor is 
+	@ larger than the dividend.
+	cmp	divisor, work
+	bhs	LSYM(Lbignum)
+	cmp	divisor, dividend
+	bhs	LSYM(Lbignum)
+	lsl	divisor, #4
+	lsl	curbit,  #4
+	b	LSYM(Loop1)
+LSYM(Lbignum):
+	@ Set work to 0x80000000
+	lsl	work, #3
+LSYM(Loop2):
+	@ For very big divisors, we must shift it a bit at a time, or
+	@ we will be in danger of overflowing.
+	cmp	divisor, work
+	bhs	LSYM(Loop3)
+	cmp	divisor, dividend
+	bhs	LSYM(Loop3)
+	lsl	divisor, #1
+	lsl	curbit,  #1
+	b	LSYM(Loop2)
+LSYM(Loop3):
+	@ Test for possible subtractions ...
+  .if \modulo
+	@ ... On the final pass, this may subtract too much from the dividend, 
+	@ so keep track of which subtractions are done, we can fix them up 
+	@ afterwards.
+	mov	overdone, #0
+	cmp	dividend, divisor
+	blo	LSYM(Lover1)
+	sub	dividend, dividend, divisor
+LSYM(Lover1):
+	lsr	work, divisor, #1
+	cmp	dividend, work
+	blo	LSYM(Lover2)
+	sub	dividend, dividend, work
+	mov	ip, curbit
+	mov	work, #1
+	ror	curbit, work
+	orr	overdone, curbit
+	mov	curbit, ip
+LSYM(Lover2):
+	lsr	work, divisor, #2
+	cmp	dividend, work
+	blo	LSYM(Lover3)
+	sub	dividend, dividend, work
+	mov	ip, curbit
+	mov	work, #2
+	ror	curbit, work
+	orr	overdone, curbit
+	mov	curbit, ip
+LSYM(Lover3):
+	lsr	work, divisor, #3
+	cmp	dividend, work
+	blo	LSYM(Lover4)
+	sub	dividend, dividend, work
+	mov	ip, curbit
+	mov	work, #3
+	ror	curbit, work
+	orr	overdone, curbit
+	mov	curbit, ip
+LSYM(Lover4):
+	mov	ip, curbit
+  .else
+	@ ... and note which bits are done in the result.  On the final pass,
+	@ this may subtract too much from the dividend, but the result will be ok,
+	@ since the "bit" will have been shifted out at the bottom.
+	cmp	dividend, divisor
+	blo	LSYM(Lover1)
+	sub	dividend, dividend, divisor
+	orr	result, result, curbit
+LSYM(Lover1):
+	lsr	work, divisor, #1
+	cmp	dividend, work
+	blo	LSYM(Lover2)
+	sub	dividend, dividend, work
+	lsr	work, curbit, #1
+	orr	result, work
+LSYM(Lover2):
+	lsr	work, divisor, #2
+	cmp	dividend, work
+	blo	LSYM(Lover3)
+	sub	dividend, dividend, work
+	lsr	work, curbit, #2
+	orr	result, work
+LSYM(Lover3):
+	lsr	work, divisor, #3
+	cmp	dividend, work
+	blo	LSYM(Lover4)
+	sub	dividend, dividend, work
+	lsr	work, curbit, #3
+	orr	result, work
+LSYM(Lover4):
+  .endif
+	
+	cmp	dividend, #0			@ Early termination?
+	beq	LSYM(Lover5)
+	lsr	curbit,  #4			@ No, any more bits to do?
+	beq	LSYM(Lover5)
+	lsr	divisor, #4
+	b	LSYM(Loop3)
+LSYM(Lover5):
+  .if \modulo
+	@ Any subtractions that we should not have done will be recorded in
+	@ the top three bits of "overdone".  Exactly which were not needed
+	@ are governed by the position of the bit, stored in ip.
+	mov	work, #0xe
+	lsl	work, #28
+	and	overdone, work
+	beq	LSYM(Lgot_result)
+	
+	@ If we terminated early, because dividend became zero, then the 
+	@ bit in ip will not be in the bottom nibble, and we should not
+	@ perform the additions below.  We must test for this though
+	@ (rather relying upon the TSTs to prevent the additions) since
+	@ the bit in ip could be in the top two bits which might then match
+	@ with one of the smaller RORs.
+	mov	curbit, ip
+	mov	work, #0x7
+	tst	curbit, work
+	beq	LSYM(Lgot_result)
+	
+	mov	curbit, ip
+	mov	work, #3
+	ror	curbit, work
+	tst	overdone, curbit
+	beq	LSYM(Lover6)
+	lsr	work, divisor, #3
+	add	dividend, work
+LSYM(Lover6):
+	mov	curbit, ip
+	mov	work, #2
+	ror	curbit, work
+	tst	overdone, curbit
+	beq	LSYM(Lover7)
+	lsr	work, divisor, #2
+	add	dividend, work
+LSYM(Lover7):
+	mov	curbit, ip
+	mov	work, #1
+	ror	curbit, work
+	tst	overdone, curbit
+	beq	LSYM(Lgot_result)
+	lsr	work, divisor, #1
+	add	dividend, work
+  .endif
+LSYM(Lgot_result):
+.endm	
+/* ------------------------------------------------------------------------ */
+/*		Start of the Real Functions				    */
+/* ------------------------------------------------------------------------ */
+#ifdef L_udivsi3
+
+#if defined(__prefer_thumb__)
+
+	FUNC_START udivsi3
+	FUNC_ALIAS aeabi_uidiv udivsi3
+
+	cmp	divisor, #0
+	beq	LSYM(Ldiv0)
+LSYM(udivsi3_skip_div0_test):
+	mov	curbit, #1
+	mov	result, #0
+	
+	push	{ work }
+	cmp	dividend, divisor
+	blo	LSYM(Lgot_result)
+
+	THUMB_DIV_MOD_BODY 0
+	
+	mov	r0, result
+	pop	{ work }
+	RET
+
+#elif defined(__ARM_ARCH_EXT_IDIV__)
+
+	ARM_FUNC_START udivsi3
+	ARM_FUNC_ALIAS aeabi_uidiv udivsi3
+
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+
+	udiv	r0, r0, r1
+	RET
+
+#else /* ARM version/Thumb-2.  */
+
+	ARM_FUNC_START udivsi3
+	ARM_FUNC_ALIAS aeabi_uidiv udivsi3
+
+	/* Note: if called via udivsi3_skip_div0_test, this will unnecessarily
+	   check for division-by-zero a second time.  */
+LSYM(udivsi3_skip_div0_test):
+	subs	r2, r1, #1
+	do_it	eq
+	RETc(eq)
+	bcc	LSYM(Ldiv0)
+	cmp	r0, r1
+	bls	11f
+	tst	r1, r2
+	beq	12f
+	
+	ARM_DIV_BODY r0, r1, r2, r3
+	
+	mov	r0, r2
+	RET	
+
+11:	do_it	eq, e
+	moveq	r0, #1
+	movne	r0, #0
+	RET
+
+12:	ARM_DIV2_ORDER r1, r2
+
+	mov	r0, r0, lsr r2
+	RET
+
+#endif /* ARM version */
+
+	DIV_FUNC_END udivsi3 unsigned
+
+#if defined(__prefer_thumb__)
+FUNC_START aeabi_uidivmod
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	push	{r0, r1, lr}
+	bl	LSYM(udivsi3_skip_div0_test)
+	POP	{r1, r2, r3}
+	mul	r2, r0
+	sub	r1, r1, r2
+	bx	r3
+#elif defined(__ARM_ARCH_EXT_IDIV__)
+ARM_FUNC_START aeabi_uidivmod
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	mov     r2, r0 
+	udiv	r0, r0, r1
+	mls     r1, r0, r1, r2
+	RET
+#else
+ARM_FUNC_START aeabi_uidivmod
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	stmfd	sp!, { r0, r1, lr }
+	bl	LSYM(udivsi3_skip_div0_test)
+	ldmfd	sp!, { r1, r2, lr }
+	mul	r3, r2, r0
+	sub	r1, r1, r3
+	RET
+#endif
+	FUNC_END aeabi_uidivmod
+	
+#endif /* L_udivsi3 */
+/* ------------------------------------------------------------------------ */
+#ifdef L_umodsi3
+
+#ifdef __ARM_ARCH_EXT_IDIV__
+
+	ARM_FUNC_START umodsi3
+
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	udiv	r2, r0, r1
+	mls     r0, r1, r2, r0
+	RET
+
+#elif defined(__thumb__)
+
+	FUNC_START umodsi3
+
+	cmp	divisor, #0
+	beq	LSYM(Ldiv0)
+	mov	curbit, #1
+	cmp	dividend, divisor
+	bhs	LSYM(Lover10)
+	RET	
+
+LSYM(Lover10):
+	push	{ work }
+
+	THUMB_DIV_MOD_BODY 1
+	
+	pop	{ work }
+	RET
+	
+#else  /* ARM version.  */
+	
+	FUNC_START umodsi3
+
+	subs	r2, r1, #1			@ compare divisor with 1
+	bcc	LSYM(Ldiv0)
+	cmpne	r0, r1				@ compare dividend with divisor
+	moveq   r0, #0
+	tsthi	r1, r2				@ see if divisor is power of 2
+	andeq	r0, r0, r2
+	RETc(ls)
+
+	ARM_MOD_BODY r0, r1, r2, r3
+	
+	RET	
+
+#endif /* ARM version.  */
+	
+	DIV_FUNC_END umodsi3 unsigned
+
+#endif /* L_umodsi3 */
+/* ------------------------------------------------------------------------ */
+#ifdef L_divsi3
+
+#if defined(__prefer_thumb__)
+
+	FUNC_START divsi3	
+	FUNC_ALIAS aeabi_idiv divsi3
+
+	cmp	divisor, #0
+	beq	LSYM(Ldiv0)
+LSYM(divsi3_skip_div0_test):
+	push	{ work }
+	mov	work, dividend
+	eor	work, divisor		@ Save the sign of the result.
+	mov	ip, work
+	mov	curbit, #1
+	mov	result, #0
+	cmp	divisor, #0
+	bpl	LSYM(Lover10)
+	neg	divisor, divisor	@ Loops below use unsigned.
+LSYM(Lover10):
+	cmp	dividend, #0
+	bpl	LSYM(Lover11)
+	neg	dividend, dividend
+LSYM(Lover11):
+	cmp	dividend, divisor
+	blo	LSYM(Lgot_result)
+
+	THUMB_DIV_MOD_BODY 0
+	
+	mov	r0, result
+	mov	work, ip
+	cmp	work, #0
+	bpl	LSYM(Lover12)
+	neg	r0, r0
+LSYM(Lover12):
+	pop	{ work }
+	RET
+
+#elif defined(__ARM_ARCH_EXT_IDIV__)
+
+	ARM_FUNC_START divsi3
+	ARM_FUNC_ALIAS aeabi_idiv divsi3
+
+	cmp 	r1, #0
+	beq	LSYM(Ldiv0)
+	sdiv	r0, r0, r1
+	RET
+
+#else /* ARM/Thumb-2 version.  */
+	
+	ARM_FUNC_START divsi3	
+	ARM_FUNC_ALIAS aeabi_idiv divsi3
+
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+LSYM(divsi3_skip_div0_test):
+	eor	ip, r0, r1			@ save the sign of the result.
+	do_it	mi
+	rsbmi	r1, r1, #0			@ loops below use unsigned.
+	subs	r2, r1, #1			@ division by 1 or -1 ?
+	beq	10f
+	movs	r3, r0
+	do_it	mi
+	rsbmi	r3, r0, #0			@ positive dividend value
+	cmp	r3, r1
+	bls	11f
+	tst	r1, r2				@ divisor is power of 2 ?
+	beq	12f
+
+	ARM_DIV_BODY r3, r1, r0, r2
+	
+	cmp	ip, #0
+	do_it	mi
+	rsbmi	r0, r0, #0
+	RET	
+
+10:	teq	ip, r0				@ same sign ?
+	do_it	mi
+	rsbmi	r0, r0, #0
+	RET	
+
+11:	do_it	lo
+	movlo	r0, #0
+	do_it	eq,t
+	moveq	r0, ip, asr #31
+	orreq	r0, r0, #1
+	RET
+
+12:	ARM_DIV2_ORDER r1, r2
+
+	cmp	ip, #0
+	mov	r0, r3, lsr r2
+	do_it	mi
+	rsbmi	r0, r0, #0
+	RET
+
+#endif /* ARM version */
+	
+	DIV_FUNC_END divsi3 signed
+
+#if defined(__prefer_thumb__)
+FUNC_START aeabi_idivmod
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	push	{r0, r1, lr}
+	bl	LSYM(divsi3_skip_div0_test)
+	POP	{r1, r2, r3}
+	mul	r2, r0
+	sub	r1, r1, r2
+	bx	r3
+#elif defined(__ARM_ARCH_EXT_IDIV__)
+ARM_FUNC_START aeabi_idivmod
+	cmp 	r1, #0
+	beq	LSYM(Ldiv0)
+	mov     r2, r0
+	sdiv	r0, r0, r1
+	mls     r1, r0, r1, r2
+	RET
+#else
+ARM_FUNC_START aeabi_idivmod
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	stmfd	sp!, { r0, r1, lr }
+	bl	LSYM(divsi3_skip_div0_test)
+	ldmfd	sp!, { r1, r2, lr }
+	mul	r3, r2, r0
+	sub	r1, r1, r3
+	RET
+#endif
+	FUNC_END aeabi_idivmod
+	
+#endif /* L_divsi3 */
+/* ------------------------------------------------------------------------ */
+#ifdef L_modsi3
+
+#if defined(__ARM_ARCH_EXT_IDIV__)
+
+	ARM_FUNC_START modsi3
+
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+
+	sdiv	r2, r0, r1
+	mls     r0, r1, r2, r0
+	RET
+
+#elif defined(__thumb__)
+
+	FUNC_START modsi3
+
+	mov	curbit, #1
+	cmp	divisor, #0
+	beq	LSYM(Ldiv0)
+	bpl	LSYM(Lover10)
+	neg	divisor, divisor		@ Loops below use unsigned.
+LSYM(Lover10):
+	push	{ work }
+	@ Need to save the sign of the dividend, unfortunately, we need
+	@ work later on.  Must do this after saving the original value of
+	@ the work register, because we will pop this value off first.
+	push	{ dividend }
+	cmp	dividend, #0
+	bpl	LSYM(Lover11)
+	neg	dividend, dividend
+LSYM(Lover11):
+	cmp	dividend, divisor
+	blo	LSYM(Lgot_result)
+
+	THUMB_DIV_MOD_BODY 1
+		
+	pop	{ work }
+	cmp	work, #0
+	bpl	LSYM(Lover12)
+	neg	dividend, dividend
+LSYM(Lover12):
+	pop	{ work }
+	RET	
+
+#else /* ARM version.  */
+	
+	FUNC_START modsi3
+
+	cmp	r1, #0
+	beq	LSYM(Ldiv0)
+	rsbmi	r1, r1, #0			@ loops below use unsigned.
+	movs	ip, r0				@ preserve sign of dividend
+	rsbmi	r0, r0, #0			@ if negative make positive
+	subs	r2, r1, #1			@ compare divisor with 1
+	cmpne	r0, r1				@ compare dividend with divisor
+	moveq	r0, #0
+	tsthi	r1, r2				@ see if divisor is power of 2
+	andeq	r0, r0, r2
+	bls	10f
+
+	ARM_MOD_BODY r0, r1, r2, r3
+
+10:	cmp	ip, #0
+	rsbmi	r0, r0, #0
+	RET	
+
+#endif /* ARM version */
+	
+	DIV_FUNC_END modsi3 signed
+
+#endif /* L_modsi3 */
+/* ------------------------------------------------------------------------ */
+#ifdef L_dvmd_tls
+
+#ifdef __ARM_EABI__
+	WEAK aeabi_idiv0
+	WEAK aeabi_ldiv0
+	FUNC_START aeabi_idiv0
+	FUNC_START aeabi_ldiv0
+	RET
+	FUNC_END aeabi_ldiv0
+	FUNC_END aeabi_idiv0
+#else
+	FUNC_START div0
+	RET
+	FUNC_END div0
+#endif
+	
+#endif /* L_divmodsi_tools */
+/* ------------------------------------------------------------------------ */
+#ifdef L_dvmd_lnx
+@ GNU/Linux division-by zero handler.  Used in place of L_dvmd_tls
+
+/* Constant taken from <asm/signal.h>.  */
+#define SIGFPE	8
+
+#ifdef __ARM_EABI__
+	WEAK aeabi_idiv0
+	WEAK aeabi_ldiv0
+	ARM_FUNC_START aeabi_idiv0
+	ARM_FUNC_START aeabi_ldiv0
+#else
+	ARM_FUNC_START div0
+#endif
+
+	do_push	{r1, lr}
+	mov	r0, #SIGFPE
+	bl	SYM(raise) __PLT__
+	RETLDM	r1
+
+#ifdef __ARM_EABI__
+	FUNC_END aeabi_ldiv0
+	FUNC_END aeabi_idiv0
+#else
+	FUNC_END div0
+#endif
+	
+#endif /* L_dvmd_lnx */
+#ifdef L_clear_cache
+#if defined __ARM_EABI__ && defined __linux__
+@ EABI GNU/Linux call to cacheflush syscall.
+	ARM_FUNC_START clear_cache
+	do_push	{r7}
+#if __ARM_ARCH__ >= 7 || defined(__ARM_ARCH_6T2__)
+	movw	r7, #2
+	movt	r7, #0xf
+#else
+	mov	r7, #0xf0000
+	add	r7, r7, #2
+#endif
+	mov	r2, #0
+	swi	0
+	do_pop	{r7}
+	RET
+	FUNC_END clear_cache
+#else
+#error "This is only for ARM EABI GNU/Linux"
+#endif
+#endif /* L_clear_cache */
+/* ------------------------------------------------------------------------ */
+/* Dword shift operations.  */
+/* All the following Dword shift variants rely on the fact that
+	shft xxx, Reg
+   is in fact done as
+	shft xxx, (Reg & 255)
+   so for Reg value in (32...63) and (-1...-31) we will get zero (in the
+   case of logical shifts) or the sign (for asr).  */
+
+#ifdef __ARMEB__
+#define al	r1
+#define ah	r0
+#else
+#define al	r0
+#define ah	r1
+#endif
+
+/* Prevent __aeabi double-word shifts from being produced on SymbianOS.  */
+#ifndef __symbian__
+
+#ifdef L_lshrdi3
+
+	FUNC_START lshrdi3
+	FUNC_ALIAS aeabi_llsr lshrdi3
+	
+#ifdef __thumb__
+	lsr	al, r2
+	mov	r3, ah
+	lsr	ah, r2
+	mov	ip, r3
+	sub	r2, #32
+	lsr	r3, r2
+	orr	al, r3
+	neg	r2, r2
+	mov	r3, ip
+	lsl	r3, r2
+	orr	al, r3
+	RET
+#else
+	subs	r3, r2, #32
+	rsb	ip, r2, #32
+	movmi	al, al, lsr r2
+	movpl	al, ah, lsr r3
+	orrmi	al, al, ah, lsl ip
+	mov	ah, ah, lsr r2
+	RET
+#endif
+	FUNC_END aeabi_llsr
+	FUNC_END lshrdi3
+
+#endif
+	
+#ifdef L_ashrdi3
+	
+	FUNC_START ashrdi3
+	FUNC_ALIAS aeabi_lasr ashrdi3
+	
+#ifdef __thumb__
+	lsr	al, r2
+	mov	r3, ah
+	asr	ah, r2
+	sub	r2, #32
+	@ If r2 is negative at this point the following step would OR
+	@ the sign bit into all of AL.  That's not what we want...
+	bmi	1f
+	mov	ip, r3
+	asr	r3, r2
+	orr	al, r3
+	mov	r3, ip
+1:
+	neg	r2, r2
+	lsl	r3, r2
+	orr	al, r3
+	RET
+#else
+	subs	r3, r2, #32
+	rsb	ip, r2, #32
+	movmi	al, al, lsr r2
+	movpl	al, ah, asr r3
+	orrmi	al, al, ah, lsl ip
+	mov	ah, ah, asr r2
+	RET
+#endif
+
+	FUNC_END aeabi_lasr
+	FUNC_END ashrdi3
+
+#endif
+
+#ifdef L_ashldi3
+
+	FUNC_START ashldi3
+	FUNC_ALIAS aeabi_llsl ashldi3
+	
+#ifdef __thumb__
+	lsl	ah, r2
+	mov	r3, al
+	lsl	al, r2
+	mov	ip, r3
+	sub	r2, #32
+	lsl	r3, r2
+	orr	ah, r3
+	neg	r2, r2
+	mov	r3, ip
+	lsr	r3, r2
+	orr	ah, r3
+	RET
+#else
+	subs	r3, r2, #32
+	rsb	ip, r2, #32
+	movmi	ah, ah, lsl r2
+	movpl	ah, al, lsl r3
+	orrmi	ah, ah, al, lsr ip
+	mov	al, al, lsl r2
+	RET
+#endif
+	FUNC_END aeabi_llsl
+	FUNC_END ashldi3
+
+#endif
+
+#endif /* __symbian__ */
+
+#if ((__ARM_ARCH__ > 5) && !defined(__ARM_ARCH_6M__)) \
+    || defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
+    || defined(__ARM_ARCH_5TEJ__)
+#define HAVE_ARM_CLZ 1
+#endif
+
+#ifdef L_clzsi2
+#if defined(__ARM_ARCH_6M__)
+FUNC_START clzsi2
+	mov	r1, #28
+	mov	r3, #1
+	lsl	r3, r3, #16
+	cmp	r0, r3 /* 0x10000 */
+	bcc	2f
+	lsr	r0, r0, #16
+	sub	r1, r1, #16
+2:	lsr	r3, r3, #8
+	cmp	r0, r3 /* #0x100 */
+	bcc	2f
+	lsr	r0, r0, #8
+	sub	r1, r1, #8
+2:	lsr	r3, r3, #4
+	cmp	r0, r3 /* #0x10 */
+	bcc	2f
+	lsr	r0, r0, #4
+	sub	r1, r1, #4
+2:	adr	r2, 1f
+	ldrb	r0, [r2, r0]
+	add	r0, r0, r1
+	bx lr
+.align 2
+1:
+.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
+	FUNC_END clzsi2
+#else
+ARM_FUNC_START clzsi2
+# if defined(HAVE_ARM_CLZ)
+	clz	r0, r0
+	RET
+# else
+	mov	r1, #28
+	cmp	r0, #0x10000
+	do_it	cs, t
+	movcs	r0, r0, lsr #16
+	subcs	r1, r1, #16
+	cmp	r0, #0x100
+	do_it	cs, t
+	movcs	r0, r0, lsr #8
+	subcs	r1, r1, #8
+	cmp	r0, #0x10
+	do_it	cs, t
+	movcs	r0, r0, lsr #4
+	subcs	r1, r1, #4
+	adr	r2, 1f
+	ldrb	r0, [r2, r0]
+	add	r0, r0, r1
+	RET
+.align 2
+1:
+.byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
+# endif /* !HAVE_ARM_CLZ */
+	FUNC_END clzsi2
+#endif
+#endif /* L_clzsi2 */
+
+#ifdef L_clzdi2
+#if !defined(HAVE_ARM_CLZ)
+
+# if defined(__ARM_ARCH_6M__)
+FUNC_START clzdi2
+	push	{r4, lr}
+# else
+ARM_FUNC_START clzdi2
+	do_push	{r4, lr}
+# endif
+	cmp	xxh, #0
+	bne	1f
+# ifdef __ARMEB__
+	mov	r0, xxl
+	bl	__clzsi2
+	add	r0, r0, #32
+	b 2f
+1:
+	bl	__clzsi2
+# else
+	bl	__clzsi2
+	add	r0, r0, #32
+	b 2f
+1:
+	mov	r0, xxh
+	bl	__clzsi2
+# endif
+2:
+# if defined(__ARM_ARCH_6M__)
+	pop	{r4, pc}
+# else
+	RETLDM	r4
+# endif
+	FUNC_END clzdi2
+
+#else /* HAVE_ARM_CLZ */
+
+ARM_FUNC_START clzdi2
+	cmp	xxh, #0
+	do_it	eq, et
+	clzeq	r0, xxl
+	clzne	r0, xxh
+	addeq	r0, r0, #32
+	RET
+	FUNC_END clzdi2
+
+#endif
+#endif /* L_clzdi2 */
+
+#ifdef L_ctzsi2
+#if defined(__ARM_ARCH_6M__)
+FUNC_START ctzsi2
+	neg	r1, r0
+	and	r0, r0, r1
+	mov	r1, #28
+	mov	r3, #1
+	lsl	r3, r3, #16
+	cmp	r0, r3 /* 0x10000 */
+	bcc	2f
+	lsr	r0, r0, #16
+	sub	r1, r1, #16
+2:	lsr	r3, r3, #8
+	cmp	r0, r3 /* #0x100 */
+	bcc	2f
+	lsr	r0, r0, #8
+	sub	r1, r1, #8
+2:	lsr	r3, r3, #4
+	cmp	r0, r3 /* #0x10 */
+	bcc	2f
+	lsr	r0, r0, #4
+	sub	r1, r1, #4
+2:	adr	r2, 1f
+	ldrb	r0, [r2, r0]
+	sub	r0, r0, r1
+	bx lr
+.align 2
+1:
+.byte	27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
+	FUNC_END ctzsi2
+#else
+ARM_FUNC_START ctzsi2
+	rsb	r1, r0, #0
+	and	r0, r0, r1
+# if defined(HAVE_ARM_CLZ)
+	clz	r0, r0
+	rsb	r0, r0, #31
+	RET
+# else
+	mov	r1, #28
+	cmp	r0, #0x10000
+	do_it	cs, t
+	movcs	r0, r0, lsr #16
+	subcs	r1, r1, #16
+	cmp	r0, #0x100
+	do_it	cs, t
+	movcs	r0, r0, lsr #8
+	subcs	r1, r1, #8
+	cmp	r0, #0x10
+	do_it	cs, t
+	movcs	r0, r0, lsr #4
+	subcs	r1, r1, #4
+	adr	r2, 1f
+	ldrb	r0, [r2, r0]
+	sub	r0, r0, r1
+	RET
+.align 2
+1:
+.byte	27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
+# endif /* !HAVE_ARM_CLZ */
+	FUNC_END ctzsi2
+#endif
+#endif /* L_clzsi2 */
+
+/* ------------------------------------------------------------------------ */
+/* These next two sections are here despite the fact that they contain Thumb 
+   assembler because their presence allows interworked code to be linked even
+   when the GCC library is this one.  */
+		
+/* Do not build the interworking functions when the target architecture does 
+   not support Thumb instructions.  (This can be a multilib option).  */
+#if defined __ARM_ARCH_4T__ || defined __ARM_ARCH_5T__\
+      || defined __ARM_ARCH_5TE__ || defined __ARM_ARCH_5TEJ__ \
+      || __ARM_ARCH__ >= 6
+
+#if defined L_call_via_rX
+
+/* These labels & instructions are used by the Arm/Thumb interworking code. 
+   The address of function to be called is loaded into a register and then 
+   one of these labels is called via a BL instruction.  This puts the 
+   return address into the link register with the bottom bit set, and the 
+   code here switches to the correct mode before executing the function.  */
+	
+	.text
+	.align 0
+        .force_thumb
+
+.macro call_via register
+	THUMB_FUNC_START _call_via_\register
+
+	bx	\register
+	nop
+
+	SIZE	(_call_via_\register)
+.endm
+
+	call_via r0
+	call_via r1
+	call_via r2
+	call_via r3
+	call_via r4
+	call_via r5
+	call_via r6
+	call_via r7
+	call_via r8
+	call_via r9
+	call_via sl
+	call_via fp
+	call_via ip
+	call_via sp
+	call_via lr
+
+#endif /* L_call_via_rX */
+
+/* Don't bother with the old interworking routines for Thumb-2.  */
+/* ??? Maybe only omit these on "m" variants.  */
+#if !defined(__thumb2__) && !defined(__ARM_ARCH_6M__)
+
+#if defined L_interwork_call_via_rX
+
+/* These labels & instructions are used by the Arm/Thumb interworking code,
+   when the target address is in an unknown instruction set.  The address 
+   of function to be called is loaded into a register and then one of these
+   labels is called via a BL instruction.  This puts the return address 
+   into the link register with the bottom bit set, and the code here 
+   switches to the correct mode before executing the function.  Unfortunately
+   the target code cannot be relied upon to return via a BX instruction, so
+   instead we have to store the resturn address on the stack and allow the
+   called function to return here instead.  Upon return we recover the real
+   return address and use a BX to get back to Thumb mode.
+
+   There are three variations of this code.  The first,
+   _interwork_call_via_rN(), will push the return address onto the
+   stack and pop it in _arm_return().  It should only be used if all
+   arguments are passed in registers.
+
+   The second, _interwork_r7_call_via_rN(), instead stores the return
+   address at [r7, #-4].  It is the caller's responsibility to ensure
+   that this address is valid and contains no useful data.
+
+   The third, _interwork_r11_call_via_rN(), works in the same way but
+   uses r11 instead of r7.  It is useful if the caller does not really
+   need a frame pointer.  */
+	
+	.text
+	.align 0
+
+	.code   32
+	.globl _arm_return
+LSYM(Lstart_arm_return):
+	cfi_start	LSYM(Lstart_arm_return) LSYM(Lend_arm_return)
+	cfi_push	0, 0xe, -0x8, 0x8
+	nop	@ This nop is for the benefit of debuggers, so that
+		@ backtraces will use the correct unwind information.
+_arm_return:
+	RETLDM	unwind=LSYM(Lstart_arm_return)
+	cfi_end	LSYM(Lend_arm_return)
+
+	.globl _arm_return_r7
+_arm_return_r7:
+	ldr	lr, [r7, #-4]
+	bx	lr
+
+	.globl _arm_return_r11
+_arm_return_r11:
+	ldr	lr, [r11, #-4]
+	bx	lr
+
+.macro interwork_with_frame frame, register, name, return
+	.code	16
+
+	THUMB_FUNC_START \name
+
+	bx	pc
+	nop
+
+	.code	32
+	tst	\register, #1
+	streq	lr, [\frame, #-4]
+	adreq	lr, _arm_return_\frame
+	bx	\register
+
+	SIZE	(\name)
+.endm
+
+.macro interwork register
+	.code	16
+
+	THUMB_FUNC_START _interwork_call_via_\register
+
+	bx	pc
+	nop
+
+	.code	32
+	.globl LSYM(Lchange_\register)
+LSYM(Lchange_\register):
+	tst	\register, #1
+	streq	lr, [sp, #-8]!
+	adreq	lr, _arm_return
+	bx	\register
+
+	SIZE	(_interwork_call_via_\register)
+
+	interwork_with_frame r7,\register,_interwork_r7_call_via_\register
+	interwork_with_frame r11,\register,_interwork_r11_call_via_\register
+.endm
+	
+	interwork r0
+	interwork r1
+	interwork r2
+	interwork r3
+	interwork r4
+	interwork r5
+	interwork r6
+	interwork r7
+	interwork r8
+	interwork r9
+	interwork sl
+	interwork fp
+	interwork ip
+	interwork sp
+	
+	/* The LR case has to be handled a little differently...  */
+	.code 16
+
+	THUMB_FUNC_START _interwork_call_via_lr
+
+	bx 	pc
+	nop
+	
+	.code 32
+	.globl .Lchange_lr
+.Lchange_lr:
+	tst	lr, #1
+	stmeqdb	r13!, {lr, pc}
+	mov	ip, lr
+	adreq	lr, _arm_return
+	bx	ip
+	
+	SIZE	(_interwork_call_via_lr)
+	
+#endif /* L_interwork_call_via_rX */
+#endif /* !__thumb2__ */
+
+/* Functions to support compact pic switch tables in thumb1 state.
+   All these routines take an index into the table in r0.  The
+   table is at LR & ~1 (but this must be rounded up in the case
+   of 32-bit entires).  They are only permitted to clobber r12
+   and r14 and r0 must be preserved on exit.  */
+#ifdef L_thumb1_case_sqi
+	
+	.text
+	.align 0
+        .force_thumb
+	.syntax unified
+	THUMB_FUNC_START __gnu_thumb1_case_sqi
+	push	{r1}
+	mov	r1, lr
+	lsrs	r1, r1, #1
+	lsls	r1, r1, #1
+	ldrsb	r1, [r1, r0]
+	lsls	r1, r1, #1
+	add	lr, lr, r1
+	pop	{r1}
+	bx	lr
+	SIZE (__gnu_thumb1_case_sqi)
+#endif
+
+#ifdef L_thumb1_case_uqi
+	
+	.text
+	.align 0
+        .force_thumb
+	.syntax unified
+	THUMB_FUNC_START __gnu_thumb1_case_uqi
+	push	{r1}
+	mov	r1, lr
+	lsrs	r1, r1, #1
+	lsls	r1, r1, #1
+	ldrb	r1, [r1, r0]
+	lsls	r1, r1, #1
+	add	lr, lr, r1
+	pop	{r1}
+	bx	lr
+	SIZE (__gnu_thumb1_case_uqi)
+#endif
+
+#ifdef L_thumb1_case_shi
+	
+	.text
+	.align 0
+        .force_thumb
+	.syntax unified
+	THUMB_FUNC_START __gnu_thumb1_case_shi
+	push	{r0, r1}
+	mov	r1, lr
+	lsrs	r1, r1, #1
+	lsls	r0, r0, #1
+	lsls	r1, r1, #1
+	ldrsh	r1, [r1, r0]
+	lsls	r1, r1, #1
+	add	lr, lr, r1
+	pop	{r0, r1}
+	bx	lr
+	SIZE (__gnu_thumb1_case_shi)
+#endif
+
+#ifdef L_thumb1_case_uhi
+	
+	.text
+	.align 0
+        .force_thumb
+	.syntax unified
+	THUMB_FUNC_START __gnu_thumb1_case_uhi
+	push	{r0, r1}
+	mov	r1, lr
+	lsrs	r1, r1, #1
+	lsls	r0, r0, #1
+	lsls	r1, r1, #1
+	ldrh	r1, [r1, r0]
+	lsls	r1, r1, #1
+	add	lr, lr, r1
+	pop	{r0, r1}
+	bx	lr
+	SIZE (__gnu_thumb1_case_uhi)
+#endif
+
+#ifdef L_thumb1_case_si
+	
+	.text
+	.align 0
+        .force_thumb
+	.syntax unified
+	THUMB_FUNC_START __gnu_thumb1_case_si
+	push	{r0, r1}
+	mov	r1, lr
+	adds.n	r1, r1, #2	/* Align to word.  */
+	lsrs	r1, r1, #2
+	lsls	r0, r0, #2
+	lsls	r1, r1, #2
+	ldr	r0, [r1, r0]
+	adds	r0, r0, r1
+	mov	lr, r0
+	pop	{r0, r1}
+	mov	pc, lr		/* We know we were called from thumb code.  */
+	SIZE (__gnu_thumb1_case_si)
+#endif
+
+#endif /* Arch supports thumb.  */
+
+#ifndef __symbian__
+#ifndef __ARM_ARCH_6M__
+#include "ieee754-df.S"
+#include "ieee754-sf.S"
+#include "bpabi.S"
+#else /* __ARM_ARCH_6M__ */
+#include "bpabi-v6m.S"
+#endif /* __ARM_ARCH_6M__ */
+#endif /* !__symbian__ */
diff --git a/gcc-4.9/libgcc/config/arm/libgcc-bpabi.ver b/gcc-4.9/libgcc/config/arm/libgcc-bpabi.ver
new file mode 100644
index 000000000..852359f8d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/libgcc-bpabi.ver
@@ -0,0 +1,108 @@
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_3.5 {
+  # BPABI symbols
+  __aeabi_cdcmpeq
+  __aeabi_cdcmple
+  __aeabi_cdrcmple
+  __aeabi_cfcmpeq
+  __aeabi_cfcmple
+  __aeabi_cfrcmple
+  __aeabi_d2f
+  __aeabi_d2iz
+  __aeabi_d2lz
+  __aeabi_d2uiz
+  __aeabi_d2ulz
+  __aeabi_dadd
+  __aeabi_dcmpeq
+  __aeabi_dcmpge
+  __aeabi_dcmpgt
+  __aeabi_dcmple
+  __aeabi_dcmplt
+  __aeabi_dcmpun
+  __aeabi_ddiv
+  __aeabi_dmul
+  __aeabi_dneg
+  __aeabi_drsub
+  __aeabi_dsub
+  __aeabi_f2d
+  __aeabi_f2iz
+  __aeabi_f2lz
+  __aeabi_f2uiz
+  __aeabi_f2ulz
+  __aeabi_fadd
+  __aeabi_fcmpeq
+  __aeabi_fcmpge
+  __aeabi_fcmpgt
+  __aeabi_fcmple
+  __aeabi_fcmplt
+  __aeabi_fcmpun
+  __aeabi_fdiv
+  __aeabi_fmul
+  __aeabi_fneg
+  __aeabi_frsub
+  __aeabi_fsub
+  __aeabi_i2d
+  __aeabi_i2f
+  __aeabi_idiv
+  __aeabi_idiv0
+  __aeabi_idivmod
+  __aeabi_l2d
+  __aeabi_l2f
+  __aeabi_lasr
+  __aeabi_lcmp
+  __aeabi_ldiv0
+  __aeabi_ldivmod
+  __aeabi_llsl
+  __aeabi_llsr
+  __aeabi_lmul
+  __aeabi_ui2d
+  __aeabi_ui2f
+  __aeabi_uidiv
+  __aeabi_uidivmod
+  __aeabi_uldivmod
+  __aeabi_ulcmp
+  __aeabi_ul2d
+  __aeabi_ul2f
+  __aeabi_uread4
+  __aeabi_uread8
+  __aeabi_uwrite4
+  __aeabi_uwrite8
+
+  # Exception-Handling
+  # \S 7.5
+  _Unwind_Complete
+  _Unwind_VRS_Get
+  _Unwind_VRS_Set
+  _Unwind_VRS_Pop
+  # \S 9.2
+  __aeabi_unwind_cpp_pr0
+  __aeabi_unwind_cpp_pr1
+  __aeabi_unwind_cpp_pr2
+  # The libstdc++ exception-handling personality routine uses this 
+  # GNU-specific entry point.
+  __gnu_unwind_frame
+}
+
+%exclude {
+  _Unwind_Backtrace
+}
+GCC_4.3.0 {
+  _Unwind_Backtrace
+}
diff --git a/gcc-4.9/libgcc/config/arm/libunwind.S b/gcc-4.9/libgcc/config/arm/libunwind.S
new file mode 100644
index 000000000..94e8c9165
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/libunwind.S
@@ -0,0 +1,362 @@
+/* Support functions for the unwinder.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by Paul Brook
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* An executable stack is *not* required for these functions.  */
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+	/* Tag_ABI_align_needed: This code does not require 8-byte
+	   alignment from the caller.  */
+	/* .eabi_attribute 24, 0  -- default setting.  */
+	/* Tag_ABI_align_preserved: This code preserves 8-byte
+	   alignment in any callee.  */
+	.eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
+
+#ifndef __symbian__
+
+#include "lib1funcs.S"
+
+.macro UNPREFIX name
+	.global SYM (\name)
+	EQUIV SYM (\name), SYM (__\name)
+.endm
+
+#if (__ARM_ARCH__ == 4)
+/* Some coprocessors require armv5.  We know this code will never be run on
+   other cpus.  Tell gas to allow armv5, but only mark the objects as armv4.
+ */
+.arch armv5t
+#ifdef __ARM_ARCH_4T__
+.object_arch armv4t
+#else
+.object_arch armv4
+#endif
+#endif
+
+#ifdef __ARM_ARCH_6M__
+
+/* r0 points to a 16-word block.  Upload these values to the actual core
+   state.  */
+FUNC_START restore_core_regs
+	mov r1, r0
+	add r1, r1, #52
+	ldmia r1!, {r3, r4, r5}
+	sub r3, r3, #4
+	mov ip, r3
+	str r5, [r3]
+	mov lr, r4
+	/* Restore r8-r11.  */
+	mov r1, r0
+	add r1, r1, #32
+	ldmia r1!, {r2, r3, r4, r5}
+	mov r8, r2
+	mov r9, r3
+	mov sl, r4
+	mov fp, r5
+	mov r1, r0
+	add r1, r1, #8
+	ldmia r1!, {r2, r3, r4, r5, r6, r7}
+	ldr r1, [r0, #4]
+	ldr r0, [r0]
+	mov sp, ip
+	pop {pc}
+	FUNC_END restore_core_regs
+	UNPREFIX restore_core_regs
+
+/* ARMV6M does not have coprocessors, so these should never be used.  */
+FUNC_START gnu_Unwind_Restore_VFP
+	RET
+
+/* Store VFR regsters d0-d15 to the address in r0.  */
+FUNC_START gnu_Unwind_Save_VFP
+	RET
+
+/* Load VFP registers d0-d15 from the address in r0.
+   Use this to load from FSTMD format.  */
+FUNC_START gnu_Unwind_Restore_VFP_D
+	RET
+
+/* Store VFP registers d0-d15 to the address in r0.
+   Use this to store in FLDMD format.  */
+FUNC_START gnu_Unwind_Save_VFP_D
+	RET
+
+/* Load VFP registers d16-d31 from the address in r0.
+   Use this to load from FSTMD (=VSTM) format.  Needs VFPv3.  */
+FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
+	RET
+
+/* Store VFP registers d16-d31 to the address in r0.
+   Use this to store in FLDMD (=VLDM) format.  Needs VFPv3.  */
+FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
+	RET
+
+FUNC_START gnu_Unwind_Restore_WMMXD
+	RET
+
+FUNC_START gnu_Unwind_Save_WMMXD
+	RET
+
+FUNC_START gnu_Unwind_Restore_WMMXC
+	RET
+
+FUNC_START gnu_Unwind_Save_WMMXC
+	RET
+
+.macro  UNWIND_WRAPPER name nargs
+	FUNC_START \name
+	/* Create a phase2_vrs structure.  */
+	/* Save r0 in the PC slot so we can use it as a scratch register.  */
+	push {r0}
+	add r0, sp, #4
+	push {r0, lr} /* Push original SP and LR.  */
+	/* Make space for r8-r12.  */
+	sub sp, sp, #20
+	/* Save low registers.  */
+	push {r0, r1, r2, r3, r4, r5, r6, r7}
+	/* Save high registers.  */
+	add r0, sp, #32
+	mov r1, r8
+	mov r2, r9
+	mov r3, sl
+	mov r4, fp
+	mov r5, ip
+	stmia r0!, {r1, r2, r3, r4, r5}
+	/* Restore original low register values.  */
+	add r0, sp, #4
+	ldmia r0!, {r1, r2, r3, r4, r5}
+	/* Restore orginial r0.  */
+	ldr r0, [sp, #60]
+	str r0, [sp]
+	/* Demand-save flags, plus an extra word for alignment.  */
+	mov r3, #0
+	push {r2, r3}
+	/* Point r1 at the block.  Pass r[0..nargs) unchanged.  */
+	add r\nargs, sp, #4
+
+	bl SYM (__gnu\name)
+
+	ldr r3, [sp, #64]
+	add sp, sp, #72
+	bx r3
+
+	FUNC_END \name
+	UNPREFIX \name
+.endm
+
+#else /* !__ARM_ARCH_6M__ */
+
+/* r0 points to a 16-word block.  Upload these values to the actual core
+   state.  */
+ARM_FUNC_START restore_core_regs
+	/* We must use sp as the base register when restoring sp.  Push the
+	   last 3 registers onto the top of the current stack to achieve
+	   this.  */
+	add r1, r0, #52
+	ldmia r1, {r3, r4, r5}  /* {sp, lr, pc}.  */
+#if defined(__thumb2__)
+	/* Thumb-2 doesn't allow sp in a load-multiple instruction, so push
+	   the target address onto the target stack.  This is safe as
+	   we're always returning to somewhere further up the call stack.  */
+	mov ip, r3
+	mov lr, r4
+	str r5, [ip, #-4]!
+#elif defined(__INTERWORKING__)
+	/* Restore pc into ip.  */
+	mov r2, r5
+	stmfd sp!, {r2, r3, r4}
+#else
+	stmfd sp!, {r3, r4, r5}
+#endif
+	/* Don't bother restoring ip.  */
+	ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp}
+#if defined(__thumb2__)
+	/* Pop the return address off the target stack.  */
+	mov sp, ip
+	pop {pc}
+#elif defined(__INTERWORKING__)
+	/* Pop the three registers we pushed earlier.  */
+	ldmfd sp, {ip, sp, lr}
+	bx ip
+#else
+	ldmfd sp, {sp, lr, pc}
+#endif
+	FUNC_END restore_core_regs
+	UNPREFIX restore_core_regs
+
+/* Load VFP registers d0-d15 from the address in r0.
+   Use this to load from FSTMX format.  */
+ARM_FUNC_START gnu_Unwind_Restore_VFP
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on soft-float targets.  */
+	ldc   p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
+	RET
+
+/* Store VFP registers d0-d15 to the address in r0.
+   Use this to store in FSTMX format.  */
+ARM_FUNC_START gnu_Unwind_Save_VFP
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on soft-float targets.  */
+	stc   p11,cr0,[r0],{0x21} /* fstmiax r0, {d0-d15} */
+	RET
+
+/* Load VFP registers d0-d15 from the address in r0.
+   Use this to load from FSTMD format.  */
+ARM_FUNC_START gnu_Unwind_Restore_VFP_D
+	ldc   p11,cr0,[r0],{0x20} /* fldmiad r0, {d0-d15} */
+	RET
+
+/* Store VFP registers d0-d15 to the address in r0.
+   Use this to store in FLDMD format.  */
+ARM_FUNC_START gnu_Unwind_Save_VFP_D
+	stc   p11,cr0,[r0],{0x20} /* fstmiad r0, {d0-d15} */
+	RET
+
+/* Load VFP registers d16-d31 from the address in r0.
+   Use this to load from FSTMD (=VSTM) format.  Needs VFPv3.  */
+ARM_FUNC_START gnu_Unwind_Restore_VFP_D_16_to_31
+	ldcl  p11,cr0,[r0],{0x20} /* vldm r0, {d16-d31} */
+	RET
+
+/* Store VFP registers d16-d31 to the address in r0.
+   Use this to store in FLDMD (=VLDM) format.  Needs VFPv3.  */
+ARM_FUNC_START gnu_Unwind_Save_VFP_D_16_to_31
+	stcl  p11,cr0,[r0],{0x20} /* vstm r0, {d16-d31} */
+	RET
+
+ARM_FUNC_START gnu_Unwind_Restore_WMMXD
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on non-iWMMXt targets.  */
+	ldcl  p1, cr0, [r0], #8 /* wldrd wr0, [r0], #8 */
+	ldcl  p1, cr1, [r0], #8 /* wldrd wr1, [r0], #8 */
+	ldcl  p1, cr2, [r0], #8 /* wldrd wr2, [r0], #8 */
+	ldcl  p1, cr3, [r0], #8 /* wldrd wr3, [r0], #8 */
+	ldcl  p1, cr4, [r0], #8 /* wldrd wr4, [r0], #8 */
+	ldcl  p1, cr5, [r0], #8 /* wldrd wr5, [r0], #8 */
+	ldcl  p1, cr6, [r0], #8 /* wldrd wr6, [r0], #8 */
+	ldcl  p1, cr7, [r0], #8 /* wldrd wr7, [r0], #8 */
+	ldcl  p1, cr8, [r0], #8 /* wldrd wr8, [r0], #8 */
+	ldcl  p1, cr9, [r0], #8 /* wldrd wr9, [r0], #8 */
+	ldcl  p1, cr10, [r0], #8 /* wldrd wr10, [r0], #8 */
+	ldcl  p1, cr11, [r0], #8 /* wldrd wr11, [r0], #8 */
+	ldcl  p1, cr12, [r0], #8 /* wldrd wr12, [r0], #8 */
+	ldcl  p1, cr13, [r0], #8 /* wldrd wr13, [r0], #8 */
+	ldcl  p1, cr14, [r0], #8 /* wldrd wr14, [r0], #8 */
+	ldcl  p1, cr15, [r0], #8 /* wldrd wr15, [r0], #8 */
+	RET
+
+ARM_FUNC_START gnu_Unwind_Save_WMMXD
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on non-iWMMXt targets.  */
+	stcl  p1, cr0, [r0], #8 /* wstrd wr0, [r0], #8 */
+	stcl  p1, cr1, [r0], #8 /* wstrd wr1, [r0], #8 */
+	stcl  p1, cr2, [r0], #8 /* wstrd wr2, [r0], #8 */
+	stcl  p1, cr3, [r0], #8 /* wstrd wr3, [r0], #8 */
+	stcl  p1, cr4, [r0], #8 /* wstrd wr4, [r0], #8 */
+	stcl  p1, cr5, [r0], #8 /* wstrd wr5, [r0], #8 */
+	stcl  p1, cr6, [r0], #8 /* wstrd wr6, [r0], #8 */
+	stcl  p1, cr7, [r0], #8 /* wstrd wr7, [r0], #8 */
+	stcl  p1, cr8, [r0], #8 /* wstrd wr8, [r0], #8 */
+	stcl  p1, cr9, [r0], #8 /* wstrd wr9, [r0], #8 */
+	stcl  p1, cr10, [r0], #8 /* wstrd wr10, [r0], #8 */
+	stcl  p1, cr11, [r0], #8 /* wstrd wr11, [r0], #8 */
+	stcl  p1, cr12, [r0], #8 /* wstrd wr12, [r0], #8 */
+	stcl  p1, cr13, [r0], #8 /* wstrd wr13, [r0], #8 */
+	stcl  p1, cr14, [r0], #8 /* wstrd wr14, [r0], #8 */
+	stcl  p1, cr15, [r0], #8 /* wstrd wr15, [r0], #8 */
+	RET
+
+ARM_FUNC_START gnu_Unwind_Restore_WMMXC
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on non-iWMMXt targets.  */
+	ldc2  p1, cr8, [r0], #4 /* wldrw wcgr0, [r0], #4 */
+	ldc2  p1, cr9, [r0], #4 /* wldrw wcgr1, [r0], #4 */
+	ldc2  p1, cr10, [r0], #4 /* wldrw wcgr2, [r0], #4 */
+	ldc2  p1, cr11, [r0], #4 /* wldrw wcgr3, [r0], #4 */
+	RET
+
+ARM_FUNC_START gnu_Unwind_Save_WMMXC
+	/* Use the generic coprocessor form so that gas doesn't complain
+	   on non-iWMMXt targets.  */
+	stc2  p1, cr8, [r0], #4 /* wstrw wcgr0, [r0], #4 */
+	stc2  p1, cr9, [r0], #4 /* wstrw wcgr1, [r0], #4 */
+	stc2  p1, cr10, [r0], #4 /* wstrw wcgr2, [r0], #4 */
+	stc2  p1, cr11, [r0], #4 /* wstrw wcgr3, [r0], #4 */
+	RET
+
+/* Wrappers to save core registers, then call the real routine.   */
+
+.macro  UNWIND_WRAPPER name nargs
+	ARM_FUNC_START \name
+	/* Create a phase2_vrs structure.  */
+	/* Split reg push in two to ensure the correct value for sp.  */
+#if defined(__thumb2__)
+	mov ip, sp
+	push {lr} /* PC is ignored.  */
+	push {ip, lr} /* Push original SP and LR.  */
+#else
+	stmfd sp!, {sp, lr, pc}
+#endif
+	stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip}
+	
+	/* Demand-save flags, plus an extra word for alignment.  */
+	mov r3, #0
+	stmfd sp!, {r2, r3}
+
+	/* Point r1 at the block.  Pass r[0..nargs) unchanged.  */
+	add r\nargs, sp, #4
+#if defined(__thumb__) && !defined(__thumb2__)
+	/* Switch back to thumb mode to avoid interworking hassle.  */
+	adr ip, .L1_\name
+	orr ip, ip, #1
+	bx ip
+	.thumb
+.L1_\name:
+	bl SYM (__gnu\name) __PLT__
+	ldr r3, [sp, #64]
+	add sp, #72
+	bx r3
+#else
+	bl SYM (__gnu\name) __PLT__
+	ldr lr, [sp, #64]
+	add sp, sp, #72
+	RET
+#endif
+	FUNC_END \name
+	UNPREFIX \name
+.endm
+
+#endif /* !__ARM_ARCH_6M__ */
+
+UNWIND_WRAPPER _Unwind_RaiseException 1
+UNWIND_WRAPPER _Unwind_Resume 1
+UNWIND_WRAPPER _Unwind_Resume_or_Rethrow 1
+UNWIND_WRAPPER _Unwind_ForcedUnwind 3
+UNWIND_WRAPPER _Unwind_Backtrace 2
+
+#endif  /* ndef __symbian__ */
diff --git a/gcc-4.9/libgcc/config/arm/linux-atomic-64bit.c b/gcc-4.9/libgcc/config/arm/linux-atomic-64bit.c
new file mode 100644
index 000000000..5b8c6e2ff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/linux-atomic-64bit.c
@@ -0,0 +1,166 @@
+/* 64bit Linux-specific atomic operations for ARM EABI.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Based on linux-atomic.c
+
+   64 bit additions david.gilbert@linaro.org
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* 64bit helper functions for atomic operations; the compiler will
+   call these when the code is compiled for a CPU without ldrexd/strexd.
+   (If the CPU had those then the compiler inlines the operation).
+
+   These helpers require a kernel helper that's only present on newer
+   kernels; we check for that in an init section and bail out rather
+   unceremoneously.  */
+
+extern unsigned int __write (int fd, const void *buf, unsigned int count);
+extern void abort (void);
+
+/* Kernel helper for compare-and-exchange.  */
+typedef int (__kernel_cmpxchg64_t) (const long long* oldval,
+					const long long* newval,
+					long long *ptr);
+#define __kernel_cmpxchg64 (*(__kernel_cmpxchg64_t *) 0xffff0f60)
+
+/* Kernel helper page version number.  */
+#define __kernel_helper_version (*(unsigned int *)0xffff0ffc)
+
+/* Check that the kernel has a new enough version at load.  */
+static void __check_for_sync8_kernelhelper (void)
+{
+  if (__kernel_helper_version < 5)
+    {
+      const char err[] = "A newer kernel is required to run this binary. "
+				"(__kernel_cmpxchg64 helper)\n";
+      /* At this point we need a way to crash with some information
+	 for the user - I'm not sure I can rely on much else being
+	 available at this point, so do the same as generic-morestack.c
+	 write () and abort ().  */
+      __write (2 /* stderr.  */, err, sizeof (err));
+      abort ();
+    }
+};
+
+static void (*__sync8_kernelhelper_inithook[]) (void)
+		__attribute__ ((used, section (".init_array"))) = {
+  &__check_for_sync8_kernelhelper
+};
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#define FETCH_AND_OP_WORD64(OP, PFX_OP, INF_OP)			\
+  long long HIDDEN						\
+  __sync_fetch_and_##OP##_8 (long long *ptr, long long val)	\
+  {								\
+    int failure;						\
+    long long tmp,tmp2;						\
+								\
+    do {							\
+      tmp = *ptr;						\
+      tmp2 = PFX_OP (tmp INF_OP val);				\
+      failure = __kernel_cmpxchg64 (&tmp, &tmp2, ptr);		\
+    } while (failure != 0);					\
+								\
+    return tmp;							\
+  }
+
+FETCH_AND_OP_WORD64 (add,   , +)
+FETCH_AND_OP_WORD64 (sub,   , -)
+FETCH_AND_OP_WORD64 (or,    , |)
+FETCH_AND_OP_WORD64 (and,   , &)
+FETCH_AND_OP_WORD64 (xor,   , ^)
+FETCH_AND_OP_WORD64 (nand, ~, &)
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for
+   subword-sized quantities.  */
+
+#define OP_AND_FETCH_WORD64(OP, PFX_OP, INF_OP)			\
+  long long HIDDEN						\
+  __sync_##OP##_and_fetch_8 (long long *ptr, long long val)	\
+  {								\
+    int failure;						\
+    long long tmp,tmp2;						\
+								\
+    do {							\
+      tmp = *ptr;						\
+      tmp2 = PFX_OP (tmp INF_OP val);				\
+      failure = __kernel_cmpxchg64 (&tmp, &tmp2, ptr);		\
+    } while (failure != 0);					\
+								\
+    return tmp2;						\
+  }
+
+OP_AND_FETCH_WORD64 (add,   , +)
+OP_AND_FETCH_WORD64 (sub,   , -)
+OP_AND_FETCH_WORD64 (or,    , |)
+OP_AND_FETCH_WORD64 (and,   , &)
+OP_AND_FETCH_WORD64 (xor,   , ^)
+OP_AND_FETCH_WORD64 (nand, ~, &)
+
+long long HIDDEN
+__sync_val_compare_and_swap_8 (long long *ptr, long long oldval,
+				long long newval)
+{
+  int failure;
+  long long actual_oldval;
+
+  while (1)
+    {
+      actual_oldval = *ptr;
+
+      if (__builtin_expect (oldval != actual_oldval, 0))
+	return actual_oldval;
+
+      failure = __kernel_cmpxchg64 (&actual_oldval, &newval, ptr);
+
+      if (__builtin_expect (!failure, 1))
+	return oldval;
+    }
+}
+
+typedef unsigned char bool;
+
+bool HIDDEN
+__sync_bool_compare_and_swap_8 (long long *ptr, long long oldval,
+				 long long newval)
+{
+  int failure = __kernel_cmpxchg64 (&oldval, &newval, ptr);
+  return (failure == 0);
+}
+
+long long HIDDEN
+__sync_lock_test_and_set_8 (long long *ptr, long long val)
+{
+  int failure;
+  long long oldval;
+
+  do {
+    oldval = *ptr;
+    failure = __kernel_cmpxchg64 (&oldval, &val, ptr);
+  } while (failure != 0);
+
+  return oldval;
+}
diff --git a/gcc-4.9/libgcc/config/arm/linux-atomic.c b/gcc-4.9/libgcc/config/arm/linux-atomic.c
new file mode 100644
index 000000000..e2817058d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/linux-atomic.c
@@ -0,0 +1,279 @@
+/* Linux-specific atomic operations for ARM EABI.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Kernel helper for compare-and-exchange.  */
+typedef int (__kernel_cmpxchg_t) (int oldval, int newval, int *ptr);
+#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
+
+/* Kernel helper for memory barrier.  */
+typedef void (__kernel_dmb_t) (void);
+#define __kernel_dmb (*(__kernel_dmb_t *) 0xffff0fa0)
+
+/* Note: we implement byte, short and int versions of atomic operations using
+   the above kernel helpers; see linux-atomic-64bit.c for "long long" (64-bit)
+   operations.  */
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#ifdef __ARMEL__
+#define INVERT_MASK_1 0
+#define INVERT_MASK_2 0
+#else
+#define INVERT_MASK_1 24
+#define INVERT_MASK_2 16
+#endif
+
+#define MASK_1 0xffu
+#define MASK_2 0xffffu
+
+#define FETCH_AND_OP_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_fetch_and_##OP##_4 (int *ptr, int val)				\
+  {									\
+    int failure, tmp;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return tmp;								\
+  }
+
+FETCH_AND_OP_WORD (add,   , +)
+FETCH_AND_OP_WORD (sub,   , -)
+FETCH_AND_OP_WORD (or,    , |)
+FETCH_AND_OP_WORD (and,   , &)
+FETCH_AND_OP_WORD (xor,   , ^)
+FETCH_AND_OP_WORD (nand, ~, &)
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for
+   subword-sized quantities.  */
+
+#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN)	\
+  TYPE HIDDEN								\
+  NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE val)			\
+  {									\
+    int *wordptr = (int *) ((unsigned int) ptr & ~3);			\
+    unsigned int mask, shift, oldval, newval;				\
+    int failure;							\
+									\
+    shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = ((PFX_OP (((oldval & mask) >> shift)			\
+			 INF_OP (unsigned int) val)) << shift) & mask;	\
+      newval |= oldval & ~mask;						\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (RETURN & mask) >> shift;					\
+  }
+
+SUBWORD_SYNC_OP (add,   , +, short, 2, oldval)
+SUBWORD_SYNC_OP (sub,   , -, short, 2, oldval)
+SUBWORD_SYNC_OP (or,    , |, short, 2, oldval)
+SUBWORD_SYNC_OP (and,   , &, short, 2, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, short, 2, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, short, 2, oldval)
+
+SUBWORD_SYNC_OP (add,   , +, signed char, 1, oldval)
+SUBWORD_SYNC_OP (sub,   , -, signed char, 1, oldval)
+SUBWORD_SYNC_OP (or,    , |, signed char, 1, oldval)
+SUBWORD_SYNC_OP (and,   , &, signed char, 1, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, signed char, 1, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, oldval)
+
+#define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_##OP##_and_fetch_4 (int *ptr, int val)				\
+  {									\
+    int tmp, failure;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return PFX_OP (tmp INF_OP val);					\
+  }
+
+OP_AND_FETCH_WORD (add,   , +)
+OP_AND_FETCH_WORD (sub,   , -)
+OP_AND_FETCH_WORD (or,    , |)
+OP_AND_FETCH_WORD (and,   , &)
+OP_AND_FETCH_WORD (xor,   , ^)
+OP_AND_FETCH_WORD (nand, ~, &)
+
+SUBWORD_SYNC_OP (add,   , +, short, 2, newval)
+SUBWORD_SYNC_OP (sub,   , -, short, 2, newval)
+SUBWORD_SYNC_OP (or,    , |, short, 2, newval)
+SUBWORD_SYNC_OP (and,   , &, short, 2, newval)
+SUBWORD_SYNC_OP (xor,   , ^, short, 2, newval)
+SUBWORD_SYNC_OP (nand, ~, &, short, 2, newval)
+
+SUBWORD_SYNC_OP (add,   , +, signed char, 1, newval)
+SUBWORD_SYNC_OP (sub,   , -, signed char, 1, newval)
+SUBWORD_SYNC_OP (or,    , |, signed char, 1, newval)
+SUBWORD_SYNC_OP (and,   , &, signed char, 1, newval)
+SUBWORD_SYNC_OP (xor,   , ^, signed char, 1, newval)
+SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, newval)
+
+int HIDDEN
+__sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int actual_oldval, fail;
+    
+  while (1)
+    {
+      actual_oldval = *ptr;
+
+      if (__builtin_expect (oldval != actual_oldval, 0))
+	return actual_oldval;
+
+      fail = __kernel_cmpxchg (actual_oldval, newval, ptr);
+  
+      if (__builtin_expect (!fail, 1))
+        return oldval;
+    }
+}
+
+#define SUBWORD_VAL_CAS(TYPE, WIDTH)					\
+  TYPE HIDDEN								\
+  __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+				       TYPE newval)			\
+  {									\
+    int *wordptr = (int *)((unsigned int) ptr & ~3), fail;		\
+    unsigned int mask, shift, actual_oldval, actual_newval;		\
+									\
+    shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    while (1)								\
+      {									\
+	actual_oldval = *wordptr;					\
+									\
+	if (__builtin_expect (((actual_oldval & mask) >> shift) !=      \
+                              ((unsigned int) oldval & MASK_##WIDTH), 0)) \
+          return (actual_oldval & mask) >> shift;			\
+									\
+	actual_newval = (actual_oldval & ~mask)				\
+			| (((unsigned int) newval << shift) & mask);	\
+									\
+	fail = __kernel_cmpxchg (actual_oldval, actual_newval,		\
+				 wordptr);				\
+									\
+      if (__builtin_expect (!fail, 1))                                  \
+          return oldval;						\
+      }									\
+  }
+
+SUBWORD_VAL_CAS (short,       2)
+SUBWORD_VAL_CAS (signed char, 1)
+
+typedef unsigned char bool;
+
+bool HIDDEN
+__sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int failure = __kernel_cmpxchg (oldval, newval, ptr);
+  return (failure == 0);
+}
+
+#define SUBWORD_BOOL_CAS(TYPE, WIDTH)					\
+  bool HIDDEN								\
+  __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+					TYPE newval)			\
+  {									\
+    TYPE actual_oldval							\
+      = __sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval);	\
+    return (oldval == actual_oldval);					\
+  }
+
+SUBWORD_BOOL_CAS (short,       2)
+SUBWORD_BOOL_CAS (signed char, 1)
+
+void HIDDEN
+__sync_synchronize (void)
+{
+  __kernel_dmb ();
+}
+
+int HIDDEN
+__sync_lock_test_and_set_4 (int *ptr, int val)
+{
+  int failure, oldval;
+
+  do {
+    oldval = *ptr;
+    failure = __kernel_cmpxchg (oldval, val, ptr);
+  } while (failure != 0);
+
+  return oldval;
+}
+
+#define SUBWORD_TEST_AND_SET(TYPE, WIDTH)				\
+  TYPE HIDDEN								\
+  __sync_lock_test_and_set_##WIDTH (TYPE *ptr, TYPE val)		\
+  {									\
+    int failure;							\
+    unsigned int oldval, newval, shift, mask;				\
+    int *wordptr = (int *) ((unsigned int) ptr & ~3);			\
+									\
+    shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = (oldval & ~mask)						\
+	       | (((unsigned int) val << shift) & mask);		\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (oldval & mask) >> shift;					\
+  }
+
+SUBWORD_TEST_AND_SET (short,       2)
+SUBWORD_TEST_AND_SET (signed char, 1)
+
+#define SYNC_LOCK_RELEASE(TYPE, WIDTH)					\
+  void HIDDEN								\
+  __sync_lock_release_##WIDTH (TYPE *ptr)				\
+  {									\
+    /* All writes before this point must be seen before we release	\
+       the lock itself.  */						\
+    __kernel_dmb ();							\
+    *ptr = 0;								\
+  }
+
+SYNC_LOCK_RELEASE (long long,   8)
+SYNC_LOCK_RELEASE (int,   4)
+SYNC_LOCK_RELEASE (short, 2)
+SYNC_LOCK_RELEASE (char,  1)
diff --git a/gcc-4.9/libgcc/config/arm/pr-support.c b/gcc-4.9/libgcc/config/arm/pr-support.c
new file mode 100644
index 000000000..b3b773920
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/pr-support.c
@@ -0,0 +1,385 @@
+/* ARM EABI compliant unwinding routines
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributed by Paul Brook
+ 
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "unwind.h"
+
+/* We add a prototype for abort here to avoid creating a dependency on
+   target headers.  */
+extern void abort (void);
+
+typedef struct _ZSt9type_info type_info; /* This names C++ type_info type */
+
+/* Misc constants.  */
+#define R_IP    12
+#define R_SP    13
+#define R_LR    14
+#define R_PC    15
+
+#define uint32_highbit (((_uw) 1) << 31)
+
+void __attribute__((weak)) __cxa_call_unexpected(_Unwind_Control_Block *ucbp);
+
+/* Unwind descriptors.  */
+
+typedef struct
+{
+  _uw16 length;
+  _uw16 offset;
+} EHT16;
+
+typedef struct
+{
+  _uw length;
+  _uw offset;
+} EHT32;
+
+/* Calculate the address encoded by a 31-bit self-relative offset at address
+   P.  Copy of routine in unwind-arm.c.  */
+
+static inline _uw
+selfrel_offset31 (const _uw *p)
+{
+  _uw offset;
+
+  offset = *p;
+  /* Sign extend to 32 bits.  */
+  if (offset & (1 << 30))
+    offset |= 1u << 31;
+
+  return offset + (_uw) p;
+}
+
+
+/* Personality routine helper functions.  */
+
+#define CODE_FINISH (0xb0)
+
+/* Return the next byte of unwinding information, or CODE_FINISH if there is
+   no data remaining.  */
+static inline _uw8
+next_unwind_byte (__gnu_unwind_state * uws)
+{
+  _uw8 b;
+
+  if (uws->bytes_left == 0)
+    {
+      /* Load another word */
+      if (uws->words_left == 0)
+	return CODE_FINISH; /* Nothing left.  */
+      uws->words_left--;
+      uws->data = *(uws->next++);
+      uws->bytes_left = 3;
+    }
+  else
+    uws->bytes_left--;
+
+  /* Extract the most significant byte.  */
+  b = (uws->data >> 24) & 0xff;
+  uws->data <<= 8;
+  return b;
+}
+
+/* Execute the unwinding instructions described by UWS.  */
+_Unwind_Reason_Code
+__gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
+{
+  _uw op;
+  int set_pc;
+  _uw reg;
+
+  set_pc = 0;
+  for (;;)
+    {
+      op = next_unwind_byte (uws);
+      if (op == CODE_FINISH)
+	{
+	  /* If we haven't already set pc then copy it from lr.  */
+	  if (!set_pc)
+	    {
+	      _Unwind_VRS_Get (context, _UVRSC_CORE, R_LR, _UVRSD_UINT32,
+			       &reg);
+	      _Unwind_VRS_Set (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32,
+			       &reg);
+	      set_pc = 1;
+	    }
+	  /* Drop out of the loop.  */
+	  break;
+	}
+      if ((op & 0x80) == 0)
+	{
+	  /* vsp = vsp +- (imm6 << 2 + 4).  */
+	  _uw offset;
+
+	  offset = ((op & 0x3f) << 2) + 4;
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  if (op & 0x40)
+	    reg -= offset;
+	  else
+	    reg += offset;
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+      
+      if ((op & 0xf0) == 0x80)
+	{
+	  op = (op << 8) | next_unwind_byte (uws);
+	  if (op == 0x8000)
+	    {
+	      /* Refuse to unwind.  */
+	      return _URC_FAILURE;
+	    }
+	  /* Pop r4-r15 under mask.  */
+	  op = (op << 4) & 0xfff0;
+	  if (_Unwind_VRS_Pop (context, _UVRSC_CORE, op, _UVRSD_UINT32)
+	      != _UVRSR_OK)
+	    return _URC_FAILURE;
+	  if (op & (1 << R_PC))
+	    set_pc = 1;
+	  continue;
+	}
+      if ((op & 0xf0) == 0x90)
+	{
+	  op &= 0xf;
+	  if (op == 13 || op == 15)
+	    /* Reserved.  */
+	    return _URC_FAILURE;
+	  /* vsp = r[nnnn].  */
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, op, _UVRSD_UINT32, &reg);
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+      if ((op & 0xf0) == 0xa0)
+	{
+	  /* Pop r4-r[4+nnn], [lr].  */
+	  _uw mask;
+	  
+	  mask = (0xff0 >> (7 - (op & 7))) & 0xff0;
+	  if (op & 8)
+	    mask |= (1 << R_LR);
+	  if (_Unwind_VRS_Pop (context, _UVRSC_CORE, mask, _UVRSD_UINT32)
+	      != _UVRSR_OK)
+	    return _URC_FAILURE;
+	  continue;
+	}
+      if ((op & 0xf0) == 0xb0)
+	{
+	  /* op == 0xb0 already handled.  */
+	  if (op == 0xb1)
+	    {
+	      op = next_unwind_byte (uws);
+	      if (op == 0 || ((op & 0xf0) != 0))
+		/* Spare.  */
+		return _URC_FAILURE;
+	      /* Pop r0-r4 under mask.  */
+	      if (_Unwind_VRS_Pop (context, _UVRSC_CORE, op, _UVRSD_UINT32)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  if (op == 0xb2)
+	    {
+	      /* vsp = vsp + 0x204 + (uleb128 << 2).  */
+	      int shift;
+
+	      _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32,
+			       &reg);
+	      op = next_unwind_byte (uws);
+	      shift = 2;
+	      while (op & 0x80)
+		{
+		  reg += ((op & 0x7f) << shift);
+		  shift += 7;
+		  op = next_unwind_byte (uws);
+		}
+	      reg += ((op & 0x7f) << shift) + 0x204;
+	      _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32,
+			       &reg);
+	      continue;
+	    }
+	  if (op == 0xb3)
+	    {
+	      /* Pop VFP registers with fldmx.  */
+	      op = next_unwind_byte (uws);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
+	      if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_VFPX)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  if ((op & 0xfc) == 0xb4)  /* Obsolete FPA.  */
+	    return _URC_FAILURE;
+
+	  /* op & 0xf8 == 0xb8.  */
+	  /* Pop VFP D[8]-D[8+nnn] with fldmx.  */
+	  op = 0x80000 | ((op & 7) + 1);
+	  if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_VFPX)
+	      != _UVRSR_OK)
+	    return _URC_FAILURE;
+	  continue;
+	}
+      if ((op & 0xf0) == 0xc0)
+	{
+	  if (op == 0xc6)
+	    {
+	      /* Pop iWMMXt D registers.  */
+	      op = next_unwind_byte (uws);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
+	      if (_Unwind_VRS_Pop (context, _UVRSC_WMMXD, op, _UVRSD_UINT64)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  if (op == 0xc7)
+	    {
+	      op = next_unwind_byte (uws);
+	      if (op == 0 || (op & 0xf0) != 0)
+		/* Spare.  */
+		return _URC_FAILURE;
+	      /* Pop iWMMXt wCGR{3,2,1,0} under mask.  */
+	      if (_Unwind_VRS_Pop (context, _UVRSC_WMMXC, op, _UVRSD_UINT32)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  if ((op & 0xf8) == 0xc0)
+	    {
+	      /* Pop iWMMXt wR[10]-wR[10+nnn].  */
+	      op = 0xa0000 | ((op & 0xf) + 1);
+	      if (_Unwind_VRS_Pop (context, _UVRSC_WMMXD, op, _UVRSD_UINT64)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  if (op == 0xc8)
+	    {
+              /* Pop VFPv3 registers D[16+ssss]-D[16+ssss+cccc] with vldm.  */
+              op = next_unwind_byte (uws);
+              op = (((op & 0xf0) + 16) << 12) | ((op & 0xf) + 1);
+              if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_DOUBLE)
+                  != _UVRSR_OK)
+                return _URC_FAILURE;
+              continue;
+	    }
+	  if (op == 0xc9)
+	    {
+	      /* Pop VFP registers with fldmd.  */
+	      op = next_unwind_byte (uws);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
+	      if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_DOUBLE)
+		  != _UVRSR_OK)
+		return _URC_FAILURE;
+	      continue;
+	    }
+	  /* Spare.  */
+	  return _URC_FAILURE;
+	}
+      if ((op & 0xf8) == 0xd0)
+	{
+	  /* Pop VFP D[8]-D[8+nnn] with fldmd.  */
+	  op = 0x80000 | ((op & 7) + 1);
+	  if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_DOUBLE)
+	      != _UVRSR_OK)
+	    return _URC_FAILURE;
+	  continue;
+	}
+      /* Spare.  */
+      return _URC_FAILURE;
+    }
+  return _URC_OK;
+}
+
+
+/* Execute the unwinding instructions associated with a frame.  UCBP and
+   CONTEXT are the current exception object and virtual CPU state
+   respectively.  */
+
+_Unwind_Reason_Code
+__gnu_unwind_frame (_Unwind_Control_Block * ucbp, _Unwind_Context * context)
+{
+  _uw *ptr;
+  __gnu_unwind_state uws;
+
+  ptr = (_uw *) ucbp->pr_cache.ehtp;
+  /* Skip over the personality routine address.  */
+  ptr++;
+  /* Setup the unwinder state.  */
+  uws.data = (*ptr) << 8;
+  uws.next = ptr + 1;
+  uws.bytes_left = 3;
+  uws.words_left = ((*ptr) >> 24) & 0xff;
+
+  return __gnu_unwind_execute (context, &uws);
+}
+
+/* Get the _Unwind_Control_Block from an _Unwind_Context.  */
+
+static inline _Unwind_Control_Block *
+unwind_UCB_from_context (_Unwind_Context * context)
+{
+  return (_Unwind_Control_Block *) _Unwind_GetGR (context, R_IP);
+}
+
+/* Get the start address of the function being unwound.  */
+
+_Unwind_Ptr
+_Unwind_GetRegionStart (_Unwind_Context * context)
+{
+  _Unwind_Control_Block *ucbp;
+
+  ucbp = unwind_UCB_from_context (context);
+  return (_Unwind_Ptr) ucbp->pr_cache.fnstart;
+}
+
+/* Find the Language specific exception data.  */
+
+void *
+_Unwind_GetLanguageSpecificData (_Unwind_Context * context)
+{
+  _Unwind_Control_Block *ucbp;
+  _uw *ptr;
+
+  /* Get a pointer to the exception table entry.  */
+  ucbp = unwind_UCB_from_context (context);
+  ptr = (_uw *) ucbp->pr_cache.ehtp;
+  /* Skip the personality routine address.  */
+  ptr++;
+  /* Skip the unwind opcodes.  */
+  ptr += (((*ptr) >> 24) & 0xff) + 1;
+
+  return ptr;
+}
+
+
+/* These two should never be used.  */
+
+_Unwind_Ptr
+_Unwind_GetDataRelBase (_Unwind_Context *context __attribute__ ((unused)))
+{
+  abort ();
+}
+
+_Unwind_Ptr
+_Unwind_GetTextRelBase (_Unwind_Context *context __attribute__ ((unused)))
+{
+  abort ();
+}
diff --git a/gcc-4.9/libgcc/config/arm/sfp-machine.h b/gcc-4.9/libgcc/config/arm/sfp-machine.h
new file mode 100644
index 000000000..4f2b15d7e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/sfp-machine.h
@@ -0,0 +1,110 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+/* According to RTABI, QNAN is only with the most significant bit of the
+   significand set, and all other significand bits zero.  */
+#define _FP_NANFRAC_H		0
+#define _FP_NANFRAC_S		0
+#define _FP_NANFRAC_D		0, 0
+#define _FP_NANFRAC_Q		0, 0, 0, 0
+#define _FP_NANSIGN_H		0
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __ARMEB__
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
+#ifdef __ARM_EABI__
+/* Rename functions to their EABI names.  */
+/* The comparison functions need wrappers for EABI semantics, so
+   leave them unmolested.  */
+#define __negsf2	__aeabi_fneg
+#define __subsf3	__aeabi_fsub
+#define __addsf3	__aeabi_fadd
+#define __floatunsisf	__aeabi_ui2f
+#define __floatsisf	__aeabi_i2f
+#define __floatundisf	__aeabi_ul2f
+#define __floatdisf	__aeabi_l2f
+#define __mulsf3	__aeabi_fmul
+#define __divsf3	__aeabi_fdiv
+#define __unordsf2	__aeabi_fcmpun
+#define __fixsfsi	__aeabi_f2iz
+#define __fixunssfsi	__aeabi_f2uiz
+#define __fixsfdi	__aeabi_f2lz
+#define __fixunssfdi	__aeabi_f2ulz
+#define __floatdisf	__aeabi_l2f
+
+#define __negdf2	__aeabi_dneg
+#define __subdf3	__aeabi_dsub
+#define __adddf3	__aeabi_dadd
+#define __floatunsidf	__aeabi_ui2d
+#define __floatsidf	__aeabi_i2d
+#define __extendsfdf2	__aeabi_f2d
+#define __truncdfsf2	__aeabi_d2f
+#define __floatundidf	__aeabi_ul2d
+#define __floatdidf	__aeabi_l2d
+#define __muldf3	__aeabi_dmul
+#define __divdf3	__aeabi_ddiv
+#define __unorddf2	__aeabi_dcmpun
+#define __fixdfsi	__aeabi_d2iz
+#define __fixunsdfsi	__aeabi_d2uiz
+#define __fixdfdi	__aeabi_d2lz
+#define __fixunsdfdi	__aeabi_d2ulz
+#define __floatdidf	__aeabi_l2d
+#define __extendhfsf2	__gnu_h2f_ieee
+#define __truncsfhf2	__gnu_f2h_ieee
+
+#endif /* __ARM_EABI__ */
diff --git a/gcc-4.9/libgcc/config/arm/symbian-lib.h b/gcc-4.9/libgcc/config/arm/symbian-lib.h
new file mode 100644
index 000000000..274ff26ed
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/symbian-lib.h
@@ -0,0 +1,28 @@
+/* Configuration file for Symbian OS on ARM processors, library renames.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* SymbianOS provides the BPABI routines in a separate library.
+   Therefore, we do not need to define any of them in libgcc.  */
+#undef RENAME_LIBRARY
+#define RENAME_LIBRARY(GCC_NAME, AEABI_NAME) /* empty */
diff --git a/gcc-4.9/libgcc/config/arm/t-arm b/gcc-4.9/libgcc/config/arm/t-arm
new file mode 100644
index 000000000..4e17e99b4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-arm
@@ -0,0 +1,3 @@
+LIB1ASMSRC = arm/lib1funcs.S
+LIB1ASMFUNCS = _thumb1_case_sqi _thumb1_case_uqi _thumb1_case_shi \
+	_thumb1_case_uhi _thumb1_case_si
diff --git a/gcc-4.9/libgcc/config/arm/t-bpabi b/gcc-4.9/libgcc/config/arm/t-bpabi
new file mode 100644
index 000000000..dddddc7c4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-bpabi
@@ -0,0 +1,20 @@
+# Add the bpabi.S functions.
+LIB1ASMFUNCS += _aeabi_lcmp _aeabi_ulcmp _aeabi_ldivmod _aeabi_uldivmod
+
+# Add the BPABI C functions.
+LIB2ADD += $(srcdir)/config/arm/bpabi.c \
+	   $(srcdir)/config/arm/unaligned-funcs.c
+
+LIB2ADD_ST += $(srcdir)/config/arm/fp16.c
+
+LIB2ADDEH = $(srcdir)/config/arm/unwind-arm.c \
+  $(srcdir)/config/arm/libunwind.S \
+  $(srcdir)/config/arm/pr-support.c $(srcdir)/unwind-c.c
+
+# Add the BPABI names.
+SHLIB_MAPFILES += $(srcdir)/config/arm/libgcc-bpabi.ver
+
+# On ARM, specifying -fnon-call-exceptions will needlessly pull in
+# the unwinder in simple programs which use 64-bit division.  Omitting
+# the option is safe.
+LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions
diff --git a/gcc-4.9/libgcc/config/arm/t-elf b/gcc-4.9/libgcc/config/arm/t-elf
new file mode 100644
index 000000000..9e7a3170f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-elf
@@ -0,0 +1,18 @@
+# For most CPUs we have an assembly soft-float implementations.
+# However this is not true for ARMv6M.  Here we want to use the soft-fp C
+# implementation.  The soft-fp code is only build for ARMv6M.  This pulls
+# in the asm implementation for other CPUs.
+LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
+	_call_via_rX _interwork_call_via_rX \
+	_lshrdi3 _ashrdi3 _ashldi3 \
+	_arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
+	_arm_fixdfsi _arm_fixunsdfsi \
+	_arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
+	_arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
+	_arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
+	_clzsi2 _clzdi2 _ctzsi2
+
+# Currently there is a bug somewhere in GCC's alias analysis
+# or scheduling code that is breaking _fpmul_parts in fp-bit.c.
+# Disabling function inlining is a workaround for this problem.
+HOST_LIBGCC2_CFLAGS += -fno-inline
diff --git a/gcc-4.9/libgcc/config/arm/t-linux b/gcc-4.9/libgcc/config/arm/t-linux
new file mode 100644
index 000000000..3d520deca
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-linux
@@ -0,0 +1,7 @@
+LIB1ASMSRC = arm/lib1funcs.S
+LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \
+	_ctzsi2 _arm_addsubdf3 _arm_addsubsf3
+
+# Just for these, we omit the frame pointer since it makes such a big
+# difference.
+HOST_LIBGCC2_CFLAGS += -fomit-frame-pointer
diff --git a/gcc-4.9/libgcc/config/arm/t-linux-eabi b/gcc-4.9/libgcc/config/arm/t-linux-eabi
new file mode 100644
index 000000000..a03e2b600
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-linux-eabi
@@ -0,0 +1,5 @@
+# Use a version of div0 which raises SIGFPE, and a special __clear_cache.
+LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx _clear_cache
+
+LIB2ADD_ST += $(srcdir)/config/arm/linux-atomic.c \
+	      $(srcdir)/config/arm/linux-atomic-64bit.c
diff --git a/gcc-4.9/libgcc/config/arm/t-netbsd b/gcc-4.9/libgcc/config/arm/t-netbsd
new file mode 100644
index 000000000..95358f931
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-netbsd
@@ -0,0 +1,7 @@
+# Just for these, we omit the frame pointer since it makes such a big
+# difference.  It is then pointless adding debugging.
+HOST_LIBGCC2_CFLAGS += -fomit-frame-pointer
+
+LIBGCC2_DEBUG_CFLAGS = -g0
+
+LIB2ADD += $(srcdir)/floatunsidf.c $(srcdir)/floatunsisf.c
diff --git a/gcc-4.9/libgcc/config/arm/t-softfp b/gcc-4.9/libgcc/config/arm/t-softfp
new file mode 100644
index 000000000..4ede438ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-softfp
@@ -0,0 +1,2 @@
+softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
+softfp_wrap_end := '\#endif'
diff --git a/gcc-4.9/libgcc/config/arm/t-strongarm-elf b/gcc-4.9/libgcc/config/arm/t-strongarm-elf
new file mode 100644
index 000000000..42c6312e2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-strongarm-elf
@@ -0,0 +1,6 @@
+LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 _clzdi2 _ctzsi2
+
+# Currently there is a bug somewhere in GCC's alias analysis
+# or scheduling code that is breaking _fpmul_parts in fp-bit.c.
+# Disabling function inlining is a workaround for this problem.
+HOST_LIBGCC2_CFLAGS += -fno-inline
diff --git a/gcc-4.9/libgcc/config/arm/t-symbian b/gcc-4.9/libgcc/config/arm/t-symbian
new file mode 100644
index 000000000..d573157f2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-symbian
@@ -0,0 +1,19 @@
+LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2
+
+# These functions have __aeabi equivalents and will never be called by GCC.  
+# By putting them in LIB1ASMFUNCS, we avoid the standard libgcc2.c code being
+# used -- and we make sure that definitions are not available in lib1funcs.S,
+# either, so they end up undefined.
+LIB1ASMFUNCS += \
+	_ashldi3 _ashrdi3 _divdi3 _floatdidf _udivmoddi4 _umoddi3 \
+	_udivdi3 _lshrdi3 _moddi3 _muldi3 _negdi2 _cmpdi2 \
+	_fixdfdi _fixsfdi _fixunsdfdi _fixunssfdi _floatdisf \
+	_negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
+	_truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
+	_fixsfsi _fixunssfsi
+
+# Include half-float helpers.
+LIB2ADD_ST += $(srcdir)/config/arm/fp16.c
+
+# Include the gcc personality routine
+LIB2ADDEH = $(srcdir)/unwind-c.c $(srcdir)/config/arm/pr-support.c
diff --git a/gcc-4.9/libgcc/config/arm/t-wince-pe b/gcc-4.9/libgcc/config/arm/t-wince-pe
new file mode 100644
index 000000000..f6d170069
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/t-wince-pe
@@ -0,0 +1 @@
+LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2
diff --git a/gcc-4.9/libgcc/config/arm/unaligned-funcs.c b/gcc-4.9/libgcc/config/arm/unaligned-funcs.c
new file mode 100644
index 000000000..4c9b4672d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/unaligned-funcs.c
@@ -0,0 +1,57 @@
+/* EABI unaligned read/write functions.
+
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by CodeSourcery, LLC.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+int __aeabi_uread4 (void *);
+int __aeabi_uwrite4 (int, void *);
+long long __aeabi_uread8 (void *);
+long long __aeabi_uwrite8 (long long, void *);
+
+struct __attribute__((packed)) u4 { int data; };
+struct __attribute__((packed)) u8 { long long data; };
+
+int
+__aeabi_uread4 (void *ptr)
+{
+  return ((struct u4 *) ptr)->data;
+}
+
+int
+__aeabi_uwrite4 (int data, void *ptr)
+{
+  ((struct u4 *) ptr)->data = data;
+  return data;
+}
+
+long long
+__aeabi_uread8 (void *ptr)
+{
+  return ((struct u8 *) ptr)->data;
+}
+
+long long
+__aeabi_uwrite8 (long long data, void *ptr)
+{
+  ((struct u8 *) ptr)->data = data;
+  return data;
+}
diff --git a/gcc-4.9/libgcc/config/arm/unwind-arm.c b/gcc-4.9/libgcc/config/arm/unwind-arm.c
new file mode 100644
index 000000000..ee2396333
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/unwind-arm.c
@@ -0,0 +1,511 @@
+/* ARM EABI compliant unwinding routines.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributed by Paul Brook
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "unwind.h"
+
+/* Misc constants.  */
+#define R_IP	12
+#define R_SP	13
+#define R_LR	14
+#define R_PC	15
+
+#define VRS_PC(vrs) ((vrs)->core.r[R_PC])
+#define VRS_SP(vrs) ((vrs)->core.r[R_SP])
+#define VRS_RETURN(vrs) ((vrs)->core.r[R_LR])
+
+struct core_regs
+{
+  _uw r[16];
+};
+
+/* We use normal integer types here to avoid the compiler generating
+   coprocessor instructions.  */
+struct vfp_regs
+{
+  _uw64 d[16];
+  _uw pad;
+};
+
+struct vfpv3_regs
+{
+  /* Always populated via VSTM, so no need for the "pad" field from
+     vfp_regs (which is used to store the format word for FSTMX).  */
+  _uw64 d[16];
+};
+
+struct wmmxd_regs
+{
+  _uw64 wd[16];
+};
+
+struct wmmxc_regs
+{
+  _uw wc[4];
+};
+
+/* The ABI specifies that the unwind routines may only use core registers,
+   except when actually manipulating coprocessor state.  This allows
+   us to write one implementation that works on all platforms by
+   demand-saving coprocessor registers.
+
+   During unwinding we hold the coprocessor state in the actual hardware
+   registers and allocate demand-save areas for use during phase1
+   unwinding.  */
+
+typedef struct
+{
+  /* The first fields must be the same as a phase2_vrs.  */
+  _uw demand_save_flags;
+  struct core_regs core;
+  _uw prev_sp; /* Only valid during forced unwinding.  */
+  struct vfp_regs vfp;
+  struct vfpv3_regs vfp_regs_16_to_31;
+  struct wmmxd_regs wmmxd;
+  struct wmmxc_regs wmmxc;
+} phase1_vrs;
+
+#define DEMAND_SAVE_VFP 1	/* VFP state has been saved if not set */
+#define DEMAND_SAVE_VFP_D 2	/* VFP state is for FLDMD/FSTMD if set */
+#define DEMAND_SAVE_VFP_V3 4    /* VFPv3 state for regs 16 .. 31 has
+                                   been saved if not set */
+#define DEMAND_SAVE_WMMXD 8	/* iWMMXt data registers have been
+				   saved if not set.  */
+#define DEMAND_SAVE_WMMXC 16	/* iWMMXt control registers have been
+				   saved if not set.  */
+
+/* This must match the structure created by the assembly wrappers.  */
+typedef struct
+{
+  _uw demand_save_flags;
+  struct core_regs core;
+} phase2_vrs;
+
+/* Coprocessor register state manipulation functions.  */
+
+/* Routines for FLDMX/FSTMX format...  */
+void __gnu_Unwind_Save_VFP (struct vfp_regs * p);
+void __gnu_Unwind_Restore_VFP (struct vfp_regs * p);
+void __gnu_Unwind_Save_WMMXD (struct wmmxd_regs * p);
+void __gnu_Unwind_Restore_WMMXD (struct wmmxd_regs * p);
+void __gnu_Unwind_Save_WMMXC (struct wmmxc_regs * p);
+void __gnu_Unwind_Restore_WMMXC (struct wmmxc_regs * p);
+
+/* ...and those for FLDMD/FSTMD format...  */
+void __gnu_Unwind_Save_VFP_D (struct vfp_regs * p);
+void __gnu_Unwind_Restore_VFP_D (struct vfp_regs * p);
+
+/* ...and those for VLDM/VSTM format, saving/restoring only registers
+   16 through 31.  */
+void __gnu_Unwind_Save_VFP_D_16_to_31 (struct vfpv3_regs * p);
+void __gnu_Unwind_Restore_VFP_D_16_to_31 (struct vfpv3_regs * p);
+
+/* Restore coprocessor state after phase1 unwinding.  */
+static void
+restore_non_core_regs (phase1_vrs * vrs)
+{
+  if ((vrs->demand_save_flags & DEMAND_SAVE_VFP) == 0)
+    {
+      if (vrs->demand_save_flags & DEMAND_SAVE_VFP_D)
+        __gnu_Unwind_Restore_VFP_D (&vrs->vfp);
+      else
+        __gnu_Unwind_Restore_VFP (&vrs->vfp);
+    }
+
+  if ((vrs->demand_save_flags & DEMAND_SAVE_VFP_V3) == 0)
+    __gnu_Unwind_Restore_VFP_D_16_to_31 (&vrs->vfp_regs_16_to_31);
+
+  if ((vrs->demand_save_flags & DEMAND_SAVE_WMMXD) == 0)
+    __gnu_Unwind_Restore_WMMXD (&vrs->wmmxd);
+  if ((vrs->demand_save_flags & DEMAND_SAVE_WMMXC) == 0)
+    __gnu_Unwind_Restore_WMMXC (&vrs->wmmxc);
+}
+
+#include "unwind-arm-common.inc"
+
+/* ABI defined personality routines.  */
+extern _Unwind_Reason_Code __aeabi_unwind_cpp_pr0 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *);// __attribute__((weak));
+extern _Unwind_Reason_Code __aeabi_unwind_cpp_pr1 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+extern _Unwind_Reason_Code __aeabi_unwind_cpp_pr2 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+
+/* ABI defined routine to store a virtual register to memory.  */
+
+_Unwind_VRS_Result _Unwind_VRS_Get (_Unwind_Context *context,
+				    _Unwind_VRS_RegClass regclass,
+				    _uw regno,
+				    _Unwind_VRS_DataRepresentation representation,
+				    void *valuep)
+{
+  phase1_vrs *vrs = (phase1_vrs *) context;
+
+  switch (regclass)
+    {
+    case _UVRSC_CORE:
+      if (representation != _UVRSD_UINT32
+	  || regno > 15)
+	return _UVRSR_FAILED;
+      *(_uw *) valuep = vrs->core.r[regno];
+      return _UVRSR_OK;
+
+    case _UVRSC_VFP:
+    case _UVRSC_WMMXD:
+    case _UVRSC_WMMXC:
+      return _UVRSR_NOT_IMPLEMENTED;
+
+    default:
+      return _UVRSR_FAILED;
+    }
+}
+
+
+/* ABI defined function to load a virtual register from memory.  */
+
+_Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
+				    _Unwind_VRS_RegClass regclass,
+				    _uw regno,
+				    _Unwind_VRS_DataRepresentation representation,
+				    void *valuep)
+{
+  phase1_vrs *vrs = (phase1_vrs *) context;
+
+  switch (regclass)
+    {
+    case _UVRSC_CORE:
+      if (representation != _UVRSD_UINT32
+	  || regno > 15)
+	return _UVRSR_FAILED;
+
+      vrs->core.r[regno] = *(_uw *) valuep;
+      return _UVRSR_OK;
+
+    case _UVRSC_VFP:
+    case _UVRSC_WMMXD:
+    case _UVRSC_WMMXC:
+      return _UVRSR_NOT_IMPLEMENTED;
+
+    default:
+      return _UVRSR_FAILED;
+    }
+}
+
+
+/* ABI defined function to pop registers off the stack.  */
+
+_Unwind_VRS_Result _Unwind_VRS_Pop (_Unwind_Context *context,
+				    _Unwind_VRS_RegClass regclass,
+				    _uw discriminator,
+				    _Unwind_VRS_DataRepresentation representation)
+{
+  phase1_vrs *vrs = (phase1_vrs *) context;
+
+  switch (regclass)
+    {
+    case _UVRSC_CORE:
+      {
+	_uw *ptr;
+	_uw mask;
+	int i;
+
+	if (representation != _UVRSD_UINT32)
+	  return _UVRSR_FAILED;
+
+	mask = discriminator & 0xffff;
+	ptr = (_uw *) vrs->core.r[R_SP];
+	/* Pop the requested registers.  */
+	for (i = 0; i < 16; i++)
+	  {
+	    if (mask & (1 << i))
+	      vrs->core.r[i] = *(ptr++);
+	  }
+	/* Writeback the stack pointer value if it wasn't restored.  */
+	if ((mask & (1 << R_SP)) == 0)
+	  vrs->core.r[R_SP] = (_uw) ptr;
+      }
+      return _UVRSR_OK;
+
+    case _UVRSC_VFP:
+      {
+	_uw start = discriminator >> 16;
+	_uw count = discriminator & 0xffff;
+	struct vfp_regs tmp;
+	struct vfpv3_regs tmp_16_to_31;
+	int tmp_count;
+	_uw *sp;
+	_uw *dest;
+        int num_vfpv3_regs = 0;
+
+        /* We use an approximation here by bounding _UVRSD_DOUBLE
+           register numbers at 32 always, since we can't detect if
+           VFPv3 isn't present (in such a case the upper limit is 16).  */
+	if ((representation != _UVRSD_VFPX && representation != _UVRSD_DOUBLE)
+            || start + count > (representation == _UVRSD_VFPX ? 16 : 32)
+            || (representation == _UVRSD_VFPX && start >= 16))
+	  return _UVRSR_FAILED;
+
+        /* Check if we're being asked to pop VFPv3-only registers
+           (numbers 16 through 31).  */
+	if (start >= 16)
+          num_vfpv3_regs = count;
+        else if (start + count > 16)
+          num_vfpv3_regs = start + count - 16;
+
+        if (num_vfpv3_regs && representation != _UVRSD_DOUBLE)
+          return _UVRSR_FAILED;
+
+	/* Demand-save coprocessor registers for stage1.  */
+	if (start < 16 && (vrs->demand_save_flags & DEMAND_SAVE_VFP))
+	  {
+	    vrs->demand_save_flags &= ~DEMAND_SAVE_VFP;
+
+            if (representation == _UVRSD_DOUBLE)
+              {
+                /* Save in FLDMD/FSTMD format.  */
+	        vrs->demand_save_flags |= DEMAND_SAVE_VFP_D;
+	        __gnu_Unwind_Save_VFP_D (&vrs->vfp);
+              }
+            else
+              {
+                /* Save in FLDMX/FSTMX format.  */
+	        vrs->demand_save_flags &= ~DEMAND_SAVE_VFP_D;
+	        __gnu_Unwind_Save_VFP (&vrs->vfp);
+              }
+	  }
+
+        if (num_vfpv3_regs > 0
+            && (vrs->demand_save_flags & DEMAND_SAVE_VFP_V3))
+	  {
+	    vrs->demand_save_flags &= ~DEMAND_SAVE_VFP_V3;
+            __gnu_Unwind_Save_VFP_D_16_to_31 (&vrs->vfp_regs_16_to_31);
+	  }
+
+	/* Restore the registers from the stack.  Do this by saving the
+	   current VFP registers to a memory area, moving the in-memory
+	   values into that area, and restoring from the whole area.
+	   For _UVRSD_VFPX we assume FSTMX standard format 1.  */
+        if (representation == _UVRSD_VFPX)
+  	  __gnu_Unwind_Save_VFP (&tmp);
+        else
+          {
+	    /* Save registers 0 .. 15 if required.  */
+            if (start < 16)
+              __gnu_Unwind_Save_VFP_D (&tmp);
+
+	    /* Save VFPv3 registers 16 .. 31 if required.  */
+            if (num_vfpv3_regs)
+  	      __gnu_Unwind_Save_VFP_D_16_to_31 (&tmp_16_to_31);
+          }
+
+	/* Work out how many registers below register 16 need popping.  */
+	tmp_count = num_vfpv3_regs > 0 ? 16 - start : count;
+
+	/* Copy registers below 16, if needed.
+	   The stack address is only guaranteed to be word aligned, so
+	   we can't use doubleword copies.  */
+	sp = (_uw *) vrs->core.r[R_SP];
+        if (tmp_count > 0)
+          {
+	    tmp_count *= 2;
+	    dest = (_uw *) &tmp.d[start];
+	    while (tmp_count--)
+	      *(dest++) = *(sp++);
+          }
+
+	/* Copy VFPv3 registers numbered >= 16, if needed.  */
+        if (num_vfpv3_regs > 0)
+          {
+            /* num_vfpv3_regs is needed below, so copy it.  */
+            int tmp_count_2 = num_vfpv3_regs * 2;
+            int vfpv3_start = start < 16 ? 16 : start;
+
+	    dest = (_uw *) &tmp_16_to_31.d[vfpv3_start - 16];
+	    while (tmp_count_2--)
+	      *(dest++) = *(sp++);
+          }
+
+	/* Skip the format word space if using FLDMX/FSTMX format.  */
+	if (representation == _UVRSD_VFPX)
+	  sp++;
+
+	/* Set the new stack pointer.  */
+	vrs->core.r[R_SP] = (_uw) sp;
+
+	/* Reload the registers.  */
+        if (representation == _UVRSD_VFPX)
+  	  __gnu_Unwind_Restore_VFP (&tmp);
+        else
+          {
+	    /* Restore registers 0 .. 15 if required.  */
+            if (start < 16)
+              __gnu_Unwind_Restore_VFP_D (&tmp);
+
+	    /* Restore VFPv3 registers 16 .. 31 if required.  */
+            if (num_vfpv3_regs > 0)
+  	      __gnu_Unwind_Restore_VFP_D_16_to_31 (&tmp_16_to_31);
+          }
+      }
+      return _UVRSR_OK;
+
+    case _UVRSC_WMMXD:
+      {
+	_uw start = discriminator >> 16;
+	_uw count = discriminator & 0xffff;
+	struct wmmxd_regs tmp;
+	_uw *sp;
+	_uw *dest;
+
+	if ((representation != _UVRSD_UINT64) || start + count > 16)
+	  return _UVRSR_FAILED;
+
+	if (vrs->demand_save_flags & DEMAND_SAVE_WMMXD)
+	  {
+	    /* Demand-save resisters for stage1.  */
+	    vrs->demand_save_flags &= ~DEMAND_SAVE_WMMXD;
+	    __gnu_Unwind_Save_WMMXD (&vrs->wmmxd);
+	  }
+
+	/* Restore the registers from the stack.  Do this by saving the
+	   current WMMXD registers to a memory area, moving the in-memory
+	   values into that area, and restoring from the whole area.  */
+	__gnu_Unwind_Save_WMMXD (&tmp);
+
+	/* The stack address is only guaranteed to be word aligned, so
+	   we can't use doubleword copies.  */
+	sp = (_uw *) vrs->core.r[R_SP];
+	dest = (_uw *) &tmp.wd[start];
+	count *= 2;
+	while (count--)
+	  *(dest++) = *(sp++);
+
+	/* Set the new stack pointer.  */
+	vrs->core.r[R_SP] = (_uw) sp;
+
+	/* Reload the registers.  */
+	__gnu_Unwind_Restore_WMMXD (&tmp);
+      }
+      return _UVRSR_OK;
+
+    case _UVRSC_WMMXC:
+      {
+	int i;
+	struct wmmxc_regs tmp;
+	_uw *sp;
+
+	if ((representation != _UVRSD_UINT32) || discriminator > 16)
+	  return _UVRSR_FAILED;
+
+	if (vrs->demand_save_flags & DEMAND_SAVE_WMMXC)
+	  {
+	    /* Demand-save resisters for stage1.  */
+	    vrs->demand_save_flags &= ~DEMAND_SAVE_WMMXC;
+	    __gnu_Unwind_Save_WMMXC (&vrs->wmmxc);
+	  }
+
+	/* Restore the registers from the stack.  Do this by saving the
+	   current WMMXC registers to a memory area, moving the in-memory
+	   values into that area, and restoring from the whole area.  */
+	__gnu_Unwind_Save_WMMXC (&tmp);
+
+	sp = (_uw *) vrs->core.r[R_SP];
+	for (i = 0; i < 4; i++)
+	  if (discriminator & (1 << i))
+	    tmp.wc[i] = *(sp++);
+
+	/* Set the new stack pointer.  */
+	vrs->core.r[R_SP] = (_uw) sp;
+
+	/* Reload the registers.  */
+	__gnu_Unwind_Restore_WMMXC (&tmp);
+      }
+      return _UVRSR_OK;
+
+    default:
+      return _UVRSR_FAILED;
+    }
+}
+
+
+/* Core unwinding functions.  */
+
+/* Calculate the address encoded by a 31-bit self-relative offset at address
+   P.  */
+static inline _uw
+selfrel_offset31 (const _uw *p)
+{
+  _uw offset;
+
+  offset = *p;
+  /* Sign extend to 32 bits.  */
+  if (offset & (1 << 30))
+    offset |= 1u << 31;
+  else
+    offset &= ~(1u << 31);
+
+  return offset + (_uw) p;
+}
+
+static _uw
+__gnu_unwind_get_pr_addr (int idx)
+{
+  switch (idx)
+    {
+    case 0:
+      return (_uw) &__aeabi_unwind_cpp_pr0;
+
+    case 1:
+      return (_uw) &__aeabi_unwind_cpp_pr1;
+
+    case 2:
+      return (_uw) &__aeabi_unwind_cpp_pr2;
+
+    default:
+      return 0;
+    } 
+}
+
+/* ABI defined personality routine entry points.  */
+
+_Unwind_Reason_Code
+__aeabi_unwind_cpp_pr0 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 0);
+}
+
+_Unwind_Reason_Code
+__aeabi_unwind_cpp_pr1 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 1);
+}
+
+_Unwind_Reason_Code
+__aeabi_unwind_cpp_pr2 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 2);
+}
diff --git a/gcc-4.9/libgcc/config/arm/unwind-arm.h b/gcc-4.9/libgcc/config/arm/unwind-arm.h
new file mode 100644
index 000000000..782d1753d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/arm/unwind-arm.h
@@ -0,0 +1,85 @@
+/* Header file for the ARM EABI unwinder
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+   Contributed by Paul Brook
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Language-independent unwinder header public defines.  This contains both
+   ABI defined objects, and GNU support routines.  */
+
+#ifndef UNWIND_ARM_H
+#define UNWIND_ARM_H
+
+#include "unwind-arm-common.h"
+
+#define UNWIND_STACK_REG 13
+/* Use IP as a scratch register within the personality routine.  */
+#define UNWIND_POINTER_REG 12
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  /* Decode an R_ARM_TARGET2 relocation.  */
+  static inline _Unwind_Word
+  _Unwind_decode_typeinfo_ptr (_Unwind_Word base __attribute__ ((unused)),
+                               _Unwind_Word ptr)
+    {
+      _Unwind_Word tmp;
+
+      tmp = *(_Unwind_Word *) ptr;
+      /* Zero values are always NULL.  */
+      if (!tmp)
+	return 0;
+
+#if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
+      /* Pc-relative indirect.  */
+#define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel | DW_EH_PE_indirect)
+      tmp += ptr;
+      tmp = *(_Unwind_Word *) tmp;
+#elif defined(__symbian__) || defined(__uClinux__)
+#define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_absptr)
+      /* Absolute pointer.  Nothing more to do.  */
+#else
+#define _GLIBCXX_OVERRIDE_TTYPE_ENCODING (DW_EH_PE_pcrel)
+      /* Pc-relative pointer.  */
+      tmp += ptr;
+#endif
+      return tmp;
+    }
+
+  static inline _Unwind_Reason_Code
+  __gnu_unwind_24bit (_Unwind_Context * context __attribute__ ((unused)),
+                      _uw data __attribute__ ((unused)),
+                      int compact __attribute__ ((unused)))
+    {
+      return _URC_FAILURE;
+    }
+  /* Return the address of the instruction, not the actual IP value.  */
+#define _Unwind_GetIP(context) \
+  (_Unwind_GetGR (context, 15) & ~(_Unwind_Word)1)
+
+#define _Unwind_SetIP(context, val) \
+  _Unwind_SetGR (context, 15, val | (_Unwind_GetGR (context, 15) & 1))
+
+#ifdef __cplusplus
+}   /* extern "C" */
+#endif
+
+#endif /* defined UNWIND_ARM_H */
diff --git a/gcc-4.9/libgcc/config/avr/avr-lib.h b/gcc-4.9/libgcc/config/avr/avr-lib.h
new file mode 100644
index 000000000..37d5fa1a7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/avr-lib.h
@@ -0,0 +1,105 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef FLOAT
+#define CMPtype QItype
+#define DF SF
+#define DI SI
+typedef int QItype __attribute__ ((mode (QI)));
+#endif
+
+/* fixed-bit.h does not define functions for TA and UTA because
+   that part is wrapped in #if MIN_UNITS_PER_WORD > 4.
+   This would lead to empty functions for TA and UTA.
+   Thus, supply appropriate defines as if HAVE_[U]TA == 1.
+   #define HAVE_[U]TA 1 won't work because avr-modes.def
+   uses ADJUST_BYTESIZE(TA,8) and fixed-bit.h is not generic enough
+   to arrange for such changes of the mode size.  */
+
+typedef unsigned _Fract UTAtype __attribute__ ((mode (UTA)));
+
+#if defined (UTA_MODE)
+#define FIXED_SIZE      8       /* in bytes */
+#define INT_C_TYPE      UDItype
+#define UINT_C_TYPE     UDItype
+#define HINT_C_TYPE     USItype
+#define HUINT_C_TYPE    USItype
+#define MODE_NAME       UTA
+#define MODE_NAME_S     uta
+#define MODE_UNSIGNED   1
+#endif
+
+#if defined (FROM_UTA)
+#define FROM_TYPE               4       /* ID for fixed-point */
+#define FROM_MODE_NAME          UTA
+#define FROM_MODE_NAME_S        uta
+#define FROM_INT_C_TYPE         UDItype
+#define FROM_SINT_C_TYPE        DItype
+#define FROM_UINT_C_TYPE        UDItype
+#define FROM_MODE_UNSIGNED      1
+#define FROM_FIXED_SIZE         8       /* in bytes */
+#elif defined (TO_UTA)
+#define TO_TYPE                 4       /* ID for fixed-point */
+#define TO_MODE_NAME            UTA
+#define TO_MODE_NAME_S          uta
+#define TO_INT_C_TYPE           UDItype
+#define TO_SINT_C_TYPE          DItype
+#define TO_UINT_C_TYPE          UDItype
+#define TO_MODE_UNSIGNED        1
+#define TO_FIXED_SIZE           8       /* in bytes */
+#endif
+
+/* Same for TAmode */
+
+typedef _Fract TAtype  __attribute__ ((mode (TA)));
+
+#if defined (TA_MODE)
+#define FIXED_SIZE      8       /* in bytes */
+#define INT_C_TYPE      DItype
+#define UINT_C_TYPE     UDItype
+#define HINT_C_TYPE     SItype
+#define HUINT_C_TYPE    USItype
+#define MODE_NAME       TA
+#define MODE_NAME_S     ta
+#define MODE_UNSIGNED   0
+#endif
+
+#if defined (FROM_TA)
+#define FROM_TYPE               4       /* ID for fixed-point */
+#define FROM_MODE_NAME          TA
+#define FROM_MODE_NAME_S        ta
+#define FROM_INT_C_TYPE         DItype
+#define FROM_SINT_C_TYPE        DItype
+#define FROM_UINT_C_TYPE        UDItype
+#define FROM_MODE_UNSIGNED      0
+#define FROM_FIXED_SIZE         8       /* in bytes */
+#elif defined (TO_TA)
+#define TO_TYPE                 4       /* ID for fixed-point */
+#define TO_MODE_NAME            TA
+#define TO_MODE_NAME_S          ta
+#define TO_INT_C_TYPE           DItype
+#define TO_SINT_C_TYPE          DItype
+#define TO_UINT_C_TYPE          UDItype
+#define TO_MODE_UNSIGNED        0
+#define TO_FIXED_SIZE           8       /* in bytes */
+#endif
diff --git a/gcc-4.9/libgcc/config/avr/lib1funcs-fixed.S b/gcc-4.9/libgcc/config/avr/lib1funcs-fixed.S
new file mode 100644
index 000000000..8f3ed9201
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/lib1funcs-fixed.S
@@ -0,0 +1,1915 @@
+/*  -*- Mode: Asm -*-  */
+;;    Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;;    Contributed by Sean D'Epagnier  (sean@depagnier.com)
+;;                   Georg-Johann Lay (avr@gjlay.de)
+
+;; This file is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published by the
+;; Free Software Foundation; either version 3, or (at your option) any
+;; later version.
+
+;; In addition to the permissions in the GNU General Public License, the
+;; Free Software Foundation gives you unlimited permission to link the
+;; compiled version of this file into combinations with other programs,
+;; and to distribute those combinations without any restriction coming
+;; from the use of this file.  (The General Public License restrictions
+;; do apply in other respects; for example, they cover modification of
+;; the file, and distribution when not linked into a combine
+;; executable.)
+
+;; This file is distributed in the hope that it will be useful, but
+;; WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+;; General Public License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with this program; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Fixed point library routines for AVR
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+.section .text.libgcc.fixed, "ax", @progbits
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Conversions to float
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#if defined (L_fractqqsf)
+DEFUN __fractqqsf
+    ;; Move in place for SA -> SF conversion
+    clr     r22
+    mov     r23, r24
+    ;; Sign-extend
+    lsl     r24
+    sbc     r24, r24
+    mov     r25, r24
+    XJMP    __fractsasf
+ENDF __fractqqsf
+#endif  /* L_fractqqsf */
+
+#if defined (L_fractuqqsf)
+DEFUN __fractuqqsf
+    ;; Move in place for USA -> SF conversion
+    clr     r22
+    mov     r23, r24
+    ;; Zero-extend
+    clr     r24
+    clr     r25
+    XJMP    __fractusasf
+ENDF __fractuqqsf
+#endif  /* L_fractuqqsf */
+
+#if defined (L_fracthqsf)
+DEFUN __fracthqsf
+    ;; Move in place for SA -> SF conversion
+    wmov    22, 24
+    ;; Sign-extend
+    lsl     r25
+    sbc     r24, r24
+    mov     r25, r24
+    XJMP    __fractsasf
+ENDF __fracthqsf
+#endif  /* L_fracthqsf */
+
+#if defined (L_fractuhqsf)
+DEFUN __fractuhqsf
+    ;; Move in place for USA -> SF conversion
+    wmov    22, 24
+    ;; Zero-extend
+    clr     r24
+    clr     r25
+    XJMP    __fractusasf
+ENDF __fractuhqsf
+#endif  /* L_fractuhqsf */
+
+#if defined (L_fracthasf)
+DEFUN __fracthasf
+    ;; Move in place for SA -> SF conversion
+    clr     r22
+    mov     r23, r24
+    mov     r24, r25
+    ;; Sign-extend
+    lsl     r25
+    sbc     r25, r25
+    XJMP    __fractsasf
+ENDF __fracthasf
+#endif  /* L_fracthasf */
+
+#if defined (L_fractuhasf)
+DEFUN __fractuhasf
+    ;; Move in place for USA -> SF conversion
+    clr     r22
+    mov     r23, r24
+    mov     r24, r25
+    ;; Zero-extend
+    clr     r25
+    XJMP    __fractusasf
+ENDF __fractuhasf
+#endif  /* L_fractuhasf */
+
+
+#if defined (L_fractsqsf)
+DEFUN __fractsqsf
+    XCALL   __floatsisf
+    ;; Divide non-zero results by 2^31 to move the
+    ;; decimal point into place
+    tst     r25
+    breq    0f
+    subi    r24, exp_lo (31)
+    sbci    r25, exp_hi (31)
+0:  ret
+ENDF __fractsqsf
+#endif  /* L_fractsqsf */
+
+#if defined (L_fractusqsf)
+DEFUN __fractusqsf
+    XCALL   __floatunsisf
+    ;; Divide non-zero results by 2^32 to move the
+    ;; decimal point into place
+    cpse    r25, __zero_reg__
+    subi    r25, exp_hi (32)
+    ret
+ENDF __fractusqsf
+#endif  /* L_fractusqsf */
+
+#if defined (L_fractsasf)
+DEFUN __fractsasf
+    XCALL   __floatsisf
+    ;; Divide non-zero results by 2^15 to move the
+    ;; decimal point into place
+    tst     r25
+    breq    0f
+    subi    r24, exp_lo (15)
+    sbci    r25, exp_hi (15)
+0:  ret
+ENDF __fractsasf
+#endif  /* L_fractsasf */
+
+#if defined (L_fractusasf)
+DEFUN __fractusasf
+    XCALL   __floatunsisf
+    ;; Divide non-zero results by 2^16 to move the
+    ;; decimal point into place
+    cpse    r25, __zero_reg__
+    subi    r25, exp_hi (16)
+    ret
+ENDF __fractusasf
+#endif  /* L_fractusasf */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Conversions from float
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#if defined (L_fractsfqq)
+DEFUN __fractsfqq
+    ;; Multiply with 2^{24+7} to get a QQ result in r25
+    subi    r24, exp_lo (-31)
+    sbci    r25, exp_hi (-31)
+    XCALL   __fixsfsi
+    mov     r24, r25
+    ret
+ENDF __fractsfqq
+#endif  /* L_fractsfqq */
+
+#if defined (L_fractsfuqq)
+DEFUN __fractsfuqq
+    ;; Multiply with 2^{24+8} to get a UQQ result in r25
+    subi    r25, exp_hi (-32)
+    XCALL   __fixunssfsi
+    mov     r24, r25
+    ret
+ENDF __fractsfuqq
+#endif  /* L_fractsfuqq */
+
+#if defined (L_fractsfha)
+DEFUN __fractsfha
+    ;; Multiply with 2^{16+7} to get a HA result in r25:r24
+    subi    r24, exp_lo (-23)
+    sbci    r25, exp_hi (-23)
+    XJMP    __fixsfsi
+ENDF __fractsfha
+#endif  /* L_fractsfha */
+
+#if defined (L_fractsfuha)
+DEFUN __fractsfuha
+    ;; Multiply with 2^24 to get a UHA result in r25:r24
+    subi    r25, exp_hi (-24)
+    XJMP    __fixunssfsi
+ENDF __fractsfuha
+#endif  /* L_fractsfuha */
+
+#if defined (L_fractsfhq)
+FALIAS __fractsfsq
+
+DEFUN __fractsfhq
+    ;; Multiply with 2^{16+15} to get a HQ result in r25:r24
+    ;; resp. with 2^31 to get a SQ result in r25:r22
+    subi    r24, exp_lo (-31)
+    sbci    r25, exp_hi (-31)
+    XJMP    __fixsfsi
+ENDF __fractsfhq
+#endif  /* L_fractsfhq */
+
+#if defined (L_fractsfuhq)
+FALIAS __fractsfusq
+
+DEFUN __fractsfuhq
+    ;; Multiply with 2^{16+16} to get a UHQ result in r25:r24
+    ;; resp. with 2^32 to get a USQ result in r25:r22
+    subi    r25, exp_hi (-32)
+    XJMP    __fixunssfsi
+ENDF __fractsfuhq
+#endif  /* L_fractsfuhq */
+
+#if defined (L_fractsfsa)
+DEFUN __fractsfsa
+    ;; Multiply with 2^15 to get a SA result in r25:r22
+    subi    r24, exp_lo (-15)
+    sbci    r25, exp_hi (-15)
+    XJMP    __fixsfsi
+ENDF __fractsfsa
+#endif  /* L_fractsfsa */
+
+#if defined (L_fractsfusa)
+DEFUN __fractsfusa
+    ;; Multiply with 2^16 to get a USA result in r25:r22
+    subi    r25, exp_hi (-16)
+    XJMP    __fixunssfsi
+ENDF __fractsfusa
+#endif  /* L_fractsfusa */
+
+
+;; For multiplication the functions here are called directly from
+;; avr-fixed.md instead of using the standard libcall mechanisms.
+;; This can make better code because GCC knows exactly which
+;; of the call-used registers (not all of them) are clobbered.  */
+
+/*******************************************************
+    Fractional  Multiplication  8 x 8  without MUL
+*******************************************************/
+
+#if defined (L_mulqq3) && !defined (__AVR_HAVE_MUL__)
+;;; R23 = R24 * R25
+;;; Clobbers: __tmp_reg__, R22, R24, R25
+;;; Rounding: ???
+DEFUN __mulqq3
+    XCALL   __fmuls
+    ;; TR 18037 requires that  (-1) * (-1)  does not overflow
+    ;; The only input that can produce  -1  is  (-1)^2.
+    dec     r23
+    brvs    0f
+    inc     r23
+0:  ret
+ENDF  __mulqq3
+#endif /* L_mulqq3 && ! HAVE_MUL */
+
+/*******************************************************
+    Fractional Multiply  .16 x .16  with and without MUL
+*******************************************************/
+
+#if defined (L_mulhq3)
+;;; Same code with and without MUL, but the interfaces differ:
+;;; no MUL: (R25:R24) = (R22:R23) * (R24:R25)
+;;;         Clobbers: ABI, called by optabs
+;;; MUL:    (R25:R24) = (R19:R18) * (R27:R26)
+;;;         Clobbers: __tmp_reg__, R22, R23
+;;; Rounding:  -0.5 LSB  <= error  <=  0.5 LSB
+DEFUN   __mulhq3
+    XCALL   __mulhisi3
+    ;; Shift result into place
+    lsl     r23
+    rol     r24
+    rol     r25
+    brvs    1f
+    ;; Round
+    sbrc    r23, 7
+    adiw    r24, 1
+    ret
+1:  ;; Overflow.  TR 18037 requires  (-1)^2  not to overflow
+    ldi     r24, lo8 (0x7fff)
+    ldi     r25, hi8 (0x7fff)
+    ret
+ENDF __mulhq3
+#endif  /* defined (L_mulhq3) */
+
+#if defined (L_muluhq3)
+;;; Same code with and without MUL, but the interfaces differ:
+;;; no MUL: (R25:R24) *= (R23:R22)
+;;;         Clobbers: ABI, called by optabs
+;;; MUL:    (R25:R24) = (R19:R18) * (R27:R26)
+;;;         Clobbers: __tmp_reg__, R22, R23
+;;; Rounding:  -0.5 LSB  <  error  <=  0.5 LSB
+DEFUN   __muluhq3
+    XCALL   __umulhisi3
+    ;; Round
+    sbrc    r23, 7
+    adiw    r24, 1
+    ret
+ENDF __muluhq3
+#endif  /* L_muluhq3 */
+
+
+/*******************************************************
+    Fixed  Multiply  8.8 x 8.8  with and without MUL
+*******************************************************/
+
+#if defined (L_mulha3)
+;;; Same code with and without MUL, but the interfaces differ:
+;;; no MUL: (R25:R24) = (R22:R23) * (R24:R25)
+;;;         Clobbers: ABI, called by optabs
+;;; MUL:    (R25:R24) = (R19:R18) * (R27:R26)
+;;;         Clobbers: __tmp_reg__, R22, R23
+;;; Rounding:  -0.5 LSB  <=  error  <=  0.5 LSB
+DEFUN   __mulha3
+    XCALL   __mulhisi3
+    lsl     r22
+    rol     r23
+    rol     r24
+    XJMP    __muluha3_round
+ENDF __mulha3
+#endif  /* L_mulha3 */
+
+#if defined (L_muluha3)
+;;; Same code with and without MUL, but the interfaces differ:
+;;; no MUL: (R25:R24) *= (R23:R22)
+;;;         Clobbers: ABI, called by optabs
+;;; MUL:    (R25:R24) = (R19:R18) * (R27:R26)
+;;;         Clobbers: __tmp_reg__, R22, R23
+;;; Rounding:  -0.5 LSB  <  error  <=  0.5 LSB
+DEFUN   __muluha3
+    XCALL   __umulhisi3
+    XJMP    __muluha3_round
+ENDF __muluha3
+#endif  /* L_muluha3 */
+
+#if defined (L_muluha3_round)
+DEFUN   __muluha3_round
+    ;; Shift result into place
+    mov     r25, r24
+    mov     r24, r23
+    ;; Round
+    sbrc    r22, 7
+    adiw    r24, 1
+    ret
+ENDF __muluha3_round
+#endif  /* L_muluha3_round */
+
+
+/*******************************************************
+    Fixed  Multiplication  16.16 x 16.16
+*******************************************************/
+
+;; Bits outside the result (below LSB), used in the signed version
+#define GUARD __tmp_reg__
+
+#if defined (__AVR_HAVE_MUL__)
+
+;; Multiplier
+#define A0  16
+#define A1  A0+1
+#define A2  A1+1
+#define A3  A2+1
+
+;; Multiplicand
+#define B0  20
+#define B1  B0+1
+#define B2  B1+1
+#define B3  B2+1
+
+;; Result
+#define C0  24
+#define C1  C0+1
+#define C2  C1+1
+#define C3  C2+1
+
+#if defined (L_mulusa3)
+;;; (C3:C0) = (A3:A0) * (B3:B0)
+DEFUN __mulusa3
+    set
+    ;; Fallthru
+ENDF  __mulusa3
+
+;;; Round for last digit iff T = 1
+;;; Return guard bits in GUARD (__tmp_reg__).
+;;; Rounding, T = 0:  -1.0 LSB  <  error  <=  0   LSB
+;;; Rounding, T = 1:  -0.5 LSB  <  error  <=  0.5 LSB
+DEFUN __mulusa3_round
+    ;; Some of the MUL instructions have LSBs outside the result.
+    ;; Don't ignore these LSBs in order to tame rounding error.
+    ;; Use C2/C3 for these LSBs.
+
+    clr C0
+    clr C1
+    mul A0, B0  $  movw C2, r0
+
+    mul A1, B0  $  add  C3, r0  $  adc C0, r1
+    mul A0, B1  $  add  C3, r0  $  adc C0, r1  $  rol C1
+
+    ;; Round if T = 1.  Store guarding bits outside the result for rounding
+    ;; and left-shift by the signed version (function below).
+    brtc 0f
+    sbrc C3, 7
+    adiw C0, 1
+0:  push C3
+
+    ;; The following MULs don't have LSBs outside the result.
+    ;; C2/C3 is the high part.
+
+    mul  A0, B2  $  add C0, r0  $  adc C1, r1  $  sbc  C2, C2
+    mul  A1, B1  $  add C0, r0  $  adc C1, r1  $  sbci C2, 0
+    mul  A2, B0  $  add C0, r0  $  adc C1, r1  $  sbci C2, 0
+    neg  C2
+
+    mul  A0, B3  $  add C1, r0  $  adc C2, r1  $  sbc  C3, C3
+    mul  A1, B2  $  add C1, r0  $  adc C2, r1  $  sbci C3, 0
+    mul  A2, B1  $  add C1, r0  $  adc C2, r1  $  sbci C3, 0
+    mul  A3, B0  $  add C1, r0  $  adc C2, r1  $  sbci C3, 0
+    neg  C3
+
+    mul  A1, B3  $  add C2, r0  $  adc C3, r1
+    mul  A2, B2  $  add C2, r0  $  adc C3, r1
+    mul  A3, B1  $  add C2, r0  $  adc C3, r1
+
+    mul  A2, B3  $  add C3, r0
+    mul  A3, B2  $  add C3, r0
+
+    ;; Guard bits used in the signed version below.
+    pop  GUARD
+    clr  __zero_reg__
+    ret
+ENDF __mulusa3_round
+#endif /* L_mulusa3 */
+
+#if defined (L_mulsa3)
+;;; (C3:C0) = (A3:A0) * (B3:B0)
+;;; Clobbers: __tmp_reg__, T
+;;; Rounding:  -0.5 LSB  <=  error  <=  0.5 LSB
+DEFUN __mulsa3
+    clt
+    XCALL   __mulusa3_round
+    ;; A posteriori sign extension of the operands
+    tst     B3
+    brpl 1f
+    sub     C2, A0
+    sbc     C3, A1
+1:  sbrs    A3, 7
+    rjmp 2f
+    sub     C2, B0
+    sbc     C3, B1
+2:
+    ;;  Shift 1 bit left to adjust for 15 fractional bits
+    lsl     GUARD
+    rol     C0
+    rol     C1
+    rol     C2
+    rol     C3
+    ;; Round last digit
+    lsl     GUARD
+    adc     C0, __zero_reg__
+    adc     C1, __zero_reg__
+    adc     C2, __zero_reg__
+    adc     C3, __zero_reg__
+    ret
+ENDF __mulsa3
+#endif /* L_mulsa3 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+
+#else /* __AVR_HAVE_MUL__ */
+
+#define A0 18
+#define A1 A0+1
+#define A2 A0+2
+#define A3 A0+3
+
+#define B0 22
+#define B1 B0+1
+#define B2 B0+2
+#define B3 B0+3
+
+#define C0  22
+#define C1  C0+1
+#define C2  C0+2
+#define C3  C0+3
+
+;; __tmp_reg__
+#define CC0  0
+;; __zero_reg__
+#define CC1  1
+#define CC2  16
+#define CC3  17
+
+#define AA0  26
+#define AA1  AA0+1
+#define AA2  30
+#define AA3  AA2+1
+
+#if defined (L_mulsa3)
+;;; (R25:R22)  *=  (R21:R18)
+;;; Clobbers: ABI, called by optabs
+;;; Rounding:  -1 LSB  <=  error  <=  1 LSB
+DEFUN   __mulsa3
+    push    B0
+    push    B1
+    push    B3
+    clt
+    XCALL   __mulusa3_round
+    pop     r30
+    ;; sign-extend B
+    bst     r30, 7
+    brtc 1f
+    ;; A1, A0 survived in  R27:R26
+    sub     C2, AA0
+    sbc     C3, AA1
+1:
+    pop     AA1  ;; B1
+    pop     AA0  ;; B0
+
+    ;; sign-extend A.  A3 survived in  R31
+    bst     AA3, 7
+    brtc 2f
+    sub     C2, AA0
+    sbc     C3, AA1
+2:
+    ;;  Shift 1 bit left to adjust for 15 fractional bits
+    lsl     GUARD
+    rol     C0
+    rol     C1
+    rol     C2
+    rol     C3
+    ;; Round last digit
+    lsl     GUARD
+    adc     C0, __zero_reg__
+    adc     C1, __zero_reg__
+    adc     C2, __zero_reg__
+    adc     C3, __zero_reg__
+    ret
+ENDF __mulsa3
+#endif  /* L_mulsa3 */
+
+#if defined (L_mulusa3)
+;;; (R25:R22)  *=  (R21:R18)
+;;; Clobbers: ABI, called by optabs
+;;; Rounding:  -1 LSB  <=  error  <=  1 LSB
+DEFUN __mulusa3
+    set
+    ;; Fallthru
+ENDF  __mulusa3
+
+;;; A[] survives in 26, 27, 30, 31
+;;; Also used by __mulsa3 with T = 0
+;;; Round if T = 1
+;;; Return Guard bits in GUARD (__tmp_reg__), used by signed version.
+DEFUN __mulusa3_round
+    push    CC2
+    push    CC3
+    ; clear result
+    clr     __tmp_reg__
+    wmov    CC2, CC0
+    ; save multiplicand
+    wmov    AA0, A0
+    wmov    AA2, A2
+    rjmp 3f
+
+    ;; Loop the integral part
+
+1:  ;; CC += A * 2^n;  n >= 0
+    add  CC0,A0  $  adc CC1,A1  $  adc  CC2,A2  $  adc  CC3,A3
+
+2:  ;; A <<= 1
+    lsl  A0      $  rol A1      $  rol  A2      $  rol  A3
+
+3:  ;; IBIT(B) >>= 1
+    ;; Carry = n-th bit of B;  n >= 0
+    lsr     B3
+    ror     B2
+    brcs 1b
+    sbci    B3, 0
+    brne 2b
+
+    ;; Loop the fractional part
+    ;; B2/B3 is 0 now, use as guard bits for rounding
+    ;; Restore multiplicand
+    wmov    A0, AA0
+    wmov    A2, AA2
+    rjmp 5f
+
+4:  ;; CC += A:Guard * 2^n;  n < 0
+    add  B3,B2 $  adc  CC0,A0  $  adc  CC1,A1  $  adc  CC2,A2  $  adc  CC3,A3
+5:
+    ;; A:Guard >>= 1
+    lsr  A3   $  ror  A2  $  ror  A1  $  ror   A0  $   ror  B2
+
+    ;; FBIT(B) <<= 1
+    ;; Carry = n-th bit of B;  n < 0
+    lsl     B0
+    rol     B1
+    brcs 4b
+    sbci    B0, 0
+    brne 5b
+
+    ;; Save guard bits and set carry for rounding
+    push    B3
+    lsl     B3
+    ;; Move result into place
+    wmov    C2, CC2
+    wmov    C0, CC0
+    clr     __zero_reg__
+    brtc 6f
+    ;; Round iff T = 1
+    adc     C0, __zero_reg__
+    adc     C1, __zero_reg__
+    adc     C2, __zero_reg__
+    adc     C3, __zero_reg__
+6:
+    pop     GUARD
+    ;; Epilogue
+    pop     CC3
+    pop     CC2
+    ret
+ENDF __mulusa3_round
+#endif  /* L_mulusa3 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef AA0
+#undef AA1
+#undef AA2
+#undef AA3
+#undef CC0
+#undef CC1
+#undef CC2
+#undef CC3
+
+#endif /* __AVR_HAVE_MUL__ */
+
+#undef GUARD
+
+/***********************************************************
+    Fixed  unsigned saturated Multiplication  8.8 x 8.8
+***********************************************************/
+
+#define C0  22
+#define C1  C0+1
+#define C2  C0+2
+#define C3  C0+3
+#define SS __tmp_reg__
+
+#if defined (L_usmuluha3)
+DEFUN __usmuluha3
+    ;; Widening multiply
+#ifdef __AVR_HAVE_MUL__
+    ;; Adjust interface
+    movw    R26, R22
+    movw    R18, R24
+#endif /* HAVE MUL */
+    XCALL   __umulhisi3
+    tst     C3
+    brne .Lmax
+    ;; Round, target is in C1..C2
+    lsl     C0
+    adc     C1, __zero_reg__
+    adc     C2, __zero_reg__
+    brcs .Lmax
+    ;; Move result into place
+    mov     C3, C2
+    mov     C2, C1
+    ret
+.Lmax:
+    ;; Saturate
+    ldi     C2, 0xff
+    ldi     C3, 0xff
+    ret
+ENDF  __usmuluha3
+#endif /* L_usmuluha3 */
+
+/***********************************************************
+    Fixed signed saturated Multiplication  s8.7 x s8.7
+***********************************************************/
+
+#if defined (L_ssmulha3)
+DEFUN __ssmulha3
+    ;; Widening multiply
+#ifdef __AVR_HAVE_MUL__
+    ;; Adjust interface
+    movw    R26, R22
+    movw    R18, R24
+#endif /* HAVE MUL */
+    XCALL   __mulhisi3
+    ;; Adjust decimal point
+    lsl     C0
+    rol     C1
+    rol     C2
+    brvs .LsatC3.3
+    ;; The 9 MSBs must be the same
+    rol     C3
+    sbc     SS, SS
+    cp      C3, SS
+    brne .LsatSS
+    ;; Round
+    lsl     C0
+    adc     C1, __zero_reg__
+    adc     C2, __zero_reg__
+    brvs .Lmax
+    ;; Move result into place
+    mov    C3, C2
+    mov    C2, C1
+    ret
+.Lmax:
+    ;; Load 0x7fff
+    clr     C3
+.LsatC3.3:
+    ;; C3 <  0 -->  0x8000
+    ;; C3 >= 0 -->  0x7fff
+    mov     SS, C3
+.LsatSS:
+    ;; Load min / max value:
+    ;; SS = -1  -->  0x8000
+    ;; SS =  0  -->  0x7fff
+    ldi     C3, 0x7f
+    ldi     C2, 0xff
+    sbrc    SS, 7
+    adiw    C2, 1
+    ret
+ENDF  __ssmulha3
+#endif /* L_ssmulha3 */
+
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef SS
+
+/***********************************************************
+    Fixed  unsigned saturated Multiplication  16.16 x 16.16
+***********************************************************/
+
+#define C0  18
+#define C1  C0+1
+#define C2  C0+2
+#define C3  C0+3
+#define C4  C0+4
+#define C5  C0+5
+#define C6  C0+6
+#define C7  C0+7
+#define SS __tmp_reg__
+
+#if defined (L_usmulusa3)
+;; R22[4] = R22[4] *{ssat} R18[4]
+;; Ordinary ABI function
+DEFUN __usmulusa3
+    ;; Widening multiply
+    XCALL   __umulsidi3
+    or      C7, C6
+    brne .Lmax
+    ;; Round, target is in C2..C5
+    lsl     C1
+    adc     C2, __zero_reg__
+    adc     C3, __zero_reg__
+    adc     C4, __zero_reg__
+    adc     C5, __zero_reg__
+    brcs .Lmax
+    ;; Move result into place
+    wmov    C6, C4
+    wmov    C4, C2
+    ret
+.Lmax:
+    ;; Saturate
+    ldi     C7, 0xff
+    ldi     C6, 0xff
+    wmov    C4, C6
+    ret
+ENDF  __usmulusa3
+#endif /* L_usmulusa3 */
+
+/***********************************************************
+    Fixed signed saturated Multiplication  s16.15 x s16.15
+***********************************************************/
+
+#if defined (L_ssmulsa3)
+;; R22[4] = R22[4] *{ssat} R18[4]
+;; Ordinary ABI function
+DEFUN __ssmulsa3
+    ;; Widening multiply
+    XCALL   __mulsidi3
+    ;; Adjust decimal point
+    lsl     C1
+    rol     C2
+    rol     C3
+    rol     C4
+    rol     C5
+    brvs .LsatC7.7
+    ;; The 17 MSBs must be the same
+    rol     C6
+    rol     C7
+    sbc     SS, SS
+    cp      C6, SS
+    cpc     C7, SS
+    brne .LsatSS
+    ;; Round
+    lsl     C1
+    adc     C2, __zero_reg__
+    adc     C3, __zero_reg__
+    adc     C4, __zero_reg__
+    adc     C5, __zero_reg__
+    brvs .Lmax
+    ;; Move result into place
+    wmov    C6, C4
+    wmov    C4, C2
+    ret
+
+.Lmax:
+    ;; Load 0x7fffffff
+    clr     C7
+.LsatC7.7:
+    ;; C7 <  0 -->  0x80000000
+    ;; C7 >= 0 -->  0x7fffffff
+    lsl     C7
+    sbc     SS, SS
+.LsatSS:
+    ;; Load min / max value:
+    ;; SS = -1  -->  0x80000000
+    ;; SS =  0  -->  0x7fffffff
+    com     SS
+    mov     C4, SS
+    mov     C5, C4
+    wmov    C6, C4
+    subi    C7, 0x80
+    ret
+ENDF  __ssmulsa3
+#endif /* L_ssmulsa3 */
+
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef C4
+#undef C5
+#undef C6
+#undef C7
+#undef SS
+
+/*******************************************************
+      Fractional Division 8 / 8
+*******************************************************/
+
+#define r_divd  r25     /* dividend */
+#define r_quo   r24     /* quotient */
+#define r_div   r22     /* divisor */
+#define r_sign  __tmp_reg__
+
+#if defined (L_divqq3)
+DEFUN   __divqq3
+    mov     r_sign, r_divd
+    eor     r_sign, r_div
+    sbrc    r_div, 7
+    neg     r_div
+    sbrc    r_divd, 7
+    neg     r_divd
+    XCALL   __divqq_helper
+    lsr     r_quo
+    sbrc    r_sign, 7   ; negate result if needed
+    neg     r_quo
+    ret
+ENDF __divqq3
+#endif  /* L_divqq3 */
+
+#if defined (L_udivuqq3)
+DEFUN   __udivuqq3
+    cp      r_divd, r_div
+    brsh    0f
+    XJMP __divqq_helper
+    ;; Result is out of [0, 1)  ==>  Return 1 - eps.
+0:  ldi     r_quo, 0xff
+    ret
+ENDF __udivuqq3
+#endif  /* L_udivuqq3 */
+
+
+#if defined (L_divqq_helper)
+DEFUN   __divqq_helper
+    clr     r_quo           ; clear quotient
+    inc     __zero_reg__    ; init loop counter, used per shift
+__udivuqq3_loop:
+    lsl     r_divd          ; shift dividend
+    brcs    0f              ; dividend overflow
+    cp      r_divd,r_div    ; compare dividend & divisor
+    brcc    0f              ; dividend >= divisor
+    rol     r_quo           ; shift quotient (with CARRY)
+    rjmp    __udivuqq3_cont
+0:
+    sub     r_divd,r_div    ; restore dividend
+    lsl     r_quo           ; shift quotient (without CARRY)
+__udivuqq3_cont:
+    lsl     __zero_reg__    ; shift loop-counter bit
+    brne    __udivuqq3_loop
+    com     r_quo           ; complement result
+                            ; because C flag was complemented in loop
+    ret
+ENDF __divqq_helper
+#endif  /* L_divqq_helper */
+
+#undef  r_divd
+#undef  r_quo
+#undef  r_div
+#undef  r_sign
+
+
+/*******************************************************
+    Fractional Division 16 / 16
+*******************************************************/
+#define r_divdL 26     /* dividend Low */
+#define r_divdH 27     /* dividend Hig */
+#define r_quoL  24     /* quotient Low */
+#define r_quoH  25     /* quotient High */
+#define r_divL  22     /* divisor */
+#define r_divH  23     /* divisor */
+#define r_cnt   21
+
+#if defined (L_divhq3)
+DEFUN   __divhq3
+    mov     r0, r_divdH
+    eor     r0, r_divH
+    sbrs    r_divH, 7
+    rjmp    1f
+    NEG2    r_divL
+1:
+    sbrs    r_divdH, 7
+    rjmp    2f
+    NEG2    r_divdL
+2:
+    cp      r_divdL, r_divL
+    cpc     r_divdH, r_divH
+    breq    __divhq3_minus1  ; if equal return -1
+    XCALL   __udivuhq3
+    lsr     r_quoH
+    ror     r_quoL
+    brpl    9f
+    ;; negate result if needed
+    NEG2    r_quoL
+9:
+    ret
+__divhq3_minus1:
+    ldi     r_quoH, 0x80
+    clr     r_quoL
+    ret
+ENDF __divhq3
+#endif  /* defined (L_divhq3) */
+
+#if defined (L_udivuhq3)
+DEFUN   __udivuhq3
+    sub     r_quoH,r_quoH   ; clear quotient and carry
+    ;; FALLTHRU
+ENDF __udivuhq3
+
+DEFUN   __udivuha3_common
+    clr     r_quoL          ; clear quotient
+    ldi     r_cnt,16        ; init loop counter
+__udivuhq3_loop:
+    rol     r_divdL         ; shift dividend (with CARRY)
+    rol     r_divdH
+    brcs    __udivuhq3_ep   ; dividend overflow
+    cp      r_divdL,r_divL  ; compare dividend & divisor
+    cpc     r_divdH,r_divH
+    brcc    __udivuhq3_ep   ; dividend >= divisor
+    rol     r_quoL          ; shift quotient (with CARRY)
+    rjmp    __udivuhq3_cont
+__udivuhq3_ep:
+    sub     r_divdL,r_divL  ; restore dividend
+    sbc     r_divdH,r_divH
+    lsl     r_quoL          ; shift quotient (without CARRY)
+__udivuhq3_cont:
+    rol     r_quoH          ; shift quotient
+    dec     r_cnt           ; decrement loop counter
+    brne    __udivuhq3_loop
+    com     r_quoL          ; complement result
+    com     r_quoH          ; because C flag was complemented in loop
+    ret
+ENDF __udivuha3_common
+#endif  /* defined (L_udivuhq3) */
+
+/*******************************************************
+    Fixed Division 8.8 / 8.8
+*******************************************************/
+#if defined (L_divha3)
+DEFUN   __divha3
+    mov     r0, r_divdH
+    eor     r0, r_divH
+    sbrs    r_divH, 7
+    rjmp    1f
+    NEG2    r_divL
+1:
+    sbrs    r_divdH, 7
+    rjmp    2f
+    NEG2    r_divdL
+2:
+    XCALL   __udivuha3
+    lsr     r_quoH  ; adjust to 7 fractional bits
+    ror     r_quoL
+    sbrs    r0, 7   ; negate result if needed
+    ret
+    NEG2    r_quoL
+    ret
+ENDF __divha3
+#endif  /* defined (L_divha3) */
+
+#if defined (L_udivuha3)
+DEFUN   __udivuha3
+    mov     r_quoH, r_divdL
+    mov     r_divdL, r_divdH
+    clr     r_divdH
+    lsl     r_quoH     ; shift quotient into carry
+    XJMP    __udivuha3_common ; same as fractional after rearrange
+ENDF __udivuha3
+#endif  /* defined (L_udivuha3) */
+
+#undef  r_divdL
+#undef  r_divdH
+#undef  r_quoL
+#undef  r_quoH
+#undef  r_divL
+#undef  r_divH
+#undef  r_cnt
+
+/*******************************************************
+    Fixed Division 16.16 / 16.16
+*******************************************************/
+
+#define r_arg1L  24    /* arg1 gets passed already in place */
+#define r_arg1H  25
+#define r_arg1HL 26
+#define r_arg1HH 27
+#define r_divdL  26    /* dividend Low */
+#define r_divdH  27
+#define r_divdHL 30
+#define r_divdHH 31    /* dividend High */
+#define r_quoL   22    /* quotient Low */
+#define r_quoH   23
+#define r_quoHL  24
+#define r_quoHH  25    /* quotient High */
+#define r_divL   18    /* divisor Low */
+#define r_divH   19
+#define r_divHL  20
+#define r_divHH  21    /* divisor High */
+#define r_cnt  __zero_reg__  /* loop count (0 after the loop!) */
+
+#if defined (L_divsa3)
+DEFUN   __divsa3
+    mov     r0, r_arg1HH
+    eor     r0, r_divHH
+    sbrs    r_divHH, 7
+    rjmp    1f
+    NEG4    r_divL
+1:
+    sbrs    r_arg1HH, 7
+    rjmp    2f
+    NEG4    r_arg1L
+2:
+    XCALL   __udivusa3
+    lsr     r_quoHH ; adjust to 15 fractional bits
+    ror     r_quoHL
+    ror     r_quoH
+    ror     r_quoL
+    sbrs    r0, 7   ; negate result if needed
+    ret
+    ;; negate r_quoL
+    XJMP    __negsi2
+ENDF __divsa3
+#endif  /* defined (L_divsa3) */
+
+#if defined (L_udivusa3)
+DEFUN   __udivusa3
+    ldi     r_divdHL, 32    ; init loop counter
+    mov     r_cnt, r_divdHL
+    clr     r_divdHL
+    clr     r_divdHH
+    wmov    r_quoL, r_divdHL
+    lsl     r_quoHL         ; shift quotient into carry
+    rol     r_quoHH
+__udivusa3_loop:
+    rol     r_divdL         ; shift dividend (with CARRY)
+    rol     r_divdH
+    rol     r_divdHL
+    rol     r_divdHH
+    brcs    __udivusa3_ep   ; dividend overflow
+    cp      r_divdL,r_divL  ; compare dividend & divisor
+    cpc     r_divdH,r_divH
+    cpc     r_divdHL,r_divHL
+    cpc     r_divdHH,r_divHH
+    brcc    __udivusa3_ep   ; dividend >= divisor
+    rol     r_quoL          ; shift quotient (with CARRY)
+    rjmp    __udivusa3_cont
+__udivusa3_ep:
+    sub     r_divdL,r_divL  ; restore dividend
+    sbc     r_divdH,r_divH
+    sbc     r_divdHL,r_divHL
+    sbc     r_divdHH,r_divHH
+    lsl     r_quoL          ; shift quotient (without CARRY)
+__udivusa3_cont:
+    rol     r_quoH          ; shift quotient
+    rol     r_quoHL
+    rol     r_quoHH
+    dec     r_cnt           ; decrement loop counter
+    brne    __udivusa3_loop
+    com     r_quoL          ; complement result
+    com     r_quoH          ; because C flag was complemented in loop
+    com     r_quoHL
+    com     r_quoHH
+    ret
+ENDF __udivusa3
+#endif  /* defined (L_udivusa3) */
+
+#undef  r_arg1L
+#undef  r_arg1H
+#undef  r_arg1HL
+#undef  r_arg1HH
+#undef  r_divdL
+#undef  r_divdH
+#undef  r_divdHL
+#undef  r_divdHH
+#undef  r_quoL
+#undef  r_quoH
+#undef  r_quoHL
+#undef  r_quoHH
+#undef  r_divL
+#undef  r_divH
+#undef  r_divHL
+#undef  r_divHH
+#undef  r_cnt
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Saturation, 1 Byte
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; First Argument and Return Register
+#define A0  24
+
+#if defined (L_ssabs_1)
+DEFUN __ssabs_1
+    sbrs    A0, 7
+    ret
+    neg     A0
+    sbrc    A0,7
+    dec     A0
+    ret
+ENDF __ssabs_1
+#endif /* L_ssabs_1 */
+
+#undef A0
+
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Saturation, 2 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; First Argument and Return Register
+#define A0  24
+#define A1  A0+1
+
+#if defined (L_ssneg_2)
+DEFUN __ssneg_2
+    NEG2    A0
+    brvc 0f
+    sbiw    A0, 1
+0:  ret
+ENDF __ssneg_2
+#endif /* L_ssneg_2 */
+
+#if defined (L_ssabs_2)
+DEFUN __ssabs_2
+    sbrs    A1, 7
+    ret
+    XJMP    __ssneg_2
+ENDF __ssabs_2
+#endif /* L_ssabs_2 */
+
+#undef A0
+#undef A1
+
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Saturation, 4 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; First Argument and Return Register
+#define A0  22
+#define A1  A0+1
+#define A2  A0+2
+#define A3  A0+3
+
+#if defined (L_ssneg_4)
+DEFUN __ssneg_4
+    XCALL   __negsi2
+    brvc 0f
+    ldi     A3, 0x7f
+    ldi     A2, 0xff
+    ldi     A1, 0xff
+    ldi     A0, 0xff
+0:  ret
+ENDF __ssneg_4
+#endif /* L_ssneg_4 */
+
+#if defined (L_ssabs_4)
+DEFUN __ssabs_4
+    sbrs    A3, 7
+    ret
+    XJMP    __ssneg_4
+ENDF __ssabs_4
+#endif /* L_ssabs_4 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Saturation, 8 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; First Argument and Return Register
+#define A0  18
+#define A1  A0+1
+#define A2  A0+2
+#define A3  A0+3
+#define A4  A0+4
+#define A5  A0+5
+#define A6  A0+6
+#define A7  A0+7
+
+#if defined (L_clr_8)
+FALIAS __usneguta2
+FALIAS __usneguda2
+FALIAS __usnegudq2
+
+;; Clear Carry and all Bytes
+DEFUN __clr_8
+    ;; Clear Carry and set Z
+    sub     A7, A7
+    ;; FALLTHRU
+ENDF  __clr_8
+;; Propagate Carry to all Bytes, Carry unaltered
+DEFUN __sbc_8
+    sbc     A7, A7
+    sbc     A6, A6
+    wmov    A4, A6
+    wmov    A2, A6
+    wmov    A0, A6
+    ret
+ENDF __sbc_8
+#endif /* L_clr_8 */
+
+#if defined (L_ssneg_8)
+FALIAS __ssnegta2
+FALIAS __ssnegda2
+FALIAS __ssnegdq2
+
+DEFUN __ssneg_8
+    XCALL   __negdi2
+    brvc 0f
+    ;; A[] = 0x7fffffff
+    sec
+    XCALL   __sbc_8
+    ldi     A7, 0x7f
+0:  ret
+ENDF __ssneg_8
+#endif /* L_ssneg_8 */
+
+#if defined (L_ssabs_8)
+FALIAS __ssabsta2
+FALIAS __ssabsda2
+FALIAS __ssabsdq2
+
+DEFUN __ssabs_8
+    sbrs    A7, 7
+    ret
+    XJMP    __ssneg_8
+ENDF __ssabs_8
+#endif /* L_ssabs_8 */
+
+;; Second Argument
+#define B0  10
+#define B1  B0+1
+#define B2  B0+2
+#define B3  B0+3
+#define B4  B0+4
+#define B5  B0+5
+#define B6  B0+6
+#define B7  B0+7
+
+#if defined (L_usadd_8)
+FALIAS __usadduta3
+FALIAS __usadduda3
+FALIAS __usaddudq3
+
+DEFUN __usadd_8
+    XCALL   __adddi3
+    brcs 0f
+    ret
+0:  ;; A[] = 0xffffffff
+    XJMP    __sbc_8
+ENDF __usadd_8
+#endif /* L_usadd_8 */
+
+#if defined (L_ussub_8)
+FALIAS __ussubuta3
+FALIAS __ussubuda3
+FALIAS __ussubudq3
+
+DEFUN __ussub_8
+    XCALL   __subdi3
+    brcs 0f
+    ret
+0:  ;; A[] = 0
+    XJMP    __clr_8
+ENDF __ussub_8
+#endif /* L_ussub_8 */
+
+#if defined (L_ssadd_8)
+FALIAS __ssaddta3
+FALIAS __ssaddda3
+FALIAS __ssadddq3
+
+DEFUN __ssadd_8
+    XCALL   __adddi3
+    brvc 0f
+    ;; A = (B >= 0) ? INT64_MAX : INT64_MIN
+    cpi     B7, 0x80
+    XCALL   __sbc_8
+    subi    A7, 0x80
+0:  ret
+ENDF __ssadd_8
+#endif /* L_ssadd_8 */
+
+#if defined (L_sssub_8)
+FALIAS __sssubta3
+FALIAS __sssubda3
+FALIAS __sssubdq3
+
+DEFUN __sssub_8
+    XCALL   __subdi3
+    brvc 0f
+    ;; A = (B < 0) ? INT64_MAX : INT64_MIN
+    ldi     A7, 0x7f
+    cp      A7, B7
+    XCALL   __sbc_8
+    subi    A7, 0x80
+0:  ret
+ENDF __sssub_8
+#endif /* L_sssub_8 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef A4
+#undef A5
+#undef A6
+#undef A7
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef B4
+#undef B5
+#undef B6
+#undef B7
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Rounding Helpers
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#ifdef L_mask1
+
+#define AA 24
+#define CC 25
+
+;; R25 = 1 << (R24 & 7)
+;; CC  = 1 << (AA  & 7)
+;; Clobbers: None
+DEFUN __mask1
+    ;; CC = 2 ^ AA.1
+    ldi     CC, 1 << 2
+    sbrs    AA, 1
+    ldi     CC, 1 << 0
+    ;; CC *= 2 ^ AA.0
+    sbrc    AA, 0
+    lsl     CC
+    ;; CC *= 2 ^ AA.2
+    sbrc    AA, 2
+    swap    CC
+    ret
+ENDF __mask1
+
+#undef AA
+#undef CC
+#endif /* L_mask1 */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; The rounding point. Any bits smaller than
+;; 2^{-RP} will be cleared.
+#define RP R24
+
+#define A0 22
+#define A1 A0 + 1
+
+#define C0 24
+#define C1 C0 + 1
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Rounding, 1 Byte
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#ifdef L_roundqq3
+
+;; R24 = round (R22, R24)
+;; Clobbers: R22, __tmp_reg__
+DEFUN  __roundqq3
+    mov     __tmp_reg__, C1
+    subi    RP, __QQ_FBIT__ - 1
+    neg     RP
+    ;; R25 = 1 << RP  (Total offset is FBIT-1 - RP)
+    XCALL   __mask1
+    mov     C0, C1
+    ;; Add-Saturate 2^{-RP-1}
+    add     A0, C0
+    brvc 0f
+    ldi     C0, 0x7f
+    rjmp 9f
+0:  ;; Mask out bits beyond RP
+    lsl     C0
+    neg     C0
+    and     C0, A0
+9:  mov     C1, __tmp_reg__
+    ret
+ENDF  __roundqq3
+#endif /* L_roundqq3 */
+
+#ifdef L_rounduqq3
+
+;; R24 = round (R22, R24)
+;; Clobbers: R22, __tmp_reg__
+DEFUN  __rounduqq3
+    mov     __tmp_reg__, C1
+    subi    RP, __UQQ_FBIT__ - 1
+    neg     RP
+    ;; R25 = 1 << RP  (Total offset is FBIT-1 - RP)
+    XCALL   __mask1
+    mov     C0, C1
+    ;; Add-Saturate 2^{-RP-1}
+    add     A0, C0
+    brcc 0f
+    ldi     C0, 0xff
+    rjmp 9f
+0:  ;; Mask out bits beyond RP
+    lsl     C0
+    neg     C0
+    and     C0, A0
+9:  mov     C1, __tmp_reg__
+    ret
+ENDF  __rounduqq3
+#endif /* L_rounduqq3 */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Rounding, 2 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#ifdef L_addmask_2
+
+;; [ R25:R24 =  1 << (R24 & 15)
+;;   R23:R22 += 1 << (R24 & 15) ]
+;; SREG is set according to the addition
+DEFUN __addmask_2
+    ;; R25 = 1 << (R24 & 7)
+    XCALL   __mask1
+    cpi     RP, 1 << 3
+    sbc     C0, C0
+    ;; Swap C0 and C1 if RP.3 was set
+    and     C0, C1
+    eor     C1, C0
+    ;; Finally, add the power-of-two:  A[] += C[]
+    add     A0, C0
+    adc     A1, C1
+    ret
+ENDF  __addmask_2
+#endif /* L_addmask_2 */
+
+#ifdef L_round_s2
+
+;; R25:R24 = round (R23:R22, R24)
+;; Clobbers: R23, R22
+DEFUN  __roundhq3
+    subi    RP, __HQ_FBIT__ - __HA_FBIT__
+ENDF   __roundhq3
+DEFUN  __roundha3
+    subi    RP, __HA_FBIT__ - 1
+    neg     RP
+    ;; [ R25:R24  = 1 << (FBIT-1 - RP)
+    ;;   R23:R22 += 1 << (FBIT-1 - RP) ]
+    XCALL   __addmask_2
+    XJMP    __round_s2_const
+ENDF  __roundha3
+
+#endif /* L_round_s2 */
+
+#ifdef L_round_u2
+
+;; R25:R24 = round (R23:R22, R24)
+;; Clobbers: R23, R22
+DEFUN  __rounduhq3
+    subi    RP, __UHQ_FBIT__ - __UHA_FBIT__
+ENDF   __rounduhq3
+DEFUN  __rounduha3
+    subi    RP, __UHA_FBIT__ - 1
+    neg     RP
+    ;; [ R25:R24  = 1 << (FBIT-1 - RP)
+    ;;   R23:R22 += 1 << (FBIT-1 - RP) ]
+    XCALL   __addmask_2
+    XJMP    __round_u2_const 
+ENDF  __rounduha3
+
+#endif /* L_round_u2 */
+
+
+#ifdef L_round_2_const
+
+;; Helpers for 2 byte wide rounding
+
+DEFUN  __round_s2_const
+    brvc 2f
+    ldi     C1, 0x7f
+    rjmp 1f
+    ;; FALLTHRU (Barrier)
+ENDF  __round_s2_const
+
+DEFUN __round_u2_const
+    brcc 2f
+    ldi     C1, 0xff
+1:
+    ldi     C0, 0xff
+    rjmp 9f
+2:
+    ;; Saturation is performed now.
+    ;; Currently, we have C[] = 2^{-RP-1}
+    ;; C[] = 2^{-RP}
+    lsl     C0
+    rol     C1
+    ;;      
+    NEG2    C0
+    ;; Clear the bits beyond the rounding point.
+    and     C0, A0
+    and     C1, A1
+9:  ret
+ENDF  __round_u2_const
+
+#endif /* L_round_2_const */
+
+#undef A0
+#undef A1
+#undef C0
+#undef C1
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Rounding, 4 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#define A0 18
+#define A1 A0 + 1
+#define A2 A0 + 2
+#define A3 A0 + 3
+
+#define C0 22
+#define C1 C0 + 1
+#define C2 C0 + 2
+#define C3 C0 + 3
+
+#ifdef L_addmask_4
+
+;; [ R25:R22 =  1 << (R24 & 31)
+;;   R21:R18 += 1 << (R24 & 31) ]
+;; SREG is set according to the addition
+DEFUN __addmask_4
+    ;; R25 = 1 << (R24 & 7)
+    XCALL   __mask1
+    cpi     RP, 1 << 4
+    sbc     C0, C0
+    sbc     C1, C1
+    ;; Swap C2 with C3 if RP.3 is not set
+    cpi     RP, 1 << 3
+    sbc     C2, C2
+    and     C2, C3
+    eor     C3, C2
+    ;; Swap C3:C2 with C1:C0 if RP.4 is not set
+    and     C0, C2  $  eor     C2, C0
+    and     C1, C3  $  eor     C3, C1
+    ;; Finally, add the power-of-two:  A[] += C[]
+    add     A0, C0
+    adc     A1, C1
+    adc     A2, C2
+    adc     A3, C3
+    ret
+ENDF  __addmask_4
+#endif /* L_addmask_4 */
+
+#ifdef L_round_s4
+
+;; R25:R22 = round (R21:R18, R24)
+;; Clobbers: R18...R21
+DEFUN  __roundsq3
+    subi    RP, __SQ_FBIT__ - __SA_FBIT__
+ENDF   __roundsq3
+DEFUN  __roundsa3
+    subi    RP, __SA_FBIT__ - 1
+    neg     RP
+    ;; [ R25:R22  = 1 << (FBIT-1 - RP)
+    ;;   R21:R18 += 1 << (FBIT-1 - RP) ]
+    XCALL   __addmask_4
+    XJMP    __round_s4_const
+ENDF  __roundsa3
+
+#endif /* L_round_s4 */
+
+#ifdef L_round_u4
+
+;; R25:R22 = round (R21:R18, R24)
+;; Clobbers: R18...R21
+DEFUN  __roundusq3
+    subi    RP, __USQ_FBIT__ - __USA_FBIT__
+ENDF   __roundusq3
+DEFUN  __roundusa3
+    subi    RP, __USA_FBIT__ - 1
+    neg     RP
+    ;; [ R25:R22  = 1 << (FBIT-1 - RP)
+    ;;   R21:R18 += 1 << (FBIT-1 - RP) ]
+    XCALL   __addmask_4
+    XJMP    __round_u4_const 
+ENDF  __roundusa3
+
+#endif /* L_round_u4 */
+
+
+#ifdef L_round_4_const
+
+;; Helpers for 4 byte wide rounding
+
+DEFUN  __round_s4_const
+    brvc 2f
+    ldi     C3, 0x7f
+    rjmp 1f
+    ;; FALLTHRU (Barrier)
+ENDF  __round_s4_const
+
+DEFUN __round_u4_const
+    brcc 2f
+    ldi     C3, 0xff
+1:
+    ldi     C2, 0xff
+    ldi     C1, 0xff
+    ldi     C0, 0xff
+    rjmp 9f
+2:
+    ;; Saturation is performed now.
+    ;; Currently, we have C[] = 2^{-RP-1}
+    ;; C[] = 2^{-RP}
+    lsl     C0
+    rol     C1
+    rol     C2
+    rol     C3
+    XCALL   __negsi2
+    ;; Clear the bits beyond the rounding point.
+    and     C0, A0
+    and     C1, A1
+    and     C2, A2
+    and     C3, A3
+9:  ret
+ENDF  __round_u4_const
+
+#endif /* L_round_4_const */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+
+#undef RP
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Rounding, 8 Bytes
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+#define RP     16
+#define FBITm1 31
+
+#define C0 18
+#define C1 C0 + 1
+#define C2 C0 + 2
+#define C3 C0 + 3
+#define C4 C0 + 4
+#define C5 C0 + 5
+#define C6 C0 + 6
+#define C7 C0 + 7
+
+#define A0 16
+#define A1 17
+#define A2 26
+#define A3 27
+#define A4 28
+#define A5 29
+#define A6 30
+#define A7 31
+
+
+#ifdef L_rounddq3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __rounddq3
+    ldi     FBITm1, __DQ_FBIT__ - 1
+    clt
+    XJMP    __round_x8
+ENDF  __rounddq3
+#endif /* L_rounddq3 */
+
+#ifdef L_roundudq3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __roundudq3
+    ldi     FBITm1, __UDQ_FBIT__ - 1
+    set
+    XJMP    __round_x8
+ENDF  __roundudq3
+#endif /* L_roundudq3 */
+
+#ifdef L_roundda3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __roundda3
+    ldi     FBITm1, __DA_FBIT__ - 1
+    clt
+    XJMP    __round_x8
+ENDF  __roundda3
+#endif /* L_roundda3 */
+
+#ifdef L_rounduda3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __rounduda3
+    ldi     FBITm1, __UDA_FBIT__ - 1
+    set
+    XJMP    __round_x8
+ENDF  __rounduda3
+#endif /* L_rounduda3 */
+
+#ifdef L_roundta3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __roundta3
+    ldi     FBITm1, __TA_FBIT__ - 1
+    clt
+    XJMP    __round_x8
+ENDF  __roundta3
+#endif /* L_roundta3 */
+
+#ifdef L_rounduta3
+;; R25:R18 = round (R25:R18, R16)
+;; Clobbers: ABI
+DEFUN  __rounduta3
+    ldi     FBITm1, __UTA_FBIT__ - 1
+    set
+    XJMP    __round_x8
+ENDF  __rounduta3
+#endif /* L_rounduta3 */
+
+
+#ifdef L_round_x8
+DEFUN __round_x8
+    push r16
+    push r17
+    push r28
+    push r29
+    ;; Compute log2 of addend from rounding point
+    sub     RP, FBITm1
+    neg     RP
+    ;; Move input to work register A[]
+    push    C0
+    mov     A1, C1
+    wmov    A2, C2
+    wmov    A4, C4
+    wmov    A6, C6
+    ;; C[] = 1 << (FBIT-1 - RP)
+    XCALL   __clr_8
+    inc     C0
+    XCALL   __ashldi3
+    pop     A0
+    ;; A[] += C[]
+    add     A0, C0
+    adc     A1, C1
+    adc     A2, C2
+    adc     A3, C3
+    adc     A4, C4
+    adc     A5, C5
+    adc     A6, C6
+    adc     A7, C7
+    brts    1f
+    ;; Signed
+    brvc    3f
+    ;; Signed overflow: A[] = 0x7f...
+    brvs    2f
+1:  ;; Unsigned
+    brcc    3f
+    ;; Unsigned overflow: A[] = 0xff...
+2:  ldi     C7, 0xff
+    ldi     C6, 0xff
+    wmov    C0, C6
+    wmov    C2, C6
+    wmov    C4, C6
+    bld     C7, 7
+    rjmp 9f
+3:
+    ;;  C[] = -C[] - C[]
+    push    A0
+    ldi     r16, 1
+    XCALL   __ashldi3
+    pop     A0
+    XCALL   __negdi2
+    ;; Clear the bits beyond the rounding point.
+    and     C0, A0
+    and     C1, A1
+    and     C2, A2
+    and     C3, A3
+    and     C4, A4
+    and     C5, A5
+    and     C6, A6
+    and     C7, A7
+9:  ;; Epilogue
+    pop r29
+    pop r28
+    pop r17
+    pop r16
+    ret
+ENDF  __round_x8
+
+#endif /* L_round_x8 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef A4
+#undef A5
+#undef A6
+#undef A7
+
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef C4
+#undef C5
+#undef C6
+#undef C7
+
+#undef RP
+#undef FBITm1
+
+
+;; Supply implementations / symbols for the bit-banging functions
+;; __builtin_avr_bitsfx and __builtin_avr_fxbits
+#ifdef L_ret
+DEFUN __ret
+    ret
+ENDF  __ret
+#endif /* L_ret */
diff --git a/gcc-4.9/libgcc/config/avr/lib1funcs.S b/gcc-4.9/libgcc/config/avr/lib1funcs.S
new file mode 100644
index 000000000..6f1c77edb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/lib1funcs.S
@@ -0,0 +1,3226 @@
+/*  -*- Mode: Asm -*-  */
+/* Copyright (C) 1998-2014 Free Software Foundation, Inc.
+   Contributed by Denis Chertykov <chertykov@gmail.com>
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define __zero_reg__ r1
+#define __tmp_reg__ r0
+#define __SREG__ 0x3f
+#if defined (__AVR_HAVE_SPH__)
+#define __SP_H__ 0x3e
+#endif
+#define __SP_L__ 0x3d
+#define __RAMPZ__ 0x3B
+#define __EIND__  0x3C
+
+/* Most of the functions here are called directly from avr.md
+   patterns, instead of using the standard libcall mechanisms.
+   This can make better code because GCC knows exactly which
+   of the call-used registers (not all of them) are clobbered.  */
+
+/* FIXME:  At present, there is no SORT directive in the linker
+           script so that we must not assume that different modules
+           in the same input section like .libgcc.text.mul will be
+           located close together.  Therefore, we cannot use
+           RCALL/RJMP to call a function like __udivmodhi4 from
+           __divmodhi4 and have to use lengthy XCALL/XJMP even
+           though they are in the same input section and all same
+           input sections together are small enough to reach every
+           location with a RCALL/RJMP instruction.  */
+
+	.macro	mov_l  r_dest, r_src
+#if defined (__AVR_HAVE_MOVW__)
+	movw	\r_dest, \r_src
+#else
+	mov	\r_dest, \r_src
+#endif
+	.endm
+
+	.macro	mov_h  r_dest, r_src
+#if defined (__AVR_HAVE_MOVW__)
+	; empty
+#else
+	mov	\r_dest, \r_src
+#endif
+	.endm
+
+.macro	wmov  r_dest, r_src
+#if defined (__AVR_HAVE_MOVW__)
+    movw \r_dest,   \r_src
+#else
+    mov \r_dest,    \r_src
+    mov \r_dest+1,  \r_src+1
+#endif
+.endm
+
+#if defined (__AVR_HAVE_JMP_CALL__)
+#define XCALL call
+#define XJMP  jmp
+#else
+#define XCALL rcall
+#define XJMP  rjmp
+#endif
+
+;; Prologue stuff
+
+.macro do_prologue_saves n_pushed n_frame=0
+    ldi r26, lo8(\n_frame)
+    ldi r27, hi8(\n_frame)
+    ldi r30, lo8(gs(.L_prologue_saves.\@))
+    ldi r31, hi8(gs(.L_prologue_saves.\@))
+    XJMP __prologue_saves__ + ((18 - (\n_pushed)) * 2)
+.L_prologue_saves.\@:
+.endm
+
+;; Epilogue stuff
+
+.macro do_epilogue_restores n_pushed n_frame=0
+    in      r28, __SP_L__
+#ifdef __AVR_HAVE_SPH__
+    in      r29, __SP_H__
+.if \n_frame > 63
+    subi    r28, lo8(-\n_frame)
+    sbci    r29, hi8(-\n_frame)
+.elseif \n_frame > 0
+    adiw    r28, \n_frame
+.endif
+#else
+    clr     r29
+.if \n_frame > 0
+    subi    r28, lo8(-\n_frame)
+.endif
+#endif /* HAVE SPH */
+    ldi     r30, \n_pushed
+    XJMP __epilogue_restores__ + ((18 - (\n_pushed)) * 2)
+.endm
+
+;; Support function entry and exit for convenience
+
+.macro DEFUN name
+.global \name
+.func \name
+\name:
+.endm
+
+.macro ENDF name
+.size \name, .-\name
+.endfunc
+.endm
+
+.macro FALIAS name
+.global \name
+.func \name
+\name:
+.size \name, .-\name
+.endfunc
+.endm
+
+;; Skip next instruction, typically a jump target
+#define skip cpse 0,0
+
+;; Negate a 2-byte value held in consecutive registers
+.macro NEG2  reg
+    com     \reg+1
+    neg     \reg
+    sbci    \reg+1, -1
+.endm
+
+;; Negate a 4-byte value held in consecutive registers
+;; Sets the V flag for signed overflow tests if REG >= 16
+.macro NEG4  reg
+    com     \reg+3
+    com     \reg+2
+    com     \reg+1
+.if \reg >= 16
+    neg     \reg
+    sbci    \reg+1, -1
+    sbci    \reg+2, -1
+    sbci    \reg+3, -1
+.else
+    com     \reg
+    adc     \reg,   __zero_reg__
+    adc     \reg+1, __zero_reg__
+    adc     \reg+2, __zero_reg__
+    adc     \reg+3, __zero_reg__
+.endif
+.endm
+
+#define exp_lo(N)  hlo8 ((N) << 23)
+#define exp_hi(N)  hhi8 ((N) << 23)
+
+
+.section .text.libgcc.mul, "ax", @progbits
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+/* Note: mulqi3, mulhi3 are open-coded on the enhanced core.  */
+#if !defined (__AVR_HAVE_MUL__)
+/*******************************************************
+    Multiplication  8 x 8  without MUL
+*******************************************************/
+#if defined (L_mulqi3)
+
+#define	r_arg2	r22		/* multiplicand */
+#define	r_arg1 	r24		/* multiplier */
+#define r_res	__tmp_reg__	/* result */
+
+DEFUN __mulqi3
+	clr	r_res		; clear result
+__mulqi3_loop:
+	sbrc	r_arg1,0
+	add	r_res,r_arg2
+	add	r_arg2,r_arg2	; shift multiplicand
+	breq	__mulqi3_exit	; while multiplicand != 0
+	lsr	r_arg1		;
+	brne	__mulqi3_loop	; exit if multiplier = 0
+__mulqi3_exit:	
+	mov	r_arg1,r_res	; result to return register
+	ret
+ENDF __mulqi3
+
+#undef r_arg2
+#undef r_arg1
+#undef r_res
+	
+#endif 	/* defined (L_mulqi3) */
+
+
+/*******************************************************
+    Widening Multiplication  16 = 8 x 8  without MUL
+    Multiplication  16 x 16  without MUL
+*******************************************************/
+
+#define A0  r22
+#define A1  r23
+#define B0  r24
+#define BB0 r20
+#define B1  r25
+;; Output overlaps input, thus expand result in CC0/1
+#define C0  r24
+#define C1  r25
+#define CC0  __tmp_reg__
+#define CC1  R21
+
+#if defined (L_umulqihi3)
+;;; R25:R24 = (unsigned int) R22 * (unsigned int) R24
+;;; (C1:C0) = (unsigned int) A0  * (unsigned int) B0
+;;; Clobbers: __tmp_reg__, R21..R23
+DEFUN __umulqihi3
+    clr     A1
+    clr     B1
+    XJMP    __mulhi3
+ENDF __umulqihi3
+#endif /* L_umulqihi3 */
+
+#if defined (L_mulqihi3)
+;;; R25:R24 = (signed int) R22 * (signed int) R24
+;;; (C1:C0) = (signed int) A0  * (signed int) B0
+;;; Clobbers: __tmp_reg__, R20..R23
+DEFUN __mulqihi3
+    ;; Sign-extend B0
+    clr     B1
+    sbrc    B0, 7
+    com     B1
+    ;; The multiplication runs twice as fast if A1 is zero, thus:
+    ;; Zero-extend A0
+    clr     A1
+#ifdef __AVR_HAVE_JMP_CALL__
+    ;; Store  B0 * sign of A
+    clr     BB0
+    sbrc    A0, 7
+    mov     BB0, B0
+    call    __mulhi3
+#else /* have no CALL */
+    ;; Skip sign-extension of A if A >= 0
+    ;; Same size as with the first alternative but avoids errata skip
+    ;; and is faster if A >= 0
+    sbrs    A0, 7
+    rjmp    __mulhi3
+    ;; If  A < 0  store B
+    mov     BB0, B0
+    rcall   __mulhi3
+#endif /* HAVE_JMP_CALL */
+    ;; 1-extend A after the multiplication
+    sub     C1, BB0
+    ret
+ENDF __mulqihi3
+#endif /* L_mulqihi3 */
+
+#if defined (L_mulhi3)
+;;; R25:R24 = R23:R22 * R25:R24
+;;; (C1:C0) = (A1:A0) * (B1:B0)
+;;; Clobbers: __tmp_reg__, R21..R23
+DEFUN __mulhi3
+
+    ;; Clear result
+    clr     CC0
+    clr     CC1
+    rjmp 3f
+1:
+    ;; Bit n of A is 1  -->  C += B << n
+    add     CC0, B0
+    adc     CC1, B1
+2:
+    lsl     B0
+    rol     B1
+3:
+    ;; If B == 0 we are ready
+    sbiw    B0, 0
+    breq 9f
+
+    ;; Carry = n-th bit of A
+    lsr     A1
+    ror     A0
+    ;; If bit n of A is set, then go add  B * 2^n  to  C
+    brcs 1b
+
+    ;; Carry = 0  -->  The ROR above acts like  CP A0, 0
+    ;; Thus, it is sufficient to CPC the high part to test A against 0
+    cpc     A1, __zero_reg__
+    ;; Only proceed if A != 0
+    brne    2b
+9:
+    ;; Move Result into place
+    mov     C0, CC0
+    mov     C1, CC1
+    ret
+ENDF  __mulhi3
+#endif /* L_mulhi3 */
+
+#undef A0
+#undef A1
+#undef B0
+#undef BB0
+#undef B1
+#undef C0
+#undef C1
+#undef CC0
+#undef CC1
+
+
+#define A0 22
+#define A1 A0+1
+#define A2 A0+2
+#define A3 A0+3
+
+#define B0 18
+#define B1 B0+1
+#define B2 B0+2
+#define B3 B0+3
+
+#define CC0 26
+#define CC1 CC0+1
+#define CC2 30
+#define CC3 CC2+1
+
+#define C0 22
+#define C1 C0+1
+#define C2 C0+2
+#define C3 C0+3
+
+/*******************************************************
+    Widening Multiplication  32 = 16 x 16  without MUL
+*******************************************************/
+
+#if defined (L_umulhisi3)
+DEFUN __umulhisi3
+    wmov    B0, 24
+    ;; Zero-extend B
+    clr     B2
+    clr     B3
+    ;; Zero-extend A
+    wmov    A2, B2
+    XJMP    __mulsi3
+ENDF __umulhisi3
+#endif /* L_umulhisi3 */
+
+#if defined (L_mulhisi3)
+DEFUN __mulhisi3
+    wmov    B0, 24
+    ;; Sign-extend B
+    lsl     r25
+    sbc     B2, B2
+    mov     B3, B2
+#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+    ;; Sign-extend A
+    clr     A2
+    sbrc    A1, 7
+    com     A2
+    mov     A3, A2
+    XJMP __mulsi3
+#else /*  no __AVR_ERRATA_SKIP_JMP_CALL__ */
+    ;; Zero-extend A and __mulsi3 will run at least twice as fast
+    ;; compared to a sign-extended A.
+    clr     A2
+    clr     A3
+    sbrs    A1, 7
+    XJMP __mulsi3
+    ;; If  A < 0  then perform the  B * 0xffff.... before the
+    ;; very multiplication by initializing the high part of the
+    ;; result CC with -B.
+    wmov    CC2, A2
+    sub     CC2, B0
+    sbc     CC3, B1
+    XJMP __mulsi3_helper
+#endif /*  __AVR_ERRATA_SKIP_JMP_CALL__ */
+ENDF __mulhisi3
+#endif /* L_mulhisi3 */
+
+
+/*******************************************************
+    Multiplication  32 x 32  without MUL
+*******************************************************/
+
+#if defined (L_mulsi3)
+DEFUN __mulsi3
+    ;; Clear result
+    clr     CC2
+    clr     CC3
+    ;; FALLTHRU
+ENDF  __mulsi3
+
+DEFUN __mulsi3_helper
+    clr     CC0
+    clr     CC1
+    rjmp 3f
+
+1:  ;; If bit n of A is set, then add  B * 2^n  to the result in CC
+    ;; CC += B
+    add  CC0,B0  $  adc  CC1,B1  $  adc  CC2,B2  $  adc  CC3,B3
+
+2:  ;; B <<= 1
+    lsl  B0      $  rol  B1      $  rol  B2      $  rol  B3
+
+3:  ;; A >>= 1:  Carry = n-th bit of A
+    lsr  A3      $  ror  A2      $  ror  A1      $  ror  A0
+
+    brcs 1b
+    ;; Only continue if  A != 0
+    sbci    A1, 0
+    brne 2b
+    sbiw    A2, 0
+    brne 2b
+
+    ;; All bits of A are consumed:  Copy result to return register C
+    wmov    C0, CC0
+    wmov    C2, CC2
+    ret
+ENDF __mulsi3_helper
+#endif /* L_mulsi3 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef CC0
+#undef CC1
+#undef CC2
+#undef CC3
+
+#endif /* !defined (__AVR_HAVE_MUL__) */
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+#if defined (__AVR_HAVE_MUL__)
+#define A0 26
+#define B0 18
+#define C0 22
+
+#define A1 A0+1
+
+#define B1 B0+1
+#define B2 B0+2
+#define B3 B0+3
+
+#define C1 C0+1
+#define C2 C0+2
+#define C3 C0+3
+
+/*******************************************************
+    Widening Multiplication  32 = 16 x 16  with MUL
+*******************************************************/
+
+#if defined (L_mulhisi3)
+;;; R25:R22 = (signed long) R27:R26 * (signed long) R19:R18
+;;; C3:C0   = (signed long) A1:A0   * (signed long) B1:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __mulhisi3
+    XCALL   __umulhisi3
+    ;; Sign-extend B
+    tst     B1
+    brpl    1f
+    sub     C2, A0
+    sbc     C3, A1
+1:  ;; Sign-extend A
+    XJMP __usmulhisi3_tail
+ENDF __mulhisi3
+#endif /* L_mulhisi3 */
+
+#if defined (L_usmulhisi3)
+;;; R25:R22 = (signed long) R27:R26 * (unsigned long) R19:R18
+;;; C3:C0   = (signed long) A1:A0   * (unsigned long) B1:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __usmulhisi3
+    XCALL   __umulhisi3
+    ;; FALLTHRU
+ENDF __usmulhisi3
+
+DEFUN __usmulhisi3_tail
+    ;; Sign-extend A
+    sbrs    A1, 7
+    ret
+    sub     C2, B0
+    sbc     C3, B1
+    ret
+ENDF __usmulhisi3_tail
+#endif /* L_usmulhisi3 */
+
+#if defined (L_umulhisi3)
+;;; R25:R22 = (unsigned long) R27:R26 * (unsigned long) R19:R18
+;;; C3:C0   = (unsigned long) A1:A0   * (unsigned long) B1:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __umulhisi3
+    mul     A0, B0
+    movw    C0, r0
+    mul     A1, B1
+    movw    C2, r0
+    mul     A0, B1
+#ifdef __AVR_HAVE_JMP_CALL__
+    ;; This function is used by many other routines, often multiple times.
+    ;; Therefore, if the flash size is not too limited, avoid the RCALL
+    ;; and inverst 6 Bytes to speed things up.
+    add     C1, r0
+    adc     C2, r1
+    clr     __zero_reg__
+    adc     C3, __zero_reg__
+#else
+    rcall   1f
+#endif
+    mul     A1, B0
+1:  add     C1, r0
+    adc     C2, r1
+    clr     __zero_reg__
+    adc     C3, __zero_reg__
+    ret
+ENDF __umulhisi3
+#endif /* L_umulhisi3 */
+
+/*******************************************************
+    Widening Multiplication  32 = 16 x 32  with MUL
+*******************************************************/
+
+#if defined (L_mulshisi3)
+;;; R25:R22 = (signed long) R27:R26 * R21:R18
+;;; (C3:C0) = (signed long) A1:A0   * B3:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __mulshisi3
+#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+    ;; Some cores have problem skipping 2-word instruction
+    tst     A1
+    brmi    __mulohisi3
+#else
+    sbrs    A1, 7
+#endif /* __AVR_HAVE_JMP_CALL__ */
+    XJMP    __muluhisi3
+    ;; FALLTHRU
+ENDF __mulshisi3
+
+;;; R25:R22 = (one-extended long) R27:R26 * R21:R18
+;;; (C3:C0) = (one-extended long) A1:A0   * B3:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __mulohisi3
+    XCALL   __muluhisi3
+    ;; One-extend R27:R26 (A1:A0)
+    sub     C2, B0
+    sbc     C3, B1
+    ret
+ENDF __mulohisi3
+#endif /* L_mulshisi3 */
+
+#if defined (L_muluhisi3)
+;;; R25:R22 = (unsigned long) R27:R26 * R21:R18
+;;; (C3:C0) = (unsigned long) A1:A0   * B3:B0
+;;; Clobbers: __tmp_reg__
+DEFUN __muluhisi3
+    XCALL   __umulhisi3
+    mul     A0, B3
+    add     C3, r0
+    mul     A1, B2
+    add     C3, r0
+    mul     A0, B2
+    add     C2, r0
+    adc     C3, r1
+    clr     __zero_reg__
+    ret
+ENDF __muluhisi3
+#endif /* L_muluhisi3 */
+
+/*******************************************************
+    Multiplication  32 x 32  with MUL
+*******************************************************/
+
+#if defined (L_mulsi3)
+;;; R25:R22 = R25:R22 * R21:R18
+;;; (C3:C0) = C3:C0   * B3:B0
+;;; Clobbers: R26, R27, __tmp_reg__
+DEFUN __mulsi3
+    movw    A0, C0
+    push    C2
+    push    C3
+    XCALL   __muluhisi3
+    pop     A1
+    pop     A0
+    ;; A1:A0 now contains the high word of A
+    mul     A0, B0
+    add     C2, r0
+    adc     C3, r1
+    mul     A0, B1
+    add     C3, r0
+    mul     A1, B0
+    add     C3, r0
+    clr     __zero_reg__
+    ret
+ENDF __mulsi3
+#endif /* L_mulsi3 */
+
+#undef A0
+#undef A1
+
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+
+#endif /* __AVR_HAVE_MUL__ */
+
+/*******************************************************
+       Multiplication 24 x 24 with MUL
+*******************************************************/
+
+#if defined (L_mulpsi3)
+
+;; A[0..2]: In: Multiplicand; Out: Product
+#define A0  22
+#define A1  A0+1
+#define A2  A0+2
+
+;; B[0..2]: In: Multiplier
+#define B0  18
+#define B1  B0+1
+#define B2  B0+2
+
+#if defined (__AVR_HAVE_MUL__)
+
+;; C[0..2]: Expand Result
+#define C0  22
+#define C1  C0+1
+#define C2  C0+2
+
+;; R24:R22 *= R20:R18
+;; Clobbers: r21, r25, r26, r27, __tmp_reg__
+
+#define AA0 26
+#define AA2 21
+
+DEFUN __mulpsi3
+    wmov    AA0, A0
+    mov     AA2, A2
+    XCALL   __umulhisi3
+    mul     AA2, B0     $  add  C2, r0
+    mul     AA0, B2     $  add  C2, r0
+    clr     __zero_reg__
+    ret
+ENDF __mulpsi3
+
+#undef AA2
+#undef AA0
+
+#undef C2
+#undef C1
+#undef C0
+
+#else /* !HAVE_MUL */
+
+;; C[0..2]: Expand Result
+#define C0  0
+#define C1  C0+1
+#define C2  21
+
+;; R24:R22 *= R20:R18
+;; Clobbers: __tmp_reg__, R18, R19, R20, R21
+
+DEFUN __mulpsi3
+
+    ;; C[] = 0
+    clr     __tmp_reg__
+    clr     C2
+
+0:  ;; Shift N-th Bit of B[] into Carry.  N = 24 - Loop
+    LSR  B2     $  ror  B1     $  ror  B0
+
+    ;; If the N-th Bit of B[] was set...
+    brcc    1f
+
+    ;; ...then add A[] * 2^N to the Result C[]
+    ADD  C0,A0  $  adc  C1,A1  $  adc  C2,A2
+
+1:  ;; Multiply A[] by 2
+    LSL  A0     $  rol  A1     $  rol  A2
+
+    ;; Loop until B[] is 0
+    subi B0,0   $  sbci B1,0   $  sbci B2,0
+    brne    0b
+
+    ;; Copy C[] to the return Register A[]
+    wmov    A0, C0
+    mov     A2, C2
+
+    clr     __zero_reg__
+    ret
+ENDF __mulpsi3
+
+#undef C2
+#undef C1
+#undef C0
+
+#endif /* HAVE_MUL */
+
+#undef B2
+#undef B1
+#undef B0
+
+#undef A2
+#undef A1
+#undef A0
+
+#endif /* L_mulpsi3 */
+
+#if defined (L_mulsqipsi3) && defined (__AVR_HAVE_MUL__)
+
+;; A[0..2]: In: Multiplicand
+#define A0  22
+#define A1  A0+1
+#define A2  A0+2
+
+;; BB: In: Multiplier
+#define BB  25
+
+;; C[0..2]: Result
+#define C0  18
+#define C1  C0+1
+#define C2  C0+2
+
+;; C[] = A[] * sign_extend (BB)
+DEFUN __mulsqipsi3
+    mul     A0, BB
+    movw    C0, r0
+    mul     A2, BB
+    mov     C2, r0
+    mul     A1, BB
+    add     C1, r0
+    adc     C2, r1
+    clr     __zero_reg__
+    sbrs    BB, 7
+    ret
+    ;; One-extend BB
+    sub     C1, A0
+    sbc     C2, A1
+    ret
+ENDF __mulsqipsi3
+
+#undef C2
+#undef C1
+#undef C0
+
+#undef BB
+
+#undef A2
+#undef A1
+#undef A0
+
+#endif /* L_mulsqipsi3  &&  HAVE_MUL */
+
+/*******************************************************
+       Multiplication 64 x 64
+*******************************************************/
+
+;; A[] = A[] * B[]
+
+;; A[0..7]: In: Multiplicand
+;; Out: Product
+#define A0  18
+#define A1  A0+1
+#define A2  A0+2
+#define A3  A0+3
+#define A4  A0+4
+#define A5  A0+5
+#define A6  A0+6
+#define A7  A0+7
+
+;; B[0..7]: In: Multiplier
+#define B0  10
+#define B1  B0+1
+#define B2  B0+2
+#define B3  B0+3
+#define B4  B0+4
+#define B5  B0+5
+#define B6  B0+6
+#define B7  B0+7
+
+#if defined (__AVR_HAVE_MUL__)
+
+;; Define C[] for convenience
+;; Notice that parts of C[] overlap A[] respective B[]
+#define C0  16
+#define C1  C0+1
+#define C2  20
+#define C3  C2+1
+#define C4  28
+#define C5  C4+1
+#define C6  C4+2
+#define C7  C4+3
+
+#if defined (L_muldi3)
+
+;; A[]     *= B[]
+;; R25:R18 *= R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __muldi3
+    push    r29
+    push    r28
+    push    r17
+    push    r16
+
+    ;; Counting in Words, we have to perform a 4 * 4 Multiplication
+
+    ;; 3 * 0  +  0 * 3
+    mul  A7,B0  $             $  mov C7,r0
+    mul  A0,B7  $             $  add C7,r0
+    mul  A6,B1  $             $  add C7,r0
+    mul  A6,B0  $  mov C6,r0  $  add C7,r1
+    mul  B6,A1  $             $  add C7,r0
+    mul  B6,A0  $  add C6,r0  $  adc C7,r1
+
+    ;; 1 * 2
+    mul  A2,B4  $  add C6,r0  $  adc C7,r1
+    mul  A3,B4  $             $  add C7,r0
+    mul  A2,B5  $             $  add C7,r0
+
+    push    A5
+    push    A4
+    push    B1
+    push    B0
+    push    A3
+    push    A2
+
+    ;; 0 * 0
+    wmov    26, B0
+    XCALL   __umulhisi3
+    wmov    C0, 22
+    wmov    C2, 24
+
+    ;; 0 * 2
+    wmov    26, B4
+    XCALL   __umulhisi3  $  wmov C4,22            $ add C6,24 $ adc C7,25
+
+    wmov    26, B2
+    ;; 0 * 1
+    XCALL   __muldi3_6
+
+    pop     A0
+    pop     A1
+    ;; 1 * 1
+    wmov    26, B2
+    XCALL   __umulhisi3  $  add C4,22 $ adc C5,23 $ adc C6,24 $ adc C7,25
+
+    pop     r26
+    pop     r27
+    ;; 1 * 0
+    XCALL   __muldi3_6
+
+    pop     A0
+    pop     A1
+    ;; 2 * 0
+    XCALL   __umulhisi3  $  add C4,22 $ adc C5,23 $ adc C6,24 $ adc C7,25
+
+    ;; 2 * 1
+    wmov    26, B2
+    XCALL   __umulhisi3  $            $           $ add C6,22 $ adc C7,23
+
+    ;; A[] = C[]
+    wmov    A0, C0
+    ;; A2 = C2 already
+    wmov    A4, C4
+    wmov    A6, C6
+
+    clr     __zero_reg__
+    pop     r16
+    pop     r17
+    pop     r28
+    pop     r29
+    ret
+ENDF __muldi3
+#endif /* L_muldi3 */
+
+#if defined (L_muldi3_6)
+;; A helper for some 64-bit multiplications with MUL available
+DEFUN __muldi3_6
+__muldi3_6:
+    XCALL   __umulhisi3
+    add     C2, 22
+    adc     C3, 23
+    adc     C4, 24
+    adc     C5, 25
+    brcc    0f
+    adiw    C6, 1
+0:  ret
+ENDF __muldi3_6
+#endif /* L_muldi3_6 */
+
+#undef C7
+#undef C6
+#undef C5
+#undef C4
+#undef C3
+#undef C2
+#undef C1
+#undef C0
+
+#else /* !HAVE_MUL */
+
+#if defined (L_muldi3)
+
+#define C0  26
+#define C1  C0+1
+#define C2  C0+2
+#define C3  C0+3
+#define C4  C0+4
+#define C5  C0+5
+#define C6  0
+#define C7  C6+1
+
+#define Loop 9
+
+;; A[]     *= B[]
+;; R25:R18 *= R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __muldi3
+    push    r29
+    push    r28
+    push    Loop
+
+    ldi     C0, 64
+    mov     Loop, C0
+
+    ;; C[] = 0
+    clr     __tmp_reg__
+    wmov    C0, 0
+    wmov    C2, 0
+    wmov    C4, 0
+
+0:  ;; Rotate B[] right by 1 and set Carry to the N-th Bit of B[]
+    ;; where N = 64 - Loop.
+    ;; Notice that B[] = B[] >>> 64 so after this Routine has finished,
+    ;; B[] will have its initial Value again.
+    LSR  B7     $  ror  B6     $  ror  B5     $  ror  B4
+    ror  B3     $  ror  B2     $  ror  B1     $  ror  B0
+
+    ;; If the N-th Bit of B[] was set then...
+    brcc    1f
+    ;; ...finish Rotation...
+    ori     B7, 1 << 7
+
+    ;; ...and add A[] * 2^N to the Result C[]
+    ADD  C0,A0  $  adc  C1,A1  $  adc  C2,A2  $  adc  C3,A3
+    adc  C4,A4  $  adc  C5,A5  $  adc  C6,A6  $  adc  C7,A7
+
+1:  ;; Multiply A[] by 2
+    LSL  A0     $  rol  A1     $  rol  A2     $  rol  A3
+    rol  A4     $  rol  A5     $  rol  A6     $  rol  A7
+
+    dec     Loop
+    brne    0b
+
+    ;; We expanded the Result in C[]
+    ;; Copy Result to the Return Register A[]
+    wmov    A0, C0
+    wmov    A2, C2
+    wmov    A4, C4
+    wmov    A6, C6
+
+    clr     __zero_reg__
+    pop     Loop
+    pop     r28
+    pop     r29
+    ret
+ENDF __muldi3
+
+#undef Loop
+
+#undef C7
+#undef C6
+#undef C5
+#undef C4
+#undef C3
+#undef C2
+#undef C1
+#undef C0
+
+#endif /* L_muldi3 */
+#endif /* HAVE_MUL */
+
+#undef B7
+#undef B6
+#undef B5
+#undef B4
+#undef B3
+#undef B2
+#undef B1
+#undef B0
+
+#undef A7
+#undef A6
+#undef A5
+#undef A4
+#undef A3
+#undef A2
+#undef A1
+#undef A0
+
+/*******************************************************
+   Widening Multiplication 64 = 32 x 32  with  MUL
+*******************************************************/
+
+#if defined (__AVR_HAVE_MUL__)
+#define A0 r22
+#define A1 r23 
+#define A2 r24
+#define A3 r25
+ 
+#define B0 r18
+#define B1 r19
+#define B2 r20
+#define B3 r21
+ 
+#define C0  18
+#define C1  C0+1
+#define C2  20
+#define C3  C2+1
+#define C4  28
+#define C5  C4+1
+#define C6  C4+2
+#define C7  C4+3
+
+#if defined (L_umulsidi3)
+
+;; Unsigned widening 64 = 32 * 32 Multiplication with MUL
+
+;; R18[8] = R22[4] * R18[4]
+;;
+;; Ordinary ABI Function, but additionally sets
+;; X = R20[2] = B2[2]
+;; Z = R22[2] = A0[2]
+DEFUN __umulsidi3
+    clt
+    ;; FALLTHRU
+ENDF  __umulsidi3
+    ;; T = sign (A)
+DEFUN __umulsidi3_helper
+    push    29  $  push    28 ; Y
+    wmov    30, A2
+    ;; Counting in Words, we have to perform 4 Multiplications
+    ;; 0 * 0
+    wmov    26, A0
+    XCALL __umulhisi3
+    push    23  $  push    22 ; C0
+    wmov    28, B0
+    wmov    18, B2
+    wmov    C2, 24
+    push    27  $  push    26 ; A0
+    push    19  $  push    18 ; B2
+    ;;
+    ;;  18  20  22  24  26  28  30  |  B2, B3, A0, A1, C0, C1, Y
+    ;;  B2  C2  --  --  --  B0  A2
+    ;; 1 * 1
+    wmov    26, 30      ; A2
+    XCALL __umulhisi3
+    ;; Sign-extend A.  T holds the sign of A
+    brtc    0f
+    ;; Subtract B from the high part of the result
+    sub     22, 28
+    sbc     23, 29
+    sbc     24, 18
+    sbc     25, 19
+0:  wmov    18, 28      ;; B0
+    wmov    C4, 22
+    wmov    C6, 24
+    ;;
+    ;;  18  20  22  24  26  28  30  |  B2, B3, A0, A1, C0, C1, Y
+    ;;  B0  C2  --  --  A2  C4  C6
+    ;;
+    ;; 1 * 0
+    XCALL __muldi3_6
+    ;; 0 * 1
+    pop     26  $   pop 27  ;; B2
+    pop     18  $   pop 19  ;; A0
+    XCALL __muldi3_6
+
+    ;; Move result C into place and save A0 in Z
+    wmov    22, C4
+    wmov    24, C6
+    wmov    30, 18 ; A0
+    pop     C0  $   pop C1
+
+    ;; Epilogue
+    pop     28  $   pop 29  ;; Y
+    ret
+ENDF __umulsidi3_helper
+#endif /* L_umulsidi3 */
+
+
+#if defined (L_mulsidi3)
+
+;; Signed widening 64 = 32 * 32 Multiplication
+;;
+;; R18[8] = R22[4] * R18[4]
+;; Ordinary ABI Function
+DEFUN __mulsidi3
+    bst     A3, 7
+    sbrs    B3, 7           ; Enhanced core has no skip bug
+    XJMP __umulsidi3_helper
+
+    ;; B needs sign-extension
+    push    A3
+    push    A2
+    XCALL __umulsidi3_helper
+    ;; A0 survived in Z
+    sub     r22, r30
+    sbc     r23, r31
+    pop     r26
+    pop     r27
+    sbc     r24, r26
+    sbc     r25, r27
+    ret
+ENDF __mulsidi3
+#endif /* L_mulsidi3 */
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef C4
+#undef C5
+#undef C6
+#undef C7
+#endif /* HAVE_MUL */
+
+/**********************************************************
+    Widening Multiplication 64 = 32 x 32  without  MUL
+**********************************************************/
+
+#if defined (L_mulsidi3) && !defined (__AVR_HAVE_MUL__)
+#define A0 18
+#define A1 A0+1
+#define A2 A0+2
+#define A3 A0+3
+#define A4 A0+4
+#define A5 A0+5
+#define A6 A0+6
+#define A7 A0+7
+
+#define B0 10
+#define B1 B0+1
+#define B2 B0+2
+#define B3 B0+3
+#define B4 B0+4
+#define B5 B0+5
+#define B6 B0+6
+#define B7 B0+7
+
+#define AA0 22
+#define AA1 AA0+1
+#define AA2 AA0+2
+#define AA3 AA0+3
+
+#define BB0 18
+#define BB1 BB0+1
+#define BB2 BB0+2
+#define BB3 BB0+3
+
+#define Mask r30
+
+;; Signed / Unsigned widening 64 = 32 * 32 Multiplication without MUL
+;;
+;; R18[8] = R22[4] * R18[4]
+;; Ordinary ABI Function
+DEFUN __mulsidi3
+    set
+    skip
+    ;; FALLTHRU
+ENDF  __mulsidi3
+
+DEFUN __umulsidi3
+    clt     ; skipped
+    ;; Save 10 Registers: R10..R17, R28, R29
+    do_prologue_saves 10
+    ldi     Mask, 0xff
+    bld     Mask, 7
+    ;; Move B into place...
+    wmov    B0, BB0
+    wmov    B2, BB2
+    ;; ...and extend it
+    and     BB3, Mask
+    lsl     BB3
+    sbc     B4, B4
+    mov     B5, B4
+    wmov    B6, B4
+    ;; Move A into place...
+    wmov    A0, AA0
+    wmov    A2, AA2
+    ;; ...and extend it
+    and     AA3, Mask
+    lsl     AA3
+    sbc     A4, A4
+    mov     A5, A4
+    wmov    A6, A4
+    XCALL   __muldi3
+    do_epilogue_restores 10
+ENDF __umulsidi3
+
+#undef A0
+#undef A1
+#undef A2
+#undef A3
+#undef A4
+#undef A5
+#undef A6
+#undef A7
+#undef B0
+#undef B1
+#undef B2
+#undef B3
+#undef B4
+#undef B5
+#undef B6
+#undef B7
+#undef AA0
+#undef AA1
+#undef AA2
+#undef AA3
+#undef BB0
+#undef BB1
+#undef BB2
+#undef BB3
+#undef Mask
+#endif /* L_mulsidi3 && !HAVE_MUL */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+	
+
+.section .text.libgcc.div, "ax", @progbits
+
+/*******************************************************
+       Division 8 / 8 => (result + remainder)
+*******************************************************/
+#define	r_rem	r25	/* remainder */
+#define	r_arg1	r24	/* dividend, quotient */
+#define	r_arg2	r22	/* divisor */
+#define	r_cnt	r23	/* loop count */
+
+#if defined (L_udivmodqi4)
+DEFUN __udivmodqi4
+	sub	r_rem,r_rem	; clear remainder and carry
+	ldi	r_cnt,9		; init loop counter
+	rjmp	__udivmodqi4_ep	; jump to entry point
+__udivmodqi4_loop:
+	rol	r_rem		; shift dividend into remainder
+	cp	r_rem,r_arg2	; compare remainder & divisor
+	brcs	__udivmodqi4_ep	; remainder <= divisor
+	sub	r_rem,r_arg2	; restore remainder
+__udivmodqi4_ep:
+	rol	r_arg1		; shift dividend (with CARRY)
+	dec	r_cnt		; decrement loop counter
+	brne	__udivmodqi4_loop
+	com	r_arg1		; complement result
+				; because C flag was complemented in loop
+	ret
+ENDF __udivmodqi4
+#endif /* defined (L_udivmodqi4) */
+
+#if defined (L_divmodqi4)
+DEFUN __divmodqi4
+        bst     r_arg1,7	; store sign of dividend
+        mov     __tmp_reg__,r_arg1
+        eor     __tmp_reg__,r_arg2; r0.7 is sign of result
+        sbrc	r_arg1,7
+	neg     r_arg1		; dividend negative : negate
+        sbrc	r_arg2,7
+	neg     r_arg2		; divisor negative : negate
+	XCALL	__udivmodqi4	; do the unsigned div/mod
+	brtc	__divmodqi4_1
+	neg	r_rem		; correct remainder sign
+__divmodqi4_1:
+	sbrc	__tmp_reg__,7
+	neg	r_arg1		; correct result sign
+__divmodqi4_exit:
+	ret
+ENDF __divmodqi4
+#endif /* defined (L_divmodqi4) */
+
+#undef r_rem
+#undef r_arg1
+#undef r_arg2
+#undef r_cnt
+	
+		
+/*******************************************************
+       Division 16 / 16 => (result + remainder)
+*******************************************************/
+#define	r_remL	r26	/* remainder Low */
+#define	r_remH	r27	/* remainder High */
+
+/* return: remainder */
+#define	r_arg1L	r24	/* dividend Low */
+#define	r_arg1H	r25	/* dividend High */
+
+/* return: quotient */
+#define	r_arg2L	r22	/* divisor Low */
+#define	r_arg2H	r23	/* divisor High */
+	
+#define	r_cnt	r21	/* loop count */
+
+#if defined (L_udivmodhi4)
+DEFUN __udivmodhi4
+	sub	r_remL,r_remL
+	sub	r_remH,r_remH	; clear remainder and carry
+	ldi	r_cnt,17	; init loop counter
+	rjmp	__udivmodhi4_ep	; jump to entry point
+__udivmodhi4_loop:
+        rol	r_remL		; shift dividend into remainder
+	rol	r_remH
+        cp	r_remL,r_arg2L	; compare remainder & divisor
+	cpc	r_remH,r_arg2H
+        brcs	__udivmodhi4_ep	; remainder < divisor
+        sub	r_remL,r_arg2L	; restore remainder
+        sbc	r_remH,r_arg2H
+__udivmodhi4_ep:
+        rol	r_arg1L		; shift dividend (with CARRY)
+        rol	r_arg1H
+        dec	r_cnt		; decrement loop counter
+        brne	__udivmodhi4_loop
+	com	r_arg1L
+	com	r_arg1H
+; div/mod results to return registers, as for the div() function
+	mov_l	r_arg2L, r_arg1L	; quotient
+	mov_h	r_arg2H, r_arg1H
+	mov_l	r_arg1L, r_remL		; remainder
+	mov_h	r_arg1H, r_remH
+	ret
+ENDF __udivmodhi4
+#endif /* defined (L_udivmodhi4) */
+
+#if defined (L_divmodhi4)
+DEFUN __divmodhi4
+    .global _div
+_div:
+    bst     r_arg1H,7           ; store sign of dividend
+    mov     __tmp_reg__,r_arg2H
+    brtc    0f
+    com     __tmp_reg__         ; r0.7 is sign of result
+    rcall   __divmodhi4_neg1    ; dividend negative: negate
+0:
+    sbrc    r_arg2H,7
+    rcall   __divmodhi4_neg2    ; divisor negative: negate
+    XCALL   __udivmodhi4        ; do the unsigned div/mod
+    sbrc    __tmp_reg__,7
+    rcall   __divmodhi4_neg2    ; correct remainder sign
+    brtc    __divmodhi4_exit
+__divmodhi4_neg1:
+    ;; correct dividend/remainder sign
+    com     r_arg1H
+    neg     r_arg1L
+    sbci    r_arg1H,0xff
+    ret
+__divmodhi4_neg2:
+    ;; correct divisor/result sign
+    com     r_arg2H
+    neg     r_arg2L
+    sbci    r_arg2H,0xff
+__divmodhi4_exit:
+    ret
+ENDF __divmodhi4
+#endif /* defined (L_divmodhi4) */
+
+#undef r_remH
+#undef r_remL
+
+#undef r_arg1H
+#undef r_arg1L
+
+#undef r_arg2H
+#undef r_arg2L
+             	
+#undef r_cnt   	
+
+/*******************************************************
+       Division 24 / 24 => (result + remainder)
+*******************************************************/
+
+;; A[0..2]: In: Dividend; Out: Quotient
+#define A0  22
+#define A1  A0+1
+#define A2  A0+2
+
+;; B[0..2]: In: Divisor;   Out: Remainder
+#define B0  18
+#define B1  B0+1
+#define B2  B0+2
+
+;; C[0..2]: Expand remainder
+#define C0  __zero_reg__
+#define C1  26
+#define C2  25
+
+;; Loop counter
+#define r_cnt   21
+
+#if defined (L_udivmodpsi4)
+;; R24:R22 = R24:R22  udiv  R20:R18
+;; R20:R18 = R24:R22  umod  R20:R18
+;; Clobbers: R21, R25, R26
+
+DEFUN __udivmodpsi4
+    ; init loop counter
+    ldi     r_cnt, 24+1
+    ; Clear remainder and carry.  C0 is already 0
+    clr     C1
+    sub     C2, C2
+    ; jump to entry point
+    rjmp    __udivmodpsi4_start
+__udivmodpsi4_loop:
+    ; shift dividend into remainder
+    rol     C0
+    rol     C1
+    rol     C2
+    ; compare remainder & divisor
+    cp      C0, B0
+    cpc     C1, B1
+    cpc     C2, B2
+    brcs    __udivmodpsi4_start ; remainder <= divisor
+    sub     C0, B0              ; restore remainder
+    sbc     C1, B1
+    sbc     C2, B2
+__udivmodpsi4_start:
+    ; shift dividend (with CARRY)
+    rol     A0
+    rol     A1
+    rol     A2
+    ; decrement loop counter
+    dec     r_cnt
+    brne    __udivmodpsi4_loop
+    com     A0
+    com     A1
+    com     A2
+    ; div/mod results to return registers
+    ; remainder
+    mov     B0, C0
+    mov     B1, C1
+    mov     B2, C2
+    clr     __zero_reg__ ; C0
+    ret
+ENDF __udivmodpsi4
+#endif /* defined (L_udivmodpsi4) */
+
+#if defined (L_divmodpsi4)
+;; R24:R22 = R24:R22  div  R20:R18
+;; R20:R18 = R24:R22  mod  R20:R18
+;; Clobbers: T, __tmp_reg__, R21, R25, R26
+
+DEFUN __divmodpsi4
+    ; R0.7 will contain the sign of the result:
+    ; R0.7 = A.sign ^ B.sign
+    mov __tmp_reg__, B2
+    ; T-flag = sign of dividend
+    bst     A2, 7
+    brtc    0f
+    com     __tmp_reg__
+    ; Adjust dividend's sign
+    rcall   __divmodpsi4_negA
+0:
+    ; Adjust divisor's sign
+    sbrc    B2, 7
+    rcall   __divmodpsi4_negB
+
+    ; Do the unsigned div/mod
+    XCALL   __udivmodpsi4
+
+    ; Adjust quotient's sign
+    sbrc    __tmp_reg__, 7
+    rcall   __divmodpsi4_negA
+
+    ; Adjust remainder's sign
+    brtc    __divmodpsi4_end
+
+__divmodpsi4_negB:
+    ; Correct divisor/remainder sign
+    com     B2
+    com     B1
+    neg     B0
+    sbci    B1, -1
+    sbci    B2, -1
+    ret
+
+    ; Correct dividend/quotient sign
+__divmodpsi4_negA:
+    com     A2
+    com     A1
+    neg     A0
+    sbci    A1, -1
+    sbci    A2, -1
+__divmodpsi4_end:
+    ret
+
+ENDF __divmodpsi4
+#endif /* defined (L_divmodpsi4) */
+
+#undef A0
+#undef A1
+#undef A2
+
+#undef B0
+#undef B1
+#undef B2
+
+#undef C0
+#undef C1
+#undef C2
+
+#undef r_cnt
+
+/*******************************************************
+       Division 32 / 32 => (result + remainder)
+*******************************************************/
+#define	r_remHH	r31	/* remainder High */
+#define	r_remHL	r30
+#define	r_remH	r27
+#define	r_remL	r26	/* remainder Low */
+
+/* return: remainder */
+#define	r_arg1HH r25	/* dividend High */
+#define	r_arg1HL r24
+#define	r_arg1H  r23
+#define	r_arg1L  r22	/* dividend Low */
+
+/* return: quotient */
+#define	r_arg2HH r21	/* divisor High */
+#define	r_arg2HL r20
+#define	r_arg2H  r19
+#define	r_arg2L  r18	/* divisor Low */
+	
+#define	r_cnt __zero_reg__  /* loop count (0 after the loop!) */
+
+#if defined (L_udivmodsi4)
+DEFUN __udivmodsi4
+	ldi	r_remL, 33	; init loop counter
+	mov	r_cnt, r_remL
+	sub	r_remL,r_remL
+	sub	r_remH,r_remH	; clear remainder and carry
+	mov_l	r_remHL, r_remL
+	mov_h	r_remHH, r_remH
+	rjmp	__udivmodsi4_ep	; jump to entry point
+__udivmodsi4_loop:
+        rol	r_remL		; shift dividend into remainder
+	rol	r_remH
+	rol	r_remHL
+	rol	r_remHH
+        cp	r_remL,r_arg2L	; compare remainder & divisor
+	cpc	r_remH,r_arg2H
+	cpc	r_remHL,r_arg2HL
+	cpc	r_remHH,r_arg2HH
+	brcs	__udivmodsi4_ep	; remainder <= divisor
+        sub	r_remL,r_arg2L	; restore remainder
+        sbc	r_remH,r_arg2H
+        sbc	r_remHL,r_arg2HL
+        sbc	r_remHH,r_arg2HH
+__udivmodsi4_ep:
+        rol	r_arg1L		; shift dividend (with CARRY)
+        rol	r_arg1H
+        rol	r_arg1HL
+        rol	r_arg1HH
+        dec	r_cnt		; decrement loop counter
+        brne	__udivmodsi4_loop
+				; __zero_reg__ now restored (r_cnt == 0)
+	com	r_arg1L
+	com	r_arg1H
+	com	r_arg1HL
+	com	r_arg1HH
+; div/mod results to return registers, as for the ldiv() function
+	mov_l	r_arg2L,  r_arg1L	; quotient
+	mov_h	r_arg2H,  r_arg1H
+	mov_l	r_arg2HL, r_arg1HL
+	mov_h	r_arg2HH, r_arg1HH
+	mov_l	r_arg1L,  r_remL	; remainder
+	mov_h	r_arg1H,  r_remH
+	mov_l	r_arg1HL, r_remHL
+	mov_h	r_arg1HH, r_remHH
+	ret
+ENDF __udivmodsi4
+#endif /* defined (L_udivmodsi4) */
+
+#if defined (L_divmodsi4)
+DEFUN __divmodsi4
+    mov     __tmp_reg__,r_arg2HH
+    bst     r_arg1HH,7          ; store sign of dividend
+    brtc    0f
+    com     __tmp_reg__         ; r0.7 is sign of result
+    XCALL   __negsi2            ; dividend negative: negate
+0:
+    sbrc    r_arg2HH,7
+    rcall   __divmodsi4_neg2    ; divisor negative: negate
+    XCALL   __udivmodsi4        ; do the unsigned div/mod
+    sbrc    __tmp_reg__, 7      ; correct quotient sign
+    rcall   __divmodsi4_neg2
+    brtc    __divmodsi4_exit    ; correct remainder sign
+    XJMP    __negsi2
+__divmodsi4_neg2:
+    ;; correct divisor/quotient sign
+    com     r_arg2HH
+    com     r_arg2HL
+    com     r_arg2H
+    neg     r_arg2L
+    sbci    r_arg2H,0xff
+    sbci    r_arg2HL,0xff
+    sbci    r_arg2HH,0xff
+__divmodsi4_exit:
+    ret
+ENDF __divmodsi4
+#endif /* defined (L_divmodsi4) */
+
+#if defined (L_negsi2)
+;; (set (reg:SI 22)
+;;      (neg:SI (reg:SI 22)))
+;; Sets the V flag for signed overflow tests
+DEFUN __negsi2
+    NEG4    22
+    ret
+ENDF __negsi2
+#endif /* L_negsi2 */
+
+#undef r_remHH
+#undef r_remHL
+#undef r_remH
+#undef r_remL
+#undef r_arg1HH
+#undef r_arg1HL
+#undef r_arg1H
+#undef r_arg1L
+#undef r_arg2HH
+#undef r_arg2HL
+#undef r_arg2H
+#undef r_arg2L
+#undef r_cnt
+
+/*******************************************************
+       Division 64 / 64
+       Modulo   64 % 64
+*******************************************************/
+
+;; Use Speed-optimized Version on "big" Devices, i.e. Devices with
+;; at least 16k of Program Memory.  For smaller Devices, depend
+;; on MOVW and SP Size.  There is a Connexion between SP Size and
+;; Flash Size so that SP Size can be used to test for Flash Size.
+
+#if defined (__AVR_HAVE_JMP_CALL__)
+#   define SPEED_DIV 8
+#elif defined (__AVR_HAVE_MOVW__) && defined (__AVR_HAVE_SPH__)
+#   define SPEED_DIV 16
+#else
+#   define SPEED_DIV 0
+#endif
+
+;; A[0..7]: In: Dividend;
+;; Out: Quotient  (T = 0)
+;; Out: Remainder (T = 1)
+#define A0  18
+#define A1  A0+1
+#define A2  A0+2
+#define A3  A0+3
+#define A4  A0+4
+#define A5  A0+5
+#define A6  A0+6
+#define A7  A0+7
+
+;; B[0..7]: In: Divisor;   Out: Clobber
+#define B0  10
+#define B1  B0+1
+#define B2  B0+2
+#define B3  B0+3
+#define B4  B0+4
+#define B5  B0+5
+#define B6  B0+6
+#define B7  B0+7
+
+;; C[0..7]: Expand remainder;  Out: Remainder (unused)
+#define C0  8
+#define C1  C0+1
+#define C2  30
+#define C3  C2+1
+#define C4  28
+#define C5  C4+1
+#define C6  26
+#define C7  C6+1
+
+;; Holds Signs during Division Routine
+#define SS      __tmp_reg__
+
+;; Bit-Counter in Division Routine
+#define R_cnt   __zero_reg__
+
+;; Scratch Register for Negation
+#define NN      r31
+
+#if defined (L_udivdi3)
+
+;; R25:R18 = R24:R18  umod  R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __umoddi3
+    set
+    rjmp __udivdi3_umoddi3
+ENDF __umoddi3
+
+;; R25:R18 = R24:R18  udiv  R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __udivdi3
+    clt
+ENDF __udivdi3
+
+DEFUN __udivdi3_umoddi3
+    push    C0
+    push    C1
+    push    C4
+    push    C5
+    XCALL   __udivmod64
+    pop     C5
+    pop     C4
+    pop     C1
+    pop     C0
+    ret
+ENDF __udivdi3_umoddi3
+#endif /* L_udivdi3 */
+
+#if defined (L_udivmod64)
+
+;; Worker Routine for 64-Bit unsigned Quotient and Remainder Computation
+;; No Registers saved/restored; the Callers will take Care.
+;; Preserves B[] and T-flag
+;; T = 0: Compute Quotient  in A[]
+;; T = 1: Compute Remainder in A[] and shift SS one Bit left
+
+DEFUN __udivmod64
+
+    ;; Clear Remainder (C6, C7 will follow)
+    clr     C0
+    clr     C1
+    wmov    C2, C0
+    wmov    C4, C0
+    ldi     C7, 64
+
+#if SPEED_DIV == 0 || SPEED_DIV == 16
+    ;; Initialize Loop-Counter
+    mov     R_cnt, C7
+    wmov    C6, C0
+#endif /* SPEED_DIV */
+
+#if SPEED_DIV == 8
+
+    push    A7
+    clr     C6
+
+1:  ;; Compare shifted Devidend against Divisor
+    ;; If -- even after Shifting -- it is smaller...
+    CP  A7,B0  $  cpc C0,B1  $  cpc C1,B2  $  cpc C2,B3
+    cpc C3,B4  $  cpc C4,B5  $  cpc C5,B6  $  cpc C6,B7
+    brcc    2f
+
+    ;; ...then we can subtract it.  Thus, it is legal to shift left
+               $  mov C6,C5  $  mov C5,C4  $  mov C4,C3
+    mov C3,C2  $  mov C2,C1  $  mov C1,C0  $  mov C0,A7
+    mov A7,A6  $  mov A6,A5  $  mov A5,A4  $  mov A4,A3
+    mov A3,A2  $  mov A2,A1  $  mov A1,A0  $  clr A0
+
+    ;; 8 Bits are done
+    subi    C7, 8
+    brne    1b
+
+    ;; Shifted 64 Bits:  A7 has traveled to C7
+    pop     C7
+    ;; Divisor is greater than Dividend. We have:
+    ;; A[] % B[] = A[]
+    ;; A[] / B[] = 0
+    ;; Thus, we can return immediately
+    rjmp    5f
+
+2:  ;; Initialze Bit-Counter with Number of Bits still to be performed
+    mov     R_cnt, C7
+
+    ;; Push of A7 is not needed because C7 is still 0
+    pop     C7
+    clr     C7
+
+#elif  SPEED_DIV == 16
+
+    ;; Compare shifted Dividend against Divisor
+    cp      A7, B3
+    cpc     C0, B4
+    cpc     C1, B5
+    cpc     C2, B6
+    cpc     C3, B7
+    brcc    2f
+
+    ;; Divisor is greater than shifted Dividen: We can shift the Dividend
+    ;; and it is still smaller than the Divisor --> Shift one 32-Bit Chunk
+    wmov  C2,A6  $  wmov C0,A4
+    wmov  A6,A2  $  wmov A4,A0
+    wmov  A2,C6  $  wmov A0,C4
+
+    ;; Set Bit Counter to 32
+    lsr     R_cnt
+2:
+#elif SPEED_DIV
+#error SPEED_DIV = ?
+#endif /* SPEED_DIV */
+
+;; The very Division + Remainder Routine
+
+3:  ;; Left-shift Dividend...
+    lsl A0     $  rol A1     $  rol A2     $  rol A3
+    rol A4     $  rol A5     $  rol A6     $  rol A7
+
+    ;; ...into Remainder
+    rol C0     $  rol C1     $  rol C2     $  rol C3
+    rol C4     $  rol C5     $  rol C6     $  rol C7
+
+    ;; Compare Remainder and Divisor
+    CP  C0,B0  $  cpc C1,B1  $  cpc C2,B2  $  cpc C3,B3
+    cpc C4,B4  $  cpc C5,B5  $  cpc C6,B6  $  cpc C7,B7
+
+    brcs 4f
+
+    ;; Divisor fits into Remainder:  Subtract it from Remainder...
+    SUB C0,B0  $  sbc C1,B1  $  sbc C2,B2  $  sbc C3,B3
+    sbc C4,B4  $  sbc C5,B5  $  sbc C6,B6  $  sbc C7,B7
+
+    ;; ...and set according Bit in the upcoming Quotient
+    ;; The Bit will travel to its final Position
+    ori A0, 1
+
+4:  ;; This Bit is done
+    dec     R_cnt
+    brne    3b
+    ;; __zero_reg__ is 0 again
+
+    ;; T = 0: We are fine with the Quotient in A[]
+    ;; T = 1: Copy Remainder to A[]
+5:  brtc    6f
+    wmov    A0, C0
+    wmov    A2, C2
+    wmov    A4, C4
+    wmov    A6, C6
+    ;; Move the Sign of the Result to SS.7
+    lsl     SS
+
+6:  ret
+
+ENDF __udivmod64
+#endif /* L_udivmod64 */
+
+
+#if defined (L_divdi3)
+
+;; R25:R18 = R24:R18  mod  R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __moddi3
+    set
+    rjmp    __divdi3_moddi3
+ENDF __moddi3
+
+;; R25:R18 = R24:R18  div  R17:R10
+;; Ordinary ABI-Function
+
+DEFUN __divdi3
+    clt
+ENDF __divdi3
+
+DEFUN  __divdi3_moddi3
+#if SPEED_DIV
+    mov     r31, A7
+    or      r31, B7
+    brmi    0f
+    ;; Both Signs are 0:  the following Complexitiy is not needed
+    XJMP    __udivdi3_umoddi3
+#endif /* SPEED_DIV */
+
+0:  ;; The Prologue
+    ;; Save 12 Registers:  Y, 17...8
+    ;; No Frame needed
+    do_prologue_saves 12
+
+    ;; SS.7 will contain the Sign of the Quotient  (A.sign * B.sign)
+    ;; SS.6 will contain the Sign of the Remainder (A.sign)
+    mov     SS, A7
+    asr     SS
+    ;; Adjust Dividend's Sign as needed
+#if SPEED_DIV
+    ;; Compiling for Speed we know that at least one Sign must be < 0
+    ;; Thus, if A[] >= 0 then we know B[] < 0
+    brpl    22f
+#else
+    brpl    21f
+#endif /* SPEED_DIV */
+
+    XCALL   __negdi2
+
+    ;; Adjust Divisor's Sign and SS.7 as needed
+21: tst     B7
+    brpl    3f
+22: ldi     NN, 1 << 7
+    eor     SS, NN
+
+    ldi NN, -1
+    com B4     $  com B5     $  com B6     $  com B7
+               $  com B1     $  com B2     $  com B3
+    NEG B0
+               $  sbc B1,NN  $  sbc B2,NN  $  sbc B3,NN
+    sbc B4,NN  $  sbc B5,NN  $  sbc B6,NN  $  sbc B7,NN
+
+3:  ;; Do the unsigned 64-Bit Division/Modulo (depending on T-flag)
+    XCALL   __udivmod64
+
+    ;; Adjust Result's Sign
+#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+    tst     SS
+    brpl    4f
+#else
+    sbrc    SS, 7
+#endif /* __AVR_HAVE_JMP_CALL__ */
+    XCALL   __negdi2
+
+4:  ;; Epilogue: Restore 12 Registers and return
+    do_epilogue_restores 12
+
+ENDF __divdi3_moddi3
+
+#endif /* L_divdi3 */
+
+#undef R_cnt
+#undef SS
+#undef NN
+
+.section .text.libgcc, "ax", @progbits
+
+#define TT __tmp_reg__
+
+#if defined (L_adddi3)
+;; (set (reg:DI 18)
+;;      (plus:DI (reg:DI 18)
+;;               (reg:DI 10)))
+;; Sets the V flag for signed overflow tests
+;; Sets the C flag for unsigned overflow tests
+DEFUN __adddi3
+    ADD A0,B0  $  adc A1,B1  $  adc A2,B2  $  adc A3,B3
+    adc A4,B4  $  adc A5,B5  $  adc A6,B6  $  adc A7,B7
+    ret
+ENDF __adddi3
+#endif /* L_adddi3 */
+
+#if defined (L_adddi3_s8)
+;; (set (reg:DI 18)
+;;      (plus:DI (reg:DI 18)
+;;               (sign_extend:SI (reg:QI 26))))
+;; Sets the V flag for signed overflow tests
+;; Sets the C flag for unsigned overflow tests provided 0 <= R26 < 128
+DEFUN __adddi3_s8
+    clr     TT
+    sbrc    r26, 7
+    com     TT
+    ADD A0,r26 $  adc A1,TT  $  adc A2,TT  $  adc A3,TT
+    adc A4,TT  $  adc A5,TT  $  adc A6,TT  $  adc A7,TT
+    ret
+ENDF __adddi3_s8
+#endif /* L_adddi3_s8 */
+
+#if defined (L_subdi3)
+;; (set (reg:DI 18)
+;;      (minus:DI (reg:DI 18)
+;;                (reg:DI 10)))
+;; Sets the V flag for signed overflow tests
+;; Sets the C flag for unsigned overflow tests
+DEFUN __subdi3
+    SUB A0,B0  $  sbc A1,B1  $  sbc A2,B2  $  sbc A3,B3
+    sbc A4,B4  $  sbc A5,B5  $  sbc A6,B6  $  sbc A7,B7
+    ret
+ENDF __subdi3
+#endif /* L_subdi3 */
+
+#if defined (L_cmpdi2)
+;; (set (cc0)
+;;      (compare (reg:DI 18)
+;;               (reg:DI 10)))
+DEFUN __cmpdi2
+    CP  A0,B0  $  cpc A1,B1  $  cpc A2,B2  $  cpc A3,B3
+    cpc A4,B4  $  cpc A5,B5  $  cpc A6,B6  $  cpc A7,B7
+    ret
+ENDF __cmpdi2
+#endif /* L_cmpdi2 */
+
+#if defined (L_cmpdi2_s8)
+;; (set (cc0)
+;;      (compare (reg:DI 18)
+;;               (sign_extend:SI (reg:QI 26))))
+DEFUN __cmpdi2_s8
+    clr     TT
+    sbrc    r26, 7
+    com     TT
+    CP  A0,r26 $  cpc A1,TT  $  cpc A2,TT  $  cpc A3,TT
+    cpc A4,TT  $  cpc A5,TT  $  cpc A6,TT  $  cpc A7,TT
+    ret
+ENDF __cmpdi2_s8
+#endif /* L_cmpdi2_s8 */
+
+#if defined (L_negdi2)
+;; (set (reg:DI 18)
+;;      (neg:DI (reg:DI 18)))
+;; Sets the V flag for signed overflow tests
+DEFUN __negdi2
+
+    com  A4    $  com  A5    $  com  A6    $  com  A7
+               $  com  A1    $  com  A2    $  com  A3
+    NEG  A0
+               $  sbci A1,-1 $  sbci A2,-1 $  sbci A3,-1
+    sbci A4,-1 $  sbci A5,-1 $  sbci A6,-1 $  sbci A7,-1
+    ret
+
+ENDF __negdi2
+#endif /* L_negdi2 */
+
+#undef TT
+
+#undef C7
+#undef C6
+#undef C5
+#undef C4
+#undef C3
+#undef C2
+#undef C1
+#undef C0
+
+#undef B7
+#undef B6
+#undef B5
+#undef B4
+#undef B3
+#undef B2
+#undef B1
+#undef B0
+
+#undef A7
+#undef A6
+#undef A5
+#undef A4
+#undef A3
+#undef A2
+#undef A1
+#undef A0
+
+
+.section .text.libgcc.prologue, "ax", @progbits
+
+/**********************************
+ * This is a prologue subroutine
+ **********************************/
+#if defined (L_prologue)
+
+;; This function does not clobber T-flag; 64-bit division relies on it
+DEFUN __prologue_saves__
+	push r2
+	push r3
+	push r4
+	push r5
+	push r6
+	push r7
+	push r8
+	push r9
+	push r10
+	push r11
+	push r12
+	push r13
+	push r14
+	push r15
+	push r16
+	push r17
+	push r28
+	push r29
+#if !defined (__AVR_HAVE_SPH__)
+	in	r28,__SP_L__
+	sub	r28,r26
+	out	__SP_L__,r28
+	clr	r29
+#elif defined (__AVR_XMEGA__)
+	in	r28,__SP_L__
+	in	r29,__SP_H__
+	sub	r28,r26
+	sbc	r29,r27
+	out	__SP_L__,r28
+	out	__SP_H__,r29
+#else
+	in	r28,__SP_L__
+	in	r29,__SP_H__
+	sub	r28,r26
+	sbc	r29,r27
+	in	__tmp_reg__,__SREG__
+	cli
+	out	__SP_H__,r29
+	out	__SREG__,__tmp_reg__
+	out	__SP_L__,r28
+#endif /* #SP = 8/16 */
+
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+	eijmp
+#else
+	ijmp
+#endif
+
+ENDF __prologue_saves__
+#endif /* defined (L_prologue) */
+
+/*
+ * This is an epilogue subroutine
+ */
+#if defined (L_epilogue)
+
+DEFUN __epilogue_restores__
+	ldd	r2,Y+18
+	ldd	r3,Y+17
+	ldd	r4,Y+16
+	ldd	r5,Y+15
+	ldd	r6,Y+14
+	ldd	r7,Y+13
+	ldd	r8,Y+12
+	ldd	r9,Y+11
+	ldd	r10,Y+10
+	ldd	r11,Y+9
+	ldd	r12,Y+8
+	ldd	r13,Y+7
+	ldd	r14,Y+6
+	ldd	r15,Y+5
+	ldd	r16,Y+4
+	ldd	r17,Y+3
+	ldd	r26,Y+2
+#if !defined (__AVR_HAVE_SPH__)
+	ldd	r29,Y+1
+	add	r28,r30
+	out	__SP_L__,r28
+	mov	r28, r26
+#elif defined (__AVR_XMEGA__)
+	ldd  r27,Y+1
+	add  r28,r30
+	adc  r29,__zero_reg__
+	out  __SP_L__,r28
+	out  __SP_H__,r29
+	wmov 28, 26
+#else
+	ldd	r27,Y+1
+	add	r28,r30
+	adc	r29,__zero_reg__
+	in	__tmp_reg__,__SREG__
+	cli
+	out	__SP_H__,r29
+	out	__SREG__,__tmp_reg__
+	out	__SP_L__,r28
+	mov_l	r28, r26
+	mov_h	r29, r27
+#endif /* #SP = 8/16 */
+	ret
+ENDF __epilogue_restores__
+#endif /* defined (L_epilogue) */
+
+#ifdef L_exit
+	.section .fini9,"ax",@progbits
+DEFUN _exit
+	.weak	exit
+exit:
+ENDF _exit
+
+	/* Code from .fini8 ... .fini1 sections inserted by ld script.  */
+
+	.section .fini0,"ax",@progbits
+	cli
+__stop_program:
+	rjmp	__stop_program
+#endif /* defined (L_exit) */
+
+#ifdef L_cleanup
+	.weak	_cleanup
+	.func	_cleanup
+_cleanup:
+	ret
+.endfunc
+#endif /* defined (L_cleanup) */
+
+
+.section .text.libgcc, "ax", @progbits
+
+#ifdef L_tablejump
+DEFUN __tablejump2__
+	lsl	r30
+	rol	r31
+    ;; FALLTHRU
+ENDF __tablejump2__
+
+DEFUN __tablejump__
+#if defined (__AVR_HAVE_LPMX__)
+	lpm __tmp_reg__, Z+
+	lpm r31, Z
+	mov r30, __tmp_reg__
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+	eijmp
+#else
+	ijmp
+#endif
+
+#else /* !HAVE_LPMX */
+	lpm
+	adiw r30, 1
+	push r0
+	lpm
+	push r0
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+	in   __tmp_reg__, __EIND__
+	push __tmp_reg__
+#endif
+	ret
+#endif /* !HAVE_LPMX */
+ENDF __tablejump__
+#endif /* defined (L_tablejump) */
+
+#ifdef L_copy_data
+	.section .init4,"ax",@progbits
+DEFUN __do_copy_data
+#if defined(__AVR_HAVE_ELPMX__)
+	ldi	r17, hi8(__data_end)
+	ldi	r26, lo8(__data_start)
+	ldi	r27, hi8(__data_start)
+	ldi	r30, lo8(__data_load_start)
+	ldi	r31, hi8(__data_load_start)
+	ldi	r16, hh8(__data_load_start)
+	out	__RAMPZ__, r16
+	rjmp	.L__do_copy_data_start
+.L__do_copy_data_loop:
+	elpm	r0, Z+
+	st	X+, r0
+.L__do_copy_data_start:
+	cpi	r26, lo8(__data_end)
+	cpc	r27, r17
+	brne	.L__do_copy_data_loop
+#elif  !defined(__AVR_HAVE_ELPMX__) && defined(__AVR_HAVE_ELPM__)
+	ldi	r17, hi8(__data_end)
+	ldi	r26, lo8(__data_start)
+	ldi	r27, hi8(__data_start)
+	ldi	r30, lo8(__data_load_start)
+	ldi	r31, hi8(__data_load_start)
+	ldi	r16, hh8(__data_load_start - 0x10000)
+.L__do_copy_data_carry:
+	inc	r16
+	out	__RAMPZ__, r16
+	rjmp	.L__do_copy_data_start
+.L__do_copy_data_loop:
+	elpm
+	st	X+, r0
+	adiw	r30, 1
+	brcs	.L__do_copy_data_carry
+.L__do_copy_data_start:
+	cpi	r26, lo8(__data_end)
+	cpc	r27, r17
+	brne	.L__do_copy_data_loop
+#elif !defined(__AVR_HAVE_ELPMX__) && !defined(__AVR_HAVE_ELPM__)
+	ldi	r17, hi8(__data_end)
+	ldi	r26, lo8(__data_start)
+	ldi	r27, hi8(__data_start)
+	ldi	r30, lo8(__data_load_start)
+	ldi	r31, hi8(__data_load_start)
+	rjmp	.L__do_copy_data_start
+.L__do_copy_data_loop:
+#if defined (__AVR_HAVE_LPMX__)
+	lpm	r0, Z+
+#else
+	lpm
+	adiw	r30, 1
+#endif
+	st	X+, r0
+.L__do_copy_data_start:
+	cpi	r26, lo8(__data_end)
+	cpc	r27, r17
+	brne	.L__do_copy_data_loop
+#endif /* !defined(__AVR_HAVE_ELPMX__) && !defined(__AVR_HAVE_ELPM__) */
+#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
+	;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
+	out	__RAMPZ__, __zero_reg__
+#endif /* ELPM && RAMPD */
+ENDF __do_copy_data
+#endif /* L_copy_data */
+
+/* __do_clear_bss is only necessary if there is anything in .bss section.  */
+
+#ifdef L_clear_bss
+	.section .init4,"ax",@progbits
+DEFUN __do_clear_bss
+	ldi	r17, hi8(__bss_end)
+	ldi	r26, lo8(__bss_start)
+	ldi	r27, hi8(__bss_start)
+	rjmp	.do_clear_bss_start
+.do_clear_bss_loop:
+	st	X+, __zero_reg__
+.do_clear_bss_start:
+	cpi	r26, lo8(__bss_end)
+	cpc	r27, r17
+	brne	.do_clear_bss_loop
+ENDF __do_clear_bss
+#endif /* L_clear_bss */
+
+/* __do_global_ctors and __do_global_dtors are only necessary
+   if there are any constructors/destructors.  */
+
+#ifdef L_ctors
+	.section .init6,"ax",@progbits
+DEFUN __do_global_ctors
+#if defined(__AVR_HAVE_ELPM__)
+	ldi	r17, hi8(__ctors_start)
+	ldi	r28, lo8(__ctors_end)
+	ldi	r29, hi8(__ctors_end)
+	ldi	r16, hh8(__ctors_end)
+	rjmp	.L__do_global_ctors_start
+.L__do_global_ctors_loop:
+	sbiw	r28, 2
+	sbc     r16, __zero_reg__
+	mov_h	r31, r29
+	mov_l	r30, r28
+	out     __RAMPZ__, r16
+	XCALL	__tablejump_elpm__
+.L__do_global_ctors_start:
+	cpi	r28, lo8(__ctors_start)
+	cpc	r29, r17
+	ldi	r24, hh8(__ctors_start)
+	cpc	r16, r24
+	brne	.L__do_global_ctors_loop
+#else
+	ldi	r17, hi8(__ctors_start)
+	ldi	r28, lo8(__ctors_end)
+	ldi	r29, hi8(__ctors_end)
+	rjmp	.L__do_global_ctors_start
+.L__do_global_ctors_loop:
+	sbiw	r28, 2
+	mov_h	r31, r29
+	mov_l	r30, r28
+	XCALL	__tablejump__
+.L__do_global_ctors_start:
+	cpi	r28, lo8(__ctors_start)
+	cpc	r29, r17
+	brne	.L__do_global_ctors_loop
+#endif /* defined(__AVR_HAVE_ELPM__) */
+ENDF __do_global_ctors
+#endif /* L_ctors */
+
+#ifdef L_dtors
+	.section .fini6,"ax",@progbits
+DEFUN __do_global_dtors
+#if defined(__AVR_HAVE_ELPM__)
+	ldi	r17, hi8(__dtors_end)
+	ldi	r28, lo8(__dtors_start)
+	ldi	r29, hi8(__dtors_start)
+	ldi	r16, hh8(__dtors_start)
+	rjmp	.L__do_global_dtors_start
+.L__do_global_dtors_loop:
+	sbiw	r28, 2
+	sbc     r16, __zero_reg__
+	mov_h	r31, r29
+	mov_l	r30, r28
+	out     __RAMPZ__, r16
+	XCALL	__tablejump_elpm__
+.L__do_global_dtors_start:
+	cpi	r28, lo8(__dtors_end)
+	cpc	r29, r17
+	ldi	r24, hh8(__dtors_end)
+	cpc	r16, r24
+	brne	.L__do_global_dtors_loop
+#else
+	ldi	r17, hi8(__dtors_end)
+	ldi	r28, lo8(__dtors_start)
+	ldi	r29, hi8(__dtors_start)
+	rjmp	.L__do_global_dtors_start
+.L__do_global_dtors_loop:
+	mov_h	r31, r29
+	mov_l	r30, r28
+	XCALL	__tablejump__
+	adiw	r28, 2
+.L__do_global_dtors_start:
+	cpi	r28, lo8(__dtors_end)
+	cpc	r29, r17
+	brne	.L__do_global_dtors_loop
+#endif /* defined(__AVR_HAVE_ELPM__) */
+ENDF __do_global_dtors
+#endif /* L_dtors */
+
+.section .text.libgcc, "ax", @progbits
+
+#ifdef L_tablejump_elpm
+DEFUN __tablejump_elpm__
+#if defined (__AVR_HAVE_ELPMX__)
+	elpm	__tmp_reg__, Z+
+	elpm	r31, Z
+	mov	r30, __tmp_reg__
+#if defined (__AVR_HAVE_RAMPD__)
+	;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
+	out	__RAMPZ__, __zero_reg__
+#endif /* RAMPD */
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+	eijmp
+#else
+	ijmp
+#endif
+
+#elif defined (__AVR_HAVE_ELPM__)
+	elpm
+	adiw	r30, 1
+	push	r0
+	elpm
+	push	r0
+#if defined (__AVR_HAVE_EIJMP_EICALL__)
+	in      __tmp_reg__, __EIND__
+	push    __tmp_reg__
+#endif
+	ret
+#endif
+ENDF __tablejump_elpm__
+#endif /* defined (L_tablejump_elpm) */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Loading n bytes from Flash; n = 3,4
+;; R22... = Flash[Z]
+;; Clobbers: __tmp_reg__
+
+#if (defined (L_load_3)        \
+     || defined (L_load_4))    \
+    && !defined (__AVR_HAVE_LPMX__)
+
+;; Destination
+#define D0  22
+#define D1  D0+1
+#define D2  D0+2
+#define D3  D0+3
+
+.macro  .load dest, n
+    lpm
+    mov     \dest, r0
+.if \dest != D0+\n-1
+    adiw    r30, 1
+.else
+    sbiw    r30, \n-1
+.endif
+.endm
+
+#if defined (L_load_3)
+DEFUN __load_3
+    push  D3
+    XCALL __load_4
+    pop   D3
+    ret
+ENDF __load_3
+#endif /* L_load_3 */
+
+#if defined (L_load_4)
+DEFUN __load_4
+    .load D0, 4
+    .load D1, 4
+    .load D2, 4
+    .load D3, 4
+    ret
+ENDF __load_4
+#endif /* L_load_4 */
+
+#endif /* L_load_3 || L_load_3 */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Loading n bytes from Flash or RAM;  n = 1,2,3,4
+;; R22... = Flash[R21:Z] or RAM[Z] depending on R21.7
+;; Clobbers: __tmp_reg__, R21, R30, R31
+
+#if (defined (L_xload_1)            \
+     || defined (L_xload_2)         \
+     || defined (L_xload_3)         \
+     || defined (L_xload_4))
+
+;; Destination
+#define D0  22
+#define D1  D0+1
+#define D2  D0+2
+#define D3  D0+3
+
+;; Register containing bits 16+ of the address
+
+#define HHI8  21
+
+.macro  .xload dest, n
+#if defined (__AVR_HAVE_ELPMX__)
+    elpm    \dest, Z+
+#elif defined (__AVR_HAVE_ELPM__)
+    elpm
+    mov     \dest, r0
+.if \dest != D0+\n-1
+    adiw    r30, 1
+    adc     HHI8, __zero_reg__
+    out     __RAMPZ__, HHI8
+.endif
+#elif defined (__AVR_HAVE_LPMX__)
+    lpm     \dest, Z+
+#else
+    lpm
+    mov     \dest, r0
+.if \dest != D0+\n-1
+    adiw    r30, 1
+.endif
+#endif
+#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
+.if \dest == D0+\n-1
+    ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
+    out     __RAMPZ__, __zero_reg__
+.endif
+#endif
+.endm ; .xload
+
+#if defined (L_xload_1)
+DEFUN __xload_1
+#if defined (__AVR_HAVE_LPMX__) && !defined (__AVR_HAVE_ELPM__)
+    sbrc    HHI8, 7
+    ld      D0, Z
+    sbrs    HHI8, 7
+    lpm     D0, Z
+    ret
+#else
+    sbrc    HHI8, 7
+    rjmp    1f
+#if defined (__AVR_HAVE_ELPM__)
+    out     __RAMPZ__, HHI8
+#endif /* __AVR_HAVE_ELPM__ */
+    .xload  D0, 1
+    ret
+1:  ld      D0, Z
+    ret
+#endif /* LPMx && ! ELPM */
+ENDF __xload_1
+#endif /* L_xload_1 */
+
+#if defined (L_xload_2)
+DEFUN __xload_2
+    sbrc    HHI8, 7
+    rjmp    1f
+#if defined (__AVR_HAVE_ELPM__)
+    out     __RAMPZ__, HHI8
+#endif /* __AVR_HAVE_ELPM__ */
+    .xload  D0, 2
+    .xload  D1, 2
+    ret
+1:  ld      D0, Z+
+    ld      D1, Z+
+    ret
+ENDF __xload_2
+#endif /* L_xload_2 */
+
+#if defined (L_xload_3)
+DEFUN __xload_3
+    sbrc    HHI8, 7
+    rjmp    1f
+#if defined (__AVR_HAVE_ELPM__)
+    out     __RAMPZ__, HHI8
+#endif /* __AVR_HAVE_ELPM__ */
+    .xload  D0, 3
+    .xload  D1, 3
+    .xload  D2, 3
+    ret
+1:  ld      D0, Z+
+    ld      D1, Z+
+    ld      D2, Z+
+    ret
+ENDF __xload_3
+#endif /* L_xload_3 */
+
+#if defined (L_xload_4)
+DEFUN __xload_4
+    sbrc    HHI8, 7
+    rjmp    1f
+#if defined (__AVR_HAVE_ELPM__)
+    out     __RAMPZ__, HHI8
+#endif /* __AVR_HAVE_ELPM__ */
+    .xload  D0, 4
+    .xload  D1, 4
+    .xload  D2, 4
+    .xload  D3, 4
+    ret
+1:  ld      D0, Z+
+    ld      D1, Z+
+    ld      D2, Z+
+    ld      D3, Z+
+    ret
+ENDF __xload_4
+#endif /* L_xload_4 */
+
+#endif /* L_xload_{1|2|3|4} */
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; memcopy from Address Space __pgmx to RAM
+;; R23:Z = Source Address
+;; X     = Destination Address
+;; Clobbers: __tmp_reg__, R23, R24, R25, X, Z
+
+#if defined (L_movmemx)
+
+#define HHI8  23
+#define LOOP  24
+
+DEFUN __movmemx_qi
+    ;; #Bytes to copy fity in 8 Bits (1..255)
+    ;; Zero-extend Loop Counter
+    clr     LOOP+1
+    ;; FALLTHRU
+ENDF __movmemx_qi
+
+DEFUN __movmemx_hi
+
+;; Read from where?
+    sbrc    HHI8, 7
+    rjmp    1f
+
+;; Read from Flash
+
+#if defined (__AVR_HAVE_ELPM__)
+    out     __RAMPZ__, HHI8
+#endif
+
+0:  ;; Load 1 Byte from Flash...
+
+#if defined (__AVR_HAVE_ELPMX__)
+    elpm    r0, Z+
+#elif defined (__AVR_HAVE_ELPM__)
+    elpm
+    adiw    r30, 1
+    adc     HHI8, __zero_reg__
+    out     __RAMPZ__, HHI8
+#elif defined (__AVR_HAVE_LPMX__)
+    lpm     r0, Z+
+#else
+    lpm
+    adiw    r30, 1
+#endif
+
+    ;; ...and store that Byte to RAM Destination
+    st      X+, r0
+    sbiw    LOOP, 1
+    brne    0b
+#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
+    ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
+    out	__RAMPZ__, __zero_reg__
+#endif /* ELPM && RAMPD */
+    ret
+
+;; Read from RAM
+
+1:  ;; Read 1 Byte from RAM...
+    ld      r0, Z+
+    ;; and store that Byte to RAM Destination
+    st      X+, r0
+    sbiw    LOOP, 1
+    brne    1b
+    ret
+ENDF __movmemx_hi
+
+#undef HHI8
+#undef LOOP
+
+#endif /* L_movmemx */
+
+
+.section .text.libgcc.builtins, "ax", @progbits
+
+/**********************************
+ * Find first set Bit (ffs)
+ **********************************/
+
+#if defined (L_ffssi2)
+;; find first set bit
+;; r25:r24 = ffs32 (r25:r22)
+;; clobbers: r22, r26
+DEFUN __ffssi2
+    clr  r26
+    tst  r22
+    brne 1f
+    subi r26, -8
+    or   r22, r23
+    brne 1f
+    subi r26, -8
+    or   r22, r24
+    brne 1f
+    subi r26, -8
+    or   r22, r25
+    brne 1f
+    ret
+1:  mov  r24, r22
+    XJMP __loop_ffsqi2
+ENDF __ffssi2
+#endif /* defined (L_ffssi2) */
+
+#if defined (L_ffshi2)
+;; find first set bit
+;; r25:r24 = ffs16 (r25:r24)
+;; clobbers: r26
+DEFUN __ffshi2
+    clr  r26
+#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+    ;; Some cores have problem skipping 2-word instruction
+    tst  r24
+    breq 2f
+#else
+    cpse r24, __zero_reg__
+#endif /* __AVR_HAVE_JMP_CALL__ */
+1:  XJMP __loop_ffsqi2
+2:  ldi  r26, 8
+    or   r24, r25
+    brne 1b
+    ret
+ENDF __ffshi2
+#endif /* defined (L_ffshi2) */
+
+#if defined (L_loop_ffsqi2)
+;; Helper for ffshi2, ffssi2
+;; r25:r24 = r26 + zero_extend16 (ffs8(r24))
+;; r24 must be != 0
+;; clobbers: r26
+DEFUN __loop_ffsqi2
+    inc  r26
+    lsr  r24
+    brcc __loop_ffsqi2
+    mov  r24, r26
+    clr  r25
+    ret
+ENDF __loop_ffsqi2
+#endif /* defined (L_loop_ffsqi2) */
+
+
+/**********************************
+ * Count trailing Zeros (ctz)
+ **********************************/
+
+#if defined (L_ctzsi2)
+;; count trailing zeros
+;; r25:r24 = ctz32 (r25:r22)
+;; clobbers: r26, r22
+;; ctz(0) = 255
+;; Note that ctz(0) in undefined for GCC
+DEFUN __ctzsi2
+    XCALL __ffssi2
+    dec  r24
+    ret
+ENDF __ctzsi2
+#endif /* defined (L_ctzsi2) */
+
+#if defined (L_ctzhi2)
+;; count trailing zeros
+;; r25:r24 = ctz16 (r25:r24)
+;; clobbers: r26
+;; ctz(0) = 255
+;; Note that ctz(0) in undefined for GCC
+DEFUN __ctzhi2
+    XCALL __ffshi2
+    dec  r24
+    ret
+ENDF __ctzhi2
+#endif /* defined (L_ctzhi2) */
+
+
+/**********************************
+ * Count leading Zeros (clz)
+ **********************************/
+
+#if defined (L_clzdi2)
+;; count leading zeros
+;; r25:r24 = clz64 (r25:r18)
+;; clobbers: r22, r23, r26
+DEFUN __clzdi2
+    XCALL __clzsi2
+    sbrs r24, 5
+    ret
+    mov_l r22, r18
+    mov_h r23, r19
+    mov_l r24, r20
+    mov_h r25, r21
+    XCALL __clzsi2
+    subi r24, -32
+    ret
+ENDF __clzdi2
+#endif /* defined (L_clzdi2) */
+
+#if defined (L_clzsi2)
+;; count leading zeros
+;; r25:r24 = clz32 (r25:r22)
+;; clobbers: r26
+DEFUN __clzsi2
+    XCALL __clzhi2
+    sbrs r24, 4
+    ret
+    mov_l r24, r22
+    mov_h r25, r23
+    XCALL __clzhi2
+    subi r24, -16
+    ret
+ENDF __clzsi2
+#endif /* defined (L_clzsi2) */
+
+#if defined (L_clzhi2)
+;; count leading zeros
+;; r25:r24 = clz16 (r25:r24)
+;; clobbers: r26
+DEFUN __clzhi2
+    clr  r26
+    tst  r25
+    brne 1f
+    subi r26, -8
+    or   r25, r24
+    brne 1f
+    ldi  r24, 16
+    ret
+1:  cpi  r25, 16
+    brsh 3f
+    subi r26, -3
+    swap r25
+2:  inc  r26
+3:  lsl  r25
+    brcc 2b
+    mov  r24, r26
+    clr  r25
+    ret
+ENDF __clzhi2
+#endif /* defined (L_clzhi2) */
+
+
+/**********************************
+ * Parity
+ **********************************/
+
+#if defined (L_paritydi2)
+;; r25:r24 = parity64 (r25:r18)
+;; clobbers: __tmp_reg__
+DEFUN __paritydi2
+    eor  r24, r18
+    eor  r24, r19
+    eor  r24, r20
+    eor  r24, r21
+    XJMP __paritysi2
+ENDF __paritydi2
+#endif /* defined (L_paritydi2) */
+
+#if defined (L_paritysi2)
+;; r25:r24 = parity32 (r25:r22)
+;; clobbers: __tmp_reg__
+DEFUN __paritysi2
+    eor  r24, r22
+    eor  r24, r23
+    XJMP __parityhi2
+ENDF __paritysi2
+#endif /* defined (L_paritysi2) */
+
+#if defined (L_parityhi2)
+;; r25:r24 = parity16 (r25:r24)
+;; clobbers: __tmp_reg__
+DEFUN __parityhi2
+    eor  r24, r25
+;; FALLTHRU
+ENDF __parityhi2
+
+;; r25:r24 = parity8 (r24)
+;; clobbers: __tmp_reg__
+DEFUN __parityqi2
+    ;; parity is in r24[0..7]
+    mov  __tmp_reg__, r24
+    swap __tmp_reg__
+    eor  r24, __tmp_reg__
+    ;; parity is in r24[0..3]
+    subi r24, -4
+    andi r24, -5
+    subi r24, -6
+    ;; parity is in r24[0,3]
+    sbrc r24, 3
+    inc  r24
+    ;; parity is in r24[0]
+    andi r24, 1
+    clr  r25
+    ret
+ENDF __parityqi2
+#endif /* defined (L_parityhi2) */
+
+
+/**********************************
+ * Population Count
+ **********************************/
+
+#if defined (L_popcounthi2)
+;; population count
+;; r25:r24 = popcount16 (r25:r24)
+;; clobbers: __tmp_reg__
+DEFUN __popcounthi2
+    XCALL __popcountqi2
+    push r24
+    mov  r24, r25
+    XCALL __popcountqi2
+    clr  r25
+    ;; FALLTHRU
+ENDF __popcounthi2
+
+DEFUN __popcounthi2_tail
+    pop   __tmp_reg__
+    add   r24, __tmp_reg__
+    ret
+ENDF __popcounthi2_tail
+#endif /* defined (L_popcounthi2) */
+
+#if defined (L_popcountsi2)
+;; population count
+;; r25:r24 = popcount32 (r25:r22)
+;; clobbers: __tmp_reg__
+DEFUN __popcountsi2
+    XCALL __popcounthi2
+    push  r24
+    mov_l r24, r22
+    mov_h r25, r23
+    XCALL __popcounthi2
+    XJMP  __popcounthi2_tail
+ENDF __popcountsi2
+#endif /* defined (L_popcountsi2) */
+
+#if defined (L_popcountdi2)
+;; population count
+;; r25:r24 = popcount64 (r25:r18)
+;; clobbers: r22, r23, __tmp_reg__
+DEFUN __popcountdi2
+    XCALL __popcountsi2
+    push  r24
+    mov_l r22, r18
+    mov_h r23, r19
+    mov_l r24, r20
+    mov_h r25, r21
+    XCALL __popcountsi2
+    XJMP  __popcounthi2_tail
+ENDF __popcountdi2
+#endif /* defined (L_popcountdi2) */
+
+#if defined (L_popcountqi2)
+;; population count
+;; r24 = popcount8 (r24)
+;; clobbers: __tmp_reg__
+DEFUN __popcountqi2
+    mov  __tmp_reg__, r24
+    andi r24, 1
+    lsr  __tmp_reg__
+    lsr  __tmp_reg__
+    adc  r24, __zero_reg__
+    lsr  __tmp_reg__
+    adc  r24, __zero_reg__
+    lsr  __tmp_reg__
+    adc  r24, __zero_reg__
+    lsr  __tmp_reg__
+    adc  r24, __zero_reg__
+    lsr  __tmp_reg__
+    adc  r24, __zero_reg__
+    lsr  __tmp_reg__
+    adc  r24, __tmp_reg__
+    ret
+ENDF __popcountqi2
+#endif /* defined (L_popcountqi2) */
+
+
+/**********************************
+ * Swap bytes
+ **********************************/
+
+;; swap two registers with different register number
+.macro bswap a, b
+    eor \a, \b
+    eor \b, \a
+    eor \a, \b
+.endm
+
+#if defined (L_bswapsi2)
+;; swap bytes
+;; r25:r22 = bswap32 (r25:r22)
+DEFUN __bswapsi2
+    bswap r22, r25
+    bswap r23, r24
+    ret
+ENDF __bswapsi2
+#endif /* defined (L_bswapsi2) */
+
+#if defined (L_bswapdi2)
+;; swap bytes
+;; r25:r18 = bswap64 (r25:r18)
+DEFUN __bswapdi2
+    bswap r18, r25
+    bswap r19, r24
+    bswap r20, r23
+    bswap r21, r22
+    ret
+ENDF __bswapdi2
+#endif /* defined (L_bswapdi2) */
+
+
+/**********************************
+ * 64-bit shifts
+ **********************************/
+
+#if defined (L_ashrdi3)
+;; Arithmetic shift right
+;; r25:r18 = ashr64 (r25:r18, r17:r16)
+DEFUN __ashrdi3
+    bst     r25, 7
+    bld     __zero_reg__, 0
+    ;; FALLTHRU
+ENDF  __ashrdi3
+
+;; Logic shift right
+;; r25:r18 = lshr64 (r25:r18, r17:r16)
+DEFUN __lshrdi3
+    lsr     __zero_reg__
+    sbc     __tmp_reg__, __tmp_reg__
+    push    r16
+0:  cpi     r16, 8
+    brlo 2f
+    subi    r16, 8
+    mov     r18, r19
+    mov     r19, r20
+    mov     r20, r21
+    mov     r21, r22
+    mov     r22, r23
+    mov     r23, r24
+    mov     r24, r25
+    mov     r25, __tmp_reg__
+    rjmp 0b
+1:  asr     __tmp_reg__
+    ror     r25
+    ror     r24
+    ror     r23
+    ror     r22
+    ror     r21
+    ror     r20
+    ror     r19
+    ror     r18
+2:  dec     r16
+    brpl 1b
+    pop     r16
+    ret
+ENDF __lshrdi3
+#endif /* defined (L_ashrdi3) */
+
+#if defined (L_ashldi3)
+;; Shift left
+;; r25:r18 = ashl64 (r25:r18, r17:r16)
+DEFUN __ashldi3
+    push    r16
+0:  cpi     r16, 8
+    brlo 2f
+    mov     r25, r24
+    mov     r24, r23
+    mov     r23, r22
+    mov     r22, r21
+    mov     r21, r20
+    mov     r20, r19
+    mov     r19, r18
+    clr     r18
+    subi    r16, 8
+    rjmp 0b
+1:  lsl     r18
+    rol     r19
+    rol     r20
+    rol     r21
+    rol     r22
+    rol     r23
+    rol     r24
+    rol     r25
+2:  dec     r16
+    brpl 1b
+    pop     r16
+    ret
+ENDF __ashldi3
+#endif /* defined (L_ashldi3) */
+
+#if defined (L_rotldi3)
+;; Shift left
+;; r25:r18 = rotl64 (r25:r18, r17:r16)
+DEFUN __rotldi3
+    push    r16
+0:  cpi     r16, 8
+    brlo 2f
+    subi    r16, 8
+    mov     __tmp_reg__, r25
+    mov     r25, r24
+    mov     r24, r23
+    mov     r23, r22
+    mov     r22, r21
+    mov     r21, r20
+    mov     r20, r19
+    mov     r19, r18
+    mov     r18, __tmp_reg__
+    rjmp 0b
+1:  lsl     r18
+    rol     r19
+    rol     r20
+    rol     r21
+    rol     r22
+    rol     r23
+    rol     r24
+    rol     r25
+    adc     r18, __zero_reg__
+2:  dec     r16
+    brpl 1b
+    pop     r16
+    ret
+ENDF __rotldi3
+#endif /* defined (L_rotldi3) */
+
+
+.section .text.libgcc.fmul, "ax", @progbits
+
+/***********************************************************/
+;;; Softmul versions of FMUL, FMULS and FMULSU to implement
+;;; __builtin_avr_fmul* if !AVR_HAVE_MUL
+/***********************************************************/
+
+#define A1 24
+#define B1 25
+#define C0 22
+#define C1 23
+#define A0 __tmp_reg__
+
+#ifdef L_fmuls
+;;; r23:r22 = fmuls (r24, r25) like in FMULS instruction
+;;; Clobbers: r24, r25, __tmp_reg__
+DEFUN __fmuls
+    ;; A0.7 = negate result?
+    mov  A0, A1
+    eor  A0, B1
+    ;; B1 = |B1|
+    sbrc B1, 7
+    neg  B1
+    XJMP __fmulsu_exit
+ENDF __fmuls
+#endif /* L_fmuls */
+
+#ifdef L_fmulsu
+;;; r23:r22 = fmulsu (r24, r25) like in FMULSU instruction
+;;; Clobbers: r24, r25, __tmp_reg__
+DEFUN __fmulsu
+    ;; A0.7 = negate result?
+    mov  A0, A1
+;; FALLTHRU
+ENDF __fmulsu
+
+;; Helper for __fmuls and __fmulsu
+DEFUN __fmulsu_exit
+    ;; A1 = |A1|
+    sbrc A1, 7
+    neg  A1
+#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
+    ;; Some cores have problem skipping 2-word instruction
+    tst  A0
+    brmi 1f
+#else
+    sbrs A0, 7
+#endif /* __AVR_HAVE_JMP_CALL__ */
+    XJMP  __fmul
+1:  XCALL __fmul
+    ;; C = -C iff A0.7 = 1
+    NEG2 C0
+    ret
+ENDF __fmulsu_exit
+#endif /* L_fmulsu */
+
+
+#ifdef L_fmul
+;;; r22:r23 = fmul (r24, r25) like in FMUL instruction
+;;; Clobbers: r24, r25, __tmp_reg__
+DEFUN __fmul
+    ; clear result
+    clr   C0
+    clr   C1
+    clr   A0
+1:  tst   B1
+    ;; 1.0 = 0x80, so test for bit 7 of B to see if A must to be added to C.
+2:  brpl  3f
+    ;; C += A
+    add   C0, A0
+    adc   C1, A1
+3:  ;; A >>= 1
+    lsr   A1
+    ror   A0
+    ;; B <<= 1
+    lsl   B1
+    brne  2b
+    ret
+ENDF __fmul
+#endif /* L_fmul */
+
+#undef A0
+#undef A1
+#undef B1
+#undef C0
+#undef C1
+
+#include "lib1funcs-fixed.S"
diff --git a/gcc-4.9/libgcc/config/avr/lib2-object.mk b/gcc-4.9/libgcc/config/avr/lib2-object.mk
new file mode 100644
index 000000000..6a9e04de0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/lib2-object.mk
@@ -0,0 +1,23 @@
+# This file is included several times in a row, once for each element of
+# $(iter-items).  On each inclusion, we advance $o to the next element.
+# $(iter-labels) and $(iter-flags) are also advanced.
+# This works similar to $(srcdir)/siditi-object.mk.
+
+o := $(firstword $(iter-items))
+iter-items := $(filter-out $o,$(iter-items))
+
+$o-label := $(firstword $(iter-labels))
+iter-labels := $(wordlist 2,$(words $(iter-labels)),$(iter-labels))
+
+$o-flag := $(firstword $(iter-flags))
+iter-flags := $(wordlist 2,$(words $(iter-flags)),$(iter-flags))
+
+$o$(objext): %$(objext): $(srcdir)/config/avr/lib2funcs.c
+	$(gcc_compile) -DL_$($*-label) -DL_LABEL=$($*-label) $($*-flag) \
+		-c $< $(vis_hide)
+
+ifeq ($(enable_shared),yes)
+$(o)_s$(objext): %_s$(objext): $(srcdir)/config/avr/lib2funcs.c
+	$(gcc_s_compile) -DL_$($*-label) -DL_LABEL=$($*-label) $($*-flag) \
+		-c $<
+endif
diff --git a/gcc-4.9/libgcc/config/avr/lib2funcs.c b/gcc-4.9/libgcc/config/avr/lib2funcs.c
new file mode 100644
index 000000000..774d14ced
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/lib2funcs.c
@@ -0,0 +1,226 @@
+/* Copyright (C) 2013-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3, or (at your option) any later
+   version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+   WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+
+/* This file supplies implementations for some AVR-specific builtin
+   functions so that code like the following works as expected:
+
+   int (*f (void))(_Fract)
+   {
+       return __builtin_avr_countlsr;
+   }
+
+   In this specific case, the generated code is:
+
+   f:
+       ldi r24,lo8(gs(__countlsHI))
+       ldi r25,hi8(gs(__countlsHI))
+       ret
+*/
+
+/* Map fixed-point suffix to the corresponding fixed-point type.  */
+
+typedef short _Fract fx_hr_t;
+typedef _Fract fx_r_t;
+typedef long _Fract fx_lr_t;
+typedef long long _Fract fx_llr_t;
+
+typedef unsigned short _Fract fx_uhr_t;
+typedef unsigned _Fract fx_ur_t;
+typedef unsigned long _Fract fx_ulr_t;
+typedef unsigned long long _Fract fx_ullr_t;
+
+typedef short _Accum fx_hk_t;
+typedef _Accum fx_k_t;
+typedef long _Accum fx_lk_t;
+typedef long long _Accum fx_llk_t;
+
+typedef unsigned short _Accum fx_uhk_t;
+typedef unsigned _Accum fx_uk_t;
+typedef unsigned long _Accum fx_ulk_t;
+typedef unsigned long long _Accum fx_ullk_t;
+
+/* Map fixed-point suffix to the corresponding natural integer type.  */
+
+typedef char int_hr_t;
+typedef int int_r_t;
+typedef long int_lr_t;
+typedef long long int_llr_t;
+
+typedef unsigned char int_uhr_t;
+typedef unsigned int int_ur_t;
+typedef unsigned long int_ulr_t;
+typedef unsigned long long int_ullr_t;
+
+typedef int int_hk_t;
+typedef long int_k_t;
+typedef long long int_lk_t;
+typedef long long int_llk_t;
+
+typedef unsigned int int_uhk_t;
+typedef unsigned long int_uk_t;
+typedef unsigned long long int_ulk_t;
+typedef unsigned long long int_ullk_t;
+
+/* Map mode to the corresponding integer type.  */
+
+typedef char int_qi_t;
+typedef int int_hi_t;
+typedef long int_si_t;
+typedef long long int_di_t;
+
+typedef unsigned char uint_qi_t;
+typedef unsigned int uint_hi_t;
+typedef unsigned long uint_si_t;
+typedef unsigned long long uint_di_t;
+
+
+
+/************************************************************************/
+
+/* Supply implementations / symbols for __builtin_roundFX ASM_NAME.  */
+
+#ifdef L_round
+
+#define ROUND1(FX)                              \
+  ROUND2 (FX)
+
+#define ROUND2(FX)                                                      \
+  extern fx_## FX ##_t __round## FX (fx_## FX ##_t x, int rpoint);      \
+                                                                        \
+  fx_## FX ##_t                                                         \
+  __round## FX (fx_## FX ##_t x, int rpoint)                            \
+  {                                                                     \
+    return __builtin_avr_round ##FX (x, rpoint);                        \
+  }
+
+ROUND1(L_LABEL)
+
+#endif /* L_round */
+
+
+
+/*********************************************************************/
+
+/* Implement some count-leading-redundant-sign-bits to be used with
+   coundlsFX implementation.  */
+
+#ifdef L__clrsbqi
+extern int __clrsbqi2 (char x);
+
+int
+__clrsbqi2 (char x)
+{
+  int ret;
+
+  if (x < 0)
+    x = ~x;
+
+  if (x == 0)
+    return 8 * sizeof (x) -1;
+
+  ret = __builtin_clz (x << 8);
+  return ret - 1;
+}
+#endif /* L__clrsbqi */
+
+
+#ifdef L__clrsbdi
+extern int __clrsbdi2 (long long x);
+
+int
+__clrsbdi2 (long long x)
+{
+  int ret;
+
+  if (x < 0LL)
+    x = ~x;
+
+  if (x == 0LL)
+    return 8 * sizeof (x) -1;
+
+  ret = __builtin_clzll ((unsigned long long) x);
+  return ret - 1;
+}
+#endif /* L__clrsbdi */
+
+
+
+/*********************************************************************/
+
+/* Supply implementations / symbols for __builtin_avr_countlsFX.  */
+
+/* Signed */
+
+#ifdef L_countls
+
+#define COUNTLS1(MM)                            \
+  COUNTLS2 (MM)
+
+#define COUNTLS2(MM)                                                    \
+  extern int __countls## MM ##2 (int_## MM ##_t);                       \
+  extern int __clrsb## MM ##2 (int_## MM ##_t);                         \
+                                                                        \
+  int                                                                   \
+  __countls## MM ##2 (int_## MM ##_t x)                                 \
+  {                                                                     \
+    if (x == 0)                                                         \
+      return __INT8_MAX__;                                              \
+                                                                        \
+    return __clrsb## MM ##2 (x);                                        \
+  }
+
+COUNTLS1(L_LABEL)
+
+#endif /* L_countls */
+
+/* Unsigned */
+
+#ifdef L_countlsu
+
+#define clz_qi2 __builtin_clz /* unused, avoid warning */
+#define clz_hi2 __builtin_clz
+#define clz_si2 __builtin_clzl
+#define clz_di2 __builtin_clzll
+
+#define COUNTLS1(MM)                            \
+  COUNTLS2 (MM)
+
+#define COUNTLS2(MM)                                                    \
+  extern int __countlsu## MM ##2 (uint_## MM ##_t);                     \
+                                                                        \
+  int                                                                   \
+  __countlsu## MM ##2 (uint_## MM ##_t x)                               \
+  {                                                                     \
+    if (x == 0)                                                         \
+      return __INT8_MAX__;                                              \
+                                                                        \
+    if (sizeof (x) == 1)                                                \
+      return clz_hi2 (x << 8);                                          \
+    else                                                                \
+      return clz_## MM ##2 (x);                                         \
+  }
+
+COUNTLS1(L_LABEL)
+
+#endif /* L_countlsu */
diff --git a/gcc-4.9/libgcc/config/avr/t-avr b/gcc-4.9/libgcc/config/avr/t-avr
new file mode 100644
index 000000000..461304706
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/t-avr
@@ -0,0 +1,277 @@
+LIB1ASMSRC = avr/lib1funcs.S
+LIB1ASMFUNCS = \
+	_mulqi3 \
+	_mulhi3 \
+	_mulqihi3 _umulqihi3 \
+	_mulpsi3 _mulsqipsi3 \
+	_mulhisi3 \
+	_umulhisi3 \
+	_usmulhisi3 \
+	_muluhisi3 \
+	_mulshisi3 \
+	_mulsi3 \
+	_udivmodqi4 \
+	_divmodqi4 \
+	_udivmodhi4 \
+	_divmodhi4 \
+	_divmodpsi4 _udivmodpsi4 \
+	_udivmodsi4 \
+	_divmodsi4 \
+	_divdi3 _udivdi3 \
+	_muldi3 _muldi3_6 \
+	_mulsidi3 _umulsidi3 \
+	_udivmod64 \
+	_negsi2 _negdi2 \
+	_prologue \
+	_epilogue \
+	_exit \
+	_cleanup \
+	_tablejump \
+	_tablejump_elpm \
+	_load_3 _load_4 \
+	_xload_1 _xload_2 _xload_3 _xload_4 \
+	_movmemx \
+	_copy_data \
+	_clear_bss \
+	_ctors \
+	_dtors \
+	_ffssi2 \
+	_ffshi2 \
+	_loop_ffsqi2 \
+	_ctzsi2 \
+	_ctzhi2 \
+	_clzdi2 \
+	_clzsi2 \
+	_clzhi2 \
+	_paritydi2 \
+	_paritysi2 \
+	_parityhi2 \
+	_popcounthi2 \
+	_popcountsi2 \
+	_popcountdi2 \
+	_popcountqi2 \
+	_bswapsi2 \
+	_bswapdi2 \
+	_ashldi3 _ashrdi3 _lshrdi3 _rotldi3 \
+	_adddi3 _adddi3_s8 _subdi3 \
+	_cmpdi2 _cmpdi2_s8 \
+	_fmul _fmuls _fmulsu
+
+# Fixed point routines in avr/lib1funcs-fixed.S
+LIB1ASMFUNCS += \
+	_fractqqsf _fractuqqsf \
+	_fracthqsf _fractuhqsf _fracthasf _fractuhasf \
+	_fractsasf _fractusasf _fractsqsf _fractusqsf \
+	\
+	_fractsfqq _fractsfuqq \
+	_fractsfhq _fractsfuhq _fractsfha _fractsfuha \
+	_fractsfsq _fractsfusq _fractsfsa _fractsfusa \
+	_mulqq3 \
+	_mulhq3 _muluhq3 \
+	_mulha3 _muluha3 _muluha3_round \
+	_mulsa3 _mulusa3 \
+	_usmuluha3 _ssmulha3 \
+	_usmulusa3 _ssmulsa3 \
+	_divqq3 _udivuqq3 _divqq_helper \
+	_divhq3 _udivuhq3 \
+	_divha3 _udivuha3 \
+	_divsa3 _udivusa3 \
+	_clr_8 \
+	_ssneg_2 _ssneg_4 _ssneg_8 \
+	_ssabs_1 _ssabs_2 _ssabs_4 _ssabs_8 \
+	_ssadd_8 _sssub_8 \
+	_usadd_8 _ussub_8 \
+	_mask1 _ret \
+	_roundqq3 _rounduqq3 \
+	_round_s2 _round_u2 _round_2_const _addmask_2 \
+	_round_s4 _round_u4 _round_4_const _addmask_4 \
+	_round_x8 \
+	_rounddq3 _roundudq3 \
+	_roundda3 _rounduda3 \
+	_roundta3 _rounduta3 \
+
+
+LIB2FUNCS_EXCLUDE = \
+	_moddi3 _umoddi3 \
+	_clz \
+	_clrsbdi2 \
+
+
+# We do not have the DF type.
+# Most of the C functions in libgcc2 use almost all registers,
+# so use -mcall-prologues for smaller code size.
+HOST_LIBGCC2_CFLAGS += -DDF=SF -Dinhibit_libc -mcall-prologues -Os
+
+# Extra 16-bit integer functions.
+intfuncs16 = _absvXX2 _addvXX3 _subvXX3 _mulvXX3 _negvXX2 _clrsbXX2
+
+hiintfuncs16 = $(subst XX,hi,$(intfuncs16))
+siintfuncs16 = $(subst XX,si,$(intfuncs16))
+
+iter-items := $(hiintfuncs16)
+iter-labels := $(siintfuncs16)
+iter-sizes := $(patsubst %,2,$(siintfuncs16)) $(patsubst %,2,$(hiintfuncs16))
+
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/siditi-object.mk,$(iter-items))
+libgcc-objects += $(patsubst %,%$(objext),$(hiintfuncs16))
+
+ifeq ($(enable_shared),yes)
+libgcc-s-objects += $(patsubst %,%_s$(objext),$(hiintfuncs16))
+endif
+
+###
+
+conv_XY=$(conv)$(mode1)$(mode2)
+func_X=$(func)$(mode)
+
+# Compile C functions from lib2funcs.c and add them to libgcc.a.
+#
+# Some functions which are not performance.critical are more convenient
+# to implement in C than in assembler.  Most of them serve as implementation
+# for AVR-specific builtins in the case where the address of a builtin
+# function is taken or if there is no insn that implements the builtin.
+#
+# We don't use LIB2ADD because we want to iterate over the source for
+# different modes, fixed-point suffixes, etc.  See iter-labels and L_LABEL.
+# iter-label will get one more underscore in order to avoid too short
+# labels like -DLk and we use -DL_k instead.
+
+# Build roundFX functions from lib2funcs.c
+
+round_suffix :=  hr r lr uhr ur ulr  \
+		 hk k    uhk uk 
+round_funcs  := $(foreach func,_round,\
+		$(foreach mode,$(round_suffix),$(func_X)))
+
+iter-items  := $(round_funcs)
+iter-labels := $(round_suffix)
+iter-flags  := $(patsubst %,-DL_round,$(iter-items))
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/config/avr/lib2-object.mk,$(iter-items))
+
+libgcc-objects += $(patsubst %,%$(objext),$(round_funcs))
+
+# Build clrsbXX functions from lib2funcs.c
+
+clrsb_modes := qi di
+clrsb_funcs := $(foreach func,_clrsb,\
+	       $(foreach mode,$(clrsb_modes),$(func_X)))
+
+iter-items  := $(clrsb_funcs)
+iter-labels := $(clrsb_funcs)
+iter-flags  := $(patsubst %,-DL_clrsb,$(iter-items))
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/config/avr/lib2-object.mk,$(iter-items))
+
+libgcc-objects += $(patsubst %,%$(objext),$(clrsb_funcs))
+
+# Build signed countlsFX functions from lib2funcs.c
+
+countls_modes := qi hi si di
+countls_funcs := $(foreach func,_countls,\
+		 $(foreach mode,$(countls_modes),$(func_X)))
+
+iter-items  := $(countls_funcs)
+iter-labels := $(countls_modes)
+iter-flags  := $(patsubst %,-DL_countls,$(iter-items))
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/config/avr/lib2-object.mk,$(iter-items))
+
+libgcc-objects += $(patsubst %,%$(objext),$(countls_funcs))
+
+# Build unsigned countlsFX functions from lib2funcs.c
+
+countlsu_modes := qi hi si di
+countlsu_funcs := $(foreach func,_countlsu,\
+		  $(foreach mode,$(countlsu_modes),$(func_X)))
+
+iter-items  := $(countlsu_funcs)
+iter-labels := $(countlsu_modes)
+iter-flags  := $(patsubst %,-DL_countlsu,$(iter-items))
+
+include $(srcdir)/empty.mk $(patsubst %,$(srcdir)/config/avr/lib2-object.mk,$(iter-items))
+
+libgcc-objects += $(patsubst %,%$(objext),$(countlsu_funcs))
+
+
+# Filter out supported conversions from fixed-bit.c
+# Also filter out TQ and UTQ.
+
+# Conversions supported by the compiler
+
+convf_modes =	 QI UQI QQ UQQ \
+		 HI UHI HQ UHQ HA UHA \
+		 SI USI SQ USQ SA USA \
+		 DI UDI DQ UDQ DA UDA \
+		 TI UTI TQ UTQ TA UTA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach conv,_fract _fractuns,\
+	$(foreach mode1,$(convf_modes),\
+	$(foreach mode2,$(convf_modes),$(conv_XY))))
+
+# Conversions supported by lib1funcs-fixed.S
+
+conv_to_sf_modes   = QQ UQQ HQ UHQ HA UHA SQ USQ SA USA
+conv_from_sf_modes = QQ UQQ HQ UHQ HA UHA        SA USA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach conv,_fract, \
+	$(foreach mode1,$(conv_to_sf_modes), \
+	$(foreach mode2,SF,$(conv_XY))))
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach conv,_fract,\
+	$(foreach mode1,SF,\
+	$(foreach mode2,$(conv_from_sf_modes),$(conv_XY))))
+
+# Arithmetik supported by the compiler
+
+allfix_modes = QQ UQQ HQ UHQ HA UHA SQ USQ SA USA DA UDA DQ UDQ TQ UTQ TA UTA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_add _sub,\
+	$(foreach mode,$(allfix_modes),$(func_X)))
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_lshr _ashl _ashr _cmp,\
+	$(foreach mode,$(allfix_modes),$(func_X)))
+
+
+usat_modes = UQQ UHQ UHA USQ USA UDQ UDA UTQ UTA
+ssat_modes =  QQ  HQ  HA  SQ  SA  DQ  DA  TQ  TA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_ssadd _sssub _ssneg _ssabs,\
+	$(foreach mode,$(ssat_modes),$(func_X)))
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_usadd _ussub _usneg,\
+	$(foreach mode,$(usat_modes),$(func_X)))
+
+
+smul_modes =  QQ  HQ  HA  SA
+umul_modes = UQQ UHQ UHA USA
+sdiv_modes =  QQ  HQ  HA  SA
+udiv_modes = UQQ UHQ UHA USA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_mul,\
+	$(foreach mode,$(smul_modes) $(umul_modes),$(func_X)))
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_div,\
+	$(foreach mode,$(sdiv_modes) $(udiv_modes),$(func_X)))
+
+
+ssmul_modes =  HA  SA
+usmul_modes = UHA USA
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_usmul,\
+	$(foreach mode,$(usmul_modes),$(func_X)))
+
+LIB2FUNCS_EXCLUDE += \
+	$(foreach func,_ssmul,\
+	$(foreach mode,$(ssmul_modes),$(func_X)))
diff --git a/gcc-4.9/libgcc/config/avr/t-avrlibc b/gcc-4.9/libgcc/config/avr/t-avrlibc
new file mode 100644
index 000000000..d2c8b870a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/t-avrlibc
@@ -0,0 +1,66 @@
+# This file is used if not configured --with-avrlibc=no
+#
+# AVR-Libc comes with hand-optimized float routines.
+# For historical reasons, these routines live in AVR-Libc
+# and not in libgcc and use the same function names like libgcc.
+# To get the best support, i.e. always use the routines from
+# AVR-Libc, we remove these routines from libgcc.
+#
+# See also PR54461.
+#
+#
+# Arithmetic:
+#     __addsf3 __subsf3 __divsf3 __mulsf3 __negsf2
+#
+# Comparison:
+#     __cmpsf2 __unordsf2
+#     __eqsf2 __lesf2 __ltsf2 __nesf2 __gesf2 __gtsf2
+#
+# Conversion:
+#     __fixsfdi __fixunssfdi __floatdisf __floatundisf
+#     __fixsfsi __fixunssfsi __floatsisf __floatunsisf
+#
+#
+# These functions are contained in modules:
+#
+# _addsub_sf.o:   __addsf3  __subsf3
+# _mul_sf.o:      __mulsf3
+# _div_sf.o:      __divsf3
+# _negate_sf.o:   __negsf2
+#
+# _compare_sf.o:  __cmpsf2
+# _unord_sf.o:    __unordsf2
+# _eq_sf.o:       __eqsf2
+# _ne_sf.o:       __nesf2
+# _ge_sf.o:       __gesf2
+# _gt_sf.o:       __gtsf2
+# _le_sf.o:       __lesf2
+# _lt_sf.o:       __ltsf2
+#
+# _fixsfdi.o:     __fixsfdi
+# _fixunssfdi.o:  __fixunssfdi
+# _fixunssfsi.o:  __fixunssfsi
+# _floatdisf.o:   __floatdisf
+# _floatundisf.o: __floatundisf
+# _sf_to_si.o:    __fixsfsi
+# _si_to_sf.o:    __floatsisf
+# _usi_to_sf.o:   __floatunsisf
+
+
+# SFmode
+LIB2FUNCS_EXCLUDE += \
+	_addsub_sf \
+	_negate_sf \
+	_mul_sf _div_sf \
+	\
+	_compare_sf \
+	_unord_sf \
+	_eq_sf _ne_sf \
+	_gt_sf _ge_sf \
+	_lt_sf _le_sf \
+	\
+	_si_to_sf  _sf_to_si \
+	_usi_to_sf _sf_to_usi \
+	_fixunssfsi _fixsfdi \
+	_fixunssfdi \
+	_floatdisf _floatundisf
diff --git a/gcc-4.9/libgcc/config/avr/t-rtems b/gcc-4.9/libgcc/config/avr/t-rtems
new file mode 100644
index 000000000..43b57ee32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/avr/t-rtems
@@ -0,0 +1,2 @@
+# RTEMS uses _exit from newlib
+LIB1ASMFUNCS := $(filter-out _exit,$(LIB1ASMFUNCS))
diff --git a/gcc-4.9/libgcc/config/bfin/crti.S b/gcc-4.9/libgcc/config/bfin/crti.S
new file mode 100644
index 000000000..b46e102a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/crti.S
@@ -0,0 +1,59 @@
+/* Specialized code needed to support construction and destruction of
+   file-scope objects in C++ and Java code, and to support exception handling.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Analog Devices.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file just supplies function prologues for the .init and .fini
+ * sections.  It is linked in before crtbegin.o.
+ */
+
+	.ident  "GNU C crti.o"
+
+	.section .init
+	.globl  __init
+	.type   __init,@function
+__init:
+#if defined __ID_SHARED_LIB__
+	[--SP] = P5;
+#elif defined __BFIN_FDPIC__
+	[--SP] = P3; 
+#endif
+	LINK 12;
+#if defined __ID_SHARED_LIB__
+	P5 = [P5 + _current_shared_library_p5_offset_]
+#endif	
+	.section .fini
+	.globl  __fini
+	.type   __fini,@function
+__fini:
+#if defined __ID_SHARED_LIB__
+	[--SP] = P5; 
+#elif defined __BFIN_FDPIC__
+	[--SP] = P3; 
+#endif
+	LINK 12; 
+#if defined __ID_SHARED_LIB__
+	P5 = [P5 + _current_shared_library_p5_offset_]
+#endif	
diff --git a/gcc-4.9/libgcc/config/bfin/crtlibid.S b/gcc-4.9/libgcc/config/bfin/crtlibid.S
new file mode 100644
index 000000000..a821a0a7f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/crtlibid.S
@@ -0,0 +1,29 @@
+/* Provide a weak definition of the library ID, for the benefit of certain
+   configure scripts.	 
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	.ident  "GNU C crtlibid.o"
+
+.weak _current_shared_library_p5_offset_
+.set _current_shared_library_p5_offset_, 0
diff --git a/gcc-4.9/libgcc/config/bfin/crtn.S b/gcc-4.9/libgcc/config/bfin/crtn.S
new file mode 100644
index 000000000..270e1e72d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/crtn.S
@@ -0,0 +1,50 @@
+/* Specialized code needed to support construction and destruction of
+   file-scope objects in C++ and Java code, and to support exception handling.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Analog Devices.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file supplies function epilogues for the .init and .fini sections.
+ * It is linked in after all other files.
+ */
+
+	.ident  "GNU C crtn.o"
+
+	.section .init
+	unlink; 
+#if defined __ID_SHARED_LIB__
+	P5 = [SP++];
+#elif defined __BFIN_FDPIC__
+	P3 = [SP++];
+#endif
+	rts;
+
+	.section .fini
+	unlink;
+#if defined __ID_SHARED_LIB__
+	P5 = [SP++];
+#elif defined __BFIN_FDPIC__
+	P3 = [SP++];
+#endif
+	rts;
diff --git a/gcc-4.9/libgcc/config/bfin/lib1funcs.S b/gcc-4.9/libgcc/config/bfin/lib1funcs.S
new file mode 100644
index 000000000..45c6ac8b9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/lib1funcs.S
@@ -0,0 +1,211 @@
+/* libgcc functions for Blackfin.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Analog Devices.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef L_divsi3
+.text
+.align 2
+.global ___divsi3;
+.type ___divsi3, STT_FUNC;
+
+___divsi3:
+        [--SP]= RETS;
+	[--SP] = R7;
+
+	R2 = -R0;
+        CC = R0 < 0;
+	IF CC R0 = R2;
+	R7 = CC;
+
+	R2 = -R1;
+        CC = R1 < 0;
+	IF CC R1 = R2;
+	R2 = CC;
+	R7 = R7 ^ R2;
+
+        CALL ___udivsi3;
+
+	CC = R7;
+	R1 = -R0;
+	IF CC R0 = R1;
+
+	R7 = [SP++];
+        RETS = [SP++];
+        RTS;
+#endif
+
+#ifdef L_modsi3	
+.align 2
+.global ___modsi3;
+.type ___modsi3, STT_FUNC;
+
+___modsi3:
+	[--SP] = RETS;
+	[--SP] = R0;
+	[--SP] = R1;
+	CALL ___divsi3;
+	R2 = [SP++];
+	R1 = [SP++];
+	R2 *= R0;
+	R0 = R1 - R2;
+	RETS = [SP++];
+	RTS; 
+#endif
+
+#ifdef L_udivsi3
+.align 2
+.global ___udivsi3;
+.type ___udivsi3, STT_FUNC;
+
+___udivsi3:
+        P0 = 32;
+        LSETUP (0f, 1f) LC0 = P0;
+	/* upper half of dividend */
+        R3 = 0;
+0:
+	/* The first time round in the loop we shift in garbage, but since we
+	   perform 33 shifts, it doesn't matter.  */
+	R0 = ROT R0 BY 1;
+	R3 = ROT R3 BY 1;
+	R2 = R3 - R1;
+        CC = R3 < R1 (IU);
+1:
+	/* Last instruction of the loop.  */
+	IF ! CC R3 = R2;
+
+	/* Shift in the last bit.  */
+	R0 = ROT R0 BY 1;
+	/* R0 is the result, R3 contains the remainder.  */
+	R0 = ~ R0;
+        RTS;
+#endif
+
+#ifdef L_umodsi3
+.align 2
+.global ___umodsi3;
+.type ___umodsi3, STT_FUNC;
+
+___umodsi3:
+	[--SP] = RETS;
+	CALL ___udivsi3;
+	R0 = R3;
+	RETS = [SP++]; 
+	RTS;
+#endif
+
+#ifdef L_umulsi3_highpart
+.align 2
+.global ___umulsi3_highpart;
+.type ___umulsi3_highpart, STT_FUNC;
+
+___umulsi3_highpart:
+	A1 = R1.L * R0.L (FU);
+	A1 = A1 >> 16;
+	A0 = R1.H * R0.H, A1 += R1.L * R0.H (FU);
+	A1 += R0.L * R1.H (FU);
+	A1 = A1 >> 16;
+	A0 += A1;
+	R0 = A0 (FU);
+	RTS;
+#endif
+
+#ifdef L_smulsi3_highpart
+.align 2
+.global ___smulsi3_highpart;
+.type ___smulsi3_highpart, STT_FUNC;
+
+___smulsi3_highpart:
+	A1 = R1.L * R0.L (FU);
+	A1 = A1 >> 16;
+	A0 = R0.H * R1.H, A1 += R0.H * R1.L (IS,M);
+	A1 += R1.H * R0.L (IS,M);
+	A1 = A1 >>> 16;
+	R0 = (A0 += A1);
+	RTS;
+#endif
+
+#ifdef L_muldi3
+.align 2
+.global ___muldi3;
+.type ___muldi3, STT_FUNC;
+
+/*
+	   R1:R0 * R3:R2
+	 = R1.h:R1.l:R0.h:R0.l * R3.h:R3.l:R2.h:R2.l
+[X]	 = (R1.h * R3.h) * 2^96
+[X]	   + (R1.h * R3.l + R1.l * R3.h) * 2^80
+[X]	   + (R1.h * R2.h + R1.l * R3.l + R3.h * R0.h) * 2^64
+[T1]	   + (R1.h * R2.l + R3.h * R0.l + R1.l * R2.h + R3.l * R0.h) * 2^48
+[T2]	   + (R1.l * R2.l + R3.l * R0.l + R0.h * R2.h) * 2^32
+[T3]	   + (R0.l * R2.h + R2.l * R0.h) * 2^16
+[T4]	   + (R0.l * R2.l)
+
+	We can discard the first three lines marked "X" since we produce
+	only a 64 bit result.  So, we need ten 16-bit multiplies.
+
+	Individual mul-acc results:
+[E1]	 =  R1.h * R2.l + R3.h * R0.l + R1.l * R2.h + R3.l * R0.h
+[E2]	 =  R1.l * R2.l + R3.l * R0.l + R0.h * R2.h
+[E3]	 =  R0.l * R2.h + R2.l * R0.h
+[E4]	 =  R0.l * R2.l
+
+	We also need to add high parts from lower-level results to higher ones:
+	E[n]c = E[n] + (E[n+1]c >> 16), where E4c := E4
+
+	One interesting property is that all parts of the result that depend
+	on the sign of the multiplication are discarded.  Those would be the
+	multiplications involving R1.h and R3.h, but only the top 16 bit of
+	the 32 bit result depend on the sign, and since R1.h and R3.h only
+	occur in E1, the top half of these results is cut off.
+	So, we can just use FU mode for all of the 16-bit multiplies, and
+	ignore questions of when to use mixed mode.  */
+
+___muldi3:
+	/* [SP] technically is part of the caller's frame, but we can
+	   use it as scratch space.  */
+	A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12];	/* E1 */
+	A0 += R3.H * R0.L, A1 += R3.L * R0.H (FU) || [SP] = R4;		/* E1 */
+	A0 += A1;							/* E1 */
+	R4 = A0.w;
+	A0 = R0.l * R3.l (FU);						/* E2 */
+	A0 += R2.l * R1.l (FU);						/* E2 */
+
+	A1 = R2.L * R0.L (FU);						/* E4 */
+	R3 = A1.w;
+	A1 = A1 >> 16;							/* E3c */
+	A0 += R2.H * R0.H, A1 += R2.L * R0.H (FU);			/* E2, E3c */
+	A1 += R0.L * R2.H (FU);						/* E3c */
+	R0 = A1.w;
+	A1 = A1 >> 16;							/* E2c */
+	A0 += A1;							/* E2c */
+	R1 = A0.w;
+
+	/* low(result) = low(E3c):low(E4) */
+	R0 = PACK (R0.l, R3.l);
+	/* high(result) = E2c + (E1 << 16) */
+	R1.h = R1.h + R4.l (NS) || R4 = [SP];
+	RTS;
+
+.size ___muldi3, .-___muldi3
+#endif
diff --git a/gcc-4.9/libgcc/config/bfin/libgcc-glibc.ver b/gcc-4.9/libgcc/config/bfin/libgcc-glibc.ver
new file mode 100644
index 000000000..e8cbadd99
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/libgcc-glibc.ver
@@ -0,0 +1,1913 @@
+# Copyright (C) 2000-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_3.0 {
+  # libgcc1 integer symbols
+  ___absvsi2
+  ___addvsi3
+  ___ashlsi3
+  ___ashrsi3
+  ___divsi3
+  ___lshrsi3
+  ___modsi3
+  ___mulsi3
+  ___mulvsi3
+  ___negvsi2
+  ___subvsi3
+  ___udivsi3
+  ___umodsi3
+
+  # libgcc1 floating point symbols
+  ___addsf3
+  ___adddf3
+  ___addxf3
+  ___addtf3
+  ___divsf3
+  ___divdf3
+  ___divxf3
+  ___divtf3
+  ___eqsf2
+  ___eqdf2
+  ___eqxf2
+  ___eqtf2
+  ___extenddfxf2
+  ___extenddftf2
+  ___extendsfdf2
+  ___extendsfxf2
+  ___extendsftf2
+  ___fixsfsi
+  ___fixdfsi
+  ___fixxfsi
+  ___fixtfsi
+  ___floatsisf
+  ___floatsidf
+  ___floatsixf
+  ___floatsitf
+  ___gesf2
+  ___gedf2
+  ___gexf2
+  ___getf2
+  ___gtsf2
+  ___gtdf2
+  ___gtxf2
+  ___gttf2
+  ___lesf2
+  ___ledf2
+  ___lexf2
+  ___letf2
+  ___ltsf2
+  ___ltdf2
+  ___ltxf2
+  ___lttf2
+  ___mulsf3
+  ___muldf3
+  ___mulxf3
+  ___multf3
+  ___negsf2
+  ___negdf2
+  ___negxf2
+  ___negtf2
+  ___nesf2
+  ___nedf2
+  ___nexf2
+  ___netf2
+  ___subsf3
+  ___subdf3
+  ___subxf3
+  ___subtf3
+  ___truncdfsf2
+  ___truncxfsf2
+  ___trunctfsf2
+  ___truncxfdf2
+  ___trunctfdf2
+
+  # libgcc2 DImode arithmetic (for 32-bit targets).
+  ___absvdi2
+  ___addvdi3
+  ___ashldi3
+  ___ashrdi3
+  ___cmpdi2
+  ___divdi3
+  ___ffsdi2
+  ___fixdfdi
+  ___fixsfdi
+  ___fixtfdi
+  ___fixxfdi
+  ___fixunsdfdi
+  ___fixunsdfsi
+  ___fixunssfsi
+  ___fixunssfdi
+  ___fixunstfdi
+  ___fixunstfsi
+  ___fixunsxfdi
+  ___fixunsxfsi
+  ___floatdidf
+  ___floatdisf
+  ___floatdixf
+  ___floatditf
+  ___lshrdi3
+  ___moddi3
+  ___muldi3
+  ___mulvdi3
+  ___negdi2
+  ___negvdi2
+  ___subvdi3
+  ___ucmpdi2
+  ___udivdi3
+  ___udivmoddi4
+  ___umoddi3
+
+  # libgcc2 TImode arithmetic (for 64-bit targets).
+  ___ashlti3
+  ___ashrti3
+  ___cmpti2
+  ___divti3
+  ___ffsti2
+  ___fixdfti
+  ___fixsfti
+  ___fixtfti
+  ___fixxfti
+  ___lshrti3
+  ___modti3
+  ___multi3
+  ___negti2
+  ___ucmpti2
+  ___udivmodti4
+  ___udivti3
+  ___umodti3
+  ___fixunsdfti
+  ___fixunssfti
+  ___fixunstfti
+  ___fixunsxfti
+  ___floattidf
+  ___floattisf
+  ___floattixf
+  ___floattitf
+
+  # Used to deal with trampoline initialization on some platforms
+  ___clear_cache
+
+  # EH symbols
+  __Unwind_DeleteException
+  __Unwind_Find_FDE
+  __Unwind_ForcedUnwind
+  __Unwind_GetGR
+  __Unwind_GetIP
+  __Unwind_GetLanguageSpecificData
+  __Unwind_GetRegionStart
+  __Unwind_GetTextRelBase
+  __Unwind_GetDataRelBase
+  __Unwind_RaiseException
+  __Unwind_Resume
+  __Unwind_SetGR
+  __Unwind_SetIP
+  ___deregister_frame
+  ___deregister_frame_info
+  ___deregister_frame_info_bases
+  ___register_frame
+  ___register_frame_info
+  ___register_frame_info_bases
+  ___register_frame_info_table
+  ___register_frame_info_table_bases
+  ___register_frame_table
+
+  # SjLj EH symbols
+  __Unwind_SjLj_Register
+  __Unwind_SjLj_Unregister
+  __Unwind_SjLj_RaiseException
+  __Unwind_SjLj_ForcedUnwind
+  __Unwind_SjLj_Resume
+}
+
+%inherit GCC_3.3 GCC_3.0
+GCC_3.3 {
+  __Unwind_FindEnclosingFunction
+  __Unwind_GetCFA
+  __Unwind_Backtrace
+  __Unwind_Resume_or_Rethrow
+  __Unwind_SjLj_Resume_or_Rethrow
+}
+
+%inherit GCC_3.3.1 GCC_3.3
+GCC_3.3.1 {
+  ___gcc_personality_sj0
+  ___gcc_personality_v0
+}
+
+%inherit GCC_3.3.2 GCC_3.3.1
+GCC_3.3.2 {
+}
+%inherit GCC_3.3.4 GCC_3.3.2
+GCC_3.3.4 {
+  ___unorddf2
+  ___unordsf2
+}
+
+%inherit GCC_3.4 GCC_3.3.4
+GCC_3.4 {
+  # bit scanning and counting built-ins
+  ___clzsi2
+  ___clzdi2
+  ___clzti2
+  ___ctzsi2
+  ___ctzdi2
+  ___ctzti2
+  ___popcountsi2
+  ___popcountdi2
+  ___popcountti2
+  ___paritysi2
+  ___paritydi2
+  ___parityti2
+}
+
+%inherit GCC_3.4.2 GCC_3.4
+GCC_3.4.2 {
+  # Used to deal with trampoline initialization on some platforms
+  ___enable_execute_stack
+  ___trampoline_setup
+}
+
+%inherit GCC_3.4.4 GCC_3.4.2
+GCC_3.4.4 {
+  # libgcc2 TImode arithmetic (for 64-bit targets).
+  ___absvti2
+  ___addvti3
+  ___mulvti3
+  ___negvti2
+  ___subvti3
+}
+
+%inherit GCC_4.0.0 GCC_3.4.4
+GCC_4.0.0 {
+  # libgcc2 __builtin_powi helpers.
+  ___powisf2
+  ___powidf2
+  ___powixf2
+  ___powitf2
+
+  # c99 compliant complex arithmetic
+  ___divsc3
+  ___divdc3
+  ___divxc3
+  ___divtc3
+  ___mulsc3
+  ___muldc3
+  ___mulxc3
+  ___multc3
+}
+
+%inherit GCC_4.1.0 GCC_4.0.0
+GCC_4.1.0 {
+  ___smulsi3_highpart
+  ___umulsi3_highpart
+}
+
+%inherit GCC_4.2.0 GCC_4.1.0
+GCC_4.2.0 {
+  # unsigned-to-floating conversions
+  ___floatunsisf
+  ___floatunsidf
+  ___floatunsixf
+  ___floatunsitf
+  ___floatundidf
+  ___floatundisf
+  ___floatundixf
+  ___floatunditf
+  ___floatuntidf
+  ___floatuntisf
+  ___floatuntixf
+  ___floatuntitf
+  __Unwind_GetIPInfo
+}
+
+%inherit GCC_4.3.0 GCC_4.2.0
+GCC_4.3.0 {
+  # byte swapping routines
+  ___bswapsi2
+  ___bswapdi2
+  ___emutls_get_address
+  ___emutls_register_common
+  ___ffssi2
+  ___extendxftf2
+  ___trunctfxf2
+
+  # fixed-point routines
+  ___addqq3
+  ___addhq3
+  ___addsq3
+  ___adddq3
+  ___addtq3
+  ___adduqq3
+  ___adduhq3
+  ___addusq3
+  ___addudq3
+  ___addutq3
+  ___addha3
+  ___addsa3
+  ___addda3
+  ___addta3
+  ___adduha3
+  ___addusa3
+  ___adduda3
+  ___adduta3
+  ___ssaddqq3
+  ___ssaddhq3
+  ___ssaddsq3
+  ___ssadddq3
+  ___ssaddtq3
+  ___ssaddha3
+  ___ssaddsa3
+  ___ssaddda3
+  ___ssaddta3
+  ___usadduqq3
+  ___usadduhq3
+  ___usaddusq3
+  ___usaddudq3
+  ___usaddutq3
+  ___usadduha3
+  ___usaddusa3
+  ___usadduda3
+  ___usadduta3
+  ___subqq3
+  ___subhq3
+  ___subsq3
+  ___subdq3
+  ___subtq3
+  ___subuqq3
+  ___subuhq3
+  ___subusq3
+  ___subudq3
+  ___subutq3
+  ___subha3
+  ___subsa3
+  ___subda3
+  ___subta3
+  ___subuha3
+  ___subusa3
+  ___subuda3
+  ___subuta3
+  ___sssubqq3
+  ___sssubhq3
+  ___sssubsq3
+  ___sssubdq3
+  ___sssubtq3
+  ___sssubha3
+  ___sssubsa3
+  ___sssubda3
+  ___sssubta3
+  ___ussubuqq3
+  ___ussubuhq3
+  ___ussubusq3
+  ___ussubudq3
+  ___ussubutq3
+  ___ussubuha3
+  ___ussubusa3
+  ___ussubuda3
+  ___ussubuta3
+  ___mulqq3
+  ___mulhq3
+  ___mulsq3
+  ___muldq3
+  ___multq3
+  ___muluqq3
+  ___muluhq3
+  ___mulusq3
+  ___muludq3
+  ___mulutq3
+  ___mulha3
+  ___mulsa3
+  ___mulda3
+  ___multa3
+  ___muluha3
+  ___mulusa3
+  ___muluda3
+  ___muluta3
+  ___ssmulqq3
+  ___ssmulhq3
+  ___ssmulsq3
+  ___ssmuldq3
+  ___ssmultq3
+  ___ssmulha3
+  ___ssmulsa3
+  ___ssmulda3
+  ___ssmulta3
+  ___usmuluqq3
+  ___usmuluhq3
+  ___usmulusq3
+  ___usmuludq3
+  ___usmulutq3
+  ___usmuluha3
+  ___usmulusa3
+  ___usmuluda3
+  ___usmuluta3
+  ___divqq3
+  ___divhq3
+  ___divsq3
+  ___divdq3
+  ___divtq3
+  ___divha3
+  ___divsa3
+  ___divda3
+  ___divta3
+  ___udivuqq3
+  ___udivuhq3
+  ___udivusq3
+  ___udivudq3
+  ___udivutq3
+  ___udivuha3
+  ___udivusa3
+  ___udivuda3
+  ___udivuta3
+  ___ssdivqq3
+  ___ssdivhq3
+  ___ssdivsq3
+  ___ssdivdq3
+  ___ssdivtq3
+  ___ssdivha3
+  ___ssdivsa3
+  ___ssdivda3
+  ___ssdivta3
+  ___usdivuqq3
+  ___usdivuhq3
+  ___usdivusq3
+  ___usdivudq3
+  ___usdivutq3
+  ___usdivuha3
+  ___usdivusa3
+  ___usdivuda3
+  ___usdivuta3
+  ___negqq2
+  ___neghq2
+  ___negsq2
+  ___negdq2
+  ___negtq2
+  ___neguqq2
+  ___neguhq2
+  ___negusq2
+  ___negudq2
+  ___negutq2
+  ___negha2
+  ___negsa2
+  ___negda2
+  ___negta2
+  ___neguha2
+  ___negusa2
+  ___neguda2
+  ___neguta2
+  ___ssnegqq2
+  ___ssneghq2
+  ___ssnegsq2
+  ___ssnegdq2
+  ___ssnegtq2
+  ___ssnegha2
+  ___ssnegsa2
+  ___ssnegda2
+  ___ssnegta2
+  ___usneguqq2
+  ___usneguhq2
+  ___usnegusq2
+  ___usnegudq2
+  ___usnegutq2
+  ___usneguha2
+  ___usnegusa2
+  ___usneguda2
+  ___usneguta2
+  ___ashlqq3
+  ___ashlhq3
+  ___ashlsq3
+  ___ashldq3
+  ___ashltq3
+  ___ashluqq3
+  ___ashluhq3
+  ___ashlusq3
+  ___ashludq3
+  ___ashlutq3
+  ___ashlha3
+  ___ashlsa3
+  ___ashlda3
+  ___ashlta3
+  ___ashluha3
+  ___ashlusa3
+  ___ashluda3
+  ___ashluta3
+  ___ashrqq3
+  ___ashrhq3
+  ___ashrsq3
+  ___ashrdq3
+  ___ashrtq3
+  ___ashrha3
+  ___ashrsa3
+  ___ashrda3
+  ___ashrta3
+  ___lshruqq3
+  ___lshruhq3
+  ___lshrusq3
+  ___lshrudq3
+  ___lshrutq3
+  ___lshruha3
+  ___lshrusa3
+  ___lshruda3
+  ___lshruta3
+  ___ssashlqq3
+  ___ssashlhq3
+  ___ssashlsq3
+  ___ssashldq3
+  ___ssashltq3
+  ___ssashlha3
+  ___ssashlsa3
+  ___ssashlda3
+  ___ssashlta3
+  ___usashluqq3
+  ___usashluhq3
+  ___usashlusq3
+  ___usashludq3
+  ___usashlutq3
+  ___usashluha3
+  ___usashlusa3
+  ___usashluda3
+  ___usashluta3
+  ___cmpqq2
+  ___cmphq2
+  ___cmpsq2
+  ___cmpdq2
+  ___cmptq2
+  ___cmpuqq2
+  ___cmpuhq2
+  ___cmpusq2
+  ___cmpudq2
+  ___cmputq2
+  ___cmpha2
+  ___cmpsa2
+  ___cmpda2
+  ___cmpta2
+  ___cmpuha2
+  ___cmpusa2
+  ___cmpuda2
+  ___cmputa2
+  ___fractqqhq2
+  ___fractqqsq2
+  ___fractqqdq2
+  ___fractqqtq2
+  ___fractqqha
+  ___fractqqsa
+  ___fractqqda
+  ___fractqqta
+  ___fractqquqq
+  ___fractqquhq
+  ___fractqqusq
+  ___fractqqudq
+  ___fractqqutq
+  ___fractqquha
+  ___fractqqusa
+  ___fractqquda
+  ___fractqquta
+  ___fractqqqi
+  ___fractqqhi
+  ___fractqqsi
+  ___fractqqdi
+  ___fractqqti
+  ___fractqqsf
+  ___fractqqdf
+  ___fracthqqq2
+  ___fracthqsq2
+  ___fracthqdq2
+  ___fracthqtq2
+  ___fracthqha
+  ___fracthqsa
+  ___fracthqda
+  ___fracthqta
+  ___fracthquqq
+  ___fracthquhq
+  ___fracthqusq
+  ___fracthqudq
+  ___fracthqutq
+  ___fracthquha
+  ___fracthqusa
+  ___fracthquda
+  ___fracthquta
+  ___fracthqqi
+  ___fracthqhi
+  ___fracthqsi
+  ___fracthqdi
+  ___fracthqti
+  ___fracthqsf
+  ___fracthqdf
+  ___fractsqqq2
+  ___fractsqhq2
+  ___fractsqdq2
+  ___fractsqtq2
+  ___fractsqha
+  ___fractsqsa
+  ___fractsqda
+  ___fractsqta
+  ___fractsquqq
+  ___fractsquhq
+  ___fractsqusq
+  ___fractsqudq
+  ___fractsqutq
+  ___fractsquha
+  ___fractsqusa
+  ___fractsquda
+  ___fractsquta
+  ___fractsqqi
+  ___fractsqhi
+  ___fractsqsi
+  ___fractsqdi
+  ___fractsqti
+  ___fractsqsf
+  ___fractsqdf
+  ___fractdqqq2
+  ___fractdqhq2
+  ___fractdqsq2
+  ___fractdqtq2
+  ___fractdqha
+  ___fractdqsa
+  ___fractdqda
+  ___fractdqta
+  ___fractdquqq
+  ___fractdquhq
+  ___fractdqusq
+  ___fractdqudq
+  ___fractdqutq
+  ___fractdquha
+  ___fractdqusa
+  ___fractdquda
+  ___fractdquta
+  ___fractdqqi
+  ___fractdqhi
+  ___fractdqsi
+  ___fractdqdi
+  ___fractdqti
+  ___fractdqsf
+  ___fractdqdf
+  ___fracttqqq2
+  ___fracttqhq2
+  ___fracttqsq2
+  ___fracttqdq2
+  ___fracttqha
+  ___fracttqsa
+  ___fracttqda
+  ___fracttqta
+  ___fracttquqq
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+  ___satfracthiusq
+  ___satfracthiudq
+  ___satfracthiutq
+  ___satfracthiuha
+  ___satfracthiusa
+  ___satfracthiuda
+  ___satfracthiuta
+  ___satfractsiqq
+  ___satfractsihq
+  ___satfractsisq
+  ___satfractsidq
+  ___satfractsitq
+  ___satfractsiha
+  ___satfractsisa
+  ___satfractsida
+  ___satfractsita
+  ___satfractsiuqq
+  ___satfractsiuhq
+  ___satfractsiusq
+  ___satfractsiudq
+  ___satfractsiutq
+  ___satfractsiuha
+  ___satfractsiusa
+  ___satfractsiuda
+  ___satfractsiuta
+  ___satfractdiqq
+  ___satfractdihq
+  ___satfractdisq
+  ___satfractdidq
+  ___satfractditq
+  ___satfractdiha
+  ___satfractdisa
+  ___satfractdida
+  ___satfractdita
+  ___satfractdiuqq
+  ___satfractdiuhq
+  ___satfractdiusq
+  ___satfractdiudq
+  ___satfractdiutq
+  ___satfractdiuha
+  ___satfractdiusa
+  ___satfractdiuda
+  ___satfractdiuta
+  ___satfracttiqq
+  ___satfracttihq
+  ___satfracttisq
+  ___satfracttidq
+  ___satfracttitq
+  ___satfracttiha
+  ___satfracttisa
+  ___satfracttida
+  ___satfracttita
+  ___satfracttiuqq
+  ___satfracttiuhq
+  ___satfracttiusq
+  ___satfracttiudq
+  ___satfracttiutq
+  ___satfracttiuha
+  ___satfracttiusa
+  ___satfracttiuda
+  ___satfracttiuta
+  ___satfractsfqq
+  ___satfractsfhq
+  ___satfractsfsq
+  ___satfractsfdq
+  ___satfractsftq
+  ___satfractsfha
+  ___satfractsfsa
+  ___satfractsfda
+  ___satfractsfta
+  ___satfractsfuqq
+  ___satfractsfuhq
+  ___satfractsfusq
+  ___satfractsfudq
+  ___satfractsfutq
+  ___satfractsfuha
+  ___satfractsfusa
+  ___satfractsfuda
+  ___satfractsfuta
+  ___satfractdfqq
+  ___satfractdfhq
+  ___satfractdfsq
+  ___satfractdfdq
+  ___satfractdftq
+  ___satfractdfha
+  ___satfractdfsa
+  ___satfractdfda
+  ___satfractdfta
+  ___satfractdfuqq
+  ___satfractdfuhq
+  ___satfractdfusq
+  ___satfractdfudq
+  ___satfractdfutq
+  ___satfractdfuha
+  ___satfractdfusa
+  ___satfractdfuda
+  ___satfractdfuta
+  ___fractunsqqqi
+  ___fractunsqqhi
+  ___fractunsqqsi
+  ___fractunsqqdi
+  ___fractunsqqti
+  ___fractunshqqi
+  ___fractunshqhi
+  ___fractunshqsi
+  ___fractunshqdi
+  ___fractunshqti
+  ___fractunssqqi
+  ___fractunssqhi
+  ___fractunssqsi
+  ___fractunssqdi
+  ___fractunssqti
+  ___fractunsdqqi
+  ___fractunsdqhi
+  ___fractunsdqsi
+  ___fractunsdqdi
+  ___fractunsdqti
+  ___fractunstqqi
+  ___fractunstqhi
+  ___fractunstqsi
+  ___fractunstqdi
+  ___fractunstqti
+  ___fractunshaqi
+  ___fractunshahi
+  ___fractunshasi
+  ___fractunshadi
+  ___fractunshati
+  ___fractunssaqi
+  ___fractunssahi
+  ___fractunssasi
+  ___fractunssadi
+  ___fractunssati
+  ___fractunsdaqi
+  ___fractunsdahi
+  ___fractunsdasi
+  ___fractunsdadi
+  ___fractunsdati
+  ___fractunstaqi
+  ___fractunstahi
+  ___fractunstasi
+  ___fractunstadi
+  ___fractunstati
+  ___fractunsuqqqi
+  ___fractunsuqqhi
+  ___fractunsuqqsi
+  ___fractunsuqqdi
+  ___fractunsuqqti
+  ___fractunsuhqqi
+  ___fractunsuhqhi
+  ___fractunsuhqsi
+  ___fractunsuhqdi
+  ___fractunsuhqti
+  ___fractunsusqqi
+  ___fractunsusqhi
+  ___fractunsusqsi
+  ___fractunsusqdi
+  ___fractunsusqti
+  ___fractunsudqqi
+  ___fractunsudqhi
+  ___fractunsudqsi
+  ___fractunsudqdi
+  ___fractunsudqti
+  ___fractunsutqqi
+  ___fractunsutqhi
+  ___fractunsutqsi
+  ___fractunsutqdi
+  ___fractunsutqti
+  ___fractunsuhaqi
+  ___fractunsuhahi
+  ___fractunsuhasi
+  ___fractunsuhadi
+  ___fractunsuhati
+  ___fractunsusaqi
+  ___fractunsusahi
+  ___fractunsusasi
+  ___fractunsusadi
+  ___fractunsusati
+  ___fractunsudaqi
+  ___fractunsudahi
+  ___fractunsudasi
+  ___fractunsudadi
+  ___fractunsudati
+  ___fractunsutaqi
+  ___fractunsutahi
+  ___fractunsutasi
+  ___fractunsutadi
+  ___fractunsutati
+  ___fractunsqiqq
+  ___fractunsqihq
+  ___fractunsqisq
+  ___fractunsqidq
+  ___fractunsqitq
+  ___fractunsqiha
+  ___fractunsqisa
+  ___fractunsqida
+  ___fractunsqita
+  ___fractunsqiuqq
+  ___fractunsqiuhq
+  ___fractunsqiusq
+  ___fractunsqiudq
+  ___fractunsqiutq
+  ___fractunsqiuha
+  ___fractunsqiusa
+  ___fractunsqiuda
+  ___fractunsqiuta
+  ___fractunshiqq
+  ___fractunshihq
+  ___fractunshisq
+  ___fractunshidq
+  ___fractunshitq
+  ___fractunshiha
+  ___fractunshisa
+  ___fractunshida
+  ___fractunshita
+  ___fractunshiuqq
+  ___fractunshiuhq
+  ___fractunshiusq
+  ___fractunshiudq
+  ___fractunshiutq
+  ___fractunshiuha
+  ___fractunshiusa
+  ___fractunshiuda
+  ___fractunshiuta
+  ___fractunssiqq
+  ___fractunssihq
+  ___fractunssisq
+  ___fractunssidq
+  ___fractunssitq
+  ___fractunssiha
+  ___fractunssisa
+  ___fractunssida
+  ___fractunssita
+  ___fractunssiuqq
+  ___fractunssiuhq
+  ___fractunssiusq
+  ___fractunssiudq
+  ___fractunssiutq
+  ___fractunssiuha
+  ___fractunssiusa
+  ___fractunssiuda
+  ___fractunssiuta
+  ___fractunsdiqq
+  ___fractunsdihq
+  ___fractunsdisq
+  ___fractunsdidq
+  ___fractunsditq
+  ___fractunsdiha
+  ___fractunsdisa
+  ___fractunsdida
+  ___fractunsdita
+  ___fractunsdiuqq
+  ___fractunsdiuhq
+  ___fractunsdiusq
+  ___fractunsdiudq
+  ___fractunsdiutq
+  ___fractunsdiuha
+  ___fractunsdiusa
+  ___fractunsdiuda
+  ___fractunsdiuta
+  ___fractunstiqq
+  ___fractunstihq
+  ___fractunstisq
+  ___fractunstidq
+  ___fractunstitq
+  ___fractunstiha
+  ___fractunstisa
+  ___fractunstida
+  ___fractunstita
+  ___fractunstiuqq
+  ___fractunstiuhq
+  ___fractunstiusq
+  ___fractunstiudq
+  ___fractunstiutq
+  ___fractunstiuha
+  ___fractunstiusa
+  ___fractunstiuda
+  ___fractunstiuta
+  ___satfractunsqiqq
+  ___satfractunsqihq
+  ___satfractunsqisq
+  ___satfractunsqidq
+  ___satfractunsqitq
+  ___satfractunsqiha
+  ___satfractunsqisa
+  ___satfractunsqida
+  ___satfractunsqita
+  ___satfractunsqiuqq
+  ___satfractunsqiuhq
+  ___satfractunsqiusq
+  ___satfractunsqiudq
+  ___satfractunsqiutq
+  ___satfractunsqiuha
+  ___satfractunsqiusa
+  ___satfractunsqiuda
+  ___satfractunsqiuta
+  ___satfractunshiqq
+  ___satfractunshihq
+  ___satfractunshisq
+  ___satfractunshidq
+  ___satfractunshitq
+  ___satfractunshiha
+  ___satfractunshisa
+  ___satfractunshida
+  ___satfractunshita
+  ___satfractunshiuqq
+  ___satfractunshiuhq
+  ___satfractunshiusq
+  ___satfractunshiudq
+  ___satfractunshiutq
+  ___satfractunshiuha
+  ___satfractunshiusa
+  ___satfractunshiuda
+  ___satfractunshiuta
+  ___satfractunssiqq
+  ___satfractunssihq
+  ___satfractunssisq
+  ___satfractunssidq
+  ___satfractunssitq
+  ___satfractunssiha
+  ___satfractunssisa
+  ___satfractunssida
+  ___satfractunssita
+  ___satfractunssiuqq
+  ___satfractunssiuhq
+  ___satfractunssiusq
+  ___satfractunssiudq
+  ___satfractunssiutq
+  ___satfractunssiuha
+  ___satfractunssiusa
+  ___satfractunssiuda
+  ___satfractunssiuta
+  ___satfractunsdiqq
+  ___satfractunsdihq
+  ___satfractunsdisq
+  ___satfractunsdidq
+  ___satfractunsditq
+  ___satfractunsdiha
+  ___satfractunsdisa
+  ___satfractunsdida
+  ___satfractunsdita
+  ___satfractunsdiuqq
+  ___satfractunsdiuhq
+  ___satfractunsdiusq
+  ___satfractunsdiudq
+  ___satfractunsdiutq
+  ___satfractunsdiuha
+  ___satfractunsdiusa
+  ___satfractunsdiuda
+  ___satfractunsdiuta
+  ___satfractunstiqq
+  ___satfractunstihq
+  ___satfractunstisq
+  ___satfractunstidq
+  ___satfractunstitq
+  ___satfractunstiha
+  ___satfractunstisa
+  ___satfractunstida
+  ___satfractunstita
+  ___satfractunstiuqq
+  ___satfractunstiuhq
+  ___satfractunstiusq
+  ___satfractunstiudq
+  ___satfractunstiutq
+  ___satfractunstiuha
+  ___satfractunstiusa
+  ___satfractunstiuda
+  ___satfractunstiuta
+}
+
+%inherit GCC_4.4.0 GCC_4.3.0
+GCC_4.4.0 {
+  ___sync_fetch_and_add_1
+  ___sync_fetch_and_sub_1
+  ___sync_fetch_and_or_1
+  ___sync_fetch_and_and_1
+  ___sync_fetch_and_xor_1
+  ___sync_fetch_and_nand_1
+  ___sync_add_and_fetch_1
+  ___sync_sub_and_fetch_1
+  ___sync_or_and_fetch_1
+  ___sync_and_and_fetch_1
+  ___sync_xor_and_fetch_1
+  ___sync_nand_and_fetch_1
+  ___sync_bool_compare_and_swap_1
+  ___sync_val_compare_and_swap_1
+  ___sync_lock_test_and_set_1
+
+  ___sync_fetch_and_add_2
+  ___sync_fetch_and_sub_2
+  ___sync_fetch_and_or_2
+  ___sync_fetch_and_and_2
+  ___sync_fetch_and_xor_2
+  ___sync_fetch_and_nand_2
+  ___sync_add_and_fetch_2
+  ___sync_sub_and_fetch_2
+  ___sync_or_and_fetch_2
+  ___sync_and_and_fetch_2
+  ___sync_xor_and_fetch_2
+  ___sync_nand_and_fetch_2
+  ___sync_bool_compare_and_swap_2
+  ___sync_val_compare_and_swap_2
+  ___sync_lock_test_and_set_2
+
+  ___sync_fetch_and_add_4
+  ___sync_fetch_and_sub_4
+  ___sync_fetch_and_or_4
+  ___sync_fetch_and_and_4
+  ___sync_fetch_and_xor_4
+  ___sync_fetch_and_nand_4
+  ___sync_add_and_fetch_4
+  ___sync_sub_and_fetch_4
+  ___sync_or_and_fetch_4
+  ___sync_and_and_fetch_4
+  ___sync_xor_and_fetch_4
+  ___sync_nand_and_fetch_4
+  ___sync_bool_compare_and_swap_4
+  ___sync_val_compare_and_swap_4
+  ___sync_lock_test_and_set_4
+
+  ___sync_fetch_and_add_8
+  ___sync_fetch_and_sub_8
+  ___sync_fetch_and_or_8
+  ___sync_fetch_and_and_8
+  ___sync_fetch_and_xor_8
+  ___sync_fetch_and_nand_8
+  ___sync_add_and_fetch_8
+  ___sync_sub_and_fetch_8
+  ___sync_or_and_fetch_8
+  ___sync_and_and_fetch_8
+  ___sync_xor_and_fetch_8
+  ___sync_nand_and_fetch_8
+  ___sync_bool_compare_and_swap_8
+  ___sync_val_compare_and_swap_8
+  ___sync_lock_test_and_set_8
+
+  ___sync_fetch_and_add_16
+  ___sync_fetch_and_sub_16
+  ___sync_fetch_and_or_16
+  ___sync_fetch_and_and_16
+  ___sync_fetch_and_xor_16
+  ___sync_fetch_and_nand_16
+  ___sync_add_and_fetch_16
+  ___sync_sub_and_fetch_16
+  ___sync_or_and_fetch_16
+  ___sync_and_and_fetch_16
+  ___sync_xor_and_fetch_16
+  ___sync_nand_and_fetch_16
+  ___sync_bool_compare_and_swap_16
+  ___sync_val_compare_and_swap_16
+  ___sync_lock_test_and_set_16
+
+  ___sync_synchronize
+}
+
+%inherit GCC_4.5.0 GCC_4.4.0
+GCC_4.5.0 {
+  ___unordxf2
+  ___unordtf2
+}
diff --git a/gcc-4.9/libgcc/config/bfin/linux-unwind.h b/gcc-4.9/libgcc/config/bfin/linux-unwind.h
new file mode 100644
index 000000000..dc58f0a81
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/linux-unwind.h
@@ -0,0 +1,164 @@
+/* DWARF2 EH unwinding support for Blackfin.
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
+
+#include <signal.h>
+#include <sys/ucontext.h>
+
+#define MD_FALLBACK_FRAME_STATE_FOR bfin_fallback_frame_state
+
+static _Unwind_Reason_Code
+bfin_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+
+  /* P0=__NR_rt_sigreturn (X); EXCPT  0x0; */
+  if (*(unsigned short *)pc == 0xe128
+      && *(unsigned short *)(pc + 2) == 0x00ad
+      && *(unsigned short *)(pc + 4) == 0x00a0)
+    {
+      struct rt_sigframe {
+	int sig;
+	siginfo_t *pinfo;
+	void *puc;
+	char retcode[8];
+	siginfo_t info;
+	struct ucontext uc;
+      } *rt_ = context->cfa;
+
+      /* The void * cast is necessary to avoid an aliasing warning.
+         The aliasing warning is correct, but should not be a problem
+         because it does not alias anything.  */
+      sc = (struct sigcontext *)(void *)&rt_->uc.uc_mcontext.gregs;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->sc_usp;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 14;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)&sc->sc_r0 - new_cfa;
+  fs->regs.reg[1].how = REG_SAVED_OFFSET;
+  fs->regs.reg[1].loc.offset = (long)&sc->sc_r1 - new_cfa;
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long)&sc->sc_r2 - new_cfa;
+  fs->regs.reg[3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[3].loc.offset = (long)&sc->sc_r3 - new_cfa;
+  fs->regs.reg[4].how = REG_SAVED_OFFSET;
+  fs->regs.reg[4].loc.offset = (long)&sc->sc_r4 - new_cfa;
+  fs->regs.reg[5].how = REG_SAVED_OFFSET;
+  fs->regs.reg[5].loc.offset = (long)&sc->sc_r5 - new_cfa;
+  fs->regs.reg[6].how = REG_SAVED_OFFSET;
+  fs->regs.reg[6].loc.offset = (long)&sc->sc_r6 - new_cfa;
+  fs->regs.reg[7].how = REG_SAVED_OFFSET;
+  fs->regs.reg[7].loc.offset = (long)&sc->sc_r7 - new_cfa;
+  fs->regs.reg[8].how = REG_SAVED_OFFSET;
+  fs->regs.reg[8].loc.offset = (long)&sc->sc_p0 - new_cfa;
+  fs->regs.reg[9].how = REG_SAVED_OFFSET;
+  fs->regs.reg[9].loc.offset = (long)&sc->sc_p1 - new_cfa;
+  fs->regs.reg[10].how = REG_SAVED_OFFSET;
+  fs->regs.reg[10].loc.offset = (long)&sc->sc_p2 - new_cfa;
+  fs->regs.reg[11].how = REG_SAVED_OFFSET;
+  fs->regs.reg[11].loc.offset = (long)&sc->sc_p3 - new_cfa;
+  fs->regs.reg[12].how = REG_SAVED_OFFSET;
+  fs->regs.reg[12].loc.offset = (long)&sc->sc_p4 - new_cfa;
+  fs->regs.reg[13].how = REG_SAVED_OFFSET;
+  fs->regs.reg[13].loc.offset = (long)&sc->sc_p5 - new_cfa;
+
+  fs->regs.reg[15].how = REG_SAVED_OFFSET;
+  fs->regs.reg[15].loc.offset = (long)&sc->sc_fp - new_cfa;
+  fs->regs.reg[16].how = REG_SAVED_OFFSET;
+  fs->regs.reg[16].loc.offset = (long)&sc->sc_i0 - new_cfa;
+  fs->regs.reg[17].how = REG_SAVED_OFFSET;
+  fs->regs.reg[17].loc.offset = (long)&sc->sc_i1 - new_cfa;
+  fs->regs.reg[18].how = REG_SAVED_OFFSET;
+  fs->regs.reg[18].loc.offset = (long)&sc->sc_i2 - new_cfa;
+  fs->regs.reg[19].how = REG_SAVED_OFFSET;
+  fs->regs.reg[19].loc.offset = (long)&sc->sc_i3 - new_cfa;
+  fs->regs.reg[20].how = REG_SAVED_OFFSET;
+  fs->regs.reg[20].loc.offset = (long)&sc->sc_b0 - new_cfa;
+  fs->regs.reg[21].how = REG_SAVED_OFFSET;
+  fs->regs.reg[21].loc.offset = (long)&sc->sc_b1 - new_cfa;
+  fs->regs.reg[22].how = REG_SAVED_OFFSET;
+  fs->regs.reg[22].loc.offset = (long)&sc->sc_b2 - new_cfa;
+  fs->regs.reg[23].how = REG_SAVED_OFFSET;
+  fs->regs.reg[23].loc.offset = (long)&sc->sc_b3 - new_cfa;
+  fs->regs.reg[24].how = REG_SAVED_OFFSET;
+  fs->regs.reg[24].loc.offset = (long)&sc->sc_l0 - new_cfa;
+  fs->regs.reg[25].how = REG_SAVED_OFFSET;
+  fs->regs.reg[25].loc.offset = (long)&sc->sc_l1 - new_cfa;
+  fs->regs.reg[26].how = REG_SAVED_OFFSET;
+  fs->regs.reg[26].loc.offset = (long)&sc->sc_l2 - new_cfa;
+  fs->regs.reg[27].how = REG_SAVED_OFFSET;
+  fs->regs.reg[27].loc.offset = (long)&sc->sc_l3 - new_cfa;
+  fs->regs.reg[28].how = REG_SAVED_OFFSET;
+  fs->regs.reg[28].loc.offset = (long)&sc->sc_m0 - new_cfa;
+  fs->regs.reg[29].how = REG_SAVED_OFFSET;
+  fs->regs.reg[29].loc.offset = (long)&sc->sc_m1 - new_cfa;
+  fs->regs.reg[30].how = REG_SAVED_OFFSET;
+  fs->regs.reg[30].loc.offset = (long)&sc->sc_m2 - new_cfa;
+  fs->regs.reg[31].how = REG_SAVED_OFFSET;
+  fs->regs.reg[31].loc.offset = (long)&sc->sc_m3 - new_cfa;
+  /* FIXME: Handle A0, A1, CC.  */
+  fs->regs.reg[35].how = REG_SAVED_OFFSET;
+  fs->regs.reg[35].loc.offset = (long)&sc->sc_rets - new_cfa;
+  fs->regs.reg[36].how = REG_SAVED_OFFSET;
+  fs->regs.reg[36].loc.offset = (long)&sc->sc_pc - new_cfa;
+  fs->regs.reg[37].how = REG_SAVED_OFFSET;
+  fs->regs.reg[37].loc.offset = (long)&sc->sc_retx - new_cfa;
+
+  fs->regs.reg[40].how = REG_SAVED_OFFSET;
+  fs->regs.reg[40].loc.offset = (long)&sc->sc_astat - new_cfa;
+  fs->regs.reg[41].how = REG_SAVED_OFFSET;
+  fs->regs.reg[41].loc.offset = (long)&sc->sc_seqstat - new_cfa;
+
+  fs->regs.reg[44].how = REG_SAVED_OFFSET;
+  fs->regs.reg[44].loc.offset = (long)&sc->sc_lt0 - new_cfa;
+  fs->regs.reg[45].how = REG_SAVED_OFFSET;
+  fs->regs.reg[45].loc.offset = (long)&sc->sc_lt1 - new_cfa;
+  fs->regs.reg[46].how = REG_SAVED_OFFSET;
+  fs->regs.reg[46].loc.offset = (long)&sc->sc_lc0 - new_cfa;
+  fs->regs.reg[47].how = REG_SAVED_OFFSET;
+  fs->regs.reg[47].loc.offset = (long)&sc->sc_lc1 - new_cfa;
+  fs->regs.reg[48].how = REG_SAVED_OFFSET;
+  fs->regs.reg[48].loc.offset = (long)&sc->sc_lb0 - new_cfa;
+  fs->regs.reg[49].how = REG_SAVED_OFFSET;
+  fs->regs.reg[49].loc.offset = (long)&sc->sc_lb1 - new_cfa;
+  fs->retaddr_column = 35;
+
+  return _URC_NO_REASON;
+}
+
+#endif /* ifdef inhibit_libc */
diff --git a/gcc-4.9/libgcc/config/bfin/t-bfin b/gcc-4.9/libgcc/config/bfin/t-bfin
new file mode 100644
index 000000000..bc2b088ff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/t-bfin
@@ -0,0 +1,3 @@
+LIB1ASMSRC = bfin/lib1funcs.S
+LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _muldi3 _umulsi3_highpart
+LIB1ASMFUNCS += _smulsi3_highpart
diff --git a/gcc-4.9/libgcc/config/bfin/t-crtlibid b/gcc-4.9/libgcc/config/bfin/t-crtlibid
new file mode 100644
index 000000000..b0c93e71e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/t-crtlibid
@@ -0,0 +1,3 @@
+# Assemble startup files.
+crtlibid.o: $(srcdir)/config/bfin/crtlibid.S
+	$(gcc_compile) -c -x assembler-with-cpp $<
diff --git a/gcc-4.9/libgcc/config/bfin/t-crtstuff b/gcc-4.9/libgcc/config/bfin/t-crtstuff
new file mode 100644
index 000000000..eee12eb69
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/t-crtstuff
@@ -0,0 +1 @@
+CRTSTUFF_T_CFLAGS = $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/bfin/t-linux b/gcc-4.9/libgcc/config/bfin/t-linux
new file mode 100644
index 000000000..1c42e482b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/bfin/t-linux
@@ -0,0 +1 @@
+SHLIB_MAPFILES = $(srcdir)/config/bfin/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/c6x/c6x-abi.h b/gcc-4.9/libgcc/config/c6x/c6x-abi.h
new file mode 100644
index 000000000..b68c60782
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/c6x-abi.h
@@ -0,0 +1,108 @@
+/* Header file for C6X ABI versions of libgcc functions.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Bernd Schmidt <bernds@codesourcery.com>
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Make __c6xabi_AEABI_NAME an alias for __GCC_NAME.  */
+#define RENAME_LIBRARY(GCC_NAME, AEABI_NAME)			\
+  __asm__ (".globl\t__c6xabi_" #AEABI_NAME "\n"		\
+	   ".set\t__c6xabi_" #AEABI_NAME			\
+	   ", __gnu_" #GCC_NAME "\n");
+
+/* Rename helper functions to the names specified in the C6000 ELF ABI.  */
+#ifdef L_divsi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divsi3, divi)
+#endif
+#ifdef L_divdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divdi3, divlli)
+#endif
+#ifdef L_udivsi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivsi3, divu)
+#endif
+#ifdef L_udivdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivdi3, divull)
+#endif
+#ifdef L_udivmoddi4
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivmoddi4, divremull)
+#endif
+#ifdef L_modsi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (modsi3, remi)
+#endif
+#ifdef L_moddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (moddi3, remlli)
+#endif
+#ifdef L_umodsi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (umodsi3, remu)
+#endif
+#ifdef L_umoddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (umoddi3, remull)
+#endif
+#ifdef L_negdi2
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (negdi2, negll)
+#endif
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, mpyll)
+#endif
+#ifdef L_ashrdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashrdi3, llshr)
+#endif
+#ifdef L_lshrdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (lshrdi3, llshru)
+#endif
+#ifdef L_ashldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashldi3, llshl)
+#endif
+
+/* The following are excluded from softfp due to softfp_exclude_libgcc2,
+   so we rename them here rather than in sfp-machine.h.  */
+#ifdef L_fixdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, fixdlli)
+#endif
+#ifdef L_fixunsdfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfsi, fixdu)
+#endif
+#ifdef L_fixunsdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, fixdull)
+#endif
+#ifdef L_fixsfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, fixflli)
+#endif
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfsi, fixfu)
+#endif
+#ifdef L_fixunssfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, fixfull)
+#endif
+#ifdef L_floatdidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdidf, fltllid)
+#endif
+#ifdef L_floatundidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundidf, fltulld)
+#endif
+#ifdef L_floatdisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, fltllif)
+#endif
+#ifdef L_floatundisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundisf, fltullf)
+#endif
+
+#define LIBGCC2_GNU_PREFIX
diff --git a/gcc-4.9/libgcc/config/c6x/crti.S b/gcc-4.9/libgcc/config/c6x/crti.S
new file mode 100644
index 000000000..938e410b8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/crti.S
@@ -0,0 +1,39 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   Contributed by Bernd Schmidt <bernds@codesourcery.com>.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file just supplies function prologues for the .init and .fini
+ * sections.  It is linked in before crtbegin.o.
+ */
+
+	.section .init
+	.globl  _init
+	.type   _init,@function
+_init:
+	add	.l2	-8, B15, B15
+	stw	.d2t2	B3,*+B15(4)
+	.section .fini
+	.globl  _fini
+	.type   _fini,@function
+_fini:
+	add	.l2	-8, B15, B15
+	stw	.d2t2	B3,*+B15(4)
diff --git a/gcc-4.9/libgcc/config/c6x/crtn.S b/gcc-4.9/libgcc/config/c6x/crtn.S
new file mode 100644
index 000000000..88e35ed85
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/crtn.S
@@ -0,0 +1,41 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   Contributed by Bernd Schmidt <bernds@codesourcery.com>.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file supplies function epilogues for the .init and .fini sections.
+ * It is linked in after all other files.
+ */
+
+	.section .init
+	ldw .d2t2	*+B15(4), B3
+	add .d2		B15, 8, B15
+	nop		3
+	ret .s2		B3
+	nop		5
+
+	.section .fini
+	ldw .d2t2	*+B15(4), B3
+	add .d2		B15, 8, B15
+	nop		3
+	ret .s2		B3
+	nop		5
+
diff --git a/gcc-4.9/libgcc/config/c6x/eqd.c b/gcc-4.9/libgcc/config/c6x/eqd.c
new file mode 100644
index 000000000..283b2214e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/eqd.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a == b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/double.h>
+
+CMPtype __c6xabi_eqd(DFtype a, DFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_D(A); FP_DECL_D(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_D(A, a);
+  FP_UNPACK_RAW_D(B, b);
+  FP_CMP_EQ_D(r, A, B);
+  if (r && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return !r;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/eqf.c b/gcc-4.9/libgcc/config/c6x/eqf.c
new file mode 100644
index 000000000..e99fc84a0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/eqf.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a == b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/single.h>
+
+CMPtype __c6xabi_eqf(SFtype a, SFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_S(A); FP_DECL_S(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_S(A, a);
+  FP_UNPACK_RAW_S(B, b);
+  FP_CMP_EQ_S(r, A, B);
+  if (r && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return !r;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/ged.c b/gcc-4.9/libgcc/config/c6x/ged.c
new file mode 100644
index 000000000..29704cf6a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/ged.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a >= b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/double.h>
+
+CMPtype __c6xabi_ged(DFtype a, DFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_D(A); FP_DECL_D(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_D(A, a);
+  FP_UNPACK_RAW_D(B, b);
+  FP_CMP_D(r, A, B, -2);
+  if (r == -2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r >= 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/gef.c b/gcc-4.9/libgcc/config/c6x/gef.c
new file mode 100644
index 000000000..bd6f27d15
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/gef.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a >= b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/single.h>
+
+CMPtype __c6xabi_gef(SFtype a, SFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_S(A); FP_DECL_S(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_S(A, a);
+  FP_UNPACK_RAW_S(B, b);
+  FP_CMP_S(r, A, B, -2);
+  if (r == -2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r >= 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/gtd.c b/gcc-4.9/libgcc/config/c6x/gtd.c
new file mode 100644
index 000000000..6a9ca924f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/gtd.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a > b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/double.h>
+
+CMPtype __c6xabi_gtd(DFtype a, DFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_D(A); FP_DECL_D(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_D(A, a);
+  FP_UNPACK_RAW_D(B, b);
+  FP_CMP_D(r, A, B, -2);
+  if (r == -2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r > 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/gtf.c b/gcc-4.9/libgcc/config/c6x/gtf.c
new file mode 100644
index 000000000..a7db8f83c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/gtf.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a > b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/single.h>
+
+CMPtype __c6xabi_gtf(SFtype a, SFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_S(A); FP_DECL_S(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_S(A, a);
+  FP_UNPACK_RAW_S(B, b);
+  FP_CMP_S(r, A, B, -2);
+  if (r == -2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r > 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/led.c b/gcc-4.9/libgcc/config/c6x/led.c
new file mode 100644
index 000000000..14c48d332
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/led.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a <= b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/double.h>
+
+CMPtype __c6xabi_led(DFtype a, DFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_D(A); FP_DECL_D(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_D(A, a);
+  FP_UNPACK_RAW_D(B, b);
+  FP_CMP_D(r, A, B, 2);
+  if (r == 2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r <= 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/lef.c b/gcc-4.9/libgcc/config/c6x/lef.c
new file mode 100644
index 000000000..9742ae087
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/lef.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a <= b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/single.h>
+
+CMPtype __c6xabi_lef(SFtype a, SFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_S(A); FP_DECL_S(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_S(A, a);
+  FP_UNPACK_RAW_S(B, b);
+  FP_CMP_S(r, A, B, 2);
+  if (r == 2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r <= 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/lib1funcs.S b/gcc-4.9/libgcc/config/c6x/lib1funcs.S
new file mode 100644
index 000000000..9ce1f6fda
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/lib1funcs.S
@@ -0,0 +1,438 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+   Contributed by Bernd Schmidt <bernds@codesourcery.com>.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	;; ABI considerations for the divide functions
+	;; The following registers are call-used:
+	;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
+	;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
+	;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
+	;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
+	;;
+	;; In our implementation, divu and remu are leaf functions,
+	;; while both divi and remi call into divu.
+	;; A0 is not clobbered by any of the functions.
+	;; divu does not clobber B2 either, which is taken advantage of
+	;; in remi.
+	;; divi uses B5 to hold the original return address during
+	;; the call to divu.
+	;; remi uses B2 and A5 to hold the input values during the
+	;; call to divu.  It stores B3 in on the stack.
+
+#ifdef L_divsi3
+.text
+.align 2
+.global __c6xabi_divi
+.hidden __c6xabi_divi
+.type __c6xabi_divi, STT_FUNC
+
+__c6xabi_divi:
+	call .s2	__c6xabi_divu
+||	mv .d2		B3, B5
+||	cmpgt .l1	0, A4, A1
+||	cmpgt .l2	0, B4, B1
+
+	[A1] neg .l1	A4, A4
+||	[B1] neg .l2	B4, B4
+||	xor .s1x	A1, B1, A1
+
+#ifdef _TMS320C6400
+	[A1] addkpc .s2	1f, B3, 4
+#else
+	[A1] mvkl .s2	1f, B3
+	[A1] mvkh .s2	1f, B3
+	nop		2
+#endif
+1:
+	neg .l1		A4, A4
+||	mv .l2		B3,B5
+||	ret .s2		B5
+	nop		5
+#endif
+
+#if defined L_modsi3 || defined L_divmodsi4
+.align 2
+#ifdef L_modsi3
+#define MOD_OUTPUT_REG A4
+.global __c6xabi_remi
+.hidden __c6xabi_remi
+.type __c6xabi_remi, STT_FUNC
+#else
+#define MOD_OUTPUT_REG A5
+.global __c6xabi_divremi
+.hidden __c6xabi_divremi
+.type __c6xabi_divremi, STT_FUNC
+__c6xabi_divremi:
+#endif
+
+__c6xabi_remi:
+	stw .d2t2	B3, *B15--[2]
+||	cmpgt .l1	0, A4, A1
+||	cmpgt .l2	0, B4, B2
+||	mv .s1		A4, A5
+||	call .s2	__c6xabi_divu
+
+	[A1] neg .l1	A4, A4
+||	[B2] neg .l2	B4, B4
+||	xor .s2x	B2, A1, B0
+||	mv .d2		B4, B2
+
+#ifdef _TMS320C6400
+	[B0] addkpc .s2	1f, B3, 1
+	[!B0] addkpc .s2 2f, B3, 1
+	nop		2
+#else
+	[B0] mvkl .s2	1f,B3
+	[!B0] mvkl .s2	2f,B3
+
+	[B0] mvkh .s2	1f,B3
+	[!B0] mvkh .s2	2f,B3
+#endif
+1:
+	neg .l1		A4, A4
+2:
+	ldw .d2t2	*++B15[2], B3
+
+#ifdef _TMS320C6400_PLUS
+	mpy32 .m1x	A4, B2, A6
+	nop		3
+	ret .s2		B3
+	sub .l1		A5, A6, MOD_OUTPUT_REG
+	nop		4
+#else
+	mpyu .m1x	A4, B2, A1
+	nop		1
+	mpylhu .m1x	A4, B2, A6
+||	mpylhu .m2x	B2, A4, B2
+	nop		1
+	add .l1x	A6, B2, A6
+||	ret .s2		B3
+	shl .s1		A6, 16, A6
+	add .d1		A6, A1, A6
+	sub .l1		A5, A6, MOD_OUTPUT_REG
+	nop		2
+#endif
+
+#endif
+
+#if defined L_udivsi3 || defined L_udivmodsi4
+.align 2
+#ifdef L_udivsi3
+.global __c6xabi_divu
+.hidden __c6xabi_divu
+.type __c6xabi_divu, STT_FUNC
+__c6xabi_divu:
+#else
+.global __c6xabi_divremu
+.hidden __c6xabi_divremu
+.type __c6xabi_divremu, STT_FUNC
+__c6xabi_divremu:
+#endif
+	;; We use a series of up to 31 subc instructions.  First, we find
+	;; out how many leading zero bits there are in the divisor.  This
+	;; gives us both a shift count for aligning (shifting) the divisor
+	;; to the, and the number of times we have to execute subc.
+
+	;; At the end, we have both the remainder and most of the quotient
+	;; in A4.  The top bit of the quotient is computed first and is
+	;; placed in A2.
+
+	;; Return immediately if the dividend is zero.  Setting B4 to 1
+	;; is a trick to allow us to leave the following insns in the jump
+	;; delay slot without affecting the result.
+	mv	.s2x	A4, B1
+
+#ifndef _TMS320C6400
+[!b1]	mvk	.s2	1, B4
+#endif
+[b1]	lmbd	.l2	1, B4, B1
+||[!b1] b	.s2	B3	; RETURN A
+#ifdef _TMS320C6400
+||[!b1] mvk	.d2	1, B4
+#endif
+#ifdef L_udivmodsi4
+||[!b1] zero	.s1	A5
+#endif
+	mv	.l1x	B1, A6
+||	shl	.s2	B4, B1, B4
+
+	;; The loop performs a maximum of 28 steps, so we do the
+	;; first 3 here.
+	cmpltu	.l1x	A4, B4, A2
+[!A2]	sub	.l1x	A4, B4, A4
+||	shru	.s2	B4, 1, B4
+||	xor	.s1	1, A2, A2
+
+	shl	.s1	A2, 31, A2
+|| [b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+
+	;; RETURN A may happen here (note: must happen before the next branch)
+0:
+	cmpgt	.l2	B1, 7, B0
+|| [b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+|| [b0] b	.s1	0b
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+	;; loop backwards branch happens here
+
+	ret	.s2	B3
+||	mvk	.s1	32, A1
+	sub	.l1	A1, A6, A6
+#ifdef L_udivmodsi4
+||	extu	.s1	A4, A6, A5
+#endif
+	shl	.s1	A4, A6, A4
+	shru	.s1	A4, 1, A4
+||	sub	.l1	A6, 1, A6
+	or	.l1	A2, A4, A4
+	shru	.s1	A4, A6, A4
+	nop
+
+#endif
+
+#ifdef L_umodsi3
+.align 2
+.global __c6xabi_remu
+.hidden __c6xabi_remu
+.type __c6xabi_remu, STT_FUNC
+__c6xabi_remu:
+	;; The ABI seems designed to prevent these functions calling each other,
+	;; so we duplicate most of the divsi3 code here.
+	mv	.s2x	A4, B1
+#ifndef _TMS320C6400
+[!b1]	mvk	.s2	1, B4
+#endif
+	lmbd	.l2	1, B4, B1
+||[!b1] b	.s2	B3	; RETURN A
+#ifdef _TMS320C6400
+||[!b1] mvk	.d2	1, B4
+#endif
+
+	mv	.l1x	B1, A7
+||	shl	.s2	B4, B1, B4
+
+	cmpltu	.l1x	A4, B4, A1
+[!a1]	sub	.l1x	A4, B4, A4
+	shru	.s2	B4, 1, B4
+
+0:
+	cmpgt	.l2	B1, 7, B0
+|| [b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+	;; RETURN A may happen here (note: must happen before the next branch)
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+|| [b0] b	.s1	0b
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+	;; loop backwards branch happens here
+
+	ret	.s2	B3
+[b1]	subc	.l1x	A4,B4,A4
+|| [b1]	add	.s2	-1, B1, B1
+[b1]	subc	.l1x	A4,B4,A4
+
+	extu	.s1	A4, A7, A4
+	nop	2
+#endif
+
+#if defined L_strasgi_64plus && defined _TMS320C6400_PLUS
+
+.align 2
+.global __c6xabi_strasgi_64plus
+.hidden __c6xabi_strasgi_64plus
+.type __c6xabi_strasgi_64plus, STT_FUNC
+__c6xabi_strasgi_64plus:
+	shru	.s2x	a6, 2, b31
+||	mv	.s1	a4, a30
+||	mv	.d2	b4, b30
+
+	add	.s2	-4, b31, b31
+
+	sploopd		1
+||	mvc	.s2	b31, ilc
+	ldw	.d2t2	*b30++, b31
+	nop	4
+	mv	.s1x	b31,a31
+	spkernel	6, 0
+||	stw	.d1t1	a31, *a30++
+
+	ret	.s2	b3
+	nop 5
+#endif
+
+#ifdef L_strasgi
+.global __c6xabi_strasgi
+.type __c6xabi_strasgi, STT_FUNC
+__c6xabi_strasgi:
+	;; This is essentially memcpy, with alignment known to be at least
+	;; 4, and the size a multiple of 4 greater than or equal to 28.
+	ldw	.d2t1	*B4++, A0
+||	mvk	.s2	16, B1
+	ldw	.d2t1	*B4++, A1
+||	mvk	.s2	20, B2
+||	sub	.d1	A6, 24, A6
+	ldw	.d2t1	*B4++, A5
+	ldw	.d2t1	*B4++, A7
+||	mv	.l2x	A6, B7
+	ldw	.d2t1	*B4++, A8
+	ldw	.d2t1	*B4++, A9
+||	mv	.s2x	A0, B5
+||	cmpltu	.l2	B2, B7, B0
+
+0:
+	stw	.d1t2	B5, *A4++
+||[b0]	ldw	.d2t1	*B4++, A0
+||	mv	.s2x	A1, B5
+||	mv	.l2	B7, B6
+
+[b0]	sub	.d2	B6, 24, B7
+||[b0]	b	.s2	0b
+||	cmpltu	.l2	B1, B6, B0
+
+[b0]	ldw	.d2t1	*B4++, A1
+||	stw	.d1t2	B5, *A4++
+||	mv	.s2x	A5, B5
+||	cmpltu	.l2	12, B6, B0
+
+[b0]	ldw	.d2t1	*B4++, A5
+||	stw	.d1t2	B5, *A4++
+||	mv	.s2x	A7, B5
+||	cmpltu	.l2	8, B6, B0
+
+[b0]	ldw	.d2t1	*B4++, A7
+||	stw	.d1t2	B5, *A4++
+||	mv	.s2x	A8, B5
+||	cmpltu	.l2	4, B6, B0
+
+[b0]	ldw	.d2t1	*B4++, A8
+||	stw	.d1t2	B5, *A4++
+||	mv	.s2x	A9, B5
+||	cmpltu	.l2	0, B6, B0
+
+[b0]	ldw	.d2t1	*B4++, A9
+||	stw	.d1t2	B5, *A4++
+||	mv	.s2x	A0, B5
+||	cmpltu	.l2	B2, B7, B0
+
+	;; loop back branch happens here
+
+	cmpltu	.l2	B1, B6, B0
+||	ret	.s2	b3
+
+[b0]	stw	.d1t1	A1, *A4++
+||	cmpltu	.l2	12, B6, B0
+[b0]	stw	.d1t1	A5, *A4++
+||	cmpltu	.l2	8, B6, B0
+[b0]	stw	.d1t1	A7, *A4++
+||	cmpltu	.l2	4, B6, B0
+[b0]	stw	.d1t1	A8, *A4++
+||	cmpltu	.l2	0, B6, B0
+[b0]	stw	.d1t1	A9, *A4++
+
+	;; return happens here
+
+#endif
+
+#ifdef _TMS320C6400_PLUS
+#ifdef L_push_rts
+.align 2
+.global __c6xabi_push_rts
+.hidden __c6xabi_push_rts
+.type __c6xabi_push_rts, STT_FUNC
+__c6xabi_push_rts:
+	stw .d2t2	B14, *B15--[2]
+	stdw .d2t1	A15:A14, *B15--
+||	b .s2x		A3
+	stdw .d2t2	B13:B12, *B15--
+	stdw .d2t1	A13:A12, *B15--
+	stdw .d2t2	B11:B10, *B15--
+	stdw .d2t1	A11:A10, *B15--
+	stdw .d2t2	B3:B2, *B15--
+#endif
+
+#ifdef L_pop_rts
+.align 2
+.global __c6xabi_pop_rts
+.hidden __c6xabi_pop_rts
+.type __c6xabi_pop_rts, STT_FUNC
+__c6xabi_pop_rts:
+	lddw .d2t2	*++B15, B3:B2
+	lddw .d2t1	*++B15, A11:A10
+	lddw .d2t2	*++B15, B11:B10
+	lddw .d2t1	*++B15, A13:A12
+	lddw .d2t2	*++B15, B13:B12
+	lddw .d2t1	*++B15, A15:A14
+||	b .s2		B3
+	ldw .d2t2	*++B15[2], B14
+	nop		4
+#endif
+
+#ifdef L_call_stub
+.align 2
+.global __c6xabi_call_stub
+.type __c6xabi_call_stub, STT_FUNC
+__c6xabi_call_stub:
+	stw .d2t1	A2, *B15--[2]
+	stdw .d2t1	A7:A6, *B15--
+||	call .s2	B31
+	stdw .d2t1	A1:A0, *B15--
+	stdw .d2t2	B7:B6, *B15--
+	stdw .d2t2	B5:B4, *B15--
+	stdw .d2t2	B1:B0, *B15--
+	stdw .d2t2	B3:B2, *B15--
+||	addkpc .s2	1f, B3, 0
+1:
+	lddw .d2t2	*++B15, B3:B2
+	lddw .d2t2	*++B15, B1:B0
+	lddw .d2t2	*++B15, B5:B4
+	lddw .d2t2	*++B15, B7:B6
+	lddw .d2t1	*++B15, A1:A0
+	lddw .d2t1	*++B15, A7:A6
+||	b .s2		B3
+	ldw .d2t1	*++B15[2], A2
+	nop		4
+#endif
+
+#endif
+
diff --git a/gcc-4.9/libgcc/config/c6x/libgcc-eabi.ver b/gcc-4.9/libgcc/config/c6x/libgcc-eabi.ver
new file mode 100644
index 000000000..01bff9447
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/libgcc-eabi.ver
@@ -0,0 +1,103 @@
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_4.7.0 {
+  __c6xabi_strasgi
+  __c6xabi_call_stub
+  __c6xabi_mpyll
+  __c6xabi_negll
+  __c6xabi_llshru
+  __c6xabi_llshl
+  __c6xabi_llshr
+  __c6xabi_fixfu
+  __c6xabi_fixdu
+  __c6xabi_fixflli
+  __c6xabi_fixdlli
+  __c6xabi_fixfull
+  __c6xabi_fixdull
+  __c6xabi_fltllif
+  __c6xabi_fltllid
+  __c6xabi_fltullf
+  __c6xabi_fltulld
+  __c6xabi_divlli
+  __c6xabi_remlli
+  __c6xabi_divull
+  __c6xabi_remull
+  __c6xabi_divremull
+  __c6xabi_gef
+  __c6xabi_gtf
+  __c6xabi_lef
+  __c6xabi_ltf
+  __c6xabi_eqf
+  __c6xabi_ged
+  __c6xabi_gtd
+  __c6xabi_led
+  __c6xabi_ltd
+  __c6xabi_eqd
+  __c6xabi_addf
+  __c6xabi_divf
+  __c6xabi_neqf
+  __c6xabi_cmpf
+  __c6xabi_mpyf
+  __c6xabi_negf
+  __c6xabi_subf
+  __c6xabi_unordf
+  __c6xabi_fixfi
+  __c6xabi_fltif
+  __c6xabi_fltuf
+  __c6xabi_addd
+  __c6xabi_divd
+  __c6xabi_neqd
+  __c6xabi_cmpd
+  __c6xabi_mpyd
+  __c6xabi_negd
+  __c6xabi_subd
+  __c6xabi_unordd
+  __c6xabi_fixdi
+  __c6xabi_fltid
+  __c6xabi_fltud
+  __c6xabi_cvtfd
+  __c6xabi_cvtdf
+  __c6xabi_mulcf
+  __c6xabi_mulcd
+  __c6xabi_divcf
+  __c6xabi_divcd
+
+  __gnu_ltsf2
+  __gnu_ltdf2
+  __gnu_gesf2
+  __gnu_gedf2
+  __gnu_gtsf2
+  __gnu_gtdf2
+  __gnu_eqsf2
+  __gnu_eqdf2
+
+  # Exception-Handling
+  _Unwind_Complete
+  _Unwind_VRS_Get
+  _Unwind_VRS_Set
+  _Unwind_VRS_Pop
+  __c6xabi_unwind_cpp_pr0
+  __c6xabi_unwind_cpp_pr1
+  __c6xabi_unwind_cpp_pr2
+  __c6xabi_unwind_cpp_pr3
+  __c6xabi_unwind_cpp_pr4
+  # The libstdc++ exception-handling personality routine uses this 
+  # GNU-specific entry point.
+  __gnu_unwind_frame
+}
diff --git a/gcc-4.9/libgcc/config/c6x/libunwind.S b/gcc-4.9/libgcc/config/c6x/libunwind.S
new file mode 100644
index 000000000..7e6498378
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/libunwind.S
@@ -0,0 +1,133 @@
+.text
+.macro do_call fn
+#ifdef _TMS320C6400_PLUS
+	callp	.s2	(\fn), B3
+#elif defined(_TMS320C6400)
+	call	.s2	(\fn)
+	addkpc	.s2	9f, B3, 0
+	nop		4
+9f:
+#else
+	call	.s2	(\fn)
+	mhkl	.s2	9f, B3
+	mhkh	.s2	9f, B3
+	nop		3
+9f:
+#endif
+.endm
+.align 2
+.global restore_core_regs
+.type restore_core_regs, STT_FUNC
+restore_core_regs:
+	mv	.s2x	A4, B4
+	ldw	.d1t1	*+A4[0], A0
+	|| ldw	.d2t2	*++B4[16], B0
+	ldw	.d1t1	*+A4[1], A1
+	|| ldw	.d2t2	*+B4[1], B1
+	ldw	.d1t1	*+A4[2], A2
+	|| ldw	.d2t2	*+B4[2], B2
+	ldw	.d1t1	*+A4[3], A3
+	|| ldw	.d2t2	*+B4[3], B3
+	;; Base registers are loaded later
+	ldw	.d1t1	*+A4[5], A5
+	|| ldw	.d2t2	*+B4[5], B5
+	ldw	.d1t1	*+A4[6], A6
+	|| ldw	.d2t2	*+B4[6], B6
+	ldw	.d1t1	*+A4[7], A7
+	|| ldw	.d2t2	*+B4[7], B7
+	ldw	.d1t1	*+A4[8], A8
+	|| ldw	.d2t2	*+B4[8], B8
+	ldw	.d1t1	*+A4[9], A9
+	|| ldw	.d2t2	*+B4[9], B9
+	;; load PC into B10 so that it is ready for the branch
+	ldw	.d2t2	*+B4[16], B10
+	ldw	.d1t1	*+A4[11], A11
+	|| ldw	.d2t2	*+B4[11], B11
+	ldw	.d1t1	*+A4[12], A12
+	|| ldw	.d2t2	*+B4[12], B12
+	ldw	.d1t1	*+A4[13], A13
+	|| ldw	.d2t2	*+B4[13], B13
+	ldw	.d1t1	*+A4[14], A14
+	|| ldw	.d2t2	*+B4[14], B14
+	;; Loads have 4 delay slots.  Take advantage of this to restore the
+	;; scratch registers and stack pointer before the base registers
+	;; disappear.  We also need to make sure no interrupts occur,
+	;; so put the whole thing in the delay slots of a dummy branch
+	;; We can not move the ret earlier as that would cause it to occur
+	;; before the last load completes
+	b	.s1	(1f)
+	ldw	.d1t1	*+A4[4], A4
+	|| ldw	.d2t2	*+B4[4], B4
+	ldw	.d1t1	*+A4[15], A15
+	|| ldw	.d2t2	*+B4[15], B15
+	ret	.s2	B10
+	ldw	.d1t1	*+A4[10], A10
+	|| ldw	.d2t2	*+B4[10], B10
+	nop		1
+1:
+	nop		3
+.size restore_core_regs, . - restore_core_regs
+
+.macro UNWIND_WRAPPER name argreg argside
+.global \name
+.type \name, STT_FUNC
+\name:
+	# Create saved register state: flags,A0-A15,B0-B15,PC = 136 bytes.
+	# Plus 4 (rounded to 8) for saving return.
+	addk	.s2	-144, B15
+	stw	.d2t1	A0, *+B15[2]
+	stw	.d2t1	A1, *+B15[3]
+	stw	.d2t1	A2, *+B15[4]
+	stw	.d2t1	A3, *+B15[5]
+	stw	.d2t1	A4, *+B15[6]
+	stw	.d2t1	A5, *+B15[7]
+	stw	.d2t1	A6, *+B15[8]
+	stw	.d2t1	A7, *+B15[9]
+	stw	.d2t1	A8, *+B15[10]
+	stw	.d2t1	A9, *+B15[11]
+	stw	.d2t1	A10, *+B15[12]
+	stw	.d2t1	A11, *+B15[13]
+	stw	.d2t1	A12, *+B15[14]
+	stw	.d2t1	A13, *+B15[15]
+	stw	.d2t1	A14, *+B15[16]
+	stw	.d2t1	A15, *+B15[17]
+	mv	.s1x	B15, A0
+	addk	.s1	144, A0
+	stw	.d2t2	B0, *+B15[18]
+	stw	.d2t2	B1, *+B15[19]
+	stw	.d2t2	B2, *+B15[20]
+	stw	.d2t2	B3, *+B15[21]
+	stw	.d2t2	B4, *+B15[22]
+	stw	.d2t2	B5, *+B15[23]
+	stw	.d2t2	B6, *+B15[24]
+	stw	.d2t2	B7, *+B15[25]
+	stw	.d2t2	B8, *+B15[26]
+	stw	.d2t2	B9, *+B15[27]
+	stw	.d2t2	B10, *+B15[28]
+	stw	.d2t2	B11, *+B15[29]
+	stw	.d2t2	B12, *+B15[30]
+	stw	.d2t2	B13, *+B15[31]
+	stw	.d2t2	B14, *+B15[32]
+	stw	.d2t1	A0, *+B15[33]
+	stw	.d2t1	A0, *+B15[34]
+	# Zero demand saved flags
+	mvk	.s1	0, A0
+	stw	.d2t1	A0, *+B15[1]
+	# Save return address, setup additional argument and call function
+	stw	.d2t2	B3, *+B15[35]
+	add	.d\argside	B15, 4, \argreg
+	do_call	__gnu\name
+	# Restore stack and return
+	ldw	.d2t2	*+B15[35], B3
+	addk	.s2	144, B15
+	nop		3
+	ret	.s2	B3
+	nop		5
+.size \name, . - \name
+.endm
+
+UNWIND_WRAPPER _Unwind_RaiseException B4 2
+UNWIND_WRAPPER _Unwind_Resume B4 2
+UNWIND_WRAPPER _Unwind_Resume_or_Rethrow B4 2
+UNWIND_WRAPPER _Unwind_ForcedUnwind B6 2
+UNWIND_WRAPPER _Unwind_Backtrace A6 1x
diff --git a/gcc-4.9/libgcc/config/c6x/ltd.c b/gcc-4.9/libgcc/config/c6x/ltd.c
new file mode 100644
index 000000000..ca8148fcd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/ltd.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a < b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/double.h>
+
+CMPtype __c6xabi_ltd(DFtype a, DFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_D(A); FP_DECL_D(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_D(A, a);
+  FP_UNPACK_RAW_D(B, b);
+  FP_CMP_D(r, A, B, 2);
+  if (r == 2 && (FP_ISSIGNAN_D(A) || FP_ISSIGNAN_D(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r < 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/ltf.c b/gcc-4.9/libgcc/config/c6x/ltf.c
new file mode 100644
index 000000000..ab7080baa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/ltf.c
@@ -0,0 +1,47 @@
+/* Software floating-point emulation.
+   Return 1 iff a < b, 0 otherwise.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson (rth@cygnus.com) and
+		  Jakub Jelinek (jj@ultra.linux.cz).
+
+   This file is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <soft-fp/soft-fp.h>
+#include <soft-fp/single.h>
+
+CMPtype __c6xabi_ltf(SFtype a, SFtype b)
+{
+  FP_DECL_EX;
+  FP_DECL_S(A); FP_DECL_S(B);
+  CMPtype r;
+
+  FP_UNPACK_RAW_S(A, a);
+  FP_UNPACK_RAW_S(B, b);
+  FP_CMP_S(r, A, B, 2);
+  if (r == 2 && (FP_ISSIGNAN_S(A) || FP_ISSIGNAN_S(B)))
+    FP_SET_EXCEPTION(FP_EX_INVALID);
+  FP_HANDLE_EXCEPTIONS;
+
+  return r < 0;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/pr-support.c b/gcc-4.9/libgcc/config/c6x/pr-support.c
new file mode 100644
index 000000000..99f44d397
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/pr-support.c
@@ -0,0 +1,535 @@
+/* C6X ABI compliant unwinding routines
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+ 
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "unwind.h"
+
+/* We add a prototype for abort here to avoid creating a dependency on
+   target headers.  */
+extern void abort (void);
+
+typedef struct _ZSt9type_info type_info; /* This names C++ type_info type */
+
+/* Misc constants.  */
+#define R_A0 0
+#define R_A1 1
+#define R_A2 2
+#define R_A3 3
+#define R_A4 4
+#define R_A5 5
+#define R_A6 6
+#define R_A7 7
+#define R_A8 8
+#define R_A9 9
+#define R_A10 10
+#define R_A11 11
+#define R_A12 12
+#define R_A13 13
+#define R_A14 14
+#define R_A15 15
+#define R_B0 16
+#define R_B1 17
+#define R_B2 18
+#define R_B3 19
+#define R_B4 20
+#define R_B5 21
+#define R_B6 22
+#define R_B7 23
+#define R_B8 24
+#define R_B9 25
+#define R_B10 26
+#define R_B11 27
+#define R_B12 28
+#define R_B13 29
+#define R_B14 30
+#define R_B15 31
+
+#define R_SP R_B15
+#define R_PC 33
+
+#define uint32_highbit (((_uw) 1) << 31)
+
+void __attribute__((weak)) __cxa_call_unexpected(_Unwind_Control_Block *ucbp);
+
+/* Unwind descriptors.  */
+
+typedef struct
+{
+  _uw16 length;
+  _uw16 offset;
+} EHT16;
+
+typedef struct
+{
+  _uw length;
+  _uw offset;
+} EHT32;
+
+/* Calculate the address encoded by a 31-bit self-relative offset at address
+   P.  Copy of routine in unwind-arm.c.  */
+
+static inline _uw
+selfrel_offset31 (const _uw *p)
+{
+  _uw offset;
+
+  offset = *p;
+  /* Sign extend to 32 bits.  */
+  if (offset & (1 << 30))
+    offset |= 1u << 31;
+
+  return offset + (_uw) p;
+}
+
+
+/* Personality routine helper functions.  */
+
+#define CODE_FINISH (0xe7)
+
+/* Return the next byte of unwinding information, or CODE_FINISH if there is
+   no data remaining.  */
+static inline _uw8
+next_unwind_byte (__gnu_unwind_state * uws)
+{
+  _uw8 b;
+
+  if (uws->bytes_left == 0)
+    {
+      /* Load another word */
+      if (uws->words_left == 0)
+	return CODE_FINISH; /* Nothing left.  */
+      uws->words_left--;
+      uws->data = *(uws->next++);
+      uws->bytes_left = 3;
+    }
+  else
+    uws->bytes_left--;
+
+  /* Extract the most significant byte.  */
+  b = (uws->data >> 24) & 0xff;
+  uws->data <<= 8;
+  return b;
+}
+
+static void
+unwind_restore_pair (_Unwind_Context * context, int reg, _uw *ptr)
+{
+#ifdef _BIG_ENDIAN
+  _Unwind_VRS_Set (context, _UVRSC_CORE, reg, _UVRSD_UINT32, ptr + 1);
+  _Unwind_VRS_Set (context, _UVRSC_CORE, reg + 1, _UVRSD_UINT32, ptr);
+#else
+  _Unwind_VRS_Set (context, _UVRSC_CORE, reg, _UVRSD_UINT32, ptr);
+  _Unwind_VRS_Set (context, _UVRSC_CORE, reg + 1, _UVRSD_UINT32, ptr + 1);
+#endif
+}
+
+static const int
+unwind_frame_regs[13] = 
+{
+  R_A15, R_B15, R_B14, R_B13, R_B12, R_B11, R_B10, R_B3,
+  R_A14, R_A13, R_A12, R_A11, R_A10
+};
+
+static void
+pop_compact_frame (_Unwind_Context * context, _uw mask, _uw *ptr, int inc_sp)
+{
+  int size;
+  _uw test;
+  int i, regno, nregs;
+
+  size = 0;
+  nregs = __builtin_popcount (mask);
+  for (i = 0; i < 13; i++)
+    {
+      test = 1 << i;
+      if ((mask & test) == 0)
+	continue;
+
+      regno = unwind_frame_regs[12 - i];
+
+      if (i < 12 && nregs > 2
+	  && (mask & (test << 1)) != 0
+	  && unwind_frame_regs[11 - i] == regno + 1
+	  && (regno & 1) == 0)
+	{
+	  i++;
+	  nregs--;
+	}
+
+      nregs--;
+      size += 2;
+    }
+
+  if (!inc_sp)
+    ptr -= size;
+
+  /* SP points just past the end of the stack.  */
+  ptr += 2;
+  nregs = __builtin_popcount (mask);
+  for (i = 0; i < 13; i++)
+    {
+      test = 1 << i;
+      if ((mask & test) == 0)
+	continue;
+
+      regno = unwind_frame_regs[12 - i];
+
+      if (i < 12 && nregs > 2
+	  && (mask & (test << 1)) != 0
+	  && unwind_frame_regs[11 - i] == regno + 1
+	  && (regno & 1) == 0)
+	{
+	  /* Register pair.  */
+	  unwind_restore_pair (context, regno, ptr);
+	  i++;
+	  nregs--;
+	}
+      else
+	{
+	  /* Single register with padding.  */
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, regno, _UVRSD_UINT32, ptr);
+	}
+
+      nregs--;
+      ptr += 2;
+    }
+
+  ptr -= 2;
+  if ((mask & (1 << 11)) == 0)
+    _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+}
+
+static void
+pop_frame (_Unwind_Context * context, _uw mask, _uw *ptr, int inc_sp)
+{
+  int i;
+  int regno;
+  int nregs;
+
+  nregs = __builtin_popcount (mask);
+
+  if (!inc_sp)
+    ptr -= nregs;
+  else if (nregs & 1)
+    ptr++;
+
+  ptr++;
+  for (i = 0; i < 13; i++)
+    {
+      if ((mask & (1 << i)) == 0)
+	continue;
+      regno = unwind_frame_regs[12 - i];
+      if (i < 12 && unwind_frame_regs[11 - i] == (regno + 1)
+	  && (mask & (1 << (i + 1))) != 0
+	  && (((_uw)ptr) & 4) == 0
+	  && (regno & 1) == 0)
+	{
+	  unwind_restore_pair (context, regno, ptr);
+	  i++;
+	  ptr += 2;
+	}
+      else
+	{
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, regno, _UVRSD_UINT32,
+			   ptr);
+	  ptr++;
+	}
+    }
+
+  ptr--;
+  if ((mask & (1 << 11)) == 0)
+    _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+}
+
+/* Unwind a 24-bit encoded frame.  */
+_Unwind_Reason_Code
+__gnu_unwind_24bit (_Unwind_Context * context, _uw data, int compact)
+{
+  _uw offset;
+  _uw mask;
+  _uw *ptr;
+  _uw tmp;
+  int ret_reg = unwind_frame_regs[data & 0xf];
+
+  if (ret_reg != R_B3)
+    {
+      _Unwind_VRS_Get (context, _UVRSC_CORE, unwind_frame_regs[data & 0xf],
+		       _UVRSD_UINT32, &tmp);
+      _Unwind_VRS_Set (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, &tmp);
+    }
+
+  mask = (data >> 4) & 0x1fff;
+
+  offset = (data >> 17) & 0x7f;
+  if (offset == 0x7f)
+    _Unwind_VRS_Get (context, _UVRSC_CORE, R_A15, _UVRSD_UINT32, &ptr);
+  else
+    {
+      _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+      ptr += offset * 2;
+    }
+
+
+  if (compact)
+    pop_compact_frame (context, mask, ptr, offset != 0x7f);
+  else
+    pop_frame (context, mask, ptr, offset != 0x7f);
+
+  _Unwind_VRS_Get (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, &tmp);
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &tmp);
+
+  return _URC_OK;
+}
+
+static void
+unwind_pop_rts (_Unwind_Context * context)
+{
+  _uw *ptr;
+
+  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+#ifdef _BIG_ENDIAN
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, ptr + 1);
+#else
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, ptr + 2);
+#endif
+  ptr += 3;
+  unwind_restore_pair (context, R_A10, ptr);
+  ptr += 2;
+  unwind_restore_pair (context, R_B10, ptr);
+  ptr += 2;
+  unwind_restore_pair (context, R_A12, ptr);
+  ptr += 2;
+  unwind_restore_pair (context, R_B12, ptr);
+  ptr += 2;
+  unwind_restore_pair (context, R_A14, ptr);
+  ptr += 2;
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_B14, _UVRSD_UINT32, ptr);
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+  /* PC will be set by implicit RETURN opcode.  */
+}
+
+/* Execute the unwinding instructions described by UWS.  */
+_Unwind_Reason_Code
+__gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
+{
+  _uw op;
+  int inc_sp;
+  _uw reg;
+  _uw *ptr;
+
+  inc_sp = 1;
+  for (;;)
+    {
+      op = next_unwind_byte (uws);
+      if (op == CODE_FINISH)
+	{
+	  /* Drop out of the loop.  */
+	  break;
+	}
+      if ((op & 0xc0) == 0)
+	{
+	  /* sp += (imm6 << 3) + 8.  */
+	  _uw offset;
+
+	  offset = ((op & 0x3f) << 3) + 8;
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  reg += offset;
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+
+      if (op == 0xd2)
+	{
+	  /* vsp = vsp + 0x204 + (uleb128 << 2).  */
+	  int shift;
+
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  op = next_unwind_byte (uws);
+	  shift = 3;
+	  while (op & 0x80)
+	    {
+	      reg += ((op & 0x7f) << shift);
+	      shift += 7;
+	      op = next_unwind_byte (uws);
+	    }
+	  reg += ((op & 0x7f) << shift) + 0x408;
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+
+      if ((op & 0xe0) == 0x80)
+	{
+	  /* POP bitmask */
+	  _uw mask = ((op & 0x1f) << 8) | next_unwind_byte (uws);
+
+	  if (mask == 0)
+	    {
+	      /* CANTUNWIND */
+	      return _URC_FAILURE;
+	    }
+
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+	  pop_frame (context, mask, ptr, inc_sp);
+	  continue;
+	}
+
+      if ((op & 0xe0) == 0xa0)
+	{
+	  /* POP bitmask (compact) */
+	  _uw mask = ((op & 0x1f) << 8) | next_unwind_byte (uws);
+
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+	  pop_compact_frame (context, mask, ptr, inc_sp);
+	  continue;
+	}
+
+      if ((op & 0xf0) == 0xc0)
+	{
+	  /* POP registers */
+	  int nregs = op & 0xf;
+
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &ptr);
+	  while (nregs > 0)
+	    {
+	      op = next_unwind_byte (uws);
+	      if ((op >> 4) != 0xf)
+		{
+		  reg = unwind_frame_regs[op >> 4];
+		  _Unwind_VRS_Set (context, _UVRSC_CORE, reg, _UVRSD_UINT32,
+				   ptr);
+		  nregs--;
+		}
+	      ptr--;
+	      if ((op & 0xf) != 0xf)
+		{
+		  reg = unwind_frame_regs[op & 0xf];
+		  _Unwind_VRS_Set (context, _UVRSC_CORE, reg, _UVRSD_UINT32,
+				   ptr);
+		  nregs--;
+		}
+	      ptr--;
+	    }
+
+	  continue;
+	}
+
+      if (op == 0xd0)
+	{
+	  /* MV FP, SP */
+	  inc_sp = 0;
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, R_A15, _UVRSD_UINT32, &reg);
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+
+      if (op == 0xd1)
+	{
+	  /* __cx6abi_pop_rts */
+	  unwind_pop_rts (context);
+	  break;
+	}
+
+      if ((op & 0xf0) == 0xe0)
+	{
+	  /* B3 = reg.  RETURN case alreadh handled above.  */
+	  int regno = unwind_frame_regs[op & 0xf];
+
+	  _Unwind_VRS_Get (context, _UVRSC_CORE, regno, _UVRSD_UINT32, &reg);
+	  _Unwind_VRS_Set (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, &reg);
+	  continue;
+	}
+      
+      /* Reserved.  */
+      return _URC_FAILURE;
+    }
+
+  /* Implicit RETURN.  */
+  _Unwind_VRS_Get (context, _UVRSC_CORE, R_B3, _UVRSD_UINT32, &reg);
+  _Unwind_VRS_Set (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &reg);
+  return _URC_OK;
+}
+
+
+/* Execute the unwinding instructions associated with a frame.  UCBP and
+   CONTEXT are the current exception object and virtual CPU state
+   respectively.  */
+
+_Unwind_Reason_Code
+__gnu_unwind_frame (_Unwind_Control_Block * ucbp, _Unwind_Context * context)
+{
+  _uw *ptr;
+  __gnu_unwind_state uws;
+
+  ptr = (_uw *) ucbp->pr_cache.ehtp;
+  /* Skip over the personality routine address.  */
+  ptr++;
+  /* Setup the unwinder state.  */
+  uws.data = (*ptr) << 8;
+  uws.next = ptr + 1;
+  uws.bytes_left = 3;
+  uws.words_left = ((*ptr) >> 24) & 0xff;
+
+  return __gnu_unwind_execute (context, &uws);
+}
+
+/* Data segment base pointer corresponding to the function catching
+   the exception.  */
+
+_Unwind_Ptr
+_Unwind_GetDataRelBase (_Unwind_Context *context)
+{
+  return _Unwind_GetGR (context, R_B14);
+}
+
+/* This should never be used.  */
+
+_Unwind_Ptr
+_Unwind_GetTextRelBase (_Unwind_Context *context __attribute__ ((unused)))
+{
+  abort ();
+}
+
+/* Only used by gcc personality routines, so can rely on a value they hid
+   there earlier.  */
+_Unwind_Ptr
+_Unwind_GetRegionStart (_Unwind_Context *context)
+{
+  _Unwind_Control_Block *ucbp;
+ 
+  ucbp = (_Unwind_Control_Block *) _Unwind_GetGR (context, UNWIND_POINTER_REG);
+  return (_Unwind_Ptr) ucbp->pr_cache.fnstart;
+}
+
+void *
+_Unwind_GetLanguageSpecificData (_Unwind_Context *context)
+{
+  _Unwind_Control_Block *ucbp;
+  _uw *ptr;
+ 
+  ucbp = (_Unwind_Control_Block *) _Unwind_GetGR (context, UNWIND_POINTER_REG);
+  ptr = (_uw *) ucbp->pr_cache.ehtp;
+  /* Skip the personality routine address.  */
+  ptr++;
+  /* Skip the unwind opcodes.  */
+  ptr += (((*ptr) >> 24) & 0xff) + 1;
+
+  return ptr;
+}
diff --git a/gcc-4.9/libgcc/config/c6x/sfp-machine.h b/gcc-4.9/libgcc/config/c6x/sfp-machine.h
new file mode 100644
index 000000000..9b7a02e9f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/sfp-machine.h
@@ -0,0 +1,124 @@
+/* Soft-FP definitions for TI C6X.
+   Copyright (C) 2010-2014 Free Software Foundation, Inc.
+
+   This files is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   This file is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with GCC; see the file COPYING.LIB.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_H		((_FP_QNANBIT_H << 1) - 1)
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_H		0
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined _BIG_ENDIAN
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
+/* Rename helper functions to the names specified in the C6000 ELF ABI.  */
+#define __fixdfsi     __c6xabi_fixdi
+#define __fixsfsi     __c6xabi_fixfi
+#define __floatsidf   __c6xabi_fltid
+#define __floatunsidf __c6xabi_fltud
+#define __floatsisf   __c6xabi_fltif
+#define __floatunsisf __c6xabi_fltuf
+#define __truncdfsf2  __c6xabi_cvtdf
+#define __extendsfdf2 __c6xabi_cvtfd
+#define __adddf3      __c6xabi_addd
+#define __subdf3      __c6xabi_subd
+#define __muldf3      __c6xabi_mpyd
+#define __divdf3      __c6xabi_divd
+#define __negdf2      __c6xabi_negd
+#define __absdf2      __c6xabi_absd
+#define __addsf3      __c6xabi_addf
+#define __subsf3      __c6xabi_subf
+#define __mulsf3      __c6xabi_mpyf
+#define __divsf3      __c6xabi_divf
+#define __negsf2      __c6xabi_negf
+#define __abssf2      __c6xabi_absf
+#define __lesf2       __c6xabi_cmpf
+#define __ledf2       __c6xabi_cmpd
+#define __ltsf2       __gnu_ltsf2
+#define __ltdf2       __gnu_ltdf2
+#define __gesf2       __gnu_gesf2
+#define __gedf2       __gnu_gedf2
+#define __gtsf2       __gnu_gtsf2
+#define __gtdf2       __gnu_gtdf2
+#define __eqsf2       __gnu_eqsf2
+#define __eqdf2       __gnu_eqdf2
+#define __nesf2       __c6xabi_neqf
+#define __nedf2       __c6xabi_neqd
+#define __unordsf2    __c6xabi_unordf
+#define __unorddf2    __c6xabi_unordd
diff --git a/gcc-4.9/libgcc/config/c6x/t-elf b/gcc-4.9/libgcc/config/c6x/t-elf
new file mode 100644
index 000000000..338571d1b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/t-elf
@@ -0,0 +1,40 @@
+# Cannot use default rules due to $(CRTSTUFF_T_CFLAGS).
+CUSTOM_CRTIN = yes
+
+LIB1ASMSRC = c6x/lib1funcs.S
+LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _udivmodsi4 _divmodsi4
+LIB1ASMFUNCS += _strasgi _strasgi_64plus _clzsi2 _clzdi2 _clz
+LIB1ASMFUNCS += _push_rts _pop_rts _call_stub
+
+LIB2FUNCS_EXCLUDE = _cmpdi2 _ucmpdi2 _gcc_bcmp _eprintf _clzsi _clzdi
+
+LIB2ADD += $(srcdir)/config/c6x/gef.c \
+           $(srcdir)/config/c6x/gtf.c \
+           $(srcdir)/config/c6x/lef.c \
+           $(srcdir)/config/c6x/ltf.c \
+           $(srcdir)/config/c6x/eqf.c \
+           $(srcdir)/config/c6x/ged.c \
+           $(srcdir)/config/c6x/gtd.c \
+           $(srcdir)/config/c6x/led.c \
+           $(srcdir)/config/c6x/ltd.c \
+           $(srcdir)/config/c6x/eqd.c
+
+# Avoid failures when the user's GOT becomes too large.
+HOST_LIBGCC2_CFLAGS += -msdata=none
+
+LIB2ADDEH = $(srcdir)/config/c6x/unwind-c6x.c \
+  $(srcdir)/config/c6x/libunwind.S \
+  $(srcdir)/config/c6x/pr-support.c $(srcdir)/unwind-c.c
+
+# Assemble startup files.
+crti.o: $(srcdir)/config/c6x/crti.S
+	$(crt_compile) -c $(CRTSTUFF_T_CFLAGS) $<
+
+crtn.o: $(srcdir)/config/c6x/crtn.S
+	$(crt_compile) -c $(CRTSTUFF_T_CFLAGS) $<
+
+# Avoid failures when the user's GOT becomes too large.
+CRTSTUFF_T_CFLAGS = -msdata=none
+CRTSTUFF_T_CFLAGS_S = -msdata=none
+
+SHLIB_MAPFILES += $(srcdir)/config/c6x/libgcc-eabi.ver
diff --git a/gcc-4.9/libgcc/config/c6x/t-uclinux b/gcc-4.9/libgcc/config/c6x/t-uclinux
new file mode 100644
index 000000000..72a170a57
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/t-uclinux
@@ -0,0 +1,3 @@
+HOST_LIBGCC2_CFLAGS += -msdata=none
+
+CRTSTUFF_T_CFLAGS += $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/c6x/unwind-c6x.c b/gcc-4.9/libgcc/config/c6x/unwind-c6x.c
new file mode 100644
index 000000000..bf5155c00
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/unwind-c6x.c
@@ -0,0 +1,224 @@
+/* C6X EABI compliant unwinding routines.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "unwind.h"
+
+/* Misc constants.  */
+#define NUM_SAVED_REGS 32
+#define R_B0 16
+#define R_B3 (R_B0 + 3)
+#define R_B15 (R_B0 + 15)
+#define R_SP R_B15
+#define R_LR R_B3
+#define R_PC 33
+
+#define VRS_PC(vrs) ((vrs)->core.pc)
+#define VRS_SP(vrs) ((vrs)->core.reg[R_SP])
+#define VRS_RETURN(vrs) ((vrs)->core.reg[R_B3])
+
+struct core_regs
+{
+  _uw reg[NUM_SAVED_REGS];
+  _uw pc;
+};
+
+typedef struct
+{
+  /* The first fields must be the same as a phase2_vrs.  */
+  _uw demand_save_flags; /* Currently always zero.  */
+  struct core_regs core;
+  _uw prev_sp; /* Only valid during forced unwinding.  */
+} phase1_vrs;
+
+/* This must match the structure created by the assembly wrappers.  */
+typedef struct
+{
+  _uw demand_save_flags;
+  struct core_regs core;
+} phase2_vrs;
+
+/* Coprocessor register state manipulation functions.  */
+
+/* Restore coprocessor state after phase1 unwinding.  */
+static void
+restore_non_core_regs (phase1_vrs * vrs __attribute__((unused)))
+{
+}
+
+#include "unwind-arm-common.inc"
+
+/* ABI defined personality routines.  */
+extern _Unwind_Reason_Code __c6xabi_unwind_cpp_pr0 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *);// __attribute__((weak));
+extern _Unwind_Reason_Code __c6xabi_unwind_cpp_pr1 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+extern _Unwind_Reason_Code __c6xabi_unwind_cpp_pr2 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+extern _Unwind_Reason_Code __c6xabi_unwind_cpp_pr3 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+extern _Unwind_Reason_Code __c6xabi_unwind_cpp_pr4 (_Unwind_State,
+    _Unwind_Control_Block *, _Unwind_Context *) __attribute__((weak));
+
+/* ABI defined routine to store a virtual register to memory.  */
+
+_Unwind_VRS_Result _Unwind_VRS_Get (_Unwind_Context *context,
+				    _Unwind_VRS_RegClass regclass,
+				    _uw regno,
+				    _Unwind_VRS_DataRepresentation representation,
+				    void *valuep)
+{
+  phase1_vrs *vrs = (phase1_vrs *) context;
+
+  switch (regclass)
+    {
+    case _UVRSC_CORE:
+      if (representation != _UVRSD_UINT32)
+	return _UVRSR_FAILED;
+      if (regno == R_PC)
+	{
+	  *(_uw *) valuep = vrs->core.pc;
+	  return _UVRSR_OK;
+	}
+      if (regno >= NUM_SAVED_REGS)
+	return _UVRSR_FAILED;
+      *(_uw *) valuep = vrs->core.reg[regno];
+      return _UVRSR_OK;
+
+    default:
+      return _UVRSR_FAILED;
+    }
+}
+
+
+/* ABI defined function to load a virtual register from memory.  */
+
+_Unwind_VRS_Result _Unwind_VRS_Set (_Unwind_Context *context,
+				    _Unwind_VRS_RegClass regclass,
+				    _uw regno,
+				    _Unwind_VRS_DataRepresentation representation,
+				    void *valuep)
+{
+  phase1_vrs *vrs = (phase1_vrs *) context;
+
+  switch (regclass)
+    {
+    case _UVRSC_CORE:
+      if (representation != _UVRSD_UINT32)
+	return _UVRSR_FAILED;
+      if (regno == R_PC)
+	{
+	  vrs->core.pc = *(_uw *) valuep;
+	  return _UVRSR_OK;
+	}
+      if (regno >= NUM_SAVED_REGS)
+	return _UVRSR_FAILED;
+
+      vrs->core.reg[regno] = *(_uw *) valuep;
+      return _UVRSR_OK;
+
+    default:
+      return _UVRSR_FAILED;
+    }
+}
+
+
+/* Core unwinding functions.  */
+
+/* Calculate the address encoded by a 31-bit self-relative offset at address
+   P.  */
+static inline _uw
+selfrel_offset31 (const _uw *p)
+{
+  _uw offset;
+
+  offset = *p << 1;
+  return offset + (_uw) p;
+}
+
+
+static _uw
+__gnu_unwind_get_pr_addr (int idx)
+{
+  switch (idx)
+    {
+    case 0:
+      return (_uw) &__c6xabi_unwind_cpp_pr0;
+
+    case 1:
+      return (_uw) &__c6xabi_unwind_cpp_pr1;
+
+    case 2:
+      return (_uw) &__c6xabi_unwind_cpp_pr2;
+
+    case 3:
+      return (_uw) &__c6xabi_unwind_cpp_pr3;
+
+    case 4:
+      return (_uw) &__c6xabi_unwind_cpp_pr4;
+
+    default:
+       return 0;
+    }
+}
+
+
+/* ABI defined personality routine entry points.  */
+
+_Unwind_Reason_Code
+__c6xabi_unwind_cpp_pr0 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 0);
+}
+
+_Unwind_Reason_Code
+__c6xabi_unwind_cpp_pr1 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 1);
+}
+
+_Unwind_Reason_Code
+__c6xabi_unwind_cpp_pr2 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 2);
+}
+
+_Unwind_Reason_Code
+__c6xabi_unwind_cpp_pr3 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 3);
+}
+
+_Unwind_Reason_Code
+__c6xabi_unwind_cpp_pr4 (_Unwind_State state,
+			_Unwind_Control_Block *ucbp,
+			_Unwind_Context *context)
+{
+  return __gnu_unwind_pr_common (state, ucbp, context, 4);
+}
diff --git a/gcc-4.9/libgcc/config/c6x/unwind-c6x.h b/gcc-4.9/libgcc/config/c6x/unwind-c6x.h
new file mode 100644
index 000000000..258a035b8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/c6x/unwind-c6x.h
@@ -0,0 +1,70 @@
+/* Header file for the C6X EABI unwinder
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Language-independent unwinder header public defines.  This contains both
+   ABI defined objects, and GNU support routines.  */
+
+#ifndef UNWIND_C6X_H
+#define UNWIND_C6X_H
+
+/* Not really the ARM EABI, but pretty close.  */
+#include "unwind-arm-common.h"
+
+#define UNWIND_STACK_REG 31
+/* Use A0 as a scratch register within the personality routine.  */
+#define UNWIND_POINTER_REG 0
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  _Unwind_Reason_Code __gnu_unwind_24bit (_Unwind_Context *, _uw, int);
+
+  /* Decode an EH table reference to a typeinfo object.  */
+  static inline _Unwind_Word
+  _Unwind_decode_typeinfo_ptr (_Unwind_Ptr base, _Unwind_Word ptr)
+    {
+      _Unwind_Word tmp;
+
+      tmp = *(_Unwind_Word *) ptr;
+      /* Zero values are always NULL.  */
+      if (!tmp)
+	return 0;
+
+      /* SB-relative indirect.  Propagate the bottom 2 bits, which can
+	 contain referenceness information in gnu unwinding tables.  */
+      tmp += base;
+      tmp = *(_Unwind_Word *) (tmp & ~(_Unwind_Word)3) | (tmp & 3);
+      return tmp;
+    }
+
+#define _Unwind_GetIP(context) \
+  (_Unwind_GetGR (context, 33))
+
+
+#define _Unwind_SetIP(context, val) \
+  _Unwind_SetGR (context, 33, val)
+
+#ifdef __cplusplus
+}   /* extern "C" */
+#endif
+
+#endif /* defined UNWIND_ARM_H */
diff --git a/gcc-4.9/libgcc/config/cr16/crti.S b/gcc-4.9/libgcc/config/cr16/crti.S
new file mode 100644
index 000000000..00defab6f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/crti.S
@@ -0,0 +1,54 @@
+# Specialized code needed to support construction and destruction of
+# file-scope objects in C++ and Java code, and to support exception handling.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by KPIT Cummins Infosystems Limited.
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+/* This file just supplies function prologues for the .init and .fini
+   sections.  It is linked in before crtbegin.o.  */
+
+	.ident  "GNU C crti.o"
+
+	.section .init
+	.globl  __init
+	.type   __init,@function
+__init:
+#if defined (__ID_SHARED_LIB__)
+	push	$2, r12, ra
+	movd    $__current_shared_library_r12_offset_, (r1,r0)
+	loadd   [r12]0(r1,r0), (r12)
+#else
+        push	ra
+#endif
+
+	.section .fini
+	.globl  __fini
+	.type   __fini,@function
+__fini:
+#if defined (__ID_SHARED_LIB__)
+	push	$2, r12, ra
+	movd    $__current_shared_library_r12_offset_, (r1,r0)
+	loadd   [r12]0(r1,r0), (r12)
+#else
+        push	ra
+#endif
+	
diff --git a/gcc-4.9/libgcc/config/cr16/crtlibid.S b/gcc-4.9/libgcc/config/cr16/crtlibid.S
new file mode 100644
index 000000000..618516501
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/crtlibid.S
@@ -0,0 +1,28 @@
+# Provide a weak definition of the library ID, for the benefit of certain
+# configure scripts.	 
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by KPIT Cummins Infosystems Limited.
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.ident  "GNU C crtlibid.o"
+
+.weak __current_shared_library_r12_offset_
+.set __current_shared_library_r12_offset_, 0
diff --git a/gcc-4.9/libgcc/config/cr16/crtn.S b/gcc-4.9/libgcc/config/cr16/crtn.S
new file mode 100644
index 000000000..c8d4c12e7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/crtn.S
@@ -0,0 +1,44 @@
+# Specialized code needed to support construction and destruction of
+# file-scope objects in C++ and Java code, and to support exception handling.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by KPIT Cummins Infosystems Limited.
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+/* This file supplies function epilogues for the .init and .fini sections.
+  It is linked in after all other files.  */
+
+	.ident  "GNU C crtn.o"
+
+	.section .init
+#if defined (__ID_SHARED_LIB__)
+	popret	$2, r12, ra
+#else
+	popret	ra
+#endif
+
+	.section .fini
+#if defined (__ID_SHARED_LIB__)
+	popret	$2, r12, ra
+#else
+	popret	ra
+#endif
+
diff --git a/gcc-4.9/libgcc/config/cr16/divmodhi3.c b/gcc-4.9/libgcc/config/cr16/divmodhi3.c
new file mode 100644
index 000000000..68869b07a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/divmodhi3.c
@@ -0,0 +1,115 @@
+/* Libgcc Target specific implementation - Emulating div and mod.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by KPIT Cummins Infosystems Limited.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+	 
+
+/* Emulate the division and modulus operation.  */
+
+unsigned short
+udivmodhi4 (unsigned short num, unsigned short den, short modwanted)
+{
+  unsigned short bit = 1;
+  unsigned short res = 0;
+
+  while (den < num && bit && !(den & (1 << 15)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+
+  if (modwanted)
+    return num;
+  return res;
+}
+
+short
+__divhi3 (short a, short b)
+{
+  short neg = 0;
+  short res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodhi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+short
+__modhi3 (short a, short b)
+{
+  short neg = 0;
+  short res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodhi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+short
+__udivhi3 (short a, short b)
+{
+  return udivmodhi4 (a, b, 0);
+}
+
+short
+__umodhi3 (short a, short b)
+{
+  return udivmodhi4 (a, b, 1);
+}
diff --git a/gcc-4.9/libgcc/config/cr16/lib1funcs.S b/gcc-4.9/libgcc/config/cr16/lib1funcs.S
new file mode 100644
index 000000000..def859231
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/lib1funcs.S
@@ -0,0 +1,563 @@
+/* Libgcc Target specific implementation.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by KPIT Cummins Infosystems Limited.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3, or (at your option) any later
+   version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+   WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef  L_mulsi3
+	.text
+	.align  4
+	.globl  ___mulsi3
+___mulsi3:
+	movw    r4,r0
+	movw    r2,r1
+	/* Extended multiplication between the 2 lower words */
+	muluw   r1,(r1,r0)
+
+	/* Multiply the lower word of each parameter  */  
+	mulw    r2,r5   
+    
+	/* With the higher word of the other  */
+	mulw    r3,r4     
+  
+	/* Add products to the higher part of the final result  */
+	addw    r4,r1       
+	addw    r5,r1
+	jump    (ra)
+#endif
+
+#ifdef L_divdi3
+	.text
+	.align 4
+	.globl ___divdi3
+
+___divdi3:
+	push	$4, r7, ra
+
+	/* Param #1 Long Long low bit first */
+	loadd   12(sp), (r1, r0)
+	loadd   16(sp), (r3, r2)
+
+	/* Param #2 Long Long low bit first */
+	loadd   20(sp), (r5, r4)
+	loadd   24(sp), (r7, r6)
+	
+	/* Set neg to 0 */
+	movw $0, r10
+	
+	subd $16, (sp)
+
+	/* Compare if param1 is greater than 0 */	
+	cmpw $0, r3
+	ble L4
+
+	/* Invert param1 and neg */
+	movd $-1, (r9, r8) 	/* Temp set to FFFFFFFF */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of param 1 with temp */
+	xord (r9, r8), (r3, r2)	/* Xor high bits of param 1 with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of param 1 */
+	xorw $1, r10		/* Invert neg */
+	bcc L4			/* If no carry occurred go to L4 */
+	addd $1, (r3, r2)	/* Add 1 to high bits of param 1 */
+
+L4:	stord (r1, r0), 0(sp)
+	stord (r3, r2), 4(sp)
+	
+	/* Compare if param2 is greater than 0 */	
+	cmpw $0, r7
+	ble L5
+
+	/* Invert param2 and neg */
+	movd $-1, (r9, r8)	/* Temp set to FFFFFFFF */
+	xord (r9, r8), (r5, r4)	/* Xor low bits of param 2 with temp */
+	xord (r9, r8), (r7, r6)	/* Xor high bits of param 2 with temp */
+	addd $1, (r5, r4)	/* Add 1 to low bits of param 2 */
+	xorw $1, r10		/* Invert neg */
+	bcc L5			/* If no carry occurred go to L5 */
+	addd $1, (r7, r6)	/* Add 1 to high bits of param 2 */
+
+L5:	stord (r5, r4), 8(sp)
+	stord (r7, r6), 12(sp)
+	movw $0, r2
+
+	/* Call udivmoddi3 */
+#ifdef __PIC__
+	loadd	___udivmoddi3@cGOT(r12), (r1,r0)
+	jal	(r1,r0)
+#else
+	bal (ra), ___udivmoddi3
+#endif
+
+	/* If (neg) */
+	addd	$16, (sp)
+	cmpw $0, r10		/* Compare 0 with neg */
+	beq Lexit__
+	
+	/* Neg = -Neg */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of ures with temp */
+	xord (r9, r8), (r3, r2)	/* Xor high bits of ures with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of ures */
+	bcc Lexit__
+	addd $1, (r3, r2)	/* Add 1 to high bit of ures */
+
+Lexit__:
+#  ifdef __ID_SHARED_LIB__
+	pop	$2, r12
+#  endif
+	popret $4, r7, ra
+#endif
+
+#ifdef L_lshrdi3
+	.text
+	.align 4
+	.globl ___lshrdi3
+
+___lshrdi3:
+	push	$3, r7
+
+	/* Load parameters from stack in this order */
+	movw r2, r6		/* Number of shifts */
+	loadd	6(sp), (r1, r0)	/* Low bits */
+	loadd	10(sp), (r3, r2)/* High bits */
+
+	xorw $-1, r6		/* Invert number of shifts */
+	addw $1, r6		/* Add 1 by number of shifts */
+
+	movw r6, r7		/* Copy number of shifts */
+
+	tbit $15, r6		/* Test if number is negative */
+	bfs L2			/* If negative jump to L2 */
+
+	movd (r1, r0), (r9, r8)	/* Copy low bits */
+
+	subw $32, r7		/* Calc how many bits will overflow */
+	/* Shift the temp low bit to the right to see the overflowing bits  */
+	lshd r7, (r9, r8)	
+
+	cmpw $32, r6		/* If number of shifts is higher than 31 */
+	blt L1			/* Shift by moving */
+
+	lshd r6, (r3, r2)	/* Shift high bits */
+	lshd r6, (r1, r0)	/* Shift low bits */
+	addd (r9, r8), (r3, r2)	/* Add overflow to the high bits */
+	popret	$3, r7		/* Return */
+
+L1:	movd $0, (r1, r0)	/* Reset low bit */
+	movd (r9, r8), (r3, r2)	/* Add the overflow from the low bit */
+	popret	$3, r7		/* Return */
+
+L2:	movd (r3, r2), (r9, r8)	/* Copy high bits */
+
+	addw $32, r7		/* Calc how many bits will overflow */
+	/* Shift the temp low bit to the left to see the overflowing bits  */
+	lshd r7, (r9, r8)	
+
+	cmpw $-32, r6		/* If number of shifts is lower than -31 */
+	bgt L3			/* Shift by moving */
+
+	lshd r6, (r1, r0)	/* Shift low bits */
+	lshd r6, (r3, r2)	/* Shift high bits */
+	addd (r9, r8), (r1, r0)	/* Add overflow to the low bits */
+	popret	$3, r7		/* Return */
+	
+L3:	movd $0, (r3, r2)	/* Reset the high bit */
+	movd (r9, r8), (r1, r0)	/* Add the overflow from the high bit */
+	popret	$3, r7		/* Return */
+#endif
+
+#ifdef L_moddi3
+	.text
+	.align 4
+	.globl ___moddi3
+
+___moddi3:
+	push	$4, r7, ra
+
+	/* Param #1 Long Long low bit first */
+	loadd	12(sp), (r1, r0)
+	loadd	16(sp), (r3, r2)
+
+	/* Param #2 Long Long low bit first */
+	loadd	20(sp), (r5, r4)
+	loadd	24(sp), (r7, r6)
+	
+	subd	$18, (sp)
+
+	/* Set neg to 0 */
+	storw $0, 16(sp)
+	
+	movd	$-1, (r9, r8) 	/* Temp set to FFFFFFFF */
+
+	/* Compare if param1 is greater than 0 */	
+	cmpw $0, r3
+	ble L4
+
+	/* Invert param1 and neg */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of param 1 with temp */
+	xord (r9, r8), (r3, r2)	/* Xor high bits of param 1 with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of param 1 */
+	storw $1, 16(sp)
+	bcc L4			/* If no carry occurred go to L4 */
+	addd $1, (r3, r2)	/* Add 1 to high bits of param 1 */
+
+L4:	stord (r1, r0), 0(sp)
+	stord (r3, r2), 4(sp)
+	
+	/* Compare if param2 is greater than 0 */	
+	cmpw $0, r7
+	ble L5
+
+	/* Invert param2 and neg */
+	xord (r9, r8), (r5, r4)	/* Xor low bits of param 2 with temp */
+	xord (r9, r8), (r7, r6)	/* Xor high bits of param 2 with temp */
+	addd $1, (r5, r4)	/* Add 1 to low bits of param 2 */
+	bcc L5			/* If no carry occurred go to L5 */
+	addd $1, (r7, r6)	/* Add 1 to high bits of param 2 */
+
+L5:	stord (r5, r4), 8(sp)
+	stord (r7, r6), 12(sp)
+	movw $1, r2
+
+	/* Call udivmoddi3 */
+#ifdef __PIC__
+	loadd	___udivmoddi3@cGOT(r12), (r1,r0)
+	jal	(r1,r0)
+#else
+	bal (ra), ___udivmoddi3
+#endif
+
+	/* If (neg) */
+	loadw 16(sp), r10	/* Load neg from stack */
+	addd	$18, (sp)
+	cmpw $0, r10		/* Compare 0 with neg */
+	beq	Lexit__
+	
+	/* Neg = -Neg */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of ures with temp */
+	xord (r9, r8), (r3, r2)	/* Xor high bits of ures with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of ures */
+	bcc	Lexit__
+	addd $1, (r3, r2)	/* Add 1 to high bit of ures */
+Lexit__:
+#  ifdef __ID_SHARED_LIB__
+	pop	$2, r12
+#  endif
+	popret	$4, r7, ra
+#endif
+
+#ifdef L_muldi3
+	.text
+	.align 4
+	.globl ___muldi3
+
+___muldi3:
+	push	$2, r13
+	push	$7, r7
+
+	/* Param #1 Long Long low bit first */
+	loadd   18(sp), (r1, r0)
+	loadd   22(sp), (r3, r2)
+
+	/* Param #2 Long Long low bit first */
+	loadd   26(sp), (r5, r4)
+	loadd   30(sp), (r7, r6)
+
+	/* Clear r13, r12 */	
+	movd $0, (r12)	
+	movd $0, (r13)
+
+	/* Set neg */
+	movw $0, r10
+
+	/* Compare if param1 is greater than 0 */	
+	cmpw $0, r3
+	ble L1
+
+	/* Invert param1 and neg */
+	movd $-1, (r9, r8) 	/* Temp set to FFFFFFFF */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of param 1 with temp */
+	xord (r9, r8), (r3, r2)	/* Xor high bits of param 1 with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of param 1 */
+	xorw $1, r10		/* Invert neg */
+	bcc L1			/* If no carry occurred go to L1 */
+	addd $1, (r3, r2)	/* Add 1 to high bits of param 1 */
+
+L1:	/* Compare if param2 is greater than 0 */	
+	cmpw $0, r7
+	ble L2	
+	
+	/* Invert param2 and neg */
+	movd $-1, (r9, r8)	/* Temp set to FFFFFFFF */
+	xord (r9, r8), (r5, r4)	/* Xor low bits of param 2 with temp */
+	xord (r9, r8), (r7, r6)	/* Xor high bits of param 2 with temp */
+	addd $1, (r5, r4)	/* Add 1 to low bits of param 2 */
+	xorw $1, r10		/* Invert neg */
+	bcc L2			/* If no carry occurred go to L2 */
+	addd $1, (r7, r6)	/* Add 1 to high bits of param 2 */
+	
+L2:	storw r10, 18(sp)	/* Store neg to stack so we can use r10 */
+
+	/* B*D */
+	/* Bl*Dl */
+	macuw r0, r4, (r12)	/* Multiply r0 and r4 and add to r12 */
+		
+	/* Bh*Dl */
+	movd $0, (r9, r8)	/* Clear r9, r8 */
+	macuw r1, r4, (r9, r8)	/* Multiply Bh*Dl and add result to (r9, r8) */
+	movw r9,  r10		/* Shift left: r9 to r10 */
+	lshd $16, (r9, r8)	/* Shift left: r8 to r9 */
+	movw $0, r11		/* Clear r11 */
+	addd (r9, r8), (r12)	/* Add (r9, r8) to r12 */
+	bcc L3			/* If no carry occurred go to L3 */
+	addd $1, (r13)		/* If carry occurred add 1 to r13 */
+
+L3:	addd (r11, r10), (r13)	/* Add (r11, r10) to r13 */
+		
+	/* Bl*Dh */
+	movd $0, (r9, r8)	/* Clear (r9, r8) */
+	macuw r0, r5, (r9, r8)	/* Multiply r0 and r5 and stor in (r9, r8) */
+	movw r9, r10		/* Shift left: r9 to r10 */
+	lshd $16, (r9, r8)	/* Shift left: r8 to r9 */
+	addd (r9, r8), (r12)	/* Add (r9, r8) to r12 */
+	bcc L4			/* If no carry occurred go to L4 */ 
+	addd $1, (r13)		/* If carry occurred add 1 to r13 */
+
+L4:	addd (r11, r10), (r13)	/* Add (r11, r10) to r13 */
+
+	/* Bh*Dh */
+	movd $0, (r9, r8)	/* Clear (r9, r8) */
+	macuw r1, r5, (r9, r8)	/* Multiply r1 and r5 and add to r13 */
+	addd (r9, r8), (r13)	/* Add (r9, r8) to result */
+
+	/* A*D */
+	/* Al*Dl */
+	movd $0, (r11, r10)	/* Clear (r11, r10) */
+	macuw r2, r4, (r11, r10)/* Multiply r2 and r4 and add to (r11, r10) */
+	
+	addd (r13), (r11, r10)	/* Copy r13 to (r11, r10) */
+
+	/* Al*Dh */
+	movd $0, (r9, r8)	/* Clear (r9, r8) */
+	macuw r2, r5, (r9, r8)	/* Multiply r2 and r5 and add to (r9, r8) */
+	addw r8, r11		/* Add r8 to r11 */
+	
+	/* Ah*Dl */
+	muluw r3, (r5, r4)	/* Multiply r3 and r4 and stor in (r5, r4) */
+	addw r4, r11		/* Add r4 to r11 */
+
+	/* B*C */
+	/* Bl*Cl */
+	movd $0, (r9, r8)	/* Clear (r9, r8) */
+	macuw r0, r6, (r9, r8)	/* Multiply r0 and r6 and add to (r9, r8) */
+	addd (r9, r8), (r11, r10)/* Add (r9, r8) to result */
+
+	/* Bl*Ch */
+	movd $0, (r9, r8)	/* Clear (r9, r8) */
+	macuw r0, r7, (r9, r8)	/* Multiply r0 and r7 and add to (r9, r8) */
+	addw r8, r11		/* Add r8 to r11 */
+
+	loadw 18(sp), r8	/* Load neg from stack */
+
+	/* Bh*Cl */
+	muluw r1, (r7, r6)	/* Multiply r1 and r6 and stor in (r7, r6) */
+	addw r6, r11		/* Add r6 to r11 */
+
+E1:	movd (r11, r10), (r3, r2)
+	movd (r12), (r1, r0)	
+
+	/* If (neg) */
+	cmpw $0, r8		/* Compare 0 with neg */
+	beq	Lexit__
+	
+	/* Neg = -Neg */
+	movd $-1, (r9, r8) 	/* Temp set to FFFFFFFF */
+	xord (r9, r8), (r1, r0)	/* Xor low bits of result with temp */
+	xord (r9, r8), (r3, r2) /* Xor high bits of result with temp */
+	addd $1, (r1, r0)	/* Add 1 to low bits of result */
+	bcc	Lexit__
+	addd $1, (r3, r2)	/* Add 1 to high bit of result */
+Lexit__:
+	pop	$7, r7
+	popret	$2, r13
+#endif
+
+#ifdef L_negdi2
+	.text
+	.align 4
+	.globl ___negdi2
+
+___negdi2:
+	/* Load parameter from the registers in this order */
+	loadd 0(sp), (r1, r0)
+	loadd 4(sp), (r3, r2)
+	
+	movd $-1, (r6, r5)	/* Set temp to FFFFFFFF */
+	xord (r6, r5), (r1, r0)	/* Xor low bits with temp */
+	xord (r6, r5), (r3, r2)	/* Xor high bits with temp */
+	addd $1, (r1, r0)	/* Add one */
+	jcc (ra)
+	addd $1, (r3, r2)	/* Add the carry to the high bits */
+	jump (ra)
+#endif
+
+#ifdef L_udivdi3
+	.text
+	.align 4
+	.globl ___udivdi3
+
+___udivdi3:
+	movw $0, r2
+	br ___udivmoddi3
+#endif
+
+#ifdef L_udivmoddi3
+	.text
+	.align 4
+	.globl ___udivmoddi3
+
+___udivmoddi3:
+	push	$2, r13
+	push	$7, r7
+
+	/* Param #1 Long Long low bit first */
+	loadd	18(sp), (r1, r0)
+	storw	r2, 18(sp)	/* Store modulo on stack */
+	loadd	22(sp), (r3, r2)
+
+	/* Param #2 Long Long low bit first */
+	loadd	26(sp), (r5, r4)
+	loadd	30(sp), (r7, r6)
+
+	/* Set ures to 0 */
+	movd $0, (r13)
+	movd $0, (r12)
+	
+	cmpd (r12), (r5, r4)
+	beq LE
+
+L5:	movd $1, (r9, r8)	/* Store 1 in low bits from bit */
+	movd $0, (r11, r10)	/* Store 0 in high bits from bit */
+	
+L6:	/* While (den < num && (!den & (1LL<<63))) */
+	/* Compare high bits from param 1 and param 2 */
+	cmpd (r7, r6), (r3, r2)	
+	bhi L10			/* If param 2 is greater go to L10 */
+	bne L8			/* If param 1 is greater go to L8 */
+	cmpd (r5, r4), (r1, r0)	/* Compare low bits from param 1 and param 2 */
+	/*  If param 2 is greater or the same go to L1 */
+	bhs L10			 
+
+L8:	/* Check if most significant bit of param 2 is set */
+	tbit $15, r7		
+	bfs L10			/* If PSR is set go to L10 */
+
+	/* Shift bit */
+	lshd $1, (r11, r10)	/* Shift left: high bits of bit */ 
+	/* Check if most significant bit of bit is set */
+	tbit $15, r9		
+	lshd $1, (r9, r8)	/* Shift left: low bits of bit */
+	bfs L28			/* If PSR is set go to L28 */
+
+L9:	/* Shift b */
+	lshd $1, (r7, r6)	/* Shift left: high bits of param 2 */
+	/* Check if most significant bit of param 2 is set */
+	tbit $15, r5		
+	lshd $1, (r5, r4)	/* Shift left: low bits of param 2 */
+	bfc L6			/* If PSR is set go to L6 */
+	addw $1, r6		/* Add 1 to the highest bits of b */
+	br L6			/* Go to L6 */
+	
+L10:	/* While (bit) */
+	cmpd $0, (r11, r10)	
+	bne L11
+	cmpd $0, (r9, r8)
+	beq E1
+
+L11:	/* If (num >= den) */
+	cmpd (r3, r2), (r7, r6)	/* Compare high bits of param 1 and param 2 */
+	blo L15			/* If param 1 lower than param 2 go to L15 */
+	bne L12			/* If not equal go to L12 */	
+	cmpd (r1, r0), (r5, r4)	/* Compare low bits of param 1 and param 2 */
+	blo L15			/* If param 1 lower than param 2 go to L15 */
+
+L12:	/* Ures |= bit */
+	ord (r11, r10), (r13)
+	ord (r9, r8), (r12)	
+
+	/* Num -= den */
+	subd (r7, r6), (r3, r2) /* Subtract highest 32 bits from each other */
+	subd (r5, r4), (r1, r0)	/* Subtract lowest 32 bits from each other */
+	bcc L15			/* If no carry occurred go to L15 */
+	subd $1, (r3, r2)	/* Subtract the carry */
+	
+L15:	/* Shift bit to the right */
+	lshd $-1, (r9, r8)	/* Shift right: low bits of bit */
+	/* Check if least significant bit of high bits is set */
+	tbit $0, r10		
+	lshd $-1, (r11, r10)	/* Shift right: high bits of bit */
+	bfs L18			/* If PSR is set go to L18 */
+
+L17:	/* Shift param#2 to the right */
+	lshd $-1, (r5, r4)	/* Shift right: low bits of param 2 */
+	/* Check if least significant bit of high bits is set */
+	tbit $0, r6		
+	lshd $-1, (r7, r6)	/* Shift right: high bits of param 2 */
+	bfc L10			/* If PSR is not set go to L10 */
+	/* Or with 0x8000 to set most significant bit */
+	orw $32768, r5		
+	br L10			/* Go to L10 */
+
+L18:	/* Or with 0x8000 to set most significant bit */
+	orw $32768, r9		
+	br L17
+
+L28: 	/* Left shift bit */
+	addw $1, r10		/* Add 1 to highest bits of bit */
+	br L9			/* Go to L9 */
+
+LE:	cmpd (r12), (r7, r6)
+	bne L5
+	excp dvz
+	br	Lexit__
+
+E1:	loadw	18(sp), r4
+	cmpw $0, r4
+	bne	Lexit__
+
+	/* Return result */
+	movd (r12), (r1, r0)
+	movd (r13), (r3, r2)
+Lexit__:
+	pop	$7, r7
+	popret	$2, r13
+#endif
+
+#ifdef L_umoddi3
+	.text
+	.align 4
+	.globl ___umoddi3
+
+___umoddi3:
+	movw $1, r2
+	br ___udivmoddi3
+#endif
+
diff --git a/gcc-4.9/libgcc/config/cr16/t-cr16 b/gcc-4.9/libgcc/config/cr16/t-cr16
new file mode 100644
index 000000000..f29f7be05
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/t-cr16
@@ -0,0 +1,29 @@
+# Makefile fragment for building LIBGCC for the Renesas CR16 target.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB1ASMSRC = cr16/lib1funcs.S
+LIB1ASMFUNCS =  _mulsi3 _lshrdi3 _muldi3 _divdi3 _udivdi3 _udivmoddi3 \
+                _umoddi3 _moddi3
+
+LIB2ADD = $(srcdir)/config/cr16/divmodhi3.c  \
+	  $(srcdir)/udivmodsi4.c \
+	  $(srcdir)/udivmod.c   \
+	  $(srcdir)/divmod.c
+
+LIB2ADDEH = $(srcdir)/config/cr16/unwind-cr16.c 
diff --git a/gcc-4.9/libgcc/config/cr16/t-crtlibid b/gcc-4.9/libgcc/config/cr16/t-crtlibid
new file mode 100644
index 000000000..57cf9c950
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/t-crtlibid
@@ -0,0 +1,22 @@
+# Makefile fragment for building LIBGCC for the Renesas CR16 target.
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Assemble startup files.
+crtlibid.o: $(srcdir)/config/cr16/crtlibid.S
+	$(gcc_compile) -c -x assembler-with-cpp $<
diff --git a/gcc-4.9/libgcc/config/cr16/unwind-cr16.c b/gcc-4.9/libgcc/config/cr16/unwind-cr16.c
new file mode 100644
index 000000000..a02e97d5e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/unwind-cr16.c
@@ -0,0 +1,1682 @@
+/* DWARF2 exception handling and frame unwind runtime interface routines.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "dwarf2.h"
+#include "unwind.h"
+#ifdef __USING_SJLJ_EXCEPTIONS__
+# define NO_SIZE_OF_ENCODED_VALUE
+#endif
+#include "unwind-pe.h"
+#include "unwind-dw2-fde.h"
+#include "gthr.h"
+#include "unwind-dw2.h"
+
+#ifdef HAVE_SYS_SDT_H
+#include <sys/sdt.h>
+#endif
+
+#ifndef __USING_SJLJ_EXCEPTIONS__
+
+#ifndef STACK_GROWS_DOWNWARD
+#define STACK_GROWS_DOWNWARD 0
+#else
+#undef STACK_GROWS_DOWNWARD
+#define STACK_GROWS_DOWNWARD 1
+#endif
+
+/* Dwarf frame registers used for pre gcc 3.0 compiled glibc.  */
+#ifndef PRE_GCC3_DWARF_FRAME_REGISTERS
+#define PRE_GCC3_DWARF_FRAME_REGISTERS DWARF_FRAME_REGISTERS
+#endif
+
+#ifndef DWARF_REG_TO_UNWIND_COLUMN
+#define DWARF_REG_TO_UNWIND_COLUMN(REGNO) (REGNO)
+#endif
+
+#ifdef REG_VALUE_IN_UNWIND_CONTEXT
+typedef _Unwind_Word _Unwind_Context_Reg_Val;
+
+#ifndef ASSUME_EXTENDED_UNWIND_CONTEXT
+#define ASSUME_EXTENDED_UNWIND_CONTEXT 1
+#endif
+
+static inline _Unwind_Word
+_Unwind_Get_Unwind_Word (_Unwind_Context_Reg_Val val)
+{
+  return val;
+}
+
+static inline _Unwind_Context_Reg_Val
+_Unwind_Get_Unwind_Context_Reg_Val (_Unwind_Word val)
+{
+  return val;
+}
+#else
+typedef void *_Unwind_Context_Reg_Val;
+
+static inline _Unwind_Word
+_Unwind_Get_Unwind_Word (_Unwind_Context_Reg_Val val)
+{
+  return (_Unwind_Word) (_Unwind_Internal_Ptr) val;
+}
+
+static inline _Unwind_Context_Reg_Val
+_Unwind_Get_Unwind_Context_Reg_Val (_Unwind_Word val)
+{
+  return (_Unwind_Context_Reg_Val) (_Unwind_Internal_Ptr) val;
+}
+#endif
+
+#ifndef ASSUME_EXTENDED_UNWIND_CONTEXT
+#define ASSUME_EXTENDED_UNWIND_CONTEXT 0
+#endif
+
+/* This is the register and unwind state for a particular frame.  This
+   provides the information necessary to unwind up past a frame and return
+   to its caller.  */
+struct _Unwind_Context
+{
+  _Unwind_Context_Reg_Val reg[DWARF_FRAME_REGISTERS+1];
+  void *cfa;
+  void *ra;
+  void *lsda;
+  struct dwarf_eh_bases bases;
+  /* Signal frame context.  */
+#define SIGNAL_FRAME_BIT ((~(_Unwind_Word) 0 >> 1) + 1)
+  /* Context which has version/args_size/by_value fields.  */
+#define EXTENDED_CONTEXT_BIT ((~(_Unwind_Word) 0 >> 2) + 1)
+  _Unwind_Word flags;
+  /* 0 for now, can be increased when further fields are added to
+     struct _Unwind_Context.  */
+  _Unwind_Word version;
+  _Unwind_Word args_size;
+  char by_value[DWARF_FRAME_REGISTERS+1];
+};
+
+/* Byte size of every register managed by these routines.  */
+static unsigned char dwarf_reg_size_table[DWARF_FRAME_REGISTERS+1];
+
+
+/* Read unaligned data from the instruction buffer.  */
+
+union unaligned
+{
+  void *p;
+  unsigned u2 __attribute__ ((mode (HI)));
+  unsigned u4 __attribute__ ((mode (SI)));
+  unsigned u8 __attribute__ ((mode (DI)));
+  signed s2 __attribute__ ((mode (HI)));
+  signed s4 __attribute__ ((mode (SI)));
+  signed s8 __attribute__ ((mode (DI)));
+} __attribute__ ((packed));
+
+static void uw_update_context (struct _Unwind_Context *, _Unwind_FrameState *);
+static _Unwind_Reason_Code uw_frame_state_for (struct _Unwind_Context *,
+					       _Unwind_FrameState *);
+
+static inline void *
+read_pointer (const void *p) { const union unaligned *up = p; return up->p; }
+
+static inline int
+read_1u (const void *p) { return *(const unsigned char *) p; }
+
+static inline int
+read_1s (const void *p) { return *(const signed char *) p; }
+
+static inline int
+read_2u (const void *p) { const union unaligned *up = p; return up->u2; }
+
+static inline int
+read_2s (const void *p) { const union unaligned *up = p; return up->s2; }
+
+static inline unsigned int
+read_4u (const void *p) { const union unaligned *up = p; return up->u4; }
+
+static inline int
+read_4s (const void *p) { const union unaligned *up = p; return up->s4; }
+
+static inline unsigned long
+read_8u (const void *p) { const union unaligned *up = p; return up->u8; }
+
+static inline unsigned long
+read_8s (const void *p) { const union unaligned *up = p; return up->s8; }
+
+static inline _Unwind_Word
+_Unwind_IsSignalFrame (struct _Unwind_Context *context)
+{
+  return (context->flags & SIGNAL_FRAME_BIT) ? 1 : 0;
+}
+
+static inline void
+_Unwind_SetSignalFrame (struct _Unwind_Context *context, int val)
+{
+  if (val)
+    context->flags |= SIGNAL_FRAME_BIT;
+  else
+    context->flags &= ~SIGNAL_FRAME_BIT;
+}
+
+static inline _Unwind_Word
+_Unwind_IsExtendedContext (struct _Unwind_Context *context)
+{
+  return (ASSUME_EXTENDED_UNWIND_CONTEXT
+	  || (context->flags & EXTENDED_CONTEXT_BIT));
+}
+
+/* Get the value of register INDEX as saved in CONTEXT.  */
+
+inline _Unwind_Word
+_Unwind_GetGR (struct _Unwind_Context *context, int index)
+{
+  int size;
+  _Unwind_Context_Reg_Val val;
+
+#ifdef DWARF_ZERO_REG
+  if (index == DWARF_ZERO_REG)
+    return 0;
+#endif
+
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  gcc_assert (index < (int) sizeof(dwarf_reg_size_table));
+  size = dwarf_reg_size_table[index];
+  val = context->reg[index];
+
+  if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+    return _Unwind_Get_Unwind_Word (val);
+
+  /* This will segfault if the register hasn't been saved.  */
+  if (size == sizeof(_Unwind_Ptr))
+    return * (_Unwind_Ptr *) (_Unwind_Internal_Ptr) val;
+  else
+    {
+      gcc_assert (size == sizeof(_Unwind_Word));
+      return * (_Unwind_Word *) (_Unwind_Internal_Ptr) val;
+    }
+}
+
+static inline void *
+_Unwind_GetPtr (struct _Unwind_Context *context, int index)
+{
+  return (void *)(_Unwind_Ptr) _Unwind_GetGR (context, index);
+}
+
+/* Get the value of the CFA as saved in CONTEXT.  */
+
+_Unwind_Word
+_Unwind_GetCFA (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->cfa;
+}
+
+/* Overwrite the saved value for register INDEX in CONTEXT with VAL.  */
+
+inline void
+_Unwind_SetGR (struct _Unwind_Context *context, int index, _Unwind_Word val)
+{
+  int size;
+  void *ptr;
+
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  gcc_assert (index < (int) sizeof(dwarf_reg_size_table));
+  size = dwarf_reg_size_table[index];
+
+  if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+    {
+      context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val);
+      return;
+    }
+
+  ptr = (void *) (_Unwind_Internal_Ptr) context->reg[index];
+
+  if (size == sizeof(_Unwind_Ptr))
+    * (_Unwind_Ptr *) ptr = val;
+  else
+    {
+#if defined( __CR16C__ )
+      if (size == sizeof(_Unwind_Word))
+      * (_Unwind_Word *) ptr = val;
+      else
+	{
+	  typedef unsigned _CR16_Unwind_Word __attribute__((__mode__(__word__)));
+	  gcc_assert (index + 1  <  (int) sizeof(dwarf_reg_size_table));
+	  * (_CR16_Unwind_Word *) ptr = val & 0xffff ;  /* low 16-bit */
+	  ptr = context->reg[index + 1];
+	  * (_CR16_Unwind_Word *) ptr = val >> 16 ;  /* high 16-bit */
+	}
+#else
+      gcc_assert (size == sizeof(_Unwind_Word));
+      * (_Unwind_Word *) ptr = val;
+#endif	
+    }
+}
+
+/* Get the pointer to a register INDEX as saved in CONTEXT.  */
+
+static inline void *
+_Unwind_GetGRPtr (struct _Unwind_Context *context, int index)
+{
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  if (_Unwind_IsExtendedContext (context) && context->by_value[index])
+    return &context->reg[index];
+  return (void *) (_Unwind_Internal_Ptr) context->reg[index];
+}
+
+/* Set the pointer to a register INDEX as saved in CONTEXT.  */
+
+static inline void
+_Unwind_SetGRPtr (struct _Unwind_Context *context, int index, void *p)
+{
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  if (_Unwind_IsExtendedContext (context))
+    context->by_value[index] = 0;
+  context->reg[index] = (_Unwind_Context_Reg_Val) (_Unwind_Internal_Ptr) p;
+}
+
+/* Overwrite the saved value for register INDEX in CONTEXT with VAL.  */
+
+static inline void
+_Unwind_SetGRValue (struct _Unwind_Context *context, int index,
+		    _Unwind_Word val)
+{
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  gcc_assert (index < (int) sizeof(dwarf_reg_size_table));
+  gcc_assert (dwarf_reg_size_table[index] == sizeof (_Unwind_Context_Reg_Val));
+
+  context->by_value[index] = 1;
+  context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val);
+}
+
+/* Return nonzero if register INDEX is stored by value rather than
+   by reference.  */
+
+static inline int
+_Unwind_GRByValue (struct _Unwind_Context *context, int index)
+{
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  return context->by_value[index];
+}
+
+/* Retrieve the return address for CONTEXT.  */
+
+inline _Unwind_Ptr
+_Unwind_GetIP (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->ra;
+}
+
+/* Retrieve the return address and flag whether that IP is before
+   or after first not yet fully executed instruction.  */
+
+inline _Unwind_Ptr
+_Unwind_GetIPInfo (struct _Unwind_Context *context, int *ip_before_insn)
+{
+  *ip_before_insn = _Unwind_IsSignalFrame (context);
+  return (_Unwind_Ptr) context->ra;
+}
+
+/* Overwrite the return address for CONTEXT with VAL.  */
+
+inline void
+_Unwind_SetIP (struct _Unwind_Context *context, _Unwind_Ptr val)
+{
+  context->ra = (void *) val;
+}
+
+void *
+_Unwind_GetLanguageSpecificData (struct _Unwind_Context *context)
+{
+  return context->lsda;
+}
+
+_Unwind_Ptr
+_Unwind_GetRegionStart (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.func;
+}
+
+void *
+_Unwind_FindEnclosingFunction (void *pc)
+{
+  struct dwarf_eh_bases bases;
+  const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
+  if (fde)
+    return bases.func;
+  else
+    return NULL;
+}
+
+_Unwind_Ptr
+_Unwind_GetDataRelBase (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.dbase;
+}
+
+_Unwind_Ptr
+_Unwind_GetTextRelBase (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.tbase;
+}
+
+#include "md-unwind-support.h"
+
+/* Extract any interesting information from the CIE for the translation
+   unit F belongs to.  Return a pointer to the byte after the augmentation,
+   or NULL if we encountered an undecipherable augmentation.  */
+
+static const unsigned char *
+extract_cie_info (const struct dwarf_cie *cie, struct _Unwind_Context *context,
+		  _Unwind_FrameState *fs)
+{
+  const unsigned char *aug = cie->augmentation;
+  const unsigned char *p = aug + strlen ((const char *)aug) + 1;
+  const unsigned char *ret = NULL;
+  _uleb128_t utmp;
+  _sleb128_t stmp;
+
+  /* g++ v2 "eh" has pointer immediately following augmentation string,
+     so it must be handled first.  */
+  if (aug[0] == 'e' && aug[1] == 'h')
+    {
+      fs->eh_ptr = read_pointer (p);
+      p += sizeof (void *);
+      aug += 2;
+    }
+
+  /* After the augmentation resp. pointer for "eh" augmentation
+     follows for CIE version >= 4 address size byte and
+     segment size byte.  */
+  if (__builtin_expect (cie->version >= 4, 0))
+    {
+      if (p[0] != sizeof (void *) || p[1] != 0)
+	return NULL;
+      p += 2;
+    }
+  /* Immediately following this are the code and
+     data alignment and return address column.  */
+  p = read_uleb128 (p, &utmp);
+  fs->code_align = (_Unwind_Word)utmp;
+  p = read_sleb128 (p, &stmp);
+  fs->data_align = (_Unwind_Sword)stmp;
+  if (cie->version == 1)
+    fs->retaddr_column = *p++;
+  else
+    {
+      p = read_uleb128 (p, &utmp);
+      fs->retaddr_column = (_Unwind_Word)utmp;
+    }
+  fs->lsda_encoding = DW_EH_PE_omit;
+
+  /* If the augmentation starts with 'z', then a uleb128 immediately
+     follows containing the length of the augmentation field following
+     the size.  */
+  if (*aug == 'z')
+    {
+      p = read_uleb128 (p, &utmp);
+      ret = p + utmp;
+
+      fs->saw_z = 1;
+      ++aug;
+    }
+
+  /* Iterate over recognized augmentation subsequences.  */
+  while (*aug != '\0')
+    {
+      /* "L" indicates a byte showing how the LSDA pointer is encoded.  */
+      if (aug[0] == 'L')
+	{
+	  fs->lsda_encoding = *p++;
+	  aug += 1;
+	}
+
+      /* "R" indicates a byte indicating how FDE addresses are encoded.  */
+      else if (aug[0] == 'R')
+	{
+	  fs->fde_encoding = *p++;
+	  aug += 1;
+	}
+
+      /* "P" indicates a personality routine in the CIE augmentation.  */
+      else if (aug[0] == 'P')
+	{
+	  _Unwind_Ptr personality;
+
+	  p = read_encoded_value (context, *p, p + 1, &personality);
+	  fs->personality = (_Unwind_Personality_Fn) personality;
+	  aug += 1;
+	}
+
+      /* "S" indicates a signal frame.  */
+      else if (aug[0] == 'S')
+	{
+	  fs->signal_frame = 1;
+	  aug += 1;
+	}
+
+      /* Otherwise we have an unknown augmentation string.
+	 Bail unless we saw a 'z' prefix.  */
+      else
+	return ret;
+    }
+
+  return ret ? ret : p;
+}
+
+
+/* Decode a DW_OP stack program.  Return the top of stack.  Push INITIAL
+   onto the stack to start.  */
+
+static _Unwind_Word
+execute_stack_op (const unsigned char *op_ptr, const unsigned char *op_end,
+		  struct _Unwind_Context *context, _Unwind_Word initial)
+{
+  _Unwind_Word stack[64];	/* ??? Assume this is enough.  */
+  int stack_elt;
+
+  stack[0] = initial;
+  stack_elt = 1;
+
+  while (op_ptr < op_end)
+    {
+      enum dwarf_location_atom op = *op_ptr++;
+      _Unwind_Word result;
+      _uleb128_t reg, utmp;
+      _sleb128_t offset, stmp;
+
+      switch (op)
+	{
+	case DW_OP_lit0:
+	case DW_OP_lit1:
+	case DW_OP_lit2:
+	case DW_OP_lit3:
+	case DW_OP_lit4:
+	case DW_OP_lit5:
+	case DW_OP_lit6:
+	case DW_OP_lit7:
+	case DW_OP_lit8:
+	case DW_OP_lit9:
+	case DW_OP_lit10:
+	case DW_OP_lit11:
+	case DW_OP_lit12:
+	case DW_OP_lit13:
+	case DW_OP_lit14:
+	case DW_OP_lit15:
+	case DW_OP_lit16:
+	case DW_OP_lit17:
+	case DW_OP_lit18:
+	case DW_OP_lit19:
+	case DW_OP_lit20:
+	case DW_OP_lit21:
+	case DW_OP_lit22:
+	case DW_OP_lit23:
+	case DW_OP_lit24:
+	case DW_OP_lit25:
+	case DW_OP_lit26:
+	case DW_OP_lit27:
+	case DW_OP_lit28:
+	case DW_OP_lit29:
+	case DW_OP_lit30:
+	case DW_OP_lit31:
+	  result = op - DW_OP_lit0;
+	  break;
+
+	case DW_OP_addr:
+	  result = (_Unwind_Word) (_Unwind_Ptr) read_pointer (op_ptr);
+	  op_ptr += sizeof (void *);
+	  break;
+
+	case DW_OP_GNU_encoded_addr:
+	  {
+	    _Unwind_Ptr presult;
+	    op_ptr = read_encoded_value (context, *op_ptr, op_ptr+1, &presult);
+	    result = presult;
+	  }
+	  break;
+
+	case DW_OP_const1u:
+	  result = read_1u (op_ptr);
+	  op_ptr += 1;
+	  break;
+	case DW_OP_const1s:
+	  result = read_1s (op_ptr);
+	  op_ptr += 1;
+	  break;
+	case DW_OP_const2u:
+	  result = read_2u (op_ptr);
+	  op_ptr += 2;
+	  break;
+	case DW_OP_const2s:
+	  result = read_2s (op_ptr);
+	  op_ptr += 2;
+	  break;
+	case DW_OP_const4u:
+	  result = read_4u (op_ptr);
+	  op_ptr += 4;
+	  break;
+	case DW_OP_const4s:
+	  result = read_4s (op_ptr);
+	  op_ptr += 4;
+	  break;
+	case DW_OP_const8u:
+	  result = read_8u (op_ptr);
+	  op_ptr += 8;
+	  break;
+	case DW_OP_const8s:
+	  result = read_8s (op_ptr);
+	  op_ptr += 8;
+	  break;
+	case DW_OP_constu:
+	  op_ptr = read_uleb128 (op_ptr, &utmp);
+	  result = (_Unwind_Word)utmp;
+	  break;
+	case DW_OP_consts:
+	  op_ptr = read_sleb128 (op_ptr, &stmp);
+	  result = (_Unwind_Sword)stmp;
+	  break;
+
+	case DW_OP_reg0:
+	case DW_OP_reg1:
+	case DW_OP_reg2:
+	case DW_OP_reg3:
+	case DW_OP_reg4:
+	case DW_OP_reg5:
+	case DW_OP_reg6:
+	case DW_OP_reg7:
+	case DW_OP_reg8:
+	case DW_OP_reg9:
+	case DW_OP_reg10:
+	case DW_OP_reg11:
+	case DW_OP_reg12:
+	case DW_OP_reg13:
+	case DW_OP_reg14:
+	case DW_OP_reg15:
+	case DW_OP_reg16:
+	case DW_OP_reg17:
+	case DW_OP_reg18:
+	case DW_OP_reg19:
+	case DW_OP_reg20:
+	case DW_OP_reg21:
+	case DW_OP_reg22:
+	case DW_OP_reg23:
+	case DW_OP_reg24:
+	case DW_OP_reg25:
+	case DW_OP_reg26:
+	case DW_OP_reg27:
+	case DW_OP_reg28:
+	case DW_OP_reg29:
+	case DW_OP_reg30:
+	case DW_OP_reg31:
+	  result = _Unwind_GetGR (context, op - DW_OP_reg0);
+	  break;
+	case DW_OP_regx:
+	  op_ptr = read_uleb128 (op_ptr, &reg);
+	  result = _Unwind_GetGR (context, reg);
+	  break;
+
+	case DW_OP_breg0:
+	case DW_OP_breg1:
+	case DW_OP_breg2:
+	case DW_OP_breg3:
+	case DW_OP_breg4:
+	case DW_OP_breg5:
+	case DW_OP_breg6:
+	case DW_OP_breg7:
+	case DW_OP_breg8:
+	case DW_OP_breg9:
+	case DW_OP_breg10:
+	case DW_OP_breg11:
+	case DW_OP_breg12:
+	case DW_OP_breg13:
+	case DW_OP_breg14:
+	case DW_OP_breg15:
+	case DW_OP_breg16:
+	case DW_OP_breg17:
+	case DW_OP_breg18:
+	case DW_OP_breg19:
+	case DW_OP_breg20:
+	case DW_OP_breg21:
+	case DW_OP_breg22:
+	case DW_OP_breg23:
+	case DW_OP_breg24:
+	case DW_OP_breg25:
+	case DW_OP_breg26:
+	case DW_OP_breg27:
+	case DW_OP_breg28:
+	case DW_OP_breg29:
+	case DW_OP_breg30:
+	case DW_OP_breg31:
+	  op_ptr = read_sleb128 (op_ptr, &offset);
+	  result = _Unwind_GetGR (context, op - DW_OP_breg0) + offset;
+	  break;
+	case DW_OP_bregx:
+	  op_ptr = read_uleb128 (op_ptr, &reg);
+	  op_ptr = read_sleb128 (op_ptr, &offset);
+	  result = _Unwind_GetGR (context, reg) + (_Unwind_Word)offset;
+	  break;
+
+	case DW_OP_dup:
+	  gcc_assert (stack_elt);
+	  result = stack[stack_elt - 1];
+	  break;
+
+	case DW_OP_drop:
+	  gcc_assert (stack_elt);
+	  stack_elt -= 1;
+	  goto no_push;
+
+	case DW_OP_pick:
+	  offset = *op_ptr++;
+	  gcc_assert (offset < stack_elt - 1);
+	  result = stack[stack_elt - 1 - offset];
+	  break;
+
+	case DW_OP_over:
+	  gcc_assert (stack_elt >= 2);
+	  result = stack[stack_elt - 2];
+	  break;
+
+	case DW_OP_swap:
+	  {
+	    _Unwind_Word t;
+	    gcc_assert (stack_elt >= 2);
+	    t = stack[stack_elt - 1];
+	    stack[stack_elt - 1] = stack[stack_elt - 2];
+	    stack[stack_elt - 2] = t;
+	    goto no_push;
+	  }
+
+	case DW_OP_rot:
+	  {
+	    _Unwind_Word t1, t2, t3;
+
+	    gcc_assert (stack_elt >= 3);
+	    t1 = stack[stack_elt - 1];
+	    t2 = stack[stack_elt - 2];
+	    t3 = stack[stack_elt - 3];
+	    stack[stack_elt - 1] = t2;
+	    stack[stack_elt - 2] = t3;
+	    stack[stack_elt - 3] = t1;
+	    goto no_push;
+	  }
+
+	case DW_OP_deref:
+	case DW_OP_deref_size:
+	case DW_OP_abs:
+	case DW_OP_neg:
+	case DW_OP_not:
+	case DW_OP_plus_uconst:
+	  /* Unary operations.  */
+	  gcc_assert (stack_elt);
+	  stack_elt -= 1;
+
+	  result = stack[stack_elt];
+
+	  switch (op)
+	    {
+	    case DW_OP_deref:
+	      {
+		void *ptr = (void *) (_Unwind_Ptr) result;
+		result = (_Unwind_Ptr) read_pointer (ptr);
+	      }
+	      break;
+
+	    case DW_OP_deref_size:
+	      {
+		void *ptr = (void *) (_Unwind_Ptr) result;
+		switch (*op_ptr++)
+		  {
+		  case 1:
+		    result = read_1u (ptr);
+		    break;
+		  case 2:
+		    result = read_2u (ptr);
+		    break;
+		  case 4:
+		    result = read_4u (ptr);
+		    break;
+		  case 8:
+		    result = read_8u (ptr);
+		    break;
+		  default:
+		    gcc_unreachable ();
+		  }
+	      }
+	      break;
+
+	    case DW_OP_abs:
+	      if ((_Unwind_Sword) result < 0)
+		result = -result;
+	      break;
+	    case DW_OP_neg:
+	      result = -result;
+	      break;
+	    case DW_OP_not:
+	      result = ~result;
+	      break;
+	    case DW_OP_plus_uconst:
+	      op_ptr = read_uleb128 (op_ptr, &utmp);
+	      result += (_Unwind_Word)utmp;
+	      break;
+
+	    default:
+	      gcc_unreachable ();
+	    }
+	  break;
+
+	case DW_OP_and:
+	case DW_OP_div:
+	case DW_OP_minus:
+	case DW_OP_mod:
+	case DW_OP_mul:
+	case DW_OP_or:
+	case DW_OP_plus:
+	case DW_OP_shl:
+	case DW_OP_shr:
+	case DW_OP_shra:
+	case DW_OP_xor:
+	case DW_OP_le:
+	case DW_OP_ge:
+	case DW_OP_eq:
+	case DW_OP_lt:
+	case DW_OP_gt:
+	case DW_OP_ne:
+	  {
+	    /* Binary operations.  */
+	    _Unwind_Word first, second;
+	    gcc_assert (stack_elt >= 2);
+	    stack_elt -= 2;
+
+	    second = stack[stack_elt];
+	    first = stack[stack_elt + 1];
+
+	    switch (op)
+	      {
+	      case DW_OP_and:
+		result = second & first;
+		break;
+	      case DW_OP_div:
+		result = (_Unwind_Sword) second / (_Unwind_Sword) first;
+		break;
+	      case DW_OP_minus:
+		result = second - first;
+		break;
+	      case DW_OP_mod:
+		result = second % first;
+		break;
+	      case DW_OP_mul:
+		result = second * first;
+		break;
+	      case DW_OP_or:
+		result = second | first;
+		break;
+	      case DW_OP_plus:
+		result = second + first;
+		break;
+	      case DW_OP_shl:
+		result = second << first;
+		break;
+	      case DW_OP_shr:
+		result = second >> first;
+		break;
+	      case DW_OP_shra:
+		result = (_Unwind_Sword) second >> first;
+		break;
+	      case DW_OP_xor:
+		result = second ^ first;
+		break;
+	      case DW_OP_le:
+		result = (_Unwind_Sword) second <= (_Unwind_Sword) first;
+		break;
+	      case DW_OP_ge:
+		result = (_Unwind_Sword) second >= (_Unwind_Sword) first;
+		break;
+	      case DW_OP_eq:
+		result = (_Unwind_Sword) second == (_Unwind_Sword) first;
+		break;
+	      case DW_OP_lt:
+		result = (_Unwind_Sword) second < (_Unwind_Sword) first;
+		break;
+	      case DW_OP_gt:
+		result = (_Unwind_Sword) second > (_Unwind_Sword) first;
+		break;
+	      case DW_OP_ne:
+		result = (_Unwind_Sword) second != (_Unwind_Sword) first;
+		break;
+
+	      default:
+		gcc_unreachable ();
+	      }
+	  }
+	  break;
+
+	case DW_OP_skip:
+	  offset = read_2s (op_ptr);
+	  op_ptr += 2;
+	  op_ptr += offset;
+	  goto no_push;
+
+	case DW_OP_bra:
+	  gcc_assert (stack_elt);
+	  stack_elt -= 1;
+
+	  offset = read_2s (op_ptr);
+	  op_ptr += 2;
+	  if (stack[stack_elt] != 0)
+	    op_ptr += offset;
+	  goto no_push;
+
+	case DW_OP_nop:
+	  goto no_push;
+
+	default:
+	  gcc_unreachable ();
+	}
+
+      /* Most things push a result value.  */
+      gcc_assert ((size_t) stack_elt < sizeof(stack)/sizeof(*stack));
+      stack[stack_elt++] = result;
+    no_push:;
+    }
+
+  /* We were executing this program to get a value.  It should be
+     at top of stack.  */
+  gcc_assert (stack_elt);
+  stack_elt -= 1;
+  return stack[stack_elt];
+}
+
+
+/* Decode DWARF 2 call frame information. Takes pointers the
+   instruction sequence to decode, current register information and
+   CIE info, and the PC range to evaluate.  */
+
+static void
+execute_cfa_program (const unsigned char *insn_ptr,
+		     const unsigned char *insn_end,
+		     struct _Unwind_Context *context,
+		     _Unwind_FrameState *fs)
+{
+  struct frame_state_reg_info *unused_rs = NULL;
+
+  /* Don't allow remember/restore between CIE and FDE programs.  */
+  fs->regs.prev = NULL;
+
+  /* The comparison with the return address uses < rather than <= because
+     we are only interested in the effects of code before the call; for a
+     noreturn function, the return address may point to unrelated code with
+     a different stack configuration that we are not interested in.  We
+     assume that the call itself is unwind info-neutral; if not, or if
+     there are delay instructions that adjust the stack, these must be
+     reflected at the point immediately before the call insn.
+     In signal frames, return address is after last completed instruction,
+     so we add 1 to return address to make the comparison <=.  */
+  while (insn_ptr < insn_end
+	 && fs->pc < context->ra + _Unwind_IsSignalFrame (context))
+    {
+      unsigned char insn = *insn_ptr++;
+      _uleb128_t reg, utmp;
+      _sleb128_t offset, stmp;
+
+      if ((insn & 0xc0) == DW_CFA_advance_loc)
+	fs->pc += (insn & 0x3f) * fs->code_align;
+      else if ((insn & 0xc0) == DW_CFA_offset)
+	{
+	  reg = insn & 0x3f;
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  offset = (_Unwind_Sword) utmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = offset;
+	}
+      else if ((insn & 0xc0) == DW_CFA_restore)
+	{
+	  reg = insn & 0x3f;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how = REG_UNSAVED;
+	}
+      else switch (insn)
+	{
+	case DW_CFA_set_loc:
+	  {
+	    _Unwind_Ptr pc;
+
+	    insn_ptr = read_encoded_value (context, fs->fde_encoding,
+					   insn_ptr, &pc);
+	    fs->pc = (void *) pc;
+	  }
+	  break;
+
+	case DW_CFA_advance_loc1:
+	  fs->pc += read_1u (insn_ptr) * fs->code_align;
+	  insn_ptr += 1;
+	  break;
+	case DW_CFA_advance_loc2:
+	  fs->pc += read_2u (insn_ptr) * fs->code_align;
+	  insn_ptr += 2;
+	  break;
+	case DW_CFA_advance_loc4:
+	  fs->pc += read_4u (insn_ptr) * fs->code_align;
+	  insn_ptr += 4;
+	  break;
+
+	case DW_CFA_offset_extended:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  offset = (_Unwind_Sword) utmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = offset;
+	  break;
+
+	case DW_CFA_restore_extended:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  /* FIXME, this is wrong; the CIE might have said that the
+	     register was saved somewhere.  */
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN(reg)].how = REG_UNSAVED;
+	  break;
+
+	case DW_CFA_same_value:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN(reg)].how = REG_UNSAVED;
+	  break;
+
+	case DW_CFA_undefined:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN(reg)].how = REG_UNDEFINED;
+	  break;
+
+	case DW_CFA_nop:
+	  break;
+
+	case DW_CFA_register:
+	  {
+	    _uleb128_t reg2;
+	    insn_ptr = read_uleb128 (insn_ptr, &reg);
+	    insn_ptr = read_uleb128 (insn_ptr, &reg2);
+	    fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how = REG_SAVED_REG;
+	    fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.reg =
+	      (_Unwind_Word)reg2;
+	  }
+	  break;
+
+	case DW_CFA_remember_state:
+	  {
+	    struct frame_state_reg_info *new_rs;
+	    if (unused_rs)
+	      {
+		new_rs = unused_rs;
+		unused_rs = unused_rs->prev;
+	      }
+	    else
+	      new_rs = alloca (sizeof (struct frame_state_reg_info));
+
+	    *new_rs = fs->regs;
+	    fs->regs.prev = new_rs;
+	  }
+	  break;
+
+	case DW_CFA_restore_state:
+	  {
+	    struct frame_state_reg_info *old_rs = fs->regs.prev;
+	    fs->regs = *old_rs;
+	    old_rs->prev = unused_rs;
+	    unused_rs = old_rs;
+	  }
+	  break;
+
+	case DW_CFA_def_cfa:
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  fs->regs.cfa_reg = (_Unwind_Word)utmp;
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  fs->regs.cfa_offset = (_Unwind_Word)utmp;
+	  fs->regs.cfa_how = CFA_REG_OFFSET;
+	  break;
+
+	case DW_CFA_def_cfa_register:
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  fs->regs.cfa_reg = (_Unwind_Word)utmp;
+	  fs->regs.cfa_how = CFA_REG_OFFSET;
+	  break;
+
+	case DW_CFA_def_cfa_offset:
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  fs->regs.cfa_offset = utmp;
+	  /* cfa_how deliberately not set.  */
+	  break;
+
+	case DW_CFA_def_cfa_expression:
+	  fs->regs.cfa_exp = insn_ptr;
+	  fs->regs.cfa_how = CFA_EXP;
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  insn_ptr += utmp;
+	  break;
+
+	case DW_CFA_expression:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how = REG_SAVED_EXP;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.exp = insn_ptr;
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  insn_ptr += utmp;
+	  break;
+
+	  /* Dwarf3.  */
+	case DW_CFA_offset_extended_sf:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  insn_ptr = read_sleb128 (insn_ptr, &stmp);
+	  offset = stmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = offset;
+	  break;
+
+	case DW_CFA_def_cfa_sf:
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  fs->regs.cfa_reg = (_Unwind_Word)utmp;
+	  insn_ptr = read_sleb128 (insn_ptr, &stmp);
+	  fs->regs.cfa_offset = (_Unwind_Sword)stmp;
+	  fs->regs.cfa_how = CFA_REG_OFFSET;
+	  fs->regs.cfa_offset *= fs->data_align;
+	  break;
+
+	case DW_CFA_def_cfa_offset_sf:
+	  insn_ptr = read_sleb128 (insn_ptr, &stmp);
+	  fs->regs.cfa_offset = (_Unwind_Sword)stmp;
+	  fs->regs.cfa_offset *= fs->data_align;
+	  /* cfa_how deliberately not set.  */
+	  break;
+
+	case DW_CFA_val_offset:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  offset = (_Unwind_Sword) utmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_VAL_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = offset;
+	  break;
+
+	case DW_CFA_val_offset_sf:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  insn_ptr = read_sleb128 (insn_ptr, &stmp);
+	  offset = stmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_VAL_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = offset;
+	  break;
+
+	case DW_CFA_val_expression:
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_VAL_EXP;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.exp = insn_ptr;
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  insn_ptr += utmp;
+	  break;
+
+	case DW_CFA_GNU_window_save:
+	  /* ??? Hardcoded for SPARC register window configuration.  */
+	  for (reg = 16; reg < 32; ++reg)
+	    {
+	      fs->regs.reg[reg].how = REG_SAVED_OFFSET;
+	      fs->regs.reg[reg].loc.offset = (reg - 16) * sizeof (void *);
+	    }
+	  break;
+
+	case DW_CFA_GNU_args_size:
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  context->args_size = (_Unwind_Word)utmp;
+	  break;
+
+	case DW_CFA_GNU_negative_offset_extended:
+	  /* Obsoleted by DW_CFA_offset_extended_sf, but used by
+	     older PowerPC code.  */
+	  insn_ptr = read_uleb128 (insn_ptr, &reg);
+	  insn_ptr = read_uleb128 (insn_ptr, &utmp);
+	  offset = (_Unwind_Word) utmp * fs->data_align;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].how
+	    = REG_SAVED_OFFSET;
+	  fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (reg)].loc.offset = -offset;
+	  break;
+
+	default:
+	  gcc_unreachable ();
+	}
+    }
+}
+
+/* Given the _Unwind_Context CONTEXT for a stack frame, look up the FDE for
+   its caller and decode it into FS.  This function also sets the
+   args_size and lsda members of CONTEXT, as they are really information
+   about the caller's frame.  */
+
+static _Unwind_Reason_Code
+uw_frame_state_for (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  const struct dwarf_fde *fde;
+  const struct dwarf_cie *cie;
+  const unsigned char *aug, *insn, *end;
+
+  memset (fs, 0, sizeof (*fs));
+  context->args_size = 0;
+  context->lsda = 0;
+
+  if (context->ra == 0)
+    return _URC_END_OF_STACK;
+
+  fde = _Unwind_Find_FDE (context->ra + _Unwind_IsSignalFrame (context) - 1,
+			  &context->bases);
+  if (fde == NULL)
+    {
+#ifdef MD_FALLBACK_FRAME_STATE_FOR
+      /* Couldn't find frame unwind info for this function.  Try a
+	 target-specific fallback mechanism.  This will necessarily
+	 not provide a personality routine or LSDA.  */
+      return MD_FALLBACK_FRAME_STATE_FOR (context, fs);
+#else
+      return _URC_END_OF_STACK;
+#endif
+    }
+
+  fs->pc = context->bases.func;
+
+  cie = get_cie (fde);
+  insn = extract_cie_info (cie, context, fs);
+  if (insn == NULL)
+    /* CIE contained unknown augmentation.  */
+    return _URC_FATAL_PHASE1_ERROR;
+
+  /* First decode all the insns in the CIE.  */
+  end = (const unsigned char *) next_fde ((const struct dwarf_fde *) cie);
+  execute_cfa_program (insn, end, context, fs);
+
+  /* Locate augmentation for the fde.  */
+  aug = (const unsigned char *) fde + sizeof (*fde);
+  aug += 2 * size_of_encoded_value (fs->fde_encoding);
+  insn = NULL;
+  if (fs->saw_z)
+    {
+      _uleb128_t i;
+      aug = read_uleb128 (aug, &i);
+      insn = aug + i;
+    }
+  if (fs->lsda_encoding != DW_EH_PE_omit)
+    {
+      _Unwind_Ptr lsda;
+
+      aug = read_encoded_value (context, fs->lsda_encoding, aug, &lsda);
+      context->lsda = (void *) lsda;
+    }
+
+  /* Then the insns in the FDE up to our target PC.  */
+  if (insn == NULL)
+    insn = aug;
+  end = (const unsigned char *) next_fde (fde);
+  execute_cfa_program (insn, end, context, fs);
+
+  return _URC_NO_REASON;
+}
+
+typedef struct frame_state
+{
+  void *cfa;
+  void *eh_ptr;
+  long cfa_offset;
+  long args_size;
+  long reg_or_offset[PRE_GCC3_DWARF_FRAME_REGISTERS+1];
+  unsigned short cfa_reg;
+  unsigned short retaddr_column;
+  char saved[PRE_GCC3_DWARF_FRAME_REGISTERS+1];
+} frame_state;
+
+struct frame_state * __frame_state_for (void *, struct frame_state *);
+
+/* Called from pre-G++ 3.0 __throw to find the registers to restore for
+   a given PC_TARGET.  The caller should allocate a local variable of
+   `struct frame_state' and pass its address to STATE_IN.  */
+
+struct frame_state *
+__frame_state_for (void *pc_target, struct frame_state *state_in)
+{
+  struct _Unwind_Context context;
+  _Unwind_FrameState fs;
+  int reg;
+
+  memset (&context, 0, sizeof (struct _Unwind_Context));
+  if (!ASSUME_EXTENDED_UNWIND_CONTEXT)
+    context.flags = EXTENDED_CONTEXT_BIT;
+  context.ra = pc_target + 1;
+
+  if (uw_frame_state_for (&context, &fs) != _URC_NO_REASON)
+    return 0;
+
+  /* We have no way to pass a location expression for the CFA to our
+     caller.  It wouldn't understand it anyway.  */
+  if (fs.regs.cfa_how == CFA_EXP)
+    return 0;
+
+  for (reg = 0; reg < PRE_GCC3_DWARF_FRAME_REGISTERS + 1; reg++)
+    {
+      state_in->saved[reg] = fs.regs.reg[reg].how;
+      switch (state_in->saved[reg])
+	{
+	case REG_SAVED_REG:
+	  state_in->reg_or_offset[reg] = fs.regs.reg[reg].loc.reg;
+	  break;
+	case REG_SAVED_OFFSET:
+	  state_in->reg_or_offset[reg] = fs.regs.reg[reg].loc.offset;
+	  break;
+	default:
+	  state_in->reg_or_offset[reg] = 0;
+	  break;
+	}
+    }
+
+  state_in->cfa_offset = fs.regs.cfa_offset;
+  state_in->cfa_reg = fs.regs.cfa_reg;
+  state_in->retaddr_column = fs.retaddr_column;
+  state_in->args_size = context.args_size;
+  state_in->eh_ptr = fs.eh_ptr;
+
+  return state_in;
+}
+
+typedef union { _Unwind_Ptr ptr; _Unwind_Word word; } _Unwind_SpTmp;
+
+static inline void
+_Unwind_SetSpColumn (struct _Unwind_Context *context, void *cfa,
+		     _Unwind_SpTmp *tmp_sp)
+{
+  int size = dwarf_reg_size_table[__builtin_dwarf_sp_column ()];
+
+  if (size == sizeof(_Unwind_Ptr))
+    tmp_sp->ptr = (_Unwind_Ptr) cfa;
+  else
+    {
+      gcc_assert (size == sizeof(_Unwind_Word));
+      tmp_sp->word = (_Unwind_Ptr) cfa;
+    }
+  _Unwind_SetGRPtr (context, __builtin_dwarf_sp_column (), tmp_sp);
+}
+
+static void
+uw_update_context_1 (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  struct _Unwind_Context orig_context = *context;
+  void *cfa;
+  long i;
+
+#ifdef EH_RETURN_STACKADJ_RTX
+  /* Special handling here: Many machines do not use a frame pointer,
+     and track the CFA only through offsets from the stack pointer from
+     one frame to the next.  In this case, the stack pointer is never
+     stored, so it has no saved address in the context.  What we do
+     have is the CFA from the previous stack frame.
+
+     In very special situations (such as unwind info for signal return),
+     there may be location expressions that use the stack pointer as well.
+
+     Do this conditionally for one frame.  This allows the unwind info
+     for one frame to save a copy of the stack pointer from the previous
+     frame, and be able to use much easier CFA mechanisms to do it.
+     Always zap the saved stack pointer value for the next frame; carrying
+     the value over from one frame to another doesn't make sense.  */
+
+  _Unwind_SpTmp tmp_sp;
+
+  if (!_Unwind_GetGRPtr (&orig_context, __builtin_dwarf_sp_column ()))
+    _Unwind_SetSpColumn (&orig_context, context->cfa, &tmp_sp);
+  _Unwind_SetGRPtr (context, __builtin_dwarf_sp_column (), NULL);
+#endif
+
+  /* Compute this frame's CFA.  */
+  switch (fs->regs.cfa_how)
+    {
+    case CFA_REG_OFFSET:
+      cfa = _Unwind_GetPtr (&orig_context, fs->regs.cfa_reg);
+      cfa += fs->regs.cfa_offset;
+      break;
+
+    case CFA_EXP:
+      {
+	const unsigned char *exp = fs->regs.cfa_exp;
+	_uleb128_t len;
+
+	exp = read_uleb128 (exp, &len);
+	cfa = (void *) (_Unwind_Ptr)
+	  execute_stack_op (exp, exp + len, &orig_context, 0);
+	break;
+      }
+
+    default:
+      gcc_unreachable ();
+    }
+  context->cfa = cfa;
+
+  /* Compute the addresses of all registers saved in this frame.  */
+  for (i = 0; i < DWARF_FRAME_REGISTERS + 1; ++i)
+    switch (fs->regs.reg[i].how)
+      {
+      case REG_UNSAVED:
+      case REG_UNDEFINED:
+	break;
+
+      case REG_SAVED_OFFSET:
+	_Unwind_SetGRPtr (context, i,
+			  (void *) (cfa + fs->regs.reg[i].loc.offset));
+	break;
+
+      case REG_SAVED_REG:
+	if (_Unwind_GRByValue (&orig_context, fs->regs.reg[i].loc.reg))
+	  _Unwind_SetGRValue (context, i,
+			      _Unwind_GetGR (&orig_context,
+					     fs->regs.reg[i].loc.reg));
+	else
+	  _Unwind_SetGRPtr (context, i,
+			    _Unwind_GetGRPtr (&orig_context,
+					      fs->regs.reg[i].loc.reg));
+	break;
+
+      case REG_SAVED_EXP:
+	{
+	  const unsigned char *exp = fs->regs.reg[i].loc.exp;
+	  _uleb128_t len;
+	  _Unwind_Ptr val;
+
+	  exp = read_uleb128 (exp, &len);
+	  val = execute_stack_op (exp, exp + len, &orig_context,
+				  (_Unwind_Ptr) cfa);
+	  _Unwind_SetGRPtr (context, i, (void *) val);
+	}
+	break;
+
+      case REG_SAVED_VAL_OFFSET:
+	_Unwind_SetGRValue (context, i,
+			    (_Unwind_Internal_Ptr)
+			    (cfa + fs->regs.reg[i].loc.offset));
+	break;
+
+      case REG_SAVED_VAL_EXP:
+	{
+	  const unsigned char *exp = fs->regs.reg[i].loc.exp;
+	  _uleb128_t len;
+	  _Unwind_Ptr val;
+
+	  exp = read_uleb128 (exp, &len);
+	  val = execute_stack_op (exp, exp + len, &orig_context,
+				  (_Unwind_Ptr) cfa);
+	  _Unwind_SetGRValue (context, i, val);
+	}
+	break;
+      }
+
+  _Unwind_SetSignalFrame (context, fs->signal_frame);
+
+#ifdef MD_FROB_UPDATE_CONTEXT
+  MD_FROB_UPDATE_CONTEXT (context, fs);
+#endif
+}
+
+/* CONTEXT describes the unwind state for a frame, and FS describes the FDE
+   of its caller.  Update CONTEXT to refer to the caller as well.  Note
+   that the args_size and lsda members are not updated here, but later in
+   uw_frame_state_for.  */
+
+static void
+uw_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  uw_update_context_1 (context, fs);
+
+  /* In general this unwinder doesn't make any distinction between
+     undefined and same_value rule.  Call-saved registers are assumed
+     to have same_value rule by default and explicit undefined
+     rule is handled like same_value.  The only exception is
+     DW_CFA_undefined on retaddr_column which is supposed to
+     mark outermost frame in DWARF 3.  */
+  if (fs->regs.reg[DWARF_REG_TO_UNWIND_COLUMN (fs->retaddr_column)].how
+      == REG_UNDEFINED)
+    /* uw_frame_state_for uses context->ra == 0 check to find outermost
+       stack frame.  */
+    context->ra = 0;
+  else
+    /* Compute the return address now, since the return address column
+       can change from frame to frame.  */
+    context->ra = __builtin_extract_return_addr
+      (_Unwind_GetPtr (context, fs->retaddr_column));
+#if defined( __CR16C__ )
+  context->ra = (void*)( ( (unsigned)context->ra ) << 1 ) ;
+#endif
+}
+
+static void
+uw_advance_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  uw_update_context (context, fs);
+}
+
+/* Fill in CONTEXT for top-of-stack.  The only valid registers at this
+   level will be the return address and the CFA.  */
+
+#define uw_init_context(CONTEXT)					   \
+  do									   \
+    {									   \
+      /* Do any necessary initialization to access arbitrary stack frames. \
+	 On the SPARC, this means flushing the register windows.  */	   \
+      __builtin_unwind_init ();						   \
+      uw_init_context_1 (CONTEXT, __builtin_dwarf_cfa (),		   \
+			 __builtin_return_address (0));			   \
+    }									   \
+  while (0)
+
+static inline void
+init_dwarf_reg_size_table (void)
+{
+  __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
+}
+
+static void __attribute__((noinline))
+uw_init_context_1 (struct _Unwind_Context *context,
+		   void *outer_cfa, void *outer_ra)
+{
+  void *ra = __builtin_extract_return_addr (__builtin_return_address (0));
+  _Unwind_FrameState fs;
+  _Unwind_SpTmp sp_slot;
+  _Unwind_Reason_Code code;
+
+  memset (context, 0, sizeof (struct _Unwind_Context));
+  context->ra = ra;
+  if (!ASSUME_EXTENDED_UNWIND_CONTEXT)
+    context->flags = EXTENDED_CONTEXT_BIT;
+
+  code = uw_frame_state_for (context, &fs);
+  gcc_assert (code == _URC_NO_REASON);
+
+#if __GTHREADS
+  {
+    static __gthread_once_t once_regsizes = __GTHREAD_ONCE_INIT;
+    if (__gthread_once (&once_regsizes, init_dwarf_reg_size_table) != 0
+	&& dwarf_reg_size_table[0] == 0)
+      init_dwarf_reg_size_table ();
+  }
+#else
+  if (dwarf_reg_size_table[0] == 0)
+    init_dwarf_reg_size_table ();
+#endif
+
+  /* Force the frame state to use the known cfa value.  */
+  _Unwind_SetSpColumn (context, outer_cfa, &sp_slot);
+  fs.regs.cfa_how = CFA_REG_OFFSET;
+  fs.regs.cfa_reg = __builtin_dwarf_sp_column ();
+#if !defined( __CR16C__ )
+  fs.regs.cfa_offset = 0;
+#else
+  fs.regs.cfa_offset -= context->args_size ;
+#endif
+
+  uw_update_context_1 (context, &fs);
+
+  /* If the return address column was saved in a register in the
+     initialization context, then we can't see it in the given
+     call frame data.  So have the initialization context tell us.  */
+  context->ra = __builtin_extract_return_addr (outer_ra);
+}
+
+static void _Unwind_DebugHook (void *, void *)
+  __attribute__ ((__noinline__, __used__, __noclone__));
+
+/* This function is called during unwinding.  It is intended as a hook
+   for a debugger to intercept exceptions.  CFA is the CFA of the
+   target frame.  HANDLER is the PC to which control will be
+   transferred.  */
+static void
+_Unwind_DebugHook (void *cfa __attribute__ ((__unused__)),
+		   void *handler __attribute__ ((__unused__)))
+{
+  /* We only want to use stap probes starting with v3.  Earlier
+     versions added too much startup cost.  */
+#if defined (HAVE_SYS_SDT_H) && defined (STAP_PROBE2) && _SDT_NOTE_TYPE >= 3
+  STAP_PROBE2 (libgcc, unwind, cfa, handler);
+#else
+  asm ("");
+#endif
+}
+
+/* Install TARGET into CURRENT so that we can return to it.  This is a
+   macro because __builtin_eh_return must be invoked in the context of
+   our caller.  */
+#if defined( __CR16C__ )
+
+#define uw_install_context(CURRENT, TARGET)				\
+  do									\
+    {									\
+      long offset = uw_install_context_1 ((CURRENT), (TARGET));		\
+      void *handler = __builtin_frob_return_addr ((TARGET)->ra);	\
+      handler = (void*)( ( (unsigned)handler ) >> 1 ) ;                 \
+      _Unwind_DebugHook ((TARGET)->cfa, handler);			\
+      __builtin_eh_return (offset, handler);				\
+    }									\
+  while (0)
+#else
+#define uw_install_context(CURRENT, TARGET)                             \
+  do                                                                    \
+    {                                                                   \
+      long offset = uw_install_context_1 ((CURRENT), (TARGET));         \
+      void *handler = __builtin_frob_return_addr ((TARGET)->ra);        \
+      _Unwind_DebugHook ((TARGET)->cfa, handler);                       \
+      __builtin_eh_return (offset, handler);                            \
+    }                                                                   \
+  while (0)
+#endif  /* __CR16C__ */
+
+static long
+uw_install_context_1 (struct _Unwind_Context *current,
+		      struct _Unwind_Context *target)
+{
+  long i;
+  _Unwind_SpTmp sp_slot;
+
+  /* If the target frame does not have a saved stack pointer,
+     then set up the target's CFA.  */
+  if (!_Unwind_GetGRPtr (target, __builtin_dwarf_sp_column ()))
+    _Unwind_SetSpColumn (target, target->cfa, &sp_slot);
+
+  for (i = 0; i < DWARF_FRAME_REGISTERS; ++i)
+    {
+      void *c = (void *) (_Unwind_Internal_Ptr) current->reg[i];
+      void *t = (void *) (_Unwind_Internal_Ptr)target->reg[i];
+
+      gcc_assert (current->by_value[i] == 0);
+      if (target->by_value[i] && c)
+	{
+	  _Unwind_Word w;
+	  _Unwind_Ptr p;
+	  if (dwarf_reg_size_table[i] == sizeof (_Unwind_Word))
+	    {
+	      w = (_Unwind_Internal_Ptr) t;
+	      memcpy (c, &w, sizeof (_Unwind_Word));
+	    }
+	  else
+	    {
+	      gcc_assert (dwarf_reg_size_table[i] == sizeof (_Unwind_Ptr));
+	      p = (_Unwind_Internal_Ptr) t;
+	      memcpy (c, &p, sizeof (_Unwind_Ptr));
+	    }
+	}
+      else if (t && c && t != c)
+	memcpy (c, t, dwarf_reg_size_table[i]);
+    }
+
+  /* If the current frame doesn't have a saved stack pointer, then we
+     need to rely on EH_RETURN_STACKADJ_RTX to get our target stack
+     pointer value reloaded.  */
+  if (!_Unwind_GetGRPtr (current, __builtin_dwarf_sp_column ()))
+    {
+      void *target_cfa;
+
+      target_cfa = _Unwind_GetPtr (target, __builtin_dwarf_sp_column ());
+
+      /* We adjust SP by the difference between CURRENT and TARGET's CFA.  */
+      if (STACK_GROWS_DOWNWARD)
+	return target_cfa - current->cfa + target->args_size;
+      else
+	return current->cfa - target_cfa - target->args_size;
+    }
+  return 0;
+}
+
+static inline _Unwind_Ptr
+uw_identify_context (struct _Unwind_Context *context)
+{
+  /* The CFA is not sufficient to disambiguate the context of a function
+     interrupted by a signal before establishing its frame and the context
+     of the signal itself.  */
+  if (STACK_GROWS_DOWNWARD)
+    return _Unwind_GetCFA (context) - _Unwind_IsSignalFrame (context);
+  else
+    return _Unwind_GetCFA (context) + _Unwind_IsSignalFrame (context);
+}
+
+
+#include "unwind.inc"
+
+#if defined (USE_GAS_SYMVER) && defined (SHARED) && defined (USE_LIBUNWIND_EXCEPTIONS)
+alias (_Unwind_Backtrace);
+alias (_Unwind_DeleteException);
+alias (_Unwind_FindEnclosingFunction);
+alias (_Unwind_ForcedUnwind);
+alias (_Unwind_GetDataRelBase);
+alias (_Unwind_GetTextRelBase);
+alias (_Unwind_GetCFA);
+alias (_Unwind_GetGR);
+alias (_Unwind_GetIP);
+alias (_Unwind_GetLanguageSpecificData);
+alias (_Unwind_GetRegionStart);
+alias (_Unwind_RaiseException);
+alias (_Unwind_Resume);
+alias (_Unwind_Resume_or_Rethrow);
+alias (_Unwind_SetGR);
+alias (_Unwind_SetIP);
+#endif
+
+#endif /* !USING_SJLJ_EXCEPTIONS */
diff --git a/gcc-4.9/libgcc/config/cr16/unwind-dw2.h b/gcc-4.9/libgcc/config/cr16/unwind-dw2.h
new file mode 100644
index 000000000..d39049bbe
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cr16/unwind-dw2.h
@@ -0,0 +1,86 @@
+/* DWARF2 frame unwind data structure.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* A target can override (perhaps for backward compatibility) how
+   many dwarf2 columns are unwound.  */
+#ifndef DWARF_FRAME_REGISTERS
+#define DWARF_FRAME_REGISTERS FIRST_PSEUDO_REGISTER
+#endif
+
+/* The result of interpreting the frame unwind info for a frame.
+   This is all symbolic at this point, as none of the values can
+   be resolved until the target pc is located.  */
+typedef struct
+{
+  /* Each register save state can be described in terms of a CFA slot,
+     another register, or a location expression.  */
+  struct frame_state_reg_info
+  {
+    struct {
+      union {
+	_Unwind_Word reg;
+	_Unwind_Sword offset;
+	const unsigned char *exp;
+      } loc;
+      enum {
+	REG_UNSAVED,
+	REG_SAVED_OFFSET,
+	REG_SAVED_REG,
+	REG_SAVED_EXP,
+	REG_SAVED_VAL_OFFSET,
+	REG_SAVED_VAL_EXP,
+	REG_UNDEFINED
+      } how;
+    } reg[DWARF_FRAME_REGISTERS+1];
+
+    /* Used to implement DW_CFA_remember_state.  */
+    struct frame_state_reg_info *prev;
+
+    /* The CFA can be described in terms of a reg+offset or a
+       location expression.  */
+    _Unwind_Sword cfa_offset;
+    _Unwind_Word cfa_reg;
+    const unsigned char *cfa_exp;
+    enum {
+      CFA_UNSET,
+      CFA_REG_OFFSET,
+      CFA_EXP
+    } cfa_how;
+  } regs;
+
+  /* The PC described by the current frame state.  */
+  void *pc;
+
+  /* The information we care about from the CIE/FDE.  */
+  _Unwind_Personality_Fn personality;
+  _Unwind_Sword data_align;
+  _Unwind_Word code_align;
+  _Unwind_Word retaddr_column;
+  unsigned char fde_encoding;
+  unsigned char lsda_encoding;
+  unsigned char saw_z;
+  unsigned char signal_frame;
+  void *eh_ptr;
+} _Unwind_FrameState;
+
diff --git a/gcc-4.9/libgcc/config/cris/arit.c b/gcc-4.9/libgcc/config/cris/arit.c
new file mode 100644
index 000000000..6934f5ded
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/arit.c
@@ -0,0 +1,313 @@
+/* Signed and unsigned multiplication and division and modulus for CRIS.
+   Contributed by Axis Communications.
+   Written by Hans-Peter Nilsson <hp@axis.se>, c:a 1992.
+
+   Copyright (C) 1998-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* Note that we provide prototypes for all "const" functions, to attach
+   the const attribute.  This is necessary in 2.7.2 - adding the
+   attribute to the function *definition* is a syntax error.
+    This did not work with e.g. 2.1; back then, the return type had to
+   be "const".  */
+
+#include "config.h"
+
+#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 3
+#define LZ(v) __builtin_clz (v)
+#endif
+
+/* In (at least) the 4.7 series, GCC doesn't automatically choose the
+   most optimal strategy, possibly related to insufficient modelling of
+   delay-slot costs.  */
+#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 10
+#define SIGNMULT(s, a) ((s) * (a)) /* Cheap multiplication, better than branch.  */
+#else
+#define SIGNMULT(s, a) ((s) < 0 ? -(a) : (a)) /* Branches are still better.  */
+#endif
+
+#if defined (L_udivsi3) || defined (L_divsi3) || defined (L_umodsi3) \
+    || defined (L_modsi3)
+/* Result type of divmod worker function.  */
+struct quot_rem
+ {
+   long quot;
+   long rem;
+ };
+
+/* This is the worker function for div and mod.  It is inlined into the
+   respective library function.  Parameter A must have bit 31 == 0.  */
+
+static __inline__ struct quot_rem
+do_31div (unsigned long a, unsigned long b)
+     __attribute__ ((__const__, __always_inline__));
+
+static __inline__ struct quot_rem
+do_31div (unsigned long a, unsigned long b)
+{
+  /* Adjust operands and result if a is 31 bits.  */
+  long extra = 0;
+  int quot_digits = 0;
+
+  if (b == 0)
+    {
+      struct quot_rem ret;
+      ret.quot = 0xffffffff;
+      ret.rem = 0xffffffff;
+      return ret;
+    }
+
+  if (a < b)
+    return (struct quot_rem) { 0, a };
+
+#ifdef LZ
+  if (b <= a)
+    {
+      quot_digits = LZ (b) - LZ (a);
+      quot_digits += (a >= (b << quot_digits));
+      b <<= quot_digits;
+    }
+#else
+  while (b <= a)
+    {
+      b <<= 1;
+      quot_digits++;
+    }
+#endif
+
+  /* Is a 31 bits?  Note that bit 31 is handled by the caller.  */
+  if (a & 0x40000000)
+    {
+      /* Then make b:s highest bit max 0x40000000, because it must have
+	 been 0x80000000 to be 1 bit higher than a.  */
+      b >>= 1;
+
+      /* Adjust a to be maximum 0x3fffffff, i.e. two upper bits zero.  */
+      if (a >= b)
+	{
+	  a -= b;
+	  extra = 1 << (quot_digits - 1);
+	}
+      else
+	{
+	  a -= b >> 1;
+
+	  /* Remember that we adjusted a by subtracting b * 2 ** Something.  */
+	  extra = 1 << quot_digits;
+	}
+
+      /* The number of quotient digits will be one less, because
+	 we just adjusted b.  */
+      quot_digits--;
+    }
+
+  /* Now do the division part.  */
+
+  /* Subtract b and add ones to the right when a >= b
+     i.e. "a - (b - 1) == (a - b) + 1".  */
+  b--;
+
+#define DS __asm__ ("dstep %2,%0" : "=r" (a) : "0" (a), "r" (b))
+
+  switch (quot_digits)
+    {
+    case 32: DS; case 31: DS; case 30: DS; case 29: DS;
+    case 28: DS; case 27: DS; case 26: DS; case 25: DS;
+    case 24: DS; case 23: DS; case 22: DS; case 21: DS;
+    case 20: DS; case 19: DS; case 18: DS; case 17: DS;
+    case 16: DS; case 15: DS; case 14: DS; case 13: DS;
+    case 12: DS; case 11: DS; case 10: DS; case 9: DS;
+    case 8: DS; case 7: DS; case 6: DS; case 5: DS;
+    case 4: DS; case 3: DS; case 2: DS; case 1: DS;
+    case 0:;
+    }
+
+  {
+    struct quot_rem ret;
+    ret.quot = (a & ((1 << quot_digits) - 1)) + extra;
+    ret.rem = a >> quot_digits;
+    return ret;
+  }
+}
+
+#ifdef L_udivsi3
+unsigned long
+__Udiv (unsigned long a, unsigned long b) __attribute__ ((__const__));
+
+unsigned long
+__Udiv (unsigned long a, unsigned long b)
+{
+  long extra = 0;
+
+  /* Adjust operands and result, if a and/or b is 32 bits.  */
+  /* Effectively: b & 0x80000000.  */
+  if ((long) b < 0)
+    return a >= b;
+
+  /* Effectively: a & 0x80000000.  */
+  if ((long) a < 0)
+    {
+      int tmp = 0;
+
+      if (b == 0)
+	return 0xffffffff;
+#ifdef LZ
+      tmp = LZ (b);
+#else
+      for (tmp = 31; (((long) b & (1 << tmp)) == 0); tmp--)
+	;
+
+      tmp = 31 - tmp;
+#endif
+
+      if ((b << tmp) > a)
+	{
+	  extra = 1 << (tmp-1);
+	  a -= b << (tmp - 1);
+	}
+      else
+	{
+	  extra = 1 << tmp;
+	  a -= b << tmp;
+	}
+    }
+
+  return do_31div (a, b).quot+extra;
+}
+#endif /* L_udivsi3 */
+
+#ifdef L_divsi3
+long
+__Div (long a, long b) __attribute__ ((__const__));
+
+long
+__Div (long a, long b)
+{
+  long extra = 0;
+  long sign = (b < 0) ? -1 : 1;
+  long res;
+
+  /* We need to handle a == -2147483648 as expected and must while
+     doing that avoid producing a sequence like "abs (a) < 0" as GCC
+     may optimize out the test.  That sequence may not be obvious as
+     we call inline functions.  Testing for a being negative and
+     handling (presumably much rarer than positive) enables us to get
+     a bit of optimization for an (accumulated) reduction of the
+     penalty of the 0x80000000 special-case.  */
+  if (a < 0)
+    {
+      sign = -sign;
+
+      if ((a & 0x7fffffff) == 0)
+	{
+	  /* We're at 0x80000000.  Tread carefully.  */
+	  a -= SIGNMULT (sign, b);
+	  extra = sign;
+	}
+      a = -a;
+    }
+
+  res = do_31div (a, __builtin_labs (b)).quot;
+  return SIGNMULT (sign, res) + extra;
+}
+#endif /* L_divsi3 */
+
+
+#ifdef L_umodsi3
+unsigned long
+__Umod (unsigned long a, unsigned long b) __attribute__ ((__const__));
+
+unsigned long
+__Umod (unsigned long a, unsigned long b)
+{
+  /* Adjust operands and result if a and/or b is 32 bits.  */
+  if ((long) b < 0)
+    return a >= b ? a - b : a;
+
+  if ((long) a < 0)
+    {
+      int tmp = 0;
+
+      if (b == 0)
+	return a;
+#ifdef LZ
+      tmp = LZ (b);
+#else
+      for (tmp = 31; (((long) b & (1 << tmp)) == 0); tmp--)
+	;
+      tmp = 31 - tmp;
+#endif
+
+      if ((b << tmp) > a)
+	{
+	  a -= b << (tmp - 1);
+	}
+      else
+	{
+	  a -= b << tmp;
+	}
+    }
+
+  return do_31div (a, b).rem;
+}
+#endif /* L_umodsi3 */
+
+#ifdef L_modsi3
+long
+__Mod (long a, long b) __attribute__ ((__const__));
+
+long
+__Mod (long a, long b)
+{
+  long sign = 1;
+  long res;
+
+  /* We need to handle a == -2147483648 as expected and must while
+     doing that avoid producing a sequence like "abs (a) < 0" as GCC
+     may optimize out the test.  That sequence may not be obvious as
+     we call inline functions.  Testing for a being negative and
+     handling (presumably much rarer than positive) enables us to get
+     a bit of optimization for an (accumulated) reduction of the
+     penalty of the 0x80000000 special-case.  */
+  if (a < 0)
+    {
+      sign = -1;
+      if ((a & 0x7fffffff) == 0)
+	/* We're at 0x80000000.  Tread carefully.  */
+	a += __builtin_labs (b);
+      a = -a;
+    }
+
+  res = do_31div (a, __builtin_labs (b)).rem;
+  return SIGNMULT (sign, res);
+}
+#endif /* L_modsi3 */
+#endif /* L_udivsi3 || L_divsi3 || L_umodsi3 || L_modsi3 */
+
+/*
+ * Local variables:
+ * eval: (c-set-style "gnu")
+ * indent-tabs-mode: t
+ * End:
+ */
diff --git a/gcc-4.9/libgcc/config/cris/libgcc-glibc.ver b/gcc-4.9/libgcc/config/cris/libgcc-glibc.ver
new file mode 100644
index 000000000..e35de8310
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/libgcc-glibc.ver
@@ -0,0 +1,7 @@
+GCC_4.3 {
+ __Mul
+ __Div
+ __Udiv
+ __Mod
+ __Umod
+}
diff --git a/gcc-4.9/libgcc/config/cris/mulsi3.S b/gcc-4.9/libgcc/config/cris/mulsi3.S
new file mode 100644
index 000000000..240895df0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/mulsi3.S
@@ -0,0 +1,269 @@
+;; Copyright (C) 2001-2014 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it under
+;; the terms of the GNU General Public License as published by the Free
+;; Software Foundation; either version 3, or (at your option) any later
+;; version.
+;;
+;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+;; for more details.
+;;
+;; Under Section 7 of GPL version 3, you are granted additional
+;; permissions described in the GCC Runtime Library Exception, version
+;; 3.1, as published by the Free Software Foundation.
+;;
+;; You should have received a copy of the GNU General Public License and
+;; a copy of the GCC Runtime Library Exception along with this program;
+;; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+;; <http://www.gnu.org/licenses/>.
+;;
+;; This code used to be expanded through interesting expansions in
+;; the machine description, compiled from this code:
+;;
+;; #ifdef L_mulsi3
+;; long __Mul (unsigned long a, unsigned long b) __attribute__ ((__const__));
+;; 
+;; /* This must be compiled with the -mexpand-mul flag, to synthesize the
+;;    multiplication from the mstep instructions.  The check for
+;;    smaller-size multiplication pays off in the order of .5-10%;
+;;    estimated median 1%, depending on application.
+;;     FIXME: It can be further optimized if we go to assembler code, as
+;;    gcc 2.7.2 adds a few unnecessary instructions and does not put the
+;;    basic blocks in optimal order.  */
+;; long
+;; __Mul (unsigned long a, unsigned long b)
+;; {
+;; #if defined (__CRIS_arch_version) && __CRIS_arch_version >= 10
+;;   /* In case other code is compiled without -march=v10, they will
+;; 	contain calls to __Mul, regardless of flags at link-time.  The
+;; 	"else"-code below will work, but is unnecessarily slow.  This
+;; 	sometimes cuts a few minutes off from simulation time by just
+;; 	returning a "mulu.d".  */
+;;   return a * b;
+;; #else
+;;   unsigned long min;
+;; 
+;;   /* Get minimum via the bound insn.  */
+;;   min = a < b ? a : b;
+;; 
+;;   /* Can we omit computation of the high part?	*/
+;;   if (min > 65535)
+;;     /* No.  Perform full multiplication.  */
+;;     return a * b;
+;;   else
+;;     {
+;; 	 /* Check if both operands are within 16 bits.  */
+;; 	 unsigned long max;
+;; 
+;; 	 /* Get maximum, by knowing the minimum.
+;; 	    This will partition a and b into max and min.
+;; 	    This is not currently something GCC understands,
+;; 	    so do this trick by asm.  */
+;; 	 __asm__ ("xor %1,%0\n\txor %2,%0"
+;; 		  : "=r" (max)
+;; 		  :  "r" (b), "r" (a), "0" (min));
+;; 
+;;     if (max > 65535)
+;; 	 /* Make GCC understand that only the low part of "min" will be
+;; 	    used.  */
+;; 	 return max * (unsigned short) min;
+;;     else
+;; 	 /* Only the low parts of both operands are necessary.  */
+;; 	 return ((unsigned short) max) * (unsigned short) min;
+;;     }
+;; #endif /* not __CRIS_arch_version >= 10 */
+;; }
+;; #endif /* L_mulsi3 */
+;;
+;; That approach was abandoned since the caveats outweighted the
+;; benefits.  The expand-multiplication machinery is also removed, so you
+;; can't do this anymore.
+;;
+;; For doubters of there being any benefits, some where: insensitivity to:
+;; - ABI changes (mostly for experimentation)
+;; - assembler syntax differences (mostly debug format).
+;; - insn scheduling issues.
+;; Most ABI experiments will presumably happen with arches with mul insns,
+;; so that argument doesn't really hold anymore, and it's unlikely there
+;; being new arch variants needing insn scheduling and not having mul
+;; insns.
+
+;; ELF and a.out have different syntax for local labels: the "wrong"
+;; one may not be omitted from the object.
+#undef L
+#ifdef __AOUT__
+# define L(x) x
+#else
+# define L(x) .x
+#endif
+
+	.global ___Mul
+	.type	___Mul,@function
+___Mul:
+#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 10
+;; Can't have the mulu.d last on a cache-line (in the delay-slot of the
+;; "ret"), due to hardware bug.  See documentation for -mmul-bug-workaround.
+;; Not worthwhile to conditionalize here.
+	.p2alignw 2,0x050f
+	mulu.d $r11,$r10
+	ret
+	nop
+#else
+;; See if we can avoid multiplying some of the parts, knowing
+;; they're zero.
+
+	move.d $r11,$r9
+	bound.d $r10,$r9
+	cmpu.w 65535,$r9
+	bls L(L3)
+	move.d $r10,$r12
+
+;; Nope, have to do all the parts of a 32-bit multiplication.
+;; See head comment in optabs.c:expand_doubleword_mult.
+
+	move.d $r10,$r13
+	movu.w $r11,$r9 ; ab*cd = (a*d + b*c)<<16 + b*d
+	lslq 16,$r13
+	mstep $r9,$r13	; d*b
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	clear.w $r10
+	test.d $r10
+	mstep $r9,$r10	; d*a
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	movu.w $r12,$r12
+	clear.w $r11
+	move.d $r11,$r9 ; Doubles as a "test.d" preparing for the mstep.
+	mstep $r12,$r9	; b*c
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	mstep $r12,$r9
+	add.w $r9,$r10
+	lslq 16,$r10
+	ret
+	add.d $r13,$r10
+
+L(L3):
+;; Form the maximum in $r10, by knowing the minimum, $r9.
+;; (We don't know which one of $r10 or $r11 it is.)
+;; Check if the largest operand is still just 16 bits.
+
+	xor $r9,$r10
+	xor $r11,$r10
+	cmpu.w 65535,$r10
+	bls L(L5)
+	movu.w $r9,$r13
+
+;; We have ab*cd = (a*c)<<32 + (a*d + b*c)<<16 + b*d, but c==0
+;; so we only need (a*d)<<16 + b*d with d = $r13, ab = $r10.
+;; We drop the upper part of (a*d)<<16 as we're only doing a
+;; 32-bit-result multiplication.
+
+	move.d $r10,$r9
+	lslq 16,$r9
+	mstep $r13,$r9	; b*d
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	clear.w $r10
+	test.d $r10
+	mstep $r13,$r10	; a*d
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	lslq 16,$r10
+	ret
+	add.d $r9,$r10
+
+L(L5):
+;; We have ab*cd = (a*c)<<32 + (a*d + b*c)<<16 + b*d, but a and c==0
+;; so b*d (with b=$r13, a=$r10) it is.
+
+	lslq 16,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	ret
+	mstep $r13,$r10
+#endif
+L(Lfe1):
+	.size	___Mul,L(Lfe1)-___Mul
diff --git a/gcc-4.9/libgcc/config/cris/sfp-machine.h b/gcc-4.9/libgcc/config/cris/sfp-machine.h
new file mode 100644
index 000000000..abef282e0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/sfp-machine.h
@@ -0,0 +1,81 @@
+/* Soft-FP definitions for CRIS.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+/* FIXME: none of the *MEAT* macros have actually been benchmarked to be
+   better than any other choice for any CRIS variant.  */
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_QNANNEGATEDP 0
+#define _FP_KEEPNANFRACP 1
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+# define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/cris/t-cris b/gcc-4.9/libgcc/config/cris/t-cris
new file mode 100644
index 000000000..b582974a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/t-cris
@@ -0,0 +1,10 @@
+LIB2ADD = _udivsi3.c _divsi3.c _umodsi3.c _modsi3.c
+
+# The fixed-point arithmetic code is in one file, arit.c,
+# similar to libgcc2.c (or the old libgcc1.c).  We need to
+# "split it up" with one file per define.
+$(LIB2ADD): $(srcdir)/config/cris/arit.c
+	name=`echo $@ | sed -e 's,.*/,,' | sed -e 's,.c$$,,'`; \
+	echo "#define L$$name" > tmp-$@ \
+	&& echo '#include "$<"' >> tmp-$@ \
+	&& mv -f tmp-$@ $@
diff --git a/gcc-4.9/libgcc/config/cris/t-elfmulti b/gcc-4.9/libgcc/config/cris/t-elfmulti
new file mode 100644
index 000000000..308ef5105
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/t-elfmulti
@@ -0,0 +1,3 @@
+LIB2ADD_ST = $(srcdir)/config/cris/mulsi3.S $(srcdir)/config/cris/umulsidi3.S
+
+CRTSTUFF_T_CFLAGS = -moverride-best-lib-options
diff --git a/gcc-4.9/libgcc/config/cris/t-linux b/gcc-4.9/libgcc/config/cris/t-linux
new file mode 100644
index 000000000..8c7f4d442
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/t-linux
@@ -0,0 +1,2 @@
+# Override t-linux default.
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/cris/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/cris/umulsidi3.S b/gcc-4.9/libgcc/config/cris/umulsidi3.S
new file mode 100644
index 000000000..b5f011cab
--- /dev/null
+++ b/gcc-4.9/libgcc/config/cris/umulsidi3.S
@@ -0,0 +1,289 @@
+;; Copyright (C) 2001-2014 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it under
+;; the terms of the GNU General Public License as published by the Free
+;; Software Foundation; either version 3, or (at your option) any later
+;; version.
+;;
+;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+;; for more details.
+;;
+;; Under Section 7 of GPL version 3, you are granted additional
+;; permissions described in the GCC Runtime Library Exception, version
+;; 3.1, as published by the Free Software Foundation.
+;;
+;; You should have received a copy of the GNU General Public License and
+;; a copy of the GCC Runtime Library Exception along with this program;
+;; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+;; <http://www.gnu.org/licenses/>.
+;;
+;; This code is derived from mulsi3.S, observing that the mstep*16-based
+;; multiplications there, from which it is formed, are actually
+;; zero-extending; in gcc-speak "umulhisi3".  The difference to *this*
+;; function is just a missing top mstep*16 sequence and shifts and 64-bit
+;; additions for the high part.  Compared to an implementation based on
+;; calling __Mul four times (see default implementation of umul_ppmm in
+;; longlong.h), this will complete in a time between a fourth and a third
+;; of that, assuming the value-based optimizations don't strike.  If they
+;; all strike there (very often) but none here, we still win, though by a
+;; lesser margin, due to lesser total overhead.
+
+#define L(x) .x
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+#ifdef __USER_LABEL_PREFIX__
+# define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+#else
+# define SYM(x) x
+#endif
+
+	.global SYM(__umulsidi3)
+	.type	SYM(__umulsidi3),@function
+SYM(__umulsidi3):
+#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 10
+;; Can't have the mulu.d last on a cache-line, due to a hardware bug.  See
+;; the documentation for -mmul-bug-workaround.
+;; Not worthwhile to conditionalize here.
+	.p2alignw 2,0x050f
+	mulu.d $r11,$r10
+	ret
+	move $mof,$r11
+#else
+	move.d $r11,$r9
+	bound.d $r10,$r9
+	cmpu.w 65535,$r9
+	bls L(L3)
+	move.d $r10,$r12
+
+	move.d $r10,$r13
+	movu.w $r11,$r9 ; ab*cd = (a*c)<<32 (a*d + b*c)<<16 + b*d
+
+;; We're called for floating point numbers very often with the "low" 16
+;; bits zero, so it's worthwhile to optimize for that.
+
+	beq L(L6)	; d == 0?
+	lslq 16,$r13
+
+	beq L(L7)	; b == 0?
+	clear.w $r10
+
+	mstep $r9,$r13	; d*b
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+	mstep $r9,$r13
+
+L(L7):
+	test.d $r10
+	mstep $r9,$r10	; d*a
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+	mstep $r9,$r10
+
+;; d*a in $r10, d*b in $r13, ab in $r12 and cd in $r11
+;; $r9 = d, need to do b*c and a*c; we can drop d.
+;; so $r9 is up for use and we can shift down $r11 as the mstep
+;; source for the next mstep-part.
+
+L(L8):
+	lsrq 16,$r11
+	move.d $r12,$r9
+	lslq 16,$r9
+	beq L(L9)	; b == 0?
+	mstep $r11,$r9
+
+	mstep $r11,$r9	; b*c
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+	mstep $r11,$r9
+L(L9):
+
+;; d*a in $r10, d*b in $r13, c*b in $r9, ab in $r12 and c in $r11,
+;; need to do a*c.  We want that to end up in $r11, so we shift up $r11 to
+;; now use as the destination operand.  We'd need a test insn to update N
+;; to do it the other way round.
+
+	lsrq 16,$r12
+	lslq 16,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+	mstep $r12,$r11
+
+;; d*a in $r10, d*b in $r13, c*b in $r9, a*c in $r11 ($r12 free).
+;; Need (a*d + b*c)<<16 + b*d into $r10 and
+;; a*c + (a*d + b*c)>>16 plus carry from the additions into $r11.
+
+	add.d $r9,$r10	; (a*d + b*c) - may produce a carry.
+	scs $r12	; The carry corresponds to bit 16 of $r11.
+	lslq 16,$r12
+	add.d $r12,$r11	; $r11 = a*c + carry from (a*d + b*c).
+
+#if defined (__CRIS_arch_version) && __CRIS_arch_version >= 8
+	swapw $r10
+	addu.w $r10,$r11 ; $r11 = a*c + (a*d + b*c) >> 16 including carry.
+	clear.w $r10	; $r10 = (a*d + b*c) << 16
+#else
+	move.d $r10,$r9
+	lsrq 16,$r9
+	add.d $r9,$r11	; $r11 = a*c + (a*d + b*c) >> 16 including carry.
+	lslq 16,$r10	; $r10 = (a*d + b*c) << 16
+#endif
+	add.d $r13,$r10	; $r10 = (a*d + b*c) << 16 + b*d - may produce a carry.
+	scs $r9
+	ret
+	add.d $r9,$r11	; Last carry added to the high-order 32 bits.
+
+L(L6):
+	clear.d $r13
+	ba L(L8)
+	clear.d $r10
+
+L(L11):
+	clear.d $r10
+	ret
+	clear.d $r11
+
+L(L3):
+;; Form the maximum in $r10, by knowing the minimum, $r9.
+;; (We don't know which one of $r10 or $r11 it is.)
+;; Check if the largest operand is still just 16 bits.
+
+	xor $r9,$r10
+	xor $r11,$r10
+	cmpu.w 65535,$r10
+	bls L(L5)
+	movu.w $r9,$r13
+
+;; We have ab*cd = (a*c)<<32 + (a*d + b*c)<<16 + b*d, but c==0
+;; so we only need (a*d)<<16 + b*d with d = $r13, ab = $r10.
+;; Remember that the upper part of (a*d)<<16 goes into the lower part
+;; of $r11 and there may be a carry from adding the low 32 parts.
+	beq L(L11)	; d == 0?
+	move.d $r10,$r9
+
+	lslq 16,$r9
+	beq L(L10)	; b == 0?
+	clear.w $r10
+
+	mstep $r13,$r9	; b*d
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+	mstep $r13,$r9
+L(L10):
+	test.d $r10
+	mstep $r13,$r10	; a*d
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	move.d $r10,$r11
+	lsrq 16,$r11
+	lslq 16,$r10
+	add.d $r9,$r10
+	scs $r12
+	ret
+	add.d $r12,$r11
+
+L(L5):
+;; We have ab*cd = (a*c)<<32 + (a*d + b*c)<<16 + b*d, but a and c==0
+;; so b*d (with min=b=$r13, max=d=$r10) it is.  As it won't overflow the
+;; 32-bit part, just set $r11 to 0.
+
+	lslq 16,$r10
+	clear.d $r11
+
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	mstep $r13,$r10
+	ret
+	mstep $r13,$r10
+#endif
+L(Lfe1):
+	.size	SYM(__umulsidi3),L(Lfe1)-SYM(__umulsidi3)
diff --git a/gcc-4.9/libgcc/config/darwin-64.c b/gcc-4.9/libgcc/config/darwin-64.c
new file mode 100644
index 000000000..504e45a76
--- /dev/null
+++ b/gcc-4.9/libgcc/config/darwin-64.c
@@ -0,0 +1,72 @@
+/* Functions shipped in the ppc64 and x86_64 version of libgcc_s.1.dylib
+   in older Mac OS X versions, preserved for backwards compatibility.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#if defined (__ppc64__) || defined (__x86_64__)
+/* Many of these functions have probably never been used by anyone
+   anywhere on these targets, but it's hard to prove this, so they're defined
+   here.  None are actually necessary, as demonstrated below by defining
+   each function using the operation it implements.  */
+
+typedef long DI;
+typedef unsigned long uDI;
+typedef int SI;
+typedef unsigned int uSI;
+typedef int word_type __attribute__ ((mode (__word__)));
+
+DI __ashldi3 (DI x, word_type c);
+DI __ashrdi3 (DI x, word_type c);
+int __clzsi2 (uSI x);
+word_type __cmpdi2 (DI x, DI y);
+int __ctzsi2 (uSI x);
+DI __divdi3 (DI x, DI y);
+uDI __lshrdi3 (uDI x, word_type c);
+DI __moddi3 (DI x, DI y);
+DI __muldi3 (DI x, DI y);
+DI __negdi2 (DI x);
+int __paritysi2 (uSI x);
+int __popcountsi2 (uSI x);
+word_type __ucmpdi2 (uDI x, uDI y);
+uDI __udivdi3 (uDI x, uDI y);
+uDI __udivmoddi4 (uDI x, uDI y, uDI *r);
+uDI __umoddi3 (uDI x, uDI y);
+
+DI __ashldi3 (DI x, word_type c) { return x << c; }
+DI __ashrdi3 (DI x, word_type c) { return x >> c; }
+int __clzsi2 (uSI x) { return __builtin_clz (x); }
+word_type __cmpdi2 (DI x, DI y) { return x < y ? 0 : x == y ? 1 : 2; }
+int __ctzsi2 (uSI x) { return __builtin_ctz (x); }
+DI __divdi3 (DI x, DI y) { return x / y; }
+uDI __lshrdi3 (uDI x, word_type c) { return x >> c; }
+DI __moddi3 (DI x, DI y) { return x % y; }
+DI __muldi3 (DI x, DI y) { return x * y; }
+DI __negdi2 (DI x) { return -x; }
+int __paritysi2 (uSI x) { return __builtin_parity (x); }
+int __popcountsi2 (uSI x) { return __builtin_popcount (x); }
+word_type __ucmpdi2 (uDI x, uDI y) { return x < y ? 0 : x == y ? 1 : 2; }
+uDI __udivdi3 (uDI x, uDI y) { return x / y; }
+uDI __udivmoddi4 (uDI x, uDI y, uDI *r) { *r = x % y; return x / y; }
+uDI __umoddi3 (uDI x, uDI y) { return x % y; }
+
+#endif /* __ppc64__ || __x86_64__ */
diff --git a/gcc-4.9/libgcc/config/darwin-crt-tm.c b/gcc-4.9/libgcc/config/darwin-crt-tm.c
new file mode 100644
index 000000000..e11a0afb8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/darwin-crt-tm.c
@@ -0,0 +1,105 @@
+/* Provide the runtime infrastructure for the transactional memory lib.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Iain Sandoe <iains@gcc.gnu.org>
+
+   This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "tsystem.h"
+#include <stddef.h>
+#include <dlfcn.h>
+#include <mach-o/dyld.h>
+#include <mach-o/getsect.h>
+
+#ifdef __LP64__
+#define GET_DATA_TMCT(mh,size) \
+  getsectdatafromheader_64 ((struct mach_header_64*) mh, \
+			    "__DATA", "__tm_clone_table", (uint64_t *)size)
+#else
+#define GET_DATA_TMCT(mh,size) \
+  getsectdatafromheader (mh, "__DATA", "__tm_clone_table", (uint32_t *)size)
+#endif
+
+#define WEAK __attribute__((weak))
+
+extern void _ITM_registerTMCloneTable (void *, size_t) WEAK;
+extern void _ITM_deregisterTMCloneTable (void *) WEAK;
+
+#if defined(START) || defined(END)
+static inline void *getTMCloneTable (const void *f, size_t *tmct_siz)
+{
+  char *tmct_fixed, *tmct = NULL;
+  unsigned int i, img_count; 
+  struct mach_header *mh;
+  Dl_info info;
+  
+  if (! dladdr (f, &info) || info.dli_fbase == NULL)
+    abort ();
+  
+  mh = (struct mach_header *) info.dli_fbase;
+  tmct_fixed = GET_DATA_TMCT (mh, tmct_siz);
+  *tmct_siz /= (sizeof (size_t) * 2);
+  /* No tm_clone_table or no clones. */
+  if (tmct_fixed == NULL || *tmct_siz == 0)
+    return NULL; 
+
+  img_count = _dyld_image_count();
+  for (i = 0; i < img_count && tmct == NULL; i++)
+    {
+      if (mh == _dyld_get_image_header(i))
+	tmct = tmct_fixed + (unsigned long)_dyld_get_image_vmaddr_slide(i); 
+    }
+
+  return tmct;
+}
+#endif
+
+#ifdef START
+
+void __doTMRegistrations (void) __attribute__ ((constructor));
+
+void __doTMRegistrations (void)
+{
+  size_t tmct_siz;
+  void *tmct;
+
+  tmct = getTMCloneTable ((const void *)&__doTMRegistrations, &tmct_siz);
+  if (_ITM_registerTMCloneTable != NULL && tmct != NULL)
+    _ITM_registerTMCloneTable (tmct, (size_t)tmct_siz);
+}
+
+#endif
+
+#ifdef END
+
+void __doTMdeRegistrations (void) __attribute__ ((destructor));
+
+void __doTMdeRegistrations (void)
+{
+  size_t tmct_siz;
+  void *tmct;
+
+  tmct = getTMCloneTable ((const void *)&__doTMdeRegistrations, &tmct_siz);
+  if (_ITM_deregisterTMCloneTable != NULL && tmct != NULL)
+    _ITM_deregisterTMCloneTable (tmct);
+}
+
+#endif
diff --git a/gcc-4.9/libgcc/config/darwin-crt3.c b/gcc-4.9/libgcc/config/darwin-crt3.c
new file mode 100644
index 000000000..256bd8d45
--- /dev/null
+++ b/gcc-4.9/libgcc/config/darwin-crt3.c
@@ -0,0 +1,528 @@
+/* __cxa_atexit backwards-compatibility support for Darwin.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Don't do anything if we are compiling for a kext multilib. */
+#ifdef __PIC__
+
+#include "tconfig.h"
+#include "tsystem.h"
+
+#include <dlfcn.h>
+#include <stdbool.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* This file works around two different problems.
+
+   The first problem is that there is no __cxa_atexit on Mac OS versions
+   before 10.4.  It fixes this by providing a complete atexit and
+   __cxa_atexit emulation called from the regular atexit.
+
+   The second problem is that on all shipping versions of Mac OS,
+   __cxa_finalize and exit() don't work right: they don't run routines
+   that were registered while other atexit routines are running.  This
+   is worked around by wrapping each atexit/__cxa_atexit routine with
+   our own routine which ensures that any __cxa_atexit calls while it
+   is running are honoured.
+
+   There are still problems which this does not solve.  Before 10.4,
+   shared objects linked with previous compilers won't have their
+   atexit calls properly interleaved with code compiled with newer
+   compilers.  Also, atexit routines registered from shared objects
+   linked with previous compilers won't get the bug fix.  */
+
+typedef int (*cxa_atexit_p)(void (*func) (void*), void* arg, const void* dso);
+typedef void (*cxa_finalize_p)(const void *dso);
+typedef int (*atexit_p)(void (*func)(void));
+
+/* These are from "keymgr.h".  */
+extern void *_keymgr_get_and_lock_processwide_ptr (unsigned key);
+extern int _keymgr_get_and_lock_processwide_ptr_2 (unsigned, void **);
+extern int _keymgr_set_and_unlock_processwide_ptr (unsigned key, void *ptr);
+
+extern void *__keymgr_global[];
+typedef struct _Sinfo_Node {
+        unsigned int size ;             /*size of this node*/
+        unsigned short major_version ;  /*API major version.*/
+        unsigned short minor_version ;  /*API minor version.*/
+        } _Tinfo_Node ;
+
+#ifdef __ppc__
+#define CHECK_KEYMGR_ERROR(e) \
+  (((_Tinfo_Node *)__keymgr_global[2])->major_version >= 4 ? (e) : 0)
+#else
+#define CHECK_KEYMGR_ERROR(e) (e)
+#endif
+
+/* Our globals are stored under this keymgr index.  */
+#define KEYMGR_ATEXIT_LIST	14
+
+/* The different kinds of callback routines.  */
+typedef void (*atexit_callback)(void);
+typedef void (*cxa_atexit_callback)(void *);
+
+/* This structure holds a routine to call.  There may be extra fields
+   at the end of the structure that this code doesn't know about.  */
+struct one_atexit_routine 
+{
+  union {
+    atexit_callback ac;
+    cxa_atexit_callback cac;
+  } callback;
+  /* has_arg is 0/2/4 if 'ac' is live, 1/3/5 if 'cac' is live.  
+     Higher numbers indicate a later version of the structure that this
+     code doesn't understand and will ignore.  */
+  int has_arg;
+  void * arg;
+};
+
+struct atexit_routine_list
+{
+  struct atexit_routine_list * next;
+  struct one_atexit_routine r;
+};
+
+/* The various possibilities for status of atexit().  */
+enum atexit_status {
+  atexit_status_unknown = 0,
+  atexit_status_missing = 1,
+  atexit_status_broken = 2,
+  atexit_status_working = 16
+};
+
+struct keymgr_atexit_list
+{
+  /* Version of this list.  This code knows only about version 0.
+     If the version is higher than 0, this code may add new atexit routines
+     but should not attempt to run the list.  */
+  short version;
+  /* 1 if an atexit routine is currently being run by this code, 0
+     otherwise.  */
+  char running_routines;
+  /* Holds a value from 'enum atexit_status'.  */
+  unsigned char atexit_status;
+  /* The list of atexit and cxa_atexit routines registered.  If
+   atexit_status_missing it contains all routines registered while
+   linked with this code.  If atexit_status_broken it contains all
+   routines registered during cxa_finalize while linked with this
+   code.  */
+  struct atexit_routine_list *l;
+  /* &__cxa_atexit; set if atexit_status >= atexit_status_broken.  */
+  cxa_atexit_p cxa_atexit_f;
+  /* &__cxa_finalize; set if atexit_status >= atexit_status_broken.  */
+  cxa_finalize_p cxa_finalize_f;
+  /* &atexit; set if atexit_status >= atexit_status_working
+     or atexit_status == atexit_status_missing.  */
+  atexit_p atexit_f;
+};
+
+/* Return 0 if __cxa_atexit has the bug it has in Mac OS 10.4: it
+   fails to call routines registered while an atexit routine is
+   running.  Return 1 if it works properly, and -1 if an error occurred.  */
+
+struct atexit_data 
+{
+  int result;
+  cxa_atexit_p cxa_atexit;
+};
+
+static void cxa_atexit_check_2 (void *arg)
+{
+  ((struct atexit_data *)arg)->result = 1;
+}
+
+static void cxa_atexit_check_1 (void *arg)
+{
+  struct atexit_data * aed = arg;
+  if (aed->cxa_atexit (cxa_atexit_check_2, arg, arg) != 0)
+    aed->result = -1;
+}
+
+static int
+check_cxa_atexit (cxa_atexit_p cxa_atexit, cxa_finalize_p cxa_finalize)
+{
+  struct atexit_data aed = { 0, cxa_atexit };
+
+  /* We re-use &aed as the 'dso' parameter, since it's a unique address.  */
+  if (cxa_atexit (cxa_atexit_check_1, &aed, &aed) != 0)
+    return -1;
+  cxa_finalize (&aed);
+  if (aed.result == 0)
+    {
+      /* Call __cxa_finalize again to make sure that cxa_atexit_check_2
+	 is removed from the list before AED goes out of scope.  */
+      cxa_finalize (&aed);
+      aed.result = 0;
+    }
+  return aed.result;
+}
+
+#ifdef __ppc__
+/* This comes from Csu.  It works only before 10.4.  The prototype has
+   been altered a bit to avoid casting.  */
+extern int _dyld_func_lookup(const char *dyld_func_name,
+     void *address) __attribute__((visibility("hidden")));
+
+static void our_atexit (void);
+
+/* We're running on 10.3.9.  Find the address of the system atexit()
+   function.  So easy to say, so hard to do.  */
+static atexit_p
+find_atexit_10_3 (void)
+{
+  unsigned int (*dyld_image_count_fn)(void);
+  const char *(*dyld_get_image_name_fn)(unsigned int image_index);
+  const void *(*dyld_get_image_header_fn)(unsigned int image_index);
+  const void *(*NSLookupSymbolInImage_fn)(const void *image, 
+					  const char *symbolName,
+					  unsigned int options);
+  void *(*NSAddressOfSymbol_fn)(const void *symbol);
+  unsigned i, count;
+  
+  /* Find some dyld functions.  */
+  _dyld_func_lookup("__dyld_image_count", &dyld_image_count_fn);
+  _dyld_func_lookup("__dyld_get_image_name", &dyld_get_image_name_fn);
+  _dyld_func_lookup("__dyld_get_image_header", &dyld_get_image_header_fn);
+  _dyld_func_lookup("__dyld_NSLookupSymbolInImage", &NSLookupSymbolInImage_fn);
+  _dyld_func_lookup("__dyld_NSAddressOfSymbol", &NSAddressOfSymbol_fn);
+
+  /* If any of these don't exist, that's an error.  */
+  if (! dyld_image_count_fn || ! dyld_get_image_name_fn
+      || ! dyld_get_image_header_fn || ! NSLookupSymbolInImage_fn
+      || ! NSAddressOfSymbol_fn)
+    return NULL;
+  
+  count = dyld_image_count_fn ();
+  for (i = 0; i < count; i++)
+    {
+      const char * path = dyld_get_image_name_fn (i);
+      const void * image;
+      const void * symbol;
+      
+      if (strcmp (path, "/usr/lib/libSystem.B.dylib") != 0)
+	continue;
+      image = dyld_get_image_header_fn (i);
+      if (! image)
+	return NULL;
+      /* '4' is NSLOOKUPSYMBOLINIMAGE_OPTION_RETURN_ON_ERROR.  */
+      symbol = NSLookupSymbolInImage_fn (image, "_atexit", 4);
+      if (! symbol)
+	return NULL;
+      return NSAddressOfSymbol_fn (symbol);
+    }
+  return NULL;
+}
+#endif
+
+/* Create (if necessary), find, lock, fill in, and return our globals.  
+   Return NULL on error, in which case the globals will not be locked.  
+   The caller should call keymgr_set_and_unlock.  */
+static struct keymgr_atexit_list *
+get_globals (void)
+{
+  struct keymgr_atexit_list * r;
+  
+#ifdef __ppc__
+  /* 10.3.9 doesn't have _keymgr_get_and_lock_processwide_ptr_2 so the
+     PPC side can't use it.  On 10.4 this just means the error gets
+     reported a little later when
+     _keymgr_set_and_unlock_processwide_ptr finds that the key was
+     never locked.  */
+  r = _keymgr_get_and_lock_processwide_ptr (KEYMGR_ATEXIT_LIST);
+#else
+  void * rr;
+  if (_keymgr_get_and_lock_processwide_ptr_2 (KEYMGR_ATEXIT_LIST, &rr))
+    return NULL;
+  r = rr;
+#endif
+  
+  if (r == NULL)
+    {
+      r = calloc (sizeof (struct keymgr_atexit_list), 1);
+      if (! r)
+	return NULL;
+    }
+
+  if (r->atexit_status == atexit_status_unknown)
+    {
+      void *handle;
+
+      handle = dlopen ("/usr/lib/libSystem.B.dylib", RTLD_NOLOAD);
+      if (!handle)
+	{
+#ifdef __ppc__
+	  r->atexit_status = atexit_status_missing;
+	  r->atexit_f = find_atexit_10_3 ();
+	  if (! r->atexit_f)
+	    goto error;
+	  if (r->atexit_f (our_atexit))
+	    goto error;
+#else
+	  goto error;
+#endif
+	}
+      else
+	{
+	  int chk_result;
+
+	  r->cxa_atexit_f = (cxa_atexit_p)dlsym (handle, "__cxa_atexit");
+	  r->cxa_finalize_f = (cxa_finalize_p)dlsym (handle, "__cxa_finalize");
+	  if (! r->cxa_atexit_f || ! r->cxa_finalize_f)
+	    goto error;
+
+	  chk_result = check_cxa_atexit (r->cxa_atexit_f, r->cxa_finalize_f);
+	  if (chk_result == -1)
+	    goto error;
+	  else if (chk_result == 0)
+	    r->atexit_status = atexit_status_broken;
+	  else
+	    {
+	      r->atexit_f = (atexit_p)dlsym (handle, "atexit");
+	      if (! r->atexit_f)
+		goto error;
+	      r->atexit_status = atexit_status_working;
+	    }
+	}
+    }
+
+  return r;
+  
+ error:
+  _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, r);
+  return NULL;
+}
+
+/* Add TO_ADD to ATEXIT_LIST.  ATEXIT_LIST may be NULL but is
+   always the result of calling _keymgr_get_and_lock_processwide_ptr and
+   so KEYMGR_ATEXIT_LIST is known to be locked; this routine is responsible
+   for unlocking it.  */
+
+static int
+add_routine (struct keymgr_atexit_list * g,
+	     const struct one_atexit_routine * to_add)
+{
+  struct atexit_routine_list * s
+    = malloc (sizeof (struct atexit_routine_list));
+  int result;
+  
+  if (!s)
+    {
+      _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+      return -1;
+    }
+  s->r = *to_add;
+  s->next = g->l;
+  g->l = s;
+  result = _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+  return CHECK_KEYMGR_ERROR (result) == 0 ? 0 : -1;
+}
+
+/* This runs the routines in G->L up to STOP.  */
+static struct keymgr_atexit_list *
+run_routines (struct keymgr_atexit_list *g,
+	      struct atexit_routine_list *stop)
+{
+  for (;;)
+    {
+      struct atexit_routine_list * cur = g->l;
+      if (! cur || cur == stop)
+	break;
+      g->l = cur->next;
+      _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+
+      switch (cur->r.has_arg) {
+      case 0: case 2: case 4:
+	cur->r.callback.ac ();
+	break;
+      case 1: case 3: case 5:
+	cur->r.callback.cac (cur->r.arg);
+	break;
+      default:
+	/* Don't understand, so don't call it.  */
+	break;
+      }
+      free (cur);
+
+      g = _keymgr_get_and_lock_processwide_ptr (KEYMGR_ATEXIT_LIST);
+      if (! g)
+	break;
+    }
+  return g;
+}
+
+/* Call the routine described by ROUTINE_PARAM and then call any
+   routines added to KEYMGR_ATEXIT_LIST while that routine was
+   running, all with in_cxa_finalize set.  */
+
+static void
+cxa_atexit_wrapper (void* routine_param)
+{
+  struct one_atexit_routine * routine = routine_param;
+  struct keymgr_atexit_list *g;
+  struct atexit_routine_list * base = NULL;
+  char prev_running = 0;
+  
+  g = _keymgr_get_and_lock_processwide_ptr (KEYMGR_ATEXIT_LIST);
+  if (g)
+    {
+      prev_running = g->running_routines;
+      g->running_routines = 1;
+      base = g->l;
+      _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+    }
+
+  if (routine->has_arg)
+    routine->callback.cac (routine->arg);
+  else
+    routine->callback.ac ();
+
+  if (g)
+    g = _keymgr_get_and_lock_processwide_ptr (KEYMGR_ATEXIT_LIST);
+  if (g)
+    g = run_routines (g, base);
+  if (g)
+    {
+      g->running_routines = prev_running;
+      _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+    }
+}
+
+#ifdef __ppc__
+/* This code is used while running on 10.3.9, when __cxa_atexit doesn't
+   exist in the system library.  10.3.9 only supported regular PowerPC,
+   so this code isn't necessary on x86 or ppc64.  */
+
+/* This routine is called from the system atexit(); it runs everything
+   registered on the KEYMGR_ATEXIT_LIST.  */
+
+static void
+our_atexit (void)
+{
+  struct keymgr_atexit_list *g;
+  char prev_running;
+
+  g = _keymgr_get_and_lock_processwide_ptr (KEYMGR_ATEXIT_LIST);
+  if (! g || g->version != 0 || g->atexit_status != atexit_status_missing)
+    return;
+  
+  prev_running = g->running_routines;
+  g->running_routines = 1;
+  g = run_routines (g, NULL);
+  if (! g)
+    return;
+  g->running_routines = prev_running;
+  _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+}
+#endif
+
+/* This is our wrapper around atexit and __cxa_atexit.  It will return
+   nonzero if an error occurs, and otherwise:
+   - if in_cxa_finalize is set, or running on 10.3.9, add R to
+     KEYMGR_ATEXIT_LIST; or
+   - call the system __cxa_atexit to add cxa_atexit_wrapper with an argument
+     that indicates how cxa_atexit_wrapper should call R.  */
+
+static int
+atexit_common (const struct one_atexit_routine *r, const void *dso)
+{
+  struct keymgr_atexit_list *g = get_globals ();
+
+  if (! g)
+    return -1;
+  
+  if (g->running_routines || g->atexit_status == atexit_status_missing)
+    return add_routine (g, r);
+
+  if (g->atexit_status >= atexit_status_working)
+    {
+      int result;
+      if (r->has_arg)
+	{
+	  cxa_atexit_p cxa_atexit = g->cxa_atexit_f;
+	  result = _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST,
+							   g);
+	  if (CHECK_KEYMGR_ERROR (result))
+	    return -1;
+	  return cxa_atexit (r->callback.cac, r->arg, dso);
+	}
+      else
+	{
+	  atexit_p atexit_f = g->atexit_f;
+	  result = _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST,
+							   g);
+	  if (CHECK_KEYMGR_ERROR (result))
+	    return -1;
+	  return atexit_f (r->callback.ac);
+	}
+    }
+  else
+    {
+      cxa_atexit_p cxa_atexit = g->cxa_atexit_f;
+      struct one_atexit_routine *alloced;
+      int result;
+
+      result = _keymgr_set_and_unlock_processwide_ptr (KEYMGR_ATEXIT_LIST, g);
+      if (CHECK_KEYMGR_ERROR (result))
+	return -1;
+
+      alloced = malloc (sizeof (struct one_atexit_routine));
+      if (! alloced)
+	return -1;
+      *alloced = *r;
+      return cxa_atexit (cxa_atexit_wrapper, alloced, dso);
+    }
+}
+
+/* These are the actual replacement routines; they just funnel into
+   atexit_common.  */
+
+int __cxa_atexit (cxa_atexit_callback func, void* arg, 
+		  const void* dso) __attribute__((visibility("hidden")));
+
+int
+__cxa_atexit (cxa_atexit_callback func, void* arg, const void* dso)
+{
+  struct one_atexit_routine r;
+  r.callback.cac = func;
+  r.has_arg = 1;
+  r.arg = arg;
+  return atexit_common (&r, dso);
+}
+
+int atexit (atexit_callback func) __attribute__((visibility("hidden")));
+
+/* Use __dso_handle to allow even bundles that call atexit() to be unloaded
+   on 10.4.  */
+extern void __dso_handle;
+
+int
+atexit (atexit_callback func)
+{
+  struct one_atexit_routine r;
+  r.callback.ac = func;
+  r.has_arg = 0;
+  return atexit_common (&r, &__dso_handle);
+}
+
+#endif /* __PIC__ */
diff --git a/gcc-4.9/libgcc/config/epiphany/crti.S b/gcc-4.9/libgcc/config/epiphany/crti.S
new file mode 100644
index 000000000..f50270adb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crti.S
@@ -0,0 +1,34 @@
+# Start .init and .fini sections.
+# Copyright (C) 2010-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	.global	init
+	.balign 2
+init:
+	str lr,[sp],-4
+
+	.section .fini
+	.global	fini
+	.balign 2
+fini:
+	str lr,[sp],-4
diff --git a/gcc-4.9/libgcc/config/epiphany/crtint.S b/gcc-4.9/libgcc/config/epiphany/crtint.S
new file mode 100644
index 000000000..bd01e4dfc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crtint.S
@@ -0,0 +1,27 @@
+# initialize config for -mfp-mode=int
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	mov r0, %low(#524288)
+	movt r0, %high(#524288)
+	movts config,r0
diff --git a/gcc-4.9/libgcc/config/epiphany/crtm1reg-r43.S b/gcc-4.9/libgcc/config/epiphany/crtm1reg-r43.S
new file mode 100644
index 000000000..0df47ef44
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crtm1reg-r43.S
@@ -0,0 +1,26 @@
+# initialize config for -m1reg-r43
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	mov r0, 0
+	sub r43,r0,1
diff --git a/gcc-4.9/libgcc/config/epiphany/crtm1reg-r63.S b/gcc-4.9/libgcc/config/epiphany/crtm1reg-r63.S
new file mode 100644
index 000000000..473abee2a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crtm1reg-r63.S
@@ -0,0 +1,26 @@
+# initialize config for -m1reg-r63
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	mov r0, 0
+	sub r63,r0,1
diff --git a/gcc-4.9/libgcc/config/epiphany/crtn.S b/gcc-4.9/libgcc/config/epiphany/crtn.S
new file mode 100644
index 000000000..b21bb32b8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crtn.S
@@ -0,0 +1,32 @@
+# End .init and .fini sections.
+# Copyright (C) 2010-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	ldr lr,[sp,4]
+	add sp,sp,16
+	jr lr
+
+	.section .fini
+	ldr lr,[sp,4]
+	add sp,sp,16
+	jr lr
diff --git a/gcc-4.9/libgcc/config/epiphany/crtrunc.S b/gcc-4.9/libgcc/config/epiphany/crtrunc.S
new file mode 100644
index 000000000..95349c86a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/crtrunc.S
@@ -0,0 +1,26 @@
+# initialize config for -mfp-mode=truncate
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+	.section .init
+	mov r0, 1
+	movts config,r0
diff --git a/gcc-4.9/libgcc/config/epiphany/divsi3-float.S b/gcc-4.9/libgcc/config/epiphany/divsi3-float.S
new file mode 100644
index 000000000..1e0183a90
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/divsi3-float.S
@@ -0,0 +1,77 @@
+/* Signed 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__divsi3,T_UINT)
+	.global SYM(__divsi3)
+	.balign 4
+	HIDDEN_FUNC(__divsi3)
+SYM(__divsi3):
+	float TMP2,r0
+	  mov TMP4,0
+	float TMP1,r1
+	  sub TMP0,TMP4,r0
+	beq .Lret_r0
+	movgt r0,TMP0
+	sub TMP0,TMP4,r1
+	movgt r1,TMP0
+	mov TMP0,1
+	sub TMP2,TMP2,TMP1
+	asr TMP3,TMP2,31 ; save sign
+	lsl TMP2,TMP2,1
+	blt .Lret0
+	sub TMP1,TMP2,1 ; rounding compensation, avoid overflow
+	movgte TMP2,TMP1
+	lsr TMP2,TMP2,24
+	lsl r1,r1,TMP2
+	lsl TMP0,TMP0,TMP2
+	sub TMP1,r0,r1
+	movgteu r0,TMP1
+	movgteu TMP4,TMP0
+	lsl TMP5,TMP0,1
+	sub TMP1,r0,r1
+	movgteu r0,TMP1
+	movgteu TMP4,TMP5
+	sub TMP1,r1,1
+	mov r1,%low(.L0step)
+	movt r1,%high(.L0step)
+	lsl TMP2,TMP2,3
+	sub r1,r1,TMP2
+	jr r1
+	.rep 30
+	lsl r0,r0,1
+	sub.l r1,r0,TMP1
+	movgteu r0,r1
+	.endr
+.L0step:sub r1,TMP0,1 ; mask result bits from steps ...
+	and r0,r0,r1
+	orr r0,r0,TMP4 ; ... and combine with first bit.
+	eor r0,r0,TMP3 ; restore sign
+	sub r0,r0,TMP3
+.Lret_r0:rts
+.Lret0:	mov r0,0
+	rts
+	ENDFUNC(__divsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/divsi3.S b/gcc-4.9/libgcc/config/epiphany/divsi3.S
new file mode 100644
index 000000000..1825aa83d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/divsi3.S
@@ -0,0 +1,92 @@
+/* Signed 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__divsi3,T_INT)
+	.global SYM(__divsi3)
+	.balign 4
+	HIDDEN_FUNC(__divsi3)
+SYM(__divsi3):
+	mov r12,0
+	sub r2,r12,r0
+	movlt r2,r0
+	sub r3,r12,r1
+	movlt r3,r1
+	sub r19,r2,r3
+	bltu .Lret0
+	movt r12,0x4000
+	orr r16,r2,r12
+	orr r18,r3,r12
+	 fsub r16,r16,r12
+	fsub r18,r18,r12
+	 movt r12,0x4b80
+	lsr r19,r3,23
+	lsr r17,r2,23
+	movt r17,0x4b80
+	fsub r17,r17,r12
+	 movt r19,0x4b80
+	fsub r19,r19,r12
+	 mov r12,%low(.L0step)
+	movt r12,%high(.L0step)
+	mov r20,0
+	mov r21,1
+	movne r16,r17
+	lsr r17,r3,23
+	movne r18,r19
+	eor r1,r1,r0 ; save sign
+	asr r19,r1,31
+	lsr r1,r16,23
+	lsr r0,r18,23
+	sub r1,r1,r0 ; calculate bit number difference.
+	lsl r3,r3,r1
+	lsr r16,r3,1
+	lsl r0,r21,r1
+	lsl r1,r1,3
+	sub r12,r12,r1
+	sub r3,r2,r3
+	movgteu r2,r3
+	movgteu r20,r0
+	lsr r0,r0,1
+	add r17,r0,r20
+	sub r3,r2,r16
+	movgteu r2,r3
+	movgteu r20,r17
+	sub r16,r16,1
+	jr r12
+	.rep 30
+	lsl r2,r2,1
+	sub r3,r2,r16
+	movgteu r2,r3
+	.endr
+	sub r0,r0,1 ; mask result bits from steps ...
+	and r0,r0,r2
+	orr r20,r0,r20 ; ... and combine with first bit.
+.L0step:eor r0,r20,r19 ; restore sign
+	sub r0,r0,r19
+	rts
+.Lret0:	mov r0,0
+	rts
+	ENDFUNC(__divsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/divsi3.c b/gcc-4.9/libgcc/config/epiphany/divsi3.c
new file mode 100644
index 000000000..fd85be19c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/divsi3.c
@@ -0,0 +1,120 @@
+/* Generic signed 32 bit division implementation.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef union { unsigned int i; float f; } fu;
+
+/* Although the semantics of the function ask for signed / unsigned inputs,
+   for the actual implementation we use unsigned numbers.  */
+unsigned int __divsi3 (unsigned int a, unsigned int b);
+
+unsigned int
+__divsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int sign = (int) (a ^ b) >> 31;
+  unsigned int d, t, s0, s1, s2, r0, r1;
+  fu u0, u1, u2, u1b, u2b;
+
+  a = abs (a);
+  b = abs (b);
+
+  if (b > a)
+    return 0;
+
+  /* Compute difference in number of bits in S0.  */
+  u0.i = 0x40000000;
+  u1b.i = u2b.i = u0.i;
+  u1.i = a;
+  u2.i = b;
+  u1.i = a | u0.i;
+  t = 0x4b800000 | ((a >> 23) & 0xffff);
+  if (a >> 23)
+    {
+      u1.i = t;
+      u1b.i = 0x4b800000;
+    }
+  u2.i = b | u0.i;
+  t = 0x4b800000 | ((b >> 23) & 0xffff);
+  if (b >> 23)
+    {
+      u2.i = t;
+      u2b.i = 0x4b800000;
+    }
+  u1.f = u1.f - u1b.f;
+  u2.f = u2.f - u2b.f;
+  s1 = u1.i >> 23;
+  s2 = u2.i >> 23;
+  s0 = s1 - s2;
+
+  b <<= s0;
+  d = b - 1;
+
+  r0 = 1 << s0;
+  r1 = 0;
+  t = a - b;
+  if (t <= a)
+    {
+      a = t;
+      r1 = r0;
+    }
+
+#define STEP(n) case n: a += a; t = a - d; if (t <= a) a = t;
+  switch (s0)
+    {
+    STEP (31)
+    STEP (30)
+    STEP (29)
+    STEP (28)
+    STEP (27)
+    STEP (26)
+    STEP (25)
+    STEP (24)
+    STEP (23)
+    STEP (22)
+    STEP (21)
+    STEP (20)
+    STEP (19)
+    STEP (18)
+    STEP (17)
+    STEP (16)
+    STEP (15)
+    STEP (14)
+    STEP (13)
+    STEP (12)
+    STEP (11)
+    STEP (10)
+    STEP (9)
+    STEP (8)
+    STEP (7)
+    STEP (6)
+    STEP (5)
+    STEP (4)
+    STEP (3)
+    STEP (2)
+    STEP (1)
+    case 0: ;
+    }
+  r0 = r1 | (r0-1 & a);
+  return (r0 ^ sign) - sign;
+}
diff --git a/gcc-4.9/libgcc/config/epiphany/epiphany-asm.h b/gcc-4.9/libgcc/config/epiphany/epiphany-asm.h
new file mode 100644
index 000000000..1ea8bbae3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/epiphany-asm.h
@@ -0,0 +1,52 @@
+/* Copyright (C) 1995-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+#define STRINGIFY2(a, b) STRINGIFY(a##b)
+#define STRINGIFY(a) #a
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+#define FSTAB(X,T)	.stabs	STRINGIFY2(X##:F,T),36,0,__LINE__,SYM(X)
+#define FUNC(X)		.type SYM(X),@function
+#define HIDDEN_FUNC(X)	FUNC(X)` .hidden SYM(X)
+#define ENDFUNC0(X)	CONCAT1(.Lfe_,X): .size X,CONCAT1(.Lfe_,X)-X
+#define ENDFUNC(X)	ENDFUNC0(SYM(X))
+
+#define TMP0	r12
+#define TMP1	r16
+#define TMP2	r17
+#define TMP3	r18
+#define TMP4	r19
+#define TMP5	r20
+
+#define T_INT (0,1)
+	.stabs	"int:t(0,1)=r(0,1);-2147483648;2147483647;",128,0,1,0
+#define T_UINT (0,2)
+	.stabs	"unsigned int:t(0,2)=r(0,2);0;037777777777;",128,0,1,0
diff --git a/gcc-4.9/libgcc/config/epiphany/ieee-754/eqsf2.S b/gcc-4.9/libgcc/config/epiphany/ieee-754/eqsf2.S
new file mode 100644
index 000000000..63e965ca4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/ieee-754/eqsf2.S
@@ -0,0 +1,50 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../epiphany-asm.h"
+
+	/* Assumption: NaNs have all bits 10..30 and one of bit 0..9 set.  */
+
+	FSTAB (__eqsf2,T_INT)
+	.global SYM(__eqsf2)
+	.balign 4
+	HIDDEN_FUNC(__eqsf2)
+SYM(__eqsf2):
+	sub	TMP0,r0,r1
+	beq	.Lno_bdiff
+	orr	TMP0,r0,r1
+	add	TMP0,TMP0,TMP0
+	rts
+.Lno_bdiff:
+#ifndef FLOAT_FORMAT_MOTOROLA
+	mov	TMP0,0xffff
+	movt	TMP0,0x7f
+	add	TMP0,TMP0,r0
+#else
+	add	TMP0,r0,0x3ff
+#endif
+	eor	TMP0,TMP0,r0
+	lsr	TMP0,TMP0,31
+	rts
+	ENDFUNC(__eqsf2)
diff --git a/gcc-4.9/libgcc/config/epiphany/ieee-754/fast_div.S b/gcc-4.9/libgcc/config/epiphany/ieee-754/fast_div.S
new file mode 100644
index 000000000..06b850609
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/ieee-754/fast_div.S
@@ -0,0 +1,124 @@
+/* Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../epiphany-asm.h"
+
+.section _fast_div_text,"a",@progbits;
+  .balign 8;
+_fast_div_table:
+.word 0x007fffff//   mantissa mask
+.word 0x40257ebb//   hold constant a = 2.58586
+
+.word 0x3f000000//   hold constant 126 shifted to bits [30:23]
+.word 0xc0ba2e88//   hold constant b = -5.81818
+
+.word 0x4087c1e8//   hold constant c = 4.24242
+.word 0x40000000//  to hold constant 2 for Newton-Raphson iterations
+
+ .global SYM(__fast_recipsf2)
+ FUNC(__fast_recipsf2)
+SYM(__fast_recipsf2):
+
+//###################
+//# input operands:
+//###################
+// Divisor
+//R0
+// Function address (used with negative offsets to read _fast_div_table)
+//R1
+/* Scratch registers:  two single (TMP0/TMP5) and two pairs.  */
+#define P0L TMP1
+#define P0H TMP2
+#define P1L TMP3
+#define P1H TMP4
+
+//#########################################
+//# Constants to be used in the algorithm
+//#########################################
+ldrd P0L , [ R1 , -3 ]
+
+ldrd P1L , [ R1 , -2 ]
+
+
+
+//#############################################################################
+//#                       The Algorithm
+//#
+//# Operation: C=A/B
+//# stage 1 - find the reciprocal 1/B according to the following scheme:
+//#  B = (2^E)*m                                (1<m<2, E=e-127)
+//#  1/B = 1/((2^E)*m) = 1/((2^(E+1))*m1)          (0.5<m1<1)
+//#      = (2^-(E+1))*(1/m1) = (2^E1)*(1/m1)
+//#
+//# Now we can find the new exponent:
+//# e1 = E1+127 = -E-1+127 = -e+127-1+127 = 253-e **
+//# 1/m1 alreadt has the exponent 127, so we have to add 126-e.
+//# the exponent might underflow, which we can detect as a sign change.
+//# Since the architeture uses flush-to-zero for subnormals, we can
+//# give the result 0. then.
+//#
+//# The 1/m1 term with 0.5<m1<1 is approximated with the Chebyshev polynomial
+//# 1/m1 = 2.58586*(m1^2) - 5.81818*m1 + 4.24242
+//#
+//# Next step is to use two iterations of Newton-Raphson algorithm to complete
+//# the reciprocal calculation.
+//#
+//# Final result is achieved by multiplying A with 1/B
+//#############################################################################
+
+
+
+// R0 exponent and sign "replacement" into TMP0
+AND TMP0,R0,P0L		 ;
+ORR TMP0,TMP0,P1L
+SUB TMP5,R0,TMP0 // R0 sign/exponent extraction into TMP5
+// Calculate new mantissa
+FMADD P1H,TMP0,P0H	         ;
+		// Calculate new exponent offset 126 - "old exponent"
+		SUB P1L,P1L,TMP5
+	ldrd P0L , [ R1 , -1 ]
+FMADD P0L,TMP0,P1H	         ;
+		eor P1H,r0,P1L // check for overflow (N-BIT).
+		blt .Lret_0
+// P0L exponent and sign "replacement"
+sub P0L,P0L,TMP5
+
+// Newton-Raphson iteration #1
+MOV TMP0,P0H	         ;
+FMSUB P0H,R0,P0L	 ;
+FMUL  P0L,P0H,P0L	 ;
+// Newton-Raphson iteration #2
+FMSUB TMP0,R0,P0L	;
+FMUL  R0,TMP0,P0L	         ;
+jr lr
+.Lret_0:ldrd P0L , [ R1 , -3 ]
+	lsr TMP0,r0,31 ; extract sign
+	lsl TMP0,TMP0,31
+	add P0L,P0L,r0 ; check for NaN input
+	eor P0L,P0L,r0
+	movgte r0,TMP0
+	jr lr
+// Quotient calculation is expected by the caller: FMUL quotient,divident,R0
+        ;
+	ENDFUNC(__fast_recipsf2)
diff --git a/gcc-4.9/libgcc/config/epiphany/ieee-754/gtesf2.S b/gcc-4.9/libgcc/config/epiphany/ieee-754/gtesf2.S
new file mode 100644
index 000000000..a1566c18b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/ieee-754/gtesf2.S
@@ -0,0 +1,66 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../epiphany-asm.h"
+
+	/* Assumptions: NaNs have all bits 10..30 and one of bit 0..9 set.
+			after sub: AC = ~Borrow.
+	   clobber: TMP0
+	   output: gt / gte indicates greater / greater or equal.  */
+
+	FSTAB (__gtesf2,T_INT)
+	.global SYM(__gtesf2)
+	.balign 4
+	HIDDEN_FUNC(__gtesf2)
+SYM(__gtesf2):
+#ifndef FLOAT_FORMAT_MOTOROLA
+	mov	TMP0,0xffff
+	movt	TMP0,0x7f
+	add	TMP0,TMP0,r0
+	eor	TMP0,TMP0,r0
+	blt	.Lret
+	mov	TMP0,0xffff
+	movt	TMP0,0x7f
+	add	TMP0,TMP0,r1
+#else
+	add	TMP0,r0,0x3ff; check for r0 NaN
+	eor	TMP0,TMP0,r0
+	blt	.Lret
+	add	TMP0,r1,0x3ff; check for r1 NaN
+#endif
+	eor	TMP0,TMP0,r1
+	blt	.Lret
+	and	TMP0,r0,r1
+	blt	.Lneg
+	orr	TMP0,r0,r1
+	lsl	TMP0,TMP0,1
+	beq	.Lret
+	sub	TMP0,r0,r1
+.Lret:
+	rts
+	.balign 4
+.Lneg:
+	sub	TMP0,r1,r0
+	rts
+	ENDFUNC(__gtesf2)
diff --git a/gcc-4.9/libgcc/config/epiphany/ieee-754/ordsf2.S b/gcc-4.9/libgcc/config/epiphany/ieee-754/ordsf2.S
new file mode 100644
index 000000000..c0cfaec57
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/ieee-754/ordsf2.S
@@ -0,0 +1,50 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../epiphany-asm.h"
+
+	FSTAB (__ordsf2,T_INT)
+	.global SYM(__ordsf2)
+	.balign 8,,2
+	HIDDEN_FUNC(__ordsf2)
+SYM(__ordsf2):
+#ifndef FLOAT_FORMAT_MOTOROLA
+	mov	TMP0,0
+	movt	TMP0,0xff00
+	lsl	TMP1,r0,1
+	sub	TMP1,TMP1,TMP0
+	bgtu	.Lret
+	lsl	TMP1,r1,1
+	sub	TMP1,TMP1,TMP0
+.Lret:	rts /* ordered: lteu */
+#else
+	/* Assumption: NaNs have all bits 9..30 and one of bit 0..8 set.  */
+	lsl	TMP0,r0,1
+	add	TMP0,TMP0,0x3fe
+	bgteu	.Lret
+	lsl	TMP0,r1,1
+	add	TMP0,TMP0,0x3fe
+.Lret:	rts /* ordered: ltu */
+#endif
+	ENDFUNC(__ordsf2)
diff --git a/gcc-4.9/libgcc/config/epiphany/ieee-754/uneqsf2.S b/gcc-4.9/libgcc/config/epiphany/ieee-754/uneqsf2.S
new file mode 100644
index 000000000..31d9bf3fb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/ieee-754/uneqsf2.S
@@ -0,0 +1,45 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "../epiphany-asm.h"
+
+	FSTAB (__uneqsf2,T_INT)
+	.global SYM(__uneqsf2)
+	.balign 8,,2
+	HIDDEN_FUNC(__uneqsf2)
+SYM(__uneqsf2):
+        sub     TMP0,r0,r1
+        beq     .Lret
+        orr     TMP0,r0,r1
+        add     TMP0,TMP0,TMP0
+        beq     .Lret
+	mov	TMP0,1
+	movt	TMP0,0xff00
+	lsl	TMP1,r0,1
+	sub	TMP1,TMP0,TMP1
+	blteu	.Lret
+	lsl	TMP1,r1,1
+	sub	TMP1,TMP0,TMP1
+.Lret:	rts /* uneq: lteu */
+	ENDFUNC(__uneqsf2)
diff --git a/gcc-4.9/libgcc/config/epiphany/modsi3-float.S b/gcc-4.9/libgcc/config/epiphany/modsi3-float.S
new file mode 100644
index 000000000..76590f082
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/modsi3-float.S
@@ -0,0 +1,65 @@
+/* Unsigned 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__modsi3,T_UINT)
+	.global SYM(__modsi3)
+	.balign 4
+	HIDDEN_FUNC(__modsi3)
+SYM(__modsi3):
+	asr TMP3,r0,31 ; save sign
+	 float TMP0,r0
+	float TMP1,r1
+	 mov r2,0
+	sub TMP4,r2,r0
+	beq .Lret_r0
+	movgt r0,TMP4
+	sub TMP2,r2,r1
+	movlte TMP2,r1
+	sub r2,TMP0,TMP1
+	lsl r2,r2,1
+	blte .L0step
+	asr TMP4,r2,24
+	lsl r2,TMP4,3
+	mov TMP4,%low(.L0step)
+	movt TMP4,%high(.L0step)
+	sub r2,TMP4,r2
+	jr r2
+#define STEP(n) lsl.l r2,TMP2,n` sub r2,r0,r2` movgteu r0,r2
+	.balign 8,,2
+	STEP(31)` STEP(30)` STEP(29)` STEP(28)`
+	STEP(27)` STEP(26)` STEP(25)` STEP(24)`
+	STEP(23)` STEP(22)` STEP(21)` STEP(20)`
+	STEP(19)` STEP(18)` STEP(17)` STEP(16)`
+	STEP(15)` STEP(14)` STEP(13)` STEP(12)`
+	STEP(11)` STEP(10)` STEP(9)`  STEP(8)`
+	STEP(7)` STEP(6)` STEP(5)` STEP(4)` STEP(3)` STEP(2)` STEP(1)
+.L0step:STEP(0)
+	eor r0,r0,TMP3 ; restore sign
+	sub r0,r0,TMP3
+.Lret_r0:
+	rts
+	ENDFUNC(__modsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/modsi3.S b/gcc-4.9/libgcc/config/epiphany/modsi3.S
new file mode 100644
index 000000000..68b1a2f75
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/modsi3.S
@@ -0,0 +1,77 @@
+/* Signed 32 bit modulo optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__modsi3,T_INT)
+	.global SYM(__modsi3)
+	.balign 4
+	HIDDEN_FUNC(__modsi3)
+SYM(__modsi3):
+	asr r17,r0,31 ; save sign
+	mov r2,0
+	sub r3,r2,r0
+	movgt r0,r3
+	sub r3,r2,r1
+	movgt r1,r3
+	movt r2,0xa000 ; 0xa0000000
+	orr r3,r2,r0
+	lsr r15,r0,16
+	movt r15,0xa800
+	movne r3,r15
+	lsr r16,r2,2 ; 0x28000000
+	and r15,r3,r16
+	fadd r12,r3,r15
+	 orr r3,r2,r1
+	lsr r2,r1,16
+	movt r2,0xa800
+	movne r3,r2
+	and r2,r16,r3
+	fadd r3,r3,r2
+	 sub r2,r0,r1
+	bltu .Lret_a
+	lsr r12,r12,23
+	mov r2,%low(.L0step)
+	movt r2,%high(.L0step)
+	lsr r3,r3,23
+	sub r3,r12,r3 ; calculate bit number difference.
+	lsl r3,r3,3
+	sub r2,r2,r3
+	jr r2
+/*              lsl_l r2,r1,n`               sub r2,r0,r2` movgteu r0,r2  */
+#define STEP(n) .long 0x0006441f | (n) << 5` sub r2,r0,r2` movgteu r0,r2
+	.balign 8,,2
+	STEP(31)` STEP(30)` STEP(29)` STEP(28)`
+	STEP(27)` STEP(26)` STEP(25)` STEP(24)`
+	STEP(23)` STEP(22)` STEP(21)` STEP(20)`
+	STEP(19)` STEP(18)` STEP(17)` STEP(16)`
+	STEP(15)` STEP(14)` STEP(13)` STEP(12)`
+	STEP(11)` STEP(10)` STEP(9)`  STEP(8)`
+	STEP(7)` STEP(6)` STEP(5)` STEP(4)` STEP(3)` STEP(2)` STEP(1)
+.L0step:STEP(0)
+.Lret_a:eor r0,r0,r17 ; restore sign
+	sub r0,r0,r17
+	rts
+	ENDFUNC(__modsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/modsi3.c b/gcc-4.9/libgcc/config/epiphany/modsi3.c
new file mode 100644
index 000000000..229819b9e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/modsi3.c
@@ -0,0 +1,106 @@
+/* Generic signed 32 bit modulo implementation.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef union { unsigned int i; float f; } fu;
+
+unsigned int __modsi3 (unsigned int a, unsigned int b);
+
+unsigned int
+__modsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int sign = (int) a >> 31;
+  unsigned int d, t, s0, s1, s2, r0, r1;
+  fu u0, u1, u2, u1b, u2b;
+
+  a = abs (a);
+  b = abs (b);
+
+  if (b > a)
+    goto ret_a;
+
+  /* Compute difference in number of bits in S0.  */
+  u0.i = 0x40000000;
+  u1b.i = u2b.i = u0.i;
+  u1.i = a;
+  u2.i = b;
+  u1.i = a | u0.i;
+  t = 0x4b800000 | ((a >> 23) & 0xffff);
+  if (a >> 23)
+    {
+      u1.i = t;
+      u1b.i = 0x4b800000;
+    }
+  u2.i = b | u0.i;
+  t = 0x4b800000 | ((b >> 23) & 0xffff);
+  if (b >> 23)
+    {
+      u2.i = t;
+      u2b.i = 0x4b800000;
+    }
+  u1.f = u1.f - u1b.f;
+  u2.f = u2.f - u2b.f;
+  s1 = u1.i >> 23;
+  s2 = u2.i >> 23;
+  s0 = s1 - s2;
+
+#define STEP(n) case n: d = b << n; t = a - d; if (t <= a) a = t;
+  switch (s0)
+    {
+    STEP (31)
+    STEP (30)
+    STEP (29)
+    STEP (28)
+    STEP (27)
+    STEP (26)
+    STEP (25)
+    STEP (24)
+    STEP (23)
+    STEP (22)
+    STEP (21)
+    STEP (20)
+    STEP (19)
+    STEP (18)
+    STEP (17)
+    STEP (16)
+    STEP (15)
+    STEP (14)
+    STEP (13)
+    STEP (12)
+    STEP (11)
+    STEP (10)
+    STEP (9)
+    STEP (8)
+    STEP (7)
+    STEP (6)
+    STEP (5)
+    STEP (4)
+    STEP (3)
+    STEP (2)
+    STEP (1)
+    STEP (0)
+    }
+ ret_a:
+  return (a ^ sign) - sign;
+}
diff --git a/gcc-4.9/libgcc/config/epiphany/mulsi3.c b/gcc-4.9/libgcc/config/epiphany/mulsi3.c
new file mode 100644
index 000000000..b8f448611
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/mulsi3.c
@@ -0,0 +1,39 @@
+/* Generic 32 bit multiply.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+unsigned int
+__mulsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int r = 0;
+
+  while (a)
+    {
+      if (a & 1)
+	r += b;
+      a >>= 1;
+      b <<= 1;
+    }
+  return r;
+}
diff --git a/gcc-4.9/libgcc/config/epiphany/t-custom-eqsf b/gcc-4.9/libgcc/config/epiphany/t-custom-eqsf
new file mode 100644
index 000000000..3b5a54ace
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/t-custom-eqsf
@@ -0,0 +1 @@
+FPBIT_FUNCS := $(filter-out _eq_sf,$(FPBIT_FUNCS))
diff --git a/gcc-4.9/libgcc/config/epiphany/t-epiphany b/gcc-4.9/libgcc/config/epiphany/t-epiphany
new file mode 100644
index 000000000..741cc796e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/t-epiphany
@@ -0,0 +1,34 @@
+# Copyright (C) 1997-2014 Free Software Foundation, Inc.
+# Contributed by Embecosm on behalf of Adapteva, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB2ADD_ST = $(srcdir)/config/epiphany/modsi3-float.S \
+	     $(srcdir)/config/epiphany/divsi3-float.S \
+	     $(srcdir)/config/epiphany/udivsi3-float.S \
+	     $(srcdir)/config/epiphany/umodsi3-float.S \
+	     $(srcdir)/config/epiphany/ieee-754/eqsf2.S \
+	     $(srcdir)/config/epiphany/ieee-754/gtesf2.S \
+	     $(srcdir)/config/epiphany/ieee-754/ordsf2.S \
+	     $(srcdir)/config/epiphany/ieee-754/uneqsf2.S \
+	     $(srcdir)/config/epiphany/ieee-754/fast_div.S
+
+# .init/.fini section routines
+
+crtint.o crtrunc.o crtm1reg-r43.o crtm1reg-r63.o : \
+  %.o: $(srcdir)/config/epiphany/%.S $(GCC_PASSES) $(CONFIG_H)
+	$(crt_compile) -c -x assembler-with-cpp $<
diff --git a/gcc-4.9/libgcc/config/epiphany/udivsi3-float.S b/gcc-4.9/libgcc/config/epiphany/udivsi3-float.S
new file mode 100644
index 000000000..f1e2d7b17
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/udivsi3-float.S
@@ -0,0 +1,83 @@
+/* Unsigned 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__udivsi3,T_UINT)
+	.global SYM(__udivsi3)
+	.balign 4
+	HIDDEN_FUNC(__udivsi3)
+SYM(__udivsi3):
+	sub TMP0,r0,r1
+	bltu .Lret0
+	float TMP2,r0
+	  mov TMP1,%low(0xb0800000) ; ??? this would be faster with small data
+	float TMP3,r1
+	  movt TMP1,%high(0xb0800000)
+	asr TMP0,r0,8
+	sub TMP0,TMP0,TMP1
+	movt TMP1,%high(0x00810000)
+	movgteu TMP2,TMP0
+	bblt .Lret1
+	sub TMP2,TMP2,TMP1
+	sub TMP2,TMP2,TMP3
+	mov TMP3,0
+	movltu TMP2,TMP3
+	lsr TMP2,TMP2,23
+	lsl r1,r1,TMP2
+	mov TMP0,1
+	lsl TMP0,TMP0,TMP2
+	sub r0,r0,r1
+	bltu .Ladd_back
+	add TMP3,TMP3,TMP0
+	sub r0,r0,r1
+	bltu .Ladd_back
+.Lsub_loop:; More than two iterations are rare, so it makes sense to leave
+           ; this label here to reduce average branch penalties.
+	add TMP3,TMP3,TMP0
+	sub r0,r0,r1
+	bgteu .Lsub_loop
+.Ladd_back:
+	add r0,r0,r1
+	sub TMP1,r1,1
+	mov r1,%low(.L0step)
+	movt r1,%high(.L0step)
+	lsl TMP2,TMP2,3
+	sub r1,r1,TMP2
+	jr r1
+	.rep 30
+	lsl r0,r0,1
+	sub.l r1,r0,TMP1
+	movgteu r0,r1
+	.endr
+.L0step:sub r1,TMP0,1 ; mask result bits from steps ...
+	and r0,r0,r1
+	orr r0,r0,TMP3 ; ... and combine with first bits.
+	rts
+.Lret0:	mov r0,0
+	rts
+.Lret1:	mov r0,1
+	rts
+	ENDFUNC(__udivsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/udivsi3-float.c b/gcc-4.9/libgcc/config/epiphany/udivsi3-float.c
new file mode 100644
index 000000000..9d1b25251
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/udivsi3-float.c
@@ -0,0 +1,125 @@
+/* Generic unsigned 32 bit division implementation.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef union { unsigned int i; float f; } fu;
+
+unsigned int __udivsi3 (unsigned int a, unsigned int b);
+
+unsigned int
+__udivsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int d, t, s0, s1, s2, r0, r1;
+  fu u0, u1, u2,  u1b, u2b;
+
+  if (b > a)
+    return 0;
+  if ((int) b < 0)
+    return 1;
+
+  /* Assuming B is nonzero, compute S0 such that 0 <= S0,
+     (B << S0+1) does not overflow,
+     A < 4.01 * (B << S0), with S0 chosen as small as possible
+     without taking to much time calculating.  */
+#ifdef CONVERT_UNSIGNED
+  u0.f = a;
+  u1.f = b;
+#else /* !CONVERT_UNSIGNED */
+  u0.f = (int) a;
+  u1.f = (int) b;
+#ifdef CONCISE
+  if (a < 0)
+    u0.i = (a >> 8) - 0x00800000 + 0x3f800000 + (31 << 23);
+#else /* To use flag seting / cmove, this can be written as:  */
+ {
+  unsigned c = 0xff800000 - 0x4f000000;
+  t = (int)a >> 8;
+  if (t >= c)
+    u0.i = (t - c);
+ }
+#endif
+#endif /* !CONVERT_UNSIGNED */
+  s0 = u0.i + 1 /* Compensate for rounding errors.  */
+	    - 0x00800000 /* adjust by one */ ;
+  s0 = s0 - u1.i;
+  s0 = (int)s0 >= 0 ? s0 : 0;
+  s0 >>= 23;
+
+  b <<= s0;
+  r1 = 0;
+
+  r0 = 1 << s0;
+  a = ((t=a) - b);
+  if (a <= t)
+    {
+      r1 += r0;
+      a = ((t=a) - b);
+      if (a <= t)
+	do {
+	  r1 += r0;
+	  a = ((t=a) - b);
+	} while (a <= t);
+    }
+  a += b;
+  d = b - 1;
+
+#define STEP(n) case n: a += a; t = a - d; if (t <= a) a = t;
+  switch (s0)
+    {
+    STEP (31)
+    STEP (30)
+    STEP (29)
+    STEP (28)
+    STEP (27)
+    STEP (26)
+    STEP (25)
+    STEP (24)
+    STEP (23)
+    STEP (22)
+    STEP (21)
+    STEP (20)
+    STEP (19)
+    STEP (18)
+    STEP (17)
+    STEP (16)
+    STEP (15)
+    STEP (14)
+    STEP (13)
+    STEP (12)
+    STEP (11)
+    STEP (10)
+    STEP (9)
+    STEP (8)
+    STEP (7)
+    STEP (6)
+    STEP (5)
+    STEP (4)
+    STEP (3)
+    STEP (2)
+    STEP (1)
+    case 0: ;
+    }
+  r0 = r1 | (r0-1 & a);
+  return r0;
+}
diff --git a/gcc-4.9/libgcc/config/epiphany/udivsi3.S b/gcc-4.9/libgcc/config/epiphany/udivsi3.S
new file mode 100644
index 000000000..3c994aa41
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/udivsi3.S
@@ -0,0 +1,85 @@
+/* Unsigned 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__udivsi3,T_UINT)
+	.global SYM(__udivsi3)
+	.balign 4
+	HIDDEN_FUNC(__udivsi3)
+SYM(__udivsi3):
+	sub r3,r0,r1
+	bltu .Lret0
+	mov r3,0x95
+	lsl r12,r3,23 ; 0x4a800000
+	lsl r3,r3,30 ; 0x40000000
+	orr r16,r0,r3
+	orr r2,r1,r3
+	 fsub r16,r16,r3
+	fsub r2,r2,r3
+	 lsr r3,r1,21
+	lsr r17,r0,21
+	movt r17,0x4a80
+	fsub r17,r17,r12
+	 movt r3,0x4a80
+	fsub r3,r3,r12
+	 mov r12,%low(.L0step)
+	movt r12,%high(.L0step)
+	mov r21,1
+	movne r16,r17
+	lsr r17,r1,21
+	movne r2,r3
+	lsr r3,r16,23 ; must mask lower bits of r2 in case op0 was ..
+	lsr r2,r2,23 ; .. shifted and op1 was not.
+	sub r3,r3,r2 ; calculate bit number difference.
+	lsl r1,r1,r3
+	lsr r16,r1,1
+	lsl r2,r21,r3
+	lsl r3,r3,3
+	sub r12,r12,r3
+	sub r3,r0,r1
+	movltu r3,r0
+	mov r0,0
+	movgteu r0,r2
+	lsr r2,r2,1
+	add r17,r2,r0
+	sub r1,r3,r16
+	movgteu r3,r1
+	movgteu r0,r17
+	sub r16,r16,1
+	jr r12
+	.rep 30
+	lsl r3,r3,1
+	sub r1,r3,r16
+	movgteu r3,r1
+	.endr
+	sub r2,r2,1 ; mask result bits from steps ...
+	and r3,r3,r2
+	orr r0,r0,r3 ; ... and combine with first bits.
+	nop
+.L0step:rts
+.Lret0:	mov r0,0
+	rts
+	ENDFUNC(__udivsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/udivsi3.c b/gcc-4.9/libgcc/config/epiphany/udivsi3.c
new file mode 100644
index 000000000..bdc7c9d9b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/udivsi3.c
@@ -0,0 +1,114 @@
+/* Generic unsigned 32 bit division implementation.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef union { unsigned int i; float f; } fu;
+
+unsigned int __udivsi3 (unsigned int a, unsigned int b);
+
+unsigned int
+__udivsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int d, t, s0, s1, s2, r0, r1;
+  fu u0, u1, u2,  u1b, u2b;
+
+  if (b > a)
+    return 0;
+
+  /* Compute difference in number of bits in S0.  */
+  u0.i = 0x40000000;
+  u1b.i = u2b.i = u0.i;
+  u1.i = a;
+  u2.i = b;
+  u1.i = a | u0.i;
+  t = 0x4b800000 | ((a >> 23) & 0xffff);
+  if (a >> 23)
+    {
+      u1.i = t;
+      u1b.i = 0x4b800000;
+    }
+  u2.i = b | u0.i;
+  t = 0x4b800000 | ((b >> 23) & 0xffff);
+  if (b >> 23)
+    {
+      u2.i = t;
+      u2b.i = 0x4b800000;
+    }
+  u1.f = u1.f - u1b.f;
+  u2.f = u2.f - u2b.f;
+  s1 = u1.i >> 23;
+  s2 = u2.i >> 23;
+  s0 = s1 - s2;
+
+  b <<= s0;
+  d = b - 1;
+
+  r0 = 1 << s0;
+  r1 = 0;
+  t = a - b;
+  if (t <= a)
+    {
+      a = t;
+      r1 = r0;
+    }
+
+#define STEP(n) case n: a += a; t = a - d; if (t <= a) a = t;
+  switch (s0)
+    {
+    STEP (31)
+    STEP (30)
+    STEP (29)
+    STEP (28)
+    STEP (27)
+    STEP (26)
+    STEP (25)
+    STEP (24)
+    STEP (23)
+    STEP (22)
+    STEP (21)
+    STEP (20)
+    STEP (19)
+    STEP (18)
+    STEP (17)
+    STEP (16)
+    STEP (15)
+    STEP (14)
+    STEP (13)
+    STEP (12)
+    STEP (11)
+    STEP (10)
+    STEP (9)
+    STEP (8)
+    STEP (7)
+    STEP (6)
+    STEP (5)
+    STEP (4)
+    STEP (3)
+    STEP (2)
+    STEP (1)
+    case 0: ;
+    }
+  r0 = r1 | (r0-1 & a);
+  return r0;
+}
diff --git a/gcc-4.9/libgcc/config/epiphany/umodsi3-float.S b/gcc-4.9/libgcc/config/epiphany/umodsi3-float.S
new file mode 100644
index 000000000..029ce2c5e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/umodsi3-float.S
@@ -0,0 +1,63 @@
+/* Unsigned 32 bit division optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+/* Because we handle a divident with bit 31 set with truncating integer
+   arithmetic, there is no rounding-related overflow.  */
+	FSTAB (__umodsi3,T_UINT)
+	.global SYM(__umodsi3)
+	.balign 4
+	HIDDEN_FUNC(__umodsi3)
+SYM(__umodsi3):
+	float r2,r0
+	  mov TMP1,%low(0xb0800000) ; ??? this would be faster with small data
+	float TMP2,r1
+	  movt TMP1,%high(0xb0800000)
+	asr TMP0,r0,8
+	sub TMP0,TMP0,TMP1
+	mov TMP1,%low(.L0step)
+	movgteu r2,TMP0
+	sub r2,r2,TMP2
+	blteu .L0step
+	asr r2,r2,23
+	movt TMP1,%high(.L0step)
+	lsl TMP2,r2,3
+	lsl r2,r1,r2` sub r2,r0,r2` movgteu r0,r2 ; STEP(r2)
+	sub r2,TMP1,TMP2
+	jr r2
+#define STEP(n) lsl.l r2,r1,n` sub r2,r0,r2` movgteu r0,r2
+	.balign 8,,2
+	STEP(31)` STEP(30)` STEP(29)` STEP(28)`
+	STEP(27)` STEP(26)` STEP(25)` STEP(24)`
+	STEP(23)` STEP(22)` STEP(21)` STEP(20)`
+	STEP(19)` STEP(18)` STEP(17)` STEP(16)`
+	STEP(15)` STEP(14)` STEP(13)` STEP(12)`
+	STEP(11)` STEP(10)` STEP(9)`  STEP(8)`
+	STEP(7)` STEP(6)` STEP(5)` STEP(4)` STEP(3)` STEP(2)` STEP(1)
+.L0step:STEP(0)
+.Lret_r0:
+	rts
+	ENDFUNC(__umodsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/umodsi3.S b/gcc-4.9/libgcc/config/epiphany/umodsi3.S
new file mode 100644
index 000000000..65c824bc7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/umodsi3.S
@@ -0,0 +1,70 @@
+/* Unsigned 32 bit modulo optimized for Epiphany.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "epiphany-asm.h"
+
+	FSTAB (__umodsi3,T_UINT)
+	.global SYM(__umodsi3)
+	.balign 4
+	HIDDEN_FUNC(__umodsi3)
+SYM(__umodsi3):
+	mov r2,5
+	lsl r2,r2,29 ; 0xa0000000
+	orr r3,r2,r0
+	lsr r15,r0,16
+	movt r15,0xa800
+	movne r3,r15
+	lsr r16,r2,2 ; 0x28000000
+	and r15,r3,r16
+	fadd r12,r3,r15
+	 orr r3,r2,r1
+	lsr r2,r1,16
+	movt r2,0xa800
+	movne r3,r2
+	and r2,r16,r3
+	fadd r3,r3,r2
+	 sub r2,r0,r1
+	bltu .Lret_a
+	lsr r12,r12,23
+	mov r2,%low(.L0step)
+	movt r2,%high(.L0step)
+	lsr r3,r3,23
+	sub r3,r12,r3 ; calculate bit number difference.
+	lsl r3,r3,3
+	sub r2,r2,r3
+	jr r2
+/*              lsl_l r2,r1,n`               sub r2,r0,r2` movgteu r0,r2  */
+#define STEP(n) .long 0x0006441f | (n) << 5` sub r2,r0,r2` movgteu r0,r2
+	.balign 8,,2
+	STEP(31)` STEP(30)` STEP(29)` STEP(28)`
+	STEP(27)` STEP(26)` STEP(25)` STEP(24)`
+	STEP(23)` STEP(22)` STEP(21)` STEP(20)`
+	STEP(19)` STEP(18)` STEP(17)` STEP(16)`
+	STEP(15)` STEP(14)` STEP(13)` STEP(12)`
+	STEP(11)` STEP(10)` STEP(9)`  STEP(8)`
+	STEP(7)` STEP(6)` STEP(5)` STEP(4)` STEP(3)` STEP(2)` STEP(1)
+.L0step:STEP(0)
+.Lret_a:rts
+	ENDFUNC(__umodsi3)
diff --git a/gcc-4.9/libgcc/config/epiphany/umodsi3.c b/gcc-4.9/libgcc/config/epiphany/umodsi3.c
new file mode 100644
index 000000000..6457382aa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/epiphany/umodsi3.c
@@ -0,0 +1,101 @@
+/* Generic unsigned 32 bit modulo implementation.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Embecosm on behalf of Adapteva, Inc.
+
+This file is part of GCC.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef union { unsigned int i; float f; } fu;
+
+unsigned int __umodsi3 (unsigned int a, unsigned int b);
+
+unsigned int
+__umodsi3 (unsigned int a, unsigned int b)
+{
+  unsigned int d, t, s0, s1, s2, r0, r1;
+  fu u0, u1, u2,  u1b, u2b;
+
+  if (b > a)
+    return a;
+
+  /* Compute difference in number of bits in S0.  */
+  u0.i = 0x40000000;
+  u1b.i = u2b.i = u0.i;
+  u1.i = a;
+  u2.i = b;
+  u1.i = a | u0.i;
+  t = 0x4b800000 | ((a >> 23) & 0xffff);
+  if (a >> 23)
+    {
+      u1.i = t;
+      u1b.i = 0x4b800000;
+    }
+  u2.i = b | u0.i;
+  t = 0x4b800000 | ((b >> 23) & 0xffff);
+  if (b >> 23)
+    {
+      u2.i = t;
+      u2b.i = 0x4b800000;
+    }
+  u1.f = u1.f - u1b.f;
+  u2.f = u2.f - u2b.f;
+  s1 = u1.i >> 23;
+  s2 = u2.i >> 23;
+  s0 = s1 - s2;
+
+#define STEP(n) case n: d = b << n; t = a - d; if (t <= a) a = t;
+  switch (s0)
+    {
+    STEP (31)
+    STEP (30)
+    STEP (29)
+    STEP (28)
+    STEP (27)
+    STEP (26)
+    STEP (25)
+    STEP (24)
+    STEP (23)
+    STEP (22)
+    STEP (21)
+    STEP (20)
+    STEP (19)
+    STEP (18)
+    STEP (17)
+    STEP (16)
+    STEP (15)
+    STEP (14)
+    STEP (13)
+    STEP (12)
+    STEP (11)
+    STEP (10)
+    STEP (9)
+    STEP (8)
+    STEP (7)
+    STEP (6)
+    STEP (5)
+    STEP (4)
+    STEP (3)
+    STEP (2)
+    STEP (1)
+    STEP (0)
+    }
+  return a;
+}
diff --git a/gcc-4.9/libgcc/config/fr30/crti.S b/gcc-4.9/libgcc/config/fr30/crti.S
new file mode 100644
index 000000000..c130d8bc8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/fr30/crti.S
@@ -0,0 +1,61 @@
+# crti.s for ELF
+
+# Copyright (C) 1992-2014 Free Software Foundation, Inc.
+#   Written By David Vinayak Henkel-Wallace, June 1992
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+# 
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just make a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+	.section	".init"
+	.global	_init
+	.type	_init,#function
+	.align	4
+_init:
+	st	rp, @-r15
+	enter	#4
+
+	# These nops are here to align the end of this code with a 16 byte
+	# boundary.  The linker will start inserting code into the .init
+	# section at such a boundary.
+	
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+	
+	.section	".fini"
+	.global	_fini
+	.type	_fini,#function
+	.align	4
+_fini:
+	st	rp, @-r15
+	enter	#4
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
diff --git a/gcc-4.9/libgcc/config/fr30/crtn.S b/gcc-4.9/libgcc/config/fr30/crtn.S
new file mode 100644
index 000000000..9a01ea8fc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/fr30/crtn.S
@@ -0,0 +1,44 @@
+# crtn.S for ELF 
+
+#   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+#   Written By David Vinayak Henkel-Wallace, June 1992
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	.section	".init"
+	.align		4
+
+	leave
+	ld @r15+,rp
+	ret
+
+	
+	.section	".fini"
+	.align		4
+
+	leave
+	ld @r15+,rp
+	ret
+
+# Th-th-th-that is all folks!
diff --git a/gcc-4.9/libgcc/config/fr30/lib1funcs.S b/gcc-4.9/libgcc/config/fr30/lib1funcs.S
new file mode 100644
index 000000000..639c3a26f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/fr30/lib1funcs.S
@@ -0,0 +1,115 @@
+/* libgcc routines for the FR30.
+   Copyright (C) 1998-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	.macro FUNC_START name
+	.text
+	.globl __\name
+	.type  __\name, @function
+__\name:
+	.endm
+
+	.macro FUNC_END name
+	.size  __\name, . - __\name
+	.endm
+
+	.macro DIV_BODY reg number
+	.if \number
+	DIV_BODY  \reg, "\number - 1"
+	div1	\reg
+	.endif
+	.endm
+	
+#ifdef L_udivsi3
+FUNC_START udivsi3
+	;; Perform an unsiged division of r4 / r5 and place the result in r4.
+	;; Does not handle overflow yet...
+	mov	r4, mdl
+	div0u	r5
+	DIV_BODY r5 32
+	mov	mdl, r4
+	ret
+FUNC_END udivsi3
+#endif /* L_udivsi3 */
+
+#ifdef L_divsi3
+FUNC_START divsi3
+	;; Perform a siged division of r4 / r5 and place the result in r4.
+	;; Does not handle overflow yet...
+	mov	r4, mdl
+	div0s	r5
+	DIV_BODY r5 32
+	div2    r5
+	div3
+	div4s
+	mov	mdl, r4
+	ret
+FUNC_END divsi3
+#endif /* L_divsi3 */
+
+#ifdef L_umodsi3
+FUNC_START umodsi3
+	;; Perform an unsiged division of r4 / r5 and places the remainder in r4.
+	;; Does not handle overflow yet...
+	mov	r4, mdl
+	div0u	r5
+	DIV_BODY r5 32
+	mov	mdh, r4
+	ret
+FUNC_END umodsi3
+#endif /* L_umodsi3 */
+
+#ifdef L_modsi3
+FUNC_START modsi3
+	;; Perform a siged division of r4 / r5 and place the remainder in r4.
+	;; Does not handle overflow yet...
+	mov	r4, mdl
+	div0s	r5
+	DIV_BODY r5 32
+	div2    r5
+	div3
+	div4s
+	mov	mdh, r4
+	ret
+FUNC_END modsi3
+#endif /* L_modsi3 */
+
+#ifdef L_negsi2
+FUNC_START negsi2
+	ldi:8	#0, r0
+	sub	r4, r0
+	mov	r0, r4
+	ret
+FUNC_END negsi2
+#endif /* L_negsi2 */
+
+#ifdef L_one_cmplsi2
+FUNC_START one_cmplsi2
+	ldi:8	#0xff, r0
+	extsb	r0
+	eor	r0, r4
+	ret
+FUNC_END one_cmplsi2
+#endif /* L_one_cmplsi2 */
+
+
diff --git a/gcc-4.9/libgcc/config/fr30/t-fr30 b/gcc-4.9/libgcc/config/fr30/t-fr30
new file mode 100644
index 000000000..ee5ed9a12
--- /dev/null
+++ b/gcc-4.9/libgcc/config/fr30/t-fr30
@@ -0,0 +1,2 @@
+LIB1ASMSRC    = fr30/lib1funcs.S
+LIB1ASMFUNCS  = _udivsi3 _divsi3 _umodsi3 _modsi3
diff --git a/gcc-4.9/libgcc/config/frv/cmovd.c b/gcc-4.9/libgcc/config/frv/cmovd.c
new file mode 100644
index 000000000..77c4dbe1b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/cmovd.c
@@ -0,0 +1,51 @@
+/* Move double-word library function.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+void
+__cmovd (long long *dest, const long long *src, unsigned len)
+{
+  unsigned i;
+  unsigned num = len >> 3;
+  unsigned xlen = len & ~7;
+  char *dest_byte = (char *)dest;
+  const char *src_byte = (const char *)src;
+
+  if (dest_byte < src_byte || dest_byte > src_byte+len)
+    {
+      for (i = 0; i < num; i++)
+	dest[i] = src[i];
+
+      while (len > xlen)
+	{
+	  dest_byte[xlen] = src_byte[xlen];
+	  xlen++;
+	}
+    }
+  else
+    {
+      while (len-- > 0)
+	dest_byte[len] = src_byte[len];
+    }
+}
diff --git a/gcc-4.9/libgcc/config/frv/cmovh.c b/gcc-4.9/libgcc/config/frv/cmovh.c
new file mode 100644
index 000000000..531e7aad5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/cmovh.c
@@ -0,0 +1,47 @@
+/* Move half-word library function.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+void
+__cmovh (short *dest, const short *src, unsigned len)
+{
+  unsigned i;
+  unsigned num = len >> 1;
+  char *dest_byte = (char *)dest;
+  const char *src_byte = (const char *)src;
+
+  if (dest_byte < src_byte || dest_byte > src_byte+len)
+    {
+      for (i = 0; i < num; i++)
+	dest[i] = src[i];
+
+      if ((len & 1) != 0)
+	dest_byte[len-1] = src_byte[len-1];
+    }
+  else
+    {
+      while (len-- > 0)
+	dest_byte[len] = src_byte[len];
+    }
+}
diff --git a/gcc-4.9/libgcc/config/frv/cmovw.c b/gcc-4.9/libgcc/config/frv/cmovw.c
new file mode 100644
index 000000000..6736325dc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/cmovw.c
@@ -0,0 +1,51 @@
+/* Move word library function.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+void
+__cmovw (int *dest, const int *src, unsigned len)
+{
+  unsigned i;
+  unsigned num = len >> 2;
+  unsigned xlen = len & ~3;
+  char *dest_byte = (char *)dest;
+  const char *src_byte = (const char *)src;
+
+  if (dest_byte < src_byte || dest_byte > src_byte+len)
+    {
+      for (i = 0; i < num; i++)
+	dest[i] = src[i];
+
+      while (len > xlen)
+	{
+	  dest_byte[xlen] = src_byte[xlen];
+	  xlen++;
+	}
+    }
+  else
+    {
+      while (len-- > 0)
+	dest_byte[len] = src_byte[len];
+    }
+}
diff --git a/gcc-4.9/libgcc/config/frv/frv-abi.h b/gcc-4.9/libgcc/config/frv/frv-abi.h
new file mode 100644
index 000000000..fdc7508bf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/frv-abi.h
@@ -0,0 +1,182 @@
+/* Frv map GCC names to FR-V ABI.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3, or (at your option) any later
+   version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* For each of the functions in the library that has a corresponding name in
+   the ABI, add an equivalence between the GCC name and the ABI name.  This is
+   in a separate file from frv.h so that fp-bit.c can be made to include it.  */
+
+#ifdef __GNUC__
+#ifdef __FRV_UNDERSCORE__
+#define RENAME_LIBRARY(OLD,NEW)						\
+__asm__ (".globl\t_" #NEW "\n"						\
+	 "_" #NEW "=_" #OLD "\n"					\
+	 "\t.type\t_" #NEW ",@function\n");
+
+#else
+#define RENAME_LIBRARY(OLD,NEW)						\
+__asm__ (".globl\t" #NEW "\n"						\
+	 #NEW "=" #OLD "\n"						\
+	 "\t.type\t" #NEW ",@function\n");
+#endif
+
+#define CREATE_DOUBLE_SHIFT(OLD,NEW)					\
+__asm__ (".text\n"							\
+	 "\t.globl\t" #NEW "\n"						\
+	 "\t.type\t" #NEW ",@function\n"				\
+	 #NEW ":\n"							\
+	 "\tor\tgr11, gr0, gr10\n"					\
+	 ".L" #OLD " = " #OLD "\n"					\
+	 "\tbra\t.L" #OLD "\n");
+
+#ifdef L_sf_to_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__extendsfdf2,__ftod)
+#endif
+
+#ifdef L_sf_to_si
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixsfsi,__ftoi)
+#endif
+
+#ifdef L_sf_to_usi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixunssfsi,__ftoui)
+#endif
+
+#ifdef L_df_to_si
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixdfsi,__dtoi)
+#endif
+
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixunssfsi,__ftoui)
+#endif
+
+#ifdef L_fixunsdfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixunsdfsi,__dtoui)
+#endif
+
+#ifdef L_fixsfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixsfdi,__ftoll)
+#endif
+
+#ifdef L_fixdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixdfdi,__dtoll)
+#endif
+
+#ifdef L_fixunssfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixunssfdi,__ftoull)
+#endif
+
+#ifdef L_fixunsdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__fixunsdfdi,__dtoull)
+#endif
+
+#ifdef L_si_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__floatsisf,__itof)
+#endif
+
+#ifdef L_di_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__floatdisf,__lltof)
+#endif
+
+#ifdef L_df_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__truncdfsf2,__dtof)
+#endif
+
+#ifdef L_si_to_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__floatsidf,__itod)
+#endif
+
+#ifdef L_floatdisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__floatdisf,__lltof)
+#endif
+
+#ifdef L_floatdidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__floatdidf,__lltod)
+#endif
+
+#ifdef L_addsub_df
+#define DECLARE_LIBRARY_RENAMES \
+	RENAME_LIBRARY(__adddf3,__addd)
+	RENAME_LIBRARY(__subdf3,__subd)
+#endif
+
+#ifdef L_mul_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__muldf3,__muld)
+#endif
+
+#ifdef L_div_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__divdf3,__divd)
+#endif
+
+#ifdef L_addsub_sf
+#define DECLARE_LIBRARY_RENAMES \
+	RENAME_LIBRARY(__addsf3,__addf) \
+	RENAME_LIBRARY(__subsf3,__subf)
+#endif
+
+#ifdef L_mul_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__mulsf3,__mulf)
+#endif
+
+#ifdef L_div_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__divsf3,__divf)
+#endif
+
+#ifdef L_ashldi3
+#define DECLARE_LIBRARY_RENAMES CREATE_DOUBLE_SHIFT (__ashldi3,__sllll)
+#endif
+
+#ifdef L_lshrdi3
+#define DECLARE_LIBRARY_RENAMES CREATE_DOUBLE_SHIFT (__lshrdi3,__srlll)
+#endif
+
+#ifdef L_ashrdi3
+#define DECLARE_LIBRARY_RENAMES CREATE_DOUBLE_SHIFT (__ashrdi3,__srall)
+#endif
+
+#ifdef L_adddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__adddi3,__addll)
+#endif
+
+#ifdef L_subdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__subdi3,__subll)
+#endif
+
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES \
+	RENAME_LIBRARY(__muldi3,__mulll)
+	RENAME_LIBRARY(__muldi3,__umulll)
+#endif
+
+#ifdef L_divdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__divdi3,__divll)
+#endif
+
+#ifdef L_udivdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__udivdi3,__udivll)
+#endif
+
+#ifdef L_moddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__moddi3,__modll)
+#endif
+
+#ifdef L_umoddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY(__umoddi3,__umodll)
+#endif
+#endif /* __GNUC__ */
diff --git a/gcc-4.9/libgcc/config/frv/frvbegin.c b/gcc-4.9/libgcc/config/frv/frvbegin.c
new file mode 100644
index 000000000..bd79e632a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/frvbegin.c
@@ -0,0 +1,157 @@
+/* Frv initialization file linked before all user modules
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+    Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.
+
+   This file was originally taken from the file crtstuff.c in the
+   main compiler directory, and simplified.  */
+
+#include "defaults.h"
+#include <stddef.h>
+#include "../libgcc/unwind-dw2-fde.h"
+#include "gbl-ctors.h"
+
+/*  Declare a pointer to void function type.  */
+#define STATIC static
+
+#ifdef __FRV_UNDERSCORE__
+#define UNDERSCORE "_"
+#else
+#define UNDERSCORE ""
+#endif
+
+#define INIT_SECTION_NEG_ONE(SECTION, FLAGS, NAME)			\
+__asm__ (".section " SECTION "," FLAGS "\n\t"				\
+	 ".globl   " UNDERSCORE NAME "\n\t"				\
+	 ".type    " UNDERSCORE NAME ",@object\n\t"			\
+	 ".p2align  2\n"						\
+	 UNDERSCORE NAME ":\n\t"					\
+	 ".word     -1\n\t"						\
+	 ".previous")
+
+#define INIT_SECTION(SECTION, FLAGS, NAME)				\
+__asm__ (".section " SECTION "," FLAGS "\n\t"				\
+	 ".globl   " UNDERSCORE NAME "\n\t"				\
+	 ".type    " UNDERSCORE NAME ",@object\n\t"			\
+	 ".p2align  2\n"						\
+	 UNDERSCORE NAME ":\n\t"					\
+	 ".previous")
+
+/* Beginning of .ctor/.dtor sections that provides a list of constructors and
+   destructors to run.  */
+
+INIT_SECTION_NEG_ONE (".ctors", "\"aw\"", "__CTOR_LIST__");
+INIT_SECTION_NEG_ONE (".dtors", "\"aw\"", "__DTOR_LIST__");
+
+/* Beginning of .eh_frame section that provides all of the exception handling
+   tables.  */
+
+INIT_SECTION (".eh_frame", "\"aw\"", "__EH_FRAME_BEGIN__");
+
+#if ! __FRV_FDPIC__
+/* In FDPIC, the linker itself generates this.  */
+/* Beginning of .rofixup section that provides a list of pointers that we
+   need to adjust.  */
+
+INIT_SECTION (".rofixup", "\"a\"", "__ROFIXUP_LIST__");
+#endif /* __FRV_FDPIC__ */
+
+extern void __frv_register_eh(void) __attribute__((__constructor__));
+extern void __frv_deregister_eh(void) __attribute__((__destructor__));
+
+extern func_ptr __EH_FRAME_BEGIN__[];
+
+/* Register the exception handling table as the first constructor.  */
+void
+__frv_register_eh (void)
+{
+  static struct object object;
+  if (__register_frame_info)
+    __register_frame_info (__EH_FRAME_BEGIN__, &object);
+}
+
+/* Note, do not declare __{,de}register_frame_info weak as it seems
+   to interfere with the pic support.  */
+
+/* Unregister the exception handling table as a deconstructor.  */
+void
+__frv_deregister_eh (void)
+{
+  static int completed = 0;
+
+  if (completed)
+    return;
+
+  if (__deregister_frame_info)
+    __deregister_frame_info (__EH_FRAME_BEGIN__);
+
+  completed = 1;
+}
+
+/* Run the global destructors.  */
+void
+__do_global_dtors (void)
+{
+  static func_ptr *p = __DTOR_LIST__ + 1;
+  while (*p)
+    {
+      p++;
+      (*(p-1)) ();
+    }
+}
+
+/* Run the global constructors.  */
+void
+__do_global_ctors (void)
+{
+  unsigned long nptrs = (unsigned long) __CTOR_LIST__[0];
+  unsigned i;
+
+  if (nptrs == (unsigned long)-1)
+    for (nptrs = 0; __CTOR_LIST__[nptrs + 1] != 0; nptrs++);
+
+  for (i = nptrs; i >= 1; i--)
+    __CTOR_LIST__[i] ();
+
+  atexit (__do_global_dtors);
+}
+
+/* Subroutine called automatically by `main'.
+   Compiling a global function named `main'
+   produces an automatic call to this function at the beginning.
+
+   For many systems, this routine calls __do_global_ctors.
+   For systems which support a .init section we use the .init section
+   to run __do_global_ctors, so we need not do anything here.  */
+
+void
+__main (void)
+{
+  /* Support recursive calls to `main': run initializers just once.  */
+  static int initialized;
+  if (! initialized)
+    {
+      initialized = 1;
+      __do_global_ctors ();
+    }
+}
diff --git a/gcc-4.9/libgcc/config/frv/frvend.c b/gcc-4.9/libgcc/config/frv/frvend.c
new file mode 100644
index 000000000..ad9931a09
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/frvend.c
@@ -0,0 +1,70 @@
+/* Frv initialization file linked after all user modules
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+    Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "defaults.h"
+#include <stddef.h>
+#include "../libgcc/unwind-dw2-fde.h"
+
+#ifdef __FRV_UNDERSCORE__
+#define UNDERSCORE "_"
+#else
+#define UNDERSCORE ""
+#endif
+
+#define FINI_SECTION_ZERO(SECTION, FLAGS, NAME)				\
+__asm__ (".section " SECTION "," FLAGS "\n\t"				\
+	 ".globl   " UNDERSCORE NAME "\n\t"				\
+	 ".type    " UNDERSCORE NAME ",@object\n\t"			\
+	 ".p2align  2\n"						\
+	 UNDERSCORE NAME ":\n\t"					\
+	 ".word     0\n\t"						\
+	 ".previous")
+
+#define FINI_SECTION(SECTION, FLAGS, NAME)				\
+__asm__ (".section " SECTION "," FLAGS "\n\t"				\
+	 ".globl   " UNDERSCORE NAME "\n\t"				\
+	 ".type    " UNDERSCORE NAME ",@object\n\t"			\
+	 ".p2align  2\n"						\
+	 UNDERSCORE NAME ":\n\t"					\
+	 ".previous")
+
+/* End of .ctor/.dtor sections that provides a list of constructors and
+   destructors to run.  */
+
+FINI_SECTION_ZERO (".ctors", "\"aw\"", "__CTOR_END__");
+FINI_SECTION_ZERO (".dtors", "\"aw\"", "__DTOR_END__");
+
+/* End of .eh_frame section that provides all of the exception handling
+   tables.  */
+
+FINI_SECTION_ZERO (".eh_frame", "\"aw\"", "__FRAME_END__");
+
+#if ! __FRV_FDPIC__
+/* In FDPIC, the linker itself generates this.  */
+/* End of .rofixup section that provides a list of pointers that we
+   need to adjust.  */
+
+FINI_SECTION (".rofixup", "\"a\"", "__ROFIXUP_END__");
+#endif /* __FRV_FDPIC__ */
diff --git a/gcc-4.9/libgcc/config/frv/lib1funcs.S b/gcc-4.9/libgcc/config/frv/lib1funcs.S
new file mode 100644
index 000000000..1b80aea25
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/lib1funcs.S
@@ -0,0 +1,269 @@
+/* Library functions.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat, Inc.
+  
+   This file is part of GCC.
+  
+   GCC is free software ; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+  
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY ; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <frv-asm.h>
+
+
+#ifdef L_cmpll
+/* icc0 = __cmpll (long long a, long long b)  */
+
+	.globl	EXT(__cmpll)
+	.type	EXT(__cmpll),@function
+	.text
+	.p2align 4
+EXT(__cmpll):
+	cmp	gr8, gr10, icc0
+	ckeq	icc0, cc4
+	P(ccmp)	gr9, gr11, cc4, 1
+	ret
+.Lend:
+	.size	EXT(__cmpll),.Lend-EXT(__cmpll)
+#endif /* L_cmpll */
+
+#ifdef L_cmpf
+/* icc0 = __cmpf (float a, float b) */
+/* Note, because this function returns the result in ICC0, it means it can't
+   handle NaNs.  */
+
+	.globl	EXT(__cmpf)
+	.type	EXT(__cmpf),@function
+	.text
+	.p2align 4
+EXT(__cmpf):
+#ifdef __FRV_HARD_FLOAT__	/* floating point instructions available */
+	movgf	gr8, fr0
+	P(movgf) gr9, fr1
+	setlos	#1, gr8
+	fcmps	fr0, fr1, fcc0
+	P(fcklt) fcc0, cc0
+	fckeq	fcc0, cc1
+	csub	gr0, gr8, gr8, cc0, 1
+	cmov	gr0, gr8, cc1, 1
+	cmpi	gr8, 0, icc0
+	ret
+#else				/* no floating point instructions available */
+	movsg	lr, gr4
+	addi	sp, #-16, sp
+	sti	gr4, @(sp, 8)
+	st	fp, @(sp, gr0)
+	mov	sp, fp
+	call	EXT(__cmpsf2)
+	cmpi	gr8, #0, icc0
+	ldi	@(sp, 8), gr4
+	movgs	gr4, lr
+	ld	@(sp,gr0), fp
+	addi	sp, #16, sp
+	ret
+#endif
+.Lend:
+	.size	EXT(__cmpf),.Lend-EXT(__cmpf)
+#endif
+
+#ifdef L_cmpd
+/* icc0 = __cmpd (double a, double b) */
+/* Note, because this function returns the result in ICC0, it means it can't
+   handle NaNs.  */
+
+	.globl	EXT(__cmpd)
+	.type	EXT(__cmpd),@function
+	.text
+	.p2align 4
+EXT(__cmpd):
+	movsg	lr, gr4
+	addi	sp, #-16, sp
+	sti	gr4, @(sp, 8)
+	st	fp, @(sp, gr0)
+	mov	sp, fp
+	call	EXT(__cmpdf2)
+	cmpi	gr8, #0, icc0
+	ldi	@(sp, 8), gr4
+	movgs	gr4, lr
+	ld	@(sp,gr0), fp
+	addi	sp, #16, sp
+	ret
+.Lend:
+	.size	EXT(__cmpd),.Lend-EXT(__cmpd)
+#endif
+
+#ifdef L_addll
+/* gr8,gr9 = __addll (long long a, long long b) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__addll)
+	.type	EXT(__addll),@function
+	.text
+	.p2align
+EXT(__addll):
+	addcc	gr9, gr11, gr9, icc0
+	addx	gr8, gr10, gr8, icc0
+	ret
+.Lend:
+	.size	EXT(__addll),.Lend-EXT(__addll)
+#endif
+
+#ifdef L_subll
+/* gr8,gr9 = __subll (long long a, long long b) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__subll)
+	.type	EXT(__subll),@function
+	.text
+	.p2align 4
+EXT(__subll):
+	subcc	gr9, gr11, gr9, icc0
+	subx	gr8, gr10, gr8, icc0
+	ret
+.Lend:
+	.size	EXT(__subll),.Lend-EXT(__subll)
+#endif
+
+#ifdef L_andll
+/* gr8,gr9 = __andll (long long a, long long b) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__andll)
+	.type	EXT(__andll),@function
+	.text
+	.p2align 4
+EXT(__andll):
+	P(and)	gr9, gr11, gr9
+	P2(and)	gr8, gr10, gr8
+	ret
+.Lend:
+	.size	EXT(__andll),.Lend-EXT(__andll)
+#endif
+
+#ifdef L_orll
+/* gr8,gr9 = __orll (long long a, long long b) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__orll)
+	.type	EXT(__orll),@function
+	.text
+	.p2align 4
+EXT(__orll):
+	P(or)	gr9, gr11, gr9
+	P2(or)	gr8, gr10, gr8
+	ret
+.Lend:
+	.size	EXT(__orll),.Lend-EXT(__orll)
+#endif
+
+#ifdef L_xorll
+/* gr8,gr9 = __xorll (long long a, long long b) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__xorll)
+	.type	EXT(__xorll),@function
+	.text
+	.p2align 4
+EXT(__xorll):
+	P(xor)	gr9, gr11, gr9
+	P2(xor)	gr8, gr10, gr8
+	ret
+.Lend:
+	.size	EXT(__xorll),.Lend-EXT(__xorll)
+#endif
+
+#ifdef L_notll
+/* gr8,gr9 = __notll (long long a) */
+/* Note, gcc will never call this function, but it is present in case an
+   ABI program calls it.  */
+
+	.globl	EXT(__notll)
+	.type	EXT(__notll),@function
+	.text
+	.p2align 4
+EXT(__notll):
+	P(not)	gr9, gr9
+	P2(not)	gr8, gr8
+	ret
+.Lend:
+	.size	EXT(__notll),.Lend-EXT(__notll)
+#endif
+
+#ifdef L_cmov
+/* (void) __cmov (char *dest, const char *src, size_t len) */
+/*
+ * void __cmov (char *dest, const char *src, size_t len)
+ * {
+ *   size_t i;
+ * 
+ *   if (dest < src || dest > src+len)
+ *     {
+ *	 for (i = 0; i < len; i++)
+ *	 dest[i] = src[i];
+ *     }
+ *   else
+ *     {
+ *	 while (len-- > 0)
+ *	 dest[len] = src[len];
+ *     }
+ * }
+ */
+
+	.globl	EXT(__cmov)
+	.type	EXT(__cmov),@function
+	.text
+	.p2align 4
+EXT(__cmov):
+	P(cmp)	gr8, gr9, icc0
+	add	gr9, gr10, gr4
+	P(cmp)	gr8, gr4, icc1
+	bc	icc0, 0, .Lfwd
+	bls	icc1, 0, .Lback
+.Lfwd:
+	/* move bytes in a forward direction */
+	P(setlos) #0, gr5
+	cmp	gr0, gr10, icc0
+	P(subi)	gr9, #1, gr9
+	P2(subi) gr8, #1, gr8
+	bnc	icc0, 0, .Lret
+.Lfloop:
+	/* forward byte move loop */
+	addi	gr5, #1, gr5
+	P(ldsb)	@(gr9, gr5), gr4
+	cmp	gr5, gr10, icc0
+	P(stb)	gr4, @(gr8, gr5)
+	bc	icc0, 0, .Lfloop
+	ret
+.Lbloop:
+	/* backward byte move loop body */
+	ldsb	@(gr9,gr10),gr4
+	stb	gr4,@(gr8,gr10)
+.Lback:
+	P(cmpi)	gr10, #0, icc0
+	addi	gr10, #-1, gr10
+	bne	icc0, 0, .Lbloop
+.Lret:
+	ret
+.Lend:
+	.size	 EXT(__cmov),.Lend-EXT(__cmov)
+#endif
diff --git a/gcc-4.9/libgcc/config/frv/libgcc-glibc.ver b/gcc-4.9/libgcc/config/frv/libgcc-glibc.ver
new file mode 100644
index 000000000..fc6b32269
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/libgcc-glibc.ver
@@ -0,0 +1,73 @@
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_3.4 {
+  # frv abi symbol names
+  __ftod
+  __ftoi
+  __ftoui
+  __dtoi
+  __ftoui
+  __dtoui
+  __ftoll
+  __dtoll
+  __ftoull
+  __dtoull
+  __itof
+  __lltof
+  __dtof
+  __itod
+  __lltof
+  __lltod
+  __addd
+  __subd
+  __muld
+  __divd
+  __addf
+  __subf
+  __mulf
+  __divf
+  __sllll
+  __srlll
+  __srall
+  __addll
+  __subll
+  __mulll
+  __umulll
+  __divll
+  __udivll
+  __modll
+  __umodll
+  __cmpll
+  __cmpf
+  __cmpd
+  __andll
+  __orll
+  __xorll
+  __notll
+  __cmov
+  __cmovd
+  __cmovh
+  __cmovw
+  __modi
+  __uitod
+  __uitof
+  __ulltod
+  __ulltof
+  __umodi
+}
diff --git a/gcc-4.9/libgcc/config/frv/modi.c b/gcc-4.9/libgcc/config/frv/modi.c
new file mode 100644
index 000000000..d5a91fc0f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/modi.c
@@ -0,0 +1,4 @@
+int __modi (int a, int b)
+{
+  return a % b;
+}
diff --git a/gcc-4.9/libgcc/config/frv/t-frv b/gcc-4.9/libgcc/config/frv/t-frv
new file mode 100644
index 000000000..a4ff05851
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/t-frv
@@ -0,0 +1,22 @@
+LIB1ASMSRC	= frv/lib1funcs.S
+LIB1ASMFUNCS	= _cmpll _cmpf _cmpd _addll _subll _andll _orll _xorll _notll _cmov
+
+LIB2ADD	= $(srcdir)/config/frv/cmovh.c \
+	  $(srcdir)/config/frv/cmovw.c \
+	  $(srcdir)/config/frv/cmovd.c \
+	  $(srcdir)/config/frv/modi.c \
+	  $(srcdir)/config/frv/umodi.c \
+	  $(srcdir)/config/frv/uitof.c \
+	  $(srcdir)/config/frv/uitod.c \
+	  $(srcdir)/config/frv/ulltof.c \
+	  $(srcdir)/config/frv/ulltod.c
+
+# Compile two additional files that are linked with every program
+# linked using GCC on systems using COFF or ELF, for the sake of C++
+# constructors.
+
+frvbegin$(objext): $(srcdir)/config/frv/frvbegin.c
+	$(gcc_compile) -c $<
+
+frvend$(objext): $(srcdir)/config/frv/frvend.c
+	$(gcc_compile) -c $<
diff --git a/gcc-4.9/libgcc/config/frv/t-linux b/gcc-4.9/libgcc/config/frv/t-linux
new file mode 100644
index 000000000..0240efefa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/t-linux
@@ -0,0 +1,3 @@
+CRTSTUFF_T_CFLAGS = $(PICFLAG)
+
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/frv/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/frv/uitod.c b/gcc-4.9/libgcc/config/frv/uitod.c
new file mode 100644
index 000000000..14290ab6b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/uitod.c
@@ -0,0 +1,4 @@
+double __uitod (unsigned int a)
+{
+  return a;
+}
diff --git a/gcc-4.9/libgcc/config/frv/uitof.c b/gcc-4.9/libgcc/config/frv/uitof.c
new file mode 100644
index 000000000..059bc7c74
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/uitof.c
@@ -0,0 +1,4 @@
+float __uitof (unsigned int a)
+{
+  return a;
+}
diff --git a/gcc-4.9/libgcc/config/frv/ulltod.c b/gcc-4.9/libgcc/config/frv/ulltod.c
new file mode 100644
index 000000000..e6bee1208
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/ulltod.c
@@ -0,0 +1,4 @@
+double __ulltod (unsigned long long a)
+{
+  return a;
+}
diff --git a/gcc-4.9/libgcc/config/frv/ulltof.c b/gcc-4.9/libgcc/config/frv/ulltof.c
new file mode 100644
index 000000000..29cdfd4d2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/ulltof.c
@@ -0,0 +1,4 @@
+float __ulltof (unsigned long long a)
+{
+  return a;
+}
diff --git a/gcc-4.9/libgcc/config/frv/umodi.c b/gcc-4.9/libgcc/config/frv/umodi.c
new file mode 100644
index 000000000..4ffe5ad81
--- /dev/null
+++ b/gcc-4.9/libgcc/config/frv/umodi.c
@@ -0,0 +1,4 @@
+unsigned int __umodi (unsigned int a, unsigned int b)
+{
+  return a % b;
+}
diff --git a/gcc-4.9/libgcc/config/gmon-sol2.c b/gcc-4.9/libgcc/config/gmon-sol2.c
new file mode 100644
index 000000000..7d6149665
--- /dev/null
+++ b/gcc-4.9/libgcc/config/gmon-sol2.c
@@ -0,0 +1,444 @@
+/*-
+ * Copyright (c) 1991 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. [rescinded 22 July 1999]
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Mangled into a form that works on Solaris 2/SPARC by Mark Eichin
+ * for Cygnus Support, July 1992.
+ *
+ * Modified to support Solaris 2/x86 by J.W.Hawtin <oolon@ankh.org>, 14/8/96.
+ *
+ * It must be used in conjunction with sol2-gc1.S, which is used to start
+ * and stop process monitoring.
+ */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include <fcntl.h>		/* For creat.  */
+
+extern void monstartup (char *, char *);
+extern void _mcleanup (void);
+#ifdef __i386__
+static void internal_mcount (void) __attribute__ ((used));
+#else
+static void internal_mcount (char *, unsigned short *) __attribute__ ((used));
+#endif
+static void moncontrol (int);
+
+struct phdr {
+  char *lpc;
+  char *hpc;
+  int ncnt;
+};
+
+#define HISTFRACTION	2
+#define HISTCOUNTER	unsigned short
+#define HASHFRACTION	1
+#define ARCDENSITY	2
+#define MINARCS		50
+
+struct tostruct {
+  char *selfpc;
+  long count;
+  unsigned short link;
+};
+
+struct rawarc {
+  unsigned long raw_frompc;
+  unsigned long raw_selfpc;
+  long raw_count;
+};
+
+#define ROUNDDOWN(x, y)	(((x) / (y)) * (y))
+#define ROUNDUP(x, y)	((((x) + (y) - 1) / (y)) * (y))
+
+/* froms is actually a bunch of unsigned shorts indexing tos.  */
+static int profiling = 3;
+static unsigned short *froms;
+static struct tostruct *tos = NULL;
+static long tolimit = 0;
+static char *s_lowpc = NULL;
+static char *s_highpc = NULL;
+static size_t s_textsize = 0;
+
+static int ssiz;
+static char *sbuf;
+static int s_scale;
+/* See profil(2) where this is describe (incorrectly).  */
+#define	SCALE_1_TO_1	0x10000L
+
+#define	MSG "No space for profiling buffer(s)\n"
+
+void
+monstartup (char *lowpc, char *highpc)
+{
+  size_t monsize;
+  char *buffer;
+  size_t o;
+
+  /* Round lowpc and highpc to multiples of the density we're using
+     so the rest of the scaling (here and in gprof) stays in ints.  */
+  lowpc = (char *) ROUNDDOWN ((size_t) lowpc,
+			      HISTFRACTION * sizeof (HISTCOUNTER));
+  s_lowpc = lowpc;
+  highpc = (char *) ROUNDUP ((size_t) highpc,
+			     HISTFRACTION * sizeof (HISTCOUNTER));
+  s_highpc = highpc;
+  s_textsize = highpc - lowpc;
+  monsize = (s_textsize / HISTFRACTION) + sizeof (struct phdr);
+  buffer = sbrk (monsize);
+  if (buffer == (void *) -1) {
+    write (STDERR_FILENO, MSG, sizeof (MSG));
+    return;
+  }
+  froms = sbrk (s_textsize / HASHFRACTION);
+  if (froms == (void *) -1) {
+    write (STDERR_FILENO, MSG, sizeof (MSG));
+    froms = NULL;
+    return;
+  }
+  tolimit = s_textsize * ARCDENSITY / 100;
+  if (tolimit < MINARCS) {
+    tolimit = MINARCS;
+  } else if (tolimit > 65534) {
+    tolimit = 65534;
+  }
+  tos = sbrk (tolimit * sizeof (struct tostruct));
+  if (tos == (void *) -1) {
+    write (STDERR_FILENO, MSG, sizeof (MSG));
+    froms = NULL;
+    tos = NULL;
+    return;
+  }
+  tos[0].link = 0;
+  sbuf = buffer;
+  ssiz = monsize;
+  ((struct phdr *) buffer)->lpc = lowpc;
+  ((struct phdr *) buffer)->hpc = highpc;
+  ((struct phdr *) buffer)->ncnt = ssiz;
+  monsize -= sizeof (struct phdr);
+  if (monsize <= 0)
+    return;
+  o = highpc - lowpc;
+  if(monsize < o)
+    s_scale = ((float) monsize / o) * SCALE_1_TO_1;
+  else
+    s_scale = SCALE_1_TO_1;
+  moncontrol (1);
+}
+
+void
+_mcleanup (void)
+{
+  int fd;
+  int fromindex;
+  int endfrom;
+  char *frompc;
+  int toindex;
+  struct rawarc	rawarc;
+  char *profdir;
+  const char *proffile;
+  char *progname;
+  char buf[PATH_MAX];
+  extern char **___Argv;
+
+  moncontrol (0);
+
+  if ((profdir = getenv ("PROFDIR")) != NULL) {
+    /* If PROFDIR contains a null value, no profiling output is produced.  */
+    if (*profdir == '\0') {
+      return;
+    }
+
+    progname = strrchr (___Argv[0], '/');
+    if (progname == NULL)
+      progname = ___Argv[0];
+    else
+      progname++;
+
+    sprintf (buf, "%s/%ld.%s", profdir, (long) getpid (), progname);
+    proffile = buf;
+  } else {
+    proffile = "gmon.out";
+  }
+
+  fd = creat (proffile, 0666);
+  if (fd < 0) {
+    perror (proffile);
+    return;
+  }
+#ifdef DEBUG
+  fprintf (stderr, "[mcleanup] sbuf %#x ssiz %d\n", sbuf, ssiz);
+#endif /* DEBUG */
+
+  write (fd, sbuf, ssiz);
+  endfrom = s_textsize / (HASHFRACTION * sizeof (*froms));
+  for (fromindex = 0; fromindex < endfrom; fromindex++) {
+    if (froms[fromindex] == 0) {
+      continue;
+    }
+    frompc = s_lowpc + (fromindex * HASHFRACTION * sizeof (*froms));
+    for (toindex = froms[fromindex];
+	 toindex != 0;
+	 toindex = tos[toindex].link) {
+#ifdef DEBUG
+      fprintf (stderr, "[mcleanup] frompc %#x selfpc %#x count %d\n",
+	       frompc, tos[toindex].selfpc, tos[toindex].count);
+#endif /* DEBUG */
+      rawarc.raw_frompc = (unsigned long) frompc;
+      rawarc.raw_selfpc = (unsigned long) tos[toindex].selfpc;
+      rawarc.raw_count = tos[toindex].count;
+      write (fd, &rawarc, sizeof (rawarc));
+    }
+  }
+  close (fd);
+}
+
+/* Solaris 2 libraries use _mcount.  */
+#if defined __i386__
+asm(".globl _mcount\n"
+    "_mcount:\n"
+    "	jmp	internal_mcount\n");
+#elif defined __x86_64__
+/* See GLIBC for additional information about this technique.  */
+asm(".globl _mcount\n" 
+    "	.type	_mcount, @function\n"
+    "_mcount:\n"
+    /* The compiler calls _mcount after the prologue, and does not
+       save any of the registers.  Therefore we must preserve all
+       seven registers which may contain function arguments.  */
+    "	subq	$0x38, %rsp\n"
+    "	movq	%rax, (%rsp)\n"
+    "	movq	%rcx, 0x08(%rsp)\n"
+    "	movq	%rdx, 0x10(%rsp)\n"
+    "	movq	%rsi, 0x18(%rsp)\n"
+    "	movq	%rdi, 0x20(%rsp)\n"
+    "	movq	%r8, 0x28(%rsp)\n"
+    "	movq	%r9, 0x30(%rsp)\n"
+    /* Get SELFPC (pushed by the call to this function) and
+       FROMPCINDEX (via the frame pointer).  */
+    "	movq	0x38(%rsp), %rdi\n"
+    "	movq	0x8(%rbp), %rsi\n"
+    "	call	internal_mcount\n"
+    /* Restore the saved registers.  */
+    "	movq	0x30(%rsp), %r9\n"
+    "	movq	0x28(%rsp), %r8\n"
+    "	movq	0x20(%rsp), %rdi\n"
+    "	movq	0x18(%rsp), %rsi\n"
+    "	movq	0x10(%rsp), %rdx\n"
+    "	movq	0x08(%rsp), %rcx\n"
+    "	movq	(%rsp), %rax\n"
+    "	addq	$0x38, %rsp\n"
+    "	retq\n");
+#elif defined __sparc__
+/* The SPARC stack frame is only held together by the frame pointers
+   in the register windows. According to the SVR4 SPARC ABI
+   Supplement, Low Level System Information/Operating System
+   Interface/Software Trap Types, a type 3 trap will flush all of the
+   register windows to the stack, which will make it possible to walk
+   the frames and find the return addresses.
+	However, it seems awfully expensive to incur a trap (system
+   call) for every function call. It turns out that "call" simply puts
+   the return address in %o7 expecting the "save" in the procedure to
+   shift it into %i7; this means that before the "save" occurs, %o7
+   contains the address of the call to mcount, and %i7 still contains
+   the caller above that. The asm mcount here simply saves those
+   registers in argument registers and branches to internal_mcount,
+   simulating a call with arguments.
+	Kludges:
+	1) the branch to internal_mcount is hard coded; it should be
+   possible to tell asm to use the assembler-name of a symbol.
+	2) in theory, the function calling mcount could have saved %i7
+   somewhere and reused the register; in practice, I *think* this will
+   break longjmp (and maybe the debugger) but I'm not certain. (I take
+   some comfort in the knowledge that it will break the native mcount
+   as well.)
+	3) if builtin_return_address worked, this could be portable.
+   However, it would really have to be optimized for arguments of 0
+   and 1 and do something like what we have here in order to avoid the
+   trap per function call performance hit. 
+	4) the atexit and monsetup calls prevent this from simply
+   being a leaf routine that doesn't do a "save" (and would thus have
+   access to %o7 and %i7 directly) but the call to write() at the end
+   would have also prevented this.
+
+   -- [eichin:19920702.1107EST]  */
+asm(".global _mcount\n"
+    "_mcount:\n"
+    /* i7 == last ret, -> frompcindex.  */
+    "	mov	%i7, %o1\n"
+    /* o7 == current ret, -> selfpc.  */
+    "	mov	%o7, %o0\n"
+    "	b,a	internal_mcount\n");
+#endif
+
+static void
+#ifdef __i386__
+internal_mcount (void)
+#else
+internal_mcount (char *selfpc, unsigned short *frompcindex)
+#endif
+{
+  struct tostruct *top;
+  struct tostruct *prevtop;
+  long toindex;
+  static char already_setup;
+
+#ifdef __i386__
+  char *selfpc;
+  unsigned short *frompcindex;
+
+  /* Find the return address for mcount and the return address for mcount's
+     caller.  */
+
+  /* selfpc = pc pushed by mcount call.
+     This identifies the function that was just entered.  */
+  selfpc = (void *) __builtin_return_address (0);
+  /* frompcindex = pc in preceding frame.
+     This identifies the caller of the function just entered.  */
+  frompcindex = (void *) __builtin_return_address (1);
+#endif
+
+  if(!already_setup) {
+    extern char etext[];
+
+    already_setup = 1;
+
+#if defined __i386__
+    /* <sys/vmparam.h> USERSTACK.  */
+    monstartup ((char *) 0x8048000, etext);
+#elif defined __x86_64__
+    monstartup (NULL, etext);
+#elif defined __sparc__
+    {
+      extern char _start[];
+      extern char _init[];
+
+      monstartup (_start < _init ? _start : _init, etext);
+    }
+#endif
+    atexit (_mcleanup);
+  }
+  /* Check that we are profiling and that we aren't recursively invoked.  */
+  if (profiling) {
+    goto out;
+  }
+  profiling++;
+  /* Check that frompcindex is a reasonable pc value.  For example: signal
+     catchers get called from the stack, not from text space.  too bad.  */
+  frompcindex = (unsigned short *) ((long) frompcindex - (long) s_lowpc);
+  if ((unsigned long) frompcindex > s_textsize) {
+    goto done;
+  }
+  frompcindex = &froms[((long) frompcindex) / (HASHFRACTION * sizeof (*froms))];
+  toindex = *frompcindex;
+  if (toindex == 0) {
+    /* First time traversing this arc.  */
+    toindex = ++tos[0].link;
+    if (toindex >= tolimit) {
+      goto overflow;
+    }
+    *frompcindex = toindex;
+    top = &tos[toindex];
+    top->selfpc = selfpc;
+    top->count = 1;
+    top->link = 0;
+    goto done;
+  }
+  top = &tos[toindex];
+  if (top->selfpc == selfpc) {
+    /* arc at front of chain; usual case.  */
+    top->count++;
+    goto done;
+  }
+  /* Have to go looking down chain for it.  Top points to what we are
+     looking at, prevtop points to previous top.  We know it is not at the
+     head of the chain.  */
+  for (; /* goto done */; ) {
+    if (top->link == 0) {
+      /* top is end of the chain and none of the chain had top->selfpc ==
+	 selfpc, so we allocate a new tostruct and link it to the head of
+	 the chain.  */
+      toindex = ++tos[0].link;
+      if (toindex >= tolimit) {
+	goto overflow;
+      }
+      top = &tos[toindex];
+      top->selfpc = selfpc;
+      top->count = 1;
+      top->link = *frompcindex;
+      *frompcindex = toindex;
+      goto done;
+    }
+    /* Otherwise, check the next arc on the chain.  */
+    prevtop = top;
+    top = &tos[top->link];
+    if (top->selfpc == selfpc) {
+      /* There it is.  Increment its count move it to the head of the
+	 chain.  */
+      top->count++;
+      toindex = prevtop->link;
+      prevtop->link = top->link;
+      top->link = *frompcindex;
+      *frompcindex = toindex;
+      goto done;
+    }
+
+  }
+ done:
+  profiling--;
+  /* ... and fall through. */
+ out:
+  /* Normal return restores saved registers.  */
+  return;
+
+ overflow:
+  /* Halt further profiling.  */
+  profiling++;
+
+#define	TOLIMIT	"mcount: tos overflow\n"
+  write (STDERR_FILENO, TOLIMIT, sizeof (TOLIMIT));
+  goto out;
+}
+
+/* Control profiling.  Profiling is what mcount checks to see if all the
+   data structures are ready.  */
+static void
+moncontrol (int mode)
+{
+  if (mode) {
+    /* Start.  */
+    profil ((unsigned short *) (sbuf + sizeof (struct phdr)),
+	    ssiz - sizeof (struct phdr), (size_t) s_lowpc, s_scale);
+    profiling = 0;
+  } else {
+    /* Stop.  */
+    profil ((unsigned short *) 0, 0, 0, 0);
+    profiling = 3;
+  }
+}
diff --git a/gcc-4.9/libgcc/config/gthr-lynx.h b/gcc-4.9/libgcc/config/gthr-lynx.h
new file mode 100644
index 000000000..df192b61b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/gthr-lynx.h
@@ -0,0 +1,61 @@
+/* Threads compatibility routines for libgcc2 and libobjc for
+   LynxOS.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_LYNX_H
+#define GCC_GTHR_LYNX_H
+
+#ifdef _MULTITHREADED
+
+/* Using the macro version of pthread_setspecific leads to a
+   compilation error.  Instead we have two choices either kill all
+   macros in pthread.h with defining _POSIX_THREADS_CALLS or undefine
+   individual macros where we should fall back on the function
+   implementation.  We choose the second approach.  */
+
+#include <pthread.h>
+#undef pthread_setspecific
+
+/* When using static libc on LynxOS, we cannot define pthread_create
+   weak.  If the multi-threaded application includes iostream.h,
+   gthr-posix.h is included and pthread_create will be defined weak.
+   If pthread_create is weak its defining module in libc is not
+   necessarily included in the link and the symbol is resolved to zero.
+   Therefore the first call to it will crash.
+
+   Since -mthreads is a multilib switch on LynxOS we know that at this
+   point we are compiling for multi-threaded.  Omitting the weak
+   definitions at this point should have no effect.  */
+
+#undef  GTHREAD_USE_WEAK
+#define GTHREAD_USE_WEAK 0
+
+#include "gthr-posix.h"
+
+#else
+#include "gthr-single.h"
+#endif
+
+#endif /* GCC_GTHR_LYNX_H */
diff --git a/gcc-4.9/libgcc/config/gthr-rtems.h b/gcc-4.9/libgcc/config/gthr-rtems.h
new file mode 100644
index 000000000..1b1874cb4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/gthr-rtems.h
@@ -0,0 +1,164 @@
+/* RTEMS threads compatibility routines for libgcc2 and libobjc.
+   by: Rosimildo da Silva( rdasilva@connecttel.com ) */
+/* Compile this one with gcc.  */
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_RTEMS_H
+#define GCC_GTHR_RTEMS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define __GTHREADS 1
+
+#define __GTHREAD_ONCE_INIT  0
+#define __GTHREAD_MUTEX_INIT_FUNCTION  rtems_gxx_mutex_init
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION  rtems_gxx_recursive_mutex_init
+
+/* Avoid dependency on rtems specific headers.  */
+typedef void *__gthread_key_t;
+typedef int   __gthread_once_t;
+typedef void *__gthread_mutex_t;
+typedef void *__gthread_recursive_mutex_t;
+
+/*
+ * External functions provided by RTEMS. They are very similar to their POSIX
+ * counterparts. A "Wrapper API" is being use to avoid dependency on any RTEMS
+ * header files.
+ */
+
+/* generic per task variables */
+extern int rtems_gxx_once (__gthread_once_t *__once, void (*__func) (void));
+extern int rtems_gxx_key_create (__gthread_key_t *__key, void (*__dtor) (void *));
+extern int rtems_gxx_key_delete (__gthread_key_t __key);
+extern void *rtems_gxx_getspecific (__gthread_key_t __key);
+extern int rtems_gxx_setspecific (__gthread_key_t __key, const void *__ptr);
+
+/* mutex support */
+extern void rtems_gxx_mutex_init (__gthread_mutex_t *__mutex);
+extern int rtems_gxx_mutex_destroy (__gthread_mutex_t *__mutex);
+extern int rtems_gxx_mutex_lock (__gthread_mutex_t *__mutex);
+extern int rtems_gxx_mutex_trylock (__gthread_mutex_t *__mutex);
+extern int rtems_gxx_mutex_unlock (__gthread_mutex_t *__mutex);
+
+/* recursive mutex support */
+extern void rtems_gxx_recursive_mutex_init (__gthread_recursive_mutex_t *__mutex);
+extern int rtems_gxx_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex);
+extern int rtems_gxx_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex);
+extern int rtems_gxx_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex);
+
+/* RTEMS threading is always active */
+static inline int
+__gthread_active_p (void)
+{
+  return 1;
+}
+
+/* Wrapper calls */
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+   return rtems_gxx_once( __once, __func );
+}
+
+static inline int
+__gthread_key_create (__gthread_key_t *__key, void (*__dtor) (void *))
+{
+  return rtems_gxx_key_create( __key, __dtor );
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key)
+{
+  return rtems_gxx_key_delete (__key);
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  return rtems_gxx_getspecific (__key);
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  return rtems_gxx_setspecific (__key, __ptr);
+}
+
+static inline int
+__gthread_mutex_destroy (__gthread_mutex_t *__mutex)
+{
+  return rtems_gxx_mutex_destroy (__mutex);
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+    return rtems_gxx_mutex_lock (__mutex);
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+    return rtems_gxx_mutex_trylock (__mutex);
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+    return rtems_gxx_mutex_unlock( __mutex );
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+    return rtems_gxx_recursive_mutex_lock (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+    return rtems_gxx_recursive_mutex_trylock (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+    return rtems_gxx_recursive_mutex_unlock( __mutex );
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  /* This requires that recursive and non-recursive mutexes have the same
+     representation.  */
+    return rtems_gxx_mutex_destroy (__mutex );
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! GCC_GTHR_RTEMS_H */
diff --git a/gcc-4.9/libgcc/config/gthr-vxworks.h b/gcc-4.9/libgcc/config/gthr-vxworks.h
new file mode 100644
index 000000000..4fdd2c30f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/gthr-vxworks.h
@@ -0,0 +1,175 @@
+/* Threads compatibility routines for libgcc2 and libobjc for VxWorks.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Mike Stump <mrs@wrs.com>.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_VXWORKS_H
+#define GCC_GTHR_VXWORKS_H
+
+#ifdef _LIBOBJC
+
+/* libobjc requires the optional pthreads component.  */
+#include "gthr-posix.h"
+
+#else
+#ifdef __cplusplus
+#define UNUSED(x)
+#else
+#define UNUSED(x) x __attribute__((unused))
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define __GTHREADS 1
+#define __gthread_active_p() 1
+
+/* Mutexes are easy, except that they need to be initialized at runtime.  */
+
+#include <semLib.h>
+
+typedef SEM_ID __gthread_mutex_t;
+/* All VxWorks mutexes are recursive.  */
+typedef SEM_ID __gthread_recursive_mutex_t;
+#define __GTHREAD_MUTEX_INIT_FUNCTION __gthread_mutex_init_function
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION __gthread_recursive_mutex_init_function
+
+static inline void
+__gthread_mutex_init_function (__gthread_mutex_t *mutex)
+{
+  *mutex = semMCreate (SEM_Q_PRIORITY | SEM_INVERSION_SAFE | SEM_DELETE_SAFE);
+}
+
+static inline int
+__gthread_mutex_destroy (__gthread_mutex_t * UNUSED(mutex))
+{
+  return 0;
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *mutex)
+{
+  return semTake (*mutex, WAIT_FOREVER);
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *mutex)
+{
+  return semTake (*mutex, NO_WAIT);
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *mutex)
+{
+  return semGive (*mutex);
+}
+
+static inline void
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *mutex)
+{
+  __gthread_mutex_init_function (mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *mutex)
+{
+  return __gthread_mutex_lock (mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *mutex)
+{
+  return __gthread_mutex_trylock (mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *mutex)
+{
+  return __gthread_mutex_unlock (mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_destroy (__mutex);
+}
+
+/* pthread_once is complicated enough that it's implemented
+   out-of-line.  See config/vxlib.c.  */
+
+typedef struct
+{
+#if !defined(__RTP__)
+#if defined(__PPC__)
+  __attribute ((aligned (__alignof (unsigned))))
+#endif
+  volatile unsigned char busy;
+#endif
+  volatile unsigned char done;
+#if !defined(__RTP__) && defined(__PPC__)
+  /* PPC's test-and-set implementation requires a 4 byte aligned
+     object, of which it only sets the first byte.  We use padding
+     here, in order to maintain some amount of backwards
+     compatibility.  Without this padding, gthread_once objects worked
+     by accident because they happen to be static objects and the ppc
+     port automatically increased their alignment to 4 bytes.  */
+  unsigned char pad1;
+  unsigned char pad2;
+#endif
+}
+__gthread_once_t;
+
+#if defined (__RTP__)
+# define __GTHREAD_ONCE_INIT { 0 }
+#elif defined (__PPC__)
+# define __GTHREAD_ONCE_INIT { 0, 0, 0, 0 }
+#else
+# define __GTHREAD_ONCE_INIT { 0, 0 }
+#endif
+
+extern int __gthread_once (__gthread_once_t *__once, void (*__func)(void));
+
+/* Thread-specific data requires a great deal of effort, since VxWorks
+   is not really set up for it.  See config/vxlib.c for the gory
+   details.  All the TSD routines are sufficiently complex that they
+   need to be implemented out of line.  */
+
+typedef unsigned int __gthread_key_t;
+
+extern int __gthread_key_create (__gthread_key_t *__keyp, void (*__dtor)(void *));
+extern int __gthread_key_delete (__gthread_key_t __key);
+
+extern void *__gthread_getspecific (__gthread_key_t __key);
+extern int __gthread_setspecific (__gthread_key_t __key, void *__ptr);
+
+#undef UNUSED
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* not _LIBOBJC */
+
+#endif /* gthr-vxworks.h */
diff --git a/gcc-4.9/libgcc/config/h8300/clzhi2.c b/gcc-4.9/libgcc/config/h8300/clzhi2.c
new file mode 100644
index 000000000..fc71c4d6a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/clzhi2.c
@@ -0,0 +1,35 @@
+/* The implementation of __clzhi2.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+int __clzhi2 (unsigned short x);
+
+int
+__clzhi2 (unsigned short x)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    if (x & ((unsigned short) 1 << (15 - i)))
+      break;
+  return i;
+}
diff --git a/gcc-4.9/libgcc/config/h8300/crti.S b/gcc-4.9/libgcc/config/h8300/crti.S
new file mode 100644
index 000000000..70b192958
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/crti.S
@@ -0,0 +1,63 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* The code in sections .init and .fini is supposed to be a single
+   regular function.  The function in .init is called directly from
+   start in crt0.S.  The function in .fini is atexit()ed in crt0.S
+   too.
+
+   crti.S contributes the prologue of a function to these sections,
+   and crtn.S comes up the epilogue.  STARTFILE_SPEC should list
+   crti.o before any other object files that might add code to .init
+   or .fini sections, and ENDFILE_SPEC should list crtn.o after any
+   such object files.  */
+
+#ifdef __H8300H__
+#ifdef __NORMAL_MODE__
+	.h8300hn
+#else
+	.h8300h
+#endif
+#endif
+
+#ifdef __H8300S__
+#ifdef __NORMAL_MODE__
+	.h8300sn
+#else
+	.h8300s
+#endif
+#endif
+#ifdef __H8300SX__
+#ifdef __NORMAL_MODE__
+	.h8300sxn
+#else
+	.h8300sx
+#endif
+#endif
+
+	.section .init, "ax", @progbits
+        .global  __init
+__init:
+        .section .fini, "ax", @progbits
+        .global  __fini
+__fini:
diff --git a/gcc-4.9/libgcc/config/h8300/crtn.S b/gcc-4.9/libgcc/config/h8300/crtn.S
new file mode 100644
index 000000000..ef4d72c55
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/crtn.S
@@ -0,0 +1,53 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   This file was adapted from glibc sources.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* See an explanation about .init and .fini in crti.S.  */
+
+#ifdef __H8300H__
+#ifdef __NORMAL_MODE__
+	.h8300hn
+#else
+	.h8300h
+#endif
+#endif
+
+#ifdef __H8300S__
+#ifdef __NORMAL_MODE__
+	.h8300sn
+#else
+	.h8300s
+#endif
+#endif
+#ifdef __H8300SX__
+#ifdef __NORMAL_MODE__
+	.h8300sxn
+#else
+	.h8300sx
+#endif
+#endif
+	.section .init, "ax", @progbits
+	rts
+
+	.section .fini, "ax", @progbits
+	rts
diff --git a/gcc-4.9/libgcc/config/h8300/ctzhi2.c b/gcc-4.9/libgcc/config/h8300/ctzhi2.c
new file mode 100644
index 000000000..33097a3d1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/ctzhi2.c
@@ -0,0 +1,35 @@
+/* The implementation of __ctzhi2.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+int __ctzhi2 (unsigned short x);
+
+int
+__ctzhi2 (unsigned short x)
+{
+  int i;
+  for (i = 0; i < 16; i++)
+    if (x & ((unsigned short) 1 << i))
+      break;
+  return i;
+}
diff --git a/gcc-4.9/libgcc/config/h8300/fixunssfsi.c b/gcc-4.9/libgcc/config/h8300/fixunssfsi.c
new file mode 100644
index 000000000..c45531613
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/fixunssfsi.c
@@ -0,0 +1,40 @@
+/* More subroutines needed by GCC output code on some machines.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 1989-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* The libgcc2.c implementation gets confused by our type setup and creates
+   a directly recursive call, so we do our own implementation.  For
+   the H8/300, that's in lib1funcs.S, for H8/300H and H8S, it's here.  */
+
+#ifndef __H8300__
+long __fixunssfsi (float a);
+
+long
+__fixunssfsi (float a)
+{
+  if (a >= (float) 32768L)
+    return (long) (a - 32768L) + 32768L;
+  return (long) a;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/h8300/h8300-lib.h b/gcc-4.9/libgcc/config/h8300/h8300-lib.h
new file mode 100644
index 000000000..cff664a54
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/h8300-lib.h
@@ -0,0 +1,7 @@
+#ifdef FLOAT
+#ifdef __H8300__
+#define CMPtype HItype
+#else
+#define CMPtype SItype
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/h8300/lib1funcs.S b/gcc-4.9/libgcc/config/h8300/lib1funcs.S
new file mode 100644
index 000000000..4bfa7bee1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/lib1funcs.S
@@ -0,0 +1,837 @@
+;; libgcc routines for the Renesas H8/300 CPU.
+;; Contributed by Steve Chamberlain <sac@cygnus.com>
+;; Optimizations by Toshiyasu Morita <toshiyasu.morita@renesas.com>
+
+/* Copyright (C) 1994-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Assembler register definitions.  */
+
+#define A0 r0
+#define A0L r0l
+#define A0H r0h
+
+#define A1 r1
+#define A1L r1l
+#define A1H r1h
+
+#define A2 r2
+#define A2L r2l
+#define A2H r2h
+
+#define A3 r3
+#define A3L r3l
+#define A3H r3h
+
+#define S0 r4
+#define S0L r4l
+#define S0H r4h
+
+#define S1 r5
+#define S1L r5l
+#define S1H r5h
+
+#define S2 r6
+#define S2L r6l
+#define S2H r6h
+
+#ifdef __H8300__
+#define PUSHP	push
+#define POPP	pop
+
+#define A0P	r0
+#define A1P	r1
+#define A2P	r2
+#define A3P	r3
+#define S0P	r4
+#define S1P	r5
+#define S2P	r6
+#endif
+
+#if defined (__H8300H__) || defined (__H8300S__) || defined (__H8300SX__)
+#define PUSHP	push.l
+#define POPP	pop.l
+
+#define A0P	er0
+#define A1P	er1
+#define A2P	er2
+#define A3P	er3
+#define S0P	er4
+#define S1P	er5
+#define S2P	er6
+
+#define A0E	e0
+#define A1E	e1
+#define A2E	e2
+#define A3E	e3
+#endif
+
+#ifdef __H8300H__
+#ifdef __NORMAL_MODE__
+	.h8300hn
+#else
+	.h8300h
+#endif
+#endif
+
+#ifdef __H8300S__
+#ifdef __NORMAL_MODE__
+	.h8300sn
+#else
+	.h8300s
+#endif
+#endif
+#ifdef __H8300SX__
+#ifdef __NORMAL_MODE__
+	.h8300sxn
+#else
+	.h8300sx
+#endif
+#endif
+
+#ifdef L_cmpsi2
+#ifdef __H8300__
+	.section .text
+	.align 2
+	.global ___cmpsi2
+___cmpsi2:
+	cmp.w	A0,A2
+	bne	.L2
+	cmp.w	A1,A3
+	bne	.L4
+	mov.w	#1,A0
+	rts
+.L2:
+	bgt	.L5
+.L3:
+	mov.w	#2,A0
+	rts
+.L4:
+	bls	.L3
+.L5:
+	sub.w	A0,A0
+	rts
+	.end
+#endif
+#endif /* L_cmpsi2 */
+
+#ifdef L_ucmpsi2
+#ifdef __H8300__
+	.section .text
+	.align 2
+	.global ___ucmpsi2
+___ucmpsi2:
+	cmp.w	A0,A2
+	bne	.L2
+	cmp.w	A1,A3
+	bne	.L4
+	mov.w	#1,A0
+	rts
+.L2:
+	bhi	.L5
+.L3:
+	mov.w	#2,A0
+	rts
+.L4:
+	bls	.L3
+.L5:
+	sub.w	A0,A0
+	rts
+	.end
+#endif
+#endif /* L_ucmpsi2 */
+
+#ifdef L_divhi3
+
+;; HImode divides for the H8/300.
+;; We bunch all of this into one object file since there are several
+;; "supporting routines".
+
+; general purpose normalize routine
+;
+; divisor in A0
+; dividend in A1
+; turns both into +ve numbers, and leaves what the answer sign
+; should be in A2L
+
+#ifdef __H8300__
+	.section .text
+	.align 2
+divnorm:
+	or	A0H,A0H		; is divisor > 0
+	stc	ccr,A2L
+	bge	_lab1
+	not	A0H		; no - then make it +ve
+	not	A0L
+	adds	#1,A0
+_lab1:	or	A1H,A1H	; look at dividend
+	bge	_lab2
+	not	A1H		; it is -ve, make it positive
+	not	A1L
+	adds	#1,A1
+	xor	#0x8,A2L; and toggle sign of result
+_lab2:	rts
+;; Basically the same, except that the sign of the divisor determines
+;; the sign.
+modnorm:
+	or	A0H,A0H		; is divisor > 0
+	stc	ccr,A2L
+	bge	_lab7
+	not	A0H		; no - then make it +ve
+	not	A0L
+	adds	#1,A0
+_lab7:	or	A1H,A1H	; look at dividend
+	bge	_lab8
+	not	A1H		; it is -ve, make it positive
+	not	A1L
+	adds	#1,A1
+_lab8:	rts
+
+; A0=A0/A1 signed
+
+	.global	___divhi3
+___divhi3:
+	bsr	divnorm
+	bsr	___udivhi3
+negans:	btst	#3,A2L	; should answer be negative ?
+	beq	_lab4
+	not	A0H	; yes, so make it so
+	not	A0L
+	adds	#1,A0
+_lab4:	rts
+
+; A0=A0%A1 signed
+
+	.global	___modhi3
+___modhi3:
+	bsr	modnorm
+	bsr	___udivhi3
+	mov	A3,A0
+	bra	negans
+
+; A0=A0%A1 unsigned
+
+	.global	___umodhi3
+___umodhi3:
+	bsr	___udivhi3
+	mov	A3,A0
+	rts
+
+; A0=A0/A1 unsigned
+; A3=A0%A1 unsigned
+; A2H trashed
+; D high 8 bits of denom
+; d low 8 bits of denom
+; N high 8 bits of num
+; n low 8 bits of num
+; M high 8 bits of mod
+; m low 8 bits of mod
+; Q high 8 bits of quot
+; q low 8 bits of quot
+; P preserve
+
+; The H8/300 only has a 16/8 bit divide, so we look at the incoming and
+; see how to partition up the expression.
+
+	.global	___udivhi3
+___udivhi3:
+				; A0 A1 A2 A3
+				; Nn Dd       P
+	sub.w	A3,A3		; Nn Dd xP 00
+	or	A1H,A1H
+	bne	divlongway
+	or	A0H,A0H
+	beq	_lab6
+
+; we know that D == 0 and N is != 0
+	mov.b	A0H,A3L		; Nn Dd xP 0N
+	divxu	A1L,A3		;          MQ
+	mov.b	A3L,A0H	 	; Q
+; dealt with N, do n
+_lab6:	mov.b	A0L,A3L		;           n
+	divxu	A1L,A3		;          mq
+	mov.b	A3L,A0L		; Qq
+	mov.b	A3H,A3L         ;           m
+	mov.b	#0x0,A3H	; Qq       0m
+	rts
+
+; D != 0 - which means the denominator is
+;          loop around to get the result.
+
+divlongway:
+	mov.b	A0H,A3L		; Nn Dd xP 0N
+	mov.b	#0x0,A0H	; high byte of answer has to be zero
+	mov.b	#0x8,A2H	;       8
+div8:	add.b	A0L,A0L		; n*=2
+	rotxl	A3L		; Make remainder bigger
+	rotxl	A3H
+	sub.w	A1,A3		; Q-=N
+	bhs	setbit		; set a bit ?
+	add.w	A1,A3		;  no : too far , Q+=N
+
+	dec	A2H
+	bne	div8		; next bit
+	rts
+
+setbit:	inc	A0L		; do insert bit
+	dec	A2H
+	bne	div8		; next bit
+	rts
+
+#endif /* __H8300__ */
+#endif /* L_divhi3 */
+
+#ifdef L_divsi3
+
+;; 4 byte integer divides for the H8/300.
+;;
+;; We have one routine which does all the work and lots of
+;; little ones which prepare the args and massage the sign.
+;; We bunch all of this into one object file since there are several
+;; "supporting routines".
+
+	.section .text
+	.align 2
+
+; Put abs SIs into r0/r1 and r2/r3, and leave a 1 in r6l with sign of rest.
+; This function is here to keep branch displacements small.
+
+#ifdef __H8300__
+
+divnorm:
+	mov.b	A0H,A0H		; is the numerator -ve
+	stc	ccr,S2L		; keep the sign in bit 3 of S2L
+	bge	postive
+
+	; negate arg
+	not	A0H
+	not	A1H
+	not	A0L
+	not	A1L
+
+	add	#1,A1L
+	addx	#0,A1H
+	addx	#0,A0L
+	addx	#0,A0H
+postive:
+	mov.b	A2H,A2H		; is the denominator -ve
+	bge	postive2
+	not	A2L
+	not	A2H
+	not	A3L
+	not	A3H
+	add.b	#1,A3L
+	addx	#0,A3H
+	addx	#0,A2L
+	addx	#0,A2H
+	xor.b	#0x08,S2L	; toggle the result sign
+postive2:
+	rts
+
+;; Basically the same, except that the sign of the divisor determines
+;; the sign.
+modnorm:
+	mov.b	A0H,A0H		; is the numerator -ve
+	stc	ccr,S2L		; keep the sign in bit 3 of S2L
+	bge	mpostive
+
+	; negate arg
+	not	A0H
+	not	A1H
+	not	A0L
+	not	A1L
+
+	add	#1,A1L
+	addx	#0,A1H
+	addx	#0,A0L
+	addx	#0,A0H
+mpostive:
+	mov.b	A2H,A2H		; is the denominator -ve
+	bge	mpostive2
+	not	A2L
+	not	A2H
+	not	A3L
+	not	A3H
+	add.b	#1,A3L
+	addx	#0,A3H
+	addx	#0,A2L
+	addx	#0,A2H
+mpostive2:
+	rts
+
+#else /* __H8300H__ */
+
+divnorm:
+	mov.l	A0P,A0P		; is the numerator -ve
+	stc	ccr,S2L		; keep the sign in bit 3 of S2L
+	bge	postive
+
+	neg.l	A0P		; negate arg
+
+postive:
+	mov.l	A1P,A1P		; is the denominator -ve
+	bge	postive2
+
+	neg.l	A1P		; negate arg
+	xor.b	#0x08,S2L	; toggle the result sign
+
+postive2:
+	rts
+
+;; Basically the same, except that the sign of the divisor determines
+;; the sign.
+modnorm:
+	mov.l	A0P,A0P		; is the numerator -ve
+	stc	ccr,S2L		; keep the sign in bit 3 of S2L
+	bge	mpostive
+
+	neg.l	A0P		; negate arg
+
+mpostive:
+	mov.l	A1P,A1P		; is the denominator -ve
+	bge	mpostive2
+
+	neg.l	A1P		; negate arg
+
+mpostive2:
+	rts
+
+#endif
+
+; numerator in A0/A1
+; denominator in A2/A3
+	.global	___modsi3
+___modsi3:
+#ifdef __H8300__
+	PUSHP	S2P
+	PUSHP	S0P
+	PUSHP	S1P
+	bsr	modnorm
+	bsr	divmodsi4
+	mov	S0,A0
+	mov	S1,A1
+	bra	exitdiv
+#else
+	PUSHP	S2P
+	bsr	modnorm
+	bsr	___udivsi3
+	mov.l	er3,er0
+	bra	exitdiv
+#endif
+
+	;; H8/300H and H8S version of ___udivsi3 is defined later in
+	;; the file.
+#ifdef __H8300__
+	.global	___udivsi3
+___udivsi3:
+	PUSHP	S2P
+	PUSHP	S0P
+	PUSHP	S1P
+	bsr	divmodsi4
+	bra	reti
+#endif
+
+	.global	___umodsi3
+___umodsi3:
+#ifdef __H8300__
+	PUSHP	S2P
+	PUSHP	S0P
+	PUSHP	S1P
+	bsr	divmodsi4
+	mov	S0,A0
+	mov	S1,A1
+	bra	reti
+#else
+	bsr	___udivsi3
+	mov.l	er3,er0
+	rts
+#endif
+
+	.global	___divsi3
+___divsi3:
+#ifdef __H8300__
+	PUSHP	S2P
+	PUSHP	S0P
+	PUSHP	S1P
+	jsr	divnorm
+	jsr	divmodsi4
+#else
+	PUSHP	S2P
+	jsr	divnorm
+	bsr	___udivsi3
+#endif
+
+	; examine what the sign should be
+exitdiv:
+	btst	#3,S2L
+	beq	reti
+
+	; should be -ve
+#ifdef __H8300__
+	not	A0H
+	not	A1H
+	not	A0L
+	not	A1L
+
+	add	#1,A1L
+	addx	#0,A1H
+	addx	#0,A0L
+	addx	#0,A0H
+#else /* __H8300H__ */
+	neg.l	A0P
+#endif
+
+reti:
+#ifdef __H8300__
+	POPP	S1P
+	POPP	S0P
+#endif
+	POPP	S2P
+	rts
+
+	; takes A0/A1 numerator (A0P for H8/300H)
+	; A2/A3 denominator (A1P for H8/300H)
+	; returns A0/A1 quotient (A0P for H8/300H)
+	; S0/S1 remainder (S0P for H8/300H)
+	; trashes S2H
+
+#ifdef __H8300__
+
+divmodsi4:
+        sub.w	S0,S0		; zero play area
+        mov.w	S0,S1
+        mov.b	A2H,S2H
+        or	A2L,S2H
+        or	A3H,S2H
+        bne	DenHighNonZero
+        mov.b	A0H,A0H
+        bne	NumByte0Zero
+        mov.b	A0L,A0L
+        bne	NumByte1Zero
+        mov.b	A1H,A1H
+        bne	NumByte2Zero
+        bra	NumByte3Zero
+NumByte0Zero:
+	mov.b	A0H,S1L
+        divxu	A3L,S1
+        mov.b	S1L,A0H
+NumByte1Zero:
+	mov.b	A0L,S1L
+        divxu	A3L,S1
+        mov.b	S1L,A0L
+NumByte2Zero:
+	mov.b	A1H,S1L
+        divxu	A3L,S1
+        mov.b	S1L,A1H
+NumByte3Zero:
+	mov.b	A1L,S1L
+        divxu	A3L,S1
+        mov.b	S1L,A1L
+
+        mov.b	S1H,S1L
+        mov.b	#0x0,S1H
+        rts
+
+; have to do the divide by shift and test
+DenHighNonZero:
+	mov.b	A0H,S1L
+        mov.b	A0L,A0H
+        mov.b	A1H,A0L
+        mov.b	A1L,A1H
+
+        mov.b	#0,A1L
+        mov.b	#24,S2H	; only do 24 iterations
+
+nextbit:
+	add.w	A1,A1	; double the answer guess
+        rotxl	A0L
+        rotxl	A0H
+
+        rotxl	S1L	; double remainder
+        rotxl	S1H
+        rotxl	S0L
+        rotxl	S0H
+        sub.w	A3,S1	; does it all fit
+        subx	A2L,S0L
+        subx	A2H,S0H
+        bhs	setone
+
+        add.w	A3,S1	; no, restore mistake
+        addx	A2L,S0L
+        addx	A2H,S0H
+
+        dec	S2H
+        bne	nextbit
+        rts
+
+setone:
+	inc	A1L
+        dec	S2H
+        bne	nextbit
+        rts
+
+#else /* __H8300H__ */
+
+	;; This function also computes the remainder and stores it in er3.
+	.global	___udivsi3
+___udivsi3:
+	mov.w	A1E,A1E		; denominator top word 0?
+	bne	DenHighNonZero
+
+	; do it the easy way, see page 107 in manual
+	mov.w	A0E,A2
+	extu.l	A2P
+	divxu.w	A1,A2P
+	mov.w	A2E,A0E
+	divxu.w	A1,A0P
+	mov.w	A0E,A3
+	mov.w	A2,A0E
+	extu.l	A3P
+	rts
+
+ 	; er0 = er0 / er1
+ 	; er3 = er0 % er1
+ 	; trashes er1 er2
+ 	; expects er1 >= 2^16
+DenHighNonZero:
+	mov.l	er0,er3
+	mov.l	er1,er2
+#ifdef __H8300H__
+divmod_L21:
+	shlr.l	er0
+	shlr.l	er2		; make divisor < 2^16
+	mov.w	e2,e2
+	bne	divmod_L21
+#else
+	shlr.l	#2,er2		; make divisor < 2^16
+	mov.w	e2,e2
+	beq	divmod_L22A
+divmod_L21:
+	shlr.l	#2,er0
+divmod_L22:
+	shlr.l	#2,er2		; make divisor < 2^16
+	mov.w	e2,e2
+	bne	divmod_L21
+divmod_L22A:
+	rotxl.w	r2
+	bcs	divmod_L23
+	shlr.l	er0
+	bra	divmod_L24
+divmod_L23:
+	rotxr.w	r2
+	shlr.l	#2,er0
+divmod_L24:
+#endif
+	;; At this point,
+	;;  er0 contains shifted dividend
+	;;  er1 contains divisor
+	;;  er2 contains shifted divisor
+	;;  er3 contains dividend, later remainder
+	divxu.w	r2,er0		; r0 now contains the approximate quotient (AQ)
+	extu.l	er0
+	beq	divmod_L25
+	subs	#1,er0		; er0 = AQ - 1
+	mov.w	e1,r2
+	mulxu.w	r0,er2		; er2 = upper (AQ - 1) * divisor
+	sub.w	r2,e3		; dividend - 65536 * er2
+	mov.w	r1,r2
+	mulxu.w	r0,er2		; compute er3 = remainder (tentative)
+	sub.l	er2,er3		; er3 = dividend - (AQ - 1) * divisor
+divmod_L25:
+ 	cmp.l	er1,er3		; is divisor < remainder?
+	blo	divmod_L26
+ 	adds	#1,er0
+	sub.l	er1,er3		; correct the remainder
+divmod_L26:
+	rts
+
+#endif
+#endif /* L_divsi3 */
+
+#ifdef L_mulhi3
+
+;; HImode multiply.
+; The H8/300 only has an 8*8->16 multiply.
+; The answer is the same as:
+;
+; product = (srca.l * srcb.l) + ((srca.h * srcb.l) + (srcb.h * srca.l)) * 256
+; (we can ignore A1.h * A0.h cause that will all off the top)
+; A0 in
+; A1 in
+; A0 answer
+
+#ifdef __H8300__
+	.section .text
+	.align 2
+	.global	___mulhi3
+___mulhi3:
+	mov.b	A1L,A2L		; A2l gets srcb.l
+	mulxu	A0L,A2		; A2 gets first sub product
+
+	mov.b	A0H,A3L		; prepare for
+	mulxu	A1L,A3		; second sub product
+
+	add.b	A3L,A2H		; sum first two terms
+
+	mov.b	A1H,A3L		; third sub product
+	mulxu	A0L,A3
+
+	add.b	A3L,A2H		; almost there
+	mov.w	A2,A0		; that is
+	rts
+
+#endif
+#endif /* L_mulhi3 */
+
+#ifdef L_mulsi3
+
+;; SImode multiply.
+;;
+;; I think that shift and add may be sufficient for this.  Using the
+;; supplied 8x8->16 would need 10 ops of 14 cycles each + overhead.  This way
+;; the inner loop uses maybe 20 cycles + overhead, but terminates
+;; quickly on small args.
+;;
+;; A0/A1 src_a
+;; A2/A3 src_b
+;;
+;;  while (a)
+;;    {
+;;      if (a & 1)
+;;        r += b;
+;;      a >>= 1;
+;;      b <<= 1;
+;;    }
+
+	.section .text
+	.align 2
+
+#ifdef __H8300__
+
+	.global	___mulsi3
+___mulsi3:
+	PUSHP	S0P
+	PUSHP	S1P
+
+	sub.w	S0,S0
+	sub.w	S1,S1
+
+	; while (a)
+_top:	mov.w	A0,A0
+	bne	_more
+	mov.w	A1,A1
+	beq	_done
+_more:	; if (a & 1)
+	bld	#0,A1L
+	bcc	_nobit
+	; r += b
+	add.w	A3,S1
+	addx	A2L,S0L
+	addx	A2H,S0H
+_nobit:
+	; a >>= 1
+	shlr	A0H
+	rotxr	A0L
+	rotxr	A1H
+	rotxr	A1L
+
+	; b <<= 1
+	add.w	A3,A3
+	addx	A2L,A2L
+	addx	A2H,A2H
+	bra 	_top
+
+_done:
+	mov.w	S0,A0
+	mov.w	S1,A1
+	POPP	S1P
+	POPP	S0P
+	rts
+
+#else /* __H8300H__ */
+
+;
+; mulsi3 for H8/300H - based on Renesas SH implementation
+;
+; by Toshiyasu Morita
+;
+; Old code:
+;
+; 16b * 16b = 372 states (worst case)
+; 32b * 32b = 724 states (worst case)
+;
+; New code:
+;
+; 16b * 16b =  48 states
+; 16b * 32b =  72 states
+; 32b * 32b =  92 states
+;
+
+	.global	___mulsi3
+___mulsi3:
+	mov.w	r1,r2   ; ( 2 states) b * d
+	mulxu	r0,er2  ; (22 states)
+
+	mov.w	e0,r3   ; ( 2 states) a * d
+	beq	L_skip1 ; ( 4 states)
+	mulxu	r1,er3  ; (22 states)
+	add.w	r3,e2   ; ( 2 states)
+
+L_skip1:
+	mov.w	e1,r3   ; ( 2 states) c * b
+	beq	L_skip2 ; ( 4 states)
+	mulxu	r0,er3  ; (22 states)
+	add.w	r3,e2   ; ( 2 states)
+
+L_skip2:
+	mov.l	er2,er0	; ( 2 states)
+	rts		; (10 states)
+
+#endif
+#endif /* L_mulsi3 */
+#ifdef L_fixunssfsi_asm
+/* For the h8300 we use asm to save some bytes, to
+   allow more programs to fit into the tiny address
+   space.  For the H8/300H and H8S, the C version is good enough.  */
+#ifdef __H8300__
+/* We still treat NANs different than libgcc2.c, but then, the
+   behavior is undefined anyways.  */
+	.global	___fixunssfsi
+___fixunssfsi:
+	cmp.b #0x4f,r0h
+	bge Large_num
+	jmp     @___fixsfsi
+Large_num:
+	bhi L_huge_num
+	xor.b #0x80,A0L
+	bmi L_shift8
+L_huge_num:
+	mov.w #65535,A0
+	mov.w A0,A1
+	rts
+L_shift8:
+	mov.b A0L,A0H
+	mov.b A1H,A0L
+	mov.b A1L,A1H
+	mov.b #0,A1L
+	rts
+#endif
+#endif /* L_fixunssfsi_asm */
diff --git a/gcc-4.9/libgcc/config/h8300/parityhi2.c b/gcc-4.9/libgcc/config/h8300/parityhi2.c
new file mode 100644
index 000000000..979ae994f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/parityhi2.c
@@ -0,0 +1,36 @@
+/* The implementation of __parityhi2.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+int __parityhi2 (unsigned short x);
+
+int
+__parityhi2 (unsigned short x)
+{
+  int i;
+  int count = 0;
+  for (i = 0; i < 16; i++)
+    if (x & ((unsigned short) 1 << i))
+      count++;
+  return count & 1;
+}
diff --git a/gcc-4.9/libgcc/config/h8300/popcounthi2.c b/gcc-4.9/libgcc/config/h8300/popcounthi2.c
new file mode 100644
index 000000000..5847131da
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/popcounthi2.c
@@ -0,0 +1,36 @@
+/* The implementation of __popcounthi2.
+   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+int __popcounthi2 (unsigned short x);
+
+int
+__popcounthi2 (unsigned short x)
+{
+  int i;
+  int count = 0;
+  for (i = 0; i < 16; i++)
+    if (x & ((unsigned short) 1 << i))
+      count++;
+  return count;
+}
diff --git a/gcc-4.9/libgcc/config/h8300/t-h8300 b/gcc-4.9/libgcc/config/h8300/t-h8300
new file mode 100644
index 000000000..b6448523e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/h8300/t-h8300
@@ -0,0 +1,13 @@
+LIB1ASMSRC = h8300/lib1funcs.S
+LIB1ASMFUNCS = _cmpsi2 _ucmpsi2 _divhi3 _divsi3 _mulhi3 _mulsi3 \
+  _fixunssfsi_asm
+
+LIB2ADD = \
+	$(srcdir)/config/h8300/clzhi2.c \
+	$(srcdir)/config/h8300/ctzhi2.c \
+	$(srcdir)/config/h8300/parityhi2.c \
+	$(srcdir)/config/h8300/popcounthi2.c \
+	$(srcdir)/config/h8300/fixunssfsi.c
+
+# We do not have DF type, so fake out the libgcc2 compilation.
+HOST_LIBGCC2_CFLAGS += -DDF=SF
diff --git a/gcc-4.9/libgcc/config/hardfp.c b/gcc-4.9/libgcc/config/hardfp.c
new file mode 100644
index 000000000..4d938d44b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/hardfp.c
@@ -0,0 +1,62 @@
+/* Dummy floating-point routines for hard-float code.
+   Copyright (C) 2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define sf float
+#define df double
+
+#if defined (OP_add3)
+TYPE FUNC (TYPE x, TYPE y) { return x + y; }
+#elif defined (OP_sub3)
+TYPE FUNC (TYPE x, TYPE y) { return x - y; }
+#elif defined (OP_neg2)
+TYPE FUNC (TYPE x) { return -x; }
+#elif defined (OP_mul3)
+TYPE FUNC (TYPE x, TYPE y) { return x * y; }
+#elif defined (OP_div3)
+TYPE FUNC (TYPE x, TYPE y) { return x / y; }
+#elif defined (OP_eq2) || defined (OP_ne2)
+int FUNC (TYPE x, TYPE y) { return x == y ? 0 : 1; }
+#elif defined (OP_ge2)
+int FUNC (TYPE x, TYPE y) { return x >= y ? 0 : -1; }
+#elif defined (OP_gt2)
+int FUNC (TYPE x, TYPE y) { return x > y ? 1 : 0; }
+#elif defined (OP_le2)
+int FUNC (TYPE x, TYPE y) { return x <= y ? 0 : 1; }
+#elif defined (OP_lt2)
+int FUNC (TYPE x, TYPE y) { return x < y ? -1 : 0; }
+#elif defined (OP_unord2)
+int FUNC (TYPE x, TYPE y) { return __builtin_isunordered (x, y); }
+#elif defined (OP_fixsi)
+int FUNC (TYPE x) { return (int) x; }
+#elif defined (OP_floatsi)
+TYPE FUNC (int x) { return (TYPE) x; }
+#elif defined (OP_floatunsi)
+TYPE FUNC (unsigned int x) { return (TYPE) x; }
+#elif defined (OP_extendsf2)
+TYPE FUNC (float x) { return (TYPE) x; }
+#elif defined (OP_truncdf2)
+TYPE FUNC (double x) { return (TYPE) x; }
+#else
+#error Unknown operation
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/32/sfp-machine.h b/gcc-4.9/libgcc/config/i386/32/sfp-machine.h
new file mode 100644
index 000000000..1fa282d7a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/32/sfp-machine.h
@@ -0,0 +1,113 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned int
+#define _FP_WS_TYPE		signed int
+#define _FP_I_TYPE		int
+
+#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)	\
+  __asm__ ("add{l} {%11,%3|%3,%11}\n\t"				\
+	   "adc{l} {%9,%2|%2,%9}\n\t"				\
+	   "adc{l} {%7,%1|%1,%7}\n\t"				\
+	   "adc{l} {%5,%0|%0,%5}"				\
+	   : "=r" ((USItype) (r3)),				\
+	     "=&r" ((USItype) (r2)),				\
+	     "=&r" ((USItype) (r1)),				\
+	     "=&r" ((USItype) (r0))				\
+	   : "%0" ((USItype) (x3)),				\
+	     "g" ((USItype) (y3)),				\
+	     "%1" ((USItype) (x2)),				\
+	     "g" ((USItype) (y2)),				\
+	     "%2" ((USItype) (x1)),				\
+	     "g" ((USItype) (y1)),				\
+	     "%3" ((USItype) (x0)),				\
+	     "g" ((USItype) (y0)))
+#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)		\
+  __asm__ ("add{l} {%8,%2|%2,%8}\n\t"				\
+	   "adc{l} {%6,%1|%1,%6}\n\t"				\
+	   "adc{l} {%4,%0|%0,%4}"				\
+	   : "=r" ((USItype) (r2)),				\
+	     "=&r" ((USItype) (r1)),				\
+	     "=&r" ((USItype) (r0))				\
+	   : "%0" ((USItype) (x2)),				\
+	     "g" ((USItype) (y2)),				\
+	     "%1" ((USItype) (x1)),				\
+	     "g" ((USItype) (y1)),				\
+	     "%2" ((USItype) (x0)),				\
+	     "g" ((USItype) (y0)))
+#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)	\
+  __asm__ ("sub{l} {%11,%3|%3,%11}\n\t"				\
+	   "sbb{l} {%9,%2|%2,%9}\n\t"				\
+	   "sbb{l} {%7,%1|%1,%7}\n\t"				\
+	   "sbb{l} {%5,%0|%0,%5}"				\
+	   : "=r" ((USItype) (r3)),				\
+	     "=&r" ((USItype) (r2)),				\
+	     "=&r" ((USItype) (r1)),				\
+	     "=&r" ((USItype) (r0))				\
+	   : "0" ((USItype) (x3)),				\
+	     "g" ((USItype) (y3)),				\
+	     "1" ((USItype) (x2)),				\
+	     "g" ((USItype) (y2)),				\
+	     "2" ((USItype) (x1)),				\
+	     "g" ((USItype) (y1)),				\
+	     "3" ((USItype) (x0)),				\
+	     "g" ((USItype) (y0)))
+#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)		\
+  __asm__ ("sub{l} {%8,%2|%2,%8}\n\t"				\
+	   "sbb{l} {%6,%1|%1,%6}\n\t"				\
+	   "sbb{l} {%4,%0|%0,%4}"				\
+	   : "=r" ((USItype) (r2)),				\
+	     "=&r" ((USItype) (r1)),				\
+	     "=&r" ((USItype) (r0))				\
+	   : "0" ((USItype) (x2)),				\
+	     "g" ((USItype) (y2)),				\
+	     "1" ((USItype) (x1)),				\
+	     "g" ((USItype) (y1)),				\
+	     "2" ((USItype) (x0)),				\
+	     "g" ((USItype) (y0)))
+#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i)				\
+  __asm__ ("add{l} {%4,%3|%3,%4}\n\t"				\
+	   "adc{l} {$0,%2|%2,0}\n\t"				\
+	   "adc{l} {$0,%1|%1,0}\n\t"				\
+	   "adc{l} {$0,%0|%0,0}"				\
+	   : "+r" ((USItype) (x3)),				\
+	     "+&r" ((USItype) (x2)),				\
+	     "+&r" ((USItype) (x1)),				\
+	     "+&r" ((USItype) (x0))				\
+	   : "g" ((USItype) (i)))
+
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D, 0
+/* Even if XFmode is 12byte,  we have to pad it to
+   16byte since soft-fp emulation is done in 16byte.  */
+#define _FP_NANFRAC_E		_FP_QNANBIT_E, 0, 0, 0
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0, 0, 0
+
+#ifndef _SOFT_FLOAT
+#define FP_EX_SHIFT 0
+
+#define _FP_DECL_EX \
+  unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST;
+
+#define FP_RND_NEAREST		0
+#define FP_RND_ZERO		0xc00
+#define FP_RND_PINF		0x800
+#define FP_RND_MINF		0x400
+
+#define FP_RND_MASK		0xc00
+
+#define FP_INIT_ROUNDMODE				\
+  do {							\
+    __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw));	\
+  } while (0)
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/32/t-softfp b/gcc-4.9/libgcc/config/i386/32/t-softfp
new file mode 100644
index 000000000..a48a5b3b1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/32/t-softfp
@@ -0,0 +1,5 @@
+# Omit TImode functions
+softfp_int_modes := si di
+
+# Provide fallbacks for __builtin_copysignq and __builtin_fabsq.
+LIB2ADD += $(srcdir)/config/i386/32/tf-signs.c
diff --git a/gcc-4.9/libgcc/config/i386/32/tf-signs.c b/gcc-4.9/libgcc/config/i386/32/tf-signs.c
new file mode 100644
index 000000000..719bf877b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/32/tf-signs.c
@@ -0,0 +1,62 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+union _FP_UNION_Q
+{
+   __float128 flt;
+   struct 
+   {
+      unsigned long frac0 : 32;
+      unsigned long frac1 : 32;
+      unsigned long frac2 : 32;
+      unsigned long frac3 : 16;
+      unsigned exp : 15;
+      unsigned sign : 1;
+   } bits __attribute__((packed));
+};
+
+__float128 __copysigntf3 (__float128, __float128);
+__float128 __fabstf2 (__float128);
+
+__float128
+__copysigntf3 (__float128 a, __float128 b)
+{
+  union _FP_UNION_Q A, B;
+
+  A.flt = a;
+  B.flt = b;
+  A.bits.sign = B.bits.sign;
+
+  return A.flt;
+}
+
+__float128
+__fabstf2 (__float128 a)
+{
+  union _FP_UNION_Q A;
+
+  A.flt = a;
+  A.bits.sign = 0;
+
+  return A.flt;
+}
diff --git a/gcc-4.9/libgcc/config/i386/64/_divtc3.c b/gcc-4.9/libgcc/config/i386/64/_divtc3.c
new file mode 100644
index 000000000..0095d245e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/_divtc3.c
@@ -0,0 +1,16 @@
+#ifdef SHARED
+#define __divtc3 __divtc3_shared
+#endif
+
+#define L_divtc3
+#include "libgcc2.c"
+
+#ifdef SHARED
+#undef __divtc3
+extern __typeof__ (__divtc3_shared) __divtc3_compat __attribute__((alias ("__divtc3_shared")));
+
+#ifndef _WIN32
+asm (".symver __divtc3_compat,__divtc3@GCC_4.0.0");
+asm (".symver __divtc3_shared,__divtc3@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/_multc3.c b/gcc-4.9/libgcc/config/i386/64/_multc3.c
new file mode 100644
index 000000000..08b5ee451
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/_multc3.c
@@ -0,0 +1,16 @@
+#ifdef SHARED
+#define __multc3 __multc3_shared
+#endif
+
+#define L_multc3
+#include "libgcc2.c"
+
+#ifdef SHARED
+#undef __multc3
+extern __typeof__ (__multc3_shared) __multc3_compat __attribute__((alias ("__multc3_shared")));
+
+#ifndef _WIN32
+asm (".symver __multc3_compat,__multc3@GCC_4.0.0");
+asm (".symver __multc3_shared,__multc3@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/_powitf2.c b/gcc-4.9/libgcc/config/i386/64/_powitf2.c
new file mode 100644
index 000000000..e8360156b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/_powitf2.c
@@ -0,0 +1,16 @@
+#ifdef SHARED
+#define __powitf2 __powitf2_shared
+#endif
+
+#define L_powitf2
+#include "libgcc2.c"
+
+#ifdef SHARED
+#undef __powitf2
+extern __typeof__ (__powitf2_shared) __powitf2_compat __attribute__((alias ("__powitf2_shared")));
+
+#ifndef _WIN32
+asm (".symver __powitf2_compat,__powitf2@GCC_4.0.0");
+asm (".symver __powitf2_shared,__powitf2@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/eqtf2.c b/gcc-4.9/libgcc/config/i386/64/eqtf2.c
new file mode 100644
index 000000000..23982fb9e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/eqtf2.c
@@ -0,0 +1,15 @@
+#ifdef SHARED
+#define __netf2 __netf2_shared
+#endif
+
+#include "soft-fp/eqtf2.c"
+
+#ifdef SHARED
+#undef __netf2
+strong_alias (__netf2_shared, __netf2_compat);
+
+#ifndef _WIN32
+asm (".symver __netf2_compat,__netf2@GCC_3.0");
+asm (".symver __netf2_shared,__netf2@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/getf2.c b/gcc-4.9/libgcc/config/i386/64/getf2.c
new file mode 100644
index 000000000..e2c416490
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/getf2.c
@@ -0,0 +1,15 @@
+#ifdef SHARED
+#define __gttf2 __gttf2_shared
+#endif
+
+#include "soft-fp/getf2.c"
+
+#ifdef SHARED
+#undef __gttf2
+strong_alias (__gttf2_shared, __gttf2_compat);
+
+#ifndef _WIN32
+asm (".symver __gttf2_compat,__gttf2@GCC_3.0");
+asm (".symver __gttf2_shared,__gttf2@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/letf2.c b/gcc-4.9/libgcc/config/i386/64/letf2.c
new file mode 100644
index 000000000..784337fff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/letf2.c
@@ -0,0 +1,15 @@
+#ifdef SHARED
+#define __lttf2 __lttf2_shared
+#endif
+
+#include "soft-fp/letf2.c"
+
+#ifdef SHARED
+#undef __lttf2
+strong_alias (__lttf2_shared, __lttf2_compat);
+
+#ifndef _WIN32
+asm (".symver __lttf2_compat,__lttf2@GCC_3.0");
+asm (".symver __lttf2_shared,__lttf2@@GCC_4.3.0");
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/sfp-machine.h b/gcc-4.9/libgcc/config/i386/64/sfp-machine.h
new file mode 100644
index 000000000..1ff94c23e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/sfp-machine.h
@@ -0,0 +1,38 @@
+#define _FP_W_TYPE_SIZE		64
+#define _FP_W_TYPE		unsigned long long
+#define _FP_WS_TYPE		signed long long
+#define _FP_I_TYPE		long long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D
+#define _FP_NANFRAC_E		_FP_QNANBIT_E, 0
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0
+
+#ifndef _SOFT_FLOAT
+#define FP_EX_SHIFT 7
+
+#define _FP_DECL_EX \
+  unsigned int _fcw __attribute__ ((unused)) = FP_RND_NEAREST;
+
+#define FP_RND_NEAREST		0
+#define FP_RND_ZERO		0x6000
+#define FP_RND_PINF		0x4000
+#define FP_RND_MINF		0x2000
+
+#define FP_RND_MASK		0x6000
+
+#define FP_INIT_ROUNDMODE					\
+  do {								\
+    __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (_fcw));	\
+  } while (0)
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/64/t-softfp-compat b/gcc-4.9/libgcc/config/i386/64/t-softfp-compat
new file mode 100644
index 000000000..0978695c3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/64/t-softfp-compat
@@ -0,0 +1,15 @@
+# When TFmode was first added to x86-64 in gcc 4.3.0, some TFmode
+# support functions got improper versions by accident.  Here we
+# correct the version and provide backward binary compatibility.
+
+# Filter out the following TFmode functions.
+tf-compats = getf2.c letf2.c eqtf2.c
+tf-functions := $(addprefix $(srcdir)/soft-fp/, $(tf-compats))
+LIB2ADD := $(filter-out $(tf-functions), $(LIB2ADD))
+LIB2ADD += $(addprefix $(srcdir)/config/i386/64/, $(tf-compats))
+
+# Replace _divtc3, _multc3 and _powitf2.
+libgcc2-tf-functions = _divtc3 _multc3 _powitf2
+LIB2FUNCS_EXCLUDE += $(libgcc2-tf-functions)
+libgcc2-tf-compats = $(addsuffix .c, $(libgcc2-tf-functions))
+LIB2ADD += $(addprefix $(srcdir)/config/i386/64/, $(libgcc2-tf-compats))
diff --git a/gcc-4.9/libgcc/config/i386/cpuinfo.c b/gcc-4.9/libgcc/config/i386/cpuinfo.c
new file mode 100644
index 000000000..6ff7502bb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/cpuinfo.c
@@ -0,0 +1,405 @@
+/* Get CPU type and Features for x86 processors.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Sriraman Tallam (tmsriram@google.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "cpuid.h"
+#include "tsystem.h"
+#include "auto-target.h"
+
+#ifdef HAVE_INIT_PRIORITY
+#define CONSTRUCTOR_PRIORITY (101)
+#else
+#define CONSTRUCTOR_PRIORITY
+#endif
+
+int __cpu_indicator_init (void)
+  __attribute__ ((constructor CONSTRUCTOR_PRIORITY));
+
+/* Processor Vendor and Models. */
+
+enum processor_vendor
+{
+  VENDOR_INTEL = 1,
+  VENDOR_AMD,
+  VENDOR_OTHER,
+  VENDOR_MAX
+};
+
+/* Any new types or subtypes have to be inserted at the end. */
+
+enum processor_types
+{
+  INTEL_BONNELL = 1,
+  INTEL_CORE2,
+  INTEL_COREI7,
+  AMDFAM10H,
+  AMDFAM15H,
+  INTEL_SILVERMONT,
+  AMD_BTVER1,
+  AMD_BTVER2,  
+  CPU_TYPE_MAX
+};
+
+enum processor_subtypes
+{
+  INTEL_COREI7_NEHALEM = 1,
+  INTEL_COREI7_WESTMERE,
+  INTEL_COREI7_SANDYBRIDGE,
+  AMDFAM10H_BARCELONA,
+  AMDFAM10H_SHANGHAI,
+  AMDFAM10H_ISTANBUL,
+  AMDFAM15H_BDVER1,
+  AMDFAM15H_BDVER2,
+  AMDFAM15H_BDVER3,
+  AMDFAM15H_BDVER4,
+  INTEL_COREI7_IVYBRIDGE,
+  INTEL_COREI7_HASWELL,
+  CPU_SUBTYPE_MAX
+};
+
+/* ISA Features supported. */
+
+enum processor_features
+{
+  FEATURE_CMOV = 0,
+  FEATURE_MMX,
+  FEATURE_POPCNT,
+  FEATURE_SSE,
+  FEATURE_SSE2,
+  FEATURE_SSE3,
+  FEATURE_SSSE3,
+  FEATURE_SSE4_1,
+  FEATURE_SSE4_2,
+  FEATURE_AVX,
+  FEATURE_AVX2,
+  FEATURE_SSE4_A,
+  FEATURE_FMA4,
+  FEATURE_XOP,
+  FEATURE_FMA
+};
+
+struct __processor_model
+{
+  unsigned int __cpu_vendor;
+  unsigned int __cpu_type;
+  unsigned int __cpu_subtype;
+  unsigned int __cpu_features[1];
+} __cpu_model;
+
+
+/* Get the specific type of AMD CPU.  */
+
+static void
+get_amd_cpu (unsigned int family, unsigned int model)
+{
+  switch (family)
+    {
+    /* AMD Family 10h.  */
+    case 0x10:
+      __cpu_model.__cpu_type = AMDFAM10H;
+      switch (model)
+	{
+	case 0x2:
+	  /* Barcelona.  */
+	  __cpu_model.__cpu_subtype = AMDFAM10H_BARCELONA;
+	  break;
+	case 0x4:
+	  /* Shanghai.  */
+	  __cpu_model.__cpu_subtype = AMDFAM10H_SHANGHAI;
+	  break;
+	case 0x8:
+	  /* Istanbul.  */
+	  __cpu_model.__cpu_subtype = AMDFAM10H_ISTANBUL;
+	  break;
+	default:
+	  break;
+	}
+      break;
+    /* AMD Family 14h "btver1". */
+    case 0x14:
+      __cpu_model.__cpu_type = AMD_BTVER1;
+      break;
+    /* AMD Family 15h "Bulldozer".  */
+    case 0x15:
+      __cpu_model.__cpu_type = AMDFAM15H;
+      /* Bulldozer version 1.  */
+      if ( model <= 0xf)
+	__cpu_model.__cpu_subtype = AMDFAM15H_BDVER1;
+      /* Bulldozer version 2 "Piledriver" */
+      if (model >= 0x10 && model <= 0x2f)
+	__cpu_model.__cpu_subtype = AMDFAM15H_BDVER2;      
+      /* Bulldozer version 3 "Steamroller"  */
+      if (model >= 0x30 && model <= 0x4f)
+	__cpu_model.__cpu_subtype = AMDFAM15H_BDVER3;
+      break;
+    /* AMD Family 16h "btver2" */
+    case 0x16:
+      __cpu_model.__cpu_type = AMD_BTVER2;
+      break;
+    default:
+      break;
+    }
+}
+
+/* Get the specific type of Intel CPU.  */
+
+static void
+get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
+{
+  /* Parse family and model only if brand ID is 0. */
+  if (brand_id == 0)
+    {
+      switch (family)
+	{
+	case 0x5:
+	  /* Pentium.  */
+	  break;
+	case 0x6:
+	  switch (model)
+	    {
+	    case 0x1c:
+	    case 0x26:
+	      /* Bonnell.  */
+	      __cpu_model.__cpu_type = INTEL_BONNELL;
+	      break;
+	    case 0x37:
+	    case 0x4d:
+	      /* Silvermont.  */
+	      __cpu_model.__cpu_type = INTEL_SILVERMONT;
+	      break;
+	    case 0x1a:
+	    case 0x1e:
+	    case 0x1f:
+	    case 0x2e:
+	      /* Nehalem.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_NEHALEM;
+	      break;
+	    case 0x25:
+	    case 0x2c:
+	    case 0x2f:
+	      /* Westmere.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_WESTMERE;
+	      break;
+	    case 0x2a:
+	    case 0x2d:
+	      /* Sandy Bridge.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_SANDYBRIDGE;
+	      break;
+	    case 0x3a:
+	    case 0x3e:
+	      /* Ivy Bridge.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
+	      break;
+	    case 0x3c:
+	    case 0x45:
+	    case 0x46:
+	      /* Haswell.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
+	      break;
+	    case 0x17:
+	    case 0x1d:
+	      /* Penryn.  */
+	    case 0x0f:
+	      /* Merom.  */
+	      __cpu_model.__cpu_type = INTEL_CORE2;
+	      break;
+	    default:
+	      break;
+	    }
+	  break;
+	default:
+	  /* We have no idea.  */
+	  break;
+	}
+    }
+}	             	
+
+/* ECX and EDX are output of CPUID at level one.  MAX_CPUID_LEVEL is
+   the max possible level of CPUID insn.  */
+static void
+get_available_features (unsigned int ecx, unsigned int edx,
+			int max_cpuid_level)
+{
+  unsigned int features = 0;
+
+  if (edx & bit_CMOV)
+    features |= (1 << FEATURE_CMOV);
+  if (edx & bit_MMX)
+    features |= (1 << FEATURE_MMX);
+  if (edx & bit_SSE)
+    features |= (1 << FEATURE_SSE);
+  if (edx & bit_SSE2)
+    features |= (1 << FEATURE_SSE2);
+  if (ecx & bit_POPCNT)
+    features |= (1 << FEATURE_POPCNT);
+  if (ecx & bit_SSE3)
+    features |= (1 << FEATURE_SSE3);
+  if (ecx & bit_SSSE3)
+    features |= (1 << FEATURE_SSSE3);
+  if (ecx & bit_SSE4_1)
+    features |= (1 << FEATURE_SSE4_1);
+  if (ecx & bit_SSE4_2)
+    features |= (1 << FEATURE_SSE4_2);
+  if (ecx & bit_AVX)
+    features |= (1 << FEATURE_AVX);
+  if (ecx & bit_FMA)
+    features |= (1 << FEATURE_FMA);
+
+  /* Get Advanced Features at level 7 (eax = 7, ecx = 0). */
+  if (max_cpuid_level >= 7)
+    {
+      unsigned int eax, ebx, ecx, edx;
+      __cpuid_count (7, 0, eax, ebx, ecx, edx);
+      if (ebx & bit_AVX2)
+	features |= (1 << FEATURE_AVX2);
+    }
+
+  unsigned int ext_level;
+  unsigned int eax, ebx;
+  /* Check cpuid level of extended features.  */
+  __cpuid (0x80000000, ext_level, ebx, ecx, edx);
+
+  if (ext_level > 0x80000000)
+    {
+      __cpuid (0x80000001, eax, ebx, ecx, edx);
+
+      if (ecx & bit_SSE4a)
+	features |= (1 << FEATURE_SSE4_A);
+      if (ecx & bit_FMA4)
+	features |= (1 << FEATURE_FMA4);
+      if (ecx & bit_XOP)
+	features |= (1 << FEATURE_XOP);
+    }
+    
+  __cpu_model.__cpu_features[0] = features;
+}
+
+/* A noinline function calling __get_cpuid. Having many calls to
+   cpuid in one function in 32-bit mode causes GCC to complain:
+   "can't find a register in class CLOBBERED_REGS".  This is
+   related to PR rtl-optimization 44174. */
+
+static int __attribute__ ((noinline))
+__get_cpuid_output (unsigned int __level,
+		    unsigned int *__eax, unsigned int *__ebx,
+		    unsigned int *__ecx, unsigned int *__edx)
+{
+  return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
+}
+
+
+/* A constructor function that is sets __cpu_model and __cpu_features with
+   the right values.  This needs to run only once.  This constructor is
+   given the highest priority and it should run before constructors without
+   the priority set.  However, it still runs after ifunc initializers and
+   needs to be called explicitly there.  */
+
+int __attribute__ ((constructor CONSTRUCTOR_PRIORITY))
+__cpu_indicator_init (void)
+{
+  unsigned int eax, ebx, ecx, edx;
+
+  int max_level = 5;
+  unsigned int vendor;
+  unsigned int model, family, brand_id;
+  unsigned int extended_model, extended_family;
+
+  /* This function needs to run just once.  */
+  if (__cpu_model.__cpu_vendor)
+    return 0;
+
+  /* Assume cpuid insn present. Run in level 0 to get vendor id. */
+  if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
+    {
+      __cpu_model.__cpu_vendor = VENDOR_OTHER;
+      return -1;
+    }
+
+  vendor = ebx;
+  max_level = eax;
+
+  if (max_level < 1)
+    {
+      __cpu_model.__cpu_vendor = VENDOR_OTHER;
+      return -1;
+    }
+
+  if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
+    {
+      __cpu_model.__cpu_vendor = VENDOR_OTHER;
+      return -1;
+    }
+
+  model = (eax >> 4) & 0x0f;
+  family = (eax >> 8) & 0x0f;
+  brand_id = ebx & 0xff;
+  extended_model = (eax >> 12) & 0xf0;
+  extended_family = (eax >> 20) & 0xff;
+
+  if (vendor == signature_INTEL_ebx)
+    {
+      /* Adjust model and family for Intel CPUS. */
+      if (family == 0x0f)
+	{
+	  family += extended_family;
+	  model += extended_model;
+	}
+      else if (family == 0x06)
+	model += extended_model;
+
+      /* Get CPU type.  */
+      get_intel_cpu (family, model, brand_id);
+      /* Find available features. */
+      get_available_features (ecx, edx, max_level);
+      __cpu_model.__cpu_vendor = VENDOR_INTEL;
+    }
+  else if (vendor == signature_AMD_ebx)
+    {
+      /* Adjust model and family for AMD CPUS. */
+      if (family == 0x0f)
+	{
+	  family += extended_family;
+	  model += (extended_model << 4);
+	}
+
+      /* Get CPU type.  */
+      get_amd_cpu (family, model);
+      /* Find available features. */
+      get_available_features (ecx, edx, max_level);
+      __cpu_model.__cpu_vendor = VENDOR_AMD;
+    }
+  else
+    __cpu_model.__cpu_vendor = VENDOR_OTHER;
+
+  gcc_assert (__cpu_model.__cpu_vendor < VENDOR_MAX);
+  gcc_assert (__cpu_model.__cpu_type < CPU_TYPE_MAX);
+  gcc_assert (__cpu_model.__cpu_subtype < CPU_SUBTYPE_MAX);
+
+  return 0;
+}
diff --git a/gcc-4.9/libgcc/config/i386/crtfastmath.c b/gcc-4.9/libgcc/config/i386/crtfastmath.c
new file mode 100644
index 000000000..ad359d418
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/crtfastmath.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2005-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SOFT_FLOAT
+#define MXCSR_DAZ (1 << 6)	/* Enable denormals are zero mode */
+#define MXCSR_FTZ (1 << 15)	/* Enable flush to zero mode */
+
+#ifndef __x86_64__
+/* All 64-bit targets have SSE and DAZ;
+   only check them explicitly for 32-bit ones. */
+#include "cpuid.h"
+#endif
+
+#if !defined __x86_64__ && defined __sun__ && defined __svr4__
+#include <signal.h>
+#include <ucontext.h>
+
+static volatile sig_atomic_t sigill_caught;
+
+static void
+sigill_hdlr (int sig __attribute((unused)),
+	     siginfo_t *sip __attribute__((unused)),
+	     ucontext_t *ucp)
+{
+  sigill_caught = 1;
+  /* Set PC to the instruction after the faulting one to skip over it,
+     otherwise we enter an infinite loop.  3 is the size of the movaps
+     instruction.  */
+  ucp->uc_mcontext.gregs[EIP] += 3;
+  setcontext (ucp);
+}
+#endif
+
+static void __attribute__((constructor))
+#ifndef __x86_64__
+/* The i386 ABI only requires 4-byte stack alignment, so this is necessary
+   to make sure the fxsave struct gets correct alignment.
+   See PR27537 and PR28621.  */
+__attribute__ ((force_align_arg_pointer))
+#endif
+set_fast_math (void)
+{
+#ifndef __x86_64__
+  unsigned int eax, ebx, ecx, edx;
+
+  if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+    return;
+
+  if (edx & bit_SSE)
+    {
+      unsigned int mxcsr;
+  
+#if defined __sun__ && defined __svr4__
+      /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions even
+	 if the CPU supports them.  Programs receive SIGILL instead, so check
+	 for that at runtime.  */
+      struct sigaction act, oact;
+
+      act.sa_handler = sigill_hdlr;
+      sigemptyset (&act.sa_mask);
+      /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler.  */
+      act.sa_flags = SA_SIGINFO;
+      sigaction (SIGILL, &act, &oact);
+
+      /* We need a single SSE instruction here so the handler can safely skip
+	 over it.  */
+      __asm__ volatile ("movaps %xmm0,%xmm0");
+
+      sigaction (SIGILL, &oact, NULL);
+
+      if (sigill_caught)
+	return;
+#endif /* __sun__ && __svr4__ */
+
+      if (edx & bit_FXSAVE)
+	{
+	  /* Check if DAZ is available.  */
+	  struct
+	    {
+	      unsigned short cwd;
+	      unsigned short swd;
+	      unsigned short twd;
+	      unsigned short fop;
+	      unsigned int fip;
+	      unsigned int fcs;
+	      unsigned int foo;
+	      unsigned int fos;
+	      unsigned int mxcsr;
+	      unsigned int mxcsr_mask;
+	      unsigned int st_space[32];
+	      unsigned int xmm_space[32];
+	      unsigned int padding[56];
+	    } __attribute__ ((aligned (16))) fxsave;
+
+	  /* This is necessary since some implementations of FXSAVE
+	     do not modify reserved areas within the image.  */
+	  fxsave.mxcsr_mask = 0;
+
+	  __builtin_ia32_fxsave (&fxsave);
+
+	  mxcsr = fxsave.mxcsr;
+
+	  if (fxsave.mxcsr_mask & MXCSR_DAZ)
+	    mxcsr |= MXCSR_DAZ;
+	}
+      else
+	mxcsr = __builtin_ia32_stmxcsr ();
+
+      mxcsr |= MXCSR_FTZ;
+      __builtin_ia32_ldmxcsr (mxcsr);
+    }
+#else
+  unsigned int mxcsr = __builtin_ia32_stmxcsr ();
+  mxcsr |= MXCSR_DAZ | MXCSR_FTZ;
+  __builtin_ia32_ldmxcsr (mxcsr);
+#endif
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/crti.S b/gcc-4.9/libgcc/config/i386/crti.S
new file mode 100644
index 000000000..c7413358f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/crti.S
@@ -0,0 +1,40 @@
+/* crti.S for x86.
+
+   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+   Written By Fred Fish, Nov 1992
+ 
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file just supplies labeled starting points for the .init and .fini
+   sections.  It is linked in before the values-Xx.o files and also before
+   crtbegin.o.  */
+ 
+	.ident	"GNU C crti.s"
+
+	.section .init
+	.globl	_init
+	.type	_init,@function
+_init:
+
+	.section .fini
+	.globl	_fini
+	.type	_fini,@function
+_fini:
diff --git a/gcc-4.9/libgcc/config/i386/crtn.S b/gcc-4.9/libgcc/config/i386/crtn.S
new file mode 100644
index 000000000..215b014ab
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/crtn.S
@@ -0,0 +1,35 @@
+/* crtn.S for x86.
+
+   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+   Written By Fred Fish, Nov 1992
+ 
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file just supplies returns for the .init and .fini sections.  It is
+   linked in after all other files.  */
+
+	.ident	"GNU C crtn.o"
+
+	.section .init
+	ret    $0x0
+
+	.section .fini
+	ret    $0x0
diff --git a/gcc-4.9/libgcc/config/i386/crtprec.c b/gcc-4.9/libgcc/config/i386/crtprec.c
new file mode 100644
index 000000000..73e944e61
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/crtprec.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2007-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SOFT_FLOAT
+#if __PREC == 32
+ #define X87CW		(0 << 8)	/* Single precision (24 bits) */
+#elif __PREC == 64
+ #define X87CW		(2 << 8)	/* Double precision (53 bits) */
+#elif __PREC == 80
+ #define X87CW		(3 << 8)	/* Extended precision (64 bits) */
+#else
+ #error "Wrong precision requested."
+#endif
+
+#define X87CW_PCMASK	(3 << 8)
+
+static void __attribute__((constructor))
+set_precision (void)
+{
+  unsigned short int cwd;
+
+  asm volatile ("fstcw\t%0" : "=m" (cwd));
+
+  cwd &= ~X87CW_PCMASK;
+  cwd |= X87CW;
+
+  asm volatile ("fldcw\t%0" : : "m" (cwd));
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/cygming-crtbegin.c b/gcc-4.9/libgcc/config/i386/cygming-crtbegin.c
new file mode 100644
index 000000000..eeb51d4c5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/cygming-crtbegin.c
@@ -0,0 +1,168 @@
+/* crtbegin object for windows32 targets.
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+   Contributed by Danny Smith <dannysmith@users.sourceforge.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Target machine header files require this define. */
+#define IN_LIBGCC2
+
+#include "auto-host.h"
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include "unwind-dw2-fde.h"
+
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+
+#ifndef LIBGCC_SONAME
+#define LIBGCC_SONAME "libgcc_s.dll"
+#endif
+
+#ifndef LIBGCJ_SONAME
+#define LIBGCJ_SONAME "libgcj_s.dll"
+#endif
+
+#if DWARF2_UNWIND_INFO
+/* Make the declarations weak.  This is critical for
+   _Jv_RegisterClasses because it lives in libgcj.a  */
+extern void __register_frame_info (__attribute__((unused)) const void *,
+				   __attribute__((unused)) struct object *)
+				   TARGET_ATTRIBUTE_WEAK;
+extern void *__deregister_frame_info (__attribute__((unused)) const void *)
+				      TARGET_ATTRIBUTE_WEAK;
+TARGET_ATTRIBUTE_WEAK void
+__register_frame_info (__attribute__((unused)) const void *p,
+		       __attribute__((unused)) struct object *o)
+{
+}
+
+TARGET_ATTRIBUTE_WEAK void *
+__deregister_frame_info (__attribute__((unused)) const void *p)
+{
+  return (void*) 0;
+}
+#endif /* DWARF2_UNWIND_INFO */
+
+#if TARGET_USE_JCR_SECTION
+extern void _Jv_RegisterClasses (__attribute__((unused)) const void *)
+  TARGET_ATTRIBUTE_WEAK;
+
+TARGET_ATTRIBUTE_WEAK void
+_Jv_RegisterClasses (__attribute__((unused)) const void *p)
+{
+}
+#endif /* TARGET_USE_JCR_SECTION */
+
+#if defined(HAVE_LD_RO_RW_SECTION_MIXING)
+# define EH_FRAME_SECTION_CONST const
+#else
+# define EH_FRAME_SECTION_CONST
+#endif
+
+/* Stick a label at the beginning of the frame unwind info so we can
+   register/deregister it with the exception handling library code.  */
+#if DWARF2_UNWIND_INFO
+static EH_FRAME_SECTION_CONST char __EH_FRAME_BEGIN__[]
+  __attribute__((used, section(EH_FRAME_SECTION_NAME), aligned(4)))
+  = { };
+
+static struct object obj;
+
+/* Handle of libgcc's DLL reference.  */
+HANDLE hmod_libgcc;
+#endif
+
+#if TARGET_USE_JCR_SECTION
+static void *__JCR_LIST__[]
+  __attribute__ ((used, section(JCR_SECTION_NAME), aligned(4)))
+  = { };
+#endif
+
+/* Pull in references from libgcc.a(unwind-dw2-fde.o) in the
+   startfile. These are referenced by a ctor and dtor in crtend.o.  */
+extern void __gcc_register_frame (void);
+extern void __gcc_deregister_frame (void);
+
+void
+__gcc_register_frame (void)
+{
+#if DWARF2_UNWIND_INFO
+/* Weak undefined symbols won't be pulled in from dlls; hence
+   we first test if the dll is already loaded and, if so,
+   get the symbol's address at run-time.  If the dll is not loaded,
+   fallback to weak linkage to static archive.  */
+
+  void (*register_frame_fn) (const void *, struct object *);
+  HANDLE h = GetModuleHandle (LIBGCC_SONAME);
+
+  if (h)
+    {
+      /* Increasing the load-count of LIBGCC_SONAME DLL.  */
+      hmod_libgcc = LoadLibrary (LIBGCC_SONAME);
+      register_frame_fn = (void (*) (const void *, struct object *))
+			  GetProcAddress (h, "__register_frame_info");
+    }
+  else 
+    register_frame_fn = __register_frame_info;
+  if (register_frame_fn)
+     register_frame_fn (__EH_FRAME_BEGIN__, &obj);
+#endif
+
+#if TARGET_USE_JCR_SECTION 
+  if (__JCR_LIST__[0])
+    {
+      void (*register_class_fn) (const void *);
+      HANDLE h = GetModuleHandle (LIBGCJ_SONAME);
+      if (h)
+	register_class_fn = (void (*) (const void *))
+			     GetProcAddress (h, "_Jv_RegisterClasses");
+      else
+	register_class_fn = _Jv_RegisterClasses;
+
+      if (register_class_fn)
+	register_class_fn (__JCR_LIST__);
+    }
+#endif
+}
+
+void
+__gcc_deregister_frame (void)
+{
+#if DWARF2_UNWIND_INFO
+  void *  (*deregister_frame_fn) (const void *);
+  HANDLE h = GetModuleHandle (LIBGCC_SONAME);
+  if (h)
+    deregister_frame_fn = (void* (*) (const void *))
+			  GetProcAddress (h, "__deregister_frame_info");
+  else 
+    deregister_frame_fn = __deregister_frame_info;
+  if (deregister_frame_fn)
+     deregister_frame_fn (__EH_FRAME_BEGIN__);
+  if (hmod_libgcc)
+    FreeLibrary (hmod_libgcc);
+#endif
+}
diff --git a/gcc-4.9/libgcc/config/i386/cygming-crtend.c b/gcc-4.9/libgcc/config/i386/cygming-crtend.c
new file mode 100644
index 000000000..de0d61fac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/cygming-crtend.c
@@ -0,0 +1,89 @@
+/* crtend object for windows32 targets.
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+   Contributed by Danny Smith <dannysmith@users.sourceforge.net>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Target machine header files require this define. */
+#define IN_LIBGCC2
+
+/* auto-host.h is needed by cygming.h for HAVE_GAS_WEAK and here
+   for HAVE_LD_RO_RW_SECTION_MIXING.  */  
+#include "auto-host.h"
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include "unwind-dw2-fde.h"
+
+#if defined(HAVE_LD_RO_RW_SECTION_MIXING)
+# define EH_FRAME_SECTION_CONST const
+#else
+# define EH_FRAME_SECTION_CONST
+#endif
+
+#if DWARF2_UNWIND_INFO
+/* Terminate the frame unwind info section with a 0 as a sentinel;
+   this would be the 'length' field in a real FDE.  */
+
+static EH_FRAME_SECTION_CONST int __FRAME_END__[]
+  __attribute__ ((used,  section(EH_FRAME_SECTION_NAME),
+		  aligned(4)))
+  = { 0 };
+#endif
+
+#if TARGET_USE_JCR_SECTION
+/* Null terminate the .jcr section array.  */
+static void *__JCR_END__[1] 
+   __attribute__ ((used, section(JCR_SECTION_NAME),
+		   aligned(sizeof(void *))))
+   = { 0 };
+#endif
+
+extern void __gcc_register_frame (void); 
+extern void __gcc_deregister_frame (void);
+
+static void register_frame_ctor (void) __attribute__ ((constructor (0)));
+
+static void
+register_frame_ctor (void)
+{
+  __gcc_register_frame ();
+#if DEFAULT_USE_CXA_ATEXIT
+  /* If we use the __cxa_atexit method to register C++ dtors
+     at object construction,  also use atexit to register eh frame
+     info cleanup.  */
+  atexit (__gcc_deregister_frame);
+#endif
+}
+
+#if !DEFAULT_USE_CXA_ATEXIT
+static void deregister_frame_dtor (void) __attribute__ ((destructor (0)));
+
+static void
+deregister_frame_dtor (void)
+{
+  __gcc_deregister_frame ();
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/cygwin.S b/gcc-4.9/libgcc/config/i386/cygwin.S
new file mode 100644
index 000000000..277b59263
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/cygwin.S
@@ -0,0 +1,187 @@
+/* stuff needed for libgcc on win32.
+ *
+ *   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+ *   Written By Steve Chamberlain
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ * 
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#include "auto-host.h"
+
+#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE
+	.cfi_sections	.debug_frame
+# define cfi_startproc()		.cfi_startproc
+# define cfi_endproc()			.cfi_endproc
+# define cfi_adjust_cfa_offset(X) 	.cfi_adjust_cfa_offset X
+# define cfi_def_cfa_register(X)	.cfi_def_cfa_register X
+# define cfi_register(D,S)		.cfi_register D, S
+# ifdef __x86_64__
+#  define cfi_push(X)		.cfi_adjust_cfa_offset 8; .cfi_rel_offset X, 0
+#  define cfi_pop(X)		.cfi_adjust_cfa_offset -8; .cfi_restore X
+# else
+#  define cfi_push(X)		.cfi_adjust_cfa_offset 4; .cfi_rel_offset X, 0
+#  define cfi_pop(X)		.cfi_adjust_cfa_offset -4; .cfi_restore X
+# endif
+#else
+# define cfi_startproc()
+# define cfi_endproc()
+# define cfi_adjust_cfa_offset(X)
+# define cfi_def_cfa_register(X)
+# define cfi_register(D,S)
+# define cfi_push(X)
+# define cfi_pop(X)
+#endif /* HAVE_GAS_CFI_SECTIONS_DIRECTIVE */
+
+#ifdef L_chkstk
+/* Function prologue calls __chkstk to probe the stack when allocating more
+   than CHECK_STACK_LIMIT bytes in one go.  Touching the stack at 4K
+   increments is necessary to ensure that the guard pages used
+   by the OS virtual memory manger are allocated in correct sequence.  */
+
+	.global ___chkstk
+	.global	__alloca
+#ifdef __x86_64__
+/* __alloca is a normal function call, which uses %rcx as the argument.  */
+	cfi_startproc()
+__alloca:
+	movq	%rcx, %rax
+	/* FALLTHRU */
+
+/* ___chkstk is a *special* function call, which uses %rax as the argument.
+   We avoid clobbering the 4 integer argument registers, %rcx, %rdx, 
+   %r8 and %r9, which leaves us with %rax, %r10, and %r11 to use.  */
+	.align	4
+___chkstk:
+	popq	%r11			/* pop return address */
+	cfi_adjust_cfa_offset(-8)	/* indicate return address in r11 */
+	cfi_register(%rip, %r11)
+	movq	%rsp, %r10
+	cmpq	$0x1000, %rax		/* > 4k ?*/
+	jb	2f
+
+1:	subq	$0x1000, %r10  		/* yes, move pointer down 4k*/
+	orl	$0x0, (%r10)   		/* probe there */
+	subq	$0x1000, %rax  	 	/* decrement count */
+	cmpq	$0x1000, %rax
+	ja	1b			/* and do it again */
+
+2:	subq	%rax, %r10
+	movq	%rsp, %rax		/* hold CFA until return */
+	cfi_def_cfa_register(%rax)
+	orl	$0x0, (%r10)		/* less than 4k, just peek here */
+	movq	%r10, %rsp		/* decrement stack */
+
+	/* Push the return value back.  Doing this instead of just
+	   jumping to %r11 preserves the cached call-return stack
+	   used by most modern processors.  */
+	pushq	%r11
+	ret
+	cfi_endproc()
+#else
+	cfi_startproc()
+___chkstk:
+__alloca:
+	pushl	%ecx			/* save temp */
+	cfi_push(%eax)
+	leal	8(%esp), %ecx		/* point past return addr */
+	cmpl	$0x1000, %eax		/* > 4k ?*/
+	jb	2f
+
+1:	subl	$0x1000, %ecx  		/* yes, move pointer down 4k*/
+	orl	$0x0, (%ecx)   		/* probe there */
+	subl	$0x1000, %eax  	 	/* decrement count */
+	cmpl	$0x1000, %eax
+	ja	1b			/* and do it again */
+
+2:	subl	%eax, %ecx	   
+	orl	$0x0, (%ecx)		/* less than 4k, just peek here */
+	movl	%esp, %eax		/* save current stack pointer */
+	cfi_def_cfa_register(%eax)
+	movl	%ecx, %esp		/* decrement stack */
+	movl	(%eax), %ecx		/* recover saved temp */
+
+	/* Copy the return register.  Doing this instead of just jumping to
+	   the address preserves the cached call-return stack used by most
+	   modern processors.  */
+	pushl	4(%eax)
+	ret
+	cfi_endproc()
+#endif /* __x86_64__ */
+#endif /* L_chkstk */
+
+#ifdef L_chkstk_ms
+/* ___chkstk_ms is a *special* function call, which uses %rax as the argument.
+   We avoid clobbering any registers.  Unlike ___chkstk, it just probes the
+   stack and does no stack allocation.  */
+	.global ___chkstk_ms
+#ifdef __x86_64__
+	cfi_startproc()
+___chkstk_ms:
+	pushq	%rcx			/* save temps */
+	cfi_push(%rcx)
+	pushq	%rax
+	cfi_push(%rax)
+	cmpq	$0x1000, %rax		/* > 4k ?*/
+	leaq	24(%rsp), %rcx		/* point past return addr */
+	jb	2f
+
+1:	subq	$0x1000, %rcx  		/* yes, move pointer down 4k */
+	orq	$0x0, (%rcx)   		/* probe there */
+	subq	$0x1000, %rax  	 	/* decrement count */
+	cmpq	$0x1000, %rax
+	ja	1b			/* and do it again */
+
+2:	subq	%rax, %rcx
+	orq	$0x0, (%rcx)		/* less than 4k, just peek here */
+
+	popq	%rax
+	cfi_pop(%rax)
+	popq	%rcx
+	cfi_pop(%rcx)
+	ret
+	cfi_endproc()
+#else
+	cfi_startproc()
+___chkstk_ms:
+	pushl	%ecx			/* save temp */
+	cfi_push(%ecx)
+	pushl	%eax
+	cfi_push(%eax)
+	cmpl	$0x1000, %eax		/* > 4k ?*/
+	leal	12(%esp), %ecx		/* point past return addr */
+	jb	2f
+
+1:	subl	$0x1000, %ecx  		/* yes, move pointer down 4k*/
+	orl	$0x0, (%ecx)   		/* probe there */
+	subl	$0x1000, %eax  	 	/* decrement count */
+	cmpl	$0x1000, %eax
+	ja	1b			/* and do it again */
+
+2:	subl	%eax, %ecx
+	orl	$0x0, (%ecx)		/* less than 4k, just peek here */
+
+	popl	%eax
+	cfi_pop(%eax)
+	popl	%ecx
+	cfi_pop(%ecx)
+	ret
+	cfi_endproc()
+#endif /* __x86_64__ */
+#endif /* L_chkstk_ms */
diff --git a/gcc-4.9/libgcc/config/i386/darwin-lib.h b/gcc-4.9/libgcc/config/i386/darwin-lib.h
new file mode 100644
index 000000000..c75b56c28
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/darwin-lib.h
@@ -0,0 +1,32 @@
+/* Target definitions for x86 running Darwin, library renames.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* The system ___divdc3 routine in libSystem on darwin10 is not
+   accurate to 1ulp, ours is, so we avoid ever using the system name
+   for this routine and instead install a non-conflicting name that is
+   accurate.  See darwin_rename_builtins.  */
+#ifdef L_divdc3
+#define DECLARE_LIBRARY_RENAMES \
+  asm(".text; ___divdc3: jmp ___ieee_divdc3 ; .globl ___divdc3");
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/enable-execute-stack-mingw32.c b/gcc-4.9/libgcc/config/i386/enable-execute-stack-mingw32.c
new file mode 100644
index 000000000..24f06e1f3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/enable-execute-stack-mingw32.c
@@ -0,0 +1,38 @@
+/* Implement __enable_execute_stack for Windows32.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3, or (at your option) any later
+   version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+   WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <windows.h>
+
+extern void __enable_execute_stack (void *);
+
+void
+__enable_execute_stack (void *addr)
+{
+  MEMORY_BASIC_INFORMATION b;
+
+  if (!VirtualQuery (addr, &b, sizeof(b)))
+    abort ();
+  VirtualProtect (b.BaseAddress, b.RegionSize, PAGE_EXECUTE_READWRITE,
+		  &b.Protect);
+}
diff --git a/gcc-4.9/libgcc/config/i386/gthr-win32.c b/gcc-4.9/libgcc/config/i386/gthr-win32.c
new file mode 100644
index 000000000..eec16b326
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/gthr-win32.c
@@ -0,0 +1,267 @@
+/* Implementation of W32-specific threads compatibility routines for
+   libgcc2.  */
+
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Mumit Khan <khan@xraylith.wisc.edu>.
+   Modified and moved to separate file by Danny Smith
+   <dannysmith@users.sourceforge.net>.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <windows.h>
+#ifndef __GTHREAD_HIDE_WIN32API
+# define __GTHREAD_HIDE_WIN32API 1
+#endif
+#undef  __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+#define __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+#include "gthr-win32.h"
+
+/* Windows32 threads specific definitions. The windows32 threading model
+   does not map well into pthread-inspired gcc's threading model, and so 
+   there are caveats one needs to be aware of.
+
+   1. The destructor supplied to __gthread_key_create is ignored for
+      generic x86-win32 ports. This will certainly cause memory leaks 
+      due to unreclaimed eh contexts (sizeof (eh_context) is at least 
+      24 bytes for x86 currently).
+
+      This memory leak may be significant for long-running applications
+      that make heavy use of C++ EH.
+
+      However, Mingw runtime (version 0.3 or newer) provides a mechanism
+      to emulate pthreads key dtors; the runtime provides a special DLL,
+      linked in if -mthreads option is specified, that runs the dtors in
+      the reverse order of registration when each thread exits. If
+      -mthreads option is not given, a stub is linked in instead of the
+      DLL, which results in memory leak. Other x86-win32 ports can use 
+      the same technique of course to avoid the leak.
+
+   2. The error codes returned are non-POSIX like, and cast into ints.
+      This may cause incorrect error return due to truncation values on 
+      hw where sizeof (DWORD) > sizeof (int).
+   
+   3. We are currently using a special mutex instead of the Critical
+      Sections, since Win9x does not support TryEnterCriticalSection
+      (while NT does).
+  
+   The basic framework should work well enough. In the long term, GCC
+   needs to use Structured Exception Handling on Windows32.  */
+
+int
+__gthr_win32_once (__gthread_once_t *once, void (*func) (void))
+{
+  if (once == NULL || func == NULL)
+    return EINVAL;
+
+  if (! once->done)
+    {
+      if (InterlockedIncrement (&(once->started)) == 0)
+        {
+	  (*func) ();
+	  once->done = TRUE;
+	}
+      else
+	{
+	  /* Another thread is currently executing the code, so wait for it 
+	     to finish; yield the CPU in the meantime.  If performance 
+	     does become an issue, the solution is to use an Event that 
+	     we wait on here (and set above), but that implies a place to 
+	     create the event before this routine is called.  */ 
+	  while (! once->done)
+	    Sleep (0);
+	}
+    }
+  return 0;
+}
+
+/* Windows32 thread local keys don't support destructors; this leads to
+   leaks, especially in threaded applications making extensive use of 
+   C++ EH. Mingw uses a thread-support DLL to work-around this problem.  */
+
+int
+__gthr_win32_key_create (__gthread_key_t *key,
+			 void (*dtor) (void *) __attribute__((unused)))
+{
+  int status = 0;
+  DWORD tls_index = TlsAlloc ();
+  if (tls_index != 0xFFFFFFFF)
+    {
+      *key = tls_index;
+#ifdef MINGW32_SUPPORTS_MT_EH
+      /* Mingw runtime will run the dtors in reverse order for each thread
+         when the thread exits.  */
+      status = __mingwthr_key_dtor (*key, dtor);
+#endif
+    }
+  else
+    status = (int) GetLastError ();
+  return status;
+}
+
+int
+__gthr_win32_key_delete (__gthread_key_t key)
+{
+  return (TlsFree (key) != 0) ? 0 : (int) GetLastError ();
+}
+
+void *
+__gthr_win32_getspecific (__gthread_key_t key)
+{
+  DWORD lasterror;
+  void *ptr;
+  lasterror = GetLastError();
+  ptr = TlsGetValue(key);
+  SetLastError( lasterror );
+  return ptr;
+}
+
+int
+__gthr_win32_setspecific (__gthread_key_t key, const void *ptr)
+{
+  if (TlsSetValue (key, CONST_CAST2(void *, const void *, ptr)) != 0)
+    return 0;
+  else
+    return GetLastError ();
+}
+
+void
+__gthr_win32_mutex_init_function (__gthread_mutex_t *mutex)
+{
+  mutex->counter = -1;
+  mutex->sema = CreateSemaphoreW (NULL, 0, 65535, NULL);
+}
+
+void
+__gthr_win32_mutex_destroy (__gthread_mutex_t *mutex)
+{
+  CloseHandle ((HANDLE) mutex->sema);
+}
+
+int
+__gthr_win32_mutex_lock (__gthread_mutex_t *mutex)
+{
+  if (InterlockedIncrement (&mutex->counter) == 0 ||
+      WaitForSingleObject (mutex->sema, INFINITE) == WAIT_OBJECT_0)
+    return 0;
+  else
+    {
+      /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+         some best-effort cleanup here.  */
+      InterlockedDecrement (&mutex->counter);
+      return 1;
+    }
+}
+
+int
+__gthr_win32_mutex_trylock (__gthread_mutex_t *mutex)
+{
+  if (__GTHR_W32_InterlockedCompareExchange (&mutex->counter, 0, -1) < 0)
+    return 0;
+  else
+    return 1;
+}
+
+int
+__gthr_win32_mutex_unlock (__gthread_mutex_t *mutex)
+{
+  if (InterlockedDecrement (&mutex->counter) >= 0)
+    return ReleaseSemaphore (mutex->sema, 1, NULL) ? 0 : 1;
+  else
+    return 0;
+}
+
+void
+__gthr_win32_recursive_mutex_init_function (__gthread_recursive_mutex_t *mutex)
+{
+  mutex->counter = -1;
+  mutex->depth = 0;
+  mutex->owner = 0;
+  mutex->sema = CreateSemaphoreW (NULL, 0, 65535, NULL);
+}
+
+int
+__gthr_win32_recursive_mutex_lock (__gthread_recursive_mutex_t *mutex)
+{
+  DWORD me = GetCurrentThreadId();
+  if (InterlockedIncrement (&mutex->counter) == 0)
+    {
+      mutex->depth = 1;
+      mutex->owner = me;
+    }
+  else if (mutex->owner == me)
+    {
+      InterlockedDecrement (&mutex->counter);
+      ++(mutex->depth);
+    }
+  else if (WaitForSingleObject (mutex->sema, INFINITE) == WAIT_OBJECT_0)
+    {
+      mutex->depth = 1;
+      mutex->owner = me;
+    }
+  else
+    {
+      /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+         some best-effort cleanup here.  */
+      InterlockedDecrement (&mutex->counter);
+      return 1;
+    }
+  return 0;
+}
+
+int
+__gthr_win32_recursive_mutex_trylock (__gthread_recursive_mutex_t *mutex)
+{
+  DWORD me = GetCurrentThreadId();
+  if (__GTHR_W32_InterlockedCompareExchange (&mutex->counter, 0, -1) < 0)
+    {
+      mutex->depth = 1;
+      mutex->owner = me;
+    }
+  else if (mutex->owner == me)
+    ++(mutex->depth);
+  else
+    return 1;
+
+  return 0;
+}
+
+int
+__gthr_win32_recursive_mutex_unlock (__gthread_recursive_mutex_t *mutex)
+{
+  --(mutex->depth);
+  if (mutex->depth == 0)
+    {
+      mutex->owner = 0;
+
+      if (InterlockedDecrement (&mutex->counter) >= 0)
+	return ReleaseSemaphore (mutex->sema, 1, NULL) ? 0 : 1;
+    }
+
+  return 0;
+}
+
+int
+__gthr_win32_recursive_mutex_destroy (__gthread_recursive_mutex_t *mutex)
+{
+  CloseHandle ((HANDLE) mutex->sema);
+  return 0;
+}
diff --git a/gcc-4.9/libgcc/config/i386/gthr-win32.h b/gcc-4.9/libgcc/config/i386/gthr-win32.h
new file mode 100644
index 000000000..c295fd5f1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/gthr-win32.h
@@ -0,0 +1,786 @@
+/* Threads compatibility routines for libgcc2 and libobjc.  */
+/* Compile this one with gcc.  */
+
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Mumit Khan <khan@xraylith.wisc.edu>.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_WIN32_H
+#define GCC_GTHR_WIN32_H
+
+/* Make sure CONST_CAST2 (origin in system.h) is declared.  */
+#ifndef CONST_CAST2
+#define CONST_CAST2(TOTYPE,FROMTYPE,X) ((__extension__(union {FROMTYPE _q; TOTYPE _nq;})(X))._nq)
+#endif
+
+/* Windows32 threads specific definitions. The windows32 threading model
+   does not map well into pthread-inspired gcc's threading model, and so
+   there are caveats one needs to be aware of.
+
+   1. The destructor supplied to __gthread_key_create is ignored for
+      generic x86-win32 ports. This will certainly cause memory leaks
+      due to unreclaimed eh contexts (sizeof (eh_context) is at least
+      24 bytes for x86 currently).
+
+      This memory leak may be significant for long-running applications
+      that make heavy use of C++ EH.
+
+      However, Mingw runtime (version 0.3 or newer) provides a mechanism
+      to emulate pthreads key dtors; the runtime provides a special DLL,
+      linked in if -mthreads option is specified, that runs the dtors in
+      the reverse order of registration when each thread exits. If
+      -mthreads option is not given, a stub is linked in instead of the
+      DLL, which results in memory leak. Other x86-win32 ports can use
+      the same technique of course to avoid the leak.
+
+   2. The error codes returned are non-POSIX like, and cast into ints.
+      This may cause incorrect error return due to truncation values on
+      hw where sizeof (DWORD) > sizeof (int).
+
+   3. We are currently using a special mutex instead of the Critical
+      Sections, since Win9x does not support TryEnterCriticalSection
+      (while NT does).
+
+   The basic framework should work well enough. In the long term, GCC
+   needs to use Structured Exception Handling on Windows32.  */
+
+#define __GTHREADS 1
+
+#include <errno.h>
+#ifdef __MINGW32__
+#include <_mingw.h>
+#endif
+
+#ifndef __UNUSED_PARAM
+#define __UNUSED_PARAM(x) x
+#endif
+
+#ifdef _LIBOBJC
+
+/* This is necessary to prevent windef.h (included from windows.h) from
+   defining its own BOOL as a typedef.  */
+#ifndef __OBJC__
+#define __OBJC__
+#endif
+#include <windows.h>
+/* Now undef the windows BOOL.  */
+#undef BOOL
+
+/* Key structure for maintaining thread specific storage */
+static DWORD	__gthread_objc_data_tls = (DWORD) -1;
+
+/* Backend initialization functions */
+
+/* Initialize the threads subsystem.  */
+int
+__gthread_objc_init_thread_system (void)
+{
+  /* Initialize the thread storage key.  */
+  if ((__gthread_objc_data_tls = TlsAlloc ()) != (DWORD) -1)
+    return 0;
+  else
+    return -1;
+}
+
+/* Close the threads subsystem.  */
+int
+__gthread_objc_close_thread_system (void)
+{
+  if (__gthread_objc_data_tls != (DWORD) -1)
+    TlsFree (__gthread_objc_data_tls);
+  return 0;
+}
+
+/* Backend thread functions */
+
+/* Create a new thread of execution.  */
+objc_thread_t
+__gthread_objc_thread_detach (void (*func)(void *arg), void *arg)
+{
+  DWORD	thread_id = 0;
+  HANDLE win32_handle;
+
+  if (!(win32_handle = CreateThread (NULL, 0, (LPTHREAD_START_ROUTINE) func,
+				     arg, 0, &thread_id)))
+    thread_id = 0;
+
+  return (objc_thread_t) (INT_PTR) thread_id;
+}
+
+/* Set the current thread's priority.  */
+int
+__gthread_objc_thread_set_priority (int priority)
+{
+  int sys_priority = 0;
+
+  switch (priority)
+    {
+    case OBJC_THREAD_INTERACTIVE_PRIORITY:
+      sys_priority = THREAD_PRIORITY_NORMAL;
+      break;
+    default:
+    case OBJC_THREAD_BACKGROUND_PRIORITY:
+      sys_priority = THREAD_PRIORITY_BELOW_NORMAL;
+      break;
+    case OBJC_THREAD_LOW_PRIORITY:
+      sys_priority = THREAD_PRIORITY_LOWEST;
+      break;
+    }
+
+  /* Change priority */
+  if (SetThreadPriority (GetCurrentThread (), sys_priority))
+    return 0;
+  else
+    return -1;
+}
+
+/* Return the current thread's priority.  */
+int
+__gthread_objc_thread_get_priority (void)
+{
+  int sys_priority;
+
+  sys_priority = GetThreadPriority (GetCurrentThread ());
+
+  switch (sys_priority)
+    {
+    case THREAD_PRIORITY_HIGHEST:
+    case THREAD_PRIORITY_TIME_CRITICAL:
+    case THREAD_PRIORITY_ABOVE_NORMAL:
+    case THREAD_PRIORITY_NORMAL:
+      return OBJC_THREAD_INTERACTIVE_PRIORITY;
+
+    default:
+    case THREAD_PRIORITY_BELOW_NORMAL:
+      return OBJC_THREAD_BACKGROUND_PRIORITY;
+
+    case THREAD_PRIORITY_IDLE:
+    case THREAD_PRIORITY_LOWEST:
+      return OBJC_THREAD_LOW_PRIORITY;
+    }
+
+  /* Couldn't get priority.  */
+  return -1;
+}
+
+/* Yield our process time to another thread.  */
+void
+__gthread_objc_thread_yield (void)
+{
+  Sleep (0);
+}
+
+/* Terminate the current thread.  */
+int
+__gthread_objc_thread_exit (void)
+{
+  /* exit the thread */
+  ExitThread (__objc_thread_exit_status);
+
+  /* Failed if we reached here */
+  return -1;
+}
+
+/* Returns an integer value which uniquely describes a thread.  */
+objc_thread_t
+__gthread_objc_thread_id (void)
+{
+  return (objc_thread_t) (INT_PTR) GetCurrentThreadId ();
+}
+
+/* Sets the thread's local storage pointer.  */
+int
+__gthread_objc_thread_set_data (void *value)
+{
+  if (TlsSetValue (__gthread_objc_data_tls, value))
+    return 0;
+  else
+    return -1;
+}
+
+/* Returns the thread's local storage pointer.  */
+void *
+__gthread_objc_thread_get_data (void)
+{
+  DWORD lasterror;
+  void *ptr;
+
+  lasterror = GetLastError ();
+
+  ptr = TlsGetValue (__gthread_objc_data_tls);          /* Return thread data.  */
+
+  SetLastError (lasterror);
+
+  return ptr;
+}
+
+/* Backend mutex functions */
+
+/* Allocate a mutex.  */
+int
+__gthread_objc_mutex_allocate (objc_mutex_t mutex)
+{
+  if ((mutex->backend = (void *) CreateMutex (NULL, 0, NULL)) == NULL)
+    return -1;
+  else
+    return 0;
+}
+
+/* Deallocate a mutex.  */
+int
+__gthread_objc_mutex_deallocate (objc_mutex_t mutex)
+{
+  CloseHandle ((HANDLE) (mutex->backend));
+  return 0;
+}
+
+/* Grab a lock on a mutex.  */
+int
+__gthread_objc_mutex_lock (objc_mutex_t mutex)
+{
+  int status;
+
+  status = WaitForSingleObject ((HANDLE) (mutex->backend), INFINITE);
+  if (status != WAIT_OBJECT_0 && status != WAIT_ABANDONED)
+    return -1;
+  else
+    return 0;
+}
+
+/* Try to grab a lock on a mutex.  */
+int
+__gthread_objc_mutex_trylock (objc_mutex_t mutex)
+{
+  int status;
+
+  status = WaitForSingleObject ((HANDLE) (mutex->backend), 0);
+  if (status != WAIT_OBJECT_0 && status != WAIT_ABANDONED)
+    return -1;
+  else
+    return 0;
+}
+
+/* Unlock the mutex */
+int
+__gthread_objc_mutex_unlock (objc_mutex_t mutex)
+{
+  if (ReleaseMutex ((HANDLE) (mutex->backend)) == 0)
+    return -1;
+  else
+    return 0;
+}
+
+/* Backend condition mutex functions */
+
+/* Allocate a condition.  */
+int
+__gthread_objc_condition_allocate (objc_condition_t __UNUSED_PARAM(condition))
+{
+  /* Unimplemented.  */
+  return -1;
+}
+
+/* Deallocate a condition.  */
+int
+__gthread_objc_condition_deallocate (objc_condition_t __UNUSED_PARAM(condition))
+{
+  /* Unimplemented.  */
+  return -1;
+}
+
+/* Wait on the condition */
+int
+__gthread_objc_condition_wait (objc_condition_t __UNUSED_PARAM(condition),
+			       objc_mutex_t __UNUSED_PARAM(mutex))
+{
+  /* Unimplemented.  */
+  return -1;
+}
+
+/* Wake up all threads waiting on this condition.  */
+int
+__gthread_objc_condition_broadcast (objc_condition_t __UNUSED_PARAM(condition))
+{
+  /* Unimplemented.  */
+  return -1;
+}
+
+/* Wake up one thread waiting on this condition.  */
+int
+__gthread_objc_condition_signal (objc_condition_t __UNUSED_PARAM(condition))
+{
+  /* Unimplemented.  */
+  return -1;
+}
+
+#else /* _LIBOBJC */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef unsigned long __gthread_key_t;
+
+typedef struct {
+  int done;
+  long started;
+} __gthread_once_t;
+
+typedef struct {
+  long counter;
+  void *sema;
+} __gthread_mutex_t;
+
+typedef struct {
+  long counter;
+  long depth;
+  unsigned long owner;
+  void *sema;
+} __gthread_recursive_mutex_t;
+
+#define __GTHREAD_ONCE_INIT {0, -1}
+#define __GTHREAD_MUTEX_INIT_FUNCTION __gthread_mutex_init_function
+#define __GTHREAD_MUTEX_INIT_DEFAULT {-1, 0}
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION \
+  __gthread_recursive_mutex_init_function
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_DEFAULT {-1, 0, 0, 0}
+
+#if defined (_WIN32) && !defined(__CYGWIN__)
+#define MINGW32_SUPPORTS_MT_EH 1
+/* Mingw runtime >= v0.3 provides a magic variable that is set to nonzero
+   if -mthreads option was specified, or 0 otherwise. This is to get around
+   the lack of weak symbols in PE-COFF.  */
+extern int _CRT_MT;
+extern int __mingwthr_key_dtor (unsigned long, void (*) (void *));
+#endif /* _WIN32 && !__CYGWIN__ */
+
+/* The Windows95 kernel does not export InterlockedCompareExchange.
+   This provides a substitute.   When building apps that reference
+   gthread_mutex_try_lock, the  __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+   macro  must be defined if Windows95 is a target.  Currently
+   gthread_mutex_try_lock is not referenced by libgcc or libstdc++.  */
+#ifdef __GTHREAD_I486_INLINE_LOCK_PRIMITIVES
+static inline long
+__gthr_i486_lock_cmp_xchg(long *__dest, long __xchg, long __comperand)
+{
+  long result;
+  __asm__ __volatile__ ("\n\
+	lock\n\
+	cmpxchg{l} {%4, %1|%1, %4}\n"
+	: "=a" (result), "=m" (*__dest)
+	: "0" (__comperand), "m" (*__dest), "r" (__xchg)
+	: "cc");
+  return result;
+}
+#define __GTHR_W32_InterlockedCompareExchange __gthr_i486_lock_cmp_xchg
+#else  /* __GTHREAD_I486_INLINE_LOCK_PRIMITIVES */
+#define __GTHR_W32_InterlockedCompareExchange InterlockedCompareExchange
+#endif /* __GTHREAD_I486_INLINE_LOCK_PRIMITIVES */
+
+static inline int
+__gthread_active_p (void)
+{
+#ifdef MINGW32_SUPPORTS_MT_EH
+  return _CRT_MT;
+#else
+  return 1;
+#endif
+}
+
+#if __GTHREAD_HIDE_WIN32API
+
+/* The implementations are in config/i386/gthr-win32.c in libgcc.a.
+   Only stubs are exposed to avoid polluting the C++ namespace with
+   windows api definitions.  */
+
+extern int __gthr_win32_once (__gthread_once_t *, void (*) (void));
+extern int __gthr_win32_key_create (__gthread_key_t *, void (*) (void*));
+extern int __gthr_win32_key_delete (__gthread_key_t);
+extern void * __gthr_win32_getspecific (__gthread_key_t);
+extern int __gthr_win32_setspecific (__gthread_key_t, const void *);
+extern void __gthr_win32_mutex_init_function (__gthread_mutex_t *);
+extern int __gthr_win32_mutex_lock (__gthread_mutex_t *);
+extern int __gthr_win32_mutex_trylock (__gthread_mutex_t *);
+extern int __gthr_win32_mutex_unlock (__gthread_mutex_t *);
+extern void
+  __gthr_win32_recursive_mutex_init_function (__gthread_recursive_mutex_t *);
+extern int __gthr_win32_recursive_mutex_lock (__gthread_recursive_mutex_t *);
+extern int
+  __gthr_win32_recursive_mutex_trylock (__gthread_recursive_mutex_t *);
+extern int __gthr_win32_recursive_mutex_unlock (__gthread_recursive_mutex_t *);
+extern void __gthr_win32_mutex_destroy (__gthread_mutex_t *);
+extern int
+  __gthr_win32_recursive_mutex_destroy (__gthread_recursive_mutex_t *);
+
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_once (__once, __func);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_key_create (__gthread_key_t *__key, void (*__dtor) (void *))
+{
+  return __gthr_win32_key_create (__key, __dtor);
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key)
+{
+  return __gthr_win32_key_delete (__key);
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  return __gthr_win32_getspecific (__key);
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  return __gthr_win32_setspecific (__key, __ptr);
+}
+
+static inline void
+__gthread_mutex_init_function (__gthread_mutex_t *__mutex)
+{
+  __gthr_win32_mutex_init_function (__mutex);
+}
+
+static inline void
+__gthread_mutex_destroy (__gthread_mutex_t *__mutex)
+{
+  __gthr_win32_mutex_destroy (__mutex);
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_mutex_lock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_mutex_trylock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_mutex_unlock (__mutex);
+  else
+    return 0;
+}
+
+static inline void
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *__mutex)
+{
+   __gthr_win32_recursive_mutex_init_function (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_recursive_mutex_lock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_recursive_mutex_trylock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthr_win32_recursive_mutex_unlock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthr_win32_recursive_mutex_destroy (__mutex);
+}
+
+#else /* ! __GTHREAD_HIDE_WIN32API */
+
+#include <windows.h>
+#include <errno.h>
+
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+  if (! __gthread_active_p ())
+    return -1;
+  else if (__once == NULL || __func == NULL)
+    return EINVAL;
+
+  if (! __once->done)
+    {
+      if (InterlockedIncrement (&(__once->started)) == 0)
+	{
+	  (*__func) ();
+	  __once->done = TRUE;
+	}
+      else
+	{
+	  /* Another thread is currently executing the code, so wait for it
+	     to finish; yield the CPU in the meantime.  If performance
+	     does become an issue, the solution is to use an Event that
+	     we wait on here (and set above), but that implies a place to
+	     create the event before this routine is called.  */
+	  while (! __once->done)
+	    Sleep (0);
+	}
+    }
+
+  return 0;
+}
+
+/* Windows32 thread local keys don't support destructors; this leads to
+   leaks, especially in threaded applications making extensive use of
+   C++ EH. Mingw uses a thread-support DLL to work-around this problem.  */
+static inline int
+__gthread_key_create (__gthread_key_t *__key,
+		      void (*__dtor) (void *) __attribute__((unused)))
+{
+  int __status = 0;
+  DWORD __tls_index = TlsAlloc ();
+  if (__tls_index != 0xFFFFFFFF)
+    {
+      *__key = __tls_index;
+#ifdef MINGW32_SUPPORTS_MT_EH
+      /* Mingw runtime will run the dtors in reverse order for each thread
+         when the thread exits.  */
+      __status = __mingwthr_key_dtor (*__key, __dtor);
+#endif
+    }
+  else
+    __status = (int) GetLastError ();
+  return __status;
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key)
+{
+  return (TlsFree (__key) != 0) ? 0 : (int) GetLastError ();
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  DWORD __lasterror;
+  void *__ptr;
+
+  __lasterror = GetLastError ();
+
+  __ptr = TlsGetValue (__key);
+
+  SetLastError (__lasterror);
+
+  return __ptr;
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  if (TlsSetValue (__key, CONST_CAST2(void *, const void *, __ptr)) != 0)
+    return 0;
+  else
+    return GetLastError ();
+}
+
+static inline void
+__gthread_mutex_init_function (__gthread_mutex_t *__mutex)
+{
+  __mutex->counter = -1;
+  __mutex->sema = CreateSemaphoreW (NULL, 0, 65535, NULL);
+}
+
+static inline void
+__gthread_mutex_destroy (__gthread_mutex_t *__mutex)
+{
+  CloseHandle ((HANDLE) __mutex->sema);
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+  int __status = 0;
+
+  if (__gthread_active_p ())
+    {
+      if (InterlockedIncrement (&__mutex->counter) == 0 ||
+	  WaitForSingleObject (__mutex->sema, INFINITE) == WAIT_OBJECT_0)
+	__status = 0;
+      else
+	{
+	  /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+	     some best-effort cleanup here.  */
+	  InterlockedDecrement (&__mutex->counter);
+	  __status = 1;
+	}
+    }
+  return __status;
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+  int __status = 0;
+
+  if (__gthread_active_p ())
+    {
+      if (__GTHR_W32_InterlockedCompareExchange (&__mutex->counter, 0, -1) < 0)
+	__status = 0;
+      else
+	__status = 1;
+    }
+  return __status;
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      if (InterlockedDecrement (&__mutex->counter) >= 0)
+	return ReleaseSemaphore (__mutex->sema, 1, NULL) ? 0 : 1;
+    }
+  return 0;
+}
+
+static inline void
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *__mutex)
+{
+  __mutex->counter = -1;
+  __mutex->depth = 0;
+  __mutex->owner = 0;
+  __mutex->sema = CreateSemaphoreW (NULL, 0, 65535, NULL);
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      DWORD __me = GetCurrentThreadId();
+      if (InterlockedIncrement (&__mutex->counter) == 0)
+	{
+	  __mutex->depth = 1;
+	  __mutex->owner = __me;
+	}
+      else if (__mutex->owner == __me)
+	{
+	  InterlockedDecrement (&__mutex->counter);
+	  ++(__mutex->depth);
+	}
+      else if (WaitForSingleObject (__mutex->sema, INFINITE) == WAIT_OBJECT_0)
+	{
+	  __mutex->depth = 1;
+	  __mutex->owner = __me;
+	}
+      else
+	{
+	  /* WaitForSingleObject returns WAIT_FAILED, and we can only do
+	     some best-effort cleanup here.  */
+	  InterlockedDecrement (&__mutex->counter);
+	  return 1;
+	}
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      DWORD __me = GetCurrentThreadId();
+      if (__GTHR_W32_InterlockedCompareExchange (&__mutex->counter, 0, -1) < 0)
+	{
+	  __mutex->depth = 1;
+	  __mutex->owner = __me;
+	}
+      else if (__mutex->owner == __me)
+	++(__mutex->depth);
+      else
+	return 1;
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      --(__mutex->depth);
+      if (__mutex->depth == 0)
+	{
+	  __mutex->owner = 0;
+
+	  if (InterlockedDecrement (&__mutex->counter) >= 0)
+	    return ReleaseSemaphore (__mutex->sema, 1, NULL) ? 0 : 1;
+	}
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  CloseHandle ((HANDLE) __mutex->sema);
+  return 0;
+}
+
+#endif /*  __GTHREAD_HIDE_WIN32API */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LIBOBJC */
+
+#endif /* ! GCC_GTHR_WIN32_H */
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-bsd.ver b/gcc-4.9/libgcc/config/i386/libgcc-bsd.ver
new file mode 100644
index 000000000..a439786f1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-bsd.ver
@@ -0,0 +1,113 @@
+# Copyright (C) 2010-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# 128 bit long double support was introduced with GCC 4.6.0 for FreeBSD.
+# These lines make the symbols to get a @@GCC_4.6.0.
+
+%exclude {
+  __addtf3
+  __copysigntf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+  __fabstf2
+  __fixtfdi
+  __fixtfsi
+  __fixtfti
+  __fixunstfdi
+  __fixunstfsi
+  __fixunstfti
+  __floatditf
+  __floatsitf
+  __floattitf
+  __floatunditf
+  __floatunsitf
+  __floatuntitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+GCC_4.6.0 {
+  __addtf3
+%ifndef __x86_64__
+  __copysigntf3
+%endif
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+%ifndef __x86_64__
+  __fabstf2
+%endif
+  __fixtfdi
+  __fixtfsi
+%ifdef __x86_64__
+  __fixtfti
+%endif
+  __fixunstfdi
+  __fixunstfsi
+%ifdef __x86_64__
+  __fixunstfti
+%endif
+  __floatditf
+  __floatsitf
+%ifdef __x86_64__
+  __floattitf
+%endif
+  __floatunditf
+  __floatunsitf
+%ifdef __x86_64__
+  __floatuntitf
+%endif
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_indicator_init
+}
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-cygming.ver b/gcc-4.9/libgcc/config/i386/libgcc-cygming.ver
new file mode 100644
index 000000000..b7cd022fe
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-cygming.ver
@@ -0,0 +1,22 @@
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_4.8 {
+  _GCC_specific_handler
+  __gcc_personality_seh0
+}
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.4.ver b/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.4.ver
new file mode 100644
index 000000000..e1887d99a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.4.ver
@@ -0,0 +1,98 @@
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+__Unwind_Backtrace
+__Unwind_DeleteException
+__Unwind_FindEnclosingFunction
+__Unwind_Find_FDE
+__Unwind_ForcedUnwind
+__Unwind_GetCFA
+__Unwind_GetDataRelBase
+__Unwind_GetGR
+__Unwind_GetIP
+__Unwind_GetLanguageSpecificData
+__Unwind_GetRegionStart
+__Unwind_GetTextRelBase
+__Unwind_RaiseException
+__Unwind_Resume
+__Unwind_Resume_or_Rethrow
+__Unwind_SetGR
+__Unwind_SetIP
+___absvdi2
+___absvsi2
+___addvdi3
+___addvsi3
+___ashldi3
+___ashrdi3
+___clear_cache
+___clzdi2
+___clzsi2
+___cmpdi2
+___ctzdi2
+___ctzsi2
+___deregister_frame
+___deregister_frame_info
+___deregister_frame_info_bases
+___divdc3
+___divdi3
+___divsc3
+___divxc3
+___enable_execute_stack
+___ffsdi2
+___fixdfdi
+___fixsfdi
+___fixunsdfdi
+___fixunsdfsi
+___fixunssfdi
+___fixunssfsi
+___fixunsxfdi
+___fixunsxfsi
+___fixxfdi
+___floatdidf
+___floatdisf
+___floatdixf
+___gcc_personality_v0
+___lshrdi3
+___moddi3
+___muldc3
+___muldi3
+___mulsc3
+___mulvdi3
+___mulvsi3
+___mulxc3
+___negdi2
+___negvdi2
+___negvsi2
+___paritydi2
+___paritysi2
+___popcountdi2
+___popcountsi2
+___powidf2
+___powisf2
+___powixf2
+___register_frame
+___register_frame_info
+___register_frame_info_bases
+___register_frame_info_table
+___register_frame_info_table_bases
+___register_frame_table
+___subvdi3
+___subvsi3
+___ucmpdi2
+___udivdi3
+___udivmoddi4
+___umoddi3
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.5.ver b/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.5.ver
new file mode 100644
index 000000000..5c55c4a51
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-darwin.10.5.ver
@@ -0,0 +1,102 @@
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+__Unwind_Backtrace
+__Unwind_DeleteException
+__Unwind_FindEnclosingFunction
+__Unwind_Find_FDE
+__Unwind_ForcedUnwind
+__Unwind_GetCFA
+__Unwind_GetDataRelBase
+__Unwind_GetGR
+__Unwind_GetIP
+__Unwind_GetIPInfo
+__Unwind_GetLanguageSpecificData
+__Unwind_GetRegionStart
+__Unwind_GetTextRelBase
+__Unwind_RaiseException
+__Unwind_Resume
+__Unwind_Resume_or_Rethrow
+__Unwind_SetGR
+__Unwind_SetIP
+___absvdi2
+___absvsi2
+___addvdi3
+___addvsi3
+___ashldi3
+___ashrdi3
+___clear_cache
+___clzdi2
+___clzsi2
+___cmpdi2
+___ctzdi2
+___ctzsi2
+___deregister_frame
+___deregister_frame_info
+___deregister_frame_info_bases
+___divdc3
+___divdi3
+___divsc3
+___divxc3
+___enable_execute_stack
+___ffsdi2
+___fixdfdi
+___fixsfdi
+___fixunsdfdi
+___fixunsdfsi
+___fixunssfdi
+___fixunssfsi
+___fixunsxfdi
+___fixunsxfsi
+___fixxfdi
+___floatdidf
+___floatdisf
+___floatdixf
+___floatundidf
+___floatundisf
+___floatundixf
+___gcc_personality_v0
+___lshrdi3
+___moddi3
+___muldc3
+___muldi3
+___mulsc3
+___mulvdi3
+___mulvsi3
+___mulxc3
+___negdi2
+___negvdi2
+___negvsi2
+___paritydi2
+___paritysi2
+___popcountdi2
+___popcountsi2
+___powidf2
+___powisf2
+___powixf2
+___register_frame
+___register_frame_info
+___register_frame_info_bases
+___register_frame_info_table
+___register_frame_info_table_bases
+___register_frame_table
+___subvdi3
+___subvsi3
+___ucmpdi2
+___udivdi3
+___udivmoddi4
+___umoddi3
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-glibc.ver b/gcc-4.9/libgcc/config/i386/libgcc-glibc.ver
new file mode 100644
index 000000000..fd0025cde
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-glibc.ver
@@ -0,0 +1,196 @@
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+%ifndef __x86_64__
+%exclude {
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.0
+GLIBC_2.0 {
+  # Sampling of DImode arithmetic used by (at least) i386 and m68k.
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+
+  # Exception handling support functions used by most everyone.
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+%endif
+
+# 128 bit long double support was introduced with GCC 4.3.0 to 64bit
+# and with GCC 4.4.0 to 32bit.  These lines make the symbols to get
+# a @@GCC_4.3.0 or @@GCC_4.4.0 attached.
+
+%exclude {
+  __addtf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+  __fixtfdi
+  __fixtfsi
+  __fixtfti
+  __fixunstfdi
+  __fixunstfsi
+  __fixunstfti
+  __floatditf
+  __floatsitf
+  __floattitf
+  __floatunditf
+  __floatunsitf
+  __floatuntitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+%ifdef __x86_64__
+# Those symbols had improper versions when they were added to gcc 4.3.0.
+# We corrected the default version to GCC_4.3.0.  But we keep the old
+# version for backward binary compatibility. 
+GCC_3.0 {
+  __gttf2
+  __lttf2
+  __netf2
+}
+
+GCC_4.0.0 {
+  __divtc3
+  __multc3
+  __powitf2
+}
+
+GCC_4.3.0 {
+  __addtf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+  __fixtfdi
+  __fixtfsi
+  __fixtfti
+  __fixunstfdi
+  __fixunstfsi
+  __fixunstfti
+  __floatditf
+  __floatsitf
+  __floattitf
+  __floatunditf
+  __floatunsitf
+  __floatuntitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_indicator_init
+}
+%else
+GCC_4.4.0 {
+  __addtf3
+  __copysigntf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __fabstf2
+  __fixtfdi
+  __fixtfsi
+  __fixunstfdi
+  __fixunstfsi
+  __floatditf
+  __floatsitf
+  __floatunditf
+  __floatunsitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+GCC_4.5.0 {
+  __extendxftf2
+}
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_indicator_init
+}
+%endif
diff --git a/gcc-4.9/libgcc/config/i386/libgcc-sol2.ver b/gcc-4.9/libgcc/config/i386/libgcc-sol2.ver
new file mode 100644
index 000000000..fd94ff0c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/libgcc-sol2.ver
@@ -0,0 +1,113 @@
+# Copyright (C) 2010-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# 128 bit long double support was introduced with GCC 4.5.0 for Solaris 2.
+# These lines make the symbols to get a @@GCC_4.5.0.
+
+%exclude {
+  __addtf3
+  __copysigntf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+  __fabstf2
+  __fixtfdi
+  __fixtfsi
+  __fixtfti
+  __fixunstfdi
+  __fixunstfsi
+  __fixunstfti
+  __floatditf
+  __floatsitf
+  __floattitf
+  __floatunditf
+  __floatunsitf
+  __floatuntitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+GCC_4.5.0 {
+  __addtf3
+%ifndef __x86_64__
+  __copysigntf3
+%endif
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+%ifndef __x86_64__
+  __fabstf2
+%endif
+  __fixtfdi
+  __fixtfsi
+%ifdef __x86_64__
+  __fixtfti
+%endif
+  __fixunstfdi
+  __fixunstfsi
+%ifdef __x86_64__
+  __fixunstfti
+%endif
+  __floatditf
+  __floatsitf
+%ifdef __x86_64__
+  __floattitf
+%endif
+  __floatunditf
+  __floatunsitf
+%ifdef __x86_64__
+  __floatuntitf
+%endif
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+GCC_4.8.0 {
+  __cpu_model
+  __cpu_indicator_init
+}
diff --git a/gcc-4.9/libgcc/config/i386/linux-unwind.h b/gcc-4.9/libgcc/config/i386/linux-unwind.h
new file mode 100644
index 000000000..7986928cf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/linux-unwind.h
@@ -0,0 +1,198 @@
+/* DWARF2 EH unwinding support for AMD x86-64 and x86.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
+
+/* There's no sys/ucontext.h for glibc 2.0, so no
+   signal-turned-exceptions for them.  There's also no configure-run for
+   the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H.  Using the
+   target libc version macro should be enough.  */
+#if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
+
+#include <signal.h>
+#include <sys/ucontext.h>
+
+#ifdef __x86_64__
+
+#define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state
+
+static _Unwind_Reason_Code
+x86_64_fallback_frame_state (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+
+  /* movq $__NR_rt_sigreturn, %rax ; syscall.  */
+#ifdef __LP64__
+#define RT_SIGRETURN_SYSCALL	0x050f0000000fc0c7ULL
+#else
+#define RT_SIGRETURN_SYSCALL	0x050f40000201c0c7ULL
+#endif
+  if (*(unsigned char *)(pc+0) == 0x48
+      && *(unsigned long long *)(pc+1) == RT_SIGRETURN_SYSCALL)
+    {
+      struct ucontext *uc_ = context->cfa;
+      /* The void * cast is necessary to avoid an aliasing warning.
+         The aliasing warning is correct, but should not be a problem
+         because it does not alias anything.  */
+      sc = (struct sigcontext *) (void *) &uc_->uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->rsp;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  /* Register 7 is rsp  */
+  fs->regs.cfa_reg = 7;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  /* The SVR4 register numbering macros aren't usable in libgcc.  */
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa;
+  fs->regs.reg[1].how = REG_SAVED_OFFSET;
+  fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa;
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa;
+  fs->regs.reg[3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa;
+  fs->regs.reg[4].how = REG_SAVED_OFFSET;
+  fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa;
+  fs->regs.reg[5].how = REG_SAVED_OFFSET;
+  fs->regs.reg[5].loc.offset = (long)&sc->rdi - new_cfa;
+  fs->regs.reg[6].how = REG_SAVED_OFFSET;
+  fs->regs.reg[6].loc.offset = (long)&sc->rbp - new_cfa;
+  fs->regs.reg[8].how = REG_SAVED_OFFSET;
+  fs->regs.reg[8].loc.offset = (long)&sc->r8 - new_cfa;
+  fs->regs.reg[9].how = REG_SAVED_OFFSET;
+  fs->regs.reg[9].loc.offset = (long)&sc->r9 - new_cfa;
+  fs->regs.reg[10].how = REG_SAVED_OFFSET;
+  fs->regs.reg[10].loc.offset = (long)&sc->r10 - new_cfa;
+  fs->regs.reg[11].how = REG_SAVED_OFFSET;
+  fs->regs.reg[11].loc.offset = (long)&sc->r11 - new_cfa;
+  fs->regs.reg[12].how = REG_SAVED_OFFSET;
+  fs->regs.reg[12].loc.offset = (long)&sc->r12 - new_cfa;
+  fs->regs.reg[13].how = REG_SAVED_OFFSET;
+  fs->regs.reg[13].loc.offset = (long)&sc->r13 - new_cfa;
+  fs->regs.reg[14].how = REG_SAVED_OFFSET;
+  fs->regs.reg[14].loc.offset = (long)&sc->r14 - new_cfa;
+  fs->regs.reg[15].how = REG_SAVED_OFFSET;
+  fs->regs.reg[15].loc.offset = (long)&sc->r15 - new_cfa;
+  fs->regs.reg[16].how = REG_SAVED_OFFSET;
+  fs->regs.reg[16].loc.offset = (long)&sc->rip - new_cfa;
+  fs->retaddr_column = 16;
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+
+#else /* ifdef __x86_64__  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state
+
+static _Unwind_Reason_Code
+x86_fallback_frame_state (struct _Unwind_Context *context,
+			  _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+
+  /* popl %eax ; movl $__NR_sigreturn,%eax ; int $0x80  */
+  if (*(unsigned short *)(pc+0) == 0xb858
+      && *(unsigned int *)(pc+2) == 119
+      && *(unsigned short *)(pc+6) == 0x80cd)
+    sc = context->cfa + 4;
+  /* movl $__NR_rt_sigreturn,%eax ; int $0x80  */
+  else if (*(unsigned char *)(pc+0) == 0xb8
+	   && *(unsigned int *)(pc+1) == 173
+	   && *(unsigned short *)(pc+5) == 0x80cd)
+    {
+      struct rt_sigframe {
+	int sig;
+	siginfo_t *pinfo;
+	void *puc;
+	siginfo_t info;
+	struct ucontext uc;
+      } *rt_ = context->cfa;
+      /* The void * cast is necessary to avoid an aliasing warning.
+         The aliasing warning is correct, but should not be a problem
+         because it does not alias anything.  */
+      sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->esp;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 4;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  /* The SVR4 register numbering macros aren't usable in libgcc.  */
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)&sc->eax - new_cfa;
+  fs->regs.reg[3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[3].loc.offset = (long)&sc->ebx - new_cfa;
+  fs->regs.reg[1].how = REG_SAVED_OFFSET;
+  fs->regs.reg[1].loc.offset = (long)&sc->ecx - new_cfa;
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long)&sc->edx - new_cfa;
+  fs->regs.reg[6].how = REG_SAVED_OFFSET;
+  fs->regs.reg[6].loc.offset = (long)&sc->esi - new_cfa;
+  fs->regs.reg[7].how = REG_SAVED_OFFSET;
+  fs->regs.reg[7].loc.offset = (long)&sc->edi - new_cfa;
+  fs->regs.reg[5].how = REG_SAVED_OFFSET;
+  fs->regs.reg[5].loc.offset = (long)&sc->ebp - new_cfa;
+  fs->regs.reg[8].how = REG_SAVED_OFFSET;
+  fs->regs.reg[8].loc.offset = (long)&sc->eip - new_cfa;
+  fs->retaddr_column = 8;
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+
+#define MD_FROB_UPDATE_CONTEXT x86_frob_update_context
+
+/* Fix up for kernels that have vDSO, but don't have S flag in it.  */
+
+static void
+x86_frob_update_context (struct _Unwind_Context *context,
+			 _Unwind_FrameState *fs ATTRIBUTE_UNUSED)
+{
+  unsigned char *pc = context->ra;
+
+  /* movl $__NR_rt_sigreturn,%eax ; {int $0x80 | syscall}  */
+  if (*(unsigned char *)(pc+0) == 0xb8
+      && *(unsigned int *)(pc+1) == 173
+      && (*(unsigned short *)(pc+5) == 0x80cd
+	  || *(unsigned short *)(pc+5) == 0x050f))
+    _Unwind_SetSignalFrame (context, 1);
+}
+
+#endif /* ifdef __x86_64__  */
+#endif /* not glibc 2.0 */
+#endif /* ifdef inhibit_libc  */
diff --git a/gcc-4.9/libgcc/config/i386/morestack.S b/gcc-4.9/libgcc/config/i386/morestack.S
new file mode 100644
index 000000000..7bef99f13
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/morestack.S
@@ -0,0 +1,860 @@
+# x86/x86_64 support for -fsplit-stack.
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# Contributed by Ian Lance Taylor <iant@google.com>.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+# Support for allocating more stack space when using -fsplit-stack.
+# When a function discovers that it needs more stack space, it will
+# call __morestack with the size of the stack frame and the size of
+# the parameters to copy from the old stack frame to the new one.
+# The __morestack function preserves the parameter registers and
+# calls __generic_morestack to actually allocate the stack space.
+
+# When this is called stack space is very low, but we ensure that
+# there is enough space to push the parameter registers and to call
+# __generic_morestack.
+
+# When calling __generic_morestack, FRAME_SIZE points to the size of
+# the desired frame when the function is called, and the function
+# sets it to the size of the allocated stack.  OLD_STACK points to
+# the parameters on the old stack and PARAM_SIZE is the number of
+# bytes of parameters to copy to the new stack.  These are the
+# parameters of the function that called __morestack.  The
+# __generic_morestack function returns the new stack pointer,
+# pointing to the address of the first copied parameter.  The return
+# value minus the returned *FRAME_SIZE will be the first address on
+# the stack which we should not use.
+
+# void *__generic_morestack (size_t *frame_size, void *old_stack,
+#			     size_t param_size);
+
+# The __morestack routine has to arrange for the caller to return to a
+# stub on the new stack.  The stub is responsible for restoring the
+# old stack pointer and returning to the caller's caller.  This calls
+# __generic_releasestack to retrieve the old stack pointer and release
+# the newly allocated stack.
+
+# void *__generic_releasestack (size_t *available);
+
+# We do a little dance so that the processor's call/return return
+# address prediction works out.  The compiler arranges for the caller
+# to look like this:
+#   call __generic_morestack
+#   ret
+#  L:
+#   // carry on with function
+# After we allocate more stack, we call L, which is in our caller.
+# When that returns (to the predicted instruction), we release the
+# stack segment and reset the stack pointer.  We then return to the
+# predicted instruction, namely the ret instruction immediately after
+# the call to __generic_morestack.  That then returns to the caller of
+# the original caller.
+
+
+# The amount of extra space we ask for.  In general this has to be
+# enough for the dynamic loader to find a symbol and for a signal
+# handler to run.
+	
+#ifndef __x86_64__
+#define BACKOFF (1024)
+#else
+#define BACKOFF (1536)
+#endif
+
+
+# The amount of space we ask for when calling non-split-stack code.
+#define NON_SPLIT_STACK 0x100000
+
+# This entry point is for split-stack code which calls non-split-stack
+# code.  When the linker sees this case, it converts the call to
+# __morestack to call __morestack_non_split instead.  We just bump the
+# requested stack space by 16K.
+
+	.global __morestack_non_split
+	.hidden	__morestack_non_split
+
+#ifdef __ELF__
+       .type	__morestack_non_split,@function
+#endif
+
+__morestack_non_split:
+	.cfi_startproc
+
+#ifndef __x86_64__
+
+	# See below for an extended explanation of this.
+	.cfi_def_cfa %esp,16
+
+	pushl	%eax			# Save %eax in case it is a parameter.
+
+	.cfi_adjust_cfa_offset 4	# Account for pushed register.
+
+	movl	%esp,%eax		# Current stack,
+	subl	8(%esp),%eax		# less required stack frame size,
+	subl	$NON_SPLIT_STACK,%eax	# less space for non-split code.
+	cmpl	%gs:0x30,%eax		# See if we have enough space.
+	jb	2f			# Get more space if we need it.
+
+	# Here the stack is
+	#	%esp + 20:	stack pointer after two returns
+	#	%esp + 16:	return address of morestack caller's caller
+	#	%esp + 12:	size of parameters
+	#	%esp + 8:	new stack frame size
+	#	%esp + 4:	return address of this function
+	#	%esp:		saved %eax
+	#
+	# Since we aren't doing a full split stack, we don't need to
+	# do anything when our caller returns.  So we return to our
+	# caller rather than calling it, and let it return as usual.
+	# To make that work we adjust the return address.
+
+	# This breaks call/return address prediction for the call to
+	# this function.  I can't figure out a way to make it work
+	# short of copying the parameters down the stack, which will
+	# probably take more clock cycles than we will lose breaking
+	# call/return address prediction.  We will only break
+	# prediction for this call, not for our caller.
+
+	movl	4(%esp),%eax		# Increment the return address
+	cmpb	$0xc3,(%eax)		# to skip the ret instruction;
+	je	1f			# see above.
+	addl	$2,%eax
+1:	inc	%eax
+
+	# If the instruction that we return to is
+	#   leal  20(%ebp),{%eax,%ecx,%edx}
+	# then we have been called by a varargs function that expects
+	# %ebp to hold a real value.  That can only work if we do the
+	# full stack split routine.  FIXME: This is fragile.
+	cmpb	$0x8d,(%eax)
+	jne	3f
+	cmpb	$0x14,2(%eax)
+	jne	3f
+	cmpb	$0x45,1(%eax)
+	je	2f
+	cmpb	$0x4d,1(%eax)
+	je	2f
+	cmpb	$0x55,1(%eax)
+	je	2f
+
+3:	
+	movl	%eax,4(%esp)		# Update return address.
+
+	popl	%eax			# Restore %eax and stack.
+
+	.cfi_adjust_cfa_offset -4	# Account for popped register.
+
+	ret	$8			# Return to caller, popping args.
+
+2:
+	.cfi_adjust_cfa_offset 4	# Back to where we were.
+
+	popl	%eax			# Restore %eax and stack.
+
+	.cfi_adjust_cfa_offset -4	# Account for popped register.
+
+	# Increment space we request.
+	addl	$NON_SPLIT_STACK+0x1000+BACKOFF,4(%esp)
+
+	# Fall through into morestack.
+
+#else
+
+	# See below for an extended explanation of this.
+	.cfi_def_cfa %rsp,16
+
+	pushq	%rax			# Save %rax in case caller is using
+					# it to preserve original %r10.
+	.cfi_adjust_cfa_offset 8	# Adjust for pushed register.
+
+	movq	%rsp,%rax		# Current stack,
+	subq	%r10,%rax		# less required stack frame size,
+	subq	$NON_SPLIT_STACK,%rax	# less space for non-split code.
+
+#ifdef __LP64__
+	cmpq	%fs:0x70,%rax		# See if we have enough space.
+#else
+	cmpl	%fs:0x40,%eax
+#endif
+
+	jb	2f			# Get more space if we need it.
+
+	# If the instruction that we return to is
+	#   leaq  24(%rbp), %r11n
+	# then we have been called by a varargs function that expects
+	# %ebp to hold a real value.  That can only work if we do the
+	# full stack split routine.  FIXME: This is fragile.
+	movq	8(%rsp),%rax
+	incq	%rax			# Skip ret instruction in caller.
+	cmpl	$0x185d8d4c,(%rax)
+	je	2f
+
+	# This breaks call/return prediction, as described above.
+	incq	8(%rsp)			# Increment the return address.
+
+	popq	%rax			# Restore register.
+
+	.cfi_adjust_cfa_offset -8	# Adjust for popped register.
+
+	ret				# Return to caller.
+
+2:
+	popq	%rax			# Restore register.
+
+	.cfi_adjust_cfa_offset -8	# Adjust for popped register.
+
+	# Increment space we request.
+	addq	$NON_SPLIT_STACK+0x1000+BACKOFF,%r10
+
+	# Fall through into morestack.
+
+#endif
+
+	.cfi_endproc
+#ifdef __ELF__
+	.size	__morestack_non_split, . - __morestack_non_split
+#endif
+
+# __morestack_non_split falls through into __morestack.
+
+
+# The __morestack function.
+
+	.global	__morestack
+	.hidden	__morestack
+
+#ifdef __ELF__
+	.type	__morestack,@function
+#endif
+
+__morestack:
+.LFB1:
+	.cfi_startproc
+
+
+#ifndef __x86_64__
+
+
+# The 32-bit __morestack function.
+
+	# We use a cleanup to restore the stack guard if an exception
+	# is thrown through this code.
+#ifndef __PIC__
+	.cfi_personality 0,__gcc_personality_v0
+	.cfi_lsda 0,.LLSDA1
+#else
+	.cfi_personality 0x9b,DW.ref.__gcc_personality_v0
+	.cfi_lsda 0x1b,.LLSDA1
+#endif
+
+	# We return below with a ret $8.  We will return to a single
+	# return instruction, which will return to the caller of our
+	# caller.  We let the unwinder skip that single return
+	# instruction, and just return to the real caller.
+
+	# Here CFA points just past the return address on the stack,
+	# e.g., on function entry it is %esp + 4.  The stack looks
+	# like this:
+	#	CFA + 12:	stack pointer after two returns
+	#	CFA + 8:	return address of morestack caller's caller
+	#	CFA + 4:	size of parameters
+	#	CFA:		new stack frame size
+	#	CFA - 4:	return address of this function
+	#	CFA - 8:	previous value of %ebp; %ebp points here
+	# Setting the new CFA to be the current CFA + 12 (i.e., %esp +
+	# 16) will make the unwinder pick up the right return address.
+
+	.cfi_def_cfa %esp,16
+
+	pushl	%ebp
+	.cfi_adjust_cfa_offset 4
+	.cfi_offset %ebp, -20
+	movl	%esp,%ebp
+	.cfi_def_cfa_register %ebp
+
+	# In 32-bit mode the parameters are pushed on the stack.  The
+	# argument size is pushed then the new stack frame size is
+	# pushed.
+
+	# In the body of a non-leaf function, the stack pointer will
+	# be aligned to a 16-byte boundary.  That is CFA + 12 in the
+	# stack picture above: (CFA + 12) % 16 == 0.  At this point we
+	# have %esp == CFA - 8, so %esp % 16 == 12.  We need some
+	# space for saving registers and passing parameters, and we
+	# need to wind up with %esp % 16 == 0.
+	subl	$44,%esp
+
+	# Because our cleanup code may need to clobber %ebx, we need
+	# to save it here so the unwinder can restore the value used
+	# by the caller.  Note that we don't have to restore the
+	# register, since we don't change it, we just have to save it
+	# for the unwinder.
+	movl	%ebx,-4(%ebp)
+	.cfi_offset %ebx, -24
+
+	# In 32-bit mode the registers %eax, %edx, and %ecx may be
+	# used for parameters, depending on the regparm and fastcall
+	# attributes.
+
+	movl	%eax,-8(%ebp)
+	movl	%edx,-12(%ebp)
+	movl	%ecx,-16(%ebp)
+
+	call	__morestack_block_signals
+
+	movl	12(%ebp),%eax		# The size of the parameters.
+	movl	%eax,8(%esp)
+	leal	20(%ebp),%eax		# Address of caller's parameters.
+	movl	%eax,4(%esp)
+	addl	$BACKOFF,8(%ebp)	# Ask for backoff bytes.
+	leal	8(%ebp),%eax		# The address of the new frame size.
+	movl	%eax,(%esp)
+
+	call	__generic_morestack
+
+	movl	%eax,%esp		# Switch to the new stack.
+	subl	8(%ebp),%eax		# The end of the stack space.
+	addl	$BACKOFF,%eax		# Back off 512 bytes.
+
+.LEHB0:
+	# FIXME: The offset must match
+	# TARGET_THREAD_SPLIT_STACK_OFFSET in
+	# gcc/config/i386/linux.h.
+	movl	%eax,%gs:0x30		# Save the new stack boundary.
+
+	call	__morestack_unblock_signals
+
+	movl	-12(%ebp),%edx		# Restore registers.
+	movl	-16(%ebp),%ecx
+
+	movl	4(%ebp),%eax		# Increment the return address
+	cmpb	$0xc3,(%eax)		# to skip the ret instruction;
+	je	1f			# see above.
+	addl	$2,%eax
+1:	inc	%eax
+
+	movl	%eax,-12(%ebp)		# Store return address in an
+					# unused slot.
+
+	movl	-8(%ebp),%eax		# Restore the last register.
+
+	call	*-12(%ebp)		# Call our caller!
+
+	# The caller will return here, as predicted.
+
+	# Save the registers which may hold a return value.  We
+	# assume that __generic_releasestack does not touch any
+	# floating point or vector registers.
+	pushl	%eax
+	pushl	%edx
+
+	# Push the arguments to __generic_releasestack now so that the
+	# stack is at a 16-byte boundary for
+	# __morestack_block_signals.
+	pushl	$0			# Where the available space is returned.
+	leal	0(%esp),%eax		# Push its address.
+	push	%eax
+
+	call	__morestack_block_signals
+
+	call	__generic_releasestack
+
+	subl	4(%esp),%eax		# Subtract available space.
+	addl	$BACKOFF,%eax		# Back off 512 bytes.
+.LEHE0:
+	movl	%eax,%gs:0x30		# Save the new stack boundary.
+
+	addl	$8,%esp			# Remove values from stack.
+
+	# We need to restore the old stack pointer, which is in %rbp,
+	# before we unblock signals.  We also need to restore %eax and
+	# %edx after we unblock signals but before we return.  Do this
+	# by moving %eax and %edx from the current stack to the old
+	# stack.
+
+	popl	%edx			# Pop return value from current stack.
+	popl	%eax
+
+	movl	%ebp,%esp		# Restore stack pointer.
+
+	# As before, we now have %esp % 16 == 12.
+
+	pushl	%eax			# Push return value on old stack.
+	pushl	%edx
+	subl	$4,%esp			# Align stack to 16-byte boundary.
+
+	call	__morestack_unblock_signals
+
+	addl	$4,%esp
+	popl	%edx			# Restore return value.
+	popl	%eax
+
+	.cfi_remember_state
+
+	# We never changed %ebx, so we don't have to actually restore it.
+	.cfi_restore %ebx
+
+	popl	%ebp
+	.cfi_restore %ebp
+	.cfi_def_cfa %esp, 16
+	ret	$8			# Return to caller, which will
+					# immediately return.  Pop
+					# arguments as we go.
+
+# This is the cleanup code called by the stack unwinder when unwinding
+# through the code between .LEHB0 and .LEHE0 above.
+	
+.L1:
+	.cfi_restore_state
+	subl	$16,%esp		# Maintain 16 byte alignment.
+	movl	%eax,4(%esp)		# Save exception header.
+	movl	%ebp,(%esp)		# Stack pointer after resume.
+	call	__generic_findstack
+	movl	%ebp,%ecx		# Get the stack pointer.
+	subl	%eax,%ecx		# Subtract available space.
+	addl	$BACKOFF,%ecx		# Back off 512 bytes.
+	movl	%ecx,%gs:0x30		# Save new stack boundary.
+	movl	4(%esp),%eax		# Function argument.
+	movl	%eax,(%esp)
+#ifdef __PIC__
+	call	__x86.get_pc_thunk.bx	# %ebx may not be set up for us.
+	addl	$_GLOBAL_OFFSET_TABLE_, %ebx
+	call	_Unwind_Resume@PLT	# Resume unwinding.
+#else
+	call	_Unwind_Resume
+#endif
+
+#else /* defined(__x86_64__) */
+
+
+# The 64-bit __morestack function.
+
+	# We use a cleanup to restore the stack guard if an exception
+	# is thrown through this code.
+#ifndef __PIC__
+	.cfi_personality 0x3,__gcc_personality_v0
+	.cfi_lsda 0x3,.LLSDA1
+#else
+	.cfi_personality 0x9b,DW.ref.__gcc_personality_v0
+	.cfi_lsda 0x1b,.LLSDA1
+#endif
+
+	# We will return a single return instruction, which will
+	# return to the caller of our caller.  Let the unwinder skip
+	# that single return instruction, and just return to the real
+	# caller.
+	.cfi_def_cfa %rsp,16
+
+	# Set up a normal backtrace.
+	pushq	%rbp
+	.cfi_adjust_cfa_offset 8
+	.cfi_offset %rbp, -24
+	movq	%rsp, %rbp
+	.cfi_def_cfa_register %rbp
+
+	# In 64-bit mode the new stack frame size is passed in r10
+        # and the argument size is passed in r11.
+
+	addq	$BACKOFF,%r10		# Ask for backoff bytes.
+	pushq	%r10			# Save new frame size.
+
+	# In 64-bit mode the registers %rdi, %rsi, %rdx, %rcx, %r8,
+	# and %r9 may be used for parameters.  We also preserve %rax
+	# which the caller may use to hold %r10.
+
+	pushq	%rax
+	pushq	%rdi
+	pushq	%rsi
+	pushq	%rdx
+	pushq	%rcx
+	pushq	%r8
+	pushq	%r9
+
+	pushq	%r11
+
+	# We entered morestack with the stack pointer aligned to a
+	# 16-byte boundary (the call to morestack's caller used 8
+	# bytes, and the call to morestack used 8 bytes).  We have now
+	# pushed 10 registers, so we are still aligned to a 16-byte
+	# boundary.
+
+	call	__morestack_block_signals
+
+	leaq	-8(%rbp),%rdi		# Address of new frame size.
+	leaq	24(%rbp),%rsi		# The caller's parameters.
+	popq	%rdx			# The size of the parameters.
+
+	subq	$8,%rsp			# Align stack.
+
+	call	__generic_morestack
+
+	movq	-8(%rbp),%r10		# Reload modified frame size
+	movq	%rax,%rsp		# Switch to the new stack.
+	subq	%r10,%rax		# The end of the stack space.
+	addq	$BACKOFF,%rax		# Back off 1024 bytes.
+
+.LEHB0:
+	# FIXME: The offset must match
+	# TARGET_THREAD_SPLIT_STACK_OFFSET in
+	# gcc/config/i386/linux64.h.
+	# Macro to save the new stack boundary.
+#ifdef __LP64__
+#define X86_64_SAVE_NEW_STACK_BOUNDARY(reg)	movq	%r##reg,%fs:0x70
+#else
+#define X86_64_SAVE_NEW_STACK_BOUNDARY(reg)	movl	%e##reg,%fs:0x40
+#endif
+	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+
+	call	__morestack_unblock_signals
+
+	movq	-24(%rbp),%rdi		# Restore registers.
+	movq	-32(%rbp),%rsi
+	movq	-40(%rbp),%rdx
+	movq	-48(%rbp),%rcx
+	movq	-56(%rbp),%r8
+	movq	-64(%rbp),%r9
+
+	movq	8(%rbp),%r10		# Increment the return address
+	incq	%r10			# to skip the ret instruction;
+					# see above.
+
+	movq	-16(%rbp),%rax		# Restore caller's %rax.
+
+	call	*%r10			# Call our caller!
+
+	# The caller will return here, as predicted.
+
+	# Save the registers which may hold a return value.  We
+	# assume that __generic_releasestack does not touch any
+	# floating point or vector registers.
+	pushq	%rax
+	pushq	%rdx
+
+	call	__morestack_block_signals
+
+	pushq	$0			# For alignment.
+	pushq	$0			# Where the available space is returned.
+	leaq	0(%rsp),%rdi		# Pass its address.
+
+	call	__generic_releasestack
+
+	subq	0(%rsp),%rax		# Subtract available space.
+	addq	$BACKOFF,%rax		# Back off 1024 bytes.
+.LEHE0:
+	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+
+	addq	$16,%rsp		# Remove values from stack.
+
+	# We need to restore the old stack pointer, which is in %rbp,
+	# before we unblock signals.  We also need to restore %rax and
+	# %rdx after we unblock signals but before we return.  Do this
+	# by moving %rax and %rdx from the current stack to the old
+	# stack.
+
+	popq	%rdx			# Pop return value from current stack.
+	popq	%rax
+
+	movq	%rbp,%rsp		# Restore stack pointer.
+
+	# Now (%rsp & 16) == 8.
+
+	subq	$8,%rsp			# For alignment.
+	pushq	%rax			# Push return value on old stack.
+	pushq	%rdx
+
+	call	__morestack_unblock_signals
+
+	popq	%rdx			# Restore return value.
+	popq	%rax
+	addq	$8,%rsp
+
+	.cfi_remember_state
+	popq	%rbp
+	.cfi_restore %rbp
+	.cfi_def_cfa %rsp, 16
+	ret				# Return to caller, which will
+					# immediately return.
+
+# This is the cleanup code called by the stack unwinder when unwinding
+# through the code between .LEHB0 and .LEHE0 above.
+	
+.L1:
+	.cfi_restore_state
+	subq	$16,%rsp		# Maintain 16 byte alignment.
+	movq	%rax,(%rsp)		# Save exception header.
+	movq	%rbp,%rdi		# Stack pointer after resume.
+	call	__generic_findstack
+	movq	%rbp,%rcx		# Get the stack pointer.
+	subq	%rax,%rcx		# Subtract available space.
+	addq	$BACKOFF,%rcx		# Back off 1024 bytes.
+	X86_64_SAVE_NEW_STACK_BOUNDARY (cx)
+	movq	(%rsp),%rdi		# Restore exception data for call.
+#ifdef __PIC__
+	call	_Unwind_Resume@PLT	# Resume unwinding.
+#else
+	call	_Unwind_Resume		# Resume unwinding.
+#endif
+
+#endif /* defined(__x86_64__) */
+
+	.cfi_endproc
+#ifdef __ELF__
+	.size	__morestack, . - __morestack
+#endif
+
+#if !defined(__x86_64__) && defined(__PIC__)
+# Output the thunk to get PC into bx, since we use it above.
+	.section	.text.__x86.get_pc_thunk.bx,"axG",@progbits,__x86.get_pc_thunk.bx,comdat
+	.globl	__x86.get_pc_thunk.bx
+	.hidden	__x86.get_pc_thunk.bx
+#ifdef __ELF__
+	.type	__x86.get_pc_thunk.bx, @function
+#endif
+__x86.get_pc_thunk.bx:
+	.cfi_startproc
+	movl	(%esp), %ebx
+	ret
+	.cfi_endproc
+#ifdef __ELF__
+	.size	__x86.get_pc_thunk.bx, . - __x86.get_pc_thunk.bx
+#endif
+#endif
+
+# The exception table.  This tells the personality routine to execute
+# the exception handler.
+
+	.section	.gcc_except_table,"a",@progbits
+	.align	4
+.LLSDA1:
+	.byte	0xff	# @LPStart format (omit)
+	.byte	0xff	# @TType format (omit)
+	.byte	0x1	# call-site format (uleb128)
+	.uleb128 .LLSDACSE1-.LLSDACSB1	# Call-site table length
+.LLSDACSB1:
+	.uleb128 .LEHB0-.LFB1	# region 0 start
+	.uleb128 .LEHE0-.LEHB0	# length
+	.uleb128 .L1-.LFB1	# landing pad
+	.uleb128 0		# action
+.LLSDACSE1:
+
+
+	.global __gcc_personality_v0
+#ifdef __PIC__
+	# Build a position independent reference to the basic
+        # personality function.
+	.hidden DW.ref.__gcc_personality_v0
+	.weak   DW.ref.__gcc_personality_v0
+	.section .data.DW.ref.__gcc_personality_v0,"awG",@progbits,DW.ref.__gcc_personality_v0,comdat
+	.type	DW.ref.__gcc_personality_v0, @object
+DW.ref.__gcc_personality_v0:
+#ifndef __LP64__
+	.align 4
+	.size	DW.ref.__gcc_personality_v0, 4
+	.long	__gcc_personality_v0
+#else
+	.align 8
+	.size	DW.ref.__gcc_personality_v0, 8
+	.quad	__gcc_personality_v0
+#endif
+#endif
+
+#if defined __x86_64__ && defined __LP64__
+
+# This entry point is used for the large model.  With this entry point
+# the upper 32 bits of %r10 hold the argument size and the lower 32
+# bits hold the new stack frame size.  There doesn't seem to be a way
+# to know in the assembler code that we are assembling for the large
+# model, and there doesn't seem to be a large model multilib anyhow.
+# If one is developed, then the non-PIC code is probably OK since we
+# will probably be close to the morestack code, but the PIC code
+# almost certainly needs to be changed.  FIXME.
+
+	.text
+	.global	__morestack_large_model
+	.hidden	__morestack_large_model
+
+#ifdef __ELF__
+	.type	__morestack_large_model,@function
+#endif
+
+__morestack_large_model:
+
+	.cfi_startproc
+
+	movq	%r10, %r11
+	andl	$0xffffffff, %r10d
+	sarq	$32, %r11
+	jmp	__morestack
+
+	.cfi_endproc
+#ifdef __ELF__
+       .size	__morestack_large_model, . - __morestack_large_model
+#endif
+
+#endif /* __x86_64__ && __LP64__ */
+
+# Initialize the stack test value when the program starts or when a
+# new thread starts.  We don't know how large the main stack is, so we
+# guess conservatively.  We might be able to use getrlimit here.
+
+	.text
+	.global	__stack_split_initialize
+	.hidden	__stack_split_initialize
+
+#ifdef __ELF__
+	.type	__stack_split_initialize, @function
+#endif
+
+__stack_split_initialize:
+
+#ifndef __x86_64__
+
+	leal	-16000(%esp),%eax	# We should have at least 16K.
+	movl	%eax,%gs:0x30
+	pushl	$16000
+	pushl	%esp
+#ifdef __PIC__
+	call	__generic_morestack_set_initial_sp@PLT
+#else
+	call	__generic_morestack_set_initial_sp
+#endif
+	addl	$8,%esp
+	ret
+
+#else /* defined(__x86_64__) */
+
+	leaq	-16000(%rsp),%rax	# We should have at least 16K.
+	X86_64_SAVE_NEW_STACK_BOUNDARY (ax)
+	movq	%rsp,%rdi
+	movq	$16000,%rsi
+#ifdef __PIC__
+	call	__generic_morestack_set_initial_sp@PLT
+#else
+	call	__generic_morestack_set_initial_sp
+#endif
+	ret
+
+#endif /* defined(__x86_64__) */
+
+#ifdef __ELF__
+	.size	__stack_split_initialize, . - __stack_split_initialize
+#endif
+
+# Routines to get and set the guard, for __splitstack_getcontext,
+# __splitstack_setcontext, and __splitstack_makecontext.
+
+# void *__morestack_get_guard (void) returns the current stack guard.
+	.text
+	.global	__morestack_get_guard
+	.hidden	__morestack_get_guard
+
+#ifdef __ELF__
+	.type	__morestack_get_guard,@function
+#endif
+
+__morestack_get_guard:
+
+#ifndef __x86_64__
+	movl	%gs:0x30,%eax
+#else
+#ifdef __LP64__
+	movq	%fs:0x70,%rax
+#else
+	movl	%fs:0x40,%eax
+#endif
+#endif
+	ret
+
+#ifdef __ELF__
+	.size	__morestack_get_guard, . - __morestack_get_guard
+#endif
+
+# void __morestack_set_guard (void *) sets the stack guard.
+	.global	__morestack_set_guard
+	.hidden	__morestack_set_guard
+
+#ifdef __ELF__
+	.type	__morestack_set_guard,@function
+#endif
+
+__morestack_set_guard:
+
+#ifndef __x86_64__
+	movl	4(%esp),%eax
+	movl	%eax,%gs:0x30
+#else
+	X86_64_SAVE_NEW_STACK_BOUNDARY (di)
+#endif
+	ret
+
+#ifdef __ELF__
+	.size	__morestack_set_guard, . - __morestack_set_guard
+#endif
+
+# void *__morestack_make_guard (void *, size_t) returns the stack
+# guard value for a stack.
+	.global	__morestack_make_guard
+	.hidden	__morestack_make_guard
+
+#ifdef __ELF__
+	.type	__morestack_make_guard,@function
+#endif
+
+__morestack_make_guard:
+
+#ifndef __x86_64__
+	movl	4(%esp),%eax
+	subl	8(%esp),%eax
+	addl	$BACKOFF,%eax
+#else
+	subq	%rsi,%rdi
+	addq	$BACKOFF,%rdi
+	movq	%rdi,%rax
+#endif
+	ret
+
+#ifdef __ELF__
+	.size	__morestack_make_guard, . - __morestack_make_guard
+#endif
+
+# Make __stack_split_initialize a high priority constructor.  FIXME:
+# This is ELF specific.
+
+	.section	.ctors.65535,"aw",@progbits
+
+#ifndef __LP64__
+	.align	4
+	.long	__stack_split_initialize
+	.long	__morestack_load_mmap
+#else
+	.align	8
+	.quad	__stack_split_initialize
+	.quad	__morestack_load_mmap
+#endif
+
+#ifdef __ELF__
+	.section	.note.GNU-stack,"",@progbits
+	.section	.note.GNU-split-stack,"",@progbits
+	.section	.note.GNU-no-split-stack,"",@progbits
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/sfp-exceptions.c b/gcc-4.9/libgcc/config/i386/sfp-exceptions.c
new file mode 100644
index 000000000..9364a9700
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/sfp-exceptions.c
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2012-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _SOFT_FLOAT
+#include "sfp-machine.h"
+
+struct fenv
+{
+  unsigned short int __control_word;
+  unsigned short int __unused1;
+  unsigned short int __status_word;
+  unsigned short int __unused2;
+  unsigned short int __tags;
+  unsigned short int __unused3;
+  unsigned int __eip;
+  unsigned short int __cs_selector;
+  unsigned int __opcode:11;
+  unsigned int __unused4:5;
+  unsigned int __data_offset;
+  unsigned short int __data_selector;
+  unsigned short int __unused5;
+};
+
+void
+__sfp_handle_exceptions (int _fex)
+{
+  if (_fex & FP_EX_INVALID)
+    {
+      float f = 0.0f;
+#ifdef __SSE_MATH__
+      volatile float r __attribute__ ((unused));
+      asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));
+      r = f; /* Needed to trigger exception.   */
+#else
+      asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));
+      /* No need for fwait, exception is triggered by emitted fstp.  */
+#endif
+    }
+  if (_fex & FP_EX_DENORM)
+    {
+      struct fenv temp;
+      asm volatile ("fnstenv\t%0" : "=m" (temp));
+      temp.__status_word |= FP_EX_DENORM;
+      asm volatile ("fldenv\t%0" : : "m" (temp));
+      asm volatile ("fwait");
+    }
+  if (_fex & FP_EX_DIVZERO)
+    {
+      float f = 1.0f, g = 0.0f;
+#ifdef __SSE_MATH__
+      volatile float r __attribute__ ((unused));
+      asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
+      r = f; /* Needed to trigger exception.   */
+#else
+      asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));
+      /* No need for fwait, exception is triggered by emitted fstp.  */
+#endif
+    }
+  if (_fex & FP_EX_OVERFLOW)
+    {
+      struct fenv temp;
+      asm volatile ("fnstenv\t%0" : "=m" (temp));
+      temp.__status_word |= FP_EX_OVERFLOW;
+      asm volatile ("fldenv\t%0" : : "m" (temp));
+      asm volatile ("fwait");
+    }
+  if (_fex & FP_EX_UNDERFLOW)
+    {
+      struct fenv temp;
+      asm volatile ("fnstenv\t%0" : "=m" (temp));
+      temp.__status_word |= FP_EX_UNDERFLOW;
+      asm volatile ("fldenv\t%0" : : "m" (temp));
+      asm volatile ("fwait");
+    }
+  if (_fex & FP_EX_INEXACT)
+    {
+      float f = 1.0f, g = 3.0f;
+#ifdef __SSE_MATH__
+      volatile float r __attribute__ ((unused));
+      asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
+      r = f; /* Needed to trigger exception.   */
+#else
+      asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));
+      /* No need for fwait, exception is triggered by emitted fstp.  */
+#endif
+    }
+};
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/sfp-machine.h b/gcc-4.9/libgcc/config/i386/sfp-machine.h
new file mode 100644
index 000000000..148044a69
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/sfp-machine.h
@@ -0,0 +1,85 @@
+#ifdef __MINGW32__
+  /* Make sure we are using gnu-style bitfield handling.  */
+#define _FP_STRUCT_LAYOUT  __attribute__ ((gcc_struct))
+#endif
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#ifdef __x86_64__
+#include "config/i386/64/sfp-machine.h"
+#else
+#include "config/i386/32/sfp-machine.h"
+#endif
+
+#define _FP_KEEPNANFRACP	1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_NANSIGN_S		1
+#define _FP_NANSIGN_D		1
+#define _FP_NANSIGN_E		1
+#define _FP_NANSIGN_Q		1
+
+/* Here is something Intel misdesigned: the specs don't define
+   the case where we have two NaNs with same mantissas, but
+   different sign. Different operations pick up different NaNs.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if (_FP_FRAC_GT_##wc(X, Y)					\
+	|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*')))	\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    else							\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#ifndef _SOFT_FLOAT
+#define FP_EX_INVALID		0x01
+#define FP_EX_DENORM		0x02
+#define FP_EX_DIVZERO		0x04
+#define FP_EX_OVERFLOW		0x08
+#define FP_EX_UNDERFLOW		0x10
+#define FP_EX_INEXACT		0x20
+#define FP_EX_ALL \
+	(FP_EX_INVALID | FP_EX_DENORM | FP_EX_DIVZERO | FP_EX_OVERFLOW \
+	 | FP_EX_UNDERFLOW | FP_EX_INEXACT)
+
+void __sfp_handle_exceptions (int);
+
+#define FP_HANDLE_EXCEPTIONS			\
+  do {						\
+    if (__builtin_expect (_fex, 0))		\
+      __sfp_handle_exceptions (_fex);		\
+  } while (0);
+
+#define FP_TRAPPING_EXCEPTIONS ((_fcw >> FP_EX_SHIFT) & FP_EX_ALL)
+
+#define FP_ROUNDMODE		(_fcw & FP_RND_MASK)
+#endif
+
+#define _FP_TININESS_AFTER_ROUNDING 1
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+#if defined __MACH__
+/* Mach-O doesn't support aliasing.  If these functions ever return
+   anything but CMPtype we need to revisit this... */
+#define strong_alias(name, aliasname) \
+  CMPtype aliasname (TFtype a, TFtype b) { return name(a, b); }
+#else
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/sol2-c1.S b/gcc-4.9/libgcc/config/i386/sol2-c1.S
new file mode 100644
index 000000000..bea5f78d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/sol2-c1.S
@@ -0,0 +1,173 @@
+/* crt1.s for Solaris 2, x86
+
+   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+   Written By Fred Fish, Nov 1992
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file takes control of the process from the kernel, as specified
+   in section 3 of the System V Application Binary Interface, Intel386
+   Processor Supplement.  It has been constructed from information obtained
+   from the ABI, information obtained from single stepping existing
+   Solaris executables through their startup code with gdb, and from
+   information obtained by single stepping executables on other i386 SVR4
+   implementations.  This file is the first thing linked into any
+   executable.  */
+
+#ifndef GCRT1
+	.ident	"GNU C crt1.s"
+#define CLEANUP	_cleanup
+#else
+/* This is a modified crt1.s by J.W.Hawtin <oolon@ankh.org> 15/8/96, 
+   to allow program profiling, by calling monstartup on entry and _mcleanup 
+   on exit.  */
+	.ident	"GNU C gcrt1.s"
+#define CLEANUP _mcleanup
+#endif
+	.weak	_cleanup
+	.weak	_DYNAMIC
+	.text
+
+/* Start creating the initial frame by pushing a NULL value for the return
+   address of the initial frame, and mark the end of the stack frame chain
+   (the innermost stack frame) with a NULL value, per page 3-32 of the ABI.
+   Initialize the first stack frame pointer in %ebp (the contents of which
+   are unspecified at process initialization).  */
+
+	.globl	_start
+_start:
+	pushl	$0x0
+	pushl	$0x0
+	movl	%esp,%ebp
+
+/* As specified per page 3-32 of the ABI, %edx contains a function 
+   pointer that should be registered with atexit(), for proper
+   shared object termination.  Just push it onto the stack for now
+   to preserve it.  We want to register _cleanup() first.  */
+
+	pushl	%edx
+
+/* Check to see if there is an _cleanup() function linked in, and if
+   so, register it with atexit() as the last thing to be run by
+   atexit().  */
+
+	movl	$CLEANUP,%eax
+	testl	%eax,%eax
+	je	.L1
+	pushl	$CLEANUP
+	call	atexit
+	addl	$0x4,%esp
+.L1:
+
+/* Now check to see if we have an _DYNAMIC table, and if so then
+   we need to register the function pointer previously in %edx, but
+   now conveniently saved on the stack as the argument to pass to
+   atexit().  */
+
+	movl	$_DYNAMIC,%eax
+	testl	%eax,%eax
+	je	.L2
+	call	atexit
+.L2:
+
+/* Register _fini() with atexit().  We will take care of calling _init()
+   directly.  */
+
+	pushl	$_fini
+	call	atexit
+
+#ifdef GCRT1
+/* Start profiling.  */
+
+        pushl %ebp
+        movl %esp,%ebp
+        pushl $_etext
+        pushl $_start
+        call monstartup
+        addl $8,%esp
+	popl %ebp
+#endif
+
+/* Compute the address of the environment vector on the stack and load
+   it into the global variable _environ.  Currently argc is at 8 off
+   the frame pointer.  Fetch the argument count into %eax, scale by the
+   size of each arg (4 bytes) and compute the address of the environment
+   vector which is 16 bytes (the two zero words we pushed, plus argc,
+   plus the null word terminating the arg vector) further up the stack,
+   off the frame pointer (whew!).  */
+
+	movl	8(%ebp),%eax
+	leal	16(%ebp,%eax,4),%edx
+	movl	%edx,_environ
+
+/* Push the environment vector pointer, the argument vector pointer,
+   and the argument count on to the stack to set up the arguments
+   for _init(), _fpstart(), and main().  Note that the environment
+   vector pointer and the arg count were previously loaded into
+   %edx and %eax respectively.  The only new value we need to compute
+   is the argument vector pointer, which is at a fixed address off
+   the initial frame pointer.  */
+
+/* Make sure the stack is properly aligned.  */
+	andl $0xfffffff0,%esp
+	subl $4,%esp
+
+	pushl	%edx
+	leal	12(%ebp),%edx
+	pushl	%edx
+	pushl	%eax
+
+/* Call _init(argc, argv, environ), _fpstart(argc, argv, environ), and
+   main(argc, argv, environ).  */
+
+	call	_init
+	call	__fpstart
+	call	main
+
+/* Pop the argc, argv, and environ arguments off the stack, push the
+   value returned from main(), and call exit().  */
+
+	addl	$12,%esp
+	pushl	%eax
+	call	exit
+
+/* An inline equivalent of _exit, as specified in Figure 3-26 of the ABI.  */
+
+	pushl	$0x0
+	movl	$0x1,%eax
+	lcall	$7,$0
+
+/* If all else fails, just try a halt!  */
+
+	hlt
+	.type	_start,@function
+	.size	_start,.-_start
+
+#ifndef GCRT1
+/* A dummy profiling support routine for non-profiling executables,
+   in case we link in some objects that have been compiled for profiling.  */
+
+	.weak	_mcount
+_mcount:
+	ret
+	.type	_mcount,@function
+	.size	_mcount,.-_mcount
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/sol2-unwind.h b/gcc-4.9/libgcc/config/i386/sol2-unwind.h
new file mode 100644
index 000000000..e5de56370
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/sol2-unwind.h
@@ -0,0 +1,262 @@
+/* DWARF2 EH unwinding support for AMD x86-64 and x86.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#include <ucontext.h>
+#include <sys/frame.h>
+
+#ifdef __x86_64__
+
+#define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state
+
+static _Unwind_Reason_Code
+x86_64_fallback_frame_state (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  mcontext_t *mctx;
+  long new_cfa;
+
+  if (/* Solaris 10+
+	------------
+	<__sighndlr+0>:      push   %rbp
+	<__sighndlr+1>:      mov    %rsp,%rbp
+	<__sighndlr+4>:      callq  *%rcx
+	<__sighndlr+6>:      leaveq           <--- PC
+	<__sighndlr+7>:      retq  */
+      *(unsigned long *)(pc - 6) == 0xc3c9d1ffe5894855)
+
+    /* We need to move up three frames:
+
+		<signal handler>	<-- context->cfa
+		__sighndlr
+		call_user_handler
+		sigacthandler
+		<kernel>
+
+       context->cfa points into the frame after the saved frame pointer and
+       saved pc (struct frame).
+
+       The ucontext_t structure is in the kernel frame after the signal
+       number and a siginfo_t *.  Since the frame sizes vary even within
+       Solaris 10 updates, we need to walk the stack to get there.  */
+    {
+      struct frame *fp = (struct frame *) context->cfa - 1;
+      struct handler_args {
+	int signo;
+	siginfo_t *sip;
+	ucontext_t ucontext;
+      } *handler_args;
+      ucontext_t *ucp;
+
+      /* Next frame: __sighndlr frame pointer.  */
+      fp = (struct frame *) fp->fr_savfp;
+      /* call_user_handler frame pointer.  */
+      fp = (struct frame *) fp->fr_savfp;
+      /* sigacthandler frame pointer.  */
+      fp = (struct frame *) fp->fr_savfp;
+
+      /* The argument area precedes the struct frame.  */
+      handler_args = (struct handler_args *) (fp + 1);
+      ucp = &handler_args->ucontext;
+      mctx = &ucp->uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = mctx->gregs[REG_RSP];
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 7;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  /* The SVR4 register numbering macros aren't usable in libgcc.  */
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)&mctx->gregs[REG_RAX] - new_cfa;
+  fs->regs.reg[1].how = REG_SAVED_OFFSET;
+  fs->regs.reg[1].loc.offset = (long)&mctx->gregs[REG_RDX] - new_cfa;
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long)&mctx->gregs[REG_RCX] - new_cfa;
+  fs->regs.reg[3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[3].loc.offset = (long)&mctx->gregs[REG_RBX] - new_cfa;
+  fs->regs.reg[4].how = REG_SAVED_OFFSET;
+  fs->regs.reg[4].loc.offset = (long)&mctx->gregs[REG_RSI] - new_cfa;
+  fs->regs.reg[5].how = REG_SAVED_OFFSET;
+  fs->regs.reg[5].loc.offset = (long)&mctx->gregs[REG_RDI] - new_cfa;
+  fs->regs.reg[6].how = REG_SAVED_OFFSET;
+  fs->regs.reg[6].loc.offset = (long)&mctx->gregs[REG_RBP] - new_cfa;
+  fs->regs.reg[8].how = REG_SAVED_OFFSET;
+  fs->regs.reg[8].loc.offset = (long)&mctx->gregs[REG_R8] - new_cfa;
+  fs->regs.reg[9].how = REG_SAVED_OFFSET;
+  fs->regs.reg[9].loc.offset = (long)&mctx->gregs[REG_R9] - new_cfa;
+  fs->regs.reg[10].how = REG_SAVED_OFFSET;
+  fs->regs.reg[10].loc.offset = (long)&mctx->gregs[REG_R10] - new_cfa;
+  fs->regs.reg[11].how = REG_SAVED_OFFSET;
+  fs->regs.reg[11].loc.offset = (long)&mctx->gregs[REG_R11] - new_cfa;
+  fs->regs.reg[12].how = REG_SAVED_OFFSET;
+  fs->regs.reg[12].loc.offset = (long)&mctx->gregs[REG_R12] - new_cfa;
+  fs->regs.reg[13].how = REG_SAVED_OFFSET;
+  fs->regs.reg[13].loc.offset = (long)&mctx->gregs[REG_R13] - new_cfa;
+  fs->regs.reg[14].how = REG_SAVED_OFFSET;
+  fs->regs.reg[14].loc.offset = (long)&mctx->gregs[REG_R14] - new_cfa;
+  fs->regs.reg[15].how = REG_SAVED_OFFSET;
+  fs->regs.reg[15].loc.offset = (long)&mctx->gregs[REG_R15] - new_cfa;
+  fs->regs.reg[16].how = REG_SAVED_OFFSET;
+  fs->regs.reg[16].loc.offset = (long)&mctx->gregs[REG_RIP] - new_cfa;
+  fs->retaddr_column = 16;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#else
+
+#define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state
+
+static _Unwind_Reason_Code
+x86_fallback_frame_state (struct _Unwind_Context *context,
+			  _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  mcontext_t *mctx;
+  long new_cfa;
+
+  if (/* Solaris 9 - single-threaded
+	----------------------------
+         <sigacthandler+16>:    mov    0x244(%ebx),%ecx
+	 <sigacthandler+22>:    mov    0x8(%ebp),%eax
+	 <sigacthandler+25>:    mov    (%ecx,%eax,4),%ecx
+	 <sigacthandler+28>:    pushl  0x10(%ebp)
+	 <sigacthandler+31>:    pushl  0xc(%ebp)
+	 <sigacthandler+34>:    push   %eax
+	 <sigacthandler+35>:    call   *%ecx
+	 <sigacthandler+37>:    add    $0xc,%esp	<--- PC
+	 <sigacthandler+40>:    pushl  0x10(%ebp) */
+      (*(unsigned long *)(pc - 21) == 0x2448b8b
+       && *(unsigned long *)(pc - 17) == 0x458b0000
+       && *(unsigned long *)(pc - 13) == 0x810c8b08
+       && *(unsigned long *)(pc - 9)  == 0xff1075ff
+       && *(unsigned long *)(pc - 5)  == 0xff500c75
+       && *(unsigned long *)(pc - 1)  == 0xcc483d1)
+
+      || /* Solaris 9 - multi-threaded, Solaris 10
+	   ---------------------------------------
+	   <__sighndlr+0>:      push   %ebp
+	   <__sighndlr+1>:      mov    %esp,%ebp
+	   <__sighndlr+3>:      pushl  0x10(%ebp)
+	   <__sighndlr+6>:      pushl  0xc(%ebp)
+	   <__sighndlr+9>:      pushl  0x8(%ebp)
+	   <__sighndlr+12>:     call   *0x14(%ebp)
+	   <__sighndlr+15>:     add    $0xc,%esp     <--- PC
+	   <__sighndlr+18>:     leave
+	   <__sighndlr+19>:     ret  */
+	 (*(unsigned long *)(pc - 15) == 0xffec8b55
+	  && *(unsigned long *)(pc - 11) == 0x75ff1075
+	  && *(unsigned long *)(pc - 7)  == 0x0875ff0c
+	  && *(unsigned long *)(pc - 3)  == 0x831455ff
+	  && *(unsigned long *)(pc + 1)  == 0xc3c90cc4)
+
+      || /* Solaris 11 before snv_125
+	   --------------------------
+	  <__sighndlr+0>       	push   %ebp
+	  <__sighndlr+1>       	mov    %esp,%ebp
+	  <__sighndlr+4>      	pushl  0x10(%ebp)
+	  <__sighndlr+6>      	pushl  0xc(%ebp)
+	  <__sighndlr+9>      	pushl  0x8(%ebp)
+	  <__sighndlr+12>      	call   *0x14(%ebp)
+	  <__sighndlr+15>	add    $0xc,%esp
+	  <__sighndlr+18>      	leave                <--- PC
+	  <__sighndlr+19>      	ret  */
+	 (*(unsigned long *)(pc - 18) == 0xffec8b55
+	  && *(unsigned long *)(pc - 14) == 0x7fff107f
+	  && *(unsigned long *)(pc - 10)  == 0x0875ff0c
+	  && *(unsigned long *)(pc - 6)  == 0x83145fff
+	  && *(unsigned long *)(pc - 1)  == 0xc3c90cc4)
+
+      || /* Solaris 11 since snv_125
+	   -------------------------
+	  <__sighndlr+0>       	push   %ebp
+	  <__sighndlr+1>       	mov    %esp,%ebp
+	  <__sighndlr+3>       	and    $0xfffffff0,%esp
+	  <__sighndlr+6>       	sub    $0x4,%esp
+	  <__sighndlr+9>      	pushl  0x10(%ebp)
+	  <__sighndlr+12>      	pushl  0xc(%ebp)
+	  <__sighndlr+15>      	pushl  0x8(%ebp)
+	  <__sighndlr+18>      	call   *0x14(%ebp)
+	  <__sighndlr+21>      	leave                <--- PC
+	  <__sighndlr+22>      	ret  */
+	 (*(unsigned long *)(pc - 21) == 0x83ec8b55
+	  && *(unsigned long *)(pc - 17) == 0xec83f0e4
+	  && *(unsigned long *)(pc - 13)  == 0x1075ff04
+	  && *(unsigned long *)(pc - 9)  == 0xff0c75ff
+	  && *(unsigned long *)(pc - 5)  == 0x55ff0875
+	  && (*(unsigned long *)(pc - 1) & 0x00ffffff) == 0x00c3c914))
+    {
+      struct handler_args {
+	int signo;
+	siginfo_t *sip;
+	ucontext_t *ucontext;
+      } *handler_args = context->cfa;
+      mctx = &handler_args->ucontext->uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = mctx->gregs[UESP];
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 4;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  /* The SVR4 register numbering macros aren't usable in libgcc.  */
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)&mctx->gregs[EAX] - new_cfa;
+  fs->regs.reg[3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[3].loc.offset = (long)&mctx->gregs[EBX] - new_cfa;
+  fs->regs.reg[1].how = REG_SAVED_OFFSET;
+  fs->regs.reg[1].loc.offset = (long)&mctx->gregs[ECX] - new_cfa;
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long)&mctx->gregs[EDX] - new_cfa;
+  fs->regs.reg[6].how = REG_SAVED_OFFSET;
+  fs->regs.reg[6].loc.offset = (long)&mctx->gregs[ESI] - new_cfa;
+  fs->regs.reg[7].how = REG_SAVED_OFFSET;
+  fs->regs.reg[7].loc.offset = (long)&mctx->gregs[EDI] - new_cfa;
+  fs->regs.reg[5].how = REG_SAVED_OFFSET;
+  fs->regs.reg[5].loc.offset = (long)&mctx->gregs[EBP] - new_cfa;
+  fs->regs.reg[8].how = REG_SAVED_OFFSET;
+  fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa;
+  fs->retaddr_column = 8;
+
+  /* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn
+     rather than before it, so don't set fs->signal_frame in that case.
+     We test whether the ES field of the Status Register is zero.  */
+  if ((mctx->fpregs.fp_reg_set.fpchip_state.status & 0x80) == 0)
+    fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/t-chkstk b/gcc-4.9/libgcc/config/i386/t-chkstk
new file mode 100644
index 000000000..822981faa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-chkstk
@@ -0,0 +1,2 @@
+LIB1ASMSRC = i386/cygwin.S
+LIB1ASMFUNCS = _chkstk _chkstk_ms
diff --git a/gcc-4.9/libgcc/config/i386/t-cpuinfo b/gcc-4.9/libgcc/config/i386/t-cpuinfo
new file mode 100644
index 000000000..31c8db991
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-cpuinfo
@@ -0,0 +1 @@
+LIB2ADD += $(srcdir)/config/i386/cpuinfo.c
diff --git a/gcc-4.9/libgcc/config/i386/t-crtfm b/gcc-4.9/libgcc/config/i386/t-crtfm
new file mode 100644
index 000000000..b9da06bfd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-crtfm
@@ -0,0 +1,4 @@
+# This is an endfile, Use -minline-all-stringops to ensure
+# that __builtin_memset doesn't refer to the lib function memset().
+crtfastmath.o: $(srcdir)/config/i386/crtfastmath.c
+	$(gcc_compile) -mfxsr -msse -c $<
diff --git a/gcc-4.9/libgcc/config/i386/t-crtpc b/gcc-4.9/libgcc/config/i386/t-crtpc
new file mode 100644
index 000000000..b605f6f79
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-crtpc
@@ -0,0 +1,8 @@
+crtprec32.o: $(srcdir)/config/i386/crtprec.c
+	$(gcc_compile) -D__PREC=32 -c $<
+
+crtprec64.o: $(srcdir)/config/i386/crtprec.c
+	$(gcc_compile) -D__PREC=64 -c $<
+
+crtprec80.o: $(srcdir)/config/i386/crtprec.c
+	$(gcc_compile) -D__PREC=80 -c $<
diff --git a/gcc-4.9/libgcc/config/i386/t-crtstuff b/gcc-4.9/libgcc/config/i386/t-crtstuff
new file mode 100644
index 000000000..c14dd9411
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-crtstuff
@@ -0,0 +1,7 @@
+# The pushl in CTOR initialization interferes with frame pointer elimination.
+# crtend*.o cannot be compiled without -fno-asynchronous-unwind-tables,
+# because then __FRAME_END__ might not be the last thing in .eh_frame
+# section.  -fno-asynchronous-unwind-tables is off by default for i386
+# and is on by default for x86-64.  We turn it off for both i386 and
+# x86-64.
+CRTSTUFF_T_CFLAGS += -fno-omit-frame-pointer -fno-asynchronous-unwind-tables
diff --git a/gcc-4.9/libgcc/config/i386/t-cygming b/gcc-4.9/libgcc/config/i386/t-cygming
new file mode 100644
index 000000000..d76004c48
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-cygming
@@ -0,0 +1,14 @@
+# If we are building next to winsup, this will let us find the real
+# limits.h when building libgcc2.  Otherwise, winsup must be installed
+# first.
+LIBGCC2_INCLUDES = -I$(srcdir)/../winsup/w32api/include
+
+CUSTOM_CRTSTUFF = yes
+
+crtbegin.o: $(srcdir)/config/i386/cygming-crtbegin.c
+	$(crt_compile) -fno-omit-frame-pointer  -c $<
+
+# We intentionally use a implementation-reserved init priority of 0,
+# so allow the warning.
+crtend.o: $(srcdir)/config/i386/cygming-crtend.c
+	$(crt_compile) -fno-omit-frame-pointer -Wno-error -c $<
diff --git a/gcc-4.9/libgcc/config/i386/t-cygwin b/gcc-4.9/libgcc/config/i386/t-cygwin
new file mode 100644
index 000000000..f85ec2422
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-cygwin
@@ -0,0 +1,19 @@
+# If we are building next to winsup, this will let us find the real
+# limits.h when building libgcc2.  Otherwise, winsup must be installed
+# first.
+LIBGCC2_INCLUDES += -I$(srcdir)/../winsup/include \
+	-I$(srcdir)/../winsup/cygwin/include
+
+# Cygwin-specific parts of LIB_SPEC
+SHLIB_LC = -lcygwin -ladvapi32 -lshell32 -luser32 -lkernel32
+
+# We have already included one of the t-{dw2,sjlj}-eh fragments for EH_MODEL
+SHLIB_EH_EXTENSION = $(subst -dw2,,-$(EH_MODEL))
+
+# Cygwin uses different conventions than MinGW; override generic SHLIB_ def'ns here.
+SHLIB_IMPLIB = @shlib_base_name@$(SHLIB_EXT).a
+SHLIB_SONAME = cyggcc_s$(SHLIB_EH_EXTENSION)-$(SHLIB_SOVERSION)$(SHLIB_EXT)
+# This must match the definitions of SHLIB_SONAME/SHLIB_SOVERSION and LIBGCC_SONAME.
+# We'd like to use SHLIB_SONAME here too, and we can, since
+# we don't rely on shlib_base_name substitution for it.
+SHLIB_MKMAP_OPTS = -v pe_dll=$(SHLIB_SONAME)
diff --git a/gcc-4.9/libgcc/config/i386/t-darwin b/gcc-4.9/libgcc/config/i386/t-darwin
new file mode 100644
index 000000000..5f2c69725
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-darwin
@@ -0,0 +1,3 @@
+LIB2_SIDITI_CONV_FUNCS = yes
+LIB2ADD = $(srcdir)/config/darwin-64.c
+LIB2FUNCS_EXCLUDE = _fixtfdi _fixunstfdi _floatditf _floatunditf
diff --git a/gcc-4.9/libgcc/config/i386/t-dlldir b/gcc-4.9/libgcc/config/i386/t-dlldir
new file mode 100644
index 000000000..d2cf39bdd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-dlldir
@@ -0,0 +1,2 @@
+# In a native build, target DLLs go in bindir, where they can be executed.
+SHLIB_DLLDIR = $(bindir)
diff --git a/gcc-4.9/libgcc/config/i386/t-dlldir-x b/gcc-4.9/libgcc/config/i386/t-dlldir-x
new file mode 100644
index 000000000..0f8c29b4e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-dlldir-x
@@ -0,0 +1,3 @@
+# In a cross build, bindir contains host not target binaries, so target DLLs
+# instead go in toolexeclibdir, alongside other target binaries and static libs.
+SHLIB_DLLDIR = $(toolexeclibdir)
diff --git a/gcc-4.9/libgcc/config/i386/t-dw2-eh b/gcc-4.9/libgcc/config/i386/t-dw2-eh
new file mode 100644
index 000000000..ffcc39aea
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-dw2-eh
@@ -0,0 +1,3 @@
+
+# We are using Dwarf-2 EH.
+EH_MODEL = dw2
diff --git a/gcc-4.9/libgcc/config/i386/t-freebsd b/gcc-4.9/libgcc/config/i386/t-freebsd
new file mode 100644
index 000000000..4f2bd204a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-freebsd
@@ -0,0 +1,2 @@
+# Add support for the introduction of 128-bit long double.
+SHLIB_MAPFILES += $(srcdir)/config/i386/libgcc-bsd.ver
diff --git a/gcc-4.9/libgcc/config/i386/t-gthr-win32 b/gcc-4.9/libgcc/config/i386/t-gthr-win32
new file mode 100644
index 000000000..e7380d6f6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-gthr-win32
@@ -0,0 +1,2 @@
+# We hide calls to w32api needed for w32 thread support here:
+LIB2ADD = $(srcdir)/config/i386/gthr-win32.c
diff --git a/gcc-4.9/libgcc/config/i386/t-interix b/gcc-4.9/libgcc/config/i386/t-interix
new file mode 100644
index 000000000..8889e7c6c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-interix
@@ -0,0 +1,3 @@
+# We need to override LIBGCC2_DEBUG_CFLAGS so libgcc2 will be
+# built without debugging information
+LIBGCC2_DEBUG_CFLAGS =
diff --git a/gcc-4.9/libgcc/config/i386/t-linux b/gcc-4.9/libgcc/config/i386/t-linux
new file mode 100644
index 000000000..4f47f7bfa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-linux
@@ -0,0 +1,6 @@
+# On 64bit we do not need any exports for glibc for 64-bit libgcc_s.
+# Need to support TImode for x86.  Override the settings from
+# t-slibgcc-elf-ver and t-linux
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/i386/libgcc-glibc.ver
+
+HOST_LIBGCC2_CFLAGS += -mlong-double-80
diff --git a/gcc-4.9/libgcc/config/i386/t-mingw-pthread b/gcc-4.9/libgcc/config/i386/t-mingw-pthread
new file mode 100644
index 000000000..622ef82be
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-mingw-pthread
@@ -0,0 +1,2 @@
+SHLIB_PTHREAD_CFLAG = -pthread
+SHLIB_PTHREAD_LDFLAG = -Wl,-lpthread
diff --git a/gcc-4.9/libgcc/config/i386/t-mingw32 b/gcc-4.9/libgcc/config/i386/t-mingw32
new file mode 100644
index 000000000..bfdef6723
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-mingw32
@@ -0,0 +1,2 @@
+# MinGW-specific parts of LIB_SPEC
+SHLIB_LC = -lmingwthrd -lmingw32 -lmingwex -lmoldname -lmsvcrt -ladvapi32 -lshell32 -luser32 -lkernel32
diff --git a/gcc-4.9/libgcc/config/i386/t-nto b/gcc-4.9/libgcc/config/i386/t-nto
new file mode 100644
index 000000000..44c906618
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-nto
@@ -0,0 +1,3 @@
+HOST_LIBGCC2_CFLAGS += -fexceptions
+
+CRTSTUFF_T_CFLAGS = -fno-omit-frame-pointer $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/i386/t-seh-eh b/gcc-4.9/libgcc/config/i386/t-seh-eh
new file mode 100644
index 000000000..066ca54b0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-seh-eh
@@ -0,0 +1,6 @@
+
+# We are using SEH EH.
+EH_MODEL = seh
+
+# Use SEH exception handling.
+LIB2ADDEH = $(srcdir)/unwind-seh.c $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/i386/t-sjlj-eh b/gcc-4.9/libgcc/config/i386/t-sjlj-eh
new file mode 100644
index 000000000..c9085f432
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-sjlj-eh
@@ -0,0 +1,3 @@
+
+# We are using SjLj EH.
+EH_MODEL = sjlj
diff --git a/gcc-4.9/libgcc/config/i386/t-slibgcc-cygming b/gcc-4.9/libgcc/config/i386/t-slibgcc-cygming
new file mode 100644
index 000000000..6236c78e4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-slibgcc-cygming
@@ -0,0 +1,58 @@
+# Build a shared libgcc library for PECOFF with a DEF file
+# with the GNU linker.
+#
+# mkmap-flat.awk is used with the pe_dll option to produce a DEF instead
+# of an ELF map file.
+#
+# Warning: If SHLIB_SOVERSION or SHLIB_SONAME are updated, LIBGCC_SONAME
+# in mingw32.h and SHLIB_MKMAP_OPTS below must be updated also.
+
+SHLIB_EXT = .dll
+SHLIB_IMPLIB = @shlib_base_name@.a
+SHLIB_SOVERSION = 1
+SHLIB_SONAME = @shlib_base_name@_$(EH_MODEL)-$(SHLIB_SOVERSION)$(SHLIB_EXT)
+SHLIB_MAP = @shlib_map_file@
+SHLIB_OBJS = @shlib_objs@
+SHLIB_DIR = @multilib_dir@/shlib
+SHLIB_SLIBDIR_QUAL = @shlib_slibdir_qual@
+# SHLIB_DLLDIR is defined by including one of either t-dlldir or t-dlldir-x
+# (native/cross build respectively) in the tmake_file list in
+# libgcc/config.host.
+ifndef SHLIB_DLLDIR
+$(error SHLIB_DLLDIR must be defined)
+endif
+ifndef SHLIB_PTHREAD_CFLAG
+SHLIB_PTHREAD_CFLAG =
+endif
+ifndef SHLIB_PTHREAD_LDFLAG
+SHLIB_PTHREAD_LDFLAG =
+endif
+
+SHLIB_LINK = $(LN_S) -f $(SHLIB_MAP) $(SHLIB_MAP).def && \
+	if [ ! -d $(SHLIB_DIR) ]; then \
+		mkdir $(SHLIB_DIR); \
+	else true; fi && \
+	$(CC) $(LIBGCC2_CFLAGS) $(SHLIB_PTHREAD_CFLAG) \
+	-shared -nodefaultlibs \
+	$(SHLIB_MAP).def \
+	-Wl,--out-implib,$(SHLIB_DIR)/$(SHLIB_IMPLIB).tmp \
+	-o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ \
+	$(SHLIB_OBJS) ${SHLIB_PTHREAD_LDFLAG} $(SHLIB_LC) && \
+	if [ -f $(SHLIB_DIR)/$(SHLIB_SONAME) ]; then \
+	  mv -f $(SHLIB_DIR)/$(SHLIB_SONAME) \
+		$(SHLIB_DIR)/$(SHLIB_SONAME).backup; \
+	else true; fi && \
+	mv $(SHLIB_DIR)/$(SHLIB_SONAME).tmp $(SHLIB_DIR)/$(SHLIB_SONAME) && \
+	mv $(SHLIB_DIR)/$(SHLIB_IMPLIB).tmp $(SHLIB_DIR)/$(SHLIB_IMPLIB)
+SHLIB_INSTALL = \
+	$(mkinstalldirs) $(DESTDIR)$(SHLIB_DLLDIR) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL); \
+	$(INSTALL) $(SHLIB_DIR)/$(SHLIB_SONAME) \
+	  $(DESTDIR)$(SHLIB_DLLDIR)/$(SHLIB_SONAME); \
+	$(INSTALL_DATA) $(SHLIB_DIR)/$(SHLIB_IMPLIB) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_IMPLIB)
+SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk
+# We'd like to use SHLIB_SONAME here too, but shlib_base_name
+# does not get substituted before mkmap-flat.awk is run.
+SHLIB_MKMAP_OPTS = -v pe_dll=libgcc_s_$(EH_MODEL)-$(SHLIB_SOVERSION)$(SHLIB_EXT)
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/i386/libgcc-cygming.ver
diff --git a/gcc-4.9/libgcc/config/i386/t-softfp b/gcc-4.9/libgcc/config/i386/t-softfp
new file mode 100644
index 000000000..685d9cf85
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-softfp
@@ -0,0 +1 @@
+LIB2ADD += $(srcdir)/config/i386/sfp-exceptions.c
diff --git a/gcc-4.9/libgcc/config/i386/t-sol2 b/gcc-4.9/libgcc/config/i386/t-sol2
new file mode 100644
index 000000000..b9cfb00ef
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-sol2
@@ -0,0 +1,13 @@
+# We need to use -fPIC when we are using gcc to compile the routines in
+# crtstuff.c.  This is only really needed when we are going to use gcc/g++
+# to produce a shared library, but since we don't know ahead of time when
+# we will be doing that, we just always use -fPIC when compiling the
+# routines in crtstuff.c.
+#
+# We must also enable optimization to avoid having any code appear after
+# the call & alignment statement, but before we switch back to the
+# .text section.
+CRTSTUFF_T_CFLAGS = $(PICFLAG) -O2
+
+# Add support for the introduction of 128-bit long double.
+SHLIB_MAPFILES += $(srcdir)/config/i386/libgcc-sol2.ver
diff --git a/gcc-4.9/libgcc/config/i386/t-stack-i386 b/gcc-4.9/libgcc/config/i386/t-stack-i386
new file mode 100644
index 000000000..9965f9402
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/t-stack-i386
@@ -0,0 +1,2 @@
+# Makefile fragment to support -fsplit-stack for x86.
+LIB2ADD_ST += $(srcdir)/config/i386/morestack.S
diff --git a/gcc-4.9/libgcc/config/i386/value-unwind.h b/gcc-4.9/libgcc/config/i386/value-unwind.h
new file mode 100644
index 000000000..a7fb04bab
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/value-unwind.h
@@ -0,0 +1,25 @@
+/* Store register values as _Unwind_Word type in DWARF2 EH unwind context.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Define this macro if the target stores register values as _Unwind_Word
+   type in unwind context.  Only enable it for x32.  */
+#if defined __x86_64 && !defined __LP64__
+# define REG_VALUE_IN_UNWIND_CONTEXT
+#endif
diff --git a/gcc-4.9/libgcc/config/i386/w32-unwind.h b/gcc-4.9/libgcc/config/i386/w32-unwind.h
new file mode 100644
index 000000000..17ad2379b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/i386/w32-unwind.h
@@ -0,0 +1,207 @@
+/* Definitions for Dwarf2 EH unwind support for Windows32 targets
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
+   Contributed by Pascal Obry  <obry@adacore.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file implements the md_fallback_frame_state_for routine for
+   Windows, triggered when the GCC table based unwinding process hits a
+   frame for which no unwind info has been registered. This typically
+   occurs when raising an exception from a signal handler, because the
+   handler is actually called from the OS kernel.
+
+   The basic idea is to detect that we are indeed trying to unwind past a
+   signal handler and to fill out the GCC internal unwinding structures for
+   the OS kernel frame as if it had been directly called from the
+   interrupted context.
+
+   This is all assuming that the code to set the handler asked the kernel
+   to pass a pointer to such context information.
+
+   There is three main parts.
+
+   1) The first thing to do is to check if we are in a signal context. If
+      not we can just return as there is nothing to do. We are probably on
+      some foreign code for which no unwind frame can be found. If this is
+      a call from the Windows signal handler, then:
+
+   2) We must get the signal context information. 
+
+      * With the standard exception filter:
+
+      This is on Windows pointed to by an EXCEPTION_POINTERS. We know that
+      the signal handle will call an UnhandledExceptionFilter with this
+      parameter. The spec for this routine is:
+
+         LONG WINAPI UnhandledExceptionFilter(struct _EXCEPTION_POINTERS*);
+
+      So the pointer to struct _EXCEPTION_POINTERS must be somewhere on the
+      stack.
+
+      This was found experimentally to always be at offset 0 of the context
+      frame in all cases handled by this implementation.
+
+      * With the SEH exception handler:
+
+      In this case the signal context is directly on the stack as the SEH
+      exception handler has the following prototype:
+
+         DWORD
+         SEH_error_handler (PEXCEPTION_RECORD ExceptionRecord,
+                            PVOID EstablisherFrame,
+                            PCONTEXT ContextRecord,
+                            PVOID DispatcherContext)
+
+      This was found experimentally to always be at offset 56 of the
+      context frame in all cases handled by this implementation.
+
+   3) When we have the signal context we just have to save some registers
+      and set the return address based on the program counter (Eip).
+
+   Note that this implementation follows closely the same principles as the
+   GNU/Linux and OSF ones.  */
+
+#ifndef __MINGW64__
+
+#define WIN32_MEAN_AND_LEAN
+#include <windows.h>
+/* Patterns found experimentally to be on a Windows signal handler  */
+
+/* In a standard exception filter  */
+
+#define SIG_PAT1 \
+      (pc_[-2] == 0xff && pc_[-1] == 0xd0     /* call %eax           */ \
+      && pc_[0] == 0x83 && pc_[1] == 0xf8)    /* cmp 0xdepl,%eax     */
+
+#define SIG_PAT2 \
+        (pc_[-5] == 0xe8 && pc_[-4] == 0x68   /* call (depl16)       */ \
+         && pc_[0] == 0xc3)                   /* ret                 */
+
+/* In a Win32 SEH handler  */
+
+#define SIG_SEH1 \
+        (pc_[-5] == 0xe8                      /* call addr           */ \
+         && pc_[0] == 0x83 && pc_[1] == 0xc4  /* add 0xval,%esp      */ \
+         && pc_[3] == 0xb8)                   /* mov 0xval,%eax      */
+
+#define SIG_SEH2 \
+        (pc_[-5] == 0x8b && pc_[-4] == 0x4d   /* mov depl(%ebp),%ecx */ \
+         && pc_[0] == 0x64 && pc_[1] == 0x8b) /* mov %fs:(0),<reg>   */ \
+
+/* In the GCC alloca (stack probing)  */
+
+#define SIG_ALLOCA \
+          (pc_[-1] == 0x83                    /* orl $0x0,(%ecx)     */ \
+	   && pc_[0] == 0x9 && pc_[1] == 0                              \
+	   && pc_[2] == 0x2d && pc_[3] == 0   /* subl $0x1000,%eax   */ \
+	   && pc_[4] == 0x10 && pc_[5] == 0)
+
+
+#define MD_FALLBACK_FRAME_STATE_FOR i386_w32_fallback_frame_state
+
+static _Unwind_Reason_Code
+i386_w32_fallback_frame_state (struct _Unwind_Context *context, 
+			       _Unwind_FrameState *fs)
+
+{
+  void * ctx_ra_  = (void *)(context->ra);  /* return address */
+  void * ctx_cfa_ = (void *)(context->cfa); /* context frame address */
+  unsigned char * pc_ = (unsigned char *) ctx_ra_;
+
+  /* In the test below we look for two specific patterns found
+     experimentally to be in the Windows signal handler.  */
+  if (SIG_PAT1 || SIG_PAT2 || SIG_SEH1 || SIG_SEH2)
+    {
+      PEXCEPTION_POINTERS weinfo_;
+      PCONTEXT proc_ctx_;
+      long new_cfa_;
+
+      if (SIG_SEH1) 
+	proc_ctx_ = (PCONTEXT) (*(int*)(ctx_cfa_ + 56));
+      else if (SIG_SEH2)
+	proc_ctx_ = (PCONTEXT) (*(int*)(ctx_cfa_ + 8));
+      else
+	{
+	  weinfo_ = (PEXCEPTION_POINTERS) (*(int*)ctx_cfa_);
+	  proc_ctx_ = weinfo_->ContextRecord;
+	}
+
+      /* The new context frame address is the stack pointer.  */
+      new_cfa_ = proc_ctx_->Esp;
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = __builtin_dwarf_sp_column();
+      fs->regs.cfa_offset = new_cfa_ - (long) ctx_cfa_;
+
+      /* Restore registers.  */
+      fs->regs.reg[0].how = REG_SAVED_OFFSET;
+      fs->regs.reg[0].loc.offset = (long)&proc_ctx_->Eax - new_cfa_;
+      fs->regs.reg[3].how = REG_SAVED_OFFSET;
+      fs->regs.reg[3].loc.offset = (long)&proc_ctx_->Ebx - new_cfa_;
+      fs->regs.reg[1].how = REG_SAVED_OFFSET;
+      fs->regs.reg[1].loc.offset = (long)&proc_ctx_->Ecx - new_cfa_;
+      fs->regs.reg[2].how = REG_SAVED_OFFSET;
+      fs->regs.reg[2].loc.offset = (long)&proc_ctx_->Edx - new_cfa_;
+      fs->regs.reg[6].how = REG_SAVED_OFFSET;
+      fs->regs.reg[6].loc.offset = (long)&proc_ctx_->Esi - new_cfa_;
+      fs->regs.reg[7].how = REG_SAVED_OFFSET;
+      fs->regs.reg[7].loc.offset = (long)&proc_ctx_->Edi - new_cfa_;
+      fs->regs.reg[5].how = REG_SAVED_OFFSET;
+      fs->regs.reg[5].loc.offset = (long)&proc_ctx_->Ebp - new_cfa_;
+      fs->regs.reg[8].how = REG_SAVED_OFFSET;
+      fs->regs.reg[8].loc.offset = (long)&proc_ctx_->Eip - new_cfa_;
+      fs->retaddr_column = 8;
+      fs->signal_frame = 1;
+
+      return _URC_NO_REASON;
+    }
+
+  /* Unwinding through _alloca, propagating from a trap triggered by
+     one of it's probes prior to the real SP adjustment. The only
+     operations of interest performed is "pushl %ecx", followed by
+     ecx clobbering.  */
+  else if (SIG_ALLOCA) 
+    {
+      /* Only one push between entry in _alloca and the probe trap.  */ 
+      long new_cfa_ = (long) ctx_cfa_ + 4;
+
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = __builtin_dwarf_sp_column();
+      fs->regs.cfa_offset = new_cfa_ - (long) ctx_cfa_;
+
+      /* The saved value of %ecx is at CFA - 4 */
+      fs->regs.reg[1].how = REG_SAVED_OFFSET;
+      fs->regs.reg[1].loc.offset = -4;
+
+      /* and what is stored at the CFA is the return address.  */
+      fs->retaddr_column = 8;
+      fs->regs.reg[8].how = REG_SAVED_OFFSET;
+      fs->regs.reg[8].loc.offset = 0;
+      fs->signal_frame = 1;
+
+      return _URC_NO_REASON;
+    }
+  else
+    return _URC_END_OF_STACK;
+}
+
+#endif /* !__MINGW64__ */
diff --git a/gcc-4.9/libgcc/config/ia64/__divxf3.S b/gcc-4.9/libgcc/config/ia64/__divxf3.S
new file mode 100644
index 000000000..9cba8f594
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/__divxf3.S
@@ -0,0 +1,11 @@
+#ifdef SHARED
+#define __divtf3 __divtf3_compat
+#endif
+
+#define L__divxf3
+#include "config/ia64/lib1funcs.S"
+
+#ifdef SHARED
+#undef __divtf3
+.symver __divtf3_compat, __divtf3@GCC_3.0
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/_fixtfdi.S b/gcc-4.9/libgcc/config/ia64/_fixtfdi.S
new file mode 100644
index 000000000..863b70f7e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/_fixtfdi.S
@@ -0,0 +1,11 @@
+#ifdef SHARED
+#define __fixtfti __fixtfti_compat
+#endif
+
+#define L_fixtfdi
+#include "config/ia64/lib1funcs.S"
+
+#ifdef SHARED
+#undef __fixtfti
+.symver __fixtfti_compat, __fixtfti@GCC_3.0
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/_fixunstfdi.S b/gcc-4.9/libgcc/config/ia64/_fixunstfdi.S
new file mode 100644
index 000000000..aac6a284e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/_fixunstfdi.S
@@ -0,0 +1,11 @@
+#ifdef SHARED
+#define __fixunstfti __fixunstfti_compat
+#endif
+
+#define L_fixunstfdi
+#include "config/ia64/lib1funcs.S"
+
+#ifdef SHARED
+#undef __fixunstfti
+.symver __fixunstfti_compat, __fixunstfti@GCC_3.0
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/_floatditf.S b/gcc-4.9/libgcc/config/ia64/_floatditf.S
new file mode 100644
index 000000000..e37404d26
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/_floatditf.S
@@ -0,0 +1,11 @@
+#ifdef SHARED
+#define __floattitf __floattitf_compat
+#endif
+
+#define L_floatditf
+#include "config/ia64/lib1funcs.S"
+
+#ifdef SHARED
+#undef __floattitf
+.symver __floattitf_compat, __floattitf@GCC_3.0
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/crtbegin.S b/gcc-4.9/libgcc/config/ia64/crtbegin.S
new file mode 100644
index 000000000..001b69bb4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/crtbegin.S
@@ -0,0 +1,254 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Jes Sorensen, <Jes.Sorensen@cern.ch>
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "auto-host.h"
+
+.section .ctors,"aw","progbits"
+	.align	8
+__CTOR_LIST__:
+	data8	-1
+
+.section .dtors,"aw","progbits"
+	.align	8
+__DTOR_LIST__:
+	data8	-1
+
+.section .jcr,"aw","progbits"
+	.align	8
+__JCR_LIST__:
+
+.section .sdata
+	.type dtor_ptr,@object
+	.size dtor_ptr,8
+dtor_ptr:
+	data8	@gprel(__DTOR_LIST__ + 8)
+
+	/* A handle for __cxa_finalize to manage c++ local destructors.  */
+	.global __dso_handle
+	.type __dso_handle,@object
+	.size __dso_handle,8
+#ifdef SHARED
+	.section .data
+__dso_handle:
+	data8	__dso_handle
+#else
+	.section .bss
+	.align 8
+__dso_handle:
+	.skip	8
+#endif
+	.hidden __dso_handle
+
+
+#ifdef HAVE_INITFINI_ARRAY_SUPPORT
+
+.section .fini_array, "a"
+	data8 @fptr(__do_global_dtors_aux)
+
+.section .init_array, "a"
+	data8 @fptr(__do_jv_register_classes)
+	data8 @fptr(__do_global_ctors_aux)
+
+#else /* !HAVE_INITFINI_ARRAY_SUPPORT */
+/*
+ * Fragment of the ELF _fini routine that invokes our dtor cleanup.
+ *
+ * We make the call by indirection, because in large programs the 
+ * .fini and .init sections are not in range of the destination, and
+ * we cannot allow the linker to insert a stub at the end of this
+ * fragment of the _fini function.  Further, Itanium does not implement
+ * the long branch instructions, and we do not wish every program to
+ * trap to the kernel for emulation.
+ *
+ * Note that we require __do_global_dtors_aux to preserve the GP,
+ * so that the next fragment in .fini gets the right value.
+ */
+.section .fini,"ax","progbits"
+	{ .mlx
+	  movl r2 = @pcrel(__do_global_dtors_aux - 16)
+	}
+	{ .mii
+	  mov r3 = ip
+	  ;;
+	  add r2 = r2, r3
+	  ;;
+	}
+	{ .mib
+	  nop 0
+	  mov b6 = r2
+	  br.call.sptk.many b0 = b6
+	}
+
+/* Likewise for _init.  */
+
+.section .init,"ax","progbits"
+	{ .mlx
+	  movl r2 = @pcrel(__do_jv_register_classes - 16)
+	}
+	{ .mii
+	  mov r3 = ip
+	  ;;
+	  add r2 = r2, r3
+	  ;;
+	}
+	{ .mib
+	  nop 0
+	  mov b6 = r2
+	  br.call.sptk.many b0 = b6
+	}
+#endif /* !HAVE_INITFINI_ARRAY_SUPPORT */
+
+.section .text
+	.align	32
+	.proc	__do_global_dtors_aux
+__do_global_dtors_aux:
+	.prologue
+#ifndef SHARED
+	.save ar.pfs, r35
+	alloc loc3 = ar.pfs, 0, 4, 1, 0
+	addl loc0 = @gprel(dtor_ptr), gp
+	.save rp, loc1
+	mov loc1 = rp
+	.body
+
+	mov loc2 = gp
+	nop 0
+	br.sptk.many .entry
+#else
+	/*
+		if (__cxa_finalize)
+		  __cxa_finalize(__dso_handle)
+	*/
+	.save ar.pfs, r35
+	alloc loc3 = ar.pfs, 0, 4, 1, 0
+	addl loc0 = @gprel(dtor_ptr), gp
+	addl r16 = @ltoff(@fptr(__cxa_finalize)), gp
+	;;
+
+	ld8 r16 = [r16]
+	;;
+	addl out0 = @ltoff(__dso_handle), gp
+	cmp.ne p7, p0 = r0, r16
+	;;
+
+	ld8 out0 = [out0]
+(p7)	ld8 r18 = [r16], 8
+	.save rp, loc1
+	mov loc1 = rp
+	.body
+	;;
+
+	mov loc2 = gp
+(p7)	ld8 gp = [r16]
+(p7)	mov b6 = r18
+
+	nop 0
+	nop 0
+(p7)	br.call.sptk.many rp = b6
+	;;
+
+	nop 0
+	nop 0
+	br.sptk.many .entry
+#endif
+	/*
+		do {
+		  dtor_ptr++;
+		  (*(dtor_ptr-1)) ();
+		} while (dtor_ptr);
+	*/
+.loop:
+	st8 [loc0] = r15		// update dtor_ptr (in memory)
+	ld8 r17 = [r16], 8		// r17 <- dtor's entry-point
+	nop 0
+	;;
+
+	ld8 gp = [r16]			// gp <- dtor's gp
+	mov b6 = r17
+	br.call.sptk.many rp = b6
+
+.entry:	ld8 r15 = [loc0]		// r15 <- dtor_ptr (gp-relative)
+	;;
+	add r16 = r15, loc2		// r16 <- dtor_ptr (absolute)
+	adds r15 = 8, r15
+	;;
+
+	ld8 r16 = [r16]			// r16 <- pointer to dtor's fdesc
+	mov rp = loc1
+	mov ar.pfs = loc3
+	;;
+
+	cmp.ne p6, p0 = r0, r16
+(p6)	br.cond.sptk.few .loop
+	br.ret.sptk.many rp
+	.endp __do_global_dtors_aux
+
+	.align	32
+	.proc	__do_jv_register_classes
+__do_jv_register_classes:
+	.prologue
+	.save ar.pfs, r33
+	alloc loc1 = ar.pfs, 0, 3, 1, 0
+	movl out0 = @gprel(__JCR_LIST__)
+	;;
+
+	addl r14 = @ltoff(@fptr(_Jv_RegisterClasses)), gp
+	add out0 = out0, gp
+	.save rp, loc0
+	mov loc0 = rp
+	.body
+	;;
+
+	ld8 r14 = [r14]
+	ld8 r15 = [out0]
+	cmp.ne p6, p0 = r0, r0
+	;;
+
+	cmp.eq.or p6, p0 = r0, r14
+	cmp.eq.or p6, p0 = r0, r15
+(p6)	br.ret.sptk.many rp
+
+	ld8 r15 = [r14], 8
+	;;
+	nop 0
+	mov b6 = r15
+
+	mov loc2 = gp
+	ld8 gp = [r14]
+	br.call.sptk.many rp = b6
+	;;
+
+	mov gp = loc2
+	mov rp = loc0
+	mov ar.pfs = loc1
+
+	nop 0
+	nop 0
+	br.ret.sptk.many rp
+	.endp	__do_jv_register_classes
+
+#ifdef SHARED
+.weak __cxa_finalize
+#endif
+.weak _Jv_RegisterClasses
diff --git a/gcc-4.9/libgcc/config/ia64/crtend.S b/gcc-4.9/libgcc/config/ia64/crtend.S
new file mode 100644
index 000000000..72bdca089
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/crtend.S
@@ -0,0 +1,121 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Jes Sorensen, <Jes.Sorensen@cern.ch>
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "auto-host.h"
+
+.section .ctors,"aw","progbits"
+	.align	8
+__CTOR_END__:
+	data8	0
+
+.section .dtors,"aw","progbits"
+	.align 8
+__DTOR_END__:
+	data8	0
+
+.section .jcr,"aw","progbits"
+	.align 8
+__JCR_END__:
+	data8	0
+
+#ifdef HAVE_INITFINI_ARRAY_SUPPORT
+	.global __do_global_ctors_aux
+	.hidden	__do_global_ctors_aux
+#else /* !HAVE_INITFINI_ARRAY_SUPPORT */
+/*
+ * Fragment of the ELF _init routine that invokes our dtor cleanup.
+ *
+ * We make the call by indirection, because in large programs the 
+ * .fini and .init sections are not in range of the destination, and
+ * we cannot allow the linker to insert a stub at the end of this
+ * fragment of the _fini function.  Further, Itanium does not implement
+ * the long branch instructions, and we do not wish every program to
+ * trap to the kernel for emulation.
+ *
+ * Note that we require __do_global_ctors_aux to preserve the GP,
+ * so that the next fragment in .fini gets the right value.
+ */
+.section .init,"ax","progbits"
+	{ .mlx
+	  movl r2 = @pcrel(__do_global_ctors_aux - 16)
+	}
+	{ .mii
+	  mov r3 = ip
+	  ;;
+	  add r2 = r2, r3
+	  ;;
+	}
+	{ .mib
+	  mov b6 = r2
+	  br.call.sptk.many b0 = b6
+	  ;;
+	}
+#endif /* !HAVE_INITFINI_ARRAY_SUPPORT */
+
+.text
+	.align 32
+	.proc __do_global_ctors_aux
+__do_global_ctors_aux:
+	.prologue
+	/*
+		for (loc0 = __CTOR_END__-1; *p != -1; --p)
+		  (*p) ();
+	*/
+	.save ar.pfs, r34
+	alloc loc2 = ar.pfs, 0, 5, 0, 0
+	movl loc0 = @gprel(__CTOR_END__ - 8)
+	;;
+
+	add loc0 = loc0, gp
+	;;
+	ld8 loc3 = [loc0], -8
+	.save rp, loc1
+	mov loc1 = rp
+	.body
+	;;
+
+	cmp.eq p6, p0 = -1, loc3
+	mov loc4 = gp
+(p6)	br.cond.spnt.few .exit
+
+.loop:	ld8 r15 = [loc3], 8
+	;;
+	ld8 gp = [loc3]
+	mov b6 = r15
+
+	ld8 loc3 = [loc0], -8
+	nop 0
+	br.call.sptk.many rp = b6
+	;;
+
+	cmp.ne p6, p0 = -1, loc3
+	nop 0
+(p6)	br.cond.sptk.few .loop
+
+.exit:	mov gp = loc3
+	mov rp = loc1
+	mov ar.pfs = loc2
+
+	br.ret.sptk.many rp
+	.endp __do_global_ctors_aux
diff --git a/gcc-4.9/libgcc/config/ia64/crtfastmath.c b/gcc-4.9/libgcc/config/ia64/crtfastmath.c
new file mode 100644
index 000000000..34b679236
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/crtfastmath.c
@@ -0,0 +1,34 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by David Mosberger <davidm@hpl.hp.com>.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* We could call fesetenv() here but that would create a confusing
+   dependency on libm (since that is where fesetenv() gets defined.
+   To avoid this, just do everything locally.  */
+#define FE_NONIEEE_ENV 0x0009a04d0270037f
+
+static void __attribute__((constructor))
+__ia64_set_fast_math (void)
+{
+  __asm__ __volatile__ ("mov.m ar.fpsr=%0" : : "r"(FE_NONIEEE_ENV));
+}
diff --git a/gcc-4.9/libgcc/config/ia64/crti.S b/gcc-4.9/libgcc/config/ia64/crti.S
new file mode 100644
index 000000000..6326053de
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/crti.S
@@ -0,0 +1,53 @@
+# Copyright (C) 2000-2014 Free Software Foundation, Inc.
+#   Written By Timothy Wall
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just make a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+	.section	".init"
+	.align 16
+	.global	_init
+_init:
+	.prologue 14, 33
+	.save ar.pfs, r34
+	alloc	r34 = ar.pfs, 0, 4, 0, 0
+	.vframe r35
+	mov	r35 = r12
+	.save rp, r33
+	mov	r33 = b0
+	.body
+
+	.section	".fini"
+	.align	16
+	.global	_fini
+_fini:
+	.prologue 14, 33
+	.save ar.pfs, r34
+	alloc	r34 = ar.pfs, 0, 4, 0, 0
+	.vframe r35
+	mov	r35 = r12
+	.save rp, r33
+	mov	r33 = b0
+	.body
+
+# end of crti.S
diff --git a/gcc-4.9/libgcc/config/ia64/crtn.S b/gcc-4.9/libgcc/config/ia64/crtn.S
new file mode 100644
index 000000000..7a9558fd0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/crtn.S
@@ -0,0 +1,43 @@
+#   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+#   Written By Timothy Wall
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	.section	".init"
+	;;
+	mov	ar.pfs = r34
+	mov	b0 = r33
+	.restore sp
+	mov	r12 = r35
+	br.ret.sptk.many b0
+
+	.section	".fini"
+	;;
+	mov	ar.pfs = r34
+	mov	b0 = r33
+	.restore sp
+	mov	r12 = r35
+	br.ret.sptk.many b0
+
+# end of crtn.S
diff --git a/gcc-4.9/libgcc/config/ia64/fde-glibc.c b/gcc-4.9/libgcc/config/ia64/fde-glibc.c
new file mode 100644
index 000000000..8643b86ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/fde-glibc.c
@@ -0,0 +1,161 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by Richard Henderson <rth@cygnus.com>.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Locate the FDE entry for a given address, using glibc ld.so routines
+   to avoid register/deregister calls at DSO load/unload.  */
+
+#ifndef _GNU_SOURCE
+#define _GNU_SOURCE 1
+#endif
+#include "config.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <link.h>
+#include "unwind-ia64.h"
+
+#if __GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ < 2) \
+    || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 2 && !defined(DT_CONFIG))
+# error You need GLIBC 2.2.4 or later on IA-64 Linux
+#endif
+
+struct unw_ia64_callback_data
+{
+  Elf64_Addr pc;
+  unsigned long *segment_base;
+  unsigned long *gp;
+  struct unw_table_entry *ret;
+};
+
+static int
+_Unwind_IteratePhdrCallback (struct dl_phdr_info *info, size_t size, void *ptr)
+{
+  struct unw_ia64_callback_data *data = (struct unw_ia64_callback_data *) ptr;
+  const Elf64_Phdr *phdr, *p_unwind, *p_dynamic;
+  long n, match;
+  Elf64_Addr load_base, seg_base;
+  struct unw_table_entry *f_base, *f;
+  size_t lo, hi;
+
+  /* Make sure struct dl_phdr_info is at least as big as we need.  */
+  if (size < offsetof (struct dl_phdr_info, dlpi_phnum)
+	     + sizeof (info->dlpi_phnum))
+    return -1;
+
+  match = 0;
+  phdr = info->dlpi_phdr;
+  load_base = info->dlpi_addr;
+  p_unwind = NULL;
+  p_dynamic = NULL;
+  seg_base = ~(Elf64_Addr) 0;
+
+  /* See if PC falls into one of the loaded segments.  Find the unwind
+     segment at the same time.  */
+  for (n = info->dlpi_phnum; --n >= 0; phdr++)
+    {
+      if (phdr->p_type == PT_LOAD)
+	{
+	  Elf64_Addr vaddr = phdr->p_vaddr + load_base;
+	  if (data->pc >= vaddr && data->pc < vaddr + phdr->p_memsz)
+	    match = 1;
+	  if (vaddr < seg_base)
+	    seg_base = vaddr;
+	}
+      else if (phdr->p_type == PT_IA_64_UNWIND)
+	p_unwind = phdr;
+      else if (phdr->p_type == PT_DYNAMIC)
+	p_dynamic = phdr;
+    }
+  if (!match || !p_unwind)
+    return 0;
+
+  /* Search for the FDE within the unwind segment.  */
+
+  f_base = (struct unw_table_entry *) (p_unwind->p_vaddr + load_base);
+  lo = 0;
+  hi = p_unwind->p_memsz / sizeof (struct unw_table_entry);
+
+  while (lo < hi)
+    {
+      size_t mid = (lo + hi) / 2;
+
+      f = f_base + mid;
+      if (data->pc < f->start_offset + seg_base)
+	hi = mid;
+      else if (data->pc >= f->end_offset + seg_base)
+	lo = mid + 1;
+      else
+        goto found;
+    }
+  /* No need to search for further libraries when we know pc is contained
+     in this library.  */
+  return 1;
+
+ found:
+  *data->segment_base = seg_base;
+  *data->gp = 0;
+  data->ret = f;
+
+  if (p_dynamic)
+    {
+      /* For dynamically linked executables and shared libraries,
+	 DT_PLTGOT is the gp value for that object.  */
+      Elf64_Dyn *dyn = (Elf64_Dyn *)(p_dynamic->p_vaddr + load_base);
+      for (; dyn->d_tag != DT_NULL ; dyn++)
+	if (dyn->d_tag == DT_PLTGOT)
+	  {
+	    /* On IA-64, _DYNAMIC is writable and GLIBC has relocated it.  */
+	    *data->gp = dyn->d_un.d_ptr;
+	    break;
+	  }
+    }
+  else
+    {
+      /* Otherwise this is a static executable with no _DYNAMIC.
+	 The gp is constant program-wide.  */
+      register unsigned long gp __asm__("gp");
+      *data->gp = gp;
+    }
+
+  return 1;
+}
+
+/* Return a pointer to the unwind table entry for the function
+   containing PC.  */
+
+struct unw_table_entry *
+_Unwind_FindTableEntry (void *pc, unw_word *segment_base, unw_word *gp,
+                        struct unw_table_entry *ent ATTRIBUTE_UNUSED)
+{
+  struct unw_ia64_callback_data data;
+
+  data.pc = (Elf64_Addr) pc;
+  data.segment_base = segment_base;
+  data.gp = gp;
+  data.ret = NULL;
+
+  if (dl_iterate_phdr (_Unwind_IteratePhdrCallback, &data) < 0)
+    return NULL;
+
+  return data.ret;
+}
diff --git a/gcc-4.9/libgcc/config/ia64/fde-vms.c b/gcc-4.9/libgcc/config/ia64/fde-vms.c
new file mode 100644
index 000000000..5dffe7f67
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/fde-vms.c
@@ -0,0 +1,159 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributed by Douglas B Rupp <rupp@gnat.com>
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Locate the FDE entry for a given address, using VMS Starlet routines
+   to avoid register/deregister calls at DSO load/unload.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include "unwind-ia64.h"
+
+#include <ossddef.h>
+#ifndef SS$_NORMAL
+#define SS$_NORMAL 1
+#endif
+
+#define UNW_IVMS_MODE(HEADER) (((HEADER) >> 44) & 0x3L)
+
+typedef struct
+{
+  unw_word start_offset;
+  unw_word end_offset;
+  unw_word info_offset;
+  unw_word gp_value;
+}  vms_unw_table_entry;
+
+typedef unsigned long long uqword;
+
+/* ENTRY is the unwind table entry found for a PC part of call chain we're
+   unwinding through.  Return whether we should force the generic unwinder
+   to resort to "fallback" processing.  */
+   
+static int
+force_fallback_processing_for (void * pc, vms_unw_table_entry * entry)
+{
+  static int eh_debug = -1;
+
+  uqword * unw_info_block = (uqword *)entry->info_offset;
+  uqword header = *unw_info_block;
+
+  /* We need to force fallback processing in two cases:
+
+     1/ The exception dispatch frame, since only our fallback
+        processing knows how to properly unwind through it, and
+
+     2/ A bottom of stack frame, since only our fallback processing
+        will ensure we don't try to unwind further past it, which
+        would get us into unknown territory and likely cause a severe
+        crash along the way.
+
+     The two cases are indicated by non-default values for specific
+     bits in the OS Specific Data (OSSD) General Information block
+     associated with such frames.  */
+
+  ossddef * ossd;
+
+  if (eh_debug == -1)
+    {
+      char * EH_DEBUG = getenv ("EH_DEBUG");
+      eh_debug = EH_DEBUG ? atoi (EH_DEBUG) : 0;
+    }
+
+  if (eh_debug)
+    {
+      printf ("pc @ 0x%p, block @ 0x%p, header = 0x%016llx\n",
+	      pc, unw_info_block, header);
+      printf ("mode = %d, length = %ld, handler = %d\n",
+	      (int)UNW_IVMS_MODE (header), UNW_LENGTH (header),
+	      UNW_FLAG_EHANDLER (header) || UNW_FLAG_EHANDLER (header));
+    }
+
+  /* An OSSD block is there for IVMS_MODE == 3 only.  */
+  if (UNW_IVMS_MODE (header) != 3)
+    return 0;
+
+  /* The OSSD block is found past the header, unwind descriptor area
+     and condition handler pointer, if any.  */  
+  ossd = (ossddef *)
+    /* Beware: uqword pointer arithmetic below.  */
+    (unw_info_block
+     + 1
+     + UNW_LENGTH (header)
+     + (UNW_FLAG_EHANDLER (header) || UNW_FLAG_EHANDLER (header)));
+
+  /* "A General Information segment may be omitted if all of its fields
+      would have their default values.  If a General Information segment
+      is present, it must be the first in the OSSD area."  So ...  */
+  
+  if (eh_debug)
+    printf ("ossd @ 0x%p\n", ossd);
+      
+  if (eh_debug && ossd->ossd$v_type == OSSD$K_GENERAL_INFO)
+    printf ("exc_frame = %d - bot_frame = %d - base_frame = %d\n",
+	    ossd->ossd$v_exception_frame, 
+	    ossd->ossd$v_bottom_of_stack,
+	    ossd->ossd$v_base_frame);
+				
+  return
+    ossd->ossd$v_type == OSSD$K_GENERAL_INFO
+    && (ossd->ossd$v_exception_frame
+	|| ossd->ossd$v_bottom_of_stack || ossd->ossd$v_base_frame);
+}
+
+/* Return a pointer to the unwind table entry for the function
+   containing PC, 0 if we cannot find an entry or if the one we find
+   calls for fallback processing.  */
+
+struct unw_table_entry *
+_Unwind_FindTableEntry (void *pc, unw_word *segment_base,
+                        unw_word *gp, struct unw_table_entry *ent)
+{
+  vms_unw_table_entry vueblock;
+
+  if (SYS$GET_UNWIND_ENTRY_INFO (pc, &vueblock, 0) != SS$_NORMAL)
+    return 0;
+
+  /* If there is no unwind information, use fallback.  */
+  if (vueblock.info_offset == 0)
+    return 0;
+
+  /* If we need to force fallback processing, just pretend there is
+     no entry.  */
+  if (force_fallback_processing_for (pc, &vueblock))
+    return 0;
+
+  *segment_base = 0; /* ??? Fixme. ??? */
+  *gp = vueblock.gp_value;
+  ent->start_offset = vueblock.start_offset;
+  ent->end_offset = vueblock.end_offset;
+  ent->info_offset = vueblock.info_offset;
+
+  return ent;
+}
diff --git a/gcc-4.9/libgcc/config/ia64/lib1funcs.S b/gcc-4.9/libgcc/config/ia64/lib1funcs.S
new file mode 100644
index 000000000..d47a00f8f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/lib1funcs.S
@@ -0,0 +1,795 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   Contributed by James E. Wilson <wilson@cygnus.com>.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef L__divxf3
+// Compute a 80-bit IEEE double-extended quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// farg0 holds the dividend.  farg1 holds the divisor.
+//
+// __divtf3 is an alternate symbol name for backward compatibility.
+
+	.text
+	.align 16
+	.global __divxf3
+	.proc __divxf3
+__divxf3:
+#ifdef SHARED
+	.global __divtf3
+__divtf3:
+#endif
+	cmp.eq p7, p0 = r0, r0
+	frcpa.s0 f10, p6 = farg0, farg1
+	;;
+(p6)	cmp.ne p7, p0 = r0, r0
+	.pred.rel.mutex p6, p7
+(p6)	fnma.s1 f11 = farg1, f10, f1
+(p6)	fma.s1 f12 = farg0, f10, f0
+	;;
+(p6)	fma.s1 f13 = f11, f11, f0
+(p6)	fma.s1 f14 = f11, f11, f11
+	;;
+(p6)	fma.s1 f11 = f13, f13, f11
+(p6)	fma.s1 f13 = f14, f10, f10
+	;;
+(p6)	fma.s1 f10 = f13, f11, f10
+(p6)	fnma.s1 f11 = farg1, f12, farg0
+	;;
+(p6)	fma.s1 f11 = f11, f10, f12
+(p6)	fnma.s1 f12 = farg1, f10, f1
+	;;
+(p6)	fma.s1 f10 = f12, f10, f10
+(p6)	fnma.s1 f12 = farg1, f11, farg0
+	;;
+(p6)	fma.s0 fret0 = f12, f10, f11
+(p7)	mov fret0 = f10
+	br.ret.sptk rp
+	.endp __divxf3
+#endif
+
+#ifdef L__divdf3
+// Compute a 64-bit IEEE double quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// farg0 holds the dividend.  farg1 holds the divisor.
+
+	.text
+	.align 16
+	.global __divdf3
+	.proc __divdf3
+__divdf3:
+	cmp.eq p7, p0 = r0, r0
+	frcpa.s0 f10, p6 = farg0, farg1
+	;;
+(p6)	cmp.ne p7, p0 = r0, r0
+	.pred.rel.mutex p6, p7
+(p6)	fmpy.s1 f11 = farg0, f10
+(p6)	fnma.s1 f12 = farg1, f10, f1
+	;;
+(p6)	fma.s1 f11 = f12, f11, f11
+(p6)	fmpy.s1 f13 = f12, f12
+	;;
+(p6)	fma.s1 f10 = f12, f10, f10
+(p6)	fma.s1 f11 = f13, f11, f11
+	;;
+(p6)	fmpy.s1 f12 = f13, f13
+(p6)	fma.s1 f10 = f13, f10, f10
+	;;
+(p6)	fma.d.s1 f11 = f12, f11, f11
+(p6)	fma.s1 f10 = f12, f10, f10
+	;;
+(p6)	fnma.d.s1 f8 = farg1, f11, farg0
+	;;
+(p6)	fma.d fret0 = f8, f10, f11
+(p7)	mov fret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __divdf3
+#endif
+
+#ifdef L__divsf3
+// Compute a 32-bit IEEE float quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// farg0 holds the dividend.  farg1 holds the divisor.
+
+	.text
+	.align 16
+	.global __divsf3
+	.proc __divsf3
+__divsf3:
+	cmp.eq p7, p0 = r0, r0
+	frcpa.s0 f10, p6 = farg0, farg1
+	;;
+(p6)	cmp.ne p7, p0 = r0, r0
+	.pred.rel.mutex p6, p7
+(p6)	fmpy.s1 f8 = farg0, f10
+(p6)	fnma.s1 f9 = farg1, f10, f1
+	;;
+(p6)	fma.s1 f8 = f9, f8, f8
+(p6)	fmpy.s1 f9 = f9, f9
+	;;
+(p6)	fma.s1 f8 = f9, f8, f8
+(p6)	fmpy.s1 f9 = f9, f9
+	;;
+(p6)	fma.d.s1 f10 = f9, f8, f8
+	;;
+(p6)	fnorm.s.s0 fret0 = f10
+(p7)	mov fret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __divsf3
+#endif
+
+#ifdef L__divdi3
+// Compute a 64-bit integer quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __divdi3
+	.proc __divdi3
+__divdi3:
+	.regstk 2,0,0,0
+	// Transfer inputs to FP registers.
+	setf.sig f8 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	// Convert the inputs to FP, so that they won't be treated as unsigned.
+	fcvt.xf f8 = f8
+	fcvt.xf f9 = f9
+(p7)	break 1
+	;;
+	// Compute the reciprocal approximation.
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+	// 3 Newton-Raphson iterations.
+(p6)	fnma.s1 f11 = f9, f10, f1
+(p6)	fmpy.s1 f12 = f8, f10
+	;;
+(p6)	fmpy.s1 f13 = f11, f11
+(p6)	fma.s1 f12 = f11, f12, f12
+	;;
+(p6)	fma.s1 f10 = f11, f10, f10
+(p6)	fma.s1 f11 = f13, f12, f12
+	;;
+(p6)	fma.s1 f10 = f13, f10, f10
+(p6)	fnma.s1 f12 = f9, f11, f8
+	;;
+(p6)	fma.s1 f10 = f12, f10, f11
+	;;
+	// Round quotient to an integer.
+	fcvt.fx.trunc.s1 f10 = f10
+	;;
+	// Transfer result to GP registers.
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __divdi3
+#endif
+
+#ifdef L__moddi3
+// Compute a 64-bit integer modulus.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend (a).  in1 holds the divisor (b).
+
+	.text
+	.align 16
+	.global __moddi3
+	.proc __moddi3
+__moddi3:
+	.regstk 2,0,0,0
+	// Transfer inputs to FP registers.
+	setf.sig f14 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	// Convert the inputs to FP, so that they won't be treated as unsigned.
+	fcvt.xf f8 = f14
+	fcvt.xf f9 = f9
+(p7)	break 1
+	;;
+	// Compute the reciprocal approximation.
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+	// 3 Newton-Raphson iterations.
+(p6)	fmpy.s1 f12 = f8, f10
+(p6)	fnma.s1 f11 = f9, f10, f1
+	;;
+(p6)	fma.s1 f12 = f11, f12, f12
+(p6)	fmpy.s1 f13 = f11, f11
+	;;
+(p6)	fma.s1 f10 = f11, f10, f10
+(p6)	fma.s1 f11 = f13, f12, f12
+	;;
+	sub in1 = r0, in1
+(p6)	fma.s1 f10 = f13, f10, f10
+(p6)	fnma.s1 f12 = f9, f11, f8
+	;;
+	setf.sig f9 = in1
+(p6)	fma.s1 f10 = f12, f10, f11
+	;;
+	fcvt.fx.trunc.s1 f10 = f10
+	;;
+	// r = q * (-b) + a
+	xma.l f10 = f10, f9, f14
+	;;
+	// Transfer result to GP registers.
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __moddi3
+#endif
+
+#ifdef L__udivdi3
+// Compute a 64-bit unsigned integer quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __udivdi3
+	.proc __udivdi3
+__udivdi3:
+	.regstk 2,0,0,0
+	// Transfer inputs to FP registers.
+	setf.sig f8 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	// Convert the inputs to FP, to avoid FP software-assist faults.
+	fcvt.xuf.s1 f8 = f8
+	fcvt.xuf.s1 f9 = f9
+(p7)	break 1
+	;;
+	// Compute the reciprocal approximation.
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+	// 3 Newton-Raphson iterations.
+(p6)	fnma.s1 f11 = f9, f10, f1
+(p6)	fmpy.s1 f12 = f8, f10
+	;;
+(p6)	fmpy.s1 f13 = f11, f11
+(p6)	fma.s1 f12 = f11, f12, f12
+	;;
+(p6)	fma.s1 f10 = f11, f10, f10
+(p6)	fma.s1 f11 = f13, f12, f12
+	;;
+(p6)	fma.s1 f10 = f13, f10, f10
+(p6)	fnma.s1 f12 = f9, f11, f8
+	;;
+(p6)	fma.s1 f10 = f12, f10, f11
+	;;
+	// Round quotient to an unsigned integer.
+	fcvt.fxu.trunc.s1 f10 = f10
+	;;
+	// Transfer result to GP registers.
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __udivdi3
+#endif
+
+#ifdef L__umoddi3
+// Compute a 64-bit unsigned integer modulus.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend (a).  in1 holds the divisor (b).
+
+	.text
+	.align 16
+	.global __umoddi3
+	.proc __umoddi3
+__umoddi3:
+	.regstk 2,0,0,0
+	// Transfer inputs to FP registers.
+	setf.sig f14 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	// Convert the inputs to FP, to avoid FP software assist faults.
+	fcvt.xuf.s1 f8 = f14
+	fcvt.xuf.s1 f9 = f9
+(p7)	break 1;
+	;;
+	// Compute the reciprocal approximation.
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+	// 3 Newton-Raphson iterations.
+(p6)	fmpy.s1 f12 = f8, f10
+(p6)	fnma.s1 f11 = f9, f10, f1
+	;;
+(p6)	fma.s1 f12 = f11, f12, f12
+(p6)	fmpy.s1 f13 = f11, f11
+	;;
+(p6)	fma.s1 f10 = f11, f10, f10
+(p6)	fma.s1 f11 = f13, f12, f12
+	;;
+	sub in1 = r0, in1
+(p6)	fma.s1 f10 = f13, f10, f10
+(p6)	fnma.s1 f12 = f9, f11, f8
+	;;
+	setf.sig f9 = in1
+(p6)	fma.s1 f10 = f12, f10, f11
+	;;
+	// Round quotient to an unsigned integer.
+	fcvt.fxu.trunc.s1 f10 = f10
+	;;
+	// r = q * (-b) + a
+	xma.l f10 = f10, f9, f14
+	;;
+	// Transfer result to GP registers.
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __umoddi3
+#endif
+
+#ifdef L__divsi3
+// Compute a 32-bit integer quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __divsi3
+	.proc __divsi3
+__divsi3:
+	.regstk 2,0,0,0
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	sxt4 in0 = in0
+	sxt4 in1 = in1
+	;;
+	setf.sig f8 = in0
+	setf.sig f9 = in1
+(p7)	break 1
+	;;
+	mov r2 = 0x0ffdd
+	fcvt.xf f8 = f8
+	fcvt.xf f9 = f9
+	;;
+	setf.exp f11 = r2
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+(p6)	fmpy.s1 f8 = f8, f10
+(p6)	fnma.s1 f9 = f9, f10, f1
+	;;
+(p6)	fma.s1 f8 = f9, f8, f8
+(p6)	fma.s1 f9 = f9, f9, f11
+	;;
+(p6)	fma.s1 f10 = f9, f8, f8
+	;;
+	fcvt.fx.trunc.s1 f10 = f10
+	;;
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __divsi3
+#endif
+
+#ifdef L__modsi3
+// Compute a 32-bit integer modulus.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __modsi3
+	.proc __modsi3
+__modsi3:
+	.regstk 2,0,0,0
+	mov r2 = 0x0ffdd
+	sxt4 in0 = in0
+	sxt4 in1 = in1
+	;;
+	setf.sig f13 = r32
+	setf.sig f9 = r33
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	sub in1 = r0, in1
+	fcvt.xf f8 = f13
+	fcvt.xf f9 = f9
+	;;
+	setf.exp f11 = r2
+	frcpa.s1 f10, p6 = f8, f9
+(p7)	break 1
+	;;
+(p6)	fmpy.s1 f12 = f8, f10
+(p6)	fnma.s1 f10 = f9, f10, f1
+	;;
+	setf.sig f9 = in1
+(p6)	fma.s1 f12 = f10, f12, f12
+(p6)	fma.s1 f10 = f10, f10, f11	
+	;;
+(p6)	fma.s1 f10 = f10, f12, f12
+	;;
+	fcvt.fx.trunc.s1 f10 = f10
+	;;
+	xma.l f10 = f10, f9, f13
+	;;
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __modsi3
+#endif
+
+#ifdef L__udivsi3
+// Compute a 32-bit unsigned integer quotient.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __udivsi3
+	.proc __udivsi3
+__udivsi3:
+	.regstk 2,0,0,0
+	mov r2 = 0x0ffdd
+	zxt4 in0 = in0
+	zxt4 in1 = in1
+	;;
+	setf.sig f8 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	fcvt.xf f8 = f8
+	fcvt.xf f9 = f9
+(p7)	break 1
+	;;
+	setf.exp f11 = r2
+	frcpa.s1 f10, p6 = f8, f9
+	;;
+(p6)	fmpy.s1 f8 = f8, f10
+(p6)	fnma.s1 f9 = f9, f10, f1
+	;;
+(p6)	fma.s1 f8 = f9, f8, f8
+(p6)	fma.s1 f9 = f9, f9, f11
+	;;
+(p6)	fma.s1 f10 = f9, f8, f8
+	;;
+	fcvt.fxu.trunc.s1 f10 = f10
+	;;
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __udivsi3
+#endif
+
+#ifdef L__umodsi3
+// Compute a 32-bit unsigned integer modulus.
+//
+// From the Intel IA-64 Optimization Guide, choose the minimum latency
+// alternative.
+//
+// in0 holds the dividend.  in1 holds the divisor.
+
+	.text
+	.align 16
+	.global __umodsi3
+	.proc __umodsi3
+__umodsi3:
+	.regstk 2,0,0,0
+	mov r2 = 0x0ffdd
+	zxt4 in0 = in0
+	zxt4 in1 = in1
+	;;
+	setf.sig f13 = in0
+	setf.sig f9 = in1
+	// Check divide by zero.
+	cmp.ne.unc p0,p7=0,in1
+	;;
+	sub in1 = r0, in1
+	fcvt.xf f8 = f13
+	fcvt.xf f9 = f9
+	;;
+	setf.exp f11 = r2
+	frcpa.s1 f10, p6 = f8, f9
+(p7)	break 1;
+	;;
+(p6)	fmpy.s1 f12 = f8, f10
+(p6)	fnma.s1 f10 = f9, f10, f1
+	;;
+	setf.sig f9 = in1
+(p6)	fma.s1 f12 = f10, f12, f12
+(p6)	fma.s1 f10 = f10, f10, f11
+	;;
+(p6)	fma.s1 f10 = f10, f12, f12
+	;;
+	fcvt.fxu.trunc.s1 f10 = f10
+	;;
+	xma.l f10 = f10, f9, f13
+	;;
+	getf.sig ret0 = f10
+	br.ret.sptk rp
+	;;
+	.endp __umodsi3
+#endif
+
+#ifdef L__save_stack_nonlocal
+// Notes on save/restore stack nonlocal: We read ar.bsp but write
+// ar.bspstore.  This is because ar.bsp can be read at all times
+// (independent of the RSE mode) but since it's read-only we need to
+// restore the value via ar.bspstore.  This is OK because
+// ar.bsp==ar.bspstore after executing "flushrs".
+
+// void __ia64_save_stack_nonlocal(void *save_area, void *stack_pointer)
+
+	.text
+	.align 16
+	.global __ia64_save_stack_nonlocal
+	.proc __ia64_save_stack_nonlocal
+__ia64_save_stack_nonlocal:
+	{ .mmf
+	  alloc r18 = ar.pfs, 2, 0, 0, 0
+	  mov r19 = ar.rsc
+	  ;;
+	}
+	{ .mmi
+	  flushrs
+	  st8 [in0] = in1, 24
+	  and r19 = 0x1c, r19
+	  ;;
+	}
+	{ .mmi
+	  st8 [in0] = r18, -16
+	  mov ar.rsc = r19
+	  or r19 = 0x3, r19
+	  ;;
+	}
+	{ .mmi
+	  mov r16 = ar.bsp
+	  mov r17 = ar.rnat
+	  adds r2 = 8, in0
+	  ;;
+	}
+	{ .mmi
+	  st8 [in0] = r16
+	  st8 [r2] = r17
+	}
+	{ .mib
+	  mov ar.rsc = r19
+	  br.ret.sptk.few rp
+	  ;;
+	}
+	.endp __ia64_save_stack_nonlocal
+#endif
+
+#ifdef L__nonlocal_goto
+// void __ia64_nonlocal_goto(void *target_label, void *save_area,
+//			     void *static_chain);
+
+	.text
+	.align 16
+	.global __ia64_nonlocal_goto
+	.proc __ia64_nonlocal_goto
+__ia64_nonlocal_goto:
+	{ .mmi
+	  alloc r20 = ar.pfs, 3, 0, 0, 0
+	  ld8 r12 = [in1], 8
+	  mov.ret.sptk rp = in0, .L0
+	  ;;
+	}
+	{ .mmf
+	  ld8 r16 = [in1], 8
+	  mov r19 = ar.rsc
+	  ;;
+	}
+	{ .mmi
+	  flushrs
+	  ld8 r17 = [in1], 8
+	  and r19 = 0x1c, r19
+	  ;;
+	}
+	{ .mmi
+	  ld8 r18 = [in1]
+	  mov ar.rsc = r19
+	  or r19 = 0x3, r19
+	  ;;
+	}
+	{ .mmi
+	  mov ar.bspstore = r16
+	  ;;
+	  mov ar.rnat = r17
+	  ;;
+	}
+	{ .mmi
+	  loadrs
+	  invala
+	  mov r15 = in2
+	  ;;
+	}
+.L0:	{ .mib
+	  mov ar.rsc = r19
+	  mov ar.pfs = r18
+	  br.ret.sptk.few rp
+	  ;;
+	}
+	.endp __ia64_nonlocal_goto
+#endif
+
+#ifdef L__restore_stack_nonlocal
+// This is mostly the same as nonlocal_goto above.
+// ??? This has not been tested yet.
+
+// void __ia64_restore_stack_nonlocal(void *save_area)
+
+	.text
+	.align 16
+	.global __ia64_restore_stack_nonlocal
+	.proc __ia64_restore_stack_nonlocal
+__ia64_restore_stack_nonlocal:
+	{ .mmf
+	  alloc r20 = ar.pfs, 4, 0, 0, 0
+	  ld8 r12 = [in0], 8
+	  ;;
+	}
+	{ .mmb
+	  ld8 r16=[in0], 8
+	  mov r19 = ar.rsc
+	  ;;
+	}
+	{ .mmi
+	  flushrs
+	  ld8 r17 = [in0], 8
+	  and r19 = 0x1c, r19
+	  ;;
+	}
+	{ .mmf
+	  ld8 r18 = [in0]
+	  mov ar.rsc = r19
+	  ;;
+	}
+	{ .mmi
+	  mov ar.bspstore = r16
+	  ;;
+	  mov ar.rnat = r17
+	  or r19 = 0x3, r19
+	  ;;
+	}
+	{ .mmf
+	  loadrs
+	  invala
+	  ;;
+	}
+.L0:	{ .mib
+	  mov ar.rsc = r19
+	  mov ar.pfs = r18
+	  br.ret.sptk.few rp
+	  ;;
+	}
+	.endp __ia64_restore_stack_nonlocal
+#endif
+
+#ifdef L__trampoline
+// Implement the nested function trampoline.  This is out of line
+// so that we don't have to bother with flushing the icache, as
+// well as making the on-stack trampoline smaller.
+//
+// The trampoline has the following form:
+//
+//		+-------------------+ >
+//	TRAMP:	| __ia64_trampoline | |
+//		+-------------------+  > fake function descriptor
+//		| TRAMP+16          | |
+//		+-------------------+ >
+//		| target descriptor |
+//		+-------------------+
+//		| static link	    |
+//		+-------------------+
+
+	.text
+	.align 16
+	.global __ia64_trampoline
+	.proc __ia64_trampoline
+__ia64_trampoline:
+	{ .mmi
+	  ld8 r2 = [r1], 8
+	  ;;
+	  ld8 r15 = [r1]
+	}
+	{ .mmi
+	  ld8 r3 = [r2], 8
+	  ;;
+	  ld8 r1 = [r2]
+	  mov b6 = r3
+	}
+	{ .bbb
+	  br.sptk.many b6
+	  ;;
+	}
+	.endp __ia64_trampoline
+#endif
+
+#ifdef SHARED
+// Thunks for backward compatibility.
+#ifdef L_fixtfdi
+	.text
+	.align 16
+	.global __fixtfti
+	.proc __fixtfti
+__fixtfti:
+	{ .bbb
+	  br.sptk.many __fixxfti
+	  ;;
+	}
+	.endp __fixtfti
+#endif
+#ifdef L_fixunstfdi
+	.align 16
+	.global __fixunstfti
+	.proc __fixunstfti
+__fixunstfti:
+	{ .bbb
+	  br.sptk.many __fixunsxfti
+	  ;;
+	}
+	.endp __fixunstfti
+#endif
+#ifdef L_floatditf
+	.align 16
+	.global __floattitf
+	.proc __floattitf
+__floattitf:
+	{ .bbb
+	  br.sptk.many __floattixf
+	  ;;
+	}
+	.endp __floattitf
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/libgcc-glibc.ver b/gcc-4.9/libgcc/config/ia64/libgcc-glibc.ver
new file mode 100644
index 000000000..793745250
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/libgcc-glibc.ver
@@ -0,0 +1,97 @@
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# 128 bit long double support was introduced with GCC 4.4.0. These lines
+# make the symbols to get @@GCC_4.4.0 attached.
+
+%exclude {
+  __addtf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __extendxftf2
+  __fixtfdi
+  __fixtfsi
+  __fixtfti
+  __fixunstfdi
+  __fixunstfsi
+  __fixunstfti
+  __floatditf
+  __floatsitf
+  __floattitf
+  __floatunditf
+  __floatunsitf
+  __floatuntitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
+
+# Those TF functions are the aliases of the XF functions before gcc 3.4.
+GCC_3.0 {
+  __divtf3
+  __fixtfti
+  __fixunstfti
+  __floattitf
+}
+
+GCC_4.4.0 {
+  __addtf3
+  __copysigntf3
+  __divtc3
+  __divtf3
+  __eqtf2
+  __extenddftf2
+  __extendsftf2
+  __fabstf2
+  __fixtfdi
+  __fixtfsi
+  __fixunstfdi
+  __fixunstfsi
+  __floatditf
+  __floatsitf
+  __floatunditf
+  __floatunsitf
+  __getf2
+  __gttf2
+  __letf2
+  __lttf2
+  __multc3
+  __multf3
+  __negtf2
+  __netf2
+  __powitf2
+  __subtf3
+  __trunctfdf2
+  __trunctfsf2
+  __trunctfxf2
+  __unordtf2
+}
diff --git a/gcc-4.9/libgcc/config/ia64/libgcc-ia64.ver b/gcc-4.9/libgcc/config/ia64/libgcc-ia64.ver
new file mode 100644
index 000000000..17c2e2e04
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/libgcc-ia64.ver
@@ -0,0 +1,30 @@
+# Copyright (C) 2000-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_3.0 {
+  # IA-64 symbols
+  __ia64_nonlocal_goto
+  __ia64_personality_v1
+  __ia64_restore_stack_nonlocal
+  __ia64_save_stack_nonlocal
+  __ia64_trampoline
+  __ia64_backtrace
+}
+GCC_3.3.2 {
+  _Unwind_GetBSP
+}
diff --git a/gcc-4.9/libgcc/config/ia64/linux-unwind.h b/gcc-4.9/libgcc/config/ia64/linux-unwind.h
new file mode 100644
index 000000000..b260b9c2e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/linux-unwind.h
@@ -0,0 +1,199 @@
+/* DWARF2 EH unwinding support for IA64 Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-ia64.c for the structs.  */
+
+/* This works only for glibc-2.3 and later, because sigcontext is different
+   in glibc-2.2.4.  */
+
+#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)
+#include <signal.h>
+#include <sys/ucontext.h>
+
+#define IA64_GATE_AREA_START 0xa000000000000100LL
+#define IA64_GATE_AREA_END   0xa000000000030000LL
+
+#define MD_FALLBACK_FRAME_STATE_FOR ia64_fallback_frame_state
+
+static _Unwind_Reason_Code
+ia64_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  if (context->rp >= IA64_GATE_AREA_START
+      && context->rp < IA64_GATE_AREA_END)
+    {
+      struct sigframe {
+	char scratch[16];
+	unsigned long sig_number;
+	siginfo_t *info;
+	struct sigcontext *sc;
+      } *frame_ = (struct sigframe *)context->psp;
+      struct sigcontext *sc = frame_->sc;
+
+      /* Restore scratch registers in case the unwinder needs to
+	 refer to a value stored in one of them.  */
+      {
+	int i;
+
+	for (i = 2; i < 4; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+	for (i = 8; i < 12; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+	for (i = 14; i < 32; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+      }
+
+      context->fpsr_loc = &(sc->sc_ar_fpsr);
+      context->signal_pfs_loc = &(sc->sc_ar_pfs);
+      context->lc_loc = &(sc->sc_ar_lc);
+      context->unat_loc = &(sc->sc_ar_unat);
+      context->br_loc[0] = &(sc->sc_br[0]);
+      context->br_loc[6] = &(sc->sc_br[6]);
+      context->br_loc[7] = &(sc->sc_br[7]);
+      context->pr = sc->sc_pr;
+      context->psp = sc->sc_gr[12];
+      context->gp = sc->sc_gr[1];
+      /* Signal frame doesn't have an associated reg. stack frame
+         other than what we adjust for below.	  */
+      fs -> no_reg_stack_frame = 1;
+
+      if (sc->sc_rbs_base)
+	{
+	  /* Need to switch from alternate register backing store.  */
+	  long ndirty, loadrs = sc->sc_loadrs >> 16;
+	  unsigned long alt_bspstore = context->bsp - loadrs;
+	  unsigned long bspstore;
+	  unsigned long *ar_bsp = (unsigned long *)(sc->sc_ar_bsp);
+
+	  ndirty = ia64_rse_num_regs ((unsigned long *) alt_bspstore,
+				      (unsigned long *) context->bsp);
+	  bspstore = (unsigned long)
+	    ia64_rse_skip_regs (ar_bsp, -ndirty);
+	  ia64_copy_rbs (context, bspstore, alt_bspstore, loadrs,
+			 sc->sc_ar_rnat);
+	}
+
+      /* Don't touch the branch registers o.t. b0, b6 and b7.
+	 The kernel doesn't pass the preserved branch registers
+	 in the sigcontext but leaves them intact, so there's no
+	 need to do anything with them here.  */
+      {
+	unsigned long sof = sc->sc_cfm & 0x7f;
+	context->bsp = (unsigned long)
+	  ia64_rse_skip_regs ((unsigned long *)(sc->sc_ar_bsp), -sof);
+      }
+
+      /* Account for use of br.ret to resume execution of user code.  */
+      fs->curr.reg[UNW_REG_RP].where = UNW_WHERE_SPREL;
+      fs->curr.reg[UNW_REG_RP].val
+	= (unsigned long)&(sc->sc_ip) - context->psp;
+      fs->curr.reg[UNW_REG_RP].when = -1;
+
+      fs->curr.reg[UNW_REG_PFS].where = UNW_WHERE_SPREL;
+      fs->curr.reg[UNW_REG_PFS].val
+	= (unsigned long)&(sc->sc_cfm) - context->psp;
+      fs ->curr.reg[UNW_REG_PFS].when = -1;
+
+      return _URC_NO_REASON;
+    }
+  return _URC_END_OF_STACK;
+}
+
+#define MD_HANDLE_UNWABI ia64_handle_unwabi
+
+#define ABI_MARKER_OLD_LINUX_SIGTRAMP	((0 << 8) | 's')
+#define ABI_MARKER_OLD_LINUX_INTERRUPT	((0 << 8) | 'i')
+#define ABI_MARKER_LINUX_SIGTRAMP	((3 << 8) | 's')
+#define ABI_MARKER_LINUX_INTERRUPT	((3 << 8) | 'i')
+
+static void
+ia64_handle_unwabi (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  if (fs->unwabi == ABI_MARKER_LINUX_SIGTRAMP
+      || fs->unwabi == ABI_MARKER_OLD_LINUX_SIGTRAMP)
+    {
+      struct sigframe {
+	char scratch[16];
+	unsigned long sig_number;
+	siginfo_t *info;
+	struct sigcontext *sc;
+      } *frame = (struct sigframe *)context->psp;
+      struct sigcontext *sc = frame->sc;
+
+      /* Restore scratch registers in case the unwinder needs to
+	 refer to a value stored in one of them.  */
+      {
+	int i;
+
+	for (i = 2; i < 4; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+	for (i = 8; i < 12; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+	for (i = 14; i < 32; i++)
+	  context->ireg[i - 2].loc = &sc->sc_gr[i];
+      }
+
+      context->signal_pfs_loc = &(sc->sc_ar_pfs);
+      context->lc_loc = &(sc->sc_ar_lc);
+      context->unat_loc = &(sc->sc_ar_unat);
+      context->br_loc[0] = &(sc->sc_br[0]);
+      context->br_loc[6] = &(sc->sc_br[6]);
+      context->br_loc[7] = &(sc->sc_br[7]);
+      context->pr = sc->sc_pr;
+      context->gp = sc->sc_gr[1];
+      /* Signal frame doesn't have an associated reg. stack frame
+         other than what we adjust for below.	  */
+      fs -> no_reg_stack_frame = 1;
+
+      if (sc->sc_rbs_base)
+	{
+	  /* Need to switch from alternate register backing store.  */
+	  long ndirty, loadrs = sc->sc_loadrs >> 16;
+	  unsigned long alt_bspstore = context->bsp - loadrs;
+	  unsigned long bspstore;
+	  unsigned long *ar_bsp = (unsigned long *)(sc->sc_ar_bsp);
+
+	  ndirty = ia64_rse_num_regs ((unsigned long *) alt_bspstore,
+				      (unsigned long *) context->bsp);
+	  bspstore = (unsigned long) ia64_rse_skip_regs (ar_bsp, -ndirty);
+	  ia64_copy_rbs (context, bspstore, alt_bspstore, loadrs,
+			 sc->sc_ar_rnat);
+	}
+
+      /* Don't touch the branch registers o.t. b0, b6 and b7.
+	 The kernel doesn't pass the preserved branch registers
+	 in the sigcontext but leaves them intact, so there's no
+	 need to do anything with them here.  */
+      {
+	unsigned long sof = sc->sc_cfm & 0x7f;
+	context->bsp = (unsigned long)
+	  ia64_rse_skip_regs ((unsigned long *)(sc->sc_ar_bsp), -sof);
+      }
+
+      /* The use of br.ret to resume execution of user code is already
+	 accounted for in the unwind ABI.  */
+    }
+}
+#endif /* glibc-2.3 or better */
diff --git a/gcc-4.9/libgcc/config/ia64/quadlib.c b/gcc-4.9/libgcc/config/ia64/quadlib.c
new file mode 100644
index 000000000..e11d4ac31
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/quadlib.c
@@ -0,0 +1,78 @@
+/* Subroutines for long double support.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+extern int _U_Qfcmp (long double a, long double b, int);
+
+int _U_Qfeq (long double, long double);
+int _U_Qfne (long double, long double);
+int _U_Qfgt (long double, long double);
+int _U_Qfge (long double, long double);
+int _U_Qflt (long double, long double);
+int _U_Qfle (long double, long double);
+int _U_Qfcomp (long double, long double);
+
+int
+_U_Qfeq (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 4) != 0);
+}
+
+int
+_U_Qfne (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 4) == 0);
+}
+	
+int
+_U_Qfgt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 17) != 0);
+}
+
+int
+_U_Qfge (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 21) != 0);
+}
+
+int
+_U_Qflt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 9) != 0);
+}
+
+int
+_U_Qfle (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, 13) != 0);
+}
+
+int
+_U_Qfcomp (long double a, long double b)
+{
+  if (_U_Qfcmp (a, b, 4) == 0)
+    return 0;
+
+  return (_U_Qfcmp (a, b, 22) != 0 ? 1 : -1);
+}
diff --git a/gcc-4.9/libgcc/config/ia64/sfp-exceptions.c b/gcc-4.9/libgcc/config/ia64/sfp-exceptions.c
new file mode 100644
index 000000000..13d9986c5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/sfp-exceptions.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2012-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#include "sfp-machine.h"
+
+void
+__sfp_handle_exceptions (int _fex)
+{
+  double d;
+
+  if (_fex & FP_EX_INVALID)
+    {
+      asm volatile ("frcpa.s0 %0, p1 = f0, f0" : "=f" (d) : : "p1");
+    }
+  if (_fex & FP_EX_DIVZERO)
+    {
+      asm volatile ("frcpa.s0 %0, p1 = f1, f0" : "=f" (d) : : "p1");
+    }
+  if (_fex & FP_EX_OVERFLOW)
+    {
+      d = __DBL_MAX__;
+      asm volatile ("fadd.d.s0 %0 = %0, %0" : "+f" (d));
+    }
+  if (_fex & FP_EX_UNDERFLOW)
+    {
+      d = __DBL_MIN__;
+      asm volatile ("fnma.d.s0 %0 = %0, %0, f0" : "+f" (d));
+    }
+  if (_fex & FP_EX_INEXACT)
+    {
+      d = __DBL_MAX__;
+      asm volatile ("fsub.d.s0 %0 = %0, f1" : "+f" (d));
+    }
+}
diff --git a/gcc-4.9/libgcc/config/ia64/sfp-machine.h b/gcc-4.9/libgcc/config/ia64/sfp-machine.h
new file mode 100644
index 000000000..0769fc67c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/sfp-machine.h
@@ -0,0 +1,95 @@
+#define _FP_W_TYPE_SIZE		64
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D
+#define _FP_NANFRAC_E		_FP_QNANBIT_E, 0
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0
+
+#define _FP_KEEPNANFRACP	1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_NANSIGN_S		1
+#define _FP_NANSIGN_D		1
+#define _FP_NANSIGN_E		1
+#define _FP_NANSIGN_Q		1
+
+/* Here is something Intel misdesigned: the specs don't define
+   the case where we have two NaNs with same mantissas, but
+   different sign. Different operations pick up different NaNs.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if (_FP_FRAC_GT_##wc(X, Y)					\
+	|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*')))	\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    else							\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define FP_EX_INVALID		0x01
+#define FP_EX_DENORM		0x02
+#define FP_EX_DIVZERO		0x04
+#define FP_EX_OVERFLOW		0x08
+#define FP_EX_UNDERFLOW		0x10
+#define FP_EX_INEXACT		0x20
+
+#define _FP_TININESS_AFTER_ROUNDING 1
+
+void __sfp_handle_exceptions (int);
+
+#define FP_HANDLE_EXCEPTIONS			\
+  do {						\
+    if (__builtin_expect (_fex, 0))		\
+      __sfp_handle_exceptions (_fex);		\
+  } while (0);
+
+#define FP_RND_NEAREST		0
+#define FP_RND_ZERO		0xc00L
+#define FP_RND_PINF		0x800L
+#define FP_RND_MINF		0x400L
+
+#define FP_RND_MASK		0xc00L
+
+#define _FP_DECL_EX \
+  unsigned long int _fcw __attribute__ ((unused)) = FP_RND_NEAREST
+
+#define FP_INIT_ROUNDMODE					\
+  do {								\
+    __asm__ __volatile__ ("mov.m %0 = ar.fpsr" : "=r" (_fcw));	\
+  } while (0)
+
+#define FP_ROUNDMODE		(_fcw & FP_RND_MASK)
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+#define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+#define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/ia64/t-eh-ia64 b/gcc-4.9/libgcc/config/ia64/t-eh-ia64
new file mode 100644
index 000000000..6aa4bb930
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-eh-ia64
@@ -0,0 +1,2 @@
+LIB2ADDEH = $(srcdir)/config/ia64/unwind-ia64.c $(srcdir)/unwind-sjlj.c \
+  $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/ia64/t-hpux b/gcc-4.9/libgcc/config/ia64/t-hpux
new file mode 100644
index 000000000..ddc1135d7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-hpux
@@ -0,0 +1,9 @@
+# On HP-UX we do not want _fixtfdi, _fixunstfdi, or _floatditf from
+# LIB1ASMSRC.  These functions map the 128 bit conversion function names
+# to 80 bit conversions and were done for Linux backwards compatibility.
+LIB1ASMFUNCS := $(filter-out _fixtfdi _fixunstfdi _floatditf,$(LIB1ASMFUNCS))
+
+# Support routines for HP-UX 128 bit floats.
+LIB2ADD = $(srcdir)/config/ia64/quadlib.c $(srcdir)/floatunsitf.c
+
+LIB2ADDEH = $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/ia64/t-ia64 b/gcc-4.9/libgcc/config/ia64/t-ia64
new file mode 100644
index 000000000..1776ddd79
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-ia64
@@ -0,0 +1,18 @@
+LIB1ASMSRC    = ia64/lib1funcs.S
+
+# We use different names for the DImode div/mod files so that they won't
+# conflict with libgcc2.c files.  We used to use __ia64 as a prefix, now
+# we use __ as the prefix.  Note that L_divdi3 in libgcc2.c actually defines
+# a TImode divide function, so there is no actual overlap here between
+# libgcc2.c and lib1funcs.S.
+LIB1ASMFUNCS  = __divxf3 __divdf3 __divsf3 \
+	__divdi3 __moddi3 __udivdi3 __umoddi3 \
+	__divsi3 __modsi3 __udivsi3 __umodsi3 __save_stack_nonlocal \
+	__nonlocal_goto __restore_stack_nonlocal __trampoline
+
+# ??? Hack to get -P option used when compiling lib1funcs.S, because Intel
+# assembler does not accept # line number as a comment.
+# ??? This breaks C++ pragma interface/implementation, which is used in the
+# C++ part of libgcc2, hence it had to be disabled.  Must find some other way
+# to support the Intel assembler.
+#LIBGCC2_DEBUG_CFLAGS = -g1 -P
diff --git a/gcc-4.9/libgcc/config/ia64/t-ia64-elf b/gcc-4.9/libgcc/config/ia64/t-ia64-elf
new file mode 100644
index 000000000..08784dfaf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-ia64-elf
@@ -0,0 +1,20 @@
+LIB1ASMFUNCS  += _fixtfdi _fixunstfdi _floatditf
+
+CUSTOM_CRTSTUFF = yes
+
+# Assemble startup files.
+# FIXME: -I$(gcc_objdir) is necessary to find auto-host.h.  Really?
+crtbegin.o: $(srcdir)/config/ia64/crtbegin.S
+	$(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+		-o $@ $<
+crtend.o: $(srcdir)/config/ia64/crtend.S
+	$(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+		-o $@ $<
+crtbeginS.o: $(srcdir)/config/ia64/crtbegin.S
+	$(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+		-o $@ -DSHARED $<
+crtendS.o: $(srcdir)/config/ia64/crtend.S
+	$(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \
+		-o $@ -DSHARED $<
+
+SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-ia64.ver
diff --git a/gcc-4.9/libgcc/config/ia64/t-linux b/gcc-4.9/libgcc/config/ia64/t-linux
new file mode 100644
index 000000000..e6d72b94a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-linux
@@ -0,0 +1,5 @@
+# Use system libunwind library on IA-64 GLIBC based system.
+LIB2ADDEH = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c \
+  $(srcdir)/unwind-compat.c
+
+SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/ia64/t-linux-libunwind b/gcc-4.9/libgcc/config/ia64/t-linux-libunwind
new file mode 100644
index 000000000..8b1736a2d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-linux-libunwind
@@ -0,0 +1,3 @@
+# Build libunwind for IA-64 GLIBC based system.
+LIBUNWIND = $(srcdir)/config/ia64/fde-glibc.c \
+  $(srcdir)/config/ia64/unwind-ia64.c
diff --git a/gcc-4.9/libgcc/config/ia64/t-slibgcc-hpux b/gcc-4.9/libgcc/config/ia64/t-slibgcc-hpux
new file mode 100644
index 000000000..27c7a661b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-slibgcc-hpux
@@ -0,0 +1,6 @@
+# Build a shared libgcc library with the HP-UX linker on IA64.
+
+SHLIB_SOVERSION = 0
+# Must include -lunwind in the link, so that libgcc_s.so has the necessary
+# DT_NEEDED entry for libunwind.
+SHLIB_LC += -lunwind
diff --git a/gcc-4.9/libgcc/config/ia64/t-softfp b/gcc-4.9/libgcc/config/ia64/t-softfp
new file mode 100644
index 000000000..0ac35e72d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-softfp
@@ -0,0 +1,4 @@
+# Provide fallbacks for __builtin_copysignq and __builtin_fabsq.
+LIB2ADD += $(srcdir)/config/ia64/tf-signs.c
+
+LIB2ADD += $(srcdir)/config/ia64/sfp-exceptions.c
diff --git a/gcc-4.9/libgcc/config/ia64/t-softfp-compat b/gcc-4.9/libgcc/config/ia64/t-softfp-compat
new file mode 100644
index 000000000..00f45d51c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-softfp-compat
@@ -0,0 +1,7 @@
+# Filter out the following TImode functions and provide backward binary
+# compatibility.
+# Replace __dvxf3 _fixtfdi _fixunstfdi _floatditf
+libgcc1-tf-functions = __divxf3  _fixtfdi _fixunstfdi _floatditf
+LIB1ASMFUNCS := $(filter-out $(libgcc1-tf-functions), $(LIB1ASMFUNCS))
+libgcc1-tf-compats = $(addsuffix .S, $(libgcc1-tf-functions))
+LIB2ADD += $(addprefix $(srcdir)/config/ia64/, $(libgcc1-tf-compats))
diff --git a/gcc-4.9/libgcc/config/ia64/t-vms b/gcc-4.9/libgcc/config/ia64/t-vms
new file mode 100644
index 000000000..e95c58d8b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/t-vms
@@ -0,0 +1,9 @@
+CRTSTUFF_T_CFLAGS = -O0
+CRTSTUFF_T_CFLAGS_S = -O0
+
+crtinitS.o: $(srcdir)/config/ia64/vms-crtinit.S
+	$(gcc_compile) -c -x assembler-with-cpp $<
+
+LIB2ADDEH += $(srcdir)/config/ia64/fde-vms.c
+
+HOST_LIBGCC2_CFLAGS=-mpointer-size=64
diff --git a/gcc-4.9/libgcc/config/ia64/tf-signs.c b/gcc-4.9/libgcc/config/ia64/tf-signs.c
new file mode 100644
index 000000000..ef1a2ec65
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/tf-signs.c
@@ -0,0 +1,60 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+union _FP_UNION_Q
+{
+   __float128 flt;
+   struct 
+   {
+      unsigned long frac1 : 64;
+      unsigned long frac0 : 48;
+      unsigned exp : 15;
+      unsigned sign : 1;
+   } bits __attribute__((packed));
+};
+
+__float128 __copysigntf3 (__float128, __float128);
+__float128 __fabstf2 (__float128);
+
+__float128
+__copysigntf3 (__float128 a, __float128 b)
+{
+  union _FP_UNION_Q A, B;
+
+  A.flt = a;
+  B.flt = b;
+  A.bits.sign = B.bits.sign;
+
+  return A.flt;
+}
+
+__float128
+__fabstf2 (__float128 a)
+{
+  union _FP_UNION_Q A;
+
+  A.flt = a;
+  A.bits.sign = 0;
+
+  return A.flt;
+}
diff --git a/gcc-4.9/libgcc/config/ia64/unwind-ia64.c b/gcc-4.9/libgcc/config/ia64/unwind-ia64.c
new file mode 100644
index 000000000..6c5207c11
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/unwind-ia64.c
@@ -0,0 +1,2468 @@
+/* Subroutines needed for unwinding IA-64 standard format stack frame
+   info for exception handling.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+   Contributed by Andrew MacLeod  <amacleod@cygnus.com>
+	          Andrew Haley  <aph@cygnus.com>
+		  David Mosberger-Tang <davidm@hpl.hp.com>
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include "unwind.h"
+#include "unwind-ia64.h"
+#include "unwind-compat.h"
+#include "ia64intrin.h"
+
+/* This isn't thread safe, but nice for occasional tests.  */
+#undef ENABLE_MALLOC_CHECKING
+
+#ifndef __USING_SJLJ_EXCEPTIONS__
+
+enum unw_application_register
+{
+  UNW_AR_BSP,
+  UNW_AR_BSPSTORE,
+  UNW_AR_PFS,
+  UNW_AR_RNAT,
+  UNW_AR_UNAT,
+  UNW_AR_LC,
+  UNW_AR_EC,
+  UNW_AR_FPSR,
+  UNW_AR_RSC,
+  UNW_AR_CCV
+};
+
+enum unw_register_index
+{
+  /* Primary UNAT.  */
+  UNW_REG_PRI_UNAT_GR,
+  UNW_REG_PRI_UNAT_MEM,
+
+  /* Memory Stack.  */
+  UNW_REG_PSP,			/* previous memory stack pointer */
+
+  /* Register Stack.  */
+  UNW_REG_BSP,			/* register stack pointer */
+  UNW_REG_BSPSTORE,
+  UNW_REG_PFS,			/* previous function state */
+  UNW_REG_RNAT,
+  /* Return Pointer.  */
+  UNW_REG_RP,
+
+  /* Special preserved registers.  */
+  UNW_REG_UNAT, UNW_REG_PR, UNW_REG_LC, UNW_REG_FPSR,
+
+  /* Non-stacked general registers.  */
+  UNW_REG_R2,
+  UNW_REG_R4 = UNW_REG_R2 + 2,
+  UNW_REG_R7 = UNW_REG_R2 + 5,
+  UNW_REG_R31 = UNW_REG_R2 + 29,
+
+  /* Non-stacked floating point registers.  */
+  UNW_REG_F2,
+  UNW_REG_F5 = UNW_REG_F2 + 3,
+  UNW_REG_F16 = UNW_REG_F2 + 14,
+  UNW_REG_F31 = UNW_REG_F2 + 29,
+
+  /* Branch registers.  */
+  UNW_REG_B0, UNW_REG_B1,
+  UNW_REG_B5 = UNW_REG_B1 + 4,
+
+  UNW_NUM_REGS
+};
+
+enum unw_where
+{
+  UNW_WHERE_NONE,	/* register isn't saved at all */
+  UNW_WHERE_GR,		/* register is saved in a general register */
+  UNW_WHERE_FR,		/* register is saved in a floating-point register */
+  UNW_WHERE_BR,		/* register is saved in a branch register */
+  UNW_WHERE_SPREL,	/* register is saved on memstack (sp-relative) */
+  UNW_WHERE_PSPREL,	/* register is saved on memstack (psp-relative) */
+ 
+ /* At the end of each prologue these locations get resolved to
+     UNW_WHERE_PSPREL and UNW_WHERE_GR, respectively.  */
+  UNW_WHERE_SPILL_HOME,	/* register is saved in its spill home */
+  UNW_WHERE_GR_SAVE	/* register is saved in next general register */
+};
+
+#define UNW_WHEN_NEVER  0x7fffffff
+
+struct unw_reg_info
+{
+  unw_word val;			/* save location: register number or offset */
+  enum unw_where where;		/* where the register gets saved */
+  int when;			/* when the register gets saved */
+};
+
+struct unw_reg_state {
+  struct unw_reg_state *next;	/* next (outer) element on state stack */
+  struct unw_reg_info reg[UNW_NUM_REGS];	/* register save locations */
+};
+
+struct unw_labeled_state {
+  struct unw_labeled_state *next;	/* next labeled state (or NULL) */
+  unw_word label;			/* label for this state */
+  struct unw_reg_state saved_state;
+};
+
+typedef struct unw_state_record
+{
+  unsigned int first_region : 1;	/* is this the first region? */
+  unsigned int done : 1;		/* are we done scanning descriptors? */
+  unsigned int any_spills : 1;		/* got any register spills? */
+  unsigned int in_body : 1;		/* are we inside a body? */
+  unsigned int no_reg_stack_frame : 1;	/* Don't adjust bsp for i&l regs */
+  unsigned char *imask;			/* imask of spill_mask record or NULL */
+  unw_word pr_val;			/* predicate values */
+  unw_word pr_mask;			/* predicate mask */
+  unw_sword spill_offset;		/* psp-relative offset for spill base */
+  int region_start;
+  int region_len;
+  int epilogue_start;
+  int epilogue_count;
+  int when_target;
+
+  unsigned char gr_save_loc;	/* next general register to use for saving */
+  unsigned char return_link_reg; /* branch register for return link */
+  unsigned short unwabi;
+
+  struct unw_labeled_state *labeled_states;	/* list of all labeled states */
+  struct unw_reg_state curr;	/* current state */
+
+  _Unwind_Personality_Fn personality;
+  
+} _Unwind_FrameState;
+
+enum unw_nat_type
+{
+  UNW_NAT_NONE,			/* NaT not represented */
+  UNW_NAT_VAL,			/* NaT represented by NaT value (fp reg) */
+  UNW_NAT_MEMSTK,		/* NaT value is in unat word at offset OFF  */
+  UNW_NAT_REGSTK		/* NaT is in rnat */
+};
+
+struct unw_stack
+{
+  unw_word limit;
+  unw_word top;
+};
+
+struct _Unwind_Context
+{
+  /* Initial frame info.  */
+  unw_word rnat;	/* rse nat collection */
+  unw_word regstk_top;	/* lowest address of rbs stored register
+			   which uses context->rnat collection */
+
+  /* Current frame info.  */
+  unw_word bsp;		/* backing store pointer value
+			   corresponding to psp.  */
+  unw_word sp;		/* stack pointer value */
+  unw_word psp;		/* previous sp value */
+  unw_word rp;		/* return pointer */
+  unw_word pr;		/* predicate collection */
+
+  unw_word region_start;/* start of unwind region */
+  unw_word gp;		/* global pointer value */
+  void *lsda;		/* language specific data area */
+
+  /* Preserved state.  */
+  unw_word *bsp_loc;    /* previous bsp save location
+                           Appears to be write-only?    */
+  unw_word *bspstore_loc;
+  unw_word *pfs_loc;    /* Save location for pfs in current
+                           (corr. to sp) frame.  Target
+                           contains cfm for caller.     */
+  unw_word *signal_pfs_loc;/* Save location for pfs in current
+                           signal frame.  Target contains
+                           pfs for caller.  */
+  unw_word *pri_unat_loc;
+  unw_word *unat_loc;
+  unw_word *lc_loc;
+  unw_word *fpsr_loc;
+
+  unw_word eh_data[4];
+
+  struct unw_ireg
+  {
+    unw_word *loc;
+    struct unw_ireg_nat
+    {
+      enum unw_nat_type type : 3;
+      unw_sword off : 61;		/* NaT word is at loc+nat.off */
+    } nat;
+  } ireg[32 - 2];	/* Indexed by <register number> - 2 */
+
+  unw_word *br_loc[8];
+  void *fr_loc[32 - 2];
+
+  /* ??? We initially point pri_unat_loc here.  The entire NAT bit
+     logic needs work.  */
+  unw_word initial_unat;
+};
+
+/* Implicit register save order.  See section 11.4.2.3 Rules for Using
+   Unwind Descriptors, rule 3.  */
+
+static unsigned char const save_order[] =
+{
+  UNW_REG_RP, UNW_REG_PFS, UNW_REG_PSP, UNW_REG_PR,
+  UNW_REG_UNAT, UNW_REG_LC, UNW_REG_FPSR, UNW_REG_PRI_UNAT_GR
+};
+
+
+#define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
+
+/* MASK is a bitmap describing the allocation state of emergency buffers,
+   with bit set indicating free. Return >= 0 if allocation is successful;
+   < 0 if failure.  */
+
+static inline int
+atomic_alloc (unsigned int *mask)
+{
+  unsigned int old = *mask, ret, new;
+
+  while (1)
+    {
+      if (old == 0)
+	return -1;
+      ret = old & -old;
+      new = old & ~ret;
+      new = __sync_val_compare_and_swap (mask, old, new);
+      if (old == new)
+	break;
+      old = new;
+    }
+
+  return __builtin_ffs (ret) - 1;
+}
+
+/* Similarly, free an emergency buffer.  */
+
+static inline void
+atomic_free (unsigned int *mask, int bit)
+{
+  __sync_xor_and_fetch (mask, 1 << bit);
+}
+
+
+#define SIZE(X)		(sizeof(X) / sizeof(*(X)))
+#define MASK_FOR(X)	((2U << (SIZE (X) - 1)) - 1)
+#define PTR_IN(X, P)	((P) >= (X) && (P) < (X) + SIZE (X))
+
+static struct unw_reg_state emergency_reg_state[32];
+static unsigned int emergency_reg_state_free = MASK_FOR (emergency_reg_state);
+
+static struct unw_labeled_state emergency_labeled_state[8];
+static unsigned int emergency_labeled_state_free = MASK_FOR (emergency_labeled_state);
+
+#ifdef ENABLE_MALLOC_CHECKING
+static int reg_state_alloced;
+static int labeled_state_alloced;
+#endif
+
+/* Allocation and deallocation of structures.  */
+
+static struct unw_reg_state *
+alloc_reg_state (void)
+{
+  struct unw_reg_state *rs;
+
+#ifdef ENABLE_MALLOC_CHECKING
+  reg_state_alloced++;
+#endif
+
+  rs = malloc (sizeof (struct unw_reg_state));
+  if (!rs)
+    {
+      int n = atomic_alloc (&emergency_reg_state_free);
+      if (n >= 0)
+	rs = &emergency_reg_state[n];
+    }
+
+  return rs;
+}
+
+static void
+free_reg_state (struct unw_reg_state *rs)
+{
+#ifdef ENABLE_MALLOC_CHECKING
+  reg_state_alloced--;
+#endif
+
+  if (PTR_IN (emergency_reg_state, rs))
+    atomic_free (&emergency_reg_state_free, rs - emergency_reg_state);
+  else
+    free (rs);
+}
+
+static struct unw_labeled_state *
+alloc_label_state (void)
+{
+  struct unw_labeled_state *ls;
+
+#ifdef ENABLE_MALLOC_CHECKING
+  labeled_state_alloced++;
+#endif
+
+  ls = malloc(sizeof(struct unw_labeled_state));
+  if (!ls)
+    {
+      int n = atomic_alloc (&emergency_labeled_state_free);
+      if (n >= 0)
+	ls = &emergency_labeled_state[n];
+    }
+
+  return ls;
+}
+
+static void
+free_label_state (struct unw_labeled_state *ls)
+{
+#ifdef ENABLE_MALLOC_CHECKING
+  labeled_state_alloced--;
+#endif
+
+  if (PTR_IN (emergency_labeled_state, ls))
+    atomic_free (&emergency_labeled_state_free, emergency_labeled_state - ls);
+  else
+    free (ls);
+}
+
+/* Routines to manipulate the state stack.  */
+
+static void
+push (struct unw_state_record *sr)
+{
+  struct unw_reg_state *rs = alloc_reg_state ();
+  memcpy (rs, &sr->curr, sizeof (*rs));
+  sr->curr.next = rs;
+}
+
+static void
+pop (struct unw_state_record *sr)
+{
+  struct unw_reg_state *rs = sr->curr.next;
+
+  if (!rs)
+    abort ();
+  memcpy (&sr->curr, rs, sizeof(*rs));
+  free_reg_state (rs);
+}
+
+/* Make a copy of the state stack.  Non-recursive to avoid stack overflows.  */
+
+static struct unw_reg_state *
+dup_state_stack (struct unw_reg_state *rs)
+{
+  struct unw_reg_state *copy, *prev = NULL, *first = NULL;
+
+  while (rs)
+    {
+      copy = alloc_reg_state ();
+      memcpy (copy, rs, sizeof(*copy));
+      if (first)
+	prev->next = copy;
+      else
+	first = copy;
+      rs = rs->next;
+      prev = copy;
+    }
+
+  return first;
+}
+
+/* Free all stacked register states (but not RS itself).  */
+static void
+free_state_stack (struct unw_reg_state *rs)
+{
+  struct unw_reg_state *p, *next;
+
+  for (p = rs->next; p != NULL; p = next)
+    {
+      next = p->next;
+      free_reg_state (p);
+    }
+  rs->next = NULL;
+}
+
+/* Free all labeled states.  */
+
+static void
+free_label_states (struct unw_labeled_state *ls)
+{
+  struct unw_labeled_state *next;
+
+  for (; ls ; ls = next)
+    {
+      next = ls->next;
+
+      free_state_stack (&ls->saved_state);
+      free_label_state (ls);
+    }
+}
+
+/* Unwind decoder routines */
+
+static enum unw_register_index __attribute__((const))
+decode_abreg (unsigned char abreg, int memory)
+{
+  switch (abreg)
+    {
+#if TARGET_ABI_OPEN_VMS
+    /* OpenVMS Calling Standard specifies R3 - R31.  */
+    case 0x03 ... 0x1f: return UNW_REG_R2 + (abreg - 0x02);
+#else
+    /* Standard Intel ABI specifies GR 4 - 7.  */
+    case 0x04 ... 0x07: return UNW_REG_R4 + (abreg - 0x04);
+#endif
+    case 0x22 ... 0x25: return UNW_REG_F2 + (abreg - 0x22);
+    case 0x30 ... 0x3f: return UNW_REG_F16 + (abreg - 0x30);
+    case 0x41 ... 0x45: return UNW_REG_B1 + (abreg - 0x41);
+    case 0x60: return UNW_REG_PR;
+    case 0x61: return UNW_REG_PSP;
+    case 0x62: return memory ? UNW_REG_PRI_UNAT_MEM : UNW_REG_PRI_UNAT_GR;
+    case 0x63: return UNW_REG_RP;
+    case 0x64: return UNW_REG_BSP;
+    case 0x65: return UNW_REG_BSPSTORE;
+    case 0x66: return UNW_REG_RNAT;
+    case 0x67: return UNW_REG_UNAT;
+    case 0x68: return UNW_REG_FPSR;
+    case 0x69: return UNW_REG_PFS;
+    case 0x6a: return UNW_REG_LC;
+    default:
+      abort ();
+  }
+}
+
+static void
+set_reg (struct unw_reg_info *reg, enum unw_where where,
+	 int when, unw_word val)
+{
+  reg->val = val;
+  reg->where = where;
+  if (reg->when == UNW_WHEN_NEVER)
+    reg->when = when;
+}
+
+static void
+alloc_spill_area (unw_word *offp, unw_word regsize,
+		  struct unw_reg_info *lo, struct unw_reg_info *hi)
+{
+  struct unw_reg_info *reg;
+
+  for (reg = hi; reg >= lo; --reg)
+    {
+      if (reg->where == UNW_WHERE_SPILL_HOME)
+	{
+	  reg->where = UNW_WHERE_PSPREL;
+	  *offp -= regsize;
+	  reg->val = *offp;
+	}
+    }
+}
+
+static inline void
+spill_next_when (struct unw_reg_info **regp, struct unw_reg_info *lim,
+		 unw_word t)
+{
+  struct unw_reg_info *reg;
+
+  for (reg = *regp; reg <= lim; ++reg)
+    {
+      if (reg->where == UNW_WHERE_SPILL_HOME)
+	{
+	  reg->when = t;
+	  *regp = reg + 1;
+	  return;
+	}
+    }
+  /* Excess spill.  */
+  abort ();
+}
+
+static void
+finish_prologue (struct unw_state_record *sr)
+{
+  struct unw_reg_info *reg;
+  unw_word off;
+  int i;
+
+  /* First, resolve implicit register save locations
+     (see Section "11.4.2.3 Rules for Using Unwind Descriptors", rule 3).  */
+
+  for (i = 0; i < (int) sizeof (save_order); ++i)
+    {
+      reg = sr->curr.reg + save_order[i];
+      if (reg->where == UNW_WHERE_GR_SAVE)
+	{
+	  reg->where = UNW_WHERE_GR;
+	  reg->val = sr->gr_save_loc++;
+	}
+    }
+
+  /* Next, compute when the fp, general, and branch registers get saved.
+     This must come before alloc_spill_area() because we need to know
+     which registers are spilled to their home locations.  */
+  if (sr->imask)
+    {
+      static unsigned char const limit[3] = {
+	UNW_REG_F31, UNW_REG_R7, UNW_REG_B5
+      };
+
+      unsigned char kind, mask = 0, *cp = sr->imask;
+      int t;
+      struct unw_reg_info *(regs[3]);
+
+      regs[0] = sr->curr.reg + UNW_REG_F2;
+      regs[1] = sr->curr.reg + UNW_REG_R4;
+      regs[2] = sr->curr.reg + UNW_REG_B1;
+
+      for (t = 0; t < sr->region_len; ++t)
+	{
+	  if ((t & 3) == 0)
+	    mask = *cp++;
+	  kind = (mask >> 2*(3-(t & 3))) & 3;
+	  if (kind > 0)
+	    spill_next_when (&regs[kind - 1], sr->curr.reg + limit[kind - 1],
+			     sr->region_start + t);
+	}
+    }
+
+  /* Next, lay out the memory stack spill area.  */
+  if (sr->any_spills)
+    {
+      off = sr->spill_offset;
+      alloc_spill_area (&off, 16, sr->curr.reg + UNW_REG_F2,
+		        sr->curr.reg + UNW_REG_F31); 
+      alloc_spill_area (&off,  8, sr->curr.reg + UNW_REG_B1,
+		        sr->curr.reg + UNW_REG_B5);
+      alloc_spill_area (&off,  8, sr->curr.reg + UNW_REG_R4,
+		        sr->curr.reg + UNW_REG_R7);
+    }
+}
+
+/*
+ * Region header descriptors.
+ */
+
+static void
+desc_prologue (int body, unw_word rlen, unsigned char mask,
+	       unsigned char grsave, struct unw_state_record *sr)
+{
+  int i;
+
+  if (!(sr->in_body || sr->first_region))
+    finish_prologue (sr);
+  sr->first_region = 0;
+
+  /* Check if we're done.  */
+  if (sr->when_target < sr->region_start + sr->region_len) 
+    {
+      sr->done = 1;
+      return;
+    }
+
+  for (i = 0; i < sr->epilogue_count; ++i)
+    pop (sr);
+
+  sr->epilogue_count = 0;
+  sr->epilogue_start = UNW_WHEN_NEVER;
+
+  if (!body)
+    push (sr);
+
+  sr->region_start += sr->region_len;
+  sr->region_len = rlen;
+  sr->in_body = body;
+
+  if (!body)
+    {
+      for (i = 0; i < 4; ++i)
+	{
+	  if (mask & 0x8)
+	    set_reg (sr->curr.reg + save_order[i], UNW_WHERE_GR,
+		     sr->region_start + sr->region_len - 1, grsave++);
+	  mask <<= 1;
+	}
+      sr->gr_save_loc = grsave;
+      sr->any_spills = 0;
+      sr->imask = 0;
+      sr->spill_offset = 0x10;	/* default to psp+16 */
+    }
+}
+
+/*
+ * Prologue descriptors.
+ */
+
+static inline void
+desc_abi (unsigned char abi,
+	  unsigned char context,
+	  struct unw_state_record *sr)
+{
+  sr->unwabi = (abi << 8) | context;
+}
+
+static inline void
+desc_br_gr (unsigned char brmask, unsigned char gr,
+	    struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 5; ++i)
+    {
+      if (brmask & 1)
+	set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_GR,
+		 sr->region_start + sr->region_len - 1, gr++);
+      brmask >>= 1;
+    }
+}
+
+static inline void
+desc_br_mem (unsigned char brmask, struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 5; ++i)
+    {
+      if (brmask & 1)
+	{
+	  set_reg (sr->curr.reg + UNW_REG_B1 + i, UNW_WHERE_SPILL_HOME,
+		   sr->region_start + sr->region_len - 1, 0);
+	  sr->any_spills = 1;
+	}
+      brmask >>= 1;
+    }
+}
+
+static inline void
+desc_frgr_mem (unsigned char grmask, unw_word frmask,
+	       struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 4; ++i)
+    {
+      if ((grmask & 1) != 0)
+	{
+	  set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME,
+		   sr->region_start + sr->region_len - 1, 0);
+	  sr->any_spills = 1;
+	}
+      grmask >>= 1;
+    }
+  for (i = 0; i < 20; ++i)
+    {
+      if ((frmask & 1) != 0)
+	{
+	  enum unw_register_index base = i < 4 ? UNW_REG_F2 : UNW_REG_F16 - 4;
+	  set_reg (sr->curr.reg + base + i, UNW_WHERE_SPILL_HOME,
+		   sr->region_start + sr->region_len - 1, 0);
+	  sr->any_spills = 1;
+	}
+      frmask >>= 1;
+    }
+}
+
+static inline void
+desc_fr_mem (unsigned char frmask, struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 4; ++i)
+    {
+      if ((frmask & 1) != 0)
+	{
+	  set_reg (sr->curr.reg + UNW_REG_F2 + i, UNW_WHERE_SPILL_HOME,
+		   sr->region_start + sr->region_len - 1, 0);
+	  sr->any_spills = 1;
+	}
+      frmask >>= 1;
+    }
+}
+
+static inline void
+desc_gr_gr (unsigned char grmask, unsigned char gr,
+	    struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 4; ++i)
+    {
+      if ((grmask & 1) != 0)
+	set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_GR,
+		 sr->region_start + sr->region_len - 1, gr++);
+      grmask >>= 1;
+    }
+}
+
+static inline void
+desc_gr_mem (unsigned char grmask, struct unw_state_record *sr)
+{
+  int i;
+
+  for (i = 0; i < 4; ++i)
+    {
+      if ((grmask & 1) != 0)
+	{
+	  set_reg (sr->curr.reg + UNW_REG_R4 + i, UNW_WHERE_SPILL_HOME,
+		   sr->region_start + sr->region_len - 1, 0);
+	  sr->any_spills = 1;
+	}
+      grmask >>= 1;
+    }
+}
+
+static inline void
+desc_mem_stack_f (unw_word t, unw_word size, struct unw_state_record *sr)
+{
+  set_reg (sr->curr.reg + UNW_REG_PSP, UNW_WHERE_NONE,
+	   sr->region_start + MIN ((int)t, sr->region_len - 1), 16*size);
+}
+
+static inline void
+desc_mem_stack_v (unw_word t, struct unw_state_record *sr)
+{
+  sr->curr.reg[UNW_REG_PSP].when
+    = sr->region_start + MIN ((int)t, sr->region_len - 1);
+}
+
+static inline void
+desc_reg_gr (unsigned char reg, unsigned char dst, struct unw_state_record *sr)
+{
+  set_reg (sr->curr.reg + reg, UNW_WHERE_GR,
+	   sr->region_start + sr->region_len - 1, dst);
+}
+
+static inline void
+desc_reg_psprel (unsigned char reg, unw_word pspoff,
+		 struct unw_state_record *sr)
+{
+  set_reg (sr->curr.reg + reg, UNW_WHERE_PSPREL,
+	   sr->region_start + sr->region_len - 1,
+	   0x10 - 4*pspoff);
+}
+
+static inline void
+desc_reg_sprel (unsigned char reg, unw_word spoff, struct unw_state_record *sr)
+{
+  set_reg (sr->curr.reg + reg, UNW_WHERE_SPREL,
+	   sr->region_start + sr->region_len - 1,
+	   4*spoff);
+}
+
+static inline void
+desc_rp_br (unsigned char dst, struct unw_state_record *sr)
+{
+  sr->return_link_reg = dst;
+}
+
+static inline void
+desc_reg_when (unsigned char regnum, unw_word t, struct unw_state_record *sr)
+{
+  struct unw_reg_info *reg = sr->curr.reg + regnum;
+
+  if (reg->where == UNW_WHERE_NONE)
+    reg->where = UNW_WHERE_GR_SAVE;
+  reg->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
+}
+
+static inline void
+desc_spill_base (unw_word pspoff, struct unw_state_record *sr)
+{
+  sr->spill_offset = 0x10 - 4*pspoff;
+}
+
+static inline unsigned char *
+desc_spill_mask (unsigned char *imaskp, struct unw_state_record *sr)
+{
+  sr->imask = imaskp;
+  return imaskp + (2*sr->region_len + 7)/8;
+}
+
+/*
+ * Body descriptors.
+ */
+static inline void
+desc_epilogue (unw_word t, unw_word ecount, struct unw_state_record *sr)
+{
+  sr->epilogue_start = sr->region_start + sr->region_len - 1 - t;
+  sr->epilogue_count = ecount + 1;
+}
+
+static inline void
+desc_copy_state (unw_word label, struct unw_state_record *sr)
+{
+  struct unw_labeled_state *ls;
+
+  for (ls = sr->labeled_states; ls; ls = ls->next)
+    {
+      if (ls->label == label)
+        {
+	  free_state_stack (&sr->curr);
+   	  memcpy (&sr->curr, &ls->saved_state, sizeof (sr->curr));
+	  sr->curr.next = dup_state_stack (ls->saved_state.next);
+	  return;
+	}
+    }
+  abort ();
+}
+
+static inline void
+desc_label_state (unw_word label, struct unw_state_record *sr)
+{
+  struct unw_labeled_state *ls = alloc_label_state ();
+
+  ls->label = label;
+  memcpy (&ls->saved_state, &sr->curr, sizeof (ls->saved_state));
+  ls->saved_state.next = dup_state_stack (sr->curr.next);
+
+  /* Insert into list of labeled states.  */
+  ls->next = sr->labeled_states;
+  sr->labeled_states = ls;
+}
+
+/*
+ * General descriptors.
+ */
+
+static inline int
+desc_is_active (unsigned char qp, unw_word t, struct unw_state_record *sr)
+{
+  if (sr->when_target <= sr->region_start + MIN ((int)t, sr->region_len - 1))
+    return 0;
+  if (qp > 0)
+    {
+      if ((sr->pr_val & (1UL << qp)) == 0) 
+	return 0;
+      sr->pr_mask |= (1UL << qp);
+    }
+  return 1;
+}
+
+static inline void
+desc_restore_p (unsigned char qp, unw_word t, unsigned char abreg,
+		struct unw_state_record *sr)
+{
+  struct unw_reg_info *r;
+
+  if (! desc_is_active (qp, t, sr))
+    return;
+
+  r = sr->curr.reg + decode_abreg (abreg, 0);
+  r->where = UNW_WHERE_NONE;
+  r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
+  r->val = 0;
+}
+
+static inline void
+desc_spill_reg_p (unsigned char qp, unw_word t, unsigned char abreg,
+		  unsigned char x, unsigned char ytreg,
+		  struct unw_state_record *sr)
+{
+  enum unw_where where = UNW_WHERE_GR;
+  struct unw_reg_info *r;
+
+  if (! desc_is_active (qp, t, sr))
+    return;
+
+  if (x)
+    where = UNW_WHERE_BR;
+  else if (ytreg & 0x80)
+    where = UNW_WHERE_FR;
+
+  r = sr->curr.reg + decode_abreg (abreg, 0);
+  r->where = where;
+  r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
+  r->val = ytreg & 0x7f;
+}
+
+static inline void
+desc_spill_psprel_p (unsigned char qp, unw_word t, unsigned char abreg,
+		     unw_word pspoff, struct unw_state_record *sr)
+{
+  struct unw_reg_info *r;
+
+  if (! desc_is_active (qp, t, sr))
+    return;
+
+  r = sr->curr.reg + decode_abreg (abreg, 1);
+  r->where = UNW_WHERE_PSPREL;
+  r->when = sr->region_start + MIN((int)t, sr->region_len - 1);
+  r->val = 0x10 - 4*pspoff;
+}
+
+static inline void
+desc_spill_sprel_p (unsigned char qp, unw_word t, unsigned char abreg,
+		    unw_word spoff, struct unw_state_record *sr)
+{
+  struct unw_reg_info *r;
+
+  if (! desc_is_active (qp, t, sr))
+    return;
+
+  r = sr->curr.reg + decode_abreg (abreg, 1);
+  r->where = UNW_WHERE_SPREL;
+  r->when = sr->region_start + MIN ((int)t, sr->region_len - 1);
+  r->val = 4*spoff;
+}
+
+
+#define UNW_DEC_BAD_CODE(code)			abort ();
+
+/* Region headers.  */
+#define UNW_DEC_PROLOGUE_GR(fmt,r,m,gr,arg)	desc_prologue(0,r,m,gr,arg)
+#define UNW_DEC_PROLOGUE(fmt,b,r,arg)		desc_prologue(b,r,0,32,arg)
+
+/* Prologue descriptors.  */
+#define UNW_DEC_ABI(fmt,a,c,arg)		desc_abi(a,c,arg)
+#define UNW_DEC_BR_GR(fmt,b,g,arg)		desc_br_gr(b,g,arg)
+#define UNW_DEC_BR_MEM(fmt,b,arg)		desc_br_mem(b,arg)
+#define UNW_DEC_FRGR_MEM(fmt,g,f,arg)		desc_frgr_mem(g,f,arg)
+#define UNW_DEC_FR_MEM(fmt,f,arg)		desc_fr_mem(f,arg)
+#define UNW_DEC_GR_GR(fmt,m,g,arg)		desc_gr_gr(m,g,arg)
+#define UNW_DEC_GR_MEM(fmt,m,arg)		desc_gr_mem(m,arg)
+#define UNW_DEC_MEM_STACK_F(fmt,t,s,arg)	desc_mem_stack_f(t,s,arg)
+#define UNW_DEC_MEM_STACK_V(fmt,t,arg)		desc_mem_stack_v(t,arg)
+#define UNW_DEC_REG_GR(fmt,r,d,arg)		desc_reg_gr(r,d,arg)
+#define UNW_DEC_REG_PSPREL(fmt,r,o,arg)		desc_reg_psprel(r,o,arg)
+#define UNW_DEC_REG_SPREL(fmt,r,o,arg)		desc_reg_sprel(r,o,arg)
+#define UNW_DEC_REG_WHEN(fmt,r,t,arg)		desc_reg_when(r,t,arg)
+#define UNW_DEC_PRIUNAT_WHEN_GR(fmt,t,arg)	desc_reg_when(UNW_REG_PRI_UNAT_GR,t,arg)
+#define UNW_DEC_PRIUNAT_WHEN_MEM(fmt,t,arg)	desc_reg_when(UNW_REG_PRI_UNAT_MEM,t,arg)
+#define UNW_DEC_PRIUNAT_GR(fmt,r,arg)		desc_reg_gr(UNW_REG_PRI_UNAT_GR,r,arg)
+#define UNW_DEC_PRIUNAT_PSPREL(fmt,o,arg)	desc_reg_psprel(UNW_REG_PRI_UNAT_MEM,o,arg)
+#define UNW_DEC_PRIUNAT_SPREL(fmt,o,arg)	desc_reg_sprel(UNW_REG_PRI_UNAT_MEM,o,arg)
+#define UNW_DEC_RP_BR(fmt,d,arg)		desc_rp_br(d,arg)
+#define UNW_DEC_SPILL_BASE(fmt,o,arg)		desc_spill_base(o,arg)
+#define UNW_DEC_SPILL_MASK(fmt,m,arg)		(m = desc_spill_mask(m,arg))
+
+/* Body descriptors.  */
+#define UNW_DEC_EPILOGUE(fmt,t,c,arg)		desc_epilogue(t,c,arg)
+#define UNW_DEC_COPY_STATE(fmt,l,arg)		desc_copy_state(l,arg)
+#define UNW_DEC_LABEL_STATE(fmt,l,arg)		desc_label_state(l,arg)
+
+/* General unwind descriptors.  */
+#define UNW_DEC_SPILL_REG_P(f,p,t,a,x,y,arg)	desc_spill_reg_p(p,t,a,x,y,arg)
+#define UNW_DEC_SPILL_REG(f,t,a,x,y,arg)	desc_spill_reg_p(0,t,a,x,y,arg)
+#define UNW_DEC_SPILL_PSPREL_P(f,p,t,a,o,arg)	desc_spill_psprel_p(p,t,a,o,arg)
+#define UNW_DEC_SPILL_PSPREL(f,t,a,o,arg)	desc_spill_psprel_p(0,t,a,o,arg)
+#define UNW_DEC_SPILL_SPREL_P(f,p,t,a,o,arg)	desc_spill_sprel_p(p,t,a,o,arg)
+#define UNW_DEC_SPILL_SPREL(f,t,a,o,arg)	desc_spill_sprel_p(0,t,a,o,arg)
+#define UNW_DEC_RESTORE_P(f,p,t,a,arg)		desc_restore_p(p,t,a,arg)
+#define UNW_DEC_RESTORE(f,t,a,arg)		desc_restore_p(0,t,a,arg)
+
+
+/*
+ * Generic IA-64 unwind info decoder.
+ *
+ * This file is used both by the Linux kernel and objdump.  Please keep
+ * the copies of this file in sync.
+ *
+ * You need to customize the decoder by defining the following
+ * macros/constants before including this file:
+ *
+ *  Types:
+ *	unw_word	Unsigned integer type with at least 64 bits 
+ *
+ *  Register names:
+ *	UNW_REG_BSP
+ *	UNW_REG_BSPSTORE
+ *	UNW_REG_FPSR
+ *	UNW_REG_LC
+ *	UNW_REG_PFS
+ *	UNW_REG_PR
+ *	UNW_REG_RNAT
+ *	UNW_REG_PSP
+ *	UNW_REG_RP
+ *	UNW_REG_UNAT
+ *
+ *  Decoder action macros:
+ *	UNW_DEC_BAD_CODE(code)
+ *	UNW_DEC_ABI(fmt,abi,context,arg)
+ *	UNW_DEC_BR_GR(fmt,brmask,gr,arg)
+ *	UNW_DEC_BR_MEM(fmt,brmask,arg)
+ *	UNW_DEC_COPY_STATE(fmt,label,arg)
+ *	UNW_DEC_EPILOGUE(fmt,t,ecount,arg)
+ *	UNW_DEC_FRGR_MEM(fmt,grmask,frmask,arg)
+ *	UNW_DEC_FR_MEM(fmt,frmask,arg)
+ *	UNW_DEC_GR_GR(fmt,grmask,gr,arg)
+ *	UNW_DEC_GR_MEM(fmt,grmask,arg)
+ *	UNW_DEC_LABEL_STATE(fmt,label,arg)
+ *	UNW_DEC_MEM_STACK_F(fmt,t,size,arg)
+ *	UNW_DEC_MEM_STACK_V(fmt,t,arg)
+ *	UNW_DEC_PRIUNAT_GR(fmt,r,arg)
+ *	UNW_DEC_PRIUNAT_WHEN_GR(fmt,t,arg)
+ *	UNW_DEC_PRIUNAT_WHEN_MEM(fmt,t,arg)
+ *	UNW_DEC_PRIUNAT_WHEN_PSPREL(fmt,pspoff,arg)
+ *	UNW_DEC_PRIUNAT_WHEN_SPREL(fmt,spoff,arg)
+ *	UNW_DEC_PROLOGUE(fmt,body,rlen,arg)
+ *	UNW_DEC_PROLOGUE_GR(fmt,rlen,mask,grsave,arg)
+ *	UNW_DEC_REG_PSPREL(fmt,reg,pspoff,arg)
+ *	UNW_DEC_REG_REG(fmt,src,dst,arg)
+ *	UNW_DEC_REG_SPREL(fmt,reg,spoff,arg)
+ *	UNW_DEC_REG_WHEN(fmt,reg,t,arg)
+ *	UNW_DEC_RESTORE(fmt,t,abreg,arg)
+ *	UNW_DEC_RESTORE_P(fmt,qp,t,abreg,arg)
+ *	UNW_DEC_SPILL_BASE(fmt,pspoff,arg)
+ *	UNW_DEC_SPILL_MASK(fmt,imaskp,arg)
+ *	UNW_DEC_SPILL_PSPREL(fmt,t,abreg,pspoff,arg)
+ *	UNW_DEC_SPILL_PSPREL_P(fmt,qp,t,abreg,pspoff,arg)
+ *	UNW_DEC_SPILL_REG(fmt,t,abreg,x,ytreg,arg)
+ *	UNW_DEC_SPILL_REG_P(fmt,qp,t,abreg,x,ytreg,arg)
+ *	UNW_DEC_SPILL_SPREL(fmt,t,abreg,spoff,arg)
+ *	UNW_DEC_SPILL_SPREL_P(fmt,qp,t,abreg,pspoff,arg)
+ */
+
+static unw_word
+unw_decode_uleb128 (unsigned char **dpp)
+{
+  unsigned shift = 0;
+  unw_word byte, result = 0;
+  unsigned char *bp = *dpp;
+
+  while (1)
+    {
+      byte = *bp++;
+      result |= (byte & 0x7f) << shift;
+      if ((byte & 0x80) == 0)
+	break;
+      shift += 7;
+    }
+  *dpp = bp;
+  return result;
+}
+
+static unsigned char *
+unw_decode_x1 (unsigned char *dp,
+	       unsigned char code __attribute__((unused)),
+	       void *arg)
+{
+  unsigned char byte1, abreg;
+  unw_word t, off;
+
+  byte1 = *dp++;
+  t = unw_decode_uleb128 (&dp);
+  off = unw_decode_uleb128 (&dp);
+  abreg = (byte1 & 0x7f);
+  if (byte1 & 0x80)
+	  UNW_DEC_SPILL_SPREL(X1, t, abreg, off, arg);
+  else
+	  UNW_DEC_SPILL_PSPREL(X1, t, abreg, off, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_x2 (unsigned char *dp,
+	       unsigned char code __attribute__((unused)),
+	       void *arg)
+{
+  unsigned char byte1, byte2, abreg, x, ytreg;
+  unw_word t;
+
+  byte1 = *dp++; byte2 = *dp++;
+  t = unw_decode_uleb128 (&dp);
+  abreg = (byte1 & 0x7f);
+  ytreg = byte2;
+  x = (byte1 >> 7) & 1;
+  if ((byte1 & 0x80) == 0 && ytreg == 0)
+    UNW_DEC_RESTORE(X2, t, abreg, arg);
+  else
+    UNW_DEC_SPILL_REG(X2, t, abreg, x, ytreg, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_x3 (unsigned char *dp,
+	       unsigned char code __attribute__((unused)),
+	       void *arg)
+{
+  unsigned char byte1, byte2, abreg, qp;
+  unw_word t, off;
+
+  byte1 = *dp++; byte2 = *dp++;
+  t = unw_decode_uleb128 (&dp);
+  off = unw_decode_uleb128 (&dp);
+
+  qp = (byte1 & 0x3f);
+  abreg = (byte2 & 0x7f);
+
+  if (byte1 & 0x80)
+    UNW_DEC_SPILL_SPREL_P(X3, qp, t, abreg, off, arg);
+  else
+    UNW_DEC_SPILL_PSPREL_P(X3, qp, t, abreg, off, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_x4 (unsigned char *dp,
+	       unsigned char code __attribute__((unused)),
+	       void *arg)
+{
+  unsigned char byte1, byte2, byte3, qp, abreg, x, ytreg;
+  unw_word t;
+
+  byte1 = *dp++; byte2 = *dp++; byte3 = *dp++;
+  t = unw_decode_uleb128 (&dp);
+
+  qp = (byte1 & 0x3f);
+  abreg = (byte2 & 0x7f);
+  x = (byte2 >> 7) & 1;
+  ytreg = byte3;
+
+  if ((byte2 & 0x80) == 0 && byte3 == 0)
+    UNW_DEC_RESTORE_P(X4, qp, t, abreg, arg);
+  else
+    UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_r1 (unsigned char *dp, unsigned char code, void *arg)
+{
+  int body = (code & 0x20) != 0;
+  unw_word rlen;
+
+  rlen = (code & 0x1f);
+  UNW_DEC_PROLOGUE(R1, body, rlen, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_r2 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unsigned char byte1, mask, grsave;
+  unw_word rlen;
+
+  byte1 = *dp++;
+
+  mask = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
+  grsave = (byte1 & 0x7f);
+  rlen = unw_decode_uleb128 (&dp);
+  UNW_DEC_PROLOGUE_GR(R2, rlen, mask, grsave, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_r3 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unw_word rlen;
+
+  rlen = unw_decode_uleb128 (&dp);
+  UNW_DEC_PROLOGUE(R3, ((code & 0x3) == 1), rlen, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_p1 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unsigned char brmask = (code & 0x1f);
+
+  UNW_DEC_BR_MEM(P1, brmask, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_p2_p5 (unsigned char *dp, unsigned char code, void *arg)
+{
+  if ((code & 0x10) == 0)
+    {
+      unsigned char byte1 = *dp++;
+
+      UNW_DEC_BR_GR(P2, ((code & 0xf) << 1) | ((byte1 >> 7) & 1),
+		    (byte1 & 0x7f), arg);
+    }
+  else if ((code & 0x08) == 0)
+    {
+      unsigned char byte1 = *dp++, r, dst;
+
+      r = ((code & 0x7) << 1) | ((byte1 >> 7) & 1);
+      dst = (byte1 & 0x7f);
+      switch (r)
+	{
+	case 0: UNW_DEC_REG_GR(P3, UNW_REG_PSP, dst, arg); break;
+	case 1: UNW_DEC_REG_GR(P3, UNW_REG_RP, dst, arg); break;
+	case 2: UNW_DEC_REG_GR(P3, UNW_REG_PFS, dst, arg); break;
+	case 3: UNW_DEC_REG_GR(P3, UNW_REG_PR, dst, arg); break;
+	case 4: UNW_DEC_REG_GR(P3, UNW_REG_UNAT, dst, arg); break;
+	case 5: UNW_DEC_REG_GR(P3, UNW_REG_LC, dst, arg); break;
+	case 6: UNW_DEC_RP_BR(P3, dst, arg); break;
+	case 7: UNW_DEC_REG_GR(P3, UNW_REG_RNAT, dst, arg); break;
+	case 8: UNW_DEC_REG_GR(P3, UNW_REG_BSP, dst, arg); break;
+	case 9: UNW_DEC_REG_GR(P3, UNW_REG_BSPSTORE, dst, arg); break;
+	case 10: UNW_DEC_REG_GR(P3, UNW_REG_FPSR, dst, arg); break;
+	case 11: UNW_DEC_PRIUNAT_GR(P3, dst, arg); break;
+	default: UNW_DEC_BAD_CODE(r); break;
+	}
+    }
+  else if ((code & 0x7) == 0)
+    UNW_DEC_SPILL_MASK(P4, dp, arg);
+  else if ((code & 0x7) == 1)
+    {
+      unw_word grmask, frmask, byte1, byte2, byte3;
+
+      byte1 = *dp++; byte2 = *dp++; byte3 = *dp++;
+      grmask = ((byte1 >> 4) & 0xf);
+      frmask = ((byte1 & 0xf) << 16) | (byte2 << 8) | byte3;
+      UNW_DEC_FRGR_MEM(P5, grmask, frmask, arg);
+    }
+  else
+    UNW_DEC_BAD_CODE(code);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_p6 (unsigned char *dp, unsigned char code, void *arg)
+{
+  int gregs = (code & 0x10) != 0;
+  unsigned char mask = (code & 0x0f);
+
+  if (gregs)
+    UNW_DEC_GR_MEM(P6, mask, arg);
+  else
+    UNW_DEC_FR_MEM(P6, mask, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_p7_p10 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unsigned char r, byte1, byte2;
+  unw_word t, size;
+
+  if ((code & 0x10) == 0)
+    {
+      r = (code & 0xf);
+      t = unw_decode_uleb128 (&dp);
+      switch (r)
+	{
+	case 0:
+	  size = unw_decode_uleb128 (&dp);
+	  UNW_DEC_MEM_STACK_F(P7, t, size, arg);
+	  break;
+
+	case 1: UNW_DEC_MEM_STACK_V(P7, t, arg); break;
+	case 2: UNW_DEC_SPILL_BASE(P7, t, arg); break;
+	case 3: UNW_DEC_REG_SPREL(P7, UNW_REG_PSP, t, arg); break;
+	case 4: UNW_DEC_REG_WHEN(P7, UNW_REG_RP, t, arg); break;
+	case 5: UNW_DEC_REG_PSPREL(P7, UNW_REG_RP, t, arg); break;
+	case 6: UNW_DEC_REG_WHEN(P7, UNW_REG_PFS, t, arg); break;
+	case 7: UNW_DEC_REG_PSPREL(P7, UNW_REG_PFS, t, arg); break;
+	case 8: UNW_DEC_REG_WHEN(P7, UNW_REG_PR, t, arg); break;
+	case 9: UNW_DEC_REG_PSPREL(P7, UNW_REG_PR, t, arg); break;
+	case 10: UNW_DEC_REG_WHEN(P7, UNW_REG_LC, t, arg); break;
+	case 11: UNW_DEC_REG_PSPREL(P7, UNW_REG_LC, t, arg); break;
+	case 12: UNW_DEC_REG_WHEN(P7, UNW_REG_UNAT, t, arg); break;
+	case 13: UNW_DEC_REG_PSPREL(P7, UNW_REG_UNAT, t, arg); break;
+	case 14: UNW_DEC_REG_WHEN(P7, UNW_REG_FPSR, t, arg); break;
+	case 15: UNW_DEC_REG_PSPREL(P7, UNW_REG_FPSR, t, arg); break;
+	default: UNW_DEC_BAD_CODE(r); break;
+	}
+    }
+  else
+    {
+      switch (code & 0xf)
+	{
+	case 0x0: /* p8 */
+	  {
+	    r = *dp++;
+	    t = unw_decode_uleb128 (&dp);
+	    switch (r)
+	      {
+	      case  1: UNW_DEC_REG_SPREL(P8, UNW_REG_RP, t, arg); break;
+	      case  2: UNW_DEC_REG_SPREL(P8, UNW_REG_PFS, t, arg); break;
+	      case  3: UNW_DEC_REG_SPREL(P8, UNW_REG_PR, t, arg); break;
+	      case  4: UNW_DEC_REG_SPREL(P8, UNW_REG_LC, t, arg); break;
+	      case  5: UNW_DEC_REG_SPREL(P8, UNW_REG_UNAT, t, arg); break;
+	      case  6: UNW_DEC_REG_SPREL(P8, UNW_REG_FPSR, t, arg); break;
+	      case  7: UNW_DEC_REG_WHEN(P8, UNW_REG_BSP, t, arg); break;
+	      case  8: UNW_DEC_REG_PSPREL(P8, UNW_REG_BSP, t, arg); break;
+	      case  9: UNW_DEC_REG_SPREL(P8, UNW_REG_BSP, t, arg); break;
+	      case 10: UNW_DEC_REG_WHEN(P8, UNW_REG_BSPSTORE, t, arg); break;
+	      case 11: UNW_DEC_REG_PSPREL(P8, UNW_REG_BSPSTORE, t, arg); break;
+	      case 12: UNW_DEC_REG_SPREL(P8, UNW_REG_BSPSTORE, t, arg); break;
+	      case 13: UNW_DEC_REG_WHEN(P8, UNW_REG_RNAT, t, arg); break;
+	      case 14: UNW_DEC_REG_PSPREL(P8, UNW_REG_RNAT, t, arg); break;
+	      case 15: UNW_DEC_REG_SPREL(P8, UNW_REG_RNAT, t, arg); break;
+	      case 16: UNW_DEC_PRIUNAT_WHEN_GR(P8, t, arg); break;
+	      case 17: UNW_DEC_PRIUNAT_PSPREL(P8, t, arg); break;
+	      case 18: UNW_DEC_PRIUNAT_SPREL(P8, t, arg); break;
+	      case 19: UNW_DEC_PRIUNAT_WHEN_MEM(P8, t, arg); break;
+	      default: UNW_DEC_BAD_CODE(r); break;
+	    }
+	  }
+	  break;
+
+	case 0x1:
+	  byte1 = *dp++; byte2 = *dp++;
+	  UNW_DEC_GR_GR(P9, (byte1 & 0xf), (byte2 & 0x7f), arg);
+	  break;
+
+	case 0xf: /* p10 */
+	  byte1 = *dp++; byte2 = *dp++;
+	  UNW_DEC_ABI(P10, byte1, byte2, arg);
+	  break;
+
+	case 0x9:
+	  return unw_decode_x1 (dp, code, arg);
+
+	case 0xa:
+	  return unw_decode_x2 (dp, code, arg);
+
+	case 0xb:
+	  return unw_decode_x3 (dp, code, arg);
+
+	case 0xc:
+	  return unw_decode_x4 (dp, code, arg);
+
+	default:
+	  UNW_DEC_BAD_CODE(code);
+	  break;
+	}
+    }
+  return dp;
+}
+
+static unsigned char *
+unw_decode_b1 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unw_word label = (code & 0x1f);
+
+  if ((code & 0x20) != 0)
+    UNW_DEC_COPY_STATE(B1, label, arg);
+  else
+    UNW_DEC_LABEL_STATE(B1, label, arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_b2 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unw_word t;
+
+  t = unw_decode_uleb128 (&dp);
+  UNW_DEC_EPILOGUE(B2, t, (code & 0x1f), arg);
+  return dp;
+}
+
+static unsigned char *
+unw_decode_b3_x4 (unsigned char *dp, unsigned char code, void *arg)
+{
+  unw_word t, ecount, label;
+
+  if ((code & 0x10) == 0)
+    {
+      t = unw_decode_uleb128 (&dp);
+      ecount = unw_decode_uleb128 (&dp);
+      UNW_DEC_EPILOGUE(B3, t, ecount, arg);
+    }
+  else if ((code & 0x07) == 0)
+    {
+      label = unw_decode_uleb128 (&dp);
+      if ((code & 0x08) != 0)
+	UNW_DEC_COPY_STATE(B4, label, arg);
+      else
+	UNW_DEC_LABEL_STATE(B4, label, arg);
+    }
+  else
+    switch (code & 0x7)
+      {
+      case 1: return unw_decode_x1 (dp, code, arg);
+      case 2: return unw_decode_x2 (dp, code, arg);
+      case 3: return unw_decode_x3 (dp, code, arg);
+      case 4: return unw_decode_x4 (dp, code, arg);
+      default: UNW_DEC_BAD_CODE(code); break;
+      }
+  return dp;
+}
+
+typedef unsigned char *(*unw_decoder) (unsigned char *, unsigned char, void *);
+
+static const unw_decoder unw_decode_table[2][8] =
+{
+  /* prologue table: */
+  {
+    unw_decode_r1,	/* 0 */
+    unw_decode_r1,
+    unw_decode_r2,
+    unw_decode_r3,
+    unw_decode_p1,	/* 4 */
+    unw_decode_p2_p5,
+    unw_decode_p6,
+    unw_decode_p7_p10
+  },
+  {
+    unw_decode_r1,	/* 0 */
+    unw_decode_r1,
+    unw_decode_r2,
+    unw_decode_r3,
+    unw_decode_b1,	/* 4 */
+    unw_decode_b1,
+    unw_decode_b2,
+    unw_decode_b3_x4
+  }
+};
+
+/*
+ * Decode one descriptor and return address of next descriptor.
+ */
+static inline unsigned char *
+unw_decode (unsigned char *dp, int inside_body, void *arg)
+{
+  unw_decoder decoder;
+  unsigned char code;
+
+  code = *dp++;
+  decoder = unw_decode_table[inside_body][code >> 5];
+  dp = (*decoder) (dp, code, arg);
+  return dp;
+}
+
+
+/* RSE helper functions.  */
+
+static inline unw_word
+ia64_rse_slot_num (unw_word *addr)
+{
+  return (((unw_word) addr) >> 3) & 0x3f;
+}
+
+/* Return TRUE if ADDR is the address of an RNAT slot.  */
+static inline unw_word
+ia64_rse_is_rnat_slot (unw_word *addr)
+{
+  return ia64_rse_slot_num (addr) == 0x3f;
+}
+
+/* Returns the address of the RNAT slot that covers the slot at
+   address SLOT_ADDR.  */
+static inline unw_word *
+ia64_rse_rnat_addr (unw_word *slot_addr)
+{
+  return (unw_word *) ((unw_word) slot_addr | (0x3f << 3));
+}
+
+/* Calculate the number of registers in the dirty partition starting at
+   BSPSTORE with a size of DIRTY bytes.  This isn't simply DIRTY
+   divided by eight because the 64th slot is used to store ar.rnat.  */
+static inline unw_word
+ia64_rse_num_regs (unw_word *bspstore, unw_word *bsp)
+{
+  unw_word slots = (bsp - bspstore);
+
+  return slots - (ia64_rse_slot_num (bspstore) + slots)/0x40;
+}
+
+/* The inverse of the above: given bspstore and the number of
+   registers, calculate ar.bsp.  */
+static inline unw_word *
+ia64_rse_skip_regs (unw_word *addr, int num_regs)
+{
+  int delta = ia64_rse_slot_num (addr) + num_regs;
+
+  if (num_regs < 0)
+    delta -= 0x3e;
+  return addr + num_regs + delta/0x3f;
+}
+
+
+/* Copy register backing store from SRC to DST, LEN words
+   (which include both saved registers and nat collections).
+   DST_RNAT is a partial nat collection for DST.  SRC and DST
+   don't have to be equal modulo 64 slots, so it cannot be
+   done with a simple memcpy as the nat collections will be
+   at different relative offsets and need to be combined together.  */
+static void
+ia64_copy_rbs (struct _Unwind_Context *info, unw_word dst,
+               unw_word src, unw_word len, unw_word dst_rnat)
+{
+  unw_word count;
+  unw_word src_rnat;
+  unw_word shift1, shift2;
+
+  len <<= 3;
+  dst_rnat &= (1ULL << ((dst >> 3) & 0x3f)) - 1;
+  src_rnat = src >= info->regstk_top
+	     ? info->rnat : *(unw_word *) (src | 0x1f8);
+  src_rnat &= ~((1ULL << ((src >> 3) & 0x3f)) - 1);
+  /* Just to make sure.  */
+  src_rnat &= ~(1ULL << 63);
+  shift1 = ((dst - src) >> 3) & 0x3f;
+  if ((dst & 0x1f8) < (src & 0x1f8))
+    shift1--;
+  shift2 = 0x3f - shift1;
+  if ((dst & 0x1f8) >= (src & 0x1f8))
+    {
+      count = ~dst & 0x1f8;
+      goto first;
+    }
+  count = ~src & 0x1f8;
+  goto second;
+  while (len > 0)
+    {
+      src_rnat = src >= info->regstk_top
+		 ? info->rnat : *(unw_word *) (src | 0x1f8);
+      /* Just to make sure.  */
+      src_rnat &= ~(1ULL << 63);
+      count = shift2 << 3;
+first:
+      if (count > len)
+        count = len;
+      memcpy ((char *) dst, (char *) src, count);
+      dst += count;
+      src += count;
+      len -= count;
+      dst_rnat |= (src_rnat << shift1) & ~(1ULL << 63);
+      if (len <= 0)
+        break;
+      *(unw_word *) dst = dst_rnat;
+      dst += 8;
+      dst_rnat = 0;
+      count = shift1 << 3;
+second:
+      if (count > len)
+        count = len;
+      memcpy ((char *) dst, (char *) src, count);
+      dst += count;
+      src += count + 8;
+      len -= count + 8;
+      dst_rnat |= (src_rnat >> shift2);
+    }
+  if ((dst & 0x1f8) == 0x1f8)
+    {
+      *(unw_word *) dst = dst_rnat;
+      dst += 8;
+      dst_rnat = 0;
+    }
+  /* Set info->regstk_top to lowest rbs address which will use
+     info->rnat collection.  */
+  info->regstk_top = dst & ~0x1ffULL;
+  info->rnat = dst_rnat;
+}
+
+/* Unwind accessors.  */
+
+static void
+unw_access_gr (struct _Unwind_Context *info, int regnum,
+	       unw_word *val, char *nat, int write)
+{
+  unw_word *addr, *nat_addr = 0, nat_mask = 0, dummy_nat;
+  struct unw_ireg *ireg;
+
+  if ((unsigned) regnum - 1 >= 127)
+    abort ();
+
+  if (regnum < 1)
+    {
+      nat_addr = addr = &dummy_nat;
+      dummy_nat = 0;
+    }
+  else if (regnum < 32)
+    {
+      /* Access a non-stacked register.  */
+      ireg = &info->ireg[regnum - 2];
+      addr = ireg->loc;
+      if (addr)
+	{
+	  nat_addr = addr + ireg->nat.off;
+	  switch (ireg->nat.type)
+	    {
+	    case UNW_NAT_VAL:
+	      /* Simulate getf.sig/setf.sig.  */
+	      if (write)
+		{
+		  if (*nat)
+		    {
+		      /* Write NaTVal and be done with it.  */
+		      addr[0] = 0;
+		      addr[1] = 0x1fffe;
+		      return;
+		    }
+		  addr[1] = 0x1003e;
+		}
+	      else if (addr[0] == 0 && addr[1] == 0x1ffe)
+		{
+		  /* Return NaT and be done with it.  */
+		  *val = 0;
+		  *nat = 1;
+		  return;
+		}
+	      /* FALLTHRU */
+
+	    case UNW_NAT_NONE:
+	      dummy_nat = 0;
+	      nat_addr = &dummy_nat;
+	      break;
+
+	    case UNW_NAT_MEMSTK:
+	      nat_mask = 1UL << ((unw_word) addr & 0x1f8)/8;
+	      break;
+
+	    case UNW_NAT_REGSTK:
+	      if ((unw_word) addr >= info->regstk_top)
+		nat_addr = &info->rnat;
+	      else
+		nat_addr = ia64_rse_rnat_addr (addr);
+	      nat_mask = 1ULL << ia64_rse_slot_num (addr);
+	      break;
+	    }
+	}
+    }
+  else
+    {
+      /* Access a stacked register.  */
+      addr = ia64_rse_skip_regs ((unw_word *) info->bsp, regnum - 32);
+      if ((unw_word) addr >= info->regstk_top)
+	nat_addr = &info->rnat;
+      else
+	nat_addr = ia64_rse_rnat_addr (addr);
+      nat_mask = 1UL << ia64_rse_slot_num (addr);
+    }
+
+  if (write)
+    {
+      *addr = *val;
+      if (*nat)
+	*nat_addr |= nat_mask;
+      else
+	*nat_addr &= ~nat_mask;
+    }
+  else
+    {
+      *val = *addr;
+      *nat = (*nat_addr & nat_mask) != 0;
+    }
+}
+
+/* Get the value of register REG as saved in CONTEXT.  */
+
+_Unwind_Word
+_Unwind_GetGR (struct _Unwind_Context *context, int index)
+{
+  _Unwind_Word ret;
+  char nat;
+
+  if (index == 1)
+    return context->gp;
+  else if (index >= 15 && index <= 18)
+    return context->eh_data[index - 15];
+  else
+    unw_access_gr (context, index, &ret, &nat, 0);
+
+  return ret;
+}
+
+/* Overwrite the saved value for register REG in CONTEXT with VAL.  */
+
+void
+_Unwind_SetGR (struct _Unwind_Context *context, int index, _Unwind_Word val)
+{
+  char nat = 0;
+
+  if (index == 1)
+    context->gp = val;
+  else if (index >= 15 && index <= 18)
+    context->eh_data[index - 15] = val;
+  else
+    unw_access_gr (context, index, &val, &nat, 1);
+}
+
+/* Retrieve the return address for CONTEXT.  */
+
+inline _Unwind_Ptr
+_Unwind_GetIP (struct _Unwind_Context *context)
+{
+  return context->rp;
+}
+
+inline _Unwind_Ptr
+_Unwind_GetIPInfo (struct _Unwind_Context *context, int *ip_before_insn)
+{
+  *ip_before_insn = 0;
+  return context->rp;
+}
+
+/* Overwrite the return address for CONTEXT with VAL.  */
+
+inline void
+_Unwind_SetIP (struct _Unwind_Context *context, _Unwind_Ptr val)
+{
+  context->rp = val;
+}
+
+void *
+_Unwind_GetLanguageSpecificData (struct _Unwind_Context *context)
+{
+  return context->lsda;
+}
+
+_Unwind_Ptr
+_Unwind_GetRegionStart (struct _Unwind_Context *context)
+{
+  return context->region_start;
+}
+
+void *
+_Unwind_FindEnclosingFunction (void *pc)
+{
+  struct unw_table_entry *entp, ent;
+  unw_word segment_base, gp;
+
+  entp = _Unwind_FindTableEntry (pc, &segment_base, &gp, &ent);
+  if (entp == NULL)
+    return NULL;
+  else
+    return (void *)(segment_base + entp->start_offset);
+}
+
+/* Get the value of the CFA as saved in CONTEXT.  In GCC/Dwarf2 parlance,
+   the CFA is the value of the stack pointer on entry; In IA-64 unwind
+   parlance, this is the PSP.  */
+
+_Unwind_Word
+_Unwind_GetCFA (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->psp;
+}
+
+/* Get the value of the Backing Store Pointer as saved in CONTEXT.  */
+
+_Unwind_Word
+_Unwind_GetBSP (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bsp;
+}
+
+#include "md-unwind-support.h"
+
+/* By default, assume personality routine interface compatibility with
+   our expectations.  */
+#ifndef MD_UNW_COMPATIBLE_PERSONALITY_P
+#define MD_UNW_COMPATIBLE_PERSONALITY_P(HEADER) 1
+#endif
+
+
+static _Unwind_Reason_Code
+uw_frame_state_for (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  struct unw_table_entry *entp, ent;
+  unw_word *unw, header, length;
+  unsigned char *insn, *insn_end;
+  unw_word segment_base;
+  struct unw_reg_info *r;
+
+  memset (fs, 0, sizeof (*fs));
+  for (r = fs->curr.reg; r < fs->curr.reg + UNW_NUM_REGS; ++r)
+    r->when = UNW_WHEN_NEVER;
+  context->lsda = 0;
+
+  entp = _Unwind_FindTableEntry ((void *) context->rp,
+				&segment_base, &context->gp, &ent);
+  if (entp == NULL)
+    {
+      /* Couldn't find unwind info for this function.  Try an
+	 os-specific fallback mechanism.  This will necessarily
+	 not provide a personality routine or LSDA.  */
+#ifdef MD_FALLBACK_FRAME_STATE_FOR
+      if (MD_FALLBACK_FRAME_STATE_FOR (context, fs) == _URC_NO_REASON)
+	return _URC_NO_REASON;
+#endif
+
+      /* [SCRA 11.4.1] A leaf function with no memory stack, no exception
+	 handlers, and which keeps the return value in B0 does not need
+	 an unwind table entry.
+
+	 This can only happen in the frame after unwinding through a signal
+	 handler.  Avoid infinite looping by requiring that B0 != RP.
+	 RP == 0 terminates the chain.  */
+      if (context->br_loc[0]
+	  && *context->br_loc[0] != context->rp
+	  && context->rp != 0)
+	goto skip_unwind_info;
+
+      return _URC_END_OF_STACK;
+    }
+
+  context->region_start = entp->start_offset + segment_base;
+  fs->when_target = ((context->rp & -16) - context->region_start) / 16 * 3
+		    + (context->rp & 15);
+
+  unw = (unw_word *) (entp->info_offset + segment_base);
+  header = *unw;
+  length = UNW_LENGTH (header);
+
+  /* Some operating systems use the personality routine slot in way not
+     compatible with what we expect.  For instance, OpenVMS uses this slot to
+     designate "condition handlers" with very different arguments than what we
+     would be providing.  Such cases are typically identified from OS specific
+     bits in the unwind information block header, and checked by the target
+     MD_UNW_COMPATIBLE_PERSONALITY_P macro. 
+
+     We just pretend there is no personality from our standpoint in such
+     situations, and expect GCC not to set the identifying bits itself so that
+     compatible personalities for GCC compiled code are called.
+
+     Of course, this raises the question of what combinations of native/GCC
+     calls can be expected to behave properly exception handling-wise.  We are
+     not to provide a magic answer here, merely to prevent crashes assuming
+     users know what they are doing.
+
+     ??? Perhaps check UNW_VER / UNW_FLAG_OSMASK as well.  */
+
+  if (MD_UNW_COMPATIBLE_PERSONALITY_P (header)
+      && (UNW_FLAG_EHANDLER (header) | UNW_FLAG_UHANDLER (header)))
+    {
+      fs->personality =
+	*(_Unwind_Personality_Fn *) (unw[length + 1] + context->gp);
+      context->lsda = unw + length + 2;
+    }
+
+  insn = (unsigned char *) (unw + 1);
+  insn_end = (unsigned char *) (unw + 1 + length);
+  while (!fs->done && insn < insn_end)
+    insn = unw_decode (insn, fs->in_body, fs);
+
+  free_label_states (fs->labeled_states);
+  free_state_stack (&fs->curr);
+
+#ifdef ENABLE_MALLOC_CHECKING
+  if (reg_state_alloced || labeled_state_alloced)
+    abort ();
+#endif
+
+  /* If we're in the epilogue, sp has been restored and all values
+     on the memory stack below psp also have been restored.  */
+  if (fs->when_target > fs->epilogue_start)
+    {
+      struct unw_reg_info *r;
+
+      fs->curr.reg[UNW_REG_PSP].where = UNW_WHERE_NONE;
+      fs->curr.reg[UNW_REG_PSP].val = 0;
+      for (r = fs->curr.reg; r < fs->curr.reg + UNW_NUM_REGS; ++r)
+	if ((r->where == UNW_WHERE_PSPREL && r->val <= 0x10)
+	    || r->where == UNW_WHERE_SPREL)
+	  r->where = UNW_WHERE_NONE;
+    }
+
+skip_unwind_info:
+  /* If RP didn't get saved, generate entry for the return link register.  */
+  if (fs->curr.reg[UNW_REG_RP].when >= fs->when_target)
+    {
+      fs->curr.reg[UNW_REG_RP].where = UNW_WHERE_BR;
+      fs->curr.reg[UNW_REG_RP].when = -1;
+      fs->curr.reg[UNW_REG_RP].val = fs->return_link_reg;
+    }
+
+  /* There is a subtlety for the frame after unwinding through a signal
+     handler: should we restore the cfm as usual or the pfs?  We can't
+     restore both because we use br.ret to resume execution of user code.
+     For other frames the procedure is by definition non-leaf so the pfs
+     is saved and restored and thus effectively dead in the body; only
+     the cfm need therefore be restored.
+     
+     Here we have 2 cases:
+       - either the pfs is saved and restored and thus effectively dead
+	 like in regular frames; then we do nothing special and restore
+	 the cfm.
+       - or the pfs is not saved and thus live; but in that case the
+	 procedure is necessarily leaf so the cfm is effectively dead
+	 and we restore the pfs.  */
+  if (context->signal_pfs_loc)
+    {
+      if (fs->curr.reg[UNW_REG_PFS].when >= fs->when_target)
+	context->pfs_loc = context->signal_pfs_loc;
+      context->signal_pfs_loc = NULL;
+    }
+
+  return _URC_NO_REASON;
+}
+
+static void
+uw_update_reg_address (struct _Unwind_Context *context,
+		       _Unwind_FrameState *fs,
+		       enum unw_register_index regno)
+{
+  struct unw_reg_info *r = fs->curr.reg + regno;
+  void *addr;
+  unw_word rval;
+
+  if (r->where == UNW_WHERE_NONE || r->when >= fs->when_target)
+    return;
+
+  rval = r->val;
+  switch (r->where)
+    {
+    case UNW_WHERE_GR:
+      if (rval >= 32)
+	addr = ia64_rse_skip_regs ((unw_word *) context->bsp, rval - 32);
+      else if (rval >= 2)
+	addr = context->ireg[rval - 2].loc;
+      else if (rval == 0)
+	{
+	  static const unw_word dummy;
+	  addr = (void *) &dummy;
+	}
+      else
+	abort ();
+      break;
+
+    case UNW_WHERE_FR:
+      if (rval >= 2 && rval < 32)
+	addr = context->fr_loc[rval - 2];
+      else
+	abort ();
+      break;
+
+    case UNW_WHERE_BR:
+      /* Note that while RVAL can only be 1-5 from normal descriptors,
+	 we can want to look at B0, B6 and B7 due to having manually unwound a
+	 signal frame.  */
+      if (rval < 8)
+	addr = context->br_loc[rval];
+      else
+	abort ();
+      break;
+
+    case UNW_WHERE_SPREL:
+      addr = (void *)(context->sp + rval);
+      break;
+
+    case UNW_WHERE_PSPREL:
+      addr = (void *)(context->psp + rval);
+      break;
+
+    default:
+      abort ();
+    }
+
+  switch (regno)
+    {
+    case UNW_REG_R2 ... UNW_REG_R31:
+      context->ireg[regno - UNW_REG_R2].loc = addr;
+      switch (r->where)
+      {
+      case UNW_WHERE_GR:
+	if (rval >= 32)
+	  {
+	    context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_MEMSTK;
+	    context->ireg[regno - UNW_REG_R2].nat.off
+	      = context->pri_unat_loc - (unw_word *) addr;
+	  }
+	else if (rval >= 2)
+	  {
+	    context->ireg[regno - UNW_REG_R2].nat
+	      = context->ireg[rval - 2].nat;
+	  }
+	else if (rval == 0)
+	  {
+	    context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_NONE;
+	    context->ireg[regno - UNW_REG_R2].nat.off = 0;
+	  }
+	else
+	  abort ();
+	break;
+
+      case UNW_WHERE_FR:
+	context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_VAL;
+	context->ireg[regno - UNW_REG_R2].nat.off = 0;
+	break;
+
+      case UNW_WHERE_BR:
+	context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_NONE;
+	context->ireg[regno - UNW_REG_R2].nat.off = 0;
+	break;
+
+      case UNW_WHERE_PSPREL:
+      case UNW_WHERE_SPREL:
+	context->ireg[regno - UNW_REG_R2].nat.type = UNW_NAT_MEMSTK;
+	context->ireg[regno - UNW_REG_R2].nat.off
+	  = context->pri_unat_loc - (unw_word *) addr;
+	break;
+
+      default:
+	abort ();
+      }
+      break;
+
+    case UNW_REG_F2 ... UNW_REG_F31:
+      context->fr_loc[regno - UNW_REG_F2] = addr;
+      break;
+
+    case UNW_REG_B1 ... UNW_REG_B5:
+      context->br_loc[regno - UNW_REG_B0] = addr;
+      break;
+
+    case UNW_REG_BSP:
+      context->bsp_loc = addr;
+      break;
+    case UNW_REG_BSPSTORE:
+      context->bspstore_loc = addr;
+      break;
+    case UNW_REG_PFS:
+      context->pfs_loc = addr;
+      break;
+    case UNW_REG_RP:
+      context->rp = *(unw_word *)addr;
+      break;
+    case UNW_REG_UNAT:
+      context->unat_loc = addr;
+      break;
+    case UNW_REG_PR:
+      context->pr = *(unw_word *) addr;
+      break;
+    case UNW_REG_LC:
+      context->lc_loc = addr;
+      break;
+    case UNW_REG_FPSR:
+      context->fpsr_loc = addr;
+      break;
+
+    case UNW_REG_PSP:
+      context->psp = *(unw_word *)addr;
+      break;
+
+    default:
+      abort ();
+    }
+}
+
+static void
+uw_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  int i;
+
+#ifdef MD_HANDLE_UNWABI
+  MD_HANDLE_UNWABI (context, fs);
+#endif
+
+  context->sp = context->psp;
+
+  /* First, set PSP.  Subsequent instructions may depend on this value.  */
+  if (fs->when_target > fs->curr.reg[UNW_REG_PSP].when)
+    {
+      if (fs->curr.reg[UNW_REG_PSP].where == UNW_WHERE_NONE)
+	context->psp = context->psp + fs->curr.reg[UNW_REG_PSP].val;
+      else
+	uw_update_reg_address (context, fs, UNW_REG_PSP);
+    }
+
+  /* Determine the location of the primary UNaT.  */
+  {
+    int i;
+    if (fs->when_target < fs->curr.reg[UNW_REG_PRI_UNAT_GR].when)
+      i = UNW_REG_PRI_UNAT_MEM;
+    else if (fs->when_target < fs->curr.reg[UNW_REG_PRI_UNAT_MEM].when)
+      i = UNW_REG_PRI_UNAT_GR;
+    else if (fs->curr.reg[UNW_REG_PRI_UNAT_MEM].when
+	     > fs->curr.reg[UNW_REG_PRI_UNAT_GR].when)
+      i = UNW_REG_PRI_UNAT_MEM;
+    else
+      i = UNW_REG_PRI_UNAT_GR;
+    uw_update_reg_address (context, fs, i);
+  }
+
+  /* Compute the addresses of all registers saved in this frame.  */
+  for (i = UNW_REG_BSP; i < UNW_NUM_REGS; ++i)
+    uw_update_reg_address (context, fs, i);
+
+  /* Unwind BSP for the local registers allocated this frame.  */
+  /* ??? What to do with stored BSP or BSPSTORE registers.  */
+  /* We assert that we are either at a call site, or we have
+     just unwound through a signal frame.  In either case
+     pfs_loc is valid.	*/
+  if (!(fs -> no_reg_stack_frame))
+    {
+      unw_word pfs = *context->pfs_loc;
+      unw_word sol = (pfs >> 7) & 0x7f;
+      context->bsp = (unw_word)
+	ia64_rse_skip_regs ((unw_word *) context->bsp, -sol);
+    }
+}
+
+static void
+uw_advance_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  uw_update_context (context, fs);
+}
+
+/* Fill in CONTEXT for top-of-stack.  The only valid registers at this
+   level will be the return address and the CFA.  Note that CFA = SP+16.  */
+   
+#define uw_init_context(CONTEXT)					\
+  do {									\
+    /* ??? There is a whole lot o code in uw_install_context that	\
+       tries to avoid spilling the entire machine state here.  We	\
+       should try to make that work again.  */				\
+    __builtin_unwind_init();						\
+    uw_init_context_1 (CONTEXT, __builtin_ia64_bsp ());			\
+  } while (0)
+
+static void __attribute__((noinline))
+uw_init_context_1 (struct _Unwind_Context *context, void *bsp)
+{
+  void *rp = __builtin_extract_return_addr (__builtin_return_address (0));
+  /* Set psp to the caller's stack pointer.  */
+  void *psp = __builtin_dwarf_cfa () - 16;
+  _Unwind_FrameState fs;
+  unw_word rnat, tmp1, tmp2;
+
+  /* Flush the register stack to memory so that we can access it.
+     Get rse nat collection for the last incomplete rbs chunk of
+     registers at the same time.  For this RSE needs to be turned
+     into the mandatory only mode.  */
+  asm ("mov.m %1 = ar.rsc;;\n\t"
+       "and %2 = 0x1c, %1;;\n\t"
+       "mov.m ar.rsc = %2;;\n\t"
+       "flushrs;;\n\t"
+       "mov.m %0 = ar.rnat;;\n\t"
+       "mov.m ar.rsc = %1\n\t"
+       : "=r" (rnat), "=r" (tmp1), "=r" (tmp2));
+
+  memset (context, 0, sizeof (struct _Unwind_Context));
+  context->bsp = (unw_word) bsp;
+  /* Set context->regstk_top to lowest rbs address which will use
+     context->rnat collection.  */
+  context->regstk_top = context->bsp & ~0x1ffULL;
+  context->rnat = rnat;
+  context->psp = (unw_word) psp;
+  context->rp = (unw_word) rp;
+  asm ("mov %0 = sp" : "=r" (context->sp));
+  asm ("mov %0 = pr" : "=r" (context->pr));
+  context->pri_unat_loc = &context->initial_unat;	/* ??? */
+
+  if (uw_frame_state_for (context, &fs) != _URC_NO_REASON)
+    abort ();
+
+  uw_update_context (context, &fs);
+}
+
+/* Install (i.e. longjmp to) the contents of TARGET.  */
+
+static void __attribute__((noreturn))
+uw_install_context (struct _Unwind_Context *current __attribute__((unused)),
+		    struct _Unwind_Context *target)
+{
+  unw_word ireg_buf[4], ireg_nat = 0, ireg_pr = 0;
+  unw_word saved_lc;
+  int i;
+
+  /* ??? LC is a fixed register so the call to __builtin_unwind_init in
+     uw_init_context doesn't cause it to be saved.  In case it isn't in
+     the user frames either, we need to manually do so here, lest it be
+     clobbered by the loop just below.  */
+  if (target->lc_loc == NULL)
+    {
+      register unw_word lc asm ("ar.lc");
+      saved_lc = lc;
+      target->lc_loc = &saved_lc;
+    }
+
+  /* Copy integer register data from the target context to a
+     temporary buffer.  Do this so that we can frob AR.UNAT
+     to get the NaT bits for these registers set properly.  */
+  for (i = 4; i <= 7; ++i)
+    {
+      char nat;
+      void *t = target->ireg[i - 2].loc;
+      if (t)
+	{
+	  unw_access_gr (target, i, &ireg_buf[i - 4], &nat, 0);
+          ireg_nat |= (unw_word)nat << (((size_t)&ireg_buf[i - 4] >> 3) & 0x3f);
+	  /* Set p6 - p9.  */
+	  ireg_pr |= 4L << i;
+	}
+    }
+
+  /* The value in uc_bsp that we've computed is that for the 
+     target function.  The value that we install below will be
+     adjusted by the BR.RET instruction based on the contents
+     of AR.PFS.  So we must unadjust that here.  */
+  target->bsp = (unw_word)
+    ia64_rse_skip_regs ((unw_word *)target->bsp,
+			(*target->pfs_loc >> 7) & 0x7f);
+
+  if (target->bsp < target->regstk_top)
+    target->rnat = *ia64_rse_rnat_addr ((unw_word *) target->bsp);
+
+  /* Provide assembly with the offsets into the _Unwind_Context.  */
+  asm volatile ("uc_rnat = %0"
+		: : "i"(offsetof (struct _Unwind_Context, rnat)));
+  asm volatile ("uc_bsp = %0"
+		: : "i"(offsetof (struct _Unwind_Context, bsp)));
+  asm volatile ("uc_psp = %0"
+		: : "i"(offsetof (struct _Unwind_Context, psp)));
+  asm volatile ("uc_rp = %0"
+		: : "i"(offsetof (struct _Unwind_Context, rp)));
+  asm volatile ("uc_pr = %0"
+		: : "i"(offsetof (struct _Unwind_Context, pr)));
+  asm volatile ("uc_gp = %0"
+		: : "i"(offsetof (struct _Unwind_Context, gp)));
+  asm volatile ("uc_pfs_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, pfs_loc)));
+  asm volatile ("uc_unat_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, unat_loc)));
+  asm volatile ("uc_lc_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, lc_loc)));
+  asm volatile ("uc_fpsr_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, fpsr_loc)));
+  asm volatile ("uc_eh_data = %0"
+		: : "i"(offsetof (struct _Unwind_Context, eh_data)));
+  asm volatile ("uc_br_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, br_loc)));
+  asm volatile ("uc_fr_loc = %0"
+		: : "i"(offsetof (struct _Unwind_Context, fr_loc)));
+
+  asm volatile (
+	/* Load up call-saved non-window integer registers from ireg_buf.  */
+	"add r20 = 8, %1			\n\t"
+	"mov ar.unat = %2			\n\t"
+	"mov pr = %3, 0x3c0			\n\t"
+	";;					\n\t"
+	"(p6) ld8.fill r4 = [%1]		\n\t"
+	"(p7) ld8.fill r5 = [r20]		\n\t"
+	"add r21 = uc_br_loc + 16, %0		\n\t"
+	"adds %1 = 16, %1			\n\t"
+	"adds r20 = 16, r20			\n\t"
+	";;					\n\t"
+	"(p8) ld8.fill r6 = [%1]		\n\t"
+	"(p9) ld8.fill r7 = [r20]		\n\t"
+	"add r20 = uc_br_loc + 8, %0		\n\t"
+	";;					\n\t"
+	/* Load up call-saved branch registers.  */
+	"ld8 r22 = [r20], 16			\n\t"
+	"ld8 r23 = [r21], 16			\n\t"
+	";;					\n\t"
+	"ld8 r24 = [r20], 16			\n\t"
+	"ld8 r25 = [r21], uc_fr_loc - (uc_br_loc + 32)\n\t"
+	";;					\n\t"
+	"ld8 r26 = [r20], uc_fr_loc + 8 - (uc_br_loc + 40)\n\t"
+	"ld8 r27 = [r21], 24			\n\t"
+	"cmp.ne p6, p0 = r0, r22		\n\t"
+	";;					\n\t"
+	"ld8 r28 = [r20], 8			\n\t"
+	"(p6) ld8 r22 = [r22]			\n\t"
+	"cmp.ne p7, p0 = r0, r23		\n\t"
+	";;					\n\t"
+	"(p7) ld8 r23 = [r23]			\n\t"
+	"cmp.ne p8, p0 = r0, r24		\n\t"
+	";;					\n\t"
+	"(p8) ld8 r24 = [r24]			\n\t"
+	"(p6) mov b1 = r22			\n\t"
+	"cmp.ne p9, p0 = r0, r25		\n\t"
+	";;					\n\t"
+	"(p9) ld8 r25 = [r25]			\n\t"
+	"(p7) mov b2 = r23			\n\t"
+	"cmp.ne p6, p0 = r0, r26		\n\t"
+	";;					\n\t"
+	"(p6) ld8 r26 = [r26]			\n\t"
+	"(p8) mov b3 = r24			\n\t"
+	"cmp.ne p7, p0 = r0, r27		\n\t"
+	";;					\n\t"
+	/* Load up call-saved fp registers.  */
+	"(p7) ldf.fill f2 = [r27]		\n\t"
+	"(p9) mov b4 = r25			\n\t"
+	"cmp.ne p8, p0 = r0, r28		\n\t"
+	";;					\n\t"
+	"(p8) ldf.fill f3 = [r28]		\n\t"
+	"(p6) mov b5 = r26			\n\t"
+	";;					\n\t"
+	"ld8 r29 = [r20], 16*8 - 4*8		\n\t"
+	"ld8 r30 = [r21], 17*8 - 5*8		\n\t"
+	";;					\n\t"
+	"ld8 r22 = [r20], 16			\n\t"
+	"ld8 r23 = [r21], 16			\n\t"
+	";;					\n\t"
+	"ld8 r24 = [r20], 16			\n\t"
+	"ld8 r25 = [r21]			\n\t"
+	"cmp.ne p6, p0 = r0, r29		\n\t"
+	";;					\n\t"
+	"ld8 r26 = [r20], 8			\n\t"
+	"(p6) ldf.fill f4 = [r29]		\n\t"
+	"cmp.ne p7, p0 = r0, r30		\n\t"
+	";;					\n\t"
+	"ld8 r27 = [r20], 8			\n\t"
+	"(p7) ldf.fill f5 = [r30]		\n\t"
+	"cmp.ne p6, p0 = r0, r22		\n\t"
+	";;					\n\t"
+	"ld8 r28 = [r20], 8			\n\t"
+	"(p6) ldf.fill f16 = [r22]		\n\t"
+	"cmp.ne p7, p0 = r0, r23		\n\t"
+	";;					\n\t"
+	"ld8 r29 = [r20], 8			\n\t"
+	"(p7) ldf.fill f17 = [r23]		\n\t"
+	"cmp.ne p6, p0 = r0, r24		\n\t"
+	";;					\n\t"
+	"ld8 r22 = [r20], 8			\n\t"
+	"(p6) ldf.fill f18 = [r24]		\n\t"
+	"cmp.ne p7, p0 = r0, r25		\n\t"
+	";;					\n\t"
+	"ld8 r23 = [r20], 8			\n\t"
+	"(p7) ldf.fill f19 = [r25]		\n\t"
+	"cmp.ne p6, p0 = r0, r26		\n\t"
+	";;					\n\t"
+	"ld8 r24 = [r20], 8			\n\t"
+	"(p6) ldf.fill f20 = [r26]		\n\t"
+	"cmp.ne p7, p0 = r0, r27		\n\t"
+	";;					\n\t"
+	"ld8 r25 = [r20], 8			\n\t"
+	"(p7) ldf.fill f21 = [r27]		\n\t"
+	"cmp.ne p6, p0 = r0, r28		\n\t"
+	";;					\n\t"
+	"ld8 r26 = [r20], 8			\n\t"
+	"(p6) ldf.fill f22 = [r28]		\n\t"
+	"cmp.ne p7, p0 = r0, r29		\n\t"
+	";;					\n\t"
+	"ld8 r27 = [r20], 8			\n\t"
+	";;					\n\t"
+	"ld8 r28 = [r20], 8			\n\t"
+	"(p7) ldf.fill f23 = [r29]		\n\t"
+	"cmp.ne p6, p0 = r0, r22		\n\t"
+	";;					\n\t"
+	"ld8 r29 = [r20], 8			\n\t"
+	"(p6) ldf.fill f24 = [r22]		\n\t"
+	"cmp.ne p7, p0 = r0, r23		\n\t"
+	";;					\n\t"
+	"(p7) ldf.fill f25 = [r23]		\n\t"
+	"cmp.ne p6, p0 = r0, r24		\n\t"
+	"cmp.ne p7, p0 = r0, r25		\n\t"
+	";;					\n\t"
+	"(p6) ldf.fill f26 = [r24]		\n\t"
+	"(p7) ldf.fill f27 = [r25]		\n\t"
+	"cmp.ne p6, p0 = r0, r26		\n\t"
+	";;					\n\t"
+	"(p6) ldf.fill f28 = [r26]		\n\t"
+	"cmp.ne p7, p0 = r0, r27		\n\t"
+	"cmp.ne p6, p0 = r0, r28		\n\t"
+	";;					\n\t"
+	"(p7) ldf.fill f29 = [r27]		\n\t"
+	"(p6) ldf.fill f30 = [r28]		\n\t"
+	"cmp.ne p7, p0 = r0, r29		\n\t"
+	";;					\n\t"
+	"(p7) ldf.fill f31 = [r29]		\n\t"
+	"add r20 = uc_rnat, %0			\n\t"
+	"add r21 = uc_bsp, %0			\n\t"
+	";;					\n\t"
+	/* Load the balance of the thread state from the context.  */
+	"ld8 r22 = [r20], uc_psp - uc_rnat	\n\t"
+	"ld8 r23 = [r21], uc_gp - uc_bsp	\n\t"
+	";;					\n\t"
+	"ld8 r24 = [r20], uc_pfs_loc - uc_psp	\n\t"
+	"ld8 r1 = [r21], uc_rp - uc_gp		\n\t"
+	";;					\n\t"
+	"ld8 r25 = [r20], uc_unat_loc - uc_pfs_loc\n\t"
+	"ld8 r26 = [r21], uc_pr - uc_rp		\n\t"
+	";;					\n\t"
+	"ld8 r27 = [r20], uc_lc_loc - uc_unat_loc\n\t"
+	"ld8 r28 = [r21], uc_fpsr_loc - uc_pr	\n\t"
+	";;					\n\t"
+	"ld8 r29 = [r20], uc_eh_data - uc_lc_loc\n\t"
+	"ld8 r30 = [r21], uc_eh_data + 8 - uc_fpsr_loc\n\t"
+	";;					\n\t"
+	/* Load data for the exception handler.  */
+	"ld8 r15 = [r20], 16			\n\t"
+	"ld8 r16 = [r21], 16			\n\t"
+	";;					\n\t"
+	"ld8 r17 = [r20]			\n\t"
+	"ld8 r18 = [r21]			\n\t"
+	";;					\n\t"
+	/* Install the balance of the thread state loaded above.  */
+	"cmp.ne p6, p0 = r0, r25		\n\t"
+	"cmp.ne p7, p0 = r0, r27		\n\t"
+	";;					\n\t"
+	"(p6) ld8 r25 = [r25]			\n\t"
+	"(p7) ld8 r27 = [r27]			\n\t"
+	";;					\n\t"
+	"(p7) mov.m ar.unat = r27		\n\t"
+	"(p6) mov.i ar.pfs = r25		\n\t"
+	"cmp.ne p9, p0 = r0, r29		\n\t"
+	";;					\n\t"
+	"(p9) ld8 r29 = [r29]			\n\t"
+	"cmp.ne p6, p0 = r0, r30		\n\t"
+	";;					\n\t"
+	"(p6) ld8 r30 = [r30]			\n\t"
+	/* Don't clobber p6-p9, which are in use at present.  */
+	"mov pr = r28, ~0x3c0			\n\t"
+	"(p9) mov.i ar.lc = r29			\n\t"
+	";;					\n\t"
+	"mov.m r25 = ar.rsc			\n\t"
+	"(p6) mov.m ar.fpsr = r30		\n\t"
+	";;					\n\t"
+	"and r29 = 0x1c, r25			\n\t"
+	"mov b0 = r26				\n\t"
+	";;					\n\t"
+	"mov.m ar.rsc = r29			\n\t"
+	";;					\n\t"
+	/* This must be done before setting AR.BSPSTORE, otherwise 
+	   AR.BSP will be initialized with a random displacement
+	   below the value we want, based on the current number of
+	   dirty stacked registers.  */
+	"loadrs					\n\t"
+	"invala					\n\t"
+	";;					\n\t"
+	"mov.m ar.bspstore = r23		\n\t"
+	";;					\n\t"
+	"mov.m ar.rnat = r22			\n\t"
+	";;					\n\t"
+	"mov.m ar.rsc = r25			\n\t"
+	"mov sp = r24				\n\t"
+	"br.ret.sptk.few b0"
+	: : "r"(target), "r"(ireg_buf), "r"(ireg_nat), "r"(ireg_pr)
+	: "r15", "r16", "r17", "r18", "r20", "r21", "r22",
+	  "r23", "r24", "r25", "r26", "r27", "r28", "r29",
+	  "r30", "r31");
+  /* NOTREACHED */
+  while (1);
+}
+
+static inline _Unwind_Ptr
+uw_identify_context (struct _Unwind_Context *context)
+{
+  return _Unwind_GetIP (context);
+}
+
+#include "unwind.inc"
+
+#if defined (USE_GAS_SYMVER) && defined (SHARED) && defined (USE_LIBUNWIND_EXCEPTIONS)
+alias (_Unwind_Backtrace);
+alias (_Unwind_DeleteException);
+alias (_Unwind_FindEnclosingFunction);
+alias (_Unwind_ForcedUnwind);
+alias (_Unwind_GetBSP);
+alias (_Unwind_GetCFA);
+alias (_Unwind_GetGR);
+alias (_Unwind_GetIP);
+alias (_Unwind_GetLanguageSpecificData);
+alias (_Unwind_GetRegionStart);
+alias (_Unwind_RaiseException);
+alias (_Unwind_Resume);
+alias (_Unwind_Resume_or_Rethrow);
+alias (_Unwind_SetGR);
+alias (_Unwind_SetIP);
+#endif
+
+#endif
diff --git a/gcc-4.9/libgcc/config/ia64/unwind-ia64.h b/gcc-4.9/libgcc/config/ia64/unwind-ia64.h
new file mode 100644
index 000000000..309a949b7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/unwind-ia64.h
@@ -0,0 +1,57 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Andrew MacLeod  <amacleod@cygnus.com>
+                  Andrew Haley  <aph@cygnus.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __VMS__
+/* On VMS, long is a 32 bit type.  */
+typedef unsigned long long unw_word;
+typedef long long unw_sword;
+#else
+typedef unsigned long unw_word;
+typedef long unw_sword;
+#endif
+
+struct unw_table_entry
+{
+  unw_word start_offset;
+  unw_word end_offset;
+  unw_word info_offset;
+};
+
+/* Accessors to fields of an unwind info block header.  In this common file to
+   be visible from all the units involved in a target implementation.  */
+   
+#ifndef __USING_SJLJ_EXCEPTIONS__
+#define UNW_VER(x)		((x) >> 48)
+#define UNW_FLAG_MASK		0x0000ffff00000000
+#define UNW_FLAG_OSMASK		0x0000f00000000000
+#define UNW_FLAG_EHANDLER(x)	((x) & 0x0000000100000000L)
+#define UNW_FLAG_UHANDLER(x)	((x) & 0x0000000200000000L)
+#define UNW_LENGTH(x)		((x) & 0x00000000ffffffffL)
+#endif
+
+extern struct unw_table_entry *
+_Unwind_FindTableEntry (void *pc, unw_word *segment_base,
+			unw_word *gp, struct unw_table_entry *ent)
+			__attribute__ ((__visibility__ ("hidden")));
diff --git a/gcc-4.9/libgcc/config/ia64/vms-crtinit.S b/gcc-4.9/libgcc/config/ia64/vms-crtinit.S
new file mode 100644
index 000000000..6df876210
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/vms-crtinit.S
@@ -0,0 +1,24 @@
+/* Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.global LIB$INITIALIZE#
diff --git a/gcc-4.9/libgcc/config/ia64/vms-unwind.h b/gcc-4.9/libgcc/config/ia64/vms-unwind.h
new file mode 100644
index 000000000..b0fe7e517
--- /dev/null
+++ b/gcc-4.9/libgcc/config/ia64/vms-unwind.h
@@ -0,0 +1,308 @@
+/* DWARF2 EH unwinding support for IA64 VMS.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define __NEW_STARLET
+#include <libicb.h>
+#include <chfdef.h>
+#include <lib_c/chfctxdef.h>
+#include <lib_c/intstkdef.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#define UNW_IVMS_MODE(HEADER) (((HEADER) >> 44) & 0x3L)
+#define MD_UNW_COMPATIBLE_PERSONALITY_P(HEADER) (!UNW_IVMS_MODE (HEADER))
+
+#define DYN$C_SSENTRY 66
+/* ??? would rather get the proper header file.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR ia64_vms_fallback_frame_state
+
+extern INVO_CONTEXT_BLK * LIB$I64_CREATE_INVO_CONTEXT (void);
+
+extern int LIB$I64_IS_EXC_DISPATCH_FRAME (void *);
+extern int LIB$I64_IS_AST_DISPATCH_FRAME (void *);
+
+extern int LIB$I64_INIT_INVO_CONTEXT (INVO_CONTEXT_BLK *, int, int);
+extern int LIB$I64_GET_CURR_INVO_CONTEXT (INVO_CONTEXT_BLK *);
+extern int LIB$I64_GET_PREV_INVO_CONTEXT (INVO_CONTEXT_BLK *);
+
+typedef unsigned int uint;
+typedef unsigned __int64 uw_reg;
+typedef uw_reg * uw_loc;
+
+typedef char fp_reg[16];
+
+#define DENOTES_VMS_DISPATCHER_FRAME(icb) \
+(LIB$I64_IS_EXC_DISPATCH_FRAME (&(icb)->libicb$ih_pc))
+
+#define DENOTES_BOTTOM_OF_STACK(icb) ((icb)->libicb$v_bottom_of_stack)
+
+#define FAIL_IF(COND) \
+   do { if (COND) { context->rp = 0; return _URC_END_OF_STACK; } } while (0)
+/* Clearing context->rp is required to prevent the ia64 gcc unwinder from
+   attempting to keep on walking the call chain.  */
+
+static int
+ia64_vms_fallback_frame_state (struct _Unwind_Context *context,
+			       _Unwind_FrameState *fs)
+{
+  int i, status;
+
+  INVO_CONTEXT_BLK local_icb;
+  INVO_CONTEXT_BLK *icb = &local_icb;
+    
+  CHFCTX * chfctx;
+  CHF$MECH_ARRAY * chfmech;
+  CHF64$SIGNAL_ARRAY *chfsig64;
+  INTSTK * intstk;
+
+  static int eh_debug = -1;
+  int try_bs_copy = 0;
+  /* Non zero to attempt copy of alternate backing store contents for
+     dirty partition in interrupted context. ??? Alpha code, only activated
+     on specific request via specific bit in EH_DEBUG.  */
+
+  if (eh_debug == -1)
+    {
+      char * EH_DEBUG = getenv ("EH_DEBUG");
+      const uint try_bs_copy_mask = (1 << 16);
+
+      eh_debug = EH_DEBUG ? atoi (EH_DEBUG) : 0;
+      
+      /* Fetch and clear the try_bs_copy bit.  */
+      try_bs_copy = (uint)eh_debug & try_bs_copy_mask;
+      eh_debug &= ~try_bs_copy_mask;
+    }
+
+  /* We're called to attempt unwinding through a frame for which no unwind
+     info is available, typical of an operating system exception dispatcher
+     frame.  The code below knows how to handle this case, and only this one,
+     returning a failure code if it finds it is not in this situation.
+
+     Note that we're called from deep down in the exception propagation call
+     chain, possibly below an exception dispatcher but for a frame above it
+     like some os entry point.  */
+
+  if (eh_debug)
+    printf ("FALLBACK - ctxt->rp=0x%lx, sp=0x%lx, psp=0x%lx, bsp=0x%lx\n",
+	    context->rp, context->sp, context->psp, context->bsp);
+
+  /* Step 0 :
+     -------------------------------------------------------------------------
+     VMS-unwind up until we reach a VMS dispatcher frame corresponding to the
+     context we are trying to unwind through. Fail if get past this context or
+     if we reach the bottom of stack along the way.
+     -------------------------------------------------------------------------
+  */
+
+  status = LIB$I64_INIT_INVO_CONTEXT (icb, LIBICB$K_INVO_CONTEXT_VERSION, 0);
+  FAIL_IF (status == 0);
+
+  status = LIB$I64_GET_CURR_INVO_CONTEXT (icb);
+
+  /* Beware: we might be unwinding through nested condition handlers, so the
+     dispatcher frame we seek might not be the first one on the way up.  Loop
+     thus.  */     
+  do {
+    
+    /* Seek the next dispatcher frame up the "current" point.  Stop if we
+       either get past the target context or hit the bottom-of-stack along
+       the way.  */
+    status = LIB$I64_GET_PREV_INVO_CONTEXT (icb);
+    FAIL_IF (status == 0);
+    FAIL_IF ((uw_reg)icb->libicb$ih_sp > (uw_reg)context->psp
+	     || DENOTES_BOTTOM_OF_STACK (icb));
+    
+    if (eh_debug)
+      printf ("frame%s sp @ 0x%llx, pc @ 0x%llx bsp=0x%llx\n",
+	      DENOTES_VMS_DISPATCHER_FRAME (icb) ? " (dispatcher)" : "",
+	      icb->libicb$ih_sp, icb->libicb$ih_pc, icb->libicb$ih_bsp);
+
+    /* Continue until the target frame is found.  */
+  } while ((uw_reg)icb->libicb$ih_bsp != (uw_reg)context->bsp);
+
+  /* If this is not a dispatcher frame, this is certainly a frame for a leaf
+     subprogram.  Use default unwind information.  */
+  if (! DENOTES_VMS_DISPATCHER_FRAME (icb))
+    return _URC_END_OF_STACK;
+
+  /* At this point, we know we are really trying to unwind past an exception
+     dispatcher frame, and have it described in ICB.  Proceed.  */
+
+  /* Step 1 :
+     ------------------------------------------------------------------------
+     We have the VMS dispatcher frame ICB handy and know we are trying to
+     unwind past it.  Fetch pointers to useful datastructures from there, then
+     unwind one step further up to the interrupted user context from which
+     some required values will be easily accessible.
+     ------------------------------------------------------------------------
+  */
+
+  chfctx = icb->libicb$ph_chfctx_addr;
+  FAIL_IF (chfctx == 0);
+  
+  chfmech = (CHF$MECH_ARRAY *)chfctx->chfctx$q_mcharglst;
+  FAIL_IF (chfmech == 0);
+
+  chfsig64 = (CHF64$SIGNAL_ARRAY *)chfmech->chf$ph_mch_sig64_addr;
+  FAIL_IF (chfsig64 == 0);
+ 
+  intstk = (INTSTK *)chfmech->chf$q_mch_esf_addr;
+  FAIL_IF (intstk == 0 || intstk->intstk$b_subtype == DYN$C_SSENTRY);
+
+  status = LIB$I64_GET_PREV_INVO_CONTEXT (icb);
+  FAIL_IF (status == 0);
+
+  if (eh_debug)
+    printf ("User frame, "
+	    "chfmech @ 0x%p, chfsig64 @ 0x%p, intstk @ 0x%p\n",
+	    chfmech, chfsig64, intstk);
+
+  /* Step 2 :
+     ------------------------------------------------------------------------
+     Point the GCC context locations/values required for further unwinding at
+     their corresponding locations/values in the datastructures at hand.
+     ------------------------------------------------------------------------
+  */
+
+  /* Static General Register locations, including scratch registers in case
+     the unwinder needs to refer to a value stored in one of them.  */
+  {
+    uw_reg * ctxregs = (uw_reg *)&intstk->intstk$q_regbase;
+
+    for (i = 2; i <= 3; i++)
+      context->ireg[i - 2].loc = (uw_loc)&ctxregs[i];
+    for (i = 8; i <= 11; i++)
+      context->ireg[i - 2].loc = (uw_loc)&ctxregs[i];
+    for (i = 14; i <= 31; i++)
+      context->ireg[i - 2].loc = (uw_loc)&ctxregs[i];
+  }
+
+  /* Static Floating Point Register locations, as available from the
+     mechargs array, which happens to include all the to be preserved
+     ones + others.  */
+  {
+    fp_reg * ctxregs;
+
+    ctxregs = (fp_reg *)&chfmech->chf$fh_mch_savf2;
+    for (i = 2; i <= 5 ; i++)
+      context->fr_loc[i - 2] = (uw_loc)&ctxregs[i - 2];
+
+    ctxregs = (fp_reg *)&chfmech->chf$fh_mch_savf12;
+    for (i = 12; i <= 31 ; i++)
+      context->fr_loc[i - 2] = (uw_loc)&ctxregs[i - 12];
+  }
+
+  /* Relevant application register locations.  */
+
+  context->fpsr_loc = (uw_loc)&intstk->intstk$q_fpsr;
+  context->lc_loc   = (uw_loc)&intstk->intstk$q_lc;
+  context->unat_loc = (uw_loc)&intstk->intstk$q_unat;
+
+  /* Branch register locations.  */
+  
+  {
+    uw_reg * ctxregs = (uw_reg *)&intstk->intstk$q_b0;
+
+    for (i = 0; i < 8; i++)
+      context->br_loc[i] = (uw_loc)&ctxregs[i];
+  }
+
+  /* Necessary register values.  */
+
+  /* ??? Still unclear if we need to account for possible flushes to an
+     alternate backing store (maybe the unwinding performed above did the
+     trick already) and how this would be handled.  Blind alpha tentative
+     below for experimentation purposes in malfunctioning cases.  */
+  {
+    uw_reg q_bsp      = (uw_reg) intstk->intstk$q_bsp;
+    uw_reg q_bspstore = (uw_reg) intstk->intstk$q_bspstore;
+    uw_reg q_bspbase  = (uw_reg) intstk->intstk$q_bspbase;
+    uw_reg ih_bspbase = (uw_reg) icb->libicb$ih_bspbase;
+    
+    if (eh_debug)
+      printf ("q_bspstore = 0x%lx, q_bsp = 0x%lx, q_bspbase = 0x%lx\n"
+	      "ih_bspbase = 0x%lx\n",
+	      q_bspstore, q_bsp, q_bspbase, ih_bspbase);
+
+    /* We witness many situations where q_bspbase is set while ih_bspbase is
+       null, and every attempt made with q_bspbase badly failed while doing
+       nothing resulted in proper behavior.  */
+    if (q_bspstore < q_bsp && ih_bspbase && try_bs_copy)
+      {
+	uw_reg dirty_size = q_bsp - q_bspstore;
+	uw_reg q_rnat = (uw_reg) intstk->intstk$q_rnat;
+
+	if (eh_debug)
+	  printf ("Attempting an alternate backing store copy ...\n");
+
+	ia64_copy_rbs
+	  (context, q_bspstore, ih_bspbase, dirty_size, q_rnat);
+	/* Not clear if these are the proper arguments here.  This is what
+	   looked the closest to what is performed in the Linux case.  */
+      }
+    
+  }
+
+  context->bsp = (uw_reg)intstk->intstk$q_bsp;
+  fs->no_reg_stack_frame = 1;
+
+  context->pr  = (uw_reg)intstk->intstk$q_preds;
+  context->gp  = (uw_reg)intstk->intstk$q_gp;
+
+  /* We're directly setting up the "context" for a VMS exception handler.
+     The "previous SP" for it is the SP upon the handler's entry, that is
+     the SP at the condition/interruption/exception point.  */  
+  context->psp = (uw_reg)icb->libicb$ih_sp;
+
+  /* Previous Frame State location.  What eventually ends up in pfs_loc is
+     installed with ar.pfs = pfs_loc; br.ret; so setup to target intstk->q_ifs
+     to have the interrupted context restored and not that of its caller if
+     we happen to have a handler in the interrupted context itself.  */
+  fs->curr.reg[UNW_REG_PFS].where = UNW_WHERE_PSPREL;
+  fs->curr.reg[UNW_REG_PFS].val
+    = (uw_reg)&intstk->intstk$q_ifs - (uw_reg)context->psp;
+  fs->curr.reg[UNW_REG_PFS].when = -1;
+
+  /* If we need to unwind further up, past the interrupted context, we need to
+     hand out the interrupted context's pfs, still.  */
+  context->signal_pfs_loc = (uw_loc) &intstk->intstk$q_pfs;
+
+  /* Finally, rules for RP .  */
+  {
+    uw_reg * post_sigarray
+      = (uw_reg *)chfsig64 + 1 + chfsig64->chf64$l_sig_args;
+
+    uw_reg * ih_pc_loc = post_sigarray - 2;
+
+    fs->curr.reg[UNW_REG_RP].where = UNW_WHERE_PSPREL;
+    fs->curr.reg[UNW_REG_RP].val
+      = (uw_reg)ih_pc_loc - (uw_reg)context->psp;
+    fs->curr.reg[UNW_REG_RP].when = -1;
+  }
+
+  return _URC_NO_REASON;
+}
+     
diff --git a/gcc-4.9/libgcc/config/iq2000/lib2funcs.c b/gcc-4.9/libgcc/config/iq2000/lib2funcs.c
new file mode 100644
index 000000000..91af00ed4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/iq2000/lib2funcs.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2003-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef unsigned int USItype		__attribute__ ((mode (SI)));
+
+USItype
+__mulsi3 (USItype a, USItype b)
+{
+  USItype c = 0;
+
+  while (a != 0)
+    {
+      if (a & 1)
+	c += b;
+      a >>= 1;
+      b <<= 1;
+    }
+
+  return c;
+}
diff --git a/gcc-4.9/libgcc/config/iq2000/t-iq2000 b/gcc-4.9/libgcc/config/iq2000/t-iq2000
new file mode 100644
index 000000000..18fd53c37
--- /dev/null
+++ b/gcc-4.9/libgcc/config/iq2000/t-iq2000
@@ -0,0 +1,5 @@
+LIB2ADD = $(srcdir)/udivmod.c \
+	  $(srcdir)/divmod.c \
+	  $(srcdir)/udivmodsi4.c \
+	  $(srcdir)/config/iq2000/lib2funcs.c
+
diff --git a/gcc-4.9/libgcc/config/libbid/ChangeLog b/gcc-4.9/libgcc/config/libbid/ChangeLog
new file mode 100644
index 000000000..787dfd0d3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/ChangeLog
@@ -0,0 +1,376 @@
+2014-01-02  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	Update copyright years
+
+2012-11-04  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* bid_functions.h: Check for __GLIBC__ additionally to LINUX when
+	defining format specifiers.
+
+2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* bid128_fromstring.c: Removed.
+
+	* bid_dpd.c: New from libbid 2007-09-26.
+	* bid128_to_int16.c: Likewise.
+	* bid128_to_int8.c: Likewise.
+	* bid128_to_uint8.c: Likewise.
+	* bid128_to_uint16.c: Likewise.
+	* bid64_to_int16.c: Likewise.
+	* bid64_to_int8.c: Likewise.
+	* bid64_to_uint16.c: Likewise.
+	* bid64_to_uint8.c: Likewise.
+
+	* bid128_2_str.h: Updated from libbid 2007-09-26.
+	* bid128_2_str_macros.h: Likewise.
+	* bid128_2_str_tables.c: Likewise.
+	* bid128_add.c: Likewise.
+	* bid128.c: Likewise.
+	* bid128_compare.c: Likewise.
+	* bid128_div.c: Likewise.
+	* bid128_fma.c: Likewise.
+	* bid128_logb.c: Likewise.
+	* bid128_minmax.c: Likewise.
+	* bid128_mul.c: Likewise.
+	* bid128_next.c: Likewise.
+	* bid128_noncomp.c: Likewise.
+	* bid128_quantize.c: Likewise.
+	* bid128_rem.c: Likewise.
+	* bid128_round_integral.c: Likewise.
+	* bid128_scalb.c: Likewise.
+	* bid128_sqrt.c: Likewise.
+	* bid128_string.c: Likewise.
+	* bid128_to_int32.c: Likewise.
+	* bid128_to_int64.c: Likewise.
+	* bid128_to_uint32.c: Likewise.
+	* bid128_to_uint64.c: Likewise.
+	* bid32_to_bid128.c: Likewise.
+	* bid32_to_bid64.c: Likewise.
+	* bid64_add.c: Likewise.
+	* bid64_compare.c: Likewise.
+	* bid64_div.c: Likewise.
+	* bid64_fma.c: Likewise.
+	* bid64_logb.c: Likewise.
+	* bid64_minmax.c: Likewise.
+	* bid64_mul.c: Likewise.
+	* bid64_next.c: Likewise.
+	* bid64_noncomp.c: Likewise.
+	* bid64_quantize.c: Likewise.
+	* bid64_rem.c: Likewise.
+	* bid64_round_integral.c: Likewise.
+	* bid64_scalb.c: Likewise.
+	* bid64_sqrt.c: Likewise.
+	* bid64_string.c: Likewise.
+	* bid64_to_bid128.c: Likewise.
+	* bid64_to_int32.c: Likewise.
+	* bid64_to_int64.c: Likewise.
+	* bid64_to_uint32.c: Likewise.
+	* bid64_to_uint64.c: Likewise.
+	* bid_b2d.h: Likewise.
+	* bid_binarydecimal.c: Likewise.
+	* bid_conf.h: Likewise.
+	* bid_convert_data.c: Likewise.
+	* bid_decimal_data.c: Likewise.
+	* bid_decimal_globals.c: Likewise.
+	* bid_div_macros.h: Likewise.
+	* bid_flag_operations.c: Likewise.
+	* bid_from_int.c: Likewise.
+	* bid_functions.h: Likewise.
+	* bid_gcc_intrinsics.h: Likewise.
+	* bid_inline_add.h: Likewise.
+	* bid_internal.h: Likewise.
+	* bid_round.c: Likewise.
+	* bid_sqrt_macros.h: Likewise.
+	* _addsub_dd.c: Likewise.
+	* _addsub_sd.c: Likewise.
+	* _addsub_td.c: Likewise.
+	* _dd_to_df.c: Likewise.
+	* _dd_to_di.c: Likewise.
+	* _dd_to_sd.c: Likewise.
+	* _dd_to_sf.c: Likewise.
+	* _dd_to_si.c: Likewise.
+	* _dd_to_td.c: Likewise.
+	* _dd_to_tf.c: Likewise.
+	* _dd_to_udi.c: Likewise.
+	* _dd_to_usi.c: Likewise.
+	* _dd_to_xf.c: Likewise.
+	* _df_to_dd.c: Likewise.
+	* _df_to_sd.c: Likewise.
+	* _df_to_td.c: Likewise.
+	* _di_to_dd.c: Likewise.
+	* _di_to_sd.c: Likewise.
+	* _di_to_td.c: Likewise.
+	* _div_dd.c: Likewise.
+	* _div_sd.c: Likewise.
+	* _div_td.c: Likewise.
+	* _eq_dd.c: Likewise.
+	* _eq_sd.c: Likewise.
+	* _eq_td.c: Likewise.
+	* _ge_dd.c: Likewise.
+	* _ge_sd.c: Likewise.
+	* _ge_td.c: Likewise.
+	* _gt_dd.c: Likewise.
+	* _gt_sd.c: Likewise.
+	* _gt_td.c: Likewise.
+	* _isinfd128.c: Likewise.
+	* _isinfd32.c: Likewise.
+	* _isinfd64.c: Likewise.
+	* _le_dd.c: Likewise.
+	* _le_sd.c: Likewise.
+	* _le_td.c: Likewise.
+	* _lt_dd.c: Likewise.
+	* _lt_sd.c: Likewise.
+	* _lt_td.c: Likewise.
+	* _mul_dd.c: Likewise.
+	* _mul_sd.c: Likewise.
+	* _mul_td.c: Likewise.
+	* _ne_dd.c: Likewise.
+	* _ne_sd.c: Likewise.
+	* _ne_td.c: Likewise.
+	* _sd_to_dd.c: Likewise.
+	* _sd_to_df.c: Likewise.
+	* _sd_to_di.c: Likewise.
+	* _sd_to_sf.c: Likewise.
+	* _sd_to_si.c: Likewise.
+	* _sd_to_td.c: Likewise.
+	* _sd_to_tf.c: Likewise.
+	* _sd_to_udi.c: Likewise.
+	* _sd_to_usi.c: Likewise.
+	* _sd_to_xf.c: Likewise.
+	* _sf_to_dd.c: Likewise.
+	* _sf_to_sd.c: Likewise.
+	* _sf_to_td.c: Likewise.
+	* _si_to_dd.c: Likewise.
+	* _si_to_sd.c: Likewise.
+	* _si_to_td.c: Likewise.
+	* _td_to_dd.c: Likewise.
+	* _td_to_df.c: Likewise.
+	* _td_to_di.c: Likewise.
+	* _td_to_sd.c: Likewise.
+	* _td_to_sf.c: Likewise.
+	* _td_to_si.c: Likewise.
+	* _td_to_tf.c: Likewise.
+	* _td_to_udi.c: Likewise.
+	* _td_to_usi.c: Likewise.
+	* _td_to_xf.c: Likewise.
+	* _tf_to_dd.c: Likewise.
+	* _tf_to_sd.c: Likewise.
+	* _tf_to_td.c: Likewise.
+	* _udi_to_dd.c: Likewise.
+	* _udi_to_sd.c: Likewise.
+	* _udi_to_td.c: Likewise.
+	* _unord_dd.c: Likewise.
+	* _unord_sd.c: Likewise.
+	* _unord_td.c: Likewise.
+	* _usi_to_dd.c: Likewise.
+	* _usi_to_sd.c: Likewise.
+	* _usi_to_td.c: Likewise.
+	* _xf_to_dd.c: Likewise.
+	* _xf_to_sd.c: Likewise.
+	* _xf_to_td.c: Likewise.
+
+2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* b2d.h: Renamed to ...
+	* bid_b2d.h: This.
+
+	* bid128_to_string.c: Renamed to ...
+	* bid128_string.c: This.
+
+	* bid_intrinsics.h: Renamed to ...
+	* bid_gcc_intrinsics.h: This.
+
+	* bid_string.c: Renamed to ...
+	* bid64_string.c: This.
+
+	* binarydecimal.c: Renamed to ...
+	* bid_decimal_globals.c: This.
+
+	* convert_data.c: Renamed to ...
+	* bid_convert_data.c: This.
+
+	* decimal_data.c: Renamed to ...
+	* bid_decimal_data.c: This.
+
+	* decimal_globals.c: Renamed to ...
+	* bid_decimal_globals.c: This.
+
+	* div_macros.h: Renamed to ...
+	* bid_div_macros.h: This.
+
+	* inline_bid_add.h: Renamed to ...
+	* bid_inline_add.h: This.
+
+	* sqrt_macros.h: Renamed to ...
+	* bid_sqrt_macros.h: This.
+
+2007-07-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+	Updated from Intel BID library:
+	* bid_conf.h (BID_THREAD): Defined only if both HAVE_CC_TLS
+	and USE_TLS are defined.
+
+2007-07-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	Updated from Intel BID library:
+	* bid_conf.h (BID_THREAD): Defined.
+	(__bid_IDEC_glbround): Add BID_THREAD in declaration.
+	(__bid_IDEC_glbflags): Likewise.
+
+	* decimal_globals.c (__bid_IDEC_glbround): Add BID_THREAD in
+	declaration.
+	(__bid_IDEC_glbflags): Likewise.
+
+2007-07-04  Marius Cornea  <marius.cornea@intel.com>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* _addsub_dd.c: New file from Intel BID library.
+	* _addsub_sd.c: Likewise.
+	* _addsub_td.c: Likewise.
+	* _dd_to_df.c: Likewise.
+	* _dd_to_di.c: Likewise.
+	* _dd_to_sd.c: Likewise.
+	* _dd_to_sf.c: Likewise.
+	* _dd_to_si.c: Likewise.
+	* _dd_to_td.c: Likewise.
+	* _dd_to_tf.c: Likewise.
+	* _dd_to_udi.c: Likewise.
+	* _dd_to_usi.c: Likewise.
+	* _dd_to_xf.c: Likewise.
+	* _df_to_dd.c: Likewise.
+	* _df_to_sd.c: Likewise.
+	* _df_to_td.c: Likewise.
+	* _di_to_dd.c: Likewise.
+	* _di_to_sd.c: Likewise.
+	* _di_to_td.c: Likewise.
+	* _div_dd.c: Likewise.
+	* _div_sd.c: Likewise.
+	* _div_td.c: Likewise.
+	* _eq_dd.c: Likewise.
+	* _eq_sd.c: Likewise.
+	* _eq_td.c: Likewise.
+	* _ge_dd.c: Likewise.
+	* _ge_sd.c: Likewise.
+	* _ge_td.c: Likewise.
+	* _gt_dd.c: Likewise.
+	* _gt_sd.c: Likewise.
+	* _gt_td.c: Likewise.
+	* _isinfd128.c: Likewise.
+	* _isinfd32.c: Likewise.
+	* _isinfd64.c: Likewise.
+	* _le_dd.c: Likewise.
+	* _le_sd.c: Likewise.
+	* _le_td.c: Likewise.
+	* _lt_dd.c: Likewise.
+	* _lt_sd.c: Likewise.
+	* _lt_td.c: Likewise.
+	* _mul_dd.c: Likewise.
+	* _mul_sd.c: Likewise.
+	* _mul_td.c: Likewise.
+	* _ne_dd.c: Likewise.
+	* _ne_sd.c: Likewise.
+	* _ne_td.c: Likewise.
+	* _sd_to_dd.c: Likewise.
+	* _sd_to_df.c: Likewise.
+	* _sd_to_di.c: Likewise.
+	* _sd_to_sf.c: Likewise.
+	* _sd_to_si.c: Likewise.
+	* _sd_to_td.c: Likewise.
+	* _sd_to_tf.c: Likewise.
+	* _sd_to_udi.c: Likewise.
+	* _sd_to_usi.c: Likewise.
+	* _sd_to_xf.c: Likewise.
+	* _sf_to_dd.c: Likewise.
+	* _sf_to_sd.c: Likewise.
+	* _sf_to_td.c: Likewise.
+	* _si_to_dd.c: Likewise.
+	* _si_to_sd.c: Likewise.
+	* _si_to_td.c: Likewise.
+	* _td_to_dd.c: Likewise.
+	* _td_to_df.c: Likewise.
+	* _td_to_di.c: Likewise.
+	* _td_to_sd.c: Likewise.
+	* _td_to_sf.c: Likewise.
+	* _td_to_si.c: Likewise.
+	* _td_to_tf.c: Likewise.
+	* _td_to_udi.c: Likewise.
+	* _td_to_usi.c: Likewise.
+	* _td_to_xf.c: Likewise.
+	* _tf_to_dd.c: Likewise.
+	* _tf_to_sd.c: Likewise.
+	* _tf_to_td.c: Likewise.
+	* _udi_to_dd.c: Likewise.
+	* _udi_to_sd.c: Likewise.
+	* _udi_to_td.c: Likewise.
+	* _unord_dd.c: Likewise.
+	* _unord_sd.c: Likewise.
+	* _unord_td.c: Likewise.
+	* _usi_to_dd.c: Likewise.
+	* _usi_to_sd.c: Likewise.
+	* _usi_to_td.c: Likewise.
+	* _xf_to_dd.c: Likewise.
+	* _xf_to_sd.c: Likewise.
+	* _xf_to_td.c: Likewise.
+
+2007-07-04  Marius Cornea  <marius.cornea@intel.com>
+
+	* b2d.h: New file from Intel BID library.
+	* bid128_2_str.h: Likewise.
+	* bid128_2_str_macros.h: Likewise.
+	* bid128_2_str_tables.c: Likewise.
+	* bid128_add.c: Likewise.
+	* bid128.c: Likewise.
+	* bid128_compare.c: Likewise.
+	* bid128_div.c: Likewise.
+	* bid128_fma.c: Likewise.
+	* bid128_fromstring.c: Likewise.
+	* bid128_logb.c: Likewise.
+	* bid128_minmax.c: Likewise.
+	* bid128_mul.c: Likewise.
+	* bid128_next.c: Likewise.
+	* bid128_noncomp.c: Likewise.
+	* bid128_quantize.c: Likewise.
+	* bid128_rem.c: Likewise.
+	* bid128_round_integral.c: Likewise.
+	* bid128_scalb.c: Likewise.
+	* bid128_sqrt.c: Likewise.
+	* bid128_to_int32.c: Likewise.
+	* bid128_to_int64.c: Likewise.
+	* bid128_to_string.c: Likewise.
+	* bid128_to_uint32.c: Likewise.
+	* bid128_to_uint64.c: Likewise.
+	* bid32_to_bid128.c: Likewise.
+	* bid32_to_bid64.c: Likewise.
+	* bid64_add.c: Likewise.
+	* bid64_compare.c: Likewise.
+	* bid64_div.c: Likewise.
+	* bid64_fma.c: Likewise.
+	* bid64_logb.c: Likewise.
+	* bid64_minmax.c: Likewise.
+	* bid64_mul.c: Likewise.
+	* bid64_next.c: Likewise.
+	* bid64_noncomp.c: Likewise.
+	* bid64_quantize.c: Likewise.
+	* bid64_rem.c: Likewise.
+	* bid64_round_integral.c: Likewise.
+	* bid64_scalb.c: Likewise.
+	* bid64_sqrt.c: Likewise.
+	* bid64_to_bid128.c: Likewise.
+	* bid64_to_int32.c: Likewise.
+	* bid64_to_int64.c: Likewise.
+	* bid64_to_uint32.c: Likewise.
+	* bid64_to_uint64.c: Likewise.
+	* bid_conf.h: Likewise.
+	* bid_flag_operations.c: Likewise.
+	* bid_from_int.c: Likewise.
+	* bid_functions.h: Likewise.
+	* bid_internal.h: Likewise.
+	* bid_round.c: Likewise.
+	* bid_string.c: Likewise.
+	* binarydecimal.c: Likewise.
+	* convert_data.c: Likewise.
+	* decimal_data.c: Likewise.
+	* decimal_globals.c: Likewise.
+	* div_macros.h: Likewise.
+	* inline_bid_add.h: Likewise.
+	* sqrt_macros.h: Likewise.
diff --git a/gcc-4.9/libgcc/config/libbid/_addsub_dd.c b/gcc-4.9/libgcc/config/libbid/_addsub_dd.c
new file mode 100644
index 000000000..579f11475
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_addsub_dd.c
@@ -0,0 +1,46 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_adddd3 (_Decimal64 x, _Decimal64 y) {
+  union decimal64 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid64_add (ux.i, uy.i);
+  return (res.d);
+}
+
+_Decimal64
+__bid_subdd3 (_Decimal64 x, _Decimal64 y) {
+  union decimal64 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid64_sub (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_addsub_sd.c b/gcc-4.9/libgcc/config/libbid/_addsub_sd.c
new file mode 100644
index 000000000..7b686f075
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_addsub_sd.c
@@ -0,0 +1,54 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_addsd3 (_Decimal32 x, _Decimal32 y) {
+  UINT64 x64, y64, res64;
+  union decimal32 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res64 = __bid64_add (x64, y64);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
+
+_Decimal32
+__bid_subsd3 (_Decimal32 x, _Decimal32 y) {
+  UINT64 x64, y64, res64;
+  union decimal32 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res64 = __bid64_sub (x64, y64);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_addsub_td.c b/gcc-4.9/libgcc/config/libbid/_addsub_td.c
new file mode 100644
index 000000000..04bf2b69b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_addsub_td.c
@@ -0,0 +1,46 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h" 
+
+_Decimal128
+__bid_addtd3 (_Decimal128 x, _Decimal128 y) {
+  union decimal128 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid128_add (ux.i, uy.i);
+  return (res.d);
+}
+
+_Decimal128
+__bid_subtd3 (_Decimal128 x, _Decimal128 y) {
+  union decimal128 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid128_sub (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_df.c b/gcc-4.9/libgcc/config/libbid/_dd_to_df.c
new file mode 100644
index 000000000..946aea1ca
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_df.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DFtype
+__bid_truncdddf (_Decimal64 x) {
+  DFtype res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_binary64 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_di.c b/gcc-4.9/libgcc/config/libbid/_dd_to_di.c
new file mode 100644
index 000000000..4de9daa8e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_di.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DItype
+__bid_fixdddi (_Decimal64 x) {
+  DItype res = 0xbaddbaddbaddbaddull;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_int64_xint (ux.i);
+
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_sd.c b/gcc-4.9/libgcc/config/libbid/_dd_to_sd.c
new file mode 100644
index 000000000..10d616f29
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal32
+__bid_truncddsd2 (_Decimal64 x) {
+  union decimal32 res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res.i = __bid64_to_bid32 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_sf.c b/gcc-4.9/libgcc/config/libbid/_dd_to_sf.c
new file mode 100644
index 000000000..bf69dee95
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_sf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SFtype
+__bid_truncddsf (_Decimal64 x) {
+  SFtype res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_binary32 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_si.c b/gcc-4.9/libgcc/config/libbid/_dd_to_si.c
new file mode 100644
index 000000000..aa6ca3f93
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_si.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SItype
+__bid_fixddsi (_Decimal64 x) {
+  SItype res = 0xbaddbadd;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_int32_xint (ux.i);
+
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_td.c b/gcc-4.9/libgcc/config/libbid/_dd_to_td.c
new file mode 100644
index 000000000..9416e7a6f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_td.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal128
+__bid_extendddtd2 (_Decimal64 x) {
+  union decimal128 res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res.i = __bid64_to_bid128 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_tf.c b/gcc-4.9/libgcc/config/libbid/_dd_to_tf.c
new file mode 100644
index 000000000..c4eb69fd4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_tf.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+TFtype
+__bid_extendddtf (_Decimal64 x) {
+  union float128 res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res.i = __bid64_to_binary128 (ux.i);
+  return (res.f);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_udi.c b/gcc-4.9/libgcc/config/libbid/_dd_to_udi.c
new file mode 100644
index 000000000..d4be4f525
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_udi.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+UDItype
+__bid_fixunsdddi (_Decimal64 x) {
+  UDItype res = 0xbaddbaddbaddbaddull;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_uint64_xint (ux.i);
+
+  if (res == 0x8000000000000000ull) res = 0; // for NaNs too
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_usi.c b/gcc-4.9/libgcc/config/libbid/_dd_to_usi.c
new file mode 100644
index 000000000..28529d5ff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_usi.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+USItype
+__bid_fixunsddsi (_Decimal64 x) {
+  USItype res = 0xbaddbadd;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_uint32_xint (ux.i);
+
+  if (res == 0x80000000) res = 0; // for NaNs too
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_dd_to_xf.c b/gcc-4.9/libgcc/config/libbid/_dd_to_xf.c
new file mode 100644
index 000000000..da13b7234
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_dd_to_xf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+XFtype
+__bid_extendddxf (_Decimal64 x) {
+  XFtype res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_to_binary80 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_df_to_dd.c b/gcc-4.9/libgcc/config/libbid/_df_to_dd.c
new file mode 100644
index 000000000..0b9159aeb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_df_to_dd.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_extenddfdd (DFtype x) {
+  union decimal64 res;
+  res.i = __binary64_to_bid64 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_df_to_sd.c b/gcc-4.9/libgcc/config/libbid/_df_to_sd.c
new file mode 100644
index 000000000..2ac2db957
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_df_to_sd.c
@@ -0,0 +1,34 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_truncdfsd (DFtype x) {
+  union decimal32 res;
+
+  res.i = __binary64_to_bid32 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_df_to_td.c b/gcc-4.9/libgcc/config/libbid/_df_to_td.c
new file mode 100644
index 000000000..d45eaf4bd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_df_to_td.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_extenddftd (DFtype x) {
+  union decimal128 res;
+  res.i = __binary64_to_bid128 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_di_to_dd.c b/gcc-4.9/libgcc/config/libbid/_di_to_dd.c
new file mode 100644
index 000000000..f80bbfd59
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_di_to_dd.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_floatdidd (DItype x) {
+  union decimal64 res;
+
+  res.i = __bid64_from_int64 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_di_to_sd.c b/gcc-4.9/libgcc/config/libbid/_di_to_sd.c
new file mode 100644
index 000000000..65e4e95aa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_di_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_floatdisd (DItype x) {
+  union decimal32 res;
+  UINT64 res64;
+
+  res64 = __bid64_from_int64 (x);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_di_to_td.c b/gcc-4.9/libgcc/config/libbid/_di_to_td.c
new file mode 100644
index 000000000..d30f58bf5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_di_to_td.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_floatditd (DItype x) {
+  union decimal128 res;
+
+  res.i = __bid128_from_int64 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_div_dd.c b/gcc-4.9/libgcc/config/libbid/_div_dd.c
new file mode 100644
index 000000000..a804ecd40
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_div_dd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_divdd3 (_Decimal64 x, _Decimal64 y) {
+  union decimal64 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid64_div (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_div_sd.c b/gcc-4.9/libgcc/config/libbid/_div_sd.c
new file mode 100644
index 000000000..303b23270
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_div_sd.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_divsd3 (_Decimal32 x, _Decimal32 y) {
+  UINT64 x64, y64, res64;
+  union decimal32 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res64 = __bid64_div (x64, y64);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_div_td.c b/gcc-4.9/libgcc/config/libbid/_div_td.c
new file mode 100644
index 000000000..48307051b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_div_td.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_divtd3 (_Decimal128 x, _Decimal128 y) {
+  union decimal128 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid128_div (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_eq_dd.c b/gcc-4.9/libgcc/config/libbid/_eq_dd.c
new file mode 100644
index 000000000..498352a2d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_eq_dd.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_eqdd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_equal (ux.i, uy.i);
+  if (res == 0)
+    res = 1;
+  else
+    res = 0;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_eq_sd.c b/gcc-4.9/libgcc/config/libbid/_eq_sd.c
new file mode 100644
index 000000000..d32e5b526
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_eq_sd.c
@@ -0,0 +1,44 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_eqsd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_equal (x64, y64);
+  if (res == 0)
+    res = 1;
+  else
+    res = 0;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_eq_td.c b/gcc-4.9/libgcc/config/libbid/_eq_td.c
new file mode 100644
index 000000000..ae7275980
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_eq_td.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_eqtd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_equal (ux.i, uy.i);
+  if (res == 0)
+    res = 1;
+  else
+    res = 0;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ge_dd.c b/gcc-4.9/libgcc/config/libbid/_ge_dd.c
new file mode 100644
index 000000000..e04509721
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ge_dd.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_gedd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_greater_equal (ux.i, uy.i);
+  if (res == 0) res = -1;
+
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ge_sd.c b/gcc-4.9/libgcc/config/libbid/_ge_sd.c
new file mode 100644
index 000000000..f4313dbb0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ge_sd.c
@@ -0,0 +1,42 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_gesd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_greater_equal (x64, y64);
+  if (res == 0) res = -1;
+
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ge_td.c b/gcc-4.9/libgcc/config/libbid/_ge_td.c
new file mode 100644
index 000000000..58eea3199
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ge_td.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_getd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_greater_equal (ux.i, uy.i);
+  if (res == 0) res = -1;
+
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_gt_dd.c b/gcc-4.9/libgcc/config/libbid/_gt_dd.c
new file mode 100644
index 000000000..9467dcd33
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_gt_dd.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_gtdd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_greater (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_gt_sd.c b/gcc-4.9/libgcc/config/libbid/_gt_sd.c
new file mode 100644
index 000000000..6dfa16545
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_gt_sd.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_gtsd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_greater (x64, y64);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_gt_td.c b/gcc-4.9/libgcc/config/libbid/_gt_td.c
new file mode 100644
index 000000000..2ee7d77c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_gt_td.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_gttd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_greater (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_isinfd128.c b/gcc-4.9/libgcc/config/libbid/_isinfd128.c
new file mode 100644
index 000000000..03bc4ba75
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_isinfd128.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+int
+isinfd128 (_Decimal128 x) {
+  int res;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_isInf (ux.i);
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_isinfd32.c b/gcc-4.9/libgcc/config/libbid/_isinfd32.c
new file mode 100644
index 000000000..b97d180cb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_isinfd32.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+int
+isinfd32 (_Decimal32 x) {
+  int res;
+  UINT64 x64;
+  union decimal32 ux;
+
+  ux.d = x;
+  x64 = __bid32_to_bid64 (ux.i);
+  res = __bid64_isInf (x64);
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_isinfd64.c b/gcc-4.9/libgcc/config/libbid/_isinfd64.c
new file mode 100644
index 000000000..6460fb67a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_isinfd64.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+int
+isinfd64 (_Decimal64 x) {
+  int res;
+  union decimal64 ux;
+
+  ux.d = x;
+  res = __bid64_isInf (ux.i);
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_le_dd.c b/gcc-4.9/libgcc/config/libbid/_le_dd.c
new file mode 100644
index 000000000..5fce749dc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_le_dd.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_ledd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_less_equal (ux.i, uy.i);
+  if (res != 0)
+    res = -1;
+  else
+    res = 1;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_le_sd.c b/gcc-4.9/libgcc/config/libbid/_le_sd.c
new file mode 100644
index 000000000..f7a417f6f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_le_sd.c
@@ -0,0 +1,44 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_lesd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_less_equal (x64, y64);
+  if (res != 0)
+    res = -1;
+  else
+    res = 1;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_le_td.c b/gcc-4.9/libgcc/config/libbid/_le_td.c
new file mode 100644
index 000000000..439abb91a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_le_td.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_letd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_less_equal (ux.i, uy.i);
+  if (res != 0)
+    res = -1;
+  else
+    res = 1;
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_lt_dd.c b/gcc-4.9/libgcc/config/libbid/_lt_dd.c
new file mode 100644
index 000000000..e5ca8468d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_lt_dd.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_ltdd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = -__bid64_quiet_less (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_lt_sd.c b/gcc-4.9/libgcc/config/libbid/_lt_sd.c
new file mode 100644
index 000000000..4797601a5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_lt_sd.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_ltsd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = -__bid64_quiet_less (x64, y64);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_lt_td.c b/gcc-4.9/libgcc/config/libbid/_lt_td.c
new file mode 100644
index 000000000..69b5e087a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_lt_td.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_lttd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = -__bid128_quiet_less (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_mul_dd.c b/gcc-4.9/libgcc/config/libbid/_mul_dd.c
new file mode 100644
index 000000000..30cf564b0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_mul_dd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_muldd3 (_Decimal64 x, _Decimal64 y) {
+  union decimal64 ux, uy, res;
+ 
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid64_mul (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_mul_sd.c b/gcc-4.9/libgcc/config/libbid/_mul_sd.c
new file mode 100644
index 000000000..1dde969e9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_mul_sd.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_mulsd3 (_Decimal32 x, _Decimal32 y) {
+  UINT64 x64, y64, res64;
+  union decimal32 ux, uy, res;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res64 = __bid64_mul (x64, y64);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_mul_td.c b/gcc-4.9/libgcc/config/libbid/_mul_td.c
new file mode 100644
index 000000000..382b54ee6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_mul_td.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_multd3 (_Decimal128 x, _Decimal128 y) {
+  union decimal128 ux, uy, res;
+
+  ux.d = x;
+  uy.d = y;
+  res.i = __bid128_mul (ux.i, uy.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ne_dd.c b/gcc-4.9/libgcc/config/libbid/_ne_dd.c
new file mode 100644
index 000000000..192c327d3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ne_dd.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_nedd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_not_equal (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ne_sd.c b/gcc-4.9/libgcc/config/libbid/_ne_sd.c
new file mode 100644
index 000000000..a696fe82a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ne_sd.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_nesd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_not_equal (x64, y64);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_ne_td.c b/gcc-4.9/libgcc/config/libbid/_ne_td.c
new file mode 100644
index 000000000..85f50f9c2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_ne_td.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_netd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_not_equal (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_dd.c b/gcc-4.9/libgcc/config/libbid/_sd_to_dd.c
new file mode 100644
index 000000000..df277b7fa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_dd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal64
+__bid_extendsddd2 (_Decimal32 x) {
+  union decimal64 res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res.i = __bid32_to_bid64 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_df.c b/gcc-4.9/libgcc/config/libbid/_sd_to_df.c
new file mode 100644
index 000000000..500d2bc05
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_df.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DFtype
+__bid_extendsddf (_Decimal32 x) {
+  DFtype res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res = __bid32_to_binary64 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_di.c b/gcc-4.9/libgcc/config/libbid/_sd_to_di.c
new file mode 100644
index 000000000..d9716ede1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_di.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DItype
+__bid_fixsddi (_Decimal32 x) {
+  DItype res = 0xbaddbaddbaddbaddull;
+  UINT64 x64;
+  union decimal32 ux;
+
+  ux.d = x;
+  x64 = __bid32_to_bid64 (ux.i);
+  res = __bid64_to_int64_xint (x64);
+
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_sf.c b/gcc-4.9/libgcc/config/libbid/_sd_to_sf.c
new file mode 100644
index 000000000..0b77ee86d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_sf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SFtype
+__bid_truncsdsf (_Decimal32 x) {
+  SFtype res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res = __bid32_to_binary32 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_si.c b/gcc-4.9/libgcc/config/libbid/_sd_to_si.c
new file mode 100644
index 000000000..1a5c2630d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_si.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SItype
+__bid_fixsdsi (_Decimal32 x) {
+  SItype res = 0xbaddbadd;
+  UINT64 x64;
+  union decimal32 ux;
+
+  ux.d = x;
+  x64 = __bid32_to_bid64 (ux.i);
+  res = __bid64_to_int32_xint (x64);
+
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_td.c b/gcc-4.9/libgcc/config/libbid/_sd_to_td.c
new file mode 100644
index 000000000..cffc55896
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_td.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal128
+__bid_extendsdtd2 (_Decimal32 x) {
+  union decimal128 res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res.i = __bid32_to_bid128 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_tf.c b/gcc-4.9/libgcc/config/libbid/_sd_to_tf.c
new file mode 100644
index 000000000..171668ed1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_tf.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+TFtype
+__bid_extendsdtf (_Decimal32 x) {
+  union float128 res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res.i = __bid32_to_binary128 (ux.i);
+  return (res.f);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_udi.c b/gcc-4.9/libgcc/config/libbid/_sd_to_udi.c
new file mode 100644
index 000000000..6b71c6d63
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_udi.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+UDItype
+__bid_fixunssddi (_Decimal32 x) {
+  UDItype res = 0xbaddbaddbaddbaddull;
+  UINT64 x64;
+  union decimal32 ux;
+
+  ux.d = x;
+  x64 = __bid32_to_bid64 (ux.i);
+  res = __bid64_to_uint64_xint (x64);
+
+  if (res == 0x8000000000000000ull) res = 0; // for NaNs too
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_usi.c b/gcc-4.9/libgcc/config/libbid/_sd_to_usi.c
new file mode 100644
index 000000000..f4fcba0f5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_usi.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+USItype
+__bid_fixunssdsi (_Decimal32 x) {
+  USItype res = 0xbaddbadd;
+  UINT64 x64;
+  union decimal32 ux;
+
+  ux.d = x;
+  x64 = __bid32_to_bid64 (ux.i);
+  res = __bid64_to_uint32_xint (x64);
+
+  if (res == 0x80000000) res = 0; // for NaNs too
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_sd_to_xf.c b/gcc-4.9/libgcc/config/libbid/_sd_to_xf.c
new file mode 100644
index 000000000..7c702ea6d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sd_to_xf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+XFtype
+__bid_extendsdxf (_Decimal32 x) {
+  XFtype res;
+  union decimal32 ux;
+
+  ux.d = x;
+  res = __bid32_to_binary80 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sf_to_dd.c b/gcc-4.9/libgcc/config/libbid/_sf_to_dd.c
new file mode 100644
index 000000000..129f464af
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sf_to_dd.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_extendsfdd (SFtype x) {
+  union decimal64 res;
+  res.i = __binary32_to_bid64 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sf_to_sd.c b/gcc-4.9/libgcc/config/libbid/_sf_to_sd.c
new file mode 100644
index 000000000..60d32c68e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sf_to_sd.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_extendsfsd (SFtype x) {
+  union decimal32 res;
+  res.i = __binary32_to_bid32 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_sf_to_td.c b/gcc-4.9/libgcc/config/libbid/_sf_to_td.c
new file mode 100644
index 000000000..fa3bfb673
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_sf_to_td.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_extendsftd (SFtype x) {
+  union decimal128 res;
+  res.i = __binary32_to_bid128 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_si_to_dd.c b/gcc-4.9/libgcc/config/libbid/_si_to_dd.c
new file mode 100644
index 000000000..f95fd5e51
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_si_to_dd.c
@@ -0,0 +1,34 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_floatsidd (SItype x) {
+  union decimal64 res;
+
+  res.i = __bid64_from_int32 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_si_to_sd.c b/gcc-4.9/libgcc/config/libbid/_si_to_sd.c
new file mode 100644
index 000000000..04723248c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_si_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_floatsisd (SItype x) {
+  union decimal32 res;
+  UINT64 res64;
+
+  res64 = __bid64_from_int32 (x);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_si_to_td.c b/gcc-4.9/libgcc/config/libbid/_si_to_td.c
new file mode 100644
index 000000000..bd65d37e3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_si_to_td.c
@@ -0,0 +1,34 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_floatsitd (SItype x) {
+  union decimal128 res;
+
+  res.i = __bid128_from_int32 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_dd.c b/gcc-4.9/libgcc/config/libbid/_td_to_dd.c
new file mode 100644
index 000000000..1f5ac70b1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_dd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal64
+__bid_trunctddd2 (_Decimal128 x) {
+  union decimal128 ux;
+  union decimal64 res;
+
+  ux.d = x;
+  res.i = __bid128_to_bid64 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_df.c b/gcc-4.9/libgcc/config/libbid/_td_to_df.c
new file mode 100644
index 000000000..d0d8565d5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_df.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DFtype
+__bid_trunctddf (_Decimal128 x) {
+  DFtype res;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_to_binary64 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_di.c b/gcc-4.9/libgcc/config/libbid/_td_to_di.c
new file mode 100644
index 000000000..2f10a7b1a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_di.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+DItype
+__bid_fixtddi (_Decimal128 x) {
+  DItype res = 0xbaddbaddbaddbaddull;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_to_int64_xint (ux.i);
+
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_sd.c b/gcc-4.9/libgcc/config/libbid/_td_to_sd.c
new file mode 100644
index 000000000..af82f4a77
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+ 
+_Decimal32
+__bid_trunctdsd2 (_Decimal128 x) {
+  union decimal128 ux;
+  union decimal32 res;
+
+  ux.d = x;
+  res.i = __bid128_to_bid32 (ux.i);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_sf.c b/gcc-4.9/libgcc/config/libbid/_td_to_sf.c
new file mode 100644
index 000000000..3132c0604
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_sf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SFtype
+__bid_trunctdsf (_Decimal128 x) {
+  SFtype res;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_to_binary32 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_si.c b/gcc-4.9/libgcc/config/libbid/_td_to_si.c
new file mode 100644
index 000000000..b3a4e1439
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_si.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+SItype
+__bid_fixtdsi (_Decimal128 x) {
+  union decimal128 ux;
+  SItype res = 0xbaddbadd;
+
+  ux.d = x;
+  res = __bid128_to_int32_xint (ux.i);
+
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_tf.c b/gcc-4.9/libgcc/config/libbid/_td_to_tf.c
new file mode 100644
index 000000000..3a7d5aeb1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_tf.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+TFtype
+__bid_trunctdtf (_Decimal128 x) {
+  union float128 res;
+  union decimal128 ux;
+
+  ux.d = x;
+  res.i = __bid128_to_binary128 (ux.i);
+  return (res.f);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_udi.c b/gcc-4.9/libgcc/config/libbid/_td_to_udi.c
new file mode 100644
index 000000000..398e5dcd4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_udi.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+UDItype
+__bid_fixunstddi (_Decimal128 x) {
+  UDItype res = 0xbaddbaddbaddbaddull;
+  union decimal128 ux;
+
+  ux.d = x;
+
+  res = __bid128_to_uint64_xint (ux.i);
+
+  if (res == 0x8000000000000000ull) res = 0; // for NaNs too
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_usi.c b/gcc-4.9/libgcc/config/libbid/_td_to_usi.c
new file mode 100644
index 000000000..b510469fd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_usi.c
@@ -0,0 +1,40 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+USItype
+__bid_fixunstdsi (_Decimal128 x) {
+  USItype res = 0xbaddbadd;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_to_uint32_xint (ux.i);
+
+  if (res == 0x80000000) res = 0; // for NaNs too
+  return (res);
+}
+
+
diff --git a/gcc-4.9/libgcc/config/libbid/_td_to_xf.c b/gcc-4.9/libgcc/config/libbid/_td_to_xf.c
new file mode 100644
index 000000000..957cb4282
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_td_to_xf.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+XFtype
+__bid_trunctdxf (_Decimal128 x) {
+  XFtype res;
+  union decimal128 ux;
+
+  ux.d = x;
+  res = __bid128_to_binary80 (ux.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_tf_to_dd.c b/gcc-4.9/libgcc/config/libbid/_tf_to_dd.c
new file mode 100644
index 000000000..dd89112f5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_tf_to_dd.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+_Decimal64
+__bid_trunctfdd (TFtype x) {
+  union decimal64 res;
+  union float128 ux;
+
+  ux.f = x;
+  res.i = __binary128_to_bid64 (ux.i);
+  return (res.d);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_tf_to_sd.c b/gcc-4.9/libgcc/config/libbid/_tf_to_sd.c
new file mode 100644
index 000000000..c4738c3e7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_tf_to_sd.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+_Decimal32
+__bid_trunctfsd (TFtype x) {
+  union decimal32 res;
+  union float128 ux;
+
+  ux.f = x;
+  res.i = __binary128_to_bid32 (ux.i);
+  return (res.d);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_tf_to_td.c b/gcc-4.9/libgcc/config/libbid/_tf_to_td.c
new file mode 100644
index 000000000..dfb328f15
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_tf_to_td.c
@@ -0,0 +1,38 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+#if LIBGCC2_HAS_TF_MODE || BID_HAS_TF_MODE
+_Decimal128
+__bid_extendtftd (TFtype x) {
+  union decimal128 res;
+  union float128 ux;
+
+  ux.f = x;
+  res.i = __binary128_to_bid128 (ux.i);
+  return (res.d);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/_udi_to_dd.c b/gcc-4.9/libgcc/config/libbid/_udi_to_dd.c
new file mode 100644
index 000000000..cc0ccd445
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_udi_to_dd.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_floatunsdidd (UDItype x) {
+  union decimal64 res;
+
+  res.i = __bid64_from_uint64 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_udi_to_sd.c b/gcc-4.9/libgcc/config/libbid/_udi_to_sd.c
new file mode 100644
index 000000000..f736f1d4f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_udi_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_floatunsdisd (UDItype x) {
+  union decimal32 res;
+  UINT64 res64;
+
+  res64 = __bid64_from_uint64 (x);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_udi_to_td.c b/gcc-4.9/libgcc/config/libbid/_udi_to_td.c
new file mode 100644
index 000000000..21a2db427
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_udi_to_td.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_floatunsditd (UDItype x) {
+  union decimal128 res;
+
+  res.i = __bid128_from_uint64 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_unord_dd.c b/gcc-4.9/libgcc/config/libbid/_unord_dd.c
new file mode 100644
index 000000000..fe645844d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_unord_dd.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_unorddd2 (_Decimal64 x, _Decimal64 y) {
+  CMPtype res;
+  union decimal64 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid64_quiet_unordered (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_unord_sd.c b/gcc-4.9/libgcc/config/libbid/_unord_sd.c
new file mode 100644
index 000000000..4e2a126d0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_unord_sd.c
@@ -0,0 +1,41 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_unordsd2 (_Decimal32 x, _Decimal32 y) {
+  CMPtype res;
+  UINT64 x64, y64;
+  union decimal32 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  x64 = __bid32_to_bid64 (ux.i);
+  y64 = __bid32_to_bid64 (uy.i);
+  res = __bid64_quiet_unordered (x64, y64);
+  return (res);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_unord_td.c b/gcc-4.9/libgcc/config/libbid/_unord_td.c
new file mode 100644
index 000000000..8ef0e27c5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_unord_td.c
@@ -0,0 +1,37 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+CMPtype
+__bid_unordtd2 (_Decimal128 x, _Decimal128 y) {
+  CMPtype res;
+  union decimal128 ux, uy;
+ 
+  ux.d = x;
+  uy.d = y;
+  res = __bid128_quiet_unordered (ux.i, uy.i);
+  return (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_usi_to_dd.c b/gcc-4.9/libgcc/config/libbid/_usi_to_dd.c
new file mode 100644
index 000000000..b644b09cc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_usi_to_dd.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_floatunssidd (USItype x) {
+  union decimal64 res;
+
+  res.i = __bid64_from_uint32 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_usi_to_sd.c b/gcc-4.9/libgcc/config/libbid/_usi_to_sd.c
new file mode 100644
index 000000000..0206cf3c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_usi_to_sd.c
@@ -0,0 +1,36 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_floatunssisd (USItype x) {
+  union decimal32 res;
+  UINT64 res64;
+
+  res64 = __bid64_from_uint32 (x);
+  res.i = __bid64_to_bid32 (res64);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_usi_to_td.c b/gcc-4.9/libgcc/config/libbid/_usi_to_td.c
new file mode 100644
index 000000000..a28277e09
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_usi_to_td.c
@@ -0,0 +1,35 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_floatunssitd (USItype x) {
+  union decimal128 res;
+
+  res.i = __bid128_from_uint32 (x);
+  return (res.d);
+}
+
diff --git a/gcc-4.9/libgcc/config/libbid/_xf_to_dd.c b/gcc-4.9/libgcc/config/libbid/_xf_to_dd.c
new file mode 100644
index 000000000..edc4cfb40
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_xf_to_dd.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal64
+__bid_truncxfdd (XFtype x) {
+  union decimal64 res;
+  res.i = __binary80_to_bid64 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_xf_to_sd.c b/gcc-4.9/libgcc/config/libbid/_xf_to_sd.c
new file mode 100644
index 000000000..d264468d0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_xf_to_sd.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal32
+__bid_truncxfsd (XFtype x) {
+  union decimal32 res;
+  res.i = __binary80_to_bid32 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/_xf_to_td.c b/gcc-4.9/libgcc/config/libbid/_xf_to_td.c
new file mode 100644
index 000000000..459a51a2f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/_xf_to_td.c
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+#include "bid_gcc_intrinsics.h"
+
+_Decimal128
+__bid_extendxftd (XFtype x) {
+  union decimal128 res;
+  res.i = __binary80_to_bid128 (x);
+  return (res.d);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128.c b/gcc-4.9/libgcc/config/libbid/bid128.c
new file mode 100644
index 000000000..63a3b93b4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128.c
@@ -0,0 +1,4333 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+// the first entry of nr_digits[i - 1] (where 1 <= i <= 113), indicates 
+// the number of decimal digits needed to represent a binary number with i bits;
+// however, if a binary number of i bits may require either k or k + 1 decimal
+// digits, then the first entry of nr_digits[i - 1] is 0; in this case if the
+// number is less than the value represented by the second and third entries
+// concatenated, then the number of decimal digits k is the fourth entry, else
+// the number of decimal digits is the fourth entry plus 1
+DEC_DIGITS nr_digits[] = {	// only the first entry is used if it is not 0
+  {1, 0x0000000000000000ULL, 0x000000000000000aULL, 1}
+  ,	//   1-bit n < 10^1
+  {1, 0x0000000000000000ULL, 0x000000000000000aULL, 1}
+  ,	//   2-bit n < 10^1
+  {1, 0x0000000000000000ULL, 0x000000000000000aULL, 1}
+  ,	//   3-bit n < 10^1
+  {0, 0x0000000000000000ULL, 0x000000000000000aULL, 1}
+  ,	//   4-bit n ? 10^1
+  {2, 0x0000000000000000ULL, 0x0000000000000064ULL, 2}
+  ,	//   5-bit n < 10^2
+  {2, 0x0000000000000000ULL, 0x0000000000000064ULL, 2}
+  ,	//   6-bit n < 10^2
+  {0, 0x0000000000000000ULL, 0x0000000000000064ULL, 2}
+  ,	//   7-bit n ? 10^2
+  {3, 0x0000000000000000ULL, 0x00000000000003e8ULL, 3}
+  ,	//   8-bit n < 10^3
+  {3, 0x0000000000000000ULL, 0x00000000000003e8ULL, 3}
+  ,	//   9-bit n < 10^3
+  {0, 0x0000000000000000ULL, 0x00000000000003e8ULL, 3}
+  ,	//  10-bit n ? 10^3
+  {4, 0x0000000000000000ULL, 0x0000000000002710ULL, 4}
+  ,	//  11-bit n < 10^4
+  {4, 0x0000000000000000ULL, 0x0000000000002710ULL, 4}
+  ,	//  12-bit n < 10^4
+  {4, 0x0000000000000000ULL, 0x0000000000002710ULL, 4}
+  ,	//  13-bit n < 10^4
+  {0, 0x0000000000000000ULL, 0x0000000000002710ULL, 4}
+  ,	//  14-bit n ? 10^4
+  {5, 0x0000000000000000ULL, 0x00000000000186a0ULL, 5}
+  ,	//  15-bit n < 10^5
+  {5, 0x0000000000000000ULL, 0x00000000000186a0ULL, 5}
+  ,	//  16-bit n < 10^5
+  {0, 0x0000000000000000ULL, 0x00000000000186a0ULL, 5}
+  ,	//  17-bit n ? 10^5
+  {6, 0x0000000000000000ULL, 0x00000000000f4240ULL, 6}
+  ,	//  18-bit n < 10^6
+  {6, 0x0000000000000000ULL, 0x00000000000f4240ULL, 6}
+  ,	//  19-bit n < 10^6
+  {0, 0x0000000000000000ULL, 0x00000000000f4240ULL, 6}
+  ,	//  20-bit n ? 10^6
+  {7, 0x0000000000000000ULL, 0x0000000000989680ULL, 7}
+  ,	//  21-bit n < 10^7
+  {7, 0x0000000000000000ULL, 0x0000000000989680ULL, 7}
+  ,	//  22-bit n < 10^7
+  {7, 0x0000000000000000ULL, 0x0000000000989680ULL, 7}
+  ,	//  23-bit n < 10^7
+  {0, 0x0000000000000000ULL, 0x0000000000989680ULL, 7}
+  ,	//  24-bit n ? 10^7
+  {8, 0x0000000000000000ULL, 0x0000000005f5e100ULL, 8}
+  ,	//  25-bit n < 10^8
+  {8, 0x0000000000000000ULL, 0x0000000005f5e100ULL, 8}
+  ,	//  26-bit n < 10^8
+  {0, 0x0000000000000000ULL, 0x0000000005f5e100ULL, 8}
+  ,	//  27-bit n ? 10^8
+  {9, 0x0000000000000000ULL, 0x000000003b9aca00ULL, 9}
+  ,	//  28-bit n < 10^9
+  {9, 0x0000000000000000ULL, 0x000000003b9aca00ULL, 9}
+  ,	//  29-bit n < 10^9
+  {0, 0x0000000000000000ULL, 0x000000003b9aca00ULL, 9}
+  ,	//  30-bit n ? 10^9
+  {10, 0x0000000000000000ULL, 0x00000002540be400ULL, 10}
+  ,	//  31-bit n < 10^10
+  {10, 0x0000000000000000ULL, 0x00000002540be400ULL, 10}
+  ,	//  32-bit n < 10^10
+  {10, 0x0000000000000000ULL, 0x00000002540be400ULL, 10}
+  ,	//  33-bit n < 10^10
+  {0, 0x0000000000000000ULL, 0x00000002540be400ULL, 10}
+  ,	//  34-bit n ? 10^10
+  {11, 0x0000000000000000ULL, 0x000000174876e800ULL, 11}
+  ,	//  35-bit n < 10^11
+  {11, 0x0000000000000000ULL, 0x000000174876e800ULL, 11}
+  ,	//  36-bit n < 10^11
+  {0, 0x0000000000000000ULL, 0x000000174876e800ULL, 11}
+  ,	//  37-bit n ? 10^11
+  {12, 0x0000000000000000ULL, 0x000000e8d4a51000ULL, 12}
+  ,	//  38-bit n < 10^12
+  {12, 0x0000000000000000ULL, 0x000000e8d4a51000ULL, 12}
+  ,	//  39-bit n < 10^12
+  {0, 0x0000000000000000ULL, 0x000000e8d4a51000ULL, 12}
+  ,	//  40-bit n ? 10^12
+  {13, 0x0000000000000000ULL, 0x000009184e72a000ULL, 13}
+  ,	//  41-bit n < 10^13
+  {13, 0x0000000000000000ULL, 0x000009184e72a000ULL, 13}
+  ,	//  42-bit n < 10^13
+  {13, 0x0000000000000000ULL, 0x000009184e72a000ULL, 13}
+  ,	//  43-bit n < 10^13
+  {0, 0x0000000000000000ULL, 0x000009184e72a000ULL, 13}
+  ,	//  44-bit n ? 10^13
+  {14, 0x0000000000000000ULL, 0x00005af3107a4000ULL, 14}
+  ,	//  45-bit n < 10^14
+  {14, 0x0000000000000000ULL, 0x00005af3107a4000ULL, 14}
+  ,	//  46-bit n < 10^14
+  {0, 0x0000000000000000ULL, 0x00005af3107a4000ULL, 14}
+  ,	//  47-bit n ? 10^14
+  {15, 0x0000000000000000ULL, 0x00038d7ea4c68000ULL, 15}
+  ,	//  48-bit n < 10^15
+  {15, 0x0000000000000000ULL, 0x00038d7ea4c68000ULL, 15}
+  ,	//  49-bit n < 10^15
+  {0, 0x0000000000000000ULL, 0x00038d7ea4c68000ULL, 15}
+  ,	//  50-bit n ? 10^15
+  {16, 0x0000000000000000ULL, 0x002386f26fc10000ULL, 16}
+  ,	//  51-bit n < 10^16
+  {16, 0x0000000000000000ULL, 0x002386f26fc10000ULL, 16}
+  ,	//  52-bit n < 10^16
+  {16, 0x0000000000000000ULL, 0x002386f26fc10000ULL, 16}
+  ,	//  53-bit n < 10^16
+  {0, 0x0000000000000000ULL, 0x002386f26fc10000ULL, 16}
+  ,	//  54-bit n ? 10^16
+  {17, 0x0000000000000000ULL, 0x016345785d8a0000ULL, 17}
+  ,	//  55-bit n < 10^17
+  {17, 0x0000000000000000ULL, 0x016345785d8a0000ULL, 17}
+  ,	//  56-bit n < 10^17
+  {0, 0x0000000000000000ULL, 0x016345785d8a0000ULL, 17}
+  ,	//  57-bit n ? 10^17
+  {18, 0x0000000000000000ULL, 0x0de0b6b3a7640000ULL, 18}
+  ,	//  58-bit n < 10^18
+  {18, 0x0000000000000000ULL, 0x0de0b6b3a7640000ULL, 18}
+  ,	//  59-bit n < 10^18
+  {0, 0x0000000000000000ULL, 0x0de0b6b3a7640000ULL, 18}
+  ,	//  60-bit n ? 10^18
+  {19, 0x0000000000000000ULL, 0x8ac7230489e80000ULL, 19}
+  ,	//  61-bit n < 10^19
+  {19, 0x0000000000000000ULL, 0x8ac7230489e80000ULL, 19}
+  ,	//  62-bit n < 10^19
+  {19, 0x0000000000000000ULL, 0x8ac7230489e80000ULL, 19}
+  ,	//  63-bit n < 10^19
+  {0, 0x0000000000000000ULL, 0x8ac7230489e80000ULL, 19}
+  ,	//  64-bit n ? 10^19
+  {20, 0x0000000000000005ULL, 0x6bc75e2d63100000ULL, 20}
+  ,	//  65-bit n < 10^20
+  {20, 0x0000000000000005ULL, 0x6bc75e2d63100000ULL, 20}
+  ,	//  66-bit n < 10^20
+  {0, 0x0000000000000005ULL, 0x6bc75e2d63100000ULL, 20}
+  ,	//  67-bit n ? 10^20
+  {21, 0x0000000000000036ULL, 0x35c9adc5dea00000ULL, 21}
+  ,	//  68-bit n < 10^21
+  {21, 0x0000000000000036ULL, 0x35c9adc5dea00000ULL, 21}
+  ,	//  69-bit n < 10^21
+  {0, 0x0000000000000036ULL, 0x35c9adc5dea00000ULL, 21}
+  ,	//  70-bit n ? 10^21
+  {22, 0x000000000000021eULL, 0x19e0c9bab2400000ULL, 22}
+  ,	//  71-bit n < 10^22
+  {22, 0x000000000000021eULL, 0x19e0c9bab2400000ULL, 22}
+  ,	//  72-bit n < 10^22
+  {22, 0x000000000000021eULL, 0x19e0c9bab2400000ULL, 22}
+  ,	//  73-bit n < 10^22
+  {0, 0x000000000000021eULL, 0x19e0c9bab2400000ULL, 22}
+  ,	//  74-bit n ? 10^22
+  {23, 0x000000000000152dULL, 0x02c7e14af6800000ULL, 23}
+  ,	//  75-bit n < 10^23
+  {23, 0x000000000000152dULL, 0x02c7e14af6800000ULL, 23}
+  ,	//  76-bit n < 10^23
+  {0, 0x000000000000152dULL, 0x02c7e14af6800000ULL, 23}
+  ,	//  77-bit n ? 10^23
+  {24, 0x000000000000d3c2ULL, 0x1bcecceda1000000ULL, 24}
+  ,	//  78-bit n < 10^24
+  {24, 0x000000000000d3c2ULL, 0x1bcecceda1000000ULL, 24}
+  ,	//  79-bit n < 10^24
+  {0, 0x000000000000d3c2ULL, 0x1bcecceda1000000ULL, 24}
+  ,	//  80-bit n ? 10^24
+  {25, 0x0000000000084595ULL, 0x161401484a000000ULL, 25}
+  ,	//  81-bit n < 10^25
+  {25, 0x0000000000084595ULL, 0x161401484a000000ULL, 25}
+  ,	//  82-bit n < 10^25
+  {25, 0x0000000000084595ULL, 0x161401484a000000ULL, 25}
+  ,	//  83-bit n < 10^25
+  {0, 0x0000000000084595ULL, 0x161401484a000000ULL, 25}
+  ,	//  84-bit n ? 10^25
+  {26, 0x000000000052b7d2ULL, 0xdcc80cd2e4000000ULL, 26}
+  ,	//  85-bit n < 10^26
+  {26, 0x000000000052b7d2ULL, 0xdcc80cd2e4000000ULL, 26}
+  ,	//  86-bit n < 10^26
+  {0, 0x000000000052b7d2ULL, 0xdcc80cd2e4000000ULL, 26}
+  ,	//  87-bit n ? 10^26
+  {27, 0x00000000033b2e3cULL, 0x9fd0803ce8000000ULL, 27}
+  ,	//  88-bit n < 10^27
+  {27, 0x00000000033b2e3cULL, 0x9fd0803ce8000000ULL, 27}
+  ,	//  89-bit n < 10^27
+  {0, 0x00000000033b2e3cULL, 0x9fd0803ce8000000ULL, 27}
+  ,	//  90-bit n ? 10^27
+  {28, 0x00000000204fce5eULL, 0x3e25026110000000ULL, 28}
+  ,	//  91-bit n < 10^28
+  {28, 0x00000000204fce5eULL, 0x3e25026110000000ULL, 28}
+  ,	//  92-bit n < 10^28
+  {28, 0x00000000204fce5eULL, 0x3e25026110000000ULL, 28}
+  ,	//  93-bit n < 10^28
+  {0, 0x00000000204fce5eULL, 0x3e25026110000000ULL, 28}
+  ,	//  94-bit n ? 10^28
+  {29, 0x00000001431e0faeULL, 0x6d7217caa0000000ULL, 29}
+  ,	//  95-bit n < 10^29
+  {29, 0x00000001431e0faeULL, 0x6d7217caa0000000ULL, 29}
+  ,	//  96-bit n < 10^29
+  {0, 0x00000001431e0faeULL, 0x6d7217caa0000000ULL, 29}
+  ,	//  97-bit n ? 10^29
+  {30, 0x0000000c9f2c9cd0ULL, 0x4674edea40000000ULL, 30}
+  ,	//  98-bit n < 10^30
+  {30, 0x0000000c9f2c9cd0ULL, 0x4674edea40000000ULL, 30}
+  ,	//  99-bit n < 10^30
+  {0, 0x0000000c9f2c9cd0ULL, 0x4674edea40000000ULL, 30}
+  ,	// 100-bit n ? 10^30
+  {31, 0x0000007e37be2022ULL, 0xc0914b2680000000ULL, 31}
+  ,	// 101-bit n < 10^31
+  {31, 0x0000007e37be2022ULL, 0xc0914b2680000000ULL, 31}
+  ,	// 102-bit n < 10^31
+  {0, 0x0000007e37be2022ULL, 0xc0914b2680000000ULL, 31}
+  ,	// 103-bit n ? 10^31
+  {32, 0x000004ee2d6d415bULL, 0x85acef8100000000ULL, 32}
+  ,	// 104-bit n < 10^32
+  {32, 0x000004ee2d6d415bULL, 0x85acef8100000000ULL, 32}
+  ,	// 105-bit n < 10^32
+  {32, 0x000004ee2d6d415bULL, 0x85acef8100000000ULL, 32}
+  ,	// 106-bit n < 10^32
+  {0, 0x000004ee2d6d415bULL, 0x85acef8100000000ULL, 32}
+  ,	// 107-bit n ? 10^32
+  {33, 0x0000314dc6448d93ULL, 0x38c15b0a00000000ULL, 33}
+  ,	// 108-bit n < 10^33
+  {33, 0x0000314dc6448d93ULL, 0x38c15b0a00000000ULL, 33}
+  ,	// 109-bit n < 10^33
+  {0, 0x0000314dc6448d93ULL, 0x38c15b0a00000000ULL, 33}
+  ,	// 100-bit n ? 10^33
+  {34, 0x0001ed09bead87c0ULL, 0x378d8e6400000000ULL, 34}
+  ,	// 111-bit n < 10^34
+  {34, 0x0001ed09bead87c0ULL, 0x378d8e6400000000ULL, 34}
+  ,	// 112-bit n < 10^34
+  {0, 0x0001ed09bead87c0ULL, 0x378d8e6400000000ULL, 34}	// 113-bit n ? 10^34
+//{ 35, 0x0013426172c74d82ULL, 0x2b878fe800000000ULL, 35 }  // 114-bit n < 10^35
+};
+
+// midpoint64[i - 1] = 1/2 * 10^i = 5 * 10^(i-1), 1 <= i <= 19
+UINT64 midpoint64[] = {
+  0x0000000000000005ULL,	// 1/2 * 10^1 = 5 * 10^0
+  0x0000000000000032ULL,	// 1/2 * 10^2 = 5 * 10^1
+  0x00000000000001f4ULL,	// 1/2 * 10^3 = 5 * 10^2
+  0x0000000000001388ULL,	// 1/2 * 10^4 = 5 * 10^3
+  0x000000000000c350ULL,	// 1/2 * 10^5 = 5 * 10^4
+  0x000000000007a120ULL,	// 1/2 * 10^6 = 5 * 10^5
+  0x00000000004c4b40ULL,	// 1/2 * 10^7 = 5 * 10^6
+  0x0000000002faf080ULL,	// 1/2 * 10^8 = 5 * 10^7
+  0x000000001dcd6500ULL,	// 1/2 * 10^9 = 5 * 10^8
+  0x000000012a05f200ULL,	// 1/2 * 10^10 = 5 * 10^9
+  0x0000000ba43b7400ULL,	// 1/2 * 10^11 = 5 * 10^10
+  0x000000746a528800ULL,	// 1/2 * 10^12 = 5 * 10^11
+  0x0000048c27395000ULL,	// 1/2 * 10^13 = 5 * 10^12
+  0x00002d79883d2000ULL,	// 1/2 * 10^14 = 5 * 10^13
+  0x0001c6bf52634000ULL,	// 1/2 * 10^15 = 5 * 10^14
+  0x0011c37937e08000ULL,	// 1/2 * 10^16 = 5 * 10^15
+  0x00b1a2bc2ec50000ULL,	// 1/2 * 10^17 = 5 * 10^16
+  0x06f05b59d3b20000ULL,	// 1/2 * 10^18 = 5 * 10^17
+  0x4563918244f40000ULL	// 1/2 * 10^19 = 5 * 10^18
+};
+
+// midpoint128[i - 20] = 1/2 * 10^i = 5 * 10^(i-1), 20 <= i <= 38
+UINT128 midpoint128[] = {	// the 64-bit word order is L, H
+  {{0xb5e3af16b1880000ULL, 0x0000000000000002ULL}
+   }
+  ,	// 1/2 * 10^20 = 5 * 10^19
+  {{0x1ae4d6e2ef500000ULL, 0x000000000000001bULL}
+   }
+  ,	// 1/2 * 10^21 = 5 * 10^20
+  {{0x0cf064dd59200000ULL, 0x000000000000010fULL}
+   }
+  ,	// 1/2 * 10^22 = 5 * 10^21
+  {{0x8163f0a57b400000ULL, 0x0000000000000a96ULL}
+   }
+  ,	// 1/2 * 10^23 = 5 * 10^22
+  {{0x0de76676d0800000ULL, 0x00000000000069e1ULL}
+   }
+  ,	// 1/2 * 10^24 = 5 * 10^23
+  {{0x8b0a00a425000000ULL, 0x00000000000422caULL}
+   }
+  ,	// 1/2 * 10^25 = 5 * 10^24
+  {{0x6e64066972000000ULL, 0x0000000000295be9ULL}
+   }
+  ,	// 1/2 * 10^26 = 5 * 10^25
+  {{0x4fe8401e74000000ULL, 0x00000000019d971eULL}
+   }
+  ,	// 1/2 * 10^27 = 5 * 10^26
+  {{0x1f12813088000000ULL, 0x000000001027e72fULL}
+   }
+  ,	// 1/2 * 10^28 = 5 * 10^27
+  {{0x36b90be550000000ULL, 0x00000000a18f07d7ULL}
+   }
+  ,	// 1/2 * 10^29 = 5 * 10^28
+  {{0x233a76f520000000ULL, 0x000000064f964e68ULL}
+   }
+  ,	// 1/2 * 10^30 = 5 * 10^29
+  {{0x6048a59340000000ULL, 0x0000003f1bdf1011ULL}
+   }
+  ,	// 1/2 * 10^31 = 5 * 10^30
+  {{0xc2d677c080000000ULL, 0x0000027716b6a0adULL}
+   }
+  ,	// 1/2 * 10^32 = 5 * 10^31
+  {{0x9c60ad8500000000ULL, 0x000018a6e32246c9ULL}
+   }
+  ,	// 1/2 * 10^33 = 5 * 10^32
+  {{0x1bc6c73200000000ULL, 0x0000f684df56c3e0ULL}
+   }
+  ,	// 1/2 * 10^34 = 5 * 10^33
+  {{0x15c3c7f400000000ULL, 0x0009a130b963a6c1ULL}
+   }
+  ,	// 1/2 * 10^35 = 5 * 10^34
+  {{0xd9a5cf8800000000ULL, 0x00604be73de4838aULL}
+   }
+  ,	// 1/2 * 10^36 = 5 * 10^35
+  {{0x807a1b5000000000ULL, 0x03c2f7086aed236cULL}
+   }
+  ,	// 1/2 * 10^37 = 5 * 10^36
+  {{0x04c5112000000000ULL, 0x259da6542d43623dULL}
+   }	// 1/2 * 10^38 = 5 * 10^37
+};
+
+// midpoint192[i - 39] = 1/2 * 10^i = 5 * 10^(i-1), 39 <= i <= 58
+UINT192 midpoint192[] = {	// the 64-bit word order is L, M, H
+  {{0x2fb2ab4000000000ULL, 0x78287f49c4a1d662ULL, 0x0000000000000001ULL}
+   }
+  ,
+  // 1/2 * 10^39 = 5 * 10^38
+  {{0xdcfab08000000000ULL, 0xb194f8e1ae525fd5ULL, 0x000000000000000eULL}
+   }
+  ,
+  // 1/2 * 10^40 = 5 * 10^39
+  {{0xa1cae50000000000ULL, 0xefd1b8d0cf37be5aULL, 0x0000000000000092ULL}
+   }
+  ,
+  // 1/2 * 10^41 = 5 * 10^40
+  {{0x51ecf20000000000ULL, 0x5e313828182d6f8aULL, 0x00000000000005bdULL}
+   }
+  ,
+  // 1/2 * 10^42 = 5 * 10^41
+  {{0x3341740000000000ULL, 0xadec3190f1c65b67ULL, 0x0000000000003965ULL}
+   }
+  ,
+  // 1/2 * 10^43 = 5 * 10^42
+  {{0x008e880000000000ULL, 0xcb39efa971bf9208ULL, 0x0000000000023df8ULL}
+   }
+  ,
+  // 1/2 * 10^44 = 5 * 10^43
+  {{0x0591500000000000ULL, 0xf0435c9e717bb450ULL, 0x0000000000166bb7ULL}
+   }
+  ,
+  // 1/2 * 10^45 = 5 * 10^44
+  {{0x37ad200000000000ULL, 0x62a19e306ed50b20ULL, 0x0000000000e0352fULL}
+   }
+  ,
+  // 1/2 * 10^46 = 5 * 10^45
+  {{0x2cc3400000000000ULL, 0xda502de454526f42ULL, 0x0000000008c213d9ULL}
+   }
+  ,
+  // 1/2 * 10^47 = 5 * 10^46
+  {{0xbfa0800000000000ULL, 0x8721caeb4b385895ULL, 0x000000005794c682ULL}
+   }
+  ,
+  // 1/2 * 10^48 = 5 * 10^47
+  {{0x7c45000000000000ULL, 0x4751ed30f03375d9ULL, 0x000000036bcfc119ULL}
+   }
+  ,
+  // 1/2 * 10^49 = 5 * 10^48
+  {{0xdab2000000000000ULL, 0xc93343e962029a7eULL, 0x00000022361d8afcULL}
+   }
+  ,
+  // 1/2 * 10^50 = 5 * 10^49
+  {{0x8af4000000000000ULL, 0xdc00a71dd41a08f4ULL, 0x000001561d276ddfULL}
+   }
+  ,
+  // 1/2 * 10^51 = 5 * 10^50
+  {{0x6d88000000000000ULL, 0x9806872a4904598dULL, 0x00000d5d238a4abeULL}
+   }
+  ,
+  // 1/2 * 10^52 = 5 * 10^51
+  {{0x4750000000000000ULL, 0xf04147a6da2b7f86ULL, 0x000085a36366eb71ULL}
+   }
+  ,
+  // 1/2 * 10^53 = 5 * 10^52
+  {{0xc920000000000000ULL, 0x628ccc8485b2fb3eULL, 0x00053861e2053273ULL}
+   }
+  ,
+  // 1/2 * 10^54 = 5 * 10^53
+  {{0xdb40000000000000ULL, 0xd97ffd2d38fdd073ULL, 0x003433d2d433f881ULL}
+   }
+  ,
+  // 1/2 * 10^55 = 5 * 10^54
+  {{0x9080000000000000ULL, 0x7effe3c439ea2486ULL, 0x020a063c4a07b512ULL}
+   }
+  ,
+  // 1/2 * 10^56 = 5 * 10^55
+  {{0xa500000000000000ULL, 0xf5fee5aa43256d41ULL, 0x14643e5ae44d12b8ULL}
+   }
+  ,
+  // 1/2 * 10^57 = 5 * 10^56
+  {{0x7200000000000000ULL, 0x9bf4f8a69f764490ULL, 0xcbea6f8ceb02bb39ULL}
+   }
+  // 1/2 * 10^58 = 5 * 10^57
+};
+
+// midpoint256[i - 59] = 1/2 * 10^i = 5 * 10^(i-1), 59 <= i <= 68
+UINT256 midpoint256[] = {	// the 64-bit word order is LL, LH, HL, HH
+  {{0x7400000000000000ULL, 0x1791b6823a9eada4ULL,
+    0xf7285b812e1b5040ULL, 0x0000000000000007ULL}
+   }
+  ,	// 1/2 * 10^59 = 5 * 10^58
+  {{0x8800000000000000ULL, 0xebb121164a32c86cULL,
+    0xa793930bcd112280ULL, 0x000000000000004fULL}
+   }
+  ,	// 1/2 * 10^60 = 5 * 10^59
+  {{0x5000000000000000ULL, 0x34eb4adee5fbd43dULL,
+    0x8bc3be7602ab5909ULL, 0x000000000000031cULL}
+   }
+  ,	// 1/2 * 10^61 = 5 * 10^60
+  {{0x2000000000000000ULL, 0x1130ecb4fbd64a65ULL,
+    0x75a5709c1ab17a5cULL, 0x0000000000001f1dULL}
+   }
+  ,	// 1/2 * 10^62 = 5 * 10^61
+  {{0x4000000000000000ULL, 0xabe93f11d65ee7f3ULL,
+    0x987666190aeec798ULL, 0x0000000000013726ULL}
+   }
+  ,	// 1/2 * 10^63 = 5 * 10^62
+  {{0x8000000000000000ULL, 0xb71c76b25fb50f80ULL,
+    0xf49ffcfa6d53cbf6ULL, 0x00000000000c2781ULL}
+   }
+  ,	// 1/2 * 10^64 = 5 * 10^63
+  {{0x0000000000000000ULL, 0x271ca2f7bd129b05ULL,
+    0x8e3fe1c84545f7a3ULL, 0x0000000000798b13ULL}
+   }
+  ,	// 1/2 * 10^65 = 5 * 10^64
+  {{0x0000000000000000ULL, 0x871e5dad62ba0e32ULL,
+    0x8e7ed1d2b4bbac5fULL, 0x0000000004bf6ec3ULL}
+   }
+  ,	// 1/2 * 10^66 = 5 * 10^65
+  {{0x0000000000000000ULL, 0x472fa8c5db448df4ULL,
+    0x90f4323b0f54bbbbULL, 0x000000002f7a53a3ULL}
+   }
+  ,	// 1/2 * 10^67 = 5 * 10^66
+  {{0x0000000000000000ULL, 0xc7dc97ba90ad8b88ULL,
+    0xa989f64e994f5550ULL, 0x00000001dac74463ULL}
+   }
+  ,	// 1/2 * 10^68 = 5 * 10^67
+  {{0x0000000000000000ULL, 0xce9ded49a6c77350ULL,
+    0x9f639f11fd195527ULL, 0x000000128bc8abe4ULL}
+   }
+  ,	// 1/2 * 10^69 = 5 * 10^68
+  {{0x0000000000000000ULL, 0x122b44e083ca8120ULL,
+    0x39e436b3e2fd538eULL, 0x000000b975d6b6eeULL}
+   }
+  ,	// 1/2 * 10^70 = 5 * 10^69
+  {{0x0000000000000000ULL, 0xb5b0b0c525e90b40ULL,
+    0x42ea2306dde5438cULL, 0x0000073e9a63254eULL}
+   }
+  ,	// 1/2 * 10^71 = 5 * 10^70
+  {{0x0000000000000000ULL, 0x18e6e7b37b1a7080ULL,
+    0x9d255e44aaf4a37fULL, 0x0000487207df750eULL}
+   }
+  ,	// 1/2 * 10^72 = 5 * 10^71
+  {{0x0000000000000000ULL, 0xf9050d02cf086500ULL,
+    0x2375aeaead8e62f6ULL, 0x0002d4744eba9292ULL}
+   }
+  ,	// 1/2 * 10^73 = 5 * 10^72
+  {{0x0000000000000000ULL, 0xba32821c1653f200ULL,
+    0x6298d2d2c78fdda5ULL, 0x001c4c8b1349b9b5ULL}
+   }
+  ,	// 1/2 * 10^74 = 5 * 10^73
+  {{0x0000000000000000ULL, 0x45f91518df477400ULL,
+    0xd9f83c3bcb9ea879ULL, 0x011afd6ec0e14115ULL}
+   }
+  ,	// 1/2 * 10^75 = 5 * 10^74
+  {{0x0000000000000000ULL, 0xbbbad2f8b8ca8800ULL,
+    0x83b25a55f43294bcULL, 0x0b0de65388cc8adaULL}
+   }
+  ,	// 1/2 * 10^76 = 5 * 10^75
+  {{0x0000000000000000ULL, 0x554c3db737e95000ULL,
+    0x24f7875b89f9cf5fULL, 0x6e8aff4357fd6c89ULL}
+   }	// 1/2 * 10^77 = 5 * 10^76
+};
+
+// ten2k64[i] = 10^i, 0 <= i <= 19
+UINT64 ten2k64[] = {
+  0x0000000000000001ULL,	// 10^0
+  0x000000000000000aULL,	// 10^1
+  0x0000000000000064ULL,	// 10^2
+  0x00000000000003e8ULL,	// 10^3
+  0x0000000000002710ULL,	// 10^4
+  0x00000000000186a0ULL,	// 10^5
+  0x00000000000f4240ULL,	// 10^6
+  0x0000000000989680ULL,	// 10^7
+  0x0000000005f5e100ULL,	// 10^8
+  0x000000003b9aca00ULL,	// 10^9
+  0x00000002540be400ULL,	// 10^10
+  0x000000174876e800ULL,	// 10^11
+  0x000000e8d4a51000ULL,	// 10^12
+  0x000009184e72a000ULL,	// 10^13
+  0x00005af3107a4000ULL,	// 10^14
+  0x00038d7ea4c68000ULL,	// 10^15
+  0x002386f26fc10000ULL,	// 10^16
+  0x016345785d8a0000ULL,	// 10^17
+  0x0de0b6b3a7640000ULL,	// 10^18
+  0x8ac7230489e80000ULL	// 10^19 (20 digits)
+};
+
+
+// ten2k128[i - 20] = 10^i, 20 <= i <= 38
+UINT128 ten2k128[] = {	// the 64-bit word order is L, H
+  {{0x6bc75e2d63100000ULL, 0x0000000000000005ULL}
+   }
+  ,	// 10^20
+  {{0x35c9adc5dea00000ULL, 0x0000000000000036ULL}
+   }
+  ,	// 10^21
+  {{0x19e0c9bab2400000ULL, 0x000000000000021eULL}
+   }
+  ,	// 10^22
+  {{0x02c7e14af6800000ULL, 0x000000000000152dULL}
+   }
+  ,	// 10^23
+  {{0x1bcecceda1000000ULL, 0x000000000000d3c2ULL}
+   }
+  ,	// 10^24
+  {{0x161401484a000000ULL, 0x0000000000084595ULL}
+   }
+  ,	// 10^25
+  {{0xdcc80cd2e4000000ULL, 0x000000000052b7d2ULL}
+   }
+  ,	// 10^26
+  {{0x9fd0803ce8000000ULL, 0x00000000033b2e3cULL}
+   }
+  ,	// 10^27
+  {{0x3e25026110000000ULL, 0x00000000204fce5eULL}
+   }
+  ,	// 10^28
+  {{0x6d7217caa0000000ULL, 0x00000001431e0faeULL}
+   }
+  ,	// 10^29
+  {{0x4674edea40000000ULL, 0x0000000c9f2c9cd0ULL}
+   }
+  ,	// 10^30
+  {{0xc0914b2680000000ULL, 0x0000007e37be2022ULL}
+   }
+  ,	// 10^31
+  {{0x85acef8100000000ULL, 0x000004ee2d6d415bULL}
+   }
+  ,	// 10^32
+  {{0x38c15b0a00000000ULL, 0x0000314dc6448d93ULL}
+   }
+  ,	// 10^33
+  {{0x378d8e6400000000ULL, 0x0001ed09bead87c0ULL}
+   }
+  ,	// 10^34
+  {{0x2b878fe800000000ULL, 0x0013426172c74d82ULL}
+   }
+  ,	// 10^35
+  {{0xb34b9f1000000000ULL, 0x00c097ce7bc90715ULL}
+   }
+  ,	// 10^36
+  {{0x00f436a000000000ULL, 0x0785ee10d5da46d9ULL}
+   }
+  ,	// 10^37
+  {{0x098a224000000000ULL, 0x4b3b4ca85a86c47aULL}
+   }	// 10^38 (39 digits)
+};
+
+// might split into ten2k192[] and ten2k256[]
+
+// ten2k256[i - 39] = 10^i, 39 <= i <= 68
+UINT256 ten2k256[] = {	// the 64-bit word order is LL, LH, HL, HH
+  {{0x5f65568000000000ULL, 0xf050fe938943acc4ULL,
+    0x0000000000000002ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^39
+  {{0xb9f5610000000000ULL, 0x6329f1c35ca4bfabULL,
+    0x000000000000001dULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^40
+  {{0x4395ca0000000000ULL, 0xdfa371a19e6f7cb5ULL,
+    0x0000000000000125ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^41
+  {{0xa3d9e40000000000ULL, 0xbc627050305adf14ULL,
+    0x0000000000000b7aULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^42
+  {{0x6682e80000000000ULL, 0x5bd86321e38cb6ceULL,
+    0x00000000000072cbULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^43
+  {{0x011d100000000000ULL, 0x9673df52e37f2410ULL,
+    0x0000000000047bf1ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^44
+  {{0x0b22a00000000000ULL, 0xe086b93ce2f768a0ULL,
+    0x00000000002cd76fULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^45
+  {{0x6f5a400000000000ULL, 0xc5433c60ddaa1640ULL,
+    0x0000000001c06a5eULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^46
+  {{0x5986800000000000ULL, 0xb4a05bc8a8a4de84ULL,
+    0x00000000118427b3ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^47
+  {{0x7f41000000000000ULL, 0x0e4395d69670b12bULL,
+    0x00000000af298d05ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^48
+  {{0xf88a000000000000ULL, 0x8ea3da61e066ebb2ULL,
+    0x00000006d79f8232ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^49
+  {{0xb564000000000000ULL, 0x926687d2c40534fdULL,
+    0x000000446c3b15f9ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^50
+  {{0x15e8000000000000ULL, 0xb8014e3ba83411e9ULL,
+    0x000002ac3a4edbbfULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^51
+  {{0xdb10000000000000ULL, 0x300d0e549208b31aULL,
+    0x00001aba4714957dULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^52
+  {{0x8ea0000000000000ULL, 0xe0828f4db456ff0cULL,
+    0x00010b46c6cdd6e3ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^53
+  {{0x9240000000000000ULL, 0xc51999090b65f67dULL,
+    0x000a70c3c40a64e6ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^54
+  {{0xb680000000000000ULL, 0xb2fffa5a71fba0e7ULL,
+    0x006867a5a867f103ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^55
+  {{0x2100000000000000ULL, 0xfdffc78873d4490dULL,
+    0x04140c78940f6a24ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^56
+  {{0x4a00000000000000ULL, 0xebfdcb54864ada83ULL,
+    0x28c87cb5c89a2571ULL, 0x0000000000000000ULL}
+   }
+  ,	// 10^57 (58 digits)
+  {{0xe400000000000000ULL, 0x37e9f14d3eec8920ULL,
+    0x97d4df19d6057673ULL, 0x0000000000000001ULL}
+   }
+  ,	// 10^58
+  {{0xe800000000000000ULL, 0x2f236d04753d5b48ULL,
+    0xee50b7025c36a080ULL, 0x000000000000000fULL}
+   }
+  ,	// 10^59
+  {{0x1000000000000000ULL, 0xd762422c946590d9ULL,
+    0x4f2726179a224501ULL, 0x000000000000009fULL}
+   }
+  ,	// 10^60
+  {{0xa000000000000000ULL, 0x69d695bdcbf7a87aULL,
+    0x17877cec0556b212ULL, 0x0000000000000639ULL}
+   }
+  ,	// 10^61
+  {{0x4000000000000000ULL, 0x2261d969f7ac94caULL,
+    0xeb4ae1383562f4b8ULL, 0x0000000000003e3aULL}
+   }
+  ,	// 10^62
+  {{0x8000000000000000ULL, 0x57d27e23acbdcfe6ULL,
+    0x30eccc3215dd8f31ULL, 0x0000000000026e4dULL}
+   }
+  ,	// 10^63
+  {{0x0000000000000000ULL, 0x6e38ed64bf6a1f01ULL,
+    0xe93ff9f4daa797edULL, 0x0000000000184f03ULL}
+   }
+  ,	// 10^64
+  {{0x0000000000000000ULL, 0x4e3945ef7a25360aULL,
+    0x1c7fc3908a8bef46ULL, 0x0000000000f31627ULL}
+   }
+  ,	// 10^65
+  {{0x0000000000000000ULL, 0x0e3cbb5ac5741c64ULL,
+    0x1cfda3a5697758bfULL, 0x00000000097edd87ULL}
+   }
+  ,	// 10^66
+  {{0x0000000000000000ULL, 0x8e5f518bb6891be8ULL,
+    0x21e864761ea97776ULL, 0x000000005ef4a747ULL}
+   }
+  ,	// 10^67
+  {{0x0000000000000000ULL, 0x8fb92f75215b1710ULL,
+    0x5313ec9d329eaaa1ULL, 0x00000003b58e88c7ULL}
+   }
+  ,	// 10^68
+  {{0x0000000000000000ULL, 0x9d3bda934d8ee6a0ULL,
+    0x3ec73e23fa32aa4fULL, 0x00000025179157c9ULL}
+   }
+  ,	// 10^69
+  {{0x0000000000000000ULL, 0x245689c107950240ULL,
+    0x73c86d67c5faa71cULL, 0x00000172ebad6ddcULL}
+   }
+  ,	// 10^70
+  {{0x0000000000000000ULL, 0x6b61618a4bd21680ULL,
+    0x85d4460dbbca8719ULL, 0x00000e7d34c64a9cULL}
+   }
+  ,	// 10^71
+  {{0x0000000000000000ULL, 0x31cdcf66f634e100ULL,
+    0x3a4abc8955e946feULL, 0x000090e40fbeea1dULL}
+   }
+  ,	// 10^72
+  {{0x0000000000000000ULL, 0xf20a1a059e10ca00ULL,
+    0x46eb5d5d5b1cc5edULL, 0x0005a8e89d752524ULL}
+   }
+  ,	// 10^73
+  {{0x0000000000000000ULL, 0x746504382ca7e400ULL,
+    0xc531a5a58f1fbb4bULL, 0x003899162693736aULL}
+   }
+  ,	// 10^74
+  {{0x0000000000000000ULL, 0x8bf22a31be8ee800ULL,
+    0xb3f07877973d50f2ULL, 0x0235fadd81c2822bULL}
+   }
+  ,	// 10^75
+  {{0x0000000000000000ULL, 0x7775a5f171951000ULL,
+    0x0764b4abe8652979ULL, 0x161bcca7119915b5ULL}
+   }
+  ,	// 10^76
+  {{0x0000000000000000ULL, 0xaa987b6e6fd2a000ULL,
+    0x49ef0eb713f39ebeULL, 0xdd15fe86affad912ULL}
+   }	// 10^77
+};
+
+// ten2mk128[k - 1] = 10^(-k) * 2^exp (k), where 1 <= k <= 34 and
+// exp (k) = shiftright128[k - 1] + 128
+UINT128 ten2mk128[] = {
+  {{0x999999999999999aULL, 0x1999999999999999ULL}
+   }
+  ,	//  10^(-1) * 2^128
+  {{0x28f5c28f5c28f5c3ULL, 0x028f5c28f5c28f5cULL}
+   }
+  ,	//  10^(-2) * 2^128
+  {{0x9db22d0e56041894ULL, 0x004189374bc6a7efULL}
+   }
+  ,	//  10^(-3) * 2^128
+  {{0x4af4f0d844d013aaULL, 0x00346dc5d6388659ULL}
+   }
+  ,	//  10^(-4) * 2^131
+  {{0x08c3f3e0370cdc88ULL, 0x0029f16b11c6d1e1ULL}
+   }
+  ,	//  10^(-5) * 2^134
+  {{0x6d698fe69270b06dULL, 0x00218def416bdb1aULL}
+   }
+  ,	//  10^(-6) * 2^137
+  {{0xaf0f4ca41d811a47ULL, 0x0035afe535795e90ULL}
+   }
+  ,	//  10^(-7) * 2^141
+  {{0xbf3f70834acdaea0ULL, 0x002af31dc4611873ULL}
+   }
+  ,	//  10^(-8) * 2^144
+  {{0x65cc5a02a23e254dULL, 0x00225c17d04dad29ULL}
+   }
+  ,	//  10^(-9) * 2^147
+  {{0x6fad5cd10396a214ULL, 0x0036f9bfb3af7b75ULL}
+   }
+  ,	// 10^(-10) * 2^151
+  {{0xbfbde3da69454e76ULL, 0x002bfaffc2f2c92aULL}
+   }
+  ,	// 10^(-11) * 2^154
+  {{0x32fe4fe1edd10b92ULL, 0x00232f33025bd422ULL}
+   }
+  ,	// 10^(-12) * 2^157
+  {{0x84ca19697c81ac1cULL, 0x00384b84d092ed03ULL}
+   }
+  ,	// 10^(-13) * 2^161
+  {{0x03d4e1213067bce4ULL, 0x002d09370d425736ULL}
+   }
+  ,	// 10^(-14) * 2^164
+  {{0x3643e74dc052fd83ULL, 0x0024075f3dceac2bULL}
+   }
+  ,	// 10^(-15) * 2^167
+  {{0x56d30baf9a1e626bULL, 0x0039a5652fb11378ULL}
+   }
+  ,	// 10^(-16) * 2^171
+  {{0x12426fbfae7eb522ULL, 0x002e1dea8c8da92dULL}
+   }
+  ,	// 10^(-17) * 2^174
+  {{0x41cebfcc8b9890e8ULL, 0x0024e4bba3a48757ULL}
+   }
+  ,	// 10^(-18) * 2^177
+  {{0x694acc7a78f41b0dULL, 0x003b07929f6da558ULL}
+   }
+  ,	// 10^(-19) * 2^181
+  {{0xbaa23d2ec729af3eULL, 0x002f394219248446ULL}
+   }
+  ,	// 10^(-20) * 2^184
+  {{0xfbb4fdbf05baf298ULL, 0x0025c768141d369eULL}
+   }
+  ,	// 10^(-21) * 2^187
+  {{0x2c54c931a2c4b759ULL, 0x003c7240202ebdcbULL}
+   }
+  ,	// 10^(-22) * 2^191
+  {{0x89dd6dc14f03c5e1ULL, 0x00305b66802564a2ULL}
+   }
+  ,	// 10^(-23) * 2^194
+  {{0xd4b1249aa59c9e4eULL, 0x0026af8533511d4eULL}
+   }
+  ,	// 10^(-24) * 2^197
+  {{0x544ea0f76f60fd49ULL, 0x003de5a1ebb4fbb1ULL}
+   }
+  ,	// 10^(-25) * 2^201
+  {{0x76a54d92bf80caa1ULL, 0x00318481895d9627ULL}
+   }
+  ,	// 10^(-26) * 2^204
+  {{0x921dd7a89933d54eULL, 0x00279d346de4781fULL}
+   }
+  ,	// 10^(-27) * 2^207
+  {{0x8362f2a75b862215ULL, 0x003f61ed7ca0c032ULL}
+   }
+  ,	// 10^(-28) * 2^211
+  {{0xcf825bb91604e811ULL, 0x0032b4bdfd4d668eULL}
+   }
+  ,	// 10^(-29) * 2^214
+  {{0x0c684960de6a5341ULL, 0x00289097fdd7853fULL}
+   }
+  ,	// 10^(-30) * 2^217
+  {{0x3d203ab3e521dc34ULL, 0x002073accb12d0ffULL}
+   }
+  ,	// 10^(-31) * 2^220
+  {{0x2e99f7863b696053ULL, 0x0033ec47ab514e65ULL}
+   }
+  ,	// 10^(-32) * 2^224
+  {{0x587b2c6b62bab376ULL, 0x002989d2ef743eb7ULL}
+   }
+  ,	// 10^(-33) * 2^227
+  {{0xad2f56bc4efbc2c5ULL, 0x00213b0f25f69892ULL}
+   }
+  ,	// 10^(-34) * 2^230
+};
+
+
+// shiftright128[] contains the right shift count to obtain C2* from the top
+// 128 bits of the 128x128-bit product C2 * Kx
+int shiftright128[] = {
+  0,	// 128 - 128
+  0,	// 128 - 128
+  0,	// 128 - 128
+
+  3,	// 131 - 128
+  6,	// 134 - 128
+  9,	// 137 - 128
+  13,	// 141 - 128
+  16,	// 144 - 128
+  19,	// 147 - 128
+  23,	// 151 - 128
+  26,	// 154 - 128
+  29,	// 157 - 128
+  33,	// 161 - 128
+  36,	// 164 - 128
+  39,	// 167 - 128
+  43,	// 171 - 128
+  46,	// 174 - 128
+  49,	// 177 - 128
+  53,	// 181 - 128
+  56,	// 184 - 128
+  59,	// 187 - 128
+  63,	// 191 - 128
+
+  66,	// 194 - 128
+  69,	// 197 - 128
+  73,	// 201 - 128
+  76,	// 204 - 128
+  79,	// 207 - 128
+  83,	// 211 - 128
+  86,	// 214 - 128
+  89,	// 217 - 128
+  92,	// 220 - 128
+  96,	// 224 - 128
+  99,	// 227 - 128
+  102	// 230 - 128
+};
+
+
+// maskhigh128[] contains the mask to apply to the top 128 bits of the 
+// 128x128-bit product in order to obtain the high bits of f2*
+// the 64-bit word order is L, H
+UINT64 maskhigh128[] = {
+  0x0000000000000000ULL,	//  0 = 128 - 128 bits
+  0x0000000000000000ULL,	//  0 = 128 - 128 bits
+  0x0000000000000000ULL,	//  0 = 128 - 128 bits
+  0x0000000000000007ULL,	//  3 = 131 - 128 bits
+  0x000000000000003fULL,	//  6 = 134 - 128 bits
+  0x00000000000001ffULL,	//  9 = 137 - 128 bits
+  0x0000000000001fffULL,	// 13 = 141 - 128 bits
+  0x000000000000ffffULL,	// 16 = 144 - 128 bits
+  0x000000000007ffffULL,	// 19 = 147 - 128 bits
+  0x00000000007fffffULL,	// 23 = 151 - 128 bits
+  0x0000000003ffffffULL,	// 26 = 154 - 128 bits
+  0x000000001fffffffULL,	// 29 = 157 - 128 bits
+  0x00000001ffffffffULL,	// 33 = 161 - 128 bits
+  0x0000000fffffffffULL,	// 36 = 164 - 128 bits
+  0x0000007fffffffffULL,	// 39 = 167 - 128 bits
+  0x000007ffffffffffULL,	// 43 = 171 - 128 bits
+  0x00003fffffffffffULL,	// 46 = 174 - 128 bits
+  0x0001ffffffffffffULL,	// 49 = 177 - 128 bits
+  0x001fffffffffffffULL,	// 53 = 181 - 128 bits
+  0x00ffffffffffffffULL,	// 56 = 184 - 128 bits
+  0x07ffffffffffffffULL,	// 59 = 187 - 128 bits
+  0x7fffffffffffffffULL,	// 63 = 191 - 128 bits
+  0x0000000000000003ULL,	//  2 = 194 - 192 bits
+  0x000000000000001fULL,	//  5 = 197 - 192 bits
+  0x00000000000001ffULL,	//  9 = 201 - 192 bits
+  0x0000000000000fffULL,	// 12 = 204 - 192 bits
+  0x0000000000007fffULL,	// 15 = 207 - 192 bits
+  0x000000000007ffffULL,	// 21 = 211 - 192 bits
+  0x00000000003fffffULL,	// 22 = 214 - 192 bits
+  0x0000000001ffffffULL,	// 25 = 217 - 192 bits
+  0x000000000fffffffULL,	// 28 = 220 - 192 bits
+  0x00000000ffffffffULL,	// 32 = 224 - 192 bits
+  0x00000007ffffffffULL,	// 35 = 227 - 192 bits
+  0x0000003fffffffffULL	// 38 = 230 - 192 bits
+};
+
+
+// onehalf128[] contains the high bits of 1/2 positioned correctly for 
+// comparison with the high bits of f2*
+// the 64-bit word order is L, H
+UINT64 onehalf128[] = {
+  0x0000000000000000ULL,	//  0 bits
+  0x0000000000000000ULL,	//  0 bits
+  0x0000000000000000ULL,	//  0 bits
+  0x0000000000000004ULL,	//  3 bits
+  0x0000000000000020ULL,	//  6 bits
+  0x0000000000000100ULL,	//  9 bits
+  0x0000000000001000ULL,	// 13 bits
+  0x0000000000008000ULL,	// 16 bits
+  0x0000000000040000ULL,	// 19 bits
+  0x0000000000400000ULL,	// 23 bits
+  0x0000000002000000ULL,	// 26 bits
+  0x0000000010000000ULL,	// 29 bits
+  0x0000000100000000ULL,	// 33 bits
+  0x0000000800000000ULL,	// 36 bits
+  0x0000004000000000ULL,	// 39 bits
+  0x0000040000000000ULL,	// 43 bits
+  0x0000200000000000ULL,	// 46 bits
+  0x0001000000000000ULL,	// 49 bits
+  0x0010000000000000ULL,	// 53 bits
+  0x0080000000000000ULL,	// 56 bits
+  0x0400000000000000ULL,	// 59 bits
+  0x4000000000000000ULL,	// 63 bits
+  0x0000000000000002ULL,	// 66 bits
+  0x0000000000000010ULL,	// 69 bits
+  0x0000000000000100ULL,	// 73 bits
+  0x0000000000000800ULL,	// 76 bits
+  0x0000000000004000ULL,	// 79 bits
+  0x0000000000040000ULL,	// 83 bits
+  0x0000000000200000ULL,	// 86 bits
+  0x0000000001000000ULL,	// 89 bits
+  0x0000000008000000ULL,	// 92 bits
+  0x0000000080000000ULL,	// 96 bits
+  0x0000000400000000ULL,	// 99 bits
+  0x0000002000000000ULL	// 102 bits
+};
+
+UINT64 ten2mk64[] = {
+  0x199999999999999aULL,	//  10^(-1) * 2^ 64
+  0x028f5c28f5c28f5dULL,	//  10^(-2) * 2^ 64 
+  0x004189374bc6a7f0ULL,	//  10^(-3) * 2^ 64 
+  0x00346dc5d638865aULL,	//  10^(-4) * 2^ 67 
+  0x0029f16b11c6d1e2ULL,	//  10^(-5) * 2^ 70 
+  0x00218def416bdb1bULL,	//  10^(-6) * 2^ 73 
+  0x0035afe535795e91ULL,	//  10^(-7) * 2^ 77 
+  0x002af31dc4611874ULL,	//  10^(-8) * 2^ 80 
+  0x00225c17d04dad2aULL,	//  10^(-9) * 2^ 83 
+  0x0036f9bfb3af7b76ULL,	// 10^(-10) * 2^ 87 
+  0x002bfaffc2f2c92bULL,	// 10^(-11) * 2^ 90 
+  0x00232f33025bd423ULL,	// 10^(-12) * 2^ 93 
+  0x00384b84d092ed04ULL,	// 10^(-13) * 2^ 97 
+  0x002d09370d425737ULL,	// 10^(-14) * 2^100 
+  0x0024075f3dceac2cULL,	// 10^(-15) * 2^103 
+  0x0039a5652fb11379ULL,	// 10^(-16) * 2^107 
+};
+
+// ten2mk128trunc[] contains T*, the top Ex >= 128 bits of 10^(-k), 
+// for 1 <= k <= 34 
+// the 64-bit word order is L, H
+UINT128 ten2mk128trunc[] = {
+  {{0x9999999999999999ULL, 0x1999999999999999ULL}},	//  10^(-1) * 2^128
+  {{0x28f5c28f5c28f5c2ULL, 0x028f5c28f5c28f5cULL}},	//  10^(-2) * 2^128 
+  {{0x9db22d0e56041893ULL, 0x004189374bc6a7efULL}},	//  10^(-3) * 2^128 
+  {{0x4af4f0d844d013a9ULL, 0x00346dc5d6388659ULL}},	//  10^(-4) * 2^131 
+  {{0x08c3f3e0370cdc87ULL, 0x0029f16b11c6d1e1ULL}},	//  10^(-5) * 2^134 
+  {{0x6d698fe69270b06cULL, 0x00218def416bdb1aULL}},	//  10^(-6) * 2^137 
+  {{0xaf0f4ca41d811a46ULL, 0x0035afe535795e90ULL}},	//  10^(-7) * 2^141 
+  {{0xbf3f70834acdae9fULL, 0x002af31dc4611873ULL}},	//  10^(-8) * 2^144 
+  {{0x65cc5a02a23e254cULL, 0x00225c17d04dad29ULL}},	//  10^(-9) * 2^147 
+  {{0x6fad5cd10396a213ULL, 0x0036f9bfb3af7b75ULL}},	// 10^(-10) * 2^151 
+  {{0xbfbde3da69454e75ULL, 0x002bfaffc2f2c92aULL}},	// 10^(-11) * 2^154 
+  {{0x32fe4fe1edd10b91ULL, 0x00232f33025bd422ULL}},	// 10^(-12) * 2^157 
+  {{0x84ca19697c81ac1bULL, 0x00384b84d092ed03ULL}},	// 10^(-13) * 2^161 
+  {{0x03d4e1213067bce3ULL, 0x002d09370d425736ULL}},	// 10^(-14) * 2^164 
+  {{0x3643e74dc052fd82ULL, 0x0024075f3dceac2bULL}},	// 10^(-15) * 2^167 
+  {{0x56d30baf9a1e626aULL, 0x0039a5652fb11378ULL}},	// 10^(-16) * 2^171 
+  {{0x12426fbfae7eb521ULL, 0x002e1dea8c8da92dULL}},	// 10^(-17) * 2^174 
+  {{0x41cebfcc8b9890e7ULL, 0x0024e4bba3a48757ULL}},	// 10^(-18) * 2^177 
+  {{0x694acc7a78f41b0cULL, 0x003b07929f6da558ULL}},	// 10^(-19) * 2^181 
+  {{0xbaa23d2ec729af3dULL, 0x002f394219248446ULL}},	// 10^(-20) * 2^184 
+  {{0xfbb4fdbf05baf297ULL, 0x0025c768141d369eULL}},	// 10^(-21) * 2^187 
+  {{0x2c54c931a2c4b758ULL, 0x003c7240202ebdcbULL}},	// 10^(-22) * 2^191 
+  {{0x89dd6dc14f03c5e0ULL, 0x00305b66802564a2ULL}},	// 10^(-23) * 2^194 
+  {{0xd4b1249aa59c9e4dULL, 0x0026af8533511d4eULL}},	// 10^(-24) * 2^197 
+  {{0x544ea0f76f60fd48ULL, 0x003de5a1ebb4fbb1ULL}},	// 10^(-25) * 2^201 
+  {{0x76a54d92bf80caa0ULL, 0x00318481895d9627ULL}},	// 10^(-26) * 2^204 
+  {{0x921dd7a89933d54dULL, 0x00279d346de4781fULL}},	// 10^(-27) * 2^207 
+  {{0x8362f2a75b862214ULL, 0x003f61ed7ca0c032ULL}},	// 10^(-28) * 2^211 
+  {{0xcf825bb91604e810ULL, 0x0032b4bdfd4d668eULL}},	// 10^(-29) * 2^214 
+  {{0x0c684960de6a5340ULL, 0x00289097fdd7853fULL}},	// 10^(-30) * 2^217 
+  {{0x3d203ab3e521dc33ULL, 0x002073accb12d0ffULL}},	// 10^(-31) * 2^220 
+  {{0x2e99f7863b696052ULL, 0x0033ec47ab514e65ULL}},	// 10^(-32) * 2^224 
+  {{0x587b2c6b62bab375ULL, 0x002989d2ef743eb7ULL}},	// 10^(-33) * 2^227 
+  {{0xad2f56bc4efbc2c4ULL, 0x00213b0f25f69892ULL}},	// 10^(-34) * 2^230 
+};
+
+// ten2mk128M[k - 1] = 10^(-k) * 2^exp (k), where 1 <= k <= 4 and
+// exp (k) = shiftright128[k - 1] + 128
+// the 64-bit word order is L, H
+UINT128 ten2mk128M[] = {
+  {{0xcccccccccccccccdULL, 0xccccccccccccccccULL}},	//  10^(-1) * 2^131
+  {{0x3d70a3d70a3d70a4ULL, 0xa3d70a3d70a3d70aULL}},	//  10^(-2) * 2^134
+  {{0x645a1cac083126eaULL, 0x83126e978d4fdf3bULL}},	//  10^(-3) * 2^137
+  {{0xd3c36113404ea4a9ULL, 0xd1b71758e219652bULL}}	//  10^(-4) * 2^141
+};
+
+// ten2mk128truncM[] contains T*, the top Ex >= 128 bits of 10^(-k),
+// for 1 <= k <= 4; the top bits which are 0 are not represented
+// the 64-bit word order is L, H
+UINT128 ten2mk128truncM[] = {
+  {{0xccccccccccccccccULL, 0xccccccccccccccccULL}},	//  10^(-1) * 2^131
+  {{0x3d70a3d70a3d70a3ULL, 0xa3d70a3d70a3d70aULL}},	//  10^(-2) * 2^134
+  {{0x645a1cac083126e9ULL, 0x83126e978d4fdf3bULL}},	//  10^(-3) * 2^137
+  {{0xd3c36113404ea4a8ULL, 0xd1b71758e219652bULL}}	//  10^(-4) * 2^141
+};
+
+// shiftright128M[] contains the right shift count to obtain C2* from the top
+// 128 bits of the 128x128-bit product C2 * Kx
+int shiftright128M[] = {
+  3,	// 131 - 128
+  6,	// 134 - 128
+  9,	// 137 - 128
+  13	// 141 - 128
+};
+
+// maskhigh128M[] contains the mask to apply to the top 128 bits of the
+// 128x128-bit product in order to obtain the high bits of f*
+// the high 64 bits of the mask are 0, so only the low 64 bits are represented
+UINT64 maskhigh128M[] = {
+  0x0000000000000007ULL,	//  3 = 131 - 128 bits
+  0x000000000000003fULL,	//  6 = 134 - 128 bits
+  0x00000000000001ffULL,	//  9 = 137 - 128 bits
+  0x0000000000001fffULL	// 13 = 141 - 128 bits
+};
+
+// onehalf128M[] contains 1/2 positioned correctly for
+// comparison with the high bits of f*
+// the high 64 bits are 0, so only the low 64 bits are represented
+UINT64 onehalf128M[] = {
+  0x0000000000000004ULL,	//  3 bits
+  0x0000000000000020ULL,	//  6 bits
+  0x0000000000000100ULL,	//  9 bits
+  0x0000000000001000ULL	// 13 bits
+};
+
+// ten2mk192M[k - 1] = 10^(-k-4) * 2^exp (k), where 1 <= k <= 19 and
+// exp (k) = shiftright128[k - 1] + 128
+// the 64-bit word order is L, M, H
+UINT192 ten2mk192M[] = {
+  {{0xcddd6e04c0592104ULL, 0x0fcf80dc33721d53ULL,
+    0xa7c5ac471b478423ULL}},
+  //  10^(-5) * 2^208
+  {{0xd7e45803cd141a6aULL, 0xa63f9a49c2c1b10fULL,
+    0x8637bd05af6c69b5ULL}},
+  //  10^(-6) * 2^211
+  {{0x8ca08cd2e1b9c3dcULL, 0x3d32907604691b4cULL,
+    0xd6bf94d5e57a42bcULL}},
+  //  10^(-7) * 2^215
+  {{0x3d4d3d758161697dULL, 0xfdc20d2b36ba7c3dULL,
+    0xabcc77118461cefcULL}},
+  //  10^(-8) * 2^218
+  {{0xfdd7645e011abacaULL, 0x31680a88f8953030ULL,
+    0x89705f4136b4a597ULL}},
+  //  10^(-9) * 2^221
+  {{0x2fbf06fcce912addULL, 0xb573440e5a884d1bULL,
+    0xdbe6fecebdedd5beULL}},
+  //  10^(-10) * 2^225
+  {{0xf2ff38ca3eda88b1ULL, 0xf78f69a51539d748ULL,
+    0xafebff0bcb24aafeULL}},
+  //  10^(-11) * 2^228
+  {{0xf598fa3b657ba08eULL, 0xf93f87b7442e45d3ULL,
+    0x8cbccc096f5088cbULL}},
+  //  10^(-12) * 2^231
+  {{0x88f4c3923bf900e3ULL, 0x2865a5f206b06fb9ULL,
+    0xe12e13424bb40e13ULL}},
+  //  10^(-13) * 2^235
+  {{0x6d909c74fcc733e9ULL, 0x538484c19ef38c94ULL,
+    0xb424dc35095cd80fULL}},
+  //  10^(-14) * 2^238
+  {{0x57a6e390ca38f654ULL, 0x0f9d37014bf60a10ULL,
+    0x901d7cf73ab0acd9ULL}},
+  //  10^(-15) * 2^241
+  {{0xbf716c1add27f086ULL, 0x4c2ebe687989a9b3ULL,
+    0xe69594bec44de15bULL}},
+  //  10^(-16) * 2^245
+  {{0xff8df0157db98d38ULL, 0x09befeb9fad487c2ULL,
+    0xb877aa3236a4b449ULL}},
+  //  10^(-17) * 2^248
+  {{0x32d7f344649470faULL, 0x3aff322e62439fcfULL,
+    0x9392ee8e921d5d07ULL}},
+  //  10^(-18) * 2^251
+  {{0x1e2652070753e7f5ULL, 0x2b31e9e3d06c32e5ULL,
+    0xec1e4a7db69561a5ULL}},
+  //  10^(-19) * 2^255
+  {{0x181ea8059f76532bULL, 0x88f4bb1ca6bcf584ULL,
+    0xbce5086492111aeaULL}},
+  //  10^(-20) * 2^258
+  {{0x467eecd14c5ea8efULL, 0xd3f6fc16ebca5e03ULL,
+    0x971da05074da7beeULL}},
+  //  10^(-21) * 2^261
+  {{0x70cb148213caa7e5ULL, 0x5324c68b12dd6338ULL,
+    0xf1c90080baf72cb1ULL}},
+  //  10^(-22) * 2^265
+  {{0x8d6f439b43088651ULL, 0x75b7053c0f178293ULL, 0xc16d9a0095928a27ULL}}
+  //  10^(-23) * 2^268
+};
+
+// ten2mk192truncM[] contains T*, the top Ex >= 192 bits of 10^(-k),
+// for 5 <= k <= 23; the top bits which are 0 are not represented
+// the 64-bit word order is L, M, H
+UINT192 ten2mk192truncM[] = {
+  {{0xcddd6e04c0592103ULL, 0x0fcf80dc33721d53ULL,
+    0xa7c5ac471b478423ULL}},
+  //  10^(-5) * 2^208
+  {{0xd7e45803cd141a69ULL, 0xa63f9a49c2c1b10fULL,
+    0x8637bd05af6c69b5ULL}},
+  //  10^(-6) * 2^211
+  {{0x8ca08cd2e1b9c3dbULL, 0x3d32907604691b4cULL,
+    0xd6bf94d5e57a42bcULL}},
+  //  10^(-7) * 2^215
+  {{0x3d4d3d758161697cULL, 0xfdc20d2b36ba7c3dULL,
+    0xabcc77118461cefcULL}},
+  //  10^(-8) * 2^218
+  {{0xfdd7645e011abac9ULL, 0x31680a88f8953030ULL,
+    0x89705f4136b4a597ULL}},
+  //  10^(-9) * 2^221
+  {{0x2fbf06fcce912adcULL, 0xb573440e5a884d1bULL,
+    0xdbe6fecebdedd5beULL}},
+  //  10^(-10) * 2^225
+  {{0xf2ff38ca3eda88b0ULL, 0xf78f69a51539d748ULL,
+    0xafebff0bcb24aafeULL}},
+  //  10^(-11) * 2^228
+  {{0xf598fa3b657ba08dULL, 0xf93f87b7442e45d3ULL,
+    0x8cbccc096f5088cbULL}},
+  //  10^(-12) * 2^231
+  {{0x88f4c3923bf900e2ULL, 0x2865a5f206b06fb9ULL,
+    0xe12e13424bb40e13ULL}},
+  //  10^(-13) * 2^235
+  {{0x6d909c74fcc733e8ULL, 0x538484c19ef38c94ULL,
+    0xb424dc35095cd80fULL}},
+  //  10^(-14) * 2^238
+  {{0x57a6e390ca38f653ULL, 0x0f9d37014bf60a10ULL,
+    0x901d7cf73ab0acd9ULL}},
+  //  10^(-15) * 2^241
+  {{0xbf716c1add27f085ULL, 0x4c2ebe687989a9b3ULL,
+    0xe69594bec44de15bULL}},
+  //  10^(-16) * 2^245
+  {{0xff8df0157db98d37ULL, 0x09befeb9fad487c2ULL,
+    0xb877aa3236a4b449ULL}},
+  //  10^(-17) * 2^248
+  {{0x32d7f344649470f9ULL, 0x3aff322e62439fcfULL,
+    0x9392ee8e921d5d07ULL}},
+  //  10^(-18) * 2^251
+  {{0x1e2652070753e7f4ULL, 0x2b31e9e3d06c32e5ULL,
+    0xec1e4a7db69561a5ULL}},
+  //  10^(-19) * 2^255
+  {{0x181ea8059f76532aULL, 0x88f4bb1ca6bcf584ULL,
+    0xbce5086492111aeaULL}},
+  //  10^(-20) * 2^258
+  {{0x467eecd14c5ea8eeULL, 0xd3f6fc16ebca5e03ULL,
+    0x971da05074da7beeULL}},
+  //  10^(-21) * 2^261
+  {{0x70cb148213caa7e4ULL, 0x5324c68b12dd6338ULL,
+    0xf1c90080baf72cb1ULL}},
+  //  10^(-22) * 2^265
+  {{0x8d6f439b43088650ULL, 0x75b7053c0f178293ULL, 0xc16d9a0095928a27ULL}}
+  //  10^(-23) * 2^268
+};
+
+// shiftright192M[] contains the right shift count to obtain C2* from the top
+// 192 bits of the 192x192-bit product C2 * Kx if 0 <= ind <= 14 where ind is 
+// the index in the table, or from the top 128 bits if 15 <= ind <= 18
+int shiftright192M[] = {
+  16,	// 208 - 192
+  19,	// 211 - 192
+  23,	// 215 - 192
+  26,	// 218 - 192
+  29,	// 221 - 192
+  33,	// 225 - 192
+  36,	// 228 - 192
+  39,	// 231 - 192
+  43,	// 235 - 192
+  46,	// 238 - 192
+  49,	// 241 - 192
+  53,	// 245 - 192
+  56,	// 248 - 192
+  59,	// 251 - 192
+  63,	// 255 - 192
+  2,	// 258 - 256
+  5,	// 261 - 256
+  9,	// 265 - 256
+  12	// 268 - 256
+};
+
+// maskhigh192M[] contains the mask to apply to the top 192 bits of the
+// 192x192-bit product in order to obtain the high bits of f*
+// if 0 <= ind <= 14 where ind is the index in the table, then the high 128 bits
+// of the 384-bit mask are 0;  if 15 <= ind <= 18 then the high 64 bits are 0
+UINT64 maskhigh192M[] = {
+  0x000000000000ffffULL,	//  16 = 208 - 192 bits
+  0x000000000007ffffULL,	//  19 = 211 - 192 bits
+  0x00000000007fffffULL,	//  23 = 215 - 192 bits
+  0x0000000003ffffffULL,	//  26 = 218 - 192 bits
+  0x000000001fffffffULL,	//  29 = 221 - 192 bits
+  0x00000001ffffffffULL,	//  33 = 225 - 192 bits
+  0x0000000fffffffffULL,	//  36 = 228 - 192 bits
+  0x0000007fffffffffULL,	//  39 = 231 - 192 bits
+  0x000007ffffffffffULL,	//  43 = 235 - 192 bits
+  0x00003fffffffffffULL,	//  46 = 238 - 192 bits
+  0x0001ffffffffffffULL,	//  49 = 241 - 192 bits
+  0x001fffffffffffffULL,	//  53 = 245 - 192 bits
+  0x00ffffffffffffffULL,	//  56 = 248 - 192 bits
+  0x07ffffffffffffffULL,	//  59 = 251 - 192 bits
+  0x7fffffffffffffffULL,	//  63 = 255 - 192 bits
+  0x0000000000000003ULL,	//   2 = 258 - 256 bits
+  0x000000000000001fULL,	//   5 = 261 - 256 bits
+  0x00000000000001ffULL,	//   9 = 265 - 256 bits
+  0x0000000000000fffULL	//  12 = 268 - 256 bits
+};
+
+// onehalf192M[] contains 1/2 positioned correctly for
+// comparison with the high bits of f*
+// if 0 <= ind <= 14 where ind is the index in the table, then the high 128 bits
+// of the 384-bit mask are 0;  if 15 <= ind <= 18 then the high 648 bits are 0
+UINT64 onehalf192M[] = {
+  0x0000000000008000ULL,	//  16 = 208 - 192 bits
+  0x0000000000040000ULL,	//  19 = 211 - 192 bits
+  0x0000000000400000ULL,	//  23 = 215 - 192 bits
+  0x0000000002000000ULL,	//  26 = 218 - 192 bits
+  0x0000000010000000ULL,	//  29 = 221 - 192 bits
+  0x0000000100000000ULL,	//  33 = 225 - 192 bits
+  0x0000000800000000ULL,	//  36 = 228 - 192 bits
+  0x0000004000000000ULL,	//  39 = 231 - 192 bits
+  0x0000040000000000ULL,	//  43 = 235 - 192 bits
+  0x0000200000000000ULL,	//  46 = 238 - 192 bits
+  0x0001000000000000ULL,	//  49 = 241 - 192 bits
+  0x0010000000000000ULL,	//  53 = 245 - 192 bits
+  0x0080000000000000ULL,	//  56 = 248 - 192 bits
+  0x0400000000000000ULL,	//  59 = 251 - 192 bits
+  0x4000000000000000ULL,	//  63 = 255 - 192 bits
+  0x0000000000000002ULL,	//   2 = 258 - 256 bits
+  0x0000000000000010ULL,	//   5 = 261 - 256 bits
+  0x0000000000000100ULL,	//   9 = 265 - 256 bits
+  0x0000000000000800ULL	//  12 = 268 - 256 bits
+};
+
+// ten2mk256M[k - 1] = 10^(-k-23) * 2^exp (k), where 1 <= k <= 11 and
+// exp (k) = shiftright128[k - 1] + 128
+UINT256 ten2mk256M[] = {	// the 64-bit word order is LL, LH, HL, HH
+  {{0xf23472530ce6e3edULL, 0xd78c3615cf3a050cULL,
+    0xc4926a9672793542ULL, 0x9abe14cd44753b52ULL}},	//  10^(-24) * 2^335
+  {{0xe9ed83b814a49fe1ULL, 0x8c1389bc7ec33b47ULL,
+    0x3a83ddbd83f52204ULL, 0xf79687aed3eec551ULL}},	//  10^(-25) * 2^339
+  {{0x87f1362cdd507fe7ULL, 0x3cdc6e306568fc39ULL,
+    0x95364afe032a819dULL, 0xc612062576589ddaULL}},	//  10^(-26) * 2^342
+  {{0x9ff42b5717739986ULL, 0xca49f1c05120c9c7ULL,
+    0x775ea264cf55347dULL, 0x9e74d1b791e07e48ULL}},	//  10^(-27) * 2^345
+  {{0xccb9def1bf1f5c09ULL, 0x76dcb60081ce0fa5ULL,
+    0x8bca9d6e188853fcULL, 0xfd87b5f28300ca0dULL}},	//  10^(-28) * 2^349
+  {{0xa3c7e58e327f7cd4ULL, 0x5f16f80067d80c84ULL,
+    0x096ee45813a04330ULL, 0xcad2f7f5359a3b3eULL}},	//  10^(-29) * 2^352
+  {{0xb6398471c1ff9710ULL, 0x18df2ccd1fe00a03ULL,
+    0xa1258379a94d028dULL, 0xa2425ff75e14fc31ULL}},	//  10^(-30) * 2^355
+  {{0xf82e038e34cc78daULL, 0x4718f0a419800802ULL,
+    0x80eacf948770ced7ULL, 0x81ceb32c4b43fcf4ULL}},	//  10^(-31) * 2^358
+  {{0x59e338e387ad8e29ULL, 0x0b5b1aa028ccd99eULL,
+    0x67de18eda5814af2ULL, 0xcfb11ead453994baULL}},	//  10^(-32) * 2^362
+  {{0x47e8fa4f9fbe0b54ULL, 0x6f7c154ced70ae18ULL,
+    0xecb1ad8aeacdd58eULL, 0xa6274bbdd0fadd61ULL}},	//  10^(-33) * 2^365
+  {{0xd320c83fb2fe6f76ULL, 0xbf967770bdf3be79ULL,
+    0xbd5af13bef0b113eULL, 0x84ec3c97da624ab4ULL}}	//  10^(-34) * 2^368
+};
+
+// ten2mk256truncM[] contains T*, the top Ex >= 256 bits of 10^(-k),
+// for 24 <= k <= 34; the top bits which are 0 are not represented
+UINT256 ten2mk256truncM[] = {	// the 64-bit word order is LL, LH, HL, HH
+  {{0xf23472530ce6e3ecULL, 0xd78c3615cf3a050cULL,
+    0xc4926a9672793542ULL, 0x9abe14cd44753b52ULL}},	//  10^(-24) * 2^335
+  {{0xe9ed83b814a49fe0ULL, 0x8c1389bc7ec33b47ULL,
+    0x3a83ddbd83f52204ULL, 0xf79687aed3eec551ULL}},	//  10^(-25) * 2^339
+  {{0x87f1362cdd507fe6ULL, 0x3cdc6e306568fc39ULL,
+    0x95364afe032a819dULL, 0xc612062576589ddaULL}},	//  10^(-26) * 2^342
+  {{0x775ea264cf55347cULL, 0x9ff42b5717739986ULL,
+    0xca49f1c05120c9c7ULL, 0x9e74d1b791e07e48ULL}},	//  10^(-27) * 2^345
+  {{0xccb9def1bf1f5c08ULL, 0x76dcb60081ce0fa5ULL,
+    0x8bca9d6e188853fcULL, 0xfd87b5f28300ca0dULL}},	//  10^(-28) * 2^349
+  {{0xa3c7e58e327f7cd3ULL, 0x5f16f80067d80c84ULL,
+    0x096ee45813a04330ULL, 0xcad2f7f5359a3b3eULL}},	//  10^(-29) * 2^352
+  {{0xb6398471c1ff970fULL, 0x18df2ccd1fe00a03ULL,
+    0xa1258379a94d028dULL, 0xa2425ff75e14fc31ULL}},	//  10^(-30) * 2^355
+  {{0xf82e038e34cc78d9ULL, 0x4718f0a419800802ULL,
+    0x80eacf948770ced7ULL, 0x81ceb32c4b43fcf4ULL}},	//  10^(-31) * 2^358
+  {{0x59e338e387ad8e28ULL, 0x0b5b1aa028ccd99eULL,
+    0x67de18eda5814af2ULL, 0xcfb11ead453994baULL}},	//  10^(-32) * 2^362
+  {{0x47e8fa4f9fbe0b53ULL, 0x6f7c154ced70ae18ULL,
+    0xecb1ad8aeacdd58eULL, 0xa6274bbdd0fadd61ULL}},	//  10^(-33) * 2^365
+  {{0xd320c83fb2fe6f75ULL, 0xbf967770bdf3be79ULL,
+    0xbd5af13bef0b113eULL, 0x84ec3c97da624ab4ULL}}	//  10^(-34) * 2^368
+};
+
+// shiftright256M[] contains the right shift count to obtain C2* from the top
+// 192 bits of the 256x256-bit product C2 * Kx 
+int shiftright256M[] = {
+  15,	// 335 - 320
+  19,	// 339 - 320
+  22,	// 342 - 320
+  25,	// 345 - 320
+  29,	// 349 - 320
+  32,	// 352 - 320 // careful of 32-bit machines!
+  35,	// 355 - 320
+  38,	// 358 - 320
+  42,	// 362 - 320
+  45,	// 365 - 320
+  48	// 368 - 320
+};
+
+// maskhigh256M[] contains the mask to apply to the top 192 bits of the
+// 256x256-bit product in order to obtain the high bits of f*
+UINT64 maskhigh256M[] = {
+  0x0000000000007fffULL,	//  15 = 335 - 320 bits
+  0x000000000007ffffULL,	//  19 = 339 - 320 bits
+  0x00000000003fffffULL,	//  22 = 342 - 320 bits
+  0x0000000001ffffffULL,	//  25 = 345 - 320 bits
+  0x000000001fffffffULL,	//  29 = 349 - 320 bits
+  0x00000000ffffffffULL,	//  32 = 352 - 320 bits
+  0x00000007ffffffffULL,	//  35 = 355 - 320 bits
+  0x0000003fffffffffULL,	//  38 = 358 - 320 bits
+  0x000003ffffffffffULL,	//  42 = 362 - 320 bits
+  0x00001fffffffffffULL,	//  45 = 365 - 320 bits
+  0x0000ffffffffffffULL	//  48 = 368 - 320 bits
+};
+
+// onehalf256M[] contains 1/2 positioned correctly for comparison with the 
+// high bits of f*; the high 128 bits of the 512-bit mask are 0
+UINT64 onehalf256M[] = {
+  0x0000000000004000ULL,	//  15 = 335 - 320 bits
+  0x0000000000040000ULL,	//  19 = 339 - 320 bits
+  0x0000000000200000ULL,	//  22 = 342 - 320 bits
+  0x0000000001000000ULL,	//  25 = 345 - 320 bits
+  0x0000000010000000ULL,	//  29 = 349 - 320 bits
+  0x0000000080000000ULL,	//  32 = 352 - 320 bits
+  0x0000000400000000ULL,	//  35 = 355 - 320 bits
+  0x0000002000000000ULL,	//  38 = 358 - 320 bits
+  0x0000020000000000ULL,	//  42 = 362 - 320 bits
+  0x0000100000000000ULL,	//  45 = 365 - 320 bits
+  0x0000800000000000ULL	//  48 = 368 - 320 bits
+};
+
+
+// char_table2[] is used to convert n to string, where 10 <= n <= 99
+unsigned char char_table2[180] = {
+  '1', '0',
+  '1', '1',
+  '1', '2',
+  '1', '3',
+  '1', '4',
+  '1', '5',
+  '1', '6',
+  '1', '7',
+  '1', '8',
+  '1', '9',
+  '2', '0',
+  '2', '1',
+  '2', '2',
+  '2', '3',
+  '2', '4',
+  '2', '5',
+  '2', '6',
+  '2', '7',
+  '2', '8',
+  '2', '9',
+  '3', '0',
+  '3', '1',
+  '3', '2',
+  '3', '3',
+  '3', '4',
+  '3', '5',
+  '3', '6',
+  '3', '7',
+  '3', '8',
+  '3', '9',
+  '4', '0',
+  '4', '1',
+  '4', '2',
+  '4', '3',
+  '4', '4',
+  '4', '5',
+  '4', '6',
+  '4', '7',
+  '4', '8',
+  '4', '9',
+  '5', '0',
+  '5', '1',
+  '5', '2',
+  '5', '3',
+  '5', '4',
+  '5', '5',
+  '5', '6',
+  '5', '7',
+  '5', '8',
+  '5', '9',
+  '6', '0',
+  '6', '1',
+  '6', '2',
+  '6', '3',
+  '6', '4',
+  '6', '5',
+  '6', '6',
+  '6', '7',
+  '6', '8',
+  '6', '9',
+  '7', '0',
+  '7', '1',
+  '7', '2',
+  '7', '3',
+  '7', '4',
+  '7', '5',
+  '7', '6',
+  '7', '7',
+  '7', '8',
+  '7', '9',
+  '8', '0',
+  '8', '1',
+  '8', '2',
+  '8', '3',
+  '8', '4',
+  '8', '5',
+  '8', '6',
+  '8', '7',
+  '8', '8',
+  '8', '9',
+  '9', '0',
+  '9', '1',
+  '9', '2',
+  '9', '3',
+  '9', '4',
+  '9', '5',
+  '9', '6',
+  '9', '7',
+  '9', '8',
+  '9', '9'
+};
+
+
+// char_table3[] is used to convert n to string, where 000 <= n <= 999
+unsigned char char_table3[3000] = {
+  '0', '0', '0',
+  '0', '0', '1',
+  '0', '0', '2',
+  '0', '0', '3',
+  '0', '0', '4',
+  '0', '0', '5',
+  '0', '0', '6',
+  '0', '0', '7',
+  '0', '0', '8',
+  '0', '0', '9',
+  '0', '1', '0',
+  '0', '1', '1',
+  '0', '1', '2',
+  '0', '1', '3',
+  '0', '1', '4',
+  '0', '1', '5',
+  '0', '1', '6',
+  '0', '1', '7',
+  '0', '1', '8',
+  '0', '1', '9',
+  '0', '2', '0',
+  '0', '2', '1',
+  '0', '2', '2',
+  '0', '2', '3',
+  '0', '2', '4',
+  '0', '2', '5',
+  '0', '2', '6',
+  '0', '2', '7',
+  '0', '2', '8',
+  '0', '2', '9',
+  '0', '3', '0',
+  '0', '3', '1',
+  '0', '3', '2',
+  '0', '3', '3',
+  '0', '3', '4',
+  '0', '3', '5',
+  '0', '3', '6',
+  '0', '3', '7',
+  '0', '3', '8',
+  '0', '3', '9',
+  '0', '4', '0',
+  '0', '4', '1',
+  '0', '4', '2',
+  '0', '4', '3',
+  '0', '4', '4',
+  '0', '4', '5',
+  '0', '4', '6',
+  '0', '4', '7',
+  '0', '4', '8',
+  '0', '4', '9',
+  '0', '5', '0',
+  '0', '5', '1',
+  '0', '5', '2',
+  '0', '5', '3',
+  '0', '5', '4',
+  '0', '5', '5',
+  '0', '5', '6',
+  '0', '5', '7',
+  '0', '5', '8',
+  '0', '5', '9',
+  '0', '6', '0',
+  '0', '6', '1',
+  '0', '6', '2',
+  '0', '6', '3',
+  '0', '6', '4',
+  '0', '6', '5',
+  '0', '6', '6',
+  '0', '6', '7',
+  '0', '6', '8',
+  '0', '6', '9',
+  '0', '7', '0',
+  '0', '7', '1',
+  '0', '7', '2',
+  '0', '7', '3',
+  '0', '7', '4',
+  '0', '7', '5',
+  '0', '7', '6',
+  '0', '7', '7',
+  '0', '7', '8',
+  '0', '7', '9',
+  '0', '8', '0',
+  '0', '8', '1',
+  '0', '8', '2',
+  '0', '8', '3',
+  '0', '8', '4',
+  '0', '8', '5',
+  '0', '8', '6',
+  '0', '8', '7',
+  '0', '8', '8',
+  '0', '8', '9',
+  '0', '9', '0',
+  '0', '9', '1',
+  '0', '9', '2',
+  '0', '9', '3',
+  '0', '9', '4',
+  '0', '9', '5',
+  '0', '9', '6',
+  '0', '9', '7',
+  '0', '9', '8',
+  '0', '9', '9',
+  '1', '0', '0',
+  '1', '0', '1',
+  '1', '0', '2',
+  '1', '0', '3',
+  '1', '0', '4',
+  '1', '0', '5',
+  '1', '0', '6',
+  '1', '0', '7',
+  '1', '0', '8',
+  '1', '0', '9',
+  '1', '1', '0',
+  '1', '1', '1',
+  '1', '1', '2',
+  '1', '1', '3',
+  '1', '1', '4',
+  '1', '1', '5',
+  '1', '1', '6',
+  '1', '1', '7',
+  '1', '1', '8',
+  '1', '1', '9',
+  '1', '2', '0',
+  '1', '2', '1',
+  '1', '2', '2',
+  '1', '2', '3',
+  '1', '2', '4',
+  '1', '2', '5',
+  '1', '2', '6',
+  '1', '2', '7',
+  '1', '2', '8',
+  '1', '2', '9',
+  '1', '3', '0',
+  '1', '3', '1',
+  '1', '3', '2',
+  '1', '3', '3',
+  '1', '3', '4',
+  '1', '3', '5',
+  '1', '3', '6',
+  '1', '3', '7',
+  '1', '3', '8',
+  '1', '3', '9',
+  '1', '4', '0',
+  '1', '4', '1',
+  '1', '4', '2',
+  '1', '4', '3',
+  '1', '4', '4',
+  '1', '4', '5',
+  '1', '4', '6',
+  '1', '4', '7',
+  '1', '4', '8',
+  '1', '4', '9',
+  '1', '5', '0',
+  '1', '5', '1',
+  '1', '5', '2',
+  '1', '5', '3',
+  '1', '5', '4',
+  '1', '5', '5',
+  '1', '5', '6',
+  '1', '5', '7',
+  '1', '5', '8',
+  '1', '5', '9',
+  '1', '6', '0',
+  '1', '6', '1',
+  '1', '6', '2',
+  '1', '6', '3',
+  '1', '6', '4',
+  '1', '6', '5',
+  '1', '6', '6',
+  '1', '6', '7',
+  '1', '6', '8',
+  '1', '6', '9',
+  '1', '7', '0',
+  '1', '7', '1',
+  '1', '7', '2',
+  '1', '7', '3',
+  '1', '7', '4',
+  '1', '7', '5',
+  '1', '7', '6',
+  '1', '7', '7',
+  '1', '7', '8',
+  '1', '7', '9',
+  '1', '8', '0',
+  '1', '8', '1',
+  '1', '8', '2',
+  '1', '8', '3',
+  '1', '8', '4',
+  '1', '8', '5',
+  '1', '8', '6',
+  '1', '8', '7',
+  '1', '8', '8',
+  '1', '8', '9',
+  '1', '9', '0',
+  '1', '9', '1',
+  '1', '9', '2',
+  '1', '9', '3',
+  '1', '9', '4',
+  '1', '9', '5',
+  '1', '9', '6',
+  '1', '9', '7',
+  '1', '9', '8',
+  '1', '9', '9',
+  '2', '0', '0',
+  '2', '0', '1',
+  '2', '0', '2',
+  '2', '0', '3',
+  '2', '0', '4',
+  '2', '0', '5',
+  '2', '0', '6',
+  '2', '0', '7',
+  '2', '0', '8',
+  '2', '0', '9',
+  '2', '1', '0',
+  '2', '1', '1',
+  '2', '1', '2',
+  '2', '1', '3',
+  '2', '1', '4',
+  '2', '1', '5',
+  '2', '1', '6',
+  '2', '1', '7',
+  '2', '1', '8',
+  '2', '1', '9',
+  '2', '2', '0',
+  '2', '2', '1',
+  '2', '2', '2',
+  '2', '2', '3',
+  '2', '2', '4',
+  '2', '2', '5',
+  '2', '2', '6',
+  '2', '2', '7',
+  '2', '2', '8',
+  '2', '2', '9',
+  '2', '3', '0',
+  '2', '3', '1',
+  '2', '3', '2',
+  '2', '3', '3',
+  '2', '3', '4',
+  '2', '3', '5',
+  '2', '3', '6',
+  '2', '3', '7',
+  '2', '3', '8',
+  '2', '3', '9',
+  '2', '4', '0',
+  '2', '4', '1',
+  '2', '4', '2',
+  '2', '4', '3',
+  '2', '4', '4',
+  '2', '4', '5',
+  '2', '4', '6',
+  '2', '4', '7',
+  '2', '4', '8',
+  '2', '4', '9',
+  '2', '5', '0',
+  '2', '5', '1',
+  '2', '5', '2',
+  '2', '5', '3',
+  '2', '5', '4',
+  '2', '5', '5',
+  '2', '5', '6',
+  '2', '5', '7',
+  '2', '5', '8',
+  '2', '5', '9',
+  '2', '6', '0',
+  '2', '6', '1',
+  '2', '6', '2',
+  '2', '6', '3',
+  '2', '6', '4',
+  '2', '6', '5',
+  '2', '6', '6',
+  '2', '6', '7',
+  '2', '6', '8',
+  '2', '6', '9',
+  '2', '7', '0',
+  '2', '7', '1',
+  '2', '7', '2',
+  '2', '7', '3',
+  '2', '7', '4',
+  '2', '7', '5',
+  '2', '7', '6',
+  '2', '7', '7',
+  '2', '7', '8',
+  '2', '7', '9',
+  '2', '8', '0',
+  '2', '8', '1',
+  '2', '8', '2',
+  '2', '8', '3',
+  '2', '8', '4',
+  '2', '8', '5',
+  '2', '8', '6',
+  '2', '8', '7',
+  '2', '8', '8',
+  '2', '8', '9',
+  '2', '9', '0',
+  '2', '9', '1',
+  '2', '9', '2',
+  '2', '9', '3',
+  '2', '9', '4',
+  '2', '9', '5',
+  '2', '9', '6',
+  '2', '9', '7',
+  '2', '9', '8',
+  '2', '9', '9',
+  '3', '0', '0',
+  '3', '0', '1',
+  '3', '0', '2',
+  '3', '0', '3',
+  '3', '0', '4',
+  '3', '0', '5',
+  '3', '0', '6',
+  '3', '0', '7',
+  '3', '0', '8',
+  '3', '0', '9',
+  '3', '1', '0',
+  '3', '1', '1',
+  '3', '1', '2',
+  '3', '1', '3',
+  '3', '1', '4',
+  '3', '1', '5',
+  '3', '1', '6',
+  '3', '1', '7',
+  '3', '1', '8',
+  '3', '1', '9',
+  '3', '2', '0',
+  '3', '2', '1',
+  '3', '2', '2',
+  '3', '2', '3',
+  '3', '2', '4',
+  '3', '2', '5',
+  '3', '2', '6',
+  '3', '2', '7',
+  '3', '2', '8',
+  '3', '2', '9',
+  '3', '3', '0',
+  '3', '3', '1',
+  '3', '3', '2',
+  '3', '3', '3',
+  '3', '3', '4',
+  '3', '3', '5',
+  '3', '3', '6',
+  '3', '3', '7',
+  '3', '3', '8',
+  '3', '3', '9',
+  '3', '4', '0',
+  '3', '4', '1',
+  '3', '4', '2',
+  '3', '4', '3',
+  '3', '4', '4',
+  '3', '4', '5',
+  '3', '4', '6',
+  '3', '4', '7',
+  '3', '4', '8',
+  '3', '4', '9',
+  '3', '5', '0',
+  '3', '5', '1',
+  '3', '5', '2',
+  '3', '5', '3',
+  '3', '5', '4',
+  '3', '5', '5',
+  '3', '5', '6',
+  '3', '5', '7',
+  '3', '5', '8',
+  '3', '5', '9',
+  '3', '6', '0',
+  '3', '6', '1',
+  '3', '6', '2',
+  '3', '6', '3',
+  '3', '6', '4',
+  '3', '6', '5',
+  '3', '6', '6',
+  '3', '6', '7',
+  '3', '6', '8',
+  '3', '6', '9',
+  '3', '7', '0',
+  '3', '7', '1',
+  '3', '7', '2',
+  '3', '7', '3',
+  '3', '7', '4',
+  '3', '7', '5',
+  '3', '7', '6',
+  '3', '7', '7',
+  '3', '7', '8',
+  '3', '7', '9',
+  '3', '8', '0',
+  '3', '8', '1',
+  '3', '8', '2',
+  '3', '8', '3',
+  '3', '8', '4',
+  '3', '8', '5',
+  '3', '8', '6',
+  '3', '8', '7',
+  '3', '8', '8',
+  '3', '8', '9',
+  '3', '9', '0',
+  '3', '9', '1',
+  '3', '9', '2',
+  '3', '9', '3',
+  '3', '9', '4',
+  '3', '9', '5',
+  '3', '9', '6',
+  '3', '9', '7',
+  '3', '9', '8',
+  '3', '9', '9',
+  '4', '0', '0',
+  '4', '0', '1',
+  '4', '0', '2',
+  '4', '0', '3',
+  '4', '0', '4',
+  '4', '0', '5',
+  '4', '0', '6',
+  '4', '0', '7',
+  '4', '0', '8',
+  '4', '0', '9',
+  '4', '1', '0',
+  '4', '1', '1',
+  '4', '1', '2',
+  '4', '1', '3',
+  '4', '1', '4',
+  '4', '1', '5',
+  '4', '1', '6',
+  '4', '1', '7',
+  '4', '1', '8',
+  '4', '1', '9',
+  '4', '2', '0',
+  '4', '2', '1',
+  '4', '2', '2',
+  '4', '2', '3',
+  '4', '2', '4',
+  '4', '2', '5',
+  '4', '2', '6',
+  '4', '2', '7',
+  '4', '2', '8',
+  '4', '2', '9',
+  '4', '3', '0',
+  '4', '3', '1',
+  '4', '3', '2',
+  '4', '3', '3',
+  '4', '3', '4',
+  '4', '3', '5',
+  '4', '3', '6',
+  '4', '3', '7',
+  '4', '3', '8',
+  '4', '3', '9',
+  '4', '4', '0',
+  '4', '4', '1',
+  '4', '4', '2',
+  '4', '4', '3',
+  '4', '4', '4',
+  '4', '4', '5',
+  '4', '4', '6',
+  '4', '4', '7',
+  '4', '4', '8',
+  '4', '4', '9',
+  '4', '5', '0',
+  '4', '5', '1',
+  '4', '5', '2',
+  '4', '5', '3',
+  '4', '5', '4',
+  '4', '5', '5',
+  '4', '5', '6',
+  '4', '5', '7',
+  '4', '5', '8',
+  '4', '5', '9',
+  '4', '6', '0',
+  '4', '6', '1',
+  '4', '6', '2',
+  '4', '6', '3',
+  '4', '6', '4',
+  '4', '6', '5',
+  '4', '6', '6',
+  '4', '6', '7',
+  '4', '6', '8',
+  '4', '6', '9',
+  '4', '7', '0',
+  '4', '7', '1',
+  '4', '7', '2',
+  '4', '7', '3',
+  '4', '7', '4',
+  '4', '7', '5',
+  '4', '7', '6',
+  '4', '7', '7',
+  '4', '7', '8',
+  '4', '7', '9',
+  '4', '8', '0',
+  '4', '8', '1',
+  '4', '8', '2',
+  '4', '8', '3',
+  '4', '8', '4',
+  '4', '8', '5',
+  '4', '8', '6',
+  '4', '8', '7',
+  '4', '8', '8',
+  '4', '8', '9',
+  '4', '9', '0',
+  '4', '9', '1',
+  '4', '9', '2',
+  '4', '9', '3',
+  '4', '9', '4',
+  '4', '9', '5',
+  '4', '9', '6',
+  '4', '9', '7',
+  '4', '9', '8',
+  '4', '9', '9',
+  '5', '0', '0',
+  '5', '0', '1',
+  '5', '0', '2',
+  '5', '0', '3',
+  '5', '0', '4',
+  '5', '0', '5',
+  '5', '0', '6',
+  '5', '0', '7',
+  '5', '0', '8',
+  '5', '0', '9',
+  '5', '1', '0',
+  '5', '1', '1',
+  '5', '1', '2',
+  '5', '1', '3',
+  '5', '1', '4',
+  '5', '1', '5',
+  '5', '1', '6',
+  '5', '1', '7',
+  '5', '1', '8',
+  '5', '1', '9',
+  '5', '2', '0',
+  '5', '2', '1',
+  '5', '2', '2',
+  '5', '2', '3',
+  '5', '2', '4',
+  '5', '2', '5',
+  '5', '2', '6',
+  '5', '2', '7',
+  '5', '2', '8',
+  '5', '2', '9',
+  '5', '3', '0',
+  '5', '3', '1',
+  '5', '3', '2',
+  '5', '3', '3',
+  '5', '3', '4',
+  '5', '3', '5',
+  '5', '3', '6',
+  '5', '3', '7',
+  '5', '3', '8',
+  '5', '3', '9',
+  '5', '4', '0',
+  '5', '4', '1',
+  '5', '4', '2',
+  '5', '4', '3',
+  '5', '4', '4',
+  '5', '4', '5',
+  '5', '4', '6',
+  '5', '4', '7',
+  '5', '4', '8',
+  '5', '4', '9',
+  '5', '5', '0',
+  '5', '5', '1',
+  '5', '5', '2',
+  '5', '5', '3',
+  '5', '5', '4',
+  '5', '5', '5',
+  '5', '5', '6',
+  '5', '5', '7',
+  '5', '5', '8',
+  '5', '5', '9',
+  '5', '6', '0',
+  '5', '6', '1',
+  '5', '6', '2',
+  '5', '6', '3',
+  '5', '6', '4',
+  '5', '6', '5',
+  '5', '6', '6',
+  '5', '6', '7',
+  '5', '6', '8',
+  '5', '6', '9',
+  '5', '7', '0',
+  '5', '7', '1',
+  '5', '7', '2',
+  '5', '7', '3',
+  '5', '7', '4',
+  '5', '7', '5',
+  '5', '7', '6',
+  '5', '7', '7',
+  '5', '7', '8',
+  '5', '7', '9',
+  '5', '8', '0',
+  '5', '8', '1',
+  '5', '8', '2',
+  '5', '8', '3',
+  '5', '8', '4',
+  '5', '8', '5',
+  '5', '8', '6',
+  '5', '8', '7',
+  '5', '8', '8',
+  '5', '8', '9',
+  '5', '9', '0',
+  '5', '9', '1',
+  '5', '9', '2',
+  '5', '9', '3',
+  '5', '9', '4',
+  '5', '9', '5',
+  '5', '9', '6',
+  '5', '9', '7',
+  '5', '9', '8',
+  '5', '9', '9',
+  '6', '0', '0',
+  '6', '0', '1',
+  '6', '0', '2',
+  '6', '0', '3',
+  '6', '0', '4',
+  '6', '0', '5',
+  '6', '0', '6',
+  '6', '0', '7',
+  '6', '0', '8',
+  '6', '0', '9',
+  '6', '1', '0',
+  '6', '1', '1',
+  '6', '1', '2',
+  '6', '1', '3',
+  '6', '1', '4',
+  '6', '1', '5',
+  '6', '1', '6',
+  '6', '1', '7',
+  '6', '1', '8',
+  '6', '1', '9',
+  '6', '2', '0',
+  '6', '2', '1',
+  '6', '2', '2',
+  '6', '2', '3',
+  '6', '2', '4',
+  '6', '2', '5',
+  '6', '2', '6',
+  '6', '2', '7',
+  '6', '2', '8',
+  '6', '2', '9',
+  '6', '3', '0',
+  '6', '3', '1',
+  '6', '3', '2',
+  '6', '3', '3',
+  '6', '3', '4',
+  '6', '3', '5',
+  '6', '3', '6',
+  '6', '3', '7',
+  '6', '3', '8',
+  '6', '3', '9',
+  '6', '4', '0',
+  '6', '4', '1',
+  '6', '4', '2',
+  '6', '4', '3',
+  '6', '4', '4',
+  '6', '4', '5',
+  '6', '4', '6',
+  '6', '4', '7',
+  '6', '4', '8',
+  '6', '4', '9',
+  '6', '5', '0',
+  '6', '5', '1',
+  '6', '5', '2',
+  '6', '5', '3',
+  '6', '5', '4',
+  '6', '5', '5',
+  '6', '5', '6',
+  '6', '5', '7',
+  '6', '5', '8',
+  '6', '5', '9',
+  '6', '6', '0',
+  '6', '6', '1',
+  '6', '6', '2',
+  '6', '6', '3',
+  '6', '6', '4',
+  '6', '6', '5',
+  '6', '6', '6',
+  '6', '6', '7',
+  '6', '6', '8',
+  '6', '6', '9',
+  '6', '7', '0',
+  '6', '7', '1',
+  '6', '7', '2',
+  '6', '7', '3',
+  '6', '7', '4',
+  '6', '7', '5',
+  '6', '7', '6',
+  '6', '7', '7',
+  '6', '7', '8',
+  '6', '7', '9',
+  '6', '8', '0',
+  '6', '8', '1',
+  '6', '8', '2',
+  '6', '8', '3',
+  '6', '8', '4',
+  '6', '8', '5',
+  '6', '8', '6',
+  '6', '8', '7',
+  '6', '8', '8',
+  '6', '8', '9',
+  '6', '9', '0',
+  '6', '9', '1',
+  '6', '9', '2',
+  '6', '9', '3',
+  '6', '9', '4',
+  '6', '9', '5',
+  '6', '9', '6',
+  '6', '9', '7',
+  '6', '9', '8',
+  '6', '9', '9',
+  '7', '0', '0',
+  '7', '0', '1',
+  '7', '0', '2',
+  '7', '0', '3',
+  '7', '0', '4',
+  '7', '0', '5',
+  '7', '0', '6',
+  '7', '0', '7',
+  '7', '0', '8',
+  '7', '0', '9',
+  '7', '1', '0',
+  '7', '1', '1',
+  '7', '1', '2',
+  '7', '1', '3',
+  '7', '1', '4',
+  '7', '1', '5',
+  '7', '1', '6',
+  '7', '1', '7',
+  '7', '1', '8',
+  '7', '1', '9',
+  '7', '2', '0',
+  '7', '2', '1',
+  '7', '2', '2',
+  '7', '2', '3',
+  '7', '2', '4',
+  '7', '2', '5',
+  '7', '2', '6',
+  '7', '2', '7',
+  '7', '2', '8',
+  '7', '2', '9',
+  '7', '3', '0',
+  '7', '3', '1',
+  '7', '3', '2',
+  '7', '3', '3',
+  '7', '3', '4',
+  '7', '3', '5',
+  '7', '3', '6',
+  '7', '3', '7',
+  '7', '3', '8',
+  '7', '3', '9',
+  '7', '4', '0',
+  '7', '4', '1',
+  '7', '4', '2',
+  '7', '4', '3',
+  '7', '4', '4',
+  '7', '4', '5',
+  '7', '4', '6',
+  '7', '4', '7',
+  '7', '4', '8',
+  '7', '4', '9',
+  '7', '5', '0',
+  '7', '5', '1',
+  '7', '5', '2',
+  '7', '5', '3',
+  '7', '5', '4',
+  '7', '5', '5',
+  '7', '5', '6',
+  '7', '5', '7',
+  '7', '5', '8',
+  '7', '5', '9',
+  '7', '6', '0',
+  '7', '6', '1',
+  '7', '6', '2',
+  '7', '6', '3',
+  '7', '6', '4',
+  '7', '6', '5',
+  '7', '6', '6',
+  '7', '6', '7',
+  '7', '6', '8',
+  '7', '6', '9',
+  '7', '7', '0',
+  '7', '7', '1',
+  '7', '7', '2',
+  '7', '7', '3',
+  '7', '7', '4',
+  '7', '7', '5',
+  '7', '7', '6',
+  '7', '7', '7',
+  '7', '7', '8',
+  '7', '7', '9',
+  '7', '8', '0',
+  '7', '8', '1',
+  '7', '8', '2',
+  '7', '8', '3',
+  '7', '8', '4',
+  '7', '8', '5',
+  '7', '8', '6',
+  '7', '8', '7',
+  '7', '8', '8',
+  '7', '8', '9',
+  '7', '9', '0',
+  '7', '9', '1',
+  '7', '9', '2',
+  '7', '9', '3',
+  '7', '9', '4',
+  '7', '9', '5',
+  '7', '9', '6',
+  '7', '9', '7',
+  '7', '9', '8',
+  '7', '9', '9',
+  '8', '0', '0',
+  '8', '0', '1',
+  '8', '0', '2',
+  '8', '0', '3',
+  '8', '0', '4',
+  '8', '0', '5',
+  '8', '0', '6',
+  '8', '0', '7',
+  '8', '0', '8',
+  '8', '0', '9',
+  '8', '1', '0',
+  '8', '1', '1',
+  '8', '1', '2',
+  '8', '1', '3',
+  '8', '1', '4',
+  '8', '1', '5',
+  '8', '1', '6',
+  '8', '1', '7',
+  '8', '1', '8',
+  '8', '1', '9',
+  '8', '2', '0',
+  '8', '2', '1',
+  '8', '2', '2',
+  '8', '2', '3',
+  '8', '2', '4',
+  '8', '2', '5',
+  '8', '2', '6',
+  '8', '2', '7',
+  '8', '2', '8',
+  '8', '2', '9',
+  '8', '3', '0',
+  '8', '3', '1',
+  '8', '3', '2',
+  '8', '3', '3',
+  '8', '3', '4',
+  '8', '3', '5',
+  '8', '3', '6',
+  '8', '3', '7',
+  '8', '3', '8',
+  '8', '3', '9',
+  '8', '4', '0',
+  '8', '4', '1',
+  '8', '4', '2',
+  '8', '4', '3',
+  '8', '4', '4',
+  '8', '4', '5',
+  '8', '4', '6',
+  '8', '4', '7',
+  '8', '4', '8',
+  '8', '4', '9',
+  '8', '5', '0',
+  '8', '5', '1',
+  '8', '5', '2',
+  '8', '5', '3',
+  '8', '5', '4',
+  '8', '5', '5',
+  '8', '5', '6',
+  '8', '5', '7',
+  '8', '5', '8',
+  '8', '5', '9',
+  '8', '6', '0',
+  '8', '6', '1',
+  '8', '6', '2',
+  '8', '6', '3',
+  '8', '6', '4',
+  '8', '6', '5',
+  '8', '6', '6',
+  '8', '6', '7',
+  '8', '6', '8',
+  '8', '6', '9',
+  '8', '7', '0',
+  '8', '7', '1',
+  '8', '7', '2',
+  '8', '7', '3',
+  '8', '7', '4',
+  '8', '7', '5',
+  '8', '7', '6',
+  '8', '7', '7',
+  '8', '7', '8',
+  '8', '7', '9',
+  '8', '8', '0',
+  '8', '8', '1',
+  '8', '8', '2',
+  '8', '8', '3',
+  '8', '8', '4',
+  '8', '8', '5',
+  '8', '8', '6',
+  '8', '8', '7',
+  '8', '8', '8',
+  '8', '8', '9',
+  '8', '9', '0',
+  '8', '9', '1',
+  '8', '9', '2',
+  '8', '9', '3',
+  '8', '9', '4',
+  '8', '9', '5',
+  '8', '9', '6',
+  '8', '9', '7',
+  '8', '9', '8',
+  '8', '9', '9',
+  '9', '0', '0',
+  '9', '0', '1',
+  '9', '0', '2',
+  '9', '0', '3',
+  '9', '0', '4',
+  '9', '0', '5',
+  '9', '0', '6',
+  '9', '0', '7',
+  '9', '0', '8',
+  '9', '0', '9',
+  '9', '1', '0',
+  '9', '1', '1',
+  '9', '1', '2',
+  '9', '1', '3',
+  '9', '1', '4',
+  '9', '1', '5',
+  '9', '1', '6',
+  '9', '1', '7',
+  '9', '1', '8',
+  '9', '1', '9',
+  '9', '2', '0',
+  '9', '2', '1',
+  '9', '2', '2',
+  '9', '2', '3',
+  '9', '2', '4',
+  '9', '2', '5',
+  '9', '2', '6',
+  '9', '2', '7',
+  '9', '2', '8',
+  '9', '2', '9',
+  '9', '3', '0',
+  '9', '3', '1',
+  '9', '3', '2',
+  '9', '3', '3',
+  '9', '3', '4',
+  '9', '3', '5',
+  '9', '3', '6',
+  '9', '3', '7',
+  '9', '3', '8',
+  '9', '3', '9',
+  '9', '4', '0',
+  '9', '4', '1',
+  '9', '4', '2',
+  '9', '4', '3',
+  '9', '4', '4',
+  '9', '4', '5',
+  '9', '4', '6',
+  '9', '4', '7',
+  '9', '4', '8',
+  '9', '4', '9',
+  '9', '5', '0',
+  '9', '5', '1',
+  '9', '5', '2',
+  '9', '5', '3',
+  '9', '5', '4',
+  '9', '5', '5',
+  '9', '5', '6',
+  '9', '5', '7',
+  '9', '5', '8',
+  '9', '5', '9',
+  '9', '6', '0',
+  '9', '6', '1',
+  '9', '6', '2',
+  '9', '6', '3',
+  '9', '6', '4',
+  '9', '6', '5',
+  '9', '6', '6',
+  '9', '6', '7',
+  '9', '6', '8',
+  '9', '6', '9',
+  '9', '7', '0',
+  '9', '7', '1',
+  '9', '7', '2',
+  '9', '7', '3',
+  '9', '7', '4',
+  '9', '7', '5',
+  '9', '7', '6',
+  '9', '7', '7',
+  '9', '7', '8',
+  '9', '7', '9',
+  '9', '8', '0',
+  '9', '8', '1',
+  '9', '8', '2',
+  '9', '8', '3',
+  '9', '8', '4',
+  '9', '8', '5',
+  '9', '8', '6',
+  '9', '8', '7',
+  '9', '8', '8',
+  '9', '8', '9',
+  '9', '9', '0',
+  '9', '9', '1',
+  '9', '9', '2',
+  '9', '9', '3',
+  '9', '9', '4',
+  '9', '9', '5',
+  '9', '9', '6',
+  '9', '9', '7',
+  '9', '9', '8',
+  '9', '9', '9'
+};
+
+// ten2m3k64[], shift_ten2m3k64[] used for conversion from BID128 to string
+UINT64 ten2m3k64[] = {
+  0x4189374bc6a7ef9eull,	// 4189374bc6a7ef9e * 2^-72 = (10^-3)RP,63
+  0x10c6f7a0b5ed8d37ull,	// 10c6f7a0b5ed8d37 * 2^-80 = (10^-6)RP,61
+  0x44b82fa09b5a52ccull,	// 44b82fa09b5a52cc * 2^-92 = (10^-9)RP,63
+  0x119799812dea111aull,	// 119799812dea111a * 2^-100 = (10^-12)RP,61
+  0x480ebe7b9d58566dull	// 480ebe7b9d58566d * 2^-112 = (10^-15)RP,63
+};
+
+unsigned int shift_ten2m3k64[] = {
+  8,	// 72 - 64
+  16,	// 80 - 64
+  28,	// 92 - 64
+  36,	// 100 - 64
+  48	// 112 - 64
+};
+
+UINT128 ten2m3k128[] = {
+  {{0xb22d0e5604189375ull, 0x4189374bc6a7ef9dull}},
+  // 4189374bc6a7ef9d  b22d0e5604189375  * 2^-136 = (10^-3)RP,127
+  {{0xb4c7f34938583622ull, 0x10c6f7a0b5ed8d36ull}},
+  // 10c6f7a0b5ed8d36  b4c7f34938583622  * 2^-144 = (10^-6)RP,125
+  {{0x98b405447c4a9819ull, 0x44b82fa09b5a52cbull}},
+  // 44b82fa09b5a52cb  98b405447c4a9819  * 2^-156 = (10^-9)RP,127
+  {{0x7f27f0f6e885c8bbull, 0x119799812dea1119ull}},
+  // 119799812dea1119  7f27f0f6e885c8bb  * 2^-164 = (10^-12)RP,125
+  {{0x87ce9b80a5fb0509ull, 0x480ebe7b9d58566cull}},
+  // 480ebe7b9d58566c  87ce9b80a5fb0509  * 2^-176 = (10^-15)RP,127
+  {{0xe75fe645cc4873faull, 0x12725dd1d243aba0ull}},
+  // 12725dd1d243aba0  e75fe645cc4873fa  * 2^-184 = (10^-18)RP,125
+  {{0x69fb7e0b75e52f02ull, 0x4b8ed0283a6d3df7ull}},
+  // 4b8ed0283a6d3df7  69fb7e0b75e52f02  * 2^-196 = (10^-21)RP,127
+  {{0x58924d52ce4f26a9ull, 0x1357c299a88ea76aull}},
+  // 1357c299a88ea76a  58924d52ce4f26a9  * 2^-204 = (10^-24)RP,125
+  {{0x3baf513267aa9a3full, 0x4f3a68dbc8f03f24ull}},
+  // 4f3a68dbc8f03f24  3baf513267aa9a3f  * 2^-216 = (10^-27)RP,127
+  {{0x3424b06f3529a052ull, 0x14484bfeebc29f86ull}},
+  // 14484bfeebc29f86  3424b06f3529a052  * 2^-224 = (10^-30)RP,125
+  {{0xf658d6c57566eac8ull, 0x5313a5dee87d6eb0ull}}
+  // 5313a5dee87d6eb0  f658d6c57566eac8  * 2^-236 = (10^-33)RP,127
+};
+
+unsigned int shift_ten2m3k128[] = {
+  8,	// 136 - 128
+  16,	// 144 - 128
+  28,	// 156 - 128
+  36,	// 164 - 128
+  48,	// 176 - 128
+  56,	// 184 - 128
+  4,	// 196 - 192
+  12,	// 204 - 192
+  24,	// 216 - 192
+  32,	// 224 - 192
+  44	// 236 - 192
+};
+
+
+/***************************************************************************
+ *************** TABLES FOR GENERAL ROUNDING FUNCTIONS *********************
+ ***************************************************************************/
+// Note: not all entries in these tables will be used with IEEE 754R decimal
+// floating-point arithmetic
+// a) In round128_2_18() numbers with 2 <= q <= 18 will be rounded only
+//    for 1 <= x <= 3:
+//     x = 1 or x = 2 when q = 17
+//     x = 2 or x = 3 when q = 18
+// b) In round128_19_38() numbers with 19 <= q <= 38 will be rounded only
+//    for 1 <= x <= 23:
+//     x = 3 or x = 4 when q = 19
+//     x = 4 or x = 5 when q = 20
+//     ...
+//     x = 18 or x = 19 when q = 34
+//     x = 1 or x = 2 or x = 19 or x = 20 when q = 35
+//     x = 2 or x = 3 or x = 20 or x = 21 when q = 36
+//     x = 3 or x = 4 or x = 21 or x = 22 when q = 37
+//     x = 4 or x = 5 or x = 22 or x = 23 when q = 38
+// c) ...
+// However, for generality and possible uses outside the frame of IEEE 754R
+// this implementation includes table values for all x in [1, q - 1]
+
+// Note: 64-bit tables generated with ten2mx64.ma; output in ten2mx64.out
+
+// Kx from 10^(-x) ~= Kx * 2^(-Ex); Kx rounded up to 64 bits, 1 <= x <= 17
+UINT64 Kx64[] = {
+  0xcccccccccccccccdULL,	// 10^-1 ~= cccccccccccccccd * 2^-67
+  0xa3d70a3d70a3d70bULL,	// 10^-2 ~= a3d70a3d70a3d70b * 2^-70
+  0x83126e978d4fdf3cULL,	// 10^-3 ~= 83126e978d4fdf3c * 2^-73
+  0xd1b71758e219652cULL,	// 10^-4 ~= d1b71758e219652c * 2^-77
+  0xa7c5ac471b478424ULL,	// 10^-5 ~= a7c5ac471b478424 * 2^-80
+  0x8637bd05af6c69b6ULL,	// 10^-6 ~= 8637bd05af6c69b6 * 2^-83
+  0xd6bf94d5e57a42bdULL,	// 10^-7 ~= d6bf94d5e57a42bd * 2^-87
+  0xabcc77118461cefdULL,	// 10^-8 ~= abcc77118461cefd * 2^-90
+  0x89705f4136b4a598ULL,	// 10^-9 ~= 89705f4136b4a598 * 2^-93
+  0xdbe6fecebdedd5bfULL,	// 10^-10 ~= dbe6fecebdedd5bf * 2^-97
+  0xafebff0bcb24aaffULL,	// 10^-11 ~= afebff0bcb24aaff * 2^-100
+  0x8cbccc096f5088ccULL,	// 10^-12 ~= 8cbccc096f5088cc * 2^-103
+  0xe12e13424bb40e14ULL,	// 10^-13 ~= e12e13424bb40e14 * 2^-107
+  0xb424dc35095cd810ULL,	// 10^-14 ~= b424dc35095cd810 * 2^-110
+  0x901d7cf73ab0acdaULL,	// 10^-15 ~= 901d7cf73ab0acda * 2^-113
+  0xe69594bec44de15cULL,	// 10^-16 ~= e69594bec44de15c * 2^-117
+  0xb877aa3236a4b44aULL	// 10^-17 ~= b877aa3236a4b44a * 2^-120
+};
+
+// Ex-64 from 10^(-x) ~= Kx * 2^(-Ex); Kx rounded up to 64 bits, 1 <= x <= 17
+unsigned int Ex64m64[] = {
+  3,	// 67 - 64, Ex = 67
+  6,	// 70 - 64, Ex = 70
+  9,	// 73 - 64, Ex = 73
+  13,	// 77 - 64, Ex = 77
+  16,	// 80 - 64, Ex = 80
+  19,	// 83 - 64, Ex = 83
+  23,	// 87 - 64, Ex = 87
+  26,	// 90 - 64, Ex = 90
+  29,	// 93 - 64, Ex = 93
+  33,	// 97 - 64, Ex = 97
+  36,	// 100 - 64, Ex = 100
+  39,	// 103 - 64, Ex = 103
+  43,	// 107 - 64, Ex = 107
+  46,	// 110 - 64, Ex = 110
+  49,	// 113 - 64, Ex = 113
+  53,	// 117 - 64, Ex = 117
+  56	// 120 - 64, Ex = 120
+};
+
+// Values of 1/2 in the right position to be compared with the fraction from
+// C * kx, 1 <= x <= 17; the fraction consists of the low Ex bits in C * kx
+// (these values are aligned with the high 64 bits of the fraction)
+UINT64 half64[] = {
+  0x0000000000000004ULL,	// half / 2^64 = 4
+  0x0000000000000020ULL,	// half / 2^64 = 20
+  0x0000000000000100ULL,	// half / 2^64 = 100
+  0x0000000000001000ULL,	// half / 2^64 = 1000
+  0x0000000000008000ULL,	// half / 2^64 = 8000
+  0x0000000000040000ULL,	// half / 2^64 = 40000
+  0x0000000000400000ULL,	// half / 2^64 = 400000
+  0x0000000002000000ULL,	// half / 2^64 = 2000000
+  0x0000000010000000ULL,	// half / 2^64 = 10000000
+  0x0000000100000000ULL,	// half / 2^64 = 100000000
+  0x0000000800000000ULL,	// half / 2^64 = 800000000
+  0x0000004000000000ULL,	// half / 2^64 = 4000000000
+  0x0000040000000000ULL,	// half / 2^64 = 40000000000
+  0x0000200000000000ULL,	// half / 2^64 = 200000000000
+  0x0001000000000000ULL,	// half / 2^64 = 1000000000000
+  0x0010000000000000ULL,	// half / 2^64 = 10000000000000
+  0x0080000000000000ULL	// half / 2^64 = 80000000000000
+};
+
+// Values of mask in the right position to obtain the high Ex - 64 bits
+// of the fraction from C * kx, 1 <= x <= 17; the fraction consists of
+// the low Ex bits in C * kx
+UINT64 mask64[] = {
+  0x0000000000000007ULL,	// mask / 2^64
+  0x000000000000003fULL,	// mask / 2^64
+  0x00000000000001ffULL,	// mask / 2^64
+  0x0000000000001fffULL,	// mask / 2^64
+  0x000000000000ffffULL,	// mask / 2^64
+  0x000000000007ffffULL,	// mask / 2^64
+  0x00000000007fffffULL,	// mask / 2^64
+  0x0000000003ffffffULL,	// mask / 2^64
+  0x000000001fffffffULL,	// mask / 2^64
+  0x00000001ffffffffULL,	// mask / 2^64
+  0x0000000fffffffffULL,	// mask / 2^64
+  0x0000007fffffffffULL,	// mask / 2^64
+  0x000007ffffffffffULL,	// mask / 2^64
+  0x00003fffffffffffULL,	// mask / 2^64
+  0x0001ffffffffffffULL,	// mask / 2^64
+  0x001fffffffffffffULL,	// mask / 2^64
+  0x00ffffffffffffffULL	// mask / 2^64
+};
+
+// Values of 10^(-x) trancated to Ex bits beyond the binary point, and
+// in the right position to be compared with the fraction from C * kx,
+// 1 <= x <= 17; the fraction consists of the low Ex bits in C * kx
+// (these values are aligned with the low 64 bits of the fraction)
+UINT64 ten2mxtrunc64[] = {
+  0xccccccccccccccccULL,	// (ten2mx >> 64) = cccccccccccccccc
+  0xa3d70a3d70a3d70aULL,	// (ten2mx >> 64) = a3d70a3d70a3d70a
+  0x83126e978d4fdf3bULL,	// (ten2mx >> 64) = 83126e978d4fdf3b
+  0xd1b71758e219652bULL,	// (ten2mx >> 64) = d1b71758e219652b
+  0xa7c5ac471b478423ULL,	// (ten2mx >> 64) = a7c5ac471b478423
+  0x8637bd05af6c69b5ULL,	// (ten2mx >> 64) = 8637bd05af6c69b5
+  0xd6bf94d5e57a42bcULL,	// (ten2mx >> 64) = d6bf94d5e57a42bc
+  0xabcc77118461cefcULL,	// (ten2mx >> 64) = abcc77118461cefc
+  0x89705f4136b4a597ULL,	// (ten2mx >> 64) = 89705f4136b4a597
+  0xdbe6fecebdedd5beULL,	// (ten2mx >> 64) = dbe6fecebdedd5be
+  0xafebff0bcb24aafeULL,	// (ten2mx >> 64) = afebff0bcb24aafe
+  0x8cbccc096f5088cbULL,	// (ten2mx >> 64) = 8cbccc096f5088cb
+  0xe12e13424bb40e13ULL,	// (ten2mx >> 64) = e12e13424bb40e13
+  0xb424dc35095cd80fULL,	// (ten2mx >> 64) = b424dc35095cd80f
+  0x901d7cf73ab0acd9ULL,	// (ten2mx >> 64) = 901d7cf73ab0acd9
+  0xe69594bec44de15bULL,	// (ten2mx >> 64) = e69594bec44de15b
+  0xb877aa3236a4b449ULL	// (ten2mx >> 64) = b877aa3236a4b449
+};
+
+// Note: 128-bit tables generated with ten2mx128.ma; output in ten2mx128.out
+// The order of the 64-bit components is L, H
+
+// Kx from 10^(-x) ~= Kx * 2^(-Ex); Kx rounded up to 128 bits, 1 <= x <= 37
+UINT128 Kx128[] = {
+  {{0xcccccccccccccccdULL, 0xccccccccccccccccULL}},
+  // 10^-1 ~= cccccccccccccccccccccccccccccccd * 2^-131
+  {{0x3d70a3d70a3d70a4ULL, 0xa3d70a3d70a3d70aULL}},
+  // 10^-2 ~= a3d70a3d70a3d70a3d70a3d70a3d70a4 * 2^-134
+  {{0x645a1cac083126eaULL, 0x83126e978d4fdf3bULL}},
+  // 10^-3 ~= 83126e978d4fdf3b645a1cac083126ea * 2^-137
+  {{0xd3c36113404ea4a9ULL, 0xd1b71758e219652bULL}},
+  // 10^-4 ~= d1b71758e219652bd3c36113404ea4a9 * 2^-141
+  {{0x0fcf80dc33721d54ULL, 0xa7c5ac471b478423ULL}},
+  // 10^-5 ~= a7c5ac471b4784230fcf80dc33721d54 * 2^-144
+  {{0xa63f9a49c2c1b110ULL, 0x8637bd05af6c69b5ULL}},
+  // 10^-6 ~= 8637bd05af6c69b5a63f9a49c2c1b110 * 2^-147
+  {{0x3d32907604691b4dULL, 0xd6bf94d5e57a42bcULL}},
+  // 10^-7 ~= d6bf94d5e57a42bc3d32907604691b4d * 2^-151
+  {{0xfdc20d2b36ba7c3eULL, 0xabcc77118461cefcULL}},
+  // 10^-8 ~= abcc77118461cefcfdc20d2b36ba7c3e * 2^-154
+  {{0x31680a88f8953031ULL, 0x89705f4136b4a597ULL}},
+  // 10^-9 ~= 89705f4136b4a59731680a88f8953031 * 2^-157
+  {{0xb573440e5a884d1cULL, 0xdbe6fecebdedd5beULL}},
+  // 10^-10 ~= dbe6fecebdedd5beb573440e5a884d1c * 2^-161
+  {{0xf78f69a51539d749ULL, 0xafebff0bcb24aafeULL}},
+  // 10^-11 ~= afebff0bcb24aafef78f69a51539d749 * 2^-164
+  {{0xf93f87b7442e45d4ULL, 0x8cbccc096f5088cbULL}},
+  // 10^-12 ~= 8cbccc096f5088cbf93f87b7442e45d4 * 2^-167
+  {{0x2865a5f206b06fbaULL, 0xe12e13424bb40e13ULL}},
+  // 10^-13 ~= e12e13424bb40e132865a5f206b06fba * 2^-171
+  {{0x538484c19ef38c95ULL, 0xb424dc35095cd80fULL}},
+  // 10^-14 ~= b424dc35095cd80f538484c19ef38c95 * 2^-174
+  {{0x0f9d37014bf60a11ULL, 0x901d7cf73ab0acd9ULL}},
+  // 10^-15 ~= 901d7cf73ab0acd90f9d37014bf60a11 * 2^-177
+  {{0x4c2ebe687989a9b4ULL, 0xe69594bec44de15bULL}},
+  // 10^-16 ~= e69594bec44de15b4c2ebe687989a9b4 * 2^-181
+  {{0x09befeb9fad487c3ULL, 0xb877aa3236a4b449ULL}},
+  // 10^-17 ~= b877aa3236a4b44909befeb9fad487c3 * 2^-184
+  {{0x3aff322e62439fd0ULL, 0x9392ee8e921d5d07ULL}},
+  // 10^-18 ~= 9392ee8e921d5d073aff322e62439fd0 * 2^-187
+  {{0x2b31e9e3d06c32e6ULL, 0xec1e4a7db69561a5ULL}},
+  // 10^-19 ~= ec1e4a7db69561a52b31e9e3d06c32e6 * 2^-191
+  {{0x88f4bb1ca6bcf585ULL, 0xbce5086492111aeaULL}},
+  // 10^-20 ~= bce5086492111aea88f4bb1ca6bcf585 * 2^-194
+  {{0xd3f6fc16ebca5e04ULL, 0x971da05074da7beeULL}},
+  // 10^-21 ~= 971da05074da7beed3f6fc16ebca5e04 * 2^-197
+  {{0x5324c68b12dd6339ULL, 0xf1c90080baf72cb1ULL}},
+  // 10^-22 ~= f1c90080baf72cb15324c68b12dd6339 * 2^-201
+  {{0x75b7053c0f178294ULL, 0xc16d9a0095928a27ULL}},
+  // 10^-23 ~= c16d9a0095928a2775b7053c0f178294 * 2^-204
+  {{0xc4926a9672793543ULL, 0x9abe14cd44753b52ULL}},
+  // 10^-24 ~= 9abe14cd44753b52c4926a9672793543 * 2^-207
+  {{0x3a83ddbd83f52205ULL, 0xf79687aed3eec551ULL}},
+  // 10^-25 ~= f79687aed3eec5513a83ddbd83f52205 * 2^-211
+  {{0x95364afe032a819eULL, 0xc612062576589ddaULL}},
+  // 10^-26 ~= c612062576589dda95364afe032a819e * 2^-214
+  {{0x775ea264cf55347eULL, 0x9e74d1b791e07e48ULL}},
+  // 10^-27 ~= 9e74d1b791e07e48775ea264cf55347e * 2^-217
+  {{0x8bca9d6e188853fdULL, 0xfd87b5f28300ca0dULL}},
+  // 10^-28 ~= fd87b5f28300ca0d8bca9d6e188853fd * 2^-221
+  {{0x096ee45813a04331ULL, 0xcad2f7f5359a3b3eULL}},
+  // 10^-29 ~= cad2f7f5359a3b3e096ee45813a04331 * 2^-224
+  {{0xa1258379a94d028eULL, 0xa2425ff75e14fc31ULL}},
+  // 10^-30 ~= a2425ff75e14fc31a1258379a94d028e * 2^-227
+  {{0x80eacf948770ced8ULL, 0x81ceb32c4b43fcf4ULL}},
+  // 10^-31 ~= 81ceb32c4b43fcf480eacf948770ced8 * 2^-230
+  {{0x67de18eda5814af3ULL, 0xcfb11ead453994baULL}},
+  // 10^-32 ~= cfb11ead453994ba67de18eda5814af3 * 2^-234
+  {{0xecb1ad8aeacdd58fULL, 0xa6274bbdd0fadd61ULL}},
+  // 10^-33 ~= a6274bbdd0fadd61ecb1ad8aeacdd58f * 2^-237
+  {{0xbd5af13bef0b113fULL, 0x84ec3c97da624ab4ULL}},
+  // 10^-34 ~= 84ec3c97da624ab4bd5af13bef0b113f * 2^-240
+  {{0x955e4ec64b44e865ULL, 0xd4ad2dbfc3d07787ULL}},
+  // 10^-35 ~= d4ad2dbfc3d07787955e4ec64b44e865 * 2^-244
+  {{0xdde50bd1d5d0b9eaULL, 0xaa242499697392d2ULL}},
+  // 10^-36 ~= aa242499697392d2dde50bd1d5d0b9ea * 2^-247
+  {{0x7e50d64177da2e55ULL, 0x881cea14545c7575ULL}}
+  // 10^-37 ~= 881cea14545c75757e50d64177da2e55 * 2^-250
+};
+
+// Ex-128 from 10^(-x) ~= Kx*2^(-Ex); Kx rounded up to 128 bits, 1 <= x <= 37
+unsigned int Ex128m128[] = {
+  3,	// 131 - 128, Ex = 131
+  6,	// 134 - 128, Ex = 134
+  9,	// 137 - 128, Ex = 137
+  13,	// 141 - 128, Ex = 141
+  16,	// 144 - 128, Ex = 144
+  19,	// 147 - 128, Ex = 147
+  23,	// 151 - 128, Ex = 151
+  26,	// 154 - 128, Ex = 154
+  29,	// 157 - 128, Ex = 157
+  33,	// 161 - 128, Ex = 161
+  36,	// 164 - 128, Ex = 164
+  39,	// 167 - 128, Ex = 167
+  43,	// 171 - 128, Ex = 171
+  46,	// 174 - 128, Ex = 174
+  49,	// 177 - 128, Ex = 177
+  53,	// 181 - 128, Ex = 181
+  56,	// 184 - 128, Ex = 184
+  59,	// 187 - 128, Ex = 187
+  63,	// 191 - 128, Ex = 191
+  2,	// 194 - 192, Ex = 194
+  5,	// 197 - 192, Ex = 197
+  9,	// 201 - 192, Ex = 201
+  12,	// 204 - 192, Ex = 204
+  15,	// 207 - 192, Ex = 207
+  19,	// 211 - 192, Ex = 211
+  22,	// 214 - 192, Ex = 214
+  25,	// 217 - 192, Ex = 217
+  29,	// 221 - 192, Ex = 221
+  32,	// 224 - 192, Ex = 224
+  35,	// 227 - 192, Ex = 227
+  38,	// 230 - 192, Ex = 230
+  42,	// 234 - 192, Ex = 234
+  45,	// 237 - 192, Ex = 237
+  48,	// 240 - 192, Ex = 240
+  52,	// 244 - 192, Ex = 244
+  55,	// 247 - 192, Ex = 247
+  58	// 250 - 192, Ex = 250
+};
+
+// Values of 1/2 in the right position to be compared with the fraction from
+// C * kx, 1 <= x <= 37; the fraction consists of the low Ex bits in C * kx
+// (these values are aligned with the high 128 bits of the fraction)
+UINT64 half128[] = {
+  0x0000000000000004ULL,	// half / 2^128 = 4
+  0x0000000000000020ULL,	// half / 2^128 = 20
+  0x0000000000000100ULL,	// half / 2^128 = 100
+  0x0000000000001000ULL,	// half / 2^128 = 1000
+  0x0000000000008000ULL,	// half / 2^128 = 8000
+  0x0000000000040000ULL,	// half / 2^128 = 40000
+  0x0000000000400000ULL,	// half / 2^128 = 400000
+  0x0000000002000000ULL,	// half / 2^128 = 2000000
+  0x0000000010000000ULL,	// half / 2^128 = 10000000
+  0x0000000100000000ULL,	// half / 2^128 = 100000000
+  0x0000000800000000ULL,	// half / 2^128 = 800000000
+  0x0000004000000000ULL,	// half / 2^128 = 4000000000
+  0x0000040000000000ULL,	// half / 2^128 = 40000000000
+  0x0000200000000000ULL,	// half / 2^128 = 200000000000
+  0x0001000000000000ULL,	// half / 2^128 = 1000000000000
+  0x0010000000000000ULL,	// half / 2^128 = 10000000000000
+  0x0080000000000000ULL,	// half / 2^128 = 80000000000000
+  0x0400000000000000ULL,	// half / 2^128 = 400000000000000
+  0x4000000000000000ULL,	// half / 2^128 = 4000000000000000
+  0x0000000000000002ULL,	// half / 2^192 = 2
+  0x0000000000000010ULL,	// half / 2^192 = 10
+  0x0000000000000100ULL,	// half / 2^192 = 100
+  0x0000000000000800ULL,	// half / 2^192 = 800
+  0x0000000000004000ULL,	// half / 2^192 = 4000
+  0x0000000000040000ULL,	// half / 2^192 = 40000
+  0x0000000000200000ULL,	// half / 2^192 = 200000
+  0x0000000001000000ULL,	// half / 2^192 = 1000000
+  0x0000000010000000ULL,	// half / 2^192 = 10000000
+  0x0000000080000000ULL,	// half / 2^192 = 80000000
+  0x0000000400000000ULL,	// half / 2^192 = 400000000
+  0x0000002000000000ULL,	// half / 2^192 = 2000000000
+  0x0000020000000000ULL,	// half / 2^192 = 20000000000
+  0x0000100000000000ULL,	// half / 2^192 = 100000000000
+  0x0000800000000000ULL,	// half / 2^192 = 800000000000
+  0x0008000000000000ULL,	// half / 2^192 = 8000000000000
+  0x0040000000000000ULL,	// half / 2^192 = 40000000000000
+  0x0200000000000000ULL	// half / 2^192 = 200000000000000
+};
+
+// Values of mask in the right position to obtain the high Ex - 128 or Ex - 192
+// bits of the fraction from C * kx, 1 <= x <= 37; the fraction consists of
+// the low Ex bits in C * kx
+UINT64 mask128[] = {
+  0x0000000000000007ULL,	// mask / 2^128
+  0x000000000000003fULL,	// mask / 2^128
+  0x00000000000001ffULL,	// mask / 2^128
+  0x0000000000001fffULL,	// mask / 2^128
+  0x000000000000ffffULL,	// mask / 2^128
+  0x000000000007ffffULL,	// mask / 2^128
+  0x00000000007fffffULL,	// mask / 2^128
+  0x0000000003ffffffULL,	// mask / 2^128
+  0x000000001fffffffULL,	// mask / 2^128
+  0x00000001ffffffffULL,	// mask / 2^128
+  0x0000000fffffffffULL,	// mask / 2^128
+  0x0000007fffffffffULL,	// mask / 2^128
+  0x000007ffffffffffULL,	// mask / 2^128
+  0x00003fffffffffffULL,	// mask / 2^128
+  0x0001ffffffffffffULL,	// mask / 2^128
+  0x001fffffffffffffULL,	// mask / 2^128
+  0x00ffffffffffffffULL,	// mask / 2^128
+  0x07ffffffffffffffULL,	// mask / 2^128
+  0x7fffffffffffffffULL,	// mask / 2^128
+  0x0000000000000003ULL,	// mask / 2^192
+  0x000000000000001fULL,	// mask / 2^192
+  0x00000000000001ffULL,	// mask / 2^192
+  0x0000000000000fffULL,	// mask / 2^192
+  0x0000000000007fffULL,	// mask / 2^192
+  0x000000000007ffffULL,	// mask / 2^192
+  0x00000000003fffffULL,	// mask / 2^192
+  0x0000000001ffffffULL,	// mask / 2^192
+  0x000000001fffffffULL,	// mask / 2^192
+  0x00000000ffffffffULL,	// mask / 2^192
+  0x00000007ffffffffULL,	// mask / 2^192
+  0x0000003fffffffffULL,	// mask / 2^192
+  0x000003ffffffffffULL,	// mask / 2^192
+  0x00001fffffffffffULL,	// mask / 2^192
+  0x0000ffffffffffffULL,	// mask / 2^192
+  0x000fffffffffffffULL,	// mask / 2^192
+  0x007fffffffffffffULL,	// mask / 2^192
+  0x03ffffffffffffffULL	// mask / 2^192
+};
+
+// Values of 10^(-x) trancated to Ex bits beyond the binary point, and
+// in the right position to be compared with the fraction from C * kx,
+// 1 <= x <= 37; the fraction consists of the low Ex bits in C * kx
+// (these values are aligned with the low 128 bits of the fraction)
+UINT128 ten2mxtrunc128[] = {
+  {{0xccccccccccccccccULL, 0xccccccccccccccccULL}},
+  // (ten2mx >> 128) = cccccccccccccccccccccccccccccccc
+  {{0x3d70a3d70a3d70a3ULL, 0xa3d70a3d70a3d70aULL}},
+  // (ten2mx >> 128) = a3d70a3d70a3d70a3d70a3d70a3d70a3
+  {{0x645a1cac083126e9ULL, 0x83126e978d4fdf3bULL}},
+  // (ten2mx >> 128) = 83126e978d4fdf3b645a1cac083126e9
+  {{0xd3c36113404ea4a8ULL, 0xd1b71758e219652bULL}},
+  // (ten2mx >> 128) = d1b71758e219652bd3c36113404ea4a8
+  {{0x0fcf80dc33721d53ULL, 0xa7c5ac471b478423ULL}},
+  // (ten2mx >> 128) = a7c5ac471b4784230fcf80dc33721d53
+  {{0xa63f9a49c2c1b10fULL, 0x8637bd05af6c69b5ULL}},
+  // (ten2mx >> 128) = 8637bd05af6c69b5a63f9a49c2c1b10f
+  {{0x3d32907604691b4cULL, 0xd6bf94d5e57a42bcULL}},
+  // (ten2mx >> 128) = d6bf94d5e57a42bc3d32907604691b4c
+  {{0xfdc20d2b36ba7c3dULL, 0xabcc77118461cefcULL}},
+  // (ten2mx >> 128) = abcc77118461cefcfdc20d2b36ba7c3d
+  {{0x31680a88f8953030ULL, 0x89705f4136b4a597ULL}},
+  // (ten2mx >> 128) = 89705f4136b4a59731680a88f8953030
+  {{0xb573440e5a884d1bULL, 0xdbe6fecebdedd5beULL}},
+  // (ten2mx >> 128) = dbe6fecebdedd5beb573440e5a884d1b
+  {{0xf78f69a51539d748ULL, 0xafebff0bcb24aafeULL}},
+  // (ten2mx >> 128) = afebff0bcb24aafef78f69a51539d748
+  {{0xf93f87b7442e45d3ULL, 0x8cbccc096f5088cbULL}},
+  // (ten2mx >> 128) = 8cbccc096f5088cbf93f87b7442e45d3
+  {{0x2865a5f206b06fb9ULL, 0xe12e13424bb40e13ULL}},
+  // (ten2mx >> 128) = e12e13424bb40e132865a5f206b06fb9
+  {{0x538484c19ef38c94ULL, 0xb424dc35095cd80fULL}},
+  // (ten2mx >> 128) = b424dc35095cd80f538484c19ef38c94
+  {{0x0f9d37014bf60a10ULL, 0x901d7cf73ab0acd9ULL}},
+  // (ten2mx >> 128) = 901d7cf73ab0acd90f9d37014bf60a10
+  {{0x4c2ebe687989a9b3ULL, 0xe69594bec44de15bULL}},
+  // (ten2mx >> 128) = e69594bec44de15b4c2ebe687989a9b3
+  {{0x09befeb9fad487c2ULL, 0xb877aa3236a4b449ULL}},
+  // (ten2mx >> 128) = b877aa3236a4b44909befeb9fad487c2
+  {{0x3aff322e62439fcfULL, 0x9392ee8e921d5d07ULL}},
+  // (ten2mx >> 128) = 9392ee8e921d5d073aff322e62439fcf
+  {{0x2b31e9e3d06c32e5ULL, 0xec1e4a7db69561a5ULL}},
+  // (ten2mx >> 128) = ec1e4a7db69561a52b31e9e3d06c32e5
+  {{0x88f4bb1ca6bcf584ULL, 0xbce5086492111aeaULL}},
+  // (ten2mx >> 128) = bce5086492111aea88f4bb1ca6bcf584
+  {{0xd3f6fc16ebca5e03ULL, 0x971da05074da7beeULL}},
+  // (ten2mx >> 128) = 971da05074da7beed3f6fc16ebca5e03
+  {{0x5324c68b12dd6338ULL, 0xf1c90080baf72cb1ULL}},
+  // (ten2mx >> 128) = f1c90080baf72cb15324c68b12dd6338
+  {{0x75b7053c0f178293ULL, 0xc16d9a0095928a27ULL}},
+  // (ten2mx >> 128) = c16d9a0095928a2775b7053c0f178293
+  {{0xc4926a9672793542ULL, 0x9abe14cd44753b52ULL}},
+  // (ten2mx >> 128) = 9abe14cd44753b52c4926a9672793542
+  {{0x3a83ddbd83f52204ULL, 0xf79687aed3eec551ULL}},
+  // (ten2mx >> 128) = f79687aed3eec5513a83ddbd83f52204
+  {{0x95364afe032a819dULL, 0xc612062576589ddaULL}},
+  // (ten2mx >> 128) = c612062576589dda95364afe032a819d
+  {{0x775ea264cf55347dULL, 0x9e74d1b791e07e48ULL}},
+  // (ten2mx >> 128) = 9e74d1b791e07e48775ea264cf55347d
+  {{0x8bca9d6e188853fcULL, 0xfd87b5f28300ca0dULL}},
+  // (ten2mx >> 128) = fd87b5f28300ca0d8bca9d6e188853fc
+  {{0x096ee45813a04330ULL, 0xcad2f7f5359a3b3eULL}},
+  // (ten2mx >> 128) = cad2f7f5359a3b3e096ee45813a04330
+  {{0xa1258379a94d028dULL, 0xa2425ff75e14fc31ULL}},
+  // (ten2mx >> 128) = a2425ff75e14fc31a1258379a94d028d
+  {{0x80eacf948770ced7ULL, 0x81ceb32c4b43fcf4ULL}},
+  // (ten2mx >> 128) = 81ceb32c4b43fcf480eacf948770ced7
+  {{0x67de18eda5814af2ULL, 0xcfb11ead453994baULL}},
+  // (ten2mx >> 128) = cfb11ead453994ba67de18eda5814af2
+  {{0xecb1ad8aeacdd58eULL, 0xa6274bbdd0fadd61ULL}},
+  // (ten2mx >> 128) = a6274bbdd0fadd61ecb1ad8aeacdd58e
+  {{0xbd5af13bef0b113eULL, 0x84ec3c97da624ab4ULL}},
+  // (ten2mx >> 128) = 84ec3c97da624ab4bd5af13bef0b113e
+  {{0x955e4ec64b44e864ULL, 0xd4ad2dbfc3d07787ULL}},
+  // (ten2mx >> 128) = d4ad2dbfc3d07787955e4ec64b44e864
+  {{0xdde50bd1d5d0b9e9ULL, 0xaa242499697392d2ULL}},
+  // (ten2mx >> 128) = aa242499697392d2dde50bd1d5d0b9e9
+  {{0x7e50d64177da2e54ULL, 0x881cea14545c7575ULL}}
+  // (ten2mx >> 128) = 881cea14545c75757e50d64177da2e54
+};
+
+UINT192 Kx192[] = {
+  {{0xcccccccccccccccdULL, 0xccccccccccccccccULL,
+    0xccccccccccccccccULL}},
+  // 10^-1 ~= cccccccccccccccccccccccccccccccccccccccccccccccd * 2^-195
+  {{0xd70a3d70a3d70a3eULL, 0x3d70a3d70a3d70a3ULL,
+    0xa3d70a3d70a3d70aULL}},
+  // 10^-2 ~= a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3e * 2^-198
+  {{0x78d4fdf3b645a1cbULL, 0x645a1cac083126e9ULL,
+    0x83126e978d4fdf3bULL}},
+  // 10^-3 ~= 83126e978d4fdf3b645a1cac083126e978d4fdf3b645a1cb * 2^-201
+  {{0xc154c985f06f6945ULL, 0xd3c36113404ea4a8ULL,
+    0xd1b71758e219652bULL}},
+  // 10^-4 ~= d1b71758e219652bd3c36113404ea4a8c154c985f06f6945 * 2^-205
+  {{0xcddd6e04c0592104ULL, 0x0fcf80dc33721d53ULL,
+    0xa7c5ac471b478423ULL}},
+  // 10^-5 ~= a7c5ac471b4784230fcf80dc33721d53cddd6e04c0592104 * 2^-208
+  {{0xd7e45803cd141a6aULL, 0xa63f9a49c2c1b10fULL,
+    0x8637bd05af6c69b5ULL}},
+  // 10^-6 ~= 8637bd05af6c69b5a63f9a49c2c1b10fd7e45803cd141a6a * 2^-211
+  {{0x8ca08cd2e1b9c3dcULL, 0x3d32907604691b4cULL,
+    0xd6bf94d5e57a42bcULL}},
+  // 10^-7 ~= d6bf94d5e57a42bc3d32907604691b4c8ca08cd2e1b9c3dc * 2^-215
+  {{0x3d4d3d758161697dULL, 0xfdc20d2b36ba7c3dULL,
+    0xabcc77118461cefcULL}},
+  // 10^-8 ~= abcc77118461cefcfdc20d2b36ba7c3d3d4d3d758161697d * 2^-218
+  {{0xfdd7645e011abacaULL, 0x31680a88f8953030ULL,
+    0x89705f4136b4a597ULL}},
+  // 10^-9 ~= 89705f4136b4a59731680a88f8953030fdd7645e011abaca * 2^-221
+  {{0x2fbf06fcce912addULL, 0xb573440e5a884d1bULL,
+    0xdbe6fecebdedd5beULL}},
+  // 10^-10 ~= dbe6fecebdedd5beb573440e5a884d1b2fbf06fcce912add * 2^-225
+  {{0xf2ff38ca3eda88b1ULL, 0xf78f69a51539d748ULL,
+    0xafebff0bcb24aafeULL}},
+  // 10^-11 ~= afebff0bcb24aafef78f69a51539d748f2ff38ca3eda88b1 * 2^-228
+  {{0xf598fa3b657ba08eULL, 0xf93f87b7442e45d3ULL,
+    0x8cbccc096f5088cbULL}},
+  // 10^-12 ~= 8cbccc096f5088cbf93f87b7442e45d3f598fa3b657ba08e * 2^-231
+  {{0x88f4c3923bf900e3ULL, 0x2865a5f206b06fb9ULL,
+    0xe12e13424bb40e13ULL}},
+  // 10^-13 ~= e12e13424bb40e132865a5f206b06fb988f4c3923bf900e3 * 2^-235
+  {{0x6d909c74fcc733e9ULL, 0x538484c19ef38c94ULL,
+    0xb424dc35095cd80fULL}},
+  // 10^-14 ~= b424dc35095cd80f538484c19ef38c946d909c74fcc733e9 * 2^-238
+  {{0x57a6e390ca38f654ULL, 0x0f9d37014bf60a10ULL,
+    0x901d7cf73ab0acd9ULL}},
+  // 10^-15 ~= 901d7cf73ab0acd90f9d37014bf60a1057a6e390ca38f654 * 2^-241
+  {{0xbf716c1add27f086ULL, 0x4c2ebe687989a9b3ULL,
+    0xe69594bec44de15bULL}},
+  // 10^-16 ~= e69594bec44de15b4c2ebe687989a9b3bf716c1add27f086 * 2^-245
+  {{0xff8df0157db98d38ULL, 0x09befeb9fad487c2ULL,
+    0xb877aa3236a4b449ULL}},
+  // 10^-17 ~= b877aa3236a4b44909befeb9fad487c2ff8df0157db98d38 * 2^-248
+  {{0x32d7f344649470faULL, 0x3aff322e62439fcfULL,
+    0x9392ee8e921d5d07ULL}},
+  // 10^-18 ~= 9392ee8e921d5d073aff322e62439fcf32d7f344649470fa * 2^-251
+  {{0x1e2652070753e7f5ULL, 0x2b31e9e3d06c32e5ULL,
+    0xec1e4a7db69561a5ULL}},
+  // 10^-19 ~= ec1e4a7db69561a52b31e9e3d06c32e51e2652070753e7f5 * 2^-255
+  {{0x181ea8059f76532bULL, 0x88f4bb1ca6bcf584ULL,
+    0xbce5086492111aeaULL}},
+  // 10^-20 ~= bce5086492111aea88f4bb1ca6bcf584181ea8059f76532b * 2^-258
+  {{0x467eecd14c5ea8efULL, 0xd3f6fc16ebca5e03ULL,
+    0x971da05074da7beeULL}},
+  // 10^-21 ~= 971da05074da7beed3f6fc16ebca5e03467eecd14c5ea8ef * 2^-261
+  {{0x70cb148213caa7e5ULL, 0x5324c68b12dd6338ULL,
+    0xf1c90080baf72cb1ULL}},
+  // 10^-22 ~= f1c90080baf72cb15324c68b12dd633870cb148213caa7e5 * 2^-265
+  {{0x8d6f439b43088651ULL, 0x75b7053c0f178293ULL,
+    0xc16d9a0095928a27ULL}},
+  // 10^-23 ~= c16d9a0095928a2775b7053c0f1782938d6f439b43088651 * 2^-268
+  {{0xd78c3615cf3a050dULL, 0xc4926a9672793542ULL,
+    0x9abe14cd44753b52ULL}},
+  // 10^-24 ~= 9abe14cd44753b52c4926a9672793542d78c3615cf3a050d * 2^-271
+  {{0x8c1389bc7ec33b48ULL, 0x3a83ddbd83f52204ULL,
+    0xf79687aed3eec551ULL}},
+  // 10^-25 ~= f79687aed3eec5513a83ddbd83f522048c1389bc7ec33b48 * 2^-275
+  {{0x3cdc6e306568fc3aULL, 0x95364afe032a819dULL,
+    0xc612062576589ddaULL}},
+  // 10^-26 ~= c612062576589dda95364afe032a819d3cdc6e306568fc3a * 2^-278
+  {{0xca49f1c05120c9c8ULL, 0x775ea264cf55347dULL,
+    0x9e74d1b791e07e48ULL}},
+  // 10^-27 ~= 9e74d1b791e07e48775ea264cf55347dca49f1c05120c9c8 * 2^-281
+  {{0x76dcb60081ce0fa6ULL, 0x8bca9d6e188853fcULL,
+    0xfd87b5f28300ca0dULL}},
+  // 10^-28 ~= fd87b5f28300ca0d8bca9d6e188853fc76dcb60081ce0fa6 * 2^-285
+  {{0x5f16f80067d80c85ULL, 0x096ee45813a04330ULL,
+    0xcad2f7f5359a3b3eULL}},
+  // 10^-29 ~= cad2f7f5359a3b3e096ee45813a043305f16f80067d80c85 * 2^-288
+  {{0x18df2ccd1fe00a04ULL, 0xa1258379a94d028dULL,
+    0xa2425ff75e14fc31ULL}},
+  // 10^-30 ~= a2425ff75e14fc31a1258379a94d028d18df2ccd1fe00a04 * 2^-291
+  {{0x4718f0a419800803ULL, 0x80eacf948770ced7ULL,
+    0x81ceb32c4b43fcf4ULL}},
+  // 10^-31 ~= 81ceb32c4b43fcf480eacf948770ced74718f0a419800803 * 2^-294
+  {{0x0b5b1aa028ccd99fULL, 0x67de18eda5814af2ULL,
+    0xcfb11ead453994baULL}},
+  // 10^-32 ~= cfb11ead453994ba67de18eda5814af20b5b1aa028ccd99f * 2^-298
+  {{0x6f7c154ced70ae19ULL, 0xecb1ad8aeacdd58eULL,
+    0xa6274bbdd0fadd61ULL}},
+  // 10^-33 ~= a6274bbdd0fadd61ecb1ad8aeacdd58e6f7c154ced70ae19 * 2^-301
+  {{0xbf967770bdf3be7aULL, 0xbd5af13bef0b113eULL,
+    0x84ec3c97da624ab4ULL}},
+  // 10^-34 ~= 84ec3c97da624ab4bd5af13bef0b113ebf967770bdf3be7a * 2^-304
+  {{0x65bd8be79652ca5dULL, 0x955e4ec64b44e864ULL,
+    0xd4ad2dbfc3d07787ULL}},
+  // 10^-35 ~= d4ad2dbfc3d07787955e4ec64b44e86465bd8be79652ca5d * 2^-308
+  {{0xeafe098611dbd517ULL, 0xdde50bd1d5d0b9e9ULL,
+    0xaa242499697392d2ULL}},
+  // 10^-36 ~= aa242499697392d2dde50bd1d5d0b9e9eafe098611dbd517 * 2^-311
+  {{0xbbfe6e04db164413ULL, 0x7e50d64177da2e54ULL,
+    0x881cea14545c7575ULL}},
+  // 10^-37 ~= 881cea14545c75757e50d64177da2e54bbfe6e04db164413 * 2^-314
+  {{0x2cca49a15e8a0684ULL, 0x96e7bd358c904a21ULL,
+    0xd9c7dced53c72255ULL}},
+  // 10^-38 ~= d9c7dced53c7225596e7bd358c904a212cca49a15e8a0684 * 2^-318
+  {{0x8a3b6e1ab2080537ULL, 0xabec975e0a0d081aULL,
+    0xae397d8aa96c1b77ULL}},
+  // 10^-39 ~= ae397d8aa96c1b77abec975e0a0d081a8a3b6e1ab2080537 * 2^-321
+  {{0x3b62be7bc1a0042cULL, 0x2323ac4b3b3da015ULL,
+    0x8b61313bbabce2c6ULL}},
+  // 10^-40 ~= 8b61313bbabce2c62323ac4b3b3da0153b62be7bc1a0042c * 2^-324
+  {{0x5f0463f935ccd379ULL, 0x6b6c46dec52f6688ULL,
+    0xdf01e85f912e37a3ULL}},
+  // 10^-41 ~= df01e85f912e37a36b6c46dec52f66885f0463f935ccd379 * 2^-328
+  {{0x7f36b660f7d70f94ULL, 0x55f038b237591ed3ULL,
+    0xb267ed1940f1c61cULL}},
+  // 10^-42 ~= b267ed1940f1c61c55f038b237591ed37f36b660f7d70f94 * 2^-331
+  {{0xcc2bc51a5fdf3faaULL, 0x77f3608e92adb242ULL,
+    0x8eb98a7a9a5b04e3ULL}},
+  // 10^-43 ~= 8eb98a7a9a5b04e377f3608e92adb242cc2bc51a5fdf3faa * 2^-334
+  {{0xe046082a32fecc42ULL, 0x8cb89a7db77c506aULL,
+    0xe45c10c42a2b3b05ULL}},
+  // 10^-44 ~= e45c10c42a2b3b058cb89a7db77c506ae046082a32fecc42 * 2^-338
+  {{0x4d04d354f598a368ULL, 0x3d607b97c5fd0d22ULL,
+    0xb6b00d69bb55c8d1ULL}},
+  // 10^-45 ~= b6b00d69bb55c8d13d607b97c5fd0d224d04d354f598a368 * 2^-341
+  {{0x3d9d75dd9146e920ULL, 0xcab3961304ca70e8ULL,
+    0x9226712162ab070dULL}},
+  // 10^-46 ~= 9226712162ab070dcab3961304ca70e83d9d75dd9146e920 * 2^-344
+  {{0xc8fbefc8e8717500ULL, 0xaab8f01e6e10b4a6ULL,
+    0xe9d71b689dde71afULL}},
+  // 10^-47 ~= e9d71b689dde71afaab8f01e6e10b4a6c8fbefc8e8717500 * 2^-348
+  {{0x3a63263a538df734ULL, 0x5560c018580d5d52ULL,
+    0xbb127c53b17ec159ULL}},
+  // 10^-48 ~= bb127c53b17ec1595560c018580d5d523a63263a538df734 * 2^-351
+  {{0x2eb5b82ea93e5f5dULL, 0xdde7001379a44aa8ULL,
+    0x95a8637627989aadULL}},
+  // 10^-49 ~= 95a8637627989aaddde7001379a44aa82eb5b82ea93e5f5d * 2^-354
+  {{0x4abc59e441fd6561ULL, 0x963e66858f6d4440ULL,
+    0xef73d256a5c0f77cULL}},
+  // 10^-50 ~= ef73d256a5c0f77c963e66858f6d44404abc59e441fd6561 * 2^-358
+  {{0x6efd14b69b311de7ULL, 0xde98520472bdd033ULL,
+    0xbf8fdb78849a5f96ULL}},
+  // 10^-51 ~= bf8fdb78849a5f96de98520472bdd0336efd14b69b311de7 * 2^-361
+  {{0x259743c548f417ecULL, 0xe546a8038efe4029ULL,
+    0x993fe2c6d07b7fabULL}},
+  // 10^-52 ~= 993fe2c6d07b7fabe546a8038efe4029259743c548f417ec * 2^-364
+  {{0x3c25393ba7ecf313ULL, 0xd53dd99f4b3066a8ULL,
+    0xf53304714d9265dfULL}},
+  // 10^-53 ~= f53304714d9265dfd53dd99f4b3066a83c25393ba7ecf313 * 2^-368
+  {{0x96842dc95323f5a9ULL, 0xaa97e14c3c26b886ULL,
+    0xc428d05aa4751e4cULL}},
+  // 10^-54 ~= c428d05aa4751e4caa97e14c3c26b88696842dc95323f5a9 * 2^-371
+  {{0xab9cf16ddc1cc487ULL, 0x55464dd69685606bULL,
+    0x9ced737bb6c4183dULL}},
+  // 10^-55 ~= 9ced737bb6c4183d55464dd69685606bab9cf16ddc1cc487 * 2^-374
+  {{0xac2e4f162cfad40bULL, 0xeed6e2f0f0d56712ULL, 0xfb158592be068d2eULL}}
+  // 10^-56 ~= fb158592be068d2eeed6e2f0f0d56712ac2e4f162cfad40b * 2^-378
+};
+
+unsigned int Ex192m192[] = {
+  3,	// 195 - 192, Ex = 195
+  6,	// 198 - 192, Ex = 198
+  9,	// 201 - 192, Ex = 201
+  13,	// 205 - 192, Ex = 205
+  16,	// 208 - 192, Ex = 208
+  19,	// 211 - 192, Ex = 211
+  23,	// 215 - 192, Ex = 215
+  26,	// 218 - 192, Ex = 218
+  29,	// 221 - 192, Ex = 221
+  33,	// 225 - 192, Ex = 225
+  36,	// 228 - 192, Ex = 228
+  39,	// 231 - 192, Ex = 231
+  43,	// 235 - 192, Ex = 235
+  46,	// 238 - 192, Ex = 238
+  49,	// 241 - 192, Ex = 241
+  53,	// 245 - 192, Ex = 245
+  56,	// 248 - 192, Ex = 248
+  59,	// 251 - 192, Ex = 251
+  63,	// 255 - 192, Ex = 255
+  2,	// 258 - 256, Ex = 258
+  5,	// 261 - 256, Ex = 261
+  9,	// 265 - 256, Ex = 265
+  12,	// 268 - 256, Ex = 268
+  15,	// 271 - 256, Ex = 271
+  19,	// 275 - 256, Ex = 275
+  22,	// 278 - 256, Ex = 278
+  25,	// 281 - 256, Ex = 281
+  29,	// 285 - 256, Ex = 285
+  32,	// 288 - 256, Ex = 288
+  35,	// 291 - 256, Ex = 291
+  38,	// 294 - 256, Ex = 294
+  42,	// 298 - 256, Ex = 298
+  45,	// 301 - 256, Ex = 301
+  48,	// 304 - 256, Ex = 304
+  52,	// 308 - 256, Ex = 308
+  55,	// 311 - 256, Ex = 311
+  58,	// 314 - 256, Ex = 314
+  62,	// 318 - 256, Ex = 318
+  1,	// 321 - 320, Ex = 321
+  4,	// 324 - 320, Ex = 324
+  8,	// 328 - 320, Ex = 328
+  11,	// 331 - 320, Ex = 331
+  14,	// 334 - 320, Ex = 334
+  18,	// 338 - 320, Ex = 338
+  21,	// 341 - 320, Ex = 341
+  24,	// 344 - 320, Ex = 344
+  28,	// 348 - 320, Ex = 348
+  31,	// 351 - 320, Ex = 351
+  34,	// 354 - 320, Ex = 354
+  38,	// 358 - 320, Ex = 358
+  41,	// 361 - 320, Ex = 361
+  44,	// 364 - 320, Ex = 364
+  48,	// 368 - 320, Ex = 368
+  51,	// 371 - 320, Ex = 371
+  54,	// 374 - 320, Ex = 374
+  58	// 378 - 320, Ex = 378
+};
+
+UINT64 half192[] = {
+  0x0000000000000004ULL,	// half / 2^192 = 4
+  0x0000000000000020ULL,	// half / 2^192 = 20
+  0x0000000000000100ULL,	// half / 2^192 = 100
+  0x0000000000001000ULL,	// half / 2^192 = 1000
+  0x0000000000008000ULL,	// half / 2^192 = 8000
+  0x0000000000040000ULL,	// half / 2^192 = 40000
+  0x0000000000400000ULL,	// half / 2^192 = 400000
+  0x0000000002000000ULL,	// half / 2^192 = 2000000
+  0x0000000010000000ULL,	// half / 2^192 = 10000000
+  0x0000000100000000ULL,	// half / 2^192 = 100000000
+  0x0000000800000000ULL,	// half / 2^192 = 800000000
+  0x0000004000000000ULL,	// half / 2^192 = 4000000000
+  0x0000040000000000ULL,	// half / 2^192 = 40000000000
+  0x0000200000000000ULL,	// half / 2^192 = 200000000000
+  0x0001000000000000ULL,	// half / 2^192 = 1000000000000
+  0x0010000000000000ULL,	// half / 2^192 = 10000000000000
+  0x0080000000000000ULL,	// half / 2^192 = 80000000000000
+  0x0400000000000000ULL,	// half / 2^192 = 400000000000000
+  0x4000000000000000ULL,	// half / 2^192 = 4000000000000000
+  0x0000000000000002ULL,	// half / 2^256 = 2
+  0x0000000000000010ULL,	// half / 2^256 = 10
+  0x0000000000000100ULL,	// half / 2^256 = 100
+  0x0000000000000800ULL,	// half / 2^256 = 800
+  0x0000000000004000ULL,	// half / 2^256 = 4000
+  0x0000000000040000ULL,	// half / 2^256 = 40000
+  0x0000000000200000ULL,	// half / 2^256 = 200000
+  0x0000000001000000ULL,	// half / 2^256 = 1000000
+  0x0000000010000000ULL,	// half / 2^256 = 10000000
+  0x0000000080000000ULL,	// half / 2^256 = 80000000
+  0x0000000400000000ULL,	// half / 2^256 = 400000000
+  0x0000002000000000ULL,	// half / 2^256 = 2000000000
+  0x0000020000000000ULL,	// half / 2^256 = 20000000000
+  0x0000100000000000ULL,	// half / 2^256 = 100000000000
+  0x0000800000000000ULL,	// half / 2^256 = 800000000000
+  0x0008000000000000ULL,	// half / 2^256 = 8000000000000
+  0x0040000000000000ULL,	// half / 2^256 = 40000000000000
+  0x0200000000000000ULL,	// half / 2^256 = 200000000000000
+  0x2000000000000000ULL,	// half / 2^256 = 2000000000000000
+  0x0000000000000001ULL,	// half / 2^320 = 1
+  0x0000000000000008ULL,	// half / 2^320 = 8
+  0x0000000000000080ULL,	// half / 2^320 = 80
+  0x0000000000000400ULL,	// half / 2^320 = 400
+  0x0000000000002000ULL,	// half / 2^320 = 2000
+  0x0000000000020000ULL,	// half / 2^320 = 20000
+  0x0000000000100000ULL,	// half / 2^320 = 100000
+  0x0000000000800000ULL,	// half / 2^320 = 800000
+  0x0000000008000000ULL,	// half / 2^320 = 8000000
+  0x0000000040000000ULL,	// half / 2^320 = 40000000
+  0x0000000200000000ULL,	// half / 2^320 = 200000000
+  0x0000002000000000ULL,	// half / 2^320 = 2000000000
+  0x0000010000000000ULL,	// half / 2^320 = 10000000000
+  0x0000080000000000ULL,	// half / 2^320 = 80000000000
+  0x0000800000000000ULL,	// half / 2^320 = 800000000000
+  0x0004000000000000ULL,	// half / 2^320 = 4000000000000
+  0x0020000000000000ULL,	// half / 2^320 = 20000000000000
+  0x0200000000000000ULL	// half / 2^320 = 200000000000000
+};
+
+UINT64 mask192[] = {
+  0x0000000000000007ULL,	// mask / 2^192
+  0x000000000000003fULL,	// mask / 2^192
+  0x00000000000001ffULL,	// mask / 2^192
+  0x0000000000001fffULL,	// mask / 2^192
+  0x000000000000ffffULL,	// mask / 2^192
+  0x000000000007ffffULL,	// mask / 2^192
+  0x00000000007fffffULL,	// mask / 2^192
+  0x0000000003ffffffULL,	// mask / 2^192
+  0x000000001fffffffULL,	// mask / 2^192
+  0x00000001ffffffffULL,	// mask / 2^192
+  0x0000000fffffffffULL,	// mask / 2^192
+  0x0000007fffffffffULL,	// mask / 2^192
+  0x000007ffffffffffULL,	// mask / 2^192
+  0x00003fffffffffffULL,	// mask / 2^192
+  0x0001ffffffffffffULL,	// mask / 2^192
+  0x001fffffffffffffULL,	// mask / 2^192
+  0x00ffffffffffffffULL,	// mask / 2^192
+  0x07ffffffffffffffULL,	// mask / 2^192
+  0x7fffffffffffffffULL,	// mask / 2^192
+  0x0000000000000003ULL,	// mask / 2^256
+  0x000000000000001fULL,	// mask / 2^256
+  0x00000000000001ffULL,	// mask / 2^256
+  0x0000000000000fffULL,	// mask / 2^256
+  0x0000000000007fffULL,	// mask / 2^256
+  0x000000000007ffffULL,	// mask / 2^256
+  0x00000000003fffffULL,	// mask / 2^256
+  0x0000000001ffffffULL,	// mask / 2^256
+  0x000000001fffffffULL,	// mask / 2^256
+  0x00000000ffffffffULL,	// mask / 2^256
+  0x00000007ffffffffULL,	// mask / 2^256
+  0x0000003fffffffffULL,	// mask / 2^256
+  0x000003ffffffffffULL,	// mask / 2^256
+  0x00001fffffffffffULL,	// mask / 2^256
+  0x0000ffffffffffffULL,	// mask / 2^256
+  0x000fffffffffffffULL,	// mask / 2^256
+  0x007fffffffffffffULL,	// mask / 2^256
+  0x03ffffffffffffffULL,	// mask / 2^256
+  0x3fffffffffffffffULL,	// mask / 2^256
+  0x0000000000000001ULL,	// mask / 2^320
+  0x000000000000000fULL,	// mask / 2^320
+  0x00000000000000ffULL,	// mask / 2^320
+  0x00000000000007ffULL,	// mask / 2^320
+  0x0000000000003fffULL,	// mask / 2^320
+  0x000000000003ffffULL,	// mask / 2^320
+  0x00000000001fffffULL,	// mask / 2^320
+  0x0000000000ffffffULL,	// mask / 2^320
+  0x000000000fffffffULL,	// mask / 2^320
+  0x000000007fffffffULL,	// mask / 2^320
+  0x00000003ffffffffULL,	// mask / 2^320
+  0x0000003fffffffffULL,	// mask / 2^320
+  0x000001ffffffffffULL,	// mask / 2^320
+  0x00000fffffffffffULL,	// mask / 2^320
+  0x0000ffffffffffffULL,	// mask / 2^320
+  0x0007ffffffffffffULL,	// mask / 2^320
+  0x003fffffffffffffULL,	// mask / 2^320
+  0x03ffffffffffffffULL	// mask / 2^320
+};
+
+UINT192 ten2mxtrunc192[] = {
+  {{0xccccccccccccccccULL, 0xccccccccccccccccULL,
+    0xccccccccccccccccULL}},
+  // (ten2mx >> 192) = cccccccccccccccccccccccccccccccccccccccccccccccc
+  {{0xd70a3d70a3d70a3dULL, 0x3d70a3d70a3d70a3ULL,
+    0xa3d70a3d70a3d70aULL}},
+  // (ten2mx >> 192) = a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3d70a3d
+  {{0x78d4fdf3b645a1caULL, 0x645a1cac083126e9ULL,
+    0x83126e978d4fdf3bULL}},
+  // (ten2mx >> 192) = 83126e978d4fdf3b645a1cac083126e978d4fdf3b645a1ca
+  {{0xc154c985f06f6944ULL, 0xd3c36113404ea4a8ULL,
+    0xd1b71758e219652bULL}},
+  // (ten2mx >> 192) = d1b71758e219652bd3c36113404ea4a8c154c985f06f6944
+  {{0xcddd6e04c0592103ULL, 0x0fcf80dc33721d53ULL,
+    0xa7c5ac471b478423ULL}},
+  // (ten2mx >> 192) = a7c5ac471b4784230fcf80dc33721d53cddd6e04c0592103
+  {{0xd7e45803cd141a69ULL, 0xa63f9a49c2c1b10fULL,
+    0x8637bd05af6c69b5ULL}},
+  // (ten2mx >> 192) = 8637bd05af6c69b5a63f9a49c2c1b10fd7e45803cd141a69
+  {{0x8ca08cd2e1b9c3dbULL, 0x3d32907604691b4cULL,
+    0xd6bf94d5e57a42bcULL}},
+  // (ten2mx >> 192) = d6bf94d5e57a42bc3d32907604691b4c8ca08cd2e1b9c3db
+  {{0x3d4d3d758161697cULL, 0xfdc20d2b36ba7c3dULL,
+    0xabcc77118461cefcULL}},
+  // (ten2mx >> 192) = abcc77118461cefcfdc20d2b36ba7c3d3d4d3d758161697c
+  {{0xfdd7645e011abac9ULL, 0x31680a88f8953030ULL,
+    0x89705f4136b4a597ULL}},
+  // (ten2mx >> 192) = 89705f4136b4a59731680a88f8953030fdd7645e011abac9
+  {{0x2fbf06fcce912adcULL, 0xb573440e5a884d1bULL,
+    0xdbe6fecebdedd5beULL}},
+  // (ten2mx >> 192) = dbe6fecebdedd5beb573440e5a884d1b2fbf06fcce912adc
+  {{0xf2ff38ca3eda88b0ULL, 0xf78f69a51539d748ULL,
+    0xafebff0bcb24aafeULL}},
+  // (ten2mx >> 192) = afebff0bcb24aafef78f69a51539d748f2ff38ca3eda88b0
+  {{0xf598fa3b657ba08dULL, 0xf93f87b7442e45d3ULL,
+    0x8cbccc096f5088cbULL}},
+  // (ten2mx >> 192) = 8cbccc096f5088cbf93f87b7442e45d3f598fa3b657ba08d
+  {{0x88f4c3923bf900e2ULL, 0x2865a5f206b06fb9ULL,
+    0xe12e13424bb40e13ULL}},
+  // (ten2mx >> 192) = e12e13424bb40e132865a5f206b06fb988f4c3923bf900e2
+  {{0x6d909c74fcc733e8ULL, 0x538484c19ef38c94ULL,
+    0xb424dc35095cd80fULL}},
+  // (ten2mx >> 192) = b424dc35095cd80f538484c19ef38c946d909c74fcc733e8
+  {{0x57a6e390ca38f653ULL, 0x0f9d37014bf60a10ULL,
+    0x901d7cf73ab0acd9ULL}},
+  // (ten2mx >> 192) = 901d7cf73ab0acd90f9d37014bf60a1057a6e390ca38f653
+  {{0xbf716c1add27f085ULL, 0x4c2ebe687989a9b3ULL,
+    0xe69594bec44de15bULL}},
+  // (ten2mx >> 192) = e69594bec44de15b4c2ebe687989a9b3bf716c1add27f085
+  {{0xff8df0157db98d37ULL, 0x09befeb9fad487c2ULL,
+    0xb877aa3236a4b449ULL}},
+  // (ten2mx >> 192) = b877aa3236a4b44909befeb9fad487c2ff8df0157db98d37
+  {{0x32d7f344649470f9ULL, 0x3aff322e62439fcfULL,
+    0x9392ee8e921d5d07ULL}},
+  // (ten2mx >> 192) = 9392ee8e921d5d073aff322e62439fcf32d7f344649470f9
+  {{0x1e2652070753e7f4ULL, 0x2b31e9e3d06c32e5ULL,
+    0xec1e4a7db69561a5ULL}},
+  // (ten2mx >> 192) = ec1e4a7db69561a52b31e9e3d06c32e51e2652070753e7f4
+  {{0x181ea8059f76532aULL, 0x88f4bb1ca6bcf584ULL,
+    0xbce5086492111aeaULL}},
+  // (ten2mx >> 192) = bce5086492111aea88f4bb1ca6bcf584181ea8059f76532a
+  {{0x467eecd14c5ea8eeULL, 0xd3f6fc16ebca5e03ULL,
+    0x971da05074da7beeULL}},
+  // (ten2mx >> 192) = 971da05074da7beed3f6fc16ebca5e03467eecd14c5ea8ee
+  {{0x70cb148213caa7e4ULL, 0x5324c68b12dd6338ULL,
+    0xf1c90080baf72cb1ULL}},
+  // (ten2mx >> 192) = f1c90080baf72cb15324c68b12dd633870cb148213caa7e4
+  {{0x8d6f439b43088650ULL, 0x75b7053c0f178293ULL,
+    0xc16d9a0095928a27ULL}},
+  // (ten2mx >> 192) = c16d9a0095928a2775b7053c0f1782938d6f439b43088650
+  {{0xd78c3615cf3a050cULL, 0xc4926a9672793542ULL,
+    0x9abe14cd44753b52ULL}},
+  // (ten2mx >> 192) = 9abe14cd44753b52c4926a9672793542d78c3615cf3a050c
+  {{0x8c1389bc7ec33b47ULL, 0x3a83ddbd83f52204ULL,
+    0xf79687aed3eec551ULL}},
+  // (ten2mx >> 192) = f79687aed3eec5513a83ddbd83f522048c1389bc7ec33b47
+  {{0x3cdc6e306568fc39ULL, 0x95364afe032a819dULL,
+    0xc612062576589ddaULL}},
+  // (ten2mx >> 192) = c612062576589dda95364afe032a819d3cdc6e306568fc39
+  {{0xca49f1c05120c9c7ULL, 0x775ea264cf55347dULL,
+    0x9e74d1b791e07e48ULL}},
+  // (ten2mx >> 192) = 9e74d1b791e07e48775ea264cf55347dca49f1c05120c9c7
+  {{0x76dcb60081ce0fa5ULL, 0x8bca9d6e188853fcULL,
+    0xfd87b5f28300ca0dULL}},
+  // (ten2mx >> 192) = fd87b5f28300ca0d8bca9d6e188853fc76dcb60081ce0fa5
+  {{0x5f16f80067d80c84ULL, 0x096ee45813a04330ULL,
+    0xcad2f7f5359a3b3eULL}},
+  // (ten2mx >> 192) = cad2f7f5359a3b3e096ee45813a043305f16f80067d80c84
+  {{0x18df2ccd1fe00a03ULL, 0xa1258379a94d028dULL,
+    0xa2425ff75e14fc31ULL}},
+  // (ten2mx >> 192) = a2425ff75e14fc31a1258379a94d028d18df2ccd1fe00a03
+  {{0x4718f0a419800802ULL, 0x80eacf948770ced7ULL,
+    0x81ceb32c4b43fcf4ULL}},
+  // (ten2mx >> 192) = 81ceb32c4b43fcf480eacf948770ced74718f0a419800802
+  {{0x0b5b1aa028ccd99eULL, 0x67de18eda5814af2ULL,
+    0xcfb11ead453994baULL}},
+  // (ten2mx >> 192) = cfb11ead453994ba67de18eda5814af20b5b1aa028ccd99e
+  {{0x6f7c154ced70ae18ULL, 0xecb1ad8aeacdd58eULL,
+    0xa6274bbdd0fadd61ULL}},
+  // (ten2mx >> 192) = a6274bbdd0fadd61ecb1ad8aeacdd58e6f7c154ced70ae18
+  {{0xbf967770bdf3be79ULL, 0xbd5af13bef0b113eULL,
+    0x84ec3c97da624ab4ULL}},
+  // (ten2mx >> 192) = 84ec3c97da624ab4bd5af13bef0b113ebf967770bdf3be79
+  {{0x65bd8be79652ca5cULL, 0x955e4ec64b44e864ULL,
+    0xd4ad2dbfc3d07787ULL}},
+  // (ten2mx >> 192) = d4ad2dbfc3d07787955e4ec64b44e86465bd8be79652ca5c
+  {{0xeafe098611dbd516ULL, 0xdde50bd1d5d0b9e9ULL,
+    0xaa242499697392d2ULL}},
+  // (ten2mx >> 192) = aa242499697392d2dde50bd1d5d0b9e9eafe098611dbd516
+  {{0xbbfe6e04db164412ULL, 0x7e50d64177da2e54ULL,
+    0x881cea14545c7575ULL}},
+  // (ten2mx >> 192) = 881cea14545c75757e50d64177da2e54bbfe6e04db164412
+  {{0x2cca49a15e8a0683ULL, 0x96e7bd358c904a21ULL,
+    0xd9c7dced53c72255ULL}},
+  // (ten2mx >> 192) = d9c7dced53c7225596e7bd358c904a212cca49a15e8a0683
+  {{0x8a3b6e1ab2080536ULL, 0xabec975e0a0d081aULL,
+    0xae397d8aa96c1b77ULL}},
+  // (ten2mx >> 192) = ae397d8aa96c1b77abec975e0a0d081a8a3b6e1ab2080536
+  {{0x3b62be7bc1a0042bULL, 0x2323ac4b3b3da015ULL,
+    0x8b61313bbabce2c6ULL}},
+  // (ten2mx >> 192) = 8b61313bbabce2c62323ac4b3b3da0153b62be7bc1a0042b
+  {{0x5f0463f935ccd378ULL, 0x6b6c46dec52f6688ULL,
+    0xdf01e85f912e37a3ULL}},
+  // (ten2mx >> 192) = df01e85f912e37a36b6c46dec52f66885f0463f935ccd378
+  {{0x7f36b660f7d70f93ULL, 0x55f038b237591ed3ULL,
+    0xb267ed1940f1c61cULL}},
+  // (ten2mx >> 192) = b267ed1940f1c61c55f038b237591ed37f36b660f7d70f93
+  {{0xcc2bc51a5fdf3fa9ULL, 0x77f3608e92adb242ULL,
+    0x8eb98a7a9a5b04e3ULL}},
+  // (ten2mx >> 192) = 8eb98a7a9a5b04e377f3608e92adb242cc2bc51a5fdf3fa9
+  {{0xe046082a32fecc41ULL, 0x8cb89a7db77c506aULL,
+    0xe45c10c42a2b3b05ULL}},
+  // (ten2mx >> 192) = e45c10c42a2b3b058cb89a7db77c506ae046082a32fecc41
+  {{0x4d04d354f598a367ULL, 0x3d607b97c5fd0d22ULL,
+    0xb6b00d69bb55c8d1ULL}},
+  // (ten2mx >> 192) = b6b00d69bb55c8d13d607b97c5fd0d224d04d354f598a367
+  {{0x3d9d75dd9146e91fULL, 0xcab3961304ca70e8ULL,
+    0x9226712162ab070dULL}},
+  // (ten2mx >> 192) = 9226712162ab070dcab3961304ca70e83d9d75dd9146e91f
+  {{0xc8fbefc8e87174ffULL, 0xaab8f01e6e10b4a6ULL,
+    0xe9d71b689dde71afULL}},
+  // (ten2mx >> 192) = e9d71b689dde71afaab8f01e6e10b4a6c8fbefc8e87174ff
+  {{0x3a63263a538df733ULL, 0x5560c018580d5d52ULL,
+    0xbb127c53b17ec159ULL}},
+  // (ten2mx >> 192) = bb127c53b17ec1595560c018580d5d523a63263a538df733
+  {{0x2eb5b82ea93e5f5cULL, 0xdde7001379a44aa8ULL,
+    0x95a8637627989aadULL}},
+  // (ten2mx >> 192) = 95a8637627989aaddde7001379a44aa82eb5b82ea93e5f5c
+  {{0x4abc59e441fd6560ULL, 0x963e66858f6d4440ULL,
+    0xef73d256a5c0f77cULL}},
+  // (ten2mx >> 192) = ef73d256a5c0f77c963e66858f6d44404abc59e441fd6560
+  {{0x6efd14b69b311de6ULL, 0xde98520472bdd033ULL,
+    0xbf8fdb78849a5f96ULL}},
+  // (ten2mx >> 192) = bf8fdb78849a5f96de98520472bdd0336efd14b69b311de6
+  {{0x259743c548f417ebULL, 0xe546a8038efe4029ULL,
+    0x993fe2c6d07b7fabULL}},
+  // (ten2mx >> 192) = 993fe2c6d07b7fabe546a8038efe4029259743c548f417eb
+  {{0x3c25393ba7ecf312ULL, 0xd53dd99f4b3066a8ULL,
+    0xf53304714d9265dfULL}},
+  // (ten2mx >> 192) = f53304714d9265dfd53dd99f4b3066a83c25393ba7ecf312
+  {{0x96842dc95323f5a8ULL, 0xaa97e14c3c26b886ULL,
+    0xc428d05aa4751e4cULL}},
+  // (ten2mx >> 192) = c428d05aa4751e4caa97e14c3c26b88696842dc95323f5a8
+  {{0xab9cf16ddc1cc486ULL, 0x55464dd69685606bULL,
+    0x9ced737bb6c4183dULL}},
+  // (ten2mx >> 192) = 9ced737bb6c4183d55464dd69685606bab9cf16ddc1cc486
+  {{0xac2e4f162cfad40aULL, 0xeed6e2f0f0d56712ULL, 0xfb158592be068d2eULL}}
+  // (ten2mx >> 192) = fb158592be068d2eeed6e2f0f0d56712ac2e4f162cfad40a
+};
+
+UINT256 Kx256[] = {
+  {{0xcccccccccccccccdULL, 0xccccccccccccccccULL,
+    0xccccccccccccccccULL, 0xccccccccccccccccULL}},
+  // 10^-1 ~= cccccccccccccccc  cccccccccccccccc   
+  //   cccccccccccccccccccccccccccccccd   * 2^-259
+  {{0x70a3d70a3d70a3d8ULL, 0xd70a3d70a3d70a3dULL,
+    0x3d70a3d70a3d70a3ULL, 0xa3d70a3d70a3d70aULL}},
+  // 10^-2 ~= a3d70a3d70a3d70a  3d70a3d70a3d70a3   
+  //   d70a3d70a3d70a3d70a3d70a3d70a3d8   * 2^-262
+  {{0xc083126e978d4fe0ULL, 0x78d4fdf3b645a1caULL,
+    0x645a1cac083126e9ULL, 0x83126e978d4fdf3bULL}},
+  // 10^-3 ~= 83126e978d4fdf3b  645a1cac083126e9   
+  //   78d4fdf3b645a1cac083126e978d4fe0   * 2^-265
+  {{0x67381d7dbf487fccULL, 0xc154c985f06f6944ULL,
+    0xd3c36113404ea4a8ULL, 0xd1b71758e219652bULL}},
+  // 10^-4 ~= d1b71758e219652b  d3c36113404ea4a8   
+  //   c154c985f06f694467381d7dbf487fcc   * 2^-269
+  {{0x85c67dfe32a0663dULL, 0xcddd6e04c0592103ULL,
+    0x0fcf80dc33721d53ULL, 0xa7c5ac471b478423ULL}},
+  // 10^-5 ~= a7c5ac471b478423  fcf80dc33721d53   
+  //   cddd6e04c059210385c67dfe32a0663d   * 2^-272
+  {{0x37d1fe64f54d1e97ULL, 0xd7e45803cd141a69ULL,
+    0xa63f9a49c2c1b10fULL, 0x8637bd05af6c69b5ULL}},
+  // 10^-6 ~= 8637bd05af6c69b5  a63f9a49c2c1b10f   
+  //   d7e45803cd141a6937d1fe64f54d1e97   * 2^-275
+  {{0x8c8330a1887b6425ULL, 0x8ca08cd2e1b9c3dbULL,
+    0x3d32907604691b4cULL, 0xd6bf94d5e57a42bcULL}},
+  // 10^-7 ~= d6bf94d5e57a42bc  3d32907604691b4c   
+  //   8ca08cd2e1b9c3db8c8330a1887b6425   * 2^-279
+  {{0x7068f3b46d2f8351ULL, 0x3d4d3d758161697cULL,
+    0xfdc20d2b36ba7c3dULL, 0xabcc77118461cefcULL}},
+  // 10^-8 ~= abcc77118461cefc  fdc20d2b36ba7c3d   
+  //   3d4d3d758161697c7068f3b46d2f8351   * 2^-282
+  {{0xf387295d242602a7ULL, 0xfdd7645e011abac9ULL,
+    0x31680a88f8953030ULL, 0x89705f4136b4a597ULL}},
+  // 10^-9 ~= 89705f4136b4a597  31680a88f8953030   
+  //   fdd7645e011abac9f387295d242602a7   * 2^-285
+  {{0xb8d8422ea03cd10bULL, 0x2fbf06fcce912adcULL,
+    0xb573440e5a884d1bULL, 0xdbe6fecebdedd5beULL}},
+  // 10^-10 ~= dbe6fecebdedd5be  b573440e5a884d1b   
+  //   2fbf06fcce912adcb8d8422ea03cd10b   * 2^-289
+  {{0x93e034f219ca40d6ULL, 0xf2ff38ca3eda88b0ULL,
+    0xf78f69a51539d748ULL, 0xafebff0bcb24aafeULL}},
+  // 10^-11 ~= afebff0bcb24aafe  f78f69a51539d748   
+  //   f2ff38ca3eda88b093e034f219ca40d6   * 2^-292
+  {{0x4319c3f4e16e9a45ULL, 0xf598fa3b657ba08dULL,
+    0xf93f87b7442e45d3ULL, 0x8cbccc096f5088cbULL}},
+  // 10^-12 ~= 8cbccc096f5088cb  f93f87b7442e45d3   
+  //   f598fa3b657ba08d4319c3f4e16e9a45   * 2^-295
+  {{0x04f606549be42a07ULL, 0x88f4c3923bf900e2ULL,
+    0x2865a5f206b06fb9ULL, 0xe12e13424bb40e13ULL}},
+  // 10^-13 ~= e12e13424bb40e13  2865a5f206b06fb9   
+  //   88f4c3923bf900e204f606549be42a07   * 2^-299
+  {{0x03f805107cb68806ULL, 0x6d909c74fcc733e8ULL,
+    0x538484c19ef38c94ULL, 0xb424dc35095cd80fULL}},
+  // 10^-14 ~= b424dc35095cd80f  538484c19ef38c94   
+  //   6d909c74fcc733e803f805107cb68806   * 2^-302
+  {{0x3660040d3092066bULL, 0x57a6e390ca38f653ULL,
+    0x0f9d37014bf60a10ULL, 0x901d7cf73ab0acd9ULL}},
+  // 10^-15 ~= 901d7cf73ab0acd9  f9d37014bf60a10   
+  //   57a6e390ca38f6533660040d3092066b   * 2^-305
+  {{0x23ccd3484db670abULL, 0xbf716c1add27f085ULL,
+    0x4c2ebe687989a9b3ULL, 0xe69594bec44de15bULL}},
+  // 10^-16 ~= e69594bec44de15b  4c2ebe687989a9b3   
+  //   bf716c1add27f08523ccd3484db670ab   * 2^-309
+  {{0x4fd70f6d0af85a23ULL, 0xff8df0157db98d37ULL,
+    0x09befeb9fad487c2ULL, 0xb877aa3236a4b449ULL}},
+  // 10^-17 ~= b877aa3236a4b449  9befeb9fad487c2   
+  //   ff8df0157db98d374fd70f6d0af85a23   * 2^-312
+  {{0x0cac0c573bf9e1b6ULL, 0x32d7f344649470f9ULL,
+    0x3aff322e62439fcfULL, 0x9392ee8e921d5d07ULL}},
+  // 10^-18 ~= 9392ee8e921d5d07  3aff322e62439fcf   
+  //   32d7f344649470f90cac0c573bf9e1b6   * 2^-315
+  {{0xe11346f1f98fcf89ULL, 0x1e2652070753e7f4ULL,
+    0x2b31e9e3d06c32e5ULL, 0xec1e4a7db69561a5ULL}},
+  // 10^-19 ~= ec1e4a7db69561a5  2b31e9e3d06c32e5   
+  //   1e2652070753e7f4e11346f1f98fcf89   * 2^-319
+  {{0x4da9058e613fd93aULL, 0x181ea8059f76532aULL,
+    0x88f4bb1ca6bcf584ULL, 0xbce5086492111aeaULL}},
+  // 10^-20 ~= bce5086492111aea  88f4bb1ca6bcf584   
+  //   181ea8059f76532a4da9058e613fd93a   * 2^-322
+  {{0xa48737a51a997a95ULL, 0x467eecd14c5ea8eeULL,
+    0xd3f6fc16ebca5e03ULL, 0x971da05074da7beeULL}},
+  // 10^-21 ~= 971da05074da7bee  d3f6fc16ebca5e03   
+  //   467eecd14c5ea8eea48737a51a997a95   * 2^-325
+  {{0x3a71f2a1c428c421ULL, 0x70cb148213caa7e4ULL,
+    0x5324c68b12dd6338ULL, 0xf1c90080baf72cb1ULL}},
+  // 10^-22 ~= f1c90080baf72cb1  5324c68b12dd6338   
+  //   70cb148213caa7e43a71f2a1c428c421   * 2^-329
+  {{0x2ec18ee7d0209ce8ULL, 0x8d6f439b43088650ULL,
+    0x75b7053c0f178293ULL, 0xc16d9a0095928a27ULL}},
+  // 10^-23 ~= c16d9a0095928a27  75b7053c0f178293   
+  //   8d6f439b430886502ec18ee7d0209ce8   * 2^-332
+  {{0xf23472530ce6e3edULL, 0xd78c3615cf3a050cULL,
+    0xc4926a9672793542ULL, 0x9abe14cd44753b52ULL}},
+  // 10^-24 ~= 9abe14cd44753b52  c4926a9672793542   
+  //   d78c3615cf3a050cf23472530ce6e3ed   * 2^-335
+  {{0xe9ed83b814a49fe1ULL, 0x8c1389bc7ec33b47ULL,
+    0x3a83ddbd83f52204ULL, 0xf79687aed3eec551ULL}},
+  // 10^-25 ~= f79687aed3eec551  3a83ddbd83f52204   
+  //   8c1389bc7ec33b47e9ed83b814a49fe1   * 2^-339
+  {{0x87f1362cdd507fe7ULL, 0x3cdc6e306568fc39ULL,
+    0x95364afe032a819dULL, 0xc612062576589ddaULL}},
+  // 10^-26 ~= c612062576589dda  95364afe032a819d   
+  //   3cdc6e306568fc3987f1362cdd507fe7   * 2^-342
+  {{0x9ff42b5717739986ULL, 0xca49f1c05120c9c7ULL,
+    0x775ea264cf55347dULL, 0x9e74d1b791e07e48ULL}},
+  // 10^-27 ~= 9e74d1b791e07e48  775ea264cf55347d   
+  //   ca49f1c05120c9c79ff42b5717739986   * 2^-345
+  {{0xccb9def1bf1f5c09ULL, 0x76dcb60081ce0fa5ULL,
+    0x8bca9d6e188853fcULL, 0xfd87b5f28300ca0dULL}},
+  // 10^-28 ~= fd87b5f28300ca0d  8bca9d6e188853fc   
+  //   76dcb60081ce0fa5ccb9def1bf1f5c09   * 2^-349
+  {{0xa3c7e58e327f7cd4ULL, 0x5f16f80067d80c84ULL,
+    0x096ee45813a04330ULL, 0xcad2f7f5359a3b3eULL}},
+  // 10^-29 ~= cad2f7f5359a3b3e  96ee45813a04330   
+  //   5f16f80067d80c84a3c7e58e327f7cd4   * 2^-352
+  {{0xb6398471c1ff9710ULL, 0x18df2ccd1fe00a03ULL,
+    0xa1258379a94d028dULL, 0xa2425ff75e14fc31ULL}},
+  // 10^-30 ~= a2425ff75e14fc31  a1258379a94d028d   
+  //   18df2ccd1fe00a03b6398471c1ff9710   * 2^-355
+  {{0xf82e038e34cc78daULL, 0x4718f0a419800802ULL,
+    0x80eacf948770ced7ULL, 0x81ceb32c4b43fcf4ULL}},
+  // 10^-31 ~= 81ceb32c4b43fcf4  80eacf948770ced7   
+  //   4718f0a419800802f82e038e34cc78da   * 2^-358
+  {{0x59e338e387ad8e29ULL, 0x0b5b1aa028ccd99eULL,
+    0x67de18eda5814af2ULL, 0xcfb11ead453994baULL}},
+  // 10^-32 ~= cfb11ead453994ba  67de18eda5814af2   
+  //   b5b1aa028ccd99e59e338e387ad8e29   * 2^-362
+  {{0x47e8fa4f9fbe0b54ULL, 0x6f7c154ced70ae18ULL,
+    0xecb1ad8aeacdd58eULL, 0xa6274bbdd0fadd61ULL}},
+  // 10^-33 ~= a6274bbdd0fadd61  ecb1ad8aeacdd58e   
+  //   6f7c154ced70ae1847e8fa4f9fbe0b54   * 2^-365
+  {{0xd320c83fb2fe6f76ULL, 0xbf967770bdf3be79ULL,
+    0xbd5af13bef0b113eULL, 0x84ec3c97da624ab4ULL}},
+  // 10^-34 ~= 84ec3c97da624ab4  bd5af13bef0b113e   
+  //   bf967770bdf3be79d320c83fb2fe6f76   * 2^-368
+  {{0x85014065eb30b257ULL, 0x65bd8be79652ca5cULL,
+    0x955e4ec64b44e864ULL, 0xd4ad2dbfc3d07787ULL}},
+  // 10^-35 ~= d4ad2dbfc3d07787  955e4ec64b44e864   
+  //   65bd8be79652ca5c85014065eb30b257   * 2^-372
+  {{0xd0cdcd1e55c08eacULL, 0xeafe098611dbd516ULL,
+    0xdde50bd1d5d0b9e9ULL, 0xaa242499697392d2ULL}},
+  // 10^-36 ~= aa242499697392d2  dde50bd1d5d0b9e9   
+  //   eafe098611dbd516d0cdcd1e55c08eac   * 2^-375
+  {{0x40a4a418449a0bbdULL, 0xbbfe6e04db164412ULL,
+    0x7e50d64177da2e54ULL, 0x881cea14545c7575ULL}},
+  // 10^-37 ~= 881cea14545c7575  7e50d64177da2e54   
+  //   bbfe6e04db16441240a4a418449a0bbd   * 2^-378
+  {{0x9aa1068d3a9012c8ULL, 0x2cca49a15e8a0683ULL,
+    0x96e7bd358c904a21ULL, 0xd9c7dced53c72255ULL}},
+  // 10^-38 ~= d9c7dced53c72255  96e7bd358c904a21   
+  //   2cca49a15e8a06839aa1068d3a9012c8   * 2^-382
+  {{0x154d9ed7620cdbd3ULL, 0x8a3b6e1ab2080536ULL,
+    0xabec975e0a0d081aULL, 0xae397d8aa96c1b77ULL}},
+  // 10^-39 ~= ae397d8aa96c1b77  abec975e0a0d081a   
+  //   8a3b6e1ab2080536154d9ed7620cdbd3   * 2^-385
+  {{0x443e18ac4e70afdcULL, 0x3b62be7bc1a0042bULL,
+    0x2323ac4b3b3da015ULL, 0x8b61313bbabce2c6ULL}},
+  // 10^-40 ~= 8b61313bbabce2c6  2323ac4b3b3da015   
+  //   3b62be7bc1a0042b443e18ac4e70afdc   * 2^-388
+  {{0x6d30277a171ab2f9ULL, 0x5f0463f935ccd378ULL,
+    0x6b6c46dec52f6688ULL, 0xdf01e85f912e37a3ULL}},
+  // 10^-41 ~= df01e85f912e37a3  6b6c46dec52f6688   
+  //   5f0463f935ccd3786d30277a171ab2f9   * 2^-392
+  {{0x8a8cec61ac155bfbULL, 0x7f36b660f7d70f93ULL,
+    0x55f038b237591ed3ULL, 0xb267ed1940f1c61cULL}},
+  // 10^-42 ~= b267ed1940f1c61c  55f038b237591ed3   
+  //   7f36b660f7d70f938a8cec61ac155bfb   * 2^-395
+  {{0x3ba3f04e23444996ULL, 0xcc2bc51a5fdf3fa9ULL,
+    0x77f3608e92adb242ULL, 0x8eb98a7a9a5b04e3ULL}},
+  // 10^-43 ~= 8eb98a7a9a5b04e3  77f3608e92adb242   
+  //   cc2bc51a5fdf3fa93ba3f04e23444996   * 2^-398
+  {{0xf9064d49d206dc22ULL, 0xe046082a32fecc41ULL,
+    0x8cb89a7db77c506aULL, 0xe45c10c42a2b3b05ULL}},
+  // 10^-44 ~= e45c10c42a2b3b05  8cb89a7db77c506a   
+  //   e046082a32fecc41f9064d49d206dc22   * 2^-402
+  {{0xfa6b7107db38b01bULL, 0x4d04d354f598a367ULL,
+    0x3d607b97c5fd0d22ULL, 0xb6b00d69bb55c8d1ULL}},
+  // 10^-45 ~= b6b00d69bb55c8d1  3d607b97c5fd0d22   
+  //   4d04d354f598a367fa6b7107db38b01b   * 2^-405
+  {{0xfb8927397c2d59b0ULL, 0x3d9d75dd9146e91fULL,
+    0xcab3961304ca70e8ULL, 0x9226712162ab070dULL}},
+  // 10^-46 ~= 9226712162ab070d  cab3961304ca70e8   
+  //   3d9d75dd9146e91ffb8927397c2d59b0   * 2^-408
+  {{0xf8db71f5937bc2b2ULL, 0xc8fbefc8e87174ffULL,
+    0xaab8f01e6e10b4a6ULL, 0xe9d71b689dde71afULL}},
+  // 10^-47 ~= e9d71b689dde71af  aab8f01e6e10b4a6   
+  //   c8fbefc8e87174fff8db71f5937bc2b2   * 2^-412
+  {{0x2d7c5b2adc630228ULL, 0x3a63263a538df733ULL,
+    0x5560c018580d5d52ULL, 0xbb127c53b17ec159ULL}},
+  // 10^-48 ~= bb127c53b17ec159  5560c018580d5d52   
+  //   3a63263a538df7332d7c5b2adc630228   * 2^-415
+  {{0x24637c2249e8ce87ULL, 0x2eb5b82ea93e5f5cULL,
+    0xdde7001379a44aa8ULL, 0x95a8637627989aadULL}},
+  // 10^-49 ~= 95a8637627989aad  dde7001379a44aa8   
+  //   2eb5b82ea93e5f5c24637c2249e8ce87   * 2^-418
+  {{0x3a38c69d430e173eULL, 0x4abc59e441fd6560ULL,
+    0x963e66858f6d4440ULL, 0xef73d256a5c0f77cULL}},
+  // 10^-50 ~= ef73d256a5c0f77c  963e66858f6d4440   
+  //   4abc59e441fd65603a38c69d430e173e   * 2^-422
+  {{0x94fa387dcf3e78feULL, 0x6efd14b69b311de6ULL,
+    0xde98520472bdd033ULL, 0xbf8fdb78849a5f96ULL}},
+  // 10^-51 ~= bf8fdb78849a5f96  de98520472bdd033   
+  //   6efd14b69b311de694fa387dcf3e78fe   * 2^-425
+  {{0xaa61c6cb0c31fa65ULL, 0x259743c548f417ebULL,
+    0xe546a8038efe4029ULL, 0x993fe2c6d07b7fabULL}},
+  // 10^-52 ~= 993fe2c6d07b7fab  e546a8038efe4029   
+  //   259743c548f417ebaa61c6cb0c31fa65   * 2^-428
+  {{0xaa360ade79e990a2ULL, 0x3c25393ba7ecf312ULL,
+    0xd53dd99f4b3066a8ULL, 0xf53304714d9265dfULL}},
+  // 10^-53 ~= f53304714d9265df  d53dd99f4b3066a8   
+  //   3c25393ba7ecf312aa360ade79e990a2   * 2^-432
+  {{0x882b3be52e5473b5ULL, 0x96842dc95323f5a8ULL,
+    0xaa97e14c3c26b886ULL, 0xc428d05aa4751e4cULL}},
+  // 10^-54 ~= c428d05aa4751e4c  aa97e14c3c26b886   
+  //   96842dc95323f5a8882b3be52e5473b5   * 2^-435
+  {{0xd355c98425105c91ULL, 0xab9cf16ddc1cc486ULL,
+    0x55464dd69685606bULL, 0x9ced737bb6c4183dULL}},
+  // 10^-55 ~= 9ced737bb6c4183d  55464dd69685606b   
+  //   ab9cf16ddc1cc486d355c98425105c91   * 2^-438
+  {{0xebbc75a03b4d60e7ULL, 0xac2e4f162cfad40aULL,
+    0xeed6e2f0f0d56712ULL, 0xfb158592be068d2eULL}},
+  // 10^-56 ~= fb158592be068d2e  eed6e2f0f0d56712   
+  //   ac2e4f162cfad40aebbc75a03b4d60e7   * 2^-442
+  {{0x8963914cfc3de71fULL, 0x568b727823fbdcd5ULL,
+    0xf245825a5a445275ULL, 0xc8de047564d20a8bULL}},
+  // 10^-57 ~= c8de047564d20a8b  f245825a5a445275   
+  //   568b727823fbdcd58963914cfc3de71f   * 2^-445
+  {{0xd44fa770c9cb1f4cULL, 0x453c5b934ffcb0aaULL,
+    0x5b6aceaeae9d0ec4ULL, 0xa0b19d2ab70e6ed6ULL}},
+  // 10^-58 ~= a0b19d2ab70e6ed6  5b6aceaeae9d0ec4   
+  //   453c5b934ffcb0aad44fa770c9cb1f4c   * 2^-448
+  {{0xdd0c85f3d4a27f70ULL, 0x37637c75d996f3bbULL,
+    0xe2bbd88bbee40bd0ULL, 0x808e17555f3ebf11ULL}},
+  // 10^-59 ~= 808e17555f3ebf11  e2bbd88bbee40bd0   
+  //   37637c75d996f3bbdd0c85f3d4a27f70   * 2^-451
+  {{0x61ada31fba9d98b3ULL, 0x256bfa5628f185f9ULL,
+    0x3792f412cb06794dULL, 0xcdb02555653131b6ULL}},
+  // 10^-60 ~= cdb02555653131b6  3792f412cb06794d   
+  //   256bfa5628f185f961ada31fba9d98b3   * 2^-455
+  {{0xe7be1c196217ad5cULL, 0x51232eab53f46b2dULL,
+    0x5fa8c3423c052dd7ULL, 0xa48ceaaab75a8e2bULL}},
+  // 10^-61 ~= a48ceaaab75a8e2b  5fa8c3423c052dd7   
+  //   51232eab53f46b2de7be1c196217ad5c   * 2^-458
+  {{0x52fe7ce11b46244aULL, 0x40e8f222a99055beULL,
+    0x1953cf68300424acULL, 0x83a3eeeef9153e89ULL}},
+  // 10^-62 ~= 83a3eeeef9153e89  1953cf68300424ac   
+  //   40e8f222a99055be52fe7ce11b46244a   * 2^-461
+  {{0x51972e34f8703a10ULL, 0x34a7e9d10f4d55fdULL,
+    0x8eec7f0d19a03aadULL, 0xd29fe4b18e88640eULL}},
+  // 10^-63 ~= d29fe4b18e88640e  8eec7f0d19a03aad   
+  //   34a7e9d10f4d55fd51972e34f8703a10   * 2^-465
+  {{0x0e128b5d938cfb40ULL, 0x2a1fee40d90aab31ULL,
+    0x3f2398d747b36224ULL, 0xa87fea27a539e9a5ULL}},
+  // 10^-64 ~= a87fea27a539e9a5  3f2398d747b36224   
+  //   2a1fee40d90aab310e128b5d938cfb40   * 2^-468
+  {{0x3e753c4adc70c900ULL, 0xbb4cbe9a473bbc27ULL,
+    0x98e947129fc2b4e9ULL, 0x86ccbb52ea94baeaULL}},
+  // 10^-65 ~= 86ccbb52ea94baea  98e947129fc2b4e9   
+  //   bb4cbe9a473bbc273e753c4adc70c900   * 2^-471
+  {{0x30bb93aafa4e0e66ULL, 0x9214642a0b92c6a5ULL,
+    0x5b0ed81dcc6abb0fULL, 0xd7adf884aa879177ULL}},
+  // 10^-66 ~= d7adf884aa879177  5b0ed81dcc6abb0f   
+  //   9214642a0b92c6a530bb93aafa4e0e66   * 2^-475
+  {{0xc0960fbbfb71a51fULL, 0xa8105021a2dbd21dULL,
+    0xe272467e3d222f3fULL, 0xac8b2d36eed2dac5ULL}},
+  // 10^-67 ~= ac8b2d36eed2dac5  e272467e3d222f3f   
+  //   a8105021a2dbd21dc0960fbbfb71a51f   * 2^-478
+  {{0x66de72fcc927b74cULL, 0xb9a6a6814f1641b1ULL,
+    0x1b8e9ecb641b58ffULL, 0x8a08f0f8bf0f156bULL}},
+  // 10^-68 ~= 8a08f0f8bf0f156b  1b8e9ecb641b58ff   
+  //   b9a6a6814f1641b166de72fcc927b74c   * 2^-481
+  {{0xd7ca5194750c5879ULL, 0xf5d770cee4f0691bULL,
+    0xf8e431456cf88e65ULL, 0xdcdb1b2798182244ULL}},
+  // 10^-69 ~= dcdb1b2798182244  f8e431456cf88e65   
+  //   f5d770cee4f0691bd7ca5194750c5879   * 2^-485
+  {{0xdfd50e105da379faULL, 0x9179270bea59edafULL,
+    0x2d835a9df0c6d851ULL, 0xb0af48ec79ace837ULL}},
+  // 10^-70 ~= b0af48ec79ace837  2d835a9df0c6d851   
+  //   9179270bea59edafdfd50e105da379fa   * 2^-488
+  {{0x19773e737e1c6195ULL, 0x0dfa85a321e18af3ULL,
+    0x579c487e5a38ad0eULL, 0x8d590723948a535fULL}},
+  // 10^-71 ~= 8d590723948a535f  579c487e5a38ad0e   
+  //   dfa85a321e18af319773e737e1c6195   * 2^-491
+  {{0xf58b971f302d68efULL, 0x165da29e9c9c1184ULL,
+    0x25c6da63c38de1b0ULL, 0xe2280b6c20dd5232ULL}},
+  // 10^-72 ~= e2280b6c20dd5232  25c6da63c38de1b0   
+  //   165da29e9c9c1184f58b971f302d68ef   * 2^-495
+  {{0xc46fac18f3578725ULL, 0x4517b54bb07cdad0ULL,
+    0x1e38aeb6360b1af3ULL, 0xb4ecd5f01a4aa828ULL}},
+  // 10^-73 ~= b4ecd5f01a4aa828  1e38aeb6360b1af3   
+  //   4517b54bb07cdad0c46fac18f3578725   * 2^-498
+  {{0x36bfbce0c2ac6c1eULL, 0x9dac910959fd7bdaULL,
+    0xb1c6f22b5e6f48c2ULL, 0x90bd77f3483bb9b9ULL}},
+  // 10^-74 ~= 90bd77f3483bb9b9  b1c6f22b5e6f48c2   
+  //   9dac910959fd7bda36bfbce0c2ac6c1e   * 2^-501
+  {{0x2465fb01377a4696ULL, 0x2f7a81a88ffbf95dULL,
+    0xb60b1d1230b20e04ULL, 0xe7958cb87392c2c2ULL}}
+  // 10^-75 ~= e7958cb87392c2c2  b60b1d1230b20e04   
+  //   2f7a81a88ffbf95d2465fb01377a4696   * 2^-505
+};
+
+unsigned int Ex256m256[] = {
+  3,	// 259 - 256, Ex = 259
+  6,	// 262 - 256, Ex = 262
+  9,	// 265 - 256, Ex = 265
+  13,	// 269 - 256, Ex = 269
+  16,	// 272 - 256, Ex = 272
+  19,	// 275 - 256, Ex = 275
+  23,	// 279 - 256, Ex = 279
+  26,	// 282 - 256, Ex = 282
+  29,	// 285 - 256, Ex = 285
+  33,	// 289 - 256, Ex = 289
+  36,	// 292 - 256, Ex = 292
+  39,	// 295 - 256, Ex = 295
+  43,	// 299 - 256, Ex = 299
+  46,	// 302 - 256, Ex = 302
+  49,	// 305 - 256, Ex = 305
+  53,	// 309 - 256, Ex = 309
+  56,	// 312 - 256, Ex = 312
+  59,	// 315 - 256, Ex = 315
+  63,	// 319 - 256, Ex = 319
+  2,	// 322 - 320, Ex = 322
+  5,	// 325 - 320, Ex = 325
+  9,	// 329 - 320, Ex = 329
+  12,	// 332 - 320, Ex = 332
+  15,	// 335 - 320, Ex = 335
+  19,	// 339 - 320, Ex = 339
+  22,	// 342 - 320, Ex = 342
+  25,	// 345 - 320, Ex = 345
+  29,	// 349 - 320, Ex = 349
+  32,	// 352 - 320, Ex = 352
+  35,	// 355 - 320, Ex = 355
+  38,	// 358 - 320, Ex = 358
+  42,	// 362 - 320, Ex = 362
+  45,	// 365 - 320, Ex = 365
+  48,	// 368 - 320, Ex = 368
+  52,	// 372 - 320, Ex = 372
+  55,	// 375 - 320, Ex = 375
+  58,	// 378 - 320, Ex = 378
+  62,	// 382 - 320, Ex = 382
+  1,	// 385 - 384, Ex = 385
+  4,	// 388 - 384, Ex = 388
+  8,	// 392 - 384, Ex = 392
+  11,	// 395 - 384, Ex = 395
+  14,	// 398 - 384, Ex = 398
+  18,	// 402 - 384, Ex = 402
+  21,	// 405 - 384, Ex = 405
+  24,	// 408 - 384, Ex = 408
+  28,	// 412 - 384, Ex = 412
+  31,	// 415 - 384, Ex = 415
+  34,	// 418 - 384, Ex = 418
+  38,	// 422 - 384, Ex = 422
+  41,	// 425 - 384, Ex = 425
+  44,	// 428 - 384, Ex = 428
+  48,	// 432 - 384, Ex = 432
+  51,	// 435 - 384, Ex = 435
+  54,	// 438 - 384, Ex = 438
+  58,	// 442 - 384, Ex = 442
+  61,	// 445 - 384, Ex = 445
+  0,	// 448 - 448, Ex = 448
+  3,	// 451 - 448, Ex = 451
+  7,	// 455 - 448, Ex = 455
+  10,	// 458 - 448, Ex = 458
+  13,	// 461 - 448, Ex = 461
+  17,	// 465 - 448, Ex = 465
+  20,	// 468 - 448, Ex = 468
+  23,	// 471 - 448, Ex = 471
+  27,	// 475 - 448, Ex = 475
+  30,	// 478 - 448, Ex = 478
+  33,	// 481 - 448, Ex = 481
+  37,	// 485 - 448, Ex = 485
+  40,	// 488 - 448, Ex = 488
+  43,	// 491 - 448, Ex = 491
+  47,	// 495 - 448, Ex = 495
+  50,	// 498 - 448, Ex = 498
+  53,	// 501 - 448, Ex = 501
+  57	// 505 - 448, Ex = 505
+};
+
+UINT64 half256[] = {
+  0x0000000000000004ULL,	// half / 2^256 = 4
+  0x0000000000000020ULL,	// half / 2^256 = 20
+  0x0000000000000100ULL,	// half / 2^256 = 100
+  0x0000000000001000ULL,	// half / 2^256 = 1000
+  0x0000000000008000ULL,	// half / 2^256 = 8000
+  0x0000000000040000ULL,	// half / 2^256 = 40000
+  0x0000000000400000ULL,	// half / 2^256 = 400000
+  0x0000000002000000ULL,	// half / 2^256 = 2000000
+  0x0000000010000000ULL,	// half / 2^256 = 10000000
+  0x0000000100000000ULL,	// half / 2^256 = 100000000
+  0x0000000800000000ULL,	// half / 2^256 = 800000000
+  0x0000004000000000ULL,	// half / 2^256 = 4000000000
+  0x0000040000000000ULL,	// half / 2^256 = 40000000000
+  0x0000200000000000ULL,	// half / 2^256 = 200000000000
+  0x0001000000000000ULL,	// half / 2^256 = 1000000000000
+  0x0010000000000000ULL,	// half / 2^256 = 10000000000000
+  0x0080000000000000ULL,	// half / 2^256 = 80000000000000
+  0x0400000000000000ULL,	// half / 2^256 = 400000000000000
+  0x4000000000000000ULL,	// half / 2^256 = 4000000000000000
+  0x0000000000000002ULL,	// half / 2^320 = 2
+  0x0000000000000010ULL,	// half / 2^320 = 10
+  0x0000000000000100ULL,	// half / 2^320 = 100
+  0x0000000000000800ULL,	// half / 2^320 = 800
+  0x0000000000004000ULL,	// half / 2^320 = 4000
+  0x0000000000040000ULL,	// half / 2^320 = 40000
+  0x0000000000200000ULL,	// half / 2^320 = 200000
+  0x0000000001000000ULL,	// half / 2^320 = 1000000
+  0x0000000010000000ULL,	// half / 2^320 = 10000000
+  0x0000000080000000ULL,	// half / 2^320 = 80000000
+  0x0000000400000000ULL,	// half / 2^320 = 400000000
+  0x0000002000000000ULL,	// half / 2^320 = 2000000000
+  0x0000020000000000ULL,	// half / 2^320 = 20000000000
+  0x0000100000000000ULL,	// half / 2^320 = 100000000000
+  0x0000800000000000ULL,	// half / 2^320 = 800000000000
+  0x0008000000000000ULL,	// half / 2^320 = 8000000000000
+  0x0040000000000000ULL,	// half / 2^320 = 40000000000000
+  0x0200000000000000ULL,	// half / 2^320 = 200000000000000
+  0x2000000000000000ULL,	// half / 2^320 = 2000000000000000
+  0x0000000000000001ULL,	// half / 2^384 = 1
+  0x0000000000000008ULL,	// half / 2^384 = 8
+  0x0000000000000080ULL,	// half / 2^384 = 80
+  0x0000000000000400ULL,	// half / 2^384 = 400
+  0x0000000000002000ULL,	// half / 2^384 = 2000
+  0x0000000000020000ULL,	// half / 2^384 = 20000
+  0x0000000000100000ULL,	// half / 2^384 = 100000
+  0x0000000000800000ULL,	// half / 2^384 = 800000
+  0x0000000008000000ULL,	// half / 2^384 = 8000000
+  0x0000000040000000ULL,	// half / 2^384 = 40000000
+  0x0000000200000000ULL,	// half / 2^384 = 200000000
+  0x0000002000000000ULL,	// half / 2^384 = 2000000000
+  0x0000010000000000ULL,	// half / 2^384 = 10000000000
+  0x0000080000000000ULL,	// half / 2^384 = 80000000000
+  0x0000800000000000ULL,	// half / 2^384 = 800000000000
+  0x0004000000000000ULL,	// half / 2^384 = 4000000000000
+  0x0020000000000000ULL,	// half / 2^384 = 20000000000000
+  0x0200000000000000ULL,	// half / 2^384 = 200000000000000
+  0x1000000000000000ULL,	// half / 2^384 = 1000000000000000
+  0x8000000000000000ULL,	// half / 2^384 = 8000000000000000
+  0x0000000000000004ULL,	// half / 2^448 = 4
+  0x0000000000000040ULL,	// half / 2^448 = 40
+  0x0000000000000200ULL,	// half / 2^448 = 200
+  0x0000000000001000ULL,	// half / 2^448 = 1000
+  0x0000000000010000ULL,	// half / 2^448 = 10000
+  0x0000000000080000ULL,	// half / 2^448 = 80000
+  0x0000000000400000ULL,	// half / 2^448 = 400000
+  0x0000000004000000ULL,	// half / 2^448 = 4000000
+  0x0000000020000000ULL,	// half / 2^448 = 20000000
+  0x0000000100000000ULL,	// half / 2^448 = 100000000
+  0x0000001000000000ULL,	// half / 2^448 = 1000000000
+  0x0000008000000000ULL,	// half / 2^448 = 8000000000
+  0x0000040000000000ULL,	// half / 2^448 = 40000000000
+  0x0000400000000000ULL,	// half / 2^448 = 400000000000
+  0x0002000000000000ULL,	// half / 2^448 = 2000000000000
+  0x0010000000000000ULL,	// half / 2^448 = 10000000000000
+  0x0100000000000000ULL	// half / 2^448 = 100000000000000
+};
+
+UINT64 mask256[] = {
+  0x0000000000000007ULL,	// mask / 2^256
+  0x000000000000003fULL,	// mask / 2^256
+  0x00000000000001ffULL,	// mask / 2^256
+  0x0000000000001fffULL,	// mask / 2^256
+  0x000000000000ffffULL,	// mask / 2^256
+  0x000000000007ffffULL,	// mask / 2^256
+  0x00000000007fffffULL,	// mask / 2^256
+  0x0000000003ffffffULL,	// mask / 2^256
+  0x000000001fffffffULL,	// mask / 2^256
+  0x00000001ffffffffULL,	// mask / 2^256
+  0x0000000fffffffffULL,	// mask / 2^256
+  0x0000007fffffffffULL,	// mask / 2^256
+  0x000007ffffffffffULL,	// mask / 2^256
+  0x00003fffffffffffULL,	// mask / 2^256
+  0x0001ffffffffffffULL,	// mask / 2^256
+  0x001fffffffffffffULL,	// mask / 2^256
+  0x00ffffffffffffffULL,	// mask / 2^256
+  0x07ffffffffffffffULL,	// mask / 2^256
+  0x7fffffffffffffffULL,	// mask / 2^256
+  0x0000000000000003ULL,	// mask / 2^320
+  0x000000000000001fULL,	// mask / 2^320
+  0x00000000000001ffULL,	// mask / 2^320
+  0x0000000000000fffULL,	// mask / 2^320
+  0x0000000000007fffULL,	// mask / 2^320
+  0x000000000007ffffULL,	// mask / 2^320
+  0x00000000003fffffULL,	// mask / 2^320
+  0x0000000001ffffffULL,	// mask / 2^320
+  0x000000001fffffffULL,	// mask / 2^320
+  0x00000000ffffffffULL,	// mask / 2^320
+  0x00000007ffffffffULL,	// mask / 2^320
+  0x0000003fffffffffULL,	// mask / 2^320
+  0x000003ffffffffffULL,	// mask / 2^320
+  0x00001fffffffffffULL,	// mask / 2^320
+  0x0000ffffffffffffULL,	// mask / 2^320
+  0x000fffffffffffffULL,	// mask / 2^320
+  0x007fffffffffffffULL,	// mask / 2^320
+  0x03ffffffffffffffULL,	// mask / 2^320
+  0x3fffffffffffffffULL,	// mask / 2^320
+  0x0000000000000001ULL,	// mask / 2^384
+  0x000000000000000fULL,	// mask / 2^384
+  0x00000000000000ffULL,	// mask / 2^384
+  0x00000000000007ffULL,	// mask / 2^384
+  0x0000000000003fffULL,	// mask / 2^384
+  0x000000000003ffffULL,	// mask / 2^384
+  0x00000000001fffffULL,	// mask / 2^384
+  0x0000000000ffffffULL,	// mask / 2^384
+  0x000000000fffffffULL,	// mask / 2^384
+  0x000000007fffffffULL,	// mask / 2^384
+  0x00000003ffffffffULL,	// mask / 2^384
+  0x0000003fffffffffULL,	// mask / 2^384
+  0x000001ffffffffffULL,	// mask / 2^384
+  0x00000fffffffffffULL,	// mask / 2^384
+  0x0000ffffffffffffULL,	// mask / 2^384
+  0x0007ffffffffffffULL,	// mask / 2^384
+  0x003fffffffffffffULL,	// mask / 2^384
+  0x03ffffffffffffffULL,	// mask / 2^384
+  0x1fffffffffffffffULL,	// mask / 2^384
+  0xffffffffffffffffULL,	// mask / 2^384
+  0x0000000000000007ULL,	// mask / 2^448
+  0x000000000000007fULL,	// mask / 2^448
+  0x00000000000003ffULL,	// mask / 2^448
+  0x0000000000001fffULL,	// mask / 2^448
+  0x000000000001ffffULL,	// mask / 2^448
+  0x00000000000fffffULL,	// mask / 2^448
+  0x00000000007fffffULL,	// mask / 2^448
+  0x0000000007ffffffULL,	// mask / 2^448
+  0x000000003fffffffULL,	// mask / 2^448
+  0x00000001ffffffffULL,	// mask / 2^448
+  0x0000001fffffffffULL,	// mask / 2^448
+  0x000000ffffffffffULL,	// mask / 2^448
+  0x000007ffffffffffULL,	// mask / 2^448
+  0x00007fffffffffffULL,	// mask / 2^448
+  0x0003ffffffffffffULL,	// mask / 2^448
+  0x001fffffffffffffULL,	// mask / 2^448
+  0x01ffffffffffffffULL	// mask / 2^448
+};
+
+UINT256 ten2mxtrunc256[] = {
+  {{0xccccccccccccccccULL, 0xccccccccccccccccULL,
+    0xccccccccccccccccULL, 0xccccccccccccccccULL}},
+  // (ten2mx >> 256) = cccccccccccccccc  cccccccccccccccc   
+  //   cccccccccccccccccccccccccccccccc
+  {{0x70a3d70a3d70a3d7ULL, 0xd70a3d70a3d70a3dULL,
+    0x3d70a3d70a3d70a3ULL, 0xa3d70a3d70a3d70aULL}},
+  // (ten2mx >> 256) = a3d70a3d70a3d70a  3d70a3d70a3d70a3   
+  //   d70a3d70a3d70a3d70a3d70a3d70a3d7
+  {{0xc083126e978d4fdfULL, 0x78d4fdf3b645a1caULL,
+    0x645a1cac083126e9ULL, 0x83126e978d4fdf3bULL}},
+  // (ten2mx >> 256) = 83126e978d4fdf3b  645a1cac083126e9   
+  //   78d4fdf3b645a1cac083126e978d4fdf
+  {{0x67381d7dbf487fcbULL, 0xc154c985f06f6944ULL,
+    0xd3c36113404ea4a8ULL, 0xd1b71758e219652bULL}},
+  // (ten2mx >> 256) = d1b71758e219652b  d3c36113404ea4a8   
+  //   c154c985f06f694467381d7dbf487fcb
+  {{0x85c67dfe32a0663cULL, 0xcddd6e04c0592103ULL,
+    0x0fcf80dc33721d53ULL, 0xa7c5ac471b478423ULL}},
+  // (ten2mx >> 256) = a7c5ac471b478423  fcf80dc33721d53   
+  //   cddd6e04c059210385c67dfe32a0663c
+  {{0x37d1fe64f54d1e96ULL, 0xd7e45803cd141a69ULL,
+    0xa63f9a49c2c1b10fULL, 0x8637bd05af6c69b5ULL}},
+  // (ten2mx >> 256) = 8637bd05af6c69b5  a63f9a49c2c1b10f   
+  //   d7e45803cd141a6937d1fe64f54d1e96
+  {{0x8c8330a1887b6424ULL, 0x8ca08cd2e1b9c3dbULL,
+    0x3d32907604691b4cULL, 0xd6bf94d5e57a42bcULL}},
+  // (ten2mx >> 256) = d6bf94d5e57a42bc  3d32907604691b4c   
+  //   8ca08cd2e1b9c3db8c8330a1887b6424
+  {{0x7068f3b46d2f8350ULL, 0x3d4d3d758161697cULL,
+    0xfdc20d2b36ba7c3dULL, 0xabcc77118461cefcULL}},
+  // (ten2mx >> 256) = abcc77118461cefc  fdc20d2b36ba7c3d   
+  //   3d4d3d758161697c7068f3b46d2f8350
+  {{0xf387295d242602a6ULL, 0xfdd7645e011abac9ULL,
+    0x31680a88f8953030ULL, 0x89705f4136b4a597ULL}},
+  // (ten2mx >> 256) = 89705f4136b4a597  31680a88f8953030   
+  //   fdd7645e011abac9f387295d242602a6
+  {{0xb8d8422ea03cd10aULL, 0x2fbf06fcce912adcULL,
+    0xb573440e5a884d1bULL, 0xdbe6fecebdedd5beULL}},
+  // (ten2mx >> 256) = dbe6fecebdedd5be  b573440e5a884d1b   
+  //   2fbf06fcce912adcb8d8422ea03cd10a
+  {{0x93e034f219ca40d5ULL, 0xf2ff38ca3eda88b0ULL,
+    0xf78f69a51539d748ULL, 0xafebff0bcb24aafeULL}},
+  // (ten2mx >> 256) = afebff0bcb24aafe  f78f69a51539d748   
+  //   f2ff38ca3eda88b093e034f219ca40d5
+  {{0x4319c3f4e16e9a44ULL, 0xf598fa3b657ba08dULL,
+    0xf93f87b7442e45d3ULL, 0x8cbccc096f5088cbULL}},
+  // (ten2mx >> 256) = 8cbccc096f5088cb  f93f87b7442e45d3   
+  //   f598fa3b657ba08d4319c3f4e16e9a44
+  {{0x04f606549be42a06ULL, 0x88f4c3923bf900e2ULL,
+    0x2865a5f206b06fb9ULL, 0xe12e13424bb40e13ULL}},
+  // (ten2mx >> 256) = e12e13424bb40e13  2865a5f206b06fb9   
+  //   88f4c3923bf900e204f606549be42a06
+  {{0x03f805107cb68805ULL, 0x6d909c74fcc733e8ULL,
+    0x538484c19ef38c94ULL, 0xb424dc35095cd80fULL}},
+  // (ten2mx >> 256) = b424dc35095cd80f  538484c19ef38c94   
+  //   6d909c74fcc733e803f805107cb68805
+  {{0x3660040d3092066aULL, 0x57a6e390ca38f653ULL,
+    0x0f9d37014bf60a10ULL, 0x901d7cf73ab0acd9ULL}},
+  // (ten2mx >> 256) = 901d7cf73ab0acd9  f9d37014bf60a10   
+  //   57a6e390ca38f6533660040d3092066a
+  {{0x23ccd3484db670aaULL, 0xbf716c1add27f085ULL,
+    0x4c2ebe687989a9b3ULL, 0xe69594bec44de15bULL}},
+  // (ten2mx >> 256) = e69594bec44de15b  4c2ebe687989a9b3   
+  //   bf716c1add27f08523ccd3484db670aa
+  {{0x4fd70f6d0af85a22ULL, 0xff8df0157db98d37ULL,
+    0x09befeb9fad487c2ULL, 0xb877aa3236a4b449ULL}},
+  // (ten2mx >> 256) = b877aa3236a4b449  9befeb9fad487c2   
+  //   ff8df0157db98d374fd70f6d0af85a22
+  {{0x0cac0c573bf9e1b5ULL, 0x32d7f344649470f9ULL,
+    0x3aff322e62439fcfULL, 0x9392ee8e921d5d07ULL}},
+  // (ten2mx >> 256) = 9392ee8e921d5d07  3aff322e62439fcf   
+  //   32d7f344649470f90cac0c573bf9e1b5
+  {{0xe11346f1f98fcf88ULL, 0x1e2652070753e7f4ULL,
+    0x2b31e9e3d06c32e5ULL, 0xec1e4a7db69561a5ULL}},
+  // (ten2mx >> 256) = ec1e4a7db69561a5  2b31e9e3d06c32e5   
+  //   1e2652070753e7f4e11346f1f98fcf88
+  {{0x4da9058e613fd939ULL, 0x181ea8059f76532aULL,
+    0x88f4bb1ca6bcf584ULL, 0xbce5086492111aeaULL}},
+  // (ten2mx >> 256) = bce5086492111aea  88f4bb1ca6bcf584   
+  //   181ea8059f76532a4da9058e613fd939
+  {{0xa48737a51a997a94ULL, 0x467eecd14c5ea8eeULL,
+    0xd3f6fc16ebca5e03ULL, 0x971da05074da7beeULL}},
+  // (ten2mx >> 256) = 971da05074da7bee  d3f6fc16ebca5e03   
+  //   467eecd14c5ea8eea48737a51a997a94
+  {{0x3a71f2a1c428c420ULL, 0x70cb148213caa7e4ULL,
+    0x5324c68b12dd6338ULL, 0xf1c90080baf72cb1ULL}},
+  // (ten2mx >> 256) = f1c90080baf72cb1  5324c68b12dd6338   
+  //   70cb148213caa7e43a71f2a1c428c420
+  {{0x2ec18ee7d0209ce7ULL, 0x8d6f439b43088650ULL,
+    0x75b7053c0f178293ULL, 0xc16d9a0095928a27ULL}},
+  // (ten2mx >> 256) = c16d9a0095928a27  75b7053c0f178293   
+  //   8d6f439b430886502ec18ee7d0209ce7
+  {{0xf23472530ce6e3ecULL, 0xd78c3615cf3a050cULL,
+    0xc4926a9672793542ULL, 0x9abe14cd44753b52ULL}},
+  // (ten2mx >> 256) = 9abe14cd44753b52  c4926a9672793542   
+  //   d78c3615cf3a050cf23472530ce6e3ec
+  {{0xe9ed83b814a49fe0ULL, 0x8c1389bc7ec33b47ULL,
+    0x3a83ddbd83f52204ULL, 0xf79687aed3eec551ULL}},
+  // (ten2mx >> 256) = f79687aed3eec551  3a83ddbd83f52204   
+  //   8c1389bc7ec33b47e9ed83b814a49fe0
+  {{0x87f1362cdd507fe6ULL, 0x3cdc6e306568fc39ULL,
+    0x95364afe032a819dULL, 0xc612062576589ddaULL}},
+  // (ten2mx >> 256) = c612062576589dda  95364afe032a819d   
+  //   3cdc6e306568fc3987f1362cdd507fe6
+  {{0x9ff42b5717739985ULL, 0xca49f1c05120c9c7ULL,
+    0x775ea264cf55347dULL, 0x9e74d1b791e07e48ULL}},
+  // (ten2mx >> 256) = 9e74d1b791e07e48  775ea264cf55347d   
+  //   ca49f1c05120c9c79ff42b5717739985
+  {{0xccb9def1bf1f5c08ULL, 0x76dcb60081ce0fa5ULL,
+    0x8bca9d6e188853fcULL, 0xfd87b5f28300ca0dULL}},
+  // (ten2mx >> 256) = fd87b5f28300ca0d  8bca9d6e188853fc   
+  //   76dcb60081ce0fa5ccb9def1bf1f5c08
+  {{0xa3c7e58e327f7cd3ULL, 0x5f16f80067d80c84ULL,
+    0x096ee45813a04330ULL, 0xcad2f7f5359a3b3eULL}},
+  // (ten2mx >> 256) = cad2f7f5359a3b3e  96ee45813a04330   
+  //   5f16f80067d80c84a3c7e58e327f7cd3
+  {{0xb6398471c1ff970fULL, 0x18df2ccd1fe00a03ULL,
+    0xa1258379a94d028dULL, 0xa2425ff75e14fc31ULL}},
+  // (ten2mx >> 256) = a2425ff75e14fc31  a1258379a94d028d   
+  //   18df2ccd1fe00a03b6398471c1ff970f
+  {{0xf82e038e34cc78d9ULL, 0x4718f0a419800802ULL,
+    0x80eacf948770ced7ULL, 0x81ceb32c4b43fcf4ULL}},
+  // (ten2mx >> 256) = 81ceb32c4b43fcf4  80eacf948770ced7   
+  //   4718f0a419800802f82e038e34cc78d9
+  {{0x59e338e387ad8e28ULL, 0x0b5b1aa028ccd99eULL,
+    0x67de18eda5814af2ULL, 0xcfb11ead453994baULL}},
+  // (ten2mx >> 256) = cfb11ead453994ba  67de18eda5814af2   
+  //   b5b1aa028ccd99e59e338e387ad8e28
+  {{0x47e8fa4f9fbe0b53ULL, 0x6f7c154ced70ae18ULL,
+    0xecb1ad8aeacdd58eULL, 0xa6274bbdd0fadd61ULL}},
+  // (ten2mx >> 256) = a6274bbdd0fadd61  ecb1ad8aeacdd58e   
+  //   6f7c154ced70ae1847e8fa4f9fbe0b53
+  {{0xd320c83fb2fe6f75ULL, 0xbf967770bdf3be79ULL,
+    0xbd5af13bef0b113eULL, 0x84ec3c97da624ab4ULL}},
+  // (ten2mx >> 256) = 84ec3c97da624ab4  bd5af13bef0b113e   
+  //   bf967770bdf3be79d320c83fb2fe6f75
+  {{0x85014065eb30b256ULL, 0x65bd8be79652ca5cULL,
+    0x955e4ec64b44e864ULL, 0xd4ad2dbfc3d07787ULL}},
+  // (ten2mx >> 256) = d4ad2dbfc3d07787  955e4ec64b44e864   
+  //   65bd8be79652ca5c85014065eb30b256
+  {{0xd0cdcd1e55c08eabULL, 0xeafe098611dbd516ULL,
+    0xdde50bd1d5d0b9e9ULL, 0xaa242499697392d2ULL}},
+  // (ten2mx >> 256) = aa242499697392d2  dde50bd1d5d0b9e9   
+  //   eafe098611dbd516d0cdcd1e55c08eab
+  {{0x40a4a418449a0bbcULL, 0xbbfe6e04db164412ULL,
+    0x7e50d64177da2e54ULL, 0x881cea14545c7575ULL}},
+  // (ten2mx >> 256) = 881cea14545c7575  7e50d64177da2e54   
+  //   bbfe6e04db16441240a4a418449a0bbc
+  {{0x9aa1068d3a9012c7ULL, 0x2cca49a15e8a0683ULL,
+    0x96e7bd358c904a21ULL, 0xd9c7dced53c72255ULL}},
+  // (ten2mx >> 256) = d9c7dced53c72255  96e7bd358c904a21   
+  //   2cca49a15e8a06839aa1068d3a9012c7
+  {{0x154d9ed7620cdbd2ULL, 0x8a3b6e1ab2080536ULL,
+    0xabec975e0a0d081aULL, 0xae397d8aa96c1b77ULL}},
+  // (ten2mx >> 256) = ae397d8aa96c1b77  abec975e0a0d081a   
+  //   8a3b6e1ab2080536154d9ed7620cdbd2
+  {{0x443e18ac4e70afdbULL, 0x3b62be7bc1a0042bULL,
+    0x2323ac4b3b3da015ULL, 0x8b61313bbabce2c6ULL}},
+  // (ten2mx >> 256) = 8b61313bbabce2c6  2323ac4b3b3da015   
+  //   3b62be7bc1a0042b443e18ac4e70afdb
+  {{0x6d30277a171ab2f8ULL, 0x5f0463f935ccd378ULL,
+    0x6b6c46dec52f6688ULL, 0xdf01e85f912e37a3ULL}},
+  // (ten2mx >> 256) = df01e85f912e37a3  6b6c46dec52f6688   
+  //   5f0463f935ccd3786d30277a171ab2f8
+  {{0x8a8cec61ac155bfaULL, 0x7f36b660f7d70f93ULL,
+    0x55f038b237591ed3ULL, 0xb267ed1940f1c61cULL}},
+  // (ten2mx >> 256) = b267ed1940f1c61c  55f038b237591ed3   
+  //   7f36b660f7d70f938a8cec61ac155bfa
+  {{0x3ba3f04e23444995ULL, 0xcc2bc51a5fdf3fa9ULL,
+    0x77f3608e92adb242ULL, 0x8eb98a7a9a5b04e3ULL}},
+  // (ten2mx >> 256) = 8eb98a7a9a5b04e3  77f3608e92adb242   
+  //   cc2bc51a5fdf3fa93ba3f04e23444995
+  {{0xf9064d49d206dc21ULL, 0xe046082a32fecc41ULL,
+    0x8cb89a7db77c506aULL, 0xe45c10c42a2b3b05ULL}},
+  // (ten2mx >> 256) = e45c10c42a2b3b05  8cb89a7db77c506a   
+  //   e046082a32fecc41f9064d49d206dc21
+  {{0xfa6b7107db38b01aULL, 0x4d04d354f598a367ULL,
+    0x3d607b97c5fd0d22ULL, 0xb6b00d69bb55c8d1ULL}},
+  // (ten2mx >> 256) = b6b00d69bb55c8d1  3d607b97c5fd0d22   
+  //   4d04d354f598a367fa6b7107db38b01a
+  {{0xfb8927397c2d59afULL, 0x3d9d75dd9146e91fULL,
+    0xcab3961304ca70e8ULL, 0x9226712162ab070dULL}},
+  // (ten2mx >> 256) = 9226712162ab070d  cab3961304ca70e8   
+  //   3d9d75dd9146e91ffb8927397c2d59af
+  {{0xf8db71f5937bc2b1ULL, 0xc8fbefc8e87174ffULL,
+    0xaab8f01e6e10b4a6ULL, 0xe9d71b689dde71afULL}},
+  // (ten2mx >> 256) = e9d71b689dde71af  aab8f01e6e10b4a6   
+  //   c8fbefc8e87174fff8db71f5937bc2b1
+  {{0x2d7c5b2adc630227ULL, 0x3a63263a538df733ULL,
+    0x5560c018580d5d52ULL, 0xbb127c53b17ec159ULL}},
+  // (ten2mx >> 256) = bb127c53b17ec159  5560c018580d5d52   
+  //   3a63263a538df7332d7c5b2adc630227
+  {{0x24637c2249e8ce86ULL, 0x2eb5b82ea93e5f5cULL,
+    0xdde7001379a44aa8ULL, 0x95a8637627989aadULL}},
+  // (ten2mx >> 256) = 95a8637627989aad  dde7001379a44aa8   
+  //   2eb5b82ea93e5f5c24637c2249e8ce86
+  {{0x3a38c69d430e173dULL, 0x4abc59e441fd6560ULL,
+    0x963e66858f6d4440ULL, 0xef73d256a5c0f77cULL}},
+  // (ten2mx >> 256) = ef73d256a5c0f77c  963e66858f6d4440   
+  //   4abc59e441fd65603a38c69d430e173d
+  {{0x94fa387dcf3e78fdULL, 0x6efd14b69b311de6ULL,
+    0xde98520472bdd033ULL, 0xbf8fdb78849a5f96ULL}},
+  // (ten2mx >> 256) = bf8fdb78849a5f96  de98520472bdd033   
+  //   6efd14b69b311de694fa387dcf3e78fd
+  {{0xaa61c6cb0c31fa64ULL, 0x259743c548f417ebULL,
+    0xe546a8038efe4029ULL, 0x993fe2c6d07b7fabULL}},
+  // (ten2mx >> 256) = 993fe2c6d07b7fab  e546a8038efe4029   
+  //   259743c548f417ebaa61c6cb0c31fa64
+  {{0xaa360ade79e990a1ULL, 0x3c25393ba7ecf312ULL,
+    0xd53dd99f4b3066a8ULL, 0xf53304714d9265dfULL}},
+  // (ten2mx >> 256) = f53304714d9265df  d53dd99f4b3066a8   
+  //   3c25393ba7ecf312aa360ade79e990a1
+  {{0x882b3be52e5473b4ULL, 0x96842dc95323f5a8ULL,
+    0xaa97e14c3c26b886ULL, 0xc428d05aa4751e4cULL}},
+  // (ten2mx >> 256) = c428d05aa4751e4c  aa97e14c3c26b886   
+  //   96842dc95323f5a8882b3be52e5473b4
+  {{0xd355c98425105c90ULL, 0xab9cf16ddc1cc486ULL,
+    0x55464dd69685606bULL, 0x9ced737bb6c4183dULL}},
+  // (ten2mx >> 256) = 9ced737bb6c4183d  55464dd69685606b   
+  //   ab9cf16ddc1cc486d355c98425105c90
+  {{0xebbc75a03b4d60e6ULL, 0xac2e4f162cfad40aULL,
+    0xeed6e2f0f0d56712ULL, 0xfb158592be068d2eULL}},
+  // (ten2mx >> 256) = fb158592be068d2e  eed6e2f0f0d56712   
+  //   ac2e4f162cfad40aebbc75a03b4d60e6
+  {{0x8963914cfc3de71eULL, 0x568b727823fbdcd5ULL,
+    0xf245825a5a445275ULL, 0xc8de047564d20a8bULL}},
+  // (ten2mx >> 256) = c8de047564d20a8b  f245825a5a445275   
+  //   568b727823fbdcd58963914cfc3de71e
+  {{0xd44fa770c9cb1f4bULL, 0x453c5b934ffcb0aaULL,
+    0x5b6aceaeae9d0ec4ULL, 0xa0b19d2ab70e6ed6ULL}},
+  // (ten2mx >> 256) = a0b19d2ab70e6ed6  5b6aceaeae9d0ec4   
+  //   453c5b934ffcb0aad44fa770c9cb1f4b
+  {{0xdd0c85f3d4a27f6fULL, 0x37637c75d996f3bbULL,
+    0xe2bbd88bbee40bd0ULL, 0x808e17555f3ebf11ULL}},
+  // (ten2mx >> 256) = 808e17555f3ebf11  e2bbd88bbee40bd0   
+  //   37637c75d996f3bbdd0c85f3d4a27f6f
+  {{0x61ada31fba9d98b2ULL, 0x256bfa5628f185f9ULL,
+    0x3792f412cb06794dULL, 0xcdb02555653131b6ULL}},
+  // (ten2mx >> 256) = cdb02555653131b6  3792f412cb06794d   
+  //   256bfa5628f185f961ada31fba9d98b2
+  {{0xe7be1c196217ad5bULL, 0x51232eab53f46b2dULL,
+    0x5fa8c3423c052dd7ULL, 0xa48ceaaab75a8e2bULL}},
+  // (ten2mx >> 256) = a48ceaaab75a8e2b  5fa8c3423c052dd7   
+  //   51232eab53f46b2de7be1c196217ad5b
+  {{0x52fe7ce11b462449ULL, 0x40e8f222a99055beULL,
+    0x1953cf68300424acULL, 0x83a3eeeef9153e89ULL}},
+  // (ten2mx >> 256) = 83a3eeeef9153e89  1953cf68300424ac   
+  //   40e8f222a99055be52fe7ce11b462449
+  {{0x51972e34f8703a0fULL, 0x34a7e9d10f4d55fdULL,
+    0x8eec7f0d19a03aadULL, 0xd29fe4b18e88640eULL}},
+  // (ten2mx >> 256) = d29fe4b18e88640e  8eec7f0d19a03aad   
+  //   34a7e9d10f4d55fd51972e34f8703a0f
+  {{0x0e128b5d938cfb3fULL, 0x2a1fee40d90aab31ULL,
+    0x3f2398d747b36224ULL, 0xa87fea27a539e9a5ULL}},
+  // (ten2mx >> 256) = a87fea27a539e9a5  3f2398d747b36224   
+  //   2a1fee40d90aab310e128b5d938cfb3f
+  {{0x3e753c4adc70c8ffULL, 0xbb4cbe9a473bbc27ULL,
+    0x98e947129fc2b4e9ULL, 0x86ccbb52ea94baeaULL}},
+  // (ten2mx >> 256) = 86ccbb52ea94baea  98e947129fc2b4e9   
+  //   bb4cbe9a473bbc273e753c4adc70c8ff
+  {{0x30bb93aafa4e0e65ULL, 0x9214642a0b92c6a5ULL,
+    0x5b0ed81dcc6abb0fULL, 0xd7adf884aa879177ULL}},
+  // (ten2mx >> 256) = d7adf884aa879177  5b0ed81dcc6abb0f   
+  //   9214642a0b92c6a530bb93aafa4e0e65
+  {{0xc0960fbbfb71a51eULL, 0xa8105021a2dbd21dULL,
+    0xe272467e3d222f3fULL, 0xac8b2d36eed2dac5ULL}},
+  // (ten2mx >> 256) = ac8b2d36eed2dac5  e272467e3d222f3f   
+  //   a8105021a2dbd21dc0960fbbfb71a51e
+  {{0x66de72fcc927b74bULL, 0xb9a6a6814f1641b1ULL,
+    0x1b8e9ecb641b58ffULL, 0x8a08f0f8bf0f156bULL}},
+  // (ten2mx >> 256) = 8a08f0f8bf0f156b  1b8e9ecb641b58ff   
+  //   b9a6a6814f1641b166de72fcc927b74b
+  {{0xd7ca5194750c5878ULL, 0xf5d770cee4f0691bULL,
+    0xf8e431456cf88e65ULL, 0xdcdb1b2798182244ULL}},
+  // (ten2mx >> 256) = dcdb1b2798182244  f8e431456cf88e65   
+  //   f5d770cee4f0691bd7ca5194750c5878
+  {{0xdfd50e105da379f9ULL, 0x9179270bea59edafULL,
+    0x2d835a9df0c6d851ULL, 0xb0af48ec79ace837ULL}},
+  // (ten2mx >> 256) = b0af48ec79ace837  2d835a9df0c6d851   
+  //   9179270bea59edafdfd50e105da379f9
+  {{0x19773e737e1c6194ULL, 0x0dfa85a321e18af3ULL,
+    0x579c487e5a38ad0eULL, 0x8d590723948a535fULL}},
+  // (ten2mx >> 256) = 8d590723948a535f  579c487e5a38ad0e   
+  //   dfa85a321e18af319773e737e1c6194
+  {{0xf58b971f302d68eeULL, 0x165da29e9c9c1184ULL,
+    0x25c6da63c38de1b0ULL, 0xe2280b6c20dd5232ULL}},
+  // (ten2mx >> 256) = e2280b6c20dd5232  25c6da63c38de1b0   
+  //   165da29e9c9c1184f58b971f302d68ee
+  {{0xc46fac18f3578724ULL, 0x4517b54bb07cdad0ULL,
+    0x1e38aeb6360b1af3ULL, 0xb4ecd5f01a4aa828ULL}},
+  // (ten2mx >> 256) = b4ecd5f01a4aa828  1e38aeb6360b1af3   
+  //   4517b54bb07cdad0c46fac18f3578724
+  {{0x36bfbce0c2ac6c1dULL, 0x9dac910959fd7bdaULL,
+    0xb1c6f22b5e6f48c2ULL, 0x90bd77f3483bb9b9ULL}},
+  // (ten2mx >> 256) = 90bd77f3483bb9b9  b1c6f22b5e6f48c2   
+  //   9dac910959fd7bda36bfbce0c2ac6c1d
+  {{0x2465fb01377a4695ULL, 0x2f7a81a88ffbf95dULL,
+    0xb60b1d1230b20e04ULL, 0xe7958cb87392c2c2ULL}}
+  // (ten2mx >> 256) = e7958cb87392c2c2  b60b1d1230b20e04   
+  //   2f7a81a88ffbf95d2465fb01377a4695
+};
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_2_str.h b/gcc-4.9/libgcc/config/libbid/bid128_2_str.h
new file mode 100644
index 000000000..c5bc8dc5e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_2_str.h
@@ -0,0 +1,33 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+extern UINT64 Twoto60_m_10to18;
+extern UINT64 Twoto60;
+extern UINT64 Inv_Tento9;
+extern UINT32 Twoto30_m_10to9;
+extern UINT32 Tento9;
+extern UINT32 Tento6;
+extern UINT32 Tento3;
+
+extern char midi_tbl[1000][3];
+extern UINT64 mod10_18_tbl[9][128];
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_2_str_macros.h b/gcc-4.9/libgcc/config/libbid/bid128_2_str_macros.h
new file mode 100644
index 000000000..615db51a9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_2_str_macros.h
@@ -0,0 +1,149 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define __L0_Normalize_10to18( X_hi, X_lo )            \
+{                                                      \
+UINT64 L0_tmp;                                         \
+L0_tmp = (X_lo) + Twoto60_m_10to18;                    \
+if (L0_tmp & Twoto60)                                  \
+ {(X_hi)=(X_hi)+1;(X_lo)=((L0_tmp<<4)>>4);}            \
+}
+
+
+#define __L0_Normalize_10to9( X_hi, X_lo )             \
+{                                                      \
+UINT32 L0_tmp;                                         \
+L0_tmp = (X_lo) + Twoto30_m_10to9;                     \
+if (L0_tmp & 0x40000000)                               \
+ {(X_hi)=(X_hi)+1;(X_lo)=((L0_tmp<<2)>>2);}            \
+}
+
+
+#define __L0_Split_MiDi_2( X, ptr )                    \
+{                                                      \
+UINT32 L0_head, L0_tail, L0_tmp;                       \
+ L0_head = (X) >> 10;                                  \
+ L0_tail = ((X)&(0x03FF))+(L0_head<<5)-(L0_head<<3);   \
+ L0_tmp  = (L0_tail)>>10; L0_head += L0_tmp;           \
+ L0_tail = (L0_tail&(0x03FF))+(L0_tmp<<5)-(L0_tmp<<3); \
+ if (L0_tail > 999){L0_tail -= 1000; L0_head += 1;}    \
+ *((ptr)++) = L0_head; *((ptr)++) = L0_tail;           \
+}
+
+
+#define __L0_Split_MiDi_3( X, ptr )                    \
+{                                                      \
+UINT32 L0_X, L0_head, L0_mid, L0_tail, L0_tmp;         \
+ L0_X    = (UINT32)((X));                              \
+ L0_head = ((L0_X>>17)*34359)>>18;                     \
+ L0_X   -= L0_head*1000000;                            \
+ if (L0_X >= 1000000){L0_X -= 1000000;L0_head+=1;}     \
+ L0_mid  = L0_X >> 10;                                 \
+ L0_tail = (L0_X & (0x03FF))+(L0_mid<<5)-(L0_mid<<3);  \
+ L0_tmp  = (L0_tail)>>10; L0_mid += L0_tmp;            \
+ L0_tail = (L0_tail&(0x3FF))+(L0_tmp<<5)-(L0_tmp<<3);  \
+ if (L0_tail>999){L0_tail-=1000;L0_mid+=1;}            \
+ *((ptr)++)=L0_head;*((ptr)++)=L0_mid;                 \
+ *((ptr)++)=L0_tail;                                   \
+}
+
+#define __L1_Split_MiDi_6( X, ptr )                    \
+{                                                      \
+UINT32 L1_X_hi, L1_X_lo;                               \
+UINT64 L1_Xhi_64, L1_Xlo_64;                           \
+L1_Xhi_64 = ( ((X)>>28)*Inv_Tento9 ) >> 33;            \
+L1_Xlo_64 = (X) - L1_Xhi_64*(UINT64)Tento9;            \
+if (L1_Xlo_64 >= (UINT64)Tento9)                       \
+ {L1_Xlo_64-=(UINT64)Tento9;L1_Xhi_64+=1;}             \
+L1_X_hi=(UINT32)L1_Xhi_64; L1_X_lo=(UINT32)L1_Xlo_64;  \
+__L0_Split_MiDi_3(L1_X_hi,(ptr));                      \
+__L0_Split_MiDi_3(L1_X_lo,(ptr));                      \
+}
+
+#define __L1_Split_MiDi_6_Lead( X, ptr )               \
+{                                                      \
+UINT32 L1_X_hi, L1_X_lo;                               \
+UINT64 L1_Xhi_64, L1_Xlo_64;                           \
+if ((X)>=(UINT64)Tento9){                              \
+  L1_Xhi_64 = ( ((X)>>28)*Inv_Tento9 ) >> 33;          \
+  L1_Xlo_64 = (X) - L1_Xhi_64*(UINT64)Tento9;          \
+  if (L1_Xlo_64 >= (UINT64)Tento9)                     \
+   {L1_Xlo_64-=(UINT64)Tento9;L1_Xhi_64+=1;}           \
+  L1_X_hi=(UINT32)L1_Xhi_64;                           \
+  L1_X_lo=(UINT32)L1_Xlo_64;                           \
+  if (L1_X_hi>=Tento6){                                \
+     __L0_Split_MiDi_3(L1_X_hi,(ptr));                 \
+     __L0_Split_MiDi_3(L1_X_lo,(ptr));                 \
+  }                                                    \
+  else if (L1_X_hi>=Tento3){                           \
+     __L0_Split_MiDi_2(L1_X_hi,(ptr));                 \
+     __L0_Split_MiDi_3(L1_X_lo,(ptr));                 \
+  }                                                    \
+  else {                                               \
+       *((ptr)++) = L1_X_hi;                           \
+       __L0_Split_MiDi_3(L1_X_lo,(ptr));               \
+  }                                                    \
+}                                                      \
+else {                                                 \
+  L1_X_lo = (UINT32)(X);                               \
+  if (L1_X_lo>=Tento6){                                \
+     __L0_Split_MiDi_3(L1_X_lo,(ptr));                 \
+  }                                                    \
+  else if (L1_X_lo>=Tento3){                           \
+     __L0_Split_MiDi_2(L1_X_lo,(ptr));                 \
+  }                                                    \
+  else {                                               \
+       *((ptr)++) = L1_X_lo;                           \
+  }                                                    \
+}                                                      \
+}
+
+
+#define __L0_MiDi2Str( X, c_ptr )              \
+{                                              \
+char *L0_src;                                  \
+ L0_src = midi_tbl[(X)];                       \
+ *((c_ptr)++) = *(L0_src++);                   \
+ *((c_ptr)++) = *(L0_src++);                   \
+ *((c_ptr)++) = *(L0_src);                     \
+}
+
+#define __L0_MiDi2Str_Lead( X, c_ptr )         \
+{                                              \
+char *L0_src;                                  \
+ L0_src = midi_tbl[(X)];                       \
+ if ((X)>=100){                                \
+ *((c_ptr)++) = *(L0_src++);                   \
+ *((c_ptr)++) = *(L0_src++);                   \
+ *((c_ptr)++) = *(L0_src);                     \
+ }                                             \
+ else if ((X)>=10){                            \
+ L0_src++;                                     \
+ *((c_ptr)++) = *(L0_src++);                   \
+ *((c_ptr)++) = *(L0_src);                     \
+ }                                             \
+ else {                                        \
+ L0_src++;L0_src++;                            \
+ *((c_ptr)++) = *(L0_src);                     \
+}                                              \
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_2_str_tables.c b/gcc-4.9/libgcc/config/libbid/bid128_2_str_tables.c
new file mode 100644
index 000000000..8d7252b85
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_2_str_tables.c
@@ -0,0 +1,642 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+UINT64 Twoto60_m_10to18 = 152921504606846976LL;
+UINT64 Twoto60 = 0x1000000000000000LL;
+UINT64 Inv_Tento9 = 2305843009LL;	/* floor(2^61/10^9) */
+UINT32 Twoto30_m_10to9 = 73741824;
+UINT32 Tento9 = 1000000000;
+UINT32 Tento6 = 1000000;
+UINT32 Tento3 = 1000;
+
+const char midi_tbl[1000][3] = {
+  "000", "001", "002", "003", "004", "005", "006", "007", "008", "009",
+  "010", "011", "012", "013", "014", "015", "016", "017", "018", "019",
+  "020", "021", "022", "023", "024", "025", "026", "027", "028", "029",
+  "030", "031", "032", "033", "034", "035", "036", "037", "038", "039",
+  "040", "041", "042", "043", "044", "045", "046", "047", "048", "049",
+  "050", "051", "052", "053", "054", "055", "056", "057", "058", "059",
+  "060", "061", "062", "063", "064", "065", "066", "067", "068", "069",
+  "070", "071", "072", "073", "074", "075", "076", "077", "078", "079",
+  "080", "081", "082", "083", "084", "085", "086", "087", "088", "089",
+  "090", "091", "092", "093", "094", "095", "096", "097", "098", "099",
+  "100", "101", "102", "103", "104", "105", "106", "107", "108", "109",
+  "110", "111", "112", "113", "114", "115", "116", "117", "118", "119",
+  "120", "121", "122", "123", "124", "125", "126", "127", "128", "129",
+  "130", "131", "132", "133", "134", "135", "136", "137", "138", "139",
+  "140", "141", "142", "143", "144", "145", "146", "147", "148", "149",
+  "150", "151", "152", "153", "154", "155", "156", "157", "158", "159",
+  "160", "161", "162", "163", "164", "165", "166", "167", "168", "169",
+  "170", "171", "172", "173", "174", "175", "176", "177", "178", "179",
+  "180", "181", "182", "183", "184", "185", "186", "187", "188", "189",
+  "190", "191", "192", "193", "194", "195", "196", "197", "198", "199",
+  "200", "201", "202", "203", "204", "205", "206", "207", "208", "209",
+  "210", "211", "212", "213", "214", "215", "216", "217", "218", "219",
+  "220", "221", "222", "223", "224", "225", "226", "227", "228", "229",
+  "230", "231", "232", "233", "234", "235", "236", "237", "238", "239",
+  "240", "241", "242", "243", "244", "245", "246", "247", "248", "249",
+  "250", "251", "252", "253", "254", "255", "256", "257", "258", "259",
+  "260", "261", "262", "263", "264", "265", "266", "267", "268", "269",
+  "270", "271", "272", "273", "274", "275", "276", "277", "278", "279",
+  "280", "281", "282", "283", "284", "285", "286", "287", "288", "289",
+  "290", "291", "292", "293", "294", "295", "296", "297", "298", "299",
+  "300", "301", "302", "303", "304", "305", "306", "307", "308", "309",
+  "310", "311", "312", "313", "314", "315", "316", "317", "318", "319",
+  "320", "321", "322", "323", "324", "325", "326", "327", "328", "329",
+  "330", "331", "332", "333", "334", "335", "336", "337", "338", "339",
+  "340", "341", "342", "343", "344", "345", "346", "347", "348", "349",
+  "350", "351", "352", "353", "354", "355", "356", "357", "358", "359",
+  "360", "361", "362", "363", "364", "365", "366", "367", "368", "369",
+  "370", "371", "372", "373", "374", "375", "376", "377", "378", "379",
+  "380", "381", "382", "383", "384", "385", "386", "387", "388", "389",
+  "390", "391", "392", "393", "394", "395", "396", "397", "398", "399",
+  "400", "401", "402", "403", "404", "405", "406", "407", "408", "409",
+  "410", "411", "412", "413", "414", "415", "416", "417", "418", "419",
+  "420", "421", "422", "423", "424", "425", "426", "427", "428", "429",
+  "430", "431", "432", "433", "434", "435", "436", "437", "438", "439",
+  "440", "441", "442", "443", "444", "445", "446", "447", "448", "449",
+  "450", "451", "452", "453", "454", "455", "456", "457", "458", "459",
+  "460", "461", "462", "463", "464", "465", "466", "467", "468", "469",
+  "470", "471", "472", "473", "474", "475", "476", "477", "478", "479",
+  "480", "481", "482", "483", "484", "485", "486", "487", "488", "489",
+  "490", "491", "492", "493", "494", "495", "496", "497", "498", "499",
+  "500", "501", "502", "503", "504", "505", "506", "507", "508", "509",
+  "510", "511", "512", "513", "514", "515", "516", "517", "518", "519",
+  "520", "521", "522", "523", "524", "525", "526", "527", "528", "529",
+  "530", "531", "532", "533", "534", "535", "536", "537", "538", "539",
+  "540", "541", "542", "543", "544", "545", "546", "547", "548", "549",
+  "550", "551", "552", "553", "554", "555", "556", "557", "558", "559",
+  "560", "561", "562", "563", "564", "565", "566", "567", "568", "569",
+  "570", "571", "572", "573", "574", "575", "576", "577", "578", "579",
+  "580", "581", "582", "583", "584", "585", "586", "587", "588", "589",
+  "590", "591", "592", "593", "594", "595", "596", "597", "598", "599",
+  "600", "601", "602", "603", "604", "605", "606", "607", "608", "609",
+  "610", "611", "612", "613", "614", "615", "616", "617", "618", "619",
+  "620", "621", "622", "623", "624", "625", "626", "627", "628", "629",
+  "630", "631", "632", "633", "634", "635", "636", "637", "638", "639",
+  "640", "641", "642", "643", "644", "645", "646", "647", "648", "649",
+  "650", "651", "652", "653", "654", "655", "656", "657", "658", "659",
+  "660", "661", "662", "663", "664", "665", "666", "667", "668", "669",
+  "670", "671", "672", "673", "674", "675", "676", "677", "678", "679",
+  "680", "681", "682", "683", "684", "685", "686", "687", "688", "689",
+  "690", "691", "692", "693", "694", "695", "696", "697", "698", "699",
+  "700", "701", "702", "703", "704", "705", "706", "707", "708", "709",
+  "710", "711", "712", "713", "714", "715", "716", "717", "718", "719",
+  "720", "721", "722", "723", "724", "725", "726", "727", "728", "729",
+  "730", "731", "732", "733", "734", "735", "736", "737", "738", "739",
+  "740", "741", "742", "743", "744", "745", "746", "747", "748", "749",
+  "750", "751", "752", "753", "754", "755", "756", "757", "758", "759",
+  "760", "761", "762", "763", "764", "765", "766", "767", "768", "769",
+  "770", "771", "772", "773", "774", "775", "776", "777", "778", "779",
+  "780", "781", "782", "783", "784", "785", "786", "787", "788", "789",
+  "790", "791", "792", "793", "794", "795", "796", "797", "798", "799",
+  "800", "801", "802", "803", "804", "805", "806", "807", "808", "809",
+  "810", "811", "812", "813", "814", "815", "816", "817", "818", "819",
+  "820", "821", "822", "823", "824", "825", "826", "827", "828", "829",
+  "830", "831", "832", "833", "834", "835", "836", "837", "838", "839",
+  "840", "841", "842", "843", "844", "845", "846", "847", "848", "849",
+  "850", "851", "852", "853", "854", "855", "856", "857", "858", "859",
+  "860", "861", "862", "863", "864", "865", "866", "867", "868", "869",
+  "870", "871", "872", "873", "874", "875", "876", "877", "878", "879",
+  "880", "881", "882", "883", "884", "885", "886", "887", "888", "889",
+  "890", "891", "892", "893", "894", "895", "896", "897", "898", "899",
+  "900", "901", "902", "903", "904", "905", "906", "907", "908", "909",
+  "910", "911", "912", "913", "914", "915", "916", "917", "918", "919",
+  "920", "921", "922", "923", "924", "925", "926", "927", "928", "929",
+  "930", "931", "932", "933", "934", "935", "936", "937", "938", "939",
+  "940", "941", "942", "943", "944", "945", "946", "947", "948", "949",
+  "950", "951", "952", "953", "954", "955", "956", "957", "958", "959",
+  "960", "961", "962", "963", "964", "965", "966", "967", "968", "969",
+  "970", "971", "972", "973", "974", "975", "976", "977", "978", "979",
+  "980", "981", "982", "983", "984", "985", "986", "987", "988", "989",
+  "990", "991", "992", "993", "994", "995", "996", "997", "998", "999"
+};
+
+const UINT64 mod10_18_tbl[9][128] = {
+  // 2^59 = 576460752303423488, A and B breakdown, where data = A*10^18 + B 
+
+  {
+   0LL, 0LL, 0LL, 576460752303423488LL,
+   //  0*2^59,  1*2^59
+   1LL, 152921504606846976LL, 1LL, 729382256910270464LL,
+   //  2*2^59,  3*2^59
+   2LL, 305843009213693952LL, 2LL, 882303761517117440LL,
+   //  4*2^59,  5*2^59
+   3LL, 458764513820540928LL, 4LL, 35225266123964416LL,
+   //  6*2^59,  7*2^59
+   4LL, 611686018427387904LL, 5LL, 188146770730811392LL,
+   //  8*2^59,  9*2^59
+   5LL, 764607523034234880LL, 6LL, 341068275337658368LL,
+   // 10*2^59, 11*2^59
+   6LL, 917529027641081856LL, 7LL, 493989779944505344LL,
+   // 12*2^59, 13*2^59
+   8LL, 70450532247928832LL, 8LL, 646911284551352320LL,
+   // 14*2^59, 15*2^59
+   9LL, 223372036854775808LL, 9LL, 799832789158199296LL,
+   // 16*2^59, 17*2^59
+   10LL, 376293541461622784LL, 10LL, 952754293765046272LL,
+   // 18*2^59, 19*2^59
+   11LL, 529215046068469760LL, 12LL, 105675798371893248LL,
+   // 20*2^59, 21*2^59
+   12LL, 682136550675316736LL, 13LL, 258597302978740224LL,
+   // 22*2^59, 23*2^59
+   13LL, 835058055282163712LL, 14LL, 411518807585587200LL,
+   // 24*2^59, 25*2^59
+   14LL, 987979559889010688LL, 15LL, 564440312192434176LL,
+   // 26*2^59, 27*2^59
+   16LL, 140901064495857664LL, 16LL, 717361816799281152LL,
+   // 28*2^59, 29*2^59
+   17LL, 293822569102704640LL, 17LL, 870283321406128128LL,
+   // 30*2^59, 31*2^59
+   18LL, 446744073709551616LL, 19LL, 23204826012975104LL,
+   // 32*2^59, 33*2^59
+   19LL, 599665578316398592LL, 20LL, 176126330619822080LL,
+   // 34*2^59, 35*2^59
+   20LL, 752587082923245568LL, 21LL, 329047835226669056LL,
+   // 36*2^59, 37*2^59
+   21LL, 905508587530092544LL, 22LL, 481969339833516032LL,
+   // 38*2^59, 39*2^59
+   23LL, 58430092136939520LL, 23LL, 634890844440363008LL,
+   // 40*2^59, 41*2^59
+   24LL, 211351596743786496LL, 24LL, 787812349047209984LL,
+   // 42*2^59, 43*2^59
+   25LL, 364273101350633472LL, 25LL, 940733853654056960LL,
+   // 44*2^59, 45*2^59
+   26LL, 517194605957480448LL, 27LL, 93655358260903936LL,
+   // 46*2^59, 47*2^59
+   27LL, 670116110564327424LL, 28LL, 246576862867750912LL,
+   // 48*2^59, 49*2^59
+   28LL, 823037615171174400LL, 29LL, 399498367474597888LL,
+   // 50*2^59, 51*2^59
+   29LL, 975959119778021376LL, 30LL, 552419872081444864LL,
+   // 52*2^59, 53*2^59
+   31LL, 128880624384868352LL, 31LL, 705341376688291840LL,
+   // 54*2^59, 55*2^59
+   32LL, 281802128991715328LL, 32LL, 858262881295138816LL,
+   // 56*2^59, 57*2^59
+   33LL, 434723633598562304LL, 34LL, 11184385901985792LL,
+   // 58*2^59, 59*2^59
+   34LL, 587645138205409280LL, 35LL, 164105890508832768LL,
+   // 60*2^59, 61*2^59
+   35LL, 740566642812256256LL, 36LL, 317027395115679744LL,
+   // 62*2^59, 63*2^59
+   },
+
+  {
+   // 2^65 = 36*10^18 + 893488147419103232
+   0LL, 0LL, 36LL, 893488147419103232LL,
+   //  0*2^65,  1*2^65
+   73LL, 786976294838206464LL, 110LL, 680464442257309696LL,
+   //  2*2^65,  3*2^65
+   147LL, 573952589676412928LL, 184LL, 467440737095516160LL,
+   //  4*2^65,  5*2^65
+   221LL, 360928884514619392LL, 258LL, 254417031933722624LL,
+   //  6*2^65,  7*2^65
+   295LL, 147905179352825856LL, 332LL, 41393326771929088LL,
+   //  8*2^65,  9*2^65
+   368LL, 934881474191032320LL, 405LL, 828369621610135552LL,
+   //  0*2^65,  1*2^65
+   442LL, 721857769029238784LL, 479LL, 615345916448342016LL,
+   //  2*2^65,  3*2^65
+   516LL, 508834063867445248LL, 553LL, 402322211286548480LL,
+   //  4*2^65,  5*2^65
+   590LL, 295810358705651712LL, 627LL, 189298506124754944LL,
+   //  6*2^65,  7*2^65
+   664LL, 82786653543858176LL, 700LL, 976274800962961408LL,
+   //  8*2^65,  9*2^65
+   737LL, 869762948382064640LL, 774LL, 763251095801167872LL,
+   //  0*2^65,  1*2^65
+   811LL, 656739243220271104LL, 848LL, 550227390639374336LL,
+   //  2*2^65,  3*2^65
+   885LL, 443715538058477568LL, 922LL, 337203685477580800LL,
+   //  4*2^65,  5*2^65
+   959LL, 230691832896684032LL, 996LL, 124179980315787264LL,
+   //  6*2^65,  7*2^65
+   1033LL, 17668127734890496LL, 1069LL, 911156275153993728LL,
+   //  8*2^65,  9*2^65
+   1106LL, 804644422573096960LL, 1143LL, 698132569992200192LL,
+   //  0*2^65,  1*2^65
+   1180LL, 591620717411303424LL, 1217LL, 485108864830406656LL,
+   //  2*2^65,  3*2^65
+   1254LL, 378597012249509888LL, 1291LL, 272085159668613120LL,
+   //  4*2^65,  5*2^65
+   1328LL, 165573307087716352LL, 1365LL, 59061454506819584LL,
+   //  6*2^65,  7*2^65
+   1401LL, 952549601925922816LL, 1438LL, 846037749345026048LL,
+   //  8*2^65,  9*2^65
+   1475LL, 739525896764129280LL, 1512LL, 633014044183232512LL,
+   //  0*2^65,  1*2^65
+   1549LL, 526502191602335744LL, 1586LL, 419990339021438976LL,
+   //  2*2^65,  3*2^65
+   1623LL, 313478486440542208LL, 1660LL, 206966633859645440LL,
+   //  4*2^65,  5*2^65
+   1697LL, 100454781278748672LL, 1733LL, 993942928697851904LL,
+   //  6*2^65,  7*2^65
+   1770LL, 887431076116955136LL, 1807LL, 780919223536058368LL,
+   //  8*2^65,  9*2^65
+   1844LL, 674407370955161600LL, 1881LL, 567895518374264832LL,
+   //  0*2^65,  1*2^65
+   1918LL, 461383665793368064LL, 1955LL, 354871813212471296LL,
+   //  2*2^65,  3*2^65
+   1992LL, 248359960631574528LL, 2029LL, 141848108050677760LL,
+   //  4*2^65,  5*2^65
+   2066LL, 35336255469780992LL, 2102LL, 928824402888884224LL,
+   //  6*2^65,  7*2^65
+   2139LL, 822312550307987456LL, 2176LL, 715800697727090688LL,
+   //  8*2^65,  9*2^65
+   2213LL, 609288845146193920LL, 2250LL, 502776992565297152LL,
+   //  0*2^65,  1*2^65
+   2287LL, 396265139984400384LL, 2324LL, 289753287403503616LL,
+   //  2*2^65,  3*2^65
+   },
+
+  {
+   0LL, 0LL, 2361LL, 183241434822606848LL,
+   4722LL, 366482869645213696LL, 7083LL, 549724304467820544LL,
+   9444LL, 732965739290427392LL, 11805LL, 916207174113034240LL,
+   14167LL, 99448608935641088LL, 16528LL, 282690043758247936LL,
+   18889LL, 465931478580854784LL, 21250LL, 649172913403461632LL,
+   23611LL, 832414348226068480LL, 25973LL, 15655783048675328LL,
+   28334LL, 198897217871282176LL, 30695LL, 382138652693889024LL,
+   33056LL, 565380087516495872LL, 35417LL, 748621522339102720LL,
+   37778LL, 931862957161709568LL, 40140LL, 115104391984316416LL,
+   42501LL, 298345826806923264LL, 44862LL, 481587261629530112LL,
+   47223LL, 664828696452136960LL, 49584LL, 848070131274743808LL,
+   51946LL, 31311566097350656LL, 54307LL, 214553000919957504LL,
+   56668LL, 397794435742564352LL, 59029LL, 581035870565171200LL,
+   61390LL, 764277305387778048LL, 63751LL, 947518740210384896LL,
+   66113LL, 130760175032991744LL, 68474LL, 314001609855598592LL,
+   70835LL, 497243044678205440LL, 73196LL, 680484479500812288LL,
+   75557LL, 863725914323419136LL, 77919LL, 46967349146025984LL,
+   80280LL, 230208783968632832LL, 82641LL, 413450218791239680LL,
+   85002LL, 596691653613846528LL, 87363LL, 779933088436453376LL,
+   89724LL, 963174523259060224LL, 92086LL, 146415958081667072LL,
+   94447LL, 329657392904273920LL, 96808LL, 512898827726880768LL,
+   99169LL, 696140262549487616LL, 101530LL, 879381697372094464LL,
+   103892LL, 62623132194701312LL, 106253LL, 245864567017308160LL,
+   108614LL, 429106001839915008LL, 110975LL, 612347436662521856LL,
+   113336LL, 795588871485128704LL, 115697LL, 978830306307735552LL,
+   118059LL, 162071741130342400LL, 120420LL, 345313175952949248LL,
+   122781LL, 528554610775556096LL, 125142LL, 711796045598162944LL,
+   127503LL, 895037480420769792LL, 129865LL, 78278915243376640LL,
+   132226LL, 261520350065983488LL, 134587LL, 444761784888590336LL,
+   136948LL, 628003219711197184LL, 139309LL, 811244654533804032LL,
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+   893669414648152064LL}
+};
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_add.c b/gcc-4.9/libgcc/config/libbid/bid128_add.c
new file mode 100644
index 000000000..a59430780
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_add.c
@@ -0,0 +1,2941 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64dq_add (UINT64 * pres, UINT64 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64dq_add (UINT64 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_add (&res, &x1, py
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_add (x1, y
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qd_add (UINT64 * pres, UINT128 * px, UINT64 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qd_add (UINT128 x, UINT64 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_add (&res, px, &y1
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_add (x, y1
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qq_add (UINT64 * pres, UINT128 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qq_add (UINT128 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 one = { {0x0000000000000001ull, 0x3040000000000000ull}
+  };
+  UINT64 res = 0xbaddbaddbaddbaddull;
+
+  BID_SWAP128 (one);
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64qqq_fma (&res, &one, &x, &y
+		_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		_EXC_INFO_ARG);
+#else
+  res = bid64qqq_fma (one, x, y
+		      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		      _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dd_add (UINT128 * pres, UINT64 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dd_add (UINT64 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1, y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_add (&res, &x1, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_add (x1, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dq_add (UINT128 * pres, UINT64 * px, UINT128 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dq_add (UINT64 x, UINT128 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_add (&res, &x1, py
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_add (x1, y
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qd_add (UINT128 * pres, UINT128 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qd_add (UINT128 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_add (&res, px, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_add (x, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+// bid128_add stands for bid128qq_add
+
+
+/*****************************************************************************
+ *  BID64/BID128 sub
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64dq_sub (UINT64 * pres, UINT64 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64dq_sub (UINT64 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_sub (&res, &x1, py
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_sub (x1, y
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qd_sub (UINT64 * pres, UINT128 * px, UINT64 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qd_sub (UINT128 x, UINT64 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_sub (&res, px, &y1
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_sub (x, y1
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qq_sub (UINT64 * pres, UINT128 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qq_sub (UINT128 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 one = { {0x0000000000000001ull, 0x3040000000000000ull}
+  };
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 y_sign;
+
+  BID_SWAP128 (one);
+  if ((y.w[HIGH_128W] & MASK_NAN) != MASK_NAN) {	// y is not NAN
+    // change its sign
+    y_sign = y.w[HIGH_128W] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    if (y_sign)
+      y.w[HIGH_128W] = y.w[HIGH_128W] & 0x7fffffffffffffffull;
+    else
+      y.w[HIGH_128W] = y.w[HIGH_128W] | 0x8000000000000000ull;
+  }
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64qqq_fma (&res, &one, &x, &y
+		_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		_EXC_INFO_ARG);
+#else
+  res = bid64qqq_fma (one, x, y
+		      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		      _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dd_sub (UINT128 * pres, UINT64 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dd_sub (UINT64 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1, y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_sub (&res, &x1, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_sub (x1, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dq_sub (UINT128 * pres, UINT64 * px, UINT128 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dq_sub (UINT64 x, UINT128 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_sub (&res, &x1, py
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_sub (x1, y
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qd_sub (UINT128 * pres, UINT128 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qd_sub (UINT128 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_sub (&res, px, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_sub (x, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_add (UINT128 * pres, UINT128 * px, UINT128 * py
+	    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128_add (UINT128 x, UINT128 y
+	    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT64 x_sign, y_sign, tmp_sign;
+  UINT64 x_exp, y_exp, tmp_exp;	// e1 = x_exp, e2 = y_exp
+  UINT64 C1_hi, C2_hi, tmp_signif_hi;
+  UINT64 C1_lo, C2_lo, tmp_signif_lo;
+  // Note: C1.w[1], C1.w[0] represent C1_hi, C1_lo (all UINT64)
+  // Note: C2.w[1], C2.w[0] represent C2_hi, C2_lo (all UINT64)
+  UINT64 tmp64, tmp64A, tmp64B;
+  BID_UI64DOUBLE tmp1, tmp2;
+  int x_nr_bits, y_nr_bits;
+  int q1, q2, delta, scale, x1, ind, shift, tmp_inexact = 0;
+  UINT64 halfulp64;
+  UINT128 halfulp128;
+  UINT128 C1, C2;
+  UINT128 ten2m1;
+  UINT128 highf2star;		// top 128 bits in f2*; low 128 bits in R256[1], R256[0]
+  UINT256 P256, Q256, R256;
+  int is_inexact = 0, is_midpoint_lt_even = 0, is_midpoint_gt_even = 0;
+  int is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  int second_pass = 0;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  y_sign = y.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaN or Infinity
+  if (((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL)
+      || ((y.w[1] & MASK_SPECIAL) == MASK_SPECIAL)) {
+    // x is special or y is special
+    if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+      // check first for non-canonical NaN payload
+      if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (x.w[0] > 0x38c15b09ffffffffull))) {
+	x.w[1] = x.w[1] & 0xffffc00000000000ull;
+	x.w[0] = 0x0ull;
+      }
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;
+	// clear out also G[6]-G[16]
+	res.w[0] = x.w[0];
+      } else {	// x is QNaN
+	// return x
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;
+	// clear out G[6]-G[16]
+	res.w[0] = x.w[0];
+	// if y = SNaN signal invalid exception
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	}
+      }
+      BID_SWAP128 (res);
+      BID_RETURN (res);
+    } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+      // check first for non-canonical NaN payload
+      if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (y.w[0] > 0x38c15b09ffffffffull))) {
+	y.w[1] = y.w[1] & 0xffffc00000000000ull;
+	y.w[0] = 0x0ull;
+      }
+      if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (y)
+	res.w[1] = y.w[1] & 0xfc003fffffffffffull;
+	// clear out also G[6]-G[16]
+	res.w[0] = y.w[0];
+      } else {	// y is QNaN
+	// return y
+	res.w[1] = y.w[1] & 0xfc003fffffffffffull;
+	// clear out G[6]-G[16]
+	res.w[0] = y.w[0];
+      }
+      BID_SWAP128 (res);
+      BID_RETURN (res);
+    } else {	// neither x not y is NaN; at least one is infinity
+      if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x is infinity
+	if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y is infinity
+	  // if same sign, return either of them
+	  if ((x.w[1] & MASK_SIGN) == (y.w[1] & MASK_SIGN)) {
+	    res.w[1] = x_sign | MASK_INF;
+	    res.w[0] = 0x0ull;
+	  } else {	// x and y are infinities of opposite signs
+	    // set invalid flag
+	    *pfpsf |= INVALID_EXCEPTION;
+	    // return QNaN Indefinite
+	    res.w[1] = 0x7c00000000000000ull;
+	    res.w[0] = 0x0000000000000000ull;
+	  }
+	} else {	// y is 0 or finite
+	  // return x
+	  res.w[1] = x_sign | MASK_INF;
+	  res.w[0] = 0x0ull;
+	}
+      } else {	// x is not NaN or infinity, so y must be infinity
+	res.w[1] = y_sign | MASK_INF;
+	res.w[0] = 0x0ull;
+      }
+      BID_SWAP128 (res);
+      BID_RETURN (res);
+    }
+  }
+  // unpack the arguments
+
+  // unpack x 
+  C1_hi = x.w[1] & MASK_COEFF;
+  C1_lo = x.w[0];
+  // test for non-canonical values:
+  // - values whose encoding begins with x00, x01, or x10 and whose 
+  //   coefficient is larger than 10^34 -1, or
+  // - values whose encoding begins with x1100, x1101, x1110 (if NaNs 
+  //   and infinitis were eliminated already this test is reduced to 
+  //   checking for x10x) 
+
+  // x is not infinity; check for non-canonical values - treated as zero
+  if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+    // G0_G1=11; non-canonical
+    x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+    C1_hi = 0;	// significand high
+    C1_lo = 0;	// significand low
+  } else {	// G0_G1 != 11
+    x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+    if (C1_hi > 0x0001ed09bead87c0ull ||
+	(C1_hi == 0x0001ed09bead87c0ull
+	 && C1_lo > 0x378d8e63ffffffffull)) {
+      // x is non-canonical if coefficient is larger than 10^34 -1
+      C1_hi = 0;
+      C1_lo = 0;
+    } else {	// canonical
+      ;
+    }
+  }
+
+  // unpack y  
+  C2_hi = y.w[1] & MASK_COEFF;
+  C2_lo = y.w[0];
+  // y is not infinity; check for non-canonical values - treated as zero 
+  if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+    // G0_G1=11; non-canonical 
+    y_exp = (y.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+    C2_hi = 0;	// significand high
+    C2_lo = 0;	// significand low 
+  } else {	// G0_G1 != 11 
+    y_exp = y.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+    if (C2_hi > 0x0001ed09bead87c0ull ||
+	(C2_hi == 0x0001ed09bead87c0ull
+	 && C2_lo > 0x378d8e63ffffffffull)) {
+      // y is non-canonical if coefficient is larger than 10^34 -1 
+      C2_hi = 0;
+      C2_lo = 0;
+    } else {	// canonical
+      ;
+    }
+  }
+
+  if ((C1_hi == 0x0ull) && (C1_lo == 0x0ull)) {
+    // x is 0 and y is not special
+    // if y is 0 return 0 with the smaller exponent
+    if ((C2_hi == 0x0ull) && (C2_lo == 0x0ull)) {
+      if (x_exp < y_exp)
+	res.w[1] = x_exp;
+      else
+	res.w[1] = y_exp;
+      if (x_sign && y_sign)
+	res.w[1] = res.w[1] | x_sign;	// both negative
+      else if (rnd_mode == ROUNDING_DOWN && x_sign != y_sign)
+	res.w[1] = res.w[1] | 0x8000000000000000ull;	// -0
+      // else; // res = +0
+      res.w[0] = 0;
+    } else {
+      // for 0 + y return y, with the preferred exponent
+      if (y_exp <= x_exp) {
+	res.w[1] = y.w[1];
+	res.w[0] = y.w[0];
+      } else {	// if y_exp > x_exp
+	// return (C2 * 10^scale) * 10^(y_exp - scale)
+	// where scale = min (P34-q2, y_exp-x_exp)
+	// determine q2 = nr. of decimal digits in y
+	//  determine first the nr. of bits in y (y_nr_bits)
+
+	if (C2_hi == 0) {	// y_bits is the nr. of bits in C2_lo
+	  if (C2_lo >= 0x0020000000000000ull) {	// y >= 2^53
+	    // split the 64-bit value in two 32-bit halves to avoid 
+	    // rounding errors
+	    if (C2_lo >= 0x0000000100000000ull) {	// y >= 2^32
+	      tmp2.d = (double) (C2_lo >> 32);	// exact conversion
+	      y_nr_bits =
+		32 +
+		((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	    } else {	// y < 2^32
+	      tmp2.d = (double) (C2_lo);	// exact conversion
+	      y_nr_bits =
+		((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	    }
+	  } else {	// if y < 2^53
+	    tmp2.d = (double) C2_lo;	// exact conversion
+	    y_nr_bits =
+	      ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	  }
+	} else {	// C2_hi != 0 => nr. bits = 64 + nr_bits (C2_hi)
+	  tmp2.d = (double) C2_hi;	// exact conversion
+	  y_nr_bits =
+	    64 + ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+	q2 = nr_digits[y_nr_bits].digits;
+	if (q2 == 0) {
+	  q2 = nr_digits[y_nr_bits].digits1;
+	  if (C2_hi > nr_digits[y_nr_bits].threshold_hi ||
+	      (C2_hi == nr_digits[y_nr_bits].threshold_hi &&
+	       C2_lo >= nr_digits[y_nr_bits].threshold_lo))
+	    q2++;
+	}
+	// return (C2 * 10^scale) * 10^(y_exp - scale)
+	// where scale = min (P34-q2, y_exp-x_exp)
+	scale = P34 - q2;
+	ind = (y_exp - x_exp) >> 49;
+	if (ind < scale)
+	  scale = ind;
+	if (scale == 0) {
+	  res.w[1] = y.w[1];
+	  res.w[0] = y.w[0];
+	} else if (q2 <= 19) {	// y fits in 64 bits 
+	  if (scale <= 19) {	// 10^scale fits in 64 bits
+	    // 64 x 64 C2_lo * ten2k64[scale]
+	    __mul_64x64_to_128MACH (res, C2_lo, ten2k64[scale]);
+	  } else {	// 10^scale fits in 128 bits
+	    // 64 x 128 C2_lo * ten2k128[scale - 20]
+	    __mul_128x64_to_128 (res, C2_lo, ten2k128[scale - 20]);
+	  }
+	} else {	// y fits in 128 bits, but 10^scale must fit in 64 bits 
+	  // 64 x 128 ten2k64[scale] * C2
+	  C2.w[1] = C2_hi;
+	  C2.w[0] = C2_lo;
+	  __mul_128x64_to_128 (res, ten2k64[scale], C2);
+	}
+	// subtract scale from the exponent
+	y_exp = y_exp - ((UINT64) scale << 49);
+	res.w[1] = res.w[1] | y_sign | y_exp;
+      }
+    }
+    BID_SWAP128 (res);
+    BID_RETURN (res);
+  } else if ((C2_hi == 0x0ull) && (C2_lo == 0x0ull)) {
+    // y is 0 and x is not special, and not zero
+    // for x + 0 return x, with the preferred exponent
+    if (x_exp <= y_exp) {
+      res.w[1] = x.w[1];
+      res.w[0] = x.w[0];
+    } else {	// if x_exp > y_exp
+      // return (C1 * 10^scale) * 10^(x_exp - scale)
+      // where scale = min (P34-q1, x_exp-y_exp)
+      // determine q1 = nr. of decimal digits in x
+      //  determine first the nr. of bits in x
+      if (C1_hi == 0) {	// x_bits is the nr. of bits in C1_lo
+	if (C1_lo >= 0x0020000000000000ull) {	// x >= 2^53
+	  // split the 64-bit value in two 32-bit halves to avoid 
+	  // rounding errors
+	  if (C1_lo >= 0x0000000100000000ull) {	// x >= 2^32
+	    tmp1.d = (double) (C1_lo >> 32);	// exact conversion
+	    x_nr_bits =
+	      32 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) -
+		    0x3ff);
+	  } else {	// x < 2^32
+	    tmp1.d = (double) (C1_lo);	// exact conversion
+	    x_nr_bits =
+	      ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	  }
+	} else {	// if x < 2^53
+	  tmp1.d = (double) C1_lo;	// exact conversion
+	  x_nr_bits =
+	    ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// C1_hi != 0 => nr. bits = 64 + nr_bits (C1_hi)
+	tmp1.d = (double) C1_hi;	// exact conversion
+	x_nr_bits =
+	  64 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+      q1 = nr_digits[x_nr_bits].digits;
+      if (q1 == 0) {
+	q1 = nr_digits[x_nr_bits].digits1;
+	if (C1_hi > nr_digits[x_nr_bits].threshold_hi ||
+	    (C1_hi == nr_digits[x_nr_bits].threshold_hi &&
+	     C1_lo >= nr_digits[x_nr_bits].threshold_lo))
+	  q1++;
+      }
+      // return (C1 * 10^scale) * 10^(x_exp - scale)
+      // where scale = min (P34-q1, x_exp-y_exp)  
+      scale = P34 - q1;
+      ind = (x_exp - y_exp) >> 49;
+      if (ind < scale)
+	scale = ind;
+      if (scale == 0) {
+	res.w[1] = x.w[1];
+	res.w[0] = x.w[0];
+      } else if (q1 <= 19) {	// x fits in 64 bits  
+	if (scale <= 19) {	// 10^scale fits in 64 bits
+	  // 64 x 64 C1_lo * ten2k64[scale] 
+	  __mul_64x64_to_128MACH (res, C1_lo, ten2k64[scale]);
+	} else {	// 10^scale fits in 128 bits
+	  // 64 x 128 C1_lo * ten2k128[scale - 20]
+	  __mul_128x64_to_128 (res, C1_lo, ten2k128[scale - 20]);
+	}
+      } else {	// x fits in 128 bits, but 10^scale must fit in 64 bits
+	// 64 x 128 ten2k64[scale] * C1
+	C1.w[1] = C1_hi;
+	C1.w[0] = C1_lo;
+	__mul_128x64_to_128 (res, ten2k64[scale], C1);
+      }
+      // subtract scale from the exponent
+      x_exp = x_exp - ((UINT64) scale << 49);
+      res.w[1] = res.w[1] | x_sign | x_exp;
+    }
+    BID_SWAP128 (res);
+    BID_RETURN (res);
+  } else {	// x and y are not canonical, not special, and are not zero
+    // note that the result may still be zero, and then it has to have the
+    // preferred exponent
+    if (x_exp < y_exp) {	// if exp_x < exp_y then swap x and y 
+      tmp_sign = x_sign;
+      tmp_exp = x_exp;
+      tmp_signif_hi = C1_hi;
+      tmp_signif_lo = C1_lo;
+      x_sign = y_sign;
+      x_exp = y_exp;
+      C1_hi = C2_hi;
+      C1_lo = C2_lo;
+      y_sign = tmp_sign;
+      y_exp = tmp_exp;
+      C2_hi = tmp_signif_hi;
+      C2_lo = tmp_signif_lo;
+    }
+    // q1 = nr. of decimal digits in x
+    //  determine first the nr. of bits in x
+    if (C1_hi == 0) {	// x_bits is the nr. of bits in C1_lo
+      if (C1_lo >= 0x0020000000000000ull) {	// x >= 2^53
+	//split the 64-bit value in two 32-bit halves to avoid rounding errors
+	if (C1_lo >= 0x0000000100000000ull) {	// x >= 2^32
+	  tmp1.d = (double) (C1_lo >> 32);	// exact conversion
+	  x_nr_bits =
+	    32 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	} else {	// x < 2^32
+	  tmp1.d = (double) (C1_lo);	// exact conversion
+	  x_nr_bits =
+	    ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// if x < 2^53
+	tmp1.d = (double) C1_lo;	// exact conversion
+	x_nr_bits =
+	  ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// C1_hi != 0 => nr. bits = 64 + nr_bits (C1_hi)
+      tmp1.d = (double) C1_hi;	// exact conversion
+      x_nr_bits =
+	64 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+
+    q1 = nr_digits[x_nr_bits].digits;
+    if (q1 == 0) {
+      q1 = nr_digits[x_nr_bits].digits1;
+      if (C1_hi > nr_digits[x_nr_bits].threshold_hi ||
+	  (C1_hi == nr_digits[x_nr_bits].threshold_hi &&
+	   C1_lo >= nr_digits[x_nr_bits].threshold_lo))
+	q1++;
+    }
+    // q2 = nr. of decimal digits in y
+    //  determine first the nr. of bits in y (y_nr_bits)
+    if (C2_hi == 0) {	// y_bits is the nr. of bits in C2_lo
+      if (C2_lo >= 0x0020000000000000ull) {	// y >= 2^53
+	//split the 64-bit value in two 32-bit halves to avoid rounding errors
+	if (C2_lo >= 0x0000000100000000ull) {	// y >= 2^32
+	  tmp2.d = (double) (C2_lo >> 32);	// exact conversion
+	  y_nr_bits =
+	    32 + ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	} else {	// y < 2^32
+	  tmp2.d = (double) (C2_lo);	// exact conversion
+	  y_nr_bits =
+	    ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// if y < 2^53
+	tmp2.d = (double) C2_lo;	// exact conversion
+	y_nr_bits =
+	  ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// C2_hi != 0 => nr. bits = 64 + nr_bits (C2_hi)
+      tmp2.d = (double) C2_hi;	// exact conversion
+      y_nr_bits =
+	64 + ((((unsigned int) (tmp2.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+
+    q2 = nr_digits[y_nr_bits].digits;
+    if (q2 == 0) {
+      q2 = nr_digits[y_nr_bits].digits1;
+      if (C2_hi > nr_digits[y_nr_bits].threshold_hi ||
+	  (C2_hi == nr_digits[y_nr_bits].threshold_hi &&
+	   C2_lo >= nr_digits[y_nr_bits].threshold_lo))
+	q2++;
+    }
+
+    delta = q1 + (int) (x_exp >> 49) - q2 - (int) (y_exp >> 49);
+
+    if (delta >= P34) {
+      // round the result directly because 0 < C2 < ulp (C1 * 10^(x_exp-e2))
+      // n = C1 * 10^e1 or n = C1 +/- 10^(q1-P34)) * 10^e1
+      // the result is inexact; the preferred exponent is the least possible
+
+      if (delta >= P34 + 1) {
+	// for RN the result is the operand with the larger magnitude,
+	// possibly scaled up by 10^(P34-q1)
+	// an overflow cannot occur in this case (rounding to nearest)
+	if (q1 < P34) {	// scale C1 up by 10^(P34-q1)
+	  // Note: because delta >= P34+1 it is certain that 
+	  //     x_exp - ((UINT64)scale << 49) will stay above e_min
+	  scale = P34 - q1;
+	  if (q1 <= 19) {	// C1 fits in 64 bits
+	    // 1 <= q1 <= 19 => 15 <= scale <= 33
+	    if (scale <= 19) {	// 10^scale fits in 64 bits
+	      __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+	    } else {	// if 20 <= scale <= 33
+	      // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+	      // (C1 * 10^(scale-19)) fits in 64 bits
+	      C1_lo = C1_lo * ten2k64[scale - 19];
+	      __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+	    }
+	  } else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+	    // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits
+	    C1.w[1] = C1_hi;
+	    C1.w[0] = C1_lo;
+	    // C1 = ten2k64[P34 - q1] * C1
+	    __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+	  }
+	  x_exp = x_exp - ((UINT64) scale << 49);
+	  C1_hi = C1.w[1];
+	  C1_lo = C1.w[0];
+	}
+	// some special cases arise: if delta = P34 + 1 and C1 = 10^(P34-1) 
+	// (after scaling) and x_sign != y_sign and C2 > 5*10^(q2-1) => 
+	// subtract 1 ulp
+	// Note: do this only for rounding to nearest; for other rounding 
+	// modes the correction will be applied next
+	if ((rnd_mode == ROUNDING_TO_NEAREST
+	     || rnd_mode == ROUNDING_TIES_AWAY) && delta == (P34 + 1)
+	    && C1_hi == 0x0000314dc6448d93ull
+	    && C1_lo == 0x38c15b0a00000000ull && x_sign != y_sign
+	    && ((q2 <= 19 && C2_lo > midpoint64[q2 - 1]) || (q2 >= 20
+							     && (C2_hi >
+								 midpoint128
+								 [q2 -
+								  20].
+								 w[1]
+								 ||
+								 (C2_hi
+								  ==
+								  midpoint128
+								  [q2 -
+								   20].
+								  w[1]
+								  &&
+								  C2_lo
+								  >
+								  midpoint128
+								  [q2 -
+								   20].
+								  w
+								  [0])))))
+	{
+	  // C1 = 10^34 - 1 and decrement x_exp by 1 (no underflow possible)
+	  C1_hi = 0x0001ed09bead87c0ull;
+	  C1_lo = 0x378d8e63ffffffffull;
+	  x_exp = x_exp - EXP_P1;
+	}
+	if (rnd_mode != ROUNDING_TO_NEAREST) {
+	  if ((rnd_mode == ROUNDING_DOWN && x_sign && y_sign) ||
+	      (rnd_mode == ROUNDING_UP && !x_sign && !y_sign)) {
+	    // add 1 ulp and then check for overflow
+	    C1_lo = C1_lo + 1;
+	    if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+	      C1_hi = C1_hi + 1;
+	    }
+	    if (C1_hi == 0x0001ed09bead87c0ull
+		&& C1_lo == 0x378d8e6400000000ull) {
+	      // C1 = 10^34 => rounding overflow
+	      C1_hi = 0x0000314dc6448d93ull;
+	      C1_lo = 0x38c15b0a00000000ull;	// 10^33
+	      x_exp = x_exp + EXP_P1;
+	      if (x_exp == EXP_MAX_P1) {	// overflow
+		C1_hi = 0x7800000000000000ull;	// +inf
+		C1_lo = 0x0ull;
+		x_exp = 0;	// x_sign is preserved
+		// set overflow flag (the inexact flag was set too)
+		*pfpsf |= OVERFLOW_EXCEPTION;
+	      }
+	    }
+	  } else if ((rnd_mode == ROUNDING_DOWN && !x_sign && y_sign) ||
+		     (rnd_mode == ROUNDING_UP && x_sign && !y_sign) ||
+		     (rnd_mode == ROUNDING_TO_ZERO
+		      && x_sign != y_sign)) {
+	    // subtract 1 ulp from C1
+	    // Note: because delta >= P34 + 1 the result cannot be zero
+	    C1_lo = C1_lo - 1;
+	    if (C1_lo == 0xffffffffffffffffull)
+	      C1_hi = C1_hi - 1;
+	    // if the coefficient is 10^33 - 1 then make it 10^34 - 1 and 
+	    // decrease the exponent by 1 (because delta >= P34 + 1 the
+	    // exponent will not become less than e_min)
+	    // 10^33 - 1 = 0x0000314dc6448d9338c15b09ffffffff
+	    // 10^34 - 1 = 0x0001ed09bead87c0378d8e63ffffffff
+	    if (C1_hi == 0x0000314dc6448d93ull
+		&& C1_lo == 0x38c15b09ffffffffull) {
+	      // make C1 = 10^34  - 1
+	      C1_hi = 0x0001ed09bead87c0ull;
+	      C1_lo = 0x378d8e63ffffffffull;
+	      x_exp = x_exp - EXP_P1;
+	    }
+	  } else {
+	    ;	// the result is already correct
+	  }
+	}
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+	// assemble the result
+	res.w[1] = x_sign | x_exp | C1_hi;
+	res.w[0] = C1_lo;
+      } else {	// delta = P34 
+	// in most cases, the smaller operand may be < or = or > 1/2 ulp of the
+	// larger operand
+	// however, the case C1 = 10^(q1-1) and x_sign != y_sign is special due
+	// to accuracy loss after subtraction, and will be treated separately
+	if (x_sign == y_sign || (q1 <= 20
+				 && (C1_hi != 0
+				     || C1_lo != ten2k64[q1 - 1]))
+	    || (q1 >= 21 && (C1_hi != ten2k128[q1 - 21].w[1]
+			     || C1_lo != ten2k128[q1 - 21].w[0]))) {
+	  // if x_sign == y_sign or C1 != 10^(q1-1)
+	  // compare C2 with 1/2 ulp = 5 * 10^(q2-1), the latter read from table
+	  // Note: cases q1<=19 and q1>=20 can be coalesced at some latency cost
+	  if (q2 <= 19) {	// C2 and 5*10^(q2-1) both fit in 64 bits
+	    halfulp64 = midpoint64[q2 - 1];	// 5 * 10^(q2-1)
+	    if (C2_lo < halfulp64) {	// n2 < 1/2 ulp (n1)
+	      // for RN the result is the operand with the larger magnitude, 
+	      // possibly scaled up by 10^(P34-q1)
+	      // an overflow cannot occur in this case (rounding to nearest)
+	      if (q1 < P34) {	// scale C1 up by 10^(P34-q1)
+		// Note: because delta = P34 it is certain that
+		//     x_exp - ((UINT64)scale << 49) will stay above e_min
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		x_exp = x_exp - ((UINT64) scale << 49);
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+	      }
+	      if (rnd_mode != ROUNDING_TO_NEAREST) {
+		if ((rnd_mode == ROUNDING_DOWN && x_sign && y_sign) ||
+		    (rnd_mode == ROUNDING_UP && !x_sign && !y_sign)) {
+		  // add 1 ulp and then check for overflow
+		  C1_lo = C1_lo + 1;
+		  if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		    C1_hi = C1_hi + 1;
+		  }
+		  if (C1_hi == 0x0001ed09bead87c0ull
+		      && C1_lo == 0x378d8e6400000000ull) {
+		    // C1 = 10^34 => rounding overflow
+		    C1_hi = 0x0000314dc6448d93ull;
+		    C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		    x_exp = x_exp + EXP_P1;
+		    if (x_exp == EXP_MAX_P1) {	// overflow
+		      C1_hi = 0x7800000000000000ull;	// +inf
+		      C1_lo = 0x0ull;
+		      x_exp = 0;	// x_sign is preserved
+		      // set overflow flag (the inexact flag was set too)
+		      *pfpsf |= OVERFLOW_EXCEPTION;
+		    }
+		  }
+		} else
+		  if ((rnd_mode == ROUNDING_DOWN && !x_sign && y_sign)
+		      || (rnd_mode == ROUNDING_UP && x_sign && !y_sign)
+		      || (rnd_mode == ROUNDING_TO_ZERO
+			  && x_sign != y_sign)) {
+		  // subtract 1 ulp from C1
+		  // Note: because delta >= P34 + 1 the result cannot be zero
+		  C1_lo = C1_lo - 1;
+		  if (C1_lo == 0xffffffffffffffffull)
+		    C1_hi = C1_hi - 1;
+		  // if the coefficient is 10^33-1 then make it 10^34-1 and 
+		  // decrease the exponent by 1 (because delta >= P34 + 1 the
+		  // exponent will not become less than e_min)
+		  // 10^33 - 1 = 0x0000314dc6448d9338c15b09ffffffff
+		  // 10^34 - 1 = 0x0001ed09bead87c0378d8e63ffffffff
+		  if (C1_hi == 0x0000314dc6448d93ull
+		      && C1_lo == 0x38c15b09ffffffffull) {
+		    // make C1 = 10^34  - 1
+		    C1_hi = 0x0001ed09bead87c0ull;
+		    C1_lo = 0x378d8e63ffffffffull;
+		    x_exp = x_exp - EXP_P1;
+		  }
+		} else {
+		  ;	// the result is already correct
+		}
+	      }
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    } else if ((C2_lo == halfulp64)
+		       && (q1 < P34 || ((C1_lo & 0x1) == 0))) {
+	      // n2 = 1/2 ulp (n1) and C1 is even
+	      // the result is the operand with the larger magnitude,
+	      // possibly scaled up by 10^(P34-q1)
+	      // an overflow cannot occur in this case (rounding to nearest)
+	      if (q1 < P34) {	// scale C1 up by 10^(P34-q1)
+		// Note: because delta = P34 it is certain that
+		//     x_exp - ((UINT64)scale << 49) will stay above e_min
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33 
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits  
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits 
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1 
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		x_exp = x_exp - ((UINT64) scale << 49);
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+	      }
+	      if ((rnd_mode == ROUNDING_TO_NEAREST && x_sign == y_sign
+		   && (C1_lo & 0x01)) || (rnd_mode == ROUNDING_TIES_AWAY
+					  && x_sign == y_sign)
+		  || (rnd_mode == ROUNDING_UP && !x_sign && !y_sign)
+		  || (rnd_mode == ROUNDING_DOWN && x_sign && y_sign)) {
+		// add 1 ulp and then check for overflow
+		C1_lo = C1_lo + 1;
+		if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		  C1_hi = C1_hi + 1;
+		}
+		if (C1_hi == 0x0001ed09bead87c0ull
+		    && C1_lo == 0x378d8e6400000000ull) {
+		  // C1 = 10^34 => rounding overflow
+		  C1_hi = 0x0000314dc6448d93ull;
+		  C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		  x_exp = x_exp + EXP_P1;
+		  if (x_exp == EXP_MAX_P1) {	// overflow
+		    C1_hi = 0x7800000000000000ull;	// +inf
+		    C1_lo = 0x0ull;
+		    x_exp = 0;	// x_sign is preserved
+		    // set overflow flag (the inexact flag was set too)
+		    *pfpsf |= OVERFLOW_EXCEPTION;
+		  }
+		}
+	      } else
+		if ((rnd_mode == ROUNDING_TO_NEAREST && x_sign != y_sign
+		     && (C1_lo & 0x01)) || (rnd_mode == ROUNDING_DOWN
+					    && !x_sign && y_sign)
+		    || (rnd_mode == ROUNDING_UP && x_sign && !y_sign)
+		    || (rnd_mode == ROUNDING_TO_ZERO
+			&& x_sign != y_sign)) {
+		// subtract 1 ulp from C1
+		// Note: because delta >= P34 + 1 the result cannot be zero
+		C1_lo = C1_lo - 1;
+		if (C1_lo == 0xffffffffffffffffull)
+		  C1_hi = C1_hi - 1;
+		// if the coefficient is 10^33 - 1 then make it 10^34 - 1
+		// and decrease the exponent by 1 (because delta >= P34 + 1
+		// the exponent will not become less than e_min)
+		// 10^33 - 1 = 0x0000314dc6448d9338c15b09ffffffff
+		// 10^34 - 1 = 0x0001ed09bead87c0378d8e63ffffffff
+		if (C1_hi == 0x0000314dc6448d93ull
+		    && C1_lo == 0x38c15b09ffffffffull) {
+		  // make C1 = 10^34  - 1
+		  C1_hi = 0x0001ed09bead87c0ull;
+		  C1_lo = 0x378d8e63ffffffffull;
+		  x_exp = x_exp - EXP_P1;
+		}
+	      } else {
+		;	// the result is already correct
+	      }
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result 
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    } else {	// if C2_lo > halfulp64 || 
+	      // (C2_lo == halfulp64 && q1 == P34 && ((C1_lo & 0x1) == 1)), i.e.
+	      // 1/2 ulp(n1) < n2 < 1 ulp(n1) or n2 = 1/2 ulp(n1) and C1 odd
+	      // res = x+1 ulp if n1*n2 > 0 and res = x-1 ulp if n1*n2 < 0
+	      if (q1 < P34) {	// then 1 ulp = 10^(e1+q1-P34) < 10^e1
+		// Note: if (q1 == P34) then 1 ulp = 10^(e1+q1-P34) = 10^e1
+		// because q1 < P34 we must first replace C1 by 
+		// C1 * 10^(P34-q1), and must decrease the exponent by 
+		// (P34-q1) (it will still be at least e_min)
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		x_exp = x_exp - ((UINT64) scale << 49);
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+		// check for rounding overflow
+		if (C1_hi == 0x0001ed09bead87c0ull
+		    && C1_lo == 0x378d8e6400000000ull) {
+		  // C1 = 10^34 => rounding overflow 
+		  C1_hi = 0x0000314dc6448d93ull;
+		  C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		  x_exp = x_exp + EXP_P1;
+		}
+	      }
+	      if ((rnd_mode == ROUNDING_TO_NEAREST && x_sign != y_sign)
+		  || (rnd_mode == ROUNDING_TIES_AWAY && x_sign != y_sign
+		      && C2_lo != halfulp64)
+		  || (rnd_mode == ROUNDING_DOWN && !x_sign && y_sign)
+		  || (rnd_mode == ROUNDING_UP && x_sign && !y_sign)
+		  || (rnd_mode == ROUNDING_TO_ZERO
+		      && x_sign != y_sign)) {
+		// the result is x - 1
+		// for RN n1 * n2 < 0; underflow not possible
+		C1_lo = C1_lo - 1;
+		if (C1_lo == 0xffffffffffffffffull)
+		  C1_hi--;
+		// check if we crossed into the lower decade
+		if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		  C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		  C1_lo = 0x378d8e63ffffffffull;
+		  x_exp = x_exp - EXP_P1;	// no underflow, because n1 >> n2
+		}
+	      } else
+		if ((rnd_mode == ROUNDING_TO_NEAREST
+		     && x_sign == y_sign)
+		    || (rnd_mode == ROUNDING_TIES_AWAY
+			&& x_sign == y_sign)
+		    || (rnd_mode == ROUNDING_DOWN && x_sign && y_sign)
+		    || (rnd_mode == ROUNDING_UP && !x_sign
+			&& !y_sign)) {
+		// the result is x + 1
+		// for RN x_sign = y_sign, i.e. n1*n2 > 0
+		C1_lo = C1_lo + 1;
+		if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		  C1_hi = C1_hi + 1;
+		}
+		if (C1_hi == 0x0001ed09bead87c0ull
+		    && C1_lo == 0x378d8e6400000000ull) {
+		  // C1 = 10^34 => rounding overflow
+		  C1_hi = 0x0000314dc6448d93ull;
+		  C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		  x_exp = x_exp + EXP_P1;
+		  if (x_exp == EXP_MAX_P1) {	// overflow
+		    C1_hi = 0x7800000000000000ull;	// +inf
+		    C1_lo = 0x0ull;
+		    x_exp = 0;	// x_sign is preserved
+		    // set the overflow flag
+		    *pfpsf |= OVERFLOW_EXCEPTION;
+		  }
+		}
+	      } else {
+		;	// the result is x
+	      }
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    }
+	  } else {	// if q2 >= 20 then 5*10^(q2-1) and C2 (the latter in 
+	    // most cases) fit only in more than 64 bits
+	    halfulp128 = midpoint128[q2 - 20];	// 5 * 10^(q2-1)
+	    if ((C2_hi < halfulp128.w[1])
+		|| (C2_hi == halfulp128.w[1]
+		    && C2_lo < halfulp128.w[0])) {
+	      // n2 < 1/2 ulp (n1)
+	      // the result is the operand with the larger magnitude,
+	      // possibly scaled up by 10^(P34-q1)
+	      // an overflow cannot occur in this case (rounding to nearest)
+	      if (q1 < P34) {	// scale C1 up by 10^(P34-q1)
+		// Note: because delta = P34 it is certain that
+		//     x_exp - ((UINT64)scale << 49) will stay above e_min
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33 
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits  
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits 
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1 
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+		x_exp = x_exp - ((UINT64) scale << 49);
+	      }
+	      if (rnd_mode != ROUNDING_TO_NEAREST) {
+		if ((rnd_mode == ROUNDING_DOWN && x_sign && y_sign) ||
+		    (rnd_mode == ROUNDING_UP && !x_sign && !y_sign)) {
+		  // add 1 ulp and then check for overflow
+		  C1_lo = C1_lo + 1;
+		  if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		    C1_hi = C1_hi + 1;
+		  }
+		  if (C1_hi == 0x0001ed09bead87c0ull
+		      && C1_lo == 0x378d8e6400000000ull) {
+		    // C1 = 10^34 => rounding overflow
+		    C1_hi = 0x0000314dc6448d93ull;
+		    C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		    x_exp = x_exp + EXP_P1;
+		    if (x_exp == EXP_MAX_P1) {	// overflow
+		      C1_hi = 0x7800000000000000ull;	// +inf
+		      C1_lo = 0x0ull;
+		      x_exp = 0;	// x_sign is preserved
+		      // set overflow flag (the inexact flag was set too)
+		      *pfpsf |= OVERFLOW_EXCEPTION;
+		    }
+		  }
+		} else
+		  if ((rnd_mode == ROUNDING_DOWN && !x_sign && y_sign)
+		      || (rnd_mode == ROUNDING_UP && x_sign && !y_sign)
+		      || (rnd_mode == ROUNDING_TO_ZERO
+			  && x_sign != y_sign)) {
+		  // subtract 1 ulp from C1
+		  // Note: because delta >= P34 + 1 the result cannot be zero
+		  C1_lo = C1_lo - 1;
+		  if (C1_lo == 0xffffffffffffffffull)
+		    C1_hi = C1_hi - 1;
+		  // if the coefficient is 10^33-1 then make it 10^34-1 and
+		  // decrease the exponent by 1 (because delta >= P34 + 1 the
+		  // exponent will not become less than e_min)
+		  // 10^33 - 1 = 0x0000314dc6448d9338c15b09ffffffff
+		  // 10^34 - 1 = 0x0001ed09bead87c0378d8e63ffffffff
+		  if (C1_hi == 0x0000314dc6448d93ull
+		      && C1_lo == 0x38c15b09ffffffffull) {
+		    // make C1 = 10^34  - 1
+		    C1_hi = 0x0001ed09bead87c0ull;
+		    C1_lo = 0x378d8e63ffffffffull;
+		    x_exp = x_exp - EXP_P1;
+		  }
+		} else {
+		  ;	// the result is already correct
+		}
+	      }
+	      // set the inexact flag 
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result 
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    } else if ((C2_hi == halfulp128.w[1]
+			&& C2_lo == halfulp128.w[0])
+		       && (q1 < P34 || ((C1_lo & 0x1) == 0))) {
+	      // midpoint & lsb in C1 is 0
+	      // n2 = 1/2 ulp (n1) and C1 is even
+	      // the result is the operand with the larger magnitude,
+	      // possibly scaled up by 10^(P34-q1)
+	      // an overflow cannot occur in this case (rounding to nearest)
+	      if (q1 < P34) {	// scale C1 up by 10^(P34-q1)
+		// Note: because delta = P34 it is certain that
+		//     x_exp - ((UINT64)scale << 49) will stay above e_min
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		x_exp = x_exp - ((UINT64) scale << 49);
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+	      }
+	      if (rnd_mode != ROUNDING_TO_NEAREST) {
+		if ((rnd_mode == ROUNDING_TIES_AWAY && x_sign == y_sign)
+		    || (rnd_mode == ROUNDING_UP && !y_sign)) {
+		  // add 1 ulp and then check for overflow
+		  C1_lo = C1_lo + 1;
+		  if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		    C1_hi = C1_hi + 1;
+		  }
+		  if (C1_hi == 0x0001ed09bead87c0ull
+		      && C1_lo == 0x378d8e6400000000ull) {
+		    // C1 = 10^34 => rounding overflow
+		    C1_hi = 0x0000314dc6448d93ull;
+		    C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		    x_exp = x_exp + EXP_P1;
+		    if (x_exp == EXP_MAX_P1) {	// overflow
+		      C1_hi = 0x7800000000000000ull;	// +inf
+		      C1_lo = 0x0ull;
+		      x_exp = 0;	// x_sign is preserved
+		      // set overflow flag (the inexact flag was set too)
+		      *pfpsf |= OVERFLOW_EXCEPTION;
+		    }
+		  }
+		} else if ((rnd_mode == ROUNDING_DOWN && y_sign)
+			   || (rnd_mode == ROUNDING_TO_ZERO
+			       && x_sign != y_sign)) {
+		  // subtract 1 ulp from C1
+		  // Note: because delta >= P34 + 1 the result cannot be zero
+		  C1_lo = C1_lo - 1;
+		  if (C1_lo == 0xffffffffffffffffull)
+		    C1_hi = C1_hi - 1;
+		  // if the coefficient is 10^33 - 1 then make it 10^34 - 1
+		  // and decrease the exponent by 1 (because delta >= P34 + 1
+		  // the exponent will not become less than e_min)
+		  // 10^33 - 1 = 0x0000314dc6448d9338c15b09ffffffff
+		  // 10^34 - 1 = 0x0001ed09bead87c0378d8e63ffffffff
+		  if (C1_hi == 0x0000314dc6448d93ull
+		      && C1_lo == 0x38c15b09ffffffffull) {
+		    // make C1 = 10^34  - 1
+		    C1_hi = 0x0001ed09bead87c0ull;
+		    C1_lo = 0x378d8e63ffffffffull;
+		    x_exp = x_exp - EXP_P1;
+		  }
+		} else {
+		  ;	// the result is already correct
+		}
+	      }
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    } else {	// if C2 > halfulp128 ||
+	      // (C2 == halfulp128 && q1 == P34 && ((C1 & 0x1) == 1)), i.e.
+	      // 1/2 ulp(n1) < n2 < 1 ulp(n1) or n2 = 1/2 ulp(n1) and C1 odd
+	      // res = x+1 ulp if n1*n2 > 0 and res = x-1 ulp if n1*n2 < 0
+	      if (q1 < P34) {	// then 1 ulp = 10^(e1+q1-P34) < 10^e1
+		// Note: if (q1 == P34) then 1 ulp = 10^(e1+q1-P34) = 10^e1
+		// because q1 < P34 we must first replace C1 by C1*10^(P34-q1),
+		// and must decrease the exponent by (P34-q1) (it will still be
+		// at least e_min)
+		scale = P34 - q1;
+		if (q1 <= 19) {	// C1 fits in 64 bits
+		  // 1 <= q1 <= 19 => 15 <= scale <= 33
+		  if (scale <= 19) {	// 10^scale fits in 64 bits
+		    __mul_64x64_to_128MACH (C1, ten2k64[scale], C1_lo);
+		  } else {	// if 20 <= scale <= 33
+		    // C1 * 10^scale = (C1 * 10^(scale-19)) * 10^19 where
+		    // (C1 * 10^(scale-19)) fits in 64 bits
+		    C1_lo = C1_lo * ten2k64[scale - 19];
+		    __mul_64x64_to_128MACH (C1, ten2k64[19], C1_lo);
+		  }
+		} else {	//if 20 <= q1 <= 33=P34-1 then C1 fits only in 128 bits
+		  // => 1 <= P34 - q1 <= 14 so 10^(P34-q1) fits in 64 bits
+		  C1.w[1] = C1_hi;
+		  C1.w[0] = C1_lo;
+		  // C1 = ten2k64[P34 - q1] * C1
+		  __mul_128x64_to_128 (C1, ten2k64[P34 - q1], C1);
+		}
+		C1_hi = C1.w[1];
+		C1_lo = C1.w[0];
+		x_exp = x_exp - ((UINT64) scale << 49);
+	      }
+	      if ((rnd_mode == ROUNDING_TO_NEAREST && x_sign != y_sign)
+		  || (rnd_mode == ROUNDING_TIES_AWAY && x_sign != y_sign
+		      && (C2_hi != halfulp128.w[1]
+			  || C2_lo != halfulp128.w[0]))
+		  || (rnd_mode == ROUNDING_DOWN && !x_sign && y_sign)
+		  || (rnd_mode == ROUNDING_UP && x_sign && !y_sign)
+		  || (rnd_mode == ROUNDING_TO_ZERO
+		      && x_sign != y_sign)) {
+		// the result is x - 1
+		// for RN n1 * n2 < 0; underflow not possible
+		C1_lo = C1_lo - 1;
+		if (C1_lo == 0xffffffffffffffffull)
+		  C1_hi--;
+		// check if we crossed into the lower decade
+		if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		  C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		  C1_lo = 0x378d8e63ffffffffull;
+		  x_exp = x_exp - EXP_P1;	// no underflow, because n1 >> n2
+		}
+	      } else
+		if ((rnd_mode == ROUNDING_TO_NEAREST
+		     && x_sign == y_sign)
+		    || (rnd_mode == ROUNDING_TIES_AWAY
+			&& x_sign == y_sign)
+		    || (rnd_mode == ROUNDING_DOWN && x_sign && y_sign)
+		    || (rnd_mode == ROUNDING_UP && !x_sign
+			&& !y_sign)) {
+		// the result is x + 1
+		// for RN x_sign = y_sign, i.e. n1*n2 > 0
+		C1_lo = C1_lo + 1;
+		if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		  C1_hi = C1_hi + 1;
+		}
+		if (C1_hi == 0x0001ed09bead87c0ull
+		    && C1_lo == 0x378d8e6400000000ull) {
+		  // C1 = 10^34 => rounding overflow
+		  C1_hi = 0x0000314dc6448d93ull;
+		  C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		  x_exp = x_exp + EXP_P1;
+		  if (x_exp == EXP_MAX_P1) {	// overflow
+		    C1_hi = 0x7800000000000000ull;	// +inf
+		    C1_lo = 0x0ull;
+		    x_exp = 0;	// x_sign is preserved
+		    // set the overflow flag
+		    *pfpsf |= OVERFLOW_EXCEPTION;
+		  }
+		}
+	      } else {
+		;	// the result is x
+	      }
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // assemble the result
+	      res.w[1] = x_sign | x_exp | C1_hi;
+	      res.w[0] = C1_lo;
+	    }
+	  }	// end q1 >= 20
+	  // end case where C1 != 10^(q1-1)
+	} else {	// C1 = 10^(q1-1) and x_sign != y_sign
+	  // instead of C' = (C1 * 10^(e1-e2) + C2)rnd,P34
+	  // calculate C' = C1 * 10^(e1-e2-x1) + (C2 * 10^(-x1))rnd,P34 
+	  // where x1 = q2 - 1, 0 <= x1 <= P34 - 1
+	  // Because C1 = 10^(q1-1) and x_sign != y_sign, C' will have P34 
+	  // digits and n = C' * 10^(e2+x1)
+	  // If the result has P34+1 digits, redo the steps above with x1+1
+	  // If the result has P34-1 digits or less, redo the steps above with 
+	  // x1-1 but only if initially x1 >= 1
+	  // NOTE: these two steps can be improved, e.g we could guess if
+	  // P34+1 or P34-1 digits will be obtained by adding/subtracting 
+	  // just the top 64 bits of the two operands
+	  // The result cannot be zero, and it cannot overflow
+	  x1 = q2 - 1;	// 0 <= x1 <= P34-1
+	  // Calculate C1 * 10^(e1-e2-x1) where 1 <= e1-e2-x1 <= P34
+	  // scale = (int)(e1 >> 49) - (int)(e2 >> 49) - x1; 0 <= scale <= P34-1
+	  scale = P34 - q1 + 1;	// scale=e1-e2-x1 = P34+1-q1; 1<=scale<=P34
+	  // either C1 or 10^(e1-e2-x1) may not fit is 64 bits,
+	  // but their product fits with certainty in 128 bits
+	  if (scale >= 20) {	//10^(e1-e2-x1) doesn't fit in 64 bits, but C1 does
+	    __mul_128x64_to_128 (C1, C1_lo, ten2k128[scale - 20]);
+	  } else {	// if (scale >= 1
+	    // if 1 <= scale <= 19 then 10^(e1-e2-x1) fits in 64 bits
+	    if (q1 <= 19) {	// C1 fits in 64 bits
+	      __mul_64x64_to_128MACH (C1, C1_lo, ten2k64[scale]);
+	    } else {	// q1 >= 20
+	      C1.w[1] = C1_hi;
+	      C1.w[0] = C1_lo;
+	      __mul_128x64_to_128 (C1, ten2k64[scale], C1);
+	    }
+	  }
+	  tmp64 = C1.w[0];	// C1.w[1], C1.w[0] contains C1 * 10^(e1-e2-x1)
+
+	  // now round C2 to q2-x1 = 1 decimal digit
+	  // C2' = C2 + 1/2 * 10^x1 = C2 + 5 * 10^(x1-1)
+	  ind = x1 - 1;	// -1 <= ind <= P34 - 2
+	  if (ind >= 0) {	// if (x1 >= 1)
+	    C2.w[0] = C2_lo;
+	    C2.w[1] = C2_hi;
+	    if (ind <= 18) {
+	      C2.w[0] = C2.w[0] + midpoint64[ind];
+	      if (C2.w[0] < C2_lo)
+		C2.w[1]++;
+	    } else {	// 19 <= ind <= 32
+	      C2.w[0] = C2.w[0] + midpoint128[ind - 19].w[0];
+	      C2.w[1] = C2.w[1] + midpoint128[ind - 19].w[1];
+	      if (C2.w[0] < C2_lo)
+		C2.w[1]++;
+	    }
+	    // the approximation of 10^(-x1) was rounded up to 118 bits
+	    __mul_128x128_to_256 (R256, C2, ten2mk128[ind]);	// R256 = C2*, f2*
+	    // calculate C2* and f2*
+	    // C2* is actually floor(C2*) in this case
+	    // C2* and f2* need shifting and masking, as shown by
+	    // shiftright128[] and maskhigh128[]
+	    // the top Ex bits of 10^(-x1) are T* = ten2mk128trunc[ind], e.g.
+	    // if x1=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+	    // if (0 < f2* < 10^(-x1)) then
+	    //   if floor(C1+C2*) is even then C2* = floor(C2*) - logical right
+	    //       shift; C2* has p decimal digits, correct by Prop. 1)
+	    //   else if floor(C1+C2*) is odd C2* = floor(C2*)-1 (logical right
+	    //       shift; C2* has p decimal digits, correct by Pr. 1)
+	    // else
+	    //   C2* = floor(C2*) (logical right shift; C has p decimal digits,
+	    //       correct by Property 1)
+	    // n = C2* * 10^(e2+x1)
+
+	    if (ind <= 2) {
+	      highf2star.w[1] = 0x0;
+	      highf2star.w[0] = 0x0;	// low f2* ok
+	    } else if (ind <= 21) {
+	      highf2star.w[1] = 0x0;
+	      highf2star.w[0] = R256.w[2] & maskhigh128[ind];	// low f2* ok
+	    } else {
+	      highf2star.w[1] = R256.w[3] & maskhigh128[ind];
+	      highf2star.w[0] = R256.w[2];	// low f2* is ok
+	    }
+	    // shift right C2* by Ex-128 = shiftright128[ind]
+	    if (ind >= 3) {
+	      shift = shiftright128[ind];
+	      if (shift < 64) {	// 3 <= shift <= 63
+		R256.w[2] =
+		  (R256.w[2] >> shift) | (R256.w[3] << (64 - shift));
+		R256.w[3] = (R256.w[3] >> shift);
+	      } else {	// 66 <= shift <= 102
+		R256.w[2] = (R256.w[3] >> (shift - 64));
+		R256.w[3] = 0x0ULL;
+	      }
+	    }
+	    // redundant
+	    is_inexact_lt_midpoint = 0;
+	    is_inexact_gt_midpoint = 0;
+	    is_midpoint_lt_even = 0;
+	    is_midpoint_gt_even = 0;
+	    // determine inexactness of the rounding of C2*
+	    // (cannot be followed by a second rounding)
+	    // if (0 < f2* - 1/2 < 10^(-x1)) then
+	    //   the result is exact
+	    // else (if f2* - 1/2 > T* then)
+	    //   the result of is inexact
+	    if (ind <= 2) {
+	      if (R256.w[1] > 0x8000000000000000ull ||
+		  (R256.w[1] == 0x8000000000000000ull
+		   && R256.w[0] > 0x0ull)) {
+		// f2* > 1/2 and the result may be exact
+		tmp64A = R256.w[1] - 0x8000000000000000ull;	// f* - 1/2
+		if ((tmp64A > ten2mk128trunc[ind].w[1]
+		     || (tmp64A == ten2mk128trunc[ind].w[1]
+			 && R256.w[0] >= ten2mk128trunc[ind].w[0]))) {
+		  // set the inexact flag
+		  *pfpsf |= INEXACT_EXCEPTION;
+		  // this rounding is applied to C2 only!
+		  // x_sign != y_sign
+		  is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+		// rounding down, unless a midpoint in [ODD, EVEN]
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		// this rounding is applied to C2 only!
+		// x_sign != y_sign
+		is_inexact_lt_midpoint = 1;
+	      }
+	    } else if (ind <= 21) {	// if 3 <= ind <= 21
+	      if (highf2star.w[1] > 0x0 || (highf2star.w[1] == 0x0
+					    && highf2star.w[0] >
+					    onehalf128[ind])
+		  || (highf2star.w[1] == 0x0
+		      && highf2star.w[0] == onehalf128[ind]
+		      && (R256.w[1] || R256.w[0]))) {
+		// f2* > 1/2 and the result may be exact
+		// Calculate f2* - 1/2
+		tmp64A = highf2star.w[0] - onehalf128[ind];
+		tmp64B = highf2star.w[1];
+		if (tmp64A > highf2star.w[0])
+		  tmp64B--;
+		if (tmp64B || tmp64A
+		    || R256.w[1] > ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] > ten2mk128trunc[ind].w[0])) {
+		  // set the inexact flag
+		  *pfpsf |= INEXACT_EXCEPTION;
+		  // this rounding is applied to C2 only!
+		  // x_sign != y_sign
+		  is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		// this rounding is applied to C2 only!
+		// x_sign != y_sign
+		is_inexact_lt_midpoint = 1;
+	      }
+	    } else {	// if 22 <= ind <= 33
+	      if (highf2star.w[1] > onehalf128[ind]
+		  || (highf2star.w[1] == onehalf128[ind]
+		      && (highf2star.w[0] || R256.w[1]
+			  || R256.w[0]))) {
+		// f2* > 1/2 and the result may be exact
+		// Calculate f2* - 1/2
+		// tmp64A = highf2star.w[0];
+		tmp64B = highf2star.w[1] - onehalf128[ind];
+		if (tmp64B || highf2star.w[0]
+		    || R256.w[1] > ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] > ten2mk128trunc[ind].w[0])) {
+		  // set the inexact flag
+		  *pfpsf |= INEXACT_EXCEPTION;
+		  // this rounding is applied to C2 only!
+		  // x_sign != y_sign
+		  is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		// this rounding is applied to C2 only!
+		// x_sign != y_sign
+		is_inexact_lt_midpoint = 1;
+	      }
+	    }
+	    // check for midpoints after determining inexactness
+	    if ((R256.w[1] || R256.w[0]) && (highf2star.w[1] == 0)
+		&& (highf2star.w[0] == 0)
+		&& (R256.w[1] < ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] <= ten2mk128trunc[ind].w[0]))) {
+	      // the result is a midpoint
+	      if ((tmp64 + R256.w[2]) & 0x01) {	// MP in [EVEN, ODD]
+		// if floor(C2*) is odd C = floor(C2*) - 1; the result may be 0
+		R256.w[2]--;
+		if (R256.w[2] == 0xffffffffffffffffull)
+		  R256.w[3]--;
+		// this rounding is applied to C2 only!
+		// x_sign != y_sign
+		is_midpoint_lt_even = 1;
+		is_inexact_lt_midpoint = 0;
+		is_inexact_gt_midpoint = 0;
+	      } else {
+		// else MP in [ODD, EVEN]
+		// this rounding is applied to C2 only!
+		// x_sign != y_sign
+		is_midpoint_gt_even = 1;
+		is_inexact_lt_midpoint = 0;
+		is_inexact_gt_midpoint = 0;
+	      }
+	    }
+	  } else {	// if (ind == -1) only when x1 = 0
+	    R256.w[2] = C2_lo;
+	    R256.w[3] = C2_hi;
+	    is_midpoint_lt_even = 0;
+	    is_midpoint_gt_even = 0;
+	    is_inexact_lt_midpoint = 0;
+	    is_inexact_gt_midpoint = 0;
+	  }
+	  // and now subtract C1 * 10^(e1-e2-x1) - (C2 * 10^(-x1))rnd,P34
+	  // because x_sign != y_sign this last operation is exact
+	  C1.w[0] = C1.w[0] - R256.w[2];
+	  C1.w[1] = C1.w[1] - R256.w[3];
+	  if (C1.w[0] > tmp64)
+	    C1.w[1]--;	// borrow
+	  if (C1.w[1] >= 0x8000000000000000ull) {	// negative coefficient!
+	    C1.w[0] = ~C1.w[0];
+	    C1.w[0]++;
+	    C1.w[1] = ~C1.w[1];
+	    if (C1.w[0] == 0x0)
+	      C1.w[1]++;
+	    tmp_sign = y_sign;	// the result will have the sign of y
+	  } else {
+	    tmp_sign = x_sign;
+	  }
+	  // the difference has exactly P34 digits
+	  x_sign = tmp_sign;
+	  if (x1 >= 1)
+	    y_exp = y_exp + ((UINT64) x1 << 49);
+	  C1_hi = C1.w[1];
+	  C1_lo = C1.w[0];
+	  // general correction from RN to RA, RM, RP, RZ; result uses y_exp
+	  if (rnd_mode != ROUNDING_TO_NEAREST) {
+	    if ((!x_sign
+		 && ((rnd_mode == ROUNDING_UP && is_inexact_lt_midpoint)
+		     ||
+		     ((rnd_mode == ROUNDING_TIES_AWAY
+		       || rnd_mode == ROUNDING_UP)
+		      && is_midpoint_gt_even))) || (x_sign
+						    &&
+						    ((rnd_mode ==
+						      ROUNDING_DOWN
+						      &&
+						      is_inexact_lt_midpoint)
+						     ||
+						     ((rnd_mode ==
+						       ROUNDING_TIES_AWAY
+						       || rnd_mode ==
+						       ROUNDING_DOWN)
+						      &&
+						      is_midpoint_gt_even))))
+	    {
+	      // C1 = C1 + 1
+	      C1_lo = C1_lo + 1;
+	      if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		C1_hi = C1_hi + 1;
+	      }
+	      if (C1_hi == 0x0001ed09bead87c0ull
+		  && C1_lo == 0x378d8e6400000000ull) {
+		// C1 = 10^34 => rounding overflow
+		C1_hi = 0x0000314dc6448d93ull;
+		C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		y_exp = y_exp + EXP_P1;
+	      }
+	    } else if ((is_midpoint_lt_even || is_inexact_gt_midpoint)
+		       &&
+		       ((x_sign
+			 && (rnd_mode == ROUNDING_UP
+			     || rnd_mode == ROUNDING_TO_ZERO))
+			|| (!x_sign
+			    && (rnd_mode == ROUNDING_DOWN
+				|| rnd_mode == ROUNDING_TO_ZERO)))) {
+	      // C1 = C1 - 1
+	      C1_lo = C1_lo - 1;
+	      if (C1_lo == 0xffffffffffffffffull)
+		C1_hi--;
+	      // check if we crossed into the lower decade
+	      if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		C1_lo = 0x378d8e63ffffffffull;
+		y_exp = y_exp - EXP_P1;
+		// no underflow, because delta + q2 >= P34 + 1
+	      }
+	    } else {
+	      ;	// exact, the result is already correct
+	    }
+	  }
+	  // assemble the result
+	  res.w[1] = x_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	}
+      }	// end delta = P34
+    } else {	// if (|delta| <= P34 - 1)
+      if (delta >= 0) {	// if (0 <= delta <= P34 - 1)
+	if (delta <= P34 - 1 - q2) {
+	  // calculate C' directly; the result is exact
+	  // in this case 1<=q1<=P34-1, 1<=q2<=P34-1 and 0 <= e1-e2 <= P34-2
+	  // The coefficient of the result is C1 * 10^(e1-e2) + C2 and the
+	  // exponent is e2; either C1 or 10^(e1-e2) may not fit is 64 bits,
+	  // but their product fits with certainty in 128 bits (actually in 113)
+	  scale = delta - q1 + q2;	// scale = (int)(e1 >> 49) - (int)(e2 >> 49) 
+
+	  if (scale >= 20) {	// 10^(e1-e2) does not fit in 64 bits, but C1 does
+	    __mul_128x64_to_128 (C1, C1_lo, ten2k128[scale - 20]);
+	    C1_hi = C1.w[1];
+	    C1_lo = C1.w[0];
+	  } else if (scale >= 1) {
+	    // if 1 <= scale <= 19 then 10^(e1-e2) fits in 64 bits 
+	    if (q1 <= 19) {	// C1 fits in 64 bits
+	      __mul_64x64_to_128MACH (C1, C1_lo, ten2k64[scale]);
+	    } else {	// q1 >= 20
+	      C1.w[1] = C1_hi;
+	      C1.w[0] = C1_lo;
+	      __mul_128x64_to_128 (C1, ten2k64[scale], C1);
+	    }
+	    C1_hi = C1.w[1];
+	    C1_lo = C1.w[0];
+	  } else {	// if (scale == 0) C1 is unchanged
+	    C1.w[0] = C1_lo;	// C1.w[1] = C1_hi; 
+	  }
+	  // now add C2
+	  if (x_sign == y_sign) {
+	    // the result cannot overflow
+	    C1_lo = C1_lo + C2_lo;
+	    C1_hi = C1_hi + C2_hi;
+	    if (C1_lo < C1.w[0])
+	      C1_hi++;
+	  } else {	// if x_sign != y_sign
+	    C1_lo = C1_lo - C2_lo;
+	    C1_hi = C1_hi - C2_hi;
+	    if (C1_lo > C1.w[0])
+	      C1_hi--;
+	    // the result can be zero, but it cannot overflow
+	    if (C1_lo == 0 && C1_hi == 0) {
+	      // assemble the result
+	      if (x_exp < y_exp)
+		res.w[1] = x_exp;
+	      else
+		res.w[1] = y_exp;
+	      res.w[0] = 0;
+	      if (rnd_mode == ROUNDING_DOWN) {
+		res.w[1] |= 0x8000000000000000ull;
+	      }
+	      BID_SWAP128 (res);
+	      BID_RETURN (res);
+	    }
+	    if (C1_hi >= 0x8000000000000000ull) {	// negative coefficient!
+	      C1_lo = ~C1_lo;
+	      C1_lo++;
+	      C1_hi = ~C1_hi;
+	      if (C1_lo == 0x0)
+		C1_hi++;
+	      x_sign = y_sign;	// the result will have the sign of y
+	    }
+	  }
+	  // assemble the result
+	  res.w[1] = x_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	} else if (delta == P34 - q2) {
+	  // calculate C' directly; the result may be inexact if it requires 
+	  // P34+1 decimal digits; in this case the 'cutoff' point for addition
+	  // is at the position of the lsb of C2, so 0 <= e1-e2 <= P34-1
+	  // The coefficient of the result is C1 * 10^(e1-e2) + C2 and the
+	  // exponent is e2; either C1 or 10^(e1-e2) may not fit is 64 bits,
+	  // but their product fits with certainty in 128 bits (actually in 113)
+	  scale = delta - q1 + q2;	// scale = (int)(e1 >> 49) - (int)(e2 >> 49)
+	  if (scale >= 20) {	// 10^(e1-e2) does not fit in 64 bits, but C1 does
+	    __mul_128x64_to_128 (C1, C1_lo, ten2k128[scale - 20]);
+	  } else if (scale >= 1) {
+	    // if 1 <= scale <= 19 then 10^(e1-e2) fits in 64 bits
+	    if (q1 <= 19) {	// C1 fits in 64 bits
+	      __mul_64x64_to_128MACH (C1, C1_lo, ten2k64[scale]);
+	    } else {	// q1 >= 20
+	      C1.w[1] = C1_hi;
+	      C1.w[0] = C1_lo;
+	      __mul_128x64_to_128 (C1, ten2k64[scale], C1);
+	    }
+	  } else {	// if (scale == 0) C1 is unchanged
+	    C1.w[1] = C1_hi;
+	    C1.w[0] = C1_lo;	// only the low part is necessary
+	  }
+	  C1_hi = C1.w[1];
+	  C1_lo = C1.w[0];
+	  // now add C2
+	  if (x_sign == y_sign) {
+	    // the result can overflow!
+	    C1_lo = C1_lo + C2_lo;
+	    C1_hi = C1_hi + C2_hi;
+	    if (C1_lo < C1.w[0])
+	      C1_hi++;
+	    // test for overflow, possible only when C1 >= 10^34
+	    if (C1_hi > 0x0001ed09bead87c0ull || (C1_hi == 0x0001ed09bead87c0ull && C1_lo >= 0x378d8e6400000000ull)) {	// C1 >= 10^34
+	      // in this case q = P34 + 1 and x = q - P34 = 1, so multiply 
+	      // C'' = C'+ 5 = C1 + 5 by k1 ~ 10^(-1) calculated for P34 + 1 
+	      // decimal digits
+	      // Calculate C'' = C' + 1/2 * 10^x
+	      if (C1_lo >= 0xfffffffffffffffbull) {	// low half add has carry
+		C1_lo = C1_lo + 5;
+		C1_hi = C1_hi + 1;
+	      } else {
+		C1_lo = C1_lo + 5;
+	      }
+	      // the approximation of 10^(-1) was rounded up to 118 bits
+	      // 10^(-1) =~ 33333333333333333333333333333400 * 2^-129
+	      // 10^(-1) =~ 19999999999999999999999999999a00 * 2^-128
+	      C1.w[1] = C1_hi;
+	      C1.w[0] = C1_lo;	// C''
+	      ten2m1.w[1] = 0x1999999999999999ull;
+	      ten2m1.w[0] = 0x9999999999999a00ull;
+	      __mul_128x128_to_256 (P256, C1, ten2m1);	// P256 = C*, f*
+	      // C* is actually floor(C*) in this case
+	      // the top Ex = 128 bits of 10^(-1) are 
+	      // T* = 0x00199999999999999999999999999999
+	      // if (0 < f* < 10^(-x)) then
+	      //   if floor(C*) is even then C = floor(C*) - logical right 
+	      //       shift; C has p decimal digits, correct by Prop. 1)
+	      //   else if floor(C*) is odd C = floor(C*) - 1 (logical right
+	      //       shift; C has p decimal digits, correct by Pr. 1)
+	      // else
+	      //   C = floor(C*) (logical right shift; C has p decimal digits,
+	      //       correct by Property 1)
+	      // n = C * 10^(e2+x)
+	      if ((P256.w[1] || P256.w[0])
+		  && (P256.w[1] < 0x1999999999999999ull
+		      || (P256.w[1] == 0x1999999999999999ull
+			  && P256.w[0] <= 0x9999999999999999ull))) {
+		// the result is a midpoint
+		if (P256.w[2] & 0x01) {
+		  is_midpoint_gt_even = 1;
+		  // if floor(C*) is odd C = floor(C*) - 1; the result is not 0
+		  P256.w[2]--;
+		  if (P256.w[2] == 0xffffffffffffffffull)
+		    P256.w[3]--;
+		} else {
+		  is_midpoint_lt_even = 1;
+		}
+	      }
+	      // n = Cstar * 10^(e2+1)
+	      y_exp = y_exp + EXP_P1;
+	      // C* != 10^P because C* has P34 digits
+	      // check for overflow
+	      if (y_exp == EXP_MAX_P1
+		  && (rnd_mode == ROUNDING_TO_NEAREST
+		      || rnd_mode == ROUNDING_TIES_AWAY)) {
+		// overflow for RN
+		res.w[1] = x_sign | 0x7800000000000000ull;	// +/-inf
+		res.w[0] = 0x0ull;
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		// set the overflow flag
+		*pfpsf |= OVERFLOW_EXCEPTION;
+		BID_SWAP128 (res);
+		BID_RETURN (res);
+	      }
+	      // if (0 < f* - 1/2 < 10^(-x)) then 
+	      //   the result of the addition is exact 
+	      // else 
+	      //   the result of the addition is inexact
+	      if (P256.w[1] > 0x8000000000000000ull || (P256.w[1] == 0x8000000000000000ull && P256.w[0] > 0x0ull)) {	// the result may be exact
+		tmp64 = P256.w[1] - 0x8000000000000000ull;	// f* - 1/2
+		if ((tmp64 > 0x1999999999999999ull
+		     || (tmp64 == 0x1999999999999999ull
+			 && P256.w[0] >= 0x9999999999999999ull))) {
+		  // set the inexact flag
+		  *pfpsf |= INEXACT_EXCEPTION;
+		  is_inexact = 1;
+		}	// else the result is exact
+	      } else {	// the result is inexact
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		is_inexact = 1;
+	      }
+	      C1_hi = P256.w[3];
+	      C1_lo = P256.w[2];
+	      if (!is_midpoint_gt_even && !is_midpoint_lt_even) {
+		is_inexact_lt_midpoint = is_inexact
+		  && (P256.w[1] & 0x8000000000000000ull);
+		is_inexact_gt_midpoint = is_inexact
+		  && !(P256.w[1] & 0x8000000000000000ull);
+	      }
+	      // general correction from RN to RA, RM, RP, RZ; 
+	      // result uses y_exp
+	      if (rnd_mode != ROUNDING_TO_NEAREST) {
+		if ((!x_sign
+		     &&
+		     ((rnd_mode == ROUNDING_UP
+		       && is_inexact_lt_midpoint)
+		      ||
+		      ((rnd_mode == ROUNDING_TIES_AWAY
+			|| rnd_mode == ROUNDING_UP)
+		       && is_midpoint_gt_even))) || (x_sign
+						     &&
+						     ((rnd_mode ==
+						       ROUNDING_DOWN
+						       &&
+						       is_inexact_lt_midpoint)
+						      ||
+						      ((rnd_mode ==
+							ROUNDING_TIES_AWAY
+							|| rnd_mode ==
+							ROUNDING_DOWN)
+						       &&
+						       is_midpoint_gt_even))))
+		{
+		  // C1 = C1 + 1
+		  C1_lo = C1_lo + 1;
+		  if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		    C1_hi = C1_hi + 1;
+		  }
+		  if (C1_hi == 0x0001ed09bead87c0ull
+		      && C1_lo == 0x378d8e6400000000ull) {
+		    // C1 = 10^34 => rounding overflow
+		    C1_hi = 0x0000314dc6448d93ull;
+		    C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		    y_exp = y_exp + EXP_P1;
+		  }
+		} else
+		  if ((is_midpoint_lt_even || is_inexact_gt_midpoint)
+		      &&
+		      ((x_sign
+			&& (rnd_mode == ROUNDING_UP
+			    || rnd_mode == ROUNDING_TO_ZERO))
+		       || (!x_sign
+			   && (rnd_mode == ROUNDING_DOWN
+			       || rnd_mode == ROUNDING_TO_ZERO)))) {
+		  // C1 = C1 - 1
+		  C1_lo = C1_lo - 1;
+		  if (C1_lo == 0xffffffffffffffffull)
+		    C1_hi--;
+		  // check if we crossed into the lower decade
+		  if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		    C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		    C1_lo = 0x378d8e63ffffffffull;
+		    y_exp = y_exp - EXP_P1;
+		    // no underflow, because delta + q2 >= P34 + 1
+		  }
+		} else {
+		  ;	// exact, the result is already correct
+		}
+		// in all cases check for overflow (RN and RA solved already)
+		if (y_exp == EXP_MAX_P1) {	// overflow
+		  if ((rnd_mode == ROUNDING_DOWN && x_sign) ||	// RM and res < 0
+		      (rnd_mode == ROUNDING_UP && !x_sign)) {	// RP and res > 0
+		    C1_hi = 0x7800000000000000ull;	// +inf
+		    C1_lo = 0x0ull;
+		  } else {	// RM and res > 0, RP and res < 0, or RZ
+		    C1_hi = 0x5fffed09bead87c0ull;
+		    C1_lo = 0x378d8e63ffffffffull;
+		  }
+		  y_exp = 0;	// x_sign is preserved
+		  // set the inexact flag (in case the exact addition was exact)
+		  *pfpsf |= INEXACT_EXCEPTION;
+		  // set the overflow flag
+		  *pfpsf |= OVERFLOW_EXCEPTION;
+		}
+	      }
+	    }	// else if (C1 < 10^34) then C1 is the coeff.; the result is exact
+	  } else {	// if x_sign != y_sign the result is exact
+	    C1_lo = C1_lo - C2_lo;
+	    C1_hi = C1_hi - C2_hi;
+	    if (C1_lo > C1.w[0])
+	      C1_hi--;
+	    // the result can be zero, but it cannot overflow
+	    if (C1_lo == 0 && C1_hi == 0) {
+	      // assemble the result
+	      if (x_exp < y_exp)
+		res.w[1] = x_exp;
+	      else
+		res.w[1] = y_exp;
+	      res.w[0] = 0;
+	      if (rnd_mode == ROUNDING_DOWN) {
+		res.w[1] |= 0x8000000000000000ull;
+	      }
+	      BID_SWAP128 (res);
+	      BID_RETURN (res);
+	    }
+	    if (C1_hi >= 0x8000000000000000ull) {	// negative coefficient!
+	      C1_lo = ~C1_lo;
+	      C1_lo++;
+	      C1_hi = ~C1_hi;
+	      if (C1_lo == 0x0)
+		C1_hi++;
+	      x_sign = y_sign;	// the result will have the sign of y
+	    }
+	  }
+	  // assemble the result
+	  res.w[1] = x_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	} else {	// if (delta >= P34 + 1 - q2)
+	  // instead of C' = (C1 * 10^(e1-e2) + C2)rnd,P34
+	  // calculate C' = C1 * 10^(e1-e2-x1) + (C2 * 10^(-x1))rnd,P34 
+	  // where x1 = q1 + e1 - e2 - P34, 1 <= x1 <= P34 - 1
+	  // In most cases C' will have P34 digits, and n = C' * 10^(e2+x1)
+	  // If the result has P34+1 digits, redo the steps above with x1+1
+	  // If the result has P34-1 digits or less, redo the steps above with 
+	  // x1-1 but only if initially x1 >= 1
+	  // NOTE: these two steps can be improved, e.g we could guess if
+	  // P34+1 or P34-1 digits will be obtained by adding/subtracting just
+	  // the top 64 bits of the two operands
+	  // The result cannot be zero, but it can overflow
+	  x1 = delta + q2 - P34;	// 1 <= x1 <= P34-1
+	roundC2:
+	  // Calculate C1 * 10^(e1-e2-x1) where 0 <= e1-e2-x1 <= P34 - 1
+	  // scale = (int)(e1 >> 49) - (int)(e2 >> 49) - x1; 0 <= scale <= P34-1
+	  scale = delta - q1 + q2 - x1;	// scale = e1 - e2 - x1 = P34 - q1
+	  // either C1 or 10^(e1-e2-x1) may not fit is 64 bits,
+	  // but their product fits with certainty in 128 bits (actually in 113)
+	  if (scale >= 20) {	//10^(e1-e2-x1) doesn't fit in 64 bits, but C1 does
+	    __mul_128x64_to_128 (C1, C1_lo, ten2k128[scale - 20]);
+	  } else if (scale >= 1) {
+	    // if 1 <= scale <= 19 then 10^(e1-e2-x1) fits in 64 bits
+	    if (q1 <= 19) {	// C1 fits in 64 bits
+	      __mul_64x64_to_128MACH (C1, C1_lo, ten2k64[scale]);
+	    } else {	// q1 >= 20
+	      C1.w[1] = C1_hi;
+	      C1.w[0] = C1_lo;
+	      __mul_128x64_to_128 (C1, ten2k64[scale], C1);
+	    }
+	  } else {	// if (scale == 0) C1 is unchanged
+	    C1.w[1] = C1_hi;
+	    C1.w[0] = C1_lo;
+	  }
+	  tmp64 = C1.w[0];	// C1.w[1], C1.w[0] contains C1 * 10^(e1-e2-x1)
+
+	  // now round C2 to q2-x1 decimal digits, where 1<=x1<=q2-1<=P34-1
+	  // (but if we got here a second time after x1 = x1 - 1, then 
+	  // x1 >= 0; note that for x1 = 0 C2 is unchanged)
+	  // C2' = C2 + 1/2 * 10^x1 = C2 + 5 * 10^(x1-1)
+	  ind = x1 - 1;	// 0 <= ind <= q2-2<=P34-2=32; but note that if x1 = 0
+	  // during a second pass, then ind = -1
+	  if (ind >= 0) {	// if (x1 >= 1)
+	    C2.w[0] = C2_lo;
+	    C2.w[1] = C2_hi;
+	    if (ind <= 18) {
+	      C2.w[0] = C2.w[0] + midpoint64[ind];
+	      if (C2.w[0] < C2_lo)
+		C2.w[1]++;
+	    } else {	// 19 <= ind <= 32
+	      C2.w[0] = C2.w[0] + midpoint128[ind - 19].w[0];
+	      C2.w[1] = C2.w[1] + midpoint128[ind - 19].w[1];
+	      if (C2.w[0] < C2_lo)
+		C2.w[1]++;
+	    }
+	    // the approximation of 10^(-x1) was rounded up to 118 bits
+	    __mul_128x128_to_256 (R256, C2, ten2mk128[ind]);	// R256 = C2*, f2*
+	    // calculate C2* and f2*
+	    // C2* is actually floor(C2*) in this case
+	    // C2* and f2* need shifting and masking, as shown by
+	    // shiftright128[] and maskhigh128[]
+	    // the top Ex bits of 10^(-x1) are T* = ten2mk128trunc[ind], e.g.
+	    // if x1=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+	    // if (0 < f2* < 10^(-x1)) then
+	    //   if floor(C1+C2*) is even then C2* = floor(C2*) - logical right
+	    //       shift; C2* has p decimal digits, correct by Prop. 1)
+	    //   else if floor(C1+C2*) is odd C2* = floor(C2*)-1 (logical right
+	    //       shift; C2* has p decimal digits, correct by Pr. 1)
+	    // else
+	    //   C2* = floor(C2*) (logical right shift; C has p decimal digits,
+	    //       correct by Property 1)
+	    // n = C2* * 10^(e2+x1)
+
+	    if (ind <= 2) {
+	      highf2star.w[1] = 0x0;
+	      highf2star.w[0] = 0x0;	// low f2* ok
+	    } else if (ind <= 21) {
+	      highf2star.w[1] = 0x0;
+	      highf2star.w[0] = R256.w[2] & maskhigh128[ind];	// low f2* ok
+	    } else {
+	      highf2star.w[1] = R256.w[3] & maskhigh128[ind];
+	      highf2star.w[0] = R256.w[2];	// low f2* is ok
+	    }
+	    // shift right C2* by Ex-128 = shiftright128[ind]
+	    if (ind >= 3) {
+	      shift = shiftright128[ind];
+	      if (shift < 64) {	// 3 <= shift <= 63
+		R256.w[2] =
+		  (R256.w[2] >> shift) | (R256.w[3] << (64 - shift));
+		R256.w[3] = (R256.w[3] >> shift);
+	      } else {	// 66 <= shift <= 102
+		R256.w[2] = (R256.w[3] >> (shift - 64));
+		R256.w[3] = 0x0ULL;
+	      }
+	    }
+	    if (second_pass) {
+	      is_inexact_lt_midpoint = 0;
+	      is_inexact_gt_midpoint = 0;
+	      is_midpoint_lt_even = 0;
+	      is_midpoint_gt_even = 0;
+	    }
+	    // determine inexactness of the rounding of C2* (this may be 
+	    // followed by a second rounding only if we get P34+1 
+	    // decimal digits)
+	    // if (0 < f2* - 1/2 < 10^(-x1)) then
+	    //   the result is exact
+	    // else (if f2* - 1/2 > T* then)
+	    //   the result of is inexact
+	    if (ind <= 2) {
+	      if (R256.w[1] > 0x8000000000000000ull ||
+		  (R256.w[1] == 0x8000000000000000ull
+		   && R256.w[0] > 0x0ull)) {
+		// f2* > 1/2 and the result may be exact
+		tmp64A = R256.w[1] - 0x8000000000000000ull;	// f* - 1/2
+		if ((tmp64A > ten2mk128trunc[ind].w[1]
+		     || (tmp64A == ten2mk128trunc[ind].w[1]
+			 && R256.w[0] >= ten2mk128trunc[ind].w[0]))) {
+		  // set the inexact flag
+		  // *pfpsf |= INEXACT_EXCEPTION;
+		  tmp_inexact = 1;	// may be set again during a second pass
+		  // this rounding is applied to C2 only!
+		  if (x_sign == y_sign)
+		    is_inexact_lt_midpoint = 1;
+		  else	// if (x_sign != y_sign)
+		    is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+		// rounding down, unless a midpoint in [ODD, EVEN]
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		// *pfpsf |= INEXACT_EXCEPTION;
+		tmp_inexact = 1;	// just in case we will round a second time
+		// rounding up, unless a midpoint in [EVEN, ODD]
+		// this rounding is applied to C2 only!
+		if (x_sign == y_sign)
+		  is_inexact_gt_midpoint = 1;
+		else	// if (x_sign != y_sign)
+		  is_inexact_lt_midpoint = 1;
+	      }
+	    } else if (ind <= 21) {	// if 3 <= ind <= 21
+	      if (highf2star.w[1] > 0x0 || (highf2star.w[1] == 0x0
+					    && highf2star.w[0] >
+					    onehalf128[ind])
+		  || (highf2star.w[1] == 0x0
+		      && highf2star.w[0] == onehalf128[ind]
+		      && (R256.w[1] || R256.w[0]))) {
+		// f2* > 1/2 and the result may be exact
+		// Calculate f2* - 1/2
+		tmp64A = highf2star.w[0] - onehalf128[ind];
+		tmp64B = highf2star.w[1];
+		if (tmp64A > highf2star.w[0])
+		  tmp64B--;
+		if (tmp64B || tmp64A
+		    || R256.w[1] > ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] > ten2mk128trunc[ind].w[0])) {
+		  // set the inexact flag
+		  // *pfpsf |= INEXACT_EXCEPTION;
+		  tmp_inexact = 1;	// may be set again during a second pass
+		  // this rounding is applied to C2 only!
+		  if (x_sign == y_sign)
+		    is_inexact_lt_midpoint = 1;
+		  else	// if (x_sign != y_sign)
+		    is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		// *pfpsf |= INEXACT_EXCEPTION;
+		tmp_inexact = 1;	// may be set again during a second pass
+		// rounding up, unless a midpoint in [EVEN, ODD]
+		// this rounding is applied to C2 only!
+		if (x_sign == y_sign)
+		  is_inexact_gt_midpoint = 1;
+		else	// if (x_sign != y_sign)
+		  is_inexact_lt_midpoint = 1;
+	      }
+	    } else {	// if 22 <= ind <= 33
+	      if (highf2star.w[1] > onehalf128[ind]
+		  || (highf2star.w[1] == onehalf128[ind]
+		      && (highf2star.w[0] || R256.w[1]
+			  || R256.w[0]))) {
+		// f2* > 1/2 and the result may be exact
+		// Calculate f2* - 1/2
+		// tmp64A = highf2star.w[0];
+		tmp64B = highf2star.w[1] - onehalf128[ind];
+		if (tmp64B || highf2star.w[0]
+		    || R256.w[1] > ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] > ten2mk128trunc[ind].w[0])) {
+		  // set the inexact flag
+		  // *pfpsf |= INEXACT_EXCEPTION;
+		  tmp_inexact = 1;	// may be set again during a second pass
+		  // this rounding is applied to C2 only!
+		  if (x_sign == y_sign)
+		    is_inexact_lt_midpoint = 1;
+		  else	// if (x_sign != y_sign)
+		    is_inexact_gt_midpoint = 1;
+		}	// else the result is exact
+	      } else {	// the result is inexact; f2* <= 1/2
+		// set the inexact flag
+		// *pfpsf |= INEXACT_EXCEPTION;
+		tmp_inexact = 1;	// may be set again during a second pass
+		// rounding up, unless a midpoint in [EVEN, ODD]
+		// this rounding is applied to C2 only!
+		if (x_sign == y_sign)
+		  is_inexact_gt_midpoint = 1;
+		else	// if (x_sign != y_sign)
+		  is_inexact_lt_midpoint = 1;
+	      }
+	    }
+	    // check for midpoints
+	    if ((R256.w[1] || R256.w[0]) && (highf2star.w[1] == 0)
+		&& (highf2star.w[0] == 0)
+		&& (R256.w[1] < ten2mk128trunc[ind].w[1]
+		    || (R256.w[1] == ten2mk128trunc[ind].w[1]
+			&& R256.w[0] <= ten2mk128trunc[ind].w[0]))) {
+	      // the result is a midpoint
+	      if ((tmp64 + R256.w[2]) & 0x01) {	// MP in [EVEN, ODD]
+		// if floor(C2*) is odd C = floor(C2*) - 1; the result may be 0
+		R256.w[2]--;
+		if (R256.w[2] == 0xffffffffffffffffull)
+		  R256.w[3]--;
+		// this rounding is applied to C2 only!
+		if (x_sign == y_sign)
+		  is_midpoint_gt_even = 1;
+		else	// if (x_sign != y_sign)
+		  is_midpoint_lt_even = 1;
+		is_inexact_lt_midpoint = 0;
+		is_inexact_gt_midpoint = 0;
+	      } else {
+		// else MP in [ODD, EVEN]
+		// this rounding is applied to C2 only!
+		if (x_sign == y_sign)
+		  is_midpoint_lt_even = 1;
+		else	// if (x_sign != y_sign)
+		  is_midpoint_gt_even = 1;
+		is_inexact_lt_midpoint = 0;
+		is_inexact_gt_midpoint = 0;
+	      }
+	    }
+	    // end if (ind >= 0)
+	  } else {	// if (ind == -1); only during a 2nd pass, and when x1 = 0
+	    R256.w[2] = C2_lo;
+	    R256.w[3] = C2_hi;
+	    tmp_inexact = 0;
+	    // to correct a possible setting to 1 from 1st pass
+	    if (second_pass) {
+	      is_midpoint_lt_even = 0;
+	      is_midpoint_gt_even = 0;
+	      is_inexact_lt_midpoint = 0;
+	      is_inexact_gt_midpoint = 0;
+	    }
+	  }
+	  // and now add/subtract C1 * 10^(e1-e2-x1) +/- (C2 * 10^(-x1))rnd,P34
+	  if (x_sign == y_sign) {	// addition; could overflow
+	    // no second pass is possible this way (only for x_sign != y_sign)
+	    C1.w[0] = C1.w[0] + R256.w[2];
+	    C1.w[1] = C1.w[1] + R256.w[3];
+	    if (C1.w[0] < tmp64)
+	      C1.w[1]++;	// carry
+	    // if the sum has P34+1 digits, i.e. C1>=10^34 redo the calculation
+	    // with x1=x1+1 
+	    if (C1.w[1] > 0x0001ed09bead87c0ull || (C1.w[1] == 0x0001ed09bead87c0ull && C1.w[0] >= 0x378d8e6400000000ull)) {	// C1 >= 10^34
+	      // chop off one more digit from the sum, but make sure there is
+	      // no double-rounding error (see table - double rounding logic)
+	      // now round C1 from P34+1 to P34 decimal digits
+	      // C1' = C1 + 1/2 * 10 = C1 + 5
+	      if (C1.w[0] >= 0xfffffffffffffffbull) {	// low half add has carry
+		C1.w[0] = C1.w[0] + 5;
+		C1.w[1] = C1.w[1] + 1;
+	      } else {
+		C1.w[0] = C1.w[0] + 5;
+	      }
+	      // the approximation of 10^(-1) was rounded up to 118 bits
+	      __mul_128x128_to_256 (Q256, C1, ten2mk128[0]);	// Q256 = C1*, f1*
+	      // C1* is actually floor(C1*) in this case
+	      // the top 128 bits of 10^(-1) are
+	      // T* = ten2mk128trunc[0]=0x19999999999999999999999999999999
+	      // if (0 < f1* < 10^(-1)) then
+	      //   if floor(C1*) is even then C1* = floor(C1*) - logical right
+	      //       shift; C1* has p decimal digits, correct by Prop. 1)
+	      //   else if floor(C1*) is odd C1* = floor(C1*) - 1 (logical right
+	      //       shift; C1* has p decimal digits, correct by Pr. 1)
+	      // else
+	      //   C1* = floor(C1*) (logical right shift; C has p decimal digits
+	      //       correct by Property 1)
+	      // n = C1* * 10^(e2+x1+1)
+	      if ((Q256.w[1] || Q256.w[0])
+		  && (Q256.w[1] < ten2mk128trunc[0].w[1]
+		      || (Q256.w[1] == ten2mk128trunc[0].w[1]
+			  && Q256.w[0] <= ten2mk128trunc[0].w[0]))) {
+		// the result is a midpoint
+		if (is_inexact_lt_midpoint) {	// for the 1st rounding
+		  is_inexact_gt_midpoint = 1;
+		  is_inexact_lt_midpoint = 0;
+		  is_midpoint_gt_even = 0;
+		  is_midpoint_lt_even = 0;
+		} else if (is_inexact_gt_midpoint) {	// for the 1st rounding
+		  Q256.w[2]--;
+		  if (Q256.w[2] == 0xffffffffffffffffull)
+		    Q256.w[3]--;
+		  is_inexact_gt_midpoint = 0;
+		  is_inexact_lt_midpoint = 1;
+		  is_midpoint_gt_even = 0;
+		  is_midpoint_lt_even = 0;
+		} else if (is_midpoint_gt_even) {	// for the 1st rounding
+		  // Note: cannot have is_midpoint_lt_even
+		  is_inexact_gt_midpoint = 0;
+		  is_inexact_lt_midpoint = 1;
+		  is_midpoint_gt_even = 0;
+		  is_midpoint_lt_even = 0;
+		} else {	// the first rounding must have been exact
+		  if (Q256.w[2] & 0x01) {	// MP in [EVEN, ODD]
+		    // the truncated result is correct
+		    Q256.w[2]--;
+		    if (Q256.w[2] == 0xffffffffffffffffull)
+		      Q256.w[3]--;
+		    is_inexact_gt_midpoint = 0;
+		    is_inexact_lt_midpoint = 0;
+		    is_midpoint_gt_even = 1;
+		    is_midpoint_lt_even = 0;
+		  } else {	// MP in [ODD, EVEN]
+		    is_inexact_gt_midpoint = 0;
+		    is_inexact_lt_midpoint = 0;
+		    is_midpoint_gt_even = 0;
+		    is_midpoint_lt_even = 1;
+		  }
+		}
+		tmp_inexact = 1;	// in all cases
+	      } else {	// the result is not a midpoint 
+		// determine inexactness of the rounding of C1 (the sum C1+C2*)
+		// if (0 < f1* - 1/2 < 10^(-1)) then
+		//   the result is exact
+		// else (if f1* - 1/2 > T* then)
+		//   the result of is inexact
+		// ind = 0
+		if (Q256.w[1] > 0x8000000000000000ull
+		    || (Q256.w[1] == 0x8000000000000000ull
+			&& Q256.w[0] > 0x0ull)) {
+		  // f1* > 1/2 and the result may be exact
+		  Q256.w[1] = Q256.w[1] - 0x8000000000000000ull;	// f1* - 1/2
+		  if ((Q256.w[1] > ten2mk128trunc[0].w[1]
+		       || (Q256.w[1] == ten2mk128trunc[0].w[1]
+			   && Q256.w[0] > ten2mk128trunc[0].w[0]))) {
+		    is_inexact_gt_midpoint = 0;
+		    is_inexact_lt_midpoint = 1;
+		    is_midpoint_gt_even = 0;
+		    is_midpoint_lt_even = 0;
+		    // set the inexact flag
+		    tmp_inexact = 1;
+		    // *pfpsf |= INEXACT_EXCEPTION;
+		  } else {	// else the result is exact for the 2nd rounding
+		    if (tmp_inexact) {	// if the previous rounding was inexact
+		      if (is_midpoint_lt_even) {
+			is_inexact_gt_midpoint = 1;
+			is_midpoint_lt_even = 0;
+		      } else if (is_midpoint_gt_even) {
+			is_inexact_lt_midpoint = 1;
+			is_midpoint_gt_even = 0;
+		      } else {
+			;	// no change
+		      }
+		    }
+		  }
+		  // rounding down, unless a midpoint in [ODD, EVEN]
+		} else {	// the result is inexact; f1* <= 1/2
+		  is_inexact_gt_midpoint = 1;
+		  is_inexact_lt_midpoint = 0;
+		  is_midpoint_gt_even = 0;
+		  is_midpoint_lt_even = 0;
+		  // set the inexact flag
+		  tmp_inexact = 1;
+		  // *pfpsf |= INEXACT_EXCEPTION;
+		}
+	      }	// end 'the result is not a midpoint'
+	      // n = C1 * 10^(e2+x1)
+	      C1.w[1] = Q256.w[3];
+	      C1.w[0] = Q256.w[2];
+	      y_exp = y_exp + ((UINT64) (x1 + 1) << 49);
+	    } else {	// C1 < 10^34
+	      // C1.w[1] and C1.w[0] already set
+	      // n = C1 * 10^(e2+x1)
+	      y_exp = y_exp + ((UINT64) x1 << 49);
+	    }
+	    // check for overflow
+	    if (y_exp == EXP_MAX_P1
+		&& (rnd_mode == ROUNDING_TO_NEAREST
+		    || rnd_mode == ROUNDING_TIES_AWAY)) {
+	      res.w[1] = 0x7800000000000000ull | x_sign;	// +/-inf
+	      res.w[0] = 0x0ull;
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // set the overflow flag
+	      *pfpsf |= OVERFLOW_EXCEPTION;
+	      BID_SWAP128 (res);
+	      BID_RETURN (res);
+	    }	// else no overflow
+	  } else {	// if x_sign != y_sign the result of this subtract. is exact
+	    C1.w[0] = C1.w[0] - R256.w[2];
+	    C1.w[1] = C1.w[1] - R256.w[3];
+	    if (C1.w[0] > tmp64)
+	      C1.w[1]--;	// borrow
+	    if (C1.w[1] >= 0x8000000000000000ull) {	// negative coefficient!
+	      C1.w[0] = ~C1.w[0];
+	      C1.w[0]++;
+	      C1.w[1] = ~C1.w[1];
+	      if (C1.w[0] == 0x0)
+		C1.w[1]++;
+	      tmp_sign = y_sign;
+	      // the result will have the sign of y if last rnd
+	    } else {
+	      tmp_sign = x_sign;
+	    }
+	    // if the difference has P34-1 digits or less, i.e. C1 < 10^33 then
+	    //   redo the calculation with x1=x1-1;
+	    // redo the calculation also if C1 = 10^33 and 
+	    //   (is_inexact_gt_midpoint or is_midpoint_lt_even);
+	    //   (the last part should have really been 
+	    //   (is_inexact_lt_midpoint or is_midpoint_gt_even) from
+	    //    the rounding of C2, but the position flags have been reversed)
+	    // 10^33 = 0x0000314dc6448d93 0x38c15b0a00000000
+	    if ((C1.w[1] < 0x0000314dc6448d93ull || (C1.w[1] == 0x0000314dc6448d93ull && C1.w[0] < 0x38c15b0a00000000ull)) || (C1.w[1] == 0x0000314dc6448d93ull && C1.w[0] == 0x38c15b0a00000000ull && (is_inexact_gt_midpoint || is_midpoint_lt_even))) {	// C1=10^33
+	      x1 = x1 - 1;	// x1 >= 0
+	      if (x1 >= 0) {
+		// clear position flags and tmp_inexact
+		is_midpoint_lt_even = 0;
+		is_midpoint_gt_even = 0;
+		is_inexact_lt_midpoint = 0;
+		is_inexact_gt_midpoint = 0;
+		tmp_inexact = 0;
+		second_pass = 1;
+		goto roundC2;	// else result has less than P34 digits
+	      }
+	    }
+	    // if the coefficient of the result is 10^34 it means that this
+	    // must be the second pass, and we are done 
+	    if (C1.w[1] == 0x0001ed09bead87c0ull && C1.w[0] == 0x378d8e6400000000ull) {	// if  C1 = 10^34
+	      C1.w[1] = 0x0000314dc6448d93ull;	// C1 = 10^33
+	      C1.w[0] = 0x38c15b0a00000000ull;
+	      y_exp = y_exp + ((UINT64) 1 << 49);
+	    }
+	    x_sign = tmp_sign;
+	    if (x1 >= 1)
+	      y_exp = y_exp + ((UINT64) x1 << 49);
+	    // x1 = -1 is possible at the end of a second pass when the 
+	    // first pass started with x1 = 1 
+	  }
+	  C1_hi = C1.w[1];
+	  C1_lo = C1.w[0];
+	  // general correction from RN to RA, RM, RP, RZ; result uses y_exp
+	  if (rnd_mode != ROUNDING_TO_NEAREST) {
+	    if ((!x_sign
+		 && ((rnd_mode == ROUNDING_UP && is_inexact_lt_midpoint)
+		     ||
+		     ((rnd_mode == ROUNDING_TIES_AWAY
+		       || rnd_mode == ROUNDING_UP)
+		      && is_midpoint_gt_even))) || (x_sign
+						    &&
+						    ((rnd_mode ==
+						      ROUNDING_DOWN
+						      &&
+						      is_inexact_lt_midpoint)
+						     ||
+						     ((rnd_mode ==
+						       ROUNDING_TIES_AWAY
+						       || rnd_mode ==
+						       ROUNDING_DOWN)
+						      &&
+						      is_midpoint_gt_even))))
+	    {
+	      // C1 = C1 + 1
+	      C1_lo = C1_lo + 1;
+	      if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		C1_hi = C1_hi + 1;
+	      }
+	      if (C1_hi == 0x0001ed09bead87c0ull
+		  && C1_lo == 0x378d8e6400000000ull) {
+		// C1 = 10^34 => rounding overflow
+		C1_hi = 0x0000314dc6448d93ull;
+		C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		y_exp = y_exp + EXP_P1;
+	      }
+	    } else if ((is_midpoint_lt_even || is_inexact_gt_midpoint)
+		       &&
+		       ((x_sign
+			 && (rnd_mode == ROUNDING_UP
+			     || rnd_mode == ROUNDING_TO_ZERO))
+			|| (!x_sign
+			    && (rnd_mode == ROUNDING_DOWN
+				|| rnd_mode == ROUNDING_TO_ZERO)))) {
+	      // C1 = C1 - 1
+	      C1_lo = C1_lo - 1;
+	      if (C1_lo == 0xffffffffffffffffull)
+		C1_hi--;
+	      // check if we crossed into the lower decade
+	      if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		C1_lo = 0x378d8e63ffffffffull;
+		y_exp = y_exp - EXP_P1;
+		// no underflow, because delta + q2 >= P34 + 1
+	      }
+	    } else {
+	      ;	// exact, the result is already correct
+	    }
+	    // in all cases check for overflow (RN and RA solved already)
+	    if (y_exp == EXP_MAX_P1) {	// overflow
+	      if ((rnd_mode == ROUNDING_DOWN && x_sign) ||	// RM and res < 0
+		  (rnd_mode == ROUNDING_UP && !x_sign)) {	// RP and res > 0
+		C1_hi = 0x7800000000000000ull;	// +inf
+		C1_lo = 0x0ull;
+	      } else {	// RM and res > 0, RP and res < 0, or RZ
+		C1_hi = 0x5fffed09bead87c0ull;
+		C1_lo = 0x378d8e63ffffffffull;
+	      }
+	      y_exp = 0;	// x_sign is preserved
+	      // set the inexact flag (in case the exact addition was exact)
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // set the overflow flag
+	      *pfpsf |= OVERFLOW_EXCEPTION;
+	    }
+	  }
+	  // assemble the result
+	  res.w[1] = x_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	  if (tmp_inexact)
+	    *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if (-P34 + 1 <= delta <= -1) <=> 1 <= -delta <= P34 - 1
+	// NOTE: the following, up to "} else { // if x_sign != y_sign 
+	// the result is exact" is identical to "else if (delta == P34 - q2) {"
+	// from above; also, the code is not symmetric: a+b and b+a may take
+	// different paths (need to unify eventually!) 
+	// calculate C' = C2 + C1 * 10^(e1-e2) directly; the result may be 
+	// inexact if it requires P34 + 1 decimal digits; in either case the 
+	// 'cutoff' point for addition is at the position of the lsb of C2
+	// The coefficient of the result is C1 * 10^(e1-e2) + C2 and the
+	// exponent is e2; either C1 or 10^(e1-e2) may not fit is 64 bits,
+	// but their product fits with certainty in 128 bits (actually in 113)
+	// Note that 0 <= e1 - e2 <= P34 - 2
+	//   -P34 + 1 <= delta <= -1 <=> -P34 + 1 <= delta <= -1 <=>
+	//   -P34 + 1 <= q1 + e1 - q2 - e2 <= -1 <=>
+	//   q2 - q1 - P34 + 1 <= e1 - e2 <= q2 - q1 - 1 <=>
+	//   1 - P34 - P34 + 1 <= e1-e2 <= P34 - 1 - 1 => 0 <= e1-e2 <= P34 - 2
+	scale = delta - q1 + q2;	// scale = (int)(e1 >> 49) - (int)(e2 >> 49)
+	if (scale >= 20) {	// 10^(e1-e2) does not fit in 64 bits, but C1 does
+	  __mul_128x64_to_128 (C1, C1_lo, ten2k128[scale - 20]);
+	} else if (scale >= 1) {
+	  // if 1 <= scale <= 19 then 10^(e1-e2) fits in 64 bits
+	  if (q1 <= 19) {	// C1 fits in 64 bits
+	    __mul_64x64_to_128MACH (C1, C1_lo, ten2k64[scale]);
+	  } else {	// q1 >= 20
+	    C1.w[1] = C1_hi;
+	    C1.w[0] = C1_lo;
+	    __mul_128x64_to_128 (C1, ten2k64[scale], C1);
+	  }
+	} else {	// if (scale == 0) C1 is unchanged
+	  C1.w[1] = C1_hi;
+	  C1.w[0] = C1_lo;	// only the low part is necessary
+	}
+	C1_hi = C1.w[1];
+	C1_lo = C1.w[0];
+	// now add C2
+	if (x_sign == y_sign) {
+	  // the result can overflow!
+	  C1_lo = C1_lo + C2_lo;
+	  C1_hi = C1_hi + C2_hi;
+	  if (C1_lo < C1.w[0])
+	    C1_hi++;
+	  // test for overflow, possible only when C1 >= 10^34
+	  if (C1_hi > 0x0001ed09bead87c0ull || (C1_hi == 0x0001ed09bead87c0ull && C1_lo >= 0x378d8e6400000000ull)) {	// C1 >= 10^34
+	    // in this case q = P34 + 1 and x = q - P34 = 1, so multiply 
+	    // C'' = C'+ 5 = C1 + 5 by k1 ~ 10^(-1) calculated for P34 + 1 
+	    // decimal digits
+	    // Calculate C'' = C' + 1/2 * 10^x
+	    if (C1_lo >= 0xfffffffffffffffbull) {	// low half add has carry
+	      C1_lo = C1_lo + 5;
+	      C1_hi = C1_hi + 1;
+	    } else {
+	      C1_lo = C1_lo + 5;
+	    }
+	    // the approximation of 10^(-1) was rounded up to 118 bits
+	    // 10^(-1) =~ 33333333333333333333333333333400 * 2^-129
+	    // 10^(-1) =~ 19999999999999999999999999999a00 * 2^-128
+	    C1.w[1] = C1_hi;
+	    C1.w[0] = C1_lo;	// C''
+	    ten2m1.w[1] = 0x1999999999999999ull;
+	    ten2m1.w[0] = 0x9999999999999a00ull;
+	    __mul_128x128_to_256 (P256, C1, ten2m1);	// P256 = C*, f*
+	    // C* is actually floor(C*) in this case
+	    // the top Ex = 128 bits of 10^(-1) are 
+	    // T* = 0x00199999999999999999999999999999
+	    // if (0 < f* < 10^(-x)) then
+	    //   if floor(C*) is even then C = floor(C*) - logical right 
+	    //       shift; C has p decimal digits, correct by Prop. 1)
+	    //   else if floor(C*) is odd C = floor(C*) - 1 (logical right
+	    //       shift; C has p decimal digits, correct by Pr. 1)
+	    // else
+	    //   C = floor(C*) (logical right shift; C has p decimal digits,
+	    //       correct by Property 1)
+	    // n = C * 10^(e2+x)
+	    if ((P256.w[1] || P256.w[0])
+		&& (P256.w[1] < 0x1999999999999999ull
+		    || (P256.w[1] == 0x1999999999999999ull
+			&& P256.w[0] <= 0x9999999999999999ull))) {
+	      // the result is a midpoint
+	      if (P256.w[2] & 0x01) {
+		is_midpoint_gt_even = 1;
+		// if floor(C*) is odd C = floor(C*) - 1; the result is not 0
+		P256.w[2]--;
+		if (P256.w[2] == 0xffffffffffffffffull)
+		  P256.w[3]--;
+	      } else {
+		is_midpoint_lt_even = 1;
+	      }
+	    }
+	    // n = Cstar * 10^(e2+1)
+	    y_exp = y_exp + EXP_P1;
+	    // C* != 10^P34 because C* has P34 digits
+	    // check for overflow
+	    if (y_exp == EXP_MAX_P1
+		&& (rnd_mode == ROUNDING_TO_NEAREST
+		    || rnd_mode == ROUNDING_TIES_AWAY)) {
+	      // overflow for RN
+	      res.w[1] = x_sign | 0x7800000000000000ull;	// +/-inf
+	      res.w[0] = 0x0ull;
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      // set the overflow flag
+	      *pfpsf |= OVERFLOW_EXCEPTION;
+	      BID_SWAP128 (res);
+	      BID_RETURN (res);
+	    }
+	    // if (0 < f* - 1/2 < 10^(-x)) then 
+	    //   the result of the addition is exact 
+	    // else 
+	    //   the result of the addition is inexact
+	    if (P256.w[1] > 0x8000000000000000ull || (P256.w[1] == 0x8000000000000000ull && P256.w[0] > 0x0ull)) {	// the result may be exact
+	      tmp64 = P256.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	      if ((tmp64 > 0x1999999999999999ull
+		   || (tmp64 == 0x1999999999999999ull
+		       && P256.w[0] >= 0x9999999999999999ull))) {
+		// set the inexact flag
+		*pfpsf |= INEXACT_EXCEPTION;
+		is_inexact = 1;
+	      }	// else the result is exact
+	    } else {	// the result is inexact
+	      // set the inexact flag
+	      *pfpsf |= INEXACT_EXCEPTION;
+	      is_inexact = 1;
+	    }
+	    C1_hi = P256.w[3];
+	    C1_lo = P256.w[2];
+	    if (!is_midpoint_gt_even && !is_midpoint_lt_even) {
+	      is_inexact_lt_midpoint = is_inexact
+		&& (P256.w[1] & 0x8000000000000000ull);
+	      is_inexact_gt_midpoint = is_inexact
+		&& !(P256.w[1] & 0x8000000000000000ull);
+	    }
+	    // general correction from RN to RA, RM, RP, RZ; result uses y_exp
+	    if (rnd_mode != ROUNDING_TO_NEAREST) {
+	      if ((!x_sign
+		   && ((rnd_mode == ROUNDING_UP
+			&& is_inexact_lt_midpoint)
+		       || ((rnd_mode == ROUNDING_TIES_AWAY
+			    || rnd_mode == ROUNDING_UP)
+			   && is_midpoint_gt_even))) || (x_sign
+							 &&
+							 ((rnd_mode ==
+							   ROUNDING_DOWN
+							   &&
+							   is_inexact_lt_midpoint)
+							  ||
+							  ((rnd_mode ==
+							    ROUNDING_TIES_AWAY
+							    || rnd_mode
+							    ==
+							    ROUNDING_DOWN)
+							   &&
+							   is_midpoint_gt_even))))
+	      {
+		// C1 = C1 + 1
+		C1_lo = C1_lo + 1;
+		if (C1_lo == 0) {	// rounding overflow in the low 64 bits
+		  C1_hi = C1_hi + 1;
+		}
+		if (C1_hi == 0x0001ed09bead87c0ull
+		    && C1_lo == 0x378d8e6400000000ull) {
+		  // C1 = 10^34 => rounding overflow
+		  C1_hi = 0x0000314dc6448d93ull;
+		  C1_lo = 0x38c15b0a00000000ull;	// 10^33
+		  y_exp = y_exp + EXP_P1;
+		}
+	      } else
+		if ((is_midpoint_lt_even || is_inexact_gt_midpoint) &&
+		    ((x_sign && (rnd_mode == ROUNDING_UP ||
+				 rnd_mode == ROUNDING_TO_ZERO)) ||
+		     (!x_sign && (rnd_mode == ROUNDING_DOWN ||
+				  rnd_mode == ROUNDING_TO_ZERO)))) {
+		// C1 = C1 - 1
+		C1_lo = C1_lo - 1;
+		if (C1_lo == 0xffffffffffffffffull)
+		  C1_hi--;
+		// check if we crossed into the lower decade
+		if (C1_hi == 0x0000314dc6448d93ull && C1_lo == 0x38c15b09ffffffffull) {	// 10^33 - 1
+		  C1_hi = 0x0001ed09bead87c0ull;	// 10^34 - 1
+		  C1_lo = 0x378d8e63ffffffffull;
+		  y_exp = y_exp - EXP_P1;
+		  // no underflow, because delta + q2 >= P34 + 1
+		}
+	      } else {
+		;	// exact, the result is already correct
+	      }
+	      // in all cases check for overflow (RN and RA solved already)
+	      if (y_exp == EXP_MAX_P1) {	// overflow
+		if ((rnd_mode == ROUNDING_DOWN && x_sign) ||	// RM and res < 0
+		    (rnd_mode == ROUNDING_UP && !x_sign)) {	// RP and res > 0
+		  C1_hi = 0x7800000000000000ull;	// +inf
+		  C1_lo = 0x0ull;
+		} else {	// RM and res > 0, RP and res < 0, or RZ
+		  C1_hi = 0x5fffed09bead87c0ull;
+		  C1_lo = 0x378d8e63ffffffffull;
+		}
+		y_exp = 0;	// x_sign is preserved
+		// set the inexact flag (in case the exact addition was exact)
+		*pfpsf |= INEXACT_EXCEPTION;
+		// set the overflow flag
+		*pfpsf |= OVERFLOW_EXCEPTION;
+	      }
+	    }
+	  }	// else if (C1 < 10^34) then C1 is the coeff.; the result is exact
+	  // assemble the result
+	  res.w[1] = x_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	} else {	// if x_sign != y_sign the result is exact
+	  C1_lo = C2_lo - C1_lo;
+	  C1_hi = C2_hi - C1_hi;
+	  if (C1_lo > C2_lo)
+	    C1_hi--;
+	  if (C1_hi >= 0x8000000000000000ull) {	// negative coefficient!
+	    C1_lo = ~C1_lo;
+	    C1_lo++;
+	    C1_hi = ~C1_hi;
+	    if (C1_lo == 0x0)
+	      C1_hi++;
+	    x_sign = y_sign;	// the result will have the sign of y
+	  }
+	  // the result can be zero, but it cannot overflow
+	  if (C1_lo == 0 && C1_hi == 0) {
+	    // assemble the result
+	    if (x_exp < y_exp)
+	      res.w[1] = x_exp;
+	    else
+	      res.w[1] = y_exp;
+	    res.w[0] = 0;
+	    if (rnd_mode == ROUNDING_DOWN) {
+	      res.w[1] |= 0x8000000000000000ull;
+	    }
+	    BID_SWAP128 (res);
+	    BID_RETURN (res);
+	  }
+	  // assemble the result
+	  res.w[1] = y_sign | y_exp | C1_hi;
+	  res.w[0] = C1_lo;
+	}
+      }
+    }
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  }
+}
+
+
+
+// bid128_sub stands for bid128qq_sub
+
+/*****************************************************************************
+ *  BID128 sub
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_sub (UINT128 * pres, UINT128 * px, UINT128 * py
+	    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128_sub (UINT128 x, UINT128 y
+	    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res;
+  UINT64 y_sign;
+
+  if ((y.w[HIGH_128W] & MASK_NAN) != MASK_NAN) {	// y is not NAN
+    // change its sign
+    y_sign = y.w[HIGH_128W] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    if (y_sign)
+      y.w[HIGH_128W] = y.w[HIGH_128W] & 0x7fffffffffffffffull;
+    else
+      y.w[HIGH_128W] = y.w[HIGH_128W] | 0x8000000000000000ull;
+  }
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_add (&res, &x, &y
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  res = bid128_add (x, y
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_compare.c b/gcc-4.9/libgcc/config/libbid/bid128_compare.c
new file mode 100644
index 000000000..49ef7c05e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_compare.c
@@ -0,0 +1,4346 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_equal, x, y)
+
+     int res;
+     int exp_x, exp_y, exp_t;
+     UINT128 sig_x, sig_y, sig_t;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equivalent.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  if ((y.w[1] & MASK_INF) == MASK_INF) {
+    res = (((x.w[1] ^ y.w[1]) & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else {
+    res = 0;
+    BID_RETURN (res);
+  }
+}
+if ((y.w[1] & MASK_INF) == MASK_INF) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //   If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  // If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+} else if ((x_is_zero && !y_is_zero) || (!x_is_zero && y_is_zero)) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ => not equal : return 0
+if ((x.w[1] ^ y.w[1]) & MASK_SIGN) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+if (exp_x > exp_y) {	// to simplify the loop below,
+  SWAP (exp_x, exp_y, exp_t);	// put the larger exp in y,
+  SWAP (sig_x.w[1], sig_y.w[1], sig_t.w[1]);	// and the smaller exp in x
+  SWAP (sig_x.w[0], sig_y.w[0], sig_t.w[0]);	// and the smaller exp in x
+}
+
+
+if (exp_y - exp_x > 33) {
+  res = 0;
+  BID_RETURN (res);
+}	// difference cannot be greater than 10^33
+
+if (exp_y - exp_x > 19) {
+  // recalculate y's significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y,
+			ten2k128[exp_y - exp_x - 20]);
+  {
+    res = ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	   && (sig_n_prime256.w[1] == sig_x.w[1])
+	   && (sig_n_prime256.w[0] == sig_x.w[0]));
+    BID_RETURN (res);
+  }
+
+}
+  //else{
+  // recalculate y's significand upwards
+__mul_64x128_to_192 (sig_n_prime192, ten2k64[exp_y - exp_x], sig_y);
+{
+  res = ((sig_n_prime192.w[2] == 0)
+	 && (sig_n_prime192.w[1] == sig_x.w[1])
+	 && (sig_n_prime192.w[0] == sig_x.w[0]));
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_greater, x,
+					  y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, rather than 
+  // equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 0
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => 
+  // return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0) ||
+	    (sig_n_prime192.w[1] > sig_y.w[1]) ||
+	    (sig_n_prime192.w[1] == sig_y.w[1] &&
+	     sig_n_prime192.w[0] > sig_y.w[0])) ^
+	   ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0 ||
+	    (sig_n_prime256.w[1] > sig_x.w[1] ||
+	     (sig_n_prime256.w[1] == sig_x.w[1] &&
+	      sig_n_prime256.w[0] > sig_x.w[0]))) ^
+	   ((x.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_quiet_greater_equal, x,
+					  y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && (y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 1;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of the 
+  // significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 1
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	    && (sig_n_prime256.w[1] < sig_x.w[1]
+		|| (sig_n_prime256.w[1] == sig_x.w[1]
+		    && sig_n_prime256.w[0] <
+		    sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				     MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 1
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_quiet_greater_unordered,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than 
+  // equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 0
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => 
+  // return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of the 
+  // significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	    && (sig_n_prime256.w[1] < sig_x.w[1]
+		|| (sig_n_prime256.w[1] == sig_x.w[1]
+		    && sig_n_prime256.w[0] <
+		    sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				     MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_less, x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || (y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 0;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of the 
+  // significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	    || (sig_n_prime256.w[1] > sig_x.w[1]
+		|| (sig_n_prime256.w[1] == sig_x.w[1]
+		    && sig_n_prime256.w[0] >
+		    sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				     MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_less_equal,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 1
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => 
+  // return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of the 
+  // significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1]) || (sig_x.w[1] == sig_y.w[1] &&
+					sig_x.w[0] >=
+					sig_y.w[0])) ^ ((x.
+							 w[1] &
+							 MASK_SIGN) !=
+							MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+      // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_quiet_less_unordered,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || (y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 0;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_not_equal,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y, exp_t;
+     UINT128 sig_x, sig_y, sig_t;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equivalent.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  if ((y.w[1] & MASK_INF) == MASK_INF) {
+    res = (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else {
+    res = 1;
+    BID_RETURN (res);
+  }
+}
+if ((y.w[1] & MASK_INF) == MASK_INF) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+} else if ((x_is_zero && !y_is_zero) || (!x_is_zero && y_is_zero)) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ => not equal : return 0
+if ((x.w[1] ^ y.w[1]) & MASK_SIGN) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+if (exp_x > exp_y) {	// to simplify the loop below,
+  SWAP (exp_x, exp_y, exp_t);	// put the larger exp in y,
+  SWAP (sig_x.w[1], sig_y.w[1], sig_t.w[1]);	// and the smaller exp in x
+  SWAP (sig_x.w[0], sig_y.w[0], sig_t.w[0]);	// and the smaller exp in x
+}
+
+
+if (exp_y - exp_x > 33) {
+  res = 1;
+  BID_RETURN (res);
+}	// difference cannot be greater than 10^33
+
+if (exp_y - exp_x > 19) {
+  // recalculate y's significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y,
+			ten2k128[exp_y - exp_x - 20]);
+  {
+    res = ((sig_n_prime256.w[3] != 0) || (sig_n_prime256.w[2] != 0)
+	   || (sig_n_prime256.w[1] != sig_x.w[1])
+	   || (sig_n_prime256.w[0] != sig_x.w[0]));
+    BID_RETURN (res);
+  }
+
+}
+  //else{
+  // recalculate y's significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[exp_y - exp_x], sig_y);
+{
+  res = ((sig_n_prime192.w[2] != 0)
+	 || (sig_n_prime192.w[1] != sig_x.w[1])
+	 || (sig_n_prime192.w[0] != sig_x.w[0]));
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_not_greater,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 1
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //    If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_not_less, x,
+					  y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && (y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 1;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 1
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	&& (sig_n_prime256.w[1] < sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] <
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 1
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_ordered, x,
+					  y)
+
+     int res;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is ordered : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_quiet_unordered,
+					  x, y)
+
+     int res;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+if ((x.w[1] & MASK_SNAN) == MASK_SNAN
+    || (y.w[1] & MASK_SNAN) == MASK_SNAN) {
+  *pfpsf |= INVALID_EXCEPTION;
+}
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_signaling_greater,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 0
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_greater_equal,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && (y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 1;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 1
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	&& (sig_n_prime256.w[1] < sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] <
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 1
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_greater_unordered,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 0
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	&& (sig_n_prime256.w[1] < sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] <
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int, bid128_signaling_less, x,
+					  y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || (y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 0;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, |x| < |y|, return 1 if positive
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_less_equal,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 0;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 1
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_less_unordered,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) != MASK_INF)
+	   || (y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 0;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 0;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 0;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 0;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 0;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_not_greater,
+					  x, y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x is neg infinity, there is no way it is greater than y, return 1
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // x is pos infinity, it is greater, unless y is positive infinity => return y!=pos_infinity
+  else {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) !=
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if ((sig_x.w[1] > sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+    && exp_x >= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+if ((sig_x.w[1] < sig_y.w[1]
+     || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+    && exp_x <= exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 0
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) != MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 0
+  {
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 0
+{
+  res = (sig_n_prime192.w[2] != 0
+	 || (sig_n_prime192.w[1] > sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] >
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (int,
+					  bid128_signaling_not_less, x,
+					  y)
+
+     int res;
+     int exp_x, exp_y;
+     int diff;
+     UINT128 sig_x, sig_y;
+     UINT192 sig_n_prime192;
+     UINT256 sig_n_prime256;
+     char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+if (((x.w[1] & MASK_NAN) == MASK_NAN)
+    || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+*pfpsf |= INVALID_EXCEPTION;
+{
+  res = 1;
+  BID_RETURN (res);
+}
+}
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // INFINITY (CASE3)
+if ((x.w[1] & MASK_INF) == MASK_INF) {
+  // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+  if ((x.w[1] & MASK_SIGN) == MASK_SIGN)
+    // x is -inf, so it is less than y unless y is -inf
+  {
+    res = (((y.w[1] & MASK_INF) == MASK_INF)
+	   && (y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else
+    // x is pos_inf, no way for it to be less than y
+  {
+    res = 1;
+    BID_RETURN (res);
+  }
+} else if ((y.w[1] & MASK_INF) == MASK_INF) {
+  // x is finite, so if y is positive infinity, then x is less, return 0
+  //                 if y is negative infinity, then x is greater, return 1
+  {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+}
+  // CONVERT X
+sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+sig_x.w[0] = x.w[0];
+exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF X IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_x.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_x = 1;
+else
+  non_canon_x = 0;
+
+  // CONVERT Y
+exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+sig_y.w[0] = y.w[0];
+
+  // CHECK IF Y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //   1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  //     If the value exceeds that, it is interpreted as 0.
+if ((sig_y.w[1] > 0x0001ed09bead87c0ull)
+    || ((sig_y.w[1] == 0x0001ed09bead87c0ull)
+	&& (sig_y.w[0] > 0x378d8e63ffffffffull))
+    || ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull))
+  non_canon_y = 1;
+else
+  non_canon_y = 0;
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore 
+  //    ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+if (non_canon_x || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+  x_is_zero = 1;
+}
+if (non_canon_y || ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+  y_is_zero = 1;
+}
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+if (x_is_zero && y_is_zero) {
+  res = 1;
+  BID_RETURN (res);
+}
+  // is x is zero, it is greater if Y is negative
+else if (x_is_zero) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // is y is zero, X is greater if it is positive
+else if (y_is_zero) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+  res = ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if exponents are the same, then we have a simple comparison 
+  // of the significands
+if (exp_y == exp_x) {
+  res = (((sig_x.w[1] > sig_y.w[1])
+	  || (sig_x.w[1] == sig_y.w[1]
+	      && sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+					       MASK_SIGN));
+  BID_RETURN (res);
+}
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+    && exp_x > exp_y) {
+  res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+  BID_RETURN (res);
+}
+if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+    && exp_x < exp_y) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+if (diff > 0) {	// to simplify the loop below,
+
+  // if exp_x is 33 greater than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }	// difference cannot be greater than 10^33
+
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+
+
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_y.w[1]
+	&& (sig_n_prime256.w[0] == sig_y.w[0])) {
+      res = 1;
+      BID_RETURN (res);
+    }	// if equal, return 1
+    {
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  //else { //128 by 64 bit multiply -> 192 bits
+  __mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_x);
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+      && (sig_n_prime192.w[0] == sig_y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res = (((sig_n_prime192.w[2] > 0)
+	    || (sig_n_prime192.w[1] > sig_y.w[1])
+	    || (sig_n_prime192.w[1] == sig_y.w[1]
+		&& sig_n_prime192.w[0] >
+		sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+diff = exp_y - exp_x;
+
+  // if exp_x is 33 less than exp_y, no need for compensation
+if (diff > 33) {
+  res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+  // adjust the y significand upwards
+  __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+
+
+  // if postitive, return whichever significand is larger 
+  // (converse if negative)
+  if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+      && sig_n_prime256.w[1] == sig_x.w[1]
+      && (sig_n_prime256.w[0] == sig_x.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }	// if equal, return 1
+  {
+    res =
+      ((sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	&& (sig_n_prime256.w[1] < sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] <
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+  //else { //128 by 64 bit multiply -> 192 bits
+  // adjust the y significand upwards
+__mul_64x128_to192 (sig_n_prime192, ten2k64[diff], sig_y);
+
+  // if postitive, return whichever significand is larger (converse if negative)
+if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+    && (sig_n_prime192.w[0] == sig_x.w[0])) {
+  res = 1;
+  BID_RETURN (res);
+}	// if equal, return 1
+{
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] <
+		 sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_div.c b/gcc-4.9/libgcc/config/libbid/bid128_div.c
new file mode 100644
index 000000000..c68ab3ddc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_div.c
@@ -0,0 +1,1851 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_div_macros.h"
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+#include <fenv.h>
+
+#define FE_ALL_FLAGS FE_INVALID|FE_DIVBYZERO|FE_OVERFLOW|FE_UNDERFLOW|FE_INEXACT
+#endif
+
+extern UINT32 convert_table[5][128][2];
+extern SINT8 factors[][2];
+extern UINT8 packed_10000_zeros[];
+
+BID128_FUNCTION_ARG2 (bid128_div, x, y)
+
+     UINT256 CA4, CA4r, P256;
+     UINT128 CX, CY, T128, CQ, CR, CA, TP128, Qh, Ql, res;
+     UINT64 sign_x, sign_y, T, carry64, D, Q_high, Q_low, QX, PD,
+       valid_y;
+     int_float fx, fy, f64;
+     UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+     int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+       digits_q, amount;
+     int nzeros, i, j, k, d5;
+     unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID128_value (&sign_y, &exponent_y, &CY, y);
+
+  // unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+    // test if x is NaN
+if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull ||	// sNaN
+      (y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = (CX.w[1]) & QUIET_MASK64;
+  res.w[0] = CX.w[0];
+  BID_RETURN (res);
+}
+    // x is Infinity?
+if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if y is Inf. 
+  if (((y.w[1] & 0x7c00000000000000ull) == 0x7800000000000000ull))
+    // return NaN 
+  {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is NaN?
+  if (((y.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull))
+    // return NaN 
+  {
+    // return +/-Inf
+    res.w[1] = ((x.w[1] ^ y.w[1]) & 0x8000000000000000ull) |
+      0x7800000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+}
+    // x is 0
+if ((y.w[1] & 0x7800000000000000ull) < 0x7800000000000000ull) {
+  if ((!CY.w[0]) && !(CY.w[1] & 0x0001ffffffffffffull)) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x=y=0, return NaN
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // return 0
+  res.w[1] = (x.w[1] ^ y.w[1]) & 0x8000000000000000ull;
+  exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+  if (exponent_x > DECIMAL_MAX_EXPON_128)
+    exponent_x = DECIMAL_MAX_EXPON_128;
+  else if (exponent_x < 0)
+    exponent_x = 0;
+  res.w[1] |= (((UINT64) exponent_x) << 49);
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+}
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = CY.w[1] & QUIET_MASK64;
+    res.w[0] = CY.w[0];
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res.w[1] = sign_x ^ sign_y;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  res.w[1] =
+    ((x.w[1] ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 33;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  if (!CR.w[1] && !CR.w[0]) {
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,
+		pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  ed2 = 34 - digits_q;
+  T128.w[0] = power10_table_128[ed2].w[0];
+  T128.w[1] = power10_table_128[ed2].w[1];
+  __mul_128x128_to_256 (CA4, CR, T128);
+  diff_expon = diff_expon - ed2;
+  __mul_128x128_low (CQ, CQ, T128);
+
+}
+
+__div_256_by_128 (&CQ, &CA4, CY);
+
+#ifdef SET_STATUS_FLAGS
+if (CA4.w[0] || CA4.w[1]) {
+  // set status flags
+  __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+}
+#ifndef LEAVE_TRAILING_ZEROS
+else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+  // check whether result is exact
+{
+  // check whether CX, CY are short
+  if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+    i = (int) CY.w[0] - 1;
+    j = (int) CX.w[0] - 1;
+    // difference in powers of 2 factors for Y and X
+    nzeros = ed2 - factors[i][0] + factors[j][0];
+    // difference in powers of 5 factors
+    d5 = ed2 - factors[i][1] + factors[j][1];
+    if (d5 < nzeros)
+      nzeros = d5;
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+    // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+    amount = recip_scale[nzeros];
+    __shr_128_long (CQ, Qh, amount);
+
+    diff_expon += nzeros;
+  } else {
+    // decompose Q as Qh*10^17 + Ql
+    //T128 = reciprocals10_128[17];
+    T128.w[0] = 0x44909befeb9fad49ull;
+    T128.w[1] = 0x000b877aa3236a4bull;
+    __mul_128x128_to_256 (P256, CQ, T128);
+    //amount = recip_scale[17];
+    Q_high = (P256.w[2] >> 44) | (P256.w[3] << (64 - 44));
+    Q_low = CQ.w[0] - Q_high * 100000000000000000ull;
+
+    if (!Q_low) {
+      diff_expon += 17;
+
+      tdigit[0] = Q_high & 0x3ffffff;
+      tdigit[1] = 0;
+      QX = Q_high >> 26;
+      QX32 = QX;
+      nzeros = 0;
+
+      for (j = 0; QX32; j++, QX32 >>= 7) {
+	k = (QX32 & 127);
+	tdigit[0] += convert_table[j][k][0];
+	tdigit[1] += convert_table[j][k][1];
+	if (tdigit[0] >= 100000000) {
+	  tdigit[0] -= 100000000;
+	  tdigit[1]++;
+	}
+      }
+
+      if (tdigit[1] >= 100000000) {
+	tdigit[1] -= 100000000;
+	if (tdigit[1] >= 100000000)
+	  tdigit[1] -= 100000000;
+      }
+
+      digit = tdigit[0];
+      if (!digit && !tdigit[1])
+	nzeros += 16;
+      else {
+	if (!digit) {
+	  nzeros += 8;
+	  digit = tdigit[1];
+	}
+	// decompose digit
+	PD = (UINT64) digit *0x068DB8BBull;
+	digit_h = (UINT32) (PD >> 40);
+	digit_low = digit - digit_h * 10000;
+
+	if (!digit_low)
+	  nzeros += 4;
+	else
+	  digit_h = digit_low;
+
+	if (!(digit_h & 1))
+	  nzeros +=
+	    3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			  (digit_h & 7));
+      }
+
+      if (nzeros) {
+	__mul_64x64_to_128 (CQ, Q_high, reciprocals10_64[nzeros]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-64
+	amount = short_recip_scale[nzeros];
+	CQ.w[0] = CQ.w[1] >> amount;
+      } else
+	CQ.w[0] = Q_high;
+      CQ.w[1] = 0;
+
+      diff_expon += nzeros;
+    } else {
+      tdigit[0] = Q_low & 0x3ffffff;
+      tdigit[1] = 0;
+      QX = Q_low >> 26;
+      QX32 = QX;
+      nzeros = 0;
+
+      for (j = 0; QX32; j++, QX32 >>= 7) {
+	k = (QX32 & 127);
+	tdigit[0] += convert_table[j][k][0];
+	tdigit[1] += convert_table[j][k][1];
+	if (tdigit[0] >= 100000000) {
+	  tdigit[0] -= 100000000;
+	  tdigit[1]++;
+	}
+      }
+
+      if (tdigit[1] >= 100000000) {
+	tdigit[1] -= 100000000;
+	if (tdigit[1] >= 100000000)
+	  tdigit[1] -= 100000000;
+      }
+
+      digit = tdigit[0];
+      if (!digit && !tdigit[1])
+	nzeros += 16;
+      else {
+	if (!digit) {
+	  nzeros += 8;
+	  digit = tdigit[1];
+	}
+	// decompose digit
+	PD = (UINT64) digit *0x068DB8BBull;
+	digit_h = (UINT32) (PD >> 40);
+	digit_low = digit - digit_h * 10000;
+
+	if (!digit_low)
+	  nzeros += 4;
+	else
+	  digit_h = digit_low;
+
+	if (!(digit_h & 1))
+	  nzeros +=
+	    3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			  (digit_h & 7));
+      }
+
+      if (nzeros) {
+	// get P*(2^M[extra_digits])/10^extra_digits
+	__mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	//now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	amount = recip_scale[nzeros];
+	__shr_128 (CQ, Qh, amount);
+      }
+      diff_expon += nzeros;
+
+    }
+  }
+  get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+}
+#endif
+
+if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+} else {
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#endif
+
+  handle_UF_128_rem (&res, sign_x ^ sign_y, diff_expon, CQ,
+		     CA4.w[1] | CA4.w[0], &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+
+}
+
+get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+}
+
+
+//#define LEAVE_TRAILING_ZEROS
+
+TYPE0_FUNCTION_ARGTYPE1_ARGTYPE2 (UINT128, bid128dd_div, UINT64, x,
+				  UINT64, y)
+
+     UINT256 CA4, CA4r, P256;
+     UINT128 CX, CY, T128, CQ, CR, CA, TP128, Qh, Ql, res;
+     UINT64 sign_x, sign_y, T, carry64, D, Q_high, Q_low, QX, PD,
+       valid_y;
+     int_float fx, fy, f64;
+     UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+     int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+       digits_q, amount;
+     int nzeros, i, j, k, d5;
+     unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID64 (&sign_y, &exponent_y, &CY.w[0], y);
+
+	// unpack arguments, check for NaN or Infinity
+CX.w[1] = 0;
+if (!unpack_BID64 (&sign_x, &exponent_x, &CX.w[0], (x))) {
+#ifdef SET_STATUS_FLAGS
+if ((y & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // test if x is NaN
+if ((x & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+  if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (CX.w[0] & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((CX.w[0]) & 0xfc00000000000000ull);
+  BID_RETURN (res);
+}
+	   // x is Infinity?
+if (((x) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if y is Inf.
+  if ((((y) & 0x7c00000000000000ull) == 0x7800000000000000ull))
+    // return NaN 
+  {
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  if ((((y) & 0x7c00000000000000ull) != 0x7c00000000000000ull)) {
+  // otherwise return +/-Inf
+  res.w[1] =
+    (((x) ^ (y)) & 0x8000000000000000ull) | 0x7800000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+  }
+}
+	   // x is 0
+if ((((y) & 0x7800000000000000ull) != 0x7800000000000000ull)) {
+    if(!CY.w[0]) {
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  // x=y=0, return NaN
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+	   // return 0
+res.w[1] = ((x) ^ (y)) & 0x8000000000000000ull;
+if (((y) & 0x6000000000000000ull) == 0x6000000000000000ull)
+  exponent_y = ((UINT32) ((y) >> 51)) & 0x3ff;
+else
+  exponent_y = ((UINT32) ((y) >> 53)) & 0x3ff;
+exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+if (exponent_x > DECIMAL_MAX_EXPON_128)
+  exponent_x = DECIMAL_MAX_EXPON_128;
+else if (exponent_x < 0)
+  exponent_x = 0;
+res.w[1] |= (((UINT64) exponent_x) << 49);
+res.w[0] = 0;
+BID_RETURN (res);
+}
+}
+
+CY.w[1] = 0;
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (CY.w[0] & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((CY.w[0]) & 0xfc00000000000000ull);
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if (((y) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res.w[1] = sign_x ^ sign_y;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+  res.w[1] =
+    (((x) ^ (y)) & 0x8000000000000000ull) | 0x7800000000000000ull;
+  res.w[0] = 0;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 33;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  if (!CR.w[1] && !CR.w[0]) {
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,
+		pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  ed2 = 34 - digits_q;
+  T128.w[0] = power10_table_128[ed2].w[0];
+  T128.w[1] = power10_table_128[ed2].w[1];
+  __mul_128x128_to_256 (CA4, CR, T128);
+  diff_expon = diff_expon - ed2;
+  __mul_128x128_low (CQ, CQ, T128);
+
+}
+
+__div_256_by_128 (&CQ, &CA4, CY);
+
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+      //__mul_128x128_to_256(P256, CQ, reciprocals10_128[nzeros]);Qh.w[1]=P256.w[3];Qh.w[0]=P256.w[2];
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      //T128 = reciprocals10_128[17];
+      T128.w[0] = 0x44909befeb9fad49ull;
+      T128.w[1] = 0x000b877aa3236a4bull;
+      __mul_128x128_to_256 (P256, CQ, T128);
+      //amount = recip_scale[17];
+      Q_high = (P256.w[2] >> 44) | (P256.w[3] << (64 - 44));
+      Q_low = CQ.w[0] - Q_high * 100000000000000000ull;
+
+      if (!Q_low) {
+	diff_expon += 17;
+
+	tdigit[0] = Q_high & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_high >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  __mul_64x64_to_128 (CQ, Q_high, reciprocals10_64[nzeros]);
+
+	  // now get P/10^extra_digits: shift C64 right by M[extra_digits]-64
+	  amount = short_recip_scale[nzeros];
+	  CQ.w[0] = CQ.w[1] >> amount;
+	} else
+	  CQ.w[0] = Q_high;
+	CQ.w[1] = 0;
+
+	diff_expon += nzeros;
+      } else {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+    get_BID128(&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+#endif
+
+if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+} else {
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#endif
+  handle_UF_128_rem (&res, sign_x ^ sign_y, diff_expon, CQ,
+		     CA4.w[1] | CA4.w[0], &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+
+}
+
+get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+}
+
+
+BID128_FUNCTION_ARGTYPE1_ARG128 (bid128dq_div, UINT64, x, y)
+     UINT256 CA4, CA4r, P256;
+     UINT128 CX, CY, T128, CQ, CR, CA, TP128, Qh, Ql, res;
+     UINT64 sign_x, sign_y, T, carry64, D, Q_high, Q_low, QX, valid_y,
+       PD;
+     int_float fx, fy, f64;
+     UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+     int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+       digits_q, amount;
+     int nzeros, i, j, k, d5;
+     unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID128_value (&sign_y, &exponent_y, &CY, y);
+
+	// unpack arguments, check for NaN or Infinity
+CX.w[1] = 0;
+if (!unpack_BID64 (&sign_x, &exponent_x, &CX.w[0], x)) {
+#ifdef SET_STATUS_FLAGS
+if ((y.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // test if x is NaN
+if ((x & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+  if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (CX.w[0] & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((CX.w[0]) & 0xfc00000000000000ull);
+  BID_RETURN (res);
+}
+	   // x is Infinity?
+if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if y is Inf.
+  if (((y.w[1] & 0x7c00000000000000ull) == 0x7800000000000000ull))
+    // return NaN 
+  {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  if (((y.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull)) {
+  // otherwise return +/-Inf
+  res.w[1] =
+    ((x ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+  }
+}
+	   // x is 0
+if ((y.w[1] & INFINITY_MASK64) != INFINITY_MASK64) {
+  if ((!CY.w[0]) && !(CY.w[1] & 0x0001ffffffffffffull)) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x=y=0, return NaN
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // return 0
+  res.w[1] = (x ^ y.w[1]) & 0x8000000000000000ull;
+  exponent_x = exponent_x - exponent_y + (DECIMAL_EXPONENT_BIAS_128<<1) - DECIMAL_EXPONENT_BIAS;
+  if (exponent_x > DECIMAL_MAX_EXPON_128)
+    exponent_x = DECIMAL_MAX_EXPON_128;
+  else if (exponent_x < 0)
+    exponent_x = 0;
+  res.w[1] |= (((UINT64) exponent_x) << 49);
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+}
+exponent_x += (DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS);
+
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = CY.w[1] & QUIET_MASK64;
+    res.w[0] = CY.w[0];
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res.w[1] = sign_x ^ sign_y;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+  res.w[1] =
+    ((x ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+  res.w[0] = 0;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 33;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  if (!CR.w[1] && !CR.w[0]) {
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,
+		pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  ed2 = 34 - digits_q;
+  T128.w[0] = power10_table_128[ed2].w[0];
+  T128.w[1] = power10_table_128[ed2].w[1];
+  __mul_128x128_to_256 (CA4, CR, T128);
+  diff_expon = diff_expon - ed2;
+  __mul_128x128_low (CQ, CQ, T128);
+
+}
+
+__div_256_by_128 (&CQ, &CA4, CY);
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+    //printf("ed2=%d,nz=%d,a=%d,CQ="LX16","LX16", RH="LX16", RL="LX16"\n",ed2,nzeros,amount,CQ.w[1],CQ.w[0],reciprocals10_128[nzeros].w[1],reciprocals10_128[nzeros].w[0]);fflush(stdout);
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+      //__mul_128x128_to_256(P256, CQ, reciprocals10_128[nzeros]);Qh.w[1]=P256.w[3];Qh.w[0]=P256.w[2];
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      //T128 = reciprocals10_128[17];
+      T128.w[0] = 0x44909befeb9fad49ull;
+      T128.w[1] = 0x000b877aa3236a4bull;
+      __mul_128x128_to_256 (P256, CQ, T128);
+      //amount = recip_scale[17];
+      Q_high = (P256.w[2] >> 44) | (P256.w[3] << (64 - 44));
+      Q_low = CQ.w[0] - Q_high * 100000000000000000ull;
+
+      if (!Q_low) {
+	diff_expon += 17;
+
+	tdigit[0] = Q_high & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_high >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  //printf("i=%d, nz=%d, digit=%d (%d, %016I64x %016I64x)\n",i,nzeros,digit_h,digit,PD,digit_h);fflush(stdout);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  __mul_64x64_to_128 (CQ, Q_high, reciprocals10_64[nzeros]);
+
+	  // now get P/10^extra_digits: shift C64 right by M[extra_digits]-64
+	  amount = short_recip_scale[nzeros];
+	  CQ.w[0] = CQ.w[1] >> amount;
+	} else
+	  CQ.w[0] = Q_high;
+	CQ.w[1] = 0;
+
+	diff_expon += nzeros;
+      } else {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  //printf("i=%d, nz=%d, digit=%d (%d, %016I64x %016I64x)\n",i,nzeros,digit_h,digit,PD,digit_h);fflush(stdout);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,
+		pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+#endif
+
+if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+} else {
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#endif
+  handle_UF_128_rem (&res, sign_x ^ sign_y, diff_expon, CQ,
+		     CA4.w[1] | CA4.w[0], &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+}
+
+get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+
+}
+
+
+BID128_FUNCTION_ARG128_ARGTYPE2 (bid128qd_div, x, UINT64, y)
+     UINT256 CA4, CA4r, P256;
+     UINT128 CX, CY, T128, CQ, CR, CA, TP128, Qh, Ql, res;
+     UINT64 sign_x, sign_y, T, carry64, D, Q_high, Q_low, QX, PD,
+       valid_y;
+     int_float fx, fy, f64;
+     UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+     int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+       digits_q, amount;
+     int nzeros, i, j, k, d5, rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+
+valid_y = unpack_BID64 (&sign_y, &exponent_y, &CY.w[0], y);
+	// unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+    // test if x is NaN
+if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull ||	// sNaN
+      (y & 0x7e00000000000000ull) == 0x7e00000000000000ull)
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = (CX.w[1]) & QUIET_MASK64;
+  res.w[0] = CX.w[0];
+  BID_RETURN (res);
+}
+    // x is Infinity?
+if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if y is Inf. 
+  if (((y & 0x7c00000000000000ull) == 0x7800000000000000ull))
+    // return NaN 
+  {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is NaN?
+  if (((y & 0x7c00000000000000ull) != 0x7c00000000000000ull))
+    // return NaN 
+  {
+    // return +/-Inf
+    res.w[1] = ((x.w[1] ^ y) & 0x8000000000000000ull) |
+      0x7800000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+}
+    // x is 0
+if ((y & 0x7800000000000000ull) < 0x7800000000000000ull) {
+	if (!CY.w[0]) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x=y=0, return NaN
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // return 0
+  res.w[1] = (x.w[1] ^ y) & 0x8000000000000000ull;
+  exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+  if (exponent_x > DECIMAL_MAX_EXPON_128)
+    exponent_x = DECIMAL_MAX_EXPON_128;
+  else if (exponent_x < 0)
+    exponent_x = 0;
+  res.w[1] |= (((UINT64) exponent_x) << 49);
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+}
+CY.w[1] = 0;
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (CY.w[0] & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((CY.w[0]) & 0xfc00000000000000ull);
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y & INFINITY_MASK64) == INFINITY_MASK64) {
+    // return +/-0
+    res.w[1] = ((x.w[1] ^ y) & 0x8000000000000000ull);
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // y is 0
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  res.w[1] = (sign_x ^ sign_y) | INFINITY_MASK64;
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 33;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  if (!CR.w[1] && !CR.w[0]) {
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,
+		pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  ed2 = 34 - digits_q;
+  T128.w[0] = power10_table_128[ed2].w[0];
+  T128.w[1] = power10_table_128[ed2].w[1];
+  __mul_128x128_to_256 (CA4, CR, T128);
+  diff_expon = diff_expon - ed2;
+  __mul_128x128_low (CQ, CQ, T128);
+
+}
+
+__div_256_by_128 (&CQ, &CA4, CY);
+
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+      //__mul_128x128_to_256(P256, CQ, reciprocals10_128[nzeros]);Qh.w[1]=P256.w[3];Qh.w[0]=P256.w[2];
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      //T128 = reciprocals10_128[17];
+      T128.w[0] = 0x44909befeb9fad49ull;
+      T128.w[1] = 0x000b877aa3236a4bull;
+      __mul_128x128_to_256 (P256, CQ, T128);
+      //amount = recip_scale[17];
+      Q_high = (P256.w[2] >> 44) | (P256.w[3] << (64 - 44));
+      Q_low = CQ.w[0] - Q_high * 100000000000000000ull;
+
+      if (!Q_low) {
+	diff_expon += 17;
+
+	tdigit[0] = Q_high & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_high >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  __mul_64x64_to_128 (CQ, Q_high, reciprocals10_64[nzeros]);
+
+	  // now get P/10^extra_digits: shift C64 right by M[extra_digits]-64
+	  amount = short_recip_scale[nzeros];
+	  CQ.w[0] = CQ.w[1] >> amount;
+	} else
+	  CQ.w[0] = Q_high;
+	CQ.w[1] = 0;
+
+	diff_expon += nzeros;
+      } else {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+    get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode,pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+#endif
+
+if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+} else {
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#endif
+  handle_UF_128_rem (&res, sign_x ^ sign_y, diff_expon, CQ,
+		     CA4.w[1] | CA4.w[0], &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+
+}
+
+get_BID128 (&res, sign_x ^ sign_y, diff_expon, CQ, &rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_fma.c b/gcc-4.9/libgcc/config/libbid/bid128_fma.c
new file mode 100644
index 000000000..5f9879f04
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_fma.c
@@ -0,0 +1,4460 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ * 
+ *  BID128 fma   x * y + z
+ * 
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+static void
+rounding_correction (unsigned int rnd_mode,
+        	     unsigned int is_inexact_lt_midpoint,
+        	     unsigned int is_inexact_gt_midpoint,
+        	     unsigned int is_midpoint_lt_even,
+        	     unsigned int is_midpoint_gt_even,
+        	     int unbexp,
+        	     UINT128 * ptrres, _IDEC_flags * ptrfpsf) {
+  // unbiased true exponent unbexp may be larger than emax
+
+  UINT128 res = *ptrres; // expected to have the correct sign and coefficient
+  // (the exponent field is ignored, as unbexp is used instead)
+  UINT64 sign, exp;
+  UINT64 C_hi, C_lo;
+
+  // general correction from RN to RA, RM, RP, RZ
+  // Note: if the result is negative, then is_inexact_lt_midpoint, 
+  // is_inexact_gt_midpoint, is_midpoint_lt_even, and is_midpoint_gt_even 
+  // have to be considered as if determined for the absolute value of the 
+  // result (so they seem to be reversed)
+
+  if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+      is_midpoint_lt_even || is_midpoint_gt_even) {
+    *ptrfpsf |= INEXACT_EXCEPTION;
+  }
+  // apply correction to result calculated with unbounded exponent
+  sign = res.w[1] & MASK_SIGN;
+  exp = (UINT64) (unbexp + 6176) << 49; // valid only if expmin<=unbexp<=expmax
+  C_hi = res.w[1] & MASK_COEFF;
+  C_lo = res.w[0];
+  if ((!sign && ((rnd_mode == ROUNDING_UP && is_inexact_lt_midpoint) ||
+      ((rnd_mode == ROUNDING_TIES_AWAY || rnd_mode == ROUNDING_UP) && 
+      is_midpoint_gt_even))) || 
+      (sign && ((rnd_mode == ROUNDING_DOWN && is_inexact_lt_midpoint) ||
+      ((rnd_mode == ROUNDING_TIES_AWAY || rnd_mode == ROUNDING_DOWN) && 
+      is_midpoint_gt_even)))) {
+    // C = C + 1
+    C_lo = C_lo + 1;
+    if (C_lo == 0)
+      C_hi = C_hi + 1;
+    if (C_hi == 0x0001ed09bead87c0ull && C_lo == 0x378d8e6400000000ull) {
+      // C = 10^34 => rounding overflow
+      C_hi = 0x0000314dc6448d93ull;
+      C_lo = 0x38c15b0a00000000ull; // 10^33
+      // exp = exp + EXP_P1;
+      unbexp = unbexp + 1;
+      exp = (UINT64) (unbexp + 6176) << 49;
+    }
+  } else if ((is_midpoint_lt_even || is_inexact_gt_midpoint) &&
+      ((sign && (rnd_mode == ROUNDING_UP || rnd_mode == ROUNDING_TO_ZERO)) ||
+      (!sign && (rnd_mode == ROUNDING_DOWN || rnd_mode == ROUNDING_TO_ZERO)))) {
+    // C = C - 1
+    C_lo = C_lo - 1;
+    if (C_lo == 0xffffffffffffffffull)
+      C_hi--;
+    // check if we crossed into the lower decade
+    if (C_hi == 0x0000314dc6448d93ull && C_lo == 0x38c15b09ffffffffull) { 
+      // C = 10^33 - 1
+      if (exp > 0) {
+        C_hi = 0x0001ed09bead87c0ull; // 10^34 - 1
+        C_lo = 0x378d8e63ffffffffull;
+        // exp = exp - EXP_P1;
+        unbexp = unbexp - 1;
+        exp = (UINT64) (unbexp + 6176) << 49;
+      } else { // if exp = 0
+        if (is_midpoint_lt_even || is_midpoint_lt_even ||
+            is_inexact_gt_midpoint || is_inexact_gt_midpoint) // tiny & inexact
+          *ptrfpsf |= UNDERFLOW_EXCEPTION;
+      }
+    }
+  } else {
+    ; // the result is already correct
+  }
+  if (unbexp > expmax) { // 6111
+    *ptrfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+    exp = 0;
+    if (!sign) { // result is positive
+      if (rnd_mode == ROUNDING_UP || rnd_mode == ROUNDING_TIES_AWAY) { // +inf
+        C_hi = 0x7800000000000000ull;
+        C_lo = 0x0000000000000000ull;
+      } else { // res = +MAXFP = (10^34-1) * 10^emax
+        C_hi = 0x5fffed09bead87c0ull;
+        C_lo = 0x378d8e63ffffffffull;
+      }
+    } else { // result is negative
+      if (rnd_mode == ROUNDING_DOWN || rnd_mode == ROUNDING_TIES_AWAY) { // -inf
+        C_hi = 0xf800000000000000ull;
+        C_lo = 0x0000000000000000ull;
+      } else { // res = -MAXFP = -(10^34-1) * 10^emax
+        C_hi = 0xdfffed09bead87c0ull;
+        C_lo = 0x378d8e63ffffffffull;
+      }
+    }
+  }
+  // assemble the result
+  res.w[1] = sign | exp | C_hi;
+  res.w[0] = C_lo;
+  *ptrres = res;
+}
+
+static void
+add256 (UINT256 x, UINT256 y, UINT256 * pz) {
+  // *z = x + yl assume the sum fits in 256 bits
+  UINT256 z;
+  z.w[0] = x.w[0] + y.w[0];
+  if (z.w[0] < x.w[0]) {
+    x.w[1]++;
+    if (x.w[1] == 0x0000000000000000ull) {
+      x.w[2]++;
+      if (x.w[2] == 0x0000000000000000ull) {
+        x.w[3]++;
+      }
+    }
+  }
+  z.w[1] = x.w[1] + y.w[1];
+  if (z.w[1] < x.w[1]) {
+    x.w[2]++;
+    if (x.w[2] == 0x0000000000000000ull) {
+      x.w[3]++;
+    }
+  }
+  z.w[2] = x.w[2] + y.w[2];
+  if (z.w[2] < x.w[2]) {
+    x.w[3]++;
+  }
+  z.w[3] = x.w[3] + y.w[3]; // it was assumed that no carry is possible
+  *pz = z;
+}
+
+static void
+sub256 (UINT256 x, UINT256 y, UINT256 * pz) {
+  // *z = x - y; assume x >= y
+  UINT256 z;
+  z.w[0] = x.w[0] - y.w[0];
+  if (z.w[0] > x.w[0]) {
+    x.w[1]--;
+    if (x.w[1] == 0xffffffffffffffffull) {
+      x.w[2]--;
+      if (x.w[2] == 0xffffffffffffffffull) {
+        x.w[3]--;
+      }
+    }
+  }
+  z.w[1] = x.w[1] - y.w[1];
+  if (z.w[1] > x.w[1]) {
+    x.w[2]--;
+    if (x.w[2] == 0xffffffffffffffffull) {
+      x.w[3]--;
+    }
+  }
+  z.w[2] = x.w[2] - y.w[2];
+  if (z.w[2] > x.w[2]) {
+    x.w[3]--;
+  }
+  z.w[3] = x.w[3] - y.w[3]; // no borrow possible, because x >= y
+  *pz = z;
+}
+
+
+static int
+nr_digits256 (UINT256 R256) {
+  int ind;
+  // determine the number of decimal digits in R256
+  if (R256.w[3] == 0x0 && R256.w[2] == 0x0 && R256.w[1] == 0x0) {
+    // between 1 and 19 digits
+    for (ind = 1; ind <= 19; ind++) {
+      if (R256.w[0] < ten2k64[ind]) {
+        break;
+      }
+    }
+    // ind digits
+  } else if (R256.w[3] == 0x0 && R256.w[2] == 0x0 &&
+             (R256.w[1] < ten2k128[0].w[1] ||
+              (R256.w[1] == ten2k128[0].w[1]
+               && R256.w[0] < ten2k128[0].w[0]))) {
+    // 20 digits
+    ind = 20;
+  } else if (R256.w[3] == 0x0 && R256.w[2] == 0x0) {
+    // between 21 and 38 digits
+    for (ind = 1; ind <= 18; ind++) {
+      if (R256.w[1] < ten2k128[ind].w[1] ||
+          (R256.w[1] == ten2k128[ind].w[1] &&
+           R256.w[0] < ten2k128[ind].w[0])) {
+        break;
+      }
+    }
+    // ind + 20 digits
+    ind = ind + 20;
+  } else if (R256.w[3] == 0x0 &&
+             (R256.w[2] < ten2k256[0].w[2] ||
+              (R256.w[2] == ten2k256[0].w[2] &&
+               R256.w[1] < ten2k256[0].w[1]) ||
+              (R256.w[2] == ten2k256[0].w[2] &&
+               R256.w[1] == ten2k256[0].w[1] &&
+               R256.w[0] < ten2k256[0].w[0]))) {
+    // 39 digits
+    ind = 39;
+  } else {
+    // between 40 and 68 digits
+    for (ind = 1; ind <= 29; ind++) {
+      if (R256.w[3] < ten2k256[ind].w[3] ||
+          (R256.w[3] == ten2k256[ind].w[3] &&
+           R256.w[2] < ten2k256[ind].w[2]) ||
+          (R256.w[3] == ten2k256[ind].w[3] &&
+           R256.w[2] == ten2k256[ind].w[2] &&
+           R256.w[1] < ten2k256[ind].w[1]) ||
+          (R256.w[3] == ten2k256[ind].w[3] &&
+           R256.w[2] == ten2k256[ind].w[2] &&
+           R256.w[1] == ten2k256[ind].w[1] &&
+           R256.w[0] < ten2k256[ind].w[0])) {
+        break;
+      }
+    }
+    // ind + 39 digits
+    ind = ind + 39;
+  }
+  return (ind);
+}
+
+// add/subtract C4 and C3 * 10^scale; this may follow a previous rounding, so
+// use the rounding information from ptr_is_* to avoid a double rounding error
+static void
+add_and_round (int q3,
+               int q4,
+               int e4,
+               int delta,
+               int p34,
+               UINT64 z_sign,
+               UINT64 p_sign,
+               UINT128 C3,
+               UINT256 C4,
+               int rnd_mode,
+               int *ptr_is_midpoint_lt_even,
+               int *ptr_is_midpoint_gt_even,
+               int *ptr_is_inexact_lt_midpoint,
+               int *ptr_is_inexact_gt_midpoint,
+               _IDEC_flags * ptrfpsf, UINT128 * ptrres) {
+
+  int scale;
+  int x0;
+  int ind;
+  UINT64 R64;
+  UINT128 P128, R128;
+  UINT192 P192, R192;
+  UINT256 R256;
+  int is_midpoint_lt_even = 0;
+  int is_midpoint_gt_even = 0;
+  int is_inexact_lt_midpoint = 0;
+  int is_inexact_gt_midpoint = 0;
+  int is_midpoint_lt_even0 = 0;
+  int is_midpoint_gt_even0 = 0;
+  int is_inexact_lt_midpoint0 = 0;
+  int is_inexact_gt_midpoint0 = 0;
+  int incr_exp = 0;
+  int is_tiny = 0;
+  int lt_half_ulp = 0;
+  int eq_half_ulp = 0;
+  // int gt_half_ulp = 0;
+  UINT128 res = *ptrres;
+
+  // scale C3 up by 10^(q4-delta-q3), 0 <= q4-delta-q3 <= 2*P34-2 = 66
+  scale = q4 - delta - q3; // 0 <= scale <= 66 (or 0 <= scale <= 68 if this
+  // comes from Cases (2), (3), (4), (5), (6), with 0 <= |delta| <= 1
+
+  // calculate C3 * 10^scale in R256 (it has at most 67 decimal digits for
+  // Cases (15),(16),(17) and at most 69 for Cases (2),(3),(4),(5),(6))
+  if (scale == 0) {
+    R256.w[3] = 0x0ull;
+    R256.w[2] = 0x0ull;
+    R256.w[1] = C3.w[1];
+    R256.w[0] = C3.w[0];
+  } else if (scale <= 19) { // 10^scale fits in 64 bits
+    P128.w[1] = 0;
+    P128.w[0] = ten2k64[scale];
+    __mul_128x128_to_256 (R256, P128, C3);
+  } else if (scale <= 38) { // 10^scale fits in 128 bits
+    __mul_128x128_to_256 (R256, ten2k128[scale - 20], C3);
+  } else if (scale <= 57) { // 39 <= scale <= 57 
+    // 10^scale fits in 192 bits but C3 * 10^scale fits in 223 or 230 bits
+    // (10^67 has 223 bits; 10^69 has 230 bits);  
+    // must split the computation:  
+    // 10^scale * C3 = 10*38 * 10^(scale-38) * C3 where 10^38 takes 127
+    // bits and so 10^(scale-38) * C3 fits in 128 bits with certainty
+    // Note that 1 <= scale - 38 <= 19 => 10^(scale-38) fits in 64 bits
+    __mul_64x128_to_128 (R128, ten2k64[scale - 38], C3);
+    // now multiply R128 by 10^38
+    __mul_128x128_to_256 (R256, R128, ten2k128[18]);
+  } else { // 58 <= scale <= 66
+    // 10^scale takes between 193 and 220 bits,
+    // and C3 * 10^scale fits in 223 bits (10^67/10^69 has 223/230 bits)
+    // must split the computation: 
+    // 10^scale * C3 = 10*38 * 10^(scale-38) * C3 where 10^38 takes 127
+    // bits and so 10^(scale-38) * C3 fits in 128 bits with certainty 
+    // Note that 20 <= scale - 38 <= 30 => 10^(scale-38) fits in 128 bits
+    // Calculate first 10^(scale-38) * C3, which fits in 128 bits; because
+    // 10^(scale-38) takes more than 64 bits, C3 will take less than 64
+    __mul_64x128_to_128 (R128, C3.w[0], ten2k128[scale - 58]);
+    // now calculate 10*38 * 10^(scale-38) * C3 
+    __mul_128x128_to_256 (R256, R128, ten2k128[18]);
+  }
+  // C3 * 10^scale is now in R256 
+
+  // for Cases (15), (16), (17) C4 > C3 * 10^scale because C4 has at least 
+  // one extra digit; for Cases (2), (3), (4), (5), or (6) any order is 
+  // possible 
+  // add/subtract C4 and C3 * 10^scale; the exponent is e4
+  if (p_sign == z_sign) { // R256 = C4 + R256
+    // calculate R256 = C4 + C3 * 10^scale = C4 + R256 which is exact,
+    // but may require rounding
+    add256 (C4, R256, &R256);
+  } else { // if (p_sign != z_sign) { // R256 = C4 - R256
+    // calculate R256 = C4 - C3 * 10^scale = C4 - R256 or
+    // R256 = C3 * 10^scale - C4 = R256 - C4 which is exact,
+    // but may require rounding
+
+    // compare first R256 = C3 * 10^scale and C4 
+    if (R256.w[3] > C4.w[3] || (R256.w[3] == C4.w[3] && R256.w[2] > C4.w[2]) ||
+        (R256.w[3] == C4.w[3] && R256.w[2] == C4.w[2] && R256.w[1] > C4.w[1]) ||
+        (R256.w[3] == C4.w[3] && R256.w[2] == C4.w[2] && R256.w[1] == C4.w[1] &&
+        R256.w[0] >= C4.w[0])) { // C3 * 10^scale >= C4
+      // calculate R256 = C3 * 10^scale - C4 = R256 - C4, which is exact,
+      // but may require rounding 
+      sub256 (R256, C4, &R256);
+      // flip p_sign too, because the result has the sign of z 
+      p_sign = z_sign;
+    } else { // if C4 > C3 * 10^scale
+      // calculate R256 = C4 - C3 * 10^scale = C4 - R256, which is exact,
+      // but may require rounding  
+      sub256 (C4, R256, &R256);
+    }
+    // if the result is pure zero, the sign depends on the rounding mode
+    // (x*y and z had opposite signs) 
+    if (R256.w[3] == 0x0ull && R256.w[2] == 0x0ull &&
+        R256.w[1] == 0x0ull && R256.w[0] == 0x0ull) {
+      if (rnd_mode != ROUNDING_DOWN)
+        p_sign = 0x0000000000000000ull;
+      else
+        p_sign = 0x8000000000000000ull;
+      // the exponent is max (e4, expmin)
+      if (e4 < -6176)
+        e4 = expmin;
+      // assemble result 
+      res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49);
+      res.w[0] = 0x0;
+      *ptrres = res;
+      return;
+    }
+  }
+
+  // determine the number of decimal digits in R256
+  ind = nr_digits256 (R256);
+
+  // the exact result is (-1)^p_sign * R256 * 10^e4 where q (R256) = ind;
+  // round to the destination precision, with unbounded exponent
+
+  if (ind <= p34) {
+    // result rounded to the destination precision with unbounded exponent
+    // is exact
+    if (ind + e4 < p34 + expmin) {
+      is_tiny = 1; // applies to all rounding modes
+    }
+    res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49) | R256.w[1];
+    res.w[0] = R256.w[0];
+    // Note: res is correct only if expmin <= e4 <= expmax
+  } else { // if (ind > p34)
+    // if more than P digits, round to nearest to P digits
+    // round R256 to p34 digits
+    x0 = ind - p34; // 1 <= x0 <= 34 as 35 <= ind <= 68
+    if (ind <= 38) {
+      P128.w[1] = R256.w[1];
+      P128.w[0] = R256.w[0];
+      round128_19_38 (ind, x0, P128, &R128, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+    } else if (ind <= 57) {
+      P192.w[2] = R256.w[2];
+      P192.w[1] = R256.w[1];
+      P192.w[0] = R256.w[0];
+      round192_39_57 (ind, x0, P192, &R192, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+      R128.w[1] = R192.w[1];
+      R128.w[0] = R192.w[0];
+    } else { // if (ind <= 68)
+      round256_58_76 (ind, x0, R256, &R256, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+      R128.w[1] = R256.w[1];
+      R128.w[0] = R256.w[0];
+    }
+    // the rounded result has p34 = 34 digits
+    e4 = e4 + x0 + incr_exp;
+    if (rnd_mode == ROUNDING_TO_NEAREST) {
+      if (e4 < expmin) {
+        is_tiny = 1; // for other rounding modes apply correction
+      }
+    } else {
+      // for RM, RP, RZ, RA apply correction in order to determine tininess
+      // but do not save the result; apply the correction to 
+      // (-1)^p_sign * significand * 10^0
+      P128.w[1] = p_sign | 0x3040000000000000ull | R128.w[1];
+      P128.w[0] = R128.w[0];
+      rounding_correction (rnd_mode,
+        		   is_inexact_lt_midpoint,
+        		   is_inexact_gt_midpoint, is_midpoint_lt_even,
+        		   is_midpoint_gt_even, 0, &P128, ptrfpsf);
+      scale = ((P128.w[1] & MASK_EXP) >> 49) - 6176; // -1, 0, or +1
+      // the number of digits in the significand is p34 = 34
+      if (e4 + scale < expmin) {
+        is_tiny = 1;
+      }
+    }
+    ind = p34; // the number of decimal digits in the signifcand of res
+    res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49) | R128.w[1]; // RN
+    res.w[0] = R128.w[0];
+    // Note: res is correct only if expmin <= e4 <= expmax
+    // set the inexact flag after rounding with bounded exponent, if any
+  }
+  // at this point we have the result rounded with unbounded exponent in
+  // res and we know its tininess:
+  // res = (-1)^p_sign * significand * 10^e4, 
+  // where q (significand) = ind <= p34
+  // Note: res is correct only if expmin <= e4 <= expmax
+
+  // check for overflow if RN
+  if (rnd_mode == ROUNDING_TO_NEAREST && (ind + e4) > (p34 + expmax)) {
+    res.w[1] = p_sign | 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *ptrres = res;
+    *ptrfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+    return; // BID_RETURN (res)
+  } // else not overflow or not RN, so continue
+
+  // if (e4 >= expmin) we have the result rounded with bounded exponent
+  if (e4 < expmin) {
+    x0 = expmin - e4; // x0 >= 1; the number of digits to chop off of res
+    // where the result rounded [at most] once is
+    //   (-1)^p_sign * significand_res * 10^e4
+
+    // avoid double rounding error
+    is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+    is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+    is_midpoint_lt_even0 = is_midpoint_lt_even;
+    is_midpoint_gt_even0 = is_midpoint_gt_even;
+    is_inexact_lt_midpoint = 0;
+    is_inexact_gt_midpoint = 0;
+    is_midpoint_lt_even = 0;
+    is_midpoint_gt_even = 0;
+
+    if (x0 > ind) {
+      // nothing is left of res when moving the decimal point left x0 digits
+      is_inexact_lt_midpoint = 1;
+      res.w[1] = p_sign | 0x0000000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+      e4 = expmin;
+    } else if (x0 == ind) { // 1 <= x0 = ind <= p34 = 34
+      // this is <, =, or > 1/2 ulp
+      // compare the ind-digit value in the significand of res with
+      // 1/2 ulp = 5*10^(ind-1), i.e. determine whether it is 
+      // less than, equal to, or greater than 1/2 ulp (significand of res)
+      R128.w[1] = res.w[1] & MASK_COEFF;
+      R128.w[0] = res.w[0];
+      if (ind <= 19) {
+        if (R128.w[0] < midpoint64[ind - 1]) { // < 1/2 ulp
+          lt_half_ulp = 1;
+          is_inexact_lt_midpoint = 1;
+        } else if (R128.w[0] == midpoint64[ind - 1]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+          is_midpoint_gt_even = 1;
+        } else { // > 1/2 ulp
+          // gt_half_ulp = 1;
+          is_inexact_gt_midpoint = 1;
+        }
+      } else { // if (ind <= 38) {
+        if (R128.w[1] < midpoint128[ind - 20].w[1] || 
+            (R128.w[1] == midpoint128[ind - 20].w[1] && 
+            R128.w[0] < midpoint128[ind - 20].w[0])) { // < 1/2 ulp
+          lt_half_ulp = 1;
+          is_inexact_lt_midpoint = 1;
+        } else if (R128.w[1] == midpoint128[ind - 20].w[1] && 
+            R128.w[0] == midpoint128[ind - 20].w[0]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+          is_midpoint_gt_even = 1;
+        } else { // > 1/2 ulp
+          // gt_half_ulp = 1;
+          is_inexact_gt_midpoint = 1;
+        }
+      }
+      if (lt_half_ulp || eq_half_ulp) {
+        // res = +0.0 * 10^expmin
+        res.w[1] = 0x0000000000000000ull;
+        res.w[0] = 0x0000000000000000ull;
+      } else { // if (gt_half_ulp)
+        // res = +1 * 10^expmin
+        res.w[1] = 0x0000000000000000ull;
+        res.w[0] = 0x0000000000000001ull;
+      }
+      res.w[1] = p_sign | res.w[1];
+      e4 = expmin;
+    } else { // if (1 <= x0 <= ind - 1 <= 33)
+      // round the ind-digit result to ind - x0 digits
+
+      if (ind <= 18) { // 2 <= ind <= 18
+        round64_2_18 (ind, x0, res.w[0], &R64, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+        res.w[1] = 0x0;
+        res.w[0] = R64;
+      } else if (ind <= 38) {
+        P128.w[1] = res.w[1] & MASK_COEFF;
+        P128.w[0] = res.w[0];
+        round128_19_38 (ind, x0, P128, &res, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+      }
+      e4 = e4 + x0; // expmin
+      // we want the exponent to be expmin, so if incr_exp = 1 then
+      // multiply the rounded result by 10 - it will still fit in 113 bits
+      if (incr_exp) {
+        // 64 x 128 -> 128
+        P128.w[1] = res.w[1] & MASK_COEFF;
+        P128.w[0] = res.w[0];
+        __mul_64x128_to_128 (res, ten2k64[1], P128);
+      }
+      res.w[1] =
+        p_sign | ((UINT64) (e4 + 6176) << 49) | (res.w[1] & MASK_COEFF);
+      // avoid a double rounding error
+      if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+          is_midpoint_lt_even) { // double rounding error upward
+        // res = res - 1
+        res.w[0]--;
+        if (res.w[0] == 0xffffffffffffffffull)
+          res.w[1]--;
+        // Note: a double rounding error upward is not possible; for this
+        // the result after the first rounding would have to be 99...95
+        // (35 digits in all), possibly followed by a number of zeros; this
+        // is not possible in Cases (2)-(6) or (15)-(17) which may get here
+        is_midpoint_lt_even = 0;
+        is_inexact_lt_midpoint = 1;
+      } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+          is_midpoint_gt_even) { // double rounding error downward
+        // res = res + 1
+        res.w[0]++;
+        if (res.w[0] == 0)
+          res.w[1]++;
+        is_midpoint_gt_even = 0;
+        is_inexact_gt_midpoint = 1;
+      } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	 !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+        // if this second rounding was exact the result may still be 
+        // inexact because of the first rounding
+        if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+          is_inexact_gt_midpoint = 1;
+        }
+        if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+          is_inexact_lt_midpoint = 1;
+        }
+      } else if (is_midpoint_gt_even &&
+        	 (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+        // pulled up to a midpoint
+        is_inexact_lt_midpoint = 1;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+      } else if (is_midpoint_lt_even &&
+        	 (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+        // pulled down to a midpoint
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 1;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+      } else {
+        ;
+      }
+    }
+  }
+  // res contains the correct result
+  // apply correction if not rounding to nearest
+  if (rnd_mode != ROUNDING_TO_NEAREST) {
+    rounding_correction (rnd_mode,
+        		 is_inexact_lt_midpoint, is_inexact_gt_midpoint,
+        		 is_midpoint_lt_even, is_midpoint_gt_even,
+        		 e4, &res, ptrfpsf);
+  }
+  if (is_midpoint_lt_even || is_midpoint_gt_even ||
+      is_inexact_lt_midpoint || is_inexact_gt_midpoint) {
+    // set the inexact flag
+    *ptrfpsf |= INEXACT_EXCEPTION;
+    if (is_tiny)
+      *ptrfpsf |= UNDERFLOW_EXCEPTION;
+  }
+
+  *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+  *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+  *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+  *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+  *ptrres = res;
+  return;
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+static void
+bid128_ext_fma (int *ptr_is_midpoint_lt_even,
+        	int *ptr_is_midpoint_gt_even,
+        	int *ptr_is_inexact_lt_midpoint,
+        	int *ptr_is_inexact_gt_midpoint, UINT128 * pres,
+        	UINT128 * px, UINT128 * py,
+        	UINT128 *
+        	pz _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+        	_EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+static UINT128
+bid128_ext_fma (int *ptr_is_midpoint_lt_even,
+        	int *ptr_is_midpoint_gt_even,
+        	int *ptr_is_inexact_lt_midpoint,
+        	int *ptr_is_inexact_gt_midpoint, UINT128 x, UINT128 y,
+        	UINT128 z _RND_MODE_PARAM _EXC_FLAGS_PARAM
+        	_EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT64 x_sign, y_sign, z_sign, p_sign, tmp_sign;
+  UINT64 x_exp = 0, y_exp = 0, z_exp = 0, p_exp;
+  int true_p_exp;
+  UINT128 C1, C2, C3;
+  UINT256 C4;
+  int q1 = 0, q2 = 0, q3 = 0, q4;
+  int e1, e2, e3, e4;
+  int scale, ind, delta, x0;
+  int p34 = P34; // used to modify the limit on the number of digits
+  BID_UI64DOUBLE tmp;
+  int x_nr_bits, y_nr_bits, z_nr_bits;
+  unsigned int save_fpsf;
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0;
+  int is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  int is_midpoint_lt_even0 = 0, is_midpoint_gt_even0 = 0;
+  int is_inexact_lt_midpoint0 = 0, is_inexact_gt_midpoint0 = 0;
+  int incr_exp = 0;
+  int lsb;
+  int lt_half_ulp = 0;
+  int eq_half_ulp = 0;
+  int gt_half_ulp = 0;
+  int is_tiny = 0;
+  UINT64 R64, tmp64;
+  UINT128 P128, R128;
+  UINT192 P192, R192;
+  UINT256 R256;
+
+  // the following are based on the table of special cases for fma; the NaN
+  // behavior is similar to that of the IA-64 Architecture fma 
+
+  // identify cases where at least one operand is NaN
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  BID_SWAP128 (z);
+  if ((y.w[1] & MASK_NAN) == MASK_NAN) { // y is NAN
+    // if x = {0, f, inf, NaN}, y = NaN, z = {0, f, inf, NaN} then res = Q (y)
+    // check first for non-canonical NaN payload
+    if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+        (((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+         (y.w[0] > 0x38c15b09ffffffffull))) {
+      y.w[1] = y.w[1] & 0xffffc00000000000ull;
+      y.w[0] = 0x0ull;
+    }
+    if ((y.w[1] & MASK_SNAN) == MASK_SNAN) { // y is SNAN
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (y)
+      res.w[1] = y.w[1] & 0xfc003fffffffffffull; // clear out also G[6]-G[16]
+      res.w[0] = y.w[0];
+    } else { // y is QNaN
+      // return y
+      res.w[1] = y.w[1] & 0xfc003fffffffffffull; // clear out G[6]-G[16]
+      res.w[0] = y.w[0];
+      // if z = SNaN or x = SNaN signal invalid exception
+      if ((z.w[1] & MASK_SNAN) == MASK_SNAN ||
+          (x.w[1] & MASK_SNAN) == MASK_SNAN) {
+        // set invalid flag
+        *pfpsf |= INVALID_EXCEPTION;
+      }
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } else if ((z.w[1] & MASK_NAN) == MASK_NAN) { // z is NAN
+    // if x = {0, f, inf, NaN}, y = {0, f, inf}, z = NaN then res = Q (z)
+    // check first for non-canonical NaN payload
+    if (((z.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+        (((z.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+         (z.w[0] > 0x38c15b09ffffffffull))) {
+      z.w[1] = z.w[1] & 0xffffc00000000000ull;
+      z.w[0] = 0x0ull;
+    }
+    if ((z.w[1] & MASK_SNAN) == MASK_SNAN) { // z is SNAN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (z) 
+      res.w[1] = z.w[1] & 0xfc003fffffffffffull; // clear out also G[6]-G[16]
+      res.w[0] = z.w[0];
+    } else { // z is QNaN 
+      // return z  
+      res.w[1] = z.w[1] & 0xfc003fffffffffffull; // clear out G[6]-G[16]
+      res.w[0] = z.w[0];
+      // if x = SNaN signal invalid exception
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {
+        // set invalid flag
+        *pfpsf |= INVALID_EXCEPTION;
+      }
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } else if ((x.w[1] & MASK_NAN) == MASK_NAN) { // x is NAN
+    // if x = NaN, y = {0, f, inf}, z = {0, f, inf} then res = Q (x)
+    // check first for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+        (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+         (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) { // x is SNAN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (x) 
+      res.w[1] = x.w[1] & 0xfc003fffffffffffull; // clear out also G[6]-G[16]
+      res.w[0] = x.w[0];
+    } else { // x is QNaN 
+      // return x  
+      res.w[1] = x.w[1] & 0xfc003fffffffffffull; // clear out G[6]-G[16]
+      res.w[0] = x.w[0];
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  }
+  // x, y, z are 0, f, or inf but not NaN => unpack the arguments and check
+  // for non-canonical values
+
+  x_sign = x.w[1] & MASK_SIGN; // 0 for positive, MASK_SIGN for negative
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((x.w[1] & MASK_ANY_INF) != MASK_INF) { // x != inf
+    // if x is not infinity check for non-canonical values - treated as zero
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) { // G0_G1=11
+      // non-canonical
+      x_exp = (x.w[1] << 2) & MASK_EXP; // biased and shifted left 49 bits
+      C1.w[1] = 0; // significand high
+      C1.w[0] = 0; // significand low
+    } else { // G0_G1 != 11
+      x_exp = x.w[1] & MASK_EXP; // biased and shifted left 49 bits
+      if (C1.w[1] > 0x0001ed09bead87c0ull ||
+          (C1.w[1] == 0x0001ed09bead87c0ull &&
+           C1.w[0] > 0x378d8e63ffffffffull)) {
+        // x is non-canonical if coefficient is larger than 10^34 -1
+        C1.w[1] = 0;
+        C1.w[0] = 0;
+      } else { // canonical          
+        ;
+      }
+    }
+  }
+  y_sign = y.w[1] & MASK_SIGN; // 0 for positive, MASK_SIGN for negative
+  C2.w[1] = y.w[1] & MASK_COEFF;
+  C2.w[0] = y.w[0];
+  if ((y.w[1] & MASK_ANY_INF) != MASK_INF) { // y != inf
+    // if y is not infinity check for non-canonical values - treated as zero
+    if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) { // G0_G1=11
+      // non-canonical
+      y_exp = (y.w[1] << 2) & MASK_EXP; // biased and shifted left 49 bits
+      C2.w[1] = 0; // significand high
+      C2.w[0] = 0; // significand low 
+    } else { // G0_G1 != 11
+      y_exp = y.w[1] & MASK_EXP; // biased and shifted left 49 bits
+      if (C2.w[1] > 0x0001ed09bead87c0ull ||
+          (C2.w[1] == 0x0001ed09bead87c0ull &&
+           C2.w[0] > 0x378d8e63ffffffffull)) {
+        // y is non-canonical if coefficient is larger than 10^34 -1
+        C2.w[1] = 0;
+        C2.w[0] = 0;
+      } else { // canonical
+        ;
+      }
+    }
+  }
+  z_sign = z.w[1] & MASK_SIGN; // 0 for positive, MASK_SIGN for negative
+  C3.w[1] = z.w[1] & MASK_COEFF;
+  C3.w[0] = z.w[0];
+  if ((z.w[1] & MASK_ANY_INF) != MASK_INF) { // z != inf
+    // if z is not infinity check for non-canonical values - treated as zero
+    if ((z.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) { // G0_G1=11
+      // non-canonical
+      z_exp = (z.w[1] << 2) & MASK_EXP; // biased and shifted left 49 bits
+      C3.w[1] = 0; // significand high
+      C3.w[0] = 0; // significand low 
+    } else { // G0_G1 != 11
+      z_exp = z.w[1] & MASK_EXP; // biased and shifted left 49 bits
+      if (C3.w[1] > 0x0001ed09bead87c0ull ||
+          (C3.w[1] == 0x0001ed09bead87c0ull &&
+           C3.w[0] > 0x378d8e63ffffffffull)) {
+        // z is non-canonical if coefficient is larger than 10^34 -1
+        C3.w[1] = 0;
+        C3.w[0] = 0;
+      } else { // canonical
+        ;
+      }
+    }
+  }
+
+  p_sign = x_sign ^ y_sign; // sign of the product
+
+  // identify cases where at least one operand is infinity
+
+  if ((x.w[1] & MASK_ANY_INF) == MASK_INF) { // x = inf
+    if ((y.w[1] & MASK_ANY_INF) == MASK_INF) { // y = inf
+      if ((z.w[1] & MASK_ANY_INF) == MASK_INF) { // z = inf
+        if (p_sign == z_sign) {
+          res.w[1] = z_sign | MASK_INF;
+          res.w[0] = 0x0;
+        } else {
+          // return QNaN Indefinite
+          res.w[1] = 0x7c00000000000000ull;
+          res.w[0] = 0x0000000000000000ull;
+          // set invalid flag
+          *pfpsf |= INVALID_EXCEPTION;
+        }
+      } else { // z = 0 or z = f
+        res.w[1] = p_sign | MASK_INF;
+        res.w[0] = 0x0;
+      }
+    } else if (C2.w[1] != 0 || C2.w[0] != 0) { // y = f
+      if ((z.w[1] & MASK_ANY_INF) == MASK_INF) { // z = inf
+        if (p_sign == z_sign) {
+          res.w[1] = z_sign | MASK_INF;
+          res.w[0] = 0x0;
+        } else {
+          // return QNaN Indefinite 
+          res.w[1] = 0x7c00000000000000ull;
+          res.w[0] = 0x0000000000000000ull;
+          // set invalid flag
+          *pfpsf |= INVALID_EXCEPTION;
+        }
+      } else { // z = 0 or z = f
+        res.w[1] = p_sign | MASK_INF;
+        res.w[0] = 0x0;
+      }
+    } else { // y = 0
+      // return QNaN Indefinite
+      res.w[1] = 0x7c00000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } else if ((y.w[1] & MASK_ANY_INF) == MASK_INF) { // y = inf
+    if ((z.w[1] & MASK_ANY_INF) == MASK_INF) { // z = inf
+      // x = f, necessarily
+      if ((p_sign != z_sign)
+          || (C1.w[1] == 0x0ull && C1.w[0] == 0x0ull)) {
+        // return QNaN Indefinite
+        res.w[1] = 0x7c00000000000000ull;
+        res.w[0] = 0x0000000000000000ull;
+        // set invalid flag
+        *pfpsf |= INVALID_EXCEPTION;
+      } else {
+        res.w[1] = z_sign | MASK_INF;
+        res.w[0] = 0x0;
+      }
+    } else if (C1.w[1] == 0x0 && C1.w[0] == 0x0) { // x = 0
+      // z = 0, f, inf
+      // return QNaN Indefinite
+      res.w[1] = 0x7c00000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+    } else {
+      // x = f and z = 0, f, necessarily
+      res.w[1] = p_sign | MASK_INF;
+      res.w[0] = 0x0;
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } else if ((z.w[1] & MASK_ANY_INF) == MASK_INF) { // z = inf
+    // x = 0, f and y = 0, f, necessarily
+    res.w[1] = z_sign | MASK_INF;
+    res.w[0] = 0x0;
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  }
+
+  true_p_exp = (x_exp >> 49) - 6176 + (y_exp >> 49) - 6176;
+  if (true_p_exp < -6176)
+    p_exp = 0; // cannot be less than EXP_MIN
+  else
+    p_exp = (UINT64) (true_p_exp + 6176) << 49;
+
+  if (((C1.w[1] == 0x0 && C1.w[0] == 0x0) || (C2.w[1] == 0x0 && C2.w[0] == 0x0)) && C3.w[1] == 0x0 && C3.w[0] == 0x0) { // (x = 0 or y = 0) and z = 0
+    // the result is 0
+    if (p_exp < z_exp)
+      res.w[1] = p_exp; // preferred exponent
+    else
+      res.w[1] = z_exp; // preferred exponent
+    if (p_sign == z_sign) {
+      res.w[1] |= z_sign;
+      res.w[0] = 0x0;
+    } else { // x * y and z have opposite signs
+      if (rnd_mode == ROUNDING_DOWN) {
+        // res = -0.0
+        res.w[1] |= MASK_SIGN;
+        res.w[0] = 0x0;
+      } else {
+        // res = +0.0
+        // res.w[1] |= 0x0;
+        res.w[0] = 0x0;
+      }
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  }
+  // from this point on, we may need to know the number of decimal digits
+  // in the significands of x, y, z when x, y, z != 0
+
+  if (C1.w[1] != 0 || C1.w[0] != 0) { // x = f (non-zero finite)
+    // q1 = nr. of decimal digits in x
+    // determine first the nr. of bits in x
+    if (C1.w[1] == 0) {
+      if (C1.w[0] >= 0x0020000000000000ull) { // x >= 2^53
+        // split the 64-bit value in two 32-bit halves to avoid rounding errors
+        if (C1.w[0] >= 0x0000000100000000ull) { // x >= 2^32
+          tmp.d = (double) (C1.w[0] >> 32); // exact conversion
+          x_nr_bits =
+            33 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        } else { // x < 2^32
+          tmp.d = (double) (C1.w[0]); // exact conversion
+          x_nr_bits =
+            1 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        }
+      } else { // if x < 2^53
+        tmp.d = (double) C1.w[0]; // exact conversion
+        x_nr_bits =
+          1 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else { // C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+      tmp.d = (double) C1.w[1]; // exact conversion
+      x_nr_bits =
+        65 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+    q1 = nr_digits[x_nr_bits - 1].digits;
+    if (q1 == 0) {
+      q1 = nr_digits[x_nr_bits - 1].digits1;
+      if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+          (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+           C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+        q1++;
+    }
+  }
+
+  if (C2.w[1] != 0 || C2.w[0] != 0) { // y = f (non-zero finite)
+    if (C2.w[1] == 0) {
+      if (C2.w[0] >= 0x0020000000000000ull) { // y >= 2^53
+        // split the 64-bit value in two 32-bit halves to avoid rounding errors
+        if (C2.w[0] >= 0x0000000100000000ull) { // y >= 2^32
+          tmp.d = (double) (C2.w[0] >> 32); // exact conversion
+          y_nr_bits =
+            32 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        } else { // y < 2^32
+          tmp.d = (double) C2.w[0]; // exact conversion
+          y_nr_bits =
+            ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        }
+      } else { // if y < 2^53
+        tmp.d = (double) C2.w[0]; // exact conversion
+        y_nr_bits =
+          ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else { // C2.w[1] != 0 => nr. bits = 64 + nr_bits (C2.w[1])
+      tmp.d = (double) C2.w[1]; // exact conversion
+      y_nr_bits =
+        64 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+
+    q2 = nr_digits[y_nr_bits].digits;
+    if (q2 == 0) {
+      q2 = nr_digits[y_nr_bits].digits1;
+      if (C2.w[1] > nr_digits[y_nr_bits].threshold_hi ||
+          (C2.w[1] == nr_digits[y_nr_bits].threshold_hi &&
+           C2.w[0] >= nr_digits[y_nr_bits].threshold_lo))
+        q2++;
+    }
+  }
+
+  if (C3.w[1] != 0 || C3.w[0] != 0) { // z = f (non-zero finite)
+    if (C3.w[1] == 0) {
+      if (C3.w[0] >= 0x0020000000000000ull) { // z >= 2^53
+        // split the 64-bit value in two 32-bit halves to avoid rounding errors
+        if (C3.w[0] >= 0x0000000100000000ull) { // z >= 2^32
+          tmp.d = (double) (C3.w[0] >> 32); // exact conversion
+          z_nr_bits =
+            32 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        } else { // z < 2^32
+          tmp.d = (double) C3.w[0]; // exact conversion
+          z_nr_bits =
+            ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+        }
+      } else { // if z < 2^53
+        tmp.d = (double) C3.w[0]; // exact conversion
+        z_nr_bits =
+          ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else { // C3.w[1] != 0 => nr. bits = 64 + nr_bits (C3.w[1])
+      tmp.d = (double) C3.w[1]; // exact conversion
+      z_nr_bits =
+        64 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+
+    q3 = nr_digits[z_nr_bits].digits;
+    if (q3 == 0) {
+      q3 = nr_digits[z_nr_bits].digits1;
+      if (C3.w[1] > nr_digits[z_nr_bits].threshold_hi ||
+          (C3.w[1] == nr_digits[z_nr_bits].threshold_hi &&
+           C3.w[0] >= nr_digits[z_nr_bits].threshold_lo))
+        q3++;
+    }
+  }
+
+  if ((C1.w[1] == 0x0 && C1.w[0] == 0x0) ||
+      (C2.w[1] == 0x0 && C2.w[0] == 0x0)) {
+    // x = 0 or y = 0
+    // z = f, necessarily; for 0 + z return z, with the preferred exponent
+    // the result is z, but need to get the preferred exponent
+    if (z_exp <= p_exp) { // the preferred exponent is z_exp
+      res.w[1] = z_sign | (z_exp & MASK_EXP) | C3.w[1];
+      res.w[0] = C3.w[0];
+    } else { // if (p_exp < z_exp) the preferred exponent is p_exp
+      // return (C3 * 10^scale) * 10^(z_exp - scale)
+      // where scale = min (p34-q3, (z_exp-p_exp) >> 49)
+      scale = p34 - q3;
+      ind = (z_exp - p_exp) >> 49;
+      if (ind < scale)
+        scale = ind;
+      if (scale == 0) {
+        res.w[1] = z.w[1]; // & MASK_COEFF, which is redundant
+        res.w[0] = z.w[0];
+      } else if (q3 <= 19) { // z fits in 64 bits 
+        if (scale <= 19) { // 10^scale fits in 64 bits
+          // 64 x 64 C3.w[0] * ten2k64[scale]
+          __mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+        } else { // 10^scale fits in 128 bits
+          // 64 x 128 C3.w[0] * ten2k128[scale - 20]
+          __mul_128x64_to_128 (res, C3.w[0], ten2k128[scale - 20]);
+        }
+      } else { // z fits in 128 bits, but 10^scale must fit in 64 bits 
+        // 64 x 128 ten2k64[scale] * C3
+        __mul_128x64_to_128 (res, ten2k64[scale], C3);
+      }
+      // subtract scale from the exponent
+      z_exp = z_exp - ((UINT64) scale << 49);
+      res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+    }
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } else {
+    ; // continue with x = f, y = f, z = 0 or x = f, y = f, z = f
+  }
+
+  e1 = (x_exp >> 49) - 6176; // unbiased exponent of x 
+  e2 = (y_exp >> 49) - 6176; // unbiased exponent of y 
+  e3 = (z_exp >> 49) - 6176; // unbiased exponent of z
+  e4 = e1 + e2; // unbiased exponent of the exact x * y
+
+  // calculate C1 * C2 and its number of decimal digits, q4
+
+  // the exact product has either q1 + q2 - 1 or q1 + q2 decimal digits
+  // where 2 <= q1 + q2 <= 68
+  // calculate C4 = C1 * C2 and determine q
+  C4.w[3] = C4.w[2] = C4.w[1] = C4.w[0] = 0;
+  if (q1 + q2 <= 19) { // if 2 <= q1 + q2 <= 19, C4 = C1 * C2 fits in 64 bits
+    C4.w[0] = C1.w[0] * C2.w[0];
+    // if C4 < 10^(q1+q2-1) then q4 = q1 + q2 - 1 else q4 = q1 + q2
+    if (C4.w[0] < ten2k64[q1 + q2 - 1])
+      q4 = q1 + q2 - 1; // q4 in [1, 18]
+    else
+      q4 = q1 + q2; // q4 in [2, 19]
+    // length of C1 * C2 rounded up to a multiple of 64 bits is len = 64;
+  } else if (q1 + q2 == 20) { // C4 = C1 * C2 fits in 64 or 128 bits
+    // q1 <= 19 and q2 <= 19 so both C1 and C2 fit in 64 bits
+    __mul_64x64_to_128MACH (C4, C1.w[0], C2.w[0]);
+    // if C4 < 10^(q1+q2-1) = 10^19 then q4 = q1+q2-1 = 19 else q4 = q1+q2 = 20
+    if (C4.w[1] == 0 && C4.w[0] < ten2k64[19]) { // 19 = q1+q2-1
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 64;
+      q4 = 19; // 19 = q1 + q2 - 1
+    } else {
+      // if (C4.w[1] == 0)
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 64;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      q4 = 20; // 20 = q1 + q2
+    }
+  } else if (q1 + q2 <= 38) { // 21 <= q1 + q2 <= 38
+    // C4 = C1 * C2 fits in 64 or 128 bits
+    // (64 bits possibly, but only when q1 + q2 = 21 and C4 has 20 digits)
+    // at least one of C1, C2 has at most 19 decimal digits & fits in 64 bits
+    if (q1 <= 19) {
+      __mul_128x64_to_128 (C4, C1.w[0], C2);
+    } else { // q2 <= 19
+      __mul_128x64_to_128 (C4, C2.w[0], C1);
+    }
+    // if C4 < 10^(q1+q2-1) then q4 = q1 + q2 - 1 else q4 = q1 + q2
+    if (C4.w[1] < ten2k128[q1 + q2 - 21].w[1] ||
+        (C4.w[1] == ten2k128[q1 + q2 - 21].w[1] &&
+         C4.w[0] < ten2k128[q1 + q2 - 21].w[0])) {
+      // if (C4.w[1] == 0) // q4 = 20, necessarily
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 64;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      q4 = q1 + q2 - 1; // q4 in [20, 37]
+    } else {
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      q4 = q1 + q2; // q4 in [21, 38]
+    }
+  } else if (q1 + q2 == 39) { // C4 = C1 * C2 fits in 128 or 192 bits
+    // both C1 and C2 fit in 128 bits (actually in 113 bits)
+    // may replace this by 128x128_to192
+    __mul_128x128_to_256 (C4, C1, C2); // C4.w[3] is 0
+    // if C4 < 10^(q1+q2-1) = 10^38 then q4 = q1+q2-1 = 38 else q4 = q1+q2 = 39
+    if (C4.w[2] == 0 && (C4.w[1] < ten2k128[18].w[1] ||
+        		 (C4.w[1] == ten2k128[18].w[1]
+        		  && C4.w[0] < ten2k128[18].w[0]))) {
+      // 18 = 38 - 20 = q1+q2-1 - 20
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      q4 = 38; // 38 = q1 + q2 - 1
+    } else {
+      // if (C4.w[2] == 0)
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      q4 = 39; // 39 = q1 + q2
+    }
+  } else if (q1 + q2 <= 57) { // 40 <= q1 + q2 <= 57
+    // C4 = C1 * C2 fits in 128 or 192 bits
+    // (128 bits possibly, but only when q1 + q2 = 40 and C4 has 39 digits)
+    // both C1 and C2 fit in 128 bits (actually in 113 bits); at most one
+    // may fit in 64 bits
+    if (C1.w[1] == 0) { // C1 fits in 64 bits
+      // __mul_64x128_full (REShi64, RESlo128, A64, B128)
+      __mul_64x128_full (C4.w[2], C4, C1.w[0], C2);
+    } else if (C2.w[1] == 0) { // C2 fits in 64 bits
+      // __mul_64x128_full (REShi64, RESlo128, A64, B128)
+      __mul_64x128_full (C4.w[2], C4, C2.w[0], C1);
+    } else { // both C1 and C2 require 128 bits
+      // may use __mul_128x128_to_192 (C4.w[2], C4.w[0], C2.w[0], C1);
+      __mul_128x128_to_256 (C4, C1, C2); // C4.w[3] = 0
+    }
+    // if C4 < 10^(q1+q2-1) then q4 = q1 + q2 - 1 else q4 = q1 + q2
+    if (C4.w[2] < ten2k256[q1 + q2 - 40].w[2] ||
+        (C4.w[2] == ten2k256[q1 + q2 - 40].w[2] &&
+         (C4.w[1] < ten2k256[q1 + q2 - 40].w[1] ||
+          (C4.w[1] == ten2k256[q1 + q2 - 40].w[1] &&
+           C4.w[0] < ten2k256[q1 + q2 - 40].w[0])))) {
+      // if (C4.w[2] == 0) // q4 = 39, necessarily
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 128;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      q4 = q1 + q2 - 1; // q4 in [39, 56]
+    } else {
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      q4 = q1 + q2; // q4 in [40, 57]
+    }
+  } else if (q1 + q2 == 58) { // C4 = C1 * C2 fits in 192 or 256 bits
+    // both C1 and C2 fit in 128 bits (actually in 113 bits); at most one
+    // may fit in 64 bits
+    if (C1.w[1] == 0) { // C1 * C2 will fit in 192 bits
+      __mul_64x128_full (C4.w[2], C4, C1.w[0], C2); // may use 64x128_to_192
+    } else if (C2.w[1] == 0) { // C1 * C2 will fit in 192 bits
+      __mul_64x128_full (C4.w[2], C4, C2.w[0], C1); // may use 64x128_to_192
+    } else { // C1 * C2 will fit in 192 bits or in 256 bits
+      __mul_128x128_to_256 (C4, C1, C2);
+    }
+    // if C4 < 10^(q1+q2-1) = 10^57 then q4 = q1+q2-1 = 57 else q4 = q1+q2 = 58
+    if (C4.w[3] == 0 && (C4.w[2] < ten2k256[18].w[2] ||
+        		 (C4.w[2] == ten2k256[18].w[2]
+        		  && (C4.w[1] < ten2k256[18].w[1]
+        		      || (C4.w[1] == ten2k256[18].w[1]
+        			  && C4.w[0] < ten2k256[18].w[0]))))) {
+      // 18 = 57 - 39 = q1+q2-1 - 39
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      q4 = 57; // 57 = q1 + q2 - 1
+    } else {
+      // if (C4.w[3] == 0)
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 256;
+      q4 = 58; // 58 = q1 + q2
+    }
+  } else { // if 59 <= q1 + q2 <= 68
+    // C4 = C1 * C2 fits in 192 or 256 bits
+    // (192 bits possibly, but only when q1 + q2 = 59 and C4 has 58 digits)
+    // both C1 and C2 fit in 128 bits (actually in 113 bits); none fits in
+    // 64 bits
+    // may use __mul_128x128_to_192 (C4.w[2], C4.w[0], C2.w[0], C1);
+    __mul_128x128_to_256 (C4, C1, C2); // C4.w[3] = 0
+    // if C4 < 10^(q1+q2-1) then q4 = q1 + q2 - 1 else q4 = q1 + q2
+    if (C4.w[3] < ten2k256[q1 + q2 - 40].w[3] ||
+        (C4.w[3] == ten2k256[q1 + q2 - 40].w[3] &&
+         (C4.w[2] < ten2k256[q1 + q2 - 40].w[2] ||
+          (C4.w[2] == ten2k256[q1 + q2 - 40].w[2] &&
+           (C4.w[1] < ten2k256[q1 + q2 - 40].w[1] ||
+            (C4.w[1] == ten2k256[q1 + q2 - 40].w[1] &&
+             C4.w[0] < ten2k256[q1 + q2 - 40].w[0])))))) {
+      // if (C4.w[3] == 0) // q4 = 58, necessarily
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 192;
+      // else
+      //   length of C1 * C2 rounded up to a multiple of 64 bits is len = 256;
+      q4 = q1 + q2 - 1; // q4 in [58, 67]
+    } else {
+      // length of C1 * C2 rounded up to a multiple of 64 bits is len = 256;
+      q4 = q1 + q2; // q4 in [59, 68]
+    }
+  }
+
+  if (C3.w[1] == 0x0 && C3.w[0] == 0x0) { // x = f, y = f, z = 0
+    save_fpsf = *pfpsf; // sticky bits - caller value must be preserved
+    *pfpsf = 0;
+
+    if (q4 > p34) {
+
+      // truncate C4 to p34 digits into res
+      // x = q4-p34, 1 <= x <= 34 because 35 <= q4 <= 68
+      x0 = q4 - p34;
+      if (q4 <= 38) {
+        P128.w[1] = C4.w[1];
+        P128.w[0] = C4.w[0];
+        round128_19_38 (q4, x0, P128, &res, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+      } else if (q4 <= 57) { // 35 <= q4 <= 57
+        P192.w[2] = C4.w[2];
+        P192.w[1] = C4.w[1];
+        P192.w[0] = C4.w[0];
+        round192_39_57 (q4, x0, P192, &R192, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+        res.w[0] = R192.w[0];
+        res.w[1] = R192.w[1];
+      } else { // if (q4 <= 68)
+        round256_58_76 (q4, x0, C4, &R256, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+        res.w[0] = R256.w[0];
+        res.w[1] = R256.w[1];
+      }
+      e4 = e4 + x0;
+      if (incr_exp) {
+        e4 = e4 + 1;
+      }
+      q4 = p34;
+      // res is now the coefficient of the result rounded to the destination 
+      // precision, with unbounded exponent; the exponent is e4; q4=digits(res)
+    } else { // if (q4 <= p34)
+      // C4 * 10^e4 is the result rounded to the destination precision, with  
+      // unbounded exponent (which is exact)
+
+      if ((q4 + e4 <= p34 + expmax) && (e4 > expmax)) {
+        // e4 is too large, but can be brought within range by scaling up C4
+        scale = e4 - expmax; // 1 <= scale < P-q4 <= P-1 => 1 <= scale <= P-2
+        // res = (C4 * 10^scale) * 10^expmax
+        if (q4 <= 19) { // C4 fits in 64 bits
+          if (scale <= 19) { // 10^scale fits in 64 bits
+            // 64 x 64 C4.w[0] * ten2k64[scale]
+            __mul_64x64_to_128MACH (res, C4.w[0], ten2k64[scale]);
+          } else { // 10^scale fits in 128 bits
+            // 64 x 128 C4.w[0] * ten2k128[scale - 20]
+            __mul_128x64_to_128 (res, C4.w[0], ten2k128[scale - 20]);
+          }
+        } else { // C4 fits in 128 bits, but 10^scale must fit in 64 bits
+          // 64 x 128 ten2k64[scale] * CC43
+          __mul_128x64_to_128 (res, ten2k64[scale], C4);
+        }
+        e4 = e4 - scale; // expmax
+        q4 = q4 + scale;
+      } else {
+        res.w[1] = C4.w[1];
+        res.w[0] = C4.w[0];
+      }
+      // res is the coefficient of the result rounded to the destination 
+      // precision, with unbounded exponent (it has q4 digits); the exponent 
+      // is e4 (exact result)
+    }
+
+    // check for overflow
+    if (q4 + e4 > p34 + expmax) {
+      if (rnd_mode == ROUNDING_TO_NEAREST) {
+        res.w[1] = p_sign | 0x7800000000000000ull; // +/-inf
+        res.w[0] = 0x0000000000000000ull;
+        *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+      } else {
+        res.w[1] = p_sign | res.w[1];
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e4, &res, pfpsf);
+      }
+      *pfpsf |= save_fpsf;
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+    }
+    // check for underflow
+    if (q4 + e4 < expmin + P34) {
+      is_tiny = 1; // the result is tiny
+      if (e4 < expmin) {
+        // if e4 < expmin, we must truncate more of res
+        x0 = expmin - e4; // x0 >= 1
+        is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+        is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+        is_midpoint_lt_even0 = is_midpoint_lt_even;
+        is_midpoint_gt_even0 = is_midpoint_gt_even;
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+        // the number of decimal digits in res is q4
+        if (x0 < q4) { // 1 <= x0 <= q4-1 => round res to q4 - x0 digits
+          if (q4 <= 18) { // 2 <= q4 <= 18, 1 <= x0 <= 17
+            round64_2_18 (q4, x0, res.w[0], &R64, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+            if (incr_exp) {
+              // R64 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 1, 1 <= q4 - x0 <= 17
+              R64 = ten2k64[q4 - x0];
+            }
+            // res.w[1] = 0; (from above)
+            res.w[0] = R64;
+          } else { // if (q4 <= 34)
+            // 19 <= q4 <= 38
+            P128.w[1] = res.w[1];
+            P128.w[0] = res.w[0];
+            round128_19_38 (q4, x0, P128, &res, &incr_exp,
+        		    &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		    &is_inexact_lt_midpoint,
+        		    &is_inexact_gt_midpoint);
+            if (incr_exp) {
+              // increase coefficient by a factor of 10; this will be <= 10^33
+              // R128 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 1, 1 <= q4 - x0 <= 37
+              if (q4 - x0 <= 19) { // 1 <= q4 - x0 <= 19
+        	// res.w[1] = 0;
+        	res.w[0] = ten2k64[q4 - x0];
+              } else { // 20 <= q4 - x0 <= 37
+        	res.w[0] = ten2k128[q4 - x0 - 20].w[0];
+        	res.w[1] = ten2k128[q4 - x0 - 20].w[1];
+              }
+            }
+          }
+          e4 = e4 + x0; // expmin 
+        } else if (x0 == q4) {
+          // the second rounding is for 0.d(0)d(1)...d(q4-1) * 10^emin
+          // determine relationship with 1/2 ulp
+          if (q4 <= 19) {
+            if (res.w[0] < midpoint64[q4 - 1]) { // < 1/2 ulp
+              lt_half_ulp = 1;
+              is_inexact_lt_midpoint = 1;
+            } else if (res.w[0] == midpoint64[q4 - 1]) { // = 1/2 ulp
+              eq_half_ulp = 1;
+              is_midpoint_gt_even = 1;
+            } else { // > 1/2 ulp
+              // gt_half_ulp = 1;
+              is_inexact_gt_midpoint = 1;
+            }
+          } else { // if (q4 <= 34)
+            if (res.w[1] < midpoint128[q4 - 20].w[1] || 
+                (res.w[1] == midpoint128[q4 - 20].w[1] && 
+                res.w[0] < midpoint128[q4 - 20].w[0])) { // < 1/2 ulp
+              lt_half_ulp = 1;
+              is_inexact_lt_midpoint = 1;
+            } else if (res.w[1] == midpoint128[q4 - 20].w[1] && 
+                res.w[0] == midpoint128[q4 - 20].w[0]) { // = 1/2 ulp
+              eq_half_ulp = 1;
+              is_midpoint_gt_even = 1;
+            } else { // > 1/2 ulp
+              // gt_half_ulp = 1;
+              is_inexact_gt_midpoint = 1;
+            }
+          }
+          if (lt_half_ulp || eq_half_ulp) {
+            // res = +0.0 * 10^expmin
+            res.w[1] = 0x0000000000000000ull;
+            res.w[0] = 0x0000000000000000ull;
+          } else { // if (gt_half_ulp)
+            // res = +1 * 10^expmin
+            res.w[1] = 0x0000000000000000ull;
+            res.w[0] = 0x0000000000000001ull;
+          }
+          e4 = expmin;
+        } else { // if (x0 > q4)
+          // the second rounding is for 0.0...d(0)d(1)...d(q4-1) * 10^emin
+          res.w[1] = 0;
+          res.w[0] = 0;
+          e4 = expmin;
+          is_inexact_lt_midpoint = 1;
+        }
+        // avoid a double rounding error
+        if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+            is_midpoint_lt_even) { // double rounding error upward
+          // res = res - 1
+          res.w[0]--;
+          if (res.w[0] == 0xffffffffffffffffull)
+            res.w[1]--;
+          // Note: a double rounding error upward is not possible; for this
+          // the result after the first rounding would have to be 99...95
+          // (35 digits in all), possibly followed by a number of zeros; this
+          // not possible for f * f + 0
+          is_midpoint_lt_even = 0;
+          is_inexact_lt_midpoint = 1;
+        } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+            is_midpoint_gt_even) { // double rounding error downward
+          // res = res + 1
+          res.w[0]++;
+          if (res.w[0] == 0)
+            res.w[1]++;
+          is_midpoint_gt_even = 0;
+          is_inexact_gt_midpoint = 1;
+        } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	   !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+          // if this second rounding was exact the result may still be 
+          // inexact because of the first rounding
+          if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+            is_inexact_gt_midpoint = 1;
+          }
+          if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+            is_inexact_lt_midpoint = 1;
+          }
+        } else if (is_midpoint_gt_even &&
+        	   (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+          // pulled up to a midpoint
+          is_inexact_lt_midpoint = 1;
+          is_inexact_gt_midpoint = 0;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else if (is_midpoint_lt_even &&
+        	   (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+          // pulled down to a midpoint
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 1;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else {
+          ;
+        }
+      } else { // if e4 >= emin then q4 < P and the result is tiny and exact
+        if (e3 < e4) {
+          // if (e3 < e4) the preferred exponent is e3
+          // return (C4 * 10^scale) * 10^(e4 - scale)
+          // where scale = min (p34-q4, (e4 - e3))
+          scale = p34 - q4;
+          ind = e4 - e3;
+          if (ind < scale)
+            scale = ind;
+          if (scale == 0) {
+            ; // res and e4 are unchanged
+          } else if (q4 <= 19) { // C4 fits in 64 bits
+            if (scale <= 19) { // 10^scale fits in 64 bits
+              // 64 x 64 res.w[0] * ten2k64[scale]
+              __mul_64x64_to_128MACH (res, res.w[0], ten2k64[scale]);
+            } else { // 10^scale fits in 128 bits
+              // 64 x 128 res.w[0] * ten2k128[scale - 20]
+              __mul_128x64_to_128 (res, res.w[0], ten2k128[scale - 20]);
+            }
+          } else { // res fits in 128 bits, but 10^scale must fit in 64 bits
+            // 64 x 128 ten2k64[scale] * C3
+            __mul_128x64_to_128 (res, ten2k64[scale], res);
+          }
+          // subtract scale from the exponent
+          e4 = e4 - scale;
+        }
+      }
+
+      // check for inexact result
+      if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+          is_midpoint_lt_even || is_midpoint_gt_even) {
+        // set the inexact flag and the underflow flag
+        *pfpsf |= INEXACT_EXCEPTION;
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+      }
+      res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49) | res.w[1];
+      if (rnd_mode != ROUNDING_TO_NEAREST) {
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e4, &res, pfpsf);
+      }
+      *pfpsf |= save_fpsf;
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+    }
+    // no overflow, and no underflow for rounding to nearest
+    res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49) | res.w[1];
+
+    if (rnd_mode != ROUNDING_TO_NEAREST) {
+      rounding_correction (rnd_mode,
+        		   is_inexact_lt_midpoint,
+        		   is_inexact_gt_midpoint,
+        		   is_midpoint_lt_even, is_midpoint_gt_even,
+        		   e4, &res, pfpsf);
+      // if e4 = expmin && significand < 10^33 => result is tiny (for RD, RZ)
+      if (e4 == expmin) {
+        if ((res.w[1] & MASK_COEFF) < 0x0000314dc6448d93ull ||
+            ((res.w[1] & MASK_COEFF) == 0x0000314dc6448d93ull &&
+             res.w[0] < 0x38c15b0a00000000ull)) {
+          is_tiny = 1;
+        }
+      }
+    }
+
+    if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+        is_midpoint_lt_even || is_midpoint_gt_even) {
+      // set the inexact flag
+      *pfpsf |= INEXACT_EXCEPTION;
+      if (is_tiny)
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+
+    if ((*pfpsf & INEXACT_EXCEPTION) == 0) { // x * y is exact
+      // need to ensure that the result has the preferred exponent
+      p_exp = res.w[1] & MASK_EXP;
+      if (z_exp < p_exp) { // the preferred exponent is z_exp
+        // signficand of res in C3
+        C3.w[1] = res.w[1] & MASK_COEFF;
+        C3.w[0] = res.w[0];
+        // the number of decimal digits of x * y is q4 <= 34
+        // Note: the coefficient fits in 128 bits
+
+        // return (C3 * 10^scale) * 10^(p_exp - scale)
+        // where scale = min (p34-q4, (p_exp-z_exp) >> 49)
+        scale = p34 - q4;
+        ind = (p_exp - z_exp) >> 49;
+        if (ind < scale)
+          scale = ind;
+        // subtract scale from the exponent
+        p_exp = p_exp - ((UINT64) scale << 49);
+        if (scale == 0) {
+          ; // leave res unchanged
+        } else if (q4 <= 19) { // x * y fits in 64 bits
+          if (scale <= 19) { // 10^scale fits in 64 bits
+            // 64 x 64 C3.w[0] * ten2k64[scale] 
+            __mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+          } else { // 10^scale fits in 128 bits 
+            // 64 x 128 C3.w[0] * ten2k128[scale - 20]
+            __mul_128x64_to_128 (res, C3.w[0], ten2k128[scale - 20]);
+          }
+          res.w[1] = p_sign | (p_exp & MASK_EXP) | res.w[1];
+        } else { // x * y fits in 128 bits, but 10^scale must fit in 64 bits
+          // 64 x 128 ten2k64[scale] * C3 
+          __mul_128x64_to_128 (res, ten2k64[scale], C3);
+          res.w[1] = p_sign | (p_exp & MASK_EXP) | res.w[1];
+        }
+      } // else leave the result as it is, because p_exp <= z_exp
+    }
+    *pfpsf |= save_fpsf;
+    *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+    *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+    *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+    *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+    BID_SWAP128 (res);
+    BID_RETURN (res)
+  } // else we have f * f + f
+
+  // continue with x = f, y = f, z = f
+
+  delta = q3 + e3 - q4 - e4;
+delta_ge_zero:
+  if (delta >= 0) {
+
+    if (p34 <= delta - 1 ||	// Case (1')
+        (p34 == delta && e3 + 6176 < p34 - q3)) { // Case (1''A)
+      // check for overflow, which can occur only in Case (1')
+      if ((q3 + e3) > (p34 + expmax) && p34 <= delta - 1) {
+        // e3 > expmax implies p34 <= delta-1 and e3 > expmax is a necessary
+        // condition for (q3 + e3) > (p34 + expmax)
+        if (rnd_mode == ROUNDING_TO_NEAREST) {
+          res.w[1] = z_sign | 0x7800000000000000ull; // +/-inf
+          res.w[0] = 0x0000000000000000ull;
+          *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+        } else {
+          if (p_sign == z_sign) {
+            is_inexact_lt_midpoint = 1;
+          } else {
+            is_inexact_gt_midpoint = 1;
+          }
+          // q3 <= p34; if (q3 < p34) scale C3 up by 10^(p34-q3)
+          scale = p34 - q3;
+          if (scale == 0) {
+            res.w[1] = z_sign | C3.w[1];
+            res.w[0] = C3.w[0];
+          } else {
+            if (q3 <= 19) { // C3 fits in 64 bits
+              if (scale <= 19) { // 10^scale fits in 64 bits
+        	// 64 x 64 C3.w[0] * ten2k64[scale]
+        	__mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+              } else { // 10^scale fits in 128 bits
+        	// 64 x 128 C3.w[0] * ten2k128[scale - 20]
+        	__mul_128x64_to_128 (res, C3.w[0],
+        			     ten2k128[scale - 20]);
+              }
+            } else { // C3 fits in 128 bits, but 10^scale must fit in 64 bits
+              // 64 x 128 ten2k64[scale] * C3
+              __mul_128x64_to_128 (res, ten2k64[scale], C3);
+            }
+            // the coefficient in res has q3 + scale = p34 digits
+          }
+          e3 = e3 - scale;
+          res.w[1] = z_sign | res.w[1];
+          rounding_correction (rnd_mode,
+        		       is_inexact_lt_midpoint,
+        		       is_inexact_gt_midpoint,
+        		       is_midpoint_lt_even, is_midpoint_gt_even,
+        		       e3, &res, pfpsf);
+        }
+        *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+        *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+        *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+        *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+        BID_SWAP128 (res);
+        BID_RETURN (res)
+      }
+      // res = z
+      if (q3 < p34) { // the preferred exponent is z_exp - (p34 - q3)
+        // return (C3 * 10^scale) * 10^(z_exp - scale)
+        // where scale = min (p34-q3, z_exp-EMIN)
+        scale = p34 - q3;
+        ind = e3 + 6176;
+        if (ind < scale)
+          scale = ind;
+        if (scale == 0) {
+          res.w[1] = C3.w[1];
+          res.w[0] = C3.w[0];
+        } else if (q3 <= 19) { // z fits in 64 bits
+          if (scale <= 19) { // 10^scale fits in 64 bits
+            // 64 x 64 C3.w[0] * ten2k64[scale]
+            __mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+          } else { // 10^scale fits in 128 bits
+            // 64 x 128 C3.w[0] * ten2k128[scale - 20]
+            __mul_128x64_to_128 (res, C3.w[0], ten2k128[scale - 20]);
+          }
+        } else { // z fits in 128 bits, but 10^scale must fit in 64 bits
+          // 64 x 128 ten2k64[scale] * C3
+          __mul_128x64_to_128 (res, ten2k64[scale], C3);
+        }
+        // the coefficient in res has q3 + scale digits
+        // subtract scale from the exponent
+        z_exp = z_exp - ((UINT64) scale << 49);
+        e3 = e3 - scale;
+        res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+        if (scale + q3 < p34)
+          *pfpsf |= UNDERFLOW_EXCEPTION;
+      } else {
+        scale = 0;
+        res.w[1] = z_sign | ((UINT64) (e3 + 6176) << 49) | C3.w[1];
+        res.w[0] = C3.w[0];
+      }
+
+      // use the following to avoid double rounding errors when operating on
+      // mixed formats in rounding to nearest, and for correcting the result
+      // if not rounding to nearest
+      if ((p_sign != z_sign) && (delta == (q3 + scale + 1))) {
+        // there is a gap of exactly one digit between the scaled C3 and C4
+        // C3 * 10^ scale = 10^(q3+scale-1) <=> C3 = 10^(q3-1) is special case
+        if ((q3 <= 19 && C3.w[0] != ten2k64[q3 - 1]) ||
+            (q3 == 20 && (C3.w[1] != 0 || C3.w[0] != ten2k64[19])) ||
+            (q3 >= 21 && (C3.w[1] != ten2k128[q3 - 21].w[1] ||
+        		  C3.w[0] != ten2k128[q3 - 21].w[0]))) {
+          // C3 * 10^ scale != 10^(q3-1)
+          // if ((res.w[1] & MASK_COEFF) != 0x0000314dc6448d93ull ||
+          // res.w[0] != 0x38c15b0a00000000ull) { // C3 * 10^scale != 10^33
+          is_inexact_gt_midpoint = 1; // if (z_sign), set as if for abs. value
+        } else { // if C3 * 10^scale = 10^(q3+scale-1)
+          // ok from above e3 = (z_exp >> 49) - 6176;
+          // the result is always inexact
+          if (q4 == 1) {
+            R64 = C4.w[0];
+          } else {
+            // if q4 > 1 then truncate C4 from q4 digits to 1 digit; 
+            // x = q4-1, 1 <= x <= 67 and check if this operation is exact
+            if (q4 <= 18) { // 2 <= q4 <= 18
+              round64_2_18 (q4, q4 - 1, C4.w[0], &R64, &incr_exp,
+        		    &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		    &is_inexact_lt_midpoint,
+        		    &is_inexact_gt_midpoint);
+            } else if (q4 <= 38) {
+              P128.w[1] = C4.w[1];
+              P128.w[0] = C4.w[0];
+              round128_19_38 (q4, q4 - 1, P128, &R128, &incr_exp,
+        		      &is_midpoint_lt_even,
+        		      &is_midpoint_gt_even,
+        		      &is_inexact_lt_midpoint,
+        		      &is_inexact_gt_midpoint);
+              R64 = R128.w[0]; // one decimal digit
+            } else if (q4 <= 57) {
+              P192.w[2] = C4.w[2];
+              P192.w[1] = C4.w[1];
+              P192.w[0] = C4.w[0];
+              round192_39_57 (q4, q4 - 1, P192, &R192, &incr_exp,
+        		      &is_midpoint_lt_even,
+        		      &is_midpoint_gt_even,
+        		      &is_inexact_lt_midpoint,
+        		      &is_inexact_gt_midpoint);
+              R64 = R192.w[0]; // one decimal digit
+            } else { // if (q4 <= 68)
+              round256_58_76 (q4, q4 - 1, C4, &R256, &incr_exp,
+        		      &is_midpoint_lt_even,
+        		      &is_midpoint_gt_even,
+        		      &is_inexact_lt_midpoint,
+        		      &is_inexact_gt_midpoint);
+              R64 = R256.w[0]; // one decimal digit
+            }
+            if (incr_exp) {
+              R64 = 10;
+            }
+          }
+          if (q4 == 1 && C4.w[0] == 5) {
+            is_inexact_lt_midpoint = 0;
+            is_inexact_gt_midpoint = 0;
+            is_midpoint_lt_even = 1;
+            is_midpoint_gt_even = 0;
+          } else if ((e3 == expmin) ||
+        	     R64 < 5 || (R64 == 5 && is_inexact_gt_midpoint)) {
+            // result does not change
+            is_inexact_lt_midpoint = 0;
+            is_inexact_gt_midpoint = 1;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+          } else {
+            is_inexact_lt_midpoint = 1;
+            is_inexact_gt_midpoint = 0;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+            // result decremented is 10^(q3+scale) - 1
+            if ((q3 + scale) <= 19) {
+              res.w[1] = 0;
+              res.w[0] = ten2k64[q3 + scale];
+            } else { // if ((q3 + scale + 1) <= 35)
+              res.w[1] = ten2k128[q3 + scale - 20].w[1];
+              res.w[0] = ten2k128[q3 + scale - 20].w[0];
+            }
+            res.w[0] = res.w[0] - 1; // borrow never occurs
+            z_exp = z_exp - EXP_P1;
+            e3 = e3 - 1;
+            res.w[1] = z_sign | ((UINT64) (e3 + 6176) << 49) | res.w[1];
+          }
+          if (e3 == expmin) {
+            if (R64 < 5 || (R64 == 5 && !is_inexact_lt_midpoint)) {
+              ; // result not tiny (in round-to-nearest mode)
+            } else {
+              *pfpsf |= UNDERFLOW_EXCEPTION;
+            }
+          }
+        } // end 10^(q3+scale-1)
+        // set the inexact flag
+        *pfpsf |= INEXACT_EXCEPTION;
+      } else {
+        if (p_sign == z_sign) {
+          // if (z_sign), set as if for absolute value
+          is_inexact_lt_midpoint = 1;
+        } else { // if (p_sign != z_sign)
+          // if (z_sign), set as if for absolute value
+          is_inexact_gt_midpoint = 1;
+        }
+        *pfpsf |= INEXACT_EXCEPTION;
+      }
+      // the result is always inexact => set the inexact flag
+      // Determine tininess:
+      //    if (exp > expmin)
+      //      the result is not tiny
+      //    else // if exp = emin
+      //      if (q3 + scale < p34)
+      //        the result is tiny
+      //      else // if (q3 + scale = p34)
+      //        if (C3 * 10^scale > 10^33)
+      //          the result is not tiny
+      //        else // if C3 * 10^scale = 10^33
+      //          if (xy * z > 0)
+      //            the result is not tiny
+      //          else // if (xy * z < 0)
+      //            if (z > 0)
+      //              if rnd_mode != RP
+      //                the result is tiny
+      //              else // if RP
+      //                the result is not tiny
+      //            else // if (z < 0)
+      //              if rnd_mode != RM
+      //                the result is tiny
+      //              else // if RM
+      //                the result is not tiny
+      //              endif
+      //            endif
+      //          endif
+      //        endif
+      //      endif
+      //    endif 
+      if ((e3 == expmin && (q3 + scale) < p34) || 
+          (e3 == expmin && (q3 + scale) == p34 && 
+          (res.w[1] & MASK_COEFF) == 0x0000314dc6448d93ull &&	// 10^33_high
+          res.w[0] == 0x38c15b0a00000000ull &&	// 10^33_low
+          z_sign != p_sign && ((!z_sign && rnd_mode != ROUNDING_UP) || 
+          (z_sign && rnd_mode != ROUNDING_DOWN)))) {
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+      }
+      if (rnd_mode != ROUNDING_TO_NEAREST) {
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e3, &res, pfpsf);
+      }
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else if (p34 == delta) { // Case (1''B)
+
+      // because Case (1''A) was treated above, e3 + 6176 >= p34 - q3
+      // and C3 can be scaled up to p34 digits if needed
+
+      // scale C3 to p34 digits if needed
+      scale = p34 - q3; // 0 <= scale <= p34 - 1
+      if (scale == 0) {
+        res.w[1] = C3.w[1];
+        res.w[0] = C3.w[0];
+      } else if (q3 <= 19) { // z fits in 64 bits
+        if (scale <= 19) { // 10^scale fits in 64 bits
+          // 64 x 64 C3.w[0] * ten2k64[scale]
+          __mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+        } else { // 10^scale fits in 128 bits
+          // 64 x 128 C3.w[0] * ten2k128[scale - 20]
+          __mul_128x64_to_128 (res, C3.w[0], ten2k128[scale - 20]);
+        }
+      } else { // z fits in 128 bits, but 10^scale must fit in 64 bits
+        // 64 x 128 ten2k64[scale] * C3
+        __mul_128x64_to_128 (res, ten2k64[scale], C3);
+      }
+      // subtract scale from the exponent
+      z_exp = z_exp - ((UINT64) scale << 49);
+      e3 = e3 - scale;
+      // now z_sign, z_exp, and res correspond to a z scaled to p34 = 34 digits
+
+      // determine whether x * y is less than, equal to, or greater than 
+      // 1/2 ulp (z)
+      if (q4 <= 19) {
+        if (C4.w[0] < midpoint64[q4 - 1]) { // < 1/2 ulp
+          lt_half_ulp = 1;
+        } else if (C4.w[0] == midpoint64[q4 - 1]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+        } else { // > 1/2 ulp
+          gt_half_ulp = 1;
+        }
+      } else if (q4 <= 38) {
+        if (C4.w[2] == 0 && (C4.w[1] < midpoint128[q4 - 20].w[1] || 
+            (C4.w[1] == midpoint128[q4 - 20].w[1] && 
+            C4.w[0] < midpoint128[q4 - 20].w[0]))) { // < 1/2 ulp
+          lt_half_ulp = 1;
+        } else if (C4.w[2] == 0 && C4.w[1] == midpoint128[q4 - 20].w[1] && 
+            C4.w[0] == midpoint128[q4 - 20].w[0]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+        } else { // > 1/2 ulp
+          gt_half_ulp = 1;
+        }
+      } else if (q4 <= 58) {
+        if (C4.w[3] == 0 && (C4.w[2] < midpoint192[q4 - 39].w[2] || 
+            (C4.w[2] == midpoint192[q4 - 39].w[2] && 
+            C4.w[1] < midpoint192[q4 - 39].w[1]) || 
+            (C4.w[2] == midpoint192[q4 - 39].w[2] && 
+            C4.w[1] == midpoint192[q4 - 39].w[1] && 
+            C4.w[0] < midpoint192[q4 - 39].w[0]))) { // < 1/2 ulp
+          lt_half_ulp = 1;
+        } else if (C4.w[3] == 0 && C4.w[2] == midpoint192[q4 - 39].w[2] && 
+            C4.w[1] == midpoint192[q4 - 39].w[1] && 
+            C4.w[0] == midpoint192[q4 - 39].w[0]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+        } else { // > 1/2 ulp
+          gt_half_ulp = 1;
+        }
+      } else {
+        if (C4.w[3] < midpoint256[q4 - 59].w[3] || 
+            (C4.w[3] == midpoint256[q4 - 59].w[3] && 
+            C4.w[2] < midpoint256[q4 - 59].w[2]) || 
+            (C4.w[3] == midpoint256[q4 - 59].w[3] && 
+            C4.w[2] == midpoint256[q4 - 59].w[2] && 
+            C4.w[1] < midpoint256[q4 - 59].w[1]) || 
+            (C4.w[3] == midpoint256[q4 - 59].w[3] && 
+            C4.w[2] == midpoint256[q4 - 59].w[2] && 
+            C4.w[1] == midpoint256[q4 - 59].w[1] && 
+            C4.w[0] < midpoint256[q4 - 59].w[0])) { // < 1/2 ulp
+          lt_half_ulp = 1;
+        } else if (C4.w[3] == midpoint256[q4 - 59].w[3] && 
+            C4.w[2] == midpoint256[q4 - 59].w[2] && 
+            C4.w[1] == midpoint256[q4 - 59].w[1] && 
+            C4.w[0] == midpoint256[q4 - 59].w[0]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+        } else { // > 1/2 ulp
+          gt_half_ulp = 1;
+        }
+      }
+
+      if (p_sign == z_sign) {
+        if (lt_half_ulp) {
+          res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+          // use the following to avoid double rounding errors when operating on
+          // mixed formats in rounding to nearest
+          is_inexact_lt_midpoint = 1; // if (z_sign), as if for absolute value
+        } else if ((eq_half_ulp && (res.w[0] & 0x01)) || gt_half_ulp) {
+          // add 1 ulp to the significand
+          res.w[0]++;
+          if (res.w[0] == 0x0ull)
+            res.w[1]++;
+          // check for rounding overflow, when coeff == 10^34
+          if ((res.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull && 
+              res.w[0] == 0x378d8e6400000000ull) { // coefficient = 10^34
+            e3 = e3 + 1;
+            // coeff = 10^33
+            z_exp = ((UINT64) (e3 + 6176) << 49) & MASK_EXP;
+            res.w[1] = 0x0000314dc6448d93ull;
+            res.w[0] = 0x38c15b0a00000000ull;
+          }
+          // end add 1 ulp
+          res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+          if (eq_half_ulp) {
+            is_midpoint_lt_even = 1; // if (z_sign), as if for absolute value
+          } else {
+            is_inexact_gt_midpoint = 1; // if (z_sign), as if for absolute value
+          }
+        } else { // if (eq_half_ulp && !(res.w[0] & 0x01))
+          // leave unchanged 
+          res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+          is_midpoint_gt_even = 1; // if (z_sign), as if for absolute value
+        }
+        // the result is always inexact, and never tiny
+        // set the inexact flag
+        *pfpsf |= INEXACT_EXCEPTION;
+        // check for overflow
+        if (e3 > expmax && rnd_mode == ROUNDING_TO_NEAREST) {
+          res.w[1] = z_sign | 0x7800000000000000ull; // +/-inf
+          res.w[0] = 0x0000000000000000ull;
+          *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+          *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+          *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+          *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+          *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+          BID_SWAP128 (res);
+          BID_RETURN (res)
+        }
+        if (rnd_mode != ROUNDING_TO_NEAREST) {
+          rounding_correction (rnd_mode,
+        		       is_inexact_lt_midpoint,
+        		       is_inexact_gt_midpoint,
+        		       is_midpoint_lt_even, is_midpoint_gt_even,
+        		       e3, &res, pfpsf);
+          z_exp = res.w[1] & MASK_EXP;
+        }
+      } else { // if (p_sign != z_sign)
+        // consider two cases, because C3 * 10^scale = 10^33 is a special case
+        if (res.w[1] != 0x0000314dc6448d93ull || 
+            res.w[0] != 0x38c15b0a00000000ull) { // C3 * 10^scale != 10^33
+          if (lt_half_ulp) {
+            res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+            // use the following to avoid double rounding errors when operating
+            // on mixed formats in rounding to nearest
+            is_inexact_gt_midpoint = 1; // if (z_sign), as if for absolute value
+          } else if ((eq_half_ulp && (res.w[0] & 0x01)) || gt_half_ulp) {
+            // subtract 1 ulp from the significand
+            res.w[0]--;
+            if (res.w[0] == 0xffffffffffffffffull)
+              res.w[1]--;
+            res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+            if (eq_half_ulp) {
+              is_midpoint_gt_even = 1; // if (z_sign), as if for absolute value
+            } else {
+              is_inexact_lt_midpoint = 1; //if(z_sign), as if for absolute value
+            }
+          } else { // if (eq_half_ulp && !(res.w[0] & 0x01))
+            // leave unchanged
+            res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+            is_midpoint_lt_even = 1; // if (z_sign), as if for absolute value
+          }
+          // the result is always inexact, and never tiny
+          // check for overflow for RN
+          if (e3 > expmax) {
+            if (rnd_mode == ROUNDING_TO_NEAREST) {
+              res.w[1] = z_sign | 0x7800000000000000ull; // +/-inf
+              res.w[0] = 0x0000000000000000ull;
+              *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+            } else {
+              rounding_correction (rnd_mode,
+        			   is_inexact_lt_midpoint,
+        			   is_inexact_gt_midpoint,
+        			   is_midpoint_lt_even,
+        			   is_midpoint_gt_even, e3, &res,
+        			   pfpsf);
+            }
+            *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+            *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+            *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+            *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+            BID_SWAP128 (res);
+            BID_RETURN (res)
+          }
+          // set the inexact flag
+          *pfpsf |= INEXACT_EXCEPTION;
+          if (rnd_mode != ROUNDING_TO_NEAREST) {
+            rounding_correction (rnd_mode,
+        			 is_inexact_lt_midpoint,
+        			 is_inexact_gt_midpoint,
+        			 is_midpoint_lt_even,
+        			 is_midpoint_gt_even, e3, &res, pfpsf);
+          }
+          z_exp = res.w[1] & MASK_EXP;
+        } else { // if C3 * 10^scale = 10^33
+          e3 = (z_exp >> 49) - 6176;
+          if (e3 > expmin) {
+            // the result is exact if exp > expmin and C4 = d*10^(q4-1), 
+            // where d = 1, 2, 3, ..., 9; it could be tiny too, but exact
+            if (q4 == 1) {
+              // if q4 = 1 the result is exact
+              // result coefficient = 10^34 - C4
+              res.w[1] = 0x0001ed09bead87c0ull;
+              res.w[0] = 0x378d8e6400000000ull - C4.w[0];
+              z_exp = z_exp - EXP_P1;
+              e3 = e3 - 1;
+              res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+            } else {
+              // if q4 > 1 then truncate C4 from q4 digits to 1 digit; 
+              // x = q4-1, 1 <= x <= 67 and check if this operation is exact
+              if (q4 <= 18) { // 2 <= q4 <= 18
+        	round64_2_18 (q4, q4 - 1, C4.w[0], &R64, &incr_exp,
+        		      &is_midpoint_lt_even,
+        		      &is_midpoint_gt_even,
+        		      &is_inexact_lt_midpoint,
+        		      &is_inexact_gt_midpoint);
+              } else if (q4 <= 38) {
+        	P128.w[1] = C4.w[1];
+        	P128.w[0] = C4.w[0];
+        	round128_19_38 (q4, q4 - 1, P128, &R128, &incr_exp,
+        			&is_midpoint_lt_even,
+        			&is_midpoint_gt_even,
+        			&is_inexact_lt_midpoint,
+        			&is_inexact_gt_midpoint);
+        	R64 = R128.w[0]; // one decimal digit
+              } else if (q4 <= 57) {
+        	P192.w[2] = C4.w[2];
+        	P192.w[1] = C4.w[1];
+        	P192.w[0] = C4.w[0];
+        	round192_39_57 (q4, q4 - 1, P192, &R192, &incr_exp,
+        			&is_midpoint_lt_even,
+        			&is_midpoint_gt_even,
+        			&is_inexact_lt_midpoint,
+        			&is_inexact_gt_midpoint);
+        	R64 = R192.w[0]; // one decimal digit
+              } else { // if (q4 <= 68)
+        	round256_58_76 (q4, q4 - 1, C4, &R256, &incr_exp,
+        			&is_midpoint_lt_even,
+        			&is_midpoint_gt_even,
+        			&is_inexact_lt_midpoint,
+        			&is_inexact_gt_midpoint);
+        	R64 = R256.w[0]; // one decimal digit
+              }
+              if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	  !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+        	// the result is exact: 10^34 - R64
+        	// incr_exp = 0 with certainty
+        	z_exp = z_exp - EXP_P1;
+        	e3 = e3 - 1;
+        	res.w[1] =
+        	  z_sign | (z_exp & MASK_EXP) | 0x0001ed09bead87c0ull;
+        	res.w[0] = 0x378d8e6400000000ull - R64;
+              } else {
+        	// We want R64 to be the top digit of C4, but we actually 
+        	// obtained (C4 * 10^(-q4+1))RN; a correction may be needed,
+        	// because the top digit is (C4 * 10^(-q4+1))RZ
+        	// however, if incr_exp = 1 then R64 = 10 with certainty
+        	if (incr_exp) {
+        	  R64 = 10;
+        	}
+        	// the result is inexact as C4 has more than 1 significant digit
+        	// and C3 * 10^scale = 10^33
+        	// example of case that is treated here:
+        	// 100...0 * 10^e3 - 0.41 * 10^e3 =
+        	// 0999...9.59 * 10^e3 -> rounds to 99...96*10^(e3-1)
+        	// note that (e3 > expmin}
+        	// in order to round, subtract R64 from 10^34 and then compare
+        	// C4 - R64 * 10^(q4-1) with 1/2 ulp
+        	// calculate 10^34 - R64
+        	res.w[1] = 0x0001ed09bead87c0ull;
+        	res.w[0] = 0x378d8e6400000000ull - R64;
+        	z_exp = z_exp - EXP_P1; // will be OR-ed with sign & significand
+        	// calculate C4 - R64 * 10^(q4-1); this is a rare case and
+        	// R64 is small, 1 <= R64 <= 9
+        	e3 = e3 - 1;
+        	if (is_inexact_lt_midpoint) {
+        	  is_inexact_lt_midpoint = 0;
+        	  is_inexact_gt_midpoint = 1;
+        	} else if (is_inexact_gt_midpoint) {
+        	  is_inexact_gt_midpoint = 0;
+        	  is_inexact_lt_midpoint = 1;
+        	} else if (is_midpoint_lt_even) {
+        	  is_midpoint_lt_even = 0;
+        	  is_midpoint_gt_even = 1;
+        	} else if (is_midpoint_gt_even) {
+        	  is_midpoint_gt_even = 0;
+        	  is_midpoint_lt_even = 1;
+        	} else {
+        	  ;
+        	}
+        	// the result is always inexact, and never tiny
+        	// check for overflow for RN
+        	if (e3 > expmax) {
+        	  if (rnd_mode == ROUNDING_TO_NEAREST) {
+        	    res.w[1] = z_sign | 0x7800000000000000ull; // +/-inf
+        	    res.w[0] = 0x0000000000000000ull;
+        	    *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+        	  } else {
+        	    rounding_correction (rnd_mode,
+        				 is_inexact_lt_midpoint,
+        				 is_inexact_gt_midpoint,
+        				 is_midpoint_lt_even,
+        				 is_midpoint_gt_even, e3, &res,
+        				 pfpsf);
+        	  }
+        	  *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+        	  *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+        	  *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+        	  *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+        	  BID_SWAP128 (res);
+        	  BID_RETURN (res)
+        	}
+        	// set the inexact flag
+        	*pfpsf |= INEXACT_EXCEPTION;
+        	res.w[1] =
+        	  z_sign | ((UINT64) (e3 + 6176) << 49) | res.w[1];
+        	if (rnd_mode != ROUNDING_TO_NEAREST) {
+        	  rounding_correction (rnd_mode,
+        			       is_inexact_lt_midpoint,
+        			       is_inexact_gt_midpoint,
+        			       is_midpoint_lt_even,
+        			       is_midpoint_gt_even, e3, &res,
+        			       pfpsf);
+        	}
+        	z_exp = res.w[1] & MASK_EXP;
+              } // end result is inexact
+            } // end q4 > 1
+          } else { // if (e3 = emin)
+            // if e3 = expmin the result is also tiny (the condition for
+            // tininess is C4 > 050...0 [q4 digits] which is met because
+            // the msd of C4 is not zero)
+            // the result is tiny and inexact in all rounding modes;
+            // it is either 100...0 or 0999...9 (use lt_half_ulp, eq_half_ulp, 
+            // gt_half_ulp to calculate)
+            // if (lt_half_ulp || eq_half_ulp) res = 10^33 stays unchanged
+
+            // p_sign != z_sign so swap gt_half_ulp and lt_half_ulp
+            if (gt_half_ulp) { // res = 10^33 - 1
+              res.w[1] = 0x0000314dc6448d93ull;
+              res.w[0] = 0x38c15b09ffffffffull;
+            } else {
+              res.w[1] = 0x0000314dc6448d93ull;
+              res.w[0] = 0x38c15b0a00000000ull;
+            }
+            res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+            *pfpsf |= UNDERFLOW_EXCEPTION; // inexact is set later
+
+            if (eq_half_ulp) {
+              is_midpoint_lt_even = 1; // if (z_sign), as if for absolute value
+            } else if (lt_half_ulp) {
+              is_inexact_gt_midpoint = 1; //if(z_sign), as if for absolute value
+            } else { // if (gt_half_ulp)
+              is_inexact_lt_midpoint = 1; //if(z_sign), as if for absolute value
+            }
+
+            if (rnd_mode != ROUNDING_TO_NEAREST) {
+              rounding_correction (rnd_mode,
+                  is_inexact_lt_midpoint,
+                  is_inexact_gt_midpoint,
+                  is_midpoint_lt_even,
+                  is_midpoint_gt_even, e3, &res,
+                  pfpsf);
+              z_exp = res.w[1] & MASK_EXP;
+            }
+          } // end e3 = emin
+          // set the inexact flag (if the result was not exact)
+          if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+              is_midpoint_lt_even || is_midpoint_gt_even)
+            *pfpsf |= INEXACT_EXCEPTION;
+        } // end 10^33
+      } // end if (p_sign != z_sign)
+      res.w[1] = z_sign | (z_exp & MASK_EXP) | res.w[1];
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else if (((q3 <= delta && delta < p34 && p34 < delta + q4) || // Case (2)
+        (q3 <= delta && delta + q4 <= p34) || // Case (3)
+        (delta < q3 && p34 < delta + q4) || // Case (4)
+        (delta < q3 && q3 <= delta + q4 && delta + q4 <= p34) || // Case (5)
+        (delta + q4 < q3)) && // Case (6)
+        !(delta <= 1 && p_sign != z_sign)) { // Case (2), (3), (4), (5) or (6)
+
+      // the result has the sign of z
+
+      if ((q3 <= delta && delta < p34 && p34 < delta + q4) || // Case (2)
+          (delta < q3 && p34 < delta + q4)) { // Case (4)
+        // round first the sum x * y + z with unbounded exponent
+        // scale C3 up by scale = p34 - q3, 1 <= scale <= p34-1, 
+        // 1 <= scale <= 33
+        // calculate res = C3 * 10^scale
+        scale = p34 - q3;
+        x0 = delta + q4 - p34;
+      } else if (delta + q4 < q3) { // Case (6)
+        // make Case (6) look like Case (3) or Case (5) with scale = 0
+        // by scaling up C4 by 10^(q3 - delta - q4) 
+        scale = q3 - delta - q4; // 1 <= scale <= 33
+        if (q4 <= 19) { // 1 <= scale <= 19; C4 fits in 64 bits
+          if (scale <= 19) { // 10^scale fits in 64 bits
+            // 64 x 64 C4.w[0] * ten2k64[scale]
+            __mul_64x64_to_128MACH (P128, C4.w[0], ten2k64[scale]);
+          } else { // 10^scale fits in 128 bits
+            // 64 x 128 C4.w[0] * ten2k128[scale - 20]
+            __mul_128x64_to_128 (P128, C4.w[0], ten2k128[scale - 20]);
+          }
+        } else { // C4 fits in 128 bits, but 10^scale must fit in 64 bits
+          // 64 x 128 ten2k64[scale] * C4
+          __mul_128x64_to_128 (P128, ten2k64[scale], C4);
+        }
+        C4.w[0] = P128.w[0];
+        C4.w[1] = P128.w[1];
+        // e4 does not need adjustment, as it is not used from this point on
+        scale = 0;
+        x0 = 0;
+        // now Case (6) looks like Case (3) or Case (5) with scale = 0 
+      } else { // if Case (3) or Case (5)
+        // Note: Case (3) is similar to Case (2), but scale differs and the
+        // result is exact, unless it is tiny (so x0 = 0 when calculating the
+        // result with unbounded exponent)
+
+        // calculate first the sum x * y + z with unbounded exponent (exact)
+        // scale C3 up by scale = delta + q4 - q3, 1 <= scale <= p34-1,
+        // 1 <= scale <= 33
+        // calculate res = C3 * 10^scale
+        scale = delta + q4 - q3;
+        x0 = 0;
+        // Note: the comments which follow refer [mainly] to Case (2)]
+      }
+
+    case2_repeat:
+      if (scale == 0) { // this could happen e.g. if we return to case2_repeat
+        // or in Case (4)
+        res.w[1] = C3.w[1];
+        res.w[0] = C3.w[0];
+      } else if (q3 <= 19) { // 1 <= scale <= 19; z fits in 64 bits
+        if (scale <= 19) { // 10^scale fits in 64 bits
+          // 64 x 64 C3.w[0] * ten2k64[scale]
+          __mul_64x64_to_128MACH (res, C3.w[0], ten2k64[scale]);
+        } else { // 10^scale fits in 128 bits
+          // 64 x 128 C3.w[0] * ten2k128[scale - 20]
+          __mul_128x64_to_128 (res, C3.w[0], ten2k128[scale - 20]);
+        }
+      } else { // z fits in 128 bits, but 10^scale must fit in 64 bits
+        // 64 x 128 ten2k64[scale] * C3
+        __mul_128x64_to_128 (res, ten2k64[scale], C3);
+      }
+      // e3 is already calculated
+      e3 = e3 - scale;
+      // now res = C3 * 10^scale and e3 = e3 - scale
+      // Note: C3 * 10^scale could be 10^34 if we returned to case2_repeat
+      // because the result was too small
+
+      // round C4 to nearest to q4 - x0 digits, where x0 = delta + q4 - p34,
+      // 1 <= x0 <= min (q4 - 1, 2 * p34 - 1) <=> 1 <= x0 <= min (q4 - 1, 67)
+      // Also: 1 <= q4 - x0 <= p34 -1 => 1 <= q4 - x0 <= 33 (so the result of
+      // the rounding fits in 128 bits!)
+      // x0 = delta + q4 - p34 (calculated before reaching case2_repeat)
+      // because q3 + q4 - x0 <= P => x0 >= q3 + q4 - p34
+      if (x0 == 0) { // this could happen only if we return to case2_repeat, or
+        // for Case (3) or Case (6)
+        R128.w[1] = C4.w[1];
+        R128.w[0] = C4.w[0];
+      } else if (q4 <= 18) {
+        // 2 <= q4 <= 18, max(1, q3+q4-p34) <= x0 <= q4 - 1, 1 <= x0 <= 17
+        round64_2_18 (q4, x0, C4.w[0], &R64, &incr_exp,
+            &is_midpoint_lt_even, &is_midpoint_gt_even,
+            &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+        if (incr_exp) {
+          // R64 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 1, 1 <= q4 - x0 <= 17
+          R64 = ten2k64[q4 - x0];
+        }
+        R128.w[1] = 0;
+        R128.w[0] = R64;
+      } else if (q4 <= 38) {
+        // 19 <= q4 <= 38, max(1, q3+q4-p34) <= x0 <= q4 - 1, 1 <= x0 <= 37
+        P128.w[1] = C4.w[1];
+        P128.w[0] = C4.w[0];
+        round128_19_38 (q4, x0, P128, &R128, &incr_exp,
+            &is_midpoint_lt_even, &is_midpoint_gt_even,
+            &is_inexact_lt_midpoint,
+            &is_inexact_gt_midpoint);
+        if (incr_exp) {
+          // R128 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 1, 1 <= q4 - x0 <= 37
+          if (q4 - x0 <= 19) { // 1 <= q4 - x0 <= 19
+            R128.w[0] = ten2k64[q4 - x0];
+            // R128.w[1] stays 0
+          } else { // 20 <= q4 - x0 <= 37
+            R128.w[0] = ten2k128[q4 - x0 - 20].w[0];
+            R128.w[1] = ten2k128[q4 - x0 - 20].w[1];
+          }
+        }
+      } else if (q4 <= 57) {
+        // 38 <= q4 <= 57, max(1, q3+q4-p34) <= x0 <= q4 - 1, 5 <= x0 <= 56
+        P192.w[2] = C4.w[2];
+        P192.w[1] = C4.w[1];
+        P192.w[0] = C4.w[0];
+        round192_39_57 (q4, x0, P192, &R192, &incr_exp,
+            &is_midpoint_lt_even, &is_midpoint_gt_even,
+            &is_inexact_lt_midpoint,
+            &is_inexact_gt_midpoint);
+        // R192.w[2] is always 0
+        if (incr_exp) {
+          // R192 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 5, 1 <= q4 - x0 <= 52
+          if (q4 - x0 <= 19) { // 1 <= q4 - x0 <= 19
+            R192.w[0] = ten2k64[q4 - x0];
+            // R192.w[1] stays 0
+            // R192.w[2] stays 0
+          } else { // 20 <= q4 - x0 <= 33
+            R192.w[0] = ten2k128[q4 - x0 - 20].w[0];
+            R192.w[1] = ten2k128[q4 - x0 - 20].w[1];
+            // R192.w[2] stays 0
+          }
+        }
+        R128.w[1] = R192.w[1];
+        R128.w[0] = R192.w[0];
+      } else {
+        // 58 <= q4 <= 68, max(1, q3+q4-p34) <= x0 <= q4 - 1, 25 <= x0 <= 67
+        round256_58_76 (q4, x0, C4, &R256, &incr_exp,
+            &is_midpoint_lt_even, &is_midpoint_gt_even,
+            &is_inexact_lt_midpoint,
+            &is_inexact_gt_midpoint);
+        // R256.w[3] and R256.w[2] are always 0
+        if (incr_exp) {
+          // R256 = 10^(q4-x0), 1 <= q4 - x0 <= q4 - 25, 1 <= q4 - x0 <= 43
+          if (q4 - x0 <= 19) { // 1 <= q4 - x0 <= 19  
+            R256.w[0] = ten2k64[q4 - x0];
+            // R256.w[1] stays 0
+            // R256.w[2] stays 0
+            // R256.w[3] stays 0
+          } else { // 20 <= q4 - x0 <= 33 
+            R256.w[0] = ten2k128[q4 - x0 - 20].w[0];
+            R256.w[1] = ten2k128[q4 - x0 - 20].w[1];
+            // R256.w[2] stays 0
+            // R256.w[3] stays 0
+          }
+        }
+        R128.w[1] = R256.w[1];
+        R128.w[0] = R256.w[0];
+      }
+      // now add C3 * 10^scale in res and the signed top (q4-x0) digits of C4,
+      // rounded to nearest, which were copied into R128
+      if (z_sign == p_sign) {
+        lsb = res.w[0] & 0x01; // lsb of C3 * 10^scale
+        // the sum can result in [up to] p34 or p34 + 1 digits
+        res.w[0] = res.w[0] + R128.w[0];
+        res.w[1] = res.w[1] + R128.w[1];
+        if (res.w[0] < R128.w[0])
+          res.w[1]++; // carry
+        // if res > 10^34 - 1 need to increase x0 and decrease scale by 1
+        if (res.w[1] > 0x0001ed09bead87c0ull ||
+            (res.w[1] == 0x0001ed09bead87c0ull &&
+             res.w[0] > 0x378d8e63ffffffffull)) {
+          // avoid double rounding error
+          is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+          is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+          is_midpoint_lt_even0 = is_midpoint_lt_even;
+          is_midpoint_gt_even0 = is_midpoint_gt_even;
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 0;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+          P128.w[1] = res.w[1];
+          P128.w[0] = res.w[0];
+          round128_19_38 (35, 1, P128, &res, &incr_exp,
+              &is_midpoint_lt_even, &is_midpoint_gt_even,
+              &is_inexact_lt_midpoint,
+              &is_inexact_gt_midpoint);
+          // incr_exp is 0 with certainty in this case
+          // avoid a double rounding error
+          if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+              is_midpoint_lt_even) { // double rounding error upward
+            // res = res - 1
+            res.w[0]--;
+            if (res.w[0] == 0xffffffffffffffffull)
+              res.w[1]--;
+            // Note: a double rounding error upward is not possible; for this
+            // the result after the first rounding would have to be 99...95
+            // (35 digits in all), possibly followed by a number of zeros; this
+            // not possible in Cases (2)-(6) or (15)-(17) which may get here
+            is_midpoint_lt_even = 0;
+            is_inexact_lt_midpoint = 1;
+          } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+              is_midpoint_gt_even) { // double rounding error downward
+            // res = res + 1
+            res.w[0]++;
+            if (res.w[0] == 0)
+              res.w[1]++;
+            is_midpoint_gt_even = 0;
+            is_inexact_gt_midpoint = 1;
+          } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	     !is_inexact_lt_midpoint
+        	     && !is_inexact_gt_midpoint) {
+            // if this second rounding was exact the result may still be 
+            // inexact because of the first rounding
+            if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+              is_inexact_gt_midpoint = 1;
+            }
+            if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+              is_inexact_lt_midpoint = 1;
+            }
+          } else if (is_midpoint_gt_even &&
+        	     (is_inexact_gt_midpoint0
+        	      || is_midpoint_lt_even0)) {
+            // pulled up to a midpoint
+            is_inexact_lt_midpoint = 1;
+            is_inexact_gt_midpoint = 0;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+          } else if (is_midpoint_lt_even &&
+        	     (is_inexact_lt_midpoint0
+        	      || is_midpoint_gt_even0)) {
+            // pulled down to a midpoint
+            is_inexact_lt_midpoint = 0;
+            is_inexact_gt_midpoint = 1;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+          } else {
+            ;
+          }
+          // adjust exponent
+          e3 = e3 + 1;
+          if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+              !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+            if (is_midpoint_lt_even0 || is_midpoint_gt_even0 ||
+        	is_inexact_lt_midpoint0 || is_inexact_gt_midpoint0) {
+              is_inexact_lt_midpoint = 1;
+            }
+          }
+        } else {
+          // this is the result rounded with unbounded exponent, unless a
+          // correction is needed
+          res.w[1] = res.w[1] & MASK_COEFF;
+          if (lsb == 1) {
+            if (is_midpoint_gt_even) {
+              // res = res + 1
+              is_midpoint_gt_even = 0;
+              is_midpoint_lt_even = 1;
+              res.w[0]++;
+              if (res.w[0] == 0x0)
+        	res.w[1]++;
+              // check for rounding overflow
+              if (res.w[1] == 0x0001ed09bead87c0ull &&
+        	  res.w[0] == 0x378d8e6400000000ull) {
+        	// res = 10^34 => rounding overflow
+        	res.w[1] = 0x0000314dc6448d93ull;
+        	res.w[0] = 0x38c15b0a00000000ull; // 10^33
+        	e3++;
+              }
+            } else if (is_midpoint_lt_even) {
+              // res = res - 1
+              is_midpoint_lt_even = 0;
+              is_midpoint_gt_even = 1;
+              res.w[0]--;
+              if (res.w[0] == 0xffffffffffffffffull)
+        	res.w[1]--;
+              // if the result is pure zero, the sign depends on the rounding 
+              // mode (x*y and z had opposite signs)
+              if (res.w[1] == 0x0ull && res.w[0] == 0x0ull) {
+        	if (rnd_mode != ROUNDING_DOWN)
+        	  z_sign = 0x0000000000000000ull;
+        	else
+        	  z_sign = 0x8000000000000000ull;
+        	// the exponent is max (e3, expmin)
+        	res.w[1] = 0x0;
+        	res.w[0] = 0x0;
+        	*ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+        	*ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+        	*ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+        	*ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+        	BID_SWAP128 (res);
+        	BID_RETURN (res)
+              }
+            } else {
+              ;
+            }
+          }
+        }
+      } else { // if (z_sign != p_sign)
+        lsb = res.w[0] & 0x01; // lsb of C3 * 10^scale; R128 contains rounded C4
+        // used to swap rounding indicators if p_sign != z_sign
+        // the sum can result in [up to] p34 or p34 - 1 digits
+        tmp64 = res.w[0];
+        res.w[0] = res.w[0] - R128.w[0];
+        res.w[1] = res.w[1] - R128.w[1];
+        if (res.w[0] > tmp64)
+          res.w[1]--; // borrow
+        // if res < 10^33 and exp > expmin need to decrease x0 and 
+        // increase scale by 1
+        if (e3 > expmin && ((res.w[1] < 0x0000314dc6448d93ull ||
+        		     (res.w[1] == 0x0000314dc6448d93ull &&
+        		      res.w[0] < 0x38c15b0a00000000ull)) ||
+        		    (is_inexact_lt_midpoint
+        		     && res.w[1] == 0x0000314dc6448d93ull
+        		     && res.w[0] == 0x38c15b0a00000000ull))
+            && x0 >= 1) {
+          x0 = x0 - 1;
+          // first restore e3, otherwise it will be too small
+          e3 = e3 + scale;
+          scale = scale + 1;
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 0;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+          incr_exp = 0;
+          goto case2_repeat;
+        }
+        // else this is the result rounded with unbounded exponent;
+        // because the result has opposite sign to that of C4 which was 
+        // rounded, need to change the rounding indicators
+        if (is_inexact_lt_midpoint) {
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 1;
+        } else if (is_inexact_gt_midpoint) {
+          is_inexact_gt_midpoint = 0;
+          is_inexact_lt_midpoint = 1;
+        } else if (lsb == 0) {
+          if (is_midpoint_lt_even) {
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 1;
+          } else if (is_midpoint_gt_even) {
+            is_midpoint_gt_even = 0;
+            is_midpoint_lt_even = 1;
+          } else {
+            ;
+          }
+        } else if (lsb == 1) {
+          if (is_midpoint_lt_even) {
+            // res = res + 1
+            res.w[0]++;
+            if (res.w[0] == 0x0)
+              res.w[1]++;
+            // check for rounding overflow
+            if (res.w[1] == 0x0001ed09bead87c0ull &&
+        	res.w[0] == 0x378d8e6400000000ull) {
+              // res = 10^34 => rounding overflow
+              res.w[1] = 0x0000314dc6448d93ull;
+              res.w[0] = 0x38c15b0a00000000ull; // 10^33
+              e3++;
+            }
+          } else if (is_midpoint_gt_even) {
+            // res = res - 1
+            res.w[0]--;
+            if (res.w[0] == 0xffffffffffffffffull)
+              res.w[1]--;
+            // if the result is pure zero, the sign depends on the rounding 
+            // mode (x*y and z had opposite signs)
+            if (res.w[1] == 0x0ull && res.w[0] == 0x0ull) {
+              if (rnd_mode != ROUNDING_DOWN)
+        	z_sign = 0x0000000000000000ull;
+              else
+        	z_sign = 0x8000000000000000ull;
+              // the exponent is max (e3, expmin)
+              res.w[1] = 0x0;
+              res.w[0] = 0x0;
+              *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+              *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+              *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+              *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+              BID_SWAP128 (res);
+              BID_RETURN (res)
+            }
+          } else {
+            ;
+          }
+        } else {
+          ;
+        }
+      }
+      // check for underflow
+      if (e3 == expmin) { // and if significand < 10^33 => result is tiny
+        if ((res.w[1] & MASK_COEFF) < 0x0000314dc6448d93ull ||
+            ((res.w[1] & MASK_COEFF) == 0x0000314dc6448d93ull &&
+             res.w[0] < 0x38c15b0a00000000ull)) {
+          is_tiny = 1;
+        }
+      } else if (e3 < expmin) {
+        // the result is tiny, so we must truncate more of res
+        is_tiny = 1;
+        x0 = expmin - e3;
+        is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+        is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+        is_midpoint_lt_even0 = is_midpoint_lt_even;
+        is_midpoint_gt_even0 = is_midpoint_gt_even;
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+        // determine the number of decimal digits in res
+        if (res.w[1] == 0x0) {
+          // between 1 and 19 digits
+          for (ind = 1; ind <= 19; ind++) {
+            if (res.w[0] < ten2k64[ind]) {
+              break;
+            }
+          }
+          // ind digits
+        } else if (res.w[1] < ten2k128[0].w[1] ||
+        	   (res.w[1] == ten2k128[0].w[1]
+        	    && res.w[0] < ten2k128[0].w[0])) {
+          // 20 digits
+          ind = 20;
+        } else { // between 21 and 38 digits
+          for (ind = 1; ind <= 18; ind++) {
+            if (res.w[1] < ten2k128[ind].w[1] ||
+        	(res.w[1] == ten2k128[ind].w[1] &&
+        	 res.w[0] < ten2k128[ind].w[0])) {
+              break;
+            }
+          }
+          // ind + 20 digits
+          ind = ind + 20;
+        }
+
+        // at this point ind >= x0; because delta >= 2 on this path, the case
+        // ind = x0 can occur only in Case (2) or case (3), when C3 has one
+        // digit (q3 = 1) equal to 1 (C3 = 1), e3 is expmin (e3 = expmin), 
+        // the signs of x * y and z are opposite, and through cancellation 
+        // the most significant decimal digit in res has the weight
+        // 10^(emin-1); however, it is clear that in this case the most
+        // significant digit is 9, so the result before rounding is
+        // 0.9... * 10^emin
+        // Otherwise, ind > x0 because there are non-zero decimal digits in the
+        // result with weight of at least 10^emin, and correction for underflow
+        //  can be carried out using the round*_*_2_* () routines
+        if (x0 == ind) { // the result before rounding is 0.9... * 10^emin
+          res.w[1] = 0x0;
+          res.w[0] = 0x1;
+          is_inexact_gt_midpoint = 1;
+        } else if (ind <= 18) { // check that 2 <= ind
+          // 2 <= ind <= 18, 1 <= x0 <= 17
+          round64_2_18 (ind, x0, res.w[0], &R64, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+          if (incr_exp) {
+            // R64 = 10^(ind-x0), 1 <= ind - x0 <= ind - 1, 1 <= ind - x0 <= 17
+            R64 = ten2k64[ind - x0];
+          }
+          res.w[1] = 0;
+          res.w[0] = R64;
+        } else if (ind <= 38) {
+          // 19 <= ind <= 38
+          P128.w[1] = res.w[1];
+          P128.w[0] = res.w[0];
+          round128_19_38 (ind, x0, P128, &res, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+          if (incr_exp) {
+            // R128 = 10^(ind-x0), 1 <= ind - x0 <= ind - 1, 1 <= ind - x0 <= 37
+            if (ind - x0 <= 19) { // 1 <= ind - x0 <= 19
+              res.w[0] = ten2k64[ind - x0];
+              // res.w[1] stays 0
+            } else { // 20 <= ind - x0 <= 37
+              res.w[0] = ten2k128[ind - x0 - 20].w[0];
+              res.w[1] = ten2k128[ind - x0 - 20].w[1];
+            }
+          }
+        }
+        // avoid a double rounding error
+        if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+            is_midpoint_lt_even) { // double rounding error upward
+          // res = res - 1
+          res.w[0]--;
+          if (res.w[0] == 0xffffffffffffffffull)
+            res.w[1]--;
+          // Note: a double rounding error upward is not possible; for this
+          // the result after the first rounding would have to be 99...95
+          // (35 digits in all), possibly followed by a number of zeros; this
+          // not possible in Cases (2)-(6) which may get here
+          is_midpoint_lt_even = 0;
+          is_inexact_lt_midpoint = 1;
+        } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+            is_midpoint_gt_even) { // double rounding error downward
+          // res = res + 1
+          res.w[0]++;
+          if (res.w[0] == 0)
+            res.w[1]++;
+          is_midpoint_gt_even = 0;
+          is_inexact_gt_midpoint = 1;
+        } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	   !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+          // if this second rounding was exact the result may still be 
+          // inexact because of the first rounding
+          if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+            is_inexact_gt_midpoint = 1;
+          }
+          if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+            is_inexact_lt_midpoint = 1;
+          }
+        } else if (is_midpoint_gt_even &&
+        	   (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+          // pulled up to a midpoint
+          is_inexact_lt_midpoint = 1;
+          is_inexact_gt_midpoint = 0;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else if (is_midpoint_lt_even &&
+        	   (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+          // pulled down to a midpoint
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 1;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else {
+          ;
+        }
+        // adjust exponent
+        e3 = e3 + x0;
+        if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+            !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+          if (is_midpoint_lt_even0 || is_midpoint_gt_even0 ||
+              is_inexact_lt_midpoint0 || is_inexact_gt_midpoint0) {
+            is_inexact_lt_midpoint = 1;
+          }
+        }
+      } else {
+        ; // not underflow
+      }
+      // check for inexact result
+      if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+          is_midpoint_lt_even || is_midpoint_gt_even) {
+        // set the inexact flag
+        *pfpsf |= INEXACT_EXCEPTION;
+        if (is_tiny)
+          *pfpsf |= UNDERFLOW_EXCEPTION;
+      }
+      // now check for significand = 10^34 (may have resulted from going
+      // back to case2_repeat)
+      if (res.w[1] == 0x0001ed09bead87c0ull && 
+          res.w[0] == 0x378d8e6400000000ull) { // if  res = 10^34
+        res.w[1] = 0x0000314dc6448d93ull; // res = 10^33
+        res.w[0] = 0x38c15b0a00000000ull;
+        e3 = e3 + 1;
+      }
+      res.w[1] = z_sign | ((UINT64) (e3 + 6176) << 49) | res.w[1];
+      // check for overflow
+      if (rnd_mode == ROUNDING_TO_NEAREST && e3 > expmax) {
+        res.w[1] = z_sign | 0x7800000000000000ull; // +/-inf
+        res.w[0] = 0x0000000000000000ull;
+        *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+      }
+      if (rnd_mode != ROUNDING_TO_NEAREST) {
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e3, &res, pfpsf);
+      }
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else {
+
+      // we get here only if delta <= 1 in Cases (2), (3), (4), (5), or (6) and
+      // the signs of x*y and z are opposite; in these cases massive
+      // cancellation can occur, so it is better to scale either C3 or C4 and 
+      // to perform the subtraction before rounding; rounding is performed 
+      // next, depending on the number of decimal digits in the result and on 
+      // the exponent value
+      // Note: overlow is not possible in this case
+      // this is similar to Cases (15), (16), and (17)
+
+      if (delta + q4 < q3) { // from Case (6) 
+        // Case (6) with 0<= delta <= 1 is similar to Cases (15), (16), and 
+        // (17) if we swap (C3, C4), (q3, q4), (e3, e4), (z_sign, p_sign)
+        // and call add_and_round; delta stays positive
+        // C4.w[3] = 0 and C4.w[2] = 0, so swap just the low part of C4 with C3
+        P128.w[1] = C3.w[1];
+        P128.w[0] = C3.w[0];
+        C3.w[1] = C4.w[1];
+        C3.w[0] = C4.w[0];
+        C4.w[1] = P128.w[1];
+        C4.w[0] = P128.w[0];
+        ind = q3;
+        q3 = q4;
+        q4 = ind;
+        ind = e3;
+        e3 = e4;
+        e4 = ind;
+        tmp_sign = z_sign;
+        z_sign = p_sign;
+        p_sign = tmp_sign;
+      } else { // from Cases (2), (3), (4), (5)
+        // In Cases (2), (3), (4), (5) with 0 <= delta <= 1 C3 has to be 
+        // scaled up by q4 + delta - q3; this is the same as in Cases (15), 
+        // (16), and (17) if we just change the sign of delta
+        delta = -delta;
+      }
+      add_and_round (q3, q4, e4, delta, p34, z_sign, p_sign, C3, C4,
+        	     rnd_mode, &is_midpoint_lt_even,
+        	     &is_midpoint_gt_even, &is_inexact_lt_midpoint,
+        	     &is_inexact_gt_midpoint, pfpsf, &res);
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    }
+
+  } else { // if delta < 0
+
+    delta = -delta;
+
+    if (p34 < q4 && q4 <= delta) { // Case (7)
+
+      // truncate C4 to p34 digits into res
+      // x = q4-p34, 1 <= x <= 34 because 35 <= q4 <= 68
+      x0 = q4 - p34;
+      if (q4 <= 38) {
+        P128.w[1] = C4.w[1];
+        P128.w[0] = C4.w[0];
+        round128_19_38 (q4, x0, P128, &res, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+      } else if (q4 <= 57) { // 35 <= q4 <= 57
+        P192.w[2] = C4.w[2];
+        P192.w[1] = C4.w[1];
+        P192.w[0] = C4.w[0];
+        round192_39_57 (q4, x0, P192, &R192, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+        res.w[0] = R192.w[0];
+        res.w[1] = R192.w[1];
+      } else { // if (q4 <= 68)
+        round256_58_76 (q4, x0, C4, &R256, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+        res.w[0] = R256.w[0];
+        res.w[1] = R256.w[1];
+      }
+      e4 = e4 + x0;
+      if (incr_exp) {
+        e4 = e4 + 1;
+      }
+      if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+          !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+        // if C4 rounded to p34 digits is exact then the result is inexact,
+        // in a way that depends on the signs of x * y and z
+        if (p_sign == z_sign) {
+          is_inexact_lt_midpoint = 1;
+        } else { // if (p_sign != z_sign)
+          if (res.w[1] != 0x0000314dc6448d93ull || 
+              res.w[0] != 0x38c15b0a00000000ull) { // res != 10^33
+            is_inexact_gt_midpoint = 1;
+          } else { // res = 10^33 and exact is a special case
+            // if C3 < 1/2 ulp then res = 10^33 and is_inexact_gt_midpoint = 1
+            // if C3 = 1/2 ulp then res = 10^33 and is_midpoint_lt_even = 1
+            // if C3 > 1/2 ulp then res = 10^34-1 and is_inexact_lt_midpoint = 1
+            // Note: ulp is really ulp/10 (after borrow which propagates to msd)
+            if (delta > p34 + 1) { // C3 < 1/2
+              // res = 10^33, unchanged
+              is_inexact_gt_midpoint = 1;
+            } else { // if (delta == p34 + 1)
+              if (q3 <= 19) {
+        	if (C3.w[0] < midpoint64[q3 - 1]) { // C3 < 1/2 ulp
+        	  // res = 10^33, unchanged
+        	  is_inexact_gt_midpoint = 1;
+        	} else if (C3.w[0] == midpoint64[q3 - 1]) { // C3 = 1/2 ulp
+        	  // res = 10^33, unchanged
+        	  is_midpoint_lt_even = 1;
+        	} else { // if (C3.w[0] > midpoint64[q3-1]), C3 > 1/2 ulp
+        	  res.w[1] = 0x0001ed09bead87c0ull; // 10^34 - 1
+        	  res.w[0] = 0x378d8e63ffffffffull;
+        	  e4 = e4 - 1;
+        	  is_inexact_lt_midpoint = 1;
+        	}
+              } else { // if (20 <= q3 <=34)
+        	if (C3.w[1] < midpoint128[q3 - 20].w[1] || 
+                    (C3.w[1] == midpoint128[q3 - 20].w[1] && 
+                    C3.w[0] < midpoint128[q3 - 20].w[0])) { // C3 < 1/2 ulp
+        	  // res = 10^33, unchanged
+        	  is_inexact_gt_midpoint = 1;
+        	} else if (C3.w[1] == midpoint128[q3 - 20].w[1] && 
+                    C3.w[0] == midpoint128[q3 - 20].w[0]) { // C3 = 1/2 ulp
+        	  // res = 10^33, unchanged
+        	  is_midpoint_lt_even = 1;
+        	} else { // if (C3 > midpoint128[q3-20]), C3 > 1/2 ulp
+        	  res.w[1] = 0x0001ed09bead87c0ull; // 10^34 - 1
+        	  res.w[0] = 0x378d8e63ffffffffull;
+        	  e4 = e4 - 1;
+        	  is_inexact_lt_midpoint = 1;
+        	}
+              }
+            }
+          }
+        }
+      } else if (is_midpoint_lt_even) {
+        if (z_sign != p_sign) {
+          // needs correction: res = res - 1
+          res.w[0] = res.w[0] - 1;
+          if (res.w[0] == 0xffffffffffffffffull)
+            res.w[1]--;
+          // if it is (10^33-1)*10^e4 then the corect result is 
+          // (10^34-1)*10(e4-1)
+          if (res.w[1] == 0x0000314dc6448d93ull &&
+              res.w[0] == 0x38c15b09ffffffffull) {
+            res.w[1] = 0x0001ed09bead87c0ull; // 10^34 - 1
+            res.w[0] = 0x378d8e63ffffffffull;
+            e4 = e4 - 1;
+          }
+          is_midpoint_lt_even = 0;
+          is_inexact_lt_midpoint = 1;
+        } else { // if (z_sign == p_sign)
+          is_midpoint_lt_even = 0;
+          is_inexact_gt_midpoint = 1;
+        }
+      } else if (is_midpoint_gt_even) {
+        if (z_sign == p_sign) {
+          // needs correction: res = res + 1 (cannot cross in the next binade)
+          res.w[0] = res.w[0] + 1;
+          if (res.w[0] == 0x0000000000000000ull)
+            res.w[1]++;
+          is_midpoint_gt_even = 0;
+          is_inexact_gt_midpoint = 1;
+        } else { // if (z_sign != p_sign)
+          is_midpoint_gt_even = 0;
+          is_inexact_lt_midpoint = 1;
+        }
+      } else {
+        ; // the rounded result is already correct
+      }
+      // check for overflow
+      if (rnd_mode == ROUNDING_TO_NEAREST && e4 > expmax) {
+        res.w[1] = p_sign | 0x7800000000000000ull;
+        res.w[0] = 0x0000000000000000ull;
+        *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+      } else { // no overflow or not RN
+        p_exp = ((UINT64) (e4 + 6176) << 49);
+        res.w[1] = p_sign | (p_exp & MASK_EXP) | res.w[1];
+      }
+      if (rnd_mode != ROUNDING_TO_NEAREST) {
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e4, &res, pfpsf);
+      }
+      if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+          is_midpoint_lt_even || is_midpoint_gt_even) {
+        // set the inexact flag
+        *pfpsf |= INEXACT_EXCEPTION;
+      }
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else if ((q4 <= p34 && p34 <= delta) || // Case (8)
+        (q4 <= delta && delta < p34 && p34 < delta + q3) || // Case (9)
+        (q4 <= delta && delta + q3 <= p34) || // Case (10)
+        (delta < q4 && q4 <= p34 && p34 < delta + q3) || // Case (13)
+        (delta < q4 && q4 <= delta + q3 && delta + q3 <= p34) || // Case (14)
+        (delta + q3 < q4 && q4 <= p34)) { // Case (18)
+
+      // Case (8) is similar to Case (1), with C3 and C4 swapped
+      // Case (9) is similar to Case (2), with C3 and C4 swapped
+      // Case (10) is similar to Case (3), with C3 and C4 swapped
+      // Case (13) is similar to Case (4), with C3 and C4 swapped
+      // Case (14) is similar to Case (5), with C3 and C4 swapped
+      // Case (18) is similar to Case (6), with C3 and C4 swapped
+
+      // swap (C3, C4), (q3, q4), (e3, 34), (z_sign, p_sign), (z_exp, p_exp)
+      // and go back to delta_ge_zero
+      // C4.w[3] = 0 and C4.w[2] = 0, so swap just the low part of C4 with C3
+      P128.w[1] = C3.w[1];
+      P128.w[0] = C3.w[0];
+      C3.w[1] = C4.w[1];
+      C3.w[0] = C4.w[0];
+      C4.w[1] = P128.w[1];
+      C4.w[0] = P128.w[0];
+      ind = q3;
+      q3 = q4;
+      q4 = ind;
+      ind = e3;
+      e3 = e4;
+      e4 = ind;
+      tmp_sign = z_sign;
+      z_sign = p_sign;
+      p_sign = tmp_sign;
+      tmp.ui64 = z_exp;
+      z_exp = p_exp;
+      p_exp = tmp.ui64;
+      goto delta_ge_zero;
+
+    } else if ((p34 <= delta && delta < q4 && q4 < delta + q3) || // Case (11)
+               (delta < p34 && p34 < q4 && q4 < delta + q3)) { // Case (12)
+
+      // round C3 to nearest to q3 - x0 digits, where x0 = e4 - e3,
+      // 1 <= x0 <= q3 - 1 <= p34 - 1 
+      x0 = e4 - e3; // or x0 = delta + q3 - q4
+      if (q3 <= 18) { // 2 <= q3 <= 18
+        round64_2_18 (q3, x0, C3.w[0], &R64, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+        // C3.w[1] = 0;
+        C3.w[0] = R64;
+      } else if (q3 <= 38) {
+        round128_19_38 (q3, x0, C3, &R128, &incr_exp,
+        		&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint);
+        C3.w[1] = R128.w[1];
+        C3.w[0] = R128.w[0];
+      }
+      // the rounded result has q3 - x0 digits
+      // we want the exponent to be e4, so if incr_exp = 1 then
+      // multiply the rounded result by 10 - it will still fit in 113 bits
+      if (incr_exp) {
+        // 64 x 128 -> 128
+        P128.w[1] = C3.w[1];
+        P128.w[0] = C3.w[0];
+        __mul_64x128_to_128 (C3, ten2k64[1], P128);
+      }
+      e3 = e3 + x0; // this is e4
+      // now add/subtract the 256-bit C4 and the new (and shorter) 128-bit C3; 
+      // the result will have the sign of x * y; the exponent is e4
+      R256.w[3] = 0;
+      R256.w[2] = 0;
+      R256.w[1] = C3.w[1];
+      R256.w[0] = C3.w[0];
+      if (p_sign == z_sign) { // R256 = C4 + R256
+        add256 (C4, R256, &R256);
+      } else { // if (p_sign != z_sign) { // R256 = C4 - R256
+        sub256 (C4, R256, &R256); // the result cannot be pure zero
+        // because the result has opposite sign to that of R256 which was 
+        // rounded, need to change the rounding indicators
+        lsb = C4.w[0] & 0x01;
+        if (is_inexact_lt_midpoint) {
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 1;
+        } else if (is_inexact_gt_midpoint) {
+          is_inexact_gt_midpoint = 0;
+          is_inexact_lt_midpoint = 1;
+        } else if (lsb == 0) {
+          if (is_midpoint_lt_even) {
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 1;
+          } else if (is_midpoint_gt_even) {
+            is_midpoint_gt_even = 0;
+            is_midpoint_lt_even = 1;
+          } else {
+            ;
+          }
+        } else if (lsb == 1) {
+          if (is_midpoint_lt_even) {
+            // res = res + 1
+            R256.w[0]++;
+            if (R256.w[0] == 0x0) {
+              R256.w[1]++;
+              if (R256.w[1] == 0x0) {
+        	R256.w[2]++;
+        	if (R256.w[2] == 0x0) {
+        	  R256.w[3]++;
+        	}
+              }
+            }
+            // no check for rounding overflow - R256 was a difference
+          } else if (is_midpoint_gt_even) {
+            // res = res - 1
+            R256.w[0]--;
+            if (R256.w[0] == 0xffffffffffffffffull) {
+              R256.w[1]--;
+              if (R256.w[1] == 0xffffffffffffffffull) {
+        	R256.w[2]--;
+        	if (R256.w[2] == 0xffffffffffffffffull) {
+        	  R256.w[3]--;
+        	}
+              }
+            }
+          } else {
+            ;
+          }
+        } else {
+          ;
+        }
+      }
+      // determine the number of decimal digits in R256
+      ind = nr_digits256 (R256); // ind >= p34
+      // if R256 is sum, then ind > p34; if R256 is a difference, then 
+      // ind >= p34; this means that we can calculate the result rounded to
+      // the destination precision, with unbounded exponent, starting from R256
+      // and using the indicators from the rounding of C3 to avoid a double
+      // rounding error 
+
+      if (ind < p34) {
+        ;
+      } else if (ind == p34) {
+        // the result rounded to the destination precision with 
+        // unbounded exponent
+        // is (-1)^p_sign * R256 * 10^e4
+        res.w[1] = R256.w[1];
+        res.w[0] = R256.w[0];
+      } else { // if (ind > p34)
+        // if more than P digits, round to nearest to P digits
+        // round R256 to p34 digits
+        x0 = ind - p34; // 1 <= x0 <= 34 as 35 <= ind <= 68
+        // save C3 rounding indicators to help avoid double rounding error
+        is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+        is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+        is_midpoint_lt_even0 = is_midpoint_lt_even;
+        is_midpoint_gt_even0 = is_midpoint_gt_even;
+        // initialize rounding indicators
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+        // round to p34 digits; the result fits in 113 bits
+        if (ind <= 38) {
+          P128.w[1] = R256.w[1];
+          P128.w[0] = R256.w[0];
+          round128_19_38 (ind, x0, P128, &R128, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+        } else if (ind <= 57) {
+          P192.w[2] = R256.w[2];
+          P192.w[1] = R256.w[1];
+          P192.w[0] = R256.w[0];
+          round192_39_57 (ind, x0, P192, &R192, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+          R128.w[1] = R192.w[1];
+          R128.w[0] = R192.w[0];
+        } else { // if (ind <= 68)
+          round256_58_76 (ind, x0, R256, &R256, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+          R128.w[1] = R256.w[1];
+          R128.w[0] = R256.w[0];
+        }
+        // the rounded result has p34 = 34 digits
+        e4 = e4 + x0 + incr_exp;
+
+        res.w[1] = R128.w[1];
+        res.w[0] = R128.w[0];
+
+        // avoid a double rounding error
+        if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+            is_midpoint_lt_even) { // double rounding error upward
+          // res = res - 1
+          res.w[0]--;
+          if (res.w[0] == 0xffffffffffffffffull)
+            res.w[1]--;
+          is_midpoint_lt_even = 0;
+          is_inexact_lt_midpoint = 1;
+          // Note: a double rounding error upward is not possible; for this
+          // the result after the first rounding would have to be 99...95
+          // (35 digits in all), possibly followed by a number of zeros; this
+          // not possible in Cases (2)-(6) or (15)-(17) which may get here
+          // if this is 10^33 - 1 make it 10^34 - 1 and decrement exponent
+          if (res.w[1] == 0x0000314dc6448d93ull && 
+            res.w[0] == 0x38c15b09ffffffffull) { // 10^33 - 1
+            res.w[1] = 0x0001ed09bead87c0ull; // 10^34 - 1
+            res.w[0] = 0x378d8e63ffffffffull;
+            e4--;
+          }
+        } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+            is_midpoint_gt_even) { // double rounding error downward
+          // res = res + 1 
+          res.w[0]++;
+          if (res.w[0] == 0)
+            res.w[1]++;
+          is_midpoint_gt_even = 0;
+          is_inexact_gt_midpoint = 1;
+        } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	   !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+          // if this second rounding was exact the result may still be
+          // inexact because of the first rounding
+          if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+            is_inexact_gt_midpoint = 1;
+          }
+          if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+            is_inexact_lt_midpoint = 1;
+          }
+        } else if (is_midpoint_gt_even &&
+        	   (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+          // pulled up to a midpoint
+          is_inexact_lt_midpoint = 1;
+          is_inexact_gt_midpoint = 0;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else if (is_midpoint_lt_even &&
+        	   (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+          // pulled down to a midpoint
+          is_inexact_lt_midpoint = 0;
+          is_inexact_gt_midpoint = 1;
+          is_midpoint_lt_even = 0;
+          is_midpoint_gt_even = 0;
+        } else {
+          ;
+        }
+      }
+
+      // determine tininess
+      if (rnd_mode == ROUNDING_TO_NEAREST) {
+        if (e4 < expmin) {
+          is_tiny = 1; // for other rounding modes apply correction
+        }
+      } else {
+        // for RM, RP, RZ, RA apply correction in order to determine tininess
+        // but do not save the result; apply the correction to 
+        // (-1)^p_sign * res * 10^0
+        P128.w[1] = p_sign | 0x3040000000000000ull | res.w[1];
+        P128.w[0] = res.w[0];
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     0, &P128, pfpsf);
+        scale = ((P128.w[1] & MASK_EXP) >> 49) - 6176; // -1, 0, or +1
+        // the number of digits in the significand is p34 = 34
+        if (e4 + scale < expmin) {
+          is_tiny = 1;
+        }
+      }
+
+      // the result rounded to the destination precision with unbounded exponent
+      // is (-1)^p_sign * res * 10^e4
+      res.w[1] = p_sign | ((UINT64) (e4 + 6176) << 49) | res.w[1]; // RN
+      // res.w[0] unchanged;
+      // Note: res is correct only if expmin <= e4 <= expmax
+      ind = p34; // the number of decimal digits in the signifcand of res
+
+      // at this point we have the result rounded with unbounded exponent in
+      // res and we know its tininess:
+      // res = (-1)^p_sign * significand * 10^e4, 
+      // where q (significand) = ind = p34
+      // Note: res is correct only if expmin <= e4 <= expmax
+
+      // check for overflow if RN
+      if (rnd_mode == ROUNDING_TO_NEAREST
+          && (ind + e4) > (p34 + expmax)) {
+        res.w[1] = p_sign | 0x7800000000000000ull;
+        res.w[0] = 0x0000000000000000ull;
+        *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+        *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+        *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+        *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+        *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+        BID_SWAP128 (res);
+        BID_RETURN (res)
+      } // else not overflow or not RN, so continue
+
+      // from this point on this is similar to the last part of the computation
+      // for Cases (15), (16), (17)
+
+      // if (e4 >= expmin) we have the result rounded with bounded exponent
+      if (e4 < expmin) {
+        x0 = expmin - e4; // x0 >= 1; the number of digits to chop off of res
+        // where the result rounded [at most] once is
+        //   (-1)^p_sign * significand_res * 10^e4
+
+        // avoid double rounding error
+        is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+        is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+        is_midpoint_lt_even0 = is_midpoint_lt_even;
+        is_midpoint_gt_even0 = is_midpoint_gt_even;
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+
+        if (x0 > ind) {
+          // nothing is left of res when moving the decimal point left x0 digits
+          is_inexact_lt_midpoint = 1;
+          res.w[1] = p_sign | 0x0000000000000000ull;
+          res.w[0] = 0x0000000000000000ull;
+          e4 = expmin;
+        } else if (x0 == ind) { // 1 <= x0 = ind <= p34 = 34
+          // this is <, =, or > 1/2 ulp
+          // compare the ind-digit value in the significand of res with
+          // 1/2 ulp = 5*10^(ind-1), i.e. determine whether it is 
+          // less than, equal to, or greater than 1/2 ulp (significand of res)
+          R128.w[1] = res.w[1] & MASK_COEFF;
+          R128.w[0] = res.w[0];
+          if (ind <= 19) {
+            if (R128.w[0] < midpoint64[ind - 1]) { // < 1/2 ulp
+              lt_half_ulp = 1;
+              is_inexact_lt_midpoint = 1;
+            } else if (R128.w[0] == midpoint64[ind - 1]) { // = 1/2 ulp
+              eq_half_ulp = 1;
+              is_midpoint_gt_even = 1;
+            } else { // > 1/2 ulp
+              gt_half_ulp = 1;
+              is_inexact_gt_midpoint = 1;
+            }
+          } else { // if (ind <= 38)
+            if (R128.w[1] < midpoint128[ind - 20].w[1] || 
+                (R128.w[1] == midpoint128[ind - 20].w[1] && 
+                R128.w[0] < midpoint128[ind - 20].w[0])) { // < 1/2 ulp
+              lt_half_ulp = 1;
+              is_inexact_lt_midpoint = 1;
+            } else if (R128.w[1] == midpoint128[ind - 20].w[1] && 
+                R128.w[0] == midpoint128[ind - 20].w[0]) { // = 1/2 ulp
+              eq_half_ulp = 1;
+              is_midpoint_gt_even = 1;
+            } else { // > 1/2 ulp
+              gt_half_ulp = 1;
+              is_inexact_gt_midpoint = 1;
+            }
+          }
+          if (lt_half_ulp || eq_half_ulp) {
+            // res = +0.0 * 10^expmin
+            res.w[1] = 0x0000000000000000ull;
+            res.w[0] = 0x0000000000000000ull;
+          } else { // if (gt_half_ulp)
+            // res = +1 * 10^expmin
+            res.w[1] = 0x0000000000000000ull;
+            res.w[0] = 0x0000000000000001ull;
+          }
+          res.w[1] = p_sign | res.w[1];
+          e4 = expmin;
+        } else { // if (1 <= x0 <= ind - 1 <= 33)
+          // round the ind-digit result to ind - x0 digits
+
+          if (ind <= 18) { // 2 <= ind <= 18
+            round64_2_18 (ind, x0, res.w[0], &R64, &incr_exp,
+        		  &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		  &is_inexact_lt_midpoint,
+        		  &is_inexact_gt_midpoint);
+            res.w[1] = 0x0;
+            res.w[0] = R64;
+          } else if (ind <= 38) {
+            P128.w[1] = res.w[1] & MASK_COEFF;
+            P128.w[0] = res.w[0];
+            round128_19_38 (ind, x0, P128, &res, &incr_exp,
+        		    &is_midpoint_lt_even, &is_midpoint_gt_even,
+        		    &is_inexact_lt_midpoint,
+        		    &is_inexact_gt_midpoint);
+          }
+          e4 = e4 + x0; // expmin
+          // we want the exponent to be expmin, so if incr_exp = 1 then
+          // multiply the rounded result by 10 - it will still fit in 113 bits
+          if (incr_exp) {
+            // 64 x 128 -> 128
+            P128.w[1] = res.w[1] & MASK_COEFF;
+            P128.w[0] = res.w[0];
+            __mul_64x128_to_128 (res, ten2k64[1], P128);
+          }
+          res.w[1] =
+            p_sign | ((UINT64) (e4 + 6176) << 49) | (res.
+        					     w[1] & MASK_COEFF);
+          // avoid a double rounding error
+          if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+                is_midpoint_lt_even) { // double rounding error upward
+            // res = res - 1
+            res.w[0]--;
+            if (res.w[0] == 0xffffffffffffffffull)
+              res.w[1]--;
+            // Note: a double rounding error upward is not possible; for this
+            // the result after the first rounding would have to be 99...95
+            // (35 digits in all), possibly followed by a number of zeros; this
+            // not possible in this underflow case
+            is_midpoint_lt_even = 0;
+            is_inexact_lt_midpoint = 1;
+          } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+                is_midpoint_gt_even) { // double rounding error downward
+            // res = res + 1
+            res.w[0]++;
+            if (res.w[0] == 0)
+              res.w[1]++;
+            is_midpoint_gt_even = 0;
+            is_inexact_gt_midpoint = 1;
+          } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	     !is_inexact_lt_midpoint
+        	     && !is_inexact_gt_midpoint) {
+            // if this second rounding was exact the result may still be 
+            // inexact because of the first rounding
+            if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+              is_inexact_gt_midpoint = 1;
+            }
+            if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+              is_inexact_lt_midpoint = 1;
+            }
+          } else if (is_midpoint_gt_even &&
+        	     (is_inexact_gt_midpoint0
+        	      || is_midpoint_lt_even0)) {
+            // pulled up to a midpoint
+            is_inexact_lt_midpoint = 1;
+            is_inexact_gt_midpoint = 0;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+          } else if (is_midpoint_lt_even &&
+        	     (is_inexact_lt_midpoint0
+        	      || is_midpoint_gt_even0)) {
+            // pulled down to a midpoint
+            is_inexact_lt_midpoint = 0;
+            is_inexact_gt_midpoint = 1;
+            is_midpoint_lt_even = 0;
+            is_midpoint_gt_even = 0;
+          } else {
+            ;
+          }
+        }
+      }
+      // res contains the correct result
+      // apply correction if not rounding to nearest
+      if (rnd_mode != ROUNDING_TO_NEAREST) {
+        rounding_correction (rnd_mode,
+        		     is_inexact_lt_midpoint,
+        		     is_inexact_gt_midpoint,
+        		     is_midpoint_lt_even, is_midpoint_gt_even,
+        		     e4, &res, pfpsf);
+      }
+      if (is_midpoint_lt_even || is_midpoint_gt_even ||
+          is_inexact_lt_midpoint || is_inexact_gt_midpoint) {
+        // set the inexact flag
+        *pfpsf |= INEXACT_EXCEPTION;
+        if (is_tiny)
+          *pfpsf |= UNDERFLOW_EXCEPTION;
+      }
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else if ((p34 <= delta && delta + q3 <= q4) || // Case (15)
+        (delta < p34 && p34 < delta + q3 && delta + q3 <= q4) || //Case (16)
+        (delta + q3 <= p34 && p34 < q4)) { // Case (17)
+
+      // calculate first the result rounded to the destination precision, with
+      // unbounded exponent
+
+      add_and_round (q3, q4, e4, delta, p34, z_sign, p_sign, C3, C4,
+              rnd_mode, &is_midpoint_lt_even,
+              &is_midpoint_gt_even, &is_inexact_lt_midpoint,
+              &is_inexact_gt_midpoint, pfpsf, &res);
+      *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+      *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+      *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+      *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+
+    } else {
+      ;
+    }
+
+  } // end if delta < 0
+
+  *ptr_is_midpoint_lt_even = is_midpoint_lt_even;
+  *ptr_is_midpoint_gt_even = is_midpoint_gt_even;
+  *ptr_is_inexact_lt_midpoint = is_inexact_lt_midpoint;
+  *ptr_is_inexact_gt_midpoint = is_inexact_gt_midpoint;
+  BID_SWAP128 (res);
+  BID_RETURN (res)
+
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_fma (UINT128 * pres, UINT128 * px, UINT128 * py, UINT128 * pz
+            _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+            _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128_fma (UINT128 x, UINT128 y, UINT128 z
+            _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+            _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even, is_midpoint_gt_even,
+    is_inexact_lt_midpoint, is_inexact_gt_midpoint;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, &x, &y, &z
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x, y,
+        		z _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128ddd_fma (UINT128 * pres, UINT64 * px, UINT64 * py, UINT64 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128ddd_fma (UINT64 x, UINT64 y, UINT64 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 x1, y1, z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, &x1, &y1, &z1
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x1, y1,
+        		z1 _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128ddq_fma (UINT128 * pres, UINT64 * px, UINT64 * py, UINT128 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py;
+  UINT128 z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128ddq_fma (UINT64 x, UINT64 y, UINT128 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 x1, y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, &x1, &y1, &z
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x1, y1,
+        		z _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dqd_fma (UINT128 * pres, UINT64 * px, UINT128 * py, UINT64 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 x = *px, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dqd_fma (UINT64 x, UINT128 y, UINT64 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 x1, z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, &x1, py, &z1
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x1, y,
+        		z1 _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dqq_fma (UINT128 * pres, UINT64 * px, UINT128 * py, UINT128 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dqq_fma (UINT64 x, UINT128 y, UINT128 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, &x1, py, pz
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x1, y,
+        		z _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qdd_fma (UINT128 * pres, UINT128 * px, UINT64 * py, UINT64 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qdd_fma (UINT128 x, UINT64 y, UINT64 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 y1, z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, px, &y1, &z1
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x, y1,
+        		z1 _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qdq_fma (UINT128 * pres, UINT128 * px, UINT64 * py, UINT128 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qdq_fma (UINT128 x, UINT64 y, UINT128 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, px, &y1, pz
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x, y1,
+        		z _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qqd_fma (UINT128 * pres, UINT128 * px, UINT128 * py, UINT64 * pz
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+  UINT64 z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qqd_fma (UINT128 x, UINT128 y, UINT64 z
+               _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+               _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        	  &is_inexact_lt_midpoint, &is_inexact_gt_midpoint,
+        	  &res, px, py, &z1
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_ext_fma (&is_midpoint_lt_even, &is_midpoint_gt_even,
+        		&is_inexact_lt_midpoint,
+        		&is_inexact_gt_midpoint, x, y,
+        		z1 _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+// Note: bid128qqq_fma is represented by bid128_fma
+
+// Note: bid64ddd_fma is represented by bid64_fma
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64ddq_fma (UINT64 * pres, UINT64 * px, UINT64 * py, UINT128 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64ddq_fma (UINT64 x, UINT64 y, UINT128 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 x1, y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, &x1, &y1, pz
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x1, y1, z
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64dqd_fma (UINT64 * pres, UINT64 * px, UINT128 * py, UINT64 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 x = *px, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64dqd_fma (UINT64 x, UINT128 y, UINT64 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 x1, z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, &x1, py, &z1
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x1, y, z1
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64dqq_fma (UINT64 * pres, UINT64 * px, UINT128 * py, UINT128 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64dqq_fma (UINT64 x, UINT128 y, UINT128 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, &x1, py, pz
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x1, y, z
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qdd_fma (UINT64 * pres, UINT128 * px, UINT64 * py, UINT64 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qdd_fma (UINT128 x, UINT64 y, UINT64 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 y1, z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, px, &y1, &z1
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x, y1, z1
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qdq_fma (UINT64 * pres, UINT128 * px, UINT64 * py, UINT128 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qdq_fma (UINT128 x, UINT64 y, UINT128 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, px, &y1, pz
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x, y1, z
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qqd_fma (UINT64 * pres, UINT128 * px, UINT128 * py, UINT64 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT64 z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qqd_fma (UINT128 x, UINT128 y, UINT64 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  UINT128 z1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&z1, &z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qqq_fma (&res1, px, py, &z1
+        	_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	_EXC_INFO_ARG);
+#else
+  z1 = bid64_to_bid128 (z _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res1 = bid64qqq_fma (x, y, z1
+        	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	       _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res1);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qqq_fma (UINT64 * pres, UINT128 * px, UINT128 * py, UINT128 * pz
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py, z = *pz;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qqq_fma (UINT128 x, UINT128 y, UINT128 z
+              _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+              _EXC_INFO_PARAM) {
+#endif
+  int is_midpoint_lt_even0 = 0, is_midpoint_gt_even0 = 0,
+    is_inexact_lt_midpoint0 = 0, is_inexact_gt_midpoint0 = 0;
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0,
+    is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+  int incr_exp;
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT128 res128 = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull} };
+  UINT64 res1 = 0xbaddbaddbaddbaddull;
+  unsigned int save_fpsf; // needed because of the call to bid128_ext_fma
+  UINT64 sign;
+  UINT64 exp;
+  int unbexp;
+  UINT128 C;
+  BID_UI64DOUBLE tmp;
+  int nr_bits;
+  int q, x0;
+  int scale;
+  int lt_half_ulp = 0, eq_half_ulp = 0;
+
+  // Note: for rounding modes other than RN or RA, the result can be obtained
+  // by rounding first to BID128 and then to BID64
+
+  save_fpsf = *pfpsf; // sticky bits - caller value must be preserved
+  *pfpsf = 0;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_ext_fma (&is_midpoint_lt_even0, &is_midpoint_gt_even0,
+        	  &is_inexact_lt_midpoint0, &is_inexact_gt_midpoint0,
+        	  &res, &x, &y, &z
+        	  _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        	  _EXC_INFO_ARG);
+#else
+  res = bid128_ext_fma (&is_midpoint_lt_even0, &is_midpoint_gt_even0,
+        		&is_inexact_lt_midpoint0,
+        		&is_inexact_gt_midpoint0, x, y,
+        		z _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+        		_EXC_INFO_ARG);
+#endif
+
+  if ((rnd_mode == ROUNDING_DOWN) || (rnd_mode == ROUNDING_UP) || 
+      (rnd_mode == ROUNDING_TO_ZERO) || // no double rounding error is possible
+      ((res.w[HIGH_128W] & MASK_NAN) == MASK_NAN) || //res=QNaN (cannot be SNaN)
+      ((res.w[HIGH_128W] & MASK_ANY_INF) == MASK_INF)) { // result is infinity  
+#if DECIMAL_CALL_BY_REFERENCE
+    bid128_to_bid64 (&res1, &res _RND_MODE_ARG _EXC_FLAGS_ARG);
+#else
+    res1 = bid128_to_bid64 (res _RND_MODE_ARG _EXC_FLAGS_ARG);
+#endif
+    // determine the unbiased exponent of the result
+    unbexp = ((res1 >> 53) & 0x3ff) - 398;
+
+    // if subnormal, res1  must have exp = -398
+    // if tiny and inexact set underflow and inexact status flags
+    if (!((res1 & MASK_NAN) == MASK_NAN) &&	// res1 not NaN
+        (unbexp == -398)
+        && ((res1 & MASK_BINARY_SIG1) < 1000000000000000ull)
+        && (is_inexact_lt_midpoint0 || is_inexact_gt_midpoint0
+            || is_midpoint_lt_even0 || is_midpoint_gt_even0)) {
+      // set the inexact flag and the underflow flag
+      *pfpsf |= (INEXACT_EXCEPTION | UNDERFLOW_EXCEPTION);
+    } else if (is_inexact_lt_midpoint0 || is_inexact_gt_midpoint0 ||
+               is_midpoint_lt_even0 || is_midpoint_gt_even0) {
+      // set the inexact flag and the underflow flag
+      *pfpsf |= INEXACT_EXCEPTION;
+    }
+
+    *pfpsf |= save_fpsf;
+    BID_RETURN (res1);
+  } // else continue, and use rounding to nearest to round to 16 digits
+
+  // at this point the result is rounded to nearest (even or away) to 34 digits
+  // (or less if exact), and it is zero or finite non-zero canonical [sub]normal
+  sign = res.w[HIGH_128W] & MASK_SIGN; // 0 for positive, MASK_SIGN for negative
+  exp = res.w[HIGH_128W] & MASK_EXP; // biased and shifted left 49 bits
+  unbexp = (exp >> 49) - 6176;
+  C.w[1] = res.w[HIGH_128W] & MASK_COEFF;
+  C.w[0] = res.w[LOW_128W];
+
+  if ((C.w[1] == 0x0 && C.w[0] == 0x0) ||	// result is zero
+      (unbexp <= (-398 - 35)) || (unbexp >= (369 + 16))) { 
+      // clear under/overflow
+#if DECIMAL_CALL_BY_REFERENCE
+    bid128_to_bid64 (&res1, &res _RND_MODE_ARG _EXC_FLAGS_ARG);
+#else
+    res1 = bid128_to_bid64 (res _RND_MODE_ARG _EXC_FLAGS_ARG);
+#endif
+    *pfpsf |= save_fpsf;
+    BID_RETURN (res1);
+  } // else continue
+
+  // -398 - 34 <= unbexp <= 369 + 15
+  if (rnd_mode == ROUNDING_TIES_AWAY) {
+    // apply correction, if needed, to make the result rounded to nearest-even
+    if (is_midpoint_gt_even) {
+      // res = res - 1
+      res1--; // res1 is now even
+    } // else the result is already correctly rounded to nearest-even
+  }
+  // at this point the result is finite, non-zero canonical normal or subnormal,
+  // and in most cases overflow or underflow will not occur
+
+  // determine the number of digits q in the result
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+  if (C.w[1] == 0) {
+    if (C.w[0] >= 0x0020000000000000ull) { // x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C.w[0] >= 0x0000000100000000ull) { // x >= 2^32
+        tmp.d = (double) (C.w[0] >> 32); // exact conversion
+        nr_bits =
+          33 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else { // x < 2^32
+        tmp.d = (double) (C.w[0]); // exact conversion
+        nr_bits =
+          1 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else { // if x < 2^53
+      tmp.d = (double) C.w[0]; // exact conversion
+      nr_bits =
+        1 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else { // C.w[1] != 0 => nr. bits = 64 + nr_bits (C.w[1])
+    tmp.d = (double) C.w[1]; // exact conversion
+    nr_bits =
+      65 + ((((unsigned int) (tmp.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[nr_bits - 1].digits1;
+    if (C.w[1] > nr_digits[nr_bits - 1].threshold_hi ||
+        (C.w[1] == nr_digits[nr_bits - 1].threshold_hi &&
+         C.w[0] >= nr_digits[nr_bits - 1].threshold_lo))
+      q++;
+  }
+  // if q > 16, round to nearest even to 16 digits (but for underflow it may 
+  // have to be truncated even more)
+  if (q > 16) {
+    x0 = q - 16;
+    if (q <= 18) {
+      round64_2_18 (q, x0, C.w[0], &res1, &incr_exp,
+        	    &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	    &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+    } else { // 19 <= q <= 34
+      round128_19_38 (q, x0, C, &res128, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+      res1 = res128.w[0]; // the result fits in 64 bits
+    }
+    unbexp = unbexp + x0;
+    if (incr_exp)
+      unbexp++;
+    q = 16; // need to set in case denormalization is necessary
+  } else {
+    // the result does not require a second rounding (and it must have 
+    // been exact in the first rounding, since q <= 16)
+    res1 = C.w[0];
+  }
+
+  // avoid a double rounding error
+  if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+      is_midpoint_lt_even) { // double rounding error upward
+    // res = res - 1 
+    res1--; // res1 becomes odd 
+    is_midpoint_lt_even = 0;
+    is_inexact_lt_midpoint = 1;
+    if (res1 == 0x00038d7ea4c67fffull) { // 10^15 - 1
+      res1 = 0x002386f26fc0ffffull; // 10^16 - 1 
+      unbexp--;
+    }
+  } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+      is_midpoint_gt_even) { // double rounding error downward
+    // res = res + 1
+    res1++; // res1 becomes odd (so it cannot be 10^16)
+    is_midpoint_gt_even = 0;
+    is_inexact_gt_midpoint = 1;
+  } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+             !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+    // if this second rounding was exact the result may still be 
+    // inexact because of the first rounding
+    if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+      is_inexact_gt_midpoint = 1;
+    }
+    if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+      is_inexact_lt_midpoint = 1;
+    }
+  } else if (is_midpoint_gt_even &&
+             (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+    // pulled up to a midpoint 
+    is_inexact_lt_midpoint = 1;
+    is_inexact_gt_midpoint = 0;
+    is_midpoint_lt_even = 0;
+    is_midpoint_gt_even = 0;
+  } else if (is_midpoint_lt_even &&
+             (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+    // pulled down to a midpoint 
+    is_inexact_lt_midpoint = 0;
+    is_inexact_gt_midpoint = 1;
+    is_midpoint_lt_even = 0;
+    is_midpoint_gt_even = 0;
+  } else {
+    ;
+  }
+  // this is the result rounded correctly to nearest even, with unbounded exp. 
+
+  // check for overflow
+  if (q + unbexp > P16 + expmax16) {
+    res1 = sign | 0x7800000000000000ull;
+    *pfpsf |= (INEXACT_EXCEPTION | OVERFLOW_EXCEPTION);
+    *pfpsf |= save_fpsf;
+    BID_RETURN (res1)
+  } else if (unbexp > expmax16) { // q + unbexp <= P16 + expmax16
+    // not overflow; the result must be exact, and we can multiply res1 by
+    // 10^(unbexp - expmax16) and the product will fit in 16 decimal digits
+    scale = unbexp - expmax16;
+    res1 = res1 * ten2k64[scale]; // res1 * 10^scale
+    unbexp = expmax16; // unbexp - scale 
+  } else {
+    ; // continue
+  }
+
+  // check for underflow
+  if (q + unbexp < P16 + expmin16) {
+    if (unbexp < expmin16) {
+      // we must truncate more of res
+      x0 = expmin16 - unbexp; // x0 >= 1
+      is_inexact_lt_midpoint0 = is_inexact_lt_midpoint;
+      is_inexact_gt_midpoint0 = is_inexact_gt_midpoint;
+      is_midpoint_lt_even0 = is_midpoint_lt_even;
+      is_midpoint_gt_even0 = is_midpoint_gt_even;
+      is_inexact_lt_midpoint = 0;
+      is_inexact_gt_midpoint = 0;
+      is_midpoint_lt_even = 0;
+      is_midpoint_gt_even = 0;
+      // the number of decimal digits in res1 is q
+      if (x0 < q) { // 1 <= x0 <= q-1 => round res to q - x0 digits
+        // 2 <= q <= 16, 1 <= x0 <= 15
+        round64_2_18 (q, x0, res1, &res1, &incr_exp,
+        	      &is_midpoint_lt_even, &is_midpoint_gt_even,
+        	      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+        if (incr_exp) {
+          // res1 = 10^(q-x0), 1 <= q - x0 <= q - 1, 1 <= q - x0 <= 15
+          res1 = ten2k64[q - x0];
+        }
+        unbexp = unbexp + x0; // expmin16
+      } else if (x0 == q) {
+        // the second rounding is for 0.d(0)d(1)...d(q-1) * 10^emin
+        // determine relationship with 1/2 ulp
+        // q <= 16
+        if (res1 < midpoint64[q - 1]) { // < 1/2 ulp
+          lt_half_ulp = 1;
+          is_inexact_lt_midpoint = 1;
+        } else if (res1 == midpoint64[q - 1]) { // = 1/2 ulp
+          eq_half_ulp = 1;
+          is_midpoint_gt_even = 1;
+        } else { // > 1/2 ulp
+          // gt_half_ulp = 1;
+          is_inexact_gt_midpoint = 1;
+        }
+        if (lt_half_ulp || eq_half_ulp) {
+          // res = +0.0 * 10^expmin16
+          res1 = 0x0000000000000000ull;
+        } else { // if (gt_half_ulp)
+          // res = +1 * 10^expmin16
+          res1 = 0x0000000000000001ull;
+        }
+        unbexp = expmin16;
+      } else { // if (x0 > q)
+        // the second rounding is for 0.0...d(0)d(1)...d(q-1) * 10^emin
+        res1 = 0x0000000000000000ull;
+        unbexp = expmin16;
+        is_inexact_lt_midpoint = 1;
+      }
+      // avoid a double rounding error
+      if ((is_inexact_gt_midpoint0 || is_midpoint_lt_even0) && 
+          is_midpoint_lt_even) { // double rounding error upward
+        // res = res - 1
+        res1--; // res1 becomes odd
+        is_midpoint_lt_even = 0;
+        is_inexact_lt_midpoint = 1;
+      } else if ((is_inexact_lt_midpoint0 || is_midpoint_gt_even0) && 
+          is_midpoint_gt_even) { // double rounding error downward
+        // res = res + 1
+        res1++; // res1 becomes odd
+        is_midpoint_gt_even = 0;
+        is_inexact_gt_midpoint = 1;
+      } else if (!is_midpoint_lt_even && !is_midpoint_gt_even &&
+        	 !is_inexact_lt_midpoint && !is_inexact_gt_midpoint) {
+        // if this rounding was exact the result may still be 
+        // inexact because of the previous roundings
+        if (is_inexact_gt_midpoint0 || is_midpoint_lt_even0) {
+          is_inexact_gt_midpoint = 1;
+        }
+        if (is_inexact_lt_midpoint0 || is_midpoint_gt_even0) {
+          is_inexact_lt_midpoint = 1;
+        }
+      } else if (is_midpoint_gt_even &&
+        	 (is_inexact_gt_midpoint0 || is_midpoint_lt_even0)) {
+        // pulled up to a midpoint
+        is_inexact_lt_midpoint = 1;
+        is_inexact_gt_midpoint = 0;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+      } else if (is_midpoint_lt_even &&
+        	 (is_inexact_lt_midpoint0 || is_midpoint_gt_even0)) {
+        // pulled down to a midpoint
+        is_inexact_lt_midpoint = 0;
+        is_inexact_gt_midpoint = 1;
+        is_midpoint_lt_even = 0;
+        is_midpoint_gt_even = 0;
+      } else {
+        ;
+      }
+    }
+    // else if unbexp >= emin then q < P (because q + unbexp < P16 + expmin16)
+    // and the result is tiny and exact
+
+    // check for inexact result
+    if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+        is_midpoint_lt_even || is_midpoint_gt_even ||
+        is_inexact_lt_midpoint0 || is_inexact_gt_midpoint0 ||
+        is_midpoint_lt_even0 || is_midpoint_gt_even0) {
+      // set the inexact flag and the underflow flag
+      *pfpsf |= (INEXACT_EXCEPTION | UNDERFLOW_EXCEPTION);
+    }
+  } else if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+             is_midpoint_lt_even || is_midpoint_gt_even) {
+    *pfpsf |= INEXACT_EXCEPTION;
+  }
+  // this is the result rounded correctly to nearest, with bounded exponent
+
+  if (rnd_mode == ROUNDING_TIES_AWAY && is_midpoint_gt_even) { // correction
+    // res = res + 1
+    res1++; // res1 is now odd
+  } // else the result is already correct
+
+  // assemble the result
+  if (res1 < 0x0020000000000000ull) { // res < 2^53
+    res1 = sign | ((UINT64) (unbexp + 398) << 53) | res1;
+  } else { // res1 >= 2^53
+    res1 = sign | MASK_STEERING_BITS |
+      ((UINT64) (unbexp + 398) << 51) | (res1 & MASK_BINARY_SIG2);
+  }
+  *pfpsf |= save_fpsf;
+  BID_RETURN (res1);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_logb.c b/gcc-4.9/libgcc/config/libbid/bid128_logb.c
new file mode 100644
index 000000000..d2b1b68c6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_logb.c
@@ -0,0 +1,58 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE(int, bid128_logb, x)
+
+  UINT128 CX;
+  UINT64 sign_x;
+  SINT64 D;
+  int_float f64, fx;
+  int exponent_x, bin_expon_cx, digits;
+
+  if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    BID_RETURN_VAL (0x80000000);
+  }
+  // find number of digits in coefficient
+  // 2^64
+  f64.i = 0x5f800000;
+  // fx ~ CX
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+  digits = estimate_decimal_digits[bin_expon_cx];
+  // scale = 38-estimate_decimal_digits[bin_expon_cx];
+  D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+  if (D > 0 || (!D && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0])) {
+    digits++;
+  }
+
+  exponent_x = exponent_x - DECIMAL_EXPONENT_BIAS_128 - 1 + digits;
+
+  BID_RETURN_VAL (exponent_x);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_minmax.c b/gcc-4.9/libgcc/config/libbid/bid128_minmax.c
new file mode 100644
index 000000000..c7c99622e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_minmax.c
@@ -0,0 +1,1095 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128 minimum number
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_minnum (UINT128 * pres, UINT128 * px,
+	       UINT128 * py _EXC_FLAGS_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+UINT128
+bid128_minnum (UINT128 x, UINT128 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT128 res;
+  int exp_x, exp_y;
+  int diff;
+  UINT128 sig_x, sig_y;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+
+  // check for non-canonical x
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    x.w[1] = x.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+  } else if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x = inf
+    x.w[1] = x.w[1] & (MASK_SIGN | MASK_INF);
+    x.w[0] = 0x0ull;
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      x.w[1] = (x.w[1] & MASK_SIGN) | ((x.w[1] << 2) & MASK_EXP);
+      x.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((x.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((x.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && x.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	x.w[1] = (x.w[1] & MASK_SIGN) | (x.w[1] & MASK_EXP);
+	x.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+  // check for non-canonical y
+  if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+    y.w[1] = y.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (y.w[0] > 0x38c15b09ffffffffull))) {
+      y.w[1] = y.w[1] & 0xffffc00000000000ull;
+      y.w[0] = 0x0ull;
+    }
+  } else if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y = inf
+    y.w[1] = y.w[1] & (MASK_SIGN | MASK_INF);
+    y.w[0] = 0x0ull;
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      y.w[1] = (y.w[1] & MASK_SIGN) | ((y.w[1] << 2) & MASK_EXP);
+      y.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((y.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((y.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && y.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	y.w[1] = (y.w[1] & MASK_SIGN) | (y.w[1] & MASK_EXP);
+	y.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+
+  // NaN (CASE1)
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x.w[1] = x.w[1] & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y.w[1] = y.w[1] & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return 0
+    res = (((x.w[1] & MASK_SIGN) == MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // CONVERT X
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CONVERT Y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => ignore the exponent 
+  //    field
+  //    (Any non-canonical # is considered 0)
+  if ((sig_x.w[1] == 0) && (sig_x.w[0] == 0)) {
+    x_is_zero = 1;
+  }
+  if ((sig_y.w[1] == 0) && (sig_y.w[0] == 0)) {
+    y_is_zero = 1;
+  }
+
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, neither is greater => return either number
+    res = x;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of 
+  //    the significands
+  if (exp_y == exp_x) {
+    res = (((sig_x.w[1] > sig_y.w[1])
+	    || (sig_x.w[1] == sig_y.w[1]
+		&& sig_x.w[0] >= sig_y.w[0])) ^ ((x.w[1] & MASK_SIGN) ==
+						 MASK_SIGN)) ? y : x;
+    BID_RETURN (res);
+  }
+  // if both components are either bigger or smaller, it is clear what 
+  //    needs to be done
+  if (sig_x.w[1] >= sig_y.w[1] && sig_x.w[0] >= sig_y.w[0]
+      && exp_x > exp_y) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  if (sig_x.w[1] <= sig_y.w[1] && sig_x.w[0] <= sig_y.w[0]
+      && exp_x < exp_y) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+
+  diff = exp_x - exp_y;
+
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (diff > 0) {	// to simplify the loop below,
+    // if exp_x is 33 greater than exp_y, no need for compensation
+    if (diff > 33) {
+      // difference cannot be greater than 10^33
+      res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? y : x;
+      BID_RETURN (res);
+    }
+    if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+      __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+      // if postitive, return whichever significand is larger 
+      // (converse if negative)
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) ==
+				  MASK_SIGN)) ? y : x;
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    res =
+      (((sig_n_prime192.w[2] > 0) || (sig_n_prime192.w[1] > sig_y.w[1])
+	|| (sig_n_prime192.w[1] == sig_y.w[1]
+	    && sig_n_prime192.w[0] >
+	    sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN)) ? y : x;
+    BID_RETURN (res);
+  }
+  diff = exp_y - exp_x;
+  // if exp_x is 33 less than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				 MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+  // if postitive, return whichever significand is larger (converse if negative)
+  res =
+    ((sig_n_prime192.w[2] != 0
+      || (sig_n_prime192.w[1] > sig_x.w[1]
+	  || (sig_n_prime192.w[1] == sig_x.w[1]
+	      && sig_n_prime192.w[0] > sig_x.w[0])))
+     ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN)) ? x : y;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128 minimum magnitude function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_minnum_mag (UINT128 * pres, UINT128 * px,
+		   UINT128 * py _EXC_FLAGS_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+UINT128
+bid128_minnum_mag (UINT128 x, UINT128 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT128 res;
+  int exp_x, exp_y;
+  int diff;
+  UINT128 sig_x, sig_y;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+
+  // check for non-canonical x
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    x.w[1] = x.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+  } else if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x = inf
+    x.w[1] = x.w[1] & (MASK_SIGN | MASK_INF);
+    x.w[0] = 0x0ull;
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      x.w[1] = (x.w[1] & MASK_SIGN) | ((x.w[1] << 2) & MASK_EXP);
+      x.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((x.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((x.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && x.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	x.w[1] = (x.w[1] & MASK_SIGN) | (x.w[1] & MASK_EXP);
+	x.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+  // check for non-canonical y
+  if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+    y.w[1] = y.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (y.w[0] > 0x38c15b09ffffffffull))) {
+      y.w[1] = y.w[1] & 0xffffc00000000000ull;
+      y.w[0] = 0x0ull;
+    }
+  } else if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y = inf
+    y.w[1] = y.w[1] & (MASK_SIGN | MASK_INF);
+    y.w[0] = 0x0ull;
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      y.w[1] = (y.w[1] & MASK_SIGN) | ((y.w[1] << 2) & MASK_EXP);
+      y.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((y.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((y.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && y.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	y.w[1] = (y.w[1] & MASK_SIGN) | (y.w[1] & MASK_EXP);
+	y.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+
+  // NaN (CASE1)
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x.w[1] = x.w[1] & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y.w[1] = y.w[1] & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+    res = y;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    // if x infinity, it has maximum magnitude.
+    // Check if magnitudes are equal.  If x is negative, return it.
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN
+	   && (y.w[1] & MASK_INF) == MASK_INF) ? x : y;
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is infinity, then x is less in magnitude
+    res = x;
+    BID_RETURN (res);
+  }
+  // CONVERT X
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CONVERT Y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if ((sig_x.w[1] == 0) && (sig_x.w[0] == 0)) {
+    res = x;
+    BID_RETURN (res);
+  }
+  if ((sig_y.w[1] == 0) && (sig_y.w[0] == 0)) {
+    res = y;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // check if exponents are the same and significands are the same
+  if (exp_y == exp_x && sig_x.w[1] == sig_y.w[1]
+      && sig_x.w[0] == sig_y.w[0]) {
+    if (x.w[1] & 0x8000000000000000ull) {	// x is negative
+      res = x;
+      BID_RETURN (res);
+    } else {
+      res = y;
+      BID_RETURN (res);
+    }
+  } else if (((sig_x.w[1] > sig_y.w[1] || (sig_x.w[1] == sig_y.w[1]
+					   && sig_x.w[0] > sig_y.w[0]))
+	      && exp_x == exp_y)
+	     || ((sig_x.w[1] > sig_y.w[1]
+		  || (sig_x.w[1] == sig_y.w[1]
+		      && sig_x.w[0] >= sig_y.w[0]))
+		 && exp_x > exp_y)) {
+    // if both components are either bigger or smaller, it is clear what 
+    // needs to be done; also if the magnitudes are equal
+    res = y;
+    BID_RETURN (res);
+  } else if (((sig_y.w[1] > sig_x.w[1] || (sig_y.w[1] == sig_x.w[1]
+					   && sig_y.w[0] > sig_x.w[0]))
+	      && exp_y == exp_x)
+	     || ((sig_y.w[1] > sig_x.w[1]
+		  || (sig_y.w[1] == sig_x.w[1]
+		      && sig_y.w[0] >= sig_x.w[0]))
+		 && exp_y > exp_x)) {
+    res = x;
+    BID_RETURN (res);
+  } else {
+    ;	// continue
+  }
+  diff = exp_x - exp_y;
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (diff > 0) {	// to simplify the loop below,
+    // if exp_x is 33 greater than exp_y, no need for compensation
+    if (diff > 33) {
+      res = y;	// difference cannot be greater than 10^33
+      BID_RETURN (res);
+    }
+    if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+      __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+      // if positive, return whichever significand is larger 
+      // (converse if negative)
+      if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	  && sig_n_prime256.w[1] == sig_y.w[1]
+	  && (sig_n_prime256.w[0] == sig_y.w[0])) {
+	res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;	// if equal
+	BID_RETURN (res);
+      }
+      res = (((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	     || (sig_n_prime256.w[1] > sig_y.w[1])
+	     || (sig_n_prime256.w[1] == sig_y.w[1]
+		 && sig_n_prime256.w[0] > sig_y.w[0])) ? y : x;
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+    // if positive, return whichever significand is larger 
+    // (converse if negative)
+    if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+	&& (sig_n_prime192.w[0] == sig_y.w[0])) {
+      // if = in magnitude, return +, (if possible)
+      res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+      BID_RETURN (res);
+    }
+    res = ((sig_n_prime192.w[2] > 0)
+	   || (sig_n_prime192.w[1] > sig_y.w[1])
+	   || (sig_n_prime192.w[1] == sig_y.w[1]
+	       && sig_n_prime192.w[0] > sig_y.w[0])) ? y : x;
+    BID_RETURN (res);
+  }
+  diff = exp_y - exp_x;
+  // if exp_x is 33 less than exp_y, no need for compensation
+  if (diff > 33) {
+    res = x;
+    BID_RETURN (res);
+  }
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+    // if positive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_x.w[1]
+	&& (sig_n_prime256.w[0] == sig_x.w[0])) {
+      // if = in magnitude, return +, (if possible)
+      res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+      BID_RETURN (res);
+    }
+    res = (sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	   && (sig_n_prime256.w[1] < sig_x.w[1]
+	       || (sig_n_prime256.w[1] == sig_x.w[1]
+		   && sig_n_prime256.w[0] < sig_x.w[0]))) ? y : x;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+  // if positive, return whichever significand is larger (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+      && (sig_n_prime192.w[0] == sig_x.w[0])) {
+    // if = in magnitude, return +, if possible)
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] < sig_x.w[0]))) ? y : x;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128 maximum function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_maxnum (UINT128 * pres, UINT128 * px,
+	       UINT128 * py _EXC_FLAGS_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+UINT128
+bid128_maxnum (UINT128 x, UINT128 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT128 res;
+  int exp_x, exp_y;
+  int diff;
+  UINT128 sig_x, sig_y;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+
+  // check for non-canonical x
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    x.w[1] = x.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+  } else if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x = inf
+    x.w[1] = x.w[1] & (MASK_SIGN | MASK_INF);
+    x.w[0] = 0x0ull;
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      x.w[1] = (x.w[1] & MASK_SIGN) | ((x.w[1] << 2) & MASK_EXP);
+      x.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((x.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((x.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && x.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	x.w[1] = (x.w[1] & MASK_SIGN) | (x.w[1] & MASK_EXP);
+	x.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+  // check for non-canonical y
+  if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+    y.w[1] = y.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (y.w[0] > 0x38c15b09ffffffffull))) {
+      y.w[1] = y.w[1] & 0xffffc00000000000ull;
+      y.w[0] = 0x0ull;
+    }
+  } else if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y = inf
+    y.w[1] = y.w[1] & (MASK_SIGN | MASK_INF);
+    y.w[0] = 0x0ull;
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      y.w[1] = (y.w[1] & MASK_SIGN) | ((y.w[1] << 2) & MASK_EXP);
+      y.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((y.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((y.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && y.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	y.w[1] = (y.w[1] & MASK_SIGN) | (y.w[1] & MASK_EXP);
+	y.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+
+  // NaN (CASE1)
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x.w[1] = x.w[1] & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y.w[1] = y.w[1] & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // CONVERT X
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CONVERT Y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if ((sig_x.w[1] == 0) && (sig_x.w[0] == 0)) {
+    x_is_zero = 1;
+  }
+  if ((sig_y.w[1] == 0) && (sig_y.w[0] == 0)) {
+    y_is_zero = 1;
+  }
+
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, neither is greater => return either number
+    res = x;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x.w[1] ^ y.w[1]) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if exponents are the same, then we have a simple comparison of 
+  // the significands
+  if (exp_y == exp_x) {
+    res = (((sig_x.w[1] > sig_y.w[1]) || (sig_x.w[1] == sig_y.w[1] &&
+					  sig_x.w[0] >= sig_y.w[0])) ^
+	   ((x.w[1] & MASK_SIGN) == MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  }
+  // if both components are either bigger or smaller, it is clear what 
+  // needs to be done
+  if ((sig_x.w[1] > sig_y.w[1]
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+      && exp_x >= exp_y) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  if ((sig_x.w[1] < sig_y.w[1]
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+      && exp_x <= exp_y) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  diff = exp_x - exp_y;
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (diff > 0) {	// to simplify the loop below,
+    // if exp_x is 33 greater than exp_y, no need for compensation
+    if (diff > 33) {
+      // difference cannot be greater than 10^33
+      res = ((x.w[1] & MASK_SIGN) != MASK_SIGN) ? x : y;
+      BID_RETURN (res);
+    }
+    if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+      __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+      // if postitive, return whichever significand is larger 
+      // (converse if negative)
+      res = ((((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	      || (sig_n_prime256.w[1] > sig_y.w[1])
+	      || (sig_n_prime256.w[1] == sig_y.w[1]
+		  && sig_n_prime256.w[0] >
+		  sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) ==
+				  MASK_SIGN)) ? x : y;
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    res =
+      (((sig_n_prime192.w[2] > 0) || (sig_n_prime192.w[1] > sig_y.w[1])
+	|| (sig_n_prime192.w[1] == sig_y.w[1]
+	    && sig_n_prime192.w[0] >
+	    sig_y.w[0])) ^ ((y.w[1] & MASK_SIGN) == MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  }
+  diff = exp_y - exp_x;
+  // if exp_x is 33 less than exp_y, no need for compensation
+  if (diff > 33) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    res =
+      ((sig_n_prime256.w[3] != 0 || sig_n_prime256.w[2] != 0
+	|| (sig_n_prime256.w[1] > sig_x.w[1]
+	    || (sig_n_prime256.w[1] == sig_x.w[1]
+		&& sig_n_prime256.w[0] >
+		sig_x.w[0]))) ^ ((x.w[1] & MASK_SIGN) !=
+				 MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+  // if postitive, return whichever significand is larger (converse if negative)
+  res =
+    ((sig_n_prime192.w[2] != 0
+      || (sig_n_prime192.w[1] > sig_x.w[1]
+	  || (sig_n_prime192.w[1] == sig_x.w[1]
+	      && sig_n_prime192.w[0] >
+	      sig_x.w[0]))) ^ ((y.w[1] & MASK_SIGN) !=
+			       MASK_SIGN)) ? x : y;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128 maximum magnitude function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_maxnum_mag (UINT128 * pres, UINT128 * px,
+		   UINT128 * py _EXC_FLAGS_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+UINT128
+bid128_maxnum_mag (UINT128 x, UINT128 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT128 res;
+  int exp_x, exp_y;
+  int diff;
+  UINT128 sig_x, sig_y;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+
+  // check for non-canonical x
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    x.w[1] = x.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+  } else if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x = inf
+    x.w[1] = x.w[1] & (MASK_SIGN | MASK_INF);
+    x.w[0] = 0x0ull;
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      x.w[1] = (x.w[1] & MASK_SIGN) | ((x.w[1] << 2) & MASK_EXP);
+      x.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((x.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((x.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && x.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	x.w[1] = (x.w[1] & MASK_SIGN) | (x.w[1] & MASK_EXP);
+	x.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+  // check for non-canonical y
+  if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+    y.w[1] = y.w[1] & 0xfe003fffffffffffull;	// clear out G[6]-G[16]
+    // check for non-canonical NaN payload
+    if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (y.w[0] > 0x38c15b09ffffffffull))) {
+      y.w[1] = y.w[1] & 0xffffc00000000000ull;
+      y.w[0] = 0x0ull;
+    }
+  } else if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y = inf
+    y.w[1] = y.w[1] & (MASK_SIGN | MASK_INF);
+    y.w[0] = 0x0ull;
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y.w[1] & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// G0_G1=11
+      // non-canonical
+      y.w[1] = (y.w[1] & MASK_SIGN) | ((y.w[1] << 2) & MASK_EXP);
+      y.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      if ((y.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((y.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull &&
+	   y.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	y.w[1] = (y.w[1] & MASK_SIGN) | (y.w[1] & MASK_EXP);
+	y.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+
+  // NaN (CASE1)
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x.w[1] = x.w[1] & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y.w[1] = y.w[1] & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x.w[0] == y.w[0] && x.w[1] == y.w[1]) {
+    res = y;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    // if x infinity, it has maximum magnitude
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN
+	   && (y.w[1] & MASK_INF) == MASK_INF) ? y : x;
+    BID_RETURN (res);
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    res = y;
+    BID_RETURN (res);
+  }
+  // CONVERT X
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CONVERT Y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //         therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if ((sig_x.w[1] == 0) && (sig_x.w[0] == 0)) {
+    res = y;
+    BID_RETURN (res);
+  }
+  if ((sig_y.w[1] == 0) && (sig_y.w[0] == 0)) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  if (exp_y == exp_x && sig_x.w[1] == sig_y.w[1]
+      && sig_x.w[0] == sig_y.w[0]) {
+    // check if exponents are the same and significands are the same
+    if (x.w[1] & 0x8000000000000000ull) {	// x is negative
+      res = y;
+      BID_RETURN (res);
+    } else {
+      res = x;
+      BID_RETURN (res);
+    }
+  } else if (((sig_x.w[1] > sig_y.w[1] || (sig_x.w[1] == sig_y.w[1]
+					   && sig_x.w[0] > sig_y.w[0]))
+	      && exp_x == exp_y)
+	     || ((sig_x.w[1] > sig_y.w[1]
+		  || (sig_x.w[1] == sig_y.w[1]
+		      && sig_x.w[0] >= sig_y.w[0]))
+		 && exp_x > exp_y)) {
+    // if both components are either bigger or smaller, it is clear what 
+    // needs to be done; also if the magnitudes are equal
+    res = x;
+    BID_RETURN (res);
+  } else if (((sig_y.w[1] > sig_x.w[1] || (sig_y.w[1] == sig_x.w[1]
+					   && sig_y.w[0] > sig_x.w[0]))
+	      && exp_y == exp_x)
+	     || ((sig_y.w[1] > sig_x.w[1]
+		  || (sig_y.w[1] == sig_x.w[1]
+		      && sig_y.w[0] >= sig_x.w[0]))
+		 && exp_y > exp_x)) {
+    res = y;
+    BID_RETURN (res);
+  } else {
+    ;	// continue
+  }
+  diff = exp_x - exp_y;
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (diff > 0) {	// to simplify the loop below,
+    // if exp_x is 33 greater than exp_y, no need for compensation
+    if (diff > 33) {
+      res = x;	// difference cannot be greater than 10^33
+      BID_RETURN (res);
+    }
+    if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+      __mul_128x128_to_256 (sig_n_prime256, sig_x, ten2k128[diff - 20]);
+      // if postitive, return whichever significand is larger 
+      // (converse if negative)
+      if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	  && sig_n_prime256.w[1] == sig_y.w[1]
+	  && (sig_n_prime256.w[0] == sig_y.w[0])) {
+	res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;	// if equal
+	BID_RETURN (res);
+      }
+      res = (((sig_n_prime256.w[3] > 0) || sig_n_prime256.w[2] > 0)
+	     || (sig_n_prime256.w[1] > sig_y.w[1])
+	     || (sig_n_prime256.w[1] == sig_y.w[1]
+		 && sig_n_prime256.w[0] > sig_y.w[0])) ? x : y;
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_x);
+    // if postitive, return whichever significand is larger (converse if negative)
+    if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+	&& (sig_n_prime192.w[0] == sig_y.w[0])) {
+      // if equal, return positive magnitude
+      res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+      BID_RETURN (res);
+    }
+    res = ((sig_n_prime192.w[2] > 0)
+	   || (sig_n_prime192.w[1] > sig_y.w[1])
+	   || (sig_n_prime192.w[1] == sig_y.w[1]
+	       && sig_n_prime192.w[0] > sig_y.w[0])) ? x : y;
+    BID_RETURN (res);
+  }
+  diff = exp_y - exp_x;
+  // if exp_x is 33 less than exp_y, no need for compensation
+  if (diff > 33) {
+    res = y;
+    BID_RETURN (res);
+  }
+  if (diff > 19) {	//128 by 128 bit multiply -> 256 bits
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y, ten2k128[diff - 20]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime256.w[3] == 0 && (sig_n_prime256.w[2] == 0)
+	&& sig_n_prime256.w[1] == sig_x.w[1]
+	&& (sig_n_prime256.w[0] == sig_x.w[0])) {
+      // if equal, return positive (if possible)
+      res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+      BID_RETURN (res);
+    }
+    res = (sig_n_prime256.w[3] == 0 && sig_n_prime256.w[2] == 0
+	   && (sig_n_prime256.w[1] < sig_x.w[1]
+	       || (sig_n_prime256.w[1] == sig_x.w[1]
+		   && sig_n_prime256.w[0] < sig_x.w[0]))) ? x : y;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[diff], sig_y);
+  // if postitive, return whichever significand is larger (converse if negative)
+  if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_x.w[1]
+      && (sig_n_prime192.w[0] == sig_x.w[0])) {
+    // if equal, return positive (if possible)
+    res = ((y.w[1] & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  res = (sig_n_prime192.w[2] == 0
+	 && (sig_n_prime192.w[1] < sig_x.w[1]
+	     || (sig_n_prime192.w[1] == sig_x.w[1]
+		 && sig_n_prime192.w[0] < sig_x.w[0]))) ? x : y;
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_mul.c b/gcc-4.9/libgcc/config/libbid/bid128_mul.c
new file mode 100644
index 000000000..90f262ee8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_mul.c
@@ -0,0 +1,423 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64dq_mul (UINT64 * pres, UINT64 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64dq_mul (UINT64 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_mul (&res, &x1, py
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_mul (x1, y
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qd_mul (UINT64 * pres, UINT128 * px, UINT64 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qd_mul (UINT128 x, UINT64 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64qq_mul (&res, px, &y1
+	       _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	       _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid64qq_mul (x, y1
+		     _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64qq_mul (UINT64 * pres, UINT128 * px, UINT128 * py
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64qq_mul (UINT128 x, UINT128 y
+	     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 z = { {0x0000000000000000ull, 0x5ffe000000000000ull}
+  };
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign, y_sign, p_sign;
+  UINT64 x_exp, y_exp, p_exp;
+  int true_p_exp;
+  UINT128 C1, C2;
+
+  BID_SWAP128 (z);
+  // skip cases where at least one operand is NaN or infinity
+  if (!(((x.w[HIGH_128W] & MASK_NAN) == MASK_NAN) ||
+	((y.w[HIGH_128W] & MASK_NAN) == MASK_NAN) ||
+	((x.w[HIGH_128W] & MASK_ANY_INF) == MASK_INF) ||
+	((y.w[HIGH_128W] & MASK_ANY_INF) == MASK_INF))) {
+    // x, y are 0 or f but not inf or NaN => unpack the arguments and check
+    // for non-canonical values
+
+    x_sign = x.w[HIGH_128W] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    C1.w[1] = x.w[HIGH_128W] & MASK_COEFF;
+    C1.w[0] = x.w[LOW_128W];
+    // check for non-canonical values - treated as zero
+    if ((x.w[HIGH_128W] & 0x6000000000000000ull) ==
+	0x6000000000000000ull) {
+      // G0_G1=11 => non-canonical
+      x_exp = (x.w[HIGH_128W] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+      C1.w[1] = 0;	// significand high
+      C1.w[0] = 0;	// significand low
+    } else {	// G0_G1 != 11
+      x_exp = x.w[HIGH_128W] & MASK_EXP;	// biased and shifted left 49 bits
+      if (C1.w[1] > 0x0001ed09bead87c0ull ||
+	  (C1.w[1] == 0x0001ed09bead87c0ull &&
+	   C1.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	C1.w[1] = 0;
+	C1.w[0] = 0;
+      } else {	// canonical          
+	;
+      }
+    }
+    y_sign = y.w[HIGH_128W] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    C2.w[1] = y.w[HIGH_128W] & MASK_COEFF;
+    C2.w[0] = y.w[LOW_128W];
+    // check for non-canonical values - treated as zero
+    if ((y.w[HIGH_128W] & 0x6000000000000000ull) ==
+	0x6000000000000000ull) {
+      // G0_G1=11 => non-canonical
+      y_exp = (y.w[HIGH_128W] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+      C2.w[1] = 0;	// significand high
+      C2.w[0] = 0;	// significand low 
+    } else {	// G0_G1 != 11
+      y_exp = y.w[HIGH_128W] & MASK_EXP;	// biased and shifted left 49 bits
+      if (C2.w[1] > 0x0001ed09bead87c0ull ||
+	  (C2.w[1] == 0x0001ed09bead87c0ull &&
+	   C2.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	C2.w[1] = 0;
+	C2.w[0] = 0;
+      } else {	// canonical
+	;
+      }
+    }
+    p_sign = x_sign ^ y_sign;	// sign of the product
+
+    true_p_exp = (x_exp >> 49) - 6176 + (y_exp >> 49) - 6176;
+    // true_p_exp, p_exp are used only for 0 * 0, 0 * f, or f * 0 
+    if (true_p_exp < -398)
+      p_exp = 0;	// cannot be less than EXP_MIN
+    else if (true_p_exp > 369)
+      p_exp = (UINT64) (369 + 398) << 53;	// cannot be more than EXP_MAX
+    else
+      p_exp = (UINT64) (true_p_exp + 398) << 53;
+
+    if ((C1.w[1] == 0x0 && C1.w[0] == 0x0) ||
+	(C2.w[1] == 0x0 && C2.w[0] == 0x0)) {
+      // x = 0 or y = 0
+      // the result is 0
+      res = p_sign | p_exp;	// preferred exponent in [EXP_MIN, EXP_MAX]
+      BID_RETURN (res)
+    }	// else continue
+  }
+  // swap x and y - ensure that a NaN in x has 'higher precedence' than one in y
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64qqq_fma (&res, &y, &x, &z
+		_RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		_EXC_INFO_ARG);
+#else
+  res = bid64qqq_fma (y, x, z
+		      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		      _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dd_mul (UINT128 * pres, UINT64 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px, y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dd_mul (UINT64 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1, y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_mul (&res, &x1, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_mul (x1, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128dq_mul (UINT128 * pres, UINT64 * px, UINT128 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128dq_mul (UINT64 x, UINT128 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 x1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&x1, &x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_mul (&res, &x1, py
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  x1 = bid64_to_bid128 (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_mul (x1, y
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128qd_mul (UINT128 * pres, UINT128 * px, UINT64 * py
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT128
+bid128qd_mul (UINT128 x, UINT64 y
+	      _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT128 y1;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_to_bid128 (&y1, &y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid128_mul (&res, px, &y1
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  y1 = bid64_to_bid128 (y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res = bid128_mul (x, y1
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
+
+
+// bid128_mul stands for bid128qq_mul
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_mul (UINT128 * pres, UINT128 * px,
+	    UINT128 *
+	    py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+  UINT128 x = *px, y = *py;
+
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+
+#endif
+#else
+UINT128
+bid128_mul (UINT128 x,
+	    UINT128 y _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+
+#endif
+  UINT128 z = { {0x0000000000000000ull, 0x5ffe000000000000ull}
+  };
+  UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+  };
+  UINT64 x_sign, y_sign, p_sign;
+  UINT64 x_exp, y_exp, p_exp;
+  int true_p_exp;
+  UINT128 C1, C2;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  // skip cases where at least one operand is NaN or infinity
+  if (!(((x.w[1] & MASK_NAN) == MASK_NAN) ||
+	((y.w[1] & MASK_NAN) == MASK_NAN) ||
+	((x.w[1] & MASK_ANY_INF) == MASK_INF) ||
+	((y.w[1] & MASK_ANY_INF) == MASK_INF))) {
+    // x, y are 0 or f but not inf or NaN => unpack the arguments and check
+    // for non-canonical values
+
+    x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    C1.w[1] = x.w[1] & MASK_COEFF;
+    C1.w[0] = x.w[0];
+    // check for non-canonical values - treated as zero
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      // G0_G1=11 => non-canonical
+      x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+      C1.w[1] = 0;	// significand high
+      C1.w[0] = 0;	// significand low
+    } else {	// G0_G1 != 11
+      x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+      if (C1.w[1] > 0x0001ed09bead87c0ull ||
+	  (C1.w[1] == 0x0001ed09bead87c0ull &&
+	   C1.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	C1.w[1] = 0;
+	C1.w[0] = 0;
+      } else {	// canonical          
+	;
+      }
+    }
+    y_sign = y.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+    C2.w[1] = y.w[1] & MASK_COEFF;
+    C2.w[0] = y.w[0];
+    // check for non-canonical values - treated as zero
+    if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      // G0_G1=11 => non-canonical
+      y_exp = (y.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+      C2.w[1] = 0;	// significand high
+      C2.w[0] = 0;	// significand low 
+    } else {	// G0_G1 != 11
+      y_exp = y.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+      if (C2.w[1] > 0x0001ed09bead87c0ull ||
+	  (C2.w[1] == 0x0001ed09bead87c0ull &&
+	   C2.w[0] > 0x378d8e63ffffffffull)) {
+	// y is non-canonical if coefficient is larger than 10^34 -1
+	C2.w[1] = 0;
+	C2.w[0] = 0;
+      } else {	// canonical
+	;
+      }
+    }
+    p_sign = x_sign ^ y_sign;	// sign of the product
+
+    true_p_exp = (x_exp >> 49) - 6176 + (y_exp >> 49) - 6176;
+    // true_p_exp, p_exp are used only for 0 * 0, 0 * f, or f * 0 
+    if (true_p_exp < -6176)
+      p_exp = 0;	// cannot be less than EXP_MIN
+    else if (true_p_exp > 6111)
+      p_exp = (UINT64) (6111 + 6176) << 49;	// cannot be more than EXP_MAX
+    else
+      p_exp = (UINT64) (true_p_exp + 6176) << 49;
+
+    if ((C1.w[1] == 0x0 && C1.w[0] == 0x0) ||
+	(C2.w[1] == 0x0 && C2.w[0] == 0x0)) {
+      // x = 0 or y = 0
+      // the result is 0
+      res.w[1] = p_sign | p_exp;	// preferred exponent in [EXP_MIN, EXP_MAX]
+      res.w[0] = 0x0;
+      BID_SWAP128 (res);
+      BID_RETURN (res)
+    }	// else continue
+  }
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  BID_SWAP128 (z);
+  // swap x and y - ensure that a NaN in x has 'higher precedence' than one in y
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_fma (&res, &y, &x, &z
+	      _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	      _EXC_INFO_ARG);
+#else
+  res = bid128_fma (y, x, z
+		    _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+#endif
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_next.c b/gcc-4.9/libgcc/config/libbid/bid128_next.c
new file mode 100644
index 000000000..c50810646
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_next.c
@@ -0,0 +1,643 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128 nextup
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_nextup (UINT128 * pres,
+	       UINT128 *
+	       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+UINT128
+bid128_nextup (UINT128 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	       _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q1, ind;
+  UINT128 C1;			// C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (UINT64)
+
+  BID_SWAP128 (x);
+  // unpack the argument
+  x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+  if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+    if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+      // if x = NaN, then res = Q (x)
+      // check first for non-canonical NaN payload
+      if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (x.w[0] > 0x38c15b09ffffffffull))) {
+	x.w[1] = x.w[1] & 0xffffc00000000000ull;
+	x.w[0] = 0x0ull;
+      }
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+	res.w[0] = x.w[0];
+      } else {	// x is QNaN
+	// return x
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+	res.w[0] = x.w[0];
+      }
+    } else {	// x is not NaN, so it must be infinity
+      if (!x_sign) {	// x is +inf
+	res.w[1] = 0x7800000000000000ull;	// +inf
+	res.w[0] = 0x0000000000000000ull;
+      } else {	// x is -inf
+	res.w[1] = 0xdfffed09bead87c0ull;	// -MAXFP = -999...99 * 10^emax
+	res.w[0] = 0x378d8e63ffffffffull;
+      }
+    }
+    BID_RETURN (res);
+  }
+  // check for non-canonical values (treated as zero)
+  if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+    // non-canonical
+    x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+    C1.w[1] = 0;	// significand high
+    C1.w[0] = 0;	// significand low
+  } else {	// G0_G1 != 11
+    x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+    if (C1.w[1] > 0x0001ed09bead87c0ull ||
+	(C1.w[1] == 0x0001ed09bead87c0ull
+	 && C1.w[0] > 0x378d8e63ffffffffull)) {
+      // x is non-canonical if coefficient is larger than 10^34 -1
+      C1.w[1] = 0;
+      C1.w[0] = 0;
+    } else {	// canonical
+      ;
+    }
+  }
+
+  if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+    // x is +/-0
+    res.w[1] = 0x0000000000000000ull;	// +1 * 10^emin
+    res.w[0] = 0x0000000000000001ull;
+  } else {	// x is not special and is not zero
+    if (x.w[1] == 0x5fffed09bead87c0ull
+	&& x.w[0] == 0x378d8e63ffffffffull) {
+      // x = +MAXFP = 999...99 * 10^emax
+      res.w[1] = 0x7800000000000000ull;	// +inf
+      res.w[0] = 0x0000000000000000ull;
+    } else if (x.w[1] == 0x8000000000000000ull
+	       && x.w[0] == 0x0000000000000001ull) {
+      // x = -MINFP = 1...99 * 10^emin
+      res.w[1] = 0x8000000000000000ull;	// -0
+      res.w[0] = 0x0000000000000000ull;
+    } else {	// -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+      // can add/subtract 1 ulp to the significand
+
+      // Note: we could check here if x >= 10^34 to speed up the case q1 = 34
+      // q1 = nr. of decimal digits in x
+      // determine first the nr. of bits in x
+      if (C1.w[1] == 0) {
+	if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+	  // split the 64-bit value in two 32-bit halves to avoid rnd errors
+	  if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	    tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	    x_nr_bits =
+	      33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) -
+		    0x3ff);
+	  } else {	// x < 2^32
+	    tmp1.d = (double) (C1.w[0]);	// exact conversion
+	    x_nr_bits =
+	      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) -
+		   0x3ff);
+	  }
+	} else {	// if x < 2^53
+	  tmp1.d = (double) C1.w[0];	// exact conversion
+	  x_nr_bits =
+	    1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+	tmp1.d = (double) C1.w[1];	// exact conversion
+	x_nr_bits =
+	  65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+      q1 = nr_digits[x_nr_bits - 1].digits;
+      if (q1 == 0) {
+	q1 = nr_digits[x_nr_bits - 1].digits1;
+	if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	    || (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+		&& C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+	  q1++;
+      }
+      // if q1 < P34 then pad the significand with zeros
+      if (q1 < P34) {
+	exp = (x_exp >> 49) - 6176;
+	if (exp + 6176 > P34 - q1) {
+	  ind = P34 - q1;	// 1 <= ind <= P34 - 1
+	  // pad with P34 - q1 zeros, until exponent = emin
+	  // C1 = C1 * 10^ind
+	  if (q1 <= 19) {	// 64-bit C1
+	    if (ind <= 19) {	// 64-bit 10^ind and 64-bit C1
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 128-bit 10^ind and 64-bit C1
+	      __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	    }
+	  } else {	// C1 is (most likely) 128-bit
+	    if (ind <= 14) {	// 64-bit 10^ind and 128-bit C1 (most likely)
+	      __mul_128x64_to_128 (C1, ten2k64[ind], C1);
+	    } else if (ind <= 19) {	// 64-bit 10^ind and 64-bit C1 (q1 <= 19)
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 128-bit 10^ind and 64-bit C1 (C1 must be 64-bit)
+	      __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	    }
+	  }
+	  x_exp = x_exp - ((UINT64) ind << 49);
+	} else {	// pad with zeros until the exponent reaches emin
+	  ind = exp + 6176;
+	  // C1 = C1 * 10^ind
+	  if (ind <= 19) {	// 1 <= P34 - q1 <= 19 <=> 15 <= q1 <= 33
+	    if (q1 <= 19) {	// 64-bit C1, 64-bit 10^ind 
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 20 <= q1 <= 33 => 128-bit C1, 64-bit 10^ind
+	      __mul_128x64_to_128 (C1, ten2k64[ind], C1);
+	    }
+	  } else {	// if 20 <= P34 - q1 <= 33 <=> 1 <= q1 <= 14 =>
+	    // 64-bit C1, 128-bit 10^ind
+	    __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	  }
+	  x_exp = EXP_MIN;
+	}
+      }
+      if (!x_sign) {	// x > 0
+	// add 1 ulp (add 1 to the significand)
+	C1.w[0]++;
+	if (C1.w[0] == 0)
+	  C1.w[1]++;
+	if (C1.w[1] == 0x0001ed09bead87c0ull && C1.w[0] == 0x378d8e6400000000ull) {	// if  C1 = 10^34
+	  C1.w[1] = 0x0000314dc6448d93ull;	// C1 = 10^33
+	  C1.w[0] = 0x38c15b0a00000000ull;
+	  x_exp = x_exp + EXP_P1;
+	}
+      } else {	// x < 0
+	// subtract 1 ulp (subtract 1 from the significand)
+	C1.w[0]--;
+	if (C1.w[0] == 0xffffffffffffffffull)
+	  C1.w[1]--;
+	if (x_exp != 0 && C1.w[1] == 0x0000314dc6448d93ull && C1.w[0] == 0x38c15b09ffffffffull) {	// if  C1 = 10^33 - 1
+	  C1.w[1] = 0x0001ed09bead87c0ull;	// C1 = 10^34 - 1
+	  C1.w[0] = 0x378d8e63ffffffffull;
+	  x_exp = x_exp - EXP_P1;
+	}
+      }
+      // assemble the result
+      res.w[1] = x_sign | x_exp | C1.w[1];
+      res.w[0] = C1.w[0];
+    }	// end -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+  }	// end x is not special and is not zero
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128 nextdown
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_nextdown (UINT128 * pres,
+		 UINT128 *
+		 px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+UINT128
+bid128_nextdown (UINT128 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		 _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q1, ind;
+  UINT128 C1;			// C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (UINT64)
+
+  BID_SWAP128 (x);
+  // unpack the argument
+  x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+  if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+    if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+      // if x = NaN, then res = Q (x)
+      // check first for non-canonical NaN payload
+      if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (x.w[0] > 0x38c15b09ffffffffull))) {
+	x.w[1] = x.w[1] & 0xffffc00000000000ull;
+	x.w[0] = 0x0ull;
+      }
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+	res.w[0] = x.w[0];
+      } else {	// x is QNaN
+	// return x
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+	res.w[0] = x.w[0];
+      }
+    } else {	// x is not NaN, so it must be infinity
+      if (!x_sign) {	// x is +inf
+	res.w[1] = 0x5fffed09bead87c0ull;	// +MAXFP = +999...99 * 10^emax
+	res.w[0] = 0x378d8e63ffffffffull;
+      } else {	// x is -inf
+	res.w[1] = 0xf800000000000000ull;	// -inf
+	res.w[0] = 0x0000000000000000ull;
+      }
+    }
+    BID_RETURN (res);
+  }
+  // check for non-canonical values (treated as zero)
+  if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+    // non-canonical
+    x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+    C1.w[1] = 0;	// significand high
+    C1.w[0] = 0;	// significand low
+  } else {	// G0_G1 != 11
+    x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+    if (C1.w[1] > 0x0001ed09bead87c0ull ||
+	(C1.w[1] == 0x0001ed09bead87c0ull
+	 && C1.w[0] > 0x378d8e63ffffffffull)) {
+      // x is non-canonical if coefficient is larger than 10^34 -1
+      C1.w[1] = 0;
+      C1.w[0] = 0;
+    } else {	// canonical
+      ;
+    }
+  }
+
+  if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+    // x is +/-0
+    res.w[1] = 0x8000000000000000ull;	// -1 * 10^emin
+    res.w[0] = 0x0000000000000001ull;
+  } else {	// x is not special and is not zero
+    if (x.w[1] == 0xdfffed09bead87c0ull
+	&& x.w[0] == 0x378d8e63ffffffffull) {
+      // x = -MAXFP = -999...99 * 10^emax
+      res.w[1] = 0xf800000000000000ull;	// -inf
+      res.w[0] = 0x0000000000000000ull;
+    } else if (x.w[1] == 0x0ull && x.w[0] == 0x0000000000000001ull) {	// +MINFP
+      res.w[1] = 0x0000000000000000ull;	// +0
+      res.w[0] = 0x0000000000000000ull;
+    } else {	// -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+      // can add/subtract 1 ulp to the significand
+
+      // Note: we could check here if x >= 10^34 to speed up the case q1 = 34
+      // q1 = nr. of decimal digits in x
+      // determine first the nr. of bits in x
+      if (C1.w[1] == 0) {
+	if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+	  // split the 64-bit value in two 32-bit halves to avoid rnd errors
+	  if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	    tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	    x_nr_bits =
+	      33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) -
+		    0x3ff);
+	  } else {	// x < 2^32
+	    tmp1.d = (double) (C1.w[0]);	// exact conversion
+	    x_nr_bits =
+	      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) -
+		   0x3ff);
+	  }
+	} else {	// if x < 2^53
+	  tmp1.d = (double) C1.w[0];	// exact conversion
+	  x_nr_bits =
+	    1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+	tmp1.d = (double) C1.w[1];	// exact conversion
+	x_nr_bits =
+	  65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+      q1 = nr_digits[x_nr_bits - 1].digits;
+      if (q1 == 0) {
+	q1 = nr_digits[x_nr_bits - 1].digits1;
+	if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	    || (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+		&& C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+	  q1++;
+      }
+      // if q1 < P then pad the significand with zeros
+      if (q1 < P34) {
+	exp = (x_exp >> 49) - 6176;
+	if (exp + 6176 > P34 - q1) {
+	  ind = P34 - q1;	// 1 <= ind <= P34 - 1
+	  // pad with P34 - q1 zeros, until exponent = emin
+	  // C1 = C1 * 10^ind
+	  if (q1 <= 19) {	// 64-bit C1
+	    if (ind <= 19) {	// 64-bit 10^ind and 64-bit C1
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 128-bit 10^ind and 64-bit C1
+	      __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	    }
+	  } else {	// C1 is (most likely) 128-bit
+	    if (ind <= 14) {	// 64-bit 10^ind and 128-bit C1 (most likely)
+	      __mul_128x64_to_128 (C1, ten2k64[ind], C1);
+	    } else if (ind <= 19) {	// 64-bit 10^ind and 64-bit C1 (q1 <= 19)
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 128-bit 10^ind and 64-bit C1 (C1 must be 64-bit)
+	      __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	    }
+	  }
+	  x_exp = x_exp - ((UINT64) ind << 49);
+	} else {	// pad with zeros until the exponent reaches emin
+	  ind = exp + 6176;
+	  // C1 = C1 * 10^ind
+	  if (ind <= 19) {	// 1 <= P34 - q1 <= 19 <=> 15 <= q1 <= 33
+	    if (q1 <= 19) {	// 64-bit C1, 64-bit 10^ind 
+	      __mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[ind]);
+	    } else {	// 20 <= q1 <= 33 => 128-bit C1, 64-bit 10^ind
+	      __mul_128x64_to_128 (C1, ten2k64[ind], C1);
+	    }
+	  } else {	// if 20 <= P34 - q1 <= 33 <=> 1 <= q1 <= 14 =>
+	    // 64-bit C1, 128-bit 10^ind
+	    __mul_128x64_to_128 (C1, C1.w[0], ten2k128[ind - 20]);
+	  }
+	  x_exp = EXP_MIN;
+	}
+      }
+      if (x_sign) {	// x < 0
+	// add 1 ulp (add 1 to the significand)
+	C1.w[0]++;
+	if (C1.w[0] == 0)
+	  C1.w[1]++;
+	if (C1.w[1] == 0x0001ed09bead87c0ull && C1.w[0] == 0x378d8e6400000000ull) {	// if  C1 = 10^34
+	  C1.w[1] = 0x0000314dc6448d93ull;	// C1 = 10^33
+	  C1.w[0] = 0x38c15b0a00000000ull;
+	  x_exp = x_exp + EXP_P1;
+	}
+      } else {	// x > 0
+	// subtract 1 ulp (subtract 1 from the significand)
+	C1.w[0]--;
+	if (C1.w[0] == 0xffffffffffffffffull)
+	  C1.w[1]--;
+	if (x_exp != 0 && C1.w[1] == 0x0000314dc6448d93ull && C1.w[0] == 0x38c15b09ffffffffull) {	// if  C1 = 10^33 - 1
+	  C1.w[1] = 0x0001ed09bead87c0ull;	// C1 = 10^34 - 1
+	  C1.w[0] = 0x378d8e63ffffffffull;
+	  x_exp = x_exp - EXP_P1;
+	}
+      }
+      // assemble the result
+      res.w[1] = x_sign | x_exp | C1.w[1];
+      res.w[0] = C1.w[0];
+    }	// end -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+  }	// end x is not special and is not zero
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128 nextafter
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_nextafter (UINT128 * pres, UINT128 * px,
+		  UINT128 *
+		  py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT128 x = *px;
+  UINT128 y = *py;
+  UINT128 xnswp = *px;
+  UINT128 ynswp = *py;
+#else
+UINT128
+bid128_nextafter (UINT128 x,
+		  UINT128 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		  _EXC_INFO_PARAM) {
+  UINT128 xnswp = x;
+  UINT128 ynswp = y;
+#endif
+
+  UINT128 res;
+  UINT128 tmp1, tmp2, tmp3;
+  FPSC tmp_fpsf = 0;		// dummy fpsf for calls to comparison functions
+  int res1, res2;
+  UINT64 x_exp;
+
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  // check for NaNs
+  if (((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL)
+      || ((y.w[1] & MASK_SPECIAL) == MASK_SPECIAL)) {
+    // x is special or y is special
+    if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+      // if x = NaN, then res = Q (x)
+      // check first for non-canonical NaN payload
+      if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (x.w[0] > 0x38c15b09ffffffffull))) {
+	x.w[1] = x.w[1] & 0xffffc00000000000ull;
+	x.w[0] = 0x0ull;
+      }
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+	res.w[0] = x.w[0];
+      } else {	// x is QNaN
+	// return x
+	res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+	res.w[0] = x.w[0];
+	if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	}
+      }
+      BID_RETURN (res)
+    } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {	// y is NAN
+      // if x = NaN, then res = Q (x)
+      // check first for non-canonical NaN payload
+      if (((y.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	  (((y.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull)
+	   && (y.w[0] > 0x38c15b09ffffffffull))) {
+	y.w[1] = y.w[1] & 0xffffc00000000000ull;
+	y.w[0] = 0x0ull;
+      }
+      if ((y.w[1] & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res.w[1] = y.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+	res.w[0] = y.w[0];
+      } else {	// x is QNaN
+	// return x
+	res.w[1] = y.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+	res.w[0] = y.w[0];
+      }
+      BID_RETURN (res)
+    } else {	// at least one is infinity
+      if ((x.w[1] & MASK_ANY_INF) == MASK_INF) {	// x = inf
+	x.w[1] = x.w[1] & (MASK_SIGN | MASK_INF);
+	x.w[0] = 0x0ull;
+      }
+      if ((y.w[1] & MASK_ANY_INF) == MASK_INF) {	// y = inf
+	y.w[1] = y.w[1] & (MASK_SIGN | MASK_INF);
+	y.w[0] = 0x0ull;
+      }
+    }
+  }
+  // neither x nor y is NaN
+
+  // if not infinity, check for non-canonical values x (treated as zero)
+  if ((x.w[1] & MASK_ANY_INF) != MASK_INF) {	// x != inf
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+      // non-canonical
+      x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+      x.w[1] = (x.w[1] & MASK_SIGN) | x_exp;
+      x.w[0] = 0x0ull;
+    } else {	// G0_G1 != 11
+      x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+      if ((x.w[1] & MASK_COEFF) > 0x0001ed09bead87c0ull ||
+	  ((x.w[1] & MASK_COEFF) == 0x0001ed09bead87c0ull
+	   && x.w[0] > 0x378d8e63ffffffffull)) {
+	// x is non-canonical if coefficient is larger than 10^34 -1
+	x.w[1] = (x.w[1] & MASK_SIGN) | x_exp;
+	x.w[0] = 0x0ull;
+      } else {	// canonical
+	;
+      }
+    }
+  }
+  // no need to check for non-canonical y
+
+  // neither x nor y is NaN
+  tmp_fpsf = *pfpsf;	// save fpsf
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_quiet_equal (&res1, &xnswp,
+		      &ynswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		      _EXC_INFO_ARG);
+  bid128_quiet_greater (&res2, &xnswp,
+			&ynswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			_EXC_INFO_ARG);
+#else
+  res1 =
+    bid128_quiet_equal (xnswp,
+			ynswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			_EXC_INFO_ARG);
+  res2 =
+    bid128_quiet_greater (xnswp,
+			  ynswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			  _EXC_INFO_ARG);
+#endif
+  *pfpsf = tmp_fpsf;	// restore fpsf
+
+  if (res1) {	// x = y
+    // return x with the sign of y
+    res.w[1] =
+      (x.w[1] & 0x7fffffffffffffffull) | (y.
+					  w[1] & 0x8000000000000000ull);
+    res.w[0] = x.w[0];
+  } else if (res2) {	// x > y
+#if DECIMAL_CALL_BY_REFERENCE
+    bid128_nextdown (&res,
+		     &xnswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		     _EXC_INFO_ARG);
+#else
+    res =
+      bid128_nextdown (xnswp _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		       _EXC_INFO_ARG);
+#endif
+    BID_SWAP128 (res);
+  } else {	// x < y
+#if DECIMAL_CALL_BY_REFERENCE
+    bid128_nextup (&res,
+		   &xnswp _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#else
+    res =
+      bid128_nextup (xnswp _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#endif
+    BID_SWAP128 (res);
+  }
+  // if the operand x is finite but the result is infinite, signal 
+  // overflow and inexact
+  if (((x.w[1] & MASK_SPECIAL) != MASK_SPECIAL)
+      && ((res.w[1] & MASK_SPECIAL) == MASK_SPECIAL)) {
+    // set the inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // set the overflow flag
+    *pfpsf |= OVERFLOW_EXCEPTION;
+  }
+  // if the result is in (-10^emin, 10^emin), and is different from the
+  // operand x, signal underflow and inexact
+  tmp1.w[HIGH_128W] = 0x0000314dc6448d93ull;
+  tmp1.w[LOW_128W] = 0x38c15b0a00000000ull;	// +100...0[34] * 10^emin
+  tmp2.w[HIGH_128W] = res.w[1] & 0x7fffffffffffffffull;
+  tmp2.w[LOW_128W] = res.w[0];
+  tmp3.w[HIGH_128W] = res.w[1];
+  tmp3.w[LOW_128W] = res.w[0];
+  tmp_fpsf = *pfpsf;	// save fpsf
+#if DECIMAL_CALL_BY_REFERENCE
+  bid128_quiet_greater (&res1, &tmp1,
+			&tmp2 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			_EXC_INFO_ARG);
+  bid128_quiet_not_equal (&res2, &xnswp,
+			  &tmp3 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			  _EXC_INFO_ARG);
+#else
+  res1 =
+    bid128_quiet_greater (tmp1,
+			  tmp2 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			  _EXC_INFO_ARG);
+  res2 =
+    bid128_quiet_not_equal (xnswp,
+			    tmp3 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			    _EXC_INFO_ARG);
+#endif
+  *pfpsf = tmp_fpsf;	// restore fpsf
+  if (res1 && res2) {
+    // set the inexact flag 
+    *pfpsf |= INEXACT_EXCEPTION;
+    // set the underflow flag 
+    *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_noncomp.c b/gcc-4.9/libgcc/config/libbid/bid128_noncomp.c
new file mode 100644
index 000000000..008c71acc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_noncomp.c
@@ -0,0 +1,1200 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *
+ *    BID128 non-computational functions:
+ *         - bid128_isSigned
+ *         - bid128_isNormal
+ *         - bid128_isSubnormal
+ *         - bid128_isFinite
+ *         - bid128_isZero
+ *         - bid128_isInf
+ *         - bid128_isSignaling
+ *         - bid128_isCanonical
+ *         - bid128_isNaN
+ *         - bid128_copy
+ *         - bid128_negate
+ *         - bid128_abs
+ *         - bid128_copySign
+ *         - bid128_class
+ *         - bid128_totalOrder
+ *         - bid128_totalOrderMag
+ *         - bid128_sameQuantum
+ *         - bid128_radix
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isSigned (int *pres,
+		 UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isSigned (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x.w[HIGH_128W] & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+// return 1 iff x is not zero, nor NaN nor subnormal nor infinity
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isNormal (int *pres,
+		 UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isNormal (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_exp, C1_hi, C1_lo;
+  BID_UI64DOUBLE tmp1;
+  int exp, q, x_nr_bits;
+
+  BID_SWAP128 (x);
+  // test for special values - infinity or NaN
+  if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+    res = 0;
+    BID_RETURN (res);
+  }
+  // unpack x 
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+  C1_hi = x.w[1] & MASK_COEFF;
+  C1_lo = x.w[0];
+  // test for zero
+  if (C1_hi == 0 && C1_lo == 0) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // test for non-canonical values of the argument x
+  if ((((C1_hi > 0x0001ed09bead87c0ull)
+	|| ((C1_hi == 0x0001ed09bead87c0ull)
+	    && (C1_lo > 0x378d8e63ffffffffull)))
+       && ((x.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull))
+      || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is subnormal or normal
+  // determine the number of digits q in the significand
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+  if (C1_hi == 0) {
+    if (C1_lo >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1_lo >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1_lo >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1_lo);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1_lo;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1_hi != 0 => nr. bits = 64 + nr_bits (C1_hi)
+    tmp1.d = (double) C1_hi;	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1_hi > nr_digits[x_nr_bits - 1].threshold_hi ||
+	(C1_hi == nr_digits[x_nr_bits - 1].threshold_hi &&
+	 C1_lo >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (int) (x_exp >> 49) - 6176;
+  // test for subnormal values of x
+  if (exp + q <= -6143) {
+    res = 0;
+    BID_RETURN (res);
+  } else {
+    res = 1;
+    BID_RETURN (res);
+  }
+}
+
+// return 1 iff x is not zero, nor NaN nor normal nor infinity
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isSubnormal (int *pres,
+		    UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isSubnormal (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_exp, C1_hi, C1_lo;
+  BID_UI64DOUBLE tmp1;
+  int exp, q, x_nr_bits;
+
+  BID_SWAP128 (x);
+  // test for special values - infinity or NaN
+  if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+    res = 0;
+    BID_RETURN (res);
+  }
+  // unpack x 
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+  C1_hi = x.w[1] & MASK_COEFF;
+  C1_lo = x.w[0];
+  // test for zero
+  if (C1_hi == 0 && C1_lo == 0) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // test for non-canonical values of the argument x
+  if ((((C1_hi > 0x0001ed09bead87c0ull)
+	|| ((C1_hi == 0x0001ed09bead87c0ull)
+	    && (C1_lo > 0x378d8e63ffffffffull)))
+       && ((x.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull))
+      || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // x is subnormal or normal
+  // determine the number of digits q in the significand
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+  if (C1_hi == 0) {
+    if (C1_lo >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1_lo >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1_lo >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1_lo);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1_lo;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1_hi != 0 => nr. bits = 64 + nr_bits (C1_hi)
+    tmp1.d = (double) C1_hi;	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1_hi > nr_digits[x_nr_bits - 1].threshold_hi ||
+	(C1_hi == nr_digits[x_nr_bits - 1].threshold_hi &&
+	 C1_lo >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (int) (x_exp >> 49) - 6176;
+  // test for subnormal values of x
+  if (exp + q <= -6143) {
+    res = 1;
+  } else {
+    res = 0;
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isFinite (int *pres,
+		 UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isFinite (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  res = ((x.w[HIGH_128W] & MASK_INF) != MASK_INF);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isZero (int *pres, UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isZero (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT128 sig_x;
+
+  BID_SWAP128 (x);
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  if ((sig_x.w[1] > 0x0001ed09bead87c0ull) ||	// significand is non-canonical
+      ((sig_x.w[1] == 0x0001ed09bead87c0ull) && (sig_x.w[0] > 0x378d8e63ffffffffull)) ||	// significand is non-canonical
+      ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull && (x.w[1] & MASK_INF) != MASK_INF) ||	// significand is non-canonical
+      (sig_x.w[1] == 0 && sig_x.w[0] == 0)) {	// significand is 0
+    res = 1;
+    BID_RETURN (res);
+  }
+  res = 0;
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isInf (int *pres, UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isInf (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  res = ((x.w[HIGH_128W] & MASK_INF) == MASK_INF)
+    && ((x.w[HIGH_128W] & MASK_NAN) != MASK_NAN);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isSignaling (int *pres,
+		    UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isSignaling (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x.w[HIGH_128W] & MASK_SNAN) == MASK_SNAN);
+  BID_RETURN (res);
+}
+
+// return 1 iff x is a canonical number ,infinity, or NaN.
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isCanonical (int *pres,
+		    UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isCanonical (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT128 sig_x;
+
+  BID_SWAP128 (x);
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// NaN
+    if (x.w[1] & 0x01ffc00000000000ull) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    sig_x.w[1] = x.w[1] & 0x00003fffffffffffull;	// 46 bits
+    sig_x.w[0] = x.w[0];	// 64 bits
+    // payload must be < 10^33 = 0x0000314dc6448d93_38c15b0a00000000
+    if (sig_x.w[1] < 0x0000314dc6448d93ull
+	|| (sig_x.w[1] == 0x0000314dc6448d93ull
+	    && sig_x.w[0] < 0x38c15b0a00000000ull)) {
+      res = 1;
+    } else {
+      res = 0;
+    }
+    BID_RETURN (res);
+  } else if ((x.w[1] & MASK_INF) == MASK_INF) {	// infinity
+    if ((x.w[1] & 0x03ffffffffffffffull) || x.w[0]) {
+      res = 0;
+    } else {
+      res = 1;
+    }
+    BID_RETURN (res);
+  }
+  // not NaN or infinity; extract significand to ensure it is canonical
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  // a canonical number has a coefficient < 10^34 
+  //    (0x0001ed09_bead87c0_378d8e64_00000000)
+  if ((sig_x.w[1] > 0x0001ed09bead87c0ull) ||	// significand is non-canonical
+      ((sig_x.w[1] == 0x0001ed09bead87c0ull) && (sig_x.w[0] > 0x378d8e63ffffffffull)) ||	// significand is non-canonical
+      ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+    res = 0;
+  } else {
+    res = 1;
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_isNaN (int *pres, UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_isNaN (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x.w[HIGH_128W] & MASK_NAN) == MASK_NAN);
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, with no change
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_copy (UINT128 * pres,
+	     UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+UINT128
+bid128_copy (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  res = x;
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, reversing the sign
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_negate (UINT128 * pres,
+	       UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+UINT128
+bid128_negate (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  x.w[HIGH_128W] ^= MASK_SIGN;
+  res = x;
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, changing the sign to positive
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_abs (UINT128 * pres,
+	    UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+UINT128
+bid128_abs (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  x.w[HIGH_128W] &= ~MASK_SIGN;
+  res = x;
+  BID_RETURN (res);
+}
+
+// copies operand x to destination in the same format as x, but with the sign of y
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_copySign (UINT128 * pres, UINT128 * px,
+		 UINT128 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+UINT128
+bid128_copySign (UINT128 x, UINT128 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  x.w[HIGH_128W] =
+    (x.w[HIGH_128W] & ~MASK_SIGN) | (y.w[HIGH_128W] & MASK_SIGN);
+  res = x;
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_class (int *pres, UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_class (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT256 sig_x_prime256;
+  UINT192 sig_x_prime192;
+  UINT128 sig_x;
+  int exp_x;
+
+  BID_SWAP128 (x);
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {
+      res = signalingNaN;
+    } else {
+      res = quietNaN;
+    }
+    BID_RETURN (res);
+  }
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    if ((x.w[1] & MASK_SIGN) == MASK_SIGN) {
+      res = negativeInfinity;
+    } else {
+      res = positiveInfinity;
+    }
+    BID_RETURN (res);
+  }
+  // decode number into exponent and significand
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  // check for zero or non-canonical
+  if ((sig_x.w[1] > 0x0001ed09bead87c0ull)
+      || ((sig_x.w[1] == 0x0001ed09bead87c0ull)
+	  && (sig_x.w[0] > 0x378d8e63ffffffffull))
+      || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)
+      || ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+    if ((x.w[1] & MASK_SIGN) == MASK_SIGN) {
+      res = negativeZero;
+    } else {
+      res = positiveZero;
+    }
+    BID_RETURN (res);
+  }
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+  // if exponent is less than -6176, the number may be subnormal 
+  // (less than the smallest normal value)
+  //  the smallest normal value is 1 x 10^-6143 = 10^33 x 10^-6176
+  //  if (exp_x - 6176 < -6143)
+  if (exp_x < 33) {	// sig_x * 10^exp_x
+    if (exp_x > 19) {
+      __mul_128x128_to_256 (sig_x_prime256, sig_x,
+			    ten2k128[exp_x - 20]);
+      // 10^33 = 0x0000314dc6448d93_38c15b0a00000000
+      if ((sig_x_prime256.w[3] == 0) && (sig_x_prime256.w[2] == 0)
+	  && ((sig_x_prime256.w[1] < 0x0000314dc6448d93ull)
+	      || ((sig_x_prime256.w[1] == 0x0000314dc6448d93ull)
+		  && (sig_x_prime256.w[0] < 0x38c15b0a00000000ull)))) {
+	res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? negativeSubnormal :
+	  positiveSubnormal;
+	BID_RETURN (res);
+      }
+    } else {
+      __mul_64x128_to_192 (sig_x_prime192, ten2k64[exp_x], sig_x);
+      // 10^33 = 0x0000314dc6448d93_38c15b0a00000000
+      if ((sig_x_prime192.w[2] == 0)
+	  && ((sig_x_prime192.w[1] < 0x0000314dc6448d93ull)
+	      || ((sig_x_prime192.w[1] == 0x0000314dc6448d93ull)
+		  && (sig_x_prime192.w[0] < 0x38c15b0a00000000ull)))) {
+	res = ((x.w[1] & MASK_SIGN) == MASK_SIGN) ? negativeSubnormal :
+	  positiveSubnormal;
+	BID_RETURN (res);
+      }
+    }
+  }
+  // otherwise, normal number, determine the sign
+  res =
+    ((x.w[1] & MASK_SIGN) ==
+     MASK_SIGN) ? negativeNormal : positiveNormal;
+  BID_RETURN (res);
+}
+
+// true if the exponents of x and y are the same, false otherwise.
+// The special cases of sameQuantum(NaN, NaN) and sameQuantum(Inf, Inf) are true
+// If exactly one operand is infinite or exactly one operand is NaN, then false
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_sameQuantum (int *pres, UINT128 * px,
+		    UINT128 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+int
+bid128_sameQuantum (UINT128 x,
+		    UINT128 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_exp, y_exp;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  // if both operands are NaN, return true
+  if ((x.w[1] & MASK_NAN) == MASK_NAN
+      || ((y.w[1] & MASK_NAN) == MASK_NAN)) {
+    res = ((x.w[1] & MASK_NAN) == MASK_NAN
+	   && (y.w[1] & MASK_NAN) == MASK_NAN);
+    BID_RETURN (res);
+  }
+  // if both operands are INF, return true
+  if ((x.w[1] & MASK_INF) == MASK_INF
+      || (y.w[1] & MASK_INF) == MASK_INF) {
+    res = ((x.w[1] & MASK_INF) == MASK_INF)
+      && ((y.w[1] & MASK_INF) == MASK_INF);
+    BID_RETURN (res);
+  }
+  // decode exponents for both numbers, and return true if they match
+  if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+    x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  } else {	// G0_G1 != 11
+    x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  }
+  if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+    y_exp = (y.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  } else {	// G0_G1 != 11
+    y_exp = y.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  }
+  res = (x_exp == y_exp);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_totalOrder (int *pres, UINT128 * px,
+		   UINT128 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+int
+bid128_totalOrder (UINT128 x,
+		   UINT128 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT128 sig_x, sig_y, pyld_y, pyld_x;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  // NaN (CASE 1)
+  // if x and y are unordered numerically because either operand is NaN
+  //    (1) totalOrder(-NaN, number) is true
+  //    (2) totalOrder(number, +NaN) is true
+  //    (3) if x and y are both NaN:
+  //       i) negative sign bit < positive sign bit
+  //       ii) signaling < quiet for +NaN, reverse for -NaN
+  //       iii) lesser payload < greater payload for +NaN (reverse for -NaN)
+  //       iv) else if bitwise identical (in canonical form), return 1
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {
+    // if x is -NaN
+    if ((x.w[1] & MASK_SIGN) == MASK_SIGN) {
+      // return true, unless y is -NaN also
+      if ((y.w[1] & MASK_NAN) != MASK_NAN
+	  || (y.w[1] & MASK_SIGN) != MASK_SIGN) {
+	res = 1;	// y is a number, return 1
+	BID_RETURN (res);
+      } else {	// if y and x are both -NaN
+	pyld_x.w[1] = x.w[1] & 0x00003fffffffffffull;
+	pyld_x.w[0] = x.w[0];
+	pyld_y.w[1] = y.w[1] & 0x00003fffffffffffull;
+	pyld_y.w[0] = y.w[0];
+	if ((pyld_x.w[1] > 0x0000314dc6448d93ull)
+	    || ((pyld_x.w[1] == 0x0000314dc6448d93ull)
+		&& (pyld_x.w[0] > 0x38c15b09ffffffffull))) {
+	  pyld_x.w[1] = 0;
+	  pyld_x.w[0] = 0;
+	}
+	if ((pyld_y.w[1] > 0x0000314dc6448d93ull)
+	    || ((pyld_y.w[1] == 0x0000314dc6448d93ull)
+		&& (pyld_y.w[0] > 0x38c15b09ffffffffull))) {
+	  pyld_y.w[1] = 0;
+	  pyld_y.w[0] = 0;
+	}
+	// if x and y are both -SNaN or both -QNaN, we have to compare payloads
+	// this statement evaluates to true if both are SNaN or QNaN
+	if (!
+	    (((y.w[1] & MASK_SNAN) == MASK_SNAN) ^
+	     ((x.w[1] & MASK_SNAN) == MASK_SNAN))) {
+	  // it comes down to the payload.  we want to return true if x has a
+	  // larger payload, or if the payloads are equal (canonical forms
+	  // are bitwise identical)
+	  if ((pyld_x.w[1] > pyld_y.w[1]) ||
+	      ((pyld_x.w[1] == pyld_y.w[1])
+	       && (pyld_x.w[0] >= pyld_y.w[0])))
+	    res = 1;
+	  else
+	    res = 0;
+	  BID_RETURN (res);
+	} else {
+	  // either x = -SNaN and y = -QNaN or x = -QNaN and y = -SNaN
+	  res = ((y.w[1] & MASK_SNAN) == MASK_SNAN);
+	  // totalOrder (-QNaN, -SNaN) == 1
+	  BID_RETURN (res);
+	}
+      }
+    } else {	// x is +NaN
+      // return false, unless y is +NaN also
+      if ((y.w[1] & MASK_NAN) != MASK_NAN
+	  || (y.w[1] & MASK_SIGN) == MASK_SIGN) {
+	res = 0;	// y is a number, return 1
+	BID_RETURN (res);
+      } else {
+	// x and y are both +NaN; 
+	pyld_x.w[1] = x.w[1] & 0x00003fffffffffffull;
+	pyld_x.w[0] = x.w[0];
+	pyld_y.w[1] = y.w[1] & 0x00003fffffffffffull;
+	pyld_y.w[0] = y.w[0];
+	if ((pyld_x.w[1] > 0x0000314dc6448d93ull)
+	    || ((pyld_x.w[1] == 0x0000314dc6448d93ull)
+		&& (pyld_x.w[0] > 0x38c15b09ffffffffull))) {
+	  pyld_x.w[1] = 0;
+	  pyld_x.w[0] = 0;
+	}
+	if ((pyld_y.w[1] > 0x0000314dc6448d93ull)
+	    || ((pyld_y.w[1] == 0x0000314dc6448d93ull)
+		&& (pyld_y.w[0] > 0x38c15b09ffffffffull))) {
+	  pyld_y.w[1] = 0;
+	  pyld_y.w[0] = 0;
+	}
+	// if x and y are both +SNaN or both +QNaN, we have to compare payloads
+	// this statement evaluates to true if both are SNaN or QNaN
+	if (!
+	    (((y.w[1] & MASK_SNAN) == MASK_SNAN) ^
+	     ((x.w[1] & MASK_SNAN) == MASK_SNAN))) {
+	  // it comes down to the payload.  we want to return true if x has a
+	  // smaller payload, or if the payloads are equal (canonical forms
+	  // are bitwise identical)
+	  if ((pyld_x.w[1] < pyld_y.w[1]) ||
+	      ((pyld_x.w[1] == pyld_y.w[1])
+	       && (pyld_x.w[0] <= pyld_y.w[0])))
+	    res = 1;
+	  else
+	    res = 0;
+	  BID_RETURN (res);
+	} else {
+	  // either x = SNaN and y = QNaN or x = QNaN and y = SNaN
+	  res = ((x.w[1] & MASK_SNAN) == MASK_SNAN);
+	  // totalOrder (-QNaN, -SNaN) == 1
+	  BID_RETURN (res);
+	}
+      }
+    }
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {
+    // x is certainly not NAN in this case.
+    // return true if y is positive
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE 2)
+  // if all the bits are the same, the numbers are equal.
+  if ((x.w[1] == y.w[1]) && (x.w[0] == y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGNS (CASE 3)
+  // if signs are opposite, return 1 if x is negative 
+  // (if x < y, totalOrder is true)
+  if (((x.w[1] & MASK_SIGN) == MASK_SIGN) ^ ((y.w[1] & MASK_SIGN) ==
+					     MASK_SIGN)) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE 4)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    // if x == neg_inf, return (y == neg_inf);
+    if ((x.w[1] & MASK_SIGN) == MASK_SIGN) {
+      res = 1;
+      BID_RETURN (res);
+    } else {
+      // x is positive infinity, only return1 if y is positive infinity as well
+      res = ((y.w[1] & MASK_INF) == MASK_INF);
+      BID_RETURN (res);
+      // && (y & MASK_SIGN) != MASK_SIGN); (we know y has same sign as x)
+    }
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // CONVERT x
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF x IS CANONICAL
+  // 9999999999999999999999999999999999 (decimal) = 
+  //     1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  // If the value exceeds that, it is interpreted as 0.
+  if ((((sig_x.w[1] > 0x0001ed09bead87c0ull) ||
+	((sig_x.w[1] == 0x0001ed09bead87c0ull) &&
+	 (sig_x.w[0] > 0x378d8e63ffffffffull))) &&
+       ((x.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull)) ||
+      ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) ||
+      ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+    x_is_zero = 1;
+    // check for the case where the exponent is shifted right by 2 bits!
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      exp_x = (x.w[1] >> 47) & 0x000000000003fffull;
+    }
+  }
+  // CONVERT y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // CHECK IF y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //     1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  // If the value exceeds that, it is interpreted as 0.
+  if ((((sig_y.w[1] > 0x0001ed09bead87c0ull) ||
+	((sig_y.w[1] == 0x0001ed09bead87c0ull) &&
+	 (sig_y.w[0] > 0x378d8e63ffffffffull))) &&
+       ((y.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull)) ||
+      ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) ||
+      ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+    y_is_zero = 1;
+    // check for the case where the exponent is shifted right by 2 bits!
+    if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      exp_y = (y.w[1] >> 47) & 0x000000000003fffull;
+    }
+  }
+  // ZERO (CASE 5)
+  // if x and y represent the same entities, and both are negative 
+  // return true iff exp_x <= exp_y
+  if (x_is_zero && y_is_zero) {
+    // we know that signs must be the same because we would have caught it 
+    // in case3 if signs were different
+    // totalOrder(x,y) iff exp_x >= exp_y for negative numbers
+    // totalOrder(x,y) iff exp_x <= exp_y for positive numbers
+    if (exp_x == exp_y) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    res = ((exp_x <= exp_y) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // if x is zero and y isn't, clearly x has the smaller payload
+  if (x_is_zero) {
+    res = ((y.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, and x isn't, clearly y has the smaller payload
+  if (y_is_zero) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE 6)
+  // if both components are either bigger or smaller
+  if (((sig_x.w[1] > sig_y.w[1])
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+      && exp_x >= exp_y) {
+    res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (((sig_x.w[1] < sig_y.w[1])
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+      && exp_x <= exp_y) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (exp_x > exp_y) {
+    // if exp_x is 33 greater than exp_y, it is definitely larger, 
+    // so no need for compensation
+    if (exp_x - exp_y > 33) {
+      res = ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+      // difference cannot be greater than 10^33
+    }
+    // otherwise adjust the x significand upwards
+    if (exp_x - exp_y > 19) {
+      __mul_128x128_to_256 (sig_n_prime256, sig_x,
+			    ten2k128[exp_x - exp_y - 20]);
+      // the compensated significands are equal (ie "x and y represent the same
+      // entities") return 1 if (negative && expx > expy) || 
+      // (positive && expx < expy)
+      if ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	  && (sig_n_prime256.w[1] == sig_y.w[1])
+	  && (sig_n_prime256.w[0] == sig_y.w[0])) {
+	// the case exp_x == exp_y  cannot occur, because all bits must be 
+	// the same - would have been caught if (x == y)
+	res = ((exp_x <= exp_y) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+	BID_RETURN (res);
+      }
+      // if positive, return 1 if adjusted x is smaller than y
+      res = (((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	      && ((sig_n_prime256.w[1] < sig_y.w[1])
+		  || (sig_n_prime256.w[1] == sig_y.w[1]
+		      && sig_n_prime256.w[0] <
+		      sig_y.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				       MASK_SIGN));
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[exp_x - exp_y], sig_x);
+    // if positive, return whichever significand is larger 
+    // (converse if negative)
+    if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+	&& (sig_n_prime192.w[0] == sig_y.w[0])) {
+      res = ((exp_x <= exp_y) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+    res = (((sig_n_prime192.w[2] == 0)
+	    && ((sig_n_prime192.w[1] < sig_y.w[1])
+		|| (sig_n_prime192.w[1] == sig_y.w[1]
+		    && sig_n_prime192.w[0] <
+		    sig_y.w[0]))) ^ ((x.w[1] & MASK_SIGN) ==
+				     MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // if exp_x is 33 less than exp_y, it is definitely smaller, 
+  // no need for compensation
+  if (exp_y - exp_x > 33) {
+    res = ((x.w[1] & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (exp_y - exp_x > 19) {
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y,
+			  ten2k128[exp_y - exp_x - 20]);
+    // if x and y represent the same entities and both are negative
+    // return true iff exp_x <= exp_y
+    if ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	&& (sig_n_prime256.w[1] == sig_x.w[1])
+	&& (sig_n_prime256.w[0] == sig_x.w[0])) {
+      res = (exp_x <= exp_y) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+    // values are not equal, for positive numbers return 1 if x is less than y
+    // and 0 otherwise
+    res = (((sig_n_prime256.w[3] != 0) ||
+	    // if upper128 bits of compensated y are non-zero, y is bigger
+	    (sig_n_prime256.w[2] != 0) ||
+	    // if upper128 bits of compensated y are non-zero, y is bigger
+	    (sig_n_prime256.w[1] > sig_x.w[1]) ||
+	    // if compensated y is bigger, y is bigger
+	    (sig_n_prime256.w[1] == sig_x.w[1]
+	     && sig_n_prime256.w[0] >
+	     sig_x.w[0])) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+    BID_RETURN (res);
+  }
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[exp_y - exp_x], sig_y);
+  if ((sig_n_prime192.w[2] == 0) && (sig_n_prime192.w[1] == sig_x.w[1])
+      && (sig_n_prime192.w[0] == sig_x.w[0])) {
+    res = (exp_x <= exp_y) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  res = (((sig_n_prime192.w[2] != 0) ||
+	  // if upper128 bits of compensated y are non-zero, y is bigger
+	  (sig_n_prime192.w[1] > sig_x.w[1]) ||
+	  // if compensated y is bigger, y is bigger
+	  (sig_n_prime192.w[1] == sig_x.w[1]
+	   && sig_n_prime192.w[0] >
+	   sig_x.w[0])) ^ ((x.w[1] & MASK_SIGN) == MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_totalOrderMag (int *pres, UINT128 * px,
+		      UINT128 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+  UINT128 y = *py;
+#else
+int
+bid128_totalOrderMag (UINT128 x,
+		      UINT128 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT128 sig_x, sig_y, pyld_y, pyld_x;
+  UINT192 sig_n_prime192;
+  UINT256 sig_n_prime256;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  BID_SWAP128 (x);
+  BID_SWAP128 (y);
+  x.w[1] = x.w[1] & 0x7fffffffffffffffull;
+  y.w[1] = y.w[1] & 0x7fffffffffffffffull;
+
+  // NaN (CASE 1)
+  // if x and y are unordered numerically because either operand is NaN
+  //    (1) totalOrder(number, +NaN) is true
+  //    (2) if x and y are both NaN:
+  //       i) signaling < quiet for +NaN
+  //       ii) lesser payload < greater payload for +NaN
+  //       iii) else if bitwise identical (in canonical form), return 1
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {
+    // x is +NaN
+    // return false, unless y is +NaN also
+    if ((y.w[1] & MASK_NAN) != MASK_NAN) {
+      res = 0;	// y is a number, return 0
+      BID_RETURN (res);
+    } else {
+      // x and y are both +NaN; 
+      pyld_x.w[1] = x.w[1] & 0x00003fffffffffffull;
+      pyld_x.w[0] = x.w[0];
+      pyld_y.w[1] = y.w[1] & 0x00003fffffffffffull;
+      pyld_y.w[0] = y.w[0];
+      if ((pyld_x.w[1] > 0x0000314dc6448d93ull)
+	  || ((pyld_x.w[1] == 0x0000314dc6448d93ull)
+	      && (pyld_x.w[0] > 0x38c15b09ffffffffull))) {
+	pyld_x.w[1] = 0;
+	pyld_x.w[0] = 0;
+      }
+      if ((pyld_y.w[1] > 0x0000314dc6448d93ull)
+	  || ((pyld_y.w[1] == 0x0000314dc6448d93ull)
+	      && (pyld_y.w[0] > 0x38c15b09ffffffffull))) {
+	pyld_y.w[1] = 0;
+	pyld_y.w[0] = 0;
+      }
+      // if x and y are both +SNaN or both +QNaN, we have to compare payloads
+      // this statement evaluates to true if both are SNaN or QNaN
+      if (!
+	  (((y.w[1] & MASK_SNAN) == MASK_SNAN) ^
+	   ((x.w[1] & MASK_SNAN) == MASK_SNAN))) {
+	// it comes down to the payload.  we want to return true if x has a
+	// smaller payload, or if the payloads are equal (canonical forms
+	// are bitwise identical)
+	if ((pyld_x.w[1] < pyld_y.w[1]) ||
+	    ((pyld_x.w[1] == pyld_y.w[1])
+	     && (pyld_x.w[0] <= pyld_y.w[0]))) {
+	  res = 1;
+	} else {
+	  res = 0;
+	}
+	BID_RETURN (res);
+      } else {
+	// either x = SNaN and y = QNaN or x = QNaN and y = SNaN
+	res = ((x.w[1] & MASK_SNAN) == MASK_SNAN);
+	// totalOrder (-QNaN, -SNaN) == 1
+	BID_RETURN (res);
+      }
+    }
+  } else if ((y.w[1] & MASK_NAN) == MASK_NAN) {
+    // x is certainly not NAN in this case.
+    // return true because y is positive
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE 2)
+  // if all the bits are the same, the numbers are equal.
+  if ((x.w[1] == y.w[1]) && (x.w[0] == y.w[0])) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE 3)
+  if ((x.w[1] & MASK_INF) == MASK_INF) {
+    // x is positive infinity, only return 1 if y is positive infinity as well
+    res = ((y.w[1] & MASK_INF) == MASK_INF);
+    BID_RETURN (res);
+    // (we know y has same sign as x)
+  } else if ((y.w[1] & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    since y is +inf, x<y
+    res = 1;
+    BID_RETURN (res);
+  } else {
+    ;	// continue
+  }
+
+  // CONVERT x
+  sig_x.w[1] = x.w[1] & 0x0001ffffffffffffull;
+  sig_x.w[0] = x.w[0];
+  exp_x = (x.w[1] >> 49) & 0x000000000003fffull;
+
+  // CHECK IF x IS CANONICAL
+  // 9999999999999999999999999999999999 (decimal) = 
+  //     1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  // If the value exceeds that, it is interpreted as 0.
+  if ((((sig_x.w[1] > 0x0001ed09bead87c0ull) ||
+	((sig_x.w[1] == 0x0001ed09bead87c0ull) &&
+	 (sig_x.w[0] > 0x378d8e63ffffffffull))) &&
+       ((x.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull)) ||
+      ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) ||
+      ((sig_x.w[1] == 0) && (sig_x.w[0] == 0))) {
+    x_is_zero = 1;
+    // check for the case where the exponent is shifted right by 2 bits!
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      exp_x = (x.w[1] >> 47) & 0x000000000003fffull;
+    }
+  }
+  // CONVERT y
+  exp_y = (y.w[1] >> 49) & 0x0000000000003fffull;
+  sig_y.w[1] = y.w[1] & 0x0001ffffffffffffull;
+  sig_y.w[0] = y.w[0];
+
+  // CHECK IF y IS CANONICAL
+  // 9999999999999999999999999999999999(decimal) = 
+  //     1ed09_bead87c0_378d8e63_ffffffff(hexadecimal)
+  // [0, 10^34) is the 754r supported canonical range.  
+  // If the value exceeds that, it is interpreted as 0.
+  if ((((sig_y.w[1] > 0x0001ed09bead87c0ull) ||
+	((sig_y.w[1] == 0x0001ed09bead87c0ull) &&
+	 (sig_y.w[0] > 0x378d8e63ffffffffull))) &&
+       ((y.w[1] & 0x6000000000000000ull) != 0x6000000000000000ull)) ||
+      ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) ||
+      ((sig_y.w[1] == 0) && (sig_y.w[0] == 0))) {
+    y_is_zero = 1;
+    // check for the case where the exponent is shifted right by 2 bits!
+    if ((y.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {
+      exp_y = (y.w[1] >> 47) & 0x000000000003fffull;
+    }
+  }
+  // ZERO (CASE 4)
+  if (x_is_zero && y_is_zero) {
+    // we know that signs must be the same because we would have caught it 
+    // in case3 if signs were different
+    // totalOrder(x,y) iff exp_x <= exp_y for positive numbers
+    if (exp_x == exp_y) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    res = (exp_x <= exp_y);
+    BID_RETURN (res);
+  }
+  // if x is zero and y isn't, clearly x has the smaller payload
+  if (x_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if y is zero, and x isn't, clearly y has the smaller payload
+  if (y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE 5)
+  // if both components are either bigger or smaller
+  if (((sig_x.w[1] > sig_y.w[1])
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] > sig_y.w[0]))
+      && exp_x >= exp_y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  if (((sig_x.w[1] < sig_y.w[1])
+       || (sig_x.w[1] == sig_y.w[1] && sig_x.w[0] < sig_y.w[0]))
+      && exp_x <= exp_y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 33, it comes down to the compensated significand
+  if (exp_x > exp_y) {
+    // if exp_x is 33 greater than exp_y, it is definitely larger, 
+    // so no need for compensation
+    if (exp_x - exp_y > 33) {
+      res = 0;	// difference cannot be greater than 10^33
+      BID_RETURN (res);
+    }
+    // otherwise adjust the x significand upwards
+    if (exp_x - exp_y > 19) {
+      __mul_128x128_to_256 (sig_n_prime256, sig_x,
+			    ten2k128[exp_x - exp_y - 20]);
+      // the compensated significands are equal (ie "x and y represent the same
+      // entities") return 1 if (negative && expx > expy) || 
+      // (positive && expx < expy)
+      if ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	  && (sig_n_prime256.w[1] == sig_y.w[1])
+	  && (sig_n_prime256.w[0] == sig_y.w[0])) {
+	// the case (exp_x == exp_y) cannot occur, because all bits must be 
+	// the same - would have been caught if (x == y)
+	res = (exp_x <= exp_y);
+	BID_RETURN (res);
+      }
+      // since positive, return 1 if adjusted x is smaller than y
+      res = ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	     && ((sig_n_prime256.w[1] < sig_y.w[1])
+		 || (sig_n_prime256.w[1] == sig_y.w[1]
+		     && sig_n_prime256.w[0] < sig_y.w[0])));
+      BID_RETURN (res);
+    }
+    __mul_64x128_to_192 (sig_n_prime192, ten2k64[exp_x - exp_y], sig_x);
+    // if positive, return whichever significand is larger 
+    // (converse if negative)
+    if ((sig_n_prime192.w[2] == 0) && sig_n_prime192.w[1] == sig_y.w[1]
+	&& (sig_n_prime192.w[0] == sig_y.w[0])) {
+      res = (exp_x <= exp_y);
+      BID_RETURN (res);
+    }
+    res = ((sig_n_prime192.w[2] == 0)
+	   && ((sig_n_prime192.w[1] < sig_y.w[1])
+	       || (sig_n_prime192.w[1] == sig_y.w[1]
+		   && sig_n_prime192.w[0] < sig_y.w[0])));
+    BID_RETURN (res);
+  }
+  // if exp_x is 33 less than exp_y, it is definitely smaller, 
+  // no need for compensation
+  if (exp_y - exp_x > 33) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  if (exp_y - exp_x > 19) {
+    // adjust the y significand upwards
+    __mul_128x128_to_256 (sig_n_prime256, sig_y,
+			  ten2k128[exp_y - exp_x - 20]);
+    if ((sig_n_prime256.w[3] == 0) && (sig_n_prime256.w[2] == 0)
+	&& (sig_n_prime256.w[1] == sig_x.w[1])
+	&& (sig_n_prime256.w[0] == sig_x.w[0])) {
+      res = (exp_x <= exp_y);
+      BID_RETURN (res);
+    }
+    // values are not equal, for positive numbers return 1 if x is less than y
+    // and 0 otherwise
+    res = ((sig_n_prime256.w[3] != 0) ||
+	   // if upper128 bits of compensated y are non-zero, y is bigger
+	   (sig_n_prime256.w[2] != 0) ||
+	   // if upper128 bits of compensated y are non-zero, y is bigger
+	   (sig_n_prime256.w[1] > sig_x.w[1]) ||
+	   // if compensated y is bigger, y is bigger
+	   (sig_n_prime256.w[1] == sig_x.w[1]
+	    && sig_n_prime256.w[0] > sig_x.w[0]));
+    BID_RETURN (res);
+  }
+  __mul_64x128_to_192 (sig_n_prime192, ten2k64[exp_y - exp_x], sig_y);
+  if ((sig_n_prime192.w[2] == 0) && (sig_n_prime192.w[1] == sig_x.w[1])
+      && (sig_n_prime192.w[0] == sig_x.w[0])) {
+    res = (exp_x <= exp_y);
+    BID_RETURN (res);
+  }
+  res = ((sig_n_prime192.w[2] != 0) ||
+	 // if upper128 bits of compensated y are non-zero, y is bigger
+	 (sig_n_prime192.w[1] > sig_x.w[1]) ||
+	 // if compensated y is bigger, y is bigger
+	 (sig_n_prime192.w[1] == sig_x.w[1]
+	  && sig_n_prime192.w[0] > sig_x.w[0]));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_radix (int *pres, UINT128 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+int
+bid128_radix (UINT128 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  if (x.w[LOW_128W])	// dummy test
+    res = 10;
+  else
+    res = 10;
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_quantize.c b/gcc-4.9/libgcc/config/libbid/bid128_quantize.c
new file mode 100644
index 000000000..b82526d94
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_quantize.c
@@ -0,0 +1,274 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+BID128_FUNCTION_ARG2 (bid128_quantize, x, y)
+
+     UINT256 CT;
+     UINT128 CX, CY, T, CX2, CR, Stemp, res, REM_H, C2N;
+     UINT64 sign_x, sign_y, remainder_h, carry, CY64, valid_x;
+     int_float tempx;
+     int exponent_x, exponent_y, digits_x, extra_digits, amount;
+     int expon_diff, total_digits, bin_expon_cx, rmode, status;
+
+valid_x = unpack_BID128_value (&sign_x, &exponent_x, &CX, x);
+
+  // unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_y, &exponent_y, &CY, y)) {
+    // y is Inf. or NaN
+#ifdef SET_STATUS_FLAGS
+if ((x.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // test if y is NaN
+if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull) {
+    // set status flags
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+  }
+#endif
+  if ((x.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull) {
+    res.w[1] = CY.w[1] & QUIET_MASK64;
+    res.w[0] = CY.w[0];
+  } else {
+    res.w[1] = CX.w[1] & QUIET_MASK64;
+    res.w[0] = CX.w[0];
+  }
+  BID_RETURN (res);
+}
+    // y is Infinity?
+if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if x is not Inf.
+  if (((x.w[1] & 0x7c00000000000000ull) < 0x7800000000000000ull)) {
+    // return NaN 
+#ifdef SET_STATUS_FLAGS
+    // set status flags
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  } else
+    if (((x.w[1] & 0x7c00000000000000ull) <= 0x7800000000000000ull)) {
+    res.w[1] = CX.w[1] & QUIET_MASK64;
+    res.w[0] = CX.w[0];
+    BID_RETURN (res);
+  }
+}
+
+}
+
+if (!valid_x) {
+  // test if x is NaN or Inf
+  if ((x.w[1] & 0x7c00000000000000ull) == 0x7800000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    // set status flags
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  } else if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+    if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+      // set status flags
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    }
+    res.w[1] = CX.w[1] & QUIET_MASK64;
+    res.w[0] = CX.w[0];
+    BID_RETURN (res);
+  }
+  if (!CX.w[1] && !CX.w[0]) {
+    get_BID128_very_fast (&res, sign_x, exponent_y, CX);
+    BID_RETURN (res);
+  }
+}
+  // get number of decimal digits in coefficient_x
+if (CX.w[1]) {
+  tempx.d = (float) CX.w[1];
+  bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f + 64;
+} else {
+  tempx.d = (float) CX.w[0];
+  bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+}
+
+digits_x = estimate_decimal_digits[bin_expon_cx];
+if (CX.w[1] > power10_table_128[digits_x].w[1]
+    || (CX.w[1] == power10_table_128[digits_x].w[1]
+	&& CX.w[0] >= power10_table_128[digits_x].w[0]))
+  digits_x++;
+
+expon_diff = exponent_x - exponent_y;
+total_digits = digits_x + expon_diff;
+
+if ((UINT32) total_digits <= 34) {
+  if (expon_diff >= 0) {
+    T = power10_table_128[expon_diff];
+    __mul_128x128_low (CX2, T, CX);
+    get_BID128_very_fast (&res, sign_x, exponent_y, CX2);
+    BID_RETURN (res);
+  }
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  rmode = rnd_mode;
+  if (sign_x && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#else
+  rmode = 0;
+#endif
+#else
+  rmode = 0;
+#endif
+  // must round off -expon_diff digits
+  extra_digits = -expon_diff;
+  __add_128_128 (CX, CX, round_const_table_128[rmode][extra_digits]);
+
+  // get P*(2^M[extra_digits])/10^extra_digits
+  __mul_128x128_to_256 (CT, CX, reciprocals10_128[extra_digits]);
+
+  // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+  amount = recip_scale[extra_digits];
+  CX2.w[0] = CT.w[2];
+  CX2.w[1] = CT.w[3];
+  if (amount >= 64) {
+    CR.w[1] = 0;
+    CR.w[0] = CX2.w[1] >> (amount - 64);
+  } else {
+    __shr_128 (CR, CX2, amount);
+  }
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (rnd_mode == 0)
+#endif
+    if (CR.w[0] & 1) {
+      // check whether fractional part of initial_P/10^extra_digits is 
+      // exactly .5 this is the same as fractional part of 
+      // (initial_P + 0.5*10^extra_digits)/10^extra_digits is exactly zero
+
+      // get remainder
+      if (amount >= 64) {
+	remainder_h = CX2.w[0] | (CX2.w[1] << (128 - amount));
+      } else
+	remainder_h = CX2.w[0] << (64 - amount);
+
+      // test whether fractional part is 0
+      if (!remainder_h
+	  && (CT.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (CT.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && CT.w[0] < reciprocals10_128[extra_digits].w[0]))) {
+	CR.w[0]--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+  status = INEXACT_EXCEPTION;
+
+  // get remainder
+  if (amount >= 64) {
+    REM_H.w[1] = (CX2.w[1] << (128 - amount));
+    REM_H.w[0] = CX2.w[0];
+  } else {
+    REM_H.w[1] = CX2.w[0] << (64 - amount);
+    REM_H.w[0] = 0;
+  }
+
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:
+  case ROUNDING_TIES_AWAY:
+    // test whether fractional part is 0
+    if (REM_H.w[1] == 0x8000000000000000ull && !REM_H.w[0]
+	&& (CT.w[1] < reciprocals10_128[extra_digits].w[1]
+	    || (CT.w[1] == reciprocals10_128[extra_digits].w[1]
+		&& CT.w[0] < reciprocals10_128[extra_digits].w[0])))
+      status = EXACT_STATUS;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    if (!(REM_H.w[1] | REM_H.w[0])
+	&& (CT.w[1] < reciprocals10_128[extra_digits].w[1]
+	    || (CT.w[1] == reciprocals10_128[extra_digits].w[1]
+		&& CT.w[0] < reciprocals10_128[extra_digits].w[0])))
+      status = EXACT_STATUS;
+    break;
+  default:
+    // round up
+    __add_carry_out (Stemp.w[0], CY64, CT.w[0],
+		     reciprocals10_128[extra_digits].w[0]);
+    __add_carry_in_out (Stemp.w[1], carry, CT.w[1],
+			reciprocals10_128[extra_digits].w[1], CY64);
+    if (amount < 64) {
+      C2N.w[1] = 0;
+      C2N.w[0] = ((UINT64) 1) << amount;
+      REM_H.w[0] = REM_H.w[1] >> (64 - amount);
+      REM_H.w[1] = 0;
+    } else {
+      C2N.w[1] = ((UINT64) 1) << (amount - 64);
+      C2N.w[0] = 0;
+      REM_H.w[1] >>= (128 - amount);
+    }
+    REM_H.w[0] += carry;
+    if (REM_H.w[0] < carry)
+      REM_H.w[1]++;
+    if (__unsigned_compare_ge_128 (REM_H, C2N))
+      status = EXACT_STATUS;
+  }
+
+  __set_status_flags (pfpsf, status);
+
+#endif
+  get_BID128_very_fast (&res, sign_x, exponent_y, CR);
+  BID_RETURN (res);
+}
+if (total_digits < 0) {
+  CR.w[1] = CR.w[0] = 0;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  rmode = rnd_mode;
+  if (sign_x && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  if (rmode == ROUNDING_UP)
+    CR.w[0] = 1;
+#endif
+#endif
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+  get_BID128_very_fast (&res, sign_x, exponent_y, CR);
+  BID_RETURN (res);
+}
+  // else  more than 34 digits in coefficient
+#ifdef SET_STATUS_FLAGS
+__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+res.w[1] = 0x7c00000000000000ull;
+res.w[0] = 0;
+BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_rem.c b/gcc-4.9/libgcc/config/libbid/bid128_rem.c
new file mode 100644
index 000000000..fdc0b6f32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_rem.c
@@ -0,0 +1,217 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_div_macros.h"
+
+
+BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE (UINT128, bid128_rem, x, y)
+
+     UINT256 P256;
+     UINT128 CX, CY, CX2, CQ, CR, T, CXS, P128, res;
+     UINT64 sign_x, sign_y, valid_y;
+     SINT64 D;
+     int_float f64, fx;
+     int exponent_x, exponent_y, diff_expon, bin_expon_cx, scale,
+       scale0;
+
+  // unpack arguments, check for NaN or Infinity
+
+valid_y = unpack_BID128_value (&sign_y, &exponent_y, &CY, y);
+
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+#ifdef SET_STATUS_FLAGS
+if ((y.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // test if x is NaN
+if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((x.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = CX.w[1] & QUIET_MASK64;
+  res.w[0] = CX.w[0];
+  BID_RETURN (res);
+}
+    // x is Infinity?
+if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  // check if y is Inf.
+  if (((y.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull))
+    // return NaN 
+  {
+#ifdef SET_STATUS_FLAGS
+    // set status flags
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+
+}
+    // x is 0
+if ((!CY.w[1]) && (!CY.w[0])) {
+#ifdef SET_STATUS_FLAGS
+  // set status flags
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  // x=y=0, return NaN
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+if (valid_y || ((y.w[1] & NAN_MASK64) == INFINITY_MASK64)) {
+  // return 0
+  if ((exponent_x > exponent_y)
+      && ((y.w[1] & NAN_MASK64) != INFINITY_MASK64))
+    exponent_x = exponent_y;
+
+  res.w[1] = sign_x | (((UINT64) exponent_x) << 49);
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+}
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((y.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    res.w[1] = CY.w[1] & QUIET_MASK64;
+    res.w[0] = CY.w[0];
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return x
+    res.w[1] = x.w[1];
+    res.w[0] = x.w[0];
+    BID_RETURN (res);
+  }
+  // y is 0
+#ifdef SET_STATUS_FLAGS
+  // set status flags
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+  BID_RETURN (res);
+}
+
+diff_expon = exponent_x - exponent_y;
+
+if (diff_expon <= 0) {
+  diff_expon = -diff_expon;
+
+  if (diff_expon > 34) {
+    // |x|<|y| in this case
+    res = x;
+    BID_RETURN (res);
+  }
+  // set exponent of y to exponent_x, scale coefficient_y
+  T = power10_table_128[diff_expon];
+  __mul_128x128_to_256 (P256, CY, T);
+
+  if (P256.w[2] || P256.w[3]) {
+    // |x|<|y| in this case
+    res = x;
+    BID_RETURN (res);
+  }
+
+  CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+  CX2.w[0] = CX.w[0] << 1;
+  if (__unsigned_compare_ge_128 (P256, CX2)) {
+    // |x|<|y| in this case
+    res = x;
+    BID_RETURN (res);
+  }
+
+  P128.w[0] = P256.w[0];
+  P128.w[1] = P256.w[1];
+  __div_128_by_128 (&CQ, &CR, CX, P128);
+
+  CX2.w[1] = (CR.w[1] << 1) | (CR.w[0] >> 63);
+  CX2.w[0] = CR.w[0] << 1;
+  if ((__unsigned_compare_gt_128 (CX2, P256))
+      || (CX2.w[1] == P256.w[1] && CX2.w[0] == P256.w[0]
+	  && (CQ.w[0] & 1))) {
+    __sub_128_128 (CR, P256, CR);
+    sign_x ^= 0x8000000000000000ull;
+  }
+
+  get_BID128_very_fast (&res, sign_x, exponent_x, CR);
+  BID_RETURN (res);
+}
+  // 2^64
+f64.i = 0x5f800000;
+
+scale0 = 38;
+if (!CY.w[1])
+  scale0 = 34;
+
+while (diff_expon > 0) {
+  // get number of digits in CX and scale=38-digits
+  // fx ~ CX
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+  scale = scale0 - estimate_decimal_digits[bin_expon_cx];
+  // scale = 38-estimate_decimal_digits[bin_expon_cx];
+  D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+  if (D > 0
+      || (!D && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+    scale--;
+
+  if (diff_expon >= scale)
+    diff_expon -= scale;
+  else {
+    scale = diff_expon;
+    diff_expon = 0;
+  }
+
+  T = power10_table_128[scale];
+  __mul_128x128_low (CXS, CX, T);
+
+  __div_128_by_128 (&CQ, &CX, CXS, CY);
+
+  // check for remainder == 0
+  if (!CX.w[1] && !CX.w[0]) {
+    get_BID128_very_fast (&res, sign_x, exponent_y, CX);
+    BID_RETURN (res);
+  }
+}
+
+CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+CX2.w[0] = CX.w[0] << 1;
+if ((__unsigned_compare_gt_128 (CX2, CY))
+    || (CX2.w[1] == CY.w[1] && CX2.w[0] == CY.w[0] && (CQ.w[0] & 1))) {
+  __sub_128_128 (CX, CY, CX);
+  sign_x ^= 0x8000000000000000ull;
+}
+
+get_BID128_very_fast (&res, sign_x, exponent_y, CX);
+BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_round_integral.c b/gcc-4.9/libgcc/config/libbid/bid128_round_integral.c
new file mode 100644
index 000000000..1b740d31c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_round_integral.c
@@ -0,0 +1,1951 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128_round_integral_exact
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1 (bid128_round_integral_exact, x)
+
+     UINT128 res = { {0xbaddbaddbaddbaddull, 0xbaddbaddbaddbaddull}
+     };
+UINT64 x_sign;
+UINT64 x_exp;
+int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+UINT64 tmp64;
+BID_UI64DOUBLE tmp1;
+unsigned int x_nr_bits;
+int q, ind, shift;
+UINT128 C1;
+UINT256 fstar;
+UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+  // x is special
+  if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+    // if x = NaN, then res = Q (x)
+    // check first for non-canonical NaN payload
+    if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+	(((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+	 (x.w[0] > 0x38c15b09ffffffffull))) {
+      x.w[1] = x.w[1] & 0xffffc00000000000ull;
+      x.w[0] = 0x0ull;
+    }
+    if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (x)
+      res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+      res.w[0] = x.w[0];
+    } else {	// x is QNaN
+      // return x
+      res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+      res.w[0] = x.w[0];
+    }
+    BID_RETURN (res)
+  } else {	// x is not a NaN, so it must be infinity
+    if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+      // return +inf
+      res.w[1] = 0x7800000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    } else {	// x is -inf 
+      // return -inf
+      res.w[1] = 0xf800000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    }
+    BID_RETURN (res);
+  }
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+switch (rnd_mode) {
+case ROUNDING_TO_NEAREST:
+case ROUNDING_TIES_AWAY:
+  // if (exp <= -(p+1)) return 0.0
+  if (x_exp <= 0x2ffa000000000000ull) {	// 0x2ffa000000000000ull == -35
+    res.w[1] = x_sign | 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_DOWN:
+  // if (exp <= -p) return -1.0 or +0.0
+  if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffa000000000000ull == -34
+    if (x_sign) {
+      // if negative, return negative 1, because we know coefficient
+      // is non-zero (would have been caught above)
+      res.w[1] = 0xb040000000000000ull;
+      res.w[0] = 0x0000000000000001ull;
+    } else {
+      // if positive, return positive 0, because we know coefficient is
+      // non-zero (would have been caught above)
+      res.w[1] = 0x3040000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    }
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_UP:
+  // if (exp <= -p) return -0.0 or +1.0
+  if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffc000000000000ull == -34
+    if (x_sign) {
+      // if negative, return negative 0, because we know the coefficient
+      // is non-zero (would have been caught above)
+      res.w[1] = 0xb040000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    } else {
+      // if positive, return positive 1, because we know coefficient is
+      // non-zero (would have been caught above)
+      res.w[1] = 0x3040000000000000ull;
+      res.w[0] = 0x0000000000000001ull;
+    }
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_TO_ZERO:
+  // if (exp <= -p) return -0.0 or +0.0
+  if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffc000000000000ull == -34
+    res.w[1] = x_sign | 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+}
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+      (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+       C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+}
+  // exp < 0
+switch (rnd_mode) {
+case ROUNDING_TO_NEAREST:
+  if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+    // need to shift right -exp digits from the coefficient; exp will be 0
+    ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 = C1 + 1/2 * 10^x where the result C1 fits in 127 bits
+    tmp64 = C1.w[0];
+    if (ind <= 19) {
+      C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+    } else {
+      C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+      C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+    }
+    if (C1.w[0] < tmp64)
+      C1.w[1]++;
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 34
+    // kx = 10^(-x) = ten2mk128[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 118 bits
+    __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+    // determine the value of res and fstar
+
+    // determine inexactness of the rounding of C*
+    // if (0 < f* - 1/2 < 10^(-x)) then
+    //   the result is exact
+    // else // if (f* - 1/2 > T*) then
+    //   the result is inexact
+    // Note: we are going to use ten2mk128[] instead of ten2mk128trunc[]
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      // redundant shift = shiftright128[ind - 1]; // shift = 0
+      res.w[1] = P256.w[3];
+      res.w[0] = P256.w[2];
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* < 10^(-x) <=> midpoint
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      // if 0 < fstar < 10^(-x), subtract 1 if odd (for rounding to even)
+      if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	  ((fstar.w[1] < (ten2mk128[ind - 1].w[1]))
+	   || ((fstar.w[1] == ten2mk128[ind - 1].w[1])
+	       && (fstar.w[0] < ten2mk128[ind - 1].w[0])))) {
+	// subract 1 to make even
+	if (res.w[0]-- == 0) {
+	  res.w[1]--;
+	}
+      }
+      if (fstar.w[1] > 0x8000000000000000ull ||
+	  (fstar.w[1] == 0x8000000000000000ull
+	   && fstar.w[0] > 0x0ull)) {
+	// f* > 1/2 and the result may be exact
+	tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	if (tmp64 > ten2mk128[ind - 1].w[1] ||
+	    (tmp64 == ten2mk128[ind - 1].w[1] &&
+	     fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact 
+      } else {	// the result is inexact; f2* <= 1/2  
+	// set the inexact flag 
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res.w[1] = (P256.w[3] >> shift);
+      res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* < 10^(-x) <=> midpoint
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	  fstar.w[2] == 0 && (fstar.w[1] < ten2mk128[ind - 1].w[1] ||
+			      (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+			       fstar.w[0] < ten2mk128[ind - 1].w[0]))) {
+	// subract 1 to make even
+	if (res.w[0]-- == 0) {
+	  res.w[1]--;
+	}
+      }
+      if (fstar.w[2] > onehalf128[ind - 1] ||
+	  (fstar.w[2] == onehalf128[ind - 1]
+	   && (fstar.w[1] || fstar.w[0]))) {
+	// f2* > 1/2 and the result may be exact
+	// Calculate f2* - 1/2
+	tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	if (tmp64 || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	    (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	     fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// the result is inexact; f2* <= 1/2
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else {	// 22 <= ind - 1 <= 33
+      shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+      res.w[1] = 0;
+      res.w[0] = P256.w[3] >> shift;
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* < 10^(-x) <=> midpoint
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	  fstar.w[3] == 0 && fstar.w[2] == 0 &&
+	  (fstar.w[1] < ten2mk128[ind - 1].w[1] ||
+	   (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	    fstar.w[0] < ten2mk128[ind - 1].w[0]))) {
+	// subract 1 to make even
+	if (res.w[0]-- == 0) {
+	  res.w[1]--;
+	}
+      }
+      if (fstar.w[3] > onehalf128[ind - 1] ||
+	  (fstar.w[3] == onehalf128[ind - 1] &&
+	   (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	// f2* > 1/2 and the result may be exact
+	// Calculate f2* - 1/2
+	tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	if (tmp64 || fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+		&& fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// the result is inexact; f2* <= 1/2
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    }
+    res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+    BID_RETURN (res);
+  } else {	// if ((q + exp) < 0) <=> q < -exp
+    // the result is +0 or -0
+    res.w[1] = x_sign | 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_TIES_AWAY:
+  if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+    // need to shift right -exp digits from the coefficient; exp will be 0
+    ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 = C1 + 1/2 * 10^x where the result C1 fits in 127 bits
+    tmp64 = C1.w[0];
+    if (ind <= 19) {
+      C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+    } else {
+      C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+      C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+    }
+    if (C1.w[0] < tmp64)
+      C1.w[1]++;
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 34
+    // kx = 10^(-x) = ten2mk128[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 118 bits
+    __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+    // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+    // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+    // if (0 < f* < 10^(-x)) then the result is a midpoint
+    //   if floor(C*) is even then C* = floor(C*) - logical right
+    //       shift; C* has p decimal digits, correct by Prop. 1)
+    //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+    //       shift; C* has p decimal digits, correct by Pr. 1)
+    // else
+    //   C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // n = C* * 10^(e+x)
+
+    // determine also the inexactness of the rounding of C*
+    // if (0 < f* - 1/2 < 10^(-x)) then
+    //   the result is exact
+    // else // if (f* - 1/2 > T*) then
+    //   the result is inexact
+    // Note: we are going to use ten2mk128[] instead of ten2mk128trunc[]
+    // shift right C* by Ex-128 = shiftright128[ind]
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      // redundant shift = shiftright128[ind - 1]; // shift = 0
+      res.w[1] = P256.w[3];
+      res.w[0] = P256.w[2];
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      if (fstar.w[1] > 0x8000000000000000ull ||
+	  (fstar.w[1] == 0x8000000000000000ull
+	   && fstar.w[0] > 0x0ull)) {
+	// f* > 1/2 and the result may be exact
+	tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	if ((tmp64 > ten2mk128[ind - 1].w[1] ||
+	     (tmp64 == ten2mk128[ind - 1].w[1] &&
+	      fstar.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// the result is inexact; f2* <= 1/2
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res.w[1] = (P256.w[3] >> shift);
+      res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      if (fstar.w[2] > onehalf128[ind - 1] ||
+	  (fstar.w[2] == onehalf128[ind - 1]
+	   && (fstar.w[1] || fstar.w[0]))) {
+	// f2* > 1/2 and the result may be exact
+	// Calculate f2* - 1/2
+	tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	if (tmp64 || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	    (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	     fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// the result is inexact; f2* <= 1/2
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else {	// 22 <= ind - 1 <= 33
+      shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+      res.w[1] = 0;
+      res.w[0] = P256.w[3] >> shift;
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      if (fstar.w[3] > onehalf128[ind - 1] ||
+	  (fstar.w[3] == onehalf128[ind - 1] &&
+	   (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	// f2* > 1/2 and the result may be exact
+	// Calculate f2* - 1/2
+	tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	if (tmp64 || fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+		&& fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// the result is inexact; f2* <= 1/2
+	// set the inexact flag
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    }
+    // if the result was a midpoint, it was already rounded away from zero
+    res.w[1] |= x_sign | 0x3040000000000000ull;
+    BID_RETURN (res);
+  } else {	// if ((q + exp) < 0) <=> q < -exp
+    // the result is +0 or -0
+    res.w[1] = x_sign | 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_DOWN:
+  if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+    // need to shift right -exp digits from the coefficient; exp will be 0
+    ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x' 
+    // (number of digits to be chopped off)
+    // chop off ind digits from the lower part of C1 
+    // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+    // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+    // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+    // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+    // tmp64 = C1.w[0];
+    // if (ind <= 19) {
+    //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+    // } else {
+    //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+    //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+    // }
+    // if (C1.w[0] < tmp64) C1.w[1]++;
+    // if carry-out from C1.w[0], increment C1.w[1]
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 34
+    // kx = 10^(-x) = ten2mk128[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 118 bits
+    __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res.w[1] = P256.w[3];
+      res.w[0] = P256.w[2];
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      // redundant fstar.w[1] = P256.w[1];
+      // redundant fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if ((P256.w[1] > ten2mk128[ind - 1].w[1])
+	  || (P256.w[1] == ten2mk128[ind - 1].w[1]
+	      && (P256.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if positive, the truncated value is already the correct result
+	if (x_sign) {	// if negative
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      res.w[1] = (P256.w[3] >> shift);
+      res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	  (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	   fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if positive, the truncated value is already the correct result
+	if (x_sign) {	// if negative
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    } else {	// 22 <= ind - 1 <= 33
+      shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+      res.w[1] = 0;
+      res.w[0] = P256.w[3] >> shift;
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[3] || fstar.w[2]
+	  || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	  || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+	      && fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if positive, the truncated value is already the correct result
+	if (x_sign) {	// if negative
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    }
+    res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp <= 0
+    if (x_sign) {	// negative rounds down to -1.0
+      res.w[1] = 0xb040000000000000ull;
+      res.w[0] = 0x0000000000000001ull;
+    } else {	// positive rpunds down to +0.0
+      res.w[1] = 0x3040000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    }
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_UP:
+  if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+    // need to shift right -exp digits from the coefficient; exp will be 0
+    ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x' 
+    // (number of digits to be chopped off)
+    // chop off ind digits from the lower part of C1 
+    // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+    // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+    // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+    // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+    // tmp64 = C1.w[0];
+    // if (ind <= 19) {
+    //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+    // } else {
+    //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+    //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+    // }
+    // if (C1.w[0] < tmp64) C1.w[1]++;  
+    // if carry-out from C1.w[0], increment C1.w[1]
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 34
+    // kx = 10^(-x) = ten2mk128[ind - 1]
+    // C* = C1 * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 118 bits
+    __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res.w[1] = P256.w[3];
+      res.w[0] = P256.w[2];
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      // redundant fstar.w[1] = P256.w[1]; 
+      // redundant fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if ((P256.w[1] > ten2mk128[ind - 1].w[1])
+	  || (P256.w[1] == ten2mk128[ind - 1].w[1]
+	      && (P256.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if negative, the truncated value is already the correct result
+	if (!x_sign) {	// if positive
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res.w[1] = (P256.w[3] >> shift);
+      res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	  (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	   fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if negative, the truncated value is already the correct result
+	if (!x_sign) {	// if positive
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    } else {	// 22 <= ind - 1 <= 33
+      shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+      res.w[1] = 0;
+      res.w[0] = P256.w[3] >> shift;
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[3] || fstar.w[2]
+	  || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	  || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+	      && fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+	// if negative, the truncated value is already the correct result
+	if (!x_sign) {	// if positive
+	  if (++res.w[0] == 0) {
+	    res.w[1]++;
+	  }
+	}
+      }
+    }
+    res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp <= 0
+    if (x_sign) {	// negative rounds up to -0.0
+      res.w[1] = 0xb040000000000000ull;
+      res.w[0] = 0x0000000000000000ull;
+    } else {	// positive rpunds up to +1.0
+      res.w[1] = 0x3040000000000000ull;
+      res.w[0] = 0x0000000000000001ull;
+    }
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+case ROUNDING_TO_ZERO:
+  if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+    // need to shift right -exp digits from the coefficient; exp will be 0
+    ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+    // (number of digits to be chopped off)
+    // chop off ind digits from the lower part of C1 
+    // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+    // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+    // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+    // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+    //tmp64 = C1.w[0];
+    // if (ind <= 19) {
+    //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+    // } else {
+    //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+    //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+    // }
+    // if (C1.w[0] < tmp64) C1.w[1]++;  
+    // if carry-out from C1.w[0], increment C1.w[1]
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 34
+    // kx = 10^(-x) = ten2mk128[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 118 bits
+    __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res.w[1] = P256.w[3];
+      res.w[0] = P256.w[2];
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      // redundant fstar.w[1] = P256.w[1]; 
+      // redundant fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if ((P256.w[1] > ten2mk128[ind - 1].w[1])
+	  || (P256.w[1] == ten2mk128[ind - 1].w[1]
+	      && (P256.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res.w[1] = (P256.w[3] >> shift);
+      res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	  (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	   fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    } else {	// 22 <= ind - 1 <= 33
+      shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+      res.w[1] = 0;
+      res.w[0] = P256.w[3] >> shift;
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[3] || fstar.w[2]
+	  || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	  || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+	      && fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+    }
+    res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp <= 0 the result is +0 or -0
+    res.w[1] = x_sign | 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+    *pfpsf |= INEXACT_EXCEPTION;
+    BID_RETURN (res);
+  }
+  break;
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_round_integral_nearest_even
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND (bid128_round_integral_nearest_even, x)
+
+     UINT128 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1;
+  // UINT128 res is C* at first - represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  // if x = NaN, then res = Q (x)
+  // check first for non-canonical NaN payload
+  if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+      (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+       (x.w[0] > 0x38c15b09ffffffffull))) {
+    x.w[1] = x.w[1] & 0xffffc00000000000ull;
+    x.w[0] = 0x0ull;
+  }
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return quiet (x)
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+    res.w[0] = x.w[0];
+  } else {	// x is QNaN
+    // return x
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+    res.w[0] = x.w[0];
+  }
+  BID_RETURN (res)
+} else {	// x is not a NaN, so it must be infinity
+  if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+    // return +inf
+    res.w[1] = 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// x is -inf 
+    // return -inf
+    res.w[1] = 0xf800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+  // if (exp <= -(p+1)) return 0
+if (x_exp <= 0x2ffa000000000000ull) {	// 0x2ffa000000000000ull == -35
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+      || (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+	  C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+} else if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+  // need to shift right -exp digits from the coefficient; the exp will be 0
+  ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+  // chop off ind digits from the lower part of C1 
+  // C1 = C1 + 1/2 * 10^x where the result C1 fits in 127 bits
+  tmp64 = C1.w[0];
+  if (ind <= 19) {
+    C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+  } else {
+    C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+    C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+  }
+  if (C1.w[0] < tmp64)
+    C1.w[1]++;
+  // calculate C* and f*
+  // C* is actually floor(C*) in this case
+  // C* and f* need shifting and masking, as shown by
+  // shiftright128[] and maskhigh128[]
+  // 1 <= x <= 34
+  // kx = 10^(-x) = ten2mk128[ind - 1]
+  // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+  // the approximation of 10^(-x) was rounded up to 118 bits
+  __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+  // determine the value of res and fstar
+  if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+    // redundant shift = shiftright128[ind - 1]; // shift = 0
+    res.w[1] = P256.w[3];
+    res.w[0] = P256.w[2];
+    // redundant fstar.w[3] = 0;
+    // redundant fstar.w[2] = 0;
+    // redundant fstar.w[1] = P256.w[1];
+    // redundant fstar.w[0] = P256.w[0];
+    // fraction f* < 10^(-x) <=> midpoint
+    // f* is in the right position to be compared with
+    // 10^(-x) from ten2mk128[]
+    // if 0 < fstar < 10^(-x), subtract 1 if odd (for rounding to even)
+    if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	((P256.w[1] < (ten2mk128[ind - 1].w[1]))
+	 || ((P256.w[1] == ten2mk128[ind - 1].w[1])
+	     && (P256.w[0] < ten2mk128[ind - 1].w[0])))) {
+      // subract 1 to make even
+      if (res.w[0]-- == 0) {
+	res.w[1]--;
+      }
+    }
+  } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+    shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+    res.w[1] = (P256.w[3] >> shift);
+    res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+    // redundant fstar.w[3] = 0;
+    fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+    fstar.w[1] = P256.w[1];
+    fstar.w[0] = P256.w[0];
+    // fraction f* < 10^(-x) <=> midpoint
+    // f* is in the right position to be compared with
+    // 10^(-x) from ten2mk128[]
+    if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	fstar.w[2] == 0 && (fstar.w[1] < ten2mk128[ind - 1].w[1] ||
+			    (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+			     fstar.w[0] < ten2mk128[ind - 1].w[0]))) {
+      // subract 1 to make even
+      if (res.w[0]-- == 0) {
+	res.w[1]--;
+      }
+    }
+  } else {	// 22 <= ind - 1 <= 33
+    shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+    res.w[1] = 0;
+    res.w[0] = P256.w[3] >> shift;
+    fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+    fstar.w[2] = P256.w[2];
+    fstar.w[1] = P256.w[1];
+    fstar.w[0] = P256.w[0];
+    // fraction f* < 10^(-x) <=> midpoint
+    // f* is in the right position to be compared with
+    // 10^(-x) from ten2mk128[]
+    if ((res.w[0] & 0x0000000000000001ull) &&	// is result odd?
+	fstar.w[3] == 0 && fstar.w[2] == 0
+	&& (fstar.w[1] < ten2mk128[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+		&& fstar.w[0] < ten2mk128[ind - 1].w[0]))) {
+      // subract 1 to make even
+      if (res.w[0]-- == 0) {
+	res.w[1]--;
+      }
+    }
+  }
+  res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+  BID_RETURN (res);
+} else {	// if ((q + exp) < 0) <=> q < -exp
+  // the result is +0 or -0
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+}
+
+/*****************************************************************************
+ *  BID128_round_integral_negative
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND (bid128_round_integral_negative, x)
+
+     UINT128 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo 
+  // (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1;
+  // UINT128 res is C* at first - represents up to 34 decimal digits ~ 
+  // 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  // if x = NaN, then res = Q (x)
+  // check first for non-canonical NaN payload
+  if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+      (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+       (x.w[0] > 0x38c15b09ffffffffull))) {
+    x.w[1] = x.w[1] & 0xffffc00000000000ull;
+    x.w[0] = 0x0ull;
+  }
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return quiet (x)
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+    res.w[0] = x.w[0];
+  } else {	// x is QNaN
+    // return x
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+    res.w[0] = x.w[0];
+  }
+  BID_RETURN (res)
+} else {	// x is not a NaN, so it must be infinity
+  if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+    // return +inf
+    res.w[1] = 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// x is -inf 
+    // return -inf
+    res.w[1] = 0xf800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+  // if (exp <= -p) return -1.0 or +0.0
+if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffc000000000000ull == -34
+  if (x_sign) {
+    // if negative, return negative 1, because we know the coefficient
+    // is non-zero (would have been caught above)
+    res.w[1] = 0xb040000000000000ull;
+    res.w[0] = 0x0000000000000001ull;
+  } else {
+    // if positive, return positive 0, because we know coefficient is
+    // non-zero (would have been caught above)
+    res.w[1] = 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+      (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+       C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+} else if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+  // need to shift right -exp digits from the coefficient; the exp will be 0
+  ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x' 
+  // (number of digits to be chopped off)
+  // chop off ind digits from the lower part of C1 
+  // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+  // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+  // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+  // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+  //tmp64 = C1.w[0];
+  // if (ind <= 19) {
+  //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+  // } else {
+  //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+  //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+  // }
+  // if (C1.w[0] < tmp64) C1.w[1]++;
+  // if carry-out from C1.w[0], increment C1.w[1]
+  // calculate C* and f*
+  // C* is actually floor(C*) in this case
+  // C* and f* need shifting and masking, as shown by
+  // shiftright128[] and maskhigh128[]
+  // 1 <= x <= 34
+  // kx = 10^(-x) = ten2mk128[ind - 1]
+  // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+  // the approximation of 10^(-x) was rounded up to 118 bits
+  __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+  if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+    res.w[1] = P256.w[3];
+    res.w[0] = P256.w[2];
+    // if positive, the truncated value is already the correct result
+    if (x_sign) {	// if negative
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      // redundant fstar.w[1] = P256.w[1];
+      // redundant fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if ((P256.w[1] > ten2mk128[ind - 1].w[1])
+	  || (P256.w[1] == ten2mk128[ind - 1].w[1]
+	      && (P256.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+    shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+    res.w[1] = (P256.w[3] >> shift);
+    res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+    // if positive, the truncated value is already the correct result
+    if (x_sign) {	// if negative
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	  (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	   fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  } else {	// 22 <= ind - 1 <= 33
+    shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+    res.w[1] = 0;
+    res.w[0] = P256.w[3] >> shift;
+    // if positive, the truncated value is already the correct result
+    if (x_sign) {	// if negative
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[3] || fstar.w[2]
+	  || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	  || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+	      && fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  }
+  res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+  BID_RETURN (res);
+} else {	// if exp < 0 and q + exp <= 0
+  if (x_sign) {	// negative rounds down to -1.0
+    res.w[1] = 0xb040000000000000ull;
+    res.w[0] = 0x0000000000000001ull;
+  } else {	// positive rpunds down to +0.0
+    res.w[1] = 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+
+/*****************************************************************************
+ *  BID128_round_integral_positive
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND (bid128_round_integral_positive, x)
+
+     UINT128 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo 
+  // (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1;
+  // UINT128 res is C* at first - represents up to 34 decimal digits ~ 
+  // 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  // if x = NaN, then res = Q (x)
+  // check first for non-canonical NaN payload
+  if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+      (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+       (x.w[0] > 0x38c15b09ffffffffull))) {
+    x.w[1] = x.w[1] & 0xffffc00000000000ull;
+    x.w[0] = 0x0ull;
+  }
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return quiet (x)
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+    res.w[0] = x.w[0];
+  } else {	// x is QNaN
+    // return x
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+    res.w[0] = x.w[0];
+  }
+  BID_RETURN (res)
+} else {	// x is not a NaN, so it must be infinity
+  if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+    // return +inf
+    res.w[1] = 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// x is -inf 
+    // return -inf
+    res.w[1] = 0xf800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent 
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+  // if (exp <= -p) return -0.0 or +1.0
+if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffc000000000000ull == -34
+  if (x_sign) {
+    // if negative, return negative 0, because we know the coefficient 
+    // is non-zero (would have been caught above)
+    res.w[1] = 0xb040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {
+    // if positive, return positive 1, because we know coefficient is 
+    // non-zero (would have been caught above)
+    res.w[1] = 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000001ull;
+  }
+  BID_RETURN (res);
+}
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+      (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+       C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+} else if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+  // need to shift right -exp digits from the coefficient; exp will be 0
+  ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x' 
+  // (number of digits to be chopped off)
+  // chop off ind digits from the lower part of C1 
+  // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+  // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+  // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+  // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+  // tmp64 = C1.w[0];
+  // if (ind <= 19) {
+  //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+  // } else {
+  //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+  //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+  // }
+  // if (C1.w[0] < tmp64) C1.w[1]++;  
+  // if carry-out from C1.w[0], increment C1.w[1]
+  // calculate C* and f*
+  // C* is actually floor(C*) in this case
+  // C* and f* need shifting and masking, as shown by
+  // shiftright128[] and maskhigh128[]
+  // 1 <= x <= 34
+  // kx = 10^(-x) = ten2mk128[ind - 1]
+  // C* = C1 * 10^(-x)
+  // the approximation of 10^(-x) was rounded up to 118 bits
+  __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+  if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+    res.w[1] = P256.w[3];
+    res.w[0] = P256.w[2];
+    // if negative, the truncated value is already the correct result
+    if (!x_sign) {	// if positive
+      // redundant fstar.w[3] = 0;
+      // redundant fstar.w[2] = 0;
+      // redundant fstar.w[1] = P256.w[1]; 
+      // redundant fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if ((P256.w[1] > ten2mk128[ind - 1].w[1])
+	  || (P256.w[1] == ten2mk128[ind - 1].w[1]
+	      && (P256.w[0] >= ten2mk128[ind - 1].w[0]))) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+    shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+    res.w[1] = (P256.w[3] >> shift);
+    res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+    // if negative, the truncated value is already the correct result
+    if (!x_sign) {	// if positive
+      // redundant fstar.w[3] = 0;
+      fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[2] || fstar.w[1] > ten2mk128[ind - 1].w[1] ||
+	  (fstar.w[1] == ten2mk128[ind - 1].w[1] &&
+	   fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  } else {	// 22 <= ind - 1 <= 33
+    shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+    res.w[1] = 0;
+    res.w[0] = P256.w[3] >> shift;
+    // if negative, the truncated value is already the correct result
+    if (!x_sign) {	// if positive
+      fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+      fstar.w[2] = P256.w[2];
+      fstar.w[1] = P256.w[1];
+      fstar.w[0] = P256.w[0];
+      // fraction f* > 10^(-x) <=> inexact
+      // f* is in the right position to be compared with 
+      // 10^(-x) from ten2mk128[]
+      if (fstar.w[3] || fstar.w[2]
+	  || fstar.w[1] > ten2mk128[ind - 1].w[1]
+	  || (fstar.w[1] == ten2mk128[ind - 1].w[1]
+	      && fstar.w[0] >= ten2mk128[ind - 1].w[0])) {
+	if (++res.w[0] == 0) {
+	  res.w[1]++;
+	}
+      }
+    }
+  }
+  res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+  BID_RETURN (res);
+} else {	// if exp < 0 and q + exp <= 0
+  if (x_sign) {	// negative rounds up to -0.0
+    res.w[1] = 0xb040000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// positive rpunds up to +1.0
+    res.w[1] = 0x3040000000000000ull;
+    res.w[0] = 0x0000000000000001ull;
+  }
+  BID_RETURN (res);
+}
+}
+
+/*****************************************************************************
+ *  BID128_round_integral_zero
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND (bid128_round_integral_zero, x)
+
+     UINT128 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo
+  // (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1;
+  // UINT128 res is C* at first - represents up to 34 decimal digits ~
+  // 113 bits
+     UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  // if x = NaN, then res = Q (x)
+  // check first for non-canonical NaN payload
+  if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+      (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+       (x.w[0] > 0x38c15b09ffffffffull))) {
+    x.w[1] = x.w[1] & 0xffffc00000000000ull;
+    x.w[0] = 0x0ull;
+  }
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return quiet (x)
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+    res.w[0] = x.w[0];
+  } else {	// x is QNaN
+    // return x
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+    res.w[0] = x.w[0];
+  }
+  BID_RETURN (res)
+} else {	// x is not a NaN, so it must be infinity
+  if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+    // return +inf
+    res.w[1] = 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// x is -inf 
+    // return -inf
+    res.w[1] = 0xf800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+  // if (exp <= -p) return -0.0 or +0.0
+if (x_exp <= 0x2ffc000000000000ull) {	// 0x2ffc000000000000ull == -34
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // q = nr. of decimal digits in x
+  // determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+      (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+       C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+} else if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+  // need to shift right -exp digits from the coefficient; the exp will be 0
+  ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+  // (number of digits to be chopped off)
+  // chop off ind digits from the lower part of C1 
+  // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+  // FOR ROUND_TO_ZERO, WE DON'T NEED TO ADD 1/2 ULP
+  // FOR ROUND_TO_POSITIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF POSITIVE
+  // FOR ROUND_TO_NEGATIVE_INFINITY, WE TRUNCATE, THEN ADD 1 IF NEGATIVE
+  //tmp64 = C1.w[0];
+  // if (ind <= 19) {
+  //   C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+  // } else {
+  //   C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+  //   C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+  // }
+  // if (C1.w[0] < tmp64) C1.w[1]++;  
+  // if carry-out from C1.w[0], increment C1.w[1]
+  // calculate C* and f*
+  // C* is actually floor(C*) in this case
+  // C* and f* need shifting and masking, as shown by
+  // shiftright128[] and maskhigh128[]
+  // 1 <= x <= 34
+  // kx = 10^(-x) = ten2mk128[ind - 1]
+  // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+  // the approximation of 10^(-x) was rounded up to 118 bits
+  __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+  if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+    res.w[1] = P256.w[3];
+    res.w[0] = P256.w[2];
+  } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+    shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+    res.w[1] = (P256.w[3] >> shift);
+    res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+  } else {	// 22 <= ind - 1 <= 33
+    shift = shiftright128[ind - 1] - 64;	// 2 <= shift <= 38
+    res.w[1] = 0;
+    res.w[0] = P256.w[3] >> shift;
+  }
+  res.w[1] = x_sign | 0x3040000000000000ull | res.w[1];
+  BID_RETURN (res);
+} else {	// if exp < 0 and q + exp <= 0 the result is +0 or -0
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+}
+
+/*****************************************************************************
+ *  BID128_round_integral_nearest_away
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND (bid128_round_integral_nearest_away, x)
+
+     UINT128 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo 
+  // (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1;
+  // UINT128 res is C* at first - represents up to 34 decimal digits ~ 
+  // 113 bits
+  // UINT256 fstar;
+     UINT256 P256;
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  // if x = NaN, then res = Q (x)
+  // check first for non-canonical NaN payload
+  if (((x.w[1] & 0x00003fffffffffffull) > 0x0000314dc6448d93ull) ||
+      (((x.w[1] & 0x00003fffffffffffull) == 0x0000314dc6448d93ull) &&
+       (x.w[0] > 0x38c15b09ffffffffull))) {
+    x.w[1] = x.w[1] & 0xffffc00000000000ull;
+    x.w[0] = 0x0ull;
+  }
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return quiet (x)
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out also G[6]-G[16]
+    res.w[0] = x.w[0];
+  } else {	// x is QNaN
+    // return x
+    res.w[1] = x.w[1] & 0xfc003fffffffffffull;	// clear out G[6]-G[16]
+    res.w[0] = x.w[0];
+  }
+  BID_RETURN (res)
+} else {	// x is not a NaN, so it must be infinity
+  if ((x.w[1] & MASK_SIGN) == 0x0ull) {	// x is +inf
+    // return +inf
+    res.w[1] = 0x7800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  } else {	// x is -inf 
+    // return -inf
+    res.w[1] = 0xf800000000000000ull;
+    res.w[0] = 0x0000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for non-canonical values (treated as zero)
+if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) {	// G0_G1=11
+  // non-canonical
+  x_exp = (x.w[1] << 2) & MASK_EXP;	// biased and shifted left 49 bits
+  C1.w[1] = 0;	// significand high
+  C1.w[0] = 0;	// significand low
+} else {	// G0_G1 != 11
+  x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bits
+  if (C1.w[1] > 0x0001ed09bead87c0ull ||
+      (C1.w[1] == 0x0001ed09bead87c0ull
+       && C1.w[0] > 0x378d8e63ffffffffull)) {
+    // x is non-canonical if coefficient is larger than 10^34 -1
+    C1.w[1] = 0;
+    C1.w[0] = 0;
+  } else {	// canonical
+    ;
+  }
+}
+
+  // test for input equal to zero
+if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  // return 0 preserving the sign bit and the preferred exponent
+  // of MAX(Q(x), 0)
+  if (x_exp <= (0x1820ull << 49)) {
+    res.w[1] = (x.w[1] & 0x8000000000000000ull) | 0x3040000000000000ull;
+  } else {
+    res.w[1] = x_sign | x_exp;
+  }
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // x is not special and is not zero
+
+  // if (exp <= -(p+1)) return 0.0
+if (x_exp <= 0x2ffa000000000000ull) {	// 0x2ffa000000000000ull == -35
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+if (C1.w[1] == 0) {
+  if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) (C1.w[0]);	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1.w[0];	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+} else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+  tmp1.d = (double) C1.w[1];	// exact conversion
+  x_nr_bits =
+    65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+}
+
+q = nr_digits[x_nr_bits - 1].digits;
+if (q == 0) {
+  q = nr_digits[x_nr_bits - 1].digits1;
+  if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi ||
+      (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi &&
+       C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+    q++;
+}
+exp = (x_exp >> 49) - 6176;
+if (exp >= 0) {	// -exp <= 0
+  // the argument is an integer already
+  res.w[1] = x.w[1];
+  res.w[0] = x.w[0];
+  BID_RETURN (res);
+} else if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+  // need to shift right -exp digits from the coefficient; the exp will be 0
+  ind = -exp;	// 1 <= ind <= 34; ind is a synonym for 'x'
+  // chop off ind digits from the lower part of C1 
+  // C1 = C1 + 1/2 * 10^x where the result C1 fits in 127 bits
+  tmp64 = C1.w[0];
+  if (ind <= 19) {
+    C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+  } else {
+    C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+    C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+  }
+  if (C1.w[0] < tmp64)
+    C1.w[1]++;
+  // calculate C* and f*
+  // C* is actually floor(C*) in this case
+  // C* and f* need shifting and masking, as shown by
+  // shiftright128[] and maskhigh128[]
+  // 1 <= x <= 34
+  // kx = 10^(-x) = ten2mk128[ind - 1]
+  // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+  // the approximation of 10^(-x) was rounded up to 118 bits
+  __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+  // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+  // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+  // if (0 < f* < 10^(-x)) then the result is a midpoint
+  //   if floor(C*) is even then C* = floor(C*) - logical right
+  //       shift; C* has p decimal digits, correct by Prop. 1)
+  //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+  //       shift; C* has p decimal digits, correct by Pr. 1)
+  // else
+  //   C* = floor(C*) (logical right shift; C has p decimal digits,
+  //       correct by Property 1)
+  // n = C* * 10^(e+x)
+
+  // shift right C* by Ex-128 = shiftright128[ind]
+  if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+    res.w[1] = P256.w[3];
+    res.w[0] = P256.w[2];
+  } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+    shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+    res.w[0] = (P256.w[3] << (64 - shift)) | (P256.w[2] >> shift);
+    res.w[1] = (P256.w[3] >> shift);
+  } else {	// 22 <= ind - 1 <= 33
+    shift = shiftright128[ind - 1];	// 2 <= shift <= 38
+    res.w[1] = 0;
+    res.w[0] = (P256.w[3] >> (shift - 64));	// 2 <= shift - 64 <= 38
+  }
+  // if the result was a midpoint, it was already rounded away from zero
+  res.w[1] |= x_sign | 0x3040000000000000ull;
+  BID_RETURN (res);
+} else {	// if ((q + exp) < 0) <=> q < -exp
+  // the result is +0 or -0
+  res.w[1] = x_sign | 0x3040000000000000ull;
+  res.w[0] = 0x0000000000000000ull;
+  BID_RETURN (res);
+}
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_scalb.c b/gcc-4.9/libgcc/config/libbid/bid128_scalb.c
new file mode 100644
index 000000000..eaca2d065
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_scalb.c
@@ -0,0 +1,96 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+#define DECIMAL_EXPONENT_BIAS_128 6176
+#define MAX_DECIMAL_EXPONENT_128  12287
+
+
+
+BID128_FUNCTION_ARG128_ARGTYPE2 (bid128_scalb, x, int, n)
+
+     UINT128 CX, CX2, CX8, res;
+     SINT64 exp64;
+     UINT64 sign_x;
+     int exponent_x, rmode;
+
+  // unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+    // x is Inf. or NaN or 0
+#ifdef SET_STATUS_FLAGS
+if ((x.w[1] & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+res.w[1] = CX.w[1] & QUIET_MASK64;
+res.w[0] = CX.w[0];
+if (!CX.w[1]) {
+       exp64 = (SINT64) exponent_x + (SINT64) n;
+	   if(exp64<0) exp64=0;
+	   if(exp64>MAX_DECIMAL_EXPONENT_128) exp64=MAX_DECIMAL_EXPONENT_128;
+       exponent_x = exp64;
+  get_BID128_very_fast (&res, sign_x, exponent_x, CX);
+}
+BID_RETURN (res);
+}
+
+exp64 = (SINT64) exponent_x + (SINT64) n;
+exponent_x = exp64;
+
+if ((UINT32) exponent_x <= MAX_DECIMAL_EXPONENT_128) {
+  get_BID128_very_fast (&res, sign_x, exponent_x, CX);
+  BID_RETURN (res);
+}
+  // check for overflow
+if (exp64 > MAX_DECIMAL_EXPONENT_128) {
+  if (CX.w[1] < 0x314dc6448d93ull) {
+    // try to normalize coefficient
+    do {
+      CX8.w[1] = (CX.w[1] << 3) | (CX.w[0] >> 61);
+      CX8.w[0] = CX.w[0] << 3;
+      CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+      CX2.w[0] = CX.w[0] << 1;
+      __add_128_128 (CX, CX2, CX8);
+
+      exponent_x--;
+      exp64--;
+    }
+    while (CX.w[1] < 0x314dc6448d93ull
+	   && exp64 > MAX_DECIMAL_EXPONENT_128);
+
+  }
+  if (exp64 <= MAX_DECIMAL_EXPONENT_128) {
+    get_BID128_very_fast (&res, sign_x, exponent_x, CX);
+    BID_RETURN (res);
+  } else
+    exponent_x = 0x7fffffff;	// overflow
+}
+  // exponent < 0
+  // the BID pack routine will round the coefficient
+rmode = rnd_mode;
+get_BID128 (&res, sign_x, exponent_x, CX, (unsigned int *) &rmode,
+	    pfpsf);
+BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_sqrt.c b/gcc-4.9/libgcc/config/libbid/bid128_sqrt.c
new file mode 100644
index 000000000..d91428cc0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_sqrt.c
@@ -0,0 +1,564 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+#include "bid_sqrt_macros.h"
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+#include <fenv.h>
+
+#define FE_ALL_FLAGS FE_INVALID|FE_DIVBYZERO|FE_OVERFLOW|FE_UNDERFLOW|FE_INEXACT
+#endif
+
+BID128_FUNCTION_ARG1 (bid128_sqrt, x)
+
+     UINT256 M256, C256, C4, C8;
+     UINT128 CX, CX1, CX2, A10, S2, T128, TP128, CS, CSM, res;
+     UINT64 sign_x, Carry;
+     SINT64 D;
+     int_float fx, f64;
+     int exponent_x, bin_expon_cx;
+     int digits, scale, exponent_q;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+  // unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+res.w[1] = CX.w[1];
+res.w[0] = CX.w[0];
+    // NaN ?
+if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[1] = CX.w[1] & QUIET_MASK64;
+  BID_RETURN (res);
+}
+    // x is Infinity?
+if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  res.w[1] = CX.w[1];
+  if (sign_x) {
+    // -Inf, return NaN
+    res.w[1] = 0x7c00000000000000ull;
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  }
+  BID_RETURN (res);
+}
+    // x is 0 otherwise
+
+res.w[1] =
+  sign_x |
+  ((((UINT64) (exponent_x + DECIMAL_EXPONENT_BIAS_128)) >> 1) << 49);
+res.w[0] = 0;
+BID_RETURN (res);
+}
+if (sign_x) {
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  // 2^64
+f64.i = 0x5f800000;
+
+  // fx ~ CX
+fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+digits = estimate_decimal_digits[bin_expon_cx];
+
+A10 = CX;
+if (exponent_x & 1) {
+  A10.w[1] = (CX.w[1] << 3) | (CX.w[0] >> 61);
+  A10.w[0] = CX.w[0] << 3;
+  CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+  CX2.w[0] = CX.w[0] << 1;
+  __add_128_128 (A10, A10, CX2);
+}
+
+CS.w[0] = short_sqrt128 (A10);
+CS.w[1] = 0;
+  // check for exact result
+if (CS.w[0] * CS.w[0] == A10.w[0]) {
+  __mul_64x64_to_128_fast (S2, CS.w[0], CS.w[0]);
+  if (S2.w[1] == A10.w[1])	// && S2.w[0]==A10.w[0])
+  {
+    get_BID128_very_fast (&res, 0,
+			  (exponent_x +
+			   DECIMAL_EXPONENT_BIAS_128) >> 1, CS);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+}
+  // get number of digits in CX
+D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+if (D > 0
+    || (!D && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+  digits++;
+
+  // if exponent is odd, scale coefficient by 10
+scale = 67 - digits;
+exponent_q = exponent_x - scale;
+scale += (exponent_q & 1);	// exp. bias is even
+
+if (scale > 38) {
+  T128 = power10_table_128[scale - 37];
+  __mul_128x128_low (CX1, CX, T128);
+
+  TP128 = power10_table_128[37];
+  __mul_128x128_to_256 (C256, CX1, TP128);
+} else {
+  T128 = power10_table_128[scale];
+  __mul_128x128_to_256 (C256, CX, T128);
+}
+
+
+  // 4*C256
+C4.w[3] = (C256.w[3] << 2) | (C256.w[2] >> 62);
+C4.w[2] = (C256.w[2] << 2) | (C256.w[1] >> 62);
+C4.w[1] = (C256.w[1] << 2) | (C256.w[0] >> 62);
+C4.w[0] = C256.w[0] << 2;
+
+long_sqrt128 (&CS, C256);
+
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+if (!((rnd_mode) & 3)) {
+#endif
+#endif
+  // compare to midpoints
+  CSM.w[1] = (CS.w[1] << 1) | (CS.w[0] >> 63);
+  CSM.w[0] = (CS.w[0] + CS.w[0]) | 1;
+  // CSM^2
+  //__mul_128x128_to_256(M256, CSM, CSM);
+  __sqr128_to_256 (M256, CSM);
+
+  if (C4.w[3] > M256.w[3]
+      || (C4.w[3] == M256.w[3]
+	  && (C4.w[2] > M256.w[2]
+	      || (C4.w[2] == M256.w[2]
+		  && (C4.w[1] > M256.w[1]
+		      || (C4.w[1] == M256.w[1]
+			  && C4.w[0] > M256.w[0])))))) {
+    // round up
+    CS.w[0]++;
+    if (!CS.w[0])
+      CS.w[1]++;
+  } else {
+    C8.w[1] = (CS.w[1] << 3) | (CS.w[0] >> 61);
+    C8.w[0] = CS.w[0] << 3;
+    // M256 - 8*CSM
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __sub_borrow_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __sub_borrow_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] - Carry;
+
+    // if CSM' > C256, round up
+    if (M256.w[3] > C4.w[3]
+	|| (M256.w[3] == C4.w[3]
+	    && (M256.w[2] > C4.w[2]
+		|| (M256.w[2] == C4.w[2]
+		    && (M256.w[1] > C4.w[1]
+			|| (M256.w[1] == C4.w[1]
+			    && M256.w[0] > C4.w[0])))))) {
+      // round down
+      if (!CS.w[0])
+	CS.w[1]--;
+      CS.w[0]--;
+    }
+  }
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+} else {
+  __sqr128_to_256 (M256, CS);
+  C8.w[1] = (CS.w[1] << 1) | (CS.w[0] >> 63);
+  C8.w[0] = CS.w[0] << 1;
+  if (M256.w[3] > C256.w[3]
+      || (M256.w[3] == C256.w[3]
+	  && (M256.w[2] > C256.w[2]
+	      || (M256.w[2] == C256.w[2]
+		  && (M256.w[1] > C256.w[1]
+		      || (M256.w[1] == C256.w[1]
+			  && M256.w[0] > C256.w[0])))))) {
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __sub_borrow_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __sub_borrow_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] - Carry;
+    M256.w[0]++;
+    if (!M256.w[0]) {
+      M256.w[1]++;
+      if (!M256.w[1]) {
+	M256.w[2]++;
+	if (!M256.w[2])
+	  M256.w[3]++;
+      }
+    }
+
+    if (!CS.w[0])
+      CS.w[1]--;
+    CS.w[0]--;
+
+    if (M256.w[3] > C256.w[3]
+	|| (M256.w[3] == C256.w[3]
+	    && (M256.w[2] > C256.w[2]
+		|| (M256.w[2] == C256.w[2]
+		    && (M256.w[1] > C256.w[1]
+			|| (M256.w[1] == C256.w[1]
+			    && M256.w[0] > C256.w[0])))))) {
+
+      if (!CS.w[0])
+	CS.w[1]--;
+      CS.w[0]--;
+    }
+  }
+
+  else {
+    __add_carry_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __add_carry_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __add_carry_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] + Carry;
+    M256.w[0]++;
+    if (!M256.w[0]) {
+      M256.w[1]++;
+      if (!M256.w[1]) {
+	M256.w[2]++;
+	if (!M256.w[2])
+	  M256.w[3]++;
+      }
+    }
+    if (M256.w[3] < C256.w[3]
+	|| (M256.w[3] == C256.w[3]
+	    && (M256.w[2] < C256.w[2]
+		|| (M256.w[2] == C256.w[2]
+		    && (M256.w[1] < C256.w[1]
+			|| (M256.w[1] == C256.w[1]
+			    && M256.w[0] <= C256.w[0])))))) {
+
+      CS.w[0]++;
+      if (!CS.w[0])
+	CS.w[1]++;
+    }
+  }
+  // RU?
+  if ((rnd_mode) == ROUNDING_UP) {
+    CS.w[0]++;
+    if (!CS.w[0])
+      CS.w[1]++;
+  }
+
+}
+#endif
+#endif
+
+#ifdef SET_STATUS_FLAGS
+__set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+get_BID128_fast (&res, 0,
+		 (exponent_q + DECIMAL_EXPONENT_BIAS_128) >> 1, CS);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+}
+
+
+
+BID128_FUNCTION_ARGTYPE1 (bid128d_sqrt, UINT64, x)
+
+     UINT256 M256, C256, C4, C8;
+     UINT128 CX, CX1, CX2, A10, S2, T128, TP128, CS, CSM, res;
+     UINT64 sign_x, Carry;
+     SINT64 D;
+     int_float fx, f64;
+     int exponent_x, bin_expon_cx;
+     int digits, scale, exponent_q;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+     fexcept_t binaryflags = 0;
+#endif
+
+	// unpack arguments, check for NaN or Infinity
+   // unpack arguments, check for NaN or Infinity
+CX.w[1] = 0;
+if (!unpack_BID64 (&sign_x, &exponent_x, &CX.w[0], x)) {
+res.w[1] = CX.w[0];
+res.w[0] = 0;
+	   // NaN ?
+if ((x & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (CX.w[0] & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((CX.w[0]) & 0xfc00000000000000ull);
+  BID_RETURN (res);
+}
+	   // x is Infinity?
+if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+  if (sign_x) {
+    // -Inf, return NaN
+    res.w[1] = 0x7c00000000000000ull;
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  }
+  BID_RETURN (res);
+}
+	   // x is 0 otherwise
+
+exponent_x =
+  exponent_x - DECIMAL_EXPONENT_BIAS + DECIMAL_EXPONENT_BIAS_128;
+res.w[1] =
+  sign_x | ((((UINT64) (exponent_x + DECIMAL_EXPONENT_BIAS_128)) >> 1)
+	    << 49);
+res.w[0] = 0;
+BID_RETURN (res);
+}
+if (sign_x) {
+  res.w[1] = 0x7c00000000000000ull;
+  res.w[0] = 0;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+exponent_x =
+  exponent_x - DECIMAL_EXPONENT_BIAS + DECIMAL_EXPONENT_BIAS_128;
+
+	   // 2^64
+f64.i = 0x5f800000;
+
+	   // fx ~ CX
+fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+digits = estimate_decimal_digits[bin_expon_cx];
+
+A10 = CX;
+if (exponent_x & 1) {
+  A10.w[1] = (CX.w[1] << 3) | (CX.w[0] >> 61);
+  A10.w[0] = CX.w[0] << 3;
+  CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+  CX2.w[0] = CX.w[0] << 1;
+  __add_128_128 (A10, A10, CX2);
+}
+
+CS.w[0] = short_sqrt128 (A10);
+CS.w[1] = 0;
+	   // check for exact result
+if (CS.w[0] * CS.w[0] == A10.w[0]) {
+  __mul_64x64_to_128_fast (S2, CS.w[0], CS.w[0]);
+  if (S2.w[1] == A10.w[1]) {
+    get_BID128_very_fast (&res, 0,
+			  (exponent_x + DECIMAL_EXPONENT_BIAS_128) >> 1,
+			  CS);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+}
+	   // get number of digits in CX
+D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+if (D > 0
+    || (!D && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+  digits++;
+
+		// if exponent is odd, scale coefficient by 10
+scale = 67 - digits;
+exponent_q = exponent_x - scale;
+scale += (exponent_q & 1);	// exp. bias is even
+
+if (scale > 38) {
+  T128 = power10_table_128[scale - 37];
+  __mul_128x128_low (CX1, CX, T128);
+
+  TP128 = power10_table_128[37];
+  __mul_128x128_to_256 (C256, CX1, TP128);
+} else {
+  T128 = power10_table_128[scale];
+  __mul_128x128_to_256 (C256, CX, T128);
+}
+
+
+	   // 4*C256
+C4.w[3] = (C256.w[3] << 2) | (C256.w[2] >> 62);
+C4.w[2] = (C256.w[2] << 2) | (C256.w[1] >> 62);
+C4.w[1] = (C256.w[1] << 2) | (C256.w[0] >> 62);
+C4.w[0] = C256.w[0] << 2;
+
+long_sqrt128 (&CS, C256);
+
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+if (!((rnd_mode) & 3)) {
+#endif
+#endif
+  // compare to midpoints
+  CSM.w[1] = (CS.w[1] << 1) | (CS.w[0] >> 63);
+  CSM.w[0] = (CS.w[0] + CS.w[0]) | 1;
+  // CSM^2
+  //__mul_128x128_to_256(M256, CSM, CSM);
+  __sqr128_to_256 (M256, CSM);
+
+  if (C4.w[3] > M256.w[3]
+      || (C4.w[3] == M256.w[3]
+	  && (C4.w[2] > M256.w[2]
+	      || (C4.w[2] == M256.w[2]
+		  && (C4.w[1] > M256.w[1]
+		      || (C4.w[1] == M256.w[1]
+			  && C4.w[0] > M256.w[0])))))) {
+    // round up
+    CS.w[0]++;
+    if (!CS.w[0])
+      CS.w[1]++;
+  } else {
+    C8.w[1] = (CS.w[1] << 3) | (CS.w[0] >> 61);
+    C8.w[0] = CS.w[0] << 3;
+    // M256 - 8*CSM
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __sub_borrow_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __sub_borrow_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] - Carry;
+
+    // if CSM' > C256, round up
+    if (M256.w[3] > C4.w[3]
+	|| (M256.w[3] == C4.w[3]
+	    && (M256.w[2] > C4.w[2]
+		|| (M256.w[2] == C4.w[2]
+		    && (M256.w[1] > C4.w[1]
+			|| (M256.w[1] == C4.w[1]
+			    && M256.w[0] > C4.w[0])))))) {
+      // round down
+      if (!CS.w[0])
+	CS.w[1]--;
+      CS.w[0]--;
+    }
+  }
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+} else {
+  __sqr128_to_256 (M256, CS);
+  C8.w[1] = (CS.w[1] << 1) | (CS.w[0] >> 63);
+  C8.w[0] = CS.w[0] << 1;
+  if (M256.w[3] > C256.w[3]
+      || (M256.w[3] == C256.w[3]
+	  && (M256.w[2] > C256.w[2]
+	      || (M256.w[2] == C256.w[2]
+		  && (M256.w[1] > C256.w[1]
+		      || (M256.w[1] == C256.w[1]
+			  && M256.w[0] > C256.w[0])))))) {
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __sub_borrow_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __sub_borrow_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] - Carry;
+    M256.w[0]++;
+    if (!M256.w[0]) {
+      M256.w[1]++;
+      if (!M256.w[1]) {
+	M256.w[2]++;
+	if (!M256.w[2])
+	  M256.w[3]++;
+      }
+    }
+
+    if (!CS.w[0])
+      CS.w[1]--;
+    CS.w[0]--;
+
+    if (M256.w[3] > C256.w[3]
+	|| (M256.w[3] == C256.w[3]
+	    && (M256.w[2] > C256.w[2]
+		|| (M256.w[2] == C256.w[2]
+		    && (M256.w[1] > C256.w[1]
+			|| (M256.w[1] == C256.w[1]
+			    && M256.w[0] > C256.w[0])))))) {
+
+      if (!CS.w[0])
+	CS.w[1]--;
+      CS.w[0]--;
+    }
+  }
+
+  else {
+    __add_carry_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    __add_carry_in_out (M256.w[1], Carry, M256.w[1], C8.w[1], Carry);
+    __add_carry_in_out (M256.w[2], Carry, M256.w[2], 0, Carry);
+    M256.w[3] = M256.w[3] + Carry;
+    M256.w[0]++;
+    if (!M256.w[0]) {
+      M256.w[1]++;
+      if (!M256.w[1]) {
+	M256.w[2]++;
+	if (!M256.w[2])
+	  M256.w[3]++;
+      }
+    }
+    if (M256.w[3] < C256.w[3]
+	|| (M256.w[3] == C256.w[3]
+	    && (M256.w[2] < C256.w[2]
+		|| (M256.w[2] == C256.w[2]
+		    && (M256.w[1] < C256.w[1]
+			|| (M256.w[1] == C256.w[1]
+			    && M256.w[0] <= C256.w[0])))))) {
+
+      CS.w[0]++;
+      if (!CS.w[0])
+	CS.w[1]++;
+    }
+  }
+  // RU?
+  if ((rnd_mode) == ROUNDING_UP) {
+    CS.w[0]++;
+    if (!CS.w[0])
+      CS.w[1]++;
+  }
+
+}
+#endif
+#endif
+
+#ifdef SET_STATUS_FLAGS
+__set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+get_BID128_fast (&res, 0, (exponent_q + DECIMAL_EXPONENT_BIAS_128) >> 1,
+		 CS);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_string.c b/gcc-4.9/libgcc/config/libbid/bid128_string.c
new file mode 100644
index 000000000..68f2a3d8b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_string.c
@@ -0,0 +1,672 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID128_to_string
+ ****************************************************************************/
+
+#define BID_128RES
+#include <stdio.h>
+#include "bid_internal.h"
+#include "bid128_2_str.h"
+#include "bid128_2_str_macros.h"
+
+extern int bid128_coeff_2_string (UINT64 X_hi, UINT64 X_lo,
+				  char *char_ptr);
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid128_to_string (char *str,
+		  UINT128 *
+		  px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		  _EXC_INFO_PARAM) {
+  UINT128 x;
+#else
+
+void
+bid128_to_string (char *str, UINT128 x 
+    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp; 	// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  int ind;
+  UINT128 C1;
+  unsigned int k = 0; // pointer in the string
+  unsigned int d0, d123;
+  UINT64 HI_18Dig, LO_18Dig, Tmp;
+  UINT32 MiDi[12], *ptr;
+  char *c_ptr_start, *c_ptr;
+  int midi_ind, k_lcv, len;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  x = *px;
+#endif
+
+  BID_SWAP128(x);
+  // check for NaN or Infinity
+  if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+    if ((x.w[1] & MASK_NAN) == MASK_NAN) { // x is NAN
+      if ((x.w[1] & MASK_SNAN) == MASK_SNAN) { // x is SNAN
+	// set invalid flag
+    str[0] = ((SINT64)x.w[1]<0)? '-':'+'; 
+	str[1] = 'S';
+	str[2] = 'N';
+	str[3] = 'a';
+	str[4] = 'N';
+	str[5] = '\0';
+      } else { // x is QNaN
+    str[0] = ((SINT64)x.w[1]<0)? '-':'+'; 
+	str[1] = 'Q';
+	str[2] = 'N';
+	str[3] = 'a';
+	str[4] = 'N';
+	str[5] = '\0';
+      }
+    } else { // x is not a NaN, so it must be infinity
+      if ((x.w[1] & MASK_SIGN) == 0x0ull) { // x is +inf
+	str[0] = '+';
+	str[1] = 'I';
+	str[2] = 'n';
+	str[3] = 'f';
+	str[4] = '\0';
+      } else { // x is -inf 
+	str[0] = '-';
+	str[1] = 'I';
+	str[2] = 'n';
+	str[3] = 'f';
+	str[4] = '\0';
+      }
+    }
+    return;
+  } else if (((x.w[1] & MASK_COEFF) == 0x0ull) && (x.w[0] == 0x0ull)) {
+    // x is 0
+    len = 0;
+
+    //determine if +/-
+    if (x.w[1] & MASK_SIGN)
+      str[len++] = '-';
+    else
+      str[len++] = '+';
+    str[len++] = '0';
+    str[len++] = 'E';
+
+    // extract the exponent and print
+    exp = (int) (((x.w[1] & MASK_EXP) >> 49) - 6176);
+	if(exp > (((0x5ffe)>>1) - (6176))) {
+		exp = (int) ((((x.w[1]<<2) & MASK_EXP) >> 49) - 6176);
+	}
+    if (exp >= 0) {
+      str[len++] = '+';
+      len += sprintf (str + len, "%u", exp);// should not use sprintf (should 
+      // use sophisticated algorithm, since we know range of exp is limited)
+      str[len++] = '\0';
+    } else {
+      len += sprintf (str + len, "%d", exp);// should not use sprintf (should 
+      // use sophisticated algorithm, since we know range of exp is limited)
+      str[len++] = '\0';
+    }
+    return;
+  } else { // x is not special and is not zero
+    // unpack x
+    x_sign = x.w[1] & MASK_SIGN;// 0 for positive, MASK_SIGN for negative
+    x_exp = x.w[1] & MASK_EXP;// biased and shifted left 49 bit positions
+    if ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)
+       x_exp = (x.w[1]<<2) & MASK_EXP;// biased and shifted left 49 bit positions
+    C1.w[1] = x.w[1] & MASK_COEFF;
+    C1.w[0] = x.w[0];
+    exp = (x_exp >> 49) - 6176;
+
+    // determine sign's representation as a char
+    if (x_sign)
+      str[k++] = '-';// negative number
+    else
+      str[k++] = '+';// positive number
+
+    // determine coefficient's representation as a decimal string
+
+    // if zero or non-canonical, set coefficient to '0'
+    if ((C1.w[1] > 0x0001ed09bead87c0ull) || 
+        (C1.w[1] == 0x0001ed09bead87c0ull && 
+        (C1.w[0] > 0x378d8e63ffffffffull)) || 
+        ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull) || 
+        ((C1.w[1] == 0) && (C1.w[0] == 0))) {
+      str[k++] = '0';
+    } else {
+      /* ****************************************************
+         This takes a bid coefficient in C1.w[1],C1.w[0] 
+         and put the converted character sequence at location 
+         starting at &(str[k]). The function returns the number
+         of MiDi returned. Note that the character sequence 
+         does not have leading zeros EXCEPT when the input is of
+         zero value. It will then output 1 character '0'
+         The algorithm essentailly tries first to get a sequence of
+         Millenial Digits "MiDi" and then uses table lookup to get the
+         character strings of these MiDis.
+         **************************************************** */
+      /* Algorithm first decompose possibly 34 digits in hi and lo
+         18 digits. (The high can have at most 16 digits). It then
+         uses macro that handle 18 digit portions.
+         The first step is to get hi and lo such that
+         2^(64) C1.w[1] + C1.w[0] = hi * 10^18  + lo,   0 <= lo < 10^18.
+         We use a table lookup method to obtain the hi and lo 18 digits.
+         [C1.w[1],C1.w[0]] = c_8 2^(107) + c_7 2^(101) + ... + c_0 2^(59) + d
+         where 0 <= d < 2^59 and each c_j has 6 bits. Because d fits in
+         18 digits,  we set hi = 0, and lo = d to begin with.
+         We then retrieve from a table, for j = 0, 1, ..., 8
+         that gives us A and B where c_j 2^(59+6j) = A * 10^18 + B.
+         hi += A ; lo += B; After each accumulation into lo, we normalize 
+         immediately. So at the end, we have the decomposition as we need. */
+
+      Tmp = C1.w[0] >> 59;
+      LO_18Dig = (C1.w[0] << 5) >> 5;
+      Tmp += (C1.w[1] << 5);
+      HI_18Dig = 0;
+      k_lcv = 0;
+      // Tmp = {C1.w[1]{49:0}, C1.w[0]{63:59}}
+      // Lo_18Dig = {C1.w[0]{58:0}}
+
+      while (Tmp) {
+	midi_ind = (int) (Tmp & 0x000000000000003FLL);
+	midi_ind <<= 1;
+	Tmp >>= 6;
+	HI_18Dig += mod10_18_tbl[k_lcv][midi_ind++];
+	LO_18Dig += mod10_18_tbl[k_lcv++][midi_ind];
+	__L0_Normalize_10to18 (HI_18Dig, LO_18Dig);
+      }
+      ptr = MiDi;
+      if (HI_18Dig == 0LL) {
+	__L1_Split_MiDi_6_Lead (LO_18Dig, ptr);
+      } else {
+	__L1_Split_MiDi_6_Lead (HI_18Dig, ptr);
+	__L1_Split_MiDi_6 (LO_18Dig, ptr);
+      }
+      len = ptr - MiDi;
+      c_ptr_start = &(str[k]);
+      c_ptr = c_ptr_start;
+
+      /* now convert the MiDi into character strings */
+      __L0_MiDi2Str_Lead (MiDi[0], c_ptr);
+      for (k_lcv = 1; k_lcv < len; k_lcv++) {
+	__L0_MiDi2Str (MiDi[k_lcv], c_ptr);
+      }
+      k = k + (c_ptr - c_ptr_start);
+    }
+
+    // print E and sign of exponent
+    str[k++] = 'E';
+    if (exp < 0) {
+      exp = -exp;
+      str[k++] = '-';
+    } else {
+      str[k++] = '+';
+    }
+
+    // determine exponent's representation as a decimal string
+    // d0 = exp / 1000;
+    // Use Property 1
+    d0 = (exp * 0x418a) >> 24;// 0x418a * 2^-24 = (10^(-3))RP,15
+    d123 = exp - 1000 * d0;
+
+    if (d0) { // 1000 <= exp <= 6144 => 4 digits to return
+      str[k++] = d0 + 0x30;// ASCII for decimal digit d0
+      ind = 3 * d123;
+      str[k++] = char_table3[ind];
+      str[k++] = char_table3[ind + 1];
+      str[k++] = char_table3[ind + 2];
+    } else { // 0 <= exp <= 999 => d0 = 0
+      if (d123 < 10) { // 0 <= exp <= 9 => 1 digit to return
+	str[k++] = d123 + 0x30;// ASCII
+      } else if (d123 < 100) { // 10 <= exp <= 99 => 2 digits to return
+	ind = 2 * (d123 - 10);
+	str[k++] = char_table2[ind];
+	str[k++] = char_table2[ind + 1];
+      } else { // 100 <= exp <= 999 => 3 digits to return
+	ind = 3 * d123;
+	str[k++] = char_table3[ind];
+	str[k++] = char_table3[ind + 1];
+	str[k++] = char_table3[ind + 2];
+      }
+    }
+    str[k] = '\0';
+
+  }
+  return;
+
+}
+
+
+#define MAX_FORMAT_DIGITS_128   34
+#define MAX_STRING_DIGITS_128   100
+#define MAX_SEARCH              MAX_STRING_DIGITS_128-MAX_FORMAT_DIGITS_128-1
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid128_from_string (UINT128 * pres,
+                    char *ps _RND_MODE_PARAM _EXC_FLAGS_PARAM
+                    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#else
+
+UINT128
+bid128_from_string (char *ps _RND_MODE_PARAM _EXC_FLAGS_PARAM
+                    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CX, res;
+  UINT64 sign_x, coeff_high, coeff_low, coeff2, coeff_l2, carry = 0x0ull,
+    scale_high, right_radix_leading_zeros;
+  int ndigits_before, ndigits_after, ndigits_total, dec_expon, sgn_exp,
+    i, d2, rdx_pt_enc;
+  char c, buffer[MAX_STRING_DIGITS_128];
+  int save_rnd_mode;
+  int save_fpsf;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  save_rnd_mode = rnd_mode; // dummy
+  save_fpsf = *pfpsf; // dummy
+
+  right_radix_leading_zeros = rdx_pt_enc = 0;
+
+  // if null string, return NaN
+  if (!ps) {
+    res.w[1] = 0x7c00000000000000ull;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // eliminate leading white space
+  while ((*ps == ' ') || (*ps == '\t'))
+    ps++;
+
+  // c gets first character
+  c = *ps;
+
+
+  // if c is null or not equal to a (radix point, negative sign, 
+  // positive sign, or number) it might be SNaN, sNaN, Infinity
+  if (!c
+      || (c != '.' && c != '-' && c != '+'
+          && ((unsigned) (c - '0') > 9))) {
+    res.w[0] = 0;
+    // Infinity?
+    if ((tolower_macro (ps[0]) == 'i' && tolower_macro (ps[1]) == 'n'
+         && tolower_macro (ps[2]) == 'f')
+        && (!ps[3]
+            || (tolower_macro (ps[3]) == 'i'
+                && tolower_macro (ps[4]) == 'n'
+                && tolower_macro (ps[5]) == 'i'
+                && tolower_macro (ps[6]) == 't'
+                && tolower_macro (ps[7]) == 'y' && !ps[8])
+        )) {
+      res.w[1] = 0x7800000000000000ull;
+      BID_RETURN (res);
+    }
+    // return sNaN
+    if (tolower_macro (ps[0]) == 's' && tolower_macro (ps[1]) == 'n' && 
+        tolower_macro (ps[2]) == 'a' && tolower_macro (ps[3]) == 'n') {        
+        // case insensitive check for snan
+      res.w[1] = 0x7e00000000000000ull;
+      BID_RETURN (res);
+    } else {
+      // return qNaN
+      res.w[1] = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+  }
+  // if +Inf, -Inf, +Infinity, or -Infinity (case insensitive check for inf)   
+  if ((tolower_macro (ps[1]) == 'i' && tolower_macro (ps[2]) == 'n' && 
+      tolower_macro (ps[3]) == 'f') && (!ps[4] || 
+      (tolower_macro (ps[4]) == 'i' && tolower_macro (ps[5]) == 'n' && 
+      tolower_macro (ps[6]) == 'i' && tolower_macro (ps[7]) == 't' && 
+      tolower_macro (ps[8]) == 'y' && !ps[9]))) { // ci check for infinity
+    res.w[0] = 0;
+
+    if (c == '+')
+      res.w[1] = 0x7800000000000000ull;
+    else if (c == '-')
+      res.w[1] = 0xf800000000000000ull;
+    else
+      res.w[1] = 0x7c00000000000000ull;
+
+    BID_RETURN (res);
+  }
+  // if +sNaN, +SNaN, -sNaN, or -SNaN
+  if (tolower_macro (ps[1]) == 's' && tolower_macro (ps[2]) == 'n'
+      && tolower_macro (ps[3]) == 'a' && tolower_macro (ps[4]) == 'n') {
+    res.w[0] = 0;
+    if (c == '-')
+      res.w[1] = 0xfe00000000000000ull;
+    else
+      res.w[1] = 0x7e00000000000000ull;
+    BID_RETURN (res);
+  }
+  // set up sign_x to be OR'ed with the upper word later
+  if (c == '-')
+    sign_x = 0x8000000000000000ull;
+  else
+    sign_x = 0;
+
+  // go to next character if leading sign
+  if (c == '-' || c == '+')
+    ps++;
+
+  c = *ps;
+
+  // if c isn't a decimal point or a decimal digit, return NaN
+  if (c != '.' && ((unsigned) (c - '0') > 9)) {
+    res.w[1] = 0x7c00000000000000ull | sign_x;
+    res.w[0] = 0;
+    BID_RETURN (res);
+  }
+  // detect zero (and eliminate/ignore leading zeros)
+  if (*(ps) == '0') {
+
+    // if all numbers are zeros (with possibly 1 radix point, the number is zero
+    // should catch cases such as: 000.0
+    while (*ps == '0') {
+
+      ps++;
+
+      // for numbers such as 0.0000000000000000000000000000000000001001, 
+      // we want to count the leading zeros
+      if (rdx_pt_enc) {
+        right_radix_leading_zeros++;
+      }
+      // if this character is a radix point, make sure we haven't already 
+      // encountered one
+      if (*(ps) == '.') {
+        if (rdx_pt_enc == 0) {
+          rdx_pt_enc = 1;
+          // if this is the first radix point, and the next character is NULL, 
+          // we have a zero
+          if (!*(ps + 1)) {
+            res.w[1] =
+              (0x3040000000000000ull -
+               (right_radix_leading_zeros << 49)) | sign_x;
+            res.w[0] = 0;
+            BID_RETURN (res);
+          }
+          ps = ps + 1;
+        } else {
+          // if 2 radix points, return NaN
+          res.w[1] = 0x7c00000000000000ull | sign_x;
+          res.w[0] = 0;
+          BID_RETURN (res);
+        }
+      } else if (!*(ps)) {
+        //res.w[1] = 0x3040000000000000ull | sign_x;
+        res.w[1] =
+          (0x3040000000000000ull -
+           (right_radix_leading_zeros << 49)) | sign_x;
+        res.w[0] = 0;
+        BID_RETURN (res);
+      }
+    }
+  }
+
+  c = *ps;
+
+  // initialize local variables
+  ndigits_before = ndigits_after = ndigits_total = 0;
+  sgn_exp = 0;
+  // pstart_coefficient = ps;
+
+  if (!rdx_pt_enc) {
+    // investigate string (before radix point)
+    while ((unsigned) (c - '0') <= 9
+           && ndigits_before < MAX_STRING_DIGITS_128) {
+      buffer[ndigits_before] = c;
+      ps++;
+      c = *ps;
+      ndigits_before++;
+    }
+
+    ndigits_total = ndigits_before;
+    if (c == '.') {
+      ps++;
+      if ((c = *ps)) {
+
+        // investigate string (after radix point)
+        while ((unsigned) (c - '0') <= 9
+               && ndigits_total < MAX_STRING_DIGITS_128) {
+          buffer[ndigits_total] = c;
+          ps++;
+          c = *ps;
+          ndigits_total++;
+        }
+        ndigits_after = ndigits_total - ndigits_before;
+      }
+    }
+  } else {
+    // we encountered a radix point while detecting zeros
+    //if (c = *ps){
+
+    c = *ps;
+    ndigits_total = 0;
+    // investigate string (after radix point)
+    while ((unsigned) (c - '0') <= 9
+           && ndigits_total < MAX_STRING_DIGITS_128) {
+      buffer[ndigits_total] = c;
+      ps++;
+      c = *ps;
+      ndigits_total++;
+    }
+    ndigits_after = ndigits_total - ndigits_before;
+  }
+
+  // get exponent
+  dec_expon = 0;
+  if (ndigits_total < MAX_STRING_DIGITS_128) {
+    if (c) {
+      if (c != 'e' && c != 'E') {
+        // return NaN
+        res.w[1] = 0x7c00000000000000ull;
+        res.w[0] = 0;
+        BID_RETURN (res);
+      }
+      ps++;
+      c = *ps;
+
+      if (((unsigned) (c - '0') > 9)
+          && ((c != '+' && c != '-') || (unsigned) (ps[1] - '0') > 9)) {
+        // return NaN
+        res.w[1] = 0x7c00000000000000ull;
+        res.w[0] = 0;
+        BID_RETURN (res);
+      }
+
+      if (c == '-') {
+        sgn_exp = -1;
+        ps++;
+        c = *ps;
+      } else if (c == '+') {
+        ps++;
+        c = *ps;
+      }
+
+      dec_expon = c - '0';
+      i = 1;
+      ps++;
+      c = *ps - '0';
+      while (((unsigned) c) <= 9 && i < 7) {
+        d2 = dec_expon + dec_expon;
+        dec_expon = (d2 << 2) + d2 + c;
+        ps++;
+        c = *ps - '0';
+        i++;
+      }
+    }
+
+    dec_expon = (dec_expon + sgn_exp) ^ sgn_exp;
+  }
+
+
+  if (ndigits_total <= MAX_FORMAT_DIGITS_128) {
+    dec_expon +=
+      DECIMAL_EXPONENT_BIAS_128 - ndigits_after -
+      right_radix_leading_zeros;
+    if (dec_expon < 0) {
+      res.w[1] = 0 | sign_x;
+      res.w[0] = 0;
+    }
+    if (ndigits_total == 0) {
+      CX.w[0] = 0;
+      CX.w[1] = 0;
+    } else if (ndigits_total <= 19) {
+      coeff_high = buffer[0] - '0';
+      for (i = 1; i < ndigits_total; i++) {
+        coeff2 = coeff_high + coeff_high;
+        coeff_high = (coeff2 << 2) + coeff2 + buffer[i] - '0';
+      }
+      CX.w[0] = coeff_high;
+      CX.w[1] = 0;
+    } else {
+      coeff_high = buffer[0] - '0';
+      for (i = 1; i < ndigits_total - 17; i++) {
+        coeff2 = coeff_high + coeff_high;
+        coeff_high = (coeff2 << 2) + coeff2 + buffer[i] - '0';
+      }
+      coeff_low = buffer[i] - '0';
+      i++;
+      for (; i < ndigits_total; i++) {
+        coeff_l2 = coeff_low + coeff_low;
+        coeff_low = (coeff_l2 << 2) + coeff_l2 + buffer[i] - '0';
+      }
+      // now form the coefficient as coeff_high*10^19+coeff_low+carry
+      scale_high = 100000000000000000ull;
+      __mul_64x64_to_128_fast (CX, coeff_high, scale_high);
+
+      CX.w[0] += coeff_low;
+      if (CX.w[0] < coeff_low)
+        CX.w[1]++;
+    }
+    get_BID128 (&res, sign_x, dec_expon, CX,&rnd_mode,pfpsf);
+    BID_RETURN (res);
+  } else {
+    // simply round using the digits that were read
+
+    dec_expon +=
+      ndigits_before + DECIMAL_EXPONENT_BIAS_128 -
+      MAX_FORMAT_DIGITS_128 - right_radix_leading_zeros;
+
+    if (dec_expon < 0) {
+      res.w[1] = 0 | sign_x;
+      res.w[0] = 0;
+    }
+
+    coeff_high = buffer[0] - '0';
+    for (i = 1; i < MAX_FORMAT_DIGITS_128 - 17; i++) {
+      coeff2 = coeff_high + coeff_high;
+      coeff_high = (coeff2 << 2) + coeff2 + buffer[i] - '0';
+    }
+    coeff_low = buffer[i] - '0';
+    i++;
+    for (; i < MAX_FORMAT_DIGITS_128; i++) {
+      coeff_l2 = coeff_low + coeff_low;
+      coeff_low = (coeff_l2 << 2) + coeff_l2 + buffer[i] - '0';
+    }
+	switch(rnd_mode) {
+	case ROUNDING_TO_NEAREST:
+    carry = ((unsigned) ('4' - buffer[i])) >> 31;
+    if ((buffer[i] == '5' && !(coeff_low & 1)) || dec_expon < 0) {
+      if (dec_expon >= 0) {
+        carry = 0;
+        i++;
+      }
+      for (; i < ndigits_total; i++) {
+        if (buffer[i] > '0') {
+          carry = 1;
+          break;
+        }
+      }
+    }
+	break;
+
+	case ROUNDING_DOWN:
+		if(sign_x) 
+      for (; i < ndigits_total; i++) {
+        if (buffer[i] > '0') {
+          carry = 1;
+          break;
+        }
+      }
+		break;
+	case ROUNDING_UP:
+		if(!sign_x) 
+      for (; i < ndigits_total; i++) {
+        if (buffer[i] > '0') {
+          carry = 1;
+          break;
+        }
+      }
+		break;
+	case ROUNDING_TO_ZERO:
+		carry=0;
+		break;
+	case ROUNDING_TIES_AWAY:
+    carry = ((unsigned) ('4' - buffer[i])) >> 31;
+    if (dec_expon < 0) {
+      for (; i < ndigits_total; i++) {
+        if (buffer[i] > '0') {
+          carry = 1;
+          break;
+        }
+      }
+    }
+		break;
+
+
+	}
+    // now form the coefficient as coeff_high*10^17+coeff_low+carry
+    scale_high = 100000000000000000ull;
+    if (dec_expon < 0) {
+      if (dec_expon > -MAX_FORMAT_DIGITS_128) {
+        scale_high = 1000000000000000000ull;
+        coeff_low = (coeff_low << 3) + (coeff_low << 1);
+        dec_expon--;
+      }
+      if (dec_expon == -MAX_FORMAT_DIGITS_128
+          && coeff_high > 50000000000000000ull)
+        carry = 0; 
+    }
+
+    __mul_64x64_to_128_fast (CX, coeff_high, scale_high);
+
+    coeff_low += carry;
+    CX.w[0] += coeff_low;
+    if (CX.w[0] < coeff_low)
+      CX.w[1]++;
+
+
+    get_BID128(&res, sign_x, dec_expon, CX, &rnd_mode, pfpsf);
+    BID_RETURN (res);
+  }
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_int16.c b/gcc-4.9/libgcc/config/libbid/bid128_to_int16.c
new file mode 100644
index 000000000..51735f78c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_int16.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffff8000
+#define INVALID_RESULT 0x8000
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_rnint, UINT128, x,
+			       bid128_to_int32_rnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_xrnint, UINT128,
+			       x, bid128_to_int32_xrnint, int,
+			       SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_rninta, UINT128,
+			       x, bid128_to_int32_rninta, int,
+			       SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_xrninta, UINT128,
+			       x, bid128_to_int32_xrninta, int,
+			       SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_int, UINT128, x,
+			       bid128_to_int32_int, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_xint, UINT128, x,
+			       bid128_to_int32_xint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_floor, UINT128, x,
+			       bid128_to_int32_floor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_ceil, UINT128, x,
+			       bid128_to_int32_ceil, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_xfloor, UINT128,
+			       x, bid128_to_int32_xfloor, int,
+			       SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid128_to_int16_xceil, UINT128, x,
+			       bid128_to_int32_xceil, int, SIZE_MASK,
+			       INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_int32.c b/gcc-4.9/libgcc/config/libbid/bid128_to_int32.c
new file mode 100644
index 000000000..9eeb7ebaf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_int32.c
@@ -0,0 +1,3659 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128_to_int32_rnint 
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_rnint, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005 <=>
+	// C > 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1/2 up)
+	tmp64 = 0x500000005ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x4fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_xrnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_xrnint,
+					  x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005 <=>
+	// C > 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1/2 up)
+	tmp64 = 0x500000005ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x4fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_floor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_floor, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000 <=>
+	// C > 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // return 0
+    if (x_sign)
+      res = 0xffffffff;
+    else
+      res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31 <= x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // toward negative infinity to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (x_sign && (is_midpoint_gt_even || is_inexact_lt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else if (!x_sign
+		 && (is_midpoint_lt_even || is_inexact_gt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+
+/*****************************************************************************
+ *  BID128_to_int32_xfloor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_xfloor,
+					  x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000 <=>
+	// C > 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    if (x_sign)
+      res = 0xffffffff;
+    else
+      res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31 <= x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // toward negative infinity to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (x_sign && (is_midpoint_gt_even || is_inexact_lt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else if (!x_sign
+		 && (is_midpoint_lt_even || is_inexact_gt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_ceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_ceil, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31-1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1 up)
+	tmp64 = 0x50000000aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31 - 1
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x4fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6 <=>
+	// C > 0x4fffffff6 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x4fffffff6ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31-1 < n <= 2^31-1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // return 0
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x <= 2^31-1 so x can be rounded
+    // toward positive infinity to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (x_sign && (is_midpoint_lt_even || is_inexact_gt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else if (!x_sign
+		 && (is_midpoint_gt_even || is_inexact_lt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else {
+	;	// the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_xceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_xceil, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31-1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1 up)
+	tmp64 = 0x50000000aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31 - 1
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x4fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6 <=>
+	// C > 0x4fffffff6 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31 up)
+	tmp64 = 0x4fffffff6ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31-1 < n <= 2^31-1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x <= 2^31-1 so x can be rounded
+    // toward positive infinity to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (x_sign && (is_midpoint_lt_even || is_inexact_gt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else if (!x_sign
+		 && (is_midpoint_gt_even || is_inexact_lt_midpoint)) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else {
+	;	// the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_int
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_int, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1 up)
+	tmp64 = 0x50000000aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // toward zero to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1]
+	       || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		   && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0]))) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0) &&
+	  (fstar.w[1] || fstar.w[0]) &&
+	  (fstar.w[1] < ten2mk128trunc[ind - 1].w[1] ||
+	   (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	    fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RZ
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// exact, the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_xint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_xint, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1 up)
+	tmp64 = 0x50000000aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x500000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // toward zero to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] && (fstar.w[2] ||
+						   fstar.w[1]
+						   || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RZ
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// exact, the result is already correct
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_rninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_rninta,
+					  x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005 <=>
+	// C >= 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1/2 up)
+	tmp64 = 0x500000005ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x4fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1/2 < x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest-away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint, it was already rounded away from zero
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+      // no need to check for midpoints - already rounded away from zero!
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int32_xrninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (int, bid128_to_int32_xrninta,
+					  x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005 <=>
+	// C >= 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31+1/2 up)
+	tmp64 = 0x500000005ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^31-1/2 up)
+	tmp64 = 0x4fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffff;	// return -1
+      } else {	// n > 0
+	res = 0x00000001;	// return +1
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^31-1/2 < x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest-away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint, it was already rounded away from zero
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull || (fstar.w[1] == 0x8000000000000000ull && fstar.w[0] > 0x0ull)) {	// f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1]
+	       || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		   && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0]))) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2] ||
+	      fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+      // no need to check for midpoints - already rounded away from zero!
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_int64.c b/gcc-4.9/libgcc/config/libbid/bid128_to_int64.c
new file mode 100644
index 000000000..17a186f5a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_int64.c
@@ -0,0 +1,2994 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128_to_int64_rnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_rnint,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull) ||
+    (C1.w[1] == 0x0001ed09bead87c0ull
+     && (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+1), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000005, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0000000000000005ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    }
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0) &&
+	  (fstar.w[1] || fstar.w[0]) &&
+	  (fstar.w[1] < ten2mk128trunc[ind - 1].w[1] ||
+	   (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	    fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_xrnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64,
+					  bid128_to_int64_xrnint, x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+1), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000005, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0000000000000005ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0) &&
+	  (fstar.w[1] || fstar.w[0]) &&
+	  (fstar.w[1] < ten2mk128trunc[ind - 1].w[1] ||
+	   (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	    fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_floor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_floor,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 10*2^63, 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffffffffffffull;
+    else
+      res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63 <= x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // toward zero to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is negative and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1] ||
+	    (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	     fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_xfloor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64,
+					  bid128_to_int64_xfloor, x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 10*2^63, 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffffffffffffull;
+    else
+      res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63 <= x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // toward zero to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is negative and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1] ||
+	    (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	     fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_ceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_ceil,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+2), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x5000000000000000a, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x000000000000000aull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n > 2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63 - 1
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 10*(2^63-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 0x4fffffffffffffff6, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffff6ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n <= 2^63 - 1
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x <= 2^63 - 1 so x can be rounded
+    // up to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is positive and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_xceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_xceil,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+2), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x5000000000000000a, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x000000000000000aull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n > 2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63 - 1
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 10*(2^63-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 0x4fffffffffffffff6, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffff6ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n <= 2^63 - 1
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x <= 2^63 - 1 so x can be rounded
+    // up to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is positive and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_int
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_int,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x000000000000000aull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // toward zero to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_xint64_xint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64, bid128_to_int64_xint,
+					  x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x000000000000000aull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // toward zero to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_rninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64,
+					  bid128_to_int64_rninta, x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+1), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000005, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0000000000000005ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    }
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_int64_xrninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (SINT64,
+					  bid128_to_int64_xrninta, x)
+
+     SINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+1), 1<=q<=34
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000005, 1<=q<=34
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0000000000000005ull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 => 
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=34
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=34
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      if (q <= 19) {	// 1 <= q <= 19 => 1 <= 20-q <= 19 =>
+	// 10^(20-q) is 64-bit, and so is C1
+	__mul_64x64_to_128MACH (C1, C1.w[0], ten2k64[20 - q]);
+      } else if (q == 20) {
+	;	// C1 * 10^0 = C1
+      } else {	// if 21 <= q <= 34
+	__mul_128x64_to_128 (C, ten2k64[q - 20], C);	// max 47-bit x 67-bit
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19' 
+    }
+  }
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  // Restore C1 which may have been modified above
+  C1.w[1] = x.w[1] & MASK_COEFF;
+  C1.w[0] = x.w[0];
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (x_sign) {	// n < 0
+	res = 0xffffffffffffffffull;	// return -1
+      } else {	// n > 0
+	res = 0x0000000000000001ull;	// return +1
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 34, -33 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar.w[0];
+      else
+	res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 19
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1.w[0];
+      else
+	res = C1.w[0];
+    } else {	// if (exp>0) => 1 <= exp <= 18, 1 <= q < 18, 2 <= q + exp <= 19
+      // res = +/-C * 10^exp (exact) where this fits in 64-bit integer
+      if (x_sign)
+	res = -C1.w[0] * ten2k64[exp];
+      else
+	res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_int8.c b/gcc-4.9/libgcc/config/libbid/bid128_to_int8.c
new file mode 100644
index 000000000..1b186a2de
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_int8.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffffff80
+#define INVALID_RESULT 0x80
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_rnint, UINT128, x,
+			       bid128_to_int32_rnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_xrnint, UINT128, x,
+			       bid128_to_int32_xrnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_rninta, UINT128, x,
+			       bid128_to_int32_rninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_xrninta, UINT128, x,
+			       bid128_to_int32_xrninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_int, UINT128, x,
+			       bid128_to_int32_int, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_xint, UINT128, x,
+			       bid128_to_int32_xint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_floor, UINT128, x,
+			       bid128_to_int32_floor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_ceil, UINT128, x,
+			       bid128_to_int32_ceil, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_xfloor, UINT128, x,
+			       bid128_to_int32_xfloor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid128_to_int8_xceil, UINT128, x,
+			       bid128_to_int32_xceil, int, SIZE_MASK,
+			       INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_uint16.c b/gcc-4.9/libgcc/config/libbid/bid128_to_uint16.c
new file mode 100644
index 000000000..5547dbc2f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_uint16.c
@@ -0,0 +1,68 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffff0000
+#define INVALID_RESULT 0x8000
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_rnint,
+				UINT128, x, bid128_to_uint32_rnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_xrnint,
+				UINT128, x, bid128_to_uint32_xrnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_rninta,
+				UINT128, x, bid128_to_uint32_rninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short,
+				bid128_to_uint16_xrninta, UINT128, x,
+				bid128_to_uint32_xrninta, unsigned int,
+				SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_int,
+				UINT128, x, bid128_to_uint32_int,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_xint,
+				UINT128, x, bid128_to_uint32_xint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_floor,
+				UINT128, x, bid128_to_uint32_floor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_ceil,
+				UINT128, x, bid128_to_uint32_ceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_xfloor,
+				UINT128, x, bid128_to_uint32_xfloor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid128_to_uint16_xceil,
+				UINT128, x, bid128_to_uint32_xceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_uint32.c b/gcc-4.9/libgcc/config/libbid/bid128_to_uint32.c
new file mode 100644
index 000000000..d654bc919
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_uint32.c
@@ -0,0 +1,3588 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128_to_uint32_rnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_rnint, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -1/2 then n cannot be converted to uint32 with RN
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x05, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x05 <=>
+	// C > 0x05 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1/2 up)
+	tmp64 = 0x05ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32-1/2 up)
+	tmp64 = 0x9fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -1/2 <= n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_xrnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_xrnint, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     unsigned int tmp_inexact = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -1/2 then n cannot be converted to uint32 with RN
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x05, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x05 <=>
+	// C > 0x05 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1/2 up)
+	tmp64 = 0x05ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32-1/2 up)
+	tmp64 = 0x9fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -1/2 <= n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar.w[0];	// the result is positive
+      if (tmp_inexact)
+	*pfpsf |= INEXACT_EXCEPTION;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_floor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_floor, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+  // x < 0 is invalid
+  if (x_sign) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // x > 0 from this point on
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    // n > 0 and q + exp = 10
+    // if n >= 2^32 then n is too large
+    // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+    // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=34
+    if (q <= 11) {
+      tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+      // c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+      if (tmp64 >= 0xa00000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+      // 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000 <=>
+      // C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 23
+      // (scale 2^32 up)
+      tmp64 = 0xa00000000ull;
+      if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	__mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+      } else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	__mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    }
+  }
+  // n is not too large to be converted to int32: 0 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +0.0...c(0)c(1)...c(q-1) or n = +0.c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // 1 <= x < 2^32 so x can be rounded down to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_xfloor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_xfloor, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+  // x < 0 is invalid
+  if (x_sign) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // x > 0 from this point on
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    // n > 0 and q + exp = 10
+    // if n >= 2^32 then n is too large
+    // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+    // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=34
+    if (q <= 11) {
+      tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+      // c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+      if (tmp64 >= 0xa00000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+      // 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000 <=>
+      // C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 23
+      // (scale 2^32 up)
+      tmp64 = 0xa00000000ull;
+      if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	__mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+      } else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	__mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+      }
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    }
+  }
+  // n is not too large to be converted to int32: 0 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +0.0...c(0)c(1)...c(q-1) or n = +0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // 1 <= x < 2^32 so x can be rounded down to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_ceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_ceil, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a <=>
+	// C >= 0x0a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1 up)
+	tmp64 = 0x0aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^32 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^32 - 1
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x9fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6 <=>
+	// C > 0x9fffffff6 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32 up)
+	tmp64 = 0x9fffffff6ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^32-1 < n <= 2^32-1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // return 0
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^32-1 < x <= -1 or 1 <= x <= 2^32-1 so x can be rounded
+    // toward positive infinity to a 32-bit signed integer
+    if (x_sign) {	// x <= -1 is invalid
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // x > 0 from this point on
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  ;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  ;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_inexact_lt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (is_midpoint_gt_even || is_inexact_lt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else {
+	;	// the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_xceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_xceil, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_lt_midpoint = 0;
+     int is_midpoint_gt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x50000000a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a <=>
+	// C >= 0x0a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1 up)
+	tmp64 = 0x0aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^32 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^32 - 1
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x9fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6 <=>
+	// C > 0x9fffffff6 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32 up)
+	tmp64 = 0x9fffffff6ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^32-1 < n <= 2^32-1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // -2^32-1 < x <= -1 or 1 <= x <= 2^32-1 so x can be rounded
+    // toward positive infinity to a 32-bit signed integer
+    if (x_sign) {	// x <= -1 is invalid
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // x > 0 from this point on
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	    is_inexact_lt_midpoint = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_midpoint_gt_even = 1;
+	  is_inexact_lt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_inexact_lt_midpoint = 0;
+	}
+      }
+      // general correction for RM
+      if (is_midpoint_gt_even || is_inexact_lt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] + 1;
+      } else {
+	;	// the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_int
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_int, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit uint fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a <=>
+	// C >= 0x0a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1 up)
+	tmp64 = 0x0aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0xa00000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit uint fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000 <=>
+	// C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32 up)
+	tmp64 = 0xa00000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to uint32: -2^32 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // x = d(0)...d(k).d(k+1)..., k >= 0, d(0) != 0
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // x > 0 from this point on
+    // 1 <= x < 2^32 so x can be rounded to zero to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RZ
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// exact, the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_xint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_xint, x)
+
+     int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     int is_inexact_gt_midpoint = 0;
+     int is_midpoint_lt_even = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit uint fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x0a <=>
+	// C >= 0x0a * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1 up)
+	tmp64 = 0x0aull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0xa00000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit uint fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000 <=>
+	// C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32 up)
+	tmp64 = 0xa00000000ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to uint32: -2^32 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {
+    // n = +/-0.0...c(0)c(1)...c(q-1) or n = +/-0.c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    // x = d(0)...d(k).d(k+1)..., k >= 0, d(0) != 0
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // x > 0 from this point on
+    // 1 <= x < 2^32 so x can be rounded to zero to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	  is_inexact_gt_midpoint = 1;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	  is_inexact_gt_midpoint = 0;
+	} else {	// else MP in [ODD, EVEN]
+	  is_midpoint_lt_even = 1;
+	  is_inexact_gt_midpoint = 0;
+	}
+      }
+      // general correction for RZ
+      if (is_midpoint_lt_even || is_inexact_gt_midpoint) {
+	Cstar.w[0] = Cstar.w[0] - 1;
+      } else {
+	;	// exact, the result is already correct
+      }
+      res = Cstar.w[0];
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_rninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_rninta, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x05, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x05 <=>
+	// C >= 0x05 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1/2 up)
+	tmp64 = 0x05ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32-1/2 up)
+	tmp64 = 0x9fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -1/2 < n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0  
+    //   invalid exc  
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest-away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint, it was already rounded away from zero
+      res = Cstar.w[0];	// always positive
+      // no need to check for midpoints - already rounded away from zero!
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint32_xrninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (unsigned int,
+					  bid128_to_uint32_xrninta, x)
+
+     unsigned int res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+     unsigned int tmp_inexact = 0;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x00000000;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x00000000;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x05, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x05 <=>
+	// C >= 0x05 * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 1/2 up)
+	tmp64 = 0x05ull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // too large if 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=34
+      if (q <= 11) {
+	tmp64 = C1.w[0] * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 34 and so -24 <= exp <= -2
+	// 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 23
+	// (scale 2^32-1/2 up)
+	tmp64 = 0x9fffffffbull;
+	if (q - 11 <= 19) {	// 1 <= q - 11 <= 19; 10^(q-11) requires 64 bits
+	  __mul_64x64_to_128MACH (C, tmp64, ten2k64[q - 11]);
+	} else {	// 20 <= q - 11 <= 23, and 10^(q-11) requires 128 bits
+	  __mul_128x64_to_128 (C, tmp64, ten2k128[q - 31]);
+	}
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -1/2 < n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0  
+    //   invalid exc  
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x00000000;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x80000000;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 34, -33 <= exp <= 9)
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest-away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint, it was already rounded away from zero
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    // *pfpsf |= INEXACT_EXCEPTION;
+	    tmp_inexact = 1;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  // *pfpsf |= INEXACT_EXCEPTION;
+	  tmp_inexact = 1;
+	}
+      }
+      // no need to check for midpoints - already rounded away from zero!
+      res = Cstar.w[0];	// the result is positive
+      if (tmp_inexact)
+	*pfpsf |= INEXACT_EXCEPTION;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1.w[0];
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_uint64.c b/gcc-4.9/libgcc/config/libbid/bid128_to_uint64.c
new file mode 100644
index 000000000..f723c31b2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_uint64.c
@@ -0,0 +1,3401 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID128_to_uint64_rnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_rnint, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n < -1/2 then n cannot be converted to uint64 with RN
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) > 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 > 0x05, 1<=q<=34
+      // <=> C * 10^(21-q) > 0x05, 1<=q<=34
+      if (q == 21) {
+	// C > 5 
+	if (C1.w[1] != 0 || C1.w[0] > 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) > 5 is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//   C > 5 * 10^(q-21) is true because C > 2^64 and 5*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0x9fffffffffffffffb
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C * 10 >= 0x9fffffffffffffffb <=> C * 2 > 1ffffffffffffffff
+	C.w[0] = C1.w[0] + C1.w[0];
+	C.w[1] = C1.w[1] + C1.w[1];
+	if (C.w[0] < C1.w[0])
+	  C.w[1]++;
+	if (C.w[1] > 0x01 || (C.w[1] == 0x01
+			      && C.w[0] >= 0xffffffffffffffffull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0x9fffffffffffffffb
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0x9fffffffffffffffb max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffffbull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	*pfpsf |= INVALID_EXCEPTION;
+      }
+    }
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_xrnint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_xrnint, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n < -1/2 then n cannot be converted to uint64 with RN
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) > 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 > 0x05, 1<=q<=34
+      // <=> C * 10^(21-q) > 0x05, 1<=q<=34
+      if (q == 21) {
+	// C > 5 
+	if (C1.w[1] != 0 || C1.w[0] > 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) > 5 is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//   C > 5 * 10^(q-21) is true because C > 2^64 and 5*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0x9fffffffffffffffb
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C * 10 >= 0x9fffffffffffffffb <=> C * 2 > 1ffffffffffffffff
+	C.w[0] = C1.w[0] + C1.w[0];
+	C.w[1] = C1.w[1] + C1.w[1];
+	if (C.w[0] < C1.w[0])
+	  C.w[1]++;
+	if (C.w[1] > 0x01 || (C.w[1] == 0x01
+			      && C.w[0] >= 0xffffffffffffffffull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0x9fffffffffffffffb
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0x9fffffffffffffffb max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffffbull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] <= midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] <= midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	*pfpsf |= INVALID_EXCEPTION;
+	BID_RETURN (res);
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[3] == 0) && (fstar.w[2] == 0)
+	  && (fstar.w[1] || fstar.w[0])
+	  && (fstar.w[1] < ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] <= ten2mk128trunc[ind - 1].w[0]))) {
+	// the result is a midpoint; round to nearest
+	if (Cstar.w[0] & 0x01) {	// Cstar.w[0] is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar.w[0]--;	// Cstar.w[0] is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_floor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_floor, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // if n < 0 then n cannot be converted to uint64 with RM
+  if (x_sign) {	// if n < 0 and q + exp = 20
+    // too large if c(0)c(1)...c(19).c(20)...c(q-1) > 0
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    // if n > 0 and q + exp = 20
+    // if n >= 2^64 then n is too large
+    // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*2^65
+    // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=34
+    if (q == 1) {
+      // C * 10^20 >= 0xa0000000000000000
+      __mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q <= 19) {
+      // C * 10^(21-q) >= 0xa0000000000000000
+      __mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q == 20) {
+      // C >= 0x10000000000000000
+      if (C1.w[1] >= 0x01) {
+	// actually C1.w[1] == 0x01 && C1.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q == 21) {
+      // C >= 0xa0000000000000000
+      if (C1.w[1] >= 0x0a) {
+	// actually C1.w[1] == 0x0a && C1.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+      // C  >= 10^(q-21) * 0xa0000000000000000 max 44 bits x 68 bits
+      C.w[1] = 0x0a;
+      C.w[0] = 0x0000000000000000ull;
+      __mul_128x64_to_128 (C, ten2k64[q - 21], C);
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    }
+  }
+  // n is not too large to be converted to int64 if 0 <= n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // 1 <= x < 2^64 so x can be rounded
+    // down to a 64-bit unsigned signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_xfloor
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_xfloor, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // if n < 0 then n cannot be converted to uint64 with RM
+  if (x_sign) {	// if n < 0 and q + exp = 20
+    // too large if c(0)c(1)...c(19).c(20)...c(q-1) > 0
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    // if n > 0 and q + exp = 20
+    // if n >= 2^64 then n is too large
+    // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*2^65
+    // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=34
+    if (q == 1) {
+      // C * 10^20 >= 0xa0000000000000000
+      __mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q <= 19) {
+      // C * 10^(21-q) >= 0xa0000000000000000
+      __mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q == 20) {
+      // C >= 0x10000000000000000
+      if (C1.w[1] >= 0x01) {
+	// actually C1.w[1] == 0x01 && C1.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else if (q == 21) {
+      // C >= 0xa0000000000000000
+      if (C1.w[1] >= 0x0a) {
+	// actually C1.w[1] == 0x0a && C1.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+      // C  >= 10^(q-21) * 0xa0000000000000000 max 44 bits x 68 bits
+      C.w[1] = 0x0a;
+      C.w[0] = 0x0000000000000000ull;
+      __mul_128x64_to_128 (C, ten2k64[q - 21], C);
+      if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    }
+  }
+  // n is not too large to be converted to int64 if 0 <= n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // 1 <= x < 2^64 so x can be rounded
+    // down to a 64-bit unsigned signed integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1] ||
+	    (fstar.w[1] == ten2mk128trunc[ind - 1].w[1] &&
+	     fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_ceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64, bid128_to_uint64_ceil,
+					  x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1 then n cannot be converted to uint64 with RZ
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x0a, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x0a, 1<=q<=34
+      if (q == 21) {
+	// C >= a 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= a is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= a * 10^(q-21) is true because C > 2^64 and a*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n > 2^64 - 1 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 > 10 * (2^64 - 1) 
+      // <=> C * 10^(21-q) > 0x9fffffffffffffff6, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 > 0x9fffffffffffffff6
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) > 0x9fffffffffffffff6
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C > 0xffffffffffffffff
+	if (C1.w[1]) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C > 0x9fffffffffffffff6
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  > 10^(q-21) * 0x9fffffffffffffff6 max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffff6ull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n <= 2^64 - 1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to zero to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x <= 2^64 - 1 so x can be rounded
+    // to zero to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is positive and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	}	// else the result is exact
+      }
+
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_xceil
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_xceil, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1 then n cannot be converted to uint64 with RZ
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x0a, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x0a, 1<=q<=34
+      if (q == 21) {
+	// C >= a 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= a is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= a * 10^(q-21) is true because C > 2^64 and a*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n > 2^64 - 1 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 > 10 * (2^64 - 1) 
+      // <=> C * 10^(21-q) > 0x9fffffffffffffff6, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 > 0x9fffffffffffffff6
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) > 0x9fffffffffffffff6
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C > 0xffffffffffffffff
+	if (C1.w[1]) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C > 0x9fffffffffffffff6
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  > 10^(q-21) * 0x9fffffffffffffff6 max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffff6ull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1] || (C1.w[1] == C.w[1] && C1.w[0] > C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n <= 2^64 - 1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to zero to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x <= 2^64 - 1 so x can be rounded
+    // to zero to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // if the result is positive and inexact, need to add 1 to it
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  if (!x_sign) {	// positive and inexact
+	    Cstar.w[0]++;
+	    if (Cstar.w[0] == 0x0)
+	      Cstar.w[1]++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_int
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64, bid128_to_uint64_int,
+					  x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1 then n cannot be converted to uint64 with RZ
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x0a, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x0a, 1<=q<=34
+      if (q == 21) {
+	// C >= a 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= a is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= a * 10^(q-21) is true because C > 2^64 and a*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*2^65
+      // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0xa0000000000000000
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0xa0000000000000000
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C >= 0x10000000000000000
+	if (C1.w[1] >= 0x01) {
+	  // actually C1.w[1] == 0x01 && C1.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0xa0000000000000000
+	if (C1.w[1] >= 0x0a) {
+	  // actually C1.w[1] == 0x0a && C1.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0xa0000000000000000 max 44 bits x 68 bits
+	C.w[1] = 0x0a;
+	C.w[0] = 0x0000000000000000ull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to zero to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64 so x can be rounded
+    // to zero to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_xint
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64, bid128_to_uint64_xint,
+					  x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1 then n cannot be converted to uint64 with RZ
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x0a, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x0a, 1<=q<=34
+      if (q == 21) {
+	// C >= a 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x0aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= a is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= a * 10^(q-21) is true because C > 2^64 and a*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*2^65
+      // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0xa0000000000000000
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0xa0000000000000000
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C >= 0x10000000000000000
+	if (C1.w[1] >= 0x01) {
+	  // actually C1.w[1] == 0x01 && C1.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0xa0000000000000000
+	if (C1.w[1] >= 0x0a) {
+	  // actually C1.w[1] == 0x0a && C1.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0xa0000000000000000 max 44 bits x 68 bits
+	C.w[1] = 0x0a;
+	C.w[0] = 0x0000000000000000ull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to zero to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64 so x can be rounded
+    // to zero to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[2] || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] || fstar.w[2]
+	    || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	    || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		&& fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_rninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_rninta, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1/2 then n cannot be converted to uint64 with RN
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x05, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x05, 1<=q<=34
+      if (q == 21) {
+	// C >= 5 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= 5 is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= 5 * 10^(q-21) is true because C > 2^64 and 5*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0x9fffffffffffffffb
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C * 10 >= 0x9fffffffffffffffb <=> C * 2 > 1ffffffffffffffff
+	C.w[0] = C1.w[0] + C1.w[0];
+	C.w[1] = C1.w[1] + C1.w[1];
+	if (C.w[0] < C1.w[0])
+	  C.w[1]++;
+	if (C.w[1] > 0x01 || (C.w[1] == 0x01
+			      && C.w[0] >= 0xffffffffffffffffull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0x9fffffffffffffffb
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0x9fffffffffffffffb max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffffbull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 < n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    }
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID128_to_uint64_xrninta
+ ****************************************************************************/
+
+BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE (UINT64,
+					  bid128_to_uint64_xrninta, x)
+
+     UINT64 res;
+     UINT64 x_sign;
+     UINT64 x_exp;
+     int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+     UINT64 tmp64, tmp64A;
+     BID_UI64DOUBLE tmp1;
+     unsigned int x_nr_bits;
+     int q, ind, shift;
+     UINT128 C1, C;
+     UINT128 Cstar;		// C* represents up to 34 decimal digits ~ 113 bits
+     UINT256 fstar;
+     UINT256 P256;
+
+  // unpack x
+x_sign = x.w[1] & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+x_exp = x.w[1] & MASK_EXP;	// biased and shifted left 49 bit positions
+C1.w[1] = x.w[1] & MASK_COEFF;
+C1.w[0] = x.w[0];
+
+  // check for NaN or Infinity
+if ((x.w[1] & MASK_SPECIAL) == MASK_SPECIAL) {
+    // x is special
+if ((x.w[1] & MASK_NAN) == MASK_NAN) {	// x is NAN
+  if ((x.w[1] & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is QNaN
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+} else {	// x is not a NaN, so it must be infinity
+  if (!x_sign) {	// x is +inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  } else {	// x is -inf
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+  }
+  BID_RETURN (res);
+}
+}
+  // check for non-canonical values (after the check for special values)
+if ((C1.w[1] > 0x0001ed09bead87c0ull)
+    || (C1.w[1] == 0x0001ed09bead87c0ull
+	&& (C1.w[0] > 0x378d8e63ffffffffull))
+    || ((x.w[1] & 0x6000000000000000ull) == 0x6000000000000000ull)) {
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else if ((C1.w[1] == 0x0ull) && (C1.w[0] == 0x0ull)) {
+  // x is 0
+  res = 0x0000000000000000ull;
+  BID_RETURN (res);
+} else {	// x is not special and is not zero
+
+  // q = nr. of decimal digits in x
+  //  determine first the nr. of bits in x
+  if (C1.w[1] == 0) {
+    if (C1.w[0] >= 0x0020000000000000ull) {	// x >= 2^53
+      // split the 64-bit value in two 32-bit halves to avoid rounding errors
+      if (C1.w[0] >= 0x0000000100000000ull) {	// x >= 2^32
+	tmp1.d = (double) (C1.w[0] >> 32);	// exact conversion
+	x_nr_bits =
+	  33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      } else {	// x < 2^32
+	tmp1.d = (double) (C1.w[0]);	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+    } else {	// if x < 2^53
+      tmp1.d = (double) C1.w[0];	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// C1.w[1] != 0 => nr. bits = 64 + nr_bits (C1.w[1])
+    tmp1.d = (double) C1.w[1];	// exact conversion
+    x_nr_bits =
+      65 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1.w[1] > nr_digits[x_nr_bits - 1].threshold_hi
+	|| (C1.w[1] == nr_digits[x_nr_bits - 1].threshold_hi
+	    && C1.w[0] >= nr_digits[x_nr_bits - 1].threshold_lo))
+      q++;
+  }
+  exp = (x_exp >> 49) - 6176;
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20
+      // if n <= -1/2 then n cannot be converted to uint64 with RN
+      // too large if c(0)c(1)...c(19).c(20)...c(q-1) >= 1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^21 >= 0x05, 1<=q<=34
+      // <=> C * 10^(21-q) >= 0x05, 1<=q<=34
+      if (q == 21) {
+	// C >= 5 
+	if (C1.w[1] != 0 || C1.w[0] >= 0x05ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to 64-bit unsigned int fall through
+	// to '1 <= q + exp <= 20'
+      } else {
+	// if 1 <= q <= 20
+	//   C * 10^(21-q) >= 5 is true because C >= 1 and 10^(21-q) >= 10
+	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	//  C >= 5 * 10^(q-21) is true because C > 2^64 and 5*10^(q-21) < 2^64
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=34
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1.w[0], ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q <= 19) {
+	// C * 10^(21-q) >= 0x9fffffffffffffffb
+	__mul_64x64_to_128MACH (C, C1.w[0], ten2k64[21 - q]);
+	if (C.w[1] > 0x09 || (C.w[1] == 0x09
+			      && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 20) {
+	// C * 10 >= 0x9fffffffffffffffb <=> C * 2 > 1ffffffffffffffff
+	C.w[0] = C1.w[0] + C1.w[0];
+	C.w[1] = C1.w[1] + C1.w[1];
+	if (C.w[0] < C1.w[0])
+	  C.w[1]++;
+	if (C.w[1] > 0x01 || (C.w[1] == 0x01
+			      && C.w[0] >= 0xffffffffffffffffull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else if (q == 21) {
+	// C >= 0x9fffffffffffffffb
+	if (C1.w[1] > 0x09 || (C1.w[1] == 0x09
+			       && C1.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if 22 <= q <= 34 => 1 <= q - 21 <= 13
+	// C  >= 10^(q-21) * 0x9fffffffffffffffb max 44 bits x 68 bits
+	C.w[1] = 0x09;
+	C.w[0] = 0xfffffffffffffffbull;
+	__mul_128x64_to_128 (C, ten2k64[q - 21], C);
+	if (C1.w[1] > C.w[1]
+	    || (C1.w[1] == C.w[1] && C1.w[0] >= C.w[0])) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 < n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (ind <= 18) {	// 0 <= ind <= 18
+      if ((C1.w[1] == 0) && (C1.w[0] < midpoint64[ind])) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    } else {	// 19 <= ind <= 33
+      if ((C1.w[1] < midpoint128[ind - 19].w[1])
+	  || ((C1.w[1] == midpoint128[ind - 19].w[1])
+	      && (C1.w[0] < midpoint128[ind - 19].w[0]))) {
+	res = 0x0000000000000000ull;	// return 0
+      } else if (!x_sign) {	// n > 0
+	res = 0x00000001;	// return +1
+      } else {
+	res = 0x8000000000000000ull;
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 34, -33 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 34, -33 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 33; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 127 bits
+      tmp64 = C1.w[0];
+      if (ind <= 19) {
+	C1.w[0] = C1.w[0] + midpoint64[ind - 1];
+      } else {
+	C1.w[0] = C1.w[0] + midpoint128[ind - 20].w[0];
+	C1.w[1] = C1.w[1] + midpoint128[ind - 20].w[1];
+      }
+      if (C1.w[0] < tmp64)
+	C1.w[1]++;
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 33
+      // kx = 10^(-x) = ten2mk128[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 118 bits
+      __mul_128x128_to_256 (P256, C1, ten2mk128[ind - 1]);
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[1] = P256.w[3];
+	Cstar.w[0] = P256.w[2];
+	fstar.w[3] = 0;
+	fstar.w[2] = P256.w[2] & maskhigh128[ind - 1];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[1] = 0;
+	Cstar.w[0] = P256.w[3];
+	fstar.w[3] = P256.w[3] & maskhigh128[ind - 1];
+	fstar.w[2] = P256.w[2];
+	fstar.w[1] = P256.w[1];
+	fstar.w[0] = P256.w[0];
+      }
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind], e.g.
+      // if x=1, T*=ten2mk128trunc[0]=0x19999999999999999999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-128 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 102
+      if (ind - 1 <= 21) {	// 0 <= ind - 1 <= 21
+	Cstar.w[0] =
+	  (Cstar.w[0] >> shift) | (Cstar.w[1] << (64 - shift));
+	// redundant, it will be 0! Cstar.w[1] = (Cstar.w[1] >> shift);
+      } else {	// 22 <= ind - 1 <= 33
+	Cstar.w[0] = (Cstar.w[0] >> (shift - 64));	// 2 <= shift - 64 <= 38
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[1] > 0x8000000000000000ull ||
+	    (fstar.w[1] == 0x8000000000000000ull
+	     && fstar.w[0] > 0x0ull)) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[1] - 0x8000000000000000ull;	// f* - 1/2
+	  if (tmp64 > ten2mk128trunc[ind - 1].w[1]
+	      || (tmp64 == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] >= ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else if (ind - 1 <= 21) {	// if 3 <= ind <= 21
+	if (fstar.w[3] > 0x0 ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] > onehalf128[ind - 1]) ||
+	    (fstar.w[3] == 0x0 && fstar.w[2] == onehalf128[ind - 1] &&
+	     (fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[2] - onehalf128[ind - 1];
+	  tmp64A = fstar.w[3];
+	  if (tmp64 > fstar.w[2])
+	    tmp64A--;
+	  if (tmp64A || tmp64
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 22 <= ind <= 33
+	if (fstar.w[3] > onehalf128[ind - 1] ||
+	    (fstar.w[3] == onehalf128[ind - 1] &&
+	     (fstar.w[2] || fstar.w[1] || fstar.w[0]))) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[3] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[2]
+	      || fstar.w[1] > ten2mk128trunc[ind - 1].w[1]
+	      || (fstar.w[1] == ten2mk128trunc[ind - 1].w[1]
+		  && fstar.w[0] > ten2mk128trunc[ind - 1].w[0])) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar.w[0];	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 20, but x < 2^64 - 1/2 so in this case C1.w[1] has to be 0
+      // res = C (exact)
+      res = C1.w[0];
+    } else {
+      // if (exp > 0) => 1 <= exp <= 19, 1 <= q < 19, 2 <= q + exp <= 20
+      // res = C * 10^exp (exact) - must fit in 64 bits
+      res = C1.w[0] * ten2k64[exp];
+    }
+  }
+}
+
+BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid128_to_uint8.c b/gcc-4.9/libgcc/config/libbid/bid128_to_uint8.c
new file mode 100644
index 000000000..1d39956de
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid128_to_uint8.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffffff00
+#define INVALID_RESULT 0x80
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_rnint,
+				UINT128, x, bid128_to_uint32_rnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_xrnint,
+				UINT128, x, bid128_to_uint32_xrnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_rninta,
+				UINT128, x, bid128_to_uint32_rninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_xrninta,
+				UINT128, x, bid128_to_uint32_xrninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_int,
+				UINT128, x, bid128_to_uint32_int,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_xint,
+				UINT128, x, bid128_to_uint32_xint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_floor,
+				UINT128, x, bid128_to_uint32_floor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_ceil,
+				UINT128, x, bid128_to_uint32_ceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_xfloor,
+				UINT128, x, bid128_to_uint32_xfloor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid128_to_uint8_xceil,
+				UINT128, x, bid128_to_uint32_xceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid32_to_bid128.c b/gcc-4.9/libgcc/config/libbid/bid32_to_bid128.c
new file mode 100644
index 000000000..1df387019
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid32_to_bid128.c
@@ -0,0 +1,264 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+/* 
+ * Takes a BID32 as input and converts it to a BID128 and returns it.
+ */
+TYPE0_FUNCTION_ARGTYPE1_NORND (UINT128, bid32_to_bid128, UINT32, x)
+
+     UINT128 new_coeff, res;
+     UINT32 sign_x;
+     int exponent_x;
+     UINT32 coefficient_x;
+
+if (!unpack_BID32 (&sign_x, &exponent_x, &coefficient_x, x)) {
+if (((x) & 0x78000000) == 0x78000000) {
+#ifdef SET_STATUS_FLAGS
+  if (((x) & 0x7e000000) == 0x7e000000)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (coefficient_x & 0x000fffff);
+  __mul_64x128_low (res, res.w[0], power10_table_128[27]);
+  res.w[1] |=
+    ((((UINT64) coefficient_x) << 32) & 0xfc00000000000000ull);
+
+  BID_RETURN (res);
+}
+}
+
+new_coeff.w[0] = coefficient_x;
+new_coeff.w[1] = 0;
+get_BID128_very_fast (&res, ((UINT64) sign_x) << 32,
+		      exponent_x + DECIMAL_EXPONENT_BIAS_128 -
+		      DECIMAL_EXPONENT_BIAS_32, new_coeff);
+BID_RETURN (res);
+}	// convert_bid32_to_bid128
+
+
+/*
+ * Takes a BID128 as input and converts it to a BID32 and returns it.
+ */
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid128_to_bid32 (UINT32 * pres,
+		 UINT128 *
+		 px _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		 _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+
+UINT32
+bid128_to_bid32 (UINT128 x _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		 _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
+  UINT64 sign_x, carry, cy;
+  SINT64 D;
+  UINT32 res;
+  int_float f64, fx;
+  int exponent_x, extra_digits, amount, bin_expon_cx, uf_check = 0;
+  unsigned rmode, status;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  BID_SWAP128 (x);
+  // unpack arguments, check for NaN or Infinity or 0
+  if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+    if (((x.w[1]) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+      Tmp.w[1] = (CX.w[1] & 0x00003fffffffffffull);
+      Tmp.w[0] = CX.w[0];
+      TP128 = reciprocals10_128[27];
+      __mul_128x128_full (Qh, Ql, Tmp, TP128);
+      amount = recip_scale[27] - 64;
+      res = ((CX.w[1] >> 32) & 0xfc000000) | (Qh.w[1] >> amount);
+#ifdef SET_STATUS_FLAGS
+      if ((x.w[1] & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN_VAL (res);
+    }
+    // x is 0
+    exponent_x =
+      exponent_x - DECIMAL_EXPONENT_BIAS_128 + DECIMAL_EXPONENT_BIAS_32;
+    if (exponent_x < 0)
+      exponent_x = 0;
+    if (exponent_x > DECIMAL_MAX_EXPON_32)
+      exponent_x = DECIMAL_MAX_EXPON_32;
+    res = (sign_x >> 32) | (exponent_x << 23);
+    BID_RETURN_VAL (res);
+
+  }
+
+  if (CX.w[1] || (CX.w[0] >= 10000000)) {
+    // find number of digits in coefficient
+    // 2^64
+    f64.i = 0x5f800000;
+    // fx ~ CX
+    fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+    bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+    extra_digits = estimate_decimal_digits[bin_expon_cx] - 7;
+    // scale = 38-estimate_decimal_digits[bin_expon_cx];
+    D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+    if (D > 0
+	|| (!D
+	    && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+      extra_digits++;
+
+    exponent_x += extra_digits;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+    if (exponent_x <
+	DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS_32) {
+      uf_check = 1;
+      if (-extra_digits + exponent_x - DECIMAL_EXPONENT_BIAS_128 +
+	  DECIMAL_EXPONENT_BIAS_32 + 35 >= 0) {
+	if (exponent_x ==
+	    DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS_32 - 1) {
+	  T128 = round_const_table_128[rmode][extra_digits];
+	  __add_carry_out (CX1.w[0], carry, T128.w[0], CX.w[0]);
+	  CX1.w[1] = CX.w[1] + T128.w[1] + carry;
+	  if (__unsigned_compare_ge_128
+	      (CX1, power10_table_128[extra_digits + 7]))
+	    uf_check = 0;
+	}
+	extra_digits =
+	  extra_digits + DECIMAL_EXPONENT_BIAS_128 -
+	  DECIMAL_EXPONENT_BIAS_32 - exponent_x;
+	exponent_x =
+	  DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS_32;
+      } else
+	rmode = ROUNDING_TO_ZERO;
+    }
+
+    T128 = round_const_table_128[rmode][extra_digits];
+    __add_carry_out (CX.w[0], carry, T128.w[0], CX.w[0]);
+    CX.w[1] = CX.w[1] + T128.w[1] + carry;
+
+    TP128 = reciprocals10_128[extra_digits];
+    __mul_128x128_full (Qh, Ql, CX, TP128);
+    amount = recip_scale[extra_digits];
+
+    if (amount >= 64) {
+      CX.w[0] = Qh.w[1] >> (amount - 64);
+      CX.w[1] = 0;
+    } else {
+      __shr_128 (CX, Qh, amount);
+    }
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (!(rnd_mode))
+#endif
+      if (CX.w[0] & 1) {
+	// check whether fractional part of initial_P/10^ed1 is exactly .5
+
+	// get remainder
+	__shl_128_long (Qh1, Qh, (128 - amount));
+
+	if (!Qh1.w[1] && !Qh1.w[0]
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0]))) {
+	  CX.w[0]--;
+	}
+      }
+#endif
+
+
+    {
+      status = INEXACT_EXCEPTION;
+      // get remainder
+      __shl_128_long (Qh1, Qh, (128 - amount));
+
+      switch (rmode) {
+      case ROUNDING_TO_NEAREST:
+      case ROUNDING_TIES_AWAY:
+	// test whether fractional part is 0
+	if (Qh1.w[1] == 0x8000000000000000ull && (!Qh1.w[0])
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      case ROUNDING_DOWN:
+      case ROUNDING_TO_ZERO:
+	if ((!Qh1.w[1]) && (!Qh1.w[0])
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      default:
+	// round up
+	__add_carry_out (Stemp.w[0], cy, Ql.w[0],
+			 reciprocals10_128[extra_digits].w[0]);
+	__add_carry_in_out (Stemp.w[1], carry, Ql.w[1],
+			    reciprocals10_128[extra_digits].w[1], cy);
+	__shr_128_long (Qh, Qh1, (128 - amount));
+	Tmp.w[0] = 1;
+	Tmp.w[1] = 0;
+	__shl_128_long (Tmp1, Tmp, amount);
+	Qh.w[0] += carry;
+	if (Qh.w[0] < carry)
+	  Qh.w[1]++;
+	if (__unsigned_compare_ge_128 (Qh, Tmp1))
+	  status = EXACT_STATUS;
+      }
+
+      if (status != EXACT_STATUS) {
+	if (uf_check) {
+	  status |= UNDERFLOW_EXCEPTION;
+	}
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (pfpsf, status);
+#endif
+      }
+    }
+
+  }
+
+  res =
+    get_BID32 ((UINT32) (sign_x >> 32),
+	       exponent_x - DECIMAL_EXPONENT_BIAS_128 +
+	       DECIMAL_EXPONENT_BIAS_32, CX.w[0], rnd_mode, pfpsf);
+  BID_RETURN_VAL (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid32_to_bid64.c b/gcc-4.9/libgcc/config/libbid/bid32_to_bid64.c
new file mode 100644
index 000000000..99eb22799
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid32_to_bid64.c
@@ -0,0 +1,216 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*
+ * Takes a BID32 as input and converts it to a BID64 and returns it.
+ */
+TYPE0_FUNCTION_ARGTYPE1_NORND (UINT64, bid32_to_bid64, UINT32, x)
+
+     UINT64 res;
+     UINT32 sign_x;
+     int exponent_x;
+     UINT32 coefficient_x;
+
+if (!unpack_BID32 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    // Inf, NaN, 0
+if (((x) & 0x78000000) == 0x78000000) {
+  if (((x) & 0x7e000000) == 0x7e000000) {	// sNaN
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  }
+  res = (coefficient_x & 0x000fffff);
+  res *= 1000000000;
+  res |= ((((UINT64) coefficient_x) << 32) & 0xfc00000000000000ull);
+
+  BID_RETURN (res);
+}
+}
+
+res =
+very_fast_get_BID64_small_mantissa (((UINT64) sign_x) << 32,
+				    exponent_x +
+				    DECIMAL_EXPONENT_BIAS -
+				    DECIMAL_EXPONENT_BIAS_32,
+				    (UINT64) coefficient_x);
+BID_RETURN (res);
+}	// convert_bid32_to_bid64
+
+
+/*
+ * Takes a BID64 as input and converts it to a BID32 and returns it.
+ */
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_to_bid32 (UINT32 * pres,
+		UINT64 *
+		px _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		_EXC_INFO_PARAM) {
+  UINT64 x;
+#else
+
+UINT32
+bid64_to_bid32 (UINT64 x _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		_EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 Q;
+  UINT64 sign_x, coefficient_x, remainder_h, carry, Stemp;
+  UINT32 res;
+  int_float tempx;
+  int exponent_x, bin_expon_cx, extra_digits, rmode = 0, amount;
+  unsigned status = 0;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+#endif
+
+  // unpack arguments, check for NaN or Infinity, 0
+  if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    if (((x) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+      res = (coefficient_x & 0x0003ffffffffffffull);
+      res /= 1000000000ull;
+      res |= ((coefficient_x >> 32) & 0xfc000000);
+#ifdef SET_STATUS_FLAGS
+      if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (res);
+    }
+    exponent_x =
+      exponent_x - DECIMAL_EXPONENT_BIAS + DECIMAL_EXPONENT_BIAS_32;
+    if (exponent_x < 0)
+      exponent_x = 0;
+    if (exponent_x > DECIMAL_MAX_EXPON_32)
+      exponent_x = DECIMAL_MAX_EXPON_32;
+    res = (sign_x >> 32) | (exponent_x << 23);
+    BID_RETURN (res);
+  }
+
+  exponent_x =
+    exponent_x - DECIMAL_EXPONENT_BIAS + DECIMAL_EXPONENT_BIAS_32;
+
+  // check number of digits
+  if (coefficient_x >= 10000000) {
+    tempx.d = (float) coefficient_x;
+    bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+    extra_digits = estimate_decimal_digits[bin_expon_cx] - 7;
+    // add test for range
+    if (coefficient_x >= power10_index_binexp[bin_expon_cx])
+      extra_digits++;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+
+    exponent_x += extra_digits;
+    if ((exponent_x < 0) && (exponent_x + MAX_FORMAT_DIGITS_32 >= 0)) {
+      status = UNDERFLOW_EXCEPTION;
+      if (exponent_x == -1)
+	if (coefficient_x + round_const_table[rmode][extra_digits] >=
+	    power10_table_128[extra_digits + 7].w[0])
+	  status = 0;
+      extra_digits -= exponent_x;
+      exponent_x = 0;
+    }
+    coefficient_x += round_const_table[rmode][extra_digits];
+    __mul_64x64_to_128 (Q, coefficient_x,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+
+    coefficient_x = Q.w[1] >> amount;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+      if (coefficient_x & 1) {
+	// check whether fractional part of initial_P/10^extra_digits 
+	// is exactly .5
+
+	// get remainder
+	remainder_h = Q.w[1] << (64 - amount);
+
+	if (!remainder_h && (Q.w[0] < reciprocals10_64[extra_digits]))
+	  coefficient_x--;
+      }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+    {
+      status |= INEXACT_EXCEPTION;
+      // get remainder
+      remainder_h = Q.w[1] << (64 - amount);
+
+      switch (rmode) {
+      case ROUNDING_TO_NEAREST:
+      case ROUNDING_TIES_AWAY:
+	// test whether fractional part is 0
+	if (remainder_h == 0x8000000000000000ull
+	    && (Q.w[0] < reciprocals10_64[extra_digits]))
+	  status = EXACT_STATUS;
+	break;
+      case ROUNDING_DOWN:
+      case ROUNDING_TO_ZERO:
+	if (!remainder_h && (Q.w[0] < reciprocals10_64[extra_digits]))
+	  status = EXACT_STATUS;
+	break;
+      default:
+	// round up
+	__add_carry_out (Stemp, carry, Q.w[0],
+			 reciprocals10_64[extra_digits]);
+	if ((remainder_h >> (64 - amount)) + carry >=
+	    (((UINT64) 1) << amount))
+	  status = EXACT_STATUS;
+      }
+
+      if (status != EXACT_STATUS)
+	__set_status_flags (pfpsf, status);
+    }
+
+#endif
+
+  }
+
+  res =
+    get_BID32 ((UINT32) (sign_x >> 32),
+	       exponent_x, coefficient_x, rnd_mode, pfpsf);
+  BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_add.c b/gcc-4.9/libgcc/config/libbid/bid64_add.c
new file mode 100644
index 000000000..0340119fd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_add.c
@@ -0,0 +1,595 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 add
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *   if(exponent_a < exponent_b)
+ *       switch a, b
+ *   diff_expon = exponent_a - exponent_b
+ *   if(diff_expon > 16)
+ *      return normalize(a)
+ *   if(coefficient_a*10^diff_expon guaranteed below 2^62)
+ *       S = sign_a*coefficient_a*10^diff_expon + sign_b*coefficient_b
+ *       if(|S|<10^16)
+ *           return get_BID64(sign(S),exponent_b,|S|)
+ *       else
+ *          determine number of extra digits in S (1, 2, or 3)
+ *            return rounded result
+ *   else // large exponent difference
+ *       if(number_digits(coefficient_a*10^diff_expon) +/- 10^16)
+ *          guaranteed the same as
+ *          number_digits(coefficient_a*10^diff_expon) )
+ *           S = normalize(coefficient_a + (sign_a^sign_b)*10^(16-diff_expon))
+ *           corr = 10^16 + (sign_a^sign_b)*coefficient_b
+ *           corr*10^exponent_b is rounded so it aligns with S*10^exponent_S
+ *           return get_BID64(sign_a,exponent(S),S+rounded(corr))
+ *       else
+ *         add sign_a*coefficient_a*10^diff_expon, sign_b*coefficient_b
+ *             in 128-bit integer arithmetic, then round to 16 decimal digits
+ *           
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+#if DECIMAL_CALL_BY_REFERENCE
+void bid64_add (UINT64 * pres, UINT64 * px,
+		UINT64 *
+		py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		_EXC_INFO_PARAM);
+#else
+UINT64 bid64_add (UINT64 x,
+		  UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_sub (UINT64 * pres, UINT64 * px,
+	   UINT64 *
+	   py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	   _EXC_INFO_PARAM) {
+  UINT64 y = *py;
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  // check if y is not NaN
+  if (((y & NAN_MASK64) != NAN_MASK64))
+    y ^= 0x8000000000000000ull;
+  bid64_add (pres, px,
+	     &y _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+	     _EXC_INFO_ARG);
+}
+#else
+
+UINT64
+bid64_sub (UINT64 x,
+	   UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  // check if y is not NaN
+  if (((y & NAN_MASK64) != NAN_MASK64))
+    y ^= 0x8000000000000000ull;
+
+  return bid64_add (x,
+		    y _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		    _EXC_INFO_ARG);
+}
+#endif
+
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_add (UINT64 * pres, UINT64 * px,
+	   UINT64 *
+	   py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	   _EXC_INFO_PARAM) {
+  UINT64 x, y;
+#else
+
+UINT64
+bid64_add (UINT64 x,
+	   UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 CA, CT, CT_new;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y, C64_new;
+  UINT64 valid_x, valid_y;
+  UINT64 res;
+  UINT64 sign_a, sign_b, coefficient_a, coefficient_b, sign_s, sign_ab,
+    rem_a;
+  UINT64 saved_ca, saved_cb, C0_64, C64, remainder_h, T1, carry, tmp;
+  int_double tempx;
+  int exponent_x, exponent_y, exponent_a, exponent_b, diff_dec_expon;
+  int bin_expon_ca, extra_digits, amount, scale_k, scale_ca;
+  unsigned rmode, status;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  y = *py;
+#endif
+
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+  valid_y = unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y);
+
+  // unpack arguments, check for NaN or Infinity
+  if (!valid_x) {
+    // x is Inf. or NaN
+
+    // test if x is NaN
+    if ((x & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+      if (((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	  || ((y & SNAN_MASK64) == SNAN_MASK64))
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = coefficient_x & QUIET_MASK64;
+      BID_RETURN (res);
+    }
+    // x is Infinity?
+    if ((x & INFINITY_MASK64) == INFINITY_MASK64) {
+      // check if y is Inf
+      if (((y & NAN_MASK64) == INFINITY_MASK64)) {
+	if (sign_x == (y & 0x8000000000000000ull)) {
+	  res = coefficient_x;
+	  BID_RETURN (res);
+	}
+	// return NaN
+	{
+#ifdef SET_STATUS_FLAGS
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  res = NAN_MASK64;
+	  BID_RETURN (res);
+	}
+      }
+      // check if y is NaN
+      if (((y & NAN_MASK64) == NAN_MASK64)) {
+	res = coefficient_y & QUIET_MASK64;
+#ifdef SET_STATUS_FLAGS
+	if (((y & SNAN_MASK64) == SNAN_MASK64))
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	BID_RETURN (res);
+      }
+      // otherwise return +/-Inf
+      {
+	res = coefficient_x;
+	BID_RETURN (res);
+      }
+    }
+    // x is 0
+    {
+      if (((y & INFINITY_MASK64) != INFINITY_MASK64) && coefficient_y) {
+	if (exponent_y <= exponent_x) {
+	  res = y;
+	  BID_RETURN (res);
+	}
+      }
+    }
+
+  }
+  if (!valid_y) {
+    // y is Inf. or NaN?
+    if (((y & INFINITY_MASK64) == INFINITY_MASK64)) {
+#ifdef SET_STATUS_FLAGS
+      if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = coefficient_y & QUIET_MASK64;
+      BID_RETURN (res);
+    }
+    // y is 0
+    if (!coefficient_x) {	// x==0
+      if (exponent_x <= exponent_y)
+	res = ((UINT64) exponent_x) << 53;
+      else
+	res = ((UINT64) exponent_y) << 53;
+      if (sign_x == sign_y)
+	res |= sign_x;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rnd_mode == ROUNDING_DOWN && sign_x != sign_y)
+	res |= 0x8000000000000000ull;
+#endif
+#endif
+      BID_RETURN (res);
+    } else if (exponent_y >= exponent_x) {
+      res = x;
+      BID_RETURN (res);
+    }
+  }
+  // sort arguments by exponent
+  if (exponent_x < exponent_y) {
+    sign_a = sign_y;
+    exponent_a = exponent_y;
+    coefficient_a = coefficient_y;
+    sign_b = sign_x;
+    exponent_b = exponent_x;
+    coefficient_b = coefficient_x;
+  } else {
+    sign_a = sign_x;
+    exponent_a = exponent_x;
+    coefficient_a = coefficient_x;
+    sign_b = sign_y;
+    exponent_b = exponent_y;
+    coefficient_b = coefficient_y;
+  }
+
+  // exponent difference
+  diff_dec_expon = exponent_a - exponent_b;
+
+  /* get binary coefficients of x and y */
+
+  //--- get number of bits in the coefficients of x and y ---
+
+  // version 2 (original)
+  tempx.d = (double) coefficient_a;
+  bin_expon_ca = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+
+  if (diff_dec_expon > MAX_FORMAT_DIGITS) {
+    // normalize a to a 16-digit coefficient
+
+    scale_ca = estimate_decimal_digits[bin_expon_ca];
+    if (coefficient_a >= power10_table_128[scale_ca].w[0])
+      scale_ca++;
+
+    scale_k = 16 - scale_ca;
+
+    coefficient_a *= power10_table_128[scale_k].w[0];
+
+    diff_dec_expon -= scale_k;
+    exponent_a -= scale_k;
+
+    /* get binary coefficients of x and y */
+
+    //--- get number of bits in the coefficients of x and y ---
+    tempx.d = (double) coefficient_a;
+    bin_expon_ca = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+
+    if (diff_dec_expon > MAX_FORMAT_DIGITS) {
+#ifdef SET_STATUS_FLAGS
+      if (coefficient_b) {
+	__set_status_flags (pfpsf, INEXACT_EXCEPTION);
+      }
+#endif
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (((rnd_mode) & 3) && coefficient_b)	// not ROUNDING_TO_NEAREST
+      {
+	switch (rnd_mode) {
+	case ROUNDING_DOWN:
+	  if (sign_b) {
+	    coefficient_a -= ((((SINT64) sign_a) >> 63) | 1);
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    } else if (coefficient_a >= 10000000000000000ull) {
+	      exponent_a++;
+	      coefficient_a = 1000000000000000ull;
+	    }
+	  }
+	  break;
+	case ROUNDING_UP:
+	  if (!sign_b) {
+	    coefficient_a += ((((SINT64) sign_a) >> 63) | 1);
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    } else if (coefficient_a >= 10000000000000000ull) {
+	      exponent_a++;
+	      coefficient_a = 1000000000000000ull;
+	    }
+	  }
+	  break;
+	default:	// RZ
+	  if (sign_a != sign_b) {
+	    coefficient_a--;
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    }
+	  }
+	  break;
+	}
+      } else
+#endif
+#endif
+	// check special case here
+	if ((coefficient_a == 1000000000000000ull)
+	    && (diff_dec_expon == MAX_FORMAT_DIGITS + 1)
+	    && (sign_a ^ sign_b)
+	    && (coefficient_b > 5000000000000000ull)) {
+	coefficient_a = 9999999999999999ull;
+	exponent_a--;
+      }
+
+      res =
+	fast_get_BID64_check_OF (sign_a, exponent_a, coefficient_a,
+				 rnd_mode, pfpsf);
+      BID_RETURN (res);
+    }
+  }
+  // test whether coefficient_a*10^(exponent_a-exponent_b)  may exceed 2^62
+  if (bin_expon_ca + estimate_bin_expon[diff_dec_expon] < 60) {
+    // coefficient_a*10^(exponent_a-exponent_b)<2^63
+
+    // multiply by 10^(exponent_a-exponent_b)
+    coefficient_a *= power10_table_128[diff_dec_expon].w[0];
+
+    // sign mask
+    sign_b = ((SINT64) sign_b) >> 63;
+    // apply sign to coeff. of b
+    coefficient_b = (coefficient_b + sign_b) ^ sign_b;
+
+    // apply sign to coefficient a
+    sign_a = ((SINT64) sign_a) >> 63;
+    coefficient_a = (coefficient_a + sign_a) ^ sign_a;
+
+    coefficient_a += coefficient_b;
+    // get sign
+    sign_s = ((SINT64) coefficient_a) >> 63;
+    coefficient_a = (coefficient_a + sign_s) ^ sign_s;
+    sign_s &= 0x8000000000000000ull;
+
+    // coefficient_a < 10^16 ?
+    if (coefficient_a < power10_table_128[MAX_FORMAT_DIGITS].w[0]) {
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rnd_mode == ROUNDING_DOWN && (!coefficient_a)
+	  && sign_a != sign_b)
+	sign_s = 0x8000000000000000ull;
+#endif
+#endif
+      res = very_fast_get_BID64 (sign_s, exponent_b, coefficient_a);
+      BID_RETURN (res);
+    }
+    // otherwise rounding is necessary
+
+    // already know coefficient_a<10^19
+    // coefficient_a < 10^17 ?
+    if (coefficient_a < power10_table_128[17].w[0])
+      extra_digits = 1;
+    else if (coefficient_a < power10_table_128[18].w[0])
+      extra_digits = 2;
+    else
+      extra_digits = 3;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_s && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+    coefficient_a += round_const_table[rmode][extra_digits];
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_64x64_to_128 (CT, coefficient_a,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+    C64 = CT.w[1] >> amount;
+
+  } else {
+    // coefficient_a*10^(exponent_a-exponent_b) is large
+    sign_s = sign_a;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_s && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+
+    // check whether we can take faster path
+    scale_ca = estimate_decimal_digits[bin_expon_ca];
+
+    sign_ab = sign_a ^ sign_b;
+    sign_ab = ((SINT64) sign_ab) >> 63;
+
+    // T1 = 10^(16-diff_dec_expon)
+    T1 = power10_table_128[16 - diff_dec_expon].w[0];
+
+    // get number of digits in coefficient_a
+    if (coefficient_a >= power10_table_128[scale_ca].w[0]) {
+      scale_ca++;
+    }
+
+    scale_k = 16 - scale_ca;
+
+    // addition
+    saved_ca = coefficient_a - T1;
+    coefficient_a =
+      (SINT64) saved_ca *(SINT64) power10_table_128[scale_k].w[0];
+    extra_digits = diff_dec_expon - scale_k;
+
+    // apply sign
+    saved_cb = (coefficient_b + sign_ab) ^ sign_ab;
+    // add 10^16 and rounding constant
+    coefficient_b =
+      saved_cb + 10000000000000000ull +
+      round_const_table[rmode][extra_digits];
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_64x64_to_128 (CT, coefficient_b,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+    C0_64 = CT.w[1] >> amount;
+
+    // result coefficient 
+    C64 = C0_64 + coefficient_a;
+    // filter out difficult (corner) cases
+    // this test ensures the number of digits in coefficient_a does not change 
+    // after adding (the appropriately scaled and rounded) coefficient_b
+    if ((UINT64) (C64 - 1000000000000000ull - 1) >
+	9000000000000000ull - 2) {
+      if (C64 >= 10000000000000000ull) {
+	// result has more than 16 digits
+	if (!scale_k) {
+	  // must divide coeff_a by 10
+	  saved_ca = saved_ca + T1;
+	  __mul_64x64_to_128 (CA, saved_ca, 0x3333333333333334ull);
+	  //reciprocals10_64[1]);
+	  coefficient_a = CA.w[1] >> 1;
+	  rem_a =
+	    saved_ca - (coefficient_a << 3) - (coefficient_a << 1);
+	  coefficient_a = coefficient_a - T1;
+
+	  saved_cb += rem_a * power10_table_128[diff_dec_expon].w[0];
+	} else
+	  coefficient_a =
+	    (SINT64) (saved_ca - T1 -
+		      (T1 << 3)) * (SINT64) power10_table_128[scale_k -
+							      1].w[0];
+
+	extra_digits++;
+	coefficient_b =
+	  saved_cb + 100000000000000000ull +
+	  round_const_table[rmode][extra_digits];
+
+	// get P*(2^M[extra_digits])/10^extra_digits
+	__mul_64x64_to_128 (CT, coefficient_b,
+			    reciprocals10_64[extra_digits]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+	amount = short_recip_scale[extra_digits];
+	C0_64 = CT.w[1] >> amount;
+
+	// result coefficient 
+	C64 = C0_64 + coefficient_a;
+      } else if (C64 <= 1000000000000000ull) {
+	// less than 16 digits in result
+	coefficient_a =
+	  (SINT64) saved_ca *(SINT64) power10_table_128[scale_k +
+							1].w[0];
+	//extra_digits --;
+	exponent_b--;
+	coefficient_b =
+	  (saved_cb << 3) + (saved_cb << 1) + 100000000000000000ull +
+	  round_const_table[rmode][extra_digits];
+
+	// get P*(2^M[extra_digits])/10^extra_digits
+	__mul_64x64_to_128 (CT_new, coefficient_b,
+			    reciprocals10_64[extra_digits]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+	amount = short_recip_scale[extra_digits];
+	C0_64 = CT_new.w[1] >> amount;
+
+	// result coefficient 
+	C64_new = C0_64 + coefficient_a;
+	if (C64_new < 10000000000000000ull) {
+	  C64 = C64_new;
+#ifdef SET_STATUS_FLAGS
+	  CT = CT_new;
+#endif
+	} else
+	  exponent_b++;
+      }
+
+    }
+
+  }
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+    if (C64 & 1) {
+      // check whether fractional part of initial_P/10^extra_digits is 
+      // exactly .5
+      // this is the same as fractional part of 
+      //      (initial_P + 0.5*10^extra_digits)/10^extra_digits is exactly zero
+
+      // get remainder
+      remainder_h = CT.w[1] << (64 - amount);
+
+      // test whether fractional part is 0
+      if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits])) {
+	C64--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+  status = INEXACT_EXCEPTION;
+
+  // get remainder
+  remainder_h = CT.w[1] << (64 - amount);
+
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:
+  case ROUNDING_TIES_AWAY:
+    // test whether fractional part is 0
+    if ((remainder_h == 0x8000000000000000ull)
+	&& (CT.w[0] < reciprocals10_64[extra_digits]))
+      status = EXACT_STATUS;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits]))
+      status = EXACT_STATUS;
+    //if(!C64 && rmode==ROUNDING_DOWN) sign_s=sign_y;
+    break;
+  default:
+    // round up
+    __add_carry_out (tmp, carry, CT.w[0],
+		     reciprocals10_64[extra_digits]);
+    if ((remainder_h >> (64 - amount)) + carry >=
+	(((UINT64) 1) << amount))
+      status = EXACT_STATUS;
+    break;
+  }
+  __set_status_flags (pfpsf, status);
+
+#endif
+
+  res =
+    fast_get_BID64_check_OF (sign_s, exponent_b + extra_digits, C64,
+			     rnd_mode, pfpsf);
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_compare.c b/gcc-4.9/libgcc/config/libbid/bid64_compare.c
new file mode 100644
index 000000000..071632c6e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_compare.c
@@ -0,0 +1,3172 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+static const UINT64 mult_factor[16] = {
+  1ull, 10ull, 100ull, 1000ull,
+  10000ull, 100000ull, 1000000ull, 10000000ull,
+  100000000ull, 1000000000ull, 10000000000ull, 100000000000ull,
+  1000000000000ull, 10000000000000ull,
+  100000000000000ull, 1000000000000000ull
+};
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_equal (int *pres, UINT64 * px,
+		   UINT64 *
+		   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_equal (UINT64 x,
+		   UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		   _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y, exp_t;
+  UINT64 sig_x, sig_y, sig_t;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y, lcv;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equivalent.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if (((x & MASK_INF) == MASK_INF) && ((y & MASK_INF) == MASK_INF)) {
+    res = (((x ^ y) & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // ONE INFINITY (CASE3')
+  if (((x & MASK_INF) == MASK_INF) || ((y & MASK_INF) == MASK_INF)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //    therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  } else if ((x_is_zero && !y_is_zero) || (!x_is_zero && y_is_zero)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ => not equal : return 0
+  if ((x ^ y) & MASK_SIGN) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    SWAP (exp_x, exp_y, exp_t);	// put the larger exp in y,
+    SWAP (sig_x, sig_y, sig_t);	// and the smaller exp in x
+  }
+  if (exp_y - exp_x > 15) {
+    res = 0;	// difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  for (lcv = 0; lcv < (exp_y - exp_x); lcv++) {
+    // recalculate y's significand upwards
+    sig_y = sig_y * 10;
+    if (sig_y > 9999999999999999ull) {
+      res = 0;
+      BID_RETURN (res);
+    }
+  }
+  res = (sig_y == sig_x);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_greater (int *pres, UINT64 * px,
+		     UINT64 *
+		     py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_greater (UINT64 x,
+		     UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, rather than equal : 
+  // return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return 0
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 0;
+      BID_RETURN (res);
+    } else {
+      // x is pos infinity, it is greater, unless y is positive 
+      // infinity => return y!=pos_infinity
+      res = (((y & MASK_INF) != MASK_INF)
+	     || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  //(+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //(ZERO x 10^A == ZERO x 10^B) for any valid A, B => therefore ignore the 
+  // exponent field
+  // (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x > exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x < exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {	// difference cannot be greater than 10^15
+    if (x & MASK_SIGN)	// if both are negative
+      res = 0;
+    else	// if both are positive
+      res = 1;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    if (x & MASK_SIGN)	// if both are negative
+      res = 1;
+    else	// if both are positive
+      res = 0;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // if postitive, return whichever significand is larger (converse if neg.)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    res = (((sig_n_prime.w[1] > 0)
+	    || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // if postitive, return whichever significand is larger 
+  //     (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  res = (((sig_n_prime.w[1] == 0)
+	  && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_greater_equal (int *pres, UINT64 * px,
+			   UINT64 *
+			   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_greater_equal (UINT64 x,
+			   UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			   _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 1
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      // x is -inf, so it is less than y unless y is -inf
+      res = (((y & MASK_INF) == MASK_INF)
+	     && (y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    } else {	// x is pos_inf, no way for it to be less than y
+      res = 1;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  // (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //   therefore ignore the exponent field
+  //  (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, they are equal
+    res = 1;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // if x is zero, it is lessthan if Y is positive
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // if y is zero, X is less if it is negative
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    // difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    // (converse if negative)
+    res = (((sig_n_prime.w[1] == 0)
+	    && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) !=
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  // (converse if negative)
+  res = (((sig_n_prime.w[1] > 0)
+	  || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) !=
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_greater_unordered (int *pres, UINT64 * px,
+			       UINT64 *
+			       py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_greater_unordered (UINT64 x,
+			       UINT64 y _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, rather than equal : 
+  // return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return 0
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 0;
+      BID_RETURN (res);
+    } else {
+      // x is pos infinity, it is greater, unless y is positive infinity => 
+      // return y!=pos_infinity
+      res = (((y & MASK_INF) != MASK_INF)
+	     || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  // (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  // therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    // difference cannot be greater than 10^15
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    res = (((sig_n_prime.w[1] > 0)
+	    || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // if postitive, return whichever significand is larger (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  res = (((sig_n_prime.w[1] == 0)
+	  && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_less (int *pres, UINT64 * px,
+		  UINT64 *
+		  py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_less (UINT64 x,
+		  UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		  _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?0:1; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      // x is -inf, so it is less than y unless y is -inf
+      res = (((y & MASK_INF) != MASK_INF)
+	     || (y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    } else {
+      // x is pos_inf, no way for it to be less than y
+      res = 0;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  // (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //  therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, they are equal
+    res = 0;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // if x is zero, it is lessthan if Y is positive
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // if y is zero, X is less if it is negative
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    // difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    // (converse if negative)
+    res = (((sig_n_prime.w[1] == 0)
+	    && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  // (converse if negative)
+  res = (((sig_n_prime.w[1] > 0)
+	  || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_less_equal (int *pres, UINT64 * px,
+			UINT64 *
+			py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_less_equal (UINT64 x,
+			UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, rather than equal : 
+  //     return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (LESSEQUAL).
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      // if x is neg infinity, it must be lessthan or equal to y return 1
+      res = 1;
+      BID_RETURN (res);
+    } else {
+      // x is pos infinity, it is greater, unless y is positive infinity => 
+      // return y==pos_infinity
+      res = !(((y & MASK_INF) != MASK_INF)
+	      || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 1
+    //                 if y is negative infinity, then x is greater, return 0
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  // (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //     therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, they are equal -> return 1
+    res = 1;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // if x is zero, it is lessthan if Y is positive
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // if y is zero, X is less if it is negative
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    // difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    res = (((sig_n_prime.w[1] == 0)
+	    && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // return 1 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  res = (((sig_n_prime.w[1] > 0)
+	  || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_less_unordered (int *pres, UINT64 * px,
+			    UINT64 *
+			    py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			    _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_less_unordered (UINT64 x,
+			    UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			    _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?0:1; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      // x is -inf, so it is less than y unless y is -inf
+      res = (((y & MASK_INF) != MASK_INF)
+	     || (y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    } else {
+      // x is pos_inf, no way for it to be less than y
+      res = 0;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  // (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //     therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, they are equal
+    res = 0;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // if x is zero, it is lessthan if Y is positive
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // if y is zero, X is less if it is negative
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    // difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    res = (((sig_n_prime.w[1] == 0)
+	    && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  res = (((sig_n_prime.w[1] > 0)
+	  || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN));
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_not_equal (int *pres, UINT64 * px,
+		       UINT64 *
+		       py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_not_equal (UINT64 x,
+		       UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y, exp_t;
+  UINT64 sig_x, sig_y, sig_t;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y, lcv;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 1
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equivalent.
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if (((x & MASK_INF) == MASK_INF) && ((y & MASK_INF) == MASK_INF)) {
+    res = (((x ^ y) & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // ONE INFINITY (CASE3')
+  if (((x & MASK_INF) == MASK_INF) || ((y & MASK_INF) == MASK_INF)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  } else if ((x_is_zero && !y_is_zero) || (!x_is_zero && y_is_zero)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ => not equal : return 1
+  if ((x ^ y) & MASK_SIGN) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    SWAP (exp_x, exp_y, exp_t);	// put the larger exp in y,
+    SWAP (sig_x, sig_y, sig_t);	// and the smaller exp in x
+  }
+
+  if (exp_y - exp_x > 15) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^16
+
+  for (lcv = 0; lcv < (exp_y - exp_x); lcv++) {
+
+    // recalculate y's significand upwards
+    sig_y = sig_y * 10;
+    if (sig_y > 9999999999999999ull) {
+      res = 1;
+      BID_RETURN (res);
+    }
+  }
+
+  {
+    res = sig_y != sig_x;
+    BID_RETURN (res);
+  }
+
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_not_greater (int *pres, UINT64 * px,
+			 UINT64 *
+			 py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_not_greater (UINT64 x,
+			 UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  //   rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (LESSEQUAL).
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, it must be lessthan or equal to y return 1
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, it is greater, unless y is positive 
+    // infinity => return y==pos_infinity
+    else {
+      res = !(((y & MASK_INF) != MASK_INF)
+	      || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 1
+    //                 if y is negative infinity, then x is greater, return 0
+    {
+      res = ((y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither 
+  //         number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //         therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal -> return 1
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 1 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_not_less (int *pres, UINT64 * px,
+		      UINT64 *
+		      py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_not_less (UINT64 x,
+		      UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 1
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN)
+      // x is -inf, so it is less than y unless y is -inf
+    {
+      res = (((y & MASK_INF) == MASK_INF)
+	     && (y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    } else
+      // x is pos_inf, no way for it to be less than y
+    {
+      res = 1;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    {
+      res = ((y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither 
+  //        number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_ordered (int *pres, UINT64 * px,
+		     UINT64 *
+		     py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_ordered (UINT64 x,
+		     UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is ordered, rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 0;
+    BID_RETURN (res);
+  } else {
+    res = 1;
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_quiet_unordered (int *pres, UINT64 * px,
+		       UINT64 *
+		       py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_quiet_unordered (UINT64 x,
+		       UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  //     rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    if ((x & MASK_SNAN) == MASK_SNAN || (y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if sNaN
+    }
+    res = 1;
+    BID_RETURN (res);
+  } else {
+    res = 0;
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_greater (int *pres, UINT64 * px,
+			 UINT64 *
+			 py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_greater (UINT64 x,
+			 UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  //     rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return 0
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, it is greater, 
+    // unless y is positive infinity => return y!=pos_infinity
+    else {
+      res = (((y & MASK_INF) != MASK_INF)
+	     || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    {
+      res = ((y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // is x is zero, it is greater if Y is negative
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // is y is zero, X is greater if it is positive
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+
+    // if postitive, return whichever significand is larger 
+    //     (converse if negative)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+
+    {
+      res = (((sig_n_prime.w[1] > 0)
+	      || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if postitive, return whichever significand is larger 
+  //     (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  {
+    res = (((sig_n_prime.w[1] == 0)
+	    && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_greater_equal (int *pres, UINT64 * px,
+			       UINT64 *
+			       py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_greater_equal (UINT64 x,
+			       UINT64 y _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 1
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN)
+      // x is -inf, so it is less than y unless y is -inf
+    {
+      res = (((y & MASK_INF) == MASK_INF)
+	     && (y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    } else
+      // x is pos_inf, no way for it to be less than y
+    {
+      res = 1;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    {
+      res = ((y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_greater_unordered (int *pres, UINT64 * px,
+				   UINT64 *
+				   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_greater_unordered (UINT64 x,
+				   UINT64 y _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return 0
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, it is greater, 
+    // unless y is positive infinity => return y!=pos_infinity
+    else {
+      res = (((y & MASK_INF) != MASK_INF)
+	     || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 0
+    //                 if y is negative infinity, then x is greater, return 1
+    {
+      res = ((y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // is x is zero, it is greater if Y is negative
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // is y is zero, X is greater if it is positive
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // if postitive, return whichever significand is larger 
+    //     (converse if negative)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+
+    {
+      res = (((sig_n_prime.w[1] > 0)
+	      || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if postitive, return whichever significand is larger 
+  //     (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  {
+    res = (((sig_n_prime.w[1] == 0)
+	    && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_less (int *pres, UINT64 * px,
+		      UINT64 *
+		      py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_less (UINT64 x,
+		      UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?0:1; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN)
+      // x is -inf, so it is less than y unless y is -inf
+    {
+      res = (((y & MASK_INF) != MASK_INF)
+	     || (y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    } else
+      // x is pos_inf, no way for it to be less than y
+    {
+      res = 0;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    {
+      res = ((y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_less_equal (int *pres, UINT64 * px,
+			    UINT64 *
+			    py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			    _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_less_equal (UINT64 x,
+			    UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			    _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 0;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (LESSEQUAL).
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, it must be lessthan or equal to y return 1
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, it is greater, 
+    // unless y is positive infinity => return y==pos_infinity
+    else {
+      res = !(((y & MASK_INF) != MASK_INF)
+	      || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 1
+    //                 if y is negative infinity, then x is greater, return 0
+    {
+      res = ((y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal -> return 1
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 1 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_less_unordered (int *pres, UINT64 * px,
+				UINT64 *
+				py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_less_unordered (UINT64 x,
+				UINT64 y _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?0:1; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN)
+      // x is -inf, so it is less than y unless y is -inf
+    {
+      res = (((y & MASK_INF) != MASK_INF)
+	     || (y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    } else
+      // x is pos_inf, no way for it to be less than y
+    {
+      res = 0;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    {
+      res = ((y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal
+  if (x_is_zero && y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 0;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_not_greater (int *pres, UINT64 * px,
+			     UINT64 *
+			     py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_not_greater (UINT64 x,
+			     UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			     _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered, 
+  // rather than equal : return 0
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (LESSEQUAL).
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, it must be lessthan or equal to y return 1
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, it is greater, 
+    // unless y is positive infinity => return y==pos_infinity
+    else {
+      res = !(((y & MASK_INF) != MASK_INF)
+	      || ((y & MASK_SIGN) == MASK_SIGN));
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return 1
+    //                 if y is negative infinity, then x is greater, return 0
+    {
+      res = ((y & MASK_SIGN) != MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal -> return 1
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 1 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 1 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_signaling_not_less (int *pres, UINT64 * px,
+			  UINT64 *
+			  py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			  _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_signaling_not_less (UINT64 x,
+			  UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			  _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0, non_canon_x, non_canon_y;
+
+  // NaN (CASE1)
+  // if either number is NAN, the comparison is unordered : return 1
+  if (((x & MASK_NAN) == MASK_NAN) || ((y & MASK_NAN) == MASK_NAN)) {
+    *pfpsf |= INVALID_EXCEPTION;	// set invalid exception if NaN
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, { res = (y == neg_inf)?1:0; BID_RETURN (res) }
+    if ((x & MASK_SIGN) == MASK_SIGN)
+      // x is -inf, so it is less than y unless y is -inf
+    {
+      res = (((y & MASK_INF) == MASK_INF)
+	     && (y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    } else
+      // x is pos_inf, no way for it to be less than y
+    {
+      res = 1;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    {
+      res = ((y & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull) {
+      non_canon_x = 1;
+    } else {
+      non_canon_x = 0;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    non_canon_x = 0;
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull) {
+      non_canon_y = 1;
+    } else {
+      non_canon_y = 0;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    non_canon_y = 0;
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  // (+ZERO==-ZERO) => therefore ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //      therefore ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (non_canon_x || sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (non_canon_y || sig_y == 0) {
+    y_is_zero = 1;
+  }
+  // if both numbers are zero, they are equal
+  if (x_is_zero && y_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if x is zero, it is lessthan if Y is positive
+  else if (x_is_zero) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, X is less if it is negative
+  else if (y_is_zero) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is less than if y is positive
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // difference cannot be greater than 10^15
+
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // return 0 if values are equal
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = 1;
+      BID_RETURN (res);
+    }
+    // if postitive, return whichever significand abs is smaller 
+    //     (converse if negative)
+    {
+      res = (((sig_n_prime.w[1] == 0)
+	      && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+      BID_RETURN (res);
+    }
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // return 0 if values are equal
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if positive, return whichever significand abs is smaller 
+  //     (converse if negative)
+  {
+    res = (((sig_n_prime.w[1] > 0)
+	    || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) !=
+					      MASK_SIGN));
+    BID_RETURN (res);
+  }
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_div.c b/gcc-4.9/libgcc/config/libbid/bid64_div.c
new file mode 100644
index 000000000..9a6379074
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_div.c
@@ -0,0 +1,1795 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 divide
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  if(coefficient_x<coefficient_y)
+ *    p = number_digits(coefficient_y) - number_digits(coefficient_x)
+ *    A = coefficient_x*10^p
+ *    B = coefficient_y
+ *    CA= A*10^(15+j), j=0 for A>=B, 1 otherwise
+ *    Q = 0
+ *  else
+ *    get Q=(int)(coefficient_x/coefficient_y) 
+ *        (based on double precision divide)
+ *    check for exact divide case
+ *    Let R = coefficient_x - Q*coefficient_y
+ *    Let m=16-number_digits(Q)
+ *    CA=R*10^m, Q=Q*10^m
+ *    B = coefficient_y
+ *  endif
+ *    if (CA<2^64)
+ *      Q += CA/B  (64-bit unsigned divide)
+ *    else 
+ *      get final Q using double precision divide, followed by 3 integer 
+ *          iterations
+ *    if exact result, eliminate trailing zeros
+ *    check for underflow
+ *    round coefficient to nearest
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+#include "bid_div_macros.h"
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+#include <fenv.h>
+
+#define FE_ALL_FLAGS FE_INVALID|FE_DIVBYZERO|FE_OVERFLOW|FE_UNDERFLOW|FE_INEXACT
+#endif
+
+extern UINT32 convert_table[5][128][2];
+extern SINT8 factors[][2];
+extern UINT8 packed_10000_zeros[];
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_div (UINT64 * pres, UINT64 * px,
+	   UINT64 *
+	   py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	   _EXC_INFO_PARAM) {
+  UINT64 x, y;
+#else
+
+UINT64
+bid64_div (UINT64 x,
+	   UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CA, CT;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y, A, B, QX, PD;
+  UINT64 A2, Q, Q2, B2, B4, B5, R, T, DU, res;
+  UINT64 valid_x, valid_y;
+  SINT64 D;
+  int_double t_scale, tempq, temp_b;
+  int_float tempx, tempy;
+  double da, db, dq, da_h, da_l;
+  int exponent_x, exponent_y, bin_expon_cx;
+  int diff_expon, ed1, ed2, bin_index;
+  int rmode, amount;
+  int nzeros, i, j, k, d5;
+  UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  fexcept_t binaryflags = 0;
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  y = *py;
+#endif
+
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+  valid_y = unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y);
+
+  // unpack arguments, check for NaN or Infinity
+  if (!valid_x) {
+    // x is Inf. or NaN
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // test if x is NaN
+    if ((x & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+      if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (coefficient_x & QUIET_MASK64);
+    }
+    // x is Infinity?
+    if ((x & INFINITY_MASK64) == INFINITY_MASK64) {
+      // check if y is Inf or NaN
+      if ((y & INFINITY_MASK64) == INFINITY_MASK64) {
+	// y==Inf, return NaN 
+	if ((y & NAN_MASK64) == INFINITY_MASK64) {	// Inf/Inf
+#ifdef SET_STATUS_FLAGS
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  BID_RETURN (NAN_MASK64);
+	}
+      } else {
+	// otherwise return +/-Inf
+	BID_RETURN (((x ^ y) & 0x8000000000000000ull) |
+		    INFINITY_MASK64);
+      }
+    }
+    // x==0
+    if (((y & INFINITY_MASK64) != INFINITY_MASK64)
+	&& !(coefficient_y)) {
+      // y==0 , return NaN
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (NAN_MASK64);
+    }
+    if (((y & INFINITY_MASK64) != INFINITY_MASK64)) {
+      if ((y & SPECIAL_ENCODING_MASK64) == SPECIAL_ENCODING_MASK64)
+	exponent_y = ((UINT32) (y >> 51)) & 0x3ff;
+      else
+	exponent_y = ((UINT32) (y >> 53)) & 0x3ff;
+      sign_y = y & 0x8000000000000000ull;
+
+      exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+      if (exponent_x > DECIMAL_MAX_EXPON_64)
+	exponent_x = DECIMAL_MAX_EXPON_64;
+      else if (exponent_x < 0)
+	exponent_x = 0;
+      BID_RETURN ((sign_x ^ sign_y) | (((UINT64) exponent_x) << 53));
+    }
+
+  }
+  if (!valid_y) {
+    // y is Inf. or NaN
+
+    // test if y is NaN
+    if ((y & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+      if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (coefficient_y & QUIET_MASK64);
+    }
+    // y is Infinity?
+    if ((y & INFINITY_MASK64) == INFINITY_MASK64) {
+      // return +/-0
+      BID_RETURN (((x ^ y) & 0x8000000000000000ull));
+    }
+    // y is 0
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+    BID_RETURN ((sign_x ^ sign_y) | INFINITY_MASK64);
+  }
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+
+  if (coefficient_x < coefficient_y) {
+    // get number of decimal digits for c_x, c_y
+
+    //--- get number of bits in the coefficients of x and y ---
+    tempx.d = (float) coefficient_x;
+    tempy.d = (float) coefficient_y;
+    bin_index = (tempy.i - tempx.i) >> 23;
+
+    A = coefficient_x * power10_index_binexp[bin_index];
+    B = coefficient_y;
+
+    temp_b.d = (double) B;
+
+    // compare A, B
+    DU = (A - B) >> 63;
+    ed1 = 15 + (int) DU;
+    ed2 = estimate_decimal_digits[bin_index] + ed1;
+    T = power10_table_128[ed1].w[0];
+    __mul_64x64_to_128 (CA, A, T);
+
+    Q = 0;
+    diff_expon = diff_expon - ed2;
+
+    // adjust double precision db, to ensure that later A/B - (int)(da/db) > -1
+    if (coefficient_y < 0x0020000000000000ull) {
+      temp_b.i += 1;
+      db = temp_b.d;
+    } else
+      db = (double) (B + 2 + (B & 1));
+
+  } else {
+    // get c_x/c_y
+
+    //  set last bit before conversion to DP
+    A2 = coefficient_x | 1;
+    da = (double) A2;
+
+    db = (double) coefficient_y;
+
+    tempq.d = da / db;
+    Q = (UINT64) tempq.d;
+
+    R = coefficient_x - coefficient_y * Q;
+
+    // will use to get number of dec. digits of Q
+    bin_expon_cx = (tempq.i >> 52) - 0x3ff;
+
+    // R<0 ?
+    D = ((SINT64) R) >> 63;
+    Q += D;
+    R += (coefficient_y & D);
+
+    // exact result ?
+    if (((SINT64) R) <= 0) {
+      // can have R==-1 for coeff_y==1
+      res =
+	get_BID64 (sign_x ^ sign_y, diff_expon, (Q + R), rnd_mode,
+		   pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+    // get decimal digits of Q
+    DU = power10_index_binexp[bin_expon_cx] - Q - 1;
+    DU >>= 63;
+
+    ed2 = 16 - estimate_decimal_digits[bin_expon_cx] - (int) DU;
+
+    T = power10_table_128[ed2].w[0];
+    __mul_64x64_to_128 (CA, R, T);
+    B = coefficient_y;
+
+    Q *= power10_table_128[ed2].w[0];
+    diff_expon -= ed2;
+
+  }
+
+  if (!CA.w[1]) {
+    Q2 = CA.w[0] / B;
+    B2 = B + B;
+    B4 = B2 + B2;
+    R = CA.w[0] - Q2 * B;
+    Q += Q2;
+  } else {
+
+    // 2^64
+    t_scale.i = 0x43f0000000000000ull;
+    // convert CA to DP
+    da_h = CA.w[1];
+    da_l = CA.w[0];
+    da = da_h * t_scale.d + da_l;
+
+    // quotient
+    dq = da / db;
+    Q2 = (UINT64) dq;
+
+    // get w[0] remainder
+    R = CA.w[0] - Q2 * B;
+
+    // R<0 ?
+    D = ((SINT64) R) >> 63;
+    Q2 += D;
+    R += (B & D);
+
+    // now R<6*B
+
+    // quick divide
+
+    // 4*B
+    B2 = B + B;
+    B4 = B2 + B2;
+
+    R = R - B4;
+    // R<0 ?
+    D = ((SINT64) R) >> 63;
+    // restore R if negative
+    R += (B4 & D);
+    Q2 += ((~D) & 4);
+
+    R = R - B2;
+    // R<0 ?
+    D = ((SINT64) R) >> 63;
+    // restore R if negative
+    R += (B2 & D);
+    Q2 += ((~D) & 2);
+
+    R = R - B;
+    // R<0 ?
+    D = ((SINT64) R) >> 63;
+    // restore R if negative
+    R += (B & D);
+    Q2 += ((~D) & 1);
+
+    Q += Q2;
+  }
+
+#ifdef SET_STATUS_FLAGS
+  if (R) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!R)
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+  {
+    // eliminate trailing zeros
+
+    // check whether CX, CY are short
+    if ((coefficient_x <= 1024) && (coefficient_y <= 1024)) {
+      i = (int) coefficient_y - 1;
+      j = (int) coefficient_x - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+
+      __mul_64x64_to_128 (CT, Q, reciprocals10_64[nzeros]);
+
+      // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+      amount = short_recip_scale[nzeros];
+      Q = CT.w[1] >> amount;
+
+      diff_expon += nzeros;
+    } else {
+      tdigit[0] = Q & 0x3ffffff;
+      tdigit[1] = 0;
+      QX = Q >> 26;
+      QX32 = QX;
+      nzeros = 0;
+
+      for (j = 0; QX32; j++, QX32 >>= 7) {
+	k = (QX32 & 127);
+	tdigit[0] += convert_table[j][k][0];
+	tdigit[1] += convert_table[j][k][1];
+	if (tdigit[0] >= 100000000) {
+	  tdigit[0] -= 100000000;
+	  tdigit[1]++;
+	}
+      }
+
+      digit = tdigit[0];
+      if (!digit && !tdigit[1])
+	nzeros += 16;
+      else {
+	if (!digit) {
+	  nzeros += 8;
+	  digit = tdigit[1];
+	}
+	// decompose digit
+	PD = (UINT64) digit *0x068DB8BBull;
+	digit_h = (UINT32) (PD >> 40);
+	digit_low = digit - digit_h * 10000;
+
+	if (!digit_low)
+	  nzeros += 4;
+	else
+	  digit_h = digit_low;
+
+	if (!(digit_h & 1))
+	  nzeros +=
+	    3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			  (digit_h & 7));
+      }
+
+      if (nzeros) {
+	__mul_64x64_to_128 (CT, Q, reciprocals10_64[nzeros]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+	amount = short_recip_scale[nzeros];
+	Q = CT.w[1] >> amount;
+      }
+      diff_expon += nzeros;
+
+    }
+    if (diff_expon >= 0) {
+      res =
+	fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, Q,
+				 rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+  }
+#endif
+
+  if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+    // round to nearest code
+    // R*10
+    R += R;
+    R = (R << 2) + R;
+    B5 = B4 + B;
+
+    // compare 10*R to 5*B
+    R = B5 - R;
+    // correction for (R==0 && (Q&1))
+    R -= (Q & 1);
+    // R<0 ?
+    D = ((UINT64) R) >> 63;
+    Q += D;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+    // round to nearest code
+    // R*10
+    R += R;
+    R = (R << 2) + R;
+    B5 = B4 + B;
+
+    // compare 10*R to 5*B
+    R = B5 - R;
+    // correction for (R==0 && (Q&1))
+    R -= (Q & 1);
+    // R<0 ?
+    D = ((UINT64) R) >> 63;
+    Q += D;
+#else
+    rmode = rnd_mode;
+    if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+    switch (rmode) {
+    case 0:	// round to nearest code
+    case ROUNDING_TIES_AWAY:
+      // R*10
+      R += R;
+      R = (R << 2) + R;
+      B5 = B4 + B;
+      // compare 10*R to 5*B
+      R = B5 - R;
+      // correction for (R==0 && (Q&1))
+      R -= ((Q | (rmode >> 2)) & 1);
+      // R<0 ?
+      D = ((UINT64) R) >> 63;
+      Q += D;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      break;
+    default:	// rounding up
+      Q++;
+      break;
+    }
+#endif
+#endif
+
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, Q, rnd_mode,
+			       pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  } else {
+    // UF occurs
+
+#ifdef SET_STATUS_FLAGS
+    if ((diff_expon + 16 < 0)) {
+      // set status flags
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+    }
+#endif
+    rmode = rnd_mode;
+    res =
+      get_BID64_UF (sign_x ^ sign_y, diff_expon, Q, R, rmode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+
+  }
+}
+
+
+
+TYPE0_FUNCTION_ARGTYPE1_ARG128 (UINT64, bid64dq_div, UINT64, x, y)
+     UINT256 CA4 =
+       { {0x0ull, 0x0ull, 0x0ull, 0x0ull} }, CA4r, P256, QB256;
+UINT128 CX, CY, T128, CQ, CQ2, CR, CA, TP128, Qh, Ql, Tmp;
+UINT64 sign_x, sign_y, T, carry64, D, Q_low, QX, valid_y, PD, res;
+int_float fx, fy, f64;
+UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+  digits_q, amount;
+int nzeros, i, j, k, d5, done = 0;
+unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID128_value (&sign_y, &exponent_y, &CY, y);
+
+	// unpack arguments, check for NaN or Infinity
+CX.w[1] = 0;
+if (!unpack_BID64 (&sign_x, &exponent_x, &CX.w[0], (x))) {
+#ifdef SET_STATUS_FLAGS
+    if (((y.w[1] & SNAN_MASK64) == SNAN_MASK64) ||	// y is sNaN
+		((x & SNAN_MASK64) == SNAN_MASK64))
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  // test if x is NaN
+  if (((x) & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+    res = CX.w[0];
+    BID_RETURN (res & QUIET_MASK64);
+  }
+  // x is Infinity?
+  if (((x) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // check if y is Inf.
+    if (((y.w[1] & 0x7c00000000000000ull) == 0x7800000000000000ull))
+      // return NaN 
+    {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+	if (((y.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull)) {
+    // otherwise return +/-Inf
+    res =
+      (((x) ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+    BID_RETURN (res);
+	}
+  }
+  // x is 0
+  if ((y.w[1] & INFINITY_MASK64) != INFINITY_MASK64) {
+    if ((!CY.w[0]) && !(CY.w[1] & 0x0001ffffffffffffull)) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      // x=y=0, return NaN
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+    // return 0
+    res = ((x) ^ y.w[1]) & 0x8000000000000000ull;
+    exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS_128;
+    if (exponent_x > DECIMAL_MAX_EXPON_64)
+      exponent_x = DECIMAL_MAX_EXPON_64;
+    else if (exponent_x < 0)
+      exponent_x = 0;
+    res |= (((UINT64) exponent_x) << 53);
+    BID_RETURN (res);
+  }
+}
+exponent_x += (DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS);
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    Tmp.w[1] = (CY.w[1] & 0x00003fffffffffffull);
+    Tmp.w[0] = CY.w[0];
+    TP128 = reciprocals10_128[18];
+    __mul_128x128_full (Qh, Ql, Tmp, TP128);
+    amount = recip_scale[18];
+    __shr_128 (Tmp, Qh, amount);
+    res = (CY.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res = sign_x ^ sign_y;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+  res =
+    (((x) ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 15;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  if (digits_q <= 16) {
+    if (!CR.w[1] && !CR.w[0]) {
+      res = get_BID64 (sign_x ^ sign_y, diff_expon,
+		       CQ.w[0], rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+
+    ed2 = 16 - digits_q;
+    T128.w[0] = power10_table_128[ed2].w[0];
+    __mul_64x128_to_192 (CA4, (T128.w[0]), CR);
+    diff_expon = diff_expon - ed2;
+    CQ.w[0] *= T128.w[0];
+  } else {
+    ed2 = digits_q - 16;
+    diff_expon += ed2;
+    T128 = reciprocals10_128[ed2];
+    __mul_128x128_to_256 (P256, CQ, T128);
+    amount = recip_scale[ed2];
+    CQ.w[0] = (P256.w[2] >> amount) | (P256.w[3] << (64 - amount));
+    CQ.w[1] = 0;
+
+    __mul_64x64_to_128 (CQ2, CQ.w[0], (power10_table_128[ed2].w[0]));
+
+    __mul_64x64_to_128 (QB256, CQ2.w[0], CY.w[0]);
+    QB256.w[1] += CQ2.w[0] * CY.w[1] + CQ2.w[1] * CY.w[0];
+
+    CA4.w[1] = CX.w[1] - QB256.w[1];
+    CA4.w[0] = CX.w[0] - QB256.w[0];
+    if (CX.w[0] < QB256.w[0])
+      CA4.w[1]--;
+    if (CR.w[0] || CR.w[1])
+      CA4.w[0] |= 1;
+    done = 1;
+
+  }
+
+}
+if (!done) {
+  __div_256_by_128 (&CQ, &CA4, CY);
+}
+
+ 
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      Q_low = CQ.w[0];
+
+      {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+	if(diff_expon>=0){
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0],
+			       rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+	}
+  }
+#endif
+
+  if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break; 
+  }
+#endif
+#endif
+  
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0], rnd_mode,
+			       pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  } else {
+    // UF occurs
+
+#ifdef SET_STATUS_FLAGS
+    if ((diff_expon + 16 < 0)) {
+      // set status flags
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+    }
+#endif
+    rmode = rnd_mode;
+    res =
+      get_BID64_UF (sign_x ^ sign_y, diff_expon, CQ.w[0], CA4.w[1] | CA4.w[0], rmode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+
+  }
+
+}
+
+
+//#define LEAVE_TRAILING_ZEROS
+
+TYPE0_FUNCTION_ARG128_ARGTYPE2 (UINT64, bid64qd_div, x, UINT64, y)
+
+     UINT256 CA4 =
+       { {0x0ull, 0x0ull, 0x0ull, 0x0ull} }, CA4r, P256, QB256;
+UINT128 CX, CY, T128, CQ, CQ2, CR, CA, TP128, Qh, Ql, Tmp;
+UINT64 sign_x, sign_y, T, carry64, D, Q_low, QX, PD, res, valid_y;
+int_float fx, fy, f64;
+UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+  digits_q, amount;
+int nzeros, i, j, k, d5, done = 0;
+unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID64 (&sign_y, &exponent_y, &CY.w[0], (y));
+
+	// unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+  // test if x is NaN
+  if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull ||	// sNaN
+	(y & 0x7e00000000000000ull) == 0x7e00000000000000ull)
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      Tmp.w[1] = (CX.w[1] & 0x00003fffffffffffull);
+      Tmp.w[0] = CX.w[0];
+      TP128 = reciprocals10_128[18];
+      __mul_128x128_full (Qh, Ql, Tmp, TP128);
+      amount = recip_scale[18];
+      __shr_128 (Tmp, Qh, amount);
+      res = (CX.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+    BID_RETURN (res);
+  }
+  // x is Infinity?
+  if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // check if y is Inf.
+    if (((y & 0x7c00000000000000ull) == 0x7800000000000000ull))
+      // return NaN 
+    {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+	if (((y & 0x7c00000000000000ull) != 0x7c00000000000000ull)) {
+    // otherwise return +/-Inf
+    res =
+      ((x.w[1] ^ (y)) & 0x8000000000000000ull) | 0x7800000000000000ull;
+    BID_RETURN (res);
+	}
+  }
+  // x is 0
+  if (((y & INFINITY_MASK64) != INFINITY_MASK64) &&
+      !(CY.w[0])) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x=y=0, return NaN
+    res = 0x7c00000000000000ull;
+    BID_RETURN (res);
+  }
+  // return 0
+  if (((y & 0x7800000000000000ull) != 0x7800000000000000ull)) {
+	  if (!CY.w[0]) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+	  }
+    exponent_x =
+      exponent_x - exponent_y - DECIMAL_EXPONENT_BIAS_128 +
+      (DECIMAL_EXPONENT_BIAS << 1);
+    if (exponent_x > DECIMAL_MAX_EXPON_64)
+      exponent_x = DECIMAL_MAX_EXPON_64;
+    else if (exponent_x < 0)
+      exponent_x = 0;
+    res = (sign_x ^ sign_y) | (((UINT64) exponent_x) << 53);
+    BID_RETURN (res);
+  }
+}
+CY.w[1] = 0;
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    BID_RETURN (CY.w[0] & QUIET_MASK64);
+  }
+  // y is Infinity?
+  if (((y) & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res = sign_x ^ sign_y;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+  res =
+    ((x.w[1] ^ (y)) & 0x8000000000000000ull) | 0x7800000000000000ull;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon =
+  exponent_x - exponent_y - DECIMAL_EXPONENT_BIAS_128 +
+  (DECIMAL_EXPONENT_BIAS << 1);
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 15;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  if (digits_q <= 16) {
+    if (!CR.w[1] && !CR.w[0]) {
+      res = get_BID64 (sign_x ^ sign_y, diff_expon,
+		       CQ.w[0], rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+
+    ed2 = 16 - digits_q;
+    T128.w[0] = power10_table_128[ed2].w[0];
+    __mul_64x128_to_192 (CA4, (T128.w[0]), CR);
+    diff_expon = diff_expon - ed2;
+    CQ.w[0] *= T128.w[0];
+  } else {
+    ed2 = digits_q - 16;
+    diff_expon += ed2;
+    T128 = reciprocals10_128[ed2];
+    __mul_128x128_to_256 (P256, CQ, T128);
+    amount = recip_scale[ed2];
+    CQ.w[0] = (P256.w[2] >> amount) | (P256.w[3] << (64 - amount));
+    CQ.w[1] = 0;
+
+    __mul_64x64_to_128 (CQ2, CQ.w[0], (power10_table_128[ed2].w[0])); 
+
+    __mul_64x64_to_128 (QB256, CQ2.w[0], CY.w[0]);
+    QB256.w[1] += CQ2.w[0] * CY.w[1] + CQ2.w[1] * CY.w[0];
+
+    CA4.w[1] = CX.w[1] - QB256.w[1];
+    CA4.w[0] = CX.w[0] - QB256.w[0];
+    if (CX.w[0] < QB256.w[0])
+      CA4.w[1]--;
+    if (CR.w[0] || CR.w[1])
+      CA4.w[0] |= 1;
+    done = 1;
+	if(CA4.w[1]|CA4.w[0]) {
+    __mul_64x128_low(CY, (power10_table_128[ed2].w[0]),CY);
+	}
+
+  }
+
+}
+
+if (!done) {
+  __div_256_by_128 (&CQ, &CA4, CY);
+}
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else 
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+	  if(!done) {
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+		nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+      //__mul_128x128_to_256(P256, CQ, reciprocals10_128[nzeros]);Qh.w[1]=P256.w[3];Qh.w[0]=P256.w[2];
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      //T128 = reciprocals10_128[17];
+      Q_low = CQ.w[0];
+
+      {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+	  }
+	if(diff_expon>=0){
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0],
+			       rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+	}
+  }
+#endif
+
+  if (diff_expon >= 0) {
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  //if(CQ.w[0]<carry64)
+  //CQ.w[1] ++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+  
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0], rnd_mode,
+			       pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  } else {
+    // UF occurs
+
+#ifdef SET_STATUS_FLAGS
+    if ((diff_expon + 16 < 0)) {
+      // set status flags
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+    }
+#endif
+    rmode = rnd_mode;
+    res =
+      get_BID64_UF (sign_x ^ sign_y, diff_expon, CQ.w[0], CA4.w[1] | CA4.w[0], rmode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+
+  }
+
+}
+
+//#define LEAVE_TRAILING_ZEROS
+
+extern UINT32 convert_table[5][128][2];
+extern SINT8 factors[][2];
+extern UINT8 packed_10000_zeros[];
+
+
+//UINT64* bid64_div128x128(UINT64 res, UINT128 *px, UINT128 *py, unsigned rnd_mode, unsigned *pfpsf) 
+
+TYPE0_FUNCTION_ARG128_ARG128 (UINT64, bid64qq_div, x, y)
+     UINT256 CA4 =
+       { {0x0ull, 0x0ull, 0x0ull, 0x0ull} }, CA4r, P256, QB256;
+UINT128 CX, CY, T128, CQ, CQ2, CR, CA, TP128, Qh, Ql, Tmp;
+UINT64 sign_x, sign_y, T, carry64, D, Q_low, QX, valid_y, PD, res;
+int_float fx, fy, f64;
+UINT32 QX32, tdigit[3], digit, digit_h, digit_low;
+int exponent_x, exponent_y, bin_index, bin_expon, diff_expon, ed2,
+  digits_q, amount;
+int nzeros, i, j, k, d5, done = 0;
+unsigned rmode;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+fexcept_t binaryflags = 0;
+#endif
+
+valid_y = unpack_BID128_value (&sign_y, &exponent_y, &CY, y);
+
+	// unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+  // test if x is NaN
+  if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull ||	// sNaN
+	(y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      Tmp.w[1] = (CX.w[1] & 0x00003fffffffffffull);
+      Tmp.w[0] = CX.w[0];
+      TP128 = reciprocals10_128[18];
+      __mul_128x128_full (Qh, Ql, Tmp, TP128);
+      amount = recip_scale[18];
+      __shr_128 (Tmp, Qh, amount);
+      res = (CX.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+    BID_RETURN (res);
+  }
+  // x is Infinity?
+  if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // check if y is Inf.
+    if (((y.w[1] & 0x7c00000000000000ull) == 0x7800000000000000ull))
+      // return NaN 
+    {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+	if (((y.w[1] & 0x7c00000000000000ull) != 0x7c00000000000000ull)) {
+    // otherwise return +/-Inf
+    res =
+      ((x.w[1] ^ y.
+	w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+    BID_RETURN (res);
+	}
+  }
+  // x is 0
+  if (((y.w[1] & 0x7800000000000000ull) != 0x7800000000000000ull)) {
+  if ((!CY.w[0]) && !(CY.w[1] & 0x0001ffffffffffffull)) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x=y=0, return NaN
+    res = 0x7c00000000000000ull;
+    BID_RETURN (res);
+  }
+  // return 0
+  res = (x.w[1] ^ y.w[1]) & 0x8000000000000000ull;
+  exponent_x = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+  if (exponent_x > DECIMAL_MAX_EXPON_64)
+    exponent_x = DECIMAL_MAX_EXPON_64;
+  else if (exponent_x < 0)
+    exponent_x = 0;
+  res |= (((UINT64) exponent_x) << 53);
+  BID_RETURN (res);
+  }
+}
+if (!valid_y) {
+  // y is Inf. or NaN
+
+  // test if y is NaN
+  if ((y.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((y.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      Tmp.w[1] = (CY.w[1] & 0x00003fffffffffffull);
+      Tmp.w[0] = CY.w[0];
+      TP128 = reciprocals10_128[18];
+      __mul_128x128_full (Qh, Ql, Tmp, TP128);
+      amount = recip_scale[18];
+      __shr_128 (Tmp, Qh, amount);
+      res = (CY.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+    BID_RETURN (res);
+  }
+  // y is Infinity?
+  if ((y.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    // return +/-0
+    res = sign_x ^ sign_y;
+    BID_RETURN (res);
+  }
+  // y is 0, return +/-Inf
+  res =
+    ((x.w[1] ^ y.w[1]) & 0x8000000000000000ull) | 0x7800000000000000ull;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, ZERO_DIVIDE_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+diff_expon = exponent_x - exponent_y + DECIMAL_EXPONENT_BIAS;
+
+if (__unsigned_compare_gt_128 (CY, CX)) {
+  // CX < CY
+
+  // 2^64
+  f64.i = 0x5f800000;
+
+  // fx ~ CX,   fy ~ CY
+  fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+  fy.d = (float) CY.w[1] * f64.d + (float) CY.w[0];
+  // expon_cy - expon_cx
+  bin_index = (fy.i - fx.i) >> 23;
+
+  if (CX.w[1]) {
+    T = power10_index_binexp_128[bin_index].w[0];
+    __mul_64x128_short (CA, T, CX);
+  } else {
+    T128 = power10_index_binexp_128[bin_index];
+    __mul_64x128_short (CA, CX.w[0], T128);
+  }
+
+  ed2 = 15;
+  if (__unsigned_compare_gt_128 (CY, CA))
+    ed2++;
+
+  T128 = power10_table_128[ed2];
+  __mul_128x128_to_256 (CA4, CA, T128);
+
+  ed2 += estimate_decimal_digits[bin_index];
+  CQ.w[0] = CQ.w[1] = 0;
+  diff_expon = diff_expon - ed2;
+
+} else {
+  // get CQ = CX/CY
+  __div_128_by_128 (&CQ, &CR, CX, CY);
+
+  // get number of decimal digits in CQ
+  // 2^64
+  f64.i = 0x5f800000;
+  fx.d = (float) CQ.w[1] * f64.d + (float) CQ.w[0];
+  // binary expon. of CQ
+  bin_expon = (fx.i - 0x3f800000) >> 23;
+
+  digits_q = estimate_decimal_digits[bin_expon];
+  TP128.w[0] = power10_index_binexp_128[bin_expon].w[0];
+  TP128.w[1] = power10_index_binexp_128[bin_expon].w[1];
+  if (__unsigned_compare_ge_128 (CQ, TP128))
+    digits_q++;
+
+  if (digits_q <= 16) {
+    if (!CR.w[1] && !CR.w[0]) {
+      res = get_BID64 (sign_x ^ sign_y, diff_expon,
+		       CQ.w[0], rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+
+    ed2 = 16 - digits_q;
+    T128.w[0] = power10_table_128[ed2].w[0];
+    __mul_64x128_to_192 (CA4, (T128.w[0]), CR);
+    diff_expon = diff_expon - ed2;
+    CQ.w[0] *= T128.w[0];
+  } else {
+    ed2 = digits_q - 16;
+    diff_expon += ed2;
+    T128 = reciprocals10_128[ed2];
+    __mul_128x128_to_256 (P256, CQ, T128);
+    amount = recip_scale[ed2];
+    CQ.w[0] = (P256.w[2] >> amount) | (P256.w[3] << (64 - amount));
+    CQ.w[1] = 0;
+
+    __mul_64x64_to_128 (CQ2, CQ.w[0], (power10_table_128[ed2].w[0]));
+
+    __mul_64x64_to_128 (QB256, CQ2.w[0], CY.w[0]);
+    QB256.w[1] += CQ2.w[0] * CY.w[1] + CQ2.w[1] * CY.w[0];
+
+    CA4.w[1] = CX.w[1] - QB256.w[1];
+    CA4.w[0] = CX.w[0] - QB256.w[0];
+    if (CX.w[0] < QB256.w[0])
+      CA4.w[1]--;
+    if (CR.w[0] || CR.w[1])
+      CA4.w[0] |= 1;
+    done = 1;
+	if(CA4.w[1]|CA4.w[0]) {
+    __mul_64x128_low(CY, (power10_table_128[ed2].w[0]),CY);
+	}
+  }
+
+}
+
+if (!done) {
+  __div_256_by_128 (&CQ, &CA4, CY);
+}
+
+ 
+
+#ifdef SET_STATUS_FLAGS
+  if (CA4.w[0] || CA4.w[1]) {
+    // set status flags
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+  }
+#ifndef LEAVE_TRAILING_ZEROS
+  else 
+#endif
+#else
+#ifndef LEAVE_TRAILING_ZEROS
+  if (!CA4.w[0] && !CA4.w[1])
+#endif
+#endif
+#ifndef LEAVE_TRAILING_ZEROS
+    // check whether result is exact
+  {
+	  if(!done) {
+    // check whether CX, CY are short
+    if (!CX.w[1] && !CY.w[1] && (CX.w[0] <= 1024) && (CY.w[0] <= 1024)) {
+      i = (int) CY.w[0] - 1;
+      j = (int) CX.w[0] - 1;
+      // difference in powers of 2 factors for Y and X
+      nzeros = ed2 - factors[i][0] + factors[j][0];
+      // difference in powers of 5 factors
+      d5 = ed2 - factors[i][1] + factors[j][1];
+      if (d5 < nzeros)
+	nzeros = d5;
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+      //__mul_128x128_to_256(P256, CQ, reciprocals10_128[nzeros]);Qh.w[1]=P256.w[3];Qh.w[0]=P256.w[2];
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[nzeros];
+      __shr_128_long (CQ, Qh, amount);
+
+      diff_expon += nzeros;
+    } else {
+      // decompose Q as Qh*10^17 + Ql
+      //T128 = reciprocals10_128[17];
+      Q_low = CQ.w[0];
+
+      {
+	tdigit[0] = Q_low & 0x3ffffff;
+	tdigit[1] = 0;
+	QX = Q_low >> 26;
+	QX32 = QX;
+	nzeros = 0;
+
+	for (j = 0; QX32; j++, QX32 >>= 7) {
+	  k = (QX32 & 127);
+	  tdigit[0] += convert_table[j][k][0];
+	  tdigit[1] += convert_table[j][k][1];
+	  if (tdigit[0] >= 100000000) {
+	    tdigit[0] -= 100000000;
+	    tdigit[1]++;
+	  }
+	}
+
+	if (tdigit[1] >= 100000000) {
+	  tdigit[1] -= 100000000;
+	  if (tdigit[1] >= 100000000)
+	    tdigit[1] -= 100000000;
+	}
+
+	digit = tdigit[0];
+	if (!digit && !tdigit[1])
+	  nzeros += 16;
+	else {
+	  if (!digit) {
+	    nzeros += 8;
+	    digit = tdigit[1];
+	  }
+	  // decompose digit
+	  PD = (UINT64) digit *0x068DB8BBull;
+	  digit_h = (UINT32) (PD >> 40);
+	  digit_low = digit - digit_h * 10000;
+
+	  if (!digit_low)
+	    nzeros += 4;
+	  else
+	    digit_h = digit_low;
+
+	  if (!(digit_h & 1))
+	    nzeros +=
+	      3 & (UINT32) (packed_10000_zeros[digit_h >> 3] >>
+			    (digit_h & 7));
+	}
+
+	if (nzeros) {
+	  // get P*(2^M[extra_digits])/10^extra_digits
+	  __mul_128x128_full (Qh, Ql, CQ, reciprocals10_128[nzeros]);
+
+	  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+	  amount = recip_scale[nzeros];
+	  __shr_128 (CQ, Qh, amount);
+	}
+	diff_expon += nzeros;
+
+      }
+    }
+	  }
+	if(diff_expon>=0){
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0],
+			       rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+	}
+  }
+#endif
+
+  if(diff_expon>=0) {
+
+#ifdef IEEE_ROUND_NEAREST
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+
+  CQ.w[0] += carry64;
+  //if(CQ.w[0]<carry64)
+  //CQ.w[1] ++;
+#else
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  // rounding
+  // 2*CA4 - CY
+  CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+  CA4r.w[0] = CA4.w[0] + CA4.w[0];
+  __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+  CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+
+  D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+  carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+
+  CQ.w[0] += carry64;
+  if (CQ.w[0] < carry64)
+    CQ.w[1]++;
+#else
+  rmode = rnd_mode;
+  if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:	// round to nearest code
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 1 : 0;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) & ((CQ.w[0]) | D);
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_TIES_AWAY:
+    // rounding
+    // 2*CA4 - CY
+    CA4r.w[1] = (CA4.w[1] + CA4.w[1]) | (CA4.w[0] >> 63);
+    CA4r.w[0] = CA4.w[0] + CA4.w[0];
+    __sub_borrow_out (CA4r.w[0], carry64, CA4r.w[0], CY.w[0]);
+    CA4r.w[1] = CA4r.w[1] - CY.w[1] - carry64;
+    D = (CA4r.w[1] | CA4r.w[0]) ? 0 : 1;
+    carry64 = (1 + (((SINT64) CA4r.w[1]) >> 63)) | D;
+    CQ.w[0] += carry64;
+    if (CQ.w[0] < carry64)
+      CQ.w[1]++;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    break;
+  default:	// rounding up
+    CQ.w[0]++;
+    if (!CQ.w[0])
+      CQ.w[1]++;
+    break;
+  }
+#endif
+#endif
+
+  
+    res =
+      fast_get_BID64_check_OF (sign_x ^ sign_y, diff_expon, CQ.w[0], rnd_mode,
+			       pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  } else {
+    // UF occurs
+
+#ifdef SET_STATUS_FLAGS
+    if ((diff_expon + 16 < 0)) {
+      // set status flags
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+    }
+#endif
+    rmode = rnd_mode;
+    res =
+      get_BID64_UF (sign_x ^ sign_y, diff_expon, CQ.w[0], CA4.w[1] | CA4.w[0], rmode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+
+  }
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_fma.c b/gcc-4.9/libgcc/config/libbid/bid64_fma.c
new file mode 100644
index 000000000..6b1ae30a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_fma.c
@@ -0,0 +1,506 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 fma
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  if multiplication is guranteed exact (short coefficients)
+ *     call the unpacked arg. equivalent of bid64_add(x*y, z)
+ *  else 
+ *     get full coefficient_x*coefficient_y product
+ *     call subroutine to perform addition of 64-bit argument 
+ *                                         to 128-bit product
+ *
+ ****************************************************************************/
+
+#include "bid_inline_add.h"
+
+#if DECIMAL_CALL_BY_REFERENCE
+extern void bid64_mul (UINT64 * pres, UINT64 * px,
+		       UINT64 *
+		       py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+#else
+
+extern UINT64 bid64_mul (UINT64 x,
+			 UINT64 y _RND_MODE_PARAM
+			 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM);
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_fma (UINT64 * pres, UINT64 * px, UINT64 * py,
+	   UINT64 *
+	   pz _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	   _EXC_INFO_PARAM) {
+  UINT64 x, y, z;
+#else
+
+UINT64
+bid64_fma (UINT64 x, UINT64 y,
+	   UINT64 z _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 P, PU, CT, CZ;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y, sign_z,
+    coefficient_z;
+  UINT64 C64, remainder_y, res;
+  UINT64 CYh, CY0L, T, valid_x, valid_y, valid_z;
+  int_double tempx, tempy;
+  int extra_digits, exponent_x, exponent_y, bin_expon_cx, bin_expon_cy,
+    bin_expon_product, rmode;
+  int digits_p, bp, final_exponent, exponent_z, digits_z, ez, ey,
+    scale_z, uf_status;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  y = *py;
+  z = *pz;
+#endif
+
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+  valid_y = unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y);
+  valid_z = unpack_BID64 (&sign_z, &exponent_z, &coefficient_z, z);
+
+  // unpack arguments, check for NaN, Infinity, or 0
+  if (!valid_x || !valid_y || !valid_z) {
+
+    if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+      // if x = {0, f, inf, NaN}, y = NaN, z = {0, f, inf, NaN} then res = Q (y)
+      // check first for non-canonical NaN payload
+      y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+      if ((y & 0x0003ffffffffffffull) > 999999999999999ull) {
+	y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+      }
+      if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (y)
+	res = y & 0xfdffffffffffffffull;
+      } else {	// y is QNaN
+	// return y
+	res = y;
+	// if z = SNaN or x = SNaN signal invalid exception
+	if ((z & MASK_SNAN) == MASK_SNAN
+	    || (x & MASK_SNAN) == MASK_SNAN) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	}
+      }
+      BID_RETURN (res)
+    } else if ((z & MASK_NAN) == MASK_NAN) {	// z is NAN
+      // if x = {0, f, inf, NaN}, y = {0, f, inf}, z = NaN then res = Q (z)
+      // check first for non-canonical NaN payload
+      z = z & 0xfe03ffffffffffffull;	// clear G6-G12
+      if ((z & 0x0003ffffffffffffull) > 999999999999999ull) {
+	z = z & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+      }
+      if ((z & MASK_SNAN) == MASK_SNAN) {	// z is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (z)
+	res = z & 0xfdffffffffffffffull;
+      } else {	// z is QNaN
+	// return z
+	res = z;
+	// if x = SNaN signal invalid exception
+	if ((x & MASK_SNAN) == MASK_SNAN) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	}
+      }
+      BID_RETURN (res)
+    } else if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+      // if x = NaN, y = {0, f, inf}, z = {0, f, inf} then res = Q (x)
+      // check first for non-canonical NaN payload
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+      if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {
+	x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+      }
+      if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res = x & 0xfdffffffffffffffull;
+      } else {	// x is QNaN
+	// return x
+	res = x;	// clear out G[6]-G[16]
+      }
+      BID_RETURN (res)
+    }
+
+    if (!valid_x) {
+      // x is Inf. or 0
+
+      // x is Infinity?
+      if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+	// check if y is 0
+	if (!coefficient_y) {
+	  // y==0, return NaN
+#ifdef SET_STATUS_FLAGS
+	  if ((z & 0x7e00000000000000ull) != 0x7c00000000000000ull)
+	    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  BID_RETURN (0x7c00000000000000ull);
+	}
+	// test if z is Inf of oposite sign
+	if (((z & 0x7c00000000000000ull) == 0x7800000000000000ull)
+	    && (((x ^ y) ^ z) & 0x8000000000000000ull)) {
+	  // return NaN 
+#ifdef SET_STATUS_FLAGS
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  BID_RETURN (0x7c00000000000000ull);
+	}
+	// otherwise return +/-Inf
+	BID_RETURN (((x ^ y) & 0x8000000000000000ull) |
+		    0x7800000000000000ull);
+      }
+      // x is 0
+      if (((y & 0x7800000000000000ull) != 0x7800000000000000ull)
+	  && ((z & 0x7800000000000000ull) != 0x7800000000000000ull)) {
+
+	if (coefficient_z) {
+	  exponent_y = exponent_x - DECIMAL_EXPONENT_BIAS + exponent_y;
+
+	  sign_z = z & 0x8000000000000000ull;
+
+	  if (exponent_y >= exponent_z)
+	    BID_RETURN (z);
+	  res =
+	    add_zero64 (exponent_y, sign_z, exponent_z, coefficient_z,
+			&rnd_mode, pfpsf);
+	  BID_RETURN (res);
+	}
+      }
+    }
+    if (!valid_y) {
+      // y is Inf. or 0
+
+      // y is Infinity?
+      if ((y & 0x7800000000000000ull) == 0x7800000000000000ull) {
+	// check if x is 0
+	if (!coefficient_x) {
+	  // y==0, return NaN
+#ifdef SET_STATUS_FLAGS
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  BID_RETURN (0x7c00000000000000ull);
+	}
+	// test if z is Inf of oposite sign
+	if (((z & 0x7c00000000000000ull) == 0x7800000000000000ull)
+	    && (((x ^ y) ^ z) & 0x8000000000000000ull)) {
+#ifdef SET_STATUS_FLAGS
+	  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	  // return NaN
+	  BID_RETURN (0x7c00000000000000ull);
+	}
+	// otherwise return +/-Inf
+	BID_RETURN (((x ^ y) & 0x8000000000000000ull) |
+		    0x7800000000000000ull);
+      }
+      // y is 0 
+      if (((z & 0x7800000000000000ull) != 0x7800000000000000ull)) {
+
+	if (coefficient_z) {
+	  exponent_y += exponent_x - DECIMAL_EXPONENT_BIAS;
+
+	  sign_z = z & 0x8000000000000000ull;
+
+	  if (exponent_y >= exponent_z)
+	    BID_RETURN (z);
+	  res =
+	    add_zero64 (exponent_y, sign_z, exponent_z, coefficient_z,
+			&rnd_mode, pfpsf);
+	  BID_RETURN (res);
+	}
+      }
+    }
+
+    if (!valid_z) {
+      // y is Inf. or 0
+
+      // test if y is NaN/Inf
+      if ((z & 0x7800000000000000ull) == 0x7800000000000000ull) {
+	BID_RETURN (coefficient_z & QUIET_MASK64);
+      }
+      // z is 0, return x*y
+      if ((!coefficient_x) || (!coefficient_y)) {
+	//0+/-0
+	exponent_x += exponent_y - DECIMAL_EXPONENT_BIAS;
+	if (exponent_x > DECIMAL_MAX_EXPON_64)
+	  exponent_x = DECIMAL_MAX_EXPON_64;
+	else if (exponent_x < 0)
+	  exponent_x = 0;
+	if (exponent_x <= exponent_z)
+	  res = ((UINT64) exponent_x) << 53;
+	else
+	  res = ((UINT64) exponent_z) << 53;
+	if ((sign_x ^ sign_y) == sign_z)
+	  res |= sign_z;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+	else if (rnd_mode == ROUNDING_DOWN)
+	  res |= 0x8000000000000000ull;
+#endif
+#endif
+	BID_RETURN (res);
+      }
+    }
+  }
+
+  /* get binary coefficients of x and y */
+
+  //--- get number of bits in the coefficients of x and y ---
+  // version 2 (original)
+  tempx.d = (double) coefficient_x;
+  bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52);
+
+  tempy.d = (double) coefficient_y;
+  bin_expon_cy = ((tempy.i & MASK_BINARY_EXPONENT) >> 52);
+
+  // magnitude estimate for coefficient_x*coefficient_y is 
+  //        2^(unbiased_bin_expon_cx + unbiased_bin_expon_cx)
+  bin_expon_product = bin_expon_cx + bin_expon_cy;
+
+  // check if coefficient_x*coefficient_y<2^(10*k+3)
+  // equivalent to unbiased_bin_expon_cx + unbiased_bin_expon_cx < 10*k+1
+  if (bin_expon_product < UPPER_EXPON_LIMIT + 2 * BINARY_EXPONENT_BIAS) {
+    //  easy multiply
+    C64 = coefficient_x * coefficient_y;
+    final_exponent = exponent_x + exponent_y - DECIMAL_EXPONENT_BIAS;
+    if ((final_exponent > 0) || (!coefficient_z)) {
+      res =
+	get_add64 (sign_x ^ sign_y,
+		   final_exponent, C64, sign_z, exponent_z, coefficient_z, rnd_mode, pfpsf);
+      BID_RETURN (res);
+    } else {
+      P.w[0] = C64;
+      P.w[1] = 0;
+      extra_digits = 0;
+    }
+  } else {
+    if (!coefficient_z) {
+#if DECIMAL_CALL_BY_REFERENCE
+      bid64_mul (&res, px,
+		 py _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		 _EXC_INFO_ARG);
+#else
+      res =
+	bid64_mul (x,
+		   y _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		   _EXC_INFO_ARG);
+#endif
+      BID_RETURN (res);
+    }
+    // get 128-bit product: coefficient_x*coefficient_y
+    __mul_64x64_to_128 (P, coefficient_x, coefficient_y);
+
+    // tighten binary range of P:  leading bit is 2^bp
+    // unbiased_bin_expon_product <= bp <= unbiased_bin_expon_product+1
+    bin_expon_product -= 2 * BINARY_EXPONENT_BIAS;
+    __tight_bin_range_128 (bp, P, bin_expon_product);
+
+    // get number of decimal digits in the product
+    digits_p = estimate_decimal_digits[bp];
+    if (!(__unsigned_compare_gt_128 (power10_table_128[digits_p], P)))
+      digits_p++;	// if power10_table_128[digits_p] <= P
+
+    // determine number of decimal digits to be rounded out
+    extra_digits = digits_p - MAX_FORMAT_DIGITS;
+    final_exponent =
+      exponent_x + exponent_y + extra_digits - DECIMAL_EXPONENT_BIAS;
+  }
+
+  if (((unsigned) final_exponent) >= 3 * 256) {
+    if (final_exponent < 0) {
+      //--- get number of bits in the coefficients of z  ---
+      tempx.d = (double) coefficient_z;
+      bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+      // get number of decimal digits in the coeff_x
+      digits_z = estimate_decimal_digits[bin_expon_cx];
+      if (coefficient_z >= power10_table_128[digits_z].w[0])
+	digits_z++;
+      // underflow
+      if ((final_exponent + 16 < 0)
+	  || (exponent_z + digits_z > 33 + final_exponent)) {
+	res =
+	  BID_normalize (sign_z, exponent_z, coefficient_z,
+			 sign_x ^ sign_y, 1, rnd_mode, pfpsf);
+	BID_RETURN (res);
+      }
+
+      ez = exponent_z + digits_z - 16;
+      if (ez < 0)
+	ez = 0;
+      scale_z = exponent_z - ez;
+      coefficient_z *= power10_table_128[scale_z].w[0];
+      ey = final_exponent - extra_digits;
+      extra_digits = ez - ey;
+      if (extra_digits > 33) {
+	res =
+	  BID_normalize (sign_z, exponent_z, coefficient_z,
+			 sign_x ^ sign_y, 1, rnd_mode, pfpsf);
+	BID_RETURN (res);
+      }
+      //else  // extra_digits<=32
+
+      if (extra_digits > 17) {
+	CYh = __truncate (P, 16);
+	// get remainder
+	T = power10_table_128[16].w[0];
+	__mul_64x64_to_64 (CY0L, CYh, T);
+	remainder_y = P.w[0] - CY0L;
+
+	extra_digits -= 16;
+	P.w[0] = CYh;
+	P.w[1] = 0;
+      } else
+	remainder_y = 0;
+
+      // align coeff_x, CYh
+      __mul_64x64_to_128 (CZ, coefficient_z,
+			  power10_table_128[extra_digits].w[0]);
+
+      if (sign_z == (sign_y ^ sign_x)) {
+	__add_128_128 (CT, CZ, P);
+	if (__unsigned_compare_ge_128
+	    (CT, power10_table_128[16 + extra_digits])) {
+	  extra_digits++;
+	  ez++;
+	}
+      } else {
+	if (remainder_y && (__unsigned_compare_ge_128 (CZ, P))) {
+	  P.w[0]++;
+	  if (!P.w[0])
+	    P.w[1]++;
+	}
+	__sub_128_128 (CT, CZ, P);
+	if (((SINT64) CT.w[1]) < 0) {
+	  sign_z = sign_y ^ sign_x;
+	  CT.w[0] = 0 - CT.w[0];
+	  CT.w[1] = 0 - CT.w[1];
+	  if (CT.w[0])
+	    CT.w[1]--;
+	} else if(!(CT.w[1]|CT.w[0]))
+		sign_z = (rnd_mode!=ROUNDING_DOWN)? 0: 0x8000000000000000ull;
+	if (ez
+	    &&
+	    (__unsigned_compare_gt_128
+	     (power10_table_128[15 + extra_digits], CT))) {
+	  extra_digits--;
+	  ez--;
+	}
+      }
+
+#ifdef SET_STATUS_FLAGS
+      uf_status = 0;
+      if ((!ez)
+	  &&
+	  __unsigned_compare_gt_128 (power10_table_128
+				     [extra_digits + 15], CT)) {
+	rmode = rnd_mode;
+	if (sign_z && (unsigned) (rmode - 1) < 2)
+	  rmode = 3 - rmode;
+	//__add_128_64(PU, CT, round_const_table[rmode][extra_digits]);
+	PU = power10_table_128[extra_digits + 15];
+	PU.w[0]--;
+	if (__unsigned_compare_gt_128 (PU, CT)
+	    || (rmode == ROUNDING_DOWN)
+	    || (rmode == ROUNDING_TO_ZERO))
+	  uf_status = UNDERFLOW_EXCEPTION;
+	else if (extra_digits < 2) {
+	  if ((rmode == ROUNDING_UP)) {
+	    if (!extra_digits)
+	      uf_status = UNDERFLOW_EXCEPTION;
+	    else {
+	      if (remainder_y && (sign_z != (sign_y ^ sign_x)))
+		remainder_y = power10_table_128[16].w[0] - remainder_y;
+
+	      if (power10_table_128[15].w[0] > remainder_y)
+		uf_status = UNDERFLOW_EXCEPTION;
+	    }
+	  } else	// RN or RN_away
+	  {
+	    if (remainder_y && (sign_z != (sign_y ^ sign_x)))
+	      remainder_y = power10_table_128[16].w[0] - remainder_y;
+
+	    if (!extra_digits) {
+	      remainder_y += round_const_table[rmode][15];
+	      if (remainder_y < power10_table_128[16].w[0])
+		uf_status = UNDERFLOW_EXCEPTION;
+	    } else {
+	      if (remainder_y < round_const_table[rmode][16])
+		uf_status = UNDERFLOW_EXCEPTION;
+	    }
+	  }
+	  //__set_status_flags (pfpsf, uf_status);
+	}
+      }
+#endif
+      res =
+	__bid_full_round64_remainder (sign_z, ez - extra_digits, CT,
+				      extra_digits, remainder_y,
+				      rnd_mode, pfpsf, uf_status);
+      BID_RETURN (res);
+
+    } else {
+      if ((sign_z == (sign_x ^ sign_y))
+	  || (final_exponent > 3 * 256 + 15)) {
+	res =
+	  fast_get_BID64_check_OF (sign_x ^ sign_y, final_exponent,
+				   1000000000000000ull, rnd_mode,
+				   pfpsf);
+	BID_RETURN (res);
+      }
+    }
+  }
+
+
+  if (extra_digits > 0) {
+    res =
+      get_add128 (sign_z, exponent_z, coefficient_z, sign_x ^ sign_y,
+		  final_exponent, P, extra_digits, rnd_mode, pfpsf);
+    BID_RETURN (res);
+  }
+  // go to convert_format and exit
+  else {
+    C64 = __low_64 (P);
+
+    res =
+      get_add64 (sign_x ^ sign_y,
+		 exponent_x + exponent_y - DECIMAL_EXPONENT_BIAS, C64, 
+		 sign_z, exponent_z, coefficient_z, 
+		 rnd_mode, pfpsf);
+    BID_RETURN (res);
+  }
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_logb.c b/gcc-4.9/libgcc/config/libbid/bid64_logb.c
new file mode 100644
index 000000000..ad1125fc5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_logb.c
@@ -0,0 +1,68 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_logb (int * pres, UINT64 * px
+	    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x;
+#else
+
+int
+bid64_logb (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 sign_x, coefficient_x;
+  int_double dx;
+  int exponent_x, bin_expon_cx, digits;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  x = *px;
+#endif
+  // unpack arguments, check for NaN or Infinity
+  if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    // x is Inf. or NaN
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (0x80000000);
+  }
+  // find number of digits in coefficient
+  if (coefficient_x >= 1000000000000000ull) {
+    digits = 16;
+  } else {
+    dx.d = (double)coefficient_x;   // exact conversion;
+    bin_expon_cx = (int)(dx.i >> 52) - 1023;
+    digits = estimate_decimal_digits[bin_expon_cx];
+    if (coefficient_x >= power10_table_128[digits].w[0])
+      digits++;
+  }
+  exponent_x = exponent_x - DECIMAL_EXPONENT_BIAS + digits - 1;
+
+  BID_RETURN (exponent_x);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_minmax.c b/gcc-4.9/libgcc/config/libbid/bid64_minmax.c
new file mode 100644
index 000000000..e54946b18
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_minmax.c
@@ -0,0 +1,854 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64 minimum function - returns greater of two numbers
+ *****************************************************************************/
+
+static const UINT64 mult_factor[16] = {
+  1ull, 10ull, 100ull, 1000ull,
+  10000ull, 100000ull, 1000000ull, 10000000ull,
+  100000000ull, 1000000000ull, 10000000000ull, 100000000000ull,
+  1000000000000ull, 10000000000000ull,
+  100000000000000ull, 1000000000000000ull
+};
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_minnum (UINT64 * pres, UINT64 * px, UINT64 * py _EXC_FLAGS_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_minnum (UINT64 x, UINT64 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT64 res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  // check for non-canonical x
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NaN
+    x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    x = x & (MASK_SIGN | MASK_INF);
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	x = (x & MASK_SIGN) | ((x & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical 
+  }
+
+  // check for non-canonical y
+  if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN
+    y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((y & 0x0003ffffffffffffull) > 999999999999999ull) {
+      y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {	// check for Infinity
+    y = y & (MASK_SIGN | MASK_INF);
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((y & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	y = (y & MASK_SIGN) | ((y & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical
+  }
+
+  // NaN (CASE1)
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x = x & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y = y & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal, return either number
+  if (x == y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return x
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = x;
+      BID_RETURN (res);
+    }
+    // x is pos infinity, return y
+    else {
+      res = y;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return y
+    //                 if y is negative infinity, then x is greater, return x
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore 
+  //        ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (sig_y == 0) {
+    y_is_zero = 1;
+  }
+
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, neither is greater => return either
+    res = y;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? y : x;;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? y : x;	// difference cannot be >10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN) ? y : x;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = y;
+      BID_RETURN (res);
+    }
+
+    res = (((sig_n_prime.w[1] > 0)
+	    || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN)) ? y : x;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if postitive, return whichever significand is larger (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = y;
+    BID_RETURN (res);
+  }
+  res = (((sig_n_prime.w[1] == 0)
+	  && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN)) ? y : x;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64 minimum magnitude function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_minnum_mag (UINT64 * pres, UINT64 * px,
+		  UINT64 * py _EXC_FLAGS_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_minnum_mag (UINT64 x, UINT64 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT64 res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+
+  // check for non-canonical x
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NaN
+    x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    x = x & (MASK_SIGN | MASK_INF);
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	x = (x & MASK_SIGN) | ((x & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical 
+  }
+
+  // check for non-canonical y
+  if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN
+    y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((y & 0x0003ffffffffffffull) > 999999999999999ull) {
+      y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {	// check for Infinity
+    y = y & (MASK_SIGN | MASK_INF);
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((y & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	y = (y & MASK_SIGN) | ((y & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical
+  }
+
+  // NaN (CASE1)
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x = x & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y = y & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal, return either number
+  if (x == y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // x is infinity, its magnitude is greater than or equal to y
+    // return x only if y is infinity and x is negative
+    res = ((x & MASK_SIGN) == MASK_SIGN
+	   && (y & MASK_INF) == MASK_INF) ? x : y;
+    BID_RETURN (res);
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // y is infinity, then it must be greater in magnitude, return x
+    res = x;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore 
+  //        ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (sig_x == 0) {
+    res = x;	// x_is_zero, its magnitude must be smaller than y
+    BID_RETURN (res);
+  }
+  if (sig_y == 0) {
+    res = y;	// y_is_zero, its magnitude must be smaller than x
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = y;
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = y;	// difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // now, sig_n_prime has: sig_x * 10^(exp_x-exp_y), this is 
+    // the compensated signif.
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      // two numbers are equal, return minNum(x,y)
+      res = ((y & MASK_SIGN) == MASK_SIGN) ? y : x;
+      BID_RETURN (res);
+    }
+    // now, if compensated_x (sig_n_prime) is greater than y, return y,  
+    // otherwise return x
+    res = ((sig_n_prime.w[1] != 0) || sig_n_prime.w[0] > sig_y) ? y : x;
+    BID_RETURN (res);
+  }
+  // exp_y must be greater than exp_x, thus adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? y : x;
+    // two numbers are equal, return either
+    BID_RETURN (res);
+  }
+
+  res = ((sig_n_prime.w[1] == 0) && (sig_x > sig_n_prime.w[0])) ? y : x;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64 maximum function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_maxnum (UINT64 * pres, UINT64 * px, UINT64 * py _EXC_FLAGS_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_maxnum (UINT64 x, UINT64 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT64 res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  // check for non-canonical x
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NaN
+    x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    x = x & (MASK_SIGN | MASK_INF);
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	x = (x & MASK_SIGN) | ((x & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical 
+  }
+
+  // check for non-canonical y
+  if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN
+    y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((y & 0x0003ffffffffffffull) > 999999999999999ull) {
+      y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {	// check for Infinity
+    y = y & (MASK_SIGN | MASK_INF);
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((y & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	y = (y & MASK_SIGN) | ((y & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical
+  }
+
+  // NaN (CASE1)
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x = x & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y = y & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal (not Greater).
+  if (x == y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x is neg infinity, there is no way it is greater than y, return y
+    // x is pos infinity, it is greater, unless y is positive infinity => 
+    // return y!=pos_infinity
+    if (((x & MASK_SIGN) == MASK_SIGN)) {
+      res = y;
+      BID_RETURN (res);
+    } else {
+      res = (((y & MASK_INF) != MASK_INF)
+	     || ((y & MASK_SIGN) == MASK_SIGN)) ? x : y;
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so if y is positive infinity, then x is less, return y
+    //                 if y is negative infinity, then x is greater, return x
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore 
+  //        ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (sig_x == 0) {
+    x_is_zero = 1;
+  }
+  if (sig_y == 0) {
+    y_is_zero = 1;
+  }
+
+  if (x_is_zero && y_is_zero) {
+    // if both numbers are zero, neither is greater => return NOTGREATERTHAN
+    res = y;
+    BID_RETURN (res);
+  } else if (x_is_zero) {
+    // is x is zero, it is greater if Y is negative
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  } else if (y_is_zero) {
+    // is y is zero, X is greater if it is positive
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? x : y;;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGN (CASE5)
+  // now, if the sign bits differ, x is greater if y is negative
+  if (((x ^ y) & MASK_SIGN) == MASK_SIGN) {
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+
+  // if both components are either bigger or smaller, 
+  //     it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN) ? x : y;
+    // difference cannot be > 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) == MASK_SIGN) ? x : y;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // if postitive, return whichever significand is larger 
+    // (converse if negative)
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      res = y;
+      BID_RETURN (res);
+    }
+    res = (((sig_n_prime.w[1] > 0)
+	    || sig_n_prime.w[0] > sig_y) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN)) ? x : y;
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if postitive, return whichever significand is larger (converse if negative)
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = y;
+    BID_RETURN (res);
+  }
+  res = (((sig_n_prime.w[1] == 0)
+	  && (sig_x > sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					    MASK_SIGN)) ? x : y;
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64 maximum magnitude function - returns greater of two numbers
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_maxnum_mag (UINT64 * pres, UINT64 * px,
+		  UINT64 * py _EXC_FLAGS_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_maxnum_mag (UINT64 x, UINT64 y _EXC_FLAGS_PARAM) {
+#endif
+
+  UINT64 res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y;
+  UINT128 sig_n_prime;
+
+  // check for non-canonical x
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NaN
+    x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    x = x & (MASK_SIGN | MASK_INF);
+  } else {	// x is not special
+    // check for non-canonical values - treated as zero
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	x = (x & MASK_SIGN) | ((x & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical 
+  }
+
+  // check for non-canonical y
+  if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN
+    y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((y & 0x0003ffffffffffffull) > 999999999999999ull) {
+      y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {	// check for Infinity
+    y = y & (MASK_SIGN | MASK_INF);
+  } else {	// y is not special
+    // check for non-canonical values - treated as zero
+    if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11, then the exponent is G[0:w+1]
+      if (((y & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	y = (y & MASK_SIGN) | ((y & MASK_BINARY_EXPONENT2) << 2);
+      }	// else canonical
+    }	// else canonical
+  }
+
+  // NaN (CASE1)
+  if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNaN
+      // if x is SNAN, then return quiet (x)
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      x = x & 0xfdffffffffffffffull;	// quietize x
+      res = x;
+    } else {	// x is QNaN
+      if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+	if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  *pfpsf |= INVALID_EXCEPTION;	// set invalid flag
+	}
+	res = x;
+      } else {
+	res = y;
+      }
+    }
+    BID_RETURN (res);
+  } else if ((y & MASK_NAN) == MASK_NAN) {	// y is NaN, but x is not
+    if ((y & MASK_SNAN) == MASK_SNAN) {
+      *pfpsf |= INVALID_EXCEPTION;	// set exception if SNaN
+      y = y & 0xfdffffffffffffffull;	// quietize y
+      res = y;
+    } else {
+      // will return x (which is not NaN)
+      res = x;
+    }
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal, return either number
+  if (x == y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // x is infinity, its magnitude is greater than or equal to y
+    // return y as long as x isn't negative infinity
+    res = ((x & MASK_SIGN) == MASK_SIGN
+	   && (y & MASK_INF) == MASK_INF) ? y : x;
+    BID_RETURN (res);
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // y is infinity, then it must be greater in magnitude
+    res = y;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+  }
+
+  // ZERO (CASE4)
+  // some properties:
+  //    (+ZERO == -ZERO) => therefore 
+  //        ignore the sign, and neither number is greater
+  //    (ZERO x 10^A == ZERO x 10^B) for any valid A, B => 
+  //        ignore the exponent field
+  //    (Any non-canonical # is considered 0)
+  if (sig_x == 0) {
+    res = y;	// x_is_zero, its magnitude must be smaller than y
+    BID_RETURN (res);
+  }
+  if (sig_y == 0) {
+    res = x;	// y_is_zero, its magnitude must be smaller than x
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = x;
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = y;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = x;	// difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = y;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down to the compensated significand
+  if (exp_x > exp_y) {	// to simplify the loop below,
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // now, sig_n_prime has: sig_x * 10^(exp_x-exp_y), 
+    // this is the compensated signif.
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      // two numbers are equal, return maxNum(x,y)
+      res = ((y & MASK_SIGN) == MASK_SIGN) ? x : y;
+      BID_RETURN (res);
+    }
+    // now, if compensated_x (sig_n_prime) is greater than y return y,  
+    // otherwise return x
+    res = ((sig_n_prime.w[1] != 0) || sig_n_prime.w[0] > sig_y) ? x : y;
+    BID_RETURN (res);
+  }
+  // exp_y must be greater than exp_x, thus adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = ((y & MASK_SIGN) == MASK_SIGN) ? x : y;
+    // two numbers are equal, return either
+    BID_RETURN (res);
+  }
+
+  res = ((sig_n_prime.w[1] == 0) && (sig_x > sig_n_prime.w[0])) ? x : y;
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_mul.c b/gcc-4.9/libgcc/config/libbid/bid64_mul.c
new file mode 100644
index 000000000..213fc68eb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_mul.c
@@ -0,0 +1,374 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 multiply
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  if(number_digits(coefficient_x)+number_digits(coefficient_y) guaranteed
+ *       below 16)
+ *      return get_BID64(sign_x^sign_y, exponent_x + exponent_y - dec_bias,
+ *                     coefficient_x*coefficient_y)
+ *  else
+ *      get long product: coefficient_x*coefficient_y
+ *      determine number of digits to round off (extra_digits)
+ *      rounding is performed as a 128x128-bit multiplication by 
+ *         2^M[extra_digits]/10^extra_digits, followed by a shift
+ *         M[extra_digits] is sufficiently large for required accuracy 
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_mul (UINT64 * pres, UINT64 * px,
+	   UINT64 *
+	   py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	   _EXC_INFO_PARAM) {
+  UINT64 x, y;
+#else
+
+UINT64
+bid64_mul (UINT64 x,
+	   UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 P, PU, C128, Q_high, Q_low, Stemp;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y;
+  UINT64 C64, remainder_h, carry, CY, res;
+  UINT64 valid_x, valid_y;
+  int_double tempx, tempy;
+  int extra_digits, exponent_x, exponent_y, bin_expon_cx, bin_expon_cy,
+    bin_expon_product;
+  int rmode, digits_p, bp, amount, amount2, final_exponent, round_up;
+  unsigned status, uf_status;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  y = *py;
+#endif
+
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+  valid_y = unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y);
+
+  // unpack arguments, check for NaN or Infinity
+  if (!valid_x) {
+
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    // x is Inf. or NaN
+
+    // test if x is NaN
+    if ((x & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+      if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (coefficient_x & QUIET_MASK64);
+    }
+    // x is Infinity?
+    if ((x & INFINITY_MASK64) == INFINITY_MASK64) {
+      // check if y is 0
+      if (((y & INFINITY_MASK64) != INFINITY_MASK64)
+	  && !coefficient_y) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	// y==0 , return NaN
+	BID_RETURN (NAN_MASK64);
+      }
+      // check if y is NaN
+      if ((y & NAN_MASK64) == NAN_MASK64)
+	// y==NaN , return NaN
+	BID_RETURN (coefficient_y & QUIET_MASK64);
+      // otherwise return +/-Inf
+      BID_RETURN (((x ^ y) & 0x8000000000000000ull) | INFINITY_MASK64);
+    }
+    // x is 0
+    if (((y & INFINITY_MASK64) != INFINITY_MASK64)) {
+      if ((y & SPECIAL_ENCODING_MASK64) == SPECIAL_ENCODING_MASK64)
+	exponent_y = ((UINT32) (y >> 51)) & 0x3ff;
+      else
+	exponent_y = ((UINT32) (y >> 53)) & 0x3ff;
+      sign_y = y & 0x8000000000000000ull;
+
+      exponent_x += exponent_y - DECIMAL_EXPONENT_BIAS;
+      if (exponent_x > DECIMAL_MAX_EXPON_64)
+	exponent_x = DECIMAL_MAX_EXPON_64;
+      else if (exponent_x < 0)
+	exponent_x = 0;
+      BID_RETURN ((sign_x ^ sign_y) | (((UINT64) exponent_x) << 53));
+    }
+  }
+  if (!valid_y) {
+    // y is Inf. or NaN
+
+    // test if y is NaN
+    if ((y & NAN_MASK64) == NAN_MASK64) {
+#ifdef SET_STATUS_FLAGS
+      if ((y & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (coefficient_y & QUIET_MASK64);
+    }
+    // y is Infinity?
+    if ((y & INFINITY_MASK64) == INFINITY_MASK64) {
+      // check if x is 0
+      if (!coefficient_x) {
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+	// x==0, return NaN
+	BID_RETURN (NAN_MASK64);
+      }
+      // otherwise return +/-Inf
+      BID_RETURN (((x ^ y) & 0x8000000000000000ull) | INFINITY_MASK64);
+    }
+    // y is 0
+    exponent_x += exponent_y - DECIMAL_EXPONENT_BIAS;
+    if (exponent_x > DECIMAL_MAX_EXPON_64)
+      exponent_x = DECIMAL_MAX_EXPON_64;
+    else if (exponent_x < 0)
+      exponent_x = 0;
+    BID_RETURN ((sign_x ^ sign_y) | (((UINT64) exponent_x) << 53));
+  }
+  //--- get number of bits in the coefficients of x and y ---
+  // version 2 (original)
+  tempx.d = (double) coefficient_x;
+  bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52);
+  tempy.d = (double) coefficient_y;
+  bin_expon_cy = ((tempy.i & MASK_BINARY_EXPONENT) >> 52);
+
+  // magnitude estimate for coefficient_x*coefficient_y is 
+  //        2^(unbiased_bin_expon_cx + unbiased_bin_expon_cx)
+  bin_expon_product = bin_expon_cx + bin_expon_cy;
+
+  // check if coefficient_x*coefficient_y<2^(10*k+3)
+  // equivalent to unbiased_bin_expon_cx + unbiased_bin_expon_cx < 10*k+1
+  if (bin_expon_product < UPPER_EXPON_LIMIT + 2 * BINARY_EXPONENT_BIAS) {
+    //  easy multiply
+    C64 = coefficient_x * coefficient_y;
+
+    res =
+      get_BID64_small_mantissa (sign_x ^ sign_y,
+				exponent_x + exponent_y -
+				DECIMAL_EXPONENT_BIAS, C64, rnd_mode,
+				pfpsf);
+    BID_RETURN (res);
+  } else {
+    uf_status = 0;
+    // get 128-bit product: coefficient_x*coefficient_y
+    __mul_64x64_to_128 (P, coefficient_x, coefficient_y);
+
+    // tighten binary range of P:  leading bit is 2^bp
+    // unbiased_bin_expon_product <= bp <= unbiased_bin_expon_product+1
+    bin_expon_product -= 2 * BINARY_EXPONENT_BIAS;
+
+    __tight_bin_range_128 (bp, P, bin_expon_product);
+
+    // get number of decimal digits in the product
+    digits_p = estimate_decimal_digits[bp];
+    if (!(__unsigned_compare_gt_128 (power10_table_128[digits_p], P)))
+      digits_p++;	// if power10_table_128[digits_p] <= P
+
+    // determine number of decimal digits to be rounded out
+    extra_digits = digits_p - MAX_FORMAT_DIGITS;
+    final_exponent =
+      exponent_x + exponent_y + extra_digits - DECIMAL_EXPONENT_BIAS;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x ^ sign_y && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+
+    round_up = 0;
+    if (((unsigned) final_exponent) >= 3 * 256) {
+      if (final_exponent < 0) {
+	// underflow
+	if (final_exponent + 16 < 0) {
+	  res = sign_x ^ sign_y;
+	  __set_status_flags (pfpsf,
+			      UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+	  if (rmode == ROUNDING_UP)
+	    res |= 1;
+	  BID_RETURN (res);
+	}
+
+	uf_status = UNDERFLOW_EXCEPTION;
+	if (final_exponent == -1) {
+	  __add_128_64 (PU, P, round_const_table[rmode][extra_digits]);
+	  if (__unsigned_compare_ge_128
+	      (PU, power10_table_128[extra_digits + 16]))
+	    uf_status = 0;
+	}
+	extra_digits -= final_exponent;
+	final_exponent = 0;
+
+	if (extra_digits > 17) {
+	  __mul_128x128_full (Q_high, Q_low, P, reciprocals10_128[16]);
+
+	  amount = recip_scale[16];
+	  __shr_128 (P, Q_high, amount);
+
+	  // get sticky bits
+	  amount2 = 64 - amount;
+	  remainder_h = 0;
+	  remainder_h--;
+	  remainder_h >>= amount2;
+	  remainder_h = remainder_h & Q_high.w[0];
+
+	  extra_digits -= 16;
+	  if (remainder_h || (Q_low.w[1] > reciprocals10_128[16].w[1]
+			      || (Q_low.w[1] ==
+				  reciprocals10_128[16].w[1]
+				  && Q_low.w[0] >=
+				  reciprocals10_128[16].w[0]))) {
+	    round_up = 1;
+	    __set_status_flags (pfpsf,
+				UNDERFLOW_EXCEPTION |
+				INEXACT_EXCEPTION);
+	    P.w[0] = (P.w[0] << 3) + (P.w[0] << 1);
+	    P.w[0] |= 1;
+	    extra_digits++;
+	  }
+	}
+      } else {
+	res =
+	  fast_get_BID64_check_OF (sign_x ^ sign_y, final_exponent,
+				   1000000000000000ull, rnd_mode,
+				   pfpsf);
+	BID_RETURN (res);
+      }
+    }
+
+
+    if (extra_digits > 0) {
+      // will divide by 10^(digits_p - 16)
+
+      // add a constant to P, depending on rounding mode
+      // 0.5*10^(digits_p - 16) for round-to-nearest
+      __add_128_64 (P, P, round_const_table[rmode][extra_digits]);
+
+      // get P*(2^M[extra_digits])/10^extra_digits
+      __mul_128x128_full (Q_high, Q_low, P,
+			  reciprocals10_128[extra_digits]);
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[extra_digits];
+      __shr_128 (C128, Q_high, amount);
+
+      C64 = __low_64 (C128);
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+	if ((C64 & 1) && !round_up) {
+	  // check whether fractional part of initial_P/10^extra_digits 
+	  // is exactly .5
+	  // this is the same as fractional part of 
+	  // (initial_P + 0.5*10^extra_digits)/10^extra_digits is exactly zero
+
+	  // get remainder
+	  remainder_h = Q_high.w[0] << (64 - amount);
+
+	  // test whether fractional part is 0
+	  if (!remainder_h
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0]))) {
+	    C64--;
+	  }
+	}
+#endif
+
+#ifdef SET_STATUS_FLAGS
+      status = INEXACT_EXCEPTION | uf_status;
+
+      // get remainder
+      remainder_h = Q_high.w[0] << (64 - amount);
+
+      switch (rmode) {
+      case ROUNDING_TO_NEAREST:
+      case ROUNDING_TIES_AWAY:
+	// test whether fractional part is 0
+	if (remainder_h == 0x8000000000000000ull
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      case ROUNDING_DOWN:
+      case ROUNDING_TO_ZERO:
+	if (!remainder_h
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      default:
+	// round up
+	__add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+			 reciprocals10_128[extra_digits].w[0]);
+	__add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			    reciprocals10_128[extra_digits].w[1], CY);
+	if ((remainder_h >> (64 - amount)) + carry >=
+	    (((UINT64) 1) << amount))
+	  status = EXACT_STATUS;
+      }
+
+      __set_status_flags (pfpsf, status);
+#endif
+
+      // convert to BID and return
+      res =
+	fast_get_BID64_check_OF (sign_x ^ sign_y, final_exponent, C64,
+				 rmode, pfpsf);
+      BID_RETURN (res);
+    }
+    // go to convert_format and exit
+    C64 = __low_64 (P);
+    res =
+      get_BID64 (sign_x ^ sign_y,
+		 exponent_x + exponent_y - DECIMAL_EXPONENT_BIAS, C64,
+		 rmode, pfpsf);
+    BID_RETURN (res);
+  }
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_next.c b/gcc-4.9/libgcc/config/libbid/bid64_next.c
new file mode 100644
index 000000000..c9c982a2d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_next.c
@@ -0,0 +1,481 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64 nextup
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_nextup (UINT64 * pres,
+	      UINT64 *
+	      px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_nextup (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	      _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q1, ind;
+  UINT64 C1;			// C1 represents x_signif (UINT64)
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN)
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    if (!(x & 0x8000000000000000ull)) {	// x is +inf
+      res = 0x7800000000000000ull;
+    } else {	// x is -inf
+      res = 0xf7fb86f26fc0ffffull;	// -MAXFP = -999...99 * 10^emax
+    }
+    BID_RETURN (res);
+  }
+  // unpack the argument
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000001ull;	// MINFP = 1 * 10^emin
+  } else {	// x is not special and is not zero
+    if (x == 0x77fb86f26fc0ffffull) {
+      // x = +MAXFP = 999...99 * 10^emax
+      res = 0x7800000000000000ull;	// +inf
+    } else if (x == 0x8000000000000001ull) {
+      // x = -MINFP = 1...99 * 10^emin
+      res = 0x8000000000000000ull;	// -0
+    } else {	// -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+      // can add/subtract 1 ulp to the significand
+
+      // Note: we could check here if x >= 10^16 to speed up the case q1 =16 
+      // q1 = nr. of decimal digits in x (1 <= q1 <= 54)
+      //  determine first the nr. of bits in x
+      if (C1 >= MASK_BINARY_OR2) {	// x >= 2^53
+	// split the 64-bit value in two 32-bit halves to avoid rounding errors
+	if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+	  tmp1.d = (double) (C1 >> 32);	// exact conversion
+	  x_nr_bits =
+	    33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	} else {	// x < 2^32
+	  tmp1.d = (double) C1;	// exact conversion
+	  x_nr_bits =
+	    1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// if x < 2^53
+	tmp1.d = (double) C1;	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+      q1 = nr_digits[x_nr_bits - 1].digits;
+      if (q1 == 0) {
+	q1 = nr_digits[x_nr_bits - 1].digits1;
+	if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	  q1++;
+      }
+      // if q1 < P16 then pad the significand with zeros
+      if (q1 < P16) {
+	if (x_exp > (UINT64) (P16 - q1)) {
+	  ind = P16 - q1;	// 1 <= ind <= P16 - 1
+	  // pad with P16 - q1 zeros, until exponent = emin
+	  // C1 = C1 * 10^ind
+	  C1 = C1 * ten2k64[ind];
+	  x_exp = x_exp - ind;
+	} else {	// pad with zeros until the exponent reaches emin
+	  ind = x_exp;
+	  C1 = C1 * ten2k64[ind];
+	  x_exp = EXP_MIN;
+	}
+      }
+      if (!x_sign) {	// x > 0
+	// add 1 ulp (add 1 to the significand)
+	C1++;
+	if (C1 == 0x002386f26fc10000ull) {	// if  C1 = 10^16
+	  C1 = 0x00038d7ea4c68000ull;	// C1 = 10^15
+	  x_exp++;
+	}
+	// Ok, because MAXFP = 999...99 * 10^emax was caught already
+      } else {	// x < 0
+	// subtract 1 ulp (subtract 1 from the significand)
+	C1--;
+	if (C1 == 0x00038d7ea4c67fffull && x_exp != 0) {	// if  C1 = 10^15 - 1
+	  C1 = 0x002386f26fc0ffffull;	// C1 = 10^16 - 1
+	  x_exp--;
+	}
+      }
+      // assemble the result
+      // if significand has 54 bits
+      if (C1 & MASK_BINARY_OR2) {
+	res =
+	  x_sign | (x_exp << 51) | MASK_STEERING_BITS | (C1 &
+							 MASK_BINARY_SIG2);
+      } else {	// significand fits in 53 bits
+	res = x_sign | (x_exp << 53) | C1;
+      }
+    }	// end -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+  }	// end x is not special and is not zero
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64 nextdown
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_nextdown (UINT64 * pres,
+		UINT64 *
+		px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_nextdown (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		_EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q1, ind;
+  UINT64 C1;			// C1 represents x_signif (UINT64)
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN 
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits 
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN)
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN 
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    if (x & 0x8000000000000000ull) {	// x is -inf
+      res = 0xf800000000000000ull;
+    } else {	// x is +inf
+      res = 0x77fb86f26fc0ffffull;	// +MAXFP = +999...99 * 10^emax
+    }
+    BID_RETURN (res);
+  }
+  // unpack the argument
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x8000000000000001ull;	// -MINFP = -1 * 10^emin
+  } else {	// x is not special and is not zero
+    if (x == 0xf7fb86f26fc0ffffull) {
+      // x = -MAXFP = -999...99 * 10^emax
+      res = 0xf800000000000000ull;	// -inf
+    } else if (x == 0x0000000000000001ull) {
+      // x = +MINFP = 1...99 * 10^emin
+      res = 0x0000000000000000ull;	// -0
+    } else {	// -MAXFP + 1ulp <= x <= -MINFP OR MINFP + 1 ulp <= x <= MAXFP
+      // can add/subtract 1 ulp to the significand
+
+      // Note: we could check here if x >= 10^16 to speed up the case q1 =16 
+      // q1 = nr. of decimal digits in x (1 <= q1 <= 16)
+      //  determine first the nr. of bits in x
+      if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+	// split the 64-bit value in two 32-bit halves to avoid 
+	// rounding errors
+	if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+	  tmp1.d = (double) (C1 >> 32);	// exact conversion
+	  x_nr_bits =
+	    33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	} else {	// x < 2^32
+	  tmp1.d = (double) C1;	// exact conversion
+	  x_nr_bits =
+	    1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+	}
+      } else {	// if x < 2^53
+	tmp1.d = (double) C1;	// exact conversion
+	x_nr_bits =
+	  1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+      }
+      q1 = nr_digits[x_nr_bits - 1].digits;
+      if (q1 == 0) {
+	q1 = nr_digits[x_nr_bits - 1].digits1;
+	if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	  q1++;
+      }
+      // if q1 < P16 then pad the significand with zeros
+      if (q1 < P16) {
+	if (x_exp > (UINT64) (P16 - q1)) {
+	  ind = P16 - q1;	// 1 <= ind <= P16 - 1
+	  // pad with P16 - q1 zeros, until exponent = emin
+	  // C1 = C1 * 10^ind
+	  C1 = C1 * ten2k64[ind];
+	  x_exp = x_exp - ind;
+	} else {	// pad with zeros until the exponent reaches emin
+	  ind = x_exp;
+	  C1 = C1 * ten2k64[ind];
+	  x_exp = EXP_MIN;
+	}
+      }
+      if (x_sign) {	// x < 0
+	// add 1 ulp (add 1 to the significand)
+	C1++;
+	if (C1 == 0x002386f26fc10000ull) {	// if  C1 = 10^16
+	  C1 = 0x00038d7ea4c68000ull;	// C1 = 10^15
+	  x_exp++;
+	  // Ok, because -MAXFP = -999...99 * 10^emax was caught already
+	}
+      } else {	// x > 0
+	// subtract 1 ulp (subtract 1 from the significand)
+	C1--;
+	if (C1 == 0x00038d7ea4c67fffull && x_exp != 0) {	// if  C1 = 10^15 - 1
+	  C1 = 0x002386f26fc0ffffull;	// C1 = 10^16 - 1
+	  x_exp--;
+	}
+      }
+      // assemble the result
+      // if significand has 54 bits
+      if (C1 & MASK_BINARY_OR2) {
+	res =
+	  x_sign | (x_exp << 51) | MASK_STEERING_BITS | (C1 &
+							 MASK_BINARY_SIG2);
+      } else {	// significand fits in 53 bits
+	res = x_sign | (x_exp << 53) | C1;
+      }
+    }	// end -MAXFP <= x <= -MINFP - 1 ulp OR MINFP <= x <= MAXFP - 1 ulp
+  }	// end x is not special and is not zero
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64 nextafter
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_nextafter (UINT64 * pres, UINT64 * px,
+		 UINT64 *
+		 py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_nextafter (UINT64 x,
+		 UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		 _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res;
+  UINT64 tmp1, tmp2;
+  FPSC tmp_fpsf = 0;		// dummy fpsf for calls to comparison functions
+  int res1, res2;
+
+  // check for NaNs or infinities
+  if (((x & MASK_SPECIAL) == MASK_SPECIAL) ||
+      ((y & MASK_SPECIAL) == MASK_SPECIAL)) {
+    // x is NaN or infinity or y is NaN or infinity
+
+    if ((x & MASK_NAN) == MASK_NAN) {	// x is NAN
+      if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+	x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+      else
+	x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+      if ((x & MASK_SNAN) == MASK_SNAN) {	// x is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (x)
+	res = x & 0xfdffffffffffffffull;
+      } else {	// x is QNaN
+	if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	}
+	// return x
+	res = x;
+      }
+      BID_RETURN (res);
+    } else if ((y & MASK_NAN) == MASK_NAN) {	// y is NAN
+      if ((y & 0x0003ffffffffffffull) > 999999999999999ull)
+	y = y & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+      else
+	y = y & 0xfe03ffffffffffffull;	// clear G6-G12
+      if ((y & MASK_SNAN) == MASK_SNAN) {	// y is SNAN
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return quiet (y)
+	res = y & 0xfdffffffffffffffull;
+      } else {	// y is QNaN
+	// return y
+	res = y;
+      }
+      BID_RETURN (res);
+    } else {	// at least one is infinity
+      if ((x & MASK_ANY_INF) == MASK_INF) {	// x = inf
+	x = x & (MASK_SIGN | MASK_INF);
+      }
+      if ((y & MASK_ANY_INF) == MASK_INF) {	// y = inf
+	y = y & (MASK_SIGN | MASK_INF);
+      }
+    }
+  }
+  // neither x nor y is NaN
+
+  // if not infinity, check for non-canonical values x (treated as zero)
+  if ((x & MASK_ANY_INF) != MASK_INF) {	// x != inf
+    // unpack x
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      // if the steering bits are 11 (condition will be 0), then
+      // the exponent is G[0:w+1]
+      if (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+	  9999999999999999ull) {
+	// non-canonical
+	x = (x & MASK_SIGN) | ((x & MASK_BINARY_EXPONENT2) << 2);
+      }
+    } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS) x is unch.
+      ;	// canonical
+    }
+  }
+  // no need to check for non-canonical y
+
+  // neither x nor y is NaN
+  tmp_fpsf = *pfpsf;	// save fpsf
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_quiet_equal (&res1, px,
+		     py _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  bid64_quiet_greater (&res2, px,
+		       py _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#else
+  res1 =
+    bid64_quiet_equal (x,
+		       y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+  res2 =
+    bid64_quiet_greater (x,
+			 y _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#endif
+  *pfpsf = tmp_fpsf;	// restore fpsf
+  if (res1) {	// x = y
+    // return x with the sign of y
+    res = (y & 0x8000000000000000ull) | (x & 0x7fffffffffffffffull);
+  } else if (res2) {	// x > y
+#if DECIMAL_CALL_BY_REFERENCE
+    bid64_nextdown (&res,
+		    px _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#else
+    res =
+      bid64_nextdown (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#endif
+  } else {	// x < y
+#if DECIMAL_CALL_BY_REFERENCE
+    bid64_nextup (&res, px _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#else
+    res = bid64_nextup (x _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG);
+#endif
+  }
+  // if the operand x is finite but the result is infinite, signal
+  // overflow and inexact
+  if (((x & MASK_INF) != MASK_INF) && ((res & MASK_INF) == MASK_INF)) {
+    // set the inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // set the overflow flag
+    *pfpsf |= OVERFLOW_EXCEPTION;
+  }
+  // if the result is in (-10^emin, 10^emin), and is different from the
+  // operand x, signal underflow and inexact 
+  tmp1 = 0x00038d7ea4c68000ull;	// +100...0[16] * 10^emin
+  tmp2 = res & 0x7fffffffffffffffull;
+  tmp_fpsf = *pfpsf;	// save fpsf
+#if DECIMAL_CALL_BY_REFERENCE
+  bid64_quiet_greater (&res1, &tmp1,
+		       &tmp2 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+		       _EXC_INFO_ARG);
+  bid64_quiet_not_equal (&res2, &x,
+			 &res _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			 _EXC_INFO_ARG);
+#else
+  res1 =
+    bid64_quiet_greater (tmp1,
+			 tmp2 _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			 _EXC_INFO_ARG);
+  res2 =
+    bid64_quiet_not_equal (x,
+			   res _EXC_FLAGS_ARG _EXC_MASKS_ARG
+			   _EXC_INFO_ARG);
+#endif
+  *pfpsf = tmp_fpsf;	// restore fpsf
+  if (res1 && res2) {
+    // if (bid64_quiet_greater (tmp1, tmp2, &tmp_fpsf) &&
+    // bid64_quiet_not_equal (x, res, &tmp_fpsf)) {
+    // set the inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // set the underflow flag
+    *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_noncomp.c b/gcc-4.9/libgcc/config/libbid/bid64_noncomp.c
new file mode 100644
index 000000000..3eee042c2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_noncomp.c
@@ -0,0 +1,954 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+static const UINT64 mult_factor[16] = {
+  1ull, 10ull, 100ull, 1000ull,
+  10000ull, 100000ull, 1000000ull, 10000000ull,
+  100000000ull, 1000000000ull, 10000000000ull, 100000000000ull,
+  1000000000000ull, 10000000000000ull,
+  100000000000000ull, 1000000000000000ull
+};
+
+/*****************************************************************************
+ *    BID64 non-computational functions:
+ *         - bid64_isSigned
+ *         - bid64_isNormal
+ *         - bid64_isSubnormal
+ *         - bid64_isFinite
+ *         - bid64_isZero
+ *         - bid64_isInf
+ *         - bid64_isSignaling
+ *         - bid64_isCanonical
+ *         - bid64_isNaN
+ *         - bid64_copy
+ *         - bid64_negate
+ *         - bid64_abs
+ *         - bid64_copySign
+ *         - bid64_class
+ *         - bid64_sameQuantum
+ *         - bid64_totalOrder
+ *         - bid64_totalOrderMag
+ *         - bid64_radix
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isSigned (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isSigned (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x & MASK_SIGN) == MASK_SIGN);
+  BID_RETURN (res);
+}
+
+// return 1 iff x is not zero, nor NaN nor subnormal nor infinity
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isNormal (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isNormal (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT128 sig_x_prime;
+  UINT64 sig_x;
+  unsigned int exp_x;
+
+  if ((x & MASK_INF) == MASK_INF) {	// x is either INF or NaN
+    res = 0;
+  } else {
+    // decode number into exponent and significand
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+      // check for zero or non-canonical
+      if (sig_x > 9999999999999999ull || sig_x == 0) {
+	res = 0;	// zero or non-canonical
+	BID_RETURN (res);
+      }
+      exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    } else {
+      sig_x = (x & MASK_BINARY_SIG1);
+      if (sig_x == 0) {
+	res = 0;	// zero
+	BID_RETURN (res);
+      }
+      exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    }
+    // if exponent is less than -383, the number may be subnormal
+    // if (exp_x - 398 = -383) the number may be subnormal
+    if (exp_x < 15) {
+      __mul_64x64_to_128MACH (sig_x_prime, sig_x, mult_factor[exp_x]);
+      if (sig_x_prime.w[1] == 0
+	  && sig_x_prime.w[0] < 1000000000000000ull) {
+	res = 0;	// subnormal
+      } else {
+	res = 1;	// normal
+      }
+    } else {
+      res = 1;	// normal
+    }
+  }
+  BID_RETURN (res);
+}
+
+// return 1 iff x is not zero, nor NaN nor normal nor infinity
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isSubnormal (int *pres,
+		   UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isSubnormal (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT128 sig_x_prime;
+  UINT64 sig_x;
+  unsigned int exp_x;
+
+  if ((x & MASK_INF) == MASK_INF) {	// x is either INF or NaN
+    res = 0;
+  } else {
+    // decode number into exponent and significand
+    if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+      sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+      // check for zero or non-canonical
+      if (sig_x > 9999999999999999ull || sig_x == 0) {
+	res = 0;	// zero or non-canonical
+	BID_RETURN (res);
+      }
+      exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    } else {
+      sig_x = (x & MASK_BINARY_SIG1);
+      if (sig_x == 0) {
+	res = 0;	// zero
+	BID_RETURN (res);
+      }
+      exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    }
+    // if exponent is less than -383, the number may be subnormal
+    // if (exp_x - 398 = -383) the number may be subnormal
+    if (exp_x < 15) {
+      __mul_64x64_to_128MACH (sig_x_prime, sig_x, mult_factor[exp_x]);
+      if (sig_x_prime.w[1] == 0
+	  && sig_x_prime.w[0] < 1000000000000000ull) {
+	res = 1;	// subnormal
+      } else {
+	res = 0;	// normal
+      }
+    } else {
+      res = 0;	// normal
+    }
+  }
+  BID_RETURN (res);
+}
+
+//iff x is zero, subnormal or normal (not infinity or NaN)
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isFinite (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isFinite (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x & MASK_INF) != MASK_INF);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isZero (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isZero (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  // if infinity or nan, return 0
+  if ((x & MASK_INF) == MASK_INF) {
+    res = 0;
+  } else if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1]
+    // => sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    // if(sig_x > 9999999999999999ull) {return 1;}
+    res =
+      (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) >
+       9999999999999999ull);
+  } else {
+    res = ((x & MASK_BINARY_SIG1) == 0);
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isInf (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isInf (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x & MASK_INF) == MASK_INF) && ((x & MASK_NAN) != MASK_NAN);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isSignaling (int *pres,
+		   UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isSignaling (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x & MASK_SNAN) == MASK_SNAN);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isCanonical (int *pres,
+		   UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isCanonical (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  if ((x & MASK_NAN) == MASK_NAN) {	// NaN
+    if (x & 0x01fc000000000000ull) {
+      res = 0;
+    } else if ((x & 0x0003ffffffffffffull) > 999999999999999ull) {	// payload
+      res = 0;
+    } else {
+      res = 1;
+    }
+  } else if ((x & MASK_INF) == MASK_INF) {
+    if (x & 0x03ffffffffffffffull) {
+      res = 0;
+    } else {
+      res = 1;
+    }
+  } else if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {	// 54-bit coeff.
+    res =
+      (((x & MASK_BINARY_SIG2) | MASK_BINARY_OR2) <=
+       9999999999999999ull);
+  } else {	// 53-bit coeff.
+    res = 1;
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_isNaN (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_isNaN (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+
+  res = ((x & MASK_NAN) == MASK_NAN);
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, with no change
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_copy (UINT64 * pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_copy (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  res = x;
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, reversing the sign
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_negate (UINT64 * pres,
+	      UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_negate (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  res = x ^ MASK_SIGN;
+  BID_RETURN (res);
+}
+
+// copies a floating-point operand x to destination y, changing the sign to positive
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_abs (UINT64 * pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_abs (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  res = x & ~MASK_SIGN;
+  BID_RETURN (res);
+}
+
+// copies operand x to destination in the same format as x, but 
+// with the sign of y
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_copySign (UINT64 * pres, UINT64 * px,
+		UINT64 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+UINT64
+bid64_copySign (UINT64 x, UINT64 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  res = (x & ~MASK_SIGN) | (y & MASK_SIGN);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_class (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_class (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT128 sig_x_prime;
+  UINT64 sig_x;
+  int exp_x;
+
+  if ((x & MASK_NAN) == MASK_NAN) {
+    // is the NaN signaling?
+    if ((x & MASK_SNAN) == MASK_SNAN) {
+      res = signalingNaN;
+      BID_RETURN (res);
+    }
+    // if NaN and not signaling, must be quietNaN
+    res = quietNaN;
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {
+    // is the Infinity negative?
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      res = negativeInfinity;
+    } else {
+      // otherwise, must be positive infinity
+      res = positiveInfinity;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // decode number into exponent and significand
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    // check for zero or non-canonical
+    if (sig_x > 9999999999999999ull || sig_x == 0) {
+      if ((x & MASK_SIGN) == MASK_SIGN) {
+	res = negativeZero;
+      } else {
+	res = positiveZero;
+      }
+      BID_RETURN (res);
+    }
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+  } else {
+    sig_x = (x & MASK_BINARY_SIG1);
+    if (sig_x == 0) {
+      res =
+	((x & MASK_SIGN) == MASK_SIGN) ? negativeZero : positiveZero;
+      BID_RETURN (res);
+    }
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+  }
+  // if exponent is less than -383, number may be subnormal
+  //  if (exp_x - 398 < -383)
+  if (exp_x < 15) {	// sig_x *10^exp_x
+    __mul_64x64_to_128MACH (sig_x_prime, sig_x, mult_factor[exp_x]);
+    if (sig_x_prime.w[1] == 0
+	&& (sig_x_prime.w[0] < 1000000000000000ull)) {
+      res =
+	((x & MASK_SIGN) ==
+	 MASK_SIGN) ? negativeSubnormal : positiveSubnormal;
+      BID_RETURN (res);
+    }
+  }
+  // otherwise, normal number, determine the sign
+  res =
+    ((x & MASK_SIGN) == MASK_SIGN) ? negativeNormal : positiveNormal;
+  BID_RETURN (res);
+}
+
+// true if the exponents of x and y are the same, false otherwise.
+// The special cases of sameQuantum (NaN, NaN) and sameQuantum (Inf, Inf) are 
+// true.
+// If exactly one operand is infinite or exactly one operand is NaN, then false
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_sameQuantum (int *pres, UINT64 * px,
+		   UINT64 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_sameQuantum (UINT64 x, UINT64 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  unsigned int exp_x, exp_y;
+
+  // if both operands are NaN, return true; if just one is NaN, return false
+  if ((x & MASK_NAN) == MASK_NAN || ((y & MASK_NAN) == MASK_NAN)) {
+    res = ((x & MASK_NAN) == MASK_NAN && (y & MASK_NAN) == MASK_NAN);
+    BID_RETURN (res);
+  }
+  // if both operands are INF, return true; if just one is INF, return false
+  if ((x & MASK_INF) == MASK_INF || (y & MASK_INF) == MASK_INF) {
+    res = ((x & MASK_INF) == MASK_INF && (y & MASK_INF) == MASK_INF);
+    BID_RETURN (res);
+  }
+  // decode exponents for both numbers, and return true if they match
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+  }
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+  }
+  res = (exp_x == exp_y);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_totalOrder (int *pres, UINT64 * px,
+		  UINT64 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_totalOrder (UINT64 x, UINT64 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y, pyld_y, pyld_x;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  // NaN (CASE1)
+  // if x and y are unordered numerically because either operand is NaN
+  //    (1) totalOrder(-NaN, number) is true
+  //    (2) totalOrder(number, +NaN) is true
+  //    (3) if x and y are both NaN:
+  //           i) negative sign bit < positive sign bit
+  //           ii) signaling < quiet for +NaN, reverse for -NaN
+  //           iii) lesser payload < greater payload for +NaN (reverse for -NaN)
+  //           iv) else if bitwise identical (in canonical form), return 1
+  if ((x & MASK_NAN) == MASK_NAN) {
+    // if x is -NaN
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      // return true, unless y is -NaN also
+      if ((y & MASK_NAN) != MASK_NAN || (y & MASK_SIGN) != MASK_SIGN) {
+	res = 1;	// y is a number, return 1
+	BID_RETURN (res);
+      } else {	// if y and x are both -NaN
+	// if x and y are both -sNaN or both -qNaN, we have to compare payloads
+	// this xnor statement evaluates to true if both are sNaN or qNaN
+	if (!
+	    (((y & MASK_SNAN) == MASK_SNAN) ^ ((x & MASK_SNAN) ==
+					       MASK_SNAN))) {
+	  // it comes down to the payload.  we want to return true if x has a
+	  // larger payload, or if the payloads are equal (canonical forms
+	  // are bitwise identical)
+	  pyld_y = y & 0x0003ffffffffffffull;
+	  pyld_x = x & 0x0003ffffffffffffull;
+	  if (pyld_y > 999999999999999ull || pyld_y == 0) {
+	    // if y is zero, x must be less than or numerically equal
+	    // y's payload is 0
+	    res = 1;
+	    BID_RETURN (res);
+	  }
+	  // if x is zero and y isn't, x has the smaller payload
+	  // definitely (since we know y isn't 0 at this point)
+	  if (pyld_x > 999999999999999ull || pyld_x == 0) {
+	    // x's payload is 0
+	    res = 0;
+	    BID_RETURN (res);
+	  }
+	  res = (pyld_x >= pyld_y);
+	  BID_RETURN (res);
+	} else {
+	  // either x = -sNaN and y = -qNaN or x = -qNaN and y = -sNaN
+	  res = (y & MASK_SNAN) == MASK_SNAN;	// totalOrder(-qNaN, -sNaN) == 1
+	  BID_RETURN (res);
+	}
+      }
+    } else {	// x is +NaN
+      // return false, unless y is +NaN also
+      if ((y & MASK_NAN) != MASK_NAN || (y & MASK_SIGN) == MASK_SIGN) {
+	res = 0;	// y is a number, return 1
+	BID_RETURN (res);
+      } else {
+	// x and y are both +NaN; 
+	// must investigate payload if both quiet or both signaling
+	// this xnor statement will be true if both x and y are +qNaN or +sNaN
+	if (!
+	    (((y & MASK_SNAN) == MASK_SNAN) ^ ((x & MASK_SNAN) ==
+					       MASK_SNAN))) {
+	  // it comes down to the payload.  we want to return true if x has a
+	  // smaller payload, or if the payloads are equal (canonical forms
+	  // are bitwise identical)
+	  pyld_y = y & 0x0003ffffffffffffull;
+	  pyld_x = x & 0x0003ffffffffffffull;
+	  // if x is zero and y isn't, x has the smaller 
+	  // payload definitely (since we know y isn't 0 at this point)
+	  if (pyld_x > 999999999999999ull || pyld_x == 0) {
+	    res = 1;
+	    BID_RETURN (res);
+	  }
+	  if (pyld_y > 999999999999999ull || pyld_y == 0) {
+	    // if y is zero, x must be less than or numerically equal
+	    res = 0;
+	    BID_RETURN (res);
+	  }
+	  res = (pyld_x <= pyld_y);
+	  BID_RETURN (res);
+	} else {
+	  // return true if y is +qNaN and x is +sNaN 
+	  // (we know they're different bc of xor if_stmt above)
+	  res = ((x & MASK_SNAN) == MASK_SNAN);
+	  BID_RETURN (res);
+	}
+      }
+    }
+  } else if ((y & MASK_NAN) == MASK_NAN) {
+    // x is certainly not NAN in this case.
+    // return true if y is positive
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits are the same, these numbers are equal.
+  if (x == y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // OPPOSITE SIGNS (CASE 3)
+  // if signs are opposite, return 1 if x is negative 
+  // (if x<y, totalOrder is true)
+  if (((x & MASK_SIGN) == MASK_SIGN) ^ ((y & MASK_SIGN) == MASK_SIGN)) {
+    res = (x & MASK_SIGN) == MASK_SIGN;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE4)
+  if ((x & MASK_INF) == MASK_INF) {
+    // if x==neg_inf, return (y == neg_inf)?1:0;
+    if ((x & MASK_SIGN) == MASK_SIGN) {
+      res = 1;
+      BID_RETURN (res);
+    } else {
+      // x is positive infinity, only return1 if y 
+      // is positive infinity as well
+      // (we know y has same sign as x)
+      res = ((y & MASK_INF) == MASK_INF);
+      BID_RETURN (res);
+    }
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    //    if y is -inf, x>y
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull || sig_x == 0) {
+      x_is_zero = 1;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    if (sig_x == 0) {
+      x_is_zero = 1;
+    }
+  }
+
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull || sig_y == 0) {
+      y_is_zero = 1;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    if (sig_y == 0) {
+      y_is_zero = 1;
+    }
+  }
+
+  // ZERO (CASE 5)
+  // if x and y represent the same entities, and 
+  // both are negative , return true iff exp_x <= exp_y
+  if (x_is_zero && y_is_zero) {
+    if (!((x & MASK_SIGN) == MASK_SIGN) ^
+	((y & MASK_SIGN) == MASK_SIGN)) {
+      // if signs are the same:
+      // totalOrder(x,y) iff exp_x >= exp_y for negative numbers
+      // totalOrder(x,y) iff exp_x <= exp_y for positive numbers
+      if (exp_x == exp_y) {
+	res = 1;
+	BID_RETURN (res);
+      }
+      res = (exp_x <= exp_y) ^ ((x & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    } else {
+      // signs are different.
+      // totalOrder(-0, +0) is true
+      // totalOrder(+0, -0) is false
+      res = ((x & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+  }
+  // if x is zero and y isn't, clearly x has the smaller payload.
+  if (x_is_zero) {
+    res = ((y & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if y is zero, and x isn't, clearly y has the smaller payload.
+  if (y_is_zero) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller, 
+  // it is clear what needs to be done
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, it is 
+  // definitely larger, so no need for compensation
+  if (exp_x - exp_y > 15) {
+    // difference cannot be greater than 10^15
+    res = ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, it is 
+  // definitely smaller, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = ((x & MASK_SIGN) != MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down 
+  // to the compensated significand
+  if (exp_x > exp_y) {
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+    // if x and y represent the same entities, 
+    // and both are negative, return true iff exp_x <= exp_y
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      // case cannot occure, because all bits must 
+      // be the same - would have been caught if (x==y)
+      res = (exp_x <= exp_y) ^ ((x & MASK_SIGN) == MASK_SIGN);
+      BID_RETURN (res);
+    }
+    // if positive, return 1 if adjusted x is smaller than y
+    res = ((sig_n_prime.w[1] == 0)
+	   && sig_n_prime.w[0] < sig_y) ^ ((x & MASK_SIGN) ==
+					   MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if x and y represent the same entities, 
+  // and both are negative, return true iff exp_x <= exp_y
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    // Cannot occur, because all bits must be the same. 
+    // Case would have been caught if (x==y)
+    res = (exp_x <= exp_y) ^ ((x & MASK_SIGN) == MASK_SIGN);
+    BID_RETURN (res);
+  }
+  // values are not equal, for positive numbers return 1 
+  // if x is less than y.  0 otherwise
+  res = ((sig_n_prime.w[1] > 0)
+	 || (sig_x < sig_n_prime.w[0])) ^ ((x & MASK_SIGN) ==
+					   MASK_SIGN);
+  BID_RETURN (res);
+}
+
+// totalOrderMag is TotalOrder(abs(x), abs(y))
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_totalOrderMag (int *pres, UINT64 * px,
+		     UINT64 * py _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+  UINT64 y = *py;
+#else
+int
+bid64_totalOrderMag (UINT64 x,
+		     UINT64 y _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  int exp_x, exp_y;
+  UINT64 sig_x, sig_y, pyld_y, pyld_x;
+  UINT128 sig_n_prime;
+  char x_is_zero = 0, y_is_zero = 0;
+
+  // NaN (CASE 1)
+  // if x and y are unordered numerically because either operand is NaN
+  //    (1) totalOrder(number, +NaN) is true
+  //    (2) if x and y are both NaN:
+  //       i) signaling < quiet for +NaN
+  //       ii) lesser payload < greater payload for +NaN
+  //       iii) else if bitwise identical (in canonical form), return 1
+  if ((x & MASK_NAN) == MASK_NAN) {
+    // x is +NaN
+
+    // return false, unless y is +NaN also
+    if ((y & MASK_NAN) != MASK_NAN) {
+      res = 0;	// y is a number, return 1
+      BID_RETURN (res);
+
+    } else {
+
+      // x and y are both +NaN; 
+      // must investigate payload if both quiet or both signaling
+      // this xnor statement will be true if both x and y are +qNaN or +sNaN
+      if (!
+	  (((y & MASK_SNAN) == MASK_SNAN) ^ ((x & MASK_SNAN) ==
+					     MASK_SNAN))) {
+	// it comes down to the payload.  we want to return true if x has a
+	// smaller payload, or if the payloads are equal (canonical forms
+	// are bitwise identical)
+	pyld_y = y & 0x0003ffffffffffffull;
+	pyld_x = x & 0x0003ffffffffffffull;
+	// if x is zero and y isn't, x has the smaller 
+	// payload definitely (since we know y isn't 0 at this point)
+	if (pyld_x > 999999999999999ull || pyld_x == 0) {
+	  res = 1;
+	  BID_RETURN (res);
+	}
+
+	if (pyld_y > 999999999999999ull || pyld_y == 0) {
+	  // if y is zero, x must be less than or numerically equal
+	  res = 0;
+	  BID_RETURN (res);
+	}
+	res = (pyld_x <= pyld_y);
+	BID_RETURN (res);
+
+      } else {
+	// return true if y is +qNaN and x is +sNaN 
+	// (we know they're different bc of xor if_stmt above)
+	res = ((x & MASK_SNAN) == MASK_SNAN);
+	BID_RETURN (res);
+      }
+    }
+
+  } else if ((y & MASK_NAN) == MASK_NAN) {
+    // x is certainly not NAN in this case.
+    // return true if y is positive
+    res = 1;
+    BID_RETURN (res);
+  }
+  // SIMPLE (CASE2)
+  // if all the bits (except sign bit) are the same, 
+  // these numbers are equal.
+  if ((x & ~MASK_SIGN) == (y & ~MASK_SIGN)) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // INFINITY (CASE3)
+  if ((x & MASK_INF) == MASK_INF) {
+    // x is positive infinity, only return1 
+    // if y is positive infinity as well
+    res = ((y & MASK_INF) == MASK_INF);
+    BID_RETURN (res);
+  } else if ((y & MASK_INF) == MASK_INF) {
+    // x is finite, so:
+    //    if y is +inf, x<y
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if steering bits are 11 (condition will be 0), 
+  // then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_x = (x & MASK_BINARY_EXPONENT2) >> 51;
+    sig_x = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_x > 9999999999999999ull || sig_x == 0) {
+      x_is_zero = 1;
+    }
+  } else {
+    exp_x = (x & MASK_BINARY_EXPONENT1) >> 53;
+    sig_x = (x & MASK_BINARY_SIG1);
+    if (sig_x == 0) {
+      x_is_zero = 1;
+    }
+  }
+
+  // if steering bits are 11 (condition will be 0), 
+  // then exponent is G[0:w+1] =>
+  if ((y & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    exp_y = (y & MASK_BINARY_EXPONENT2) >> 51;
+    sig_y = (y & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (sig_y > 9999999999999999ull || sig_y == 0) {
+      y_is_zero = 1;
+    }
+  } else {
+    exp_y = (y & MASK_BINARY_EXPONENT1) >> 53;
+    sig_y = (y & MASK_BINARY_SIG1);
+    if (sig_y == 0) {
+      y_is_zero = 1;
+    }
+  }
+
+  // ZERO (CASE 5)
+  // if x and y represent the same entities, 
+  // and both are negative , return true iff exp_x <= exp_y
+  if (x_is_zero && y_is_zero) {
+    // totalOrder(x,y) iff exp_x <= exp_y for positive numbers
+    res = (exp_x <= exp_y);
+    BID_RETURN (res);
+  }
+  // if x is zero and y isn't, clearly x has the smaller payload.
+  if (x_is_zero) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if y is zero, and x isn't, clearly y has the smaller payload.
+  if (y_is_zero) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  // REDUNDANT REPRESENTATIONS (CASE6)
+  // if both components are either bigger or smaller
+  if (sig_x > sig_y && exp_x >= exp_y) {
+    res = 0;
+    BID_RETURN (res);
+  }
+  if (sig_x < sig_y && exp_x <= exp_y) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 greater than exp_y, it is definitely 
+  // larger, so no need for compensation
+  if (exp_x - exp_y > 15) {
+    res = 0;	// difference cannot be greater than 10^15
+    BID_RETURN (res);
+  }
+  // if exp_x is 15 less than exp_y, it is definitely 
+  // smaller, no need for compensation
+  if (exp_y - exp_x > 15) {
+    res = 1;
+    BID_RETURN (res);
+  }
+  // if |exp_x - exp_y| < 15, it comes down 
+  // to the compensated significand
+  if (exp_x > exp_y) {
+
+    // otherwise adjust the x significand upwards
+    __mul_64x64_to_128MACH (sig_n_prime, sig_x,
+			    mult_factor[exp_x - exp_y]);
+
+    // if x and y represent the same entities, 
+    // and both are negative, return true iff exp_x <= exp_y
+    if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_y)) {
+      // case cannot occur, because all bits 
+      // must be the same - would have been caught if (x==y)
+      res = (exp_x <= exp_y);
+      BID_RETURN (res);
+    }
+    // if positive, return 1 if adjusted x is smaller than y
+    res = ((sig_n_prime.w[1] == 0) && sig_n_prime.w[0] < sig_y);
+    BID_RETURN (res);
+  }
+  // adjust the y significand upwards
+  __mul_64x64_to_128MACH (sig_n_prime, sig_y,
+			  mult_factor[exp_y - exp_x]);
+
+  // if x and y represent the same entities, 
+  // and both are negative, return true iff exp_x <= exp_y
+  if (sig_n_prime.w[1] == 0 && (sig_n_prime.w[0] == sig_x)) {
+    res = (exp_x <= exp_y);
+    BID_RETURN (res);
+  }
+  // values are not equal, for positive numbers 
+  // return 1 if x is less than y.  0 otherwise
+  res = ((sig_n_prime.w[1] > 0) || (sig_x < sig_n_prime.w[0]));
+  BID_RETURN (res);
+
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_radix (int *pres, UINT64 * px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_radix (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  int res;
+  if (x)	// dummy test
+    res = 10;
+  else
+    res = 10;
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_quantize.c b/gcc-4.9/libgcc/config/libbid/bid64_quantize.c
new file mode 100644
index 000000000..6b2312a82
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_quantize.c
@@ -0,0 +1,236 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+#define MAX_DECIMAL_EXPONENT  767
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_quantize (UINT64 * pres, UINT64 * px,
+		UINT64 *
+		py _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		_EXC_INFO_PARAM) {
+  UINT64 x, y;
+#else
+
+UINT64
+bid64_quantize (UINT64 x,
+		UINT64 y _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		_EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CT;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y, remainder_h, C64,
+    valid_x;
+  UINT64 tmp, carry, res;
+  int_float tempx;
+  int exponent_x, exponent_y, digits_x, extra_digits, amount, amount2;
+  int expon_diff, total_digits, bin_expon_cx;
+  unsigned rmode, status;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  y = *py;
+#endif
+
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+  // unpack arguments, check for NaN or Infinity
+  if (!unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y)) {
+    // Inf. or NaN or 0
+#ifdef SET_STATUS_FLAGS
+    if ((x & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // x=Inf, y=Inf?
+    if (((coefficient_x << 1) == 0xf000000000000000ull)
+	&& ((coefficient_y << 1) == 0xf000000000000000ull)) {
+      res = coefficient_x;
+      BID_RETURN (res);
+    }
+    // Inf or NaN?
+    if ((y & 0x7800000000000000ull) == 0x7800000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+      if (((y & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+	  || (((y & 0x7c00000000000000ull) == 0x7800000000000000ull) &&	//Inf
+	      ((x & 0x7c00000000000000ull) < 0x7800000000000000ull)))
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      if ((y & NAN_MASK64) != NAN_MASK64)
+	coefficient_y = 0;
+      if ((x & NAN_MASK64) != NAN_MASK64) {
+	res = 0x7c00000000000000ull | (coefficient_y & QUIET_MASK64);
+	if (((y & NAN_MASK64) != NAN_MASK64) && ((x & NAN_MASK64) == 0x7800000000000000ull))
+		res = x;
+	BID_RETURN (res);
+      }
+    }
+  }
+  // unpack arguments, check for NaN or Infinity
+  if (!valid_x) {
+    // x is Inf. or NaN or 0
+
+    // Inf or NaN?
+    if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+      if (((x & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+	  || ((x & 0x7c00000000000000ull) == 0x7800000000000000ull))	//Inf 
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      if ((x & NAN_MASK64) != NAN_MASK64)
+	coefficient_x = 0;
+      res = 0x7c00000000000000ull | (coefficient_x & QUIET_MASK64);
+      BID_RETURN (res);
+    }
+
+    res = very_fast_get_BID64_small_mantissa (sign_x, exponent_y, 0);
+    BID_RETURN (res);
+  }
+  // get number of decimal digits in coefficient_x
+  tempx.d = (float) coefficient_x;
+  bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+  digits_x = estimate_decimal_digits[bin_expon_cx];
+  if (coefficient_x >= power10_table_128[digits_x].w[0])
+    digits_x++;
+
+  expon_diff = exponent_x - exponent_y;
+  total_digits = digits_x + expon_diff;
+
+  // check range of scaled coefficient
+  if ((UINT32) (total_digits + 1) <= 17) {
+    if (expon_diff >= 0) {
+      coefficient_x *= power10_table_128[expon_diff].w[0];
+      res = very_fast_get_BID64 (sign_x, exponent_y, coefficient_x);
+      BID_RETURN (res);
+    }
+    // must round off -expon_diff digits
+    extra_digits = -expon_diff;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+    coefficient_x += round_const_table[rmode][extra_digits];
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_64x64_to_128 (CT, coefficient_x,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+    C64 = CT.w[1] >> amount;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rnd_mode == 0)
+#endif
+      if (C64 & 1) {
+	// check whether fractional part of initial_P/10^extra_digits 
+	// is exactly .5
+	// this is the same as fractional part of 
+	//   (initial_P + 0.5*10^extra_digits)/10^extra_digits is exactly zero
+
+	// get remainder
+	amount2 = 64 - amount;
+	remainder_h = 0;
+	remainder_h--;
+	remainder_h >>= amount2;
+	remainder_h = remainder_h & CT.w[1];
+
+	// test whether fractional part is 0
+	if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits])) {
+	  C64--;
+	}
+      }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+    status = INEXACT_EXCEPTION;
+    // get remainder
+    remainder_h = CT.w[1] << (64 - amount);
+    switch (rmode) {
+    case ROUNDING_TO_NEAREST:
+    case ROUNDING_TIES_AWAY:
+      // test whether fractional part is 0
+      if ((remainder_h == 0x8000000000000000ull)
+	  && (CT.w[0] < reciprocals10_64[extra_digits]))
+	status = EXACT_STATUS;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits]))
+	status = EXACT_STATUS;
+      //if(!C64 && rmode==ROUNDING_DOWN) sign_s=sign_y;
+      break;
+    default:
+      // round up
+      __add_carry_out (tmp, carry, CT.w[0],
+		       reciprocals10_64[extra_digits]);
+      if ((remainder_h >> (64 - amount)) + carry >=
+	  (((UINT64) 1) << amount))
+	status = EXACT_STATUS;
+      break;
+    }
+    __set_status_flags (pfpsf, status);
+#endif
+
+    res = very_fast_get_BID64_small_mantissa (sign_x, exponent_y, C64);
+    BID_RETURN (res);
+  }
+
+  if (total_digits < 0) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+    C64 = 0;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+    if (rmode == ROUNDING_UP)
+      C64 = 1;
+#endif
+#endif
+    res = very_fast_get_BID64_small_mantissa (sign_x, exponent_y, C64);
+    BID_RETURN (res);
+  }
+  // else  more than 16 digits in coefficient
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res = 0x7c00000000000000ull;
+  BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_rem.c b/gcc-4.9/libgcc/config/libbid/bid64_rem.c
new file mode 100644
index 000000000..35756fb80
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_rem.c
@@ -0,0 +1,228 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 remainder
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  if(exponent_x < exponent_y)
+ *    scale coefficient_y so exponents are aligned
+ *    perform coefficient divide (64-bit integer divide), unless
+ *            coefficient_y is longer than 64 bits (clearly larger 
+ *                                               than coefficient_x) 
+ *  else  // exponent_x > exponent_y
+ *     use a loop to scale coefficient_x to 18_digits, divide by 
+ *         coefficient_y (64-bit integer divide), calculate remainder
+ *         as new_coefficient_x and repeat until final remainder is obtained 
+ *         (when new_exponent_x < exponent_y)
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+#define MASK_BINARY_EXPONENT  0x7ff0000000000000ull
+#define BINARY_EXPONENT_BIAS  0x3ff
+#define UPPER_EXPON_LIMIT     51
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_rem (UINT64 * pres, UINT64 * px,
+	   UINT64 *
+	   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x, y;
+#else
+
+UINT64
+bid64_rem (UINT64 x,
+	   UINT64 y _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CY;
+  UINT64 sign_x, sign_y, coefficient_x, coefficient_y, res;
+  UINT64 Q, R, R2, T, valid_y, valid_x;
+  int_float tempx;
+  int exponent_x, exponent_y, bin_expon, e_scale;
+  int digits_x, diff_expon;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  x = *px;
+  y = *py;
+#endif
+
+  valid_y = unpack_BID64 (&sign_y, &exponent_y, &coefficient_y, y);
+  valid_x = unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x);
+
+  // unpack arguments, check for NaN or Infinity
+  if (!valid_x) {
+    // x is Inf. or NaN or 0
+#ifdef SET_STATUS_FLAGS
+    if ((y & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+
+    // test if x is NaN
+    if ((x & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+      if (((x & SNAN_MASK64) == SNAN_MASK64))
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = coefficient_x & QUIET_MASK64;;
+      BID_RETURN (res);
+    }
+    // x is Infinity?
+    if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+      if (((y & NAN_MASK64) != NAN_MASK64)) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+	// return NaN
+	res = 0x7c00000000000000ull;
+	BID_RETURN (res);
+      }
+    }
+    // x is 0
+    // return x if y != 0
+    if (((y & 0x7800000000000000ull) < 0x7800000000000000ull) &&
+	coefficient_y) {
+      if ((y & 0x6000000000000000ull) == 0x6000000000000000ull)
+	exponent_y = (y >> 51) & 0x3ff;
+      else
+	exponent_y = (y >> 53) & 0x3ff;
+
+      if (exponent_y < exponent_x)
+	exponent_x = exponent_y;
+
+      x = exponent_x;
+      x <<= 53;
+
+      res = x | sign_x;
+      BID_RETURN (res);
+    }
+
+  }
+  if (!valid_y) {
+    // y is Inf. or NaN
+
+    // test if y is NaN
+    if ((y & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+      if (((y & SNAN_MASK64) == SNAN_MASK64))
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = coefficient_y & QUIET_MASK64;;
+      BID_RETURN (res);
+    }
+    // y is Infinity?
+    if ((y & 0x7800000000000000ull) == 0x7800000000000000ull) {
+      res = very_fast_get_BID64 (sign_x, exponent_x, coefficient_x);
+      BID_RETURN (res);
+    }
+    // y is 0, return NaN
+    {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+  }
+
+
+  diff_expon = exponent_x - exponent_y;
+  if (diff_expon <= 0) {
+    diff_expon = -diff_expon;
+
+    if (diff_expon > 16) {
+      // |x|<|y| in this case
+      res = x;
+      BID_RETURN (res);
+    }
+    // set exponent of y to exponent_x, scale coefficient_y
+    T = power10_table_128[diff_expon].w[0];
+    __mul_64x64_to_128 (CY, coefficient_y, T);
+
+    if (CY.w[1] || CY.w[0] > (coefficient_x << 1)) {
+      res = x;
+      BID_RETURN (res);
+    }
+
+    Q = coefficient_x / CY.w[0];
+    R = coefficient_x - Q * CY.w[0];
+
+    R2 = R + R;
+    if (R2 > CY.w[0] || (R2 == CY.w[0] && (Q & 1))) {
+      R = CY.w[0] - R;
+      sign_x ^= 0x8000000000000000ull;
+    }
+
+    res = very_fast_get_BID64 (sign_x, exponent_x, R);
+    BID_RETURN (res);
+  }
+
+
+  while (diff_expon > 0) {
+    // get number of digits in coeff_x
+    tempx.d = (float) coefficient_x;
+    bin_expon = ((tempx.i >> 23) & 0xff) - 0x7f;
+    digits_x = estimate_decimal_digits[bin_expon];
+    // will not use this test, dividend will have 18 or 19 digits
+    //if(coefficient_x >= power10_table_128[digits_x].w[0])
+    //      digits_x++;
+
+    e_scale = 18 - digits_x;
+    if (diff_expon >= e_scale) {
+      diff_expon -= e_scale;
+    } else {
+      e_scale = diff_expon;
+      diff_expon = 0;
+    }
+
+    // scale dividend to 18 or 19 digits
+    coefficient_x *= power10_table_128[e_scale].w[0];
+
+    // quotient
+    Q = coefficient_x / coefficient_y;
+    // remainder
+    coefficient_x -= Q * coefficient_y;
+
+    // check for remainder == 0
+    if (!coefficient_x) {
+      res = very_fast_get_BID64_small_mantissa (sign_x, exponent_y, 0);
+      BID_RETURN (res);
+    }
+  }
+
+  R2 = coefficient_x + coefficient_x;
+  if (R2 > coefficient_y || (R2 == coefficient_y && (Q & 1))) {
+    coefficient_x = coefficient_y - coefficient_x;
+    sign_x ^= 0x8000000000000000ull;
+  }
+
+  res = very_fast_get_BID64 (sign_x, exponent_y, coefficient_x);
+  BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_round_integral.c b/gcc-4.9/libgcc/config/libbid/bid64_round_integral.c
new file mode 100644
index 000000000..c4b0d38b5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_round_integral.c
@@ -0,0 +1,1221 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_round_integral_exact
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_exact (UINT64 * pres,
+			    UINT64 *
+			    px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64_round_integral_exact (UINT64 x _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1 represents the significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  // UINT64 res is C* at first - represents up to 16 decimal digits <= 54 bits
+  UINT128 fstar = { {0x0ull, 0x0ull} };
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN)
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then 
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical return 0 preserving the sign bit and 
+  // the preferred exponent of MAX(Q(x), 0)
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  switch (rnd_mode) {
+  case ROUNDING_TO_NEAREST:
+  case ROUNDING_TIES_AWAY:
+    // return 0 if (exp <= -(p+1))
+    if (exp <= -17) {
+      res = x_sign | 0x31c0000000000000ull;
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_DOWN:
+    // return 0 if (exp <= -p)
+    if (exp <= -16) {
+      if (x_sign) {
+	res = 0xb1c0000000000001ull;
+      } else {
+	res = 0x31c0000000000000ull;
+      }
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_UP:
+    // return 0 if (exp <= -p)
+    if (exp <= -16) {
+      if (x_sign) {
+	res = 0xb1c0000000000000ull;
+      } else {
+	res = 0x31c0000000000001ull;
+      }
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_TO_ZERO:
+    // return 0 if (exp <= -p) 
+    if (exp <= -16) {
+      res = x_sign | 0x31c0000000000000ull;
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  }	// end switch ()
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  }
+
+  switch (rnd_mode) {
+  case ROUNDING_TO_NEAREST:
+    if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+      // need to shift right -exp digits from the coefficient; exp will be 0
+      ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1 
+      // C1 = C1 + 1/2 * 10^x where the result C1 fits in 64 bits
+      // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 16
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 64 bits
+      __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else  
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)  
+
+      if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+	res = P128.w[1];
+	fstar.w[1] = 0;
+	fstar.w[0] = P128.w[0];
+      } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+	shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+	res = (P128.w[1] >> shift);
+	fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+	fstar.w[0] = P128.w[0];
+      }
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      // since round_to_even, subtract 1 if current result is odd
+      if ((res & 0x0000000000000001ull) && (fstar.w[1] == 0)
+	  && (fstar.w[0] < ten2mk64[ind - 1])) {
+	res--;
+      }
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  // fstar.w[0] - 0x8000000000000000ull is f* - 1/2
+	  if ((fstar.w[0] - 0x8000000000000000ull) > ten2mk64[ind - 1]) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 21
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  if (fstar.w[1] > onehalf128[ind - 1]
+	      || fstar.w[0] > ten2mk64[ind - 1]) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+      // set exponent to zero as it was negative before.
+      res = x_sign | 0x31c0000000000000ull | res;
+      BID_RETURN (res);
+    } else {	// if exp < 0 and q + exp < 0
+      // the result is +0 or -0
+      res = x_sign | 0x31c0000000000000ull;
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_TIES_AWAY:
+    if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+      // need to shift right -exp digits from the coefficient; exp will be 0
+      ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1 
+      // C1 = C1 + 1/2 * 10^x where the result C1 fits in 64 bits
+      // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 16
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 64 bits
+      __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   C* = floor(C*) - logical right shift; C* has p decimal digits, 
+      //       correct by Prop. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+	res = P128.w[1];
+	fstar.w[1] = 0;
+	fstar.w[0] = P128.w[0];
+      } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+	shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+	res = (P128.w[1] >> shift);
+	fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+	fstar.w[0] = P128.w[0];
+      }
+      // midpoints are already rounded correctly
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact 
+	  // fstar.w[0] - 0x8000000000000000ull is f* - 1/2
+	  if ((fstar.w[0] - 0x8000000000000000ull) > ten2mk64[ind - 1]) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 21
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  if (fstar.w[1] > onehalf128[ind - 1]
+	      || fstar.w[0] > ten2mk64[ind - 1]) {
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+      // set exponent to zero as it was negative before.
+      res = x_sign | 0x31c0000000000000ull | res;
+      BID_RETURN (res);
+    } else {	// if exp < 0 and q + exp < 0
+      // the result is +0 or -0
+      res = x_sign | 0x31c0000000000000ull;
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_DOWN:
+    if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+      // need to shift right -exp digits from the coefficient; exp will be 0
+      ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1 
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 16
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 64 bits
+      __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // if (0 < f* < 10^(-x)) then the result is exact
+      // n = C* * 10^(e+x)  
+
+      if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+	res = P128.w[1];
+	fstar.w[1] = 0;
+	fstar.w[0] = P128.w[0];
+      } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+	shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+	res = (P128.w[1] >> shift);
+	fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+	fstar.w[0] = P128.w[0];
+      }
+      // if (f* > 10^(-x)) then the result is inexact
+      if ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind - 1])) {
+	if (x_sign) {
+	  // if negative and not exact, increment magnitude
+	  res++;
+	}
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+      // set exponent to zero as it was negative before.
+      res = x_sign | 0x31c0000000000000ull | res;
+      BID_RETURN (res);
+    } else {	// if exp < 0 and q + exp <= 0
+      // the result is +0 or -1
+      if (x_sign) {
+	res = 0xb1c0000000000001ull;
+      } else {
+	res = 0x31c0000000000000ull;
+      }
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_UP:
+    if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+      // need to shift right -exp digits from the coefficient; exp will be 0
+      ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1 
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 16
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 64 bits
+      __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // if (0 < f* < 10^(-x)) then the result is exact
+      // n = C* * 10^(e+x)  
+
+      if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+	res = P128.w[1];
+	fstar.w[1] = 0;
+	fstar.w[0] = P128.w[0];
+      } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+	shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+	res = (P128.w[1] >> shift);
+	fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+	fstar.w[0] = P128.w[0];
+      }
+      // if (f* > 10^(-x)) then the result is inexact
+      if ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind - 1])) {
+	if (!x_sign) {
+	  // if positive and not exact, increment magnitude
+	  res++;
+	}
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+      // set exponent to zero as it was negative before.
+      res = x_sign | 0x31c0000000000000ull | res;
+      BID_RETURN (res);
+    } else {	// if exp < 0 and q + exp <= 0
+      // the result is -0 or +1
+      if (x_sign) {
+	res = 0xb1c0000000000000ull;
+      } else {
+	res = 0x31c0000000000001ull;
+      }
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  case ROUNDING_TO_ZERO:
+    if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+      // need to shift right -exp digits from the coefficient; exp will be 0
+      ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1 
+      // C1 fits in 127 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 16
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 64 bits
+      __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // if (0 < f* < 10^(-x)) then the result is exact
+      // n = C* * 10^(e+x)  
+
+      if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+	res = P128.w[1];
+	fstar.w[1] = 0;
+	fstar.w[0] = P128.w[0];
+      } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+	shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+	res = (P128.w[1] >> shift);
+	fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+	fstar.w[0] = P128.w[0];
+      }
+      // if (f* > 10^(-x)) then the result is inexact
+      if ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind - 1])) {
+	*pfpsf |= INEXACT_EXCEPTION;
+      }
+      // set exponent to zero as it was negative before.
+      res = x_sign | 0x31c0000000000000ull | res;
+      BID_RETURN (res);
+    } else {	// if exp < 0 and q + exp < 0
+      // the result is +0 or -0
+      res = x_sign | 0x31c0000000000000ull;
+      *pfpsf |= INEXACT_EXCEPTION;
+      BID_RETURN (res);
+    }
+    break;
+  }	// end switch ()
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_round_integral_nearest_even
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_nearest_even (UINT64 * pres,
+				   UINT64 *
+				   px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_round_integral_nearest_even (UINT64 x _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 fstar;
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN) 
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  // return 0 if (exp <= -(p+1))
+  if (exp <= -17) {
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  } else if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+    // need to shift right -exp digits from the coefficient; the exp will be 0
+    ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 = C1 + 1/2 * 10^x where the result C1 fits in 64 bits
+    // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+    C1 = C1 + midpoint64[ind - 1];
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 16
+    // kx = 10^(-x) = ten2mk64[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 64 bits
+    __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+    // if (0 < f* < 10^(-x)) then the result is a midpoint
+    //   if floor(C*) is even then C* = floor(C*) - logical right
+    //       shift; C* has p decimal digits, correct by Prop. 1)
+    //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+    //       shift; C* has p decimal digits, correct by Pr. 1)
+    // else  
+    //   C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // n = C* * 10^(e+x)  
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res = P128.w[1];
+      fstar.w[1] = 0;
+      fstar.w[0] = P128.w[0];
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res = (P128.w[1] >> shift);
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+    }
+    // if (0 < f* < 10^(-x)) then the result is a midpoint
+    // since round_to_even, subtract 1 if current result is odd
+    if ((res & 0x0000000000000001ull) && (fstar.w[1] == 0)
+	&& (fstar.w[0] < ten2mk64[ind - 1])) {
+      res--;
+    }
+    // set exponent to zero as it was negative before.
+    res = x_sign | 0x31c0000000000000ull | res;
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp < 0
+    // the result is +0 or -0
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+}
+
+/*****************************************************************************
+ *  BID64_round_integral_negative
+ *****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_negative (UINT64 * pres,
+			       UINT64 *
+			       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_round_integral_negative (UINT64 x _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  // UINT64 res is C* at first - represents up to 34 decimal digits ~ 113 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN) 
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  // return 0 if (exp <= -p)
+  if (exp <= -16) {
+    if (x_sign) {
+      res = 0xb1c0000000000001ull;
+    } else {
+      res = 0x31c0000000000000ull;
+    }
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  } else if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+    // need to shift right -exp digits from the coefficient; the exp will be 0
+    ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 fits in 64 bits
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 16
+    // kx = 10^(-x) = ten2mk64[ind - 1]
+    // C* = C1 * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 64 bits
+    __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+    // C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // if (0 < f* < 10^(-x)) then the result is exact
+    // n = C* * 10^(e+x)  
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res = P128.w[1];
+      fstar.w[1] = 0;
+      fstar.w[0] = P128.w[0];
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res = (P128.w[1] >> shift);
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+    }
+    // if (f* > 10^(-x)) then the result is inexact
+    if (x_sign
+	&& ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind - 1]))) {
+      // if negative and not exact, increment magnitude
+      res++;
+    }
+    // set exponent to zero as it was negative before.
+    res = x_sign | 0x31c0000000000000ull | res;
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp <= 0
+    // the result is +0 or -1
+    if (x_sign) {
+      res = 0xb1c0000000000001ull;
+    } else {
+      res = 0x31c0000000000000ull;
+    }
+    BID_RETURN (res);
+  }
+}
+
+/*****************************************************************************
+ *  BID64_round_integral_positive
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_positive (UINT64 * pres,
+			       UINT64 *
+			       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_round_integral_positive (UINT64 x _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  // UINT64 res is C* at first - represents up to 34 decimal digits ~ 113 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN) 
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  // return 0 if (exp <= -p)
+  if (exp <= -16) {
+    if (x_sign) {
+      res = 0xb1c0000000000000ull;
+    } else {
+      res = 0x31c0000000000001ull;
+    }
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  } else if ((q + exp) > 0) {	// exp < 0 and 1 <= -exp < q
+    // need to shift right -exp digits from the coefficient; the exp will be 0
+    ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 fits in 64 bits
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 16
+    // kx = 10^(-x) = ten2mk64[ind - 1]
+    // C* = C1 * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 64 bits
+    __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+    // C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // if (0 < f* < 10^(-x)) then the result is exact
+    // n = C* * 10^(e+x)  
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res = P128.w[1];
+      fstar.w[1] = 0;
+      fstar.w[0] = P128.w[0];
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res = (P128.w[1] >> shift);
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+    }
+    // if (f* > 10^(-x)) then the result is inexact
+    if (!x_sign
+	&& ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind - 1]))) {
+      // if positive and not exact, increment magnitude
+      res++;
+    }
+    // set exponent to zero as it was negative before.
+    res = x_sign | 0x31c0000000000000ull | res;
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp <= 0
+    // the result is -0 or +1
+    if (x_sign) {
+      res = 0xb1c0000000000000ull;
+    } else {
+      res = 0x31c0000000000001ull;
+    }
+    BID_RETURN (res);
+  }
+}
+
+/*****************************************************************************
+ *  BID64_round_integral_zero
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_zero (UINT64 * pres,
+			   UINT64 *
+			   px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_round_integral_zero (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  // UINT64 res is C* at first - represents up to 34 decimal digits ~ 113 bits
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN) 
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  // return 0 if (exp <= -p)
+  if (exp <= -16) {
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  } else if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+    // need to shift right -exp digits from the coefficient; the exp will be 0
+    ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 fits in 127 bits
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 16
+    // kx = 10^(-x) = ten2mk64[ind - 1]
+    // C* = C1 * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 64 bits
+    __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+    // C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // if (0 < f* < 10^(-x)) then the result is exact
+    // n = C* * 10^(e+x)  
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res = P128.w[1];
+      // redundant fstar.w[1] = 0;
+      // redundant fstar.w[0] = P128.w[0];
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res = (P128.w[1] >> shift);
+      // redundant fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      // redundant fstar.w[0] = P128.w[0];
+    }
+    // if (f* > 10^(-x)) then the result is inexact
+    // if ((fstar.w[1] != 0) || (fstar.w[0] >= ten2mk64[ind-1])){
+    //   // redundant
+    // }
+    // set exponent to zero as it was negative before.
+    res = x_sign | 0x31c0000000000000ull | res;
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp < 0
+    // the result is +0 or -0
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+}
+
+/*****************************************************************************
+ *  BID64_round_integral_nearest_away
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_round_integral_nearest_away (UINT64 * pres,
+				   UINT64 *
+				   px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_round_integral_nearest_away (UINT64 x _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res = 0xbaddbaddbaddbaddull;
+  UINT64 x_sign;
+  int exp;			// unbiased exponent
+  // Note: C1.w[1], C1.w[0] represent x_signif_hi, x_signif_lo (all are UINT64)
+  BID_UI64DOUBLE tmp1;
+  int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 P128;
+
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+
+  // check for NaNs and infinities
+  if ((x & MASK_NAN) == MASK_NAN) {	// check for NaN
+    if ((x & 0x0003ffffffffffffull) > 999999999999999ull)
+      x = x & 0xfe00000000000000ull;	// clear G6-G12 and the payload bits
+    else
+      x = x & 0xfe03ffffffffffffull;	// clear G6-G12 
+    if ((x & MASK_SNAN) == MASK_SNAN) {	// SNaN 
+      // set invalid flag 
+      *pfpsf |= INVALID_EXCEPTION;
+      // return quiet (SNaN) 
+      res = x & 0xfdffffffffffffffull;
+    } else {	// QNaN
+      res = x;
+    }
+    BID_RETURN (res);
+  } else if ((x & MASK_INF) == MASK_INF) {	// check for Infinity
+    res = x_sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    // if the steering bits are 11 (condition will be 0), then
+    // the exponent is G[0:w+1]
+    exp = ((x & MASK_BINARY_EXPONENT2) >> 51) - 398;
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      C1 = 0;
+    }
+  } else {	// if ((x & MASK_STEERING_BITS) != MASK_STEERING_BITS)
+    exp = ((x & MASK_BINARY_EXPONENT1) >> 53) - 398;
+    C1 = (x & MASK_BINARY_SIG1);
+  }
+
+  // if x is 0 or non-canonical
+  if (C1 == 0) {
+    if (exp < 0)
+      exp = 0;
+    res = x_sign | (((UINT64) exp + 398) << 53);
+    BID_RETURN (res);
+  }
+  // x is a finite non-zero number (not 0, non-canonical, or special)
+
+  // return 0 if (exp <= -(p+1))
+  if (exp <= -17) {
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    q = 16;
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    q = nr_digits[x_nr_bits - 1].digits;
+    if (q == 0) {
+      q = nr_digits[x_nr_bits - 1].digits1;
+      if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+	q++;
+    }
+  }
+
+  if (exp >= 0) {	// -exp <= 0
+    // the argument is an integer already
+    res = x;
+    BID_RETURN (res);
+  } else if ((q + exp) >= 0) {	// exp < 0 and 1 <= -exp <= q
+    // need to shift right -exp digits from the coefficient; the exp will be 0
+    ind = -exp;	// 1 <= ind <= 16; ind is a synonym for 'x'
+    // chop off ind digits from the lower part of C1 
+    // C1 = C1 + 1/2 * 10^x where the result C1 fits in 64 bits
+    // FOR ROUND_TO_NEAREST, WE ADD 1/2 ULP(y) then truncate
+    C1 = C1 + midpoint64[ind - 1];
+    // calculate C* and f*
+    // C* is actually floor(C*) in this case
+    // C* and f* need shifting and masking, as shown by
+    // shiftright128[] and maskhigh128[]
+    // 1 <= x <= 16
+    // kx = 10^(-x) = ten2mk64[ind - 1]
+    // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+    // the approximation of 10^(-x) was rounded up to 64 bits
+    __mul_64x64_to_128 (P128, C1, ten2mk64[ind - 1]);
+
+    // if (0 < f* < 10^(-x)) then the result is a midpoint
+    //   C* = floor(C*) - logical right shift; C* has p decimal digits, 
+    //       correct by Prop. 1)
+    // else
+    //   C* = floor(C*) (logical right shift; C has p decimal digits,
+    //       correct by Property 1)
+    // n = C* * 10^(e+x)
+
+    if (ind - 1 <= 2) {	// 0 <= ind - 1 <= 2 => shift = 0
+      res = P128.w[1];
+    } else if (ind - 1 <= 21) {	// 3 <= ind - 1 <= 21 => 3 <= shift <= 63
+      shift = shiftright128[ind - 1];	// 3 <= shift <= 63
+      res = (P128.w[1] >> shift);
+    }
+    // midpoints are already rounded correctly
+    // set exponent to zero as it was negative before.
+    res = x_sign | 0x31c0000000000000ull | res;
+    BID_RETURN (res);
+  } else {	// if exp < 0 and q + exp < 0
+    // the result is +0 or -0
+    res = x_sign | 0x31c0000000000000ull;
+    BID_RETURN (res);
+  }
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_scalb.c b/gcc-4.9/libgcc/config/libbid/bid64_scalb.c
new file mode 100644
index 000000000..118d80e92
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_scalb.c
@@ -0,0 +1,105 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+#define MAX_DECIMAL_EXPONENT  767
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_scalb (UINT64 * pres, UINT64 * px,
+	     int *pn _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+  UINT64 x;
+  int n;
+#else
+
+UINT64
+bid64_scalb (UINT64 x,
+	     int n _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	     _EXC_INFO_PARAM) {
+#endif
+  UINT64 sign_x, coefficient_x, res;
+  SINT64 exp64;
+  int exponent_x, rmode;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+  n = *pn;
+#endif
+
+  // unpack arguments, check for NaN or Infinity
+  if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    // x is Inf. or NaN or 0
+#ifdef SET_STATUS_FLAGS
+    if ((x & SNAN_MASK64) == SNAN_MASK64)	// y is sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    if (coefficient_x)
+      res = coefficient_x & QUIET_MASK64;
+	else {
+       exp64 = (SINT64) exponent_x + (SINT64) n;
+	   if(exp64<0) exp64=0;
+	   if(exp64>MAX_DECIMAL_EXPONENT) exp64=MAX_DECIMAL_EXPONENT;
+       exponent_x = exp64;
+      res = very_fast_get_BID64 (sign_x, exponent_x, coefficient_x);	// 0
+	}
+    BID_RETURN (res);
+  }
+
+  exp64 = (SINT64) exponent_x + (SINT64) n;
+  exponent_x = exp64;
+
+  if ((UINT32) exponent_x <= MAX_DECIMAL_EXPONENT) {
+    res = very_fast_get_BID64 (sign_x, exponent_x, coefficient_x);
+    BID_RETURN (res);
+  }
+  // check for overflow
+  if (exp64 > MAX_DECIMAL_EXPONENT) {
+    // try to normalize coefficient
+    while ((coefficient_x < 1000000000000000ull)
+	   && (exp64 > MAX_DECIMAL_EXPONENT)) {
+      // coefficient_x < 10^15, scale by 10
+      coefficient_x = (coefficient_x << 1) + (coefficient_x << 3);
+      exponent_x--;
+      exp64--;
+    }
+    if (exp64 <= MAX_DECIMAL_EXPONENT) {
+      res = very_fast_get_BID64 (sign_x, exponent_x, coefficient_x);
+      BID_RETURN (res);
+    } else
+      exponent_x = 0x7fffffff;	// overflow
+  }
+  // exponent < 0
+  // the BID pack routine will round the coefficient
+  rmode = rnd_mode;
+  res = get_BID64 (sign_x, exponent_x, coefficient_x, rmode, pfpsf);
+  BID_RETURN (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_sqrt.c b/gcc-4.9/libgcc/config/libbid/bid64_sqrt.c
new file mode 100644
index 000000000..6b4abe004
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_sqrt.c
@@ -0,0 +1,552 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    BID64 square root
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  if(exponent_x is odd)
+ *     scale coefficient_x by 10, adjust exponent
+ *  - get lower estimate for number of digits in coefficient_x
+ *  - scale coefficient x to between 31 and 33 decimal digits
+ *  - in parallel, check for exact case and return if true
+ *  - get high part of result coefficient using double precision sqrt
+ *  - compute remainder and refine coefficient in one iteration (which 
+ *                                 modifies it by at most 1)
+ *  - result exponent is easy to compute from the adjusted arg. exponent 
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+#include "bid_sqrt_macros.h"
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+#include <fenv.h>
+
+#define FE_ALL_FLAGS FE_INVALID|FE_DIVBYZERO|FE_OVERFLOW|FE_UNDERFLOW|FE_INEXACT
+#endif
+
+extern double sqrt (double);
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_sqrt (UINT64 * pres,
+	    UINT64 *
+	    px _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+	    _EXC_INFO_PARAM) {
+  UINT64 x;
+#else
+
+UINT64
+bid64_sqrt (UINT64 x _RND_MODE_PARAM _EXC_FLAGS_PARAM
+	    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CA, CT;
+  UINT64 sign_x, coefficient_x;
+  UINT64 Q, Q2, A10, C4, R, R2, QE, res;
+  SINT64 D;
+  int_double t_scale;
+  int_float tempx;
+  double da, dq, da_h, da_l, dqe;
+  int exponent_x, exponent_q, bin_expon_cx;
+  int digits_x;
+  int scale;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  fexcept_t binaryflags = 0;
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+  x = *px;
+#endif
+
+  // unpack arguments, check for NaN or Infinity
+  if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    // x is Inf. or NaN or 0
+    if ((x & INFINITY_MASK64) == INFINITY_MASK64) {
+      res = coefficient_x;
+      if ((coefficient_x & SSNAN_MASK64) == SINFINITY_MASK64)	// -Infinity
+      {
+	res = NAN_MASK64;
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      }
+#ifdef SET_STATUS_FLAGS
+      if ((x & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN (res & QUIET_MASK64);
+    }
+    // x is 0
+    exponent_x = (exponent_x + DECIMAL_EXPONENT_BIAS) >> 1;
+    res = sign_x | (((UINT64) exponent_x) << 53);
+    BID_RETURN (res);
+  }
+  // x<0?
+  if (sign_x && coefficient_x) {
+    res = NAN_MASK64;
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    BID_RETURN (res);
+  }
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  //--- get number of bits in the coefficient of x ---
+  tempx.d = (float) coefficient_x;
+  bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+  digits_x = estimate_decimal_digits[bin_expon_cx];
+  // add test for range
+  if (coefficient_x >= power10_index_binexp[bin_expon_cx])
+    digits_x++;
+
+  A10 = coefficient_x;
+  if (exponent_x & 1) {
+    A10 = (A10 << 2) + A10;
+    A10 += A10;
+  }
+
+  dqe = sqrt ((double) A10);
+  QE = (UINT32) dqe;
+  if (QE * QE == A10) {
+    res =
+      very_fast_get_BID64 (0, (exponent_x + DECIMAL_EXPONENT_BIAS) >> 1,
+			   QE);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+    (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+    BID_RETURN (res);
+  }
+  // if exponent is odd, scale coefficient by 10
+  scale = 31 - digits_x;
+  exponent_q = exponent_x - scale;
+  scale += (exponent_q & 1);	// exp. bias is even
+
+  CT = power10_table_128[scale];
+  __mul_64x128_short (CA, coefficient_x, CT);
+
+  // 2^64
+  t_scale.i = 0x43f0000000000000ull;
+  // convert CA to DP
+  da_h = CA.w[1];
+  da_l = CA.w[0];
+  da = da_h * t_scale.d + da_l;
+
+  dq = sqrt (da);
+
+  Q = (UINT64) dq;
+
+  // get sign(sqrt(CA)-Q)
+  R = CA.w[0] - Q * Q;
+  R = ((SINT64) R) >> 63;
+  D = R + R + 1;
+
+  exponent_q = (exponent_q + DECIMAL_EXPONENT_BIAS) >> 1;
+
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+  if (!((rnd_mode) & 3)) {
+#endif
+#endif
+
+    // midpoint to check
+    Q2 = Q + Q + D;
+    C4 = CA.w[0] << 2;
+
+    // get sign(-sqrt(CA)+Midpoint)
+    R2 = Q2 * Q2 - C4;
+    R2 = ((SINT64) R2) >> 63;
+
+    // adjust Q if R!=R2
+    Q += (D & (R ^ R2));
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+  } else {
+    C4 = CA.w[0];
+    Q += D;
+    if ((SINT64) (Q * Q - C4) > 0)
+      Q--;
+    if (rnd_mode == ROUNDING_UP)
+      Q++;
+  }
+#endif
+#endif
+
+  res = fast_get_BID64 (0, exponent_q, Q);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+  (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+  BID_RETURN (res);
+}
+
+
+TYPE0_FUNCTION_ARG1 (UINT64, bid64q_sqrt, x)
+
+     UINT256 M256, C4, C8;
+     UINT128 CX, CX2, A10, S2, T128, CS, CSM, CS2, C256, CS1,
+       mul_factor2_long = { {0x0ull, 0x0ull} }, QH, Tmp, TP128, Qh, Ql;
+UINT64 sign_x, Carry, B10, res, mul_factor, mul_factor2 = 0x0ull, CS0;
+SINT64 D;
+int_float fx, f64;
+int exponent_x, bin_expon_cx, done = 0;
+int digits, scale, exponent_q = 0, exact = 1, amount, extra_digits;
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+fexcept_t binaryflags = 0;
+#endif
+
+	// unpack arguments, check for NaN or Infinity
+if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+  res = CX.w[1];
+  // NaN ?
+  if ((x.w[1] & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+    if ((x.w[1] & 0x7e00000000000000ull) == 0x7e00000000000000ull)	// sNaN
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    Tmp.w[1] = (CX.w[1] & 0x00003fffffffffffull);
+    Tmp.w[0] = CX.w[0];
+    TP128 = reciprocals10_128[18];
+    __mul_128x128_full (Qh, Ql, Tmp, TP128);
+    amount = recip_scale[18];
+    __shr_128 (Tmp, Qh, amount);
+    res = (CX.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+    BID_RETURN (res);
+  }
+  // x is Infinity?
+  if ((x.w[1] & 0x7800000000000000ull) == 0x7800000000000000ull) {
+    if (sign_x) {
+      // -Inf, return NaN
+      res = 0x7c00000000000000ull;
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+    }
+    BID_RETURN (res);
+  }
+  // x is 0 otherwise
+
+  exponent_x =
+    ((exponent_x - DECIMAL_EXPONENT_BIAS_128) >> 1) +
+    DECIMAL_EXPONENT_BIAS;
+  if (exponent_x < 0)
+    exponent_x = 0;
+  if (exponent_x > DECIMAL_MAX_EXPON_64)
+    exponent_x = DECIMAL_MAX_EXPON_64;
+  //res= sign_x | (((UINT64)exponent_x)<<53);
+  res = get_BID64 (sign_x, exponent_x, 0, rnd_mode, pfpsf);
+  BID_RETURN (res);
+}
+if (sign_x) {
+  res = 0x7c00000000000000ull;
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  BID_RETURN (res);
+}
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fegetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+
+	   // 2^64
+f64.i = 0x5f800000;
+
+	   // fx ~ CX
+fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+digits = estimate_decimal_digits[bin_expon_cx];
+
+A10 = CX;
+if (exponent_x & 1) {
+  A10.w[1] = (CX.w[1] << 3) | (CX.w[0] >> 61);
+  A10.w[0] = CX.w[0] << 3;
+  CX2.w[1] = (CX.w[1] << 1) | (CX.w[0] >> 63);
+  CX2.w[0] = CX.w[0] << 1;
+  __add_128_128 (A10, A10, CX2);
+}
+
+C256.w[1] = A10.w[1];
+C256.w[0] = A10.w[0];
+CS.w[0] = short_sqrt128 (A10);
+CS.w[1] = 0;
+mul_factor = 0;
+	   // check for exact result  
+if (CS.w[0] < 10000000000000000ull) {
+  if (CS.w[0] * CS.w[0] == A10.w[0]) {
+    __sqr64_fast (S2, CS.w[0]);
+    if (S2.w[1] == A10.w[1])	// && S2.w[0]==A10.w[0])
+    {
+      res =
+	get_BID64 (0,
+		   ((exponent_x - DECIMAL_EXPONENT_BIAS_128) >> 1) +
+		   DECIMAL_EXPONENT_BIAS, CS.w[0], rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+      (void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+      BID_RETURN (res);
+    }
+  }
+  if (CS.w[0] >= 1000000000000000ull) {
+    done = 1;
+    exponent_q = exponent_x;
+    C256.w[1] = A10.w[1];
+    C256.w[0] = A10.w[0];
+  }
+#ifdef SET_STATUS_FLAGS
+  __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+  exact = 0;
+} else {
+  B10 = 0x3333333333333334ull;
+  __mul_64x64_to_128_full (CS2, CS.w[0], B10);
+  CS0 = CS2.w[1] >> 1;
+  if (CS.w[0] != ((CS0 << 3) + (CS0 << 1))) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+    exact = 0;
+  }
+  done = 1;
+  CS.w[0] = CS0;
+  exponent_q = exponent_x + 2;
+  mul_factor = 10;
+  mul_factor2 = 100;
+  if (CS.w[0] >= 10000000000000000ull) {
+    __mul_64x64_to_128_full (CS2, CS.w[0], B10);
+    CS0 = CS2.w[1] >> 1;
+    if (CS.w[0] != ((CS0 << 3) + (CS0 << 1))) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+      exact = 0;
+    }
+    exponent_q += 2;
+    CS.w[0] = CS0;
+    mul_factor = 100;
+    mul_factor2 = 10000;
+  }
+  if (exact) {
+    CS0 = CS.w[0] * mul_factor;
+    __sqr64_fast (CS1, CS0)
+      if ((CS1.w[0] != A10.w[0]) || (CS1.w[1] != A10.w[1])) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (pfpsf, INEXACT_EXCEPTION);
+#endif
+      exact = 0;
+    }
+  }
+}
+
+if (!done) {
+  // get number of digits in CX
+  D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+  if (D > 0
+      || (!D && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+    digits++;
+
+  // if exponent is odd, scale coefficient by 10
+  scale = 31 - digits;
+  exponent_q = exponent_x - scale;
+  scale += (exponent_q & 1);	// exp. bias is even
+
+  T128 = power10_table_128[scale];
+  __mul_128x128_low (C256, CX, T128);
+
+
+  CS.w[0] = short_sqrt128 (C256);
+}
+   //printf("CS=%016I64x\n",CS.w[0]);
+
+exponent_q =
+  ((exponent_q - DECIMAL_EXPONENT_BIAS_128) >> 1) +
+  DECIMAL_EXPONENT_BIAS;
+if ((exponent_q < 0) && (exponent_q + MAX_FORMAT_DIGITS >= 0)) {
+  extra_digits = -exponent_q;
+  exponent_q = 0;
+
+  // get coeff*(2^M[extra_digits])/10^extra_digits
+  __mul_64x64_to_128 (QH, CS.w[0], reciprocals10_64[extra_digits]);
+
+  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+  amount = short_recip_scale[extra_digits];
+
+  CS0 = QH.w[1] >> amount;
+
+#ifdef SET_STATUS_FLAGS
+  if (exact) {
+    if (CS.w[0] != CS0 * power10_table_128[extra_digits].w[0])
+      exact = 0;
+  }
+  if (!exact)
+    __set_status_flags (pfpsf, UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+
+  CS.w[0] = CS0;
+  if (!mul_factor)
+    mul_factor = 1;
+  mul_factor *= power10_table_128[extra_digits].w[0];
+  __mul_64x64_to_128 (mul_factor2_long, mul_factor, mul_factor);
+  if (mul_factor2_long.w[1])
+    mul_factor2 = 0;
+  else
+    mul_factor2 = mul_factor2_long.w[1];
+}
+	   // 4*C256
+C4.w[1] = (C256.w[1] << 2) | (C256.w[0] >> 62);
+C4.w[0] = C256.w[0] << 2;
+
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+if (!((rnd_mode) & 3)) {
+#endif
+#endif
+  // compare to midpoints
+  CSM.w[0] = (CS.w[0] + CS.w[0]) | 1;
+  //printf("C256=%016I64x %016I64x, CSM=%016I64x %016I64x %016I64x\n",C4.w[1],C4.w[0],CSM.w[1],CSM.w[0], CS.w[0]);
+  if (mul_factor)
+    CSM.w[0] *= mul_factor;
+  // CSM^2
+  __mul_64x64_to_128 (M256, CSM.w[0], CSM.w[0]);
+  //__mul_128x128_to_256(M256, CSM, CSM);
+
+  if (C4.w[1] > M256.w[1] ||
+      (C4.w[1] == M256.w[1] && C4.w[0] > M256.w[0])) {
+    // round up
+    CS.w[0]++;
+  } else {
+    C8.w[0] = CS.w[0] << 3;
+    C8.w[1] = 0;
+    if (mul_factor) {
+      if (mul_factor2) {
+	__mul_64x64_to_128 (C8, C8.w[0], mul_factor2);
+      } else {
+	__mul_64x128_low (C8, C8.w[0], mul_factor2_long);
+      }
+    }
+    // M256 - 8*CSM
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    M256.w[1] = M256.w[1] - C8.w[1] - Carry;
+
+    // if CSM' > C256, round up
+    if (M256.w[1] > C4.w[1] ||
+	(M256.w[1] == C4.w[1] && M256.w[0] > C4.w[0])) {
+      // round down
+      if (CS.w[0])
+	CS.w[0]--;
+    }
+  }
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+} else {
+  CS.w[0]++;
+  CSM.w[0] = CS.w[0];
+  C8.w[0] = CSM.w[0] << 1;
+  if (mul_factor)
+    CSM.w[0] *= mul_factor;
+  __mul_64x64_to_128 (M256, CSM.w[0], CSM.w[0]);
+  C8.w[1] = 0;
+  if (mul_factor) {
+    if (mul_factor2) {
+      __mul_64x64_to_128 (C8, C8.w[0], mul_factor2);
+    } else {
+      __mul_64x128_low (C8, C8.w[0], mul_factor2_long);
+    }
+  }
+  //printf("C256=%016I64x %016I64x, CSM=%016I64x %016I64x %016I64x\n",C256.w[1],C256.w[0],M256.w[1],M256.w[0], CS.w[0]);
+
+  if (M256.w[1] > C256.w[1] ||
+      (M256.w[1] == C256.w[1] && M256.w[0] > C256.w[0])) {
+    __sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+    M256.w[1] = M256.w[1] - Carry - C8.w[1];
+    M256.w[0]++;
+    if (!M256.w[0]) {
+      M256.w[1]++;
+
+    }
+
+    if ((M256.w[1] > C256.w[1] ||
+	 (M256.w[1] == C256.w[1] && M256.w[0] > C256.w[0]))
+	&& (CS.w[0] > 1)) {
+
+      CS.w[0]--;
+
+      if (CS.w[0] > 1) {
+	__sub_borrow_out (M256.w[0], Carry, M256.w[0], C8.w[0]);
+	M256.w[1] = M256.w[1] - Carry - C8.w[1];
+	M256.w[0]++;
+	if (!M256.w[0]) {
+	  M256.w[1]++;
+	}
+
+	if (M256.w[1] > C256.w[1] ||
+	    (M256.w[1] == C256.w[1] && M256.w[0] > C256.w[0]))
+	  CS.w[0]--;
+      }
+    }
+  }
+
+  else {
+				/*__add_carry_out(M256.w[0], Carry, M256.w[0], C8.w[0]);
+				M256.w[1] = M256.w[1] + Carry + C8.w[1];
+				M256.w[0]++;
+				if(!M256.w[0]) 
+				{
+					M256.w[1]++;
+				}
+				CS.w[0]++;
+			if(M256.w[1]<C256.w[1] ||
+				(M256.w[1]==C256.w[1] && M256.w[0]<=C256.w[0]))
+			{
+				CS.w[0]++;
+			}*/
+    CS.w[0]++;
+  }
+  //printf("C256=%016I64x %016I64x, CSM=%016I64x %016I64x %016I64x %d\n",C4.w[1],C4.w[0],M256.w[1],M256.w[0], CS.w[0], exact);
+  // RU?
+  if (((rnd_mode) != ROUNDING_UP) || exact) {
+    if (CS.w[0])
+      CS.w[0]--;
+  }
+
+}
+#endif
+#endif
+ //printf("C256=%016I64x %016I64x, CSM=%016I64x %016I64x %016I64x %d\n",C4.w[1],C4.w[0],M256.w[1],M256.w[0], CS.w[0], exact);
+
+res = get_BID64 (0, exponent_q, CS.w[0], rnd_mode, pfpsf);
+#ifdef UNCHANGED_BINARY_STATUS_FLAGS
+(void) fesetexceptflag (&binaryflags, FE_ALL_FLAGS);
+#endif
+BID_RETURN (res);
+
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_string.c b/gcc-4.9/libgcc/config/libbid/bid64_string.c
new file mode 100644
index 000000000..f22e62657
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_string.c
@@ -0,0 +1,511 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <ctype.h>
+#include "bid_internal.h"
+#include "bid128_2_str.h"
+#include "bid128_2_str_macros.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+#define MAX_DECIMAL_EXPONENT  767
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid64_to_string (char *ps, UINT64 * px
+		 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x;
+#else
+
+void
+bid64_to_string (char *ps, UINT64 x
+		 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+// the destination string (pointed to by ps) must be pre-allocated
+  UINT64 sign_x, coefficient_x, D, ER10;
+  int istart, exponent_x, j, digits_x, bin_expon_cx;
+  int_float tempx;
+  UINT32 MiDi[12], *ptr;
+  UINT64 HI_18Dig, LO_18Dig, Tmp;
+  char *c_ptr_start, *c_ptr;
+  int midi_ind, k_lcv, len;
+  unsigned int save_fpsf;
+
+#if DECIMAL_CALL_BY_REFERENCE
+  x = *px;
+#endif
+
+  save_fpsf = *pfpsf; // place holder only
+  // unpack arguments, check for NaN or Infinity
+  if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+    // x is Inf. or NaN or 0
+
+    // Inf or NaN?
+    if ((x & 0x7800000000000000ull) == 0x7800000000000000ull) {
+      if ((x & 0x7c00000000000000ull) == 0x7c00000000000000ull) {
+    ps[0] = (sign_x) ? '-' : '+';
+    ps[1] = ((x & MASK_SNAN) == MASK_SNAN)? 'S':'Q';
+	ps[2] = 'N';
+	ps[3] = 'a';
+	ps[4] = 'N';
+	ps[5] = 0;
+	return;
+      }
+      // x is Inf
+      ps[0] = (sign_x) ? '-' : '+';
+      ps[1] = 'I';
+      ps[2] = 'n';
+      ps[3] = 'f';
+      ps[4] = 0;
+      return;
+    }
+    // 0
+    istart = 0;
+    if (sign_x) {
+      ps[istart++] = '-';
+    }
+
+    ps[istart++] = '0';
+    ps[istart++] = 'E';
+
+    exponent_x -= 398;
+    if (exponent_x < 0) {
+      ps[istart++] = '-';
+      exponent_x = -exponent_x;
+    } else
+      ps[istart++] = '+';
+
+    if (exponent_x) {
+      // get decimal digits in coefficient_x
+      tempx.d = (float) exponent_x;
+      bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+      digits_x = estimate_decimal_digits[bin_expon_cx];
+      if ((UINT64)exponent_x >= power10_table_128[digits_x].w[0])
+	digits_x++;
+
+      j = istart + digits_x - 1;
+      istart = j + 1;
+
+      // 2^32/10
+      ER10 = 0x1999999a;
+
+      while (exponent_x > 9) {
+	D = (UINT64) exponent_x *ER10;
+	D >>= 32;
+	exponent_x = exponent_x - (D << 1) - (D << 3);
+
+	ps[j--] = '0' + (char) exponent_x;
+	exponent_x = D;
+      }
+      ps[j] = '0' + (char) exponent_x;
+    } else {
+      ps[istart++] = '0';
+    }
+
+    ps[istart] = 0;
+
+    return;
+  }
+  // convert expon, coeff to ASCII
+  exponent_x -= DECIMAL_EXPONENT_BIAS;
+
+  ER10 = 0x1999999a;
+
+  istart = 0;
+  if (sign_x) {
+    ps[0] = '-';
+    istart = 1;
+  }
+  // if zero or non-canonical, set coefficient to '0'
+  if ((coefficient_x > 9999999999999999ull) ||	// non-canonical
+      ((coefficient_x == 0))	// significand is zero
+    ) {
+    ps[istart++] = '0';
+  } else {
+    /* ****************************************************
+       This takes a bid coefficient in C1.w[1],C1.w[0] 
+       and put the converted character sequence at location 
+       starting at &(str[k]). The function returns the number
+       of MiDi returned. Note that the character sequence 
+       does not have leading zeros EXCEPT when the input is of
+       zero value. It will then output 1 character '0'
+       The algorithm essentailly tries first to get a sequence of
+       Millenial Digits "MiDi" and then uses table lookup to get the
+       character strings of these MiDis.
+       **************************************************** */
+    /* Algorithm first decompose possibly 34 digits in hi and lo
+       18 digits. (The high can have at most 16 digits). It then
+       uses macro that handle 18 digit portions.
+       The first step is to get hi and lo such that
+       2^(64) C1.w[1] + C1.w[0] = hi * 10^18  + lo,   0 <= lo < 10^18.
+       We use a table lookup method to obtain the hi and lo 18 digits.
+       [C1.w[1],C1.w[0]] = c_8 2^(107) + c_7 2^(101) + ... + c_0 2^(59) + d
+       where 0 <= d < 2^59 and each c_j has 6 bits. Because d fits in
+       18 digits,  we set hi = 0, and lo = d to begin with.
+       We then retrieve from a table, for j = 0, 1, ..., 8
+       that gives us A and B where c_j 2^(59+6j) = A * 10^18 + B.
+       hi += A ; lo += B; After each accumulation into lo, we normalize 
+       immediately. So at the end, we have the decomposition as we need. */
+
+    Tmp = coefficient_x >> 59;
+    LO_18Dig = (coefficient_x << 5) >> 5;
+    HI_18Dig = 0;
+    k_lcv = 0;
+
+    while (Tmp) {
+      midi_ind = (int) (Tmp & 0x000000000000003FLL);
+      midi_ind <<= 1;
+      Tmp >>= 6;
+      HI_18Dig += mod10_18_tbl[k_lcv][midi_ind++];
+      LO_18Dig += mod10_18_tbl[k_lcv++][midi_ind];
+      __L0_Normalize_10to18 (HI_18Dig, LO_18Dig);
+    }
+
+    ptr = MiDi;
+    __L1_Split_MiDi_6_Lead (LO_18Dig, ptr);
+    len = ptr - MiDi;
+    c_ptr_start = &(ps[istart]);
+    c_ptr = c_ptr_start;
+
+    /* now convert the MiDi into character strings */
+    __L0_MiDi2Str_Lead (MiDi[0], c_ptr);
+    for (k_lcv = 1; k_lcv < len; k_lcv++) {
+      __L0_MiDi2Str (MiDi[k_lcv], c_ptr);
+    }
+    istart = istart + (c_ptr - c_ptr_start);
+  }
+
+  ps[istart++] = 'E';
+
+  if (exponent_x < 0) {
+    ps[istart++] = '-';
+    exponent_x = -exponent_x;
+  } else
+    ps[istart++] = '+';
+
+  if (exponent_x) {
+    // get decimal digits in coefficient_x
+    tempx.d = (float) exponent_x;
+    bin_expon_cx = ((tempx.i >> 23) & 0xff) - 0x7f;
+    digits_x = estimate_decimal_digits[bin_expon_cx];
+    if ((UINT64)exponent_x >= power10_table_128[digits_x].w[0])
+      digits_x++;
+
+    j = istart + digits_x - 1;
+    istart = j + 1;
+
+    // 2^32/10
+    ER10 = 0x1999999a;
+
+    while (exponent_x > 9) {
+      D = (UINT64) exponent_x *ER10;
+      D >>= 32;
+      exponent_x = exponent_x - (D << 1) - (D << 3);
+
+      ps[j--] = '0' + (char) exponent_x;
+      exponent_x = D;
+    }
+    ps[j] = '0' + (char) exponent_x;
+  } else {
+    ps[istart++] = '0';
+  }
+
+  ps[istart] = 0;
+
+  return;
+
+}
+
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_from_string (UINT64 * pres, char *ps
+		   _RND_MODE_PARAM _EXC_FLAGS_PARAM 
+                   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#else
+UINT64
+bid64_from_string (char *ps
+		   _RND_MODE_PARAM _EXC_FLAGS_PARAM 
+                   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 sign_x, coefficient_x = 0, rounded = 0, res;
+  int expon_x = 0, sgn_expon, ndigits, add_expon = 0, midpoint =
+    0, rounded_up = 0;
+  int dec_expon_scale = 0, right_radix_leading_zeros = 0, rdx_pt_enc =
+    0;
+  unsigned fpsc;
+  char c;
+  unsigned int save_fpsf;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  save_fpsf = *pfpsf; // place holder only
+  // eliminate leading whitespace
+  while (((*ps == ' ') || (*ps == '\t')) && (*ps))
+    ps++;
+
+  // get first non-whitespace character
+  c = *ps;
+
+  // detect special cases (INF or NaN)
+  if (!c || (c != '.' && c != '-' && c != '+' && (c < '0' || c > '9'))) {
+    // Infinity?
+    if ((tolower_macro (ps[0]) == 'i' && tolower_macro (ps[1]) == 'n' && 
+        tolower_macro (ps[2]) == 'f') && (!ps[3] || 
+        (tolower_macro (ps[3]) == 'i' && 
+        tolower_macro (ps[4]) == 'n' && tolower_macro (ps[5]) == 'i' && 
+        tolower_macro (ps[6]) == 't' && tolower_macro (ps[7]) == 'y' && 
+        !ps[8]))) {
+      res = 0x7800000000000000ull;
+      BID_RETURN (res);
+    }
+    // return sNaN
+    if (tolower_macro (ps[0]) == 's' && tolower_macro (ps[1]) == 'n' && 
+        tolower_macro (ps[2]) == 'a' && tolower_macro (ps[3]) == 'n') { 
+        // case insensitive check for snan
+      res = 0x7e00000000000000ull;
+      BID_RETURN (res);
+    } else {
+      // return qNaN
+      res = 0x7c00000000000000ull;
+      BID_RETURN (res);
+    }
+  }
+  // detect +INF or -INF
+  if ((tolower_macro (ps[1]) == 'i' && tolower_macro (ps[2]) == 'n' && 
+      tolower_macro (ps[3]) == 'f') && (!ps[4] || 
+      (tolower_macro (ps[4]) == 'i' && tolower_macro (ps[5]) == 'n' && 
+      tolower_macro (ps[6]) == 'i' && tolower_macro (ps[7]) == 't' && 
+      tolower_macro (ps[8]) == 'y' && !ps[9]))) {
+    if (c == '+')
+      res = 0x7800000000000000ull;
+    else if (c == '-')
+      res = 0xf800000000000000ull;
+    else
+      res = 0x7c00000000000000ull;
+    BID_RETURN (res);
+  }
+  // if +sNaN, +SNaN, -sNaN, or -SNaN
+  if (tolower_macro (ps[1]) == 's' && tolower_macro (ps[2]) == 'n'
+      && tolower_macro (ps[3]) == 'a' && tolower_macro (ps[4]) == 'n') {
+    if (c == '-')
+      res = 0xfe00000000000000ull;
+    else
+      res = 0x7e00000000000000ull;
+    BID_RETURN (res);
+  }
+  // determine sign
+  if (c == '-')
+    sign_x = 0x8000000000000000ull;
+  else
+    sign_x = 0;
+
+  // get next character if leading +/- sign
+  if (c == '-' || c == '+') {
+    ps++;
+    c = *ps;
+  }
+  // if c isn't a decimal point or a decimal digit, return NaN
+  if (c != '.' && (c < '0' || c > '9')) {
+    // return NaN
+    res = 0x7c00000000000000ull | sign_x;
+    BID_RETURN (res);
+  }
+
+  rdx_pt_enc = 0;
+
+  // detect zero (and eliminate/ignore leading zeros)
+  if (*(ps) == '0' || *(ps) == '.') {
+
+    if (*(ps) == '.') {
+      rdx_pt_enc = 1;
+      ps++;
+    }
+    // if all numbers are zeros (with possibly 1 radix point, the number is zero
+    // should catch cases such as: 000.0
+    while (*ps == '0') {
+      ps++;
+      // for numbers such as 0.0000000000000000000000000000000000001001, 
+      // we want to count the leading zeros
+      if (rdx_pt_enc) {
+	right_radix_leading_zeros++;
+      }
+      // if this character is a radix point, make sure we haven't already 
+      // encountered one
+      if (*(ps) == '.') {
+	if (rdx_pt_enc == 0) {
+	  rdx_pt_enc = 1;
+	  // if this is the first radix point, and the next character is NULL, 
+          // we have a zero
+	  if (!*(ps + 1)) {
+	    res =
+	      ((UINT64) (398 - right_radix_leading_zeros) << 53) |
+	      sign_x;
+	    BID_RETURN (res);
+	  }
+	  ps = ps + 1;
+	} else {
+	  // if 2 radix points, return NaN
+	  res = 0x7c00000000000000ull | sign_x;
+	  BID_RETURN (res);
+	}
+      } else if (!*(ps)) {
+	//pres->w[1] = 0x3040000000000000ull | sign_x;
+	res =
+	  ((UINT64) (398 - right_radix_leading_zeros) << 53) | sign_x;
+	BID_RETURN (res);
+      }
+    }
+  }
+
+  c = *ps;
+
+  ndigits = 0;
+  while ((c >= '0' && c <= '9') || c == '.') {
+    if (c == '.') {
+      if (rdx_pt_enc) {
+	// return NaN
+	res = 0x7c00000000000000ull | sign_x;
+	BID_RETURN (res);
+      }
+      rdx_pt_enc = 1;
+      ps++;
+      c = *ps;
+      continue;
+    }
+    dec_expon_scale += rdx_pt_enc;
+
+    ndigits++;
+    if (ndigits <= 16) {
+      coefficient_x = (coefficient_x << 1) + (coefficient_x << 3);
+      coefficient_x += (UINT64) (c - '0');
+    } else if (ndigits == 17) {
+      // coefficient rounding
+		switch(rnd_mode){
+	case ROUNDING_TO_NEAREST:
+      midpoint = (c == '5' && !(coefficient_x & 1)) ? 1 : 0; 
+          // if coefficient is even and c is 5, prepare to round up if 
+          // subsequent digit is nonzero
+      // if str[MAXDIG+1] > 5, we MUST round up
+      // if str[MAXDIG+1] == 5 and coefficient is ODD, ROUND UP!
+      if (c > '5' || (c == '5' && (coefficient_x & 1))) {
+	coefficient_x++;
+	rounded_up = 1;
+	break;
+
+	case ROUNDING_DOWN:
+		if(sign_x) { coefficient_x++; rounded_up=1; }
+		break;
+	case ROUNDING_UP:
+		if(!sign_x) { coefficient_x++; rounded_up=1; }
+		break;
+	case ROUNDING_TIES_AWAY:
+		if(c>='5') { coefficient_x++; rounded_up=1; }
+		break;
+	  }
+	if (coefficient_x == 10000000000000000ull) {
+	  coefficient_x = 1000000000000000ull;
+	  add_expon = 1;
+	}
+      }
+      if (c > '0')
+	rounded = 1;
+      add_expon += 1;
+    } else { // ndigits > 17
+      add_expon++;
+      if (midpoint && c > '0') {
+	coefficient_x++;
+	midpoint = 0;
+	rounded_up = 1;
+      }
+      if (c > '0')
+	rounded = 1;
+    }
+    ps++;
+    c = *ps;
+  }
+
+  add_expon -= (dec_expon_scale + right_radix_leading_zeros);
+
+  if (!c) {
+    res =
+      fast_get_BID64_check_OF (sign_x,
+			       add_expon + DECIMAL_EXPONENT_BIAS,
+			       coefficient_x, 0, &fpsc);
+    BID_RETURN (res);
+  }
+
+  if (c != 'E' && c != 'e') {
+    // return NaN
+    res = 0x7c00000000000000ull | sign_x;
+    BID_RETURN (res);
+  }
+  ps++;
+  c = *ps;
+  sgn_expon = (c == '-') ? 1 : 0;
+  if (c == '-' || c == '+') {
+    ps++;
+    c = *ps;
+  }
+  if (!c || c < '0' || c > '9') {
+    // return NaN
+    res = 0x7c00000000000000ull | sign_x;
+    BID_RETURN (res);
+  }
+
+  while (c >= '0' && c <= '9') {
+    expon_x = (expon_x << 1) + (expon_x << 3);
+    expon_x += (int) (c - '0');
+
+    ps++;
+    c = *ps;
+  }
+
+  if (c) {
+    // return NaN
+    res = 0x7c00000000000000ull | sign_x;
+    BID_RETURN (res);
+  }
+
+  if (sgn_expon)
+    expon_x = -expon_x;
+
+  expon_x += add_expon + DECIMAL_EXPONENT_BIAS;
+
+  if (expon_x < 0) {
+    if (rounded_up)
+      coefficient_x--;
+    rnd_mode = 0;
+    res =
+      get_BID64_UF (sign_x, expon_x, coefficient_x, rounded, rnd_mode,
+		    &fpsc);
+    BID_RETURN (res);
+  }
+  res = get_BID64 (sign_x, expon_x, coefficient_x, rnd_mode, &fpsc);
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_bid128.c b/gcc-4.9/libgcc/config/libbid/bid64_to_bid128.c
new file mode 100644
index 000000000..276659b88
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_bid128.c
@@ -0,0 +1,262 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define BID_128RES
+#include "bid_internal.h"
+
+/*
+ * Takes a BID64 as input and converts it to a BID128 and returns it. 
+ */
+TYPE0_FUNCTION_ARGTYPE1_NORND (UINT128, bid64_to_bid128, UINT64, x)
+
+     UINT128 new_coeff, res;
+     UINT64 sign_x;
+     int exponent_x;
+     UINT64 coefficient_x;
+
+if (!unpack_BID64 (&sign_x, &exponent_x, &coefficient_x, x)) {
+if (((x) << 1) >= 0xf000000000000000ull) {
+#ifdef SET_STATUS_FLAGS
+  if (((x) & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+    __set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+  res.w[0] = (coefficient_x & 0x0003ffffffffffffull);
+  __mul_64x64_to_128 (res, res.w[0], power10_table_128[18].w[0]);
+  res.w[1] |= ((coefficient_x) & 0xfc00000000000000ull);
+  BID_RETURN (res);
+}
+}
+
+new_coeff.w[0] = coefficient_x;
+new_coeff.w[1] = 0;
+get_BID128_very_fast (&res, sign_x,
+		      exponent_x + DECIMAL_EXPONENT_BIAS_128 -
+		      DECIMAL_EXPONENT_BIAS, new_coeff);
+BID_RETURN (res);
+}	// convert_bid64_to_bid128
+
+
+
+/*
+ * Takes a BID128 as input and converts it to a BID64 and returns it.
+ */
+#if DECIMAL_CALL_BY_REFERENCE
+
+void
+bid128_to_bid64 (UINT64 * pres,
+		 UINT128 *
+		 px _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		 _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+
+UINT64
+bid128_to_bid64 (UINT128 x _RND_MODE_PARAM _EXC_FLAGS_PARAM
+		 _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 CX, T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CX1;
+  UINT64 sign_x, carry, cy, res;
+  SINT64 D;
+  int_float f64, fx;
+  int exponent_x, extra_digits, amount, bin_expon_cx;
+  unsigned rmode, status, uf_check = 0;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  BID_SWAP128 (x);
+  // unpack arguments, check for NaN or Infinity or 0
+  if (!unpack_BID128_value (&sign_x, &exponent_x, &CX, x)) {
+    if ((x.w[1] << 1) >= 0xf000000000000000ull) {
+      Tmp.w[1] = (CX.w[1] & 0x00003fffffffffffull);
+      Tmp.w[0] = CX.w[0];
+      TP128 = reciprocals10_128[18];
+      __mul_128x128_full (Qh, Ql, Tmp, TP128);
+      amount = recip_scale[18];
+      __shr_128 (Tmp, Qh, amount);
+      res = (CX.w[1] & 0xfc00000000000000ull) | Tmp.w[0];
+#ifdef SET_STATUS_FLAGS
+      if ((x.w[1] & SNAN_MASK64) == SNAN_MASK64)	// sNaN
+	__set_status_flags (pfpsf, INVALID_EXCEPTION);
+#endif
+      BID_RETURN_VAL (res);
+    }
+    exponent_x =
+      exponent_x - DECIMAL_EXPONENT_BIAS_128 + DECIMAL_EXPONENT_BIAS;
+    if (exponent_x < 0) {
+      res = sign_x;
+      BID_RETURN_VAL (res);
+    }
+    if (exponent_x > DECIMAL_MAX_EXPON_64)
+      exponent_x = DECIMAL_MAX_EXPON_64;
+    res = sign_x | (((UINT64) exponent_x) << 53);
+    BID_RETURN_VAL (res);
+  }
+
+  if (CX.w[1] || (CX.w[0] >= 10000000000000000ull)) {
+    // find number of digits in coefficient
+    // 2^64
+    f64.i = 0x5f800000;
+    // fx ~ CX
+    fx.d = (float) CX.w[1] * f64.d + (float) CX.w[0];
+    bin_expon_cx = ((fx.i >> 23) & 0xff) - 0x7f;
+    extra_digits = estimate_decimal_digits[bin_expon_cx] - 16;
+    // scale = 38-estimate_decimal_digits[bin_expon_cx];
+    D = CX.w[1] - power10_index_binexp_128[bin_expon_cx].w[1];
+    if (D > 0
+	|| (!D
+	    && CX.w[0] >= power10_index_binexp_128[bin_expon_cx].w[0]))
+      extra_digits++;
+
+    exponent_x += extra_digits;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rnd_mode;
+    if (sign_x && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+    if (exponent_x < DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS) {
+      uf_check = 1;
+      if (-extra_digits + exponent_x - DECIMAL_EXPONENT_BIAS_128 +
+	  DECIMAL_EXPONENT_BIAS + 35 >= 0) {
+	if (exponent_x ==
+	    DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS - 1) {
+	  T128 = round_const_table_128[rmode][extra_digits];
+	  __add_carry_out (CX1.w[0], carry, T128.w[0], CX.w[0]);
+	  CX1.w[1] = CX.w[1] + T128.w[1] + carry;
+	  if (__unsigned_compare_ge_128
+	      (CX1, power10_table_128[extra_digits + 16]))
+	    uf_check = 0;
+	}
+	extra_digits =
+	  extra_digits + DECIMAL_EXPONENT_BIAS_128 -
+	  DECIMAL_EXPONENT_BIAS - exponent_x;
+	exponent_x = DECIMAL_EXPONENT_BIAS_128 - DECIMAL_EXPONENT_BIAS;
+	//uf_check = 2;
+      } else
+	rmode = ROUNDING_TO_ZERO;
+    }
+
+    T128 = round_const_table_128[rmode][extra_digits];
+    __add_carry_out (CX.w[0], carry, T128.w[0], CX.w[0]);
+    CX.w[1] = CX.w[1] + T128.w[1] + carry;
+
+    TP128 = reciprocals10_128[extra_digits];
+    __mul_128x128_full (Qh, Ql, CX, TP128);
+    amount = recip_scale[extra_digits];
+
+    if (amount >= 64) {
+      CX.w[0] = Qh.w[1] >> (amount - 64);
+      CX.w[1] = 0;
+    } else {
+      __shr_128 (CX, Qh, amount);
+    }
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (!(rmode))
+#endif
+      if (CX.w[0] & 1) {
+	// check whether fractional part of initial_P/10^ed1 is exactly .5
+
+	// get remainder
+	__shl_128_long (Qh1, Qh, (128 - amount));
+
+	if (!Qh1.w[1] && !Qh1.w[0]
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0]))) {
+	  CX.w[0]--;
+	}
+      }
+#endif
+
+    {
+      status = INEXACT_EXCEPTION;
+      // get remainder
+      __shl_128_long (Qh1, Qh, (128 - amount));
+
+      switch (rmode) {
+      case ROUNDING_TO_NEAREST:
+      case ROUNDING_TIES_AWAY:
+	// test whether fractional part is 0
+	if (Qh1.w[1] == 0x8000000000000000ull && (!Qh1.w[0])
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      case ROUNDING_DOWN:
+      case ROUNDING_TO_ZERO:
+	if ((!Qh1.w[1]) && (!Qh1.w[0])
+	    && (Ql.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Ql.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Ql.w[0] < reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      default:
+	// round up
+	__add_carry_out (Stemp.w[0], cy, Ql.w[0],
+			 reciprocals10_128[extra_digits].w[0]);
+	__add_carry_in_out (Stemp.w[1], carry, Ql.w[1],
+			    reciprocals10_128[extra_digits].w[1], cy);
+	__shr_128_long (Qh, Qh1, (128 - amount));
+	Tmp.w[0] = 1;
+	Tmp.w[1] = 0;
+	__shl_128_long (Tmp1, Tmp, amount);
+	Qh.w[0] += carry;
+	if (Qh.w[0] < carry)
+	  Qh.w[1]++;
+	if (__unsigned_compare_ge_128 (Qh, Tmp1))
+	  status = EXACT_STATUS;
+      }
+
+      if (status != EXACT_STATUS) {
+	if (uf_check)
+	  status |= UNDERFLOW_EXCEPTION;
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (pfpsf, status);
+#endif
+      }
+
+
+    }
+
+  }
+
+  res =
+    get_BID64 (sign_x,
+	       exponent_x - DECIMAL_EXPONENT_BIAS_128 +
+	       DECIMAL_EXPONENT_BIAS, CX.w[0], rnd_mode, pfpsf);
+  BID_RETURN_VAL (res);
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_int16.c b/gcc-4.9/libgcc/config/libbid/bid64_to_int16.c
new file mode 100644
index 000000000..489b7c5ce
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_int16.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffff8000
+#define INVALID_RESULT 0x8000
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_rnint, UINT64, x,
+			       bid64_to_int32_rnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_xrnint, UINT64, x,
+			       bid64_to_int32_xrnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_rninta, UINT64, x,
+			       bid64_to_int32_rninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_xrninta, UINT64, x,
+			       bid64_to_int32_xrninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_int, UINT64, x,
+			       bid64_to_int32_int, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_xint, UINT64, x,
+			       bid64_to_int32_xint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_floor, UINT64, x,
+			       bid64_to_int32_floor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_ceil, UINT64, x,
+			       bid64_to_int32_ceil, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_xfloor, UINT64, x,
+			       bid64_to_int32_xfloor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (short, bid64_to_int16_xceil, UINT64, x,
+			       bid64_to_int32_xceil, int, SIZE_MASK,
+			       INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_int32.c b/gcc-4.9/libgcc/config/libbid/bid64_to_int32.c
new file mode 100644
index 000000000..1c0022c9a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_int32.c
@@ -0,0 +1,2587 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_to_int32_rnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_rnint (int *pres,
+		      UINT64 *
+		      px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_rnint (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x500000005, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x500000005 <=>
+	// C > 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1/2 up)
+	// Note: 0x500000005*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000005ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x4fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1/2 up)
+	// Note: 0x4fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 <= n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (C1 <= midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffff;	// return -1
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0]
+	  && (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_xrnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_xrnint (int *pres,
+		       UINT64 *
+		       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_xrnint (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000005, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x500000005, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x500000005 <=>
+	// C > 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1/2 up)
+	// Note: 0x500000005*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000005ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x4fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1/2 up)
+	// Note: 0x4fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (C1 <= midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffff;	// return -1
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0]
+	  && (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_floor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_floor (int *pres,
+		      UINT64 *
+		      px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_floor (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x500000000 <=>
+	// C > 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffff;
+    else
+      res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_xfloor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_xfloor (int *pres,
+		       UINT64 *
+		       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_xfloor (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n < -2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x500000000 <=>
+	// C > 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 <= n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffff;
+    else
+      res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_ceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_ceil (int *pres,
+		     UINT64 *
+		     px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_ceil (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x50000000a, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x50000000a, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x50000000a has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x50000000a*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x50000000aull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31 - 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x4fffffff6, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x4fffffff6 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x4fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x4fffffff6 <=>
+	// C > 0x4fffffff6 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x4fffffff6*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffff6ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n <= 2^31 - 1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x <= 2^31-1 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact 
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_xceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_xceil (int *pres,
+		      UINT64 *
+		      px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_xceil (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x50000000a, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x50000000a, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x50000000a has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x50000000a*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x50000000aull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^31 - 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x4fffffff6, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x4fffffff6, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x4fffffff6 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x4fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x4fffffff6 <=>
+	// C > 0x4fffffff6 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x4fffffff6*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffff6ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n <= 2^31 - 1
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x <= 2^31-1 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact 
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_int
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_int (int *pres,
+		    UINT64 *
+		    px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		    _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_int (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		    _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x50000000a, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x50000000a, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x50000000a has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x50000000a*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x50000000aull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_xint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_xint (int *pres,
+		     UINT64 *
+		     px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_xint (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		     _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x50000000a, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x50000000a, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x50000000a has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x50000000aull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x50000000a <=>
+	// C >= 0x50000000a * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1 up)
+	// Note: 0x50000000a*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x50000000aull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000000 <=>
+	// C >= 0x500000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1 up)
+	// Note: 0x500000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1 < n < 2^31
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1 < x <= -1 or 1 <= x < 2^31 so x can be rounded
+    // to nearest to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_rninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_rninta (int *pres,
+		       UINT64 *
+		       px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_rninta (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000005, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000005 <=>
+	// C >= 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1/2 up)
+	// Note: 0x500000005*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000005ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x4fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1/2 up)
+	// Note: 0x4fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (C1 < midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffff;	// return -1
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*)-1 (logical right shift; C* has p decimal digits, 
+      // correct by Pr. 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int32_xrninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int32_xrninta (int *pres,
+			UINT64 *
+			px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+int
+bid64_to_int32_xrninta (UINT64 x _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in a signed 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10
+      // if n <= -2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x500000005, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x500000005, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x500000005ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x500000005 <=>
+	// C >= 0x500000005 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31+1/2 up)
+	// Note: 0x500000005*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x500000005ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^31 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^31-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x4fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x4fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x500000005 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x4fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x4fffffffb <=>
+	// C >= 0x4fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^31-1/2 up)
+	// Note: 0x4fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x4fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32: -2^31 - 1/2 < n < 2^31 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;
+    if (C1 < midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffff;	// return -1
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^31-1/2 <= x <= -1 or 1 <= x < 2^31-1/2 so x can be rounded
+    // to nearest away to a 32-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*)-1 (logical right shift; C* has p decimal digits, 
+      // correct by Pr. 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_int64.c b/gcc-4.9/libgcc/config/libbid/bid64_to_int64.c
new file mode 100644
index 000000000..a0a78cb64
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_int64.c
@@ -0,0 +1,2329 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_to_int64_rnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_rnint (SINT64 * pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_rnint (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+1), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000005, 1<=q<=16
+      // <=> C * 10^(20-q) > 0x50000000000000005, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x50000000000000005, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] > 0x05ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x4fffffffffffffffb, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] >= 0xfffffffffffffffbull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 <= midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffffffffffffull;	// return -1
+    } else {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_xrnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_xrnint (SINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_xrnint (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64+1), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000005, 1<=q<=16
+      // <=> C * 10^(20-q) > 0x50000000000000005, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x50000000000000005, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] > 0x05ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x4fffffffffffffffb, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] >= 0xfffffffffffffffbull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1/2 <= n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 <= midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffffffffffffull;	// return -1
+    } else {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1/2 <= x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_floor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_floor (SINT64 * pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_floor (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000000, 1<=q<=16
+      // <=> C * 10^(20-q) > 0x50000000000000000, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] != 0)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x50000000000000000, 1<=q<=16
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] >= 0x05ull) {
+	// actually C.w[1] == 0x05ull && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63 <= n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffffffffffffull;
+    else
+      res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63 <= x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_xfloor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_xfloor (SINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_xfloor (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n < -2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 > 0x50000000000000000, 1<=q<=16
+      // <=> C * 10^(20-q) > 0x50000000000000000, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] != 0)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x50000000000000000, 1<=q<=16
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] >= 0x05ull) {
+	// actually C.w[1] == 0x05ull && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63 <= n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return -1 or 0
+    if (x_sign)
+      res = 0xffffffffffffffffull;
+    else
+      res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63 <= x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (x_sign) {	// negative and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_ceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_ceil (SINT64 * pres, UINT64 * px
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_ceil (UINT64 x
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x5000000000000000a, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x0aull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n > 2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63 - 1
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64-2), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 0x4fffffffffffffff6, 1<=q<=16
+      // <=> if C * 10^(20-q) > 0x4fffffffffffffff6, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffff6ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] > 0xfffffffffffffff6ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x <= 2^63 - 1 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_xceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_xceil (SINT64 * pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_xceil (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x5000000000000000a, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x0aull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n > 2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) > 2^63 - 1
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 5*(2^64-2), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 > 0x4fffffffffffffff6, 1<=q<=16
+      // <=> if C * 10^(20-q) > 0x4fffffffffffffff6, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffff6ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] > 0xfffffffffffffff6ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x <= 2^63 - 1 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  if (!x_sign) {	// positive and inexact
+	    Cstar++;
+	  }
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_int
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_int (SINT64 * pres, UINT64 * px
+		    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_int (UINT64 x
+		    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x5000000000000000a, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x0aull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x50000000000000000, 1<=q<=16
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] >= 0x05ull) {
+	// actually C.w[1] == 0x05ull && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_xint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_xint (SINT64 * pres, UINT64 * px
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_xint (UINT64 x
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+2), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x5000000000000000a, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x5000000000000000a, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x5000000000000000a, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x0aull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*2^64, 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000000, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x50000000000000000, 1<=q<=16
+      C.w[1] = 0x0000000000000005ull;
+      C.w[0] = 0x0000000000000000ull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] >= 0x05ull) {
+	// actually C.w[1] == 0x05ull && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1 < n < 2^63
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1 < x <= -1 or 1 <= x < 2^63 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_rninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_rninta (SINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_rninta (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+1), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000005, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x50000000000000005, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x50000000000000005, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x05ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x4fffffffffffffffb, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] >= 0xfffffffffffffffbull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1/2 < n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 < midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffffffffffffull;	// return -1
+    } else {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1/2 < x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_int64_xrninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_int64_xrninta (SINT64 * pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+SINT64
+bid64_to_int64_xrninta (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  SINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 19) {	// x >= 10^19 ~= 2^63.11... (cannot fit in SINT64)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 19) {	// x = c(0)c(1)...c(18).c(19)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in a signed 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 19'
+    if (x_sign) {	// if n < 0 and q + exp = 19
+      // if n <= -2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63+1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64+1), 1<=q<=16
+      // <=> 0.c(0)c(1)...c(q-1) * 10^20 >= 0x50000000000000005, 1<=q<=16
+      // <=> C * 10^(20-q) >= 0x50000000000000005, 1<=q<=16
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      // Note: C1 * 10^(11-q) has 19 or 20 digits; 0x50000000000000005, has 20
+      if (C.w[1] > 0x05ull || (C.w[1] == 0x05ull && C.w[0] >= 0x05ull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    } else {	// if n > 0 and q + exp = 19
+      // if n >= 2^63 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(18).c(19)...c(q-1) >= 2^63-1/2
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 5*(2^64-1), 1<=q<=16
+      // <=> if 0.c(0)c(1)...c(q-1) * 10^20 >= 0x4fffffffffffffffb, 1<=q<=16
+      // <=> if C * 10^(20-q) >= 0x4fffffffffffffffb, 1<=q<=16
+      C.w[1] = 0x0000000000000004ull;
+      C.w[0] = 0xfffffffffffffffbull;
+      // 1 <= q <= 16 => 4 <= 20-q <= 19 => 10^(20-q) is 64-bit, and so is C1
+      __mul_64x64_to_128MACH (C, C1, ten2k64[20 - q]);
+      if (C.w[1] > 0x04ull ||
+	  (C.w[1] == 0x04ull && C.w[0] >= 0xfffffffffffffffbull)) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 19'
+    }	// end else if n > 0 and q + exp = 19
+  }	// end else if ((q + exp) == 19)
+
+  // n is not too large to be converted to int64: -2^63-1/2 < n < 2^63-1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else
+    //   res = +/-1
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 < midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (x_sign) {	// n < 0
+      res = 0xffffffffffffffffull;	// return -1
+    } else {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 19, 1 <= q <= 16, -15 <= exp <= 18)
+    // -2^63-1/2 < x <= -1 or 1 <= x < 2^63-1/2 so x can be rounded
+    // to nearest to a 64-bit signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 19
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      if (x_sign)
+	res = -Cstar;
+      else
+	res = Cstar;
+    } else if (exp == 0) {
+      // 1 <= q <= 16
+      // res = +/-C (exact)
+      if (x_sign)
+	res = -C1;
+      else
+	res = C1;
+    } else {	// if (exp > 0) => 1 <= exp <= 18, 1 <= q <= 16, 2 <= q + exp <= 20
+      // (the upper limit of 20 on q + exp is due to the fact that 
+      // +/-C * 10^exp is guaranteed to fit in 64 bits) 
+      // res = +/-C * 10^exp (exact)
+      if (x_sign)
+	res = -C1 * ten2k64[exp];
+      else
+	res = C1 * ten2k64[exp];
+    }
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_int8.c b/gcc-4.9/libgcc/config/libbid/bid64_to_int8.c
new file mode 100644
index 000000000..7af3b8c60
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_int8.c
@@ -0,0 +1,69 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffffff80
+#define INVALID_RESULT 0x80
+
+
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_rnint, UINT64, x,
+			       bid64_to_int32_rnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_xrnint, UINT64, x,
+			       bid64_to_int32_xrnint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_rninta, UINT64, x,
+			       bid64_to_int32_rninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_xrninta, UINT64, x,
+			       bid64_to_int32_xrninta, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_int, UINT64, x,
+			       bid64_to_int32_int, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_xint, UINT64, x,
+			       bid64_to_int32_xint, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_floor, UINT64, x,
+			       bid64_to_int32_floor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_ceil, UINT64, x,
+			       bid64_to_int32_ceil, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_xfloor, UINT64, x,
+			       bid64_to_int32_xfloor, int, SIZE_MASK,
+			       INVALID_RESULT)
+
+BID_TO_SMALL_INT_CVT_FUNCTION (char, bid64_to_int8_xceil, UINT64, x,
+			       bid64_to_int32_xceil, int, SIZE_MASK,
+			       INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_uint16.c b/gcc-4.9/libgcc/config/libbid/bid64_to_uint16.c
new file mode 100644
index 000000000..c27cf9f3e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_uint16.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffff0000
+#define INVALID_RESULT 0x8000
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_rnint,
+				UINT64, x, bid64_to_uint32_rnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_xrnint,
+				UINT64, x, bid64_to_uint32_xrnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_rninta,
+				UINT64, x, bid64_to_uint32_rninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_xrninta,
+				UINT64, x, bid64_to_uint32_xrninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_int,
+				UINT64, x, bid64_to_uint32_int,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_xint,
+				UINT64, x, bid64_to_uint32_xint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_floor,
+				UINT64, x, bid64_to_uint32_floor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_ceil,
+				UINT64, x, bid64_to_uint32_ceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_xfloor,
+				UINT64, x, bid64_to_uint32_xfloor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned short, bid64_to_uint16_xceil,
+				UINT64, x, bid64_to_uint32_xceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_uint32.c b/gcc-4.9/libgcc/config/libbid/bid64_to_uint32.c
new file mode 100644
index 000000000..ecfbc6d5e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_uint32.c
@@ -0,0 +1,2270 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_to_uint32_rnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_rnint (unsigned int *pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_rnint (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x9fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffffb has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0x9fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1/2 <= n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (C1 <= midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^32-1/2 <= x <= -1 or 1 <= x < 2^32-1/2 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_xrnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_xrnint (unsigned int *pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_xrnint (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x9fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffffb has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0x9fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1/2 <= n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (C1 <= midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^32-1/2 <= x <= -1 or 1 <= x < 2^32-1/2 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to 
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_floor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_floor (unsigned int *pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_floor (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  if (x_sign) {	// if n < 0 the conversion is invalid
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    // n > 0 and q + exp = 10
+    // if n >= 2^32 then n is too large
+    // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+    // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=16
+    // <=> C * 10^(11-q) >= 0xa00000000, 1<=q<=16
+    if (q <= 11) {
+      // Note: C * 10^(11-q) has 10 or 11 digits; 0xa00000000 has 11 digits
+      tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+      // c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+      if (tmp64 >= 0xa00000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit unsigned int fall through
+      // to '1 <= q + exp <= 10'
+    } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+      // C * 10^(11-q) >= 0xa00000000 <=>
+      // C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 5
+      // (scale 2^32-1/2 up)
+      // Note: 0xa00000000*10^(q-11) has q-1 or q digits, where q <= 16
+      tmp64 = 0xa00000000ull * ten2k64[q - 11];
+      if (C1 >= tmp64) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // 1 <= x < 2^32 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_xfloor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_xfloor (unsigned int *pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_xfloor (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  if (x_sign) {	// if n < 0 the conversion is invalid
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    // if n > 0 and q + exp = 10
+    // if n >= 2^32 then n is too large
+    // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+    // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=16
+    // <=> C * 10^(11-q) >= 0xa00000000, 1<=q<=16
+    if (q <= 11) {
+      // Note: C * 10^(11-q) has 10 or 11 digits; 0xa00000000 has 11 digits
+      tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+      // c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+      if (tmp64 >= 0xa00000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit unsigned int fall through
+      // to '1 <= q + exp <= 10'
+    } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+      // C * 10^(11-q) >= 0xa00000000 <=>
+      // C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 5
+      // (scale 2^32-1/2 up)
+      // Note: 0xa00000000*10^(q-11) has q-1 or q digits, where q <= 16
+      tmp64 = 0xa00000000ull * ten2k64[q - 11];
+      if (C1 >= tmp64) {
+	// set invalid flag 
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite 
+	res = 0x80000000;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 32-bit int fall through
+      // to '1 <= q + exp <= 10'
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // 1 <= x < 2^32 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_ceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_ceil (unsigned int *pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_ceil (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^32 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^32 - 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x9fffffff6, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffff6 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x9fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x9fffffff6 <=>
+	// C > 0x9fffffff6 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1 up)
+	// Note: 0x9fffffff6*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffff6ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // x <= -1 or 1 <= x <= 2^32 - 1 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x <= 2^32 - 1 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_xceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_xceil (unsigned int *pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_xceil (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n > 2^32 - 1 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) > 2^32 - 1
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 > 0x9fffffff6, 1<=q<=16
+      // <=> C * 10^(11-q) > 0x9fffffff6, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffff6 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 > 0x9fffffff6ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) > 0x9fffffff6 <=>
+	// C > 0x9fffffff6 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1 up)
+	// Note: 0x9fffffff6*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffff6ull * ten2k64[q - 11];
+	if (C1 > tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x00000000;
+    else
+      res = 0x00000001;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // x <= -1 or 1 <= x < 2^32 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_int
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_int (unsigned int *pres, UINT64 * px
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_int (UINT64 x
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0xa00000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0xa00000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0xa00000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0xa00000000 <=>
+	// C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0xa00000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0xa00000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // x <= -1 or 1 <= x < 2^32 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_xint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_xint (unsigned int *pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_xint (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0xa00000000, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0xa00000000, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0xa00000000 has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0xa00000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0xa00000000 <=>
+	// C >= 0xa00000000 * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0xa00000000*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0xa00000000ull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1 < n < 2^32
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // x <= -1 or 1 <= x < 2^32 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_rninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_rninta (unsigned int *pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_rninta (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x9fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffffb has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0x9fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1/2 < n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (C1 < midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^32-1/2 <= x <= -1 or 1 <= x < 2^32-1/2 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint32_xrninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint32_xrninta (unsigned int *pres, UINT64 * px
+			 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+unsigned int
+bid64_to_uint32_xrninta (UINT64 x
+			 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+#endif
+  unsigned int res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 10) {	// x >= 10^10 ~= 2^33.2... (cannot fit in 32 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x80000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 10) {	// x = c(0)c(1)...c(9).c(10)...c(q-1)
+    // in this case 2^29.89... ~= 10^9 <= x < 10^10 ~= 2^33.2...
+    // so x rounded to an integer may or may not fit in an unsigned 32-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 10'
+    if (x_sign) {	// if n < 0 and q + exp = 10 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 10
+      // if n >= 2^32 - 1/2 then n is too large
+      // too large if c(0)c(1)...c(9).c(10)...c(q-1) >= 2^32-1/2
+      // <=> 0.c(0)c(1)...c(q-1) * 10^11 >= 0x9fffffffb, 1<=q<=16
+      // <=> C * 10^(11-q) >= 0x9fffffffb, 1<=q<=16
+      if (q <= 11) {
+	// Note: C * 10^(11-q) has 10 or 11 digits; 0x9fffffffb has 11 digits
+	tmp64 = C1 * ten2k64[11 - q];	// C scaled up to 11-digit int
+	// c(0)c(1)...c(9)c(10) or c(0)c(1)...c(q-1)0...0 (11 digits)
+	if (tmp64 >= 0x9fffffffbull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit unsigned int fall through
+	// to '1 <= q + exp <= 10'
+      } else {	// if (q > 11), i.e. 12 <= q <= 16 and so -15 <= exp <= -2
+	// C * 10^(11-q) >= 0x9fffffffb <=>
+	// C >= 0x9fffffffb * 10^(q-11) where 1 <= q - 11 <= 5
+	// (scale 2^32-1/2 up)
+	// Note: 0x9fffffffb*10^(q-11) has q-1 or q digits, where q <= 16
+	tmp64 = 0x9fffffffbull * ten2k64[q - 11];
+	if (C1 >= tmp64) {
+	  // set invalid flag 
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite 
+	  res = 0x80000000;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 32-bit int fall through
+	// to '1 <= q + exp <= 10'
+      }
+    }
+  }
+  // n is not too large to be converted to int32 if -1/2 < n < 2^32 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x00000000;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;
+    if (C1 < midpoint64[ind]) {
+      res = 0x00000000;	// return 0
+    } else if (x_sign) {	// n < 0
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    } else {	// n > 0
+      res = 0x00000001;	// return +1
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 10, 1 <= q <= 16, -15 <= exp <= 9)
+    // -2^32-1/2 <= x <= -1 or 1 <= x < 2^32-1/2 so if positive, x can be 
+    // rounded to nearest to a 32-bit unsigned integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x80000000;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^32-1/2 so x can be rounded
+    // to nearest to a 32-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 10
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_uint64.c b/gcc-4.9/libgcc/config/libbid/bid64_to_uint64.c
new file mode 100644
index 000000000..5f800a0ed
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_uint64.c
@@ -0,0 +1,2273 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_to_uint64_rnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_rnint (UINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_rnint (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffffb 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 <= midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (!x_sign) {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    } else {	// if n < 0
+      res = 0x8000000000000000ull;
+      *pfpsf |= INVALID_EXCEPTION;
+      BID_RETURN (res);
+    }
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_xrnint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_xrnint (UINT64 * pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_xrnint (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffffb 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) <= 0.5 <=> c(0)c(1)...c(q-1) <= 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 <= midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (!x_sign) {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    } else {	// if n < 0
+      res = 0x8000000000000000ull;
+      *pfpsf |= INVALID_EXCEPTION;
+      BID_RETURN (res);
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero, so
+      // it will need a correction
+      // check for midpoints
+      if ((fstar.w[1] == 0) && fstar.w[0] &&
+	  (fstar.w[0] <= ten2mk128trunc[ind - 1].w[1])) {
+	// ten2mk128trunc[ind -1].w[1] is identical to 
+	// ten2mk128[ind -1].w[1]
+	// the result is a midpoint; round to nearest
+	if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+	  // if floor(C*) is odd C = floor(C*) - 1; the result >= 1
+	  Cstar--;	// Cstar is now even
+	}	// else MP in [ODD, EVEN]
+      }
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_floor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_floor (UINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_floor (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  if (x_sign) {	// if n < 0 the conversion is invalid
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    // n > 0 and q + exp = 20
+    // if n >= 2^64 then n is too large
+    // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65)
+    // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=16
+    if (q == 1) {
+      // C * 10^20 >= 0xa0000000000000000
+      __mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+      // Note: C * 10^(21-q) has 20 or 21 digits; 0xa0000000000000000 
+      // has 21 digits
+      __mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // 1 <= x < 2^64 so x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_xfloor
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_xfloor (UINT64 * pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_xfloor (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  if (x_sign) {	// if n < 0 the conversion is invalid
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    // n > 0 and q + exp = 20
+    // if n >= 2^64 then n is too large
+    // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+    // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65)
+    // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=16
+    if (q == 1) {
+      // C * 10^20 >= 0xa0000000000000000
+      __mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+      // Note: C * 10^(21-q) has 20 or 21 digits; 0xa0000000000000000 
+      // has 21 digits
+      __mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+      if (C.w[1] >= 0x0a) {
+	// actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	// set invalid flag
+	*pfpsf |= INVALID_EXCEPTION;
+	// return Integer Indefinite
+	res = 0x8000000000000000ull;
+	BID_RETURN (res);
+      }
+      // else cases that can be rounded to a 64-bit int fall through
+      // to '1 <= q + exp <= 20'
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // 1 <= x < 2^64 so x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_ceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_ceil (UINT64 * pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_ceil (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n > 2^64 - 1 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65 - 2)
+      // <=> C * 10^(21-q) > 0x9fffffffffffffff6, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 > 0x9fffffffffffffff6
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffff6
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x <= 2^64 - 1 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x <= 2^64 - 1 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_xceil
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_xceil (UINT64 * pres, UINT64 * px
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_xceil (UINT64 x
+		       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		       _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n > 2^64 - 1 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 > 2^64 - 1
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65 - 2)
+      // <=> C * 10^(21-q) > 0x9fffffffffffffff6, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 > 0x9fffffffffffffff6
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffff6
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] > 0xfffffffffffffff6ull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0 or 1
+    if (x_sign)
+      res = 0x0000000000000000ull;
+    else
+      res = 0x0000000000000001ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x <= 2^64 - 1 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x <= 2^64 - 1 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  Cstar++;
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_int
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_int (UINT64 * pres, UINT64 * px
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_int (UINT64 x
+		     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM _EXC_INFO_PARAM) 
+{
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65)
+      // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0xa0000000000000000
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0xa0000000000000000 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_xint
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_xint (UINT64 * pres, UINT64 * px
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_xint (UINT64 x
+		      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		      _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65)
+      // <=> C * 10^(21-q) >= 0xa0000000000000000, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0xa0000000000000000
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0xa0000000000000000 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] >= 0x0a) {
+	  // actually C.w[1] == 0x0a && C.w[0] >= 0x0000000000000000ull) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1 < n < 2^64
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) <= 0) {	// n = +/-0.[0...0]c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 fits in 64 bits
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = C1 * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // C* = floor(C*) (logical right shift; C has p decimal digits,
+      //     correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	  // ten2mk128trunc[ind -1].w[1] is identical to
+	  // ten2mk128[ind -1].w[1]
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}	// else the result is exact
+      }
+
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_rninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_rninta (UINT64 * pres, UINT64 * px
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_rninta (UINT64 x
+			_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			_EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffffb 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 < midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (!x_sign) {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    } else {	// if n < 0
+      res = 0x8000000000000000ull;
+      *pfpsf |= INVALID_EXCEPTION;
+      BID_RETURN (res);
+    }
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
+
+/*****************************************************************************
+ *  BID64_to_uint64_xrninta
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_uint64_xrninta (UINT64 * pres, UINT64 * px
+			 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT64
+bid64_to_uint64_xrninta (UINT64 x
+			 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			 _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+  UINT64 x_sign;
+  UINT64 x_exp;
+  int exp;			// unbiased exponent
+  // Note: C1 represents x_significand (UINT64)
+  UINT64 tmp64;
+  BID_UI64DOUBLE tmp1;
+  unsigned int x_nr_bits;
+  int q, ind, shift;
+  UINT64 C1;
+  UINT128 C;
+  UINT64 Cstar;			// C* represents up to 16 decimal digits ~ 54 bits
+  UINT128 fstar;
+  UINT128 P128;
+
+  // check for NaN or Infinity
+  if ((x & MASK_NAN) == MASK_NAN || (x & MASK_INF) == MASK_INF) {
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  }
+  // unpack x
+  x_sign = x & MASK_SIGN;	// 0 for positive, MASK_SIGN for negative
+  // if steering bits are 11 (condition will be 0), then exponent is G[0:w+1] =>
+  if ((x & MASK_STEERING_BITS) == MASK_STEERING_BITS) {
+    x_exp = (x & MASK_BINARY_EXPONENT2) >> 51;	// biased
+    C1 = (x & MASK_BINARY_SIG2) | MASK_BINARY_OR2;
+    if (C1 > 9999999999999999ull) {	// non-canonical
+      x_exp = 0;
+      C1 = 0;
+    }
+  } else {
+    x_exp = (x & MASK_BINARY_EXPONENT1) >> 53;	// biased
+    C1 = x & MASK_BINARY_SIG1;
+  }
+
+  // check for zeros (possibly from non-canonical values)
+  if (C1 == 0x0ull) {
+    // x is 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  }
+  // x is not special and is not zero
+
+  // q = nr. of decimal digits in x (1 <= q <= 54)
+  //  determine first the nr. of bits in x
+  if (C1 >= 0x0020000000000000ull) {	// x >= 2^53
+    // split the 64-bit value in two 32-bit halves to avoid rounding errors
+    if (C1 >= 0x0000000100000000ull) {	// x >= 2^32
+      tmp1.d = (double) (C1 >> 32);	// exact conversion
+      x_nr_bits =
+	33 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    } else {	// x < 2^32
+      tmp1.d = (double) C1;	// exact conversion
+      x_nr_bits =
+	1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+    }
+  } else {	// if x < 2^53
+    tmp1.d = (double) C1;	// exact conversion
+    x_nr_bits =
+      1 + ((((unsigned int) (tmp1.ui64 >> 52)) & 0x7ff) - 0x3ff);
+  }
+  q = nr_digits[x_nr_bits - 1].digits;
+  if (q == 0) {
+    q = nr_digits[x_nr_bits - 1].digits1;
+    if (C1 >= nr_digits[x_nr_bits - 1].threshold_lo)
+      q++;
+  }
+  exp = x_exp - 398;	// unbiased exponent
+
+  if ((q + exp) > 20) {	// x >= 10^20 ~= 2^66.45... (cannot fit in 64 bits)
+    // set invalid flag
+    *pfpsf |= INVALID_EXCEPTION;
+    // return Integer Indefinite
+    res = 0x8000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 20) {	// x = c(0)c(1)...c(19).c(20)...c(q-1)
+    // in this case 2^63.11... ~= 10^19 <= x < 10^20 ~= 2^66.43...
+    // so x rounded to an integer may or may not fit in an unsigned 64-bit int
+    // the cases that do not fit are identified here; the ones that fit
+    // fall through and will be handled with other cases further,
+    // under '1 <= q + exp <= 20'
+    if (x_sign) {	// if n < 0 and q + exp = 20 then x is much less than -1/2
+      // => set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    } else {	// if n > 0 and q + exp = 20
+      // if n >= 2^64 - 1/2 then n is too large
+      // <=> c(0)c(1)...c(19).c(20)...c(q-1) >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^20 >= 2^64-1/2
+      // <=> 0.c(0)c(1)...c(19)c(20)...c(q-1) * 10^21 >= 5*(2^65-1)
+      // <=> C * 10^(21-q) >= 0x9fffffffffffffffb, 1<=q<=16
+      if (q == 1) {
+	// C * 10^20 >= 0x9fffffffffffffffb
+	__mul_128x64_to_128 (C, C1, ten2k128[0]);	// 10^20 * C
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      } else {	// if (2 <= q <= 16) => 5 <= 21 - q <= 19
+	// Note: C * 10^(21-q) has 20 or 21 digits; 0x9fffffffffffffffb 
+	// has 21 digits
+	__mul_64x64_to_128MACH (C, C1, ten2k64[21 - q]);
+	if (C.w[1] > 0x09 ||
+	    (C.w[1] == 0x09 && C.w[0] >= 0xfffffffffffffffbull)) {
+	  // set invalid flag
+	  *pfpsf |= INVALID_EXCEPTION;
+	  // return Integer Indefinite
+	  res = 0x8000000000000000ull;
+	  BID_RETURN (res);
+	}
+	// else cases that can be rounded to a 64-bit int fall through
+	// to '1 <= q + exp <= 20'
+      }
+    }
+  }
+  // n is not too large to be converted to int64 if -1/2 <= n < 2^64 - 1/2
+  // Note: some of the cases tested for above fall through to this point
+  if ((q + exp) < 0) {	// n = +/-0.0...c(0)c(1)...c(q-1)
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+    // return 0
+    res = 0x0000000000000000ull;
+    BID_RETURN (res);
+  } else if ((q + exp) == 0) {	// n = +/-0.c(0)c(1)...c(q-1)
+    // if 0.c(0)c(1)...c(q-1) < 0.5 <=> c(0)c(1)...c(q-1) < 5 * 10^(q-1)
+    //   res = 0
+    // else if x > 0
+    //   res = +1
+    // else // if x < 0
+    //   invalid exc
+    ind = q - 1;	// 0 <= ind <= 15
+    if (C1 < midpoint64[ind]) {
+      res = 0x0000000000000000ull;	// return 0
+    } else if (!x_sign) {	// n > 0
+      res = 0x0000000000000001ull;	// return +1
+    } else {	// if n < 0
+      res = 0x8000000000000000ull;
+      *pfpsf |= INVALID_EXCEPTION;
+      BID_RETURN (res);
+    }
+    // set inexact flag
+    *pfpsf |= INEXACT_EXCEPTION;
+  } else {	// if (1 <= q + exp <= 20, 1 <= q <= 16, -15 <= exp <= 19)
+    // x <= -1 or 1 <= x < 2^64-1/2 so if positive x can be rounded
+    // to nearest to a 64-bit unsigned signed integer
+    if (x_sign) {	// x <= -1
+      // set invalid flag
+      *pfpsf |= INVALID_EXCEPTION;
+      // return Integer Indefinite
+      res = 0x8000000000000000ull;
+      BID_RETURN (res);
+    }
+    // 1 <= x < 2^64-1/2 so x can be rounded
+    // to nearest to a 64-bit unsigned integer
+    if (exp < 0) {	// 2 <= q <= 16, -15 <= exp <= -1, 1 <= q + exp <= 20
+      ind = -exp;	// 1 <= ind <= 15; ind is a synonym for 'x'
+      // chop off ind digits from the lower part of C1
+      // C1 = C1 + 1/2 * 10^ind where the result C1 fits in 64 bits
+      C1 = C1 + midpoint64[ind - 1];
+      // calculate C* and f*
+      // C* is actually floor(C*) in this case
+      // C* and f* need shifting and masking, as shown by
+      // shiftright128[] and maskhigh128[]
+      // 1 <= x <= 15 
+      // kx = 10^(-x) = ten2mk64[ind - 1]
+      // C* = (C1 + 1/2 * 10^x) * 10^(-x)
+      // the approximation of 10^(-x) was rounded up to 54 bits
+      __mul_64x64_to_128MACH (P128, C1, ten2mk64[ind - 1]);
+      Cstar = P128.w[1];
+      fstar.w[1] = P128.w[1] & maskhigh128[ind - 1];
+      fstar.w[0] = P128.w[0];
+      // the top Ex bits of 10^(-x) are T* = ten2mk128trunc[ind].w[0], e.g.
+      // if x=1, T*=ten2mk128trunc[0].w[0]=0x1999999999999999
+      // if (0 < f* < 10^(-x)) then the result is a midpoint
+      //   if floor(C*) is even then C* = floor(C*) - logical right
+      //       shift; C* has p decimal digits, correct by Prop. 1)
+      //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+      //       shift; C* has p decimal digits, correct by Pr. 1)
+      // else
+      //   C* = floor(C*) (logical right shift; C has p decimal digits,
+      //       correct by Property 1)
+      // n = C* * 10^(e+x)
+
+      // shift right C* by Ex-64 = shiftright128[ind]
+      shift = shiftright128[ind - 1];	// 0 <= shift <= 39
+      Cstar = Cstar >> shift;
+      // determine inexactness of the rounding of C*
+      // if (0 < f* - 1/2 < 10^(-x)) then
+      //   the result is exact
+      // else // if (f* - 1/2 > T*) then
+      //   the result is inexact
+      if (ind - 1 <= 2) {	// fstar.w[1] is 0
+	if (fstar.w[0] > 0x8000000000000000ull) {
+	  // f* > 1/2 and the result may be exact
+	  tmp64 = fstar.w[0] - 0x8000000000000000ull;	// f* - 1/2
+	  if ((tmp64 > ten2mk128trunc[ind - 1].w[1])) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      } else {	// if 3 <= ind - 1 <= 14
+	if (fstar.w[1] > onehalf128[ind - 1] ||
+	    (fstar.w[1] == onehalf128[ind - 1] && fstar.w[0])) {
+	  // f2* > 1/2 and the result may be exact
+	  // Calculate f2* - 1/2
+	  tmp64 = fstar.w[1] - onehalf128[ind - 1];
+	  if (tmp64 || fstar.w[0] > ten2mk128trunc[ind - 1].w[1]) {
+	    // ten2mk128trunc[ind -1].w[1] is identical to
+	    // ten2mk128[ind -1].w[1]
+	    // set the inexact flag
+	    *pfpsf |= INEXACT_EXCEPTION;
+	  }	// else the result is exact
+	} else {	// the result is inexact; f2* <= 1/2
+	  // set the inexact flag
+	  *pfpsf |= INEXACT_EXCEPTION;
+	}
+      }
+
+      // if the result was a midpoint it was rounded away from zero
+      res = Cstar;	// the result is positive
+    } else if (exp == 0) {
+      // 1 <= q <= 10
+      // res = +C (exact)
+      res = C1;	// the result is positive
+    } else {	// if (exp > 0) => 1 <= exp <= 9, 1 <= q < 9, 2 <= q + exp <= 10
+      // res = +C * 10^exp (exact)
+      res = C1 * ten2k64[exp];	// the result is positive
+    }
+  }
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid64_to_uint8.c b/gcc-4.9/libgcc/config/libbid/bid64_to_uint8.c
new file mode 100644
index 000000000..311cce96a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid64_to_uint8.c
@@ -0,0 +1,67 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+#define SIZE_MASK      0xffffff00
+#define INVALID_RESULT 0x80
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_rnint,
+				UINT64, x, bid64_to_uint32_rnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_xrnint,
+				UINT64, x, bid64_to_uint32_xrnint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_rninta,
+				UINT64, x, bid64_to_uint32_rninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_xrninta,
+				UINT64, x, bid64_to_uint32_xrninta,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_int,
+				UINT64, x, bid64_to_uint32_int,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_xint,
+				UINT64, x, bid64_to_uint32_xint,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_floor,
+				UINT64, x, bid64_to_uint32_floor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_ceil,
+				UINT64, x, bid64_to_uint32_ceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_xfloor,
+				UINT64, x, bid64_to_uint32_xfloor,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
+
+BID_TO_SMALL_UINT_CVT_FUNCTION (unsigned char, bid64_to_uint8_xceil,
+				UINT64, x, bid64_to_uint32_xceil,
+				unsigned int, SIZE_MASK, INVALID_RESULT)
diff --git a/gcc-4.9/libgcc/config/libbid/bid_b2d.h b/gcc-4.9/libgcc/config/libbid/bid_b2d.h
new file mode 100644
index 000000000..00cdf0776
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_b2d.h
@@ -0,0 +1,3055 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+const UINT64 d2b[] =
+  { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 80, 81, 800, 801, 880, 881,
+  10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 90, 91, 810, 811, 890, 891,
+  20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 82, 83, 820, 821, 808, 809,
+  30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 92, 93, 830, 831, 818, 819,
+  40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 84, 85, 840, 841, 88, 89,
+  50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 94, 95, 850, 851, 98, 99,
+  60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 86, 87, 860, 861, 888, 889,
+  70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 96, 97, 870, 871, 898, 899,
+  100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 180, 181, 900, 901,
+  980, 981,
+  110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 190, 191, 910, 911,
+  990, 991,
+  120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 182, 183, 920, 921,
+  908, 909,
+  130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 192, 193, 930, 931,
+  918, 919,
+  140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 184, 185, 940, 941,
+  188, 189,
+  150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 194, 195, 950, 951,
+  198, 199,
+  160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 186, 187, 960, 961,
+  988, 989,
+  170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 196, 197, 970, 971,
+  998, 999,
+  200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 280, 281, 802, 803,
+  882, 883,
+  210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 290, 291, 812, 813,
+  892, 893,
+  220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 282, 283, 822, 823,
+  828, 829,
+  230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 292, 293, 832, 833,
+  838, 839,
+  240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 284, 285, 842, 843,
+  288, 289,
+  250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 294, 295, 852, 853,
+  298, 299,
+  260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 286, 287, 862, 863,
+  888, 889,
+  270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 296, 297, 872, 873,
+  898, 899,
+  300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 380, 381, 902, 903,
+  982, 983,
+  310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 390, 391, 912, 913,
+  992, 993,
+  320, 321, 322, 323, 324, 325, 326, 327, 328, 329, 382, 383, 922, 923,
+  928, 929,
+  330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 392, 393, 932, 933,
+  938, 939,
+  340, 341, 342, 343, 344, 345, 346, 347, 348, 349, 384, 385, 942, 943,
+  388, 389,
+  350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 394, 395, 952, 953,
+  398, 399,
+  360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 386, 387, 962, 963,
+  988, 989,
+  370, 371, 372, 373, 374, 375, 376, 377, 378, 379, 396, 397, 972, 973,
+  998, 999,
+  400, 401, 402, 403, 404, 405, 406, 407, 408, 409, 480, 481, 804, 805,
+  884, 885,
+  410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 490, 491, 814, 815,
+  894, 895,
+  420, 421, 422, 423, 424, 425, 426, 427, 428, 429, 482, 483, 824, 825,
+  848, 849,
+  430, 431, 432, 433, 434, 435, 436, 437, 438, 439, 492, 493, 834, 835,
+  858, 859,
+  440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 484, 485, 844, 845,
+  488, 489,
+  450, 451, 452, 453, 454, 455, 456, 457, 458, 459, 494, 495, 854, 855,
+  498, 499,
+  460, 461, 462, 463, 464, 465, 466, 467, 468, 469, 486, 487, 864, 865,
+  888, 889,
+  470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 496, 497, 874, 875,
+  898, 899,
+  500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 580, 581, 904, 905,
+  984, 985,
+  510, 511, 512, 513, 514, 515, 516, 517, 518, 519, 590, 591, 914, 915,
+  994, 995,
+  520, 521, 522, 523, 524, 525, 526, 527, 528, 529, 582, 583, 924, 925,
+  948, 949,
+  530, 531, 532, 533, 534, 535, 536, 537, 538, 539, 592, 593, 934, 935,
+  958, 959,
+  540, 541, 542, 543, 544, 545, 546, 547, 548, 549, 584, 585, 944, 945,
+  588, 589,
+  550, 551, 552, 553, 554, 555, 556, 557, 558, 559, 594, 595, 954, 955,
+  598, 599,
+  560, 561, 562, 563, 564, 565, 566, 567, 568, 569, 586, 587, 964, 965,
+  988, 989,
+  570, 571, 572, 573, 574, 575, 576, 577, 578, 579, 596, 597, 974, 975,
+  998, 999,
+  600, 601, 602, 603, 604, 605, 606, 607, 608, 609, 680, 681, 806, 807,
+  886, 887,
+  610, 611, 612, 613, 614, 615, 616, 617, 618, 619, 690, 691, 816, 817,
+  896, 897,
+  620, 621, 622, 623, 624, 625, 626, 627, 628, 629, 682, 683, 826, 827,
+  868, 869,
+  630, 631, 632, 633, 634, 635, 636, 637, 638, 639, 692, 693, 836, 837,
+  878, 879,
+  640, 641, 642, 643, 644, 645, 646, 647, 648, 649, 684, 685, 846, 847,
+  688, 689,
+  650, 651, 652, 653, 654, 655, 656, 657, 658, 659, 694, 695, 856, 857,
+  698, 699,
+  660, 661, 662, 663, 664, 665, 666, 667, 668, 669, 686, 687, 866, 867,
+  888, 889,
+  670, 671, 672, 673, 674, 675, 676, 677, 678, 679, 696, 697, 876, 877,
+  898, 899,
+  700, 701, 702, 703, 704, 705, 706, 707, 708, 709, 780, 781, 906, 907,
+  986, 987,
+  710, 711, 712, 713, 714, 715, 716, 717, 718, 719, 790, 791, 916, 917,
+  996, 997,
+  720, 721, 722, 723, 724, 725, 726, 727, 728, 729, 782, 783, 926, 927,
+  968, 969,
+  730, 731, 732, 733, 734, 735, 736, 737, 738, 739, 792, 793, 936, 937,
+  978, 979,
+  740, 741, 742, 743, 744, 745, 746, 747, 748, 749, 784, 785, 946, 947,
+  788, 789,
+  750, 751, 752, 753, 754, 755, 756, 757, 758, 759, 794, 795, 956, 957,
+  798, 799,
+  760, 761, 762, 763, 764, 765, 766, 767, 768, 769, 786, 787, 966, 967,
+  988, 989,
+  770, 771, 772, 773, 774, 775, 776, 777, 778, 779, 796, 797, 976, 977,
+  998, 999
+};
+
+const UINT64 d2b2[] =
+  { 0000ull, 1000ull, 2000ull, 3000ull, 4000ull, 5000ull, 6000ull,
+  7000ull, 8000ull, 9000ull, 80000ull, 81000ull, 800000ull, 801000ull,
+    880000ull,
+  881000ull,
+  10000ull, 11000ull, 12000ull, 13000ull, 14000ull, 15000ull, 16000ull,
+  17000ull, 18000ull, 19000ull, 90000ull, 91000ull, 810000ull,
+  811000ull, 890000ull, 891000ull,
+  20000ull, 21000ull, 22000ull, 23000ull, 24000ull, 25000ull, 26000ull,
+  27000ull, 28000ull, 29000ull, 82000ull, 83000ull, 820000ull,
+  821000ull, 808000ull, 809000ull,
+  30000ull, 31000ull, 32000ull, 33000ull, 34000ull, 35000ull, 36000ull,
+  37000ull, 38000ull, 39000ull, 92000ull, 93000ull, 830000ull,
+  831000ull, 818000ull, 819000ull,
+  40000ull, 41000ull, 42000ull, 43000ull, 44000ull, 45000ull, 46000ull,
+  47000ull, 48000ull, 49000ull, 84000ull, 85000ull, 840000ull,
+  841000ull, 88000ull, 89000ull,
+  50000ull, 51000ull, 52000ull, 53000ull, 54000ull, 55000ull, 56000ull,
+  57000ull, 58000ull, 59000ull, 94000ull, 95000ull, 850000ull,
+  851000ull, 98000ull, 99000ull,
+  60000ull, 61000ull, 62000ull, 63000ull, 64000ull, 65000ull, 66000ull,
+  67000ull, 68000ull, 69000ull, 86000ull, 87000ull, 860000ull,
+  861000ull, 888000ull, 889000ull,
+  70000ull, 71000ull, 72000ull, 73000ull, 74000ull, 75000ull, 76000ull,
+  77000ull, 78000ull, 79000ull, 96000ull, 97000ull, 870000ull,
+  871000ull, 898000ull, 899000ull,
+  100000ull, 101000ull, 102000ull, 103000ull, 104000ull, 105000ull,
+  106000ull, 107000ull, 108000ull, 109000ull, 180000ull, 181000ull,
+  900000ull, 901000ull, 980000ull, 981000ull,
+  110000ull, 111000ull, 112000ull, 113000ull, 114000ull, 115000ull,
+  116000ull, 117000ull, 118000ull, 119000ull, 190000ull, 191000ull,
+  910000ull, 911000ull, 990000ull, 991000ull,
+  120000ull, 121000ull, 122000ull, 123000ull, 124000ull, 125000ull,
+  126000ull, 127000ull, 128000ull, 129000ull, 182000ull, 183000ull,
+  920000ull, 921000ull, 908000ull, 909000ull,
+  130000ull, 131000ull, 132000ull, 133000ull, 134000ull, 135000ull,
+  136000ull, 137000ull, 138000ull, 139000ull, 192000ull, 193000ull,
+  930000ull, 931000ull, 918000ull, 919000ull,
+  140000ull, 141000ull, 142000ull, 143000ull, 144000ull, 145000ull,
+  146000ull, 147000ull, 148000ull, 149000ull, 184000ull, 185000ull,
+  940000ull, 941000ull, 188000ull, 189000ull,
+  150000ull, 151000ull, 152000ull, 153000ull, 154000ull, 155000ull,
+  156000ull, 157000ull, 158000ull, 159000ull, 194000ull, 195000ull,
+  950000ull, 951000ull, 198000ull, 199000ull,
+  160000ull, 161000ull, 162000ull, 163000ull, 164000ull, 165000ull,
+  166000ull, 167000ull, 168000ull, 169000ull, 186000ull, 187000ull,
+  960000ull, 961000ull, 988000ull, 989000ull,
+  170000ull, 171000ull, 172000ull, 173000ull, 174000ull, 175000ull,
+  176000ull, 177000ull, 178000ull, 179000ull, 196000ull, 197000ull,
+  970000ull, 971000ull, 998000ull, 999000ull,
+  200000ull, 201000ull, 202000ull, 203000ull, 204000ull, 205000ull,
+  206000ull, 207000ull, 208000ull, 209000ull, 280000ull, 281000ull,
+  802000ull, 803000ull, 882000ull, 883000ull,
+  210000ull, 211000ull, 212000ull, 213000ull, 214000ull, 215000ull,
+  216000ull, 217000ull, 218000ull, 219000ull, 290000ull, 291000ull,
+  812000ull, 813000ull, 892000ull, 893000ull,
+  220000ull, 221000ull, 222000ull, 223000ull, 224000ull, 225000ull,
+  226000ull, 227000ull, 228000ull, 229000ull, 282000ull, 283000ull,
+  822000ull, 823000ull, 828000ull, 829000ull,
+  230000ull, 231000ull, 232000ull, 233000ull, 234000ull, 235000ull,
+  236000ull, 237000ull, 238000ull, 239000ull, 292000ull, 293000ull,
+  832000ull, 833000ull, 838000ull, 839000ull,
+  240000ull, 241000ull, 242000ull, 243000ull, 244000ull, 245000ull,
+  246000ull, 247000ull, 248000ull, 249000ull, 284000ull, 285000ull,
+  842000ull, 843000ull, 288000ull, 289000ull,
+  250000ull, 251000ull, 252000ull, 253000ull, 254000ull, 255000ull,
+  256000ull, 257000ull, 258000ull, 259000ull, 294000ull, 295000ull,
+  852000ull, 853000ull, 298000ull, 299000ull,
+  260000ull, 261000ull, 262000ull, 263000ull, 264000ull, 265000ull,
+  266000ull, 267000ull, 268000ull, 269000ull, 286000ull, 287000ull,
+  862000ull, 863000ull, 888000ull, 889000ull,
+  270000ull, 271000ull, 272000ull, 273000ull, 274000ull, 275000ull,
+  276000ull, 277000ull, 278000ull, 279000ull, 296000ull, 297000ull,
+  872000ull, 873000ull, 898000ull, 899000ull,
+  300000ull, 301000ull, 302000ull, 303000ull, 304000ull, 305000ull,
+  306000ull, 307000ull, 308000ull, 309000ull, 380000ull, 381000ull,
+  902000ull, 903000ull, 982000ull, 983000ull,
+  310000ull, 311000ull, 312000ull, 313000ull, 314000ull, 315000ull,
+  316000ull, 317000ull, 318000ull, 319000ull, 390000ull, 391000ull,
+  912000ull, 913000ull, 992000ull, 993000ull,
+  320000ull, 321000ull, 322000ull, 323000ull, 324000ull, 325000ull,
+  326000ull, 327000ull, 328000ull, 329000ull, 382000ull, 383000ull,
+  922000ull, 923000ull, 928000ull, 929000ull,
+  330000ull, 331000ull, 332000ull, 333000ull, 334000ull, 335000ull,
+  336000ull, 337000ull, 338000ull, 339000ull, 392000ull, 393000ull,
+  932000ull, 933000ull, 938000ull, 939000ull,
+  340000ull, 341000ull, 342000ull, 343000ull, 344000ull, 345000ull,
+  346000ull, 347000ull, 348000ull, 349000ull, 384000ull, 385000ull,
+  942000ull, 943000ull, 388000ull, 389000ull,
+  350000ull, 351000ull, 352000ull, 353000ull, 354000ull, 355000ull,
+  356000ull, 357000ull, 358000ull, 359000ull, 394000ull, 395000ull,
+  952000ull, 953000ull, 398000ull, 399000ull,
+  360000ull, 361000ull, 362000ull, 363000ull, 364000ull, 365000ull,
+  366000ull, 367000ull, 368000ull, 369000ull, 386000ull, 387000ull,
+  962000ull, 963000ull, 988000ull, 989000ull,
+  370000ull, 371000ull, 372000ull, 373000ull, 374000ull, 375000ull,
+  376000ull, 377000ull, 378000ull, 379000ull, 396000ull, 397000ull,
+  972000ull, 973000ull, 998000ull, 999000ull,
+  400000ull, 401000ull, 402000ull, 403000ull, 404000ull, 405000ull,
+  406000ull, 407000ull, 408000ull, 409000ull, 480000ull, 481000ull,
+  804000ull, 805000ull, 884000ull, 885000ull,
+  410000ull, 411000ull, 412000ull, 413000ull, 414000ull, 415000ull,
+  416000ull, 417000ull, 418000ull, 419000ull, 490000ull, 491000ull,
+  814000ull, 815000ull, 894000ull, 895000ull,
+  420000ull, 421000ull, 422000ull, 423000ull, 424000ull, 425000ull,
+  426000ull, 427000ull, 428000ull, 429000ull, 482000ull, 483000ull,
+  824000ull, 825000ull, 848000ull, 849000ull,
+  430000ull, 431000ull, 432000ull, 433000ull, 434000ull, 435000ull,
+  436000ull, 437000ull, 438000ull, 439000ull, 492000ull, 493000ull,
+  834000ull, 835000ull, 858000ull, 859000ull,
+  440000ull, 441000ull, 442000ull, 443000ull, 444000ull, 445000ull,
+  446000ull, 447000ull, 448000ull, 449000ull, 484000ull, 485000ull,
+  844000ull, 845000ull, 488000ull, 489000ull,
+  450000ull, 451000ull, 452000ull, 453000ull, 454000ull, 455000ull,
+  456000ull, 457000ull, 458000ull, 459000ull, 494000ull, 495000ull,
+  854000ull, 855000ull, 498000ull, 499000ull,
+  460000ull, 461000ull, 462000ull, 463000ull, 464000ull, 465000ull,
+  466000ull, 467000ull, 468000ull, 469000ull, 486000ull, 487000ull,
+  864000ull, 865000ull, 888000ull, 889000ull,
+  470000ull, 471000ull, 472000ull, 473000ull, 474000ull, 475000ull,
+  476000ull, 477000ull, 478000ull, 479000ull, 496000ull, 497000ull,
+  874000ull, 875000ull, 898000ull, 899000ull,
+  500000ull, 501000ull, 502000ull, 503000ull, 504000ull, 505000ull,
+  506000ull, 507000ull, 508000ull, 509000ull, 580000ull, 581000ull,
+  904000ull, 905000ull, 984000ull, 985000ull,
+  510000ull, 511000ull, 512000ull, 513000ull, 514000ull, 515000ull,
+  516000ull, 517000ull, 518000ull, 519000ull, 590000ull, 591000ull,
+  914000ull, 915000ull, 994000ull, 995000ull,
+  520000ull, 521000ull, 522000ull, 523000ull, 524000ull, 525000ull,
+  526000ull, 527000ull, 528000ull, 529000ull, 582000ull, 583000ull,
+  924000ull, 925000ull, 948000ull, 949000ull,
+  530000ull, 531000ull, 532000ull, 533000ull, 534000ull, 535000ull,
+  536000ull, 537000ull, 538000ull, 539000ull, 592000ull, 593000ull,
+  934000ull, 935000ull, 958000ull, 959000ull,
+  540000ull, 541000ull, 542000ull, 543000ull, 544000ull, 545000ull,
+  546000ull, 547000ull, 548000ull, 549000ull, 584000ull, 585000ull,
+  944000ull, 945000ull, 588000ull, 589000ull,
+  550000ull, 551000ull, 552000ull, 553000ull, 554000ull, 555000ull,
+  556000ull, 557000ull, 558000ull, 559000ull, 594000ull, 595000ull,
+  954000ull, 955000ull, 598000ull, 599000ull,
+  560000ull, 561000ull, 562000ull, 563000ull, 564000ull, 565000ull,
+  566000ull, 567000ull, 568000ull, 569000ull, 586000ull, 587000ull,
+  964000ull, 965000ull, 988000ull, 989000ull,
+  570000ull, 571000ull, 572000ull, 573000ull, 574000ull, 575000ull,
+  576000ull, 577000ull, 578000ull, 579000ull, 596000ull, 597000ull,
+  974000ull, 975000ull, 998000ull, 999000ull,
+  600000ull, 601000ull, 602000ull, 603000ull, 604000ull, 605000ull,
+  606000ull, 607000ull, 608000ull, 609000ull, 680000ull, 681000ull,
+  806000ull, 807000ull, 886000ull, 887000ull,
+  610000ull, 611000ull, 612000ull, 613000ull, 614000ull, 615000ull,
+  616000ull, 617000ull, 618000ull, 619000ull, 690000ull, 691000ull,
+  816000ull, 817000ull, 896000ull, 897000ull,
+  620000ull, 621000ull, 622000ull, 623000ull, 624000ull, 625000ull,
+  626000ull, 627000ull, 628000ull, 629000ull, 682000ull, 683000ull,
+  826000ull, 827000ull, 868000ull, 869000ull,
+  630000ull, 631000ull, 632000ull, 633000ull, 634000ull, 635000ull,
+  636000ull, 637000ull, 638000ull, 639000ull, 692000ull, 693000ull,
+  836000ull, 837000ull, 878000ull, 879000ull,
+  640000ull, 641000ull, 642000ull, 643000ull, 644000ull, 645000ull,
+  646000ull, 647000ull, 648000ull, 649000ull, 684000ull, 685000ull,
+  846000ull, 847000ull, 688000ull, 689000ull,
+  650000ull, 651000ull, 652000ull, 653000ull, 654000ull, 655000ull,
+  656000ull, 657000ull, 658000ull, 659000ull, 694000ull, 695000ull,
+  856000ull, 857000ull, 698000ull, 699000ull,
+  660000ull, 661000ull, 662000ull, 663000ull, 664000ull, 665000ull,
+  666000ull, 667000ull, 668000ull, 669000ull, 686000ull, 687000ull,
+  866000ull, 867000ull, 888000ull, 889000ull,
+  670000ull, 671000ull, 672000ull, 673000ull, 674000ull, 675000ull,
+  676000ull, 677000ull, 678000ull, 679000ull, 696000ull, 697000ull,
+  876000ull, 877000ull, 898000ull, 899000ull,
+  700000ull, 701000ull, 702000ull, 703000ull, 704000ull, 705000ull,
+  706000ull, 707000ull, 708000ull, 709000ull, 780000ull, 781000ull,
+  906000ull, 907000ull, 986000ull, 987000ull,
+  710000ull, 711000ull, 712000ull, 713000ull, 714000ull, 715000ull,
+  716000ull, 717000ull, 718000ull, 719000ull, 790000ull, 791000ull,
+  916000ull, 917000ull, 996000ull, 997000ull,
+  720000ull, 721000ull, 722000ull, 723000ull, 724000ull, 725000ull,
+  726000ull, 727000ull, 728000ull, 729000ull, 782000ull, 783000ull,
+  926000ull, 927000ull, 968000ull, 969000ull,
+  730000ull, 731000ull, 732000ull, 733000ull, 734000ull, 735000ull,
+  736000ull, 737000ull, 738000ull, 739000ull, 792000ull, 793000ull,
+  936000ull, 937000ull, 978000ull, 979000ull,
+  740000ull, 741000ull, 742000ull, 743000ull, 744000ull, 745000ull,
+  746000ull, 747000ull, 748000ull, 749000ull, 784000ull, 785000ull,
+  946000ull, 947000ull, 788000ull, 789000ull,
+  750000ull, 751000ull, 752000ull, 753000ull, 754000ull, 755000ull,
+  756000ull, 757000ull, 758000ull, 759000ull, 794000ull, 795000ull,
+  956000ull, 957000ull, 798000ull, 799000ull,
+  760000ull, 761000ull, 762000ull, 763000ull, 764000ull, 765000ull,
+  766000ull, 767000ull, 768000ull, 769000ull, 786000ull, 787000ull,
+  966000ull, 967000ull, 988000ull, 989000ull,
+  770000ull, 771000ull, 772000ull, 773000ull, 774000ull, 775000ull,
+  776000ull, 777000ull, 778000ull, 779000ull, 796000ull, 797000ull,
+  976000ull, 977000ull, 998000ull, 999000ull
+};
+
+const UINT64 d2b3[] =
+  { 0000000ull, 1000000ull, 2000000ull, 3000000ull, 4000000ull,
+  5000000ull, 6000000ull, 7000000ull, 8000000ull, 9000000ull,
+    80000000ull,
+  81000000ull, 800000000ull, 801000000ull, 880000000ull, 881000000ull,
+  10000000ull, 11000000ull, 12000000ull, 13000000ull, 14000000ull,
+  15000000ull, 16000000ull, 17000000ull, 18000000ull, 19000000ull,
+  90000000ull, 91000000ull, 810000000ull, 811000000ull, 890000000ull,
+  891000000ull,
+  20000000ull, 21000000ull, 22000000ull, 23000000ull, 24000000ull,
+  25000000ull, 26000000ull, 27000000ull, 28000000ull, 29000000ull,
+  82000000ull, 83000000ull, 820000000ull, 821000000ull, 808000000ull,
+  809000000ull,
+  30000000ull, 31000000ull, 32000000ull, 33000000ull, 34000000ull,
+  35000000ull, 36000000ull, 37000000ull, 38000000ull, 39000000ull,
+  92000000ull, 93000000ull, 830000000ull, 831000000ull, 818000000ull,
+  819000000ull,
+  40000000ull, 41000000ull, 42000000ull, 43000000ull, 44000000ull,
+  45000000ull, 46000000ull, 47000000ull, 48000000ull, 49000000ull,
+  84000000ull, 85000000ull, 840000000ull, 841000000ull, 88000000ull,
+  89000000ull,
+  50000000ull, 51000000ull, 52000000ull, 53000000ull, 54000000ull,
+  55000000ull, 56000000ull, 57000000ull, 58000000ull, 59000000ull,
+  94000000ull, 95000000ull, 850000000ull, 851000000ull, 98000000ull,
+  99000000ull,
+  60000000ull, 61000000ull, 62000000ull, 63000000ull, 64000000ull,
+  65000000ull, 66000000ull, 67000000ull, 68000000ull, 69000000ull,
+  86000000ull, 87000000ull, 860000000ull, 861000000ull, 888000000ull,
+  889000000ull,
+  70000000ull, 71000000ull, 72000000ull, 73000000ull, 74000000ull,
+  75000000ull, 76000000ull, 77000000ull, 78000000ull, 79000000ull,
+  96000000ull, 97000000ull, 870000000ull, 871000000ull, 898000000ull,
+  899000000ull,
+  100000000ull, 101000000ull, 102000000ull, 103000000ull, 104000000ull,
+  105000000ull, 106000000ull, 107000000ull, 108000000ull,
+  109000000ull, 180000000ull, 181000000ull, 900000000ull,
+  901000000ull, 980000000ull, 981000000ull,
+  110000000ull, 111000000ull, 112000000ull, 113000000ull, 114000000ull,
+  115000000ull, 116000000ull, 117000000ull, 118000000ull,
+  119000000ull, 190000000ull, 191000000ull, 910000000ull,
+  911000000ull, 990000000ull, 991000000ull,
+  120000000ull, 121000000ull, 122000000ull, 123000000ull, 124000000ull,
+  125000000ull, 126000000ull, 127000000ull, 128000000ull,
+  129000000ull, 182000000ull, 183000000ull, 920000000ull,
+  921000000ull, 908000000ull, 909000000ull,
+  130000000ull, 131000000ull, 132000000ull, 133000000ull, 134000000ull,
+  135000000ull, 136000000ull, 137000000ull, 138000000ull,
+  139000000ull, 192000000ull, 193000000ull, 930000000ull,
+  931000000ull, 918000000ull, 919000000ull,
+  140000000ull, 141000000ull, 142000000ull, 143000000ull, 144000000ull,
+  145000000ull, 146000000ull, 147000000ull, 148000000ull,
+  149000000ull, 184000000ull, 185000000ull, 940000000ull,
+  941000000ull, 188000000ull, 189000000ull,
+  150000000ull, 151000000ull, 152000000ull, 153000000ull, 154000000ull,
+  155000000ull, 156000000ull, 157000000ull, 158000000ull,
+  159000000ull, 194000000ull, 195000000ull, 950000000ull,
+  951000000ull, 198000000ull, 199000000ull,
+  160000000ull, 161000000ull, 162000000ull, 163000000ull, 164000000ull,
+  165000000ull, 166000000ull, 167000000ull, 168000000ull,
+  169000000ull, 186000000ull, 187000000ull, 960000000ull,
+  961000000ull, 988000000ull, 989000000ull,
+  170000000ull, 171000000ull, 172000000ull, 173000000ull, 174000000ull,
+  175000000ull, 176000000ull, 177000000ull, 178000000ull,
+  179000000ull, 196000000ull, 197000000ull, 970000000ull,
+  971000000ull, 998000000ull, 999000000ull,
+  200000000ull, 201000000ull, 202000000ull, 203000000ull, 204000000ull,
+  205000000ull, 206000000ull, 207000000ull, 208000000ull,
+  209000000ull, 280000000ull, 281000000ull, 802000000ull,
+  803000000ull, 882000000ull, 883000000ull,
+  210000000ull, 211000000ull, 212000000ull, 213000000ull, 214000000ull,
+  215000000ull, 216000000ull, 217000000ull, 218000000ull,
+  219000000ull, 290000000ull, 291000000ull, 812000000ull,
+  813000000ull, 892000000ull, 893000000ull,
+  220000000ull, 221000000ull, 222000000ull, 223000000ull, 224000000ull,
+  225000000ull, 226000000ull, 227000000ull, 228000000ull,
+  229000000ull, 282000000ull, 283000000ull, 822000000ull,
+  823000000ull, 828000000ull, 829000000ull,
+  230000000ull, 231000000ull, 232000000ull, 233000000ull, 234000000ull,
+  235000000ull, 236000000ull, 237000000ull, 238000000ull,
+  239000000ull, 292000000ull, 293000000ull, 832000000ull,
+  833000000ull, 838000000ull, 839000000ull,
+  240000000ull, 241000000ull, 242000000ull, 243000000ull, 244000000ull,
+  245000000ull, 246000000ull, 247000000ull, 248000000ull,
+  249000000ull, 284000000ull, 285000000ull, 842000000ull,
+  843000000ull, 288000000ull, 289000000ull,
+  250000000ull, 251000000ull, 252000000ull, 253000000ull, 254000000ull,
+  255000000ull, 256000000ull, 257000000ull, 258000000ull,
+  259000000ull, 294000000ull, 295000000ull, 852000000ull,
+  853000000ull, 298000000ull, 299000000ull,
+  260000000ull, 261000000ull, 262000000ull, 263000000ull, 264000000ull,
+  265000000ull, 266000000ull, 267000000ull, 268000000ull,
+  269000000ull, 286000000ull, 287000000ull, 862000000ull,
+  863000000ull, 888000000ull, 889000000ull,
+  270000000ull, 271000000ull, 272000000ull, 273000000ull, 274000000ull,
+  275000000ull, 276000000ull, 277000000ull, 278000000ull,
+  279000000ull, 296000000ull, 297000000ull, 872000000ull,
+  873000000ull, 898000000ull, 899000000ull,
+  300000000ull, 301000000ull, 302000000ull, 303000000ull, 304000000ull,
+  305000000ull, 306000000ull, 307000000ull, 308000000ull,
+  309000000ull, 380000000ull, 381000000ull, 902000000ull,
+  903000000ull, 982000000ull, 983000000ull,
+  310000000ull, 311000000ull, 312000000ull, 313000000ull, 314000000ull,
+  315000000ull, 316000000ull, 317000000ull, 318000000ull,
+  319000000ull, 390000000ull, 391000000ull, 912000000ull,
+  913000000ull, 992000000ull, 993000000ull,
+  320000000ull, 321000000ull, 322000000ull, 323000000ull, 324000000ull,
+  325000000ull, 326000000ull, 327000000ull, 328000000ull,
+  329000000ull, 382000000ull, 383000000ull, 922000000ull,
+  923000000ull, 928000000ull, 929000000ull,
+  330000000ull, 331000000ull, 332000000ull, 333000000ull, 334000000ull,
+  335000000ull, 336000000ull, 337000000ull, 338000000ull,
+  339000000ull, 392000000ull, 393000000ull, 932000000ull,
+  933000000ull, 938000000ull, 939000000ull,
+  340000000ull, 341000000ull, 342000000ull, 343000000ull, 344000000ull,
+  345000000ull, 346000000ull, 347000000ull, 348000000ull,
+  349000000ull, 384000000ull, 385000000ull, 942000000ull,
+  943000000ull, 388000000ull, 389000000ull,
+  350000000ull, 351000000ull, 352000000ull, 353000000ull, 354000000ull,
+  355000000ull, 356000000ull, 357000000ull, 358000000ull,
+  359000000ull, 394000000ull, 395000000ull, 952000000ull,
+  953000000ull, 398000000ull, 399000000ull,
+  360000000ull, 361000000ull, 362000000ull, 363000000ull, 364000000ull,
+  365000000ull, 366000000ull, 367000000ull, 368000000ull,
+  369000000ull, 386000000ull, 387000000ull, 962000000ull,
+  963000000ull, 988000000ull, 989000000ull,
+  370000000ull, 371000000ull, 372000000ull, 373000000ull, 374000000ull,
+  375000000ull, 376000000ull, 377000000ull, 378000000ull,
+  379000000ull, 396000000ull, 397000000ull, 972000000ull,
+  973000000ull, 998000000ull, 999000000ull,
+  400000000ull, 401000000ull, 402000000ull, 403000000ull, 404000000ull,
+  405000000ull, 406000000ull, 407000000ull, 408000000ull,
+  409000000ull, 480000000ull, 481000000ull, 804000000ull,
+  805000000ull, 884000000ull, 885000000ull,
+  410000000ull, 411000000ull, 412000000ull, 413000000ull, 414000000ull,
+  415000000ull, 416000000ull, 417000000ull, 418000000ull,
+  419000000ull, 490000000ull, 491000000ull, 814000000ull,
+  815000000ull, 894000000ull, 895000000ull,
+  420000000ull, 421000000ull, 422000000ull, 423000000ull, 424000000ull,
+  425000000ull, 426000000ull, 427000000ull, 428000000ull,
+  429000000ull, 482000000ull, 483000000ull, 824000000ull,
+  825000000ull, 848000000ull, 849000000ull,
+  430000000ull, 431000000ull, 432000000ull, 433000000ull, 434000000ull,
+  435000000ull, 436000000ull, 437000000ull, 438000000ull,
+  439000000ull, 492000000ull, 493000000ull, 834000000ull,
+  835000000ull, 858000000ull, 859000000ull,
+  440000000ull, 441000000ull, 442000000ull, 443000000ull, 444000000ull,
+  445000000ull, 446000000ull, 447000000ull, 448000000ull,
+  449000000ull, 484000000ull, 485000000ull, 844000000ull,
+  845000000ull, 488000000ull, 489000000ull,
+  450000000ull, 451000000ull, 452000000ull, 453000000ull, 454000000ull,
+  455000000ull, 456000000ull, 457000000ull, 458000000ull,
+  459000000ull, 494000000ull, 495000000ull, 854000000ull,
+  855000000ull, 498000000ull, 499000000ull,
+  460000000ull, 461000000ull, 462000000ull, 463000000ull, 464000000ull,
+  465000000ull, 466000000ull, 467000000ull, 468000000ull,
+  469000000ull, 486000000ull, 487000000ull, 864000000ull,
+  865000000ull, 888000000ull, 889000000ull,
+  470000000ull, 471000000ull, 472000000ull, 473000000ull, 474000000ull,
+  475000000ull, 476000000ull, 477000000ull, 478000000ull,
+  479000000ull, 496000000ull, 497000000ull, 874000000ull,
+  875000000ull, 898000000ull, 899000000ull,
+  500000000ull, 501000000ull, 502000000ull, 503000000ull, 504000000ull,
+  505000000ull, 506000000ull, 507000000ull, 508000000ull,
+  509000000ull, 580000000ull, 581000000ull, 904000000ull,
+  905000000ull, 984000000ull, 985000000ull,
+  510000000ull, 511000000ull, 512000000ull, 513000000ull, 514000000ull,
+  515000000ull, 516000000ull, 517000000ull, 518000000ull,
+  519000000ull, 590000000ull, 591000000ull, 914000000ull,
+  915000000ull, 994000000ull, 995000000ull,
+  520000000ull, 521000000ull, 522000000ull, 523000000ull, 524000000ull,
+  525000000ull, 526000000ull, 527000000ull, 528000000ull,
+  529000000ull, 582000000ull, 583000000ull, 924000000ull,
+  925000000ull, 948000000ull, 949000000ull,
+  530000000ull, 531000000ull, 532000000ull, 533000000ull, 534000000ull,
+  535000000ull, 536000000ull, 537000000ull, 538000000ull,
+  539000000ull, 592000000ull, 593000000ull, 934000000ull,
+  935000000ull, 958000000ull, 959000000ull,
+  540000000ull, 541000000ull, 542000000ull, 543000000ull, 544000000ull,
+  545000000ull, 546000000ull, 547000000ull, 548000000ull,
+  549000000ull, 584000000ull, 585000000ull, 944000000ull,
+  945000000ull, 588000000ull, 589000000ull,
+  550000000ull, 551000000ull, 552000000ull, 553000000ull, 554000000ull,
+  555000000ull, 556000000ull, 557000000ull, 558000000ull,
+  559000000ull, 594000000ull, 595000000ull, 954000000ull,
+  955000000ull, 598000000ull, 599000000ull,
+  560000000ull, 561000000ull, 562000000ull, 563000000ull, 564000000ull,
+  565000000ull, 566000000ull, 567000000ull, 568000000ull,
+  569000000ull, 586000000ull, 587000000ull, 964000000ull,
+  965000000ull, 988000000ull, 989000000ull,
+  570000000ull, 571000000ull, 572000000ull, 573000000ull, 574000000ull,
+  575000000ull, 576000000ull, 577000000ull, 578000000ull,
+  579000000ull, 596000000ull, 597000000ull, 974000000ull,
+  975000000ull, 998000000ull, 999000000ull,
+  600000000ull, 601000000ull, 602000000ull, 603000000ull, 604000000ull,
+  605000000ull, 606000000ull, 607000000ull, 608000000ull,
+  609000000ull, 680000000ull, 681000000ull, 806000000ull,
+  807000000ull, 886000000ull, 887000000ull,
+  610000000ull, 611000000ull, 612000000ull, 613000000ull, 614000000ull,
+  615000000ull, 616000000ull, 617000000ull, 618000000ull,
+  619000000ull, 690000000ull, 691000000ull, 816000000ull,
+  817000000ull, 896000000ull, 897000000ull,
+  620000000ull, 621000000ull, 622000000ull, 623000000ull, 624000000ull,
+  625000000ull, 626000000ull, 627000000ull, 628000000ull,
+  629000000ull, 682000000ull, 683000000ull, 826000000ull,
+  827000000ull, 868000000ull, 869000000ull,
+  630000000ull, 631000000ull, 632000000ull, 633000000ull, 634000000ull,
+  635000000ull, 636000000ull, 637000000ull, 638000000ull,
+  639000000ull, 692000000ull, 693000000ull, 836000000ull,
+  837000000ull, 878000000ull, 879000000ull,
+  640000000ull, 641000000ull, 642000000ull, 643000000ull, 644000000ull,
+  645000000ull, 646000000ull, 647000000ull, 648000000ull,
+  649000000ull, 684000000ull, 685000000ull, 846000000ull,
+  847000000ull, 688000000ull, 689000000ull,
+  650000000ull, 651000000ull, 652000000ull, 653000000ull, 654000000ull,
+  655000000ull, 656000000ull, 657000000ull, 658000000ull,
+  659000000ull, 694000000ull, 695000000ull, 856000000ull,
+  857000000ull, 698000000ull, 699000000ull,
+  660000000ull, 661000000ull, 662000000ull, 663000000ull, 664000000ull,
+  665000000ull, 666000000ull, 667000000ull, 668000000ull,
+  669000000ull, 686000000ull, 687000000ull, 866000000ull,
+  867000000ull, 888000000ull, 889000000ull,
+  670000000ull, 671000000ull, 672000000ull, 673000000ull, 674000000ull,
+  675000000ull, 676000000ull, 677000000ull, 678000000ull,
+  679000000ull, 696000000ull, 697000000ull, 876000000ull,
+  877000000ull, 898000000ull, 899000000ull,
+  700000000ull, 701000000ull, 702000000ull, 703000000ull, 704000000ull,
+  705000000ull, 706000000ull, 707000000ull, 708000000ull,
+  709000000ull, 780000000ull, 781000000ull, 906000000ull,
+  907000000ull, 986000000ull, 987000000ull,
+  710000000ull, 711000000ull, 712000000ull, 713000000ull, 714000000ull,
+  715000000ull, 716000000ull, 717000000ull, 718000000ull,
+  719000000ull, 790000000ull, 791000000ull, 916000000ull,
+  917000000ull, 996000000ull, 997000000ull,
+  720000000ull, 721000000ull, 722000000ull, 723000000ull, 724000000ull,
+  725000000ull, 726000000ull, 727000000ull, 728000000ull,
+  729000000ull, 782000000ull, 783000000ull, 926000000ull,
+  927000000ull, 968000000ull, 969000000ull,
+  730000000ull, 731000000ull, 732000000ull, 733000000ull, 734000000ull,
+  735000000ull, 736000000ull, 737000000ull, 738000000ull,
+  739000000ull, 792000000ull, 793000000ull, 936000000ull,
+  937000000ull, 978000000ull, 979000000ull,
+  740000000ull, 741000000ull, 742000000ull, 743000000ull, 744000000ull,
+  745000000ull, 746000000ull, 747000000ull, 748000000ull,
+  749000000ull, 784000000ull, 785000000ull, 946000000ull,
+  947000000ull, 788000000ull, 789000000ull,
+  750000000ull, 751000000ull, 752000000ull, 753000000ull, 754000000ull,
+  755000000ull, 756000000ull, 757000000ull, 758000000ull,
+  759000000ull, 794000000ull, 795000000ull, 956000000ull,
+  957000000ull, 798000000ull, 799000000ull,
+  760000000ull, 761000000ull, 762000000ull, 763000000ull, 764000000ull,
+  765000000ull, 766000000ull, 767000000ull, 768000000ull,
+  769000000ull, 786000000ull, 787000000ull, 966000000ull,
+  967000000ull, 988000000ull, 989000000ull,
+  770000000ull, 771000000ull, 772000000ull, 773000000ull, 774000000ull,
+  775000000ull, 776000000ull, 777000000ull, 778000000ull,
+  779000000ull, 796000000ull, 797000000ull, 976000000ull,
+  977000000ull, 998000000ull, 999000000ull
+};
+
+const UINT64 d2b4[] =
+  { 0000000000ull, 1000000000ull, 2000000000ull, 3000000000ull,
+  4000000000ull, 5000000000ull, 6000000000ull, 7000000000ull,
+    8000000000ull,
+  9000000000ull, 80000000000ull, 81000000000ull, 800000000000ull,
+    801000000000ull,
+  880000000000ull, 881000000000ull,
+  10000000000ull, 11000000000ull, 12000000000ull, 13000000000ull,
+  14000000000ull, 15000000000ull, 16000000000ull, 17000000000ull,
+  18000000000ull, 19000000000ull, 90000000000ull, 91000000000ull,
+  810000000000ull, 811000000000ull, 890000000000ull, 891000000000ull,
+  20000000000ull, 21000000000ull, 22000000000ull, 23000000000ull,
+  24000000000ull, 25000000000ull, 26000000000ull, 27000000000ull,
+  28000000000ull, 29000000000ull, 82000000000ull, 83000000000ull,
+  820000000000ull, 821000000000ull, 808000000000ull, 809000000000ull,
+  30000000000ull, 31000000000ull, 32000000000ull, 33000000000ull,
+  34000000000ull, 35000000000ull, 36000000000ull, 37000000000ull,
+  38000000000ull, 39000000000ull, 92000000000ull, 93000000000ull,
+  830000000000ull, 831000000000ull, 818000000000ull, 819000000000ull,
+  40000000000ull, 41000000000ull, 42000000000ull, 43000000000ull,
+  44000000000ull, 45000000000ull, 46000000000ull, 47000000000ull,
+  48000000000ull, 49000000000ull, 84000000000ull, 85000000000ull,
+  840000000000ull, 841000000000ull, 88000000000ull, 89000000000ull,
+  50000000000ull, 51000000000ull, 52000000000ull, 53000000000ull,
+  54000000000ull, 55000000000ull, 56000000000ull, 57000000000ull,
+  58000000000ull, 59000000000ull, 94000000000ull, 95000000000ull,
+  850000000000ull, 851000000000ull, 98000000000ull, 99000000000ull,
+  60000000000ull, 61000000000ull, 62000000000ull, 63000000000ull,
+  64000000000ull, 65000000000ull, 66000000000ull, 67000000000ull,
+  68000000000ull, 69000000000ull, 86000000000ull, 87000000000ull,
+  860000000000ull, 861000000000ull, 888000000000ull, 889000000000ull,
+  70000000000ull, 71000000000ull, 72000000000ull, 73000000000ull,
+  74000000000ull, 75000000000ull, 76000000000ull, 77000000000ull,
+  78000000000ull, 79000000000ull, 96000000000ull, 97000000000ull,
+  870000000000ull, 871000000000ull, 898000000000ull, 899000000000ull,
+  100000000000ull, 101000000000ull, 102000000000ull, 103000000000ull,
+  104000000000ull, 105000000000ull, 106000000000ull, 107000000000ull,
+  108000000000ull, 109000000000ull, 180000000000ull, 181000000000ull,
+  900000000000ull, 901000000000ull, 980000000000ull, 981000000000ull,
+  110000000000ull, 111000000000ull, 112000000000ull, 113000000000ull,
+  114000000000ull, 115000000000ull, 116000000000ull, 117000000000ull,
+  118000000000ull, 119000000000ull, 190000000000ull, 191000000000ull,
+  910000000000ull, 911000000000ull, 990000000000ull, 991000000000ull,
+  120000000000ull, 121000000000ull, 122000000000ull, 123000000000ull,
+  124000000000ull, 125000000000ull, 126000000000ull, 127000000000ull,
+  128000000000ull, 129000000000ull, 182000000000ull, 183000000000ull,
+  920000000000ull, 921000000000ull, 908000000000ull, 909000000000ull,
+  130000000000ull, 131000000000ull, 132000000000ull, 133000000000ull,
+  134000000000ull, 135000000000ull, 136000000000ull, 137000000000ull,
+  138000000000ull, 139000000000ull, 192000000000ull, 193000000000ull,
+  930000000000ull, 931000000000ull, 918000000000ull, 919000000000ull,
+  140000000000ull, 141000000000ull, 142000000000ull, 143000000000ull,
+  144000000000ull, 145000000000ull, 146000000000ull, 147000000000ull,
+  148000000000ull, 149000000000ull, 184000000000ull, 185000000000ull,
+  940000000000ull, 941000000000ull, 188000000000ull, 189000000000ull,
+  150000000000ull, 151000000000ull, 152000000000ull, 153000000000ull,
+  154000000000ull, 155000000000ull, 156000000000ull, 157000000000ull,
+  158000000000ull, 159000000000ull, 194000000000ull, 195000000000ull,
+  950000000000ull, 951000000000ull, 198000000000ull, 199000000000ull,
+  160000000000ull, 161000000000ull, 162000000000ull, 163000000000ull,
+  164000000000ull, 165000000000ull, 166000000000ull, 167000000000ull,
+  168000000000ull, 169000000000ull, 186000000000ull, 187000000000ull,
+  960000000000ull, 961000000000ull, 988000000000ull, 989000000000ull,
+  170000000000ull, 171000000000ull, 172000000000ull, 173000000000ull,
+  174000000000ull, 175000000000ull, 176000000000ull, 177000000000ull,
+  178000000000ull, 179000000000ull, 196000000000ull, 197000000000ull,
+  970000000000ull, 971000000000ull, 998000000000ull, 999000000000ull,
+  200000000000ull, 201000000000ull, 202000000000ull, 203000000000ull,
+  204000000000ull, 205000000000ull, 206000000000ull, 207000000000ull,
+  208000000000ull, 209000000000ull, 280000000000ull, 281000000000ull,
+  802000000000ull, 803000000000ull, 882000000000ull, 883000000000ull,
+  210000000000ull, 211000000000ull, 212000000000ull, 213000000000ull,
+  214000000000ull, 215000000000ull, 216000000000ull, 217000000000ull,
+  218000000000ull, 219000000000ull, 290000000000ull, 291000000000ull,
+  812000000000ull, 813000000000ull, 892000000000ull, 893000000000ull,
+  220000000000ull, 221000000000ull, 222000000000ull, 223000000000ull,
+  224000000000ull, 225000000000ull, 226000000000ull, 227000000000ull,
+  228000000000ull, 229000000000ull, 282000000000ull, 283000000000ull,
+  822000000000ull, 823000000000ull, 828000000000ull, 829000000000ull,
+  230000000000ull, 231000000000ull, 232000000000ull, 233000000000ull,
+  234000000000ull, 235000000000ull, 236000000000ull, 237000000000ull,
+  238000000000ull, 239000000000ull, 292000000000ull, 293000000000ull,
+  832000000000ull, 833000000000ull, 838000000000ull, 839000000000ull,
+  240000000000ull, 241000000000ull, 242000000000ull, 243000000000ull,
+  244000000000ull, 245000000000ull, 246000000000ull, 247000000000ull,
+  248000000000ull, 249000000000ull, 284000000000ull, 285000000000ull,
+  842000000000ull, 843000000000ull, 288000000000ull, 289000000000ull,
+  250000000000ull, 251000000000ull, 252000000000ull, 253000000000ull,
+  254000000000ull, 255000000000ull, 256000000000ull, 257000000000ull,
+  258000000000ull, 259000000000ull, 294000000000ull, 295000000000ull,
+  852000000000ull, 853000000000ull, 298000000000ull, 299000000000ull,
+  260000000000ull, 261000000000ull, 262000000000ull, 263000000000ull,
+  264000000000ull, 265000000000ull, 266000000000ull, 267000000000ull,
+  268000000000ull, 269000000000ull, 286000000000ull, 287000000000ull,
+  862000000000ull, 863000000000ull, 888000000000ull, 889000000000ull,
+  270000000000ull, 271000000000ull, 272000000000ull, 273000000000ull,
+  274000000000ull, 275000000000ull, 276000000000ull, 277000000000ull,
+  278000000000ull, 279000000000ull, 296000000000ull, 297000000000ull,
+  872000000000ull, 873000000000ull, 898000000000ull, 899000000000ull,
+  300000000000ull, 301000000000ull, 302000000000ull, 303000000000ull,
+  304000000000ull, 305000000000ull, 306000000000ull, 307000000000ull,
+  308000000000ull, 309000000000ull, 380000000000ull, 381000000000ull,
+  902000000000ull, 903000000000ull, 982000000000ull, 983000000000ull,
+  310000000000ull, 311000000000ull, 312000000000ull, 313000000000ull,
+  314000000000ull, 315000000000ull, 316000000000ull, 317000000000ull,
+  318000000000ull, 319000000000ull, 390000000000ull, 391000000000ull,
+  912000000000ull, 913000000000ull, 992000000000ull, 993000000000ull,
+  320000000000ull, 321000000000ull, 322000000000ull, 323000000000ull,
+  324000000000ull, 325000000000ull, 326000000000ull, 327000000000ull,
+  328000000000ull, 329000000000ull, 382000000000ull, 383000000000ull,
+  922000000000ull, 923000000000ull, 928000000000ull, 929000000000ull,
+  330000000000ull, 331000000000ull, 332000000000ull, 333000000000ull,
+  334000000000ull, 335000000000ull, 336000000000ull, 337000000000ull,
+  338000000000ull, 339000000000ull, 392000000000ull, 393000000000ull,
+  932000000000ull, 933000000000ull, 938000000000ull, 939000000000ull,
+  340000000000ull, 341000000000ull, 342000000000ull, 343000000000ull,
+  344000000000ull, 345000000000ull, 346000000000ull, 347000000000ull,
+  348000000000ull, 349000000000ull, 384000000000ull, 385000000000ull,
+  942000000000ull, 943000000000ull, 388000000000ull, 389000000000ull,
+  350000000000ull, 351000000000ull, 352000000000ull, 353000000000ull,
+  354000000000ull, 355000000000ull, 356000000000ull, 357000000000ull,
+  358000000000ull, 359000000000ull, 394000000000ull, 395000000000ull,
+  952000000000ull, 953000000000ull, 398000000000ull, 399000000000ull,
+  360000000000ull, 361000000000ull, 362000000000ull, 363000000000ull,
+  364000000000ull, 365000000000ull, 366000000000ull, 367000000000ull,
+  368000000000ull, 369000000000ull, 386000000000ull, 387000000000ull,
+  962000000000ull, 963000000000ull, 988000000000ull, 989000000000ull,
+  370000000000ull, 371000000000ull, 372000000000ull, 373000000000ull,
+  374000000000ull, 375000000000ull, 376000000000ull, 377000000000ull,
+  378000000000ull, 379000000000ull, 396000000000ull, 397000000000ull,
+  972000000000ull, 973000000000ull, 998000000000ull, 999000000000ull,
+  400000000000ull, 401000000000ull, 402000000000ull, 403000000000ull,
+  404000000000ull, 405000000000ull, 406000000000ull, 407000000000ull,
+  408000000000ull, 409000000000ull, 480000000000ull, 481000000000ull,
+  804000000000ull, 805000000000ull, 884000000000ull, 885000000000ull,
+  410000000000ull, 411000000000ull, 412000000000ull, 413000000000ull,
+  414000000000ull, 415000000000ull, 416000000000ull, 417000000000ull,
+  418000000000ull, 419000000000ull, 490000000000ull, 491000000000ull,
+  814000000000ull, 815000000000ull, 894000000000ull, 895000000000ull,
+  420000000000ull, 421000000000ull, 422000000000ull, 423000000000ull,
+  424000000000ull, 425000000000ull, 426000000000ull, 427000000000ull,
+  428000000000ull, 429000000000ull, 482000000000ull, 483000000000ull,
+  824000000000ull, 825000000000ull, 848000000000ull, 849000000000ull,
+  430000000000ull, 431000000000ull, 432000000000ull, 433000000000ull,
+  434000000000ull, 435000000000ull, 436000000000ull, 437000000000ull,
+  438000000000ull, 439000000000ull, 492000000000ull, 493000000000ull,
+  834000000000ull, 835000000000ull, 858000000000ull, 859000000000ull,
+  440000000000ull, 441000000000ull, 442000000000ull, 443000000000ull,
+  444000000000ull, 445000000000ull, 446000000000ull, 447000000000ull,
+  448000000000ull, 449000000000ull, 484000000000ull, 485000000000ull,
+  844000000000ull, 845000000000ull, 488000000000ull, 489000000000ull,
+  450000000000ull, 451000000000ull, 452000000000ull, 453000000000ull,
+  454000000000ull, 455000000000ull, 456000000000ull, 457000000000ull,
+  458000000000ull, 459000000000ull, 494000000000ull, 495000000000ull,
+  854000000000ull, 855000000000ull, 498000000000ull, 499000000000ull,
+  460000000000ull, 461000000000ull, 462000000000ull, 463000000000ull,
+  464000000000ull, 465000000000ull, 466000000000ull, 467000000000ull,
+  468000000000ull, 469000000000ull, 486000000000ull, 487000000000ull,
+  864000000000ull, 865000000000ull, 888000000000ull, 889000000000ull,
+  470000000000ull, 471000000000ull, 472000000000ull, 473000000000ull,
+  474000000000ull, 475000000000ull, 476000000000ull, 477000000000ull,
+  478000000000ull, 479000000000ull, 496000000000ull, 497000000000ull,
+  874000000000ull, 875000000000ull, 898000000000ull, 899000000000ull,
+  500000000000ull, 501000000000ull, 502000000000ull, 503000000000ull,
+  504000000000ull, 505000000000ull, 506000000000ull, 507000000000ull,
+  508000000000ull, 509000000000ull, 580000000000ull, 581000000000ull,
+  904000000000ull, 905000000000ull, 984000000000ull, 985000000000ull,
+  510000000000ull, 511000000000ull, 512000000000ull, 513000000000ull,
+  514000000000ull, 515000000000ull, 516000000000ull, 517000000000ull,
+  518000000000ull, 519000000000ull, 590000000000ull, 591000000000ull,
+  914000000000ull, 915000000000ull, 994000000000ull, 995000000000ull,
+  520000000000ull, 521000000000ull, 522000000000ull, 523000000000ull,
+  524000000000ull, 525000000000ull, 526000000000ull, 527000000000ull,
+  528000000000ull, 529000000000ull, 582000000000ull, 583000000000ull,
+  924000000000ull, 925000000000ull, 948000000000ull, 949000000000ull,
+  530000000000ull, 531000000000ull, 532000000000ull, 533000000000ull,
+  534000000000ull, 535000000000ull, 536000000000ull, 537000000000ull,
+  538000000000ull, 539000000000ull, 592000000000ull, 593000000000ull,
+  934000000000ull, 935000000000ull, 958000000000ull, 959000000000ull,
+  540000000000ull, 541000000000ull, 542000000000ull, 543000000000ull,
+  544000000000ull, 545000000000ull, 546000000000ull, 547000000000ull,
+  548000000000ull, 549000000000ull, 584000000000ull, 585000000000ull,
+  944000000000ull, 945000000000ull, 588000000000ull, 589000000000ull,
+  550000000000ull, 551000000000ull, 552000000000ull, 553000000000ull,
+  554000000000ull, 555000000000ull, 556000000000ull, 557000000000ull,
+  558000000000ull, 559000000000ull, 594000000000ull, 595000000000ull,
+  954000000000ull, 955000000000ull, 598000000000ull, 599000000000ull,
+  560000000000ull, 561000000000ull, 562000000000ull, 563000000000ull,
+  564000000000ull, 565000000000ull, 566000000000ull, 567000000000ull,
+  568000000000ull, 569000000000ull, 586000000000ull, 587000000000ull,
+  964000000000ull, 965000000000ull, 988000000000ull, 989000000000ull,
+  570000000000ull, 571000000000ull, 572000000000ull, 573000000000ull,
+  574000000000ull, 575000000000ull, 576000000000ull, 577000000000ull,
+  578000000000ull, 579000000000ull, 596000000000ull, 597000000000ull,
+  974000000000ull, 975000000000ull, 998000000000ull, 999000000000ull,
+  600000000000ull, 601000000000ull, 602000000000ull, 603000000000ull,
+  604000000000ull, 605000000000ull, 606000000000ull, 607000000000ull,
+  608000000000ull, 609000000000ull, 680000000000ull, 681000000000ull,
+  806000000000ull, 807000000000ull, 886000000000ull, 887000000000ull,
+  610000000000ull, 611000000000ull, 612000000000ull, 613000000000ull,
+  614000000000ull, 615000000000ull, 616000000000ull, 617000000000ull,
+  618000000000ull, 619000000000ull, 690000000000ull, 691000000000ull,
+  816000000000ull, 817000000000ull, 896000000000ull, 897000000000ull,
+  620000000000ull, 621000000000ull, 622000000000ull, 623000000000ull,
+  624000000000ull, 625000000000ull, 626000000000ull, 627000000000ull,
+  628000000000ull, 629000000000ull, 682000000000ull, 683000000000ull,
+  826000000000ull, 827000000000ull, 868000000000ull, 869000000000ull,
+  630000000000ull, 631000000000ull, 632000000000ull, 633000000000ull,
+  634000000000ull, 635000000000ull, 636000000000ull, 637000000000ull,
+  638000000000ull, 639000000000ull, 692000000000ull, 693000000000ull,
+  836000000000ull, 837000000000ull, 878000000000ull, 879000000000ull,
+  640000000000ull, 641000000000ull, 642000000000ull, 643000000000ull,
+  644000000000ull, 645000000000ull, 646000000000ull, 647000000000ull,
+  648000000000ull, 649000000000ull, 684000000000ull, 685000000000ull,
+  846000000000ull, 847000000000ull, 688000000000ull, 689000000000ull,
+  650000000000ull, 651000000000ull, 652000000000ull, 653000000000ull,
+  654000000000ull, 655000000000ull, 656000000000ull, 657000000000ull,
+  658000000000ull, 659000000000ull, 694000000000ull, 695000000000ull,
+  856000000000ull, 857000000000ull, 698000000000ull, 699000000000ull,
+  660000000000ull, 661000000000ull, 662000000000ull, 663000000000ull,
+  664000000000ull, 665000000000ull, 666000000000ull, 667000000000ull,
+  668000000000ull, 669000000000ull, 686000000000ull, 687000000000ull,
+  866000000000ull, 867000000000ull, 888000000000ull, 889000000000ull,
+  670000000000ull, 671000000000ull, 672000000000ull, 673000000000ull,
+  674000000000ull, 675000000000ull, 676000000000ull, 677000000000ull,
+  678000000000ull, 679000000000ull, 696000000000ull, 697000000000ull,
+  876000000000ull, 877000000000ull, 898000000000ull, 899000000000ull,
+  700000000000ull, 701000000000ull, 702000000000ull, 703000000000ull,
+  704000000000ull, 705000000000ull, 706000000000ull, 707000000000ull,
+  708000000000ull, 709000000000ull, 780000000000ull, 781000000000ull,
+  906000000000ull, 907000000000ull, 986000000000ull, 987000000000ull,
+  710000000000ull, 711000000000ull, 712000000000ull, 713000000000ull,
+  714000000000ull, 715000000000ull, 716000000000ull, 717000000000ull,
+  718000000000ull, 719000000000ull, 790000000000ull, 791000000000ull,
+  916000000000ull, 917000000000ull, 996000000000ull, 997000000000ull,
+  720000000000ull, 721000000000ull, 722000000000ull, 723000000000ull,
+  724000000000ull, 725000000000ull, 726000000000ull, 727000000000ull,
+  728000000000ull, 729000000000ull, 782000000000ull, 783000000000ull,
+  926000000000ull, 927000000000ull, 968000000000ull, 969000000000ull,
+  730000000000ull, 731000000000ull, 732000000000ull, 733000000000ull,
+  734000000000ull, 735000000000ull, 736000000000ull, 737000000000ull,
+  738000000000ull, 739000000000ull, 792000000000ull, 793000000000ull,
+  936000000000ull, 937000000000ull, 978000000000ull, 979000000000ull,
+  740000000000ull, 741000000000ull, 742000000000ull, 743000000000ull,
+  744000000000ull, 745000000000ull, 746000000000ull, 747000000000ull,
+  748000000000ull, 749000000000ull, 784000000000ull, 785000000000ull,
+  946000000000ull, 947000000000ull, 788000000000ull, 789000000000ull,
+  750000000000ull, 751000000000ull, 752000000000ull, 753000000000ull,
+  754000000000ull, 755000000000ull, 756000000000ull, 757000000000ull,
+  758000000000ull, 759000000000ull, 794000000000ull, 795000000000ull,
+  956000000000ull, 957000000000ull, 798000000000ull, 799000000000ull,
+  760000000000ull, 761000000000ull, 762000000000ull, 763000000000ull,
+  764000000000ull, 765000000000ull, 766000000000ull, 767000000000ull,
+  768000000000ull, 769000000000ull, 786000000000ull, 787000000000ull,
+  966000000000ull, 967000000000ull, 988000000000ull, 989000000000ull,
+  770000000000ull, 771000000000ull, 772000000000ull, 773000000000ull,
+  774000000000ull, 775000000000ull, 776000000000ull, 777000000000ull,
+  778000000000ull, 779000000000ull, 796000000000ull, 797000000000ull,
+  976000000000ull, 977000000000ull, 998000000000ull, 999000000000ull
+};
+
+const UINT64 d2b5[] = { 0000000000000ull, 1000000000000ull, 2000000000000ull,
+  3000000000000ull, 4000000000000ull, 5000000000000ull,
+    6000000000000ull,
+  7000000000000ull, 8000000000000ull, 9000000000000ull,
+    80000000000000ull,
+  81000000000000ull, 800000000000000ull, 801000000000000ull,
+    880000000000000ull,
+  881000000000000ull,
+  10000000000000ull, 11000000000000ull, 12000000000000ull,
+  13000000000000ull, 14000000000000ull, 15000000000000ull,
+  16000000000000ull, 17000000000000ull, 18000000000000ull,
+  19000000000000ull, 90000000000000ull, 91000000000000ull,
+  810000000000000ull, 811000000000000ull, 890000000000000ull,
+  891000000000000ull,
+  20000000000000ull, 21000000000000ull, 22000000000000ull,
+  23000000000000ull, 24000000000000ull, 25000000000000ull,
+  26000000000000ull, 27000000000000ull, 28000000000000ull,
+  29000000000000ull, 82000000000000ull, 83000000000000ull,
+  820000000000000ull, 821000000000000ull, 808000000000000ull,
+  809000000000000ull,
+  30000000000000ull, 31000000000000ull, 32000000000000ull,
+  33000000000000ull, 34000000000000ull, 35000000000000ull,
+  36000000000000ull, 37000000000000ull, 38000000000000ull,
+  39000000000000ull, 92000000000000ull, 93000000000000ull,
+  830000000000000ull, 831000000000000ull, 818000000000000ull,
+  819000000000000ull,
+  40000000000000ull, 41000000000000ull, 42000000000000ull,
+  43000000000000ull, 44000000000000ull, 45000000000000ull,
+  46000000000000ull, 47000000000000ull, 48000000000000ull,
+  49000000000000ull, 84000000000000ull, 85000000000000ull,
+  840000000000000ull, 841000000000000ull, 88000000000000ull,
+  89000000000000ull,
+  50000000000000ull, 51000000000000ull, 52000000000000ull,
+  53000000000000ull, 54000000000000ull, 55000000000000ull,
+  56000000000000ull, 57000000000000ull, 58000000000000ull,
+  59000000000000ull, 94000000000000ull, 95000000000000ull,
+  850000000000000ull, 851000000000000ull, 98000000000000ull,
+  99000000000000ull,
+  60000000000000ull, 61000000000000ull, 62000000000000ull,
+  63000000000000ull, 64000000000000ull, 65000000000000ull,
+  66000000000000ull, 67000000000000ull, 68000000000000ull,
+  69000000000000ull, 86000000000000ull, 87000000000000ull,
+  860000000000000ull, 861000000000000ull, 888000000000000ull,
+  889000000000000ull,
+  70000000000000ull, 71000000000000ull, 72000000000000ull,
+  73000000000000ull, 74000000000000ull, 75000000000000ull,
+  76000000000000ull, 77000000000000ull, 78000000000000ull,
+  79000000000000ull, 96000000000000ull, 97000000000000ull,
+  870000000000000ull, 871000000000000ull, 898000000000000ull,
+  899000000000000ull,
+  100000000000000ull, 101000000000000ull, 102000000000000ull,
+  103000000000000ull, 104000000000000ull, 105000000000000ull,
+  106000000000000ull, 107000000000000ull, 108000000000000ull,
+  109000000000000ull, 180000000000000ull, 181000000000000ull,
+  900000000000000ull, 901000000000000ull, 980000000000000ull,
+  981000000000000ull,
+  110000000000000ull, 111000000000000ull, 112000000000000ull,
+  113000000000000ull, 114000000000000ull, 115000000000000ull,
+  116000000000000ull, 117000000000000ull, 118000000000000ull,
+  119000000000000ull, 190000000000000ull, 191000000000000ull,
+  910000000000000ull, 911000000000000ull, 990000000000000ull,
+  991000000000000ull,
+  120000000000000ull, 121000000000000ull, 122000000000000ull,
+  123000000000000ull, 124000000000000ull, 125000000000000ull,
+  126000000000000ull, 127000000000000ull, 128000000000000ull,
+  129000000000000ull, 182000000000000ull, 183000000000000ull,
+  920000000000000ull, 921000000000000ull, 908000000000000ull,
+  909000000000000ull,
+  130000000000000ull, 131000000000000ull, 132000000000000ull,
+  133000000000000ull, 134000000000000ull, 135000000000000ull,
+  136000000000000ull, 137000000000000ull, 138000000000000ull,
+  139000000000000ull, 192000000000000ull, 193000000000000ull,
+  930000000000000ull, 931000000000000ull, 918000000000000ull,
+  919000000000000ull,
+  140000000000000ull, 141000000000000ull, 142000000000000ull,
+  143000000000000ull, 144000000000000ull, 145000000000000ull,
+  146000000000000ull, 147000000000000ull, 148000000000000ull,
+  149000000000000ull, 184000000000000ull, 185000000000000ull,
+  940000000000000ull, 941000000000000ull, 188000000000000ull,
+  189000000000000ull,
+  150000000000000ull, 151000000000000ull, 152000000000000ull,
+  153000000000000ull, 154000000000000ull, 155000000000000ull,
+  156000000000000ull, 157000000000000ull, 158000000000000ull,
+  159000000000000ull, 194000000000000ull, 195000000000000ull,
+  950000000000000ull, 951000000000000ull, 198000000000000ull,
+  199000000000000ull,
+  160000000000000ull, 161000000000000ull, 162000000000000ull,
+  163000000000000ull, 164000000000000ull, 165000000000000ull,
+  166000000000000ull, 167000000000000ull, 168000000000000ull,
+  169000000000000ull, 186000000000000ull, 187000000000000ull,
+  960000000000000ull, 961000000000000ull, 988000000000000ull,
+  989000000000000ull,
+  170000000000000ull, 171000000000000ull, 172000000000000ull,
+  173000000000000ull, 174000000000000ull, 175000000000000ull,
+  176000000000000ull, 177000000000000ull, 178000000000000ull,
+  179000000000000ull, 196000000000000ull, 197000000000000ull,
+  970000000000000ull, 971000000000000ull, 998000000000000ull,
+  999000000000000ull,
+  200000000000000ull, 201000000000000ull, 202000000000000ull,
+  203000000000000ull, 204000000000000ull, 205000000000000ull,
+  206000000000000ull, 207000000000000ull, 208000000000000ull,
+  209000000000000ull, 280000000000000ull, 281000000000000ull,
+  802000000000000ull, 803000000000000ull, 882000000000000ull,
+  883000000000000ull,
+  210000000000000ull, 211000000000000ull, 212000000000000ull,
+  213000000000000ull, 214000000000000ull, 215000000000000ull,
+  216000000000000ull, 217000000000000ull, 218000000000000ull,
+  219000000000000ull, 290000000000000ull, 291000000000000ull,
+  812000000000000ull, 813000000000000ull, 892000000000000ull,
+  893000000000000ull,
+  220000000000000ull, 221000000000000ull, 222000000000000ull,
+  223000000000000ull, 224000000000000ull, 225000000000000ull,
+  226000000000000ull, 227000000000000ull, 228000000000000ull,
+  229000000000000ull, 282000000000000ull, 283000000000000ull,
+  822000000000000ull, 823000000000000ull, 828000000000000ull,
+  829000000000000ull,
+  230000000000000ull, 231000000000000ull, 232000000000000ull,
+  233000000000000ull, 234000000000000ull, 235000000000000ull,
+  236000000000000ull, 237000000000000ull, 238000000000000ull,
+  239000000000000ull, 292000000000000ull, 293000000000000ull,
+  832000000000000ull, 833000000000000ull, 838000000000000ull,
+  839000000000000ull,
+  240000000000000ull, 241000000000000ull, 242000000000000ull,
+  243000000000000ull, 244000000000000ull, 245000000000000ull,
+  246000000000000ull, 247000000000000ull, 248000000000000ull,
+  249000000000000ull, 284000000000000ull, 285000000000000ull,
+  842000000000000ull, 843000000000000ull, 288000000000000ull,
+  289000000000000ull,
+  250000000000000ull, 251000000000000ull, 252000000000000ull,
+  253000000000000ull, 254000000000000ull, 255000000000000ull,
+  256000000000000ull, 257000000000000ull, 258000000000000ull,
+  259000000000000ull, 294000000000000ull, 295000000000000ull,
+  852000000000000ull, 853000000000000ull, 298000000000000ull,
+  299000000000000ull,
+  260000000000000ull, 261000000000000ull, 262000000000000ull,
+  263000000000000ull, 264000000000000ull, 265000000000000ull,
+  266000000000000ull, 267000000000000ull, 268000000000000ull,
+  269000000000000ull, 286000000000000ull, 287000000000000ull,
+  862000000000000ull, 863000000000000ull, 888000000000000ull,
+  889000000000000ull,
+  270000000000000ull, 271000000000000ull, 272000000000000ull,
+  273000000000000ull, 274000000000000ull, 275000000000000ull,
+  276000000000000ull, 277000000000000ull, 278000000000000ull,
+  279000000000000ull, 296000000000000ull, 297000000000000ull,
+  872000000000000ull, 873000000000000ull, 898000000000000ull,
+  899000000000000ull,
+  300000000000000ull, 301000000000000ull, 302000000000000ull,
+  303000000000000ull, 304000000000000ull, 305000000000000ull,
+  306000000000000ull, 307000000000000ull, 308000000000000ull,
+  309000000000000ull, 380000000000000ull, 381000000000000ull,
+  902000000000000ull, 903000000000000ull, 982000000000000ull,
+  983000000000000ull,
+  310000000000000ull, 311000000000000ull, 312000000000000ull,
+  313000000000000ull, 314000000000000ull, 315000000000000ull,
+  316000000000000ull, 317000000000000ull, 318000000000000ull,
+  319000000000000ull, 390000000000000ull, 391000000000000ull,
+  912000000000000ull, 913000000000000ull, 992000000000000ull,
+  993000000000000ull,
+  320000000000000ull, 321000000000000ull, 322000000000000ull,
+  323000000000000ull, 324000000000000ull, 325000000000000ull,
+  326000000000000ull, 327000000000000ull, 328000000000000ull,
+  329000000000000ull, 382000000000000ull, 383000000000000ull,
+  922000000000000ull, 923000000000000ull, 928000000000000ull,
+  929000000000000ull,
+  330000000000000ull, 331000000000000ull, 332000000000000ull,
+  333000000000000ull, 334000000000000ull, 335000000000000ull,
+  336000000000000ull, 337000000000000ull, 338000000000000ull,
+  339000000000000ull, 392000000000000ull, 393000000000000ull,
+  932000000000000ull, 933000000000000ull, 938000000000000ull,
+  939000000000000ull,
+  340000000000000ull, 341000000000000ull, 342000000000000ull,
+  343000000000000ull, 344000000000000ull, 345000000000000ull,
+  346000000000000ull, 347000000000000ull, 348000000000000ull,
+  349000000000000ull, 384000000000000ull, 385000000000000ull,
+  942000000000000ull, 943000000000000ull, 388000000000000ull,
+  389000000000000ull,
+  350000000000000ull, 351000000000000ull, 352000000000000ull,
+  353000000000000ull, 354000000000000ull, 355000000000000ull,
+  356000000000000ull, 357000000000000ull, 358000000000000ull,
+  359000000000000ull, 394000000000000ull, 395000000000000ull,
+  952000000000000ull, 953000000000000ull, 398000000000000ull,
+  399000000000000ull,
+  360000000000000ull, 361000000000000ull, 362000000000000ull,
+  363000000000000ull, 364000000000000ull, 365000000000000ull,
+  366000000000000ull, 367000000000000ull, 368000000000000ull,
+  369000000000000ull, 386000000000000ull, 387000000000000ull,
+  962000000000000ull, 963000000000000ull, 988000000000000ull,
+  989000000000000ull,
+  370000000000000ull, 371000000000000ull, 372000000000000ull,
+  373000000000000ull, 374000000000000ull, 375000000000000ull,
+  376000000000000ull, 377000000000000ull, 378000000000000ull,
+  379000000000000ull, 396000000000000ull, 397000000000000ull,
+  972000000000000ull, 973000000000000ull, 998000000000000ull,
+  999000000000000ull,
+  400000000000000ull, 401000000000000ull, 402000000000000ull,
+  403000000000000ull, 404000000000000ull, 405000000000000ull,
+  406000000000000ull, 407000000000000ull, 408000000000000ull,
+  409000000000000ull, 480000000000000ull, 481000000000000ull,
+  804000000000000ull, 805000000000000ull, 884000000000000ull,
+  885000000000000ull,
+  410000000000000ull, 411000000000000ull, 412000000000000ull,
+  413000000000000ull, 414000000000000ull, 415000000000000ull,
+  416000000000000ull, 417000000000000ull, 418000000000000ull,
+  419000000000000ull, 490000000000000ull, 491000000000000ull,
+  814000000000000ull, 815000000000000ull, 894000000000000ull,
+  895000000000000ull,
+  420000000000000ull, 421000000000000ull, 422000000000000ull,
+  423000000000000ull, 424000000000000ull, 425000000000000ull,
+  426000000000000ull, 427000000000000ull, 428000000000000ull,
+  429000000000000ull, 482000000000000ull, 483000000000000ull,
+  824000000000000ull, 825000000000000ull, 848000000000000ull,
+  849000000000000ull,
+  430000000000000ull, 431000000000000ull, 432000000000000ull,
+  433000000000000ull, 434000000000000ull, 435000000000000ull,
+  436000000000000ull, 437000000000000ull, 438000000000000ull,
+  439000000000000ull, 492000000000000ull, 493000000000000ull,
+  834000000000000ull, 835000000000000ull, 858000000000000ull,
+  859000000000000ull,
+  440000000000000ull, 441000000000000ull, 442000000000000ull,
+  443000000000000ull, 444000000000000ull, 445000000000000ull,
+  446000000000000ull, 447000000000000ull, 448000000000000ull,
+  449000000000000ull, 484000000000000ull, 485000000000000ull,
+  844000000000000ull, 845000000000000ull, 488000000000000ull,
+  489000000000000ull,
+  450000000000000ull, 451000000000000ull, 452000000000000ull,
+  453000000000000ull, 454000000000000ull, 455000000000000ull,
+  456000000000000ull, 457000000000000ull, 458000000000000ull,
+  459000000000000ull, 494000000000000ull, 495000000000000ull,
+  854000000000000ull, 855000000000000ull, 498000000000000ull,
+  499000000000000ull,
+  460000000000000ull, 461000000000000ull, 462000000000000ull,
+  463000000000000ull, 464000000000000ull, 465000000000000ull,
+  466000000000000ull, 467000000000000ull, 468000000000000ull,
+  469000000000000ull, 486000000000000ull, 487000000000000ull,
+  864000000000000ull, 865000000000000ull, 888000000000000ull,
+  889000000000000ull,
+  470000000000000ull, 471000000000000ull, 472000000000000ull,
+  473000000000000ull, 474000000000000ull, 475000000000000ull,
+  476000000000000ull, 477000000000000ull, 478000000000000ull,
+  479000000000000ull, 496000000000000ull, 497000000000000ull,
+  874000000000000ull, 875000000000000ull, 898000000000000ull,
+  899000000000000ull,
+  500000000000000ull, 501000000000000ull, 502000000000000ull,
+  503000000000000ull, 504000000000000ull, 505000000000000ull,
+  506000000000000ull, 507000000000000ull, 508000000000000ull,
+  509000000000000ull, 580000000000000ull, 581000000000000ull,
+  904000000000000ull, 905000000000000ull, 984000000000000ull,
+  985000000000000ull,
+  510000000000000ull, 511000000000000ull, 512000000000000ull,
+  513000000000000ull, 514000000000000ull, 515000000000000ull,
+  516000000000000ull, 517000000000000ull, 518000000000000ull,
+  519000000000000ull, 590000000000000ull, 591000000000000ull,
+  914000000000000ull, 915000000000000ull, 994000000000000ull,
+  995000000000000ull,
+  520000000000000ull, 521000000000000ull, 522000000000000ull,
+  523000000000000ull, 524000000000000ull, 525000000000000ull,
+  526000000000000ull, 527000000000000ull, 528000000000000ull,
+  529000000000000ull, 582000000000000ull, 583000000000000ull,
+  924000000000000ull, 925000000000000ull, 948000000000000ull,
+  949000000000000ull,
+  530000000000000ull, 531000000000000ull, 532000000000000ull,
+  533000000000000ull, 534000000000000ull, 535000000000000ull,
+  536000000000000ull, 537000000000000ull, 538000000000000ull,
+  539000000000000ull, 592000000000000ull, 593000000000000ull,
+  934000000000000ull, 935000000000000ull, 958000000000000ull,
+  959000000000000ull,
+  540000000000000ull, 541000000000000ull, 542000000000000ull,
+  543000000000000ull, 544000000000000ull, 545000000000000ull,
+  546000000000000ull, 547000000000000ull, 548000000000000ull,
+  549000000000000ull, 584000000000000ull, 585000000000000ull,
+  944000000000000ull, 945000000000000ull, 588000000000000ull,
+  589000000000000ull,
+  550000000000000ull, 551000000000000ull, 552000000000000ull,
+  553000000000000ull, 554000000000000ull, 555000000000000ull,
+  556000000000000ull, 557000000000000ull, 558000000000000ull,
+  559000000000000ull, 594000000000000ull, 595000000000000ull,
+  954000000000000ull, 955000000000000ull, 598000000000000ull,
+  599000000000000ull,
+  560000000000000ull, 561000000000000ull, 562000000000000ull,
+  563000000000000ull, 564000000000000ull, 565000000000000ull,
+  566000000000000ull, 567000000000000ull, 568000000000000ull,
+  569000000000000ull, 586000000000000ull, 587000000000000ull,
+  964000000000000ull, 965000000000000ull, 988000000000000ull,
+  989000000000000ull,
+  570000000000000ull, 571000000000000ull, 572000000000000ull,
+  573000000000000ull, 574000000000000ull, 575000000000000ull,
+  576000000000000ull, 577000000000000ull, 578000000000000ull,
+  579000000000000ull, 596000000000000ull, 597000000000000ull,
+  974000000000000ull, 975000000000000ull, 998000000000000ull,
+  999000000000000ull,
+  600000000000000ull, 601000000000000ull, 602000000000000ull,
+  603000000000000ull, 604000000000000ull, 605000000000000ull,
+  606000000000000ull, 607000000000000ull, 608000000000000ull,
+  609000000000000ull, 680000000000000ull, 681000000000000ull,
+  806000000000000ull, 807000000000000ull, 886000000000000ull,
+  887000000000000ull,
+  610000000000000ull, 611000000000000ull, 612000000000000ull,
+  613000000000000ull, 614000000000000ull, 615000000000000ull,
+  616000000000000ull, 617000000000000ull, 618000000000000ull,
+  619000000000000ull, 690000000000000ull, 691000000000000ull,
+  816000000000000ull, 817000000000000ull, 896000000000000ull,
+  897000000000000ull,
+  620000000000000ull, 621000000000000ull, 622000000000000ull,
+  623000000000000ull, 624000000000000ull, 625000000000000ull,
+  626000000000000ull, 627000000000000ull, 628000000000000ull,
+  629000000000000ull, 682000000000000ull, 683000000000000ull,
+  826000000000000ull, 827000000000000ull, 868000000000000ull,
+  869000000000000ull,
+  630000000000000ull, 631000000000000ull, 632000000000000ull,
+  633000000000000ull, 634000000000000ull, 635000000000000ull,
+  636000000000000ull, 637000000000000ull, 638000000000000ull,
+  639000000000000ull, 692000000000000ull, 693000000000000ull,
+  836000000000000ull, 837000000000000ull, 878000000000000ull,
+  879000000000000ull,
+  640000000000000ull, 641000000000000ull, 642000000000000ull,
+  643000000000000ull, 644000000000000ull, 645000000000000ull,
+  646000000000000ull, 647000000000000ull, 648000000000000ull,
+  649000000000000ull, 684000000000000ull, 685000000000000ull,
+  846000000000000ull, 847000000000000ull, 688000000000000ull,
+  689000000000000ull,
+  650000000000000ull, 651000000000000ull, 652000000000000ull,
+  653000000000000ull, 654000000000000ull, 655000000000000ull,
+  656000000000000ull, 657000000000000ull, 658000000000000ull,
+  659000000000000ull, 694000000000000ull, 695000000000000ull,
+  856000000000000ull, 857000000000000ull, 698000000000000ull,
+  699000000000000ull,
+  660000000000000ull, 661000000000000ull, 662000000000000ull,
+  663000000000000ull, 664000000000000ull, 665000000000000ull,
+  666000000000000ull, 667000000000000ull, 668000000000000ull,
+  669000000000000ull, 686000000000000ull, 687000000000000ull,
+  866000000000000ull, 867000000000000ull, 888000000000000ull,
+  889000000000000ull,
+  670000000000000ull, 671000000000000ull, 672000000000000ull,
+  673000000000000ull, 674000000000000ull, 675000000000000ull,
+  676000000000000ull, 677000000000000ull, 678000000000000ull,
+  679000000000000ull, 696000000000000ull, 697000000000000ull,
+  876000000000000ull, 877000000000000ull, 898000000000000ull,
+  899000000000000ull,
+  700000000000000ull, 701000000000000ull, 702000000000000ull,
+  703000000000000ull, 704000000000000ull, 705000000000000ull,
+  706000000000000ull, 707000000000000ull, 708000000000000ull,
+  709000000000000ull, 780000000000000ull, 781000000000000ull,
+  906000000000000ull, 907000000000000ull, 986000000000000ull,
+  987000000000000ull,
+  710000000000000ull, 711000000000000ull, 712000000000000ull,
+  713000000000000ull, 714000000000000ull, 715000000000000ull,
+  716000000000000ull, 717000000000000ull, 718000000000000ull,
+  719000000000000ull, 790000000000000ull, 791000000000000ull,
+  916000000000000ull, 917000000000000ull, 996000000000000ull,
+  997000000000000ull,
+  720000000000000ull, 721000000000000ull, 722000000000000ull,
+  723000000000000ull, 724000000000000ull, 725000000000000ull,
+  726000000000000ull, 727000000000000ull, 728000000000000ull,
+  729000000000000ull, 782000000000000ull, 783000000000000ull,
+  926000000000000ull, 927000000000000ull, 968000000000000ull,
+  969000000000000ull,
+  730000000000000ull, 731000000000000ull, 732000000000000ull,
+  733000000000000ull, 734000000000000ull, 735000000000000ull,
+  736000000000000ull, 737000000000000ull, 738000000000000ull,
+  739000000000000ull, 792000000000000ull, 793000000000000ull,
+  936000000000000ull, 937000000000000ull, 978000000000000ull,
+  979000000000000ull,
+  740000000000000ull, 741000000000000ull, 742000000000000ull,
+  743000000000000ull, 744000000000000ull, 745000000000000ull,
+  746000000000000ull, 747000000000000ull, 748000000000000ull,
+  749000000000000ull, 784000000000000ull, 785000000000000ull,
+  946000000000000ull, 947000000000000ull, 788000000000000ull,
+  789000000000000ull,
+  750000000000000ull, 751000000000000ull, 752000000000000ull,
+  753000000000000ull, 754000000000000ull, 755000000000000ull,
+  756000000000000ull, 757000000000000ull, 758000000000000ull,
+  759000000000000ull, 794000000000000ull, 795000000000000ull,
+  956000000000000ull, 957000000000000ull, 798000000000000ull,
+  799000000000000ull,
+  760000000000000ull, 761000000000000ull, 762000000000000ull,
+  763000000000000ull, 764000000000000ull, 765000000000000ull,
+  766000000000000ull, 767000000000000ull, 768000000000000ull,
+  769000000000000ull, 786000000000000ull, 787000000000000ull,
+  966000000000000ull, 967000000000000ull, 988000000000000ull,
+  989000000000000ull,
+  770000000000000ull, 771000000000000ull, 772000000000000ull,
+  773000000000000ull, 774000000000000ull, 775000000000000ull,
+  776000000000000ull, 777000000000000ull, 778000000000000ull,
+  779000000000000ull, 796000000000000ull, 797000000000000ull,
+  976000000000000ull, 977000000000000ull, 998000000000000ull,
+  999000000000000ull
+};
+
+const UINT64 d2b6[] =
+  { 0000000000000000ull, 1000000000000000ull, 2000000000000000ull,
+  3000000000000000ull, 4000000000000000ull, 5000000000000000ull,
+  6000000000000000ull, 7000000000000000ull, 8000000000000000ull,
+  9000000000000000ull, 80000000000000000ull, 81000000000000000ull,
+  800000000000000000ull, 801000000000000000ull, 880000000000000000ull,
+  881000000000000000ull,
+  10000000000000000ull, 11000000000000000ull, 12000000000000000ull,
+  13000000000000000ull, 14000000000000000ull, 15000000000000000ull,
+  16000000000000000ull, 17000000000000000ull, 18000000000000000ull,
+  19000000000000000ull, 90000000000000000ull, 91000000000000000ull,
+  810000000000000000ull, 811000000000000000ull, 890000000000000000ull,
+  891000000000000000ull,
+  20000000000000000ull, 21000000000000000ull, 22000000000000000ull,
+  23000000000000000ull, 24000000000000000ull, 25000000000000000ull,
+  26000000000000000ull, 27000000000000000ull, 28000000000000000ull,
+  29000000000000000ull, 82000000000000000ull, 83000000000000000ull,
+  820000000000000000ull, 821000000000000000ull, 808000000000000000ull,
+  809000000000000000ull,
+  30000000000000000ull, 31000000000000000ull, 32000000000000000ull,
+  33000000000000000ull, 34000000000000000ull, 35000000000000000ull,
+  36000000000000000ull, 37000000000000000ull, 38000000000000000ull,
+  39000000000000000ull, 92000000000000000ull, 93000000000000000ull,
+  830000000000000000ull, 831000000000000000ull, 818000000000000000ull,
+  819000000000000000ull,
+  40000000000000000ull, 41000000000000000ull, 42000000000000000ull,
+  43000000000000000ull, 44000000000000000ull, 45000000000000000ull,
+  46000000000000000ull, 47000000000000000ull, 48000000000000000ull,
+  49000000000000000ull, 84000000000000000ull, 85000000000000000ull,
+  840000000000000000ull, 841000000000000000ull, 88000000000000000ull,
+  89000000000000000ull,
+  50000000000000000ull, 51000000000000000ull, 52000000000000000ull,
+  53000000000000000ull, 54000000000000000ull, 55000000000000000ull,
+  56000000000000000ull, 57000000000000000ull, 58000000000000000ull,
+  59000000000000000ull, 94000000000000000ull, 95000000000000000ull,
+  850000000000000000ull, 851000000000000000ull, 98000000000000000ull,
+  99000000000000000ull,
+  60000000000000000ull, 61000000000000000ull, 62000000000000000ull,
+  63000000000000000ull, 64000000000000000ull, 65000000000000000ull,
+  66000000000000000ull, 67000000000000000ull, 68000000000000000ull,
+  69000000000000000ull, 86000000000000000ull, 87000000000000000ull,
+  860000000000000000ull, 861000000000000000ull, 888000000000000000ull,
+  889000000000000000ull,
+  70000000000000000ull, 71000000000000000ull, 72000000000000000ull,
+  73000000000000000ull, 74000000000000000ull, 75000000000000000ull,
+  76000000000000000ull, 77000000000000000ull, 78000000000000000ull,
+  79000000000000000ull, 96000000000000000ull, 97000000000000000ull,
+  870000000000000000ull, 871000000000000000ull, 898000000000000000ull,
+  899000000000000000ull,
+  100000000000000000ull, 101000000000000000ull, 102000000000000000ull,
+  103000000000000000ull, 104000000000000000ull, 105000000000000000ull,
+  106000000000000000ull, 107000000000000000ull, 108000000000000000ull,
+  109000000000000000ull, 180000000000000000ull, 181000000000000000ull,
+  900000000000000000ull, 901000000000000000ull, 980000000000000000ull,
+  981000000000000000ull,
+  110000000000000000ull, 111000000000000000ull, 112000000000000000ull,
+  113000000000000000ull, 114000000000000000ull, 115000000000000000ull,
+  116000000000000000ull, 117000000000000000ull, 118000000000000000ull,
+  119000000000000000ull, 190000000000000000ull, 191000000000000000ull,
+  910000000000000000ull, 911000000000000000ull, 990000000000000000ull,
+  991000000000000000ull,
+  120000000000000000ull, 121000000000000000ull, 122000000000000000ull,
+  123000000000000000ull, 124000000000000000ull, 125000000000000000ull,
+  126000000000000000ull, 127000000000000000ull, 128000000000000000ull,
+  129000000000000000ull, 182000000000000000ull, 183000000000000000ull,
+  920000000000000000ull, 921000000000000000ull, 908000000000000000ull,
+  909000000000000000ull,
+  130000000000000000ull, 131000000000000000ull, 132000000000000000ull,
+  133000000000000000ull, 134000000000000000ull, 135000000000000000ull,
+  136000000000000000ull, 137000000000000000ull, 138000000000000000ull,
+  139000000000000000ull, 192000000000000000ull, 193000000000000000ull,
+  930000000000000000ull, 931000000000000000ull, 918000000000000000ull,
+  919000000000000000ull,
+  140000000000000000ull, 141000000000000000ull, 142000000000000000ull,
+  143000000000000000ull, 144000000000000000ull, 145000000000000000ull,
+  146000000000000000ull, 147000000000000000ull, 148000000000000000ull,
+  149000000000000000ull, 184000000000000000ull, 185000000000000000ull,
+  940000000000000000ull, 941000000000000000ull, 188000000000000000ull,
+  189000000000000000ull,
+  150000000000000000ull, 151000000000000000ull, 152000000000000000ull,
+  153000000000000000ull, 154000000000000000ull, 155000000000000000ull,
+  156000000000000000ull, 157000000000000000ull, 158000000000000000ull,
+  159000000000000000ull, 194000000000000000ull, 195000000000000000ull,
+  950000000000000000ull, 951000000000000000ull, 198000000000000000ull,
+  199000000000000000ull,
+  160000000000000000ull, 161000000000000000ull, 162000000000000000ull,
+  163000000000000000ull, 164000000000000000ull, 165000000000000000ull,
+  166000000000000000ull, 167000000000000000ull, 168000000000000000ull,
+  169000000000000000ull, 186000000000000000ull, 187000000000000000ull,
+  960000000000000000ull, 961000000000000000ull, 988000000000000000ull,
+  989000000000000000ull,
+  170000000000000000ull, 171000000000000000ull, 172000000000000000ull,
+  173000000000000000ull, 174000000000000000ull, 175000000000000000ull,
+  176000000000000000ull, 177000000000000000ull, 178000000000000000ull,
+  179000000000000000ull, 196000000000000000ull, 197000000000000000ull,
+  970000000000000000ull, 971000000000000000ull, 998000000000000000ull,
+  999000000000000000ull,
+  200000000000000000ull, 201000000000000000ull, 202000000000000000ull,
+  203000000000000000ull, 204000000000000000ull, 205000000000000000ull,
+  206000000000000000ull, 207000000000000000ull, 208000000000000000ull,
+  209000000000000000ull, 280000000000000000ull, 281000000000000000ull,
+  802000000000000000ull, 803000000000000000ull, 882000000000000000ull,
+  883000000000000000ull,
+  210000000000000000ull, 211000000000000000ull, 212000000000000000ull,
+  213000000000000000ull, 214000000000000000ull, 215000000000000000ull,
+  216000000000000000ull, 217000000000000000ull, 218000000000000000ull,
+  219000000000000000ull, 290000000000000000ull, 291000000000000000ull,
+  812000000000000000ull, 813000000000000000ull, 892000000000000000ull,
+  893000000000000000ull,
+  220000000000000000ull, 221000000000000000ull, 222000000000000000ull,
+  223000000000000000ull, 224000000000000000ull, 225000000000000000ull,
+  226000000000000000ull, 227000000000000000ull, 228000000000000000ull,
+  229000000000000000ull, 282000000000000000ull, 283000000000000000ull,
+  822000000000000000ull, 823000000000000000ull, 828000000000000000ull,
+  829000000000000000ull,
+  230000000000000000ull, 231000000000000000ull, 232000000000000000ull,
+  233000000000000000ull, 234000000000000000ull, 235000000000000000ull,
+  236000000000000000ull, 237000000000000000ull, 238000000000000000ull,
+  239000000000000000ull, 292000000000000000ull, 293000000000000000ull,
+  832000000000000000ull, 833000000000000000ull, 838000000000000000ull,
+  839000000000000000ull,
+  240000000000000000ull, 241000000000000000ull, 242000000000000000ull,
+  243000000000000000ull, 244000000000000000ull, 245000000000000000ull,
+  246000000000000000ull, 247000000000000000ull, 248000000000000000ull,
+  249000000000000000ull, 284000000000000000ull, 285000000000000000ull,
+  842000000000000000ull, 843000000000000000ull, 288000000000000000ull,
+  289000000000000000ull,
+  250000000000000000ull, 251000000000000000ull, 252000000000000000ull,
+  253000000000000000ull, 254000000000000000ull, 255000000000000000ull,
+  256000000000000000ull, 257000000000000000ull, 258000000000000000ull,
+  259000000000000000ull, 294000000000000000ull, 295000000000000000ull,
+  852000000000000000ull, 853000000000000000ull, 298000000000000000ull,
+  299000000000000000ull,
+  260000000000000000ull, 261000000000000000ull, 262000000000000000ull,
+  263000000000000000ull, 264000000000000000ull, 265000000000000000ull,
+  266000000000000000ull, 267000000000000000ull, 268000000000000000ull,
+  269000000000000000ull, 286000000000000000ull, 287000000000000000ull,
+  862000000000000000ull, 863000000000000000ull, 888000000000000000ull,
+  889000000000000000ull,
+  270000000000000000ull, 271000000000000000ull, 272000000000000000ull,
+  273000000000000000ull, 274000000000000000ull, 275000000000000000ull,
+  276000000000000000ull, 277000000000000000ull, 278000000000000000ull,
+  279000000000000000ull, 296000000000000000ull, 297000000000000000ull,
+  872000000000000000ull, 873000000000000000ull, 898000000000000000ull,
+  899000000000000000ull,
+  300000000000000000ull, 301000000000000000ull, 302000000000000000ull,
+  303000000000000000ull, 304000000000000000ull, 305000000000000000ull,
+  306000000000000000ull, 307000000000000000ull, 308000000000000000ull,
+  309000000000000000ull, 380000000000000000ull, 381000000000000000ull,
+  902000000000000000ull, 903000000000000000ull, 982000000000000000ull,
+  983000000000000000ull,
+  310000000000000000ull, 311000000000000000ull, 312000000000000000ull,
+  313000000000000000ull, 314000000000000000ull, 315000000000000000ull,
+  316000000000000000ull, 317000000000000000ull, 318000000000000000ull,
+  319000000000000000ull, 390000000000000000ull, 391000000000000000ull,
+  912000000000000000ull, 913000000000000000ull, 992000000000000000ull,
+  993000000000000000ull,
+  320000000000000000ull, 321000000000000000ull, 322000000000000000ull,
+  323000000000000000ull, 324000000000000000ull, 325000000000000000ull,
+  326000000000000000ull, 327000000000000000ull, 328000000000000000ull,
+  329000000000000000ull, 382000000000000000ull, 383000000000000000ull,
+  922000000000000000ull, 923000000000000000ull, 928000000000000000ull,
+  929000000000000000ull,
+  330000000000000000ull, 331000000000000000ull, 332000000000000000ull,
+  333000000000000000ull, 334000000000000000ull, 335000000000000000ull,
+  336000000000000000ull, 337000000000000000ull, 338000000000000000ull,
+  339000000000000000ull, 392000000000000000ull, 393000000000000000ull,
+  932000000000000000ull, 933000000000000000ull, 938000000000000000ull,
+  939000000000000000ull,
+  340000000000000000ull, 341000000000000000ull, 342000000000000000ull,
+  343000000000000000ull, 344000000000000000ull, 345000000000000000ull,
+  346000000000000000ull, 347000000000000000ull, 348000000000000000ull,
+  349000000000000000ull, 384000000000000000ull, 385000000000000000ull,
+  942000000000000000ull, 943000000000000000ull, 388000000000000000ull,
+  389000000000000000ull,
+  350000000000000000ull, 351000000000000000ull, 352000000000000000ull,
+  353000000000000000ull, 354000000000000000ull, 355000000000000000ull,
+  356000000000000000ull, 357000000000000000ull, 358000000000000000ull,
+  359000000000000000ull, 394000000000000000ull, 395000000000000000ull,
+  952000000000000000ull, 953000000000000000ull, 398000000000000000ull,
+  399000000000000000ull,
+  360000000000000000ull, 361000000000000000ull, 362000000000000000ull,
+  363000000000000000ull, 364000000000000000ull, 365000000000000000ull,
+  366000000000000000ull, 367000000000000000ull, 368000000000000000ull,
+  369000000000000000ull, 386000000000000000ull, 387000000000000000ull,
+  962000000000000000ull, 963000000000000000ull, 988000000000000000ull,
+  989000000000000000ull,
+  370000000000000000ull, 371000000000000000ull, 372000000000000000ull,
+  373000000000000000ull, 374000000000000000ull, 375000000000000000ull,
+  376000000000000000ull, 377000000000000000ull, 378000000000000000ull,
+  379000000000000000ull, 396000000000000000ull, 397000000000000000ull,
+  972000000000000000ull, 973000000000000000ull, 998000000000000000ull,
+  999000000000000000ull,
+  400000000000000000ull, 401000000000000000ull, 402000000000000000ull,
+  403000000000000000ull, 404000000000000000ull, 405000000000000000ull,
+  406000000000000000ull, 407000000000000000ull, 408000000000000000ull,
+  409000000000000000ull, 480000000000000000ull, 481000000000000000ull,
+  804000000000000000ull, 805000000000000000ull, 884000000000000000ull,
+  885000000000000000ull,
+  410000000000000000ull, 411000000000000000ull, 412000000000000000ull,
+  413000000000000000ull, 414000000000000000ull, 415000000000000000ull,
+  416000000000000000ull, 417000000000000000ull, 418000000000000000ull,
+  419000000000000000ull, 490000000000000000ull, 491000000000000000ull,
+  814000000000000000ull, 815000000000000000ull, 894000000000000000ull,
+  895000000000000000ull,
+  420000000000000000ull, 421000000000000000ull, 422000000000000000ull,
+  423000000000000000ull, 424000000000000000ull, 425000000000000000ull,
+  426000000000000000ull, 427000000000000000ull, 428000000000000000ull,
+  429000000000000000ull, 482000000000000000ull, 483000000000000000ull,
+  824000000000000000ull, 825000000000000000ull, 848000000000000000ull,
+  849000000000000000ull,
+  430000000000000000ull, 431000000000000000ull, 432000000000000000ull,
+  433000000000000000ull, 434000000000000000ull, 435000000000000000ull,
+  436000000000000000ull, 437000000000000000ull, 438000000000000000ull,
+  439000000000000000ull, 492000000000000000ull, 493000000000000000ull,
+  834000000000000000ull, 835000000000000000ull, 858000000000000000ull,
+  859000000000000000ull,
+  440000000000000000ull, 441000000000000000ull, 442000000000000000ull,
+  443000000000000000ull, 444000000000000000ull, 445000000000000000ull,
+  446000000000000000ull, 447000000000000000ull, 448000000000000000ull,
+  449000000000000000ull, 484000000000000000ull, 485000000000000000ull,
+  844000000000000000ull, 845000000000000000ull, 488000000000000000ull,
+  489000000000000000ull,
+  450000000000000000ull, 451000000000000000ull, 452000000000000000ull,
+  453000000000000000ull, 454000000000000000ull, 455000000000000000ull,
+  456000000000000000ull, 457000000000000000ull, 458000000000000000ull,
+  459000000000000000ull, 494000000000000000ull, 495000000000000000ull,
+  854000000000000000ull, 855000000000000000ull, 498000000000000000ull,
+  499000000000000000ull,
+  460000000000000000ull, 461000000000000000ull, 462000000000000000ull,
+  463000000000000000ull, 464000000000000000ull, 465000000000000000ull,
+  466000000000000000ull, 467000000000000000ull, 468000000000000000ull,
+  469000000000000000ull, 486000000000000000ull, 487000000000000000ull,
+  864000000000000000ull, 865000000000000000ull, 888000000000000000ull,
+  889000000000000000ull,
+  470000000000000000ull, 471000000000000000ull, 472000000000000000ull,
+  473000000000000000ull, 474000000000000000ull, 475000000000000000ull,
+  476000000000000000ull, 477000000000000000ull, 478000000000000000ull,
+  479000000000000000ull, 496000000000000000ull, 497000000000000000ull,
+  874000000000000000ull, 875000000000000000ull, 898000000000000000ull,
+  899000000000000000ull,
+  500000000000000000ull, 501000000000000000ull, 502000000000000000ull,
+  503000000000000000ull, 504000000000000000ull, 505000000000000000ull,
+  506000000000000000ull, 507000000000000000ull, 508000000000000000ull,
+  509000000000000000ull, 580000000000000000ull, 581000000000000000ull,
+  904000000000000000ull, 905000000000000000ull, 984000000000000000ull,
+  985000000000000000ull,
+  510000000000000000ull, 511000000000000000ull, 512000000000000000ull,
+  513000000000000000ull, 514000000000000000ull, 515000000000000000ull,
+  516000000000000000ull, 517000000000000000ull, 518000000000000000ull,
+  519000000000000000ull, 590000000000000000ull, 591000000000000000ull,
+  914000000000000000ull, 915000000000000000ull, 994000000000000000ull,
+  995000000000000000ull,
+  520000000000000000ull, 521000000000000000ull, 522000000000000000ull,
+  523000000000000000ull, 524000000000000000ull, 525000000000000000ull,
+  526000000000000000ull, 527000000000000000ull, 528000000000000000ull,
+  529000000000000000ull, 582000000000000000ull, 583000000000000000ull,
+  924000000000000000ull, 925000000000000000ull, 948000000000000000ull,
+  949000000000000000ull,
+  530000000000000000ull, 531000000000000000ull, 532000000000000000ull,
+  533000000000000000ull, 534000000000000000ull, 535000000000000000ull,
+  536000000000000000ull, 537000000000000000ull, 538000000000000000ull,
+  539000000000000000ull, 592000000000000000ull, 593000000000000000ull,
+  934000000000000000ull, 935000000000000000ull, 958000000000000000ull,
+  959000000000000000ull,
+  540000000000000000ull, 541000000000000000ull, 542000000000000000ull,
+  543000000000000000ull, 544000000000000000ull, 545000000000000000ull,
+  546000000000000000ull, 547000000000000000ull, 548000000000000000ull,
+  549000000000000000ull, 584000000000000000ull, 585000000000000000ull,
+  944000000000000000ull, 945000000000000000ull, 588000000000000000ull,
+  589000000000000000ull,
+  550000000000000000ull, 551000000000000000ull, 552000000000000000ull,
+  553000000000000000ull, 554000000000000000ull, 555000000000000000ull,
+  556000000000000000ull, 557000000000000000ull, 558000000000000000ull,
+  559000000000000000ull, 594000000000000000ull, 595000000000000000ull,
+  954000000000000000ull, 955000000000000000ull, 598000000000000000ull,
+  599000000000000000ull,
+  560000000000000000ull, 561000000000000000ull, 562000000000000000ull,
+  563000000000000000ull, 564000000000000000ull, 565000000000000000ull,
+  566000000000000000ull, 567000000000000000ull, 568000000000000000ull,
+  569000000000000000ull, 586000000000000000ull, 587000000000000000ull,
+  964000000000000000ull, 965000000000000000ull, 988000000000000000ull,
+  989000000000000000ull,
+  570000000000000000ull, 571000000000000000ull, 572000000000000000ull,
+  573000000000000000ull, 574000000000000000ull, 575000000000000000ull,
+  576000000000000000ull, 577000000000000000ull, 578000000000000000ull,
+  579000000000000000ull, 596000000000000000ull, 597000000000000000ull,
+  974000000000000000ull, 975000000000000000ull, 998000000000000000ull,
+  999000000000000000ull,
+  600000000000000000ull, 601000000000000000ull, 602000000000000000ull,
+  603000000000000000ull, 604000000000000000ull, 605000000000000000ull,
+  606000000000000000ull, 607000000000000000ull, 608000000000000000ull,
+  609000000000000000ull, 680000000000000000ull, 681000000000000000ull,
+  806000000000000000ull, 807000000000000000ull, 886000000000000000ull,
+  887000000000000000ull,
+  610000000000000000ull, 611000000000000000ull, 612000000000000000ull,
+  613000000000000000ull, 614000000000000000ull, 615000000000000000ull,
+  616000000000000000ull, 617000000000000000ull, 618000000000000000ull,
+  619000000000000000ull, 690000000000000000ull, 691000000000000000ull,
+  816000000000000000ull, 817000000000000000ull, 896000000000000000ull,
+  897000000000000000ull,
+  620000000000000000ull, 621000000000000000ull, 622000000000000000ull,
+  623000000000000000ull, 624000000000000000ull, 625000000000000000ull,
+  626000000000000000ull, 627000000000000000ull, 628000000000000000ull,
+  629000000000000000ull, 682000000000000000ull, 683000000000000000ull,
+  826000000000000000ull, 827000000000000000ull, 868000000000000000ull,
+  869000000000000000ull,
+  630000000000000000ull, 631000000000000000ull, 632000000000000000ull,
+  633000000000000000ull, 634000000000000000ull, 635000000000000000ull,
+  636000000000000000ull, 637000000000000000ull, 638000000000000000ull,
+  639000000000000000ull, 692000000000000000ull, 693000000000000000ull,
+  836000000000000000ull, 837000000000000000ull, 878000000000000000ull,
+  879000000000000000ull,
+  640000000000000000ull, 641000000000000000ull, 642000000000000000ull,
+  643000000000000000ull, 644000000000000000ull, 645000000000000000ull,
+  646000000000000000ull, 647000000000000000ull, 648000000000000000ull,
+  649000000000000000ull, 684000000000000000ull, 685000000000000000ull,
+  846000000000000000ull, 847000000000000000ull, 688000000000000000ull,
+  689000000000000000ull,
+  650000000000000000ull, 651000000000000000ull, 652000000000000000ull,
+  653000000000000000ull, 654000000000000000ull, 655000000000000000ull,
+  656000000000000000ull, 657000000000000000ull, 658000000000000000ull,
+  659000000000000000ull, 694000000000000000ull, 695000000000000000ull,
+  856000000000000000ull, 857000000000000000ull, 698000000000000000ull,
+  699000000000000000ull,
+  660000000000000000ull, 661000000000000000ull, 662000000000000000ull,
+  663000000000000000ull, 664000000000000000ull, 665000000000000000ull,
+  666000000000000000ull, 667000000000000000ull, 668000000000000000ull,
+  669000000000000000ull, 686000000000000000ull, 687000000000000000ull,
+  866000000000000000ull, 867000000000000000ull, 888000000000000000ull,
+  889000000000000000ull,
+  670000000000000000ull, 671000000000000000ull, 672000000000000000ull,
+  673000000000000000ull, 674000000000000000ull, 675000000000000000ull,
+  676000000000000000ull, 677000000000000000ull, 678000000000000000ull,
+  679000000000000000ull, 696000000000000000ull, 697000000000000000ull,
+  876000000000000000ull, 877000000000000000ull, 898000000000000000ull,
+  899000000000000000ull,
+  700000000000000000ull, 701000000000000000ull, 702000000000000000ull,
+  703000000000000000ull, 704000000000000000ull, 705000000000000000ull,
+  706000000000000000ull, 707000000000000000ull, 708000000000000000ull,
+  709000000000000000ull, 780000000000000000ull, 781000000000000000ull,
+  906000000000000000ull, 907000000000000000ull, 986000000000000000ull,
+  987000000000000000ull,
+  710000000000000000ull, 711000000000000000ull, 712000000000000000ull,
+  713000000000000000ull, 714000000000000000ull, 715000000000000000ull,
+  716000000000000000ull, 717000000000000000ull, 718000000000000000ull,
+  719000000000000000ull, 790000000000000000ull, 791000000000000000ull,
+  916000000000000000ull, 917000000000000000ull, 996000000000000000ull,
+  997000000000000000ull,
+  720000000000000000ull, 721000000000000000ull, 722000000000000000ull,
+  723000000000000000ull, 724000000000000000ull, 725000000000000000ull,
+  726000000000000000ull, 727000000000000000ull, 728000000000000000ull,
+  729000000000000000ull, 782000000000000000ull, 783000000000000000ull,
+  926000000000000000ull, 927000000000000000ull, 968000000000000000ull,
+  969000000000000000ull,
+  730000000000000000ull, 731000000000000000ull, 732000000000000000ull,
+  733000000000000000ull, 734000000000000000ull, 735000000000000000ull,
+  736000000000000000ull, 737000000000000000ull, 738000000000000000ull,
+  739000000000000000ull, 792000000000000000ull, 793000000000000000ull,
+  936000000000000000ull, 937000000000000000ull, 978000000000000000ull,
+  979000000000000000ull,
+  740000000000000000ull, 741000000000000000ull, 742000000000000000ull,
+  743000000000000000ull, 744000000000000000ull, 745000000000000000ull,
+  746000000000000000ull, 747000000000000000ull, 748000000000000000ull,
+  749000000000000000ull, 784000000000000000ull, 785000000000000000ull,
+  946000000000000000ull, 947000000000000000ull, 788000000000000000ull,
+  789000000000000000ull,
+  750000000000000000ull, 751000000000000000ull, 752000000000000000ull,
+  753000000000000000ull, 754000000000000000ull, 755000000000000000ull,
+  756000000000000000ull, 757000000000000000ull, 758000000000000000ull,
+  759000000000000000ull, 794000000000000000ull, 795000000000000000ull,
+  956000000000000000ull, 957000000000000000ull, 798000000000000000ull,
+  799000000000000000ull,
+  760000000000000000ull, 761000000000000000ull, 762000000000000000ull,
+  763000000000000000ull, 764000000000000000ull, 765000000000000000ull,
+  766000000000000000ull, 767000000000000000ull, 768000000000000000ull,
+  769000000000000000ull, 786000000000000000ull, 787000000000000000ull,
+  966000000000000000ull, 967000000000000000ull, 988000000000000000ull,
+  989000000000000000ull,
+  770000000000000000ull, 771000000000000000ull, 772000000000000000ull,
+  773000000000000000ull, 774000000000000000ull, 775000000000000000ull,
+  776000000000000000ull, 777000000000000000ull, 778000000000000000ull,
+  779000000000000000ull, 796000000000000000ull, 797000000000000000ull,
+  976000000000000000ull, 977000000000000000ull, 998000000000000000ull,
+  999000000000000000ull
+};
+
+const UINT64 b2d[] =
+  { 0x000ull, 0x001ull, 0x002ull, 0x003ull, 0x004ull, 0x005ull,
+  0x006ull, 0x007ull, 0x008ull, 0x009ull,
+  0x010ull, 0x011ull, 0x012ull, 0x013ull, 0x014ull, 0x015ull, 0x016ull,
+  0x017ull, 0x018ull, 0x019ull,
+  0x020ull, 0x021ull, 0x022ull, 0x023ull, 0x024ull, 0x025ull, 0x026ull,
+  0x027ull, 0x028ull, 0x029ull,
+  0x030ull, 0x031ull, 0x032ull, 0x033ull, 0x034ull, 0x035ull, 0x036ull,
+  0x037ull, 0x038ull, 0x039ull,
+  0x040ull, 0x041ull, 0x042ull, 0x043ull, 0x044ull, 0x045ull, 0x046ull,
+  0x047ull, 0x048ull, 0x049ull,
+  0x050ull, 0x051ull, 0x052ull, 0x053ull, 0x054ull, 0x055ull, 0x056ull,
+  0x057ull, 0x058ull, 0x059ull,
+  0x060ull, 0x061ull, 0x062ull, 0x063ull, 0x064ull, 0x065ull, 0x066ull,
+  0x067ull, 0x068ull, 0x069ull,
+  0x070ull, 0x071ull, 0x072ull, 0x073ull, 0x074ull, 0x075ull, 0x076ull,
+  0x077ull, 0x078ull, 0x079ull,
+  0x00aull, 0x00bull, 0x02aull, 0x02bull, 0x04aull, 0x04bull, 0x06aull,
+  0x06bull, 0x04eull, 0x04full,
+  0x01aull, 0x01bull, 0x03aull, 0x03bull, 0x05aull, 0x05bull, 0x07aull,
+  0x07bull, 0x05eull, 0x05full,
+  0x080ull, 0x081ull, 0x082ull, 0x083ull, 0x084ull, 0x085ull, 0x086ull,
+  0x087ull, 0x088ull, 0x089ull,
+  0x090ull, 0x091ull, 0x092ull, 0x093ull, 0x094ull, 0x095ull, 0x096ull,
+  0x097ull, 0x098ull, 0x099ull,
+  0x0a0ull, 0x0a1ull, 0x0a2ull, 0x0a3ull, 0x0a4ull, 0x0a5ull, 0x0a6ull,
+  0x0a7ull, 0x0a8ull, 0x0a9ull,
+  0x0b0ull, 0x0b1ull, 0x0b2ull, 0x0b3ull, 0x0b4ull, 0x0b5ull, 0x0b6ull,
+  0x0b7ull, 0x0b8ull, 0x0b9ull,
+  0x0c0ull, 0x0c1ull, 0x0c2ull, 0x0c3ull, 0x0c4ull, 0x0c5ull, 0x0c6ull,
+  0x0c7ull, 0x0c8ull, 0x0c9ull,
+  0x0d0ull, 0x0d1ull, 0x0d2ull, 0x0d3ull, 0x0d4ull, 0x0d5ull, 0x0d6ull,
+  0x0d7ull, 0x0d8ull, 0x0d9ull,
+  0x0e0ull, 0x0e1ull, 0x0e2ull, 0x0e3ull, 0x0e4ull, 0x0e5ull, 0x0e6ull,
+  0x0e7ull, 0x0e8ull, 0x0e9ull,
+  0x0f0ull, 0x0f1ull, 0x0f2ull, 0x0f3ull, 0x0f4ull, 0x0f5ull, 0x0f6ull,
+  0x0f7ull, 0x0f8ull, 0x0f9ull,
+  0x08aull, 0x08bull, 0x0aaull, 0x0abull, 0x0caull, 0x0cbull, 0x0eaull,
+  0x0ebull, 0x0ceull, 0x0cfull,
+  0x09aull, 0x09bull, 0x0baull, 0x0bbull, 0x0daull, 0x0dbull, 0x0faull,
+  0x0fbull, 0x0deull, 0x0dfull,
+  0x100ull, 0x101ull, 0x102ull, 0x103ull, 0x104ull, 0x105ull, 0x106ull,
+  0x107ull, 0x108ull, 0x109ull,
+  0x110ull, 0x111ull, 0x112ull, 0x113ull, 0x114ull, 0x115ull, 0x116ull,
+  0x117ull, 0x118ull, 0x119ull,
+  0x120ull, 0x121ull, 0x122ull, 0x123ull, 0x124ull, 0x125ull, 0x126ull,
+  0x127ull, 0x128ull, 0x129ull,
+  0x130ull, 0x131ull, 0x132ull, 0x133ull, 0x134ull, 0x135ull, 0x136ull,
+  0x137ull, 0x138ull, 0x139ull,
+  0x140ull, 0x141ull, 0x142ull, 0x143ull, 0x144ull, 0x145ull, 0x146ull,
+  0x147ull, 0x148ull, 0x149ull,
+  0x150ull, 0x151ull, 0x152ull, 0x153ull, 0x154ull, 0x155ull, 0x156ull,
+  0x157ull, 0x158ull, 0x159ull,
+  0x160ull, 0x161ull, 0x162ull, 0x163ull, 0x164ull, 0x165ull, 0x166ull,
+  0x167ull, 0x168ull, 0x169ull,
+  0x170ull, 0x171ull, 0x172ull, 0x173ull, 0x174ull, 0x175ull, 0x176ull,
+  0x177ull, 0x178ull, 0x179ull,
+  0x10aull, 0x10bull, 0x12aull, 0x12bull, 0x14aull, 0x14bull, 0x16aull,
+  0x16bull, 0x14eull, 0x14full,
+  0x11aull, 0x11bull, 0x13aull, 0x13bull, 0x15aull, 0x15bull, 0x17aull,
+  0x17bull, 0x15eull, 0x15full,
+  0x180ull, 0x181ull, 0x182ull, 0x183ull, 0x184ull, 0x185ull, 0x186ull,
+  0x187ull, 0x188ull, 0x189ull,
+  0x190ull, 0x191ull, 0x192ull, 0x193ull, 0x194ull, 0x195ull, 0x196ull,
+  0x197ull, 0x198ull, 0x199ull,
+  0x1a0ull, 0x1a1ull, 0x1a2ull, 0x1a3ull, 0x1a4ull, 0x1a5ull, 0x1a6ull,
+  0x1a7ull, 0x1a8ull, 0x1a9ull,
+  0x1b0ull, 0x1b1ull, 0x1b2ull, 0x1b3ull, 0x1b4ull, 0x1b5ull, 0x1b6ull,
+  0x1b7ull, 0x1b8ull, 0x1b9ull,
+  0x1c0ull, 0x1c1ull, 0x1c2ull, 0x1c3ull, 0x1c4ull, 0x1c5ull, 0x1c6ull,
+  0x1c7ull, 0x1c8ull, 0x1c9ull,
+  0x1d0ull, 0x1d1ull, 0x1d2ull, 0x1d3ull, 0x1d4ull, 0x1d5ull, 0x1d6ull,
+  0x1d7ull, 0x1d8ull, 0x1d9ull,
+  0x1e0ull, 0x1e1ull, 0x1e2ull, 0x1e3ull, 0x1e4ull, 0x1e5ull, 0x1e6ull,
+  0x1e7ull, 0x1e8ull, 0x1e9ull,
+  0x1f0ull, 0x1f1ull, 0x1f2ull, 0x1f3ull, 0x1f4ull, 0x1f5ull, 0x1f6ull,
+  0x1f7ull, 0x1f8ull, 0x1f9ull,
+  0x18aull, 0x18bull, 0x1aaull, 0x1abull, 0x1caull, 0x1cbull, 0x1eaull,
+  0x1ebull, 0x1ceull, 0x1cfull,
+  0x19aull, 0x19bull, 0x1baull, 0x1bbull, 0x1daull, 0x1dbull, 0x1faull,
+  0x1fbull, 0x1deull, 0x1dfull,
+  0x200ull, 0x201ull, 0x202ull, 0x203ull, 0x204ull, 0x205ull, 0x206ull,
+  0x207ull, 0x208ull, 0x209ull,
+  0x210ull, 0x211ull, 0x212ull, 0x213ull, 0x214ull, 0x215ull, 0x216ull,
+  0x217ull, 0x218ull, 0x219ull,
+  0x220ull, 0x221ull, 0x222ull, 0x223ull, 0x224ull, 0x225ull, 0x226ull,
+  0x227ull, 0x228ull, 0x229ull,
+  0x230ull, 0x231ull, 0x232ull, 0x233ull, 0x234ull, 0x235ull, 0x236ull,
+  0x237ull, 0x238ull, 0x239ull,
+  0x240ull, 0x241ull, 0x242ull, 0x243ull, 0x244ull, 0x245ull, 0x246ull,
+  0x247ull, 0x248ull, 0x249ull,
+  0x250ull, 0x251ull, 0x252ull, 0x253ull, 0x254ull, 0x255ull, 0x256ull,
+  0x257ull, 0x258ull, 0x259ull,
+  0x260ull, 0x261ull, 0x262ull, 0x263ull, 0x264ull, 0x265ull, 0x266ull,
+  0x267ull, 0x268ull, 0x269ull,
+  0x270ull, 0x271ull, 0x272ull, 0x273ull, 0x274ull, 0x275ull, 0x276ull,
+  0x277ull, 0x278ull, 0x279ull,
+  0x20aull, 0x20bull, 0x22aull, 0x22bull, 0x24aull, 0x24bull, 0x26aull,
+  0x26bull, 0x24eull, 0x24full,
+  0x21aull, 0x21bull, 0x23aull, 0x23bull, 0x25aull, 0x25bull, 0x27aull,
+  0x27bull, 0x25eull, 0x25full,
+  0x280ull, 0x281ull, 0x282ull, 0x283ull, 0x284ull, 0x285ull, 0x286ull,
+  0x287ull, 0x288ull, 0x289ull,
+  0x290ull, 0x291ull, 0x292ull, 0x293ull, 0x294ull, 0x295ull, 0x296ull,
+  0x297ull, 0x298ull, 0x299ull,
+  0x2a0ull, 0x2a1ull, 0x2a2ull, 0x2a3ull, 0x2a4ull, 0x2a5ull, 0x2a6ull,
+  0x2a7ull, 0x2a8ull, 0x2a9ull,
+  0x2b0ull, 0x2b1ull, 0x2b2ull, 0x2b3ull, 0x2b4ull, 0x2b5ull, 0x2b6ull,
+  0x2b7ull, 0x2b8ull, 0x2b9ull,
+  0x2c0ull, 0x2c1ull, 0x2c2ull, 0x2c3ull, 0x2c4ull, 0x2c5ull, 0x2c6ull,
+  0x2c7ull, 0x2c8ull, 0x2c9ull,
+  0x2d0ull, 0x2d1ull, 0x2d2ull, 0x2d3ull, 0x2d4ull, 0x2d5ull, 0x2d6ull,
+  0x2d7ull, 0x2d8ull, 0x2d9ull,
+  0x2e0ull, 0x2e1ull, 0x2e2ull, 0x2e3ull, 0x2e4ull, 0x2e5ull, 0x2e6ull,
+  0x2e7ull, 0x2e8ull, 0x2e9ull,
+  0x2f0ull, 0x2f1ull, 0x2f2ull, 0x2f3ull, 0x2f4ull, 0x2f5ull, 0x2f6ull,
+  0x2f7ull, 0x2f8ull, 0x2f9ull,
+  0x28aull, 0x28bull, 0x2aaull, 0x2abull, 0x2caull, 0x2cbull, 0x2eaull,
+  0x2ebull, 0x2ceull, 0x2cfull,
+  0x29aull, 0x29bull, 0x2baull, 0x2bbull, 0x2daull, 0x2dbull, 0x2faull,
+  0x2fbull, 0x2deull, 0x2dfull,
+  0x300ull, 0x301ull, 0x302ull, 0x303ull, 0x304ull, 0x305ull, 0x306ull,
+  0x307ull, 0x308ull, 0x309ull,
+  0x310ull, 0x311ull, 0x312ull, 0x313ull, 0x314ull, 0x315ull, 0x316ull,
+  0x317ull, 0x318ull, 0x319ull,
+  0x320ull, 0x321ull, 0x322ull, 0x323ull, 0x324ull, 0x325ull, 0x326ull,
+  0x327ull, 0x328ull, 0x329ull,
+  0x330ull, 0x331ull, 0x332ull, 0x333ull, 0x334ull, 0x335ull, 0x336ull,
+  0x337ull, 0x338ull, 0x339ull,
+  0x340ull, 0x341ull, 0x342ull, 0x343ull, 0x344ull, 0x345ull, 0x346ull,
+  0x347ull, 0x348ull, 0x349ull,
+  0x350ull, 0x351ull, 0x352ull, 0x353ull, 0x354ull, 0x355ull, 0x356ull,
+  0x357ull, 0x358ull, 0x359ull,
+  0x360ull, 0x361ull, 0x362ull, 0x363ull, 0x364ull, 0x365ull, 0x366ull,
+  0x367ull, 0x368ull, 0x369ull,
+  0x370ull, 0x371ull, 0x372ull, 0x373ull, 0x374ull, 0x375ull, 0x376ull,
+  0x377ull, 0x378ull, 0x379ull,
+  0x30aull, 0x30bull, 0x32aull, 0x32bull, 0x34aull, 0x34bull, 0x36aull,
+  0x36bull, 0x34eull, 0x34full,
+  0x31aull, 0x31bull, 0x33aull, 0x33bull, 0x35aull, 0x35bull, 0x37aull,
+  0x37bull, 0x35eull, 0x35full,
+  0x380ull, 0x381ull, 0x382ull, 0x383ull, 0x384ull, 0x385ull, 0x386ull,
+  0x387ull, 0x388ull, 0x389ull,
+  0x390ull, 0x391ull, 0x392ull, 0x393ull, 0x394ull, 0x395ull, 0x396ull,
+  0x397ull, 0x398ull, 0x399ull,
+  0x3a0ull, 0x3a1ull, 0x3a2ull, 0x3a3ull, 0x3a4ull, 0x3a5ull, 0x3a6ull,
+  0x3a7ull, 0x3a8ull, 0x3a9ull,
+  0x3b0ull, 0x3b1ull, 0x3b2ull, 0x3b3ull, 0x3b4ull, 0x3b5ull, 0x3b6ull,
+  0x3b7ull, 0x3b8ull, 0x3b9ull,
+  0x3c0ull, 0x3c1ull, 0x3c2ull, 0x3c3ull, 0x3c4ull, 0x3c5ull, 0x3c6ull,
+  0x3c7ull, 0x3c8ull, 0x3c9ull,
+  0x3d0ull, 0x3d1ull, 0x3d2ull, 0x3d3ull, 0x3d4ull, 0x3d5ull, 0x3d6ull,
+  0x3d7ull, 0x3d8ull, 0x3d9ull,
+  0x3e0ull, 0x3e1ull, 0x3e2ull, 0x3e3ull, 0x3e4ull, 0x3e5ull, 0x3e6ull,
+  0x3e7ull, 0x3e8ull, 0x3e9ull,
+  0x3f0ull, 0x3f1ull, 0x3f2ull, 0x3f3ull, 0x3f4ull, 0x3f5ull, 0x3f6ull,
+  0x3f7ull, 0x3f8ull, 0x3f9ull,
+  0x38aull, 0x38bull, 0x3aaull, 0x3abull, 0x3caull, 0x3cbull, 0x3eaull,
+  0x3ebull, 0x3ceull, 0x3cfull,
+  0x39aull, 0x39bull, 0x3baull, 0x3bbull, 0x3daull, 0x3dbull, 0x3faull,
+  0x3fbull, 0x3deull, 0x3dfull,
+  0x00cull, 0x00dull, 0x10cull, 0x10dull, 0x20cull, 0x20dull, 0x30cull,
+  0x30dull, 0x02eull, 0x02full,
+  0x01cull, 0x01dull, 0x11cull, 0x11dull, 0x21cull, 0x21dull, 0x31cull,
+  0x31dull, 0x03eull, 0x03full,
+  0x02cull, 0x02dull, 0x12cull, 0x12dull, 0x22cull, 0x22dull, 0x32cull,
+  0x32dull, 0x12eull, 0x12full,
+  0x03cull, 0x03dull, 0x13cull, 0x13dull, 0x23cull, 0x23dull, 0x33cull,
+  0x33dull, 0x13eull, 0x13full,
+  0x04cull, 0x04dull, 0x14cull, 0x14dull, 0x24cull, 0x24dull, 0x34cull,
+  0x34dull, 0x22eull, 0x22full,
+  0x05cull, 0x05dull, 0x15cull, 0x15dull, 0x25cull, 0x25dull, 0x35cull,
+  0x35dull, 0x23eull, 0x23full,
+  0x06cull, 0x06dull, 0x16cull, 0x16dull, 0x26cull, 0x26dull, 0x36cull,
+  0x36dull, 0x32eull, 0x32full,
+  0x07cull, 0x07dull, 0x17cull, 0x17dull, 0x27cull, 0x27dull, 0x37cull,
+  0x37dull, 0x33eull, 0x33full,
+  0x00eull, 0x00full, 0x10eull, 0x10full, 0x20eull, 0x20full, 0x30eull,
+  0x30full, 0x06eull, 0x06full,
+  0x01eull, 0x01full, 0x11eull, 0x11full, 0x21eull, 0x21full, 0x31eull,
+  0x31full, 0x07eull, 0x07full,
+  0x08cull, 0x08dull, 0x18cull, 0x18dull, 0x28cull, 0x28dull, 0x38cull,
+  0x38dull, 0x0aeull, 0x0afull,
+  0x09cull, 0x09dull, 0x19cull, 0x19dull, 0x29cull, 0x29dull, 0x39cull,
+  0x39dull, 0x0beull, 0x0bfull,
+  0x0acull, 0x0adull, 0x1acull, 0x1adull, 0x2acull, 0x2adull, 0x3acull,
+  0x3adull, 0x1aeull, 0x1afull,
+  0x0bcull, 0x0bdull, 0x1bcull, 0x1bdull, 0x2bcull, 0x2bdull, 0x3bcull,
+  0x3bdull, 0x1beull, 0x1bfull,
+  0x0ccull, 0x0cdull, 0x1ccull, 0x1cdull, 0x2ccull, 0x2cdull, 0x3ccull,
+  0x3cdull, 0x2aeull, 0x2afull,
+  0x0dcull, 0x0ddull, 0x1dcull, 0x1ddull, 0x2dcull, 0x2ddull, 0x3dcull,
+  0x3ddull, 0x2beull, 0x2bfull,
+  0x0ecull, 0x0edull, 0x1ecull, 0x1edull, 0x2ecull, 0x2edull, 0x3ecull,
+  0x3edull, 0x3aeull, 0x3afull,
+  0x0fcull, 0x0fdull, 0x1fcull, 0x1fdull, 0x2fcull, 0x2fdull, 0x3fcull,
+  0x3fdull, 0x3beull, 0x3bfull,
+  0x08eull, 0x08full, 0x18eull, 0x18full, 0x28eull, 0x28full, 0x38eull,
+  0x38full, 0x0eeull, 0x0efull,
+  0x09eull, 0x09full, 0x19eull, 0x19full, 0x29eull, 0x29full, 0x39eull,
+  0x39full, 0x0feull, 0x0ffull
+};
+
+const UINT64 b2d2[] =
+  { 0x000ull << 10, 0x001ull << 10, 0x002ull << 10, 0x003ull << 10,
+  0x004ull << 10, 0x005ull << 10, 0x006ull << 10, 0x007ull << 10,
+    0x008ull << 10,
+  0x009ull << 10,
+  0x010ull << 10, 0x011ull << 10, 0x012ull << 10, 0x013ull << 10,
+  0x014ull << 10, 0x015ull << 10, 0x016ull << 10, 0x017ull << 10,
+  0x018ull << 10, 0x019ull << 10,
+  0x020ull << 10, 0x021ull << 10, 0x022ull << 10, 0x023ull << 10,
+  0x024ull << 10, 0x025ull << 10, 0x026ull << 10, 0x027ull << 10,
+  0x028ull << 10, 0x029ull << 10,
+  0x030ull << 10, 0x031ull << 10, 0x032ull << 10, 0x033ull << 10,
+  0x034ull << 10, 0x035ull << 10, 0x036ull << 10, 0x037ull << 10,
+  0x038ull << 10, 0x039ull << 10,
+  0x040ull << 10, 0x041ull << 10, 0x042ull << 10, 0x043ull << 10,
+  0x044ull << 10, 0x045ull << 10, 0x046ull << 10, 0x047ull << 10,
+  0x048ull << 10, 0x049ull << 10,
+  0x050ull << 10, 0x051ull << 10, 0x052ull << 10, 0x053ull << 10,
+  0x054ull << 10, 0x055ull << 10, 0x056ull << 10, 0x057ull << 10,
+  0x058ull << 10, 0x059ull << 10,
+  0x060ull << 10, 0x061ull << 10, 0x062ull << 10, 0x063ull << 10,
+  0x064ull << 10, 0x065ull << 10, 0x066ull << 10, 0x067ull << 10,
+  0x068ull << 10, 0x069ull << 10,
+  0x070ull << 10, 0x071ull << 10, 0x072ull << 10, 0x073ull << 10,
+  0x074ull << 10, 0x075ull << 10, 0x076ull << 10, 0x077ull << 10,
+  0x078ull << 10, 0x079ull << 10,
+  0x00aull << 10, 0x00bull << 10, 0x02aull << 10, 0x02bull << 10,
+  0x04aull << 10, 0x04bull << 10, 0x06aull << 10, 0x06bull << 10,
+  0x04eull << 10, 0x04full << 10,
+  0x01aull << 10, 0x01bull << 10, 0x03aull << 10, 0x03bull << 10,
+  0x05aull << 10, 0x05bull << 10, 0x07aull << 10, 0x07bull << 10,
+  0x05eull << 10, 0x05full << 10,
+  0x080ull << 10, 0x081ull << 10, 0x082ull << 10, 0x083ull << 10,
+  0x084ull << 10, 0x085ull << 10, 0x086ull << 10, 0x087ull << 10,
+  0x088ull << 10, 0x089ull << 10,
+  0x090ull << 10, 0x091ull << 10, 0x092ull << 10, 0x093ull << 10,
+  0x094ull << 10, 0x095ull << 10, 0x096ull << 10, 0x097ull << 10,
+  0x098ull << 10, 0x099ull << 10,
+  0x0a0ull << 10, 0x0a1ull << 10, 0x0a2ull << 10, 0x0a3ull << 10,
+  0x0a4ull << 10, 0x0a5ull << 10, 0x0a6ull << 10, 0x0a7ull << 10,
+  0x0a8ull << 10, 0x0a9ull << 10,
+  0x0b0ull << 10, 0x0b1ull << 10, 0x0b2ull << 10, 0x0b3ull << 10,
+  0x0b4ull << 10, 0x0b5ull << 10, 0x0b6ull << 10, 0x0b7ull << 10,
+  0x0b8ull << 10, 0x0b9ull << 10,
+  0x0c0ull << 10, 0x0c1ull << 10, 0x0c2ull << 10, 0x0c3ull << 10,
+  0x0c4ull << 10, 0x0c5ull << 10, 0x0c6ull << 10, 0x0c7ull << 10,
+  0x0c8ull << 10, 0x0c9ull << 10,
+  0x0d0ull << 10, 0x0d1ull << 10, 0x0d2ull << 10, 0x0d3ull << 10,
+  0x0d4ull << 10, 0x0d5ull << 10, 0x0d6ull << 10, 0x0d7ull << 10,
+  0x0d8ull << 10, 0x0d9ull << 10,
+  0x0e0ull << 10, 0x0e1ull << 10, 0x0e2ull << 10, 0x0e3ull << 10,
+  0x0e4ull << 10, 0x0e5ull << 10, 0x0e6ull << 10, 0x0e7ull << 10,
+  0x0e8ull << 10, 0x0e9ull << 10,
+  0x0f0ull << 10, 0x0f1ull << 10, 0x0f2ull << 10, 0x0f3ull << 10,
+  0x0f4ull << 10, 0x0f5ull << 10, 0x0f6ull << 10, 0x0f7ull << 10,
+  0x0f8ull << 10, 0x0f9ull << 10,
+  0x08aull << 10, 0x08bull << 10, 0x0aaull << 10, 0x0abull << 10,
+  0x0caull << 10, 0x0cbull << 10, 0x0eaull << 10, 0x0ebull << 10,
+  0x0ceull << 10, 0x0cfull << 10,
+  0x09aull << 10, 0x09bull << 10, 0x0baull << 10, 0x0bbull << 10,
+  0x0daull << 10, 0x0dbull << 10, 0x0faull << 10, 0x0fbull << 10,
+  0x0deull << 10, 0x0dfull << 10,
+  0x100ull << 10, 0x101ull << 10, 0x102ull << 10, 0x103ull << 10,
+  0x104ull << 10, 0x105ull << 10, 0x106ull << 10, 0x107ull << 10,
+  0x108ull << 10, 0x109ull << 10,
+  0x110ull << 10, 0x111ull << 10, 0x112ull << 10, 0x113ull << 10,
+  0x114ull << 10, 0x115ull << 10, 0x116ull << 10, 0x117ull << 10,
+  0x118ull << 10, 0x119ull << 10,
+  0x120ull << 10, 0x121ull << 10, 0x122ull << 10, 0x123ull << 10,
+  0x124ull << 10, 0x125ull << 10, 0x126ull << 10, 0x127ull << 10,
+  0x128ull << 10, 0x129ull << 10,
+  0x130ull << 10, 0x131ull << 10, 0x132ull << 10, 0x133ull << 10,
+  0x134ull << 10, 0x135ull << 10, 0x136ull << 10, 0x137ull << 10,
+  0x138ull << 10, 0x139ull << 10,
+  0x140ull << 10, 0x141ull << 10, 0x142ull << 10, 0x143ull << 10,
+  0x144ull << 10, 0x145ull << 10, 0x146ull << 10, 0x147ull << 10,
+  0x148ull << 10, 0x149ull << 10,
+  0x150ull << 10, 0x151ull << 10, 0x152ull << 10, 0x153ull << 10,
+  0x154ull << 10, 0x155ull << 10, 0x156ull << 10, 0x157ull << 10,
+  0x158ull << 10, 0x159ull << 10,
+  0x160ull << 10, 0x161ull << 10, 0x162ull << 10, 0x163ull << 10,
+  0x164ull << 10, 0x165ull << 10, 0x166ull << 10, 0x167ull << 10,
+  0x168ull << 10, 0x169ull << 10,
+  0x170ull << 10, 0x171ull << 10, 0x172ull << 10, 0x173ull << 10,
+  0x174ull << 10, 0x175ull << 10, 0x176ull << 10, 0x177ull << 10,
+  0x178ull << 10, 0x179ull << 10,
+  0x10aull << 10, 0x10bull << 10, 0x12aull << 10, 0x12bull << 10,
+  0x14aull << 10, 0x14bull << 10, 0x16aull << 10, 0x16bull << 10,
+  0x14eull << 10, 0x14full << 10,
+  0x11aull << 10, 0x11bull << 10, 0x13aull << 10, 0x13bull << 10,
+  0x15aull << 10, 0x15bull << 10, 0x17aull << 10, 0x17bull << 10,
+  0x15eull << 10, 0x15full << 10,
+  0x180ull << 10, 0x181ull << 10, 0x182ull << 10, 0x183ull << 10,
+  0x184ull << 10, 0x185ull << 10, 0x186ull << 10, 0x187ull << 10,
+  0x188ull << 10, 0x189ull << 10,
+  0x190ull << 10, 0x191ull << 10, 0x192ull << 10, 0x193ull << 10,
+  0x194ull << 10, 0x195ull << 10, 0x196ull << 10, 0x197ull << 10,
+  0x198ull << 10, 0x199ull << 10,
+  0x1a0ull << 10, 0x1a1ull << 10, 0x1a2ull << 10, 0x1a3ull << 10,
+  0x1a4ull << 10, 0x1a5ull << 10, 0x1a6ull << 10, 0x1a7ull << 10,
+  0x1a8ull << 10, 0x1a9ull << 10,
+  0x1b0ull << 10, 0x1b1ull << 10, 0x1b2ull << 10, 0x1b3ull << 10,
+  0x1b4ull << 10, 0x1b5ull << 10, 0x1b6ull << 10, 0x1b7ull << 10,
+  0x1b8ull << 10, 0x1b9ull << 10,
+  0x1c0ull << 10, 0x1c1ull << 10, 0x1c2ull << 10, 0x1c3ull << 10,
+  0x1c4ull << 10, 0x1c5ull << 10, 0x1c6ull << 10, 0x1c7ull << 10,
+  0x1c8ull << 10, 0x1c9ull << 10,
+  0x1d0ull << 10, 0x1d1ull << 10, 0x1d2ull << 10, 0x1d3ull << 10,
+  0x1d4ull << 10, 0x1d5ull << 10, 0x1d6ull << 10, 0x1d7ull << 10,
+  0x1d8ull << 10, 0x1d9ull << 10,
+  0x1e0ull << 10, 0x1e1ull << 10, 0x1e2ull << 10, 0x1e3ull << 10,
+  0x1e4ull << 10, 0x1e5ull << 10, 0x1e6ull << 10, 0x1e7ull << 10,
+  0x1e8ull << 10, 0x1e9ull << 10,
+  0x1f0ull << 10, 0x1f1ull << 10, 0x1f2ull << 10, 0x1f3ull << 10,
+  0x1f4ull << 10, 0x1f5ull << 10, 0x1f6ull << 10, 0x1f7ull << 10,
+  0x1f8ull << 10, 0x1f9ull << 10,
+  0x18aull << 10, 0x18bull << 10, 0x1aaull << 10, 0x1abull << 10,
+  0x1caull << 10, 0x1cbull << 10, 0x1eaull << 10, 0x1ebull << 10,
+  0x1ceull << 10, 0x1cfull << 10,
+  0x19aull << 10, 0x19bull << 10, 0x1baull << 10, 0x1bbull << 10,
+  0x1daull << 10, 0x1dbull << 10, 0x1faull << 10, 0x1fbull << 10,
+  0x1deull << 10, 0x1dfull << 10,
+  0x200ull << 10, 0x201ull << 10, 0x202ull << 10, 0x203ull << 10,
+  0x204ull << 10, 0x205ull << 10, 0x206ull << 10, 0x207ull << 10,
+  0x208ull << 10, 0x209ull << 10,
+  0x210ull << 10, 0x211ull << 10, 0x212ull << 10, 0x213ull << 10,
+  0x214ull << 10, 0x215ull << 10, 0x216ull << 10, 0x217ull << 10,
+  0x218ull << 10, 0x219ull << 10,
+  0x220ull << 10, 0x221ull << 10, 0x222ull << 10, 0x223ull << 10,
+  0x224ull << 10, 0x225ull << 10, 0x226ull << 10, 0x227ull << 10,
+  0x228ull << 10, 0x229ull << 10,
+  0x230ull << 10, 0x231ull << 10, 0x232ull << 10, 0x233ull << 10,
+  0x234ull << 10, 0x235ull << 10, 0x236ull << 10, 0x237ull << 10,
+  0x238ull << 10, 0x239ull << 10,
+  0x240ull << 10, 0x241ull << 10, 0x242ull << 10, 0x243ull << 10,
+  0x244ull << 10, 0x245ull << 10, 0x246ull << 10, 0x247ull << 10,
+  0x248ull << 10, 0x249ull << 10,
+  0x250ull << 10, 0x251ull << 10, 0x252ull << 10, 0x253ull << 10,
+  0x254ull << 10, 0x255ull << 10, 0x256ull << 10, 0x257ull << 10,
+  0x258ull << 10, 0x259ull << 10,
+  0x260ull << 10, 0x261ull << 10, 0x262ull << 10, 0x263ull << 10,
+  0x264ull << 10, 0x265ull << 10, 0x266ull << 10, 0x267ull << 10,
+  0x268ull << 10, 0x269ull << 10,
+  0x270ull << 10, 0x271ull << 10, 0x272ull << 10, 0x273ull << 10,
+  0x274ull << 10, 0x275ull << 10, 0x276ull << 10, 0x277ull << 10,
+  0x278ull << 10, 0x279ull << 10,
+  0x20aull << 10, 0x20bull << 10, 0x22aull << 10, 0x22bull << 10,
+  0x24aull << 10, 0x24bull << 10, 0x26aull << 10, 0x26bull << 10,
+  0x24eull << 10, 0x24full << 10,
+  0x21aull << 10, 0x21bull << 10, 0x23aull << 10, 0x23bull << 10,
+  0x25aull << 10, 0x25bull << 10, 0x27aull << 10, 0x27bull << 10,
+  0x25eull << 10, 0x25full << 10,
+  0x280ull << 10, 0x281ull << 10, 0x282ull << 10, 0x283ull << 10,
+  0x284ull << 10, 0x285ull << 10, 0x286ull << 10, 0x287ull << 10,
+  0x288ull << 10, 0x289ull << 10,
+  0x290ull << 10, 0x291ull << 10, 0x292ull << 10, 0x293ull << 10,
+  0x294ull << 10, 0x295ull << 10, 0x296ull << 10, 0x297ull << 10,
+  0x298ull << 10, 0x299ull << 10,
+  0x2a0ull << 10, 0x2a1ull << 10, 0x2a2ull << 10, 0x2a3ull << 10,
+  0x2a4ull << 10, 0x2a5ull << 10, 0x2a6ull << 10, 0x2a7ull << 10,
+  0x2a8ull << 10, 0x2a9ull << 10,
+  0x2b0ull << 10, 0x2b1ull << 10, 0x2b2ull << 10, 0x2b3ull << 10,
+  0x2b4ull << 10, 0x2b5ull << 10, 0x2b6ull << 10, 0x2b7ull << 10,
+  0x2b8ull << 10, 0x2b9ull << 10,
+  0x2c0ull << 10, 0x2c1ull << 10, 0x2c2ull << 10, 0x2c3ull << 10,
+  0x2c4ull << 10, 0x2c5ull << 10, 0x2c6ull << 10, 0x2c7ull << 10,
+  0x2c8ull << 10, 0x2c9ull << 10,
+  0x2d0ull << 10, 0x2d1ull << 10, 0x2d2ull << 10, 0x2d3ull << 10,
+  0x2d4ull << 10, 0x2d5ull << 10, 0x2d6ull << 10, 0x2d7ull << 10,
+  0x2d8ull << 10, 0x2d9ull << 10,
+  0x2e0ull << 10, 0x2e1ull << 10, 0x2e2ull << 10, 0x2e3ull << 10,
+  0x2e4ull << 10, 0x2e5ull << 10, 0x2e6ull << 10, 0x2e7ull << 10,
+  0x2e8ull << 10, 0x2e9ull << 10,
+  0x2f0ull << 10, 0x2f1ull << 10, 0x2f2ull << 10, 0x2f3ull << 10,
+  0x2f4ull << 10, 0x2f5ull << 10, 0x2f6ull << 10, 0x2f7ull << 10,
+  0x2f8ull << 10, 0x2f9ull << 10,
+  0x28aull << 10, 0x28bull << 10, 0x2aaull << 10, 0x2abull << 10,
+  0x2caull << 10, 0x2cbull << 10, 0x2eaull << 10, 0x2ebull << 10,
+  0x2ceull << 10, 0x2cfull << 10,
+  0x29aull << 10, 0x29bull << 10, 0x2baull << 10, 0x2bbull << 10,
+  0x2daull << 10, 0x2dbull << 10, 0x2faull << 10, 0x2fbull << 10,
+  0x2deull << 10, 0x2dfull << 10,
+  0x300ull << 10, 0x301ull << 10, 0x302ull << 10, 0x303ull << 10,
+  0x304ull << 10, 0x305ull << 10, 0x306ull << 10, 0x307ull << 10,
+  0x308ull << 10, 0x309ull << 10,
+  0x310ull << 10, 0x311ull << 10, 0x312ull << 10, 0x313ull << 10,
+  0x314ull << 10, 0x315ull << 10, 0x316ull << 10, 0x317ull << 10,
+  0x318ull << 10, 0x319ull << 10,
+  0x320ull << 10, 0x321ull << 10, 0x322ull << 10, 0x323ull << 10,
+  0x324ull << 10, 0x325ull << 10, 0x326ull << 10, 0x327ull << 10,
+  0x328ull << 10, 0x329ull << 10,
+  0x330ull << 10, 0x331ull << 10, 0x332ull << 10, 0x333ull << 10,
+  0x334ull << 10, 0x335ull << 10, 0x336ull << 10, 0x337ull << 10,
+  0x338ull << 10, 0x339ull << 10,
+  0x340ull << 10, 0x341ull << 10, 0x342ull << 10, 0x343ull << 10,
+  0x344ull << 10, 0x345ull << 10, 0x346ull << 10, 0x347ull << 10,
+  0x348ull << 10, 0x349ull << 10,
+  0x350ull << 10, 0x351ull << 10, 0x352ull << 10, 0x353ull << 10,
+  0x354ull << 10, 0x355ull << 10, 0x356ull << 10, 0x357ull << 10,
+  0x358ull << 10, 0x359ull << 10,
+  0x360ull << 10, 0x361ull << 10, 0x362ull << 10, 0x363ull << 10,
+  0x364ull << 10, 0x365ull << 10, 0x366ull << 10, 0x367ull << 10,
+  0x368ull << 10, 0x369ull << 10,
+  0x370ull << 10, 0x371ull << 10, 0x372ull << 10, 0x373ull << 10,
+  0x374ull << 10, 0x375ull << 10, 0x376ull << 10, 0x377ull << 10,
+  0x378ull << 10, 0x379ull << 10,
+  0x30aull << 10, 0x30bull << 10, 0x32aull << 10, 0x32bull << 10,
+  0x34aull << 10, 0x34bull << 10, 0x36aull << 10, 0x36bull << 10,
+  0x34eull << 10, 0x34full << 10,
+  0x31aull << 10, 0x31bull << 10, 0x33aull << 10, 0x33bull << 10,
+  0x35aull << 10, 0x35bull << 10, 0x37aull << 10, 0x37bull << 10,
+  0x35eull << 10, 0x35full << 10,
+  0x380ull << 10, 0x381ull << 10, 0x382ull << 10, 0x383ull << 10,
+  0x384ull << 10, 0x385ull << 10, 0x386ull << 10, 0x387ull << 10,
+  0x388ull << 10, 0x389ull << 10,
+  0x390ull << 10, 0x391ull << 10, 0x392ull << 10, 0x393ull << 10,
+  0x394ull << 10, 0x395ull << 10, 0x396ull << 10, 0x397ull << 10,
+  0x398ull << 10, 0x399ull << 10,
+  0x3a0ull << 10, 0x3a1ull << 10, 0x3a2ull << 10, 0x3a3ull << 10,
+  0x3a4ull << 10, 0x3a5ull << 10, 0x3a6ull << 10, 0x3a7ull << 10,
+  0x3a8ull << 10, 0x3a9ull << 10,
+  0x3b0ull << 10, 0x3b1ull << 10, 0x3b2ull << 10, 0x3b3ull << 10,
+  0x3b4ull << 10, 0x3b5ull << 10, 0x3b6ull << 10, 0x3b7ull << 10,
+  0x3b8ull << 10, 0x3b9ull << 10,
+  0x3c0ull << 10, 0x3c1ull << 10, 0x3c2ull << 10, 0x3c3ull << 10,
+  0x3c4ull << 10, 0x3c5ull << 10, 0x3c6ull << 10, 0x3c7ull << 10,
+  0x3c8ull << 10, 0x3c9ull << 10,
+  0x3d0ull << 10, 0x3d1ull << 10, 0x3d2ull << 10, 0x3d3ull << 10,
+  0x3d4ull << 10, 0x3d5ull << 10, 0x3d6ull << 10, 0x3d7ull << 10,
+  0x3d8ull << 10, 0x3d9ull << 10,
+  0x3e0ull << 10, 0x3e1ull << 10, 0x3e2ull << 10, 0x3e3ull << 10,
+  0x3e4ull << 10, 0x3e5ull << 10, 0x3e6ull << 10, 0x3e7ull << 10,
+  0x3e8ull << 10, 0x3e9ull << 10,
+  0x3f0ull << 10, 0x3f1ull << 10, 0x3f2ull << 10, 0x3f3ull << 10,
+  0x3f4ull << 10, 0x3f5ull << 10, 0x3f6ull << 10, 0x3f7ull << 10,
+  0x3f8ull << 10, 0x3f9ull << 10,
+  0x38aull << 10, 0x38bull << 10, 0x3aaull << 10, 0x3abull << 10,
+  0x3caull << 10, 0x3cbull << 10, 0x3eaull << 10, 0x3ebull << 10,
+  0x3ceull << 10, 0x3cfull << 10,
+  0x39aull << 10, 0x39bull << 10, 0x3baull << 10, 0x3bbull << 10,
+  0x3daull << 10, 0x3dbull << 10, 0x3faull << 10, 0x3fbull << 10,
+  0x3deull << 10, 0x3dfull << 10,
+  0x00cull << 10, 0x00dull << 10, 0x10cull << 10, 0x10dull << 10,
+  0x20cull << 10, 0x20dull << 10, 0x30cull << 10, 0x30dull << 10,
+  0x02eull << 10, 0x02full << 10,
+  0x01cull << 10, 0x01dull << 10, 0x11cull << 10, 0x11dull << 10,
+  0x21cull << 10, 0x21dull << 10, 0x31cull << 10, 0x31dull << 10,
+  0x03eull << 10, 0x03full << 10,
+  0x02cull << 10, 0x02dull << 10, 0x12cull << 10, 0x12dull << 10,
+  0x22cull << 10, 0x22dull << 10, 0x32cull << 10, 0x32dull << 10,
+  0x12eull << 10, 0x12full << 10,
+  0x03cull << 10, 0x03dull << 10, 0x13cull << 10, 0x13dull << 10,
+  0x23cull << 10, 0x23dull << 10, 0x33cull << 10, 0x33dull << 10,
+  0x13eull << 10, 0x13full << 10,
+  0x04cull << 10, 0x04dull << 10, 0x14cull << 10, 0x14dull << 10,
+  0x24cull << 10, 0x24dull << 10, 0x34cull << 10, 0x34dull << 10,
+  0x22eull << 10, 0x22full << 10,
+  0x05cull << 10, 0x05dull << 10, 0x15cull << 10, 0x15dull << 10,
+  0x25cull << 10, 0x25dull << 10, 0x35cull << 10, 0x35dull << 10,
+  0x23eull << 10, 0x23full << 10,
+  0x06cull << 10, 0x06dull << 10, 0x16cull << 10, 0x16dull << 10,
+  0x26cull << 10, 0x26dull << 10, 0x36cull << 10, 0x36dull << 10,
+  0x32eull << 10, 0x32full << 10,
+  0x07cull << 10, 0x07dull << 10, 0x17cull << 10, 0x17dull << 10,
+  0x27cull << 10, 0x27dull << 10, 0x37cull << 10, 0x37dull << 10,
+  0x33eull << 10, 0x33full << 10,
+  0x00eull << 10, 0x00full << 10, 0x10eull << 10, 0x10full << 10,
+  0x20eull << 10, 0x20full << 10, 0x30eull << 10, 0x30full << 10,
+  0x06eull << 10, 0x06full << 10,
+  0x01eull << 10, 0x01full << 10, 0x11eull << 10, 0x11full << 10,
+  0x21eull << 10, 0x21full << 10, 0x31eull << 10, 0x31full << 10,
+  0x07eull << 10, 0x07full << 10,
+  0x08cull << 10, 0x08dull << 10, 0x18cull << 10, 0x18dull << 10,
+  0x28cull << 10, 0x28dull << 10, 0x38cull << 10, 0x38dull << 10,
+  0x0aeull << 10, 0x0afull << 10,
+  0x09cull << 10, 0x09dull << 10, 0x19cull << 10, 0x19dull << 10,
+  0x29cull << 10, 0x29dull << 10, 0x39cull << 10, 0x39dull << 10,
+  0x0beull << 10, 0x0bfull << 10,
+  0x0acull << 10, 0x0adull << 10, 0x1acull << 10, 0x1adull << 10,
+  0x2acull << 10, 0x2adull << 10, 0x3acull << 10, 0x3adull << 10,
+  0x1aeull << 10, 0x1afull << 10,
+  0x0bcull << 10, 0x0bdull << 10, 0x1bcull << 10, 0x1bdull << 10,
+  0x2bcull << 10, 0x2bdull << 10, 0x3bcull << 10, 0x3bdull << 10,
+  0x1beull << 10, 0x1bfull << 10,
+  0x0ccull << 10, 0x0cdull << 10, 0x1ccull << 10, 0x1cdull << 10,
+  0x2ccull << 10, 0x2cdull << 10, 0x3ccull << 10, 0x3cdull << 10,
+  0x2aeull << 10, 0x2afull << 10,
+  0x0dcull << 10, 0x0ddull << 10, 0x1dcull << 10, 0x1ddull << 10,
+  0x2dcull << 10, 0x2ddull << 10, 0x3dcull << 10, 0x3ddull << 10,
+  0x2beull << 10, 0x2bfull << 10,
+  0x0ecull << 10, 0x0edull << 10, 0x1ecull << 10, 0x1edull << 10,
+  0x2ecull << 10, 0x2edull << 10, 0x3ecull << 10, 0x3edull << 10,
+  0x3aeull << 10, 0x3afull << 10,
+  0x0fcull << 10, 0x0fdull << 10, 0x1fcull << 10, 0x1fdull << 10,
+  0x2fcull << 10, 0x2fdull << 10, 0x3fcull << 10, 0x3fdull << 10,
+  0x3beull << 10, 0x3bfull << 10,
+  0x08eull << 10, 0x08full << 10, 0x18eull << 10, 0x18full << 10,
+  0x28eull << 10, 0x28full << 10, 0x38eull << 10, 0x38full << 10,
+  0x0eeull << 10, 0x0efull << 10,
+  0x09eull << 10, 0x09full << 10, 0x19eull << 10, 0x19full << 10,
+  0x29eull << 10, 0x29full << 10, 0x39eull << 10, 0x39full << 10,
+  0x0feull << 10, 0x0ffull << 10
+};
+
+const UINT64 b2d3[] =
+  { 0x000ull << 20, 0x001ull << 20, 0x002ull << 20, 0x003ull << 20,
+  0x004ull << 20, 0x005ull << 20, 0x006ull << 20, 0x007ull << 20,
+    0x008ull << 20,
+  0x009ull << 20,
+  0x010ull << 20, 0x011ull << 20, 0x012ull << 20, 0x013ull << 20,
+  0x014ull << 20, 0x015ull << 20, 0x016ull << 20, 0x017ull << 20,
+  0x018ull << 20, 0x019ull << 20,
+  0x020ull << 20, 0x021ull << 20, 0x022ull << 20, 0x023ull << 20,
+  0x024ull << 20, 0x025ull << 20, 0x026ull << 20, 0x027ull << 20,
+  0x028ull << 20, 0x029ull << 20,
+  0x030ull << 20, 0x031ull << 20, 0x032ull << 20, 0x033ull << 20,
+  0x034ull << 20, 0x035ull << 20, 0x036ull << 20, 0x037ull << 20,
+  0x038ull << 20, 0x039ull << 20,
+  0x040ull << 20, 0x041ull << 20, 0x042ull << 20, 0x043ull << 20,
+  0x044ull << 20, 0x045ull << 20, 0x046ull << 20, 0x047ull << 20,
+  0x048ull << 20, 0x049ull << 20,
+  0x050ull << 20, 0x051ull << 20, 0x052ull << 20, 0x053ull << 20,
+  0x054ull << 20, 0x055ull << 20, 0x056ull << 20, 0x057ull << 20,
+  0x058ull << 20, 0x059ull << 20,
+  0x060ull << 20, 0x061ull << 20, 0x062ull << 20, 0x063ull << 20,
+  0x064ull << 20, 0x065ull << 20, 0x066ull << 20, 0x067ull << 20,
+  0x068ull << 20, 0x069ull << 20,
+  0x070ull << 20, 0x071ull << 20, 0x072ull << 20, 0x073ull << 20,
+  0x074ull << 20, 0x075ull << 20, 0x076ull << 20, 0x077ull << 20,
+  0x078ull << 20, 0x079ull << 20,
+  0x00aull << 20, 0x00bull << 20, 0x02aull << 20, 0x02bull << 20,
+  0x04aull << 20, 0x04bull << 20, 0x06aull << 20, 0x06bull << 20,
+  0x04eull << 20, 0x04full << 20,
+  0x01aull << 20, 0x01bull << 20, 0x03aull << 20, 0x03bull << 20,
+  0x05aull << 20, 0x05bull << 20, 0x07aull << 20, 0x07bull << 20,
+  0x05eull << 20, 0x05full << 20,
+  0x080ull << 20, 0x081ull << 20, 0x082ull << 20, 0x083ull << 20,
+  0x084ull << 20, 0x085ull << 20, 0x086ull << 20, 0x087ull << 20,
+  0x088ull << 20, 0x089ull << 20,
+  0x090ull << 20, 0x091ull << 20, 0x092ull << 20, 0x093ull << 20,
+  0x094ull << 20, 0x095ull << 20, 0x096ull << 20, 0x097ull << 20,
+  0x098ull << 20, 0x099ull << 20,
+  0x0a0ull << 20, 0x0a1ull << 20, 0x0a2ull << 20, 0x0a3ull << 20,
+  0x0a4ull << 20, 0x0a5ull << 20, 0x0a6ull << 20, 0x0a7ull << 20,
+  0x0a8ull << 20, 0x0a9ull << 20,
+  0x0b0ull << 20, 0x0b1ull << 20, 0x0b2ull << 20, 0x0b3ull << 20,
+  0x0b4ull << 20, 0x0b5ull << 20, 0x0b6ull << 20, 0x0b7ull << 20,
+  0x0b8ull << 20, 0x0b9ull << 20,
+  0x0c0ull << 20, 0x0c1ull << 20, 0x0c2ull << 20, 0x0c3ull << 20,
+  0x0c4ull << 20, 0x0c5ull << 20, 0x0c6ull << 20, 0x0c7ull << 20,
+  0x0c8ull << 20, 0x0c9ull << 20,
+  0x0d0ull << 20, 0x0d1ull << 20, 0x0d2ull << 20, 0x0d3ull << 20,
+  0x0d4ull << 20, 0x0d5ull << 20, 0x0d6ull << 20, 0x0d7ull << 20,
+  0x0d8ull << 20, 0x0d9ull << 20,
+  0x0e0ull << 20, 0x0e1ull << 20, 0x0e2ull << 20, 0x0e3ull << 20,
+  0x0e4ull << 20, 0x0e5ull << 20, 0x0e6ull << 20, 0x0e7ull << 20,
+  0x0e8ull << 20, 0x0e9ull << 20,
+  0x0f0ull << 20, 0x0f1ull << 20, 0x0f2ull << 20, 0x0f3ull << 20,
+  0x0f4ull << 20, 0x0f5ull << 20, 0x0f6ull << 20, 0x0f7ull << 20,
+  0x0f8ull << 20, 0x0f9ull << 20,
+  0x08aull << 20, 0x08bull << 20, 0x0aaull << 20, 0x0abull << 20,
+  0x0caull << 20, 0x0cbull << 20, 0x0eaull << 20, 0x0ebull << 20,
+  0x0ceull << 20, 0x0cfull << 20,
+  0x09aull << 20, 0x09bull << 20, 0x0baull << 20, 0x0bbull << 20,
+  0x0daull << 20, 0x0dbull << 20, 0x0faull << 20, 0x0fbull << 20,
+  0x0deull << 20, 0x0dfull << 20,
+  0x100ull << 20, 0x101ull << 20, 0x102ull << 20, 0x103ull << 20,
+  0x104ull << 20, 0x105ull << 20, 0x106ull << 20, 0x107ull << 20,
+  0x108ull << 20, 0x109ull << 20,
+  0x110ull << 20, 0x111ull << 20, 0x112ull << 20, 0x113ull << 20,
+  0x114ull << 20, 0x115ull << 20, 0x116ull << 20, 0x117ull << 20,
+  0x118ull << 20, 0x119ull << 20,
+  0x120ull << 20, 0x121ull << 20, 0x122ull << 20, 0x123ull << 20,
+  0x124ull << 20, 0x125ull << 20, 0x126ull << 20, 0x127ull << 20,
+  0x128ull << 20, 0x129ull << 20,
+  0x130ull << 20, 0x131ull << 20, 0x132ull << 20, 0x133ull << 20,
+  0x134ull << 20, 0x135ull << 20, 0x136ull << 20, 0x137ull << 20,
+  0x138ull << 20, 0x139ull << 20,
+  0x140ull << 20, 0x141ull << 20, 0x142ull << 20, 0x143ull << 20,
+  0x144ull << 20, 0x145ull << 20, 0x146ull << 20, 0x147ull << 20,
+  0x148ull << 20, 0x149ull << 20,
+  0x150ull << 20, 0x151ull << 20, 0x152ull << 20, 0x153ull << 20,
+  0x154ull << 20, 0x155ull << 20, 0x156ull << 20, 0x157ull << 20,
+  0x158ull << 20, 0x159ull << 20,
+  0x160ull << 20, 0x161ull << 20, 0x162ull << 20, 0x163ull << 20,
+  0x164ull << 20, 0x165ull << 20, 0x166ull << 20, 0x167ull << 20,
+  0x168ull << 20, 0x169ull << 20,
+  0x170ull << 20, 0x171ull << 20, 0x172ull << 20, 0x173ull << 20,
+  0x174ull << 20, 0x175ull << 20, 0x176ull << 20, 0x177ull << 20,
+  0x178ull << 20, 0x179ull << 20,
+  0x10aull << 20, 0x10bull << 20, 0x12aull << 20, 0x12bull << 20,
+  0x14aull << 20, 0x14bull << 20, 0x16aull << 20, 0x16bull << 20,
+  0x14eull << 20, 0x14full << 20,
+  0x11aull << 20, 0x11bull << 20, 0x13aull << 20, 0x13bull << 20,
+  0x15aull << 20, 0x15bull << 20, 0x17aull << 20, 0x17bull << 20,
+  0x15eull << 20, 0x15full << 20,
+  0x180ull << 20, 0x181ull << 20, 0x182ull << 20, 0x183ull << 20,
+  0x184ull << 20, 0x185ull << 20, 0x186ull << 20, 0x187ull << 20,
+  0x188ull << 20, 0x189ull << 20,
+  0x190ull << 20, 0x191ull << 20, 0x192ull << 20, 0x193ull << 20,
+  0x194ull << 20, 0x195ull << 20, 0x196ull << 20, 0x197ull << 20,
+  0x198ull << 20, 0x199ull << 20,
+  0x1a0ull << 20, 0x1a1ull << 20, 0x1a2ull << 20, 0x1a3ull << 20,
+  0x1a4ull << 20, 0x1a5ull << 20, 0x1a6ull << 20, 0x1a7ull << 20,
+  0x1a8ull << 20, 0x1a9ull << 20,
+  0x1b0ull << 20, 0x1b1ull << 20, 0x1b2ull << 20, 0x1b3ull << 20,
+  0x1b4ull << 20, 0x1b5ull << 20, 0x1b6ull << 20, 0x1b7ull << 20,
+  0x1b8ull << 20, 0x1b9ull << 20,
+  0x1c0ull << 20, 0x1c1ull << 20, 0x1c2ull << 20, 0x1c3ull << 20,
+  0x1c4ull << 20, 0x1c5ull << 20, 0x1c6ull << 20, 0x1c7ull << 20,
+  0x1c8ull << 20, 0x1c9ull << 20,
+  0x1d0ull << 20, 0x1d1ull << 20, 0x1d2ull << 20, 0x1d3ull << 20,
+  0x1d4ull << 20, 0x1d5ull << 20, 0x1d6ull << 20, 0x1d7ull << 20,
+  0x1d8ull << 20, 0x1d9ull << 20,
+  0x1e0ull << 20, 0x1e1ull << 20, 0x1e2ull << 20, 0x1e3ull << 20,
+  0x1e4ull << 20, 0x1e5ull << 20, 0x1e6ull << 20, 0x1e7ull << 20,
+  0x1e8ull << 20, 0x1e9ull << 20,
+  0x1f0ull << 20, 0x1f1ull << 20, 0x1f2ull << 20, 0x1f3ull << 20,
+  0x1f4ull << 20, 0x1f5ull << 20, 0x1f6ull << 20, 0x1f7ull << 20,
+  0x1f8ull << 20, 0x1f9ull << 20,
+  0x18aull << 20, 0x18bull << 20, 0x1aaull << 20, 0x1abull << 20,
+  0x1caull << 20, 0x1cbull << 20, 0x1eaull << 20, 0x1ebull << 20,
+  0x1ceull << 20, 0x1cfull << 20,
+  0x19aull << 20, 0x19bull << 20, 0x1baull << 20, 0x1bbull << 20,
+  0x1daull << 20, 0x1dbull << 20, 0x1faull << 20, 0x1fbull << 20,
+  0x1deull << 20, 0x1dfull << 20,
+  0x200ull << 20, 0x201ull << 20, 0x202ull << 20, 0x203ull << 20,
+  0x204ull << 20, 0x205ull << 20, 0x206ull << 20, 0x207ull << 20,
+  0x208ull << 20, 0x209ull << 20,
+  0x210ull << 20, 0x211ull << 20, 0x212ull << 20, 0x213ull << 20,
+  0x214ull << 20, 0x215ull << 20, 0x216ull << 20, 0x217ull << 20,
+  0x218ull << 20, 0x219ull << 20,
+  0x220ull << 20, 0x221ull << 20, 0x222ull << 20, 0x223ull << 20,
+  0x224ull << 20, 0x225ull << 20, 0x226ull << 20, 0x227ull << 20,
+  0x228ull << 20, 0x229ull << 20,
+  0x230ull << 20, 0x231ull << 20, 0x232ull << 20, 0x233ull << 20,
+  0x234ull << 20, 0x235ull << 20, 0x236ull << 20, 0x237ull << 20,
+  0x238ull << 20, 0x239ull << 20,
+  0x240ull << 20, 0x241ull << 20, 0x242ull << 20, 0x243ull << 20,
+  0x244ull << 20, 0x245ull << 20, 0x246ull << 20, 0x247ull << 20,
+  0x248ull << 20, 0x249ull << 20,
+  0x250ull << 20, 0x251ull << 20, 0x252ull << 20, 0x253ull << 20,
+  0x254ull << 20, 0x255ull << 20, 0x256ull << 20, 0x257ull << 20,
+  0x258ull << 20, 0x259ull << 20,
+  0x260ull << 20, 0x261ull << 20, 0x262ull << 20, 0x263ull << 20,
+  0x264ull << 20, 0x265ull << 20, 0x266ull << 20, 0x267ull << 20,
+  0x268ull << 20, 0x269ull << 20,
+  0x270ull << 20, 0x271ull << 20, 0x272ull << 20, 0x273ull << 20,
+  0x274ull << 20, 0x275ull << 20, 0x276ull << 20, 0x277ull << 20,
+  0x278ull << 20, 0x279ull << 20,
+  0x20aull << 20, 0x20bull << 20, 0x22aull << 20, 0x22bull << 20,
+  0x24aull << 20, 0x24bull << 20, 0x26aull << 20, 0x26bull << 20,
+  0x24eull << 20, 0x24full << 20,
+  0x21aull << 20, 0x21bull << 20, 0x23aull << 20, 0x23bull << 20,
+  0x25aull << 20, 0x25bull << 20, 0x27aull << 20, 0x27bull << 20,
+  0x25eull << 20, 0x25full << 20,
+  0x280ull << 20, 0x281ull << 20, 0x282ull << 20, 0x283ull << 20,
+  0x284ull << 20, 0x285ull << 20, 0x286ull << 20, 0x287ull << 20,
+  0x288ull << 20, 0x289ull << 20,
+  0x290ull << 20, 0x291ull << 20, 0x292ull << 20, 0x293ull << 20,
+  0x294ull << 20, 0x295ull << 20, 0x296ull << 20, 0x297ull << 20,
+  0x298ull << 20, 0x299ull << 20,
+  0x2a0ull << 20, 0x2a1ull << 20, 0x2a2ull << 20, 0x2a3ull << 20,
+  0x2a4ull << 20, 0x2a5ull << 20, 0x2a6ull << 20, 0x2a7ull << 20,
+  0x2a8ull << 20, 0x2a9ull << 20,
+  0x2b0ull << 20, 0x2b1ull << 20, 0x2b2ull << 20, 0x2b3ull << 20,
+  0x2b4ull << 20, 0x2b5ull << 20, 0x2b6ull << 20, 0x2b7ull << 20,
+  0x2b8ull << 20, 0x2b9ull << 20,
+  0x2c0ull << 20, 0x2c1ull << 20, 0x2c2ull << 20, 0x2c3ull << 20,
+  0x2c4ull << 20, 0x2c5ull << 20, 0x2c6ull << 20, 0x2c7ull << 20,
+  0x2c8ull << 20, 0x2c9ull << 20,
+  0x2d0ull << 20, 0x2d1ull << 20, 0x2d2ull << 20, 0x2d3ull << 20,
+  0x2d4ull << 20, 0x2d5ull << 20, 0x2d6ull << 20, 0x2d7ull << 20,
+  0x2d8ull << 20, 0x2d9ull << 20,
+  0x2e0ull << 20, 0x2e1ull << 20, 0x2e2ull << 20, 0x2e3ull << 20,
+  0x2e4ull << 20, 0x2e5ull << 20, 0x2e6ull << 20, 0x2e7ull << 20,
+  0x2e8ull << 20, 0x2e9ull << 20,
+  0x2f0ull << 20, 0x2f1ull << 20, 0x2f2ull << 20, 0x2f3ull << 20,
+  0x2f4ull << 20, 0x2f5ull << 20, 0x2f6ull << 20, 0x2f7ull << 20,
+  0x2f8ull << 20, 0x2f9ull << 20,
+  0x28aull << 20, 0x28bull << 20, 0x2aaull << 20, 0x2abull << 20,
+  0x2caull << 20, 0x2cbull << 20, 0x2eaull << 20, 0x2ebull << 20,
+  0x2ceull << 20, 0x2cfull << 20,
+  0x29aull << 20, 0x29bull << 20, 0x2baull << 20, 0x2bbull << 20,
+  0x2daull << 20, 0x2dbull << 20, 0x2faull << 20, 0x2fbull << 20,
+  0x2deull << 20, 0x2dfull << 20,
+  0x300ull << 20, 0x301ull << 20, 0x302ull << 20, 0x303ull << 20,
+  0x304ull << 20, 0x305ull << 20, 0x306ull << 20, 0x307ull << 20,
+  0x308ull << 20, 0x309ull << 20,
+  0x310ull << 20, 0x311ull << 20, 0x312ull << 20, 0x313ull << 20,
+  0x314ull << 20, 0x315ull << 20, 0x316ull << 20, 0x317ull << 20,
+  0x318ull << 20, 0x319ull << 20,
+  0x320ull << 20, 0x321ull << 20, 0x322ull << 20, 0x323ull << 20,
+  0x324ull << 20, 0x325ull << 20, 0x326ull << 20, 0x327ull << 20,
+  0x328ull << 20, 0x329ull << 20,
+  0x330ull << 20, 0x331ull << 20, 0x332ull << 20, 0x333ull << 20,
+  0x334ull << 20, 0x335ull << 20, 0x336ull << 20, 0x337ull << 20,
+  0x338ull << 20, 0x339ull << 20,
+  0x340ull << 20, 0x341ull << 20, 0x342ull << 20, 0x343ull << 20,
+  0x344ull << 20, 0x345ull << 20, 0x346ull << 20, 0x347ull << 20,
+  0x348ull << 20, 0x349ull << 20,
+  0x350ull << 20, 0x351ull << 20, 0x352ull << 20, 0x353ull << 20,
+  0x354ull << 20, 0x355ull << 20, 0x356ull << 20, 0x357ull << 20,
+  0x358ull << 20, 0x359ull << 20,
+  0x360ull << 20, 0x361ull << 20, 0x362ull << 20, 0x363ull << 20,
+  0x364ull << 20, 0x365ull << 20, 0x366ull << 20, 0x367ull << 20,
+  0x368ull << 20, 0x369ull << 20,
+  0x370ull << 20, 0x371ull << 20, 0x372ull << 20, 0x373ull << 20,
+  0x374ull << 20, 0x375ull << 20, 0x376ull << 20, 0x377ull << 20,
+  0x378ull << 20, 0x379ull << 20,
+  0x30aull << 20, 0x30bull << 20, 0x32aull << 20, 0x32bull << 20,
+  0x34aull << 20, 0x34bull << 20, 0x36aull << 20, 0x36bull << 20,
+  0x34eull << 20, 0x34full << 20,
+  0x31aull << 20, 0x31bull << 20, 0x33aull << 20, 0x33bull << 20,
+  0x35aull << 20, 0x35bull << 20, 0x37aull << 20, 0x37bull << 20,
+  0x35eull << 20, 0x35full << 20,
+  0x380ull << 20, 0x381ull << 20, 0x382ull << 20, 0x383ull << 20,
+  0x384ull << 20, 0x385ull << 20, 0x386ull << 20, 0x387ull << 20,
+  0x388ull << 20, 0x389ull << 20,
+  0x390ull << 20, 0x391ull << 20, 0x392ull << 20, 0x393ull << 20,
+  0x394ull << 20, 0x395ull << 20, 0x396ull << 20, 0x397ull << 20,
+  0x398ull << 20, 0x399ull << 20,
+  0x3a0ull << 20, 0x3a1ull << 20, 0x3a2ull << 20, 0x3a3ull << 20,
+  0x3a4ull << 20, 0x3a5ull << 20, 0x3a6ull << 20, 0x3a7ull << 20,
+  0x3a8ull << 20, 0x3a9ull << 20,
+  0x3b0ull << 20, 0x3b1ull << 20, 0x3b2ull << 20, 0x3b3ull << 20,
+  0x3b4ull << 20, 0x3b5ull << 20, 0x3b6ull << 20, 0x3b7ull << 20,
+  0x3b8ull << 20, 0x3b9ull << 20,
+  0x3c0ull << 20, 0x3c1ull << 20, 0x3c2ull << 20, 0x3c3ull << 20,
+  0x3c4ull << 20, 0x3c5ull << 20, 0x3c6ull << 20, 0x3c7ull << 20,
+  0x3c8ull << 20, 0x3c9ull << 20,
+  0x3d0ull << 20, 0x3d1ull << 20, 0x3d2ull << 20, 0x3d3ull << 20,
+  0x3d4ull << 20, 0x3d5ull << 20, 0x3d6ull << 20, 0x3d7ull << 20,
+  0x3d8ull << 20, 0x3d9ull << 20,
+  0x3e0ull << 20, 0x3e1ull << 20, 0x3e2ull << 20, 0x3e3ull << 20,
+  0x3e4ull << 20, 0x3e5ull << 20, 0x3e6ull << 20, 0x3e7ull << 20,
+  0x3e8ull << 20, 0x3e9ull << 20,
+  0x3f0ull << 20, 0x3f1ull << 20, 0x3f2ull << 20, 0x3f3ull << 20,
+  0x3f4ull << 20, 0x3f5ull << 20, 0x3f6ull << 20, 0x3f7ull << 20,
+  0x3f8ull << 20, 0x3f9ull << 20,
+  0x38aull << 20, 0x38bull << 20, 0x3aaull << 20, 0x3abull << 20,
+  0x3caull << 20, 0x3cbull << 20, 0x3eaull << 20, 0x3ebull << 20,
+  0x3ceull << 20, 0x3cfull << 20,
+  0x39aull << 20, 0x39bull << 20, 0x3baull << 20, 0x3bbull << 20,
+  0x3daull << 20, 0x3dbull << 20, 0x3faull << 20, 0x3fbull << 20,
+  0x3deull << 20, 0x3dfull << 20,
+  0x00cull << 20, 0x00dull << 20, 0x10cull << 20, 0x10dull << 20,
+  0x20cull << 20, 0x20dull << 20, 0x30cull << 20, 0x30dull << 20,
+  0x02eull << 20, 0x02full << 20,
+  0x01cull << 20, 0x01dull << 20, 0x11cull << 20, 0x11dull << 20,
+  0x21cull << 20, 0x21dull << 20, 0x31cull << 20, 0x31dull << 20,
+  0x03eull << 20, 0x03full << 20,
+  0x02cull << 20, 0x02dull << 20, 0x12cull << 20, 0x12dull << 20,
+  0x22cull << 20, 0x22dull << 20, 0x32cull << 20, 0x32dull << 20,
+  0x12eull << 20, 0x12full << 20,
+  0x03cull << 20, 0x03dull << 20, 0x13cull << 20, 0x13dull << 20,
+  0x23cull << 20, 0x23dull << 20, 0x33cull << 20, 0x33dull << 20,
+  0x13eull << 20, 0x13full << 20,
+  0x04cull << 20, 0x04dull << 20, 0x14cull << 20, 0x14dull << 20,
+  0x24cull << 20, 0x24dull << 20, 0x34cull << 20, 0x34dull << 20,
+  0x22eull << 20, 0x22full << 20,
+  0x05cull << 20, 0x05dull << 20, 0x15cull << 20, 0x15dull << 20,
+  0x25cull << 20, 0x25dull << 20, 0x35cull << 20, 0x35dull << 20,
+  0x23eull << 20, 0x23full << 20,
+  0x06cull << 20, 0x06dull << 20, 0x16cull << 20, 0x16dull << 20,
+  0x26cull << 20, 0x26dull << 20, 0x36cull << 20, 0x36dull << 20,
+  0x32eull << 20, 0x32full << 20,
+  0x07cull << 20, 0x07dull << 20, 0x17cull << 20, 0x17dull << 20,
+  0x27cull << 20, 0x27dull << 20, 0x37cull << 20, 0x37dull << 20,
+  0x33eull << 20, 0x33full << 20,
+  0x00eull << 20, 0x00full << 20, 0x10eull << 20, 0x10full << 20,
+  0x20eull << 20, 0x20full << 20, 0x30eull << 20, 0x30full << 20,
+  0x06eull << 20, 0x06full << 20,
+  0x01eull << 20, 0x01full << 20, 0x11eull << 20, 0x11full << 20,
+  0x21eull << 20, 0x21full << 20, 0x31eull << 20, 0x31full << 20,
+  0x07eull << 20, 0x07full << 20,
+  0x08cull << 20, 0x08dull << 20, 0x18cull << 20, 0x18dull << 20,
+  0x28cull << 20, 0x28dull << 20, 0x38cull << 20, 0x38dull << 20,
+  0x0aeull << 20, 0x0afull << 20,
+  0x09cull << 20, 0x09dull << 20, 0x19cull << 20, 0x19dull << 20,
+  0x29cull << 20, 0x29dull << 20, 0x39cull << 20, 0x39dull << 20,
+  0x0beull << 20, 0x0bfull << 20,
+  0x0acull << 20, 0x0adull << 20, 0x1acull << 20, 0x1adull << 20,
+  0x2acull << 20, 0x2adull << 20, 0x3acull << 20, 0x3adull << 20,
+  0x1aeull << 20, 0x1afull << 20,
+  0x0bcull << 20, 0x0bdull << 20, 0x1bcull << 20, 0x1bdull << 20,
+  0x2bcull << 20, 0x2bdull << 20, 0x3bcull << 20, 0x3bdull << 20,
+  0x1beull << 20, 0x1bfull << 20,
+  0x0ccull << 20, 0x0cdull << 20, 0x1ccull << 20, 0x1cdull << 20,
+  0x2ccull << 20, 0x2cdull << 20, 0x3ccull << 20, 0x3cdull << 20,
+  0x2aeull << 20, 0x2afull << 20,
+  0x0dcull << 20, 0x0ddull << 20, 0x1dcull << 20, 0x1ddull << 20,
+  0x2dcull << 20, 0x2ddull << 20, 0x3dcull << 20, 0x3ddull << 20,
+  0x2beull << 20, 0x2bfull << 20,
+  0x0ecull << 20, 0x0edull << 20, 0x1ecull << 20, 0x1edull << 20,
+  0x2ecull << 20, 0x2edull << 20, 0x3ecull << 20, 0x3edull << 20,
+  0x3aeull << 20, 0x3afull << 20,
+  0x0fcull << 20, 0x0fdull << 20, 0x1fcull << 20, 0x1fdull << 20,
+  0x2fcull << 20, 0x2fdull << 20, 0x3fcull << 20, 0x3fdull << 20,
+  0x3beull << 20, 0x3bfull << 20,
+  0x08eull << 20, 0x08full << 20, 0x18eull << 20, 0x18full << 20,
+  0x28eull << 20, 0x28full << 20, 0x38eull << 20, 0x38full << 20,
+  0x0eeull << 20, 0x0efull << 20,
+  0x09eull << 20, 0x09full << 20, 0x19eull << 20, 0x19full << 20,
+  0x29eull << 20, 0x29full << 20, 0x39eull << 20, 0x39full << 20,
+  0x0feull << 20, 0x0ffull << 20
+};
+
+const UINT64 b2d4[] =
+  { 0x000ull << 30, 0x001ull << 30, 0x002ull << 30, 0x003ull << 30,
+  0x004ull << 30, 0x005ull << 30, 0x006ull << 30, 0x007ull << 30,
+    0x008ull << 30,
+  0x009ull << 30,
+  0x010ull << 30, 0x011ull << 30, 0x012ull << 30, 0x013ull << 30,
+  0x014ull << 30, 0x015ull << 30, 0x016ull << 30, 0x017ull << 30,
+  0x018ull << 30, 0x019ull << 30,
+  0x020ull << 30, 0x021ull << 30, 0x022ull << 30, 0x023ull << 30,
+  0x024ull << 30, 0x025ull << 30, 0x026ull << 30, 0x027ull << 30,
+  0x028ull << 30, 0x029ull << 30,
+  0x030ull << 30, 0x031ull << 30, 0x032ull << 30, 0x033ull << 30,
+  0x034ull << 30, 0x035ull << 30, 0x036ull << 30, 0x037ull << 30,
+  0x038ull << 30, 0x039ull << 30,
+  0x040ull << 30, 0x041ull << 30, 0x042ull << 30, 0x043ull << 30,
+  0x044ull << 30, 0x045ull << 30, 0x046ull << 30, 0x047ull << 30,
+  0x048ull << 30, 0x049ull << 30,
+  0x050ull << 30, 0x051ull << 30, 0x052ull << 30, 0x053ull << 30,
+  0x054ull << 30, 0x055ull << 30, 0x056ull << 30, 0x057ull << 30,
+  0x058ull << 30, 0x059ull << 30,
+  0x060ull << 30, 0x061ull << 30, 0x062ull << 30, 0x063ull << 30,
+  0x064ull << 30, 0x065ull << 30, 0x066ull << 30, 0x067ull << 30,
+  0x068ull << 30, 0x069ull << 30,
+  0x070ull << 30, 0x071ull << 30, 0x072ull << 30, 0x073ull << 30,
+  0x074ull << 30, 0x075ull << 30, 0x076ull << 30, 0x077ull << 30,
+  0x078ull << 30, 0x079ull << 30,
+  0x00aull << 30, 0x00bull << 30, 0x02aull << 30, 0x02bull << 30,
+  0x04aull << 30, 0x04bull << 30, 0x06aull << 30, 0x06bull << 30,
+  0x04eull << 30, 0x04full << 30,
+  0x01aull << 30, 0x01bull << 30, 0x03aull << 30, 0x03bull << 30,
+  0x05aull << 30, 0x05bull << 30, 0x07aull << 30, 0x07bull << 30,
+  0x05eull << 30, 0x05full << 30,
+  0x080ull << 30, 0x081ull << 30, 0x082ull << 30, 0x083ull << 30,
+  0x084ull << 30, 0x085ull << 30, 0x086ull << 30, 0x087ull << 30,
+  0x088ull << 30, 0x089ull << 30,
+  0x090ull << 30, 0x091ull << 30, 0x092ull << 30, 0x093ull << 30,
+  0x094ull << 30, 0x095ull << 30, 0x096ull << 30, 0x097ull << 30,
+  0x098ull << 30, 0x099ull << 30,
+  0x0a0ull << 30, 0x0a1ull << 30, 0x0a2ull << 30, 0x0a3ull << 30,
+  0x0a4ull << 30, 0x0a5ull << 30, 0x0a6ull << 30, 0x0a7ull << 30,
+  0x0a8ull << 30, 0x0a9ull << 30,
+  0x0b0ull << 30, 0x0b1ull << 30, 0x0b2ull << 30, 0x0b3ull << 30,
+  0x0b4ull << 30, 0x0b5ull << 30, 0x0b6ull << 30, 0x0b7ull << 30,
+  0x0b8ull << 30, 0x0b9ull << 30,
+  0x0c0ull << 30, 0x0c1ull << 30, 0x0c2ull << 30, 0x0c3ull << 30,
+  0x0c4ull << 30, 0x0c5ull << 30, 0x0c6ull << 30, 0x0c7ull << 30,
+  0x0c8ull << 30, 0x0c9ull << 30,
+  0x0d0ull << 30, 0x0d1ull << 30, 0x0d2ull << 30, 0x0d3ull << 30,
+  0x0d4ull << 30, 0x0d5ull << 30, 0x0d6ull << 30, 0x0d7ull << 30,
+  0x0d8ull << 30, 0x0d9ull << 30,
+  0x0e0ull << 30, 0x0e1ull << 30, 0x0e2ull << 30, 0x0e3ull << 30,
+  0x0e4ull << 30, 0x0e5ull << 30, 0x0e6ull << 30, 0x0e7ull << 30,
+  0x0e8ull << 30, 0x0e9ull << 30,
+  0x0f0ull << 30, 0x0f1ull << 30, 0x0f2ull << 30, 0x0f3ull << 30,
+  0x0f4ull << 30, 0x0f5ull << 30, 0x0f6ull << 30, 0x0f7ull << 30,
+  0x0f8ull << 30, 0x0f9ull << 30,
+  0x08aull << 30, 0x08bull << 30, 0x0aaull << 30, 0x0abull << 30,
+  0x0caull << 30, 0x0cbull << 30, 0x0eaull << 30, 0x0ebull << 30,
+  0x0ceull << 30, 0x0cfull << 30,
+  0x09aull << 30, 0x09bull << 30, 0x0baull << 30, 0x0bbull << 30,
+  0x0daull << 30, 0x0dbull << 30, 0x0faull << 30, 0x0fbull << 30,
+  0x0deull << 30, 0x0dfull << 30,
+  0x100ull << 30, 0x101ull << 30, 0x102ull << 30, 0x103ull << 30,
+  0x104ull << 30, 0x105ull << 30, 0x106ull << 30, 0x107ull << 30,
+  0x108ull << 30, 0x109ull << 30,
+  0x110ull << 30, 0x111ull << 30, 0x112ull << 30, 0x113ull << 30,
+  0x114ull << 30, 0x115ull << 30, 0x116ull << 30, 0x117ull << 30,
+  0x118ull << 30, 0x119ull << 30,
+  0x120ull << 30, 0x121ull << 30, 0x122ull << 30, 0x123ull << 30,
+  0x124ull << 30, 0x125ull << 30, 0x126ull << 30, 0x127ull << 30,
+  0x128ull << 30, 0x129ull << 30,
+  0x130ull << 30, 0x131ull << 30, 0x132ull << 30, 0x133ull << 30,
+  0x134ull << 30, 0x135ull << 30, 0x136ull << 30, 0x137ull << 30,
+  0x138ull << 30, 0x139ull << 30,
+  0x140ull << 30, 0x141ull << 30, 0x142ull << 30, 0x143ull << 30,
+  0x144ull << 30, 0x145ull << 30, 0x146ull << 30, 0x147ull << 30,
+  0x148ull << 30, 0x149ull << 30,
+  0x150ull << 30, 0x151ull << 30, 0x152ull << 30, 0x153ull << 30,
+  0x154ull << 30, 0x155ull << 30, 0x156ull << 30, 0x157ull << 30,
+  0x158ull << 30, 0x159ull << 30,
+  0x160ull << 30, 0x161ull << 30, 0x162ull << 30, 0x163ull << 30,
+  0x164ull << 30, 0x165ull << 30, 0x166ull << 30, 0x167ull << 30,
+  0x168ull << 30, 0x169ull << 30,
+  0x170ull << 30, 0x171ull << 30, 0x172ull << 30, 0x173ull << 30,
+  0x174ull << 30, 0x175ull << 30, 0x176ull << 30, 0x177ull << 30,
+  0x178ull << 30, 0x179ull << 30,
+  0x10aull << 30, 0x10bull << 30, 0x12aull << 30, 0x12bull << 30,
+  0x14aull << 30, 0x14bull << 30, 0x16aull << 30, 0x16bull << 30,
+  0x14eull << 30, 0x14full << 30,
+  0x11aull << 30, 0x11bull << 30, 0x13aull << 30, 0x13bull << 30,
+  0x15aull << 30, 0x15bull << 30, 0x17aull << 30, 0x17bull << 30,
+  0x15eull << 30, 0x15full << 30,
+  0x180ull << 30, 0x181ull << 30, 0x182ull << 30, 0x183ull << 30,
+  0x184ull << 30, 0x185ull << 30, 0x186ull << 30, 0x187ull << 30,
+  0x188ull << 30, 0x189ull << 30,
+  0x190ull << 30, 0x191ull << 30, 0x192ull << 30, 0x193ull << 30,
+  0x194ull << 30, 0x195ull << 30, 0x196ull << 30, 0x197ull << 30,
+  0x198ull << 30, 0x199ull << 30,
+  0x1a0ull << 30, 0x1a1ull << 30, 0x1a2ull << 30, 0x1a3ull << 30,
+  0x1a4ull << 30, 0x1a5ull << 30, 0x1a6ull << 30, 0x1a7ull << 30,
+  0x1a8ull << 30, 0x1a9ull << 30,
+  0x1b0ull << 30, 0x1b1ull << 30, 0x1b2ull << 30, 0x1b3ull << 30,
+  0x1b4ull << 30, 0x1b5ull << 30, 0x1b6ull << 30, 0x1b7ull << 30,
+  0x1b8ull << 30, 0x1b9ull << 30,
+  0x1c0ull << 30, 0x1c1ull << 30, 0x1c2ull << 30, 0x1c3ull << 30,
+  0x1c4ull << 30, 0x1c5ull << 30, 0x1c6ull << 30, 0x1c7ull << 30,
+  0x1c8ull << 30, 0x1c9ull << 30,
+  0x1d0ull << 30, 0x1d1ull << 30, 0x1d2ull << 30, 0x1d3ull << 30,
+  0x1d4ull << 30, 0x1d5ull << 30, 0x1d6ull << 30, 0x1d7ull << 30,
+  0x1d8ull << 30, 0x1d9ull << 30,
+  0x1e0ull << 30, 0x1e1ull << 30, 0x1e2ull << 30, 0x1e3ull << 30,
+  0x1e4ull << 30, 0x1e5ull << 30, 0x1e6ull << 30, 0x1e7ull << 30,
+  0x1e8ull << 30, 0x1e9ull << 30,
+  0x1f0ull << 30, 0x1f1ull << 30, 0x1f2ull << 30, 0x1f3ull << 30,
+  0x1f4ull << 30, 0x1f5ull << 30, 0x1f6ull << 30, 0x1f7ull << 30,
+  0x1f8ull << 30, 0x1f9ull << 30,
+  0x18aull << 30, 0x18bull << 30, 0x1aaull << 30, 0x1abull << 30,
+  0x1caull << 30, 0x1cbull << 30, 0x1eaull << 30, 0x1ebull << 30,
+  0x1ceull << 30, 0x1cfull << 30,
+  0x19aull << 30, 0x19bull << 30, 0x1baull << 30, 0x1bbull << 30,
+  0x1daull << 30, 0x1dbull << 30, 0x1faull << 30, 0x1fbull << 30,
+  0x1deull << 30, 0x1dfull << 30,
+  0x200ull << 30, 0x201ull << 30, 0x202ull << 30, 0x203ull << 30,
+  0x204ull << 30, 0x205ull << 30, 0x206ull << 30, 0x207ull << 30,
+  0x208ull << 30, 0x209ull << 30,
+  0x210ull << 30, 0x211ull << 30, 0x212ull << 30, 0x213ull << 30,
+  0x214ull << 30, 0x215ull << 30, 0x216ull << 30, 0x217ull << 30,
+  0x218ull << 30, 0x219ull << 30,
+  0x220ull << 30, 0x221ull << 30, 0x222ull << 30, 0x223ull << 30,
+  0x224ull << 30, 0x225ull << 30, 0x226ull << 30, 0x227ull << 30,
+  0x228ull << 30, 0x229ull << 30,
+  0x230ull << 30, 0x231ull << 30, 0x232ull << 30, 0x233ull << 30,
+  0x234ull << 30, 0x235ull << 30, 0x236ull << 30, 0x237ull << 30,
+  0x238ull << 30, 0x239ull << 30,
+  0x240ull << 30, 0x241ull << 30, 0x242ull << 30, 0x243ull << 30,
+  0x244ull << 30, 0x245ull << 30, 0x246ull << 30, 0x247ull << 30,
+  0x248ull << 30, 0x249ull << 30,
+  0x250ull << 30, 0x251ull << 30, 0x252ull << 30, 0x253ull << 30,
+  0x254ull << 30, 0x255ull << 30, 0x256ull << 30, 0x257ull << 30,
+  0x258ull << 30, 0x259ull << 30,
+  0x260ull << 30, 0x261ull << 30, 0x262ull << 30, 0x263ull << 30,
+  0x264ull << 30, 0x265ull << 30, 0x266ull << 30, 0x267ull << 30,
+  0x268ull << 30, 0x269ull << 30,
+  0x270ull << 30, 0x271ull << 30, 0x272ull << 30, 0x273ull << 30,
+  0x274ull << 30, 0x275ull << 30, 0x276ull << 30, 0x277ull << 30,
+  0x278ull << 30, 0x279ull << 30,
+  0x20aull << 30, 0x20bull << 30, 0x22aull << 30, 0x22bull << 30,
+  0x24aull << 30, 0x24bull << 30, 0x26aull << 30, 0x26bull << 30,
+  0x24eull << 30, 0x24full << 30,
+  0x21aull << 30, 0x21bull << 30, 0x23aull << 30, 0x23bull << 30,
+  0x25aull << 30, 0x25bull << 30, 0x27aull << 30, 0x27bull << 30,
+  0x25eull << 30, 0x25full << 30,
+  0x280ull << 30, 0x281ull << 30, 0x282ull << 30, 0x283ull << 30,
+  0x284ull << 30, 0x285ull << 30, 0x286ull << 30, 0x287ull << 30,
+  0x288ull << 30, 0x289ull << 30,
+  0x290ull << 30, 0x291ull << 30, 0x292ull << 30, 0x293ull << 30,
+  0x294ull << 30, 0x295ull << 30, 0x296ull << 30, 0x297ull << 30,
+  0x298ull << 30, 0x299ull << 30,
+  0x2a0ull << 30, 0x2a1ull << 30, 0x2a2ull << 30, 0x2a3ull << 30,
+  0x2a4ull << 30, 0x2a5ull << 30, 0x2a6ull << 30, 0x2a7ull << 30,
+  0x2a8ull << 30, 0x2a9ull << 30,
+  0x2b0ull << 30, 0x2b1ull << 30, 0x2b2ull << 30, 0x2b3ull << 30,
+  0x2b4ull << 30, 0x2b5ull << 30, 0x2b6ull << 30, 0x2b7ull << 30,
+  0x2b8ull << 30, 0x2b9ull << 30,
+  0x2c0ull << 30, 0x2c1ull << 30, 0x2c2ull << 30, 0x2c3ull << 30,
+  0x2c4ull << 30, 0x2c5ull << 30, 0x2c6ull << 30, 0x2c7ull << 30,
+  0x2c8ull << 30, 0x2c9ull << 30,
+  0x2d0ull << 30, 0x2d1ull << 30, 0x2d2ull << 30, 0x2d3ull << 30,
+  0x2d4ull << 30, 0x2d5ull << 30, 0x2d6ull << 30, 0x2d7ull << 30,
+  0x2d8ull << 30, 0x2d9ull << 30,
+  0x2e0ull << 30, 0x2e1ull << 30, 0x2e2ull << 30, 0x2e3ull << 30,
+  0x2e4ull << 30, 0x2e5ull << 30, 0x2e6ull << 30, 0x2e7ull << 30,
+  0x2e8ull << 30, 0x2e9ull << 30,
+  0x2f0ull << 30, 0x2f1ull << 30, 0x2f2ull << 30, 0x2f3ull << 30,
+  0x2f4ull << 30, 0x2f5ull << 30, 0x2f6ull << 30, 0x2f7ull << 30,
+  0x2f8ull << 30, 0x2f9ull << 30,
+  0x28aull << 30, 0x28bull << 30, 0x2aaull << 30, 0x2abull << 30,
+  0x2caull << 30, 0x2cbull << 30, 0x2eaull << 30, 0x2ebull << 30,
+  0x2ceull << 30, 0x2cfull << 30,
+  0x29aull << 30, 0x29bull << 30, 0x2baull << 30, 0x2bbull << 30,
+  0x2daull << 30, 0x2dbull << 30, 0x2faull << 30, 0x2fbull << 30,
+  0x2deull << 30, 0x2dfull << 30,
+  0x300ull << 30, 0x301ull << 30, 0x302ull << 30, 0x303ull << 30,
+  0x304ull << 30, 0x305ull << 30, 0x306ull << 30, 0x307ull << 30,
+  0x308ull << 30, 0x309ull << 30,
+  0x310ull << 30, 0x311ull << 30, 0x312ull << 30, 0x313ull << 30,
+  0x314ull << 30, 0x315ull << 30, 0x316ull << 30, 0x317ull << 30,
+  0x318ull << 30, 0x319ull << 30,
+  0x320ull << 30, 0x321ull << 30, 0x322ull << 30, 0x323ull << 30,
+  0x324ull << 30, 0x325ull << 30, 0x326ull << 30, 0x327ull << 30,
+  0x328ull << 30, 0x329ull << 30,
+  0x330ull << 30, 0x331ull << 30, 0x332ull << 30, 0x333ull << 30,
+  0x334ull << 30, 0x335ull << 30, 0x336ull << 30, 0x337ull << 30,
+  0x338ull << 30, 0x339ull << 30,
+  0x340ull << 30, 0x341ull << 30, 0x342ull << 30, 0x343ull << 30,
+  0x344ull << 30, 0x345ull << 30, 0x346ull << 30, 0x347ull << 30,
+  0x348ull << 30, 0x349ull << 30,
+  0x350ull << 30, 0x351ull << 30, 0x352ull << 30, 0x353ull << 30,
+  0x354ull << 30, 0x355ull << 30, 0x356ull << 30, 0x357ull << 30,
+  0x358ull << 30, 0x359ull << 30,
+  0x360ull << 30, 0x361ull << 30, 0x362ull << 30, 0x363ull << 30,
+  0x364ull << 30, 0x365ull << 30, 0x366ull << 30, 0x367ull << 30,
+  0x368ull << 30, 0x369ull << 30,
+  0x370ull << 30, 0x371ull << 30, 0x372ull << 30, 0x373ull << 30,
+  0x374ull << 30, 0x375ull << 30, 0x376ull << 30, 0x377ull << 30,
+  0x378ull << 30, 0x379ull << 30,
+  0x30aull << 30, 0x30bull << 30, 0x32aull << 30, 0x32bull << 30,
+  0x34aull << 30, 0x34bull << 30, 0x36aull << 30, 0x36bull << 30,
+  0x34eull << 30, 0x34full << 30,
+  0x31aull << 30, 0x31bull << 30, 0x33aull << 30, 0x33bull << 30,
+  0x35aull << 30, 0x35bull << 30, 0x37aull << 30, 0x37bull << 30,
+  0x35eull << 30, 0x35full << 30,
+  0x380ull << 30, 0x381ull << 30, 0x382ull << 30, 0x383ull << 30,
+  0x384ull << 30, 0x385ull << 30, 0x386ull << 30, 0x387ull << 30,
+  0x388ull << 30, 0x389ull << 30,
+  0x390ull << 30, 0x391ull << 30, 0x392ull << 30, 0x393ull << 30,
+  0x394ull << 30, 0x395ull << 30, 0x396ull << 30, 0x397ull << 30,
+  0x398ull << 30, 0x399ull << 30,
+  0x3a0ull << 30, 0x3a1ull << 30, 0x3a2ull << 30, 0x3a3ull << 30,
+  0x3a4ull << 30, 0x3a5ull << 30, 0x3a6ull << 30, 0x3a7ull << 30,
+  0x3a8ull << 30, 0x3a9ull << 30,
+  0x3b0ull << 30, 0x3b1ull << 30, 0x3b2ull << 30, 0x3b3ull << 30,
+  0x3b4ull << 30, 0x3b5ull << 30, 0x3b6ull << 30, 0x3b7ull << 30,
+  0x3b8ull << 30, 0x3b9ull << 30,
+  0x3c0ull << 30, 0x3c1ull << 30, 0x3c2ull << 30, 0x3c3ull << 30,
+  0x3c4ull << 30, 0x3c5ull << 30, 0x3c6ull << 30, 0x3c7ull << 30,
+  0x3c8ull << 30, 0x3c9ull << 30,
+  0x3d0ull << 30, 0x3d1ull << 30, 0x3d2ull << 30, 0x3d3ull << 30,
+  0x3d4ull << 30, 0x3d5ull << 30, 0x3d6ull << 30, 0x3d7ull << 30,
+  0x3d8ull << 30, 0x3d9ull << 30,
+  0x3e0ull << 30, 0x3e1ull << 30, 0x3e2ull << 30, 0x3e3ull << 30,
+  0x3e4ull << 30, 0x3e5ull << 30, 0x3e6ull << 30, 0x3e7ull << 30,
+  0x3e8ull << 30, 0x3e9ull << 30,
+  0x3f0ull << 30, 0x3f1ull << 30, 0x3f2ull << 30, 0x3f3ull << 30,
+  0x3f4ull << 30, 0x3f5ull << 30, 0x3f6ull << 30, 0x3f7ull << 30,
+  0x3f8ull << 30, 0x3f9ull << 30,
+  0x38aull << 30, 0x38bull << 30, 0x3aaull << 30, 0x3abull << 30,
+  0x3caull << 30, 0x3cbull << 30, 0x3eaull << 30, 0x3ebull << 30,
+  0x3ceull << 30, 0x3cfull << 30,
+  0x39aull << 30, 0x39bull << 30, 0x3baull << 30, 0x3bbull << 30,
+  0x3daull << 30, 0x3dbull << 30, 0x3faull << 30, 0x3fbull << 30,
+  0x3deull << 30, 0x3dfull << 30,
+  0x00cull << 30, 0x00dull << 30, 0x10cull << 30, 0x10dull << 30,
+  0x20cull << 30, 0x20dull << 30, 0x30cull << 30, 0x30dull << 30,
+  0x02eull << 30, 0x02full << 30,
+  0x01cull << 30, 0x01dull << 30, 0x11cull << 30, 0x11dull << 30,
+  0x21cull << 30, 0x21dull << 30, 0x31cull << 30, 0x31dull << 30,
+  0x03eull << 30, 0x03full << 30,
+  0x02cull << 30, 0x02dull << 30, 0x12cull << 30, 0x12dull << 30,
+  0x22cull << 30, 0x22dull << 30, 0x32cull << 30, 0x32dull << 30,
+  0x12eull << 30, 0x12full << 30,
+  0x03cull << 30, 0x03dull << 30, 0x13cull << 30, 0x13dull << 30,
+  0x23cull << 30, 0x23dull << 30, 0x33cull << 30, 0x33dull << 30,
+  0x13eull << 30, 0x13full << 30,
+  0x04cull << 30, 0x04dull << 30, 0x14cull << 30, 0x14dull << 30,
+  0x24cull << 30, 0x24dull << 30, 0x34cull << 30, 0x34dull << 30,
+  0x22eull << 30, 0x22full << 30,
+  0x05cull << 30, 0x05dull << 30, 0x15cull << 30, 0x15dull << 30,
+  0x25cull << 30, 0x25dull << 30, 0x35cull << 30, 0x35dull << 30,
+  0x23eull << 30, 0x23full << 30,
+  0x06cull << 30, 0x06dull << 30, 0x16cull << 30, 0x16dull << 30,
+  0x26cull << 30, 0x26dull << 30, 0x36cull << 30, 0x36dull << 30,
+  0x32eull << 30, 0x32full << 30,
+  0x07cull << 30, 0x07dull << 30, 0x17cull << 30, 0x17dull << 30,
+  0x27cull << 30, 0x27dull << 30, 0x37cull << 30, 0x37dull << 30,
+  0x33eull << 30, 0x33full << 30,
+  0x00eull << 30, 0x00full << 30, 0x10eull << 30, 0x10full << 30,
+  0x20eull << 30, 0x20full << 30, 0x30eull << 30, 0x30full << 30,
+  0x06eull << 30, 0x06full << 30,
+  0x01eull << 30, 0x01full << 30, 0x11eull << 30, 0x11full << 30,
+  0x21eull << 30, 0x21full << 30, 0x31eull << 30, 0x31full << 30,
+  0x07eull << 30, 0x07full << 30,
+  0x08cull << 30, 0x08dull << 30, 0x18cull << 30, 0x18dull << 30,
+  0x28cull << 30, 0x28dull << 30, 0x38cull << 30, 0x38dull << 30,
+  0x0aeull << 30, 0x0afull << 30,
+  0x09cull << 30, 0x09dull << 30, 0x19cull << 30, 0x19dull << 30,
+  0x29cull << 30, 0x29dull << 30, 0x39cull << 30, 0x39dull << 30,
+  0x0beull << 30, 0x0bfull << 30,
+  0x0acull << 30, 0x0adull << 30, 0x1acull << 30, 0x1adull << 30,
+  0x2acull << 30, 0x2adull << 30, 0x3acull << 30, 0x3adull << 30,
+  0x1aeull << 30, 0x1afull << 30,
+  0x0bcull << 30, 0x0bdull << 30, 0x1bcull << 30, 0x1bdull << 30,
+  0x2bcull << 30, 0x2bdull << 30, 0x3bcull << 30, 0x3bdull << 30,
+  0x1beull << 30, 0x1bfull << 30,
+  0x0ccull << 30, 0x0cdull << 30, 0x1ccull << 30, 0x1cdull << 30,
+  0x2ccull << 30, 0x2cdull << 30, 0x3ccull << 30, 0x3cdull << 30,
+  0x2aeull << 30, 0x2afull << 30,
+  0x0dcull << 30, 0x0ddull << 30, 0x1dcull << 30, 0x1ddull << 30,
+  0x2dcull << 30, 0x2ddull << 30, 0x3dcull << 30, 0x3ddull << 30,
+  0x2beull << 30, 0x2bfull << 30,
+  0x0ecull << 30, 0x0edull << 30, 0x1ecull << 30, 0x1edull << 30,
+  0x2ecull << 30, 0x2edull << 30, 0x3ecull << 30, 0x3edull << 30,
+  0x3aeull << 30, 0x3afull << 30,
+  0x0fcull << 30, 0x0fdull << 30, 0x1fcull << 30, 0x1fdull << 30,
+  0x2fcull << 30, 0x2fdull << 30, 0x3fcull << 30, 0x3fdull << 30,
+  0x3beull << 30, 0x3bfull << 30,
+  0x08eull << 30, 0x08full << 30, 0x18eull << 30, 0x18full << 30,
+  0x28eull << 30, 0x28full << 30, 0x38eull << 30, 0x38full << 30,
+  0x0eeull << 30, 0x0efull << 30,
+  0x09eull << 30, 0x09full << 30, 0x19eull << 30, 0x19full << 30,
+  0x29eull << 30, 0x29full << 30, 0x39eull << 30, 0x39full << 30,
+  0x0feull << 30, 0x0ffull << 30
+};
+
+const UINT64 b2d5[] =
+  { 0x000ull << 40, 0x001ull << 40, 0x002ull << 40, 0x003ull << 40,
+  0x004ull << 40, 0x005ull << 40, 0x006ull << 40, 0x007ull << 40,
+    0x008ull << 40,
+  0x009ull << 40,
+  0x010ull << 40, 0x011ull << 40, 0x012ull << 40, 0x013ull << 40,
+  0x014ull << 40, 0x015ull << 40, 0x016ull << 40, 0x017ull << 40,
+  0x018ull << 40, 0x019ull << 40,
+  0x020ull << 40, 0x021ull << 40, 0x022ull << 40, 0x023ull << 40,
+  0x024ull << 40, 0x025ull << 40, 0x026ull << 40, 0x027ull << 40,
+  0x028ull << 40, 0x029ull << 40,
+  0x030ull << 40, 0x031ull << 40, 0x032ull << 40, 0x033ull << 40,
+  0x034ull << 40, 0x035ull << 40, 0x036ull << 40, 0x037ull << 40,
+  0x038ull << 40, 0x039ull << 40,
+  0x040ull << 40, 0x041ull << 40, 0x042ull << 40, 0x043ull << 40,
+  0x044ull << 40, 0x045ull << 40, 0x046ull << 40, 0x047ull << 40,
+  0x048ull << 40, 0x049ull << 40,
+  0x050ull << 40, 0x051ull << 40, 0x052ull << 40, 0x053ull << 40,
+  0x054ull << 40, 0x055ull << 40, 0x056ull << 40, 0x057ull << 40,
+  0x058ull << 40, 0x059ull << 40,
+  0x060ull << 40, 0x061ull << 40, 0x062ull << 40, 0x063ull << 40,
+  0x064ull << 40, 0x065ull << 40, 0x066ull << 40, 0x067ull << 40,
+  0x068ull << 40, 0x069ull << 40,
+  0x070ull << 40, 0x071ull << 40, 0x072ull << 40, 0x073ull << 40,
+  0x074ull << 40, 0x075ull << 40, 0x076ull << 40, 0x077ull << 40,
+  0x078ull << 40, 0x079ull << 40,
+  0x00aull << 40, 0x00bull << 40, 0x02aull << 40, 0x02bull << 40,
+  0x04aull << 40, 0x04bull << 40, 0x06aull << 40, 0x06bull << 40,
+  0x04eull << 40, 0x04full << 40,
+  0x01aull << 40, 0x01bull << 40, 0x03aull << 40, 0x03bull << 40,
+  0x05aull << 40, 0x05bull << 40, 0x07aull << 40, 0x07bull << 40,
+  0x05eull << 40, 0x05full << 40,
+  0x080ull << 40, 0x081ull << 40, 0x082ull << 40, 0x083ull << 40,
+  0x084ull << 40, 0x085ull << 40, 0x086ull << 40, 0x087ull << 40,
+  0x088ull << 40, 0x089ull << 40,
+  0x090ull << 40, 0x091ull << 40, 0x092ull << 40, 0x093ull << 40,
+  0x094ull << 40, 0x095ull << 40, 0x096ull << 40, 0x097ull << 40,
+  0x098ull << 40, 0x099ull << 40,
+  0x0a0ull << 40, 0x0a1ull << 40, 0x0a2ull << 40, 0x0a3ull << 40,
+  0x0a4ull << 40, 0x0a5ull << 40, 0x0a6ull << 40, 0x0a7ull << 40,
+  0x0a8ull << 40, 0x0a9ull << 40,
+  0x0b0ull << 40, 0x0b1ull << 40, 0x0b2ull << 40, 0x0b3ull << 40,
+  0x0b4ull << 40, 0x0b5ull << 40, 0x0b6ull << 40, 0x0b7ull << 40,
+  0x0b8ull << 40, 0x0b9ull << 40,
+  0x0c0ull << 40, 0x0c1ull << 40, 0x0c2ull << 40, 0x0c3ull << 40,
+  0x0c4ull << 40, 0x0c5ull << 40, 0x0c6ull << 40, 0x0c7ull << 40,
+  0x0c8ull << 40, 0x0c9ull << 40,
+  0x0d0ull << 40, 0x0d1ull << 40, 0x0d2ull << 40, 0x0d3ull << 40,
+  0x0d4ull << 40, 0x0d5ull << 40, 0x0d6ull << 40, 0x0d7ull << 40,
+  0x0d8ull << 40, 0x0d9ull << 40,
+  0x0e0ull << 40, 0x0e1ull << 40, 0x0e2ull << 40, 0x0e3ull << 40,
+  0x0e4ull << 40, 0x0e5ull << 40, 0x0e6ull << 40, 0x0e7ull << 40,
+  0x0e8ull << 40, 0x0e9ull << 40,
+  0x0f0ull << 40, 0x0f1ull << 40, 0x0f2ull << 40, 0x0f3ull << 40,
+  0x0f4ull << 40, 0x0f5ull << 40, 0x0f6ull << 40, 0x0f7ull << 40,
+  0x0f8ull << 40, 0x0f9ull << 40,
+  0x08aull << 40, 0x08bull << 40, 0x0aaull << 40, 0x0abull << 40,
+  0x0caull << 40, 0x0cbull << 40, 0x0eaull << 40, 0x0ebull << 40,
+  0x0ceull << 40, 0x0cfull << 40,
+  0x09aull << 40, 0x09bull << 40, 0x0baull << 40, 0x0bbull << 40,
+  0x0daull << 40, 0x0dbull << 40, 0x0faull << 40, 0x0fbull << 40,
+  0x0deull << 40, 0x0dfull << 40,
+  0x100ull << 40, 0x101ull << 40, 0x102ull << 40, 0x103ull << 40,
+  0x104ull << 40, 0x105ull << 40, 0x106ull << 40, 0x107ull << 40,
+  0x108ull << 40, 0x109ull << 40,
+  0x110ull << 40, 0x111ull << 40, 0x112ull << 40, 0x113ull << 40,
+  0x114ull << 40, 0x115ull << 40, 0x116ull << 40, 0x117ull << 40,
+  0x118ull << 40, 0x119ull << 40,
+  0x120ull << 40, 0x121ull << 40, 0x122ull << 40, 0x123ull << 40,
+  0x124ull << 40, 0x125ull << 40, 0x126ull << 40, 0x127ull << 40,
+  0x128ull << 40, 0x129ull << 40,
+  0x130ull << 40, 0x131ull << 40, 0x132ull << 40, 0x133ull << 40,
+  0x134ull << 40, 0x135ull << 40, 0x136ull << 40, 0x137ull << 40,
+  0x138ull << 40, 0x139ull << 40,
+  0x140ull << 40, 0x141ull << 40, 0x142ull << 40, 0x143ull << 40,
+  0x144ull << 40, 0x145ull << 40, 0x146ull << 40, 0x147ull << 40,
+  0x148ull << 40, 0x149ull << 40,
+  0x150ull << 40, 0x151ull << 40, 0x152ull << 40, 0x153ull << 40,
+  0x154ull << 40, 0x155ull << 40, 0x156ull << 40, 0x157ull << 40,
+  0x158ull << 40, 0x159ull << 40,
+  0x160ull << 40, 0x161ull << 40, 0x162ull << 40, 0x163ull << 40,
+  0x164ull << 40, 0x165ull << 40, 0x166ull << 40, 0x167ull << 40,
+  0x168ull << 40, 0x169ull << 40,
+  0x170ull << 40, 0x171ull << 40, 0x172ull << 40, 0x173ull << 40,
+  0x174ull << 40, 0x175ull << 40, 0x176ull << 40, 0x177ull << 40,
+  0x178ull << 40, 0x179ull << 40,
+  0x10aull << 40, 0x10bull << 40, 0x12aull << 40, 0x12bull << 40,
+  0x14aull << 40, 0x14bull << 40, 0x16aull << 40, 0x16bull << 40,
+  0x14eull << 40, 0x14full << 40,
+  0x11aull << 40, 0x11bull << 40, 0x13aull << 40, 0x13bull << 40,
+  0x15aull << 40, 0x15bull << 40, 0x17aull << 40, 0x17bull << 40,
+  0x15eull << 40, 0x15full << 40,
+  0x180ull << 40, 0x181ull << 40, 0x182ull << 40, 0x183ull << 40,
+  0x184ull << 40, 0x185ull << 40, 0x186ull << 40, 0x187ull << 40,
+  0x188ull << 40, 0x189ull << 40,
+  0x190ull << 40, 0x191ull << 40, 0x192ull << 40, 0x193ull << 40,
+  0x194ull << 40, 0x195ull << 40, 0x196ull << 40, 0x197ull << 40,
+  0x198ull << 40, 0x199ull << 40,
+  0x1a0ull << 40, 0x1a1ull << 40, 0x1a2ull << 40, 0x1a3ull << 40,
+  0x1a4ull << 40, 0x1a5ull << 40, 0x1a6ull << 40, 0x1a7ull << 40,
+  0x1a8ull << 40, 0x1a9ull << 40,
+  0x1b0ull << 40, 0x1b1ull << 40, 0x1b2ull << 40, 0x1b3ull << 40,
+  0x1b4ull << 40, 0x1b5ull << 40, 0x1b6ull << 40, 0x1b7ull << 40,
+  0x1b8ull << 40, 0x1b9ull << 40,
+  0x1c0ull << 40, 0x1c1ull << 40, 0x1c2ull << 40, 0x1c3ull << 40,
+  0x1c4ull << 40, 0x1c5ull << 40, 0x1c6ull << 40, 0x1c7ull << 40,
+  0x1c8ull << 40, 0x1c9ull << 40,
+  0x1d0ull << 40, 0x1d1ull << 40, 0x1d2ull << 40, 0x1d3ull << 40,
+  0x1d4ull << 40, 0x1d5ull << 40, 0x1d6ull << 40, 0x1d7ull << 40,
+  0x1d8ull << 40, 0x1d9ull << 40,
+  0x1e0ull << 40, 0x1e1ull << 40, 0x1e2ull << 40, 0x1e3ull << 40,
+  0x1e4ull << 40, 0x1e5ull << 40, 0x1e6ull << 40, 0x1e7ull << 40,
+  0x1e8ull << 40, 0x1e9ull << 40,
+  0x1f0ull << 40, 0x1f1ull << 40, 0x1f2ull << 40, 0x1f3ull << 40,
+  0x1f4ull << 40, 0x1f5ull << 40, 0x1f6ull << 40, 0x1f7ull << 40,
+  0x1f8ull << 40, 0x1f9ull << 40,
+  0x18aull << 40, 0x18bull << 40, 0x1aaull << 40, 0x1abull << 40,
+  0x1caull << 40, 0x1cbull << 40, 0x1eaull << 40, 0x1ebull << 40,
+  0x1ceull << 40, 0x1cfull << 40,
+  0x19aull << 40, 0x19bull << 40, 0x1baull << 40, 0x1bbull << 40,
+  0x1daull << 40, 0x1dbull << 40, 0x1faull << 40, 0x1fbull << 40,
+  0x1deull << 40, 0x1dfull << 40,
+  0x200ull << 40, 0x201ull << 40, 0x202ull << 40, 0x203ull << 40,
+  0x204ull << 40, 0x205ull << 40, 0x206ull << 40, 0x207ull << 40,
+  0x208ull << 40, 0x209ull << 40,
+  0x210ull << 40, 0x211ull << 40, 0x212ull << 40, 0x213ull << 40,
+  0x214ull << 40, 0x215ull << 40, 0x216ull << 40, 0x217ull << 40,
+  0x218ull << 40, 0x219ull << 40,
+  0x220ull << 40, 0x221ull << 40, 0x222ull << 40, 0x223ull << 40,
+  0x224ull << 40, 0x225ull << 40, 0x226ull << 40, 0x227ull << 40,
+  0x228ull << 40, 0x229ull << 40,
+  0x230ull << 40, 0x231ull << 40, 0x232ull << 40, 0x233ull << 40,
+  0x234ull << 40, 0x235ull << 40, 0x236ull << 40, 0x237ull << 40,
+  0x238ull << 40, 0x239ull << 40,
+  0x240ull << 40, 0x241ull << 40, 0x242ull << 40, 0x243ull << 40,
+  0x244ull << 40, 0x245ull << 40, 0x246ull << 40, 0x247ull << 40,
+  0x248ull << 40, 0x249ull << 40,
+  0x250ull << 40, 0x251ull << 40, 0x252ull << 40, 0x253ull << 40,
+  0x254ull << 40, 0x255ull << 40, 0x256ull << 40, 0x257ull << 40,
+  0x258ull << 40, 0x259ull << 40,
+  0x260ull << 40, 0x261ull << 40, 0x262ull << 40, 0x263ull << 40,
+  0x264ull << 40, 0x265ull << 40, 0x266ull << 40, 0x267ull << 40,
+  0x268ull << 40, 0x269ull << 40,
+  0x270ull << 40, 0x271ull << 40, 0x272ull << 40, 0x273ull << 40,
+  0x274ull << 40, 0x275ull << 40, 0x276ull << 40, 0x277ull << 40,
+  0x278ull << 40, 0x279ull << 40,
+  0x20aull << 40, 0x20bull << 40, 0x22aull << 40, 0x22bull << 40,
+  0x24aull << 40, 0x24bull << 40, 0x26aull << 40, 0x26bull << 40,
+  0x24eull << 40, 0x24full << 40,
+  0x21aull << 40, 0x21bull << 40, 0x23aull << 40, 0x23bull << 40,
+  0x25aull << 40, 0x25bull << 40, 0x27aull << 40, 0x27bull << 40,
+  0x25eull << 40, 0x25full << 40,
+  0x280ull << 40, 0x281ull << 40, 0x282ull << 40, 0x283ull << 40,
+  0x284ull << 40, 0x285ull << 40, 0x286ull << 40, 0x287ull << 40,
+  0x288ull << 40, 0x289ull << 40,
+  0x290ull << 40, 0x291ull << 40, 0x292ull << 40, 0x293ull << 40,
+  0x294ull << 40, 0x295ull << 40, 0x296ull << 40, 0x297ull << 40,
+  0x298ull << 40, 0x299ull << 40,
+  0x2a0ull << 40, 0x2a1ull << 40, 0x2a2ull << 40, 0x2a3ull << 40,
+  0x2a4ull << 40, 0x2a5ull << 40, 0x2a6ull << 40, 0x2a7ull << 40,
+  0x2a8ull << 40, 0x2a9ull << 40,
+  0x2b0ull << 40, 0x2b1ull << 40, 0x2b2ull << 40, 0x2b3ull << 40,
+  0x2b4ull << 40, 0x2b5ull << 40, 0x2b6ull << 40, 0x2b7ull << 40,
+  0x2b8ull << 40, 0x2b9ull << 40,
+  0x2c0ull << 40, 0x2c1ull << 40, 0x2c2ull << 40, 0x2c3ull << 40,
+  0x2c4ull << 40, 0x2c5ull << 40, 0x2c6ull << 40, 0x2c7ull << 40,
+  0x2c8ull << 40, 0x2c9ull << 40,
+  0x2d0ull << 40, 0x2d1ull << 40, 0x2d2ull << 40, 0x2d3ull << 40,
+  0x2d4ull << 40, 0x2d5ull << 40, 0x2d6ull << 40, 0x2d7ull << 40,
+  0x2d8ull << 40, 0x2d9ull << 40,
+  0x2e0ull << 40, 0x2e1ull << 40, 0x2e2ull << 40, 0x2e3ull << 40,
+  0x2e4ull << 40, 0x2e5ull << 40, 0x2e6ull << 40, 0x2e7ull << 40,
+  0x2e8ull << 40, 0x2e9ull << 40,
+  0x2f0ull << 40, 0x2f1ull << 40, 0x2f2ull << 40, 0x2f3ull << 40,
+  0x2f4ull << 40, 0x2f5ull << 40, 0x2f6ull << 40, 0x2f7ull << 40,
+  0x2f8ull << 40, 0x2f9ull << 40,
+  0x28aull << 40, 0x28bull << 40, 0x2aaull << 40, 0x2abull << 40,
+  0x2caull << 40, 0x2cbull << 40, 0x2eaull << 40, 0x2ebull << 40,
+  0x2ceull << 40, 0x2cfull << 40,
+  0x29aull << 40, 0x29bull << 40, 0x2baull << 40, 0x2bbull << 40,
+  0x2daull << 40, 0x2dbull << 40, 0x2faull << 40, 0x2fbull << 40,
+  0x2deull << 40, 0x2dfull << 40,
+  0x300ull << 40, 0x301ull << 40, 0x302ull << 40, 0x303ull << 40,
+  0x304ull << 40, 0x305ull << 40, 0x306ull << 40, 0x307ull << 40,
+  0x308ull << 40, 0x309ull << 40,
+  0x310ull << 40, 0x311ull << 40, 0x312ull << 40, 0x313ull << 40,
+  0x314ull << 40, 0x315ull << 40, 0x316ull << 40, 0x317ull << 40,
+  0x318ull << 40, 0x319ull << 40,
+  0x320ull << 40, 0x321ull << 40, 0x322ull << 40, 0x323ull << 40,
+  0x324ull << 40, 0x325ull << 40, 0x326ull << 40, 0x327ull << 40,
+  0x328ull << 40, 0x329ull << 40,
+  0x330ull << 40, 0x331ull << 40, 0x332ull << 40, 0x333ull << 40,
+  0x334ull << 40, 0x335ull << 40, 0x336ull << 40, 0x337ull << 40,
+  0x338ull << 40, 0x339ull << 40,
+  0x340ull << 40, 0x341ull << 40, 0x342ull << 40, 0x343ull << 40,
+  0x344ull << 40, 0x345ull << 40, 0x346ull << 40, 0x347ull << 40,
+  0x348ull << 40, 0x349ull << 40,
+  0x350ull << 40, 0x351ull << 40, 0x352ull << 40, 0x353ull << 40,
+  0x354ull << 40, 0x355ull << 40, 0x356ull << 40, 0x357ull << 40,
+  0x358ull << 40, 0x359ull << 40,
+  0x360ull << 40, 0x361ull << 40, 0x362ull << 40, 0x363ull << 40,
+  0x364ull << 40, 0x365ull << 40, 0x366ull << 40, 0x367ull << 40,
+  0x368ull << 40, 0x369ull << 40,
+  0x370ull << 40, 0x371ull << 40, 0x372ull << 40, 0x373ull << 40,
+  0x374ull << 40, 0x375ull << 40, 0x376ull << 40, 0x377ull << 40,
+  0x378ull << 40, 0x379ull << 40,
+  0x30aull << 40, 0x30bull << 40, 0x32aull << 40, 0x32bull << 40,
+  0x34aull << 40, 0x34bull << 40, 0x36aull << 40, 0x36bull << 40,
+  0x34eull << 40, 0x34full << 40,
+  0x31aull << 40, 0x31bull << 40, 0x33aull << 40, 0x33bull << 40,
+  0x35aull << 40, 0x35bull << 40, 0x37aull << 40, 0x37bull << 40,
+  0x35eull << 40, 0x35full << 40,
+  0x380ull << 40, 0x381ull << 40, 0x382ull << 40, 0x383ull << 40,
+  0x384ull << 40, 0x385ull << 40, 0x386ull << 40, 0x387ull << 40,
+  0x388ull << 40, 0x389ull << 40,
+  0x390ull << 40, 0x391ull << 40, 0x392ull << 40, 0x393ull << 40,
+  0x394ull << 40, 0x395ull << 40, 0x396ull << 40, 0x397ull << 40,
+  0x398ull << 40, 0x399ull << 40,
+  0x3a0ull << 40, 0x3a1ull << 40, 0x3a2ull << 40, 0x3a3ull << 40,
+  0x3a4ull << 40, 0x3a5ull << 40, 0x3a6ull << 40, 0x3a7ull << 40,
+  0x3a8ull << 40, 0x3a9ull << 40,
+  0x3b0ull << 40, 0x3b1ull << 40, 0x3b2ull << 40, 0x3b3ull << 40,
+  0x3b4ull << 40, 0x3b5ull << 40, 0x3b6ull << 40, 0x3b7ull << 40,
+  0x3b8ull << 40, 0x3b9ull << 40,
+  0x3c0ull << 40, 0x3c1ull << 40, 0x3c2ull << 40, 0x3c3ull << 40,
+  0x3c4ull << 40, 0x3c5ull << 40, 0x3c6ull << 40, 0x3c7ull << 40,
+  0x3c8ull << 40, 0x3c9ull << 40,
+  0x3d0ull << 40, 0x3d1ull << 40, 0x3d2ull << 40, 0x3d3ull << 40,
+  0x3d4ull << 40, 0x3d5ull << 40, 0x3d6ull << 40, 0x3d7ull << 40,
+  0x3d8ull << 40, 0x3d9ull << 40,
+  0x3e0ull << 40, 0x3e1ull << 40, 0x3e2ull << 40, 0x3e3ull << 40,
+  0x3e4ull << 40, 0x3e5ull << 40, 0x3e6ull << 40, 0x3e7ull << 40,
+  0x3e8ull << 40, 0x3e9ull << 40,
+  0x3f0ull << 40, 0x3f1ull << 40, 0x3f2ull << 40, 0x3f3ull << 40,
+  0x3f4ull << 40, 0x3f5ull << 40, 0x3f6ull << 40, 0x3f7ull << 40,
+  0x3f8ull << 40, 0x3f9ull << 40,
+  0x38aull << 40, 0x38bull << 40, 0x3aaull << 40, 0x3abull << 40,
+  0x3caull << 40, 0x3cbull << 40, 0x3eaull << 40, 0x3ebull << 40,
+  0x3ceull << 40, 0x3cfull << 40,
+  0x39aull << 40, 0x39bull << 40, 0x3baull << 40, 0x3bbull << 40,
+  0x3daull << 40, 0x3dbull << 40, 0x3faull << 40, 0x3fbull << 40,
+  0x3deull << 40, 0x3dfull << 40,
+  0x00cull << 40, 0x00dull << 40, 0x10cull << 40, 0x10dull << 40,
+  0x20cull << 40, 0x20dull << 40, 0x30cull << 40, 0x30dull << 40,
+  0x02eull << 40, 0x02full << 40,
+  0x01cull << 40, 0x01dull << 40, 0x11cull << 40, 0x11dull << 40,
+  0x21cull << 40, 0x21dull << 40, 0x31cull << 40, 0x31dull << 40,
+  0x03eull << 40, 0x03full << 40,
+  0x02cull << 40, 0x02dull << 40, 0x12cull << 40, 0x12dull << 40,
+  0x22cull << 40, 0x22dull << 40, 0x32cull << 40, 0x32dull << 40,
+  0x12eull << 40, 0x12full << 40,
+  0x03cull << 40, 0x03dull << 40, 0x13cull << 40, 0x13dull << 40,
+  0x23cull << 40, 0x23dull << 40, 0x33cull << 40, 0x33dull << 40,
+  0x13eull << 40, 0x13full << 40,
+  0x04cull << 40, 0x04dull << 40, 0x14cull << 40, 0x14dull << 40,
+  0x24cull << 40, 0x24dull << 40, 0x34cull << 40, 0x34dull << 40,
+  0x22eull << 40, 0x22full << 40,
+  0x05cull << 40, 0x05dull << 40, 0x15cull << 40, 0x15dull << 40,
+  0x25cull << 40, 0x25dull << 40, 0x35cull << 40, 0x35dull << 40,
+  0x23eull << 40, 0x23full << 40,
+  0x06cull << 40, 0x06dull << 40, 0x16cull << 40, 0x16dull << 40,
+  0x26cull << 40, 0x26dull << 40, 0x36cull << 40, 0x36dull << 40,
+  0x32eull << 40, 0x32full << 40,
+  0x07cull << 40, 0x07dull << 40, 0x17cull << 40, 0x17dull << 40,
+  0x27cull << 40, 0x27dull << 40, 0x37cull << 40, 0x37dull << 40,
+  0x33eull << 40, 0x33full << 40,
+  0x00eull << 40, 0x00full << 40, 0x10eull << 40, 0x10full << 40,
+  0x20eull << 40, 0x20full << 40, 0x30eull << 40, 0x30full << 40,
+  0x06eull << 40, 0x06full << 40,
+  0x01eull << 40, 0x01full << 40, 0x11eull << 40, 0x11full << 40,
+  0x21eull << 40, 0x21full << 40, 0x31eull << 40, 0x31full << 40,
+  0x07eull << 40, 0x07full << 40,
+  0x08cull << 40, 0x08dull << 40, 0x18cull << 40, 0x18dull << 40,
+  0x28cull << 40, 0x28dull << 40, 0x38cull << 40, 0x38dull << 40,
+  0x0aeull << 40, 0x0afull << 40,
+  0x09cull << 40, 0x09dull << 40, 0x19cull << 40, 0x19dull << 40,
+  0x29cull << 40, 0x29dull << 40, 0x39cull << 40, 0x39dull << 40,
+  0x0beull << 40, 0x0bfull << 40,
+  0x0acull << 40, 0x0adull << 40, 0x1acull << 40, 0x1adull << 40,
+  0x2acull << 40, 0x2adull << 40, 0x3acull << 40, 0x3adull << 40,
+  0x1aeull << 40, 0x1afull << 40,
+  0x0bcull << 40, 0x0bdull << 40, 0x1bcull << 40, 0x1bdull << 40,
+  0x2bcull << 40, 0x2bdull << 40, 0x3bcull << 40, 0x3bdull << 40,
+  0x1beull << 40, 0x1bfull << 40,
+  0x0ccull << 40, 0x0cdull << 40, 0x1ccull << 40, 0x1cdull << 40,
+  0x2ccull << 40, 0x2cdull << 40, 0x3ccull << 40, 0x3cdull << 40,
+  0x2aeull << 40, 0x2afull << 40,
+  0x0dcull << 40, 0x0ddull << 40, 0x1dcull << 40, 0x1ddull << 40,
+  0x2dcull << 40, 0x2ddull << 40, 0x3dcull << 40, 0x3ddull << 40,
+  0x2beull << 40, 0x2bfull << 40,
+  0x0ecull << 40, 0x0edull << 40, 0x1ecull << 40, 0x1edull << 40,
+  0x2ecull << 40, 0x2edull << 40, 0x3ecull << 40, 0x3edull << 40,
+  0x3aeull << 40, 0x3afull << 40,
+  0x0fcull << 40, 0x0fdull << 40, 0x1fcull << 40, 0x1fdull << 40,
+  0x2fcull << 40, 0x2fdull << 40, 0x3fcull << 40, 0x3fdull << 40,
+  0x3beull << 40, 0x3bfull << 40,
+  0x08eull << 40, 0x08full << 40, 0x18eull << 40, 0x18full << 40,
+  0x28eull << 40, 0x28full << 40, 0x38eull << 40, 0x38full << 40,
+  0x0eeull << 40, 0x0efull << 40,
+  0x09eull << 40, 0x09full << 40, 0x19eull << 40, 0x19full << 40,
+  0x29eull << 40, 0x29full << 40, 0x39eull << 40, 0x39full << 40,
+  0x0feull << 40, 0x0ffull << 40
+};
diff --git a/gcc-4.9/libgcc/config/libbid/bid_binarydecimal.c b/gcc-4.9/libgcc/config/libbid/bid_binarydecimal.c
new file mode 100644
index 000000000..52a5fd1aa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_binarydecimal.c
@@ -0,0 +1,147479 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+// Counting leading zeros in an unsigned 32-bit word
+// The "_nz" version will return the wrong answer (31) for zero inputs
+
+#define CLZ32_MASK16 0xFFFF0000ul
+#define CLZ32_MASK8  0xFF00FF00ul
+#define CLZ32_MASK4  0xF0F0F0F0ul
+#define CLZ32_MASK2  0xCCCCCCCCul
+#define CLZ32_MASK1  0xAAAAAAAAul
+
+#define clz32_nz(n)                                             \
+ (((((n) & CLZ32_MASK16) <= ((n) & ~CLZ32_MASK16)) ? 16 : 0) +  \
+  ((((n) & CLZ32_MASK8) <= ((n) & ~CLZ32_MASK8)) ? 8 : 0) +     \
+  ((((n) & CLZ32_MASK4) <= ((n) & ~CLZ32_MASK4)) ? 4 : 0) +     \
+  ((((n) & CLZ32_MASK2) <= ((n) & ~CLZ32_MASK2)) ? 2 : 0) +     \
+  ((((n) & CLZ32_MASK1) <= ((n) & ~CLZ32_MASK1)) ? 1 : 0))
+
+#define clz32(n) (((n)==0) ? 32 : clz32_nz(n))
+
+// Counting trailing zeros in an unsigned 32-bit word
+// The ctz32_1bit version is for a single bit
+
+#define ctz32_1bit(n)                                           \
+ ((((n) & ~CLZ32_MASK16) ? 0 : 16) +                            \
+  (((n) & ~CLZ32_MASK8) ? 0 : 8) +                              \
+  (((n) & ~CLZ32_MASK4) ? 0 : 4) +                              \
+  (((n) & ~CLZ32_MASK2) ? 0 : 2) +                              \
+  (((n) & ~CLZ32_MASK1) ? 0 : 1))
+
+#define ctz32(n) (((n) == 0) ? 32 : ctz32_1bit((n) & -(n)))
+
+// Counting leading zeros in an unsigned 64-bit word
+// The "_nz" version will return the wrong answer (63) for zero inputs
+
+#define CLZ64_MASK32 0xFFFFFFFF00000000ull
+#define CLZ64_MASK16 0xFFFF0000FFFF0000ull
+#define CLZ64_MASK8  0xFF00FF00FF00FF00ull
+#define CLZ64_MASK4  0xF0F0F0F0F0F0F0F0ull
+#define CLZ64_MASK2  0xCCCCCCCCCCCCCCCCull
+#define CLZ64_MASK1  0xAAAAAAAAAAAAAAAAull
+
+#define clz64_nz(n)                                             \
+ (((((n) & CLZ64_MASK32) <= ((n) & ~CLZ64_MASK32)) ? 32 : 0) +  \
+  ((((n) & CLZ64_MASK16) <= ((n) & ~CLZ64_MASK16)) ? 16 : 0) +  \
+  ((((n) & CLZ64_MASK8) <= ((n) & ~CLZ64_MASK8)) ? 8 : 0) +     \
+  ((((n) & CLZ64_MASK4) <= ((n) & ~CLZ64_MASK4)) ? 4 : 0) +     \
+  ((((n) & CLZ64_MASK2) <= ((n) & ~CLZ64_MASK2)) ? 2 : 0) +     \
+  ((((n) & CLZ64_MASK1) <= ((n) & ~CLZ64_MASK1)) ? 1 : 0))      \
+
+#define clz64(n) (((n)==0) ? 64 : clz64_nz(n))
+
+// Counting trailing zeros in an unsigned 64-bit word
+// The ctz64_1bit version is for a single bit
+
+#define ctz64_1bit(n)                                           \
+ ((((n) & ~CLZ64_MASK32) ? 0 : 32) +                            \
+  (((n) & ~CLZ64_MASK16) ? 0 : 16) +                            \
+  (((n) & ~CLZ64_MASK8) ? 0 : 8) +                              \
+  (((n) & ~CLZ64_MASK4) ? 0 : 4) +                              \
+  (((n) & ~CLZ64_MASK2) ? 0 : 2) +                              \
+  (((n) & ~CLZ64_MASK1) ? 0 : 1))
+
+#define ctz64(n) (((n) == 0) ? 64 : ctz64_1bit((n) & -(n)))
+
+// Counting leading zeros in an unsigned 2-part 128-bit word
+
+#define clz128(n_hi,n_lo) (((n_hi) == 0) ? 64 + clz64(n_lo) : clz64_nz(n_hi))
+
+// Counting trailing zeros in a 2-part 128-bit word
+
+#define ctz128(hi,lo) (((lo) == 0) ? 64 + ctz64(hi) : ctz64(lo))
+
+// Shift 2-part 2^64 * hi + lo left by "c" bits
+// The "short" form requires a shift 0 < c < 64 and will be faster
+// Note that shifts of 64 can't be relied on as ANSI
+
+#define sll128_short(hi,lo,c)                                   \
+  ((hi) = ((hi) << (c)) + ((lo)>>(64-(c))),                     \
+   (lo) = (lo) << (c)                                           \
+  )
+
+#define sll128(hi,lo,c)                                         \
+  (((c) == 0) ? hi = hi, lo = lo :                              \
+  (((c) >= 64) ? hi = lo << ((c) - 64), lo = 0 : sll128_short(hi,lo,c)))
+
+// Shift 2-part 2^64 * hi + lo right by "c" bits
+// The "short" form requires a shift 0 < c < 64 and will be faster
+// Note that shifts of 64 can't be relied on as ANSI
+
+#define srl128_short(hi,lo,c)                                   \
+  ((lo) = ((hi) << (64 - (c))) + ((lo) >> (c)),                 \
+   (hi) = (hi) >> (c)                                           \
+  )
+
+#define srl128(hi,lo,c)                                         \
+  (((c) == 0) ? hi = hi, lo = lo :                              \
+  (((c) >= 64) ? lo = hi >> ((c) - 64), hi = 0 : srl128_short(hi,lo,c)))
+
+// Shift 4-part 2^196 * x3 + 2^128 * x2 + 2^64 * x1 + x0
+// right by "c" bits (must have c < 64)
+
+#define srl256(x3,x2,x1,x0,c)                                   \
+  ((x0) = ((x1) << (64 - (c))) + ((x0) >> (c)),                 \
+   (x1) = ((x2) << (64 - (c))) + ((x1) >> (c)),                 \
+   (x2) = ((x3) << (64 - (c))) + ((x2) >> (c)),                 \
+   (x3) = (x3) >> (c)                                           \
+  )
+
+// Compare "<" two 2-part unsigned integers
+
+#define lt128(x_hi,x_lo,y_hi,y_lo)                              \
+  (((x_hi) < (y_hi)) || (((x_hi) == (y_hi)) && ((x_lo) < (y_lo))))
+
+// Likewise "<="
+
+#define le128(x_hi,x_lo,y_hi,y_lo)                              \
+  (((x_hi) < (y_hi)) || (((x_hi) == (y_hi)) && ((x_lo) <= (y_lo))))
+
+// 128x256->384 bit multiplication (missing from existing macros)
+// I derived this by propagating (A).w[2] = 0 in __mul_192x256_to_448
+
+#define __mul_128x256_to_384(P, A, B)                           \
+{                                                               \
+UINT512 P0,P1;                                                  \
+UINT64 CY;                                                      \
+        __mul_64x256_to_320(P0, (A).w[0], B);                   \
+        __mul_64x256_to_320(P1, (A).w[1], B);                   \
+        (P).w[0] = P0.w[0];                                     \
+        __add_carry_out((P).w[1],CY,P1.w[0],P0.w[1]);           \
+        __add_carry_in_out((P).w[2],CY,P1.w[1],P0.w[2],CY);     \
+        __add_carry_in_out((P).w[3],CY,P1.w[2],P0.w[3],CY);     \
+        __add_carry_in_out((P).w[4],CY,P1.w[3],P0.w[4],CY);     \
+        (P).w[5] = P1.w[4] + CY;                                \
+}
+
+// Multiply a 64-bit number by 10, getting "carry" and "sum"
+
+#define __mul_10x64(sum,carryout,input,carryin)                         \
+{ unsigned long long s3 = (input) + ((input) >> 2);                     \
+  (carryout) = ((s3 < (unsigned long long)(input))<<3) + (s3>>61);      \
+  s3 = (s3<<3) + ((input&3)<<1);                                        \
+  (sum) = s3 + (carryin);                                               \
+  if ((unsigned long long)(sum) < s3) ++(carryout);                     \
+}
+
+// Multiply a 256-bit number by 10, assuming no overflow
+
+#define __mul_10x256_to_256(p3,p2,p1,p0,a3,a2,a1,a0)            \
+{ unsigned long long c0,c1,c2,c3;                               \
+  __mul_10x64(p0,c0,a0,0ull);                                   \
+  __mul_10x64(p1,c1,a1,c0);                                     \
+  __mul_10x64(p2,c2,a2,c1);                                     \
+  __mul_10x64(p3,c3,a3,c2);                                     \
+}
+
+// Set up indices for low and high parts, depending on the endian-ness.
+// Note that this only affects 128-bit input and output operands, not any
+// of the internal workings, where w[0] is always the low-order part.
+
+#if BID_BIG_ENDIAN
+typedef union {
+  struct {
+    unsigned short hi;
+    unsigned short lo1;
+    unsigned short lo2;
+    unsigned short lo3;
+    unsigned short lo4;
+    unsigned short pad;
+    unsigned pad128;
+  } i;
+  BINARY80 f;
+}
+BID_BINARY80LDOUBLE;
+#else
+typedef union {
+  struct {
+    unsigned short lo4;
+    unsigned short lo3;
+    unsigned short lo2;
+    unsigned short lo1;
+    unsigned short hi;
+    unsigned short pad;
+    unsigned pad128;
+  } i;
+  BINARY80 f;
+}
+BID_BINARY80LDOUBLE;
+#endif
+
+// Pack and return binary floating-point numbers from raw fields
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_binary32(s,e,c)                  \
+ { union {UINT32 i; float f; } x_out;           \
+   x_out.i = (((UINT32)(s)) << 31) +            \
+           (((UINT32)(e)) << 23) +              \
+           (c);                                 \
+   return x_out.f;                              \
+}
+#else
+#define return_binary32(s,e,c)                  \
+ { union {UINT32 i; float f; } x_out;           \
+   x_out.i = (((UINT32)(s)) << 31) +            \
+           (((UINT32)(e)) << 23) +              \
+           (c);                                 \
+   *pres = x_out.f;                             \
+   return;                                      \
+}
+#endif
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_binary64(s,e,c)                  \
+ { union {UINT64 i; double f; } x_out;          \
+   x_out.i = (((UINT64)(s)) << 63) +            \
+           (((UINT64)(e)) << 52) +              \
+           (c);                                 \
+   return x_out.f;                              \
+ }
+#else
+#define return_binary64(s,e,c)                  \
+ { union {UINT64 i; double f; } x_out;          \
+   x_out.i = (((UINT64)(s)) << 63) +            \
+           (((UINT64)(e)) << 52) +              \
+           (c);                                 \
+   *pres = x_out.f;                             \
+   return;                                      \
+ }
+#endif
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_binary80(s,e,c)                      \
+ { BID_BINARY80LDOUBLE x_out;                       \
+   x_out.i.pad128 = 0;                              \
+   x_out.i.pad = 0;                                 \
+   x_out.i.lo4 =  (c)&0xffff;                       \
+   x_out.i.lo3 = ((c)&0xffff0000) >> 16;            \
+   x_out.i.lo2 = ((c)&0xffff00000000ull) >> 32;     \
+   x_out.i.lo1 = ((c)&0xffff000000000000ull) >> 48; \
+   x_out.i.hi = (((UINT64)(s)) << 15) +             \
+                (e);                                \
+   return x_out.f;                                  \
+ }
+#else
+#define return_binary80(s,e,c)                      \
+ { BID_BINARY80LDOUBLE x_out;                       \
+   x_out.i.pad128 = 0;                              \
+   x_out.i.pad = 0;                                 \
+   x_out.i.lo4 =  (c)&0xffff;                       \
+   x_out.i.lo3 = ((c)&0xffff0000) >> 16;            \
+   x_out.i.lo2 = ((c)&0xffff00000000ull) >> 32;     \
+   x_out.i.lo1 = ((c)&0xffff000000000000ull) >> 48; \
+   x_out.i.hi = ((s) << 15) +                       \
+                (e);                                \
+   *pres = x_out.f;                                 \
+   return;                                          \
+ }
+#endif
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_binary128(s,e,c_hi,c_lo)                 \
+ { union {UINT128 i; BINARY128 f; } x_out;             \
+   x_out.i.w[LOW_128W] = (c_lo);                   \
+   x_out.i.w[HIGH_128W] = (((UINT64)(s)) << 63) +   \
+                (((UINT64)(e)) << 48) +                 \
+                (c_hi);                                 \
+   return x_out.f;                                      \
+ }
+#else
+#define return_binary128(s,e,c_hi,c_lo)                 \
+ { union {UINT128 i; BINARY128 f; } x_out;             \
+   x_out.i.w[LOW_128W] = (c_lo);                   \
+   x_out.i.w[HIGH_128W] = (((UINT64)(s)) << 63) +   \
+                (((UINT64)(e)) << 48) +                 \
+                (c_hi);                                 \
+   *pres = x_out.f;                                     \
+   return;                                              \
+ }
+#endif
+
+// Special cases of returning zero, infinity, NaN as binary FP
+// Take parameters for the sign, and for NaN the significand
+
+#define return_binary32_zero(s) return_binary32(s,0,0)
+#define return_binary32_inf(s) return_binary32(s,255,0)
+#define return_binary32_nan(s,c_hi,c_lo) \
+  return_binary32(s,255,(c_hi>>42)+(1ul<<22))
+
+#define return_binary64_zero(s) return_binary64(s,0,0)
+#define return_binary64_inf(s) return_binary64(s,2047,0)
+#define return_binary64_nan(s,c_hi,c_lo) \
+  return_binary64(s,2047,(c_hi>>13)+(1ull<<51))
+
+#define return_binary80_zero(s) return_binary80(s,0,0)
+#define return_binary80_inf(s) return_binary80(s,32767,(1ull<<63))
+#define return_binary80_nan(s,c_hi,c_lo) \
+  return_binary80(s,32767,(c_hi>>2)+(3ull<<62))
+
+#define return_binary128_zero(s) return_binary128(s,0,0,0)
+#define return_binary128_inf(s) return_binary128(s,32767,0,0)
+#define return_binary128_nan(s,c_hi,c_lo) \
+  return_binary128(s,32767,(c_hi>>17)+(1ull<<47),((c_lo>>17)+(c_hi<<47)))
+
+// Return finite values of maximal magnitude in the various formats
+
+#define return_binary32_max(s) return_binary32(s,254,((1ul<<23)-1ul))
+#define return_binary64_max(s) return_binary64(s,2046,((1ull<<52)-1ull))
+#define return_binary80_max(s) return_binary80(s,32766,0xFFFFFFFFFFFFFFFFull)
+#define return_binary128_max(s) \
+  return_binary128(s,32766,((1ull<<48)-1ull),0xFFFFFFFFFFFFFFFFull)
+
+#define return_bid32_max(s) return_bid32(s,191,9999999ul)
+#define return_bid64_max(s) return_bid64(s,767,9999999999999999ull)
+#define return_bid128_max(s)    \
+  return_bid128(s,12287,542101086242752ull,4003012203950112767ull)
+
+// Handle overflow by either infinity or maximal value as appropriate
+
+#define return_binary32_ovf(s)                                               \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_binary32_max(s)                                                   \
+  else return_binary32_inf(s)                                                \
+}
+
+#define return_binary64_ovf(s)                                               \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_binary64_max(s)                                                   \
+  else return_binary64_inf(s)                                                \
+}
+
+#define return_binary80_ovf(s)                                               \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_binary80_max(s)                                                   \
+  else return_binary80_inf(s)                                                \
+}
+
+#define return_binary128_ovf(s)                                              \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_binary128_max(s)                                                  \
+  else return_binary128_inf(s)                                               \
+}
+
+#define return_bid32_ovf(s)                                                  \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_bid32_max(s)                                                      \
+  else return_bid32_inf(s)                                                   \
+}
+
+#define return_bid64_ovf(s)                                                  \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_bid64_max(s)                                                      \
+  else return_bid64_inf(s)                                                   \
+}
+
+#define return_bid128_ovf(s)                                                 \
+{ if ((rnd_mode==ROUNDING_TO_ZERO) ||                                        \
+      (rnd_mode==((s!=0) ? ROUNDING_UP : ROUNDING_DOWN)))                    \
+    return_bid128_max(s)                                                     \
+  else return_bid128_inf(s)                                                  \
+}
+
+// Unpack binary floating-point number x into
+//
+// int    s (sign in the LSB)
+// int    e (true "integer" exponent)
+//        c (normalized coefficient with explicit 1 bit)
+//        t (trailing zero count, valid in normalized case only)
+//        [c_hi,c_lo in the case of quad]
+//
+// Call the given zero, infinity or nan macros if appropriate
+
+#define unpack_binary32(x,s,e,c,t,zero,inf,nan)                             \
+{ union { UINT32 i; float f; } x_in;                                        \
+  x_in.f = x;                                                               \
+  c = x_in.i;                                                               \
+  e = (c >> 23) & ((1ull<<8)-1);                                            \
+  s = c >> 31;                                                              \
+  c = c & ((1ull<<23)-1);                                                   \
+  if (e == 0)                                                               \
+   { int l;                                                                 \
+     if (c == 0) zero;                                                      \
+     l = clz32(c) - (32 - 24);                                              \
+     c = c << l;                                                            \
+     e = -(l + 149);                                                        \
+     t = 0;                                                                 \
+     *pfpsf |= DENORMAL_EXCEPTION;                                          \
+   }                                                                        \
+  else if (e == ((1ull<<8)-1))                                              \
+   { if (c == 0) inf;                                                       \
+     if ((c&(1ul<<22))==0) *pfpsf |= INVALID_EXCEPTION;                     \
+     nan(s,(((unsigned long long) c)) << 42,0ull)                           \
+   }                                                                        \
+  else                                                                      \
+   { c += 1ull<<23;                                                         \
+     t = ctz32(c);                                                          \
+     e -= 150;                                                              \
+   }                                                                        \
+}
+
+#define unpack_binary64(x,s,e,c,t,zero,inf,nan)                             \
+{ union { UINT64 i; double f; } x_in;                                       \
+  x_in.f = x;                                                               \
+  c = x_in.i;                                                               \
+  e = (c >> 52) & ((1ull<<11)-1);                                           \
+  s = c >> 63;                                                              \
+  c = c & ((1ull<<52)-1);                                                   \
+  if (e == 0)                                                               \
+   { int l;                                                                 \
+     if (c == 0) zero;                                                      \
+     l = clz64(c) - (64 - 53);                                              \
+     c = c << l;                                                            \
+     e = -(l + 1074);                                                       \
+     t = 0;                                                                 \
+     *pfpsf |= DENORMAL_EXCEPTION;                                          \
+   }                                                                        \
+  else if (e == ((1ull<<11)-1))                                             \
+   { if (c == 0) inf;                                                       \
+     if ((c&(1ull<<51))==0) *pfpsf |= INVALID_EXCEPTION;                    \
+     nan(s,(((unsigned long long) c) << 13),0ull)                           \
+   }                                                                        \
+  else                                                                      \
+   { c += 1ull<<52;                                                         \
+     t = ctz64(c);                                                          \
+     e -= 1075;                                                             \
+   }                                                                        \
+}
+
+#define unpack_binary80(x,s,e,c,t,zero,inf,nan)                             \
+{ BID_BINARY80LDOUBLE x_in;                                                 \
+  x_in.f = x;                                                               \
+  c = x_in.i.lo4 + ((UINT64)x_in.i.lo3 << 16) +                             \
+      ((UINT64)x_in.i.lo2 << 32) + ((UINT64)x_in.i.lo1 << 48);              \
+  e = x_in.i.hi;                                                            \
+  s = e >> 15;                                                              \
+  e = (e & ((1<<15)-1));                                                    \
+  if (e == 0)                                                               \
+   { int l;                                                                 \
+     if (c == 0) zero;                                                      \
+     l = clz64(c);                                                          \
+     c = c << l;                                                            \
+     e -= (l + 16445);                                                      \
+     t = 0;                                                                 \
+     *pfpsf |= DENORMAL_EXCEPTION;                                          \
+    }                                                                       \
+  else if (e == ((1ull<<15)-1))                                             \
+   { if ((c & ((1ull<<63)-1)) == 0) inf;                                    \
+     if ((c&(1ull<<62))==0) *pfpsf |= INVALID_EXCEPTION;                    \
+     nan(s,(((unsigned long long) c) << 2),0ull)                            \
+   }                                                                        \
+  else                                                                      \
+   { t = ctz64(c);                                                          \
+     e -= 16446;                                                            \
+   }                                                                        \
+}
+
+#define unpack_binary128(x,s,e,c_hi,c_lo,t,zero,inf,nan)                    \
+{ union { UINT128 i; BINARY128 f; } x_in;                                  \
+  x_in.f = x;                                                               \
+  c_lo = x_in.i.w[LOW_128W];                                           \
+  c_hi = x_in.i.w[HIGH_128W];                                           \
+  e = (c_hi >> 48) & ((1ull<<15)-1);                                        \
+  s = c_hi >> 63;                                                           \
+  c_hi = c_hi & ((1ull<<48)-1);                                             \
+  if (e == 0)                                                               \
+   { int l;                                                                 \
+     if ((c_hi == 0) && (c_lo == 0)) zero;                                  \
+     l = clz128(c_hi,c_lo) - (128 - 113);                                   \
+     sll128(c_hi,c_lo,l);                                                   \
+     e = -(l + 16494);                                                      \
+     t = 0;                                                                 \
+     *pfpsf |= DENORMAL_EXCEPTION;                                          \
+   }                                                                        \
+  else if (e == ((1ull<<15)-1))                                             \
+   { if ((c_hi == 0) && (c_lo == 0)) inf;                                   \
+     if ((c_hi&(1ull<<47))==0) *pfpsf |= INVALID_EXCEPTION;                 \
+     nan(s,((((unsigned long long) c_hi) << 17) +                           \
+            (((unsigned long long) c_lo) >> 47)),                           \
+           (((unsigned long long) c_lo) << 17))                             \
+   }                                                                        \
+  else                                                                      \
+   { c_hi += 1ull<<48;                                                      \
+     t = ctz128(c_hi,c_lo);                                                 \
+     e -= 16495;                                                            \
+   }                                                                        \
+}
+
+// Pack and return decimal number from raw fields
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_bid32(s,e,c)                                                 \
+  { if ((UINT32) (c) < (1ul<<23))                                           \
+      return (((UINT32) (s) << 31) + ((UINT32) (e) << 23) + (UINT32) (c));  \
+    else                                                                    \
+      return (((UINT32) (s) << 31) + ((0x3ull<<29) - (1ull<<23)) +          \
+             ((UINT32) (e) << 21) + (UINT32) (c));                          \
+  }
+#else
+#define return_bid32(s,e,c)                                                 \
+  { if ((UINT32) (c) < (1ul<<23))                                           \
+      *pres = (((UINT32) (s) << 31) + ((UINT32) (e) << 23) + (UINT32) (c)); \
+    else                                                                    \
+      *pres = (((UINT32) (s) << 31) + ((0x3ull<<29) - (1ull<<23)) +         \
+             ((UINT32) (e) << 21) + (UINT32) (c));                          \
+    return;                                                                 \
+  }
+#endif
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_bid64(s,e,c)                                                 \
+  { if ((c) < (1ull<<53))                                                   \
+      return (((UINT64) (s) << 63) + ((UINT64) (e) << 53) + (c));           \
+    else                                                                    \
+      return (((UINT64) (s) << 63) + ((0x3ull<<61) - (1ull<<53)) +          \
+             ((UINT64) (e) << 51) + (c));                                   \
+  }
+#else
+#define return_bid64(s,e,c)                                                 \
+  { if ((c) < (1ull<<53))                                                   \
+      *pres = (((UINT64) (s) << 63) + ((UINT64) (e) << 53) + (c));          \
+    else                                                                    \
+      *pres = (((UINT64) (s) << 63) + ((0x3ull<<61) - (1ull<<53)) +         \
+             ((UINT64) (e) << 51) + (c));                                   \
+    return;                                                                 \
+  }
+#endif
+
+#if !DECIMAL_CALL_BY_REFERENCE
+#define return_bid128(s,e,c_hi,c_lo)                                        \
+  { UINT128 x_out;                                                          \
+    x_out.w[LOW_128W] = c_lo;                                          \
+    x_out.w[HIGH_128W] = ((UINT64) (s) << 63) + ((UINT64) (e) << 49) +  \
+                             (c_hi);                                        \
+    return x_out;                                                           \
+  }
+#else
+#define return_bid128(s,e,c_hi,c_lo)                                                    \
+  { UINT128 x_out;                                                                      \
+    x_out.w[LOW_128W] = c_lo;                                                      \
+    x_out.w[HIGH_128W] = ((UINT64) (s) << 63) + ((UINT64) (e) << 49) + (c_hi);      \
+    *pres = x_out;                                                                      \
+    return;                                                                             \
+  }
+#endif
+
+// Special cases of returning zero, infinity, NaN as decimal FP
+// Take parameters for the sign, and for NaN the significand
+
+#define return_bid32_zero(s) return_bid32(s,101,0)
+#define return_bid32_inf(s) return_bid32(s,(0xF<<4),0)
+#define return_bid32_nan(s,c_hi,c_lo)                                       \
+  return_bid32(s,(0x1F<<3),(((c_hi>>44) > 999999ul) ? 0 : (c_hi>>44)));
+
+#define return_bid64_zero(s) return_bid64(s,398,0)
+#define return_bid64_inf(s) return_bid64(s,(0xF<<6),0)
+#define return_bid64_nan(s,c_hi,c_lo)                                       \
+  return_bid64(s,(0x1F<<5),                                                 \
+               (((c_hi>>14) > 999999999999999ull) ? 0 : (c_hi>>14)));
+
+#define return_bid128_zero(s) return_bid128(s,6176,0,0)
+#define return_bid128_inf(s) return_bid128(s,(0xF<<10),0,0)
+#define return_bid128_nan(s,c_hi,c_lo)                                      \
+ { if (lt128(54210108624275ull,4089650035136921599ull,                      \
+             (c_hi>>18),((c_lo>>18)+(c_hi<<46))))                           \
+   return_bid128(s,(0x1F<<9),0ull,0ull)                                     \
+   else return_bid128(s,(0x1F<<9),(c_hi>>18),((c_lo>>18)+(c_hi<<46)))       \
+ }
+
+// Unpack decimal floating-point number x into sign,exponent,coefficient
+// In special cases, call the macros provided
+// Coefficient is normalized in the binary sense with postcorrection k,
+// so that x = 10^e * c / 2^k and the range of c is:
+//
+// 2^23 <= c < 2^24   (decimal32)
+// 2^53 <= c < 2^54   (decimal64)
+// 2^112 <= c < 2^113 (decimal128)
+
+#define unpack_bid32(x,s,e,k,c,zero,inf,nan)                                \
+{ s = x >> 31;                                                              \
+  if ((x & (3ull<<29)) == (3ull<<29))                                       \
+   { if ((x & (0xFull<<27)) == (0xFull<<27))                                \
+      { if ((x & (0x1Full<<26)) != (0x1Full<<26)) inf;                      \
+        if ((x & (1ul<<25))!=0) *pfpsf |= INVALID_EXCEPTION;                \
+        nan(s,((((x) & 0xFFFFul) > 999999ul) ? 0 :                          \
+               (((unsigned long long) x) << 44)),0ull);                     \
+      }                                                                     \
+     e = ((x >> 21) & ((1ull<<8)-1)) - 101;                                 \
+     c = (1ull<<23) + (x & ((1ull<<21)-1));                                 \
+     if ((unsigned long)(c) > 9999999ul) c = 0;                             \
+     k = 0;                                                                 \
+   }                                                                        \
+  else                                                                      \
+   { e = ((x >> 23) & ((1ull<<8)-1)) - 101;                                 \
+     c = x & ((1ull<<23)-1);                                                \
+     if (c == 0) zero;                                                      \
+     k = clz32(c) - 8;                                                      \
+     c = c << k;                                                            \
+   }                                                                        \
+}
+
+#define unpack_bid64(x,s,e,k,c,zero,inf,nan)                                \
+{ s = x >> 63;                                                              \
+  if ((x & (3ull<<61)) == (3ull<<61))                                       \
+   { if ((x & (0xFull<<59)) == (0xFull<<59))                                \
+      { if ((x & (0x1Full<<58)) != (0x1Full<<58)) inf;                      \
+        if ((x & (1ull<<57))!=0) *pfpsf |= INVALID_EXCEPTION;               \
+        nan(s,((((x) & 0x3FFFFFFFFFFFFull) > 999999999999999ull) ? 0 :      \
+               (((unsigned long long) x) << 14)),0ull);                     \
+      }                                                                     \
+     e = ((x >> 51) & ((1ull<<10)-1)) - 398;                                \
+     c = (1ull<<53) + (x & ((1ull<<51)-1));                                 \
+     if ((unsigned long long)(c) > 9999999999999999ull) c = 0;              \
+     k = 0;                                                                 \
+   }                                                                        \
+  else                                                                      \
+   { e = ((x >> 53) & ((1ull<<10)-1)) - 398;                                \
+     c = x & ((1ull<<53)-1);                                                \
+     if (c == 0) zero;                                                      \
+     k = clz64(c) - 10;                                                     \
+     c = c << k;                                                            \
+   }                                                                        \
+}
+
+#define unpack_bid128(x,s,e,k,c,zero,inf,nan)                               \
+{ s = x.w[HIGH_128W] >> 63;                                             \
+  if ((x.w[HIGH_128W] & (3ull<<61)) == (3ull<<61))                      \
+   { if ((x.w[HIGH_128W] & (0xFull<<59)) == (0xFull<<59))               \
+      { if ((x.w[HIGH_128W] & (0x1Full<<58)) != (0x1Full<<58)) inf;     \
+        if ((x.w[HIGH_128W] & (1ull<<57))!=0)                           \
+           *pfpsf |= INVALID_EXCEPTION;                                     \
+        if (lt128(54210108624275ull,4089650035136921599ull,                 \
+            (x.w[HIGH_128W] & 0x3FFFFFFFFFFFull),x.w[LOW_128W]))   \
+          nan(s,0ull,0ull);                                                 \
+        nan(s,((((unsigned long long) x.w[HIGH_128W]) << 18) +          \
+               (((unsigned long long) x.w[LOW_128W]) >> 46)),          \
+              (((unsigned long long) x.w[LOW_128W]) << 18));           \
+      }                                                                     \
+     zero;                                                                  \
+   }                                                                        \
+  else                                                                      \
+   { e = ((x.w[HIGH_128W] >> 49) & ((1ull<<14)-1)) - 6176;              \
+     c.w[1] = x.w[HIGH_128W] & ((1ull<<49)-1);                          \
+     c.w[0] = x.w[LOW_128W];                                           \
+     if (lt128(542101086242752ull,4003012203950112767ull,                   \
+               c.w[1],c.w[0]))                                              \
+      { c.w[1] = 0ull; c.w[0] = 0ull; }                                     \
+     if ((c.w[1] == 0) && (c.w[0] == 0)) zero;                              \
+     k = clz128(c.w[1],c.w[0]) - 15;                                        \
+     sll128(c.w[1],c.w[0],k);                                               \
+   }                                                                        \
+}
+
+// Rounding boundaries table, indexed by
+// 4 * rounding_mode + 2 * sign + lsb of truncation
+// We round up if the round/sticky data is strictly > this boundary
+//
+// NB: This depends on the particular values of the rounding mode
+// numbers, which are supposed to be defined as here:
+//
+// #define ROUNDING_TO_NEAREST     0x00000
+// #define ROUNDING_DOWN           0x00001
+// #define ROUNDING_UP             0x00002
+// #define ROUNDING_TO_ZERO        0x00003
+// #define ROUNDING_TIES_AWAY      0x00004
+//
+// Some of the shortcuts below in "underflow after rounding" also use
+// the concrete values.
+//
+// So we add a directive here to double-check that this is the case
+
+#if ((ROUNDING_TO_NEAREST!=0) || (ROUNDING_DOWN!=1) ||          \
+     (ROUNDING_UP!=2) || (ROUNDING_TO_ZERO!=3) ||               \
+     (ROUNDING_TIES_AWAY!=4))
+#error "Rounding mode numbers don't match tables for binary/decimal conversion"
+#endif
+
+static const UINT128 roundbound_128[] = { {{0ull, (1ull << 63)}},       // ROUNDING_TO_NEAREST | positive | even
+{{~0ull, (1ull << 63) - 1}},    // ROUNDING_TO_NEAREST | positive | odd
+{{0ull, (1ull << 63)}}, // ROUNDING_TO_NEAREST | negative | even
+{{~0ull, (1ull << 63) - 1}},    // ROUNDING_TO_NEAREST | negative | odd
+
+{{~0ull, ~0ull}},       // ROUNDING_DOWN       | positive | even
+{{~0ull, ~0ull}},       // ROUNDING_DOWN       | positive | odd
+{{0ull, 0ull}}, // ROUNDING_DOWN       | negative | even
+{{0ull, 0ull}}, // ROUNDING_DOWN       | negative | odd
+
+{{0ull, 0ull}}, // ROUNDING_UP         | positive | even
+{{0ull, 0ull}}, // ROUNDING_UP         | positive | odd
+{{~0ull, ~0ull}},       // ROUNDING_UP         | negative | even
+{{~0ull, ~0ull}},       // ROUNDING_UP         | negative | odd
+
+{{~0ull, ~0ull}},       // ROUNDING_TO_ZERO    | positive | even
+{{~0ull, ~0ull}},       // ROUNDING_TO_ZERO    | positive | odd
+{{~0ull, ~0ull}},       // ROUNDING_TO_ZERO    | negative | even
+{{~0ull, ~0ull}},       // ROUNDING_TO_ZERO    | negative | odd
+
+{{~0ull, (1ull << 63) - 1}},    // ROUNDING_TIES_AWAY  | positive | even
+{{~0ull, (1ull << 63) - 1}},    // ROUNDING_TIES_AWAY  | positive | odd
+{{~0ull, (1ull << 63) - 1}},    // ROUNDING_TIES_AWAY  | negative | even
+{{~0ull, (1ull << 63) - 1}}     // ROUNDING_TIES_AWAY  | negative | odd
+};
+
+// Table of powers of 5
+
+static const UINT128 power_five[] = { {{1ull, 0ull}},
+{{5ull, 0ull}},
+{{25ull, 0ull}},
+{{125ull, 0ull}},
+{{625ull, 0ull}},
+{{3125ull, 0ull}},
+{{15625ull, 0ull}},
+{{78125ull, 0ull}},
+{{390625ull, 0ull}},
+{{1953125ull, 0ull}},
+{{9765625ull, 0ull}},
+{{48828125ull, 0ull}},
+{{244140625ull, 0ull}},
+{{1220703125ull, 0ull}},
+{{6103515625ull, 0ull}},
+{{30517578125ull, 0ull}},
+{{152587890625ull, 0ull}},
+{{762939453125ull, 0ull}},
+{{3814697265625ull, 0ull}},
+{{19073486328125ull, 0ull}},
+{{95367431640625ull, 0ull}},
+{{476837158203125ull, 0ull}},
+{{2384185791015625ull, 0ull}},
+{{11920928955078125ull, 0ull}},
+{{59604644775390625ull, 0ull}},
+{{298023223876953125ull, 0ull}},
+{{1490116119384765625ull, 0ull}},
+{{7450580596923828125ull, 0ull}},
+{{359414837200037393ull, 2ull}},
+{{1797074186000186965ull, 10ull}},
+{{8985370930000934825ull, 50ull}},
+{{8033366502585570893ull, 252ull}},
+{{3273344365508751233ull, 1262ull}},
+{{16366721827543756165ull, 6310ull}},
+{{8046632842880574361ull, 31554ull}},
+{{3339676066983768573ull, 157772ull}},
+{{16698380334918842865ull, 788860ull}},
+{{9704925379756007861ull, 3944304ull}},
+{{11631138751360936073ull, 19721522ull}},
+{{2815461535676025517ull, 98607613ull}},
+{{14077307678380127585ull, 493038065ull}},
+{{15046306170771983077ull, 2465190328ull}},
+{{1444554559021708921ull, 12325951644ull}},
+{{7222772795108544605ull, 61629758220ull}},
+{{17667119901833171409ull, 308148791101ull}},
+{{14548623214327650581ull, 1540743955509ull}},
+{{17402883850509598057ull, 7703719777548ull}},
+{{13227442957709783821ull, 38518598887744ull}},
+{{10796982567420264257ull, 192592994438723ull}}
+};
+
+
+// Tables of values for the various conversions:
+//
+// exponents: table of output exponents
+// breakpoints: test values to decide between two possible exponents
+// multipliers1/multipliers2: corresponding reciprocal multipliers
+// coefflimits: used in exactness checks
+//
+
+static const UINT128 breakpoints_binary32[] =
+  { {{17291492046443221751ull, 474778387287989ull}},
+{{17522542451896487724ull, 379822709830391ull}},
+{{10328685146775279856ull, 303858167864313ull}},
+{{12836547420098537447ull, 486173068582901ull}},
+{{6579889121336919634ull, 388938454866321ull}},
+{{1574562482327625384ull, 311150763893057ull}},
+{{6208648786466110938ull, 497841222228891ull}},
+{{1277570214430978427ull, 398272977783113ull}},
+{{8400753801028603388ull, 318618382226490ull}},
+{{13441206081645765421ull, 509789411562384ull}},
+{{14442313680058522660ull, 407831529249907ull}},
+{{4175153314562997481ull, 326265223399926ull}},
+{{17748291747526526940ull, 522024357439881ull}},
+{{10509284583279311229ull, 417619485951905ull}},
+{{8407427666623448983ull, 334095588761524ull}},
+{{2383837822371787403ull, 534552942018439ull}},
+{{5596419072639340246ull, 427642353614751ull}},
+{{787786443369561873ull, 342113882891801ull}},
+{{12328504753617029967ull, 547382212626881ull}},
+{{6173454988151713650ull, 437905770101505ull}},
+{{4938763990521370920ull, 350324616081204ull}},
+{{15280720014318014119ull, 560519385729926ull}},
+{{8535227196712500972ull, 448415508583941ull}},
+{{3138832942628090454ull, 358732406867153ull}},
+{{9889763983586293010ull, 286985925493722ull}},
+{{1066227114770427523ull, 459177480789956ull}},
+{{15610376950783983311ull, 367341984631964ull}},
+{{16177650375369096972ull, 293873587705571ull}},
+{{58798897397182893ull, 470197740328915ull}},
+{{47039117917746314ull, 376158192263132ull}},
+{{11105677738559928021ull, 300926553810505ull}},
+{{17769084381695884834ull, 481482486096808ull}},
+{{3147221061130976897ull, 385185988877447ull}},
+{{13585823293130512487ull, 308148791101957ull}},
+{{6979922010041178687ull, 493038065763132ull}},
+{{16651984052258673919ull, 394430452610505ull}},
+{{13321587241806939135ull, 315544362088404ull}},
+{{10246493142665371647ull, 504870979341447ull}},
+{{818496884648476671ull, 403896783473158ull}},
+{{8033495137202601983ull, 323117426778526ull}},
+{{5474894590040342527ull, 516987882845642ull}},
+{{15447962116258004991ull, 413590306276513ull}},
+{{1290323248780673023ull, 330872245021211ull}},
+{{13132563642274807807ull, 529395592033937ull}},
+{{3127353284336025599ull, 423516473627150ull}},
+{{2501882627468820479ull, 338813178901720ull}},
+{{4003012203950112767ull, 542101086242752ull}},
+{{14270456207385821183ull, 433680868994201ull}},
+{{7727016151166746623ull, 346944695195361ull}},
+{{4984528212382973951ull, 555111512312578ull}},
+{{11366320199390199807ull, 444089209850062ull}},
+{{1714358530028339199ull, 355271367880050ull}},
+{{1371486824022671359ull, 284217094304040ull}},
+{{2194378918436274175ull, 454747350886464ull}},
+{{5444851949490929663ull, 363797880709171ull}},
+{{666532744850833407ull, 291038304567337ull}},
+{{4755801206503243775ull, 465661287307739ull}},
+{{7493989779944505343ull, 372529029846191ull}},
+{{2305843009213693951ull, 298023223876953ull}},
+{{18446744073709551615ull, 476837158203124ull}},
+{{18446744073709551615ull, 381469726562499ull}},
+{{18446744073709551615ull, 305175781249999ull}},
+{{18446744073709551615ull, 488281249999999ull}},
+{{18446744073709551615ull, 390624999999999ull}},
+{{18446744073709551615ull, 312499999999999ull}},
+{{18446744073709551615ull, 499999999999999ull}},
+{{18446744073709551615ull, 399999999999999ull}},
+{{18446744073709551615ull, 319999999999999ull}},
+{{18446744073709551615ull, 511999999999999ull}},
+{{18446744073709551615ull, 409599999999999ull}},
+{{18446744073709551615ull, 327679999999999ull}},
+{{18446744073709551615ull, 524287999999999ull}},
+{{18446744073709551615ull, 419430399999999ull}},
+{{18446744073709551615ull, 335544319999999ull}},
+{{18446744073709551615ull, 536870911999999ull}},
+{{18446744073709551615ull, 429496729599999ull}},
+{{18446744073709551615ull, 343597383679999ull}},
+{{18446744073709551615ull, 549755813887999ull}},
+{{18446744073709551615ull, 439804651110399ull}},
+{{18446744073709551615ull, 351843720888319ull}},
+{{18446744073709551615ull, 281474976710655ull}},
+{{11068046444225730969ull, 450359962737049ull}},
+{{12543785970122495098ull, 360287970189639ull}},
+{{13724377590839906402ull, 288230376151711ull}},
+{{14580306515860029597ull, 461168601842738ull}},
+{{596198768462292708ull, 368934881474191ull}},
+{{15234354273737475459ull, 295147905179352ull}},
+{{9617571579012319442ull, 472236648286964ull}},
+{{11383406077951765876ull, 377789318629571ull}},
+{{5417376047619502378ull, 302231454903657ull}},
+{{12357150490933114128ull, 483570327845851ull}},
+{{6196371578004580979ull, 386856262276681ull}},
+{{1267748447661754460ull, 309485009821345ull}},
+{{2028397516258807136ull, 495176015714152ull}},
+{{12690764457232776679ull, 396140812571321ull}},
+{{6463262751044311020ull, 316912650057057ull}},
+{{14030569216412807955ull, 507060240091291ull}},
+{{7535106558388336041ull, 405648192073033ull}},
+{{13406782876194489479ull, 324518553658426ull}},
+{{14072154972427362520ull, 519229685853482ull}},
+{{3879026348458069369ull, 415383748682786ull}},
+{{17860616337734096788ull, 332306998946228ull}},
+{{6440893251923092922ull, 531691198313966ull}},
+{{1463365786796564015ull, 425352958651173ull}},
+{{8549390258921071858ull, 340282366920938ull}},
+{{9989675599531804650ull, 544451787073501ull}},
+{{4302391664883533397ull, 435561429658801ull}},
+{{18199308590874468010ull, 348449143727040ull}},
+{{10672149671689597200ull, 557518629963265ull}},
+{{8537719737351677760ull, 446014903970612ull}},
+{{17898222234107073178ull, 356811923176489ull}},
+{{18007926602027568865ull, 285449538541191ull}},
+{{2987240860050737922ull, 456719261665907ull}},
+{{13457839132266321307ull, 365375409332725ull}},
+{{10766271305813057046ull, 292300327466180ull}},
+{{17226034089300891273ull, 467680523945888ull}},
+{{2712780827214982049ull, 374144419156711ull}},
+{{16927619920739626932ull, 299315535325368ull}},
+{{4948098984731941152ull, 478904856520590ull}},
+{{3958479187785552922ull, 383123885216472ull}}
+};
+
+static const int exponents_binary32[] = { -27,
+  -24,
+  -21,
+  -17,
+  -14,
+  -11,
+  -7,
+  -4,
+  -1,
+  3,
+  6,
+  9,
+  13,
+  16,
+  19,
+  23,
+  26,
+  29,
+  33,
+  36,
+  39,
+  43,
+  46,
+  49,
+  52,
+  56,
+  59,
+  62,
+  66,
+  69,
+  72,
+  76,
+  79,
+  82,
+  86,
+  89,
+  92,
+  96,
+  99,
+  102,
+  106,
+  109,
+  112,
+  116,
+  119,
+  122,
+  126,
+  129,
+  132,
+  136,
+  139,
+  142,
+  145,
+  149,
+  152,
+  155,
+  159,
+  162,
+  165,
+  169,
+  172,
+  175,
+  179,
+  182,
+  185,
+  189,
+  192,
+  195,
+  199,
+  202,
+  205,
+  209,
+  212,
+  215,
+  219,
+  222,
+  225,
+  229,
+  232,
+  235,
+  238,
+  242,
+  245,
+  248,
+  252,
+  255,
+  258,
+  262,
+  265,
+  268,
+  272,
+  275,
+  278,
+  282,
+  285,
+  288,
+  292,
+  295,
+  298,
+  302,
+  305,
+  308,
+  312,
+  315,
+  318,
+  322,
+  325,
+  328,
+  332,
+  335,
+  338,
+  341,
+  345,
+  348,
+  351,
+  355,
+  358,
+  361,
+  365,
+  368,
+};
+
+static const UINT256 multipliers1_binary32[] =
+  { {{6013890151484785128ull, 7481633477359093489ull,
+      655737588518723529ull, 651851512427ull}},
+{{12129048707783369314ull, 13963727865126254765ull,
+  14654730040930568123ull, 814814390533ull}},
+{{1326252829447047930ull, 12842973812980430553ull,
+  4483354495881046442ull, 1018517988167ull}},
+{{12358123064472874716ull, 12638544651540156999ull,
+  9719625587566735882ull, 636573742604ull}},
+{{10835967812163705491ull, 6574808777570420441ull,
+  12149531984458419853ull, 795717178255ull}},
+{{18156645783632019768ull, 12830196990390413455ull,
+  10575228962145636912ull, 994646472819ull}},
+{{18265432642411094211ull, 8018873118994008409ull,
+  4303675092127329118ull, 621654045512ull}},
+{{8996732747731704052ull, 800219361887734704ull, 5379593865159161398ull,
+  777067556890ull}},
+{{11245915934664630065ull, 10223646239214444188ull,
+  15947864368303727555ull, 971334446112ull}},
+{{16252069496020169599ull, 4083935890295333665ull,
+  9967415230189829722ull, 607084028820ull}},
+{{6480028814743048286ull, 14328291899723942890ull,
+  12459269037737287152ull, 758855036025ull}},
+{{17323408055283586166ull, 17910364874654928612ull,
+  1739028241889445228ull, 948568795032ull}},
+{{1603757997697465546ull, 1970606009804554575ull,
+  1086892651180903268ull, 592855496895ull}},
+{{15839755552403995644ull, 2463257512255693218ull,
+  15193673869258292797ull, 741069371118ull}},
+{{10576322403650218747ull, 7690757908747004427ull,
+  9768720299718090188ull, 926336713898ull}},
+{{4304358493067692765ull, 14030095729821653575ull,
+  10717136205751194271ull, 578960446186ull}},
+{{768762097907228052ull, 12925933643849679065ull,
+  4173048220334217031ull, 723700557733ull}},
+{{5572638640811422969ull, 11545731036384710927ull,
+  9827996293845159193ull, 904625697166ull}},
+{{10400428178148221212ull, 298552870099362473ull,
+  1530811665225836592ull, 565391060729ull}},
+{{17612221241112664419ull, 373191087624203091ull,
+  6525200599959683644ull, 706738825911ull}},
+{{17403590532963442619ull, 466488859530253864ull,
+  3544814731522216651ull, 883423532389ull}},
+{{10877244083102151637ull, 16432456601702266329ull,
+  4521352216415079358ull, 552139707743ull}},
+{{18208241122305077450ull, 11317198715273057103ull,
+  1040004252091461294ull, 690174634679ull}},
+{{18148615384453958909ull, 4923126357236545571ull,
+  15135063370396490330ull, 862718293348ull}},
+{{18074083212140060732ull, 15377279983400457772ull,
+  472085139286061296ull, 1078397866686ull}},
+{{2072929970732762150ull, 9610799989625286108ull,
+  14130111267335952022ull, 673998666678ull}},
+{{2591162463415952687ull, 2790127950176831827ull,
+  8439267047315164220ull, 842498333348ull}},
+{{17074011134552104570ull, 3487659937721039783ull,
+  10549083809143955275ull, 1053122916685ull}},
+{{17588785986736147213ull, 18320688525571507528ull,
+  8899020389928665998ull, 658201822928ull}},
+{{3539238409710632400ull, 13677488620109608603ull,
+  11123775487410832498ull, 822752278660ull}},
+{{18259106067420454212ull, 7873488738282234945ull,
+  13904719359263540623ull, 1028440348325ull}},
+{{4494412264496702026ull, 11838459489067478697ull,
+  10996292608753406841ull, 642775217703ull}},
+{{10229701349048265437ull, 963016306052184659ull,
+  9133679742514370648ull, 803469022129ull}},
+{{8175440667882943892ull, 1203770382565230824ull,
+  16028785696570351214ull, 1004336277661ull}},
+{{5109650417426839933ull, 14587414544385432977ull,
+  12323834069570163460ull, 627710173538ull}},
+{{10998749040210937820ull, 18234268180481791221ull,
+  6181420550107928517ull, 784637716923ull}},
+{{18360122318691060179ull, 8957777170320075314ull,
+  3115089669207522743ull, 980797146154ull}},
+{{16086762467609300516ull, 12516139759091128927ull,
+  6558617061682089618ull, 612998216346ull}},
+{{15496767066084237741ull, 6421802662009135351ull,
+  17421643363957387831ull, 766247770432ull}},
+{{14759272814177909272ull, 3415567309084031285ull,
+  3330310131237183173ull, 957809713041ull}},
+{{11530388518074887247ull, 4440572577391213505ull,
+  13610658878091709243ull, 598631070650ull}},
+{{577927592311445347ull, 939029703311628978ull, 7789951560759860746ull,
+  748288838313ull}},
+{{9945781527244082491ull, 10397159165994312030ull,
+  14349125469377213836ull, 935361047891ull}},
+{{1604427436100163653ull, 15721596515601220827ull,
+  6662360409147064695ull, 584600654932ull}},
+{{15840592350407368278ull, 15040309626074138129ull,
+  8327950511433830869ull, 730750818665ull}},
+{{5965682382727046636ull, 4965328977310508950ull,
+  15021624157719676491ull, 913438523331ull}},
+{{17563609544486567859ull, 797487601605374141ull,
+  7082672089361103855ull, 570899077082ull}},
+{{8119453875326046112ull, 14831917557288881389ull,
+  18076712148556155626ull, 713623846352ull}},
+{{14761003362584945544ull, 9316524909756325928ull,
+  4149146111985642917ull, 892029807941ull}},
+{{9225627101615590965ull, 8128671077811397657ull,
+  4899059329204720775ull, 557518629963ull}},
+{{16143719895446876610ull, 5549152828836859167ull,
+  1512138143078513065ull, 696898287454ull}},
+{{15567963850881207859ull, 11548127054473461863ull,
+  11113544715702917139ull, 871122859317ull}},
+{{14848268795174121920ull, 9823472799664439425ull, 56872839346482712ull,
+  1088903574147ull}},
+{{2362638969342744344ull, 6139670499790274641ull,
+  16176446589087409359ull, 680564733841ull}},
+{{7564984730105818334ull, 3062902106310455397ull,
+  6385500181077097987ull, 850705917302ull}},
+{{14067916931059660821ull, 17663685688170232958ull,
+  17205247263201148291ull, 1063382396627ull}},
+{{4180762063484900109ull, 8733960545892701647ull,
+  8447436530287023730ull, 664613997892ull}},
+{{614266560928737233ull, 1694078645511101251ull,
+  10559295662858779663ull, 830767497365ull}},
+{{14602891256443085253ull, 15952656362171040275ull,
+  17810805597000862482ull, 1038459371706ull}},
+{{6820964026063234331ull, 14582096244784288076ull,
+  15743439516552926955ull, 649037107316ull}},
+{{8526205032579042914ull, 13615934287552972191ull,
+  1232555321981607078ull, 811296384146ull}},
+{{6046070272296415738ull, 7796545822586439431ull,
+  10764066189331784656ull, 1014120480182ull}},
+{{10696322947826341692ull, 4872841139116524644ull,
+  2115855349904977506ull, 633825300114ull}},
+{{13370403684782927115ull, 15314423460750431613ull,
+  11868191224235997690ull, 792281625142ull}},
+{{2877946550696495182ull, 9919657289083263709ull,
+  5611866993440221305ull, 990352031428ull}},
+{{4104559603399003441ull, 17729000851745509578ull,
+  12730788907754914123ull, 618970019642ull}},
+{{14354071541103530109ull, 17549565046254499068ull,
+  6690114097838866846ull, 773712524553ull}},
+{{17942589426379412636ull, 12713584270963348027ull,
+  12974328640725971462ull, 967140655691ull}},
+{{8908275382273438946ull, 3334304150924704613ull,
+  5803112391240038212ull, 604462909807ull}},
+{{15747030246269186586ull, 4167880188655880766ull,
+  2642204470622659861ull, 755578637259ull}},
+{{10460415770981707425ull, 9821536254247238862ull,
+  17137813643560488538ull, 944473296573ull}},
+{{1926073838436179237ull, 10750146177331912193ull,
+  13016976536438999288ull, 590295810358ull}},
+{{7019278316472611950ull, 13437682721664890241ull,
+  7047848633693973302ull, 737869762948ull}},
+{{13385783914018152841ull, 7573731365226336993ull,
+  8809810792117466628ull, 922337203685ull}},
+{{1448585918620263670ull, 13956954140121236429ull,
+  7811974754287110594ull, 576460752303ull}},
+{{6422418416702717491ull, 8222820638296769728ull,
+  5153282424431500339ull, 720575940379ull}},
+{{8028023020878396864ull, 5666839779443574256ull,
+  1829917012111987520ull, 900719925474ull}},
+{{5017514388048998040ull, 3541774862152233910ull,
+  5755384150997380104ull, 562949953421ull}},
+{{15495265021916023358ull, 4427218577690292387ull,
+  11805916207174113034ull, 703687441776ull}},
+{{14757395258967641293ull, 14757395258967641292ull,
+  14757395258967641292ull, 879609302220ull}},
+{{0ull, 0ull, 0ull, 1099511627776ull}},
+{{0ull, 0ull, 0ull, 687194767360ull}},
+{{0ull, 0ull, 0ull, 858993459200ull}},
+{{0ull, 0ull, 0ull, 1073741824000ull}},
+{{0ull, 0ull, 0ull, 671088640000ull}},
+{{0ull, 0ull, 0ull, 838860800000ull}},
+{{0ull, 0ull, 0ull, 1048576000000ull}},
+{{0ull, 0ull, 0ull, 655360000000ull}},
+{{0ull, 0ull, 0ull, 819200000000ull}},
+{{0ull, 0ull, 0ull, 1024000000000ull}},
+{{0ull, 0ull, 0ull, 640000000000ull}},
+{{0ull, 0ull, 0ull, 800000000000ull}},
+{{0ull, 0ull, 0ull, 1000000000000ull}},
+{{0ull, 0ull, 0ull, 625000000000ull}},
+{{0ull, 0ull, 0ull, 781250000000ull}},
+{{0ull, 0ull, 0ull, 976562500000ull}},
+{{0ull, 0ull, 0ull, 610351562500ull}},
+{{0ull, 0ull, 0ull, 762939453125ull}},
+{{0ull, 0ull, 4611686018427387904ull, 953674316406ull}},
+{{0ull, 0ull, 16717361816799281152ull, 596046447753ull}},
+{{0ull, 0ull, 7061644215716937728ull, 745058059692ull}},
+{{0ull, 0ull, 8827055269646172160ull, 931322574615ull}},
+{{0ull, 0ull, 12434438571169939456ull, 582076609134ull}},
+{{0ull, 0ull, 6319676177107648512ull, 727595761418ull}},
+{{0ull, 0ull, 17122967258239336448ull, 909494701772ull}},
+{{0ull, 0ull, 1478482499544809472ull, 568434188608ull}},
+{{0ull, 0ull, 1848103124431011840ull, 710542735760ull}},
+{{0ull, 0ull, 2310128905538764800ull, 888178419700ull}},
+{{0ull, 0ull, 10667202602816503808ull, 555111512312ull}},
+{{0ull, 0ull, 13334003253520629760ull, 693889390390ull}},
+{{0ull, 0ull, 7444132030046011392ull, 867361737988ull}},
+{{0ull, 0ull, 9305165037557514240ull, 1084202172485ull}},
+{{0ull, 0ull, 8121571157687140352ull, 677626357803ull}},
+{{0ull, 0ull, 5540277928681537536ull, 847032947254ull}},
+{{0ull, 0ull, 16148719447706697728ull, 1058791184067ull}},
+{{0ull, 0ull, 7787106645602992128ull, 661744490042ull}},
+{{0ull, 0ull, 510511270148964352ull, 827180612553ull}},
+{{0ull, 0ull, 5249825106113593344ull, 1033975765691ull}},
+{{0ull, 0ull, 975297682107301888ull, 646234853557ull}},
+{{0ull, 0ull, 5830808121061515264ull, 807793566946ull}}
+};
+
+static const UINT256 multipliers2_binary32[] =
+  { {{12230317112597168372ull, 12964188775534322552ull,
+      9551240831114137572ull, 325925756213ull}},
+{{15287896390746460465ull, 16205235969417903190ull,
+  16550737057320059869ull, 407407195266ull}},
+{{9886498451578299773ull, 6421486906490215276ull,
+  11465049284795299029ull, 509258994083ull}},
+{{15402433569091213166ull, 6319272325770078499ull,
+  4859812793783367941ull, 318286871302ull}},
+{{14641355942936628554ull, 12510776425639986028ull,
+  15298138029083985734ull, 397858589127ull}},
+{{18301694928670785692ull, 6415098495195206727ull,
+  14510986517927594264ull, 497323236409ull}},
+{{18356088358060322914ull, 4009436559497004204ull,
+  2151837546063664559ull, 310827022756ull}},
+{{4498366373865852026ull, 400109680943867352ull, 2689796932579580699ull,
+  388533778445ull}},
+{{5622957967332315033ull, 14335195156461997902ull,
+  7973932184151863777ull, 485667223056ull}},
+{{17349406784864860608ull, 2041967945147666832ull,
+  4983707615094914861ull, 303542014410ull}},
+{{3240014407371524143ull, 7164145949861971445ull,
+  15453006555723419384ull, 379427518012ull}},
+{{8661704027641793083ull, 8955182437327464306ull, 869514120944722614ull,
+  474284397516ull}},
+{{10025251035703508581ull, 985303004902277287ull,
+  9766818362445227442ull, 296427748447ull}},
+{{7919877776201997822ull, 10455000792982622417ull,
+  7596836934629146398ull, 370534685559ull}},
+{{14511533238679885182ull, 3845378954373502213ull,
+  4884360149859045094ull, 463168356949ull}},
+{{11375551283388622191ull, 16238419901765602595ull,
+  5358568102875597135ull, 289480223093ull}},
+{{9607753085808389834ull, 15686338858779615340ull,
+  11309896147021884323ull, 361850278866ull}},
+{{12009691357260487293ull, 14996237555047131271ull,
+  4913998146922579596ull, 452312848583ull}},
+{{14423586125928886414ull, 149276435049681236ull,
+  9988777869467694104ull, 282695530364ull}},
+{{18029482657411108018ull, 186595543812101545ull,
+  12485972336834617630ull, 353369412955ull}},
+{{8701795266481721310ull, 9456616466619902740ull,
+  10995779402615884133ull, 441711766194ull}},
+{{14661994078405851627ull, 8216228300851133164ull,
+  11484048145062315487ull, 276069853871ull}},
+{{18327492598007314533ull, 5658599357636528551ull,
+  9743374162900506455ull, 345087317339ull}},
+{{18297679729081755263ull, 2461563178618272785ull,
+  7567531685198245165ull, 431359146674ull}},
+{{9037041606070030366ull, 7688639991700228886ull, 236042569643030648ull,
+  539198933343ull}},
+{{1036464985366381075ull, 4805399994812643054ull,
+  7065055633667976011ull, 336999333339ull}},
+{{10518953268562752152ull, 1395063975088415913ull,
+  4219633523657582110ull, 421249166674ull}},
+{{17760377604130828093ull, 10967202005715295699ull,
+  14497913941426753445ull, 526561458342ull}},
+{{8794392993368073607ull, 9160344262785753764ull,
+  4449510194964332999ull, 329100911464ull}},
+{{10992991241710092008ull, 6838744310054804301ull,
+  5561887743705416249ull, 411376139330ull}},
+{{18352925070565002914ull, 13160116405995893280ull,
+  16175731716486546119ull, 514220174162ull}},
+{{11470578169103126821ull, 15142601781388515156ull,
+  14721518341231479228ull, 321387608851ull}},
+{{14338222711378908527ull, 481508153026092329ull,
+  13790211908111961132ull, 401734511064ull}},
+{{4087720333941471946ull, 601885191282615412ull,
+  17237764885139951415ull, 502168138830ull}},
+{{11778197245568195775ull, 7293707272192716488ull,
+  6161917034785081730ull, 313855086769ull}},
+{{14722746556960244718ull, 18340506127095671418ull,
+  12314082311908740066ull, 392318858461ull}},
+{{9180061159345530090ull, 13702260622014813465ull,
+  1557544834603761371ull, 490398573077ull}},
+{{17266753270659426066ull, 6258069879545564463ull,
+  3279308530841044809ull, 306499108173ull}},
+{{16971755569896894679ull, 12434273367859343483ull,
+  8710821681978693915ull, 383123885216ull}},
+{{16603008443943730444ull, 10931155691396791450ull,
+  10888527102473367394ull, 478904856520ull}},
+{{14988566295892219432ull, 11443658325550382560ull,
+  6805329439045854621ull, 299315535325ull}},
+{{288963796155722674ull, 469514851655814489ull, 13118347817234706181ull,
+  374144419156ull}},
+{{4972890763622041246ull, 5198579582997156015ull,
+  16397934771543382726ull, 467680523945ull}},
+{{10025585754904857635ull, 17084170294655386221ull,
+  3331180204573532347ull, 292300327466ull}},
+{{17143668212058459947ull, 16743526849891844872ull,
+  13387347292571691242ull, 365375409332ull}},
+{{2982841191363523318ull, 11706036525510030283ull,
+  16734184115714614053ull, 456719261665ull}},
+{{18005176809098059738ull, 9622115837657462878ull,
+  3541336044680551927ull, 285449538541ull}},
+{{13283098974517798864ull, 7415958778644440694ull,
+  9038356074278077813ull, 356811923176ull}},
+{{7380501681292472772ull, 13881634491732938772ull,
+  11297945092847597266ull, 446014903970ull}},
+{{13836185587662571291ull, 13287707575760474636ull,
+  11672901701457136195ull, 278759314981ull}},
+{{17295231984578214113ull, 11997948451273205391ull,
+  756069071539256532ull, 348449143727ull}},
+{{17007353962295379738ull, 14997435564091506739ull,
+  14780144394706234377ull, 435561429658ull}},
+{{16647506434441836768ull, 4911736399832219712ull,
+  9251808456528017164ull, 544451787073ull}},
+{{10404691521526147980ull, 12293207286749913128ull,
+  17311595331398480487ull, 340282366920ull}},
+{{13005864401907684975ull, 10754823090010003506ull,
+  3192750090538548993ull, 425352958651ull}},
+{{7033958465529830411ull, 18055214880939892287ull,
+  17825995668455349953ull, 531691198313ull}},
+{{11313753068597225863ull, 4366980272946350823ull,
+  4223718265143511865ull, 332306998946ull}},
+{{9530505317319144425ull, 10070411359610326433ull,
+  14503019868284165639ull, 415383748682ull}},
+{{16524817665076318435ull, 7976328181085520137ull,
+  8905402798500431241ull, 519229685853ull}},
+{{3410482013031617166ull, 16514420159246919846ull,
+  7871719758276463477ull, 324518553658ull}},
+{{13486474553144297265ull, 6807967143776486095ull,
+  616277660990803539ull, 405648192073ull}},
+{{12246407173002983677ull, 3898272911293219715ull,
+  5382033094665892328ull, 507060240091ull}},
+{{5348161473913170846ull, 2436420569558262322ull,
+  1057927674952488753ull, 316912650057ull}},
+{{15908573879246239366ull, 7657211730375215806ull,
+  5934095612117998845ull, 396140812571ull}},
+{{10662345312203023399ull, 14183200681396407662ull,
+  2805933496720110652ull, 495176015714ull}},
+{{2052279801699501721ull, 18087872462727530597ull,
+  6365394453877457061ull, 309485009821ull}},
+{{7177035770551765055ull, 8774782523127249534ull,
+  12568429085774209231ull, 386856262276ull}},
+{{18194666750044482126ull, 6356792135481674013ull,
+  15710536357217761539ull, 483570327845ull}},
+{{13677509727991495281ull, 1667152075462352306ull,
+  12124928232474794914ull, 302231454903ull}},
+{{7873515123134593293ull, 11307312131182716191ull,
+  10544474272166105738ull, 377789318629ull}},
+{{5230207885490853713ull, 4910768127123619431ull,
+  17792278858635020077ull, 472236648286ull}},
+{{10186408956072865427ull, 5375073088665956096ull,
+  6508488268219499644ull, 295147905179ull}},
+{{12733011195091081783ull, 6718841360832445120ull,
+  3523924316846986651ull, 368934881474ull}},
+{{15916263993863852229ull, 3786865682613168496ull,
+  13628277432913509122ull, 461168601842ull}},
+{{9947664996164907643ull, 6978477070060618214ull,
+  13129359413998331105ull, 288230376151ull}},
+{{3211209208351358746ull, 13334782356003160672ull,
+  11800013249070525977ull, 360287970189ull}},
+{{4014011510439198432ull, 2833419889721787128ull, 914958506055993760ull,
+  450359962737ull}},
+{{2508757194024499020ull, 1770887431076116955ull,
+  12101064112353465860ull, 281474976710ull}},
+{{16971004547812787487ull, 2213609288845146193ull,
+  5902958103587056517ull, 351843720888ull}},
+{{7378697629483820647ull, 7378697629483820646ull,
+  7378697629483820646ull, 439804651110ull}},
+{{0ull, 0ull, 0ull, 549755813888ull}},
+{{0ull, 0ull, 0ull, 343597383680ull}},
+{{0ull, 0ull, 0ull, 429496729600ull}},
+{{0ull, 0ull, 0ull, 536870912000ull}},
+{{0ull, 0ull, 0ull, 335544320000ull}},
+{{0ull, 0ull, 0ull, 419430400000ull}},
+{{0ull, 0ull, 0ull, 524288000000ull}},
+{{0ull, 0ull, 0ull, 327680000000ull}},
+{{0ull, 0ull, 0ull, 409600000000ull}},
+{{0ull, 0ull, 0ull, 512000000000ull}},
+{{0ull, 0ull, 0ull, 320000000000ull}},
+{{0ull, 0ull, 0ull, 400000000000ull}},
+{{0ull, 0ull, 0ull, 500000000000ull}},
+{{0ull, 0ull, 0ull, 312500000000ull}},
+{{0ull, 0ull, 0ull, 390625000000ull}},
+{{0ull, 0ull, 0ull, 488281250000ull}},
+{{0ull, 0ull, 0ull, 305175781250ull}},
+{{0ull, 0ull, 9223372036854775808ull, 381469726562ull}},
+{{0ull, 0ull, 2305843009213693952ull, 476837158203ull}},
+{{0ull, 0ull, 17582052945254416384ull, 298023223876ull}},
+{{0ull, 0ull, 3530822107858468864ull, 372529029846ull}},
+{{0ull, 0ull, 13636899671677861888ull, 465661287307ull}},
+{{0ull, 0ull, 6217219285584969728ull, 291038304567ull}},
+{{0ull, 0ull, 3159838088553824256ull, 363797880709ull}},
+{{0ull, 0ull, 8561483629119668224ull, 454747350886ull}},
+{{0ull, 0ull, 739241249772404736ull, 284217094304ull}},
+{{0ull, 0ull, 924051562215505920ull, 355271367880ull}},
+{{0ull, 0ull, 1155064452769382400ull, 444089209850ull}},
+{{0ull, 0ull, 5333601301408251904ull, 277555756156ull}},
+{{0ull, 0ull, 6667001626760314880ull, 346944695195ull}},
+{{0ull, 0ull, 3722066015023005696ull, 433680868994ull}},
+{{0ull, 0ull, 13875954555633532928ull, 542101086242ull}},
+{{0ull, 0ull, 13284157615698345984ull, 338813178901ull}},
+{{0ull, 0ull, 2770138964340768768ull, 423516473627ull}},
+{{0ull, 0ull, 17297731760708124672ull, 529395592033ull}},
+{{0ull, 0ull, 3893553322801496064ull, 330872245021ull}},
+{{0ull, 0ull, 9478627671929257984ull, 413590306276ull}},
+{{0ull, 0ull, 11848284589911572480ull, 516987882845ull}},
+{{0ull, 0ull, 9711020877908426752ull, 323117426778ull}},
+{{0ull, 0ull, 2915404060530757632ull, 403896783473ull}}
+};
+
+// **********************************************************************
+
+static const UINT128 breakpoints_binary64[] =
+  { {{5261314576080512960ull, 21426681862861333ull}},
+{{4728754506986910400ull, 34282690980578133ull}},
+{{11161701235073348928ull, 27426152784462506ull}},
+{{5240012173316768832ull, 21940922227570005ull}},
+{{8384019477306830144ull, 35105475564112008ull}},
+{{14085913211329284736ull, 28084380451289606ull}},
+{{7579381754321517504ull, 22467504361031685ull}},
+{{12127010806914427968ull, 35948006977650696ull}},
+{{6012259830789632064ull, 28758405582120557ull}},
+{{15877854308857436608ull, 23006724465696445ull}},
+{{12702283447085949312ull, 18405379572557156ull}},
+{{12944955885853698240ull, 29448607316091450ull}},
+{{10355964708682958592ull, 23558885852873160ull}},
+{{8284771766946366848ull, 18847108682298528ull}},
+{{9566286012372276672ull, 30155373891677645ull}},
+{{7653028809897821312ull, 24124299113342116ull}},
+{{2433074233176346752ull, 19299439290673693ull}},
+{{203569958340244480ull, 30879102865077909ull}},
+{{3852204781414105920ull, 24703282292062327ull}},
+{{14149810269357015680ull, 19762625833649861ull}},
+{{15260998801487404480ull, 31620201333839778ull}},
+{{1140752596964192576ull, 25296161067071823ull}},
+{{8291299707055174720ull, 20236928853657458ull}},
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+{{2631473820405164608ull, 25961484292674138ull}},
+{{9483876685807952320ull, 20769187434139310ull}},
+{{15174202697292723712ull, 33230699894622896ull}},
+{{8450013343092268608ull, 26584559915698317ull}},
+{{17828057118699545856ull, 21267647932558653ull}},
+{{6388798501467811456ull, 34028236692093846ull}},
+{{1421689986432338880ull, 27222589353675077ull}},
+{{12205398433371602048ull, 21778071482940061ull}},
+{{12149939863910742656ull, 34844914372704098ull}},
+{{17098649520612414784ull, 27875931498163278ull}},
+{{2610873172264200832ull, 22300745198530623ull}},
+{{488048260880811008ull, 35681192317648997ull}},
+{{11458485052930379776ull, 28544953854119197ull}},
+{{1788090412860483200ull, 22835963083295358ull}},
+{{8809169959772207168ull, 18268770466636286ull}},
+{{6715974306151710848ull, 29230032746618058ull}},
+{{12751477074405189312ull, 23384026197294446ull}},
+{{6511832844782241152ull, 18707220957835557ull}},
+{{14108281366393496128ull, 29931553532536891ull}},
+{{7597276278372886592ull, 23945242826029513ull}},
+{{13456518652182129920ull, 19156194260823610ull}},
+{{3083685769781856256ull, 30649910817317777ull}},
+{{13534995060051216000ull, 24519928653854221ull}},
+{{7138647233299062464ull, 19615942923083377ull}},
+{{15111184388020410240ull, 31385508676933403ull}},
+{{1020901066190597248ull, 25108406941546723ull}},
+{{8195418482436298432ull, 20086725553237378ull}},
+{{9423320757156167168ull, 32138760885179805ull}},
+{{7538656605724933760ull, 25711008708143844ull}},
+{{9720274099321857280ull, 20568806966515075ull}},
+{{15552438558914971712ull, 32910091146424120ull}},
+{{12441950847131977344ull, 26328072917139296ull}},
+{{6264211862963671552ull, 21062458333711437ull}},
+{{13712087795483784832ull, 33699933333938299ull}},
+{{14659019051128938176ull, 26959946667150639ull}},
+{{15416564055645060864ull, 21567957333720511ull}},
+{{17287804859548276736ull, 34508731733952818ull}},
+{{2762197443412890432ull, 27606985387162255ull}},
+{{2209757954730312320ull, 22085588309729804ull}},
+{{10914310357052320384ull, 35336941295567686ull}},
+{{5042099470899945984ull, 28269553036454149ull}},
+{{7723028391461867136ull, 22615642429163319ull}},
+{{9867771527911404032ull, 18092513943330655ull}},
+{{15788434444658246400ull, 28948022309329048ull}},
+{{1562701111500866176ull, 23158417847463239ull}},
+{{4939509703942603264ull, 18526734277970591ull}},
+{{524517896824344576ull, 29642774844752946ull}},
+{{15177009576427116928ull, 23714219875802356ull}},
+{{8452258846399783232ull, 18971375900641885ull}},
+{{13523614154239653184ull, 30354201441027016ull}},
+{{7129542508649812224ull, 24283361152821613ull}},
+{{13082331636403670400ull, 19426688922257290ull}},
+{{2484986544536321088ull, 31082702275611665ull}},
+{{1987989235629056832ull, 24866161820489332ull}},
+{{12658437832728976448ull, 19892929456391465ull}},
+{{1806756458656810688ull, 31828687130226345ull}},
+{{1445405166925448576ull, 25462949704181076ull}},
+{{15913719392508000128ull, 20370359763344860ull}},
+{{7015206954303248640ull, 32592575621351777ull}},
+{{16680212007668329856ull, 26074060497081421ull}},
+{{9654820791392753536ull, 20859248397665137ull}},
+{{690318007260764416ull, 33374797436264220ull}},
+{{552254405808611520ull, 26699837949011376ull}},
+{{15199198783614530496ull, 21359870359209100ull}},
+{{5871973980073697216ull, 34175792574734561ull}},
+{{1008230369317047424ull, 27340634059787649ull}},
+{{4495933110195548288ull, 21872507247830119ull}},
+{{14572190605796697920ull, 34996011596528190ull}},
+{{11657752484637358336ull, 27996809277222552ull}},
+{{1947504358226065984ull, 22397447421778042ull}},
+{{6805355787903615936ull, 35835915874844867ull}},
+{{16512331074548623680ull, 28668732699875893ull}},
+{{2141818415413168000ull, 22934986159900715ull}},
+{{1713454732330534400ull, 18347988927920572ull}},
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+{{16538597956591291264ull, 25822498780869085ull}},
+{{13230878365273033024ull, 20657999024695268ull}},
+{{17480056569694942528ull, 33052798439512429ull}},
+{{17673394070497864320ull, 26442238751609943ull}},
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+{{13737846984654431488ull, 34658371176510185ull}},
+{{10990277587723545152ull, 27726696941208148ull}},
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+{{2989902904807031104ull, 28392137667797144ull}},
+{{6081271138587535232ull, 22713710134237715ull}},
+{{4865016910870028160ull, 18170968107390172ull}},
+{{11473375872133955392ull, 29073548971824275ull}},
+{{9178700697707164352ull, 23258839177459420ull}},
+{{7342960558165731456ull, 18607071341967536ull}},
+{{4370039263581349696ull, 29771314147148058ull}},
+{{10874729040348900416ull, 23817051317718446ull}},
+{{5010434417537209984ull, 19053641054174757ull}},
+{{11706043882801446336ull, 30485825686679611ull}},
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+{{8229737847941307712ull, 19510928439474951ull}},
+{{5788882927222271680ull, 31217485503159922ull}},
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+{{5180624599319017984ull, 19979190722022350ull}},
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+{{13815413425682426880ull, 33519519824856492ull}},
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+{{7083401518135505792ull, 18427550902448932ull}},
+{{15022791243758719616ull, 29484081443918291ull}},
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+{{14041804973695872896ull, 18869812124107706ull}},
+{{15088190328429576000ull, 30191699398572330ull}},
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+{{5831636446450389952ull, 33992831540273094ull}},
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+{{15933867392711696256ull, 27846927597791718ull}},
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+{{2149180761527841344ull, 28515253860138720ull}},
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+{{7365849440443183936ull, 29199619952782049ull}},
+{{9582028367096457472ull, 23359695962225639ull}},
+{{11354971508419076288ull, 18687756769780511ull}},
+{{10789256783986701440ull, 29900410831648818ull}},
+{{16010103056673181824ull, 23920328665319054ull}},
+{{16497431260080455744ull, 19136262932255243ull}},
+{{4259797127677267328ull, 30618020691608390ull}},
+{{3407837702141813824ull, 24494416553286712ull}},
+{{13794316605939182016ull, 19595533242629369ull}},
+{{11002860125276960320ull, 31352853188206991ull}},
+{{5112939285479657920ull, 25082282550565593ull}},
+{{11469049057867546944ull, 20065826040452474ull}},
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+{{233537933261607872ull, 20547405865423334ull}},
+{{7752358322702393280ull, 32875849384677334ull}},
+{{9891235472903824960ull, 26300679507741867ull}},
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+{{8233562827626603520ull, 33664869769909590ull}},
+{{6586850262101282816ull, 26931895815927672ull}},
+{{16337526653906757248ull, 21545516652742137ull}},
+{{11382647387283170304ull, 34472826644387420ull}},
+{{9106117909826536256ull, 27578261315509936ull}},
+{{3595545513119318656ull, 22062609052407949ull}},
+{{13131570450474730496ull, 35300174483852718ull}},
+{{17883953989863605056ull, 28240139587082174ull}},
+{{17996512006632794368ull, 22592111669665739ull}},
+{{18086558420048145792ull, 18073689335732591ull}},
+{{3113051768883661056ull, 28917902937172147ull}},
+{{13558487859332659776ull, 23134322349737717ull}},
+{{3468092657982307200ull, 18507457879790174ull}},
+{{12927645882255512128ull, 29611932607664278ull}},
+{{17720814335288230336ull, 23689546086131422ull}},
+{{6797953838746763648ull, 18951636868905138ull}},
+{{7187377327252911552ull, 30322618990248221ull}},
+{{2060553047060418880ull, 24258095192198577ull}},
+{{12716488881874066048ull, 19406476153758861ull}},
+{{12967684581514685120ull, 31050361846014178ull}},
+{{17752845294695568704ull, 24840289476811342ull}},
+{{6823578606272634304ull, 19872231581449074ull}},
+{{18296423399520035584ull, 31795570530318518ull}},
+{{3569092275390297472ull, 25436456424254815ull}},
+{{2855273820312237952ull, 20349165139403852ull}},
+{{8257786927241491136ull, 32558664223046163ull}},
+{{13984927171277013504ull, 26046931378436930ull}},
+{{11187941737021610816ull, 20837545102749544ull}},
+{{6832660335008846336ull, 33340072164399271ull}},
+{{1776779453265166784ull, 26672057731519417ull}},
+{{12489470006837864384ull, 21337646185215533ull}},
+{{16293803196198672704ull, 34140233896344853ull}},
+{{1966996112733207168ull, 27312187117075883ull}},
+{{8952294519670386368ull, 21849749693660706ull}},
+{{6944973601988797568ull, 34959599509857130ull}},
+{{5555978881591038080ull, 27967679607885704ull}},
+{{8134131920014740736ull, 22374143686308563ull}},
+{{9325262257281674880ull, 35798629898093701ull}},
+{{3770860991083429568ull, 28638903918474961ull}},
+{{17774084051834384960ull, 22911123134779968ull}},
+{{3151220797241777024ull, 18328898507823975ull}},
+{{5041953275586843200ull, 29326237612518360ull}},
+{{4033562620469474560ull, 23460990090014688ull}},
+{{10605547725859400320ull, 18768792072011750ull}},
+{{16968876361375040512ull, 30030067315218800ull}},
+{{13575101089100032384ull, 24024053852175040ull}},
+{{10860080871280025920ull, 19219243081740032ull}},
+{{2618734135080400192ull, 30750788930784052ull}},
+{{13163033752290051072ull, 24600631144627241ull}},
+{{6841078187090130560ull, 19680504915701793ull}},
+{{7256376284602298560ull, 31488807865122869ull}},
+{{9494449842423749184ull, 25191046292098295ull}},
+{{7595559873938999360ull, 20152837033678636ull}},
+{{4774198168818578304ull, 32244539253885818ull}},
+{{11198056164538683264ull, 25795631403108654ull}},
+{{12647793746372856960ull, 20636505122486923ull}},
+{{16547121179454660800ull, 33018408195979077ull}},
+{{5858999314079907968ull, 26414726556783262ull}},
+{{15755245895489657344ull, 21131781245426609ull}},
+{{14140346988557720832ull, 33810849992682575ull}},
+{{11312277590846176640ull, 27048679994146060ull}},
+{{9049822072676941312ull, 21638943995316848ull}},
+{{10790366501541195776ull, 34622310392506957ull}},
+{{1253595571749136000ull, 27697848314005566ull}},
+{{15760271716366950080ull, 22158278651204452ull}},
+{{10459039487219478848ull, 35453245841927124ull}},
+{{12056580404517493376ull, 28362596673541699ull}},
+{{13334613138355905024ull, 22690077338833359ull}},
+{{14357039325426634368ull, 18152061871066687ull}},
+{{8213867661714973696ull, 29043298993706700ull}},
+{{6571094129371978944ull, 23234639194965360ull}},
+{{5256875303497583168ull, 18587711355972288ull}},
+{{4721651670854222720ull, 29740338169555661ull}},
+{{87972521941467840ull, 23792270535644529ull}},
+{{3759726832295084608ull, 19033816428515623ull}},
+{{2326214116930225024ull, 30454106285624997ull}},
+{{12929017737769910976ull, 24363285028499997ull}},
+{{2964516560732108160ull, 19490628022799998ull}},
+{{1053877682429462720ull, 31185004836479997ull}},
+{{11911148590169301120ull, 24948003869183997ull}},
+{{2150221242651620288ull, 19958403095347198ull}},
+{{18197749247210233728ull, 31933444952555516ull}},
+{{10868850583026276672ull, 25546755962044413ull}},
+{{16073778095904841984ull, 20437404769635530ull}},
+{{7271300879738195520ull, 32699847631416849ull}},
+{{9506389518532466752ull, 26159878105133479ull}},
+{{11294460429567883712ull, 20927902484106783ull}},
+{{14381787872566703680ull, 33484643974570853ull}},
+{{437383853827631936ull, 26787715179656683ull}},
+{{7728604712545926208ull, 21430172143725346ull}},
+{{4987069910589661312ull, 34288275429960554ull}},
+{{7679004743213639360ull, 27430620343968443ull}},
+{{13521901424054732096ull, 21944496275174754ull}},
+{{10566995834261840448ull, 35111194040279607ull}},
+{{1074899037925651712ull, 28088955232223686ull}},
+{{15617314489308162624ull, 22471164185778948ull}},
+{{2851610294441598336ull, 35953862697246318ull}},
+{{9659985865037099264ull, 28763090157797054ull}},
+{{11417337506771589760ull, 23010472126237643ull}},
+{{16512567634901092416ull, 18408377700990114ull}},
+{{15352061771616016960ull, 29453404321584183ull}},
+{{1213602973067082560ull, 23562723457267347ull}},
+{{12038928822679397056ull, 18850178765813877ull}},
+{{4504890857319393984ull, 30160286025302204ull}},
+{{7293261500597425472ull, 24128228820241763ull}},
+{{13213306829961761024ull, 19302583056193410ull}},
+{{2694546854229266048ull, 30884132889909457ull}},
+{{13223683927609143808ull, 24707306311927565ull}},
+{{10578947142087315072ull, 19765845049542052ull}},
+{{2168920168372062784ull, 31625352079267284ull}},
+{{5424484949439560576ull, 25300281663413827ull}},
+{{15407634403777379392ull, 20240225330731061ull}},
+{{17273517416559986432ull, 32384360529169698ull}},
+{{2750767489022258176ull, 25907488423335759ull}}
+};
+
+static const int exponents_binary64[] = { -55,
+  -51,
+  -48,
+  -45,
+  -41,
+  -38,
+  -35,
+  -31,
+  -28,
+  -25,
+  -22,
+  -18,
+  -15,
+  -12,
+  -8,
+  -5,
+  -2,
+  2,
+  5,
+  8,
+  12,
+  15,
+  18,
+  22,
+  25,
+  28,
+  32,
+  35,
+  38,
+  42,
+  45,
+  48,
+  52,
+  55,
+  58,
+  62,
+  65,
+  68,
+  71,
+  75,
+  78,
+  81,
+  85,
+  88,
+  91,
+  95,
+  98,
+  101,
+  105,
+  108,
+  111,
+  115,
+  118,
+  121,
+  125,
+  128,
+  131,
+  135,
+  138,
+  141,
+  145,
+  148,
+  151,
+  155,
+  158,
+  161,
+  164,
+  168,
+  171,
+  174,
+  178,
+  181,
+  184,
+  188,
+  191,
+  194,
+  198,
+  201,
+  204,
+  208,
+  211,
+  214,
+  218,
+  221,
+  224,
+  228,
+  231,
+  234,
+  238,
+  241,
+  244,
+  248,
+  251,
+  254,
+  258,
+  261,
+  264,
+  267,
+  271,
+  274,
+  277,
+  281,
+  284,
+  287,
+  291,
+  294,
+  297,
+  301,
+  304,
+  307,
+  311,
+  314,
+  317,
+  321,
+  324,
+  327,
+  331,
+  334,
+  337,
+  341,
+  344,
+  347,
+  351,
+  354,
+  357,
+  360,
+  364,
+  367,
+  370,
+  374,
+  377,
+  380,
+  384,
+  387,
+  390,
+  394,
+  397,
+  400,
+  404,
+  407,
+  410,
+  414,
+  417,
+  420,
+  424,
+  427,
+  430,
+  434,
+  437,
+  440,
+  444,
+  447,
+  450,
+  454,
+  457,
+  460,
+  463,
+  467,
+  470,
+  473,
+  477,
+  480,
+  483,
+  487,
+  490,
+  493,
+  497,
+  500,
+  503,
+  507,
+  510,
+  513,
+  517,
+  520,
+  523,
+  527,
+  530,
+  533,
+  537,
+  540,
+  543,
+  547,
+  550,
+  553,
+  556,
+  560,
+  563,
+  566,
+  570,
+  573,
+  576,
+  580,
+  583,
+  586,
+  590,
+  593,
+  596,
+  600,
+  603,
+  606,
+  610,
+  613,
+  616,
+  620,
+  623,
+  626,
+  630,
+  633,
+  636,
+  640,
+  643,
+  646,
+  649,
+  653,
+  656,
+  659,
+  663,
+  666,
+  669,
+  673,
+  676,
+  679,
+  683,
+  686,
+  689,
+  693,
+  696,
+  699,
+  703,
+  706,
+  709,
+  713,
+  716,
+  719,
+  723,
+  726,
+  729,
+  733,
+  736,
+  739,
+  743,
+  746,
+  749,
+  752,
+  756,
+  759,
+  762,
+  766,
+  769,
+  772,
+  776,
+  779,
+  782,
+  786,
+  789,
+  792,
+  796,
+  799,
+  802,
+  806,
+  809,
+  812,
+  816,
+  819,
+  822,
+  826,
+  829,
+  832,
+  836,
+  839,
+  842,
+  845,
+  849,
+  852,
+  855,
+  859,
+  862,
+  865,
+  869,
+  872,
+  875,
+  879,
+  882,
+  885,
+  889,
+  892,
+  895,
+  899,
+  902,
+  905,
+  909,
+  912,
+  915,
+  919,
+  922,
+  925,
+  929,
+  932,
+  935,
+  939,
+  942,
+  945,
+  948,
+  952,
+  955,
+  958,
+  962,
+  965,
+  968,
+  972,
+  975,
+  978,
+  982,
+  985,
+  988,
+  992,
+  995,
+  998,
+  1002,
+  1005,
+  1008,
+  1012,
+  1015,
+  1018,
+  1022,
+  1025,
+  1028,
+  1032,
+  1035,
+  1038,
+  1041,
+  1045,
+  1048,
+  1051,
+  1055,
+  1058,
+  1061,
+  1065,
+  1068,
+  1071,
+  1075,
+  1078,
+  1081,
+  1085,
+  1088,
+  1091,
+  1095,
+  1098,
+  1101,
+  1105,
+  1108,
+  1111,
+  1115,
+  1118,
+  1121,
+  1125,
+  1128,
+  1131,
+  1134,
+  1138,
+  1141,
+  1144,
+  1148,
+  1151,
+  1154,
+  1158,
+  1161,
+  1164,
+  1168,
+  1171,
+  1174,
+  1178,
+  1181,
+  1184,
+  1188,
+  1191,
+  1194,
+  1198,
+  1201,
+  1204,
+  1208,
+  1211,
+  1214,
+  1218,
+  1221,
+  1224,
+  1228,
+  1231,
+  1234,
+  1237,
+  1241,
+  1244,
+  1247,
+  1251,
+  1254,
+  1257,
+  1261,
+  1264,
+  1267,
+  1271,
+  1274,
+  1277,
+  1281,
+  1284,
+  1287,
+  1291,
+  1294,
+  1297,
+  1301,
+  1304,
+  1307,
+  1311,
+  1314,
+  1317,
+  1321,
+  1324,
+  1327,
+  1330,
+  1334,
+  1337,
+  1340,
+  1344,
+  1347,
+  1350,
+  1354,
+  1357,
+  1360,
+  1364,
+  1367,
+  1370,
+  1374,
+  1377,
+  1380,
+  1384,
+  1387,
+  1390,
+  1394,
+  1397,
+  1400,
+  1404,
+  1407,
+  1410,
+  1414,
+  1417,
+  1420,
+  1424,
+  1427,
+  1430,
+  1433,
+  1437,
+  1440,
+  1443,
+  1447,
+  1450,
+  1453,
+  1457,
+  1460,
+  1463,
+  1467,
+  1470,
+  1473,
+  1477,
+  1480,
+  1483,
+  1487,
+  1490,
+  1493,
+  1497,
+  1500,
+  1503,
+  1507,
+  1510,
+  1513,
+  1517,
+  1520,
+  1523,
+  1526,
+  1530,
+  1533,
+  1536,
+  1540,
+  1543,
+  1546,
+  1550,
+  1553,
+  1556,
+  1560,
+  1563,
+  1566,
+  1570,
+  1573,
+  1576,
+  1580,
+  1583,
+  1586,
+  1590,
+  1593,
+  1596,
+  1600,
+  1603,
+  1606,
+  1610,
+  1613,
+  1616,
+  1620,
+  1623,
+  1626,
+  1629,
+  1633,
+  1636,
+  1639,
+  1643,
+  1646,
+  1649,
+  1653,
+  1656,
+  1659,
+  1663,
+  1666,
+  1669,
+  1673,
+  1676,
+  1679,
+  1683,
+  1686,
+  1689,
+  1693,
+  1696,
+  1699,
+  1703,
+  1706,
+  1709,
+  1713,
+  1716,
+  1719,
+  1722,
+  1726,
+  1729,
+  1732,
+  1736,
+  1739,
+  1742,
+  1746,
+  1749,
+  1752,
+  1756,
+  1759,
+  1762,
+  1766,
+  1769,
+  1772,
+  1776,
+  1779,
+  1782,
+  1786,
+  1789,
+  1792,
+  1796,
+  1799,
+  1802,
+  1806,
+  1809,
+  1812,
+  1815,
+  1819,
+  1822,
+  1825,
+  1829,
+  1832,
+  1835,
+  1839,
+  1842,
+  1845,
+  1849,
+  1852,
+  1855,
+  1859,
+  1862,
+  1865,
+  1869,
+  1872,
+  1875,
+  1879,
+  1882,
+  1885,
+  1889,
+  1892,
+  1895,
+  1899,
+  1902,
+  1905,
+  1909,
+  1912,
+  1915,
+  1918,
+  1922,
+  1925,
+  1928,
+  1932,
+  1935,
+  1938,
+  1942,
+  1945,
+  1948,
+  1952,
+  1955,
+  1958,
+  1962,
+  1965,
+  1968,
+  1972,
+  1975,
+  1978,
+  1982,
+  1985,
+  1988,
+  1992,
+  1995,
+  1998,
+  2002,
+  2005,
+  2008,
+  2011,
+  2015,
+  2018,
+  2021,
+  2025,
+  2028,
+  2031,
+  2035,
+  2038,
+  2041,
+  2045,
+  2048,
+  2051,
+  2055,
+  2058,
+  2061,
+  2065,
+  2068,
+  2071,
+  2075,
+  2078,
+  2081,
+  2085,
+  2088,
+  2091,
+  2095,
+  2098,
+  2101,
+  2105,
+  2108,
+  2111,
+  2114,
+  2118,
+  2121,
+  2124,
+  2128,
+  2131,
+  2134,
+  2138,
+  2141,
+  2144,
+  2148,
+  2151,
+  2154,
+  2158,
+  2161,
+};
+
+static const UINT256 multipliers1_binary64[] =
+  { {{1837554224478941466ull, 10276842184138466546ull,
+      11651621577776737258ull, 7754513766366540701ull}},
+{{5760157408726726321ull, 11034712383513929495ull,
+  9588106495324154738ull, 4846571103979087938ull}},
+{{2588510742481019997ull, 4570018442537636061ull,
+  2761761082300417615ull, 6058213879973859923ull}},
+{{7847324446528662900ull, 1100837034744657172ull,
+  17287259408157685731ull, 7572767349967324903ull}},
+{{14127949815935190120ull, 16828924211211268396ull,
+  17722066157739635437ull, 4732979593729578064ull}},
+{{17659937269918987650ull, 7201097208731921783ull,
+  3705838623464992681ull, 5916224492161972581ull}},
+{{17463235568971346659ull, 13613057529342290133ull,
+  9243984297758628755ull, 7395280615202465726ull}},
+{{13220365239820785614ull, 6202317946625237381ull,
+  1165804167671755068ull, 4622050384501541079ull}},
+{{2690398494493818305ull, 7752897433281546727ull,
+  15292313264871857547ull, 5777562980626926348ull}},
+{{17198056173399436594ull, 5079435773174545504ull,
+  668647507380270318ull, 7221953725783657936ull}},
+{{3050826143039744126ull, 15572666753322957689ull,
+  835809384225337897ull, 9027442157229572420ull}},
+{{13435981385468309839ull, 2815387693185766699ull,
+  9745752901995611994ull, 5642151348268482762ull}},
+{{12183290713407999394ull, 12742606653336984182ull,
+  2958819090639739184ull, 7052689185335603453ull}},
+{{6005741354905223435ull, 15928258316671230228ull,
+  8310209881727061884ull, 8815861481669504316ull}},
+{{12976960383670540455ull, 731789411064743084ull,
+  14417253212934189486ull, 5509913426043440197ull}},
+{{16221200479588175569ull, 10138108800685704663ull,
+  4186508460885573145ull, 6887391782554300247ull}},
+{{15664814581057831557ull, 17284322019284518733ull,
+  621449557679578527ull, 8609239728192875309ull}},
+{{12096352122374838675ull, 17720230289693906064ull,
+  2694248982763430531ull, 5380774830120547068ull}},
+{{15120440152968548344ull, 17538601843689994676ull,
+  3367811228454288164ull, 6725968537650683835ull}},
+{{453806117501133814ull, 3476508230902941730ull,
+  18044822090850023918ull, 8407460672063354793ull}},
+{{4895314841865596538ull, 16007875699596502293ull,
+  4360484779140183092ull, 5254662920039596746ull}},
+{{10730829570759383576ull, 1563100550786076250ull,
+  14673978010780004674ull, 6568328650049495932ull}},
+{{4190164926594453662ull, 11177247725337371121ull,
+  18342472513475005842ull, 8210410812561869915ull}},
+{{14148068125190003299ull, 11597465846763244854ull,
+  9158202311708184699ull, 5131506757851168697ull}},
+{{8461713119632728315ull, 9885146290026668164ull,
+  16059438908062618778ull, 6414383447313960871ull}},
+{{10577141399540910394ull, 3133060825678559397ull,
+  15462612616650885569ull, 8017979309142451089ull}},
+{{8916556383926762949ull, 13487378062117569383ull,
+  2746603857765721624ull, 5011237068214031931ull}},
+{{6534009461481065782ull, 16859222577646961729ull,
+  17268312877489315742ull, 6264046335267539913ull}},
+{{12779197845278720131ull, 11850656185203926353ull,
+  7750333041579480966ull, 7830057919084424892ull}},
+{{1069469625658118226ull, 2794974097325066067ull,
+  14067330187841951412ull, 4893786199427765557ull}},
+{{15171895087354811494ull, 3493717621656332583ull,
+  3749104679520275553ull, 6117232749284706947ull}},
+{{14353182840766126464ull, 8978833045497803633ull, 74694830972956537ull,
+  7646540936605883684ull}},
+{{2053210247837747184ull, 17140985699504597031ull,
+  9270056306212873643ull, 4779088085378677302ull}},
+{{16401570865079347692ull, 16814546105953358384ull,
+  2364198345911316246ull, 5973860106723346628ull}},
+{{2055219507639632999ull, 11794810595586922173ull,
+  2955247932389145308ull, 7467325133404183285ull}},
+{{3590355201488464576ull, 16595128659096602166ull,
+  4152872966956909769ull, 4667078208377614553ull}},
+{{13711316038715356528ull, 6908852768588588995ull,
+  9802777227123525116ull, 5833847760472018191ull}},
+{{12527459029966807756ull, 8636065960735736244ull,
+  7641785515477018491ull, 7292309700590022739ull}},
+{{15659323787458509695ull, 6183396432492282401ull,
+  4940545875918885210ull, 9115387125737528424ull}},
+{{2869548339520486704ull, 8476308788735064405ull,
+  3087841172449303256ull, 5697116953585955265ull}},
+{{8198621442827996284ull, 10595385985918830506ull,
+  8471487483989016974ull, 7121396191982444081ull}},
+{{1024904766680219546ull, 4020860445543762325ull,
+  15201045373413659122ull, 8901745239978055101ull}},
+{{2946408488388831169ull, 7124723796892239357ull,
+  11806496367597230903ull, 5563590774986284438ull}},
+{{8294696628913426865ull, 4294218727687911292ull,
+  5534748422641762821ull, 6954488468732855548ull}},
+{{10368370786141783581ull, 9979459428037277019ull,
+  6918435528302203526ull, 8693110585916069435ull}},
+{{4174388732124920786ull, 1625476124095910233ull,
+  2018179195975183252ull, 5433194116197543397ull}},
+{{9829671933583538887ull, 2031845155119887791ull,
+  7134410013396366969ull, 6791492645246929246ull}},
+{{7675403898552035704ull, 7151492462327247643ull,
+  18141384553600234519ull, 8489365806558661557ull}},
+{{2491284427381328363ull, 11387211816595611633ull,
+  13644208355213840526ull, 5305853629099163473ull}},
+{{7725791552654048358ull, 5010642733889738733ull,
+  3220202388735136946ull, 6632317036373954342ull}},
+{{14268925459244948351ull, 15486675454216949224ull,
+  13248625022773696990ull, 8290396295467442927ull}},
+{{8918078412028092720ull, 5067486140458205361ull,
+  15197919666874642475ull, 5181497684667151829ull}},
+{{15759284033462503804ull, 1722671657145368797ull,
+  5162341528311139382ull, 6476872105833939787ull}},
+{{5864046986545966042ull, 11376711608286486805ull,
+  1841240891961536323ull, 8096090132292424734ull}},
+{{5970872375804922729ull, 4804601745965360301ull,
+  14985833612758123914ull, 5060056332682765458ull}},
+{{12075276488183541315ull, 15229124219311476184ull,
+  9508919979092879084ull, 6325070415853456823ull}},
+{{15094095610229426643ull, 589661200429793614ull,
+  7274463955438710952ull, 7906338019816821029ull}},
+{{4822123737966003748ull, 368538250268621009ull, 6852382981362888297ull,
+  4941461262385513143ull}},
+{{10639340690884892589ull, 5072358831263164165ull,
+  3953792708276222467ull, 6176826577981891429ull}},
+{{17910861882033503640ull, 1728762520651567302ull,
+  9553926903772665988ull, 7721033222477364286ull}},
+{{6582602657843551871ull, 10303848612262005372ull,
+  1359518296430528338ull, 4825645764048352679ull}},
+{{8228253322304439839ull, 3656438728472730907ull,
+  15534455925820324135ull, 6032057205060440848ull}},
+{{5673630634453161895ull, 18405606465873077346ull,
+  971325833565853552ull, 7540071506325551061ull}},
+{{8157705164960614088ull, 11503504041170673341ull,
+  2912921655192352422ull, 4712544691453469413ull}},
+{{14808817474628155514ull, 5156008014608565868ull,
+  8252838087417828432ull, 5890680864316836766ull}},
+{{64277769575642777ull, 6445010018260707336ull, 1092675572417509732ull,
+  7363351080396045958ull}},
+{{80347211969553471ull, 8056262522825884170ull, 10589216502376662973ull,
+  9204188850495057447ull}},
+{{4661903025908358824ull, 7341007085979871558ull,
+  13535789341626496214ull, 5752618031559410904ull}},
+{{15050750819240224337ull, 18399630894329615255ull,
+  16919736677033120267ull, 7190772539449263630ull}},
+{{14201752505622892517ull, 18387852599484631165ull,
+  11926298809436624526ull, 8988465674311579538ull}},
+{{11181938325228001776ull, 6880721856250506574ull,
+  12065622774325278233ull, 5617791046444737211ull}},
+{{4754050869680226411ull, 13212588338740521122ull,
+  10470342449479209887ull, 7022238808055921514ull}},
+{{15165935623955058822ull, 11904049404998263498ull,
+  3864556024994236551ull, 8777798510069901893ull}},
+{{14090395783399299668ull, 14357559905764996542ull,
+  4721190524835091796ull, 5486124068793688683ull}},
+{{8389622692394348777ull, 17946949882206245678ull,
+  1289802137616476841ull, 6857655085992110854ull}},
+{{1263656328638160163ull, 8598629297475643386ull,
+  10835624708875371860ull, 8572068857490138567ull}},
+{{5401471223826238006ull, 14597515347777052924ull,
+  13689794470688189268ull, 5357543035931336604ull}},
+{{6751839029782797507ull, 18246894184721316155ull,
+  17112243088360236585ull, 6696928794914170755ull}},
+{{3828112768801108980ull, 8973559675619481482ull,
+  16778617842022907828ull, 8371160993642713444ull}},
+{{7004256498928081017ull, 14831846834116951734ull,
+  1263264114409541584ull, 5231975621026695903ull}},
+{{17978692660514877079ull, 93064468936638051ull,
+  15414138198294090693ull, 6539969526283369878ull}},
+{{17861679807216208444ull, 4728016604598185468ull,
+  10044300711012837558ull, 8174961907854212348ull}},
+{{1940177842655354470ull, 16790068433156029630ull,
+  15501059981237799281ull, 5109351192408882717ull}},
+{{11648594340173968895ull, 7152527486162873325ull,
+  5541266921265085390ull, 6386688990511103397ull}},
+{{725684869935297407ull, 18164031394558367465ull,
+  11538269670008744641ull, 7983361238138879246ull}},
+{{11982768089778030640ull, 4434990593957897809ull,
+  2599732525328077497ull, 4989600773836799529ull}},
+{{1143402056940374587ull, 10155424260874760166ull,
+  7861351675087484775ull, 6237000967295999411ull}},
+{{10652624608030244042ull, 8082594307666062303ull,
+  5215003575431968065ull, 7796251209119999264ull}},
+{{13575419407659984382ull, 16580836488359758699ull,
+  3259377234644980040ull, 4872657005699999540ull}},
+{{12357588241147592574ull, 2279301536740146758ull,
+  4074221543306225051ull, 6090821257124999425ull}},
+{{6223613264579714909ull, 16684184976207347160ull,
+  9704462947560169217ull, 7613526571406249281ull}},
+{{3889758290362321819ull, 3510086582488510119ull,
+  17594504388293575521ull, 4758454107128905800ull}},
+{{250511844525514369ull, 8999294246538025553ull, 3546386411657417785ull,
+  5948067633911132251ull}},
+{{4924825824084280865ull, 15860803826599919845ull,
+  18268041069853935943ull, 7435084542388915313ull}},
+{{5383859149266369493ull, 16830531419266031759ull,
+  4499996641017628108ull, 4646927838993072071ull}},
+{{2118137918155573962ull, 2591420200372988083ull,
+  1013309782844647232ull, 5808659798741340089ull}},
+{{16482730452976631164ull, 3239275250466235103ull,
+  5878323246983196944ull, 7260824748426675111ull}},
+{{15991727047793401051ull, 4049094063082793879ull,
+  2736218040301608276ull, 9076030935533343889ull}},
+{{16912358432511957513ull, 11754055826281521982ull,
+  13239351321256974932ull, 5672519334708339930ull}},
+{{11917076003785171083ull, 14692569782851902478ull,
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+  7295401874051449235ull, 5586805991439636628ull}},
+{{3367858171677894279ull, 1775799592292622488ull,
+  9119252342564311544ull, 6983507489299545785ull}},
+{{4209822714597367849ull, 2219749490365778110ull,
+  16010751446632777334ull, 8729384361624432231ull}},
+{{16466197251905518618ull, 15222401486760775030ull,
+  16924248681786567689ull, 5455865226015270144ull}},
+{{11359374528027122464ull, 5192943803168805076ull,
+  2708566778523657996ull, 6819831532519087681ull}},
+{{14199218160033903080ull, 6491179753961006345ull,
+  7997394491581960399ull, 8524789415648859601ull}},
+{{1956982322380107569ull, 10974516373866710822ull,
+  16527586603307195009ull, 5327993384780537250ull}},
+{{11669599939829910269ull, 18329831485760776431ull,
+  11436111217279217953ull, 6659991730975671563ull}},
+{{9975313906359999932ull, 9077231301918806827ull,
+  9683453003171634538ull, 8324989663719589454ull}},
+{{3928728182261306006ull, 10284955582126642171ull,
+  1440472108554883682ull, 5203118539824743409ull}},
+{{299224209399244603ull, 3632822440803526906ull, 6412276154120992507ull,
+  6503898174780929261ull}},
+{{9597402298603831562ull, 18376086106286572344ull,
+  12627031211078628537ull, 8129872718476161576ull}},
+{{5998376436627394726ull, 4567524788788025859ull,
+  7891894506924142836ull, 5081170449047600985ull}},
+{{2886284527356855504ull, 5709405985985032324ull,
+  14476554152082566449ull, 6351463061309501231ull}},
+{{3607855659196069380ull, 11748443500908678309ull,
+  13484006671675820157ull, 7939328826636876539ull}},
+{{4560752796211237315ull, 9648620197281617895ull,
+  6121661160583693646ull, 4962080516648047837ull}},
+{{1089254976836658739ull, 2837403209747246561ull,
+  12263762469157004962ull, 6202600645810059796ull}},
+{{5973254739473211328ull, 12770126049038834009ull,
+  15329703086446256202ull, 7753250807262574745ull}},
+{{15262499258239226840ull, 12593014799076659159ull,
+  2663535401387828270ull, 4845781754539109216ull}},
+{{14466438054371645646ull, 6517896461991048141ull,
+  3329419251734785338ull, 6057227193173886520ull}},
+{{4247989512682393345ull, 17370742614343585985ull,
+  4161774064668481672ull, 7571533991467358150ull}},
+{{14184208491494965601ull, 10856714133964741240ull,
+  16436166845699964757ull, 4732208744667098843ull}},
+{{17730260614368707001ull, 18182578685883314454ull,
+  15933522538697568042ull, 5915260930833873554ull}},
+{{12939453731106107943ull, 13504851320499367260ull,
+  10693531136517184245ull, 7394076163542341943ull}},
+{{17310530618796093273ull, 10746375084525798489ull,
+  13600985987964322009ull, 4621297602213963714ull}},
+{{7803105218212952879ull, 18044654874084636016ull,
+  7777860448100626703ull, 5776622002767454643ull}},
+{{9753881522766191098ull, 17944132574178407116ull,
+  5110639541698395475ull, 7220777503459318304ull}},
+{{12192351903457738873ull, 17818479699295620991ull,
+  6388299427122994344ull, 9025971879324147880ull}},
+{{14537748967302168652ull, 11136549812059763119ull,
+  3992687141951871465ull, 5641232424577592425ull}},
+{{13560500190700322911ull, 85629209792540187ull, 9602544945867227236ull,
+  7051540530721990531ull}},
+{{12338939219948015734ull, 107036512240675234ull,
+  7391495163906646141ull, 8814425663402488164ull}},
+{{12323523030894897738ull, 2372740829364115973ull,
+  13843056514296429646ull, 5509016039626555102ull}},
+{{1569345733336458460ull, 12189298073559920775ull,
+  8080448606015761249ull, 6886270049533193878ull}},
+{{15796740221952736787ull, 1401564536667737256ull,
+  877188720664925754ull, 8607837561916492348ull}},
+{{9872962638720460492ull, 5487663853844723689ull,
+  9771614987270354404ull, 5379898476197807717ull}},
+{{16952889316827963519ull, 6859579817305904611ull,
+  16826204752515330909ull, 6724873095247259646ull}},
+{{16579425627607566495ull, 13186160790059768668ull,
+  11809383903789387828ull, 8406091369059074558ull}},
+{{1138768980399953251ull, 17464722530642131226ull,
+  2769178921440979488ull, 5253807105661921599ull}},
+{{10646833262354717372ull, 3384159089593112416ull,
+  17296531707083388073ull, 6567258882077401998ull}},
+{{13308541577943396715ull, 8841884880418778424ull,
+  12397292596999459283ull, 8209073602596752498ull}},
+{{8317838486214622947ull, 3220335041048042563ull,
+  12359993891552049956ull, 5130671001622970311ull}},
+{{5785612089340890780ull, 4025418801310053204ull,
+  10838306346012674541ull, 6413338752028712889ull}}
+};
+
+static const UINT256 multipliers2_binary64[] =
+  { {{918777112239470733ull, 5138421092069233273ull,
+      15049182825743144437ull, 3877256883183270350ull}},
+{{12103450741218138969ull, 5517356191756964747ull,
+  4794053247662077369ull, 2423285551989543969ull}},
+{{10517627408095285807ull, 11508381258123593838ull,
+  10604252578004984615ull, 3029106939986929961ull}},
+{{3923662223264331450ull, 9773790554227104394ull,
+  17867001740933618673ull, 3786383674983662451ull}},
+{{7063974907967595060ull, 17637834142460410006ull,
+  8861033078869817718ull, 2366489796864789032ull}},
+{{18053340671814269633ull, 12823920641220736699ull,
+  11076291348587272148ull, 2958112246080986290ull}},
+{{17954989821340449138ull, 16029900801525920874ull,
+  4621992148879314377ull, 3697640307601232863ull}},
+{{15833554656765168615ull, 3101158973312618690ull,
+  9806274120690653342ull, 2311025192250770539ull}},
+{{10568571284101684961ull, 13099820753495549171ull,
+  7646156632435928773ull, 2888781490313463174ull}},
+{{8599028086699718297ull, 2539717886587272752ull, 334323753690135159ull,
+  3610976862891828968ull}},
+{{10748785108374647871ull, 17009705413516254652ull,
+  417904692112668948ull, 4513721078614786210ull}},
+{{15941362729588930728ull, 1407693846592883349ull,
+  4872876450997805997ull, 2821075674134241381ull}},
+{{6091645356703999697ull, 6371303326668492091ull,
+  10702781582174645400ull, 3526344592667801726ull}},
+{{3002870677452611718ull, 7964129158335615114ull,
+  4155104940863530942ull, 4407930740834752158ull}},
+{{6488480191835270228ull, 365894705532371542ull,
+  16431998643321870551ull, 2754956713021720098ull}},
+{{17333972276648863593ull, 14292426437197628139ull,
+  11316626267297562380ull, 3443695891277150123ull}},
+{{17055779327383691587ull, 17865533046497035174ull,
+  9534096815694565071ull, 4304619864096437654ull}},
+{{6048176061187419338ull, 18083487181701728840ull,
+  1347124491381715265ull, 2690387415060273534ull}},
+{{7560220076484274172ull, 8769300921844997338ull,
+  10907277651081919890ull, 3362984268825341917ull}},
+{{226903058750566907ull, 1738254115451470865ull,
+  18245783082279787767ull, 4203730336031677396ull}},
+{{11671029457787574077ull, 8003937849798251146ull,
+  2180242389570091546ull, 2627331460019798373ull}},
+{{5365414785379691788ull, 781550275393038125ull, 7336989005390002337ull,
+  3284164325024747966ull}},
+{{11318454500152002639ull, 5588623862668685560ull,
+  18394608293592278729ull, 4105205406280934957ull}},
+{{7074034062595001650ull, 15022104960236398235ull,
+  13802473192708868157ull, 2565753378925584348ull}},
+{{4230856559816364158ull, 4942573145013334082ull,
+  17253091490886085197ull, 3207191723656980435ull}},
+{{14511942736625231005ull, 10789902449694055506ull,
+  16954678345180218592ull, 4008989654571225544ull}},
+{{13681650228818157283ull, 6743689031058784691ull,
+  10596673965737636620ull, 2505618534107015965ull}},
+{{12490376767595308699ull, 8429611288823480864ull,
+  17857528475599433679ull, 3132023167633769956ull}},
+{{15612970959494135874ull, 5925328092601963176ull,
+  3875166520789740483ull, 3915028959542212446ull}},
+{{9758106849683834921ull, 1397487048662533033ull,
+  16257037130775751514ull, 2446893099713882778ull}},
+{{16809319580532181555ull, 10970230847682942099ull,
+  11097924376614913584ull, 3058616374642353473ull}},
+{{16399963457237839040ull, 13712788559603677624ull,
+  37347415486478268ull, 3823270468302941842ull}},
+{{10249977160773649400ull, 17793864886607074323ull,
+  4635028153106436821ull, 2389544042689338651ull}},
+{{8200785432539673846ull, 8407273052976679192ull,
+  1182099172955658123ull, 2986930053361673314ull}},
+{{10250981790674592308ull, 5897405297793461086ull,
+  10700996003049348462ull, 3733662566702091642ull}},
+{{1795177600744232288ull, 17520936366403076891ull,
+  11299808520333230692ull, 2333539104188807276ull}},
+{{16079030056212454072ull, 3454426384294294497ull,
+  14124760650416538366ull, 2916923880236009095ull}},
+{{6263729514983403878ull, 13541405017222643930ull,
+  13044264794593285053ull, 3646154850295011369ull}},
+{{17053033930584030656ull, 3091698216246141200ull,
+  2470272937959442605ull, 4557693562868764212ull}},
+{{10658146206615019160ull, 4238154394367532202ull,
+  10767292623079427436ull, 2848558476792977632ull}},
+{{4099310721413998142ull, 5297692992959415253ull,
+  13459115778849284295ull, 3560698095991222040ull}},
+{{9735824420194885581ull, 2010430222771881162ull,
+  16823894723561605369ull, 4450872619989027550ull}},
+{{10696576281049191393ull, 12785733935300895486ull,
+  5903248183798615451ull, 2781795387493142219ull}},
+{{4147348314456713433ull, 11370481400698731454ull,
+  2767374211320881410ull, 3477244234366427774ull}},
+{{14407557429925667599ull, 4989729714018638509ull,
+  12682589801005877571ull, 4346555292958034717ull}},
+{{11310566402917236201ull, 812738062047955116ull,
+  10232461634842367434ull, 2716597058098771698ull}},
+{{14138208003646545252ull, 10239294614414719703ull,
+  3567205006698183484ull, 3395746322623464623ull}},
+{{13061073986130793660ull, 12799118268018399629ull,
+  18294064313654893067ull, 4244682903279330778ull}},
+{{10469014250545439990ull, 5693605908297805816ull,
+  16045476214461696071ull, 2652926814549581736ull}},
+{{13086267813181799987ull, 2505321366944869366ull,
+  1610101194367568473ull, 3316158518186977171ull}},
+{{7134462729622474176ull, 7743337727108474612ull,
+  15847684548241624303ull, 4145198147733721463ull}},
+{{13682411242868822168ull, 11757115107083878488ull,
+  16822331870292097045ull, 2590748842333575914ull}},
+{{17103014053586027710ull, 861335828572684398ull,
+  11804542801010345499ull, 3238436052916969893ull}},
+{{12155395530127758829ull, 14911727840998019210ull,
+  920620445980768161ull, 4048045066146212367ull}},
+{{12208808224757237173ull, 2402300872982680150ull,
+  7492916806379061957ull, 2530028166341382729ull}},
+{{6037638244091770658ull, 7614562109655738092ull,
+  13977832026401215350ull, 3162535207926728411ull}},
+{{7547047805114713322ull, 294830600214896807ull,
+  12860604014574131284ull, 3953169009908410514ull}},
+{{11634433905837777682ull, 9407641161989086312ull,
+  12649563527536219956ull, 2470730631192756571ull}},
+{{14543042382297222103ull, 11759551452486357890ull,
+  11200268390992887041ull, 3088413288990945714ull}},
+{{8955430941016751820ull, 864381260325783651ull, 4776963451886332994ull,
+  3860516611238682143ull}},
+{{3291301328921775936ull, 5151924306131002686ull,
+  9903131185070039977ull, 2412822882024176339ull}},
+{{13337498698006995728ull, 11051591401091141261ull,
+  7767227962910162067ull, 3016028602530220424ull}},
+{{2836815317226580948ull, 9202803232936538673ull,
+  9709034953637702584ull, 3770035753162775530ull}},
+{{13302224619335082852ull, 5751752020585336670ull,
+  10679832864450952019ull, 2356272345726734706ull}},
+{{7404408737314077757ull, 2578004007304282934ull,
+  4126419043708914216ull, 2945340432158418383ull}},
+{{32138884787821389ull, 3222505009130353668ull, 546337786208754866ull,
+  3681675540198022979ull}},
+{{40173605984776736ull, 13251503298267717893ull,
+  14517980288043107294ull, 4602094425247528723ull}},
+{{2330951512954179412ull, 3670503542989935779ull,
+  6767894670813248107ull, 2876309015779705452ull}},
+{{16748747446474887977ull, 18423187484019583435ull,
+  8459868338516560133ull, 3595386269724631815ull}},
+{{16324248289666222067ull, 9193926299742315582ull,
+  5963149404718312263ull, 4494232837155789769ull}},
+{{5590969162614000888ull, 12663732964980029095ull,
+  15256183424017414924ull, 2808895523222368605ull}},
+{{2377025434840113206ull, 15829666206225036369ull,
+  5235171224739604943ull, 3511119404027960757ull}},
+{{7582967811977529411ull, 15175396739353907557ull,
+  11155650049351894083ull, 4388899255034950946ull}},
+{{7045197891699649834ull, 7178779952882498271ull,
+  11583967299272321706ull, 2743062034396844341ull}},
+{{4194811346197174389ull, 18196846977957898647ull,
+  644901068808238420ull, 3428827542996055427ull}},
+{{631828164319080082ull, 4299314648737821693ull,
+  14641184391292461738ull, 4286034428745069283ull}},
+{{2700735611913119003ull, 7298757673888526462ull,
+  6844897235344094634ull, 2678771517965668302ull}},
+{{12599291551746174562ull, 18346819129215433885ull,
+  17779493581034894100ull, 3348464397457085377ull}},
+{{1914056384400554490ull, 4486779837809740741ull,
+  8389308921011453914ull, 4185580496821356722ull}},
+{{3502128249464040509ull, 7415923417058475867ull,
+  9855004094059546600ull, 2615987810513347951ull}},
+{{18212718367112214348ull, 9269904271323094833ull,
+  7707069099147045346ull, 3269984763141684939ull}},
+{{8930839903608104222ull, 2364008302299092734ull,
+  5022150355506418779ull, 4087480953927106174ull}},
+{{970088921327677235ull, 17618406253432790623ull,
+  16973902027473675448ull, 2554675596204441358ull}},
+{{15047669206941760256ull, 3576263743081436662ull,
+  11994005497487318503ull, 3193344495255551698ull}},
+{{9586214471822424512ull, 18305387734133959540ull,
+  5769134835004372320ull, 3991680619069439623ull}},
+{{15214756081743791128ull, 11440867333833724712ull,
+  10523238299518814556ull, 2494800386918399764ull}},
+{{571701028470187294ull, 14301084167292155891ull,
+  13154047874398518195ull, 3118500483647999705ull}},
+{{14549684340869897829ull, 13264669190687806959ull,
+  2607501787715984032ull, 3898125604559999632ull}},
+{{16011081740684767999ull, 8290418244179879349ull,
+  1629688617322490020ull, 2436328502849999770ull}},
+{{6178794120573796287ull, 10363022805224849187ull,
+  11260482808507888333ull, 3045410628562499712ull}},
+{{3111806632289857455ull, 17565464524958449388ull,
+  14075603510634860416ull, 3806763285703124640ull}},
+{{11168251182035936718ull, 10978415328099030867ull,
+  8797252194146787760ull, 2379227053564452900ull}},
+{{9348627959117532993ull, 13723019160123788584ull,
+  10996565242683484700ull, 2974033816955566125ull}},
+{{11685784948896916241ull, 17153773950154735730ull,
+  18357392571781743779ull, 3717542271194457656ull}},
+{{11915301611487960555ull, 8415265709633015879ull,
+  11473370357363589862ull, 2323463919496536035ull}},
+{{10282440995932562789ull, 1295710100186494041ull,
+  9730026928277099424ull, 2904329899370670044ull}},
+{{17464737263343091390ull, 1619637625233117551ull,
+  12162533660346374280ull, 3630412374213337555ull}},
+{{17219235560751476334ull, 2024547031541396939ull,
+  10591481057005579946ull, 4538015467766671944ull}},
+{{8456179216255978757ull, 5877027913140760991ull,
+  6619675660628487466ull, 2836259667354169965ull}},
+{{5958538001892585542ull, 16569656928280727047ull,
+  12886280594212997236ull, 3545324584192712456ull}},
+{{2836486483938344023ull, 2265327086641357193ull,
+  16107850742766246546ull, 4431655730240890570ull}},
+{{13302019098529934775ull, 6027515447578236149ull,
+  14679092732656291995ull, 2769784831400556606ull}},
+{{2792465817880254756ull, 2922708291045407283ull,
+  9125493878965589186ull, 3462231039250695758ull}},
+{{17325640327632482157ull, 12876757400661534911ull,
+  2183495311852210674ull, 4327788799063369698ull}},
+{{17746054232411383205ull, 12659659393840847223ull,
+  5976370588335019575ull, 2704867999414606061ull}},
+{{17570881772086841102ull, 11212888223873671125ull,
+  12082149253846162373ull, 3381084999268257576ull}},
+{{8128544159826387665ull, 181052224559925195ull,
+  15102686567307702967ull, 4226356249085321970ull}},
+{{2774497090677798339ull, 7030686667991035103ull,
+  14050865122994702258ull, 2641472655678326231ull}},
+{{17303179418629411635ull, 18011730371843569686ull,
+  12951895385315989918ull, 3301840819597907789ull}},
+{{12405602236431988736ull, 13291290927949686300ull,
+  2354811176362823686ull, 4127301024497384737ull}},
+{{16976873434624768768ull, 3695370811541166033ull,
+  13000972031295234564ull, 2579563140310865460ull}},
+{{7386033737998797248ull, 4619213514426457542ull,
+  16251215039119043205ull, 3224453925388581825ull}},
+{{9170135643720752ull, 10385702911460459832ull, 6478960743616640294ull,
+  4030567406735727282ull}},
+{{5731334777325470ull, 1879378301235399491ull, 8661036483187788088ull,
+  2519104629209829551ull}},
+{{13842222223753820550ull, 2349222876544249363ull,
+  6214609585557347206ull, 3148880786512286939ull}},
+{{12691091761264887783ull, 12159900632535087512ull,
+  3156575963519296103ull, 3936100983140358674ull}},
+{{7931932350790554864ull, 14517466922975511551ull,
+  6584545995626947968ull, 2460063114462724171ull}},
+{{5303229420060805676ull, 18146833653719389439ull,
+  3618996476106297056ull, 3075078893078405214ull}},
+{{2017350756648619191ull, 4236797993439685183ull,
+  13747117631987647129ull, 3843848616348006517ull}},
+{{8178373250546468851ull, 14177213791968272999ull,
+  10897791529205973407ull, 2402405385217504073ull}},
+{{5611280544755698159ull, 13109831221532953345ull,
+  18233925429934854663ull, 3003006731521880091ull}},
+{{11625786699372010603ull, 11775603008488803777ull,
+  18180720768991180425ull, 3753758414402350114ull}},
+{{348587659466424771ull, 442222852664420505ull, 15974636499046875670ull,
+  2346099009001468821ull}},
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+{{4876940761383095549ull, 18195438323943979366ull,
+  2555319770849197737ull, 3610388751729659152ull}},
+{{15319547988583645245ull, 8909239849647810495ull,
+  3194149713561497172ull, 4512985939662073940ull}},
+{{16492246520505860134ull, 14791646942884657367ull,
+  11219715607830711540ull, 2820616212288796212ull}},
+{{16003622132204937264ull, 42814604896270093ull,
+  14024644509788389426ull, 3525770265360995265ull}},
+{{6169469609974007867ull, 9276890292975113425ull,
+  3695747581953323070ull, 4407212831701244082ull}},
+{{15385133552302224677ull, 1186370414682057986ull,
+  6921528257148214823ull, 2754508019813277551ull}},
+{{10008044903523005038ull, 15318021073634736195ull,
+  4040224303007880624ull, 3443135024766596939ull}},
+{{7898370110976368394ull, 700782268333868628ull, 438594360332462877ull,
+  4303918780958246174ull}},
+{{14159853356215006054ull, 2743831926922361844ull,
+  14109179530489953010ull, 2689949238098903858ull}},
+{{17699816695268757568ull, 12653161945507728113ull,
+  8413102376257665454ull, 3362436547623629823ull}},
+{{8289712813803783248ull, 6593080395029884334ull,
+  5904691951894693914ull, 4203045684529537279ull}},
+{{569384490199976626ull, 8732361265321065613ull,
+  10607961497575265552ull, 2626903552830960799ull}},
+{{5323416631177358686ull, 10915451581651332016ull,
+  8648265853541694036ull, 3283629441038700999ull}},
+{{6654270788971698358ull, 13644314477064165020ull,
+  6198646298499729641ull, 4104536801298376249ull}},
+{{13382291279962087282ull, 1610167520524021281ull,
+  15403368982630800786ull, 2565335500811485155ull}},
+{{2892806044670445390ull, 11236081437509802410ull,
+  14642525209861113078ull, 3206669376014356444ull}}
+};
+
+// **********************************************************************
+
+#if __ENABLE_BINARY80__
+
+static const UINT128 breakpoints_binary80[] =
+  { {{6337302757928054309ull, 494016656451265ull}},
+{{5069842206342443447ull, 395213325161012ull}},
+{{15123920209299685727ull, 316170660128809ull}},
+{{13130225890653766194ull, 505873056206095ull}},
+{{10504180712523012955ull, 404698444964876ull}},
+{{4713995755276500041ull, 323758755971901ull}},
+{{163695578958579419ull, 518014009555042ull}},
+{{11199002907392594505ull, 414411207644033ull}},
+{{16337899955397896250ull, 331528966115226ull}},
+{{315198225443261738ull, 530446345784363ull}},
+{{7630856209838430037ull, 424357076627490ull}},
+{{6104684967870744030ull, 339485661301992ull}},
+{{13456844763335100771ull, 543177058083187ull}},
+{{3386778181184259970ull, 434541646466550ull}},
+{{2709422544947407976ull, 347633317173240ull}},
+{{4335076071915852762ull, 556213307477184ull}},
+{{7157409672274592533ull, 444970645981747ull}},
+{{16793974182045404996ull, 355976516785397ull}},
+{{6056481716152503350ull, 284781213428318ull}},
+{{6001021931102095037ull, 455649941485309ull}},
+{{8490166359623586353ull, 364519953188247ull}},
+{{17860179531924600052ull, 291615962550597ull}},
+{{13818891992111718790ull, 466585540080956ull}},
+{{7365764778947464709ull, 373268432064765ull}},
+{{5892611823157971767ull, 298614745651812ull}},
+{{13117527731794665151ull, 477783593042899ull}},
+{{14183371000177642444ull, 382226874434319ull}},
+{{15036045614884024278ull, 305781499547455ull}},
+{{5610928910104887229ull, 489250399275929ull}},
+{{8178091942825820106ull, 391400319420743ull}},
+{{13921171183744476731ull, 313120255536594ull}},
+{{11205827449765431801ull, 500992408858551ull}},
+{{5275313145070435117ull, 400793927086841ull}},
+{{530901701314437771ull, 320635141669473ull}},
+{{15606837981070741726ull, 513016226671156ull}},
+{{8796121570114683058ull, 410412981336925ull}},
+{{7036897256091746446ull, 328330385069540ull}},
+{{11259035609746794314ull, 525328616111264ull}},
+{{12696577302539345774ull, 420262892889011ull}},
+{{6467913027289566296ull, 336210314311209ull}},
+{{17727358473147126720ull, 537936502897934ull}},
+{{17871235593259611699ull, 430349202318347ull}},
+{{6918290845123868713ull, 344279361854678ull}},
+{{7379916537456279618ull, 550846978967485ull}},
+{{5903933229965023694ull, 440677583173988ull}},
+{{12101844213455839602ull, 352542066539190ull}},
+{{9681475370764671681ull, 282033653231352ull}},
+{{732965334255833398ull, 451253845170164ull}},
+{{4275721082146577041ull, 361003076136131ull}},
+{{18177972124684902926ull, 288802460908904ull}},
+{{18016708955270113712ull, 462083937454247ull}},
+{{7034669534732270323ull, 369667149963398ull}},
+{{13006433257269636905ull, 295733719970718ull}},
+{{17120944396889508724ull, 473173951953149ull}},
+{{17386104332253517303ull, 378539161562519ull}},
+{{17598232280544724165ull, 302831329250015ull}},
+{{9710427575162007049ull, 484530126800025ull}},
+{{7768342060129605639ull, 387624101440020ull}},
+{{6214673648103684511ull, 310099281152016ull}},
+{{2564780207482074571ull, 496158849843226ull}},
+{{16809219424953300950ull, 396927079874580ull}},
+{{13447375539962640760ull, 317541663899664ull}},
+{{10447754419714494246ull, 508066662239463ull}},
+{{15736901165255416043ull, 406453329791570ull}},
+{{12589520932204332835ull, 325162663833256ull}},
+{{12764535862043111889ull, 520260262133210ull}},
+{{10211628689634489511ull, 416208209706568ull}},
+{{15548000581191412255ull, 332966567765254ull}},
+{{13808754485680528639ull, 532746508424407ull}},
+{{3668305959060602265ull, 426197206739526ull}},
+{{17692040026216123105ull, 340957765391620ull}},
+{{9860519968236245352ull, 545532424626593ull}},
+{{15267113604072816928ull, 436425939701274ull}},
+{{15903039698000163865ull, 349140751761019ull}},
+{{14376817072574531215ull, 558625202817631ull}},
+{{7812104843317714649ull, 446900162254105ull}},
+{{6249683874654171719ull, 357520129803284ull}},
+{{8689095914465247698ull, 286016103842627ull}},
+{{17591902277886306641ull, 457625766148203ull}},
+{{3005475378083314343ull, 366100612918563ull}},
+{{9783077931950472121ull, 292880490334850ull}},
+{{15652924691120755393ull, 468608784535760ull}},
+{{12522339752896604314ull, 374887027628608ull}},
+{{17396569431801104098ull, 299909622102886ull}},
+{{2009069387688394294ull, 479855395364619ull}},
+{{5296604324892625759ull, 383884316291695ull}},
+{{4237283459914100607ull, 307107453033356ull}},
+{{17847699980088291941ull, 491371924853369ull}},
+{{17967508798812543876ull, 393097539882695ull}},
+{{14374007039050035101ull, 314478031906156ull}},
+{{15619713632996235515ull, 503164851049850ull}},
+{{12495770906396988412ull, 402531880839880ull}},
+{{9996616725117590729ull, 322025504671904ull}},
+{{4926540315962414197ull, 515240807475047ull}},
+{{15009278696995662327ull, 412192645980037ull}},
+{{4628725328112709215ull, 329754116784030ull}},
+{{7405960524980334745ull, 527606586854448ull}},
+{{13303466049468088442ull, 422085269483558ull}},
+{{18021470469058291400ull, 337668215586846ull}},
+{{3008911047299893978ull, 540269144938955ull}},
+{{2407128837839915182ull, 432215315951164ull}},
+{{5615051885013842469ull, 345772252760931ull}},
+{{1605385386538327304ull, 553235604417490ull}},
+{{1284308309230661843ull, 442588483533992ull}},
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+{{17055092102772029002ull, 283256629461754ull}},
+{{16220100920209515433ull, 453210607138807ull}},
+{{5597383106683791700ull, 362568485711046ull}},
+{{788557670605123037ull, 290054788568837ull}},
+{{4951041087710107183ull, 464087661710139ull}},
+{{7650181684909996069ull, 371270129368111ull}},
+{{2430796533186086532ull, 297016103494489ull}},
+{{11267972082581559098ull, 475225765591182ull}},
+{{1635680036581426632ull, 380180612472946ull}},
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+{{8039806533538813844ull, 311443957737837ull}},
+{{16553039268404012473ull, 498310332380539ull}},
+{{16931780229465120302ull, 398648265904431ull}},
+{{9856075368830185918ull, 318918612723545ull}},
+{{15769720590128297469ull, 510269780357672ull}},
+{{5237078842618817329ull, 408215824286138ull}},
+{{11568360703578874509ull, 326572659428910ull}},
+{{62633052016647599ull, 522516255086257ull}},
+{{11118152885839049049ull, 418013004069005ull}},
+{{8894522308671239239ull, 334410403255204ull}},
+{{3163189249648251813ull, 535056645208327ull}},
+{{13598597843944332420ull, 428045316166661ull}},
+{{7189529460413555613ull, 342436252933329ull}},
+{{435200692435958011ull, 547898004693327ull}},
+{{11416206998174497378ull, 438318403754661ull}},
+{{5443616783797687579ull, 350654723003729ull}},
+{{16088484483560120774ull, 561047556805966ull}},
+{{9181438772106186296ull, 448838045444773ull}},
+{{14723848647168769683ull, 359070436355818ull}},
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+{{6657629533615178028ull, 339132438727219ull}},
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+{{4367432839258861519ull, 435604622309210ull}},
+{{3493946271407089215ull, 348483697847368ull}},
+{{1900965219509432421ull, 557573916555789ull}},
+{{5210120990349456260ull, 446059133244631ull}},
+{{478747977537654685ull, 356847306595705ull}},
+{{382998382030123748ull, 285477845276564ull}},
+{{7991495040732018643ull, 456764552442502ull}},
+{{17461242476811345884ull, 365411641954001ull}},
+{{10279645166707166384ull, 292329313563201ull}},
+{{9068734637247645568ull, 467726901701122ull}},
+{{18323034154023847424ull, 374181521360897ull}},
+{{7279729693735257293ull, 299345217088718ull}},
+{{7958218695234501345ull, 478952347341949ull}},
+{{10055923770929511399ull, 383161877873559ull}},
+{{11734087831485519443ull, 306529502298847ull}},
+{{4017145271409189816ull, 490447203678156ull}},
+{{17971111476094993145ull, 392357762942524ull}},
+{{18066237995617904839ull, 313886210354019ull}},
+{{17837934348762916774ull, 502217936566431ull}},
+{{10580998664268423096ull, 401774349253145ull}},
+{{8464798931414738476ull, 321419479402516ull}},
+{{6164980660779760916ull, 514271167044026ull}},
+{{1242635713881898410ull, 411416933635221ull}},
+{{15751503830073160020ull, 329133546908176ull}},
+{{17823708498633235386ull, 526613675053082ull}},
+{{6880269169422767663ull, 421290940042466ull}},
+{{1814866520796303807ull, 337032752033973ull}},
+{{17661181692241727384ull, 539252403254356ull}},
+{{10439596539051471584ull, 431401922603485ull}},
+{{8351677231241177267ull, 345121538082788ull}},
+{{9673334755243973304ull, 552194460932461ull}},
+{{4049318989453268320ull, 441755568745969ull}},
+{{6928804006304524979ull, 353404454996775ull}},
+{{5543043205043619983ull, 282723563997420ull}},
+{{8868869128069791974ull, 452357702395872ull}},
+{{18163141746681564548ull, 361886161916697ull}},
+{{7151815767861430992ull, 289508929533358ull}},
+{{7753556413836379265ull, 463214287253373ull}},
+{{13581542760552924058ull, 370571429802698ull}},
+{{18243931837926159893ull, 296457143842158ull}},
+{{7054198052230393889ull, 474331430147454ull}},
+{{9332707256526225435ull, 379465144117963ull}},
+{{14844863434704800994ull, 303572115294370ull}},
+{{5305037421818129975ull, 485715384470993ull}},
+{{11622727566938324626ull, 388572307576794ull}},
+{{12987530868292570024ull, 310857846061435ull}},
+{{2333305315558560423ull, 497372553698297ull}},
+{{12934690696672579308ull, 397898042958637ull}},
+{{2969054927854242800ull, 318318434366910ull}},
+{{4750487884566788480ull, 509309494987056ull}},
+{{111041492911520460ull, 407447595989645ull}},
+{{88833194329216368ull, 325958076791716ull}},
+{{11210179555152477159ull, 521532922866745ull}},
+{{8968143644121981727ull, 417226338293396ull}},
+{{3485166100555675058ull, 333781070634717ull}},
+{{9265614575630990417ull, 534049713015547ull}},
+{{33794031020971687ull, 427239770412438ull}},
+{{7405732854300597996ull, 341791816329950ull}},
+{{11849172566880956794ull, 546866906127920ull}},
+{{9479338053504765435ull, 437493524902336ull}},
+{{3894121628061902025ull, 349994819921869ull}},
+{{13609292234382863886ull, 559991711874990ull}},
+{{10887433787506291109ull, 447993369499992ull}},
+{{1331249400521212241ull, 358394695599994ull}},
+{{4754348335158880116ull, 286715756479995ull}},
+{{7606957336254208185ull, 458745210367992ull}},
+{{17153612313229097518ull, 366996168294393ull}},
+{{2654843406357547044ull, 293596934635515ull}},
+{{4247749450172075271ull, 469755095416824ull}},
+{{7087548374879570540ull, 375804076333459ull}},
+{{9359387514645566755ull, 300643261066767ull}},
+{{217624764465265516ull, 481029217706828ull}},
+{{7552797441056033059ull, 384823374165462ull}},
+{{17110284397070557417ull, 307858699332369ull}},
+{{16308408591087160897ull, 492573918931791ull}},
+{{9357378058127818395ull, 394059135145433ull}},
+{{14864600075986075362ull, 315247308116346ull}},
+{{16404662492093899933ull, 504395692986154ull}},
+{{16813078808417030270ull, 403516554388923ull}},
+{{2382416602507893246ull, 322813243511139ull}},
+{{11190564193496449840ull, 516501189617822ull}},
+{{1573753725313339226ull, 413200951694258ull}},
+{{8637700609734492027ull, 330560761355406ull}},
+{{6441623346091366597ull, 528897218168650ull}},
+{{5153298676873093277ull, 423117774534920ull}},
+{{4122638941498474622ull, 338494219627936ull}},
+{{17664268750623290365ull, 541590751404697ull}},
+{{6752717371014811645ull, 433272601123758ull}},
+{{12780871526295669963ull, 346618080899006ull}},
+{{13070696812589251294ull, 554588929438410ull}},
+{{10456557450071401035ull, 443671143550728ull}},
+{{15743943589540941474ull, 354936914840582ull}},
+{{5216457242148932533ull, 283949531872466ull}},
+{{967633957954471407ull, 454319250995946ull}},
+{{15531502425331218418ull, 363455400796756ull}},
+{{8735853125523064411ull, 290764320637405ull}},
+{{13977365000836903058ull, 465222913019848ull}},
+{{113845556443791477ull, 372178330415879ull}},
+{{3780425259896943505ull, 297742664332703ull}},
+{{2359331601093199284ull, 476388262932325ull}},
+{{1887465280874559427ull, 381110610345860ull}},
+{{1509972224699647542ull, 304888488276688ull}},
+{{17173350818487077360ull, 487821581242700ull}},
+{{13738680654789661888ull, 390257264994160ull}},
+{{10990944523831729510ull, 312205811995328ull}},
+{{13896162423388856894ull, 499529299192525ull}},
+{{11116929938711085515ull, 399623439354020ull}},
+{{8893543950968868412ull, 319698751483216ull}},
+{{6850972692066368813ull, 511518002373146ull}},
+{{1791429338911184727ull, 409214401898517ull}},
+{{12501189915354678751ull, 327371521518813ull}},
+{{16312555049825575679ull, 523794434430101ull}},
+{{9360695225118550220ull, 419035547544081ull}},
+{{3799207365352929852ull, 335228438035265ull}},
+{{6078731784564687764ull, 536365500856424ull}},
+{{8552334242393660534ull, 429092400685139ull}},
+{{10531216208656838751ull, 343273920548111ull}},
+{{9471248304367121355ull, 549238272876978ull}},
+{{14955696272977517730ull, 439390618301582ull}},
+{{4585859388898193538ull, 351512494641266ull}},
+{{18405421466462840630ull, 562419991426025ull}},
+{{14724337173170272504ull, 449935993140820ull}},
+{{11779469738536218003ull, 359948794512656ull}},
+{{5734226976087064079ull, 287959035610125ull}},
+{{9174763161739302527ull, 460734456976200ull}},
+{{7339810529391442021ull, 368587565580960ull}},
+{{5871848423513153617ull, 294870052464768ull}},
+{{5705608662879135464ull, 471792083943629ull}},
+{{8253835745045218695ull, 377433667154903ull}},
+{{13981766225519995602ull, 301946933723922ull}},
+{{7613430701864351671ull, 483115093958276ull}},
+{{2401395746749571013ull, 386492075166621ull}},
+{{16678511856367298103ull, 309193660133296ull}},
+{{860177266994304703ull, 494709856213275ull}},
+{{688141813595443762ull, 395767884970620ull}},
+{{550513450876355010ull, 316614307976496ull}},
+{{11948867965627898986ull, 506582892762393ull}},
+{{16937792001986139835ull, 405266314209914ull}},
+{{17239582416330822191ull, 324213051367931ull}},
+{{1757890162935943243ull, 518740882188691ull}},
+{{16163707389316395887ull, 414992705750952ull}},
+{{5552268281969296063ull, 331994164600762ull}},
+{{12572978065892784025ull, 531190663361219ull}},
+{{13747731267456137543ull, 424952530688975ull}},
+{{10998185013964910034ull, 339962024551180ull}},
+{{17597096022343856055ull, 543939239281888ull}},
+{{3009630373649353875ull, 435151391425511ull}},
+{{17165099557887124392ull, 348121113140408ull}},
+{{5328066404167937089ull, 556993781024654ull}},
+{{7951801938076259994ull, 445595024819723ull}},
+{{13740139179944828642ull, 356476019855778ull}},
+{{18370808973439683560ull, 285180815884622ull}},
+{{14635899098535852403ull, 456289305415396ull}},
+{{8019370464086771599ull, 365031444332317ull}},
+{{17483542815495148249ull, 292025155465853ull}},
+{{5837575616340775259ull, 467240248745366ull}},
+{{980711678330709884ull, 373792198996293ull}},
+{{8163266972148388553ull, 299033759197034ull}},
+{{1993180711211690716ull, 478454014715255ull}},
+{{1594544568969352573ull, 382763211772204ull}},
+{{4964984469917392381ull, 306210569417763ull}},
+{{4254626337125917487ull, 489936911068421ull}},
+{{18161096328668375283ull, 391949528854736ull}},
+{{10839528248192789903ull, 313559623083789ull}},
+{{6275198752882732875ull, 501695396934063ull}},
+{{12398856631790006946ull, 401356317547250ull}},
+{{9919085305432005557ull, 321085054037800ull}},
+{{15870536488691208892ull, 513736086460480ull}},
+{{12696429190952967113ull, 410988869168384ull}},
+{{13846492167504284014ull, 328791095334707ull}},
+{{7396992209039213129ull, 526065752535532ull}},
+{{16985640211457101473ull, 420852602028425ull}},
+{{13588512169165681178ull, 336682081622740ull}},
+{{3294875396955538270ull, 538691330596385ull}},
+{{2635900317564430616ull, 430953064477108ull}},
+{{9487417883535365139ull, 344762451581686ull}},
+{{7801170984172763576ull, 551619922530698ull}},
+{{13619634416822031507ull, 441295938024558ull}},
+{{18274405162941445852ull, 353036750419646ull}},
+{{10930175315611246358ull, 282429400335717ull}},
+{{2730885246010352881ull, 451887040537148ull}},
+{{9563405826292102951ull, 361509632429718ull}},
+{{15029422290517503007ull, 289207705943774ull}},
+{{12979029220602273842ull, 462732329510039ull}},
+{{14072572191223729397ull, 370185863608031ull}},
+{{7568708938237073194ull, 296148690886425ull}},
+{{12109934301179317111ull, 473837905418280ull}},
+{{9687947440943453688ull, 379070324334624ull}},
+{{11439706767496673274ull, 303256259467699ull}},
+{{7235484383768946269ull, 485210015148319ull}},
+{{9477736321757067338ull, 388168012118655ull}},
+{{7582189057405653870ull, 310534409694924ull}},
+{{1063456047623315223ull, 496855055511879ull}},
+{{4540113652840562502ull, 397484044409503ull}},
+{{11010788551756270648ull, 317987235527602ull}},
+{{2859866423842391744ull, 508779576844164ull}},
+{{5977241953815823718ull, 407023661475331ull}},
+{{1092444748310748651ull, 325618929180265ull}},
+{{1747911597297197842ull, 520990286688424ull}},
+{{5087678092579668597ull, 416792229350739ull}},
+{{7759491288805645201ull, 333433783480591ull}},
+{{5036488432605211675ull, 533494053568946ull}},
+{{339841931342259017ull, 426795242855157ull}},
+{{11339919989299538183ull, 341436194284125ull}},
+{{18143871982879261093ull, 546297910854600ull}},
+{{14515097586303408874ull, 437038328683680ull}},
+{{11612078069042727099ull, 349630662946944ull}},
+{{7511278466242632389ull, 559409060715111ull}},
+{{2319673958252195588ull, 447527248572089ull}},
+{{5545087981343666794ull, 358021798857671ull}},
+{{746721570333023112ull, 286417439086137ull}},
+{{4884103327274747302ull, 458267902537819ull}},
+{{7596631476561708165ull, 366614322030255ull}},
+{{6077305181249366532ull, 293291457624204ull}},
+{{17102385919482807098ull, 469266332198726ull}},
+{{9992559920844335355ull, 375413065758981ull}},
+{{4304699121933557960ull, 300330452607185ull}},
+{{6887518595093692737ull, 480528724171496ull}},
+{{1820666061333043866ull, 384422979337197ull}},
+{{12524579293292166063ull, 307538383469757ull}},
+{{5281931610299824408ull, 492061413551612ull}},
+{{15293591732465590496ull, 393649130841289ull}},
+{{15924222200714382720ull, 314919304673031ull}},
+{{18100057891659191705ull, 503870887476850ull}},
+{{14480046313327353364ull, 403096709981480ull}},
+{{11584037050661882691ull, 322477367985184ull}},
+{{7466412836833281337ull, 515963788776295ull}},
+{{5973130269466625069ull, 412771031021036ull}},
+{{1089155400831389732ull, 330216824816829ull}},
+{{9121346270814044218ull, 528346919706926ull}},
+{{3607728201909325051ull, 422677535765541ull}},
+{{17643577820495101334ull, 338142028612432ull}},
+{{13472329253824520841ull, 541027245779892ull}},
+{{3399165773575796026ull, 432821796623914ull}},
+{{6408681433602547144ull, 346257437299131ull}},
+{{2875192664280254785ull, 554011899678610ull}},
+{{2300154131424203828ull, 443209519742888ull}},
+{{9218820934623183708ull, 354567615794310ull}},
+{{7375056747698546967ull, 283654092635448ull}},
+{{8110741981575764824ull, 453846548216717ull}},
+{{17556640029486342828ull, 363077238573373ull}},
+{{2977265579363343293ull, 290461790858699ull}},
+{{12142322556465169916ull, 464738865373918ull}},
+{{17092555674655956579ull, 371791092299134ull}},
+{{17363393354466675586ull, 297432873839307ull}},
+{{13024034108179039645ull, 475892598142892ull}},
+{{3040529657059411070ull, 380714078514314ull}},
+{{6121772540389439179ull, 304571262811451ull}},
+{{2416138435139282040ull, 487314020498322ull}},
+{{13000957192337156602ull, 389851216398657ull}},
+{{3022068124385904635ull, 311880973118926ull}},
+{{15903355443243178386ull, 499009556990281ull}},
+{{9033335539852632385ull, 399207645592225ull}},
+{{7226668431882105908ull, 319366116473780ull}},
+{{11562669491011369453ull, 510985786358048ull}},
+{{16628833222292916209ull, 408788629086438ull}},
+{{2235020133608601997ull, 327030903269151ull}},
+{{14644078657999494166ull, 523249445230641ull}},
+{{8025914111657685009ull, 418599556184513ull}},
+{{13799428918809968654ull, 334879644947610ull}},
+{{3632342196386398230ull, 535807431916177ull}}
+};
+
+static const int exponents_binary80[] = { -65,
+  -62,
+  -59,
+  -55,
+  -52,
+  -49,
+  -45,
+  -42,
+  -39,
+  -35,
+  -32,
+  -29,
+  -25,
+  -22,
+  -19,
+  -15,
+  -12,
+  -9,
+  -6,
+  -2,
+  1,
+  4,
+  8,
+  11,
+  14,
+  18,
+  21,
+  24,
+  28,
+  31,
+  34,
+  38,
+  41,
+  44,
+  48,
+  51,
+  54,
+  58,
+  61,
+  64,
+  68,
+  71,
+  74,
+  78,
+  81,
+  84,
+  87,
+  91,
+  94,
+  97,
+  101,
+  104,
+  107,
+  111,
+  114,
+  117,
+  121,
+  124,
+  127,
+  131,
+  134,
+  137,
+  141,
+  144,
+  147,
+  151,
+  154,
+  157,
+  161,
+  164,
+  167,
+  171,
+  174,
+  177,
+  181,
+  184,
+  187,
+  190,
+  194,
+  197,
+  200,
+  204,
+  207,
+  210,
+  214,
+  217,
+  220,
+  224,
+  227,
+  230,
+  234,
+  237,
+  240,
+  244,
+  247,
+  250,
+  254,
+  257,
+  260,
+  264,
+  267,
+  270,
+  274,
+  277,
+  280,
+  283,
+  287,
+  290,
+  293,
+  297,
+  300,
+  303,
+  307,
+  310,
+  313,
+  317,
+  320,
+  323,
+  327,
+  330,
+  333,
+  337,
+  340,
+  343,
+  347,
+  350,
+  353,
+  357,
+  360,
+  363,
+  367,
+  370,
+  373,
+  377,
+  380,
+  383,
+  386,
+  390,
+  393,
+  396,
+  400,
+  403,
+  406,
+  410,
+  413,
+  416,
+  420,
+  423,
+  426,
+  430,
+  433,
+  436,
+  440,
+  443,
+  446,
+  450,
+  453,
+  456,
+  460,
+  463,
+  466,
+  470,
+  473,
+  476,
+  479,
+  483,
+  486,
+  489,
+  493,
+  496,
+  499,
+  503,
+  506,
+  509,
+  513,
+  516,
+  519,
+  523,
+  526,
+  529,
+  533,
+  536,
+  539,
+  543,
+  546,
+  549,
+  553,
+  556,
+  559,
+  563,
+  566,
+  569,
+  572,
+  576,
+  579,
+  582,
+  586,
+  589,
+  592,
+  596,
+  599,
+  602,
+  606,
+  609,
+  612,
+  616,
+  619,
+  622,
+  626,
+  629,
+  632,
+  636,
+  639,
+  642,
+  646,
+  649,
+  652,
+  656,
+  659,
+  662,
+  666,
+  669,
+  672,
+  675,
+  679,
+  682,
+  685,
+  689,
+  692,
+  695,
+  699,
+  702,
+  705,
+  709,
+  712,
+  715,
+  719,
+  722,
+  725,
+  729,
+  732,
+  735,
+  739,
+  742,
+  745,
+  749,
+  752,
+  755,
+  759,
+  762,
+  765,
+  768,
+  772,
+  775,
+  778,
+  782,
+  785,
+  788,
+  792,
+  795,
+  798,
+  802,
+  805,
+  808,
+  812,
+  815,
+  818,
+  822,
+  825,
+  828,
+  832,
+  835,
+  838,
+  842,
+  845,
+  848,
+  852,
+  855,
+  858,
+  862,
+  865,
+  868,
+  871,
+  875,
+  878,
+  881,
+  885,
+  888,
+  891,
+  895,
+  898,
+  901,
+  905,
+  908,
+  911,
+  915,
+  918,
+  921,
+  925,
+  928,
+  931,
+  935,
+  938,
+  941,
+  945,
+  948,
+  951,
+  955,
+  958,
+  961,
+  964,
+  968,
+  971,
+  974,
+  978,
+  981,
+  984,
+  988,
+  991,
+  994,
+  998,
+  1001,
+  1004,
+  1008,
+  1011,
+  1014,
+  1018,
+  1021,
+  1024,
+  1028,
+  1031,
+  1034,
+  1038,
+  1041,
+  1044,
+  1048,
+  1051,
+  1054,
+  1058,
+  1061,
+  1064,
+  1067,
+  1071,
+  1074,
+  1077,
+  1081,
+  1084,
+  1087,
+  1091,
+  1094,
+  1097,
+  1101,
+  1104,
+  1107,
+  1111,
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+  32167,
+  32171,
+  32174,
+  32177,
+  32181,
+  32184,
+  32187,
+  32191,
+  32194,
+  32197,
+  32201,
+  32204,
+  32207,
+  32211,
+  32214,
+  32217,
+  32221,
+  32224,
+  32227,
+  32230,
+  32234,
+  32237,
+  32240,
+  32244,
+  32247,
+  32250,
+  32254,
+  32257,
+  32260,
+  32264,
+  32267,
+  32270,
+  32274,
+  32277,
+  32280,
+  32284,
+  32287,
+  32290,
+  32294,
+  32297,
+  32300,
+  32304,
+  32307,
+  32310,
+  32314,
+  32317,
+  32320,
+  32323,
+  32327,
+  32330,
+  32333,
+  32337,
+  32340,
+  32343,
+  32347,
+  32350,
+  32353,
+  32357,
+  32360,
+  32363,
+  32367,
+  32370,
+  32373,
+  32377,
+  32380,
+  32383,
+  32387,
+  32390,
+  32393,
+  32397,
+  32400,
+  32403,
+  32407,
+  32410,
+  32413,
+  32417,
+  32420,
+  32423,
+  32426,
+  32430,
+  32433,
+  32436,
+  32440,
+  32443,
+  32446,
+  32450,
+  32453,
+  32456,
+  32460,
+  32463,
+  32466,
+  32470,
+  32473,
+  32476,
+  32480,
+  32483,
+  32486,
+  32490,
+  32493,
+  32496,
+  32500,
+  32503,
+  32506,
+  32510,
+  32513,
+  32516,
+  32519,
+  32523,
+  32526,
+  32529,
+  32533,
+  32536,
+  32539,
+  32543,
+  32546,
+  32549,
+  32553,
+  32556,
+  32559,
+  32563,
+  32566,
+  32569,
+  32573,
+  32576,
+  32579,
+  32583,
+  32586,
+  32589,
+  32593,
+  32596,
+  32599,
+  32603,
+  32606,
+  32609,
+  32612,
+  32616,
+  32619,
+  32622,
+  32626,
+  32629,
+  32632,
+  32636,
+  32639,
+  32642,
+  32646,
+  32649,
+  32652,
+  32656,
+  32659,
+  32662,
+  32666,
+  32669,
+  32672,
+  32676,
+  32679,
+  32682,
+  32686,
+  32689,
+  32692,
+  32696,
+  32699,
+  32702,
+  32706,
+  32709,
+  32712,
+  32715,
+  32719,
+  32722,
+  32725,
+  32729,
+  32732,
+  32735,
+  32739,
+  32742,
+  32745,
+  32749,
+  32752,
+  32755,
+  32759,
+  32762,
+  32765,
+  32769,
+  32772,
+  32775,
+  32779,
+  32782,
+  32785,
+  32789,
+  32792,
+  32795,
+  32799,
+  32802,
+  32805,
+  32808,
+  32812,
+  32815,
+  32818,
+  32822,
+  32825,
+  32828,
+  32832,
+  32835,
+  32838,
+  32842,
+  32845,
+  32848,
+  32852,
+  32855,
+  32858,
+  32862,
+  32865,
+  32868,
+  32872,
+  32875,
+  32878,
+  32882,
+};
+
+static const UINT256 multipliers1_binary80[] =
+  { {{12415850090107640902ull, 14557465677128539270ull,
+      4938398379086257084ull, 5255184001115807319ull}},
+{{6296440575779775320ull, 18196832096410674088ull,
+  1561311955430433451ull, 6568980001394759149ull}},
+{{7870550719724719149ull, 18134354102085954706ull,
+  6563325962715429718ull, 8211225001743448936ull}},
+{{9530780218255337373ull, 6722285295376333787ull,
+  4102078726697143574ull, 5132015626089655585ull}},
+{{7301789254391783812ull, 17626228656075193042ull,
+  9739284426798817371ull, 6415019532612069481ull}},
+{{18350608604844505572ull, 17421099801666603398ull,
+  16785791551925909618ull, 8018774415765086851ull}},
+{{6857444359600428079ull, 15499873394469015028ull,
+  8185276710739999559ull, 5011734009853179282ull}},
+{{8571805449500535098ull, 14763155724658880881ull,
+  1008223851570223641ull, 6264667512316474103ull}},
+{{15326442830303056777ull, 4618886600541437389ull,
+  15095337869744943264ull, 7830834390395592628ull}},
+{{11884869778153104438ull, 2886804125338398368ull,
+  211214131735813732ull, 4894271493997245393ull}},
+{{14856087222691380547ull, 3608505156672997960ull,
+  4875703683097155069ull, 6117839367496556741ull}},
+{{123364954654674068ull, 9122317464268635355ull,
+  10706315622298831740ull, 7647299209370695926ull}},
+{{16218004161155028957ull, 14924820452022672904ull,
+  2079761245509381933ull, 4779562005856684954ull}},
+{{1825761127734234580ull, 4820967509746177419ull,
+  11823073593741503225ull, 5974452507320856192ull}},
+{{16117259464949956936ull, 10637895405610109677ull,
+  14778841992176879031ull, 7468065634151070240ull}},
+{{12379130174807417037ull, 13566213656147400404ull,
+  9236776245110549394ull, 4667541021344418900ull}},
+{{15473912718509271297ull, 7734395033329474697ull,
+  11545970306388186743ull, 5834426276680523625ull}},
+{{5507332842854425409ull, 5056307773234455468ull, 597404827703069717ull,
+  7293032845850654532ull}},
+{{6884166053568031761ull, 10932070734970457239ull,
+  746756034628837146ull, 9116291057313318165ull}},
+{{11220132811121101707ull, 11444230227783923678ull,
+  2772565530856717168ull, 5697681910820823853ull}},
+{{4801793977046601325ull, 14305287784729904598ull,
+  8077392931998284364ull, 7122102388526029816ull}},
+{{15225614508163027464ull, 17881609730912380747ull,
+  10096741164997855455ull, 8902627985657537270ull}},
+{{7210166058388198213ull, 18093535109461319823ull,
+  1698777209696271755ull, 5564142491035960794ull}},
+{{4401021554557859863ull, 18005232868399261875ull,
+  11346843548975115502ull, 6955178113794950992ull}},
+{{889590924769936924ull, 13283169048644301536ull,
+  14183554436218894378ull, 8693972642243688740ull}},
+{{555994327981210578ull, 12913666673830076364ull,
+  18088093559491584794ull, 5433732901402305462ull}},
+{{694992909976513222ull, 6918711305432819647ull,
+  13386744912509705185ull, 6792166126752881828ull}},
+{{14703799192752805239ull, 13260075150218412462ull,
+  16733431140637131481ull, 8490207658441102285ull}},
+{{4578188477043115371ull, 1370017941245425933ull,
+  12764237472111901128ull, 5306379786525688928ull}},
+{{10334421614731282117ull, 1712522426556782416ull,
+  15955296840139876410ull, 6632974733157111160ull}},
+{{12918027018414102647ull, 11364025070050753828ull,
+  1497376976465293896ull, 8291218416446388951ull}},
+{{17297138923363589962ull, 7102515668781721142ull,
+  7853389637931890541ull, 5182011510278993094ull}},
+{{12398051617349711645ull, 13489830604404539332ull,
+  593365010560087368ull, 6477514387848741368ull}},
+{{15497564521687139556ull, 16862288255505674165ull,
+  741706263200109210ull, 8096892984810926710ull}},
+{{11991820835268156175ull, 15150616178118434257ull,
+  14298624469782231968ull, 5060558115506829193ull}},
+{{1154717988803031506ull, 491526148938491206ull, 4038222531945626249ull,
+  6325697644383536492ull}},
+{{10666769522858565191ull, 5226093704600501911ull,
+  5047778164932032811ull, 7907122055479420615ull}},
+{{13584259979427685100ull, 960465556161619742ull,
+  10072390380723602363ull, 4941951284674637884ull}},
+{{7756952937429830567ull, 15035640000484188390ull,
+  12590487975904502953ull, 6177439105843297355ull}},
+{{472819134932512401ull, 4959491945323071776ull,
+  11126423951453240788ull, 7721798882304121694ull}},
+{{295511959332820251ull, 12323054502681695668ull,
+  2342328951230887588ull, 4826124301440076059ull}},
+{{369389949166025313ull, 15403818128352119585ull,
+  16762969244320773197ull, 6032655376800095073ull}},
+{{5073423454884919546ull, 5419714605157985769ull,
+  7118653500118802785ull, 7540819221000118842ull}},
+{{14700104705371544476ull, 14916536674292210865ull,
+  9060844456001639644ull, 4713012013125074276ull}},
+{{4540072826432266883ull, 198926769155711966ull,
+  11326055570002049556ull, 5891265016406342845ull}},
+{{14898463069895109412ull, 248658461444639957ull, 322511407220398233ull,
+  7364081270507928557ull}},
+{{4788020782086723053ull, 4922509095233187851ull,
+  5014825277452885695ull, 9205101588134910696ull}},
+{{686669979590507956ull, 9994097212161824263ull, 3134265798408053559ull,
+  5753188492584319185ull}},
+{{14693395529770298657ull, 7880935496774892424ull,
+  8529518266437454853ull, 7191485615730398981ull}},
+{{18366744412212873321ull, 14462855389396003434ull,
+  15273583851474206470ull, 8989357019662998726ull}},
+{{16090901276060433730ull, 4427598599945114242ull,
+  4934303888743991140ull, 5618348137289374204ull}},
+{{10890254558220766354ull, 5534498249931392803ull,
+  6167879860929988925ull, 7022935171611717755ull}},
+{{9001132179348570039ull, 11529808830841628908ull,
+  3098163807735098252ull, 8778668964514647194ull}},
+{{14849079648947632082ull, 16429502556130793875ull,
+  6548038398261824311ull, 5486668102821654496ull}},
+{{13949663542757152199ull, 15925192176736104440ull,
+  8185047997827280389ull, 6858335128527068120ull}},
+{{17437079428446440248ull, 6071432165637966838ull,
+  10231309997284100487ull, 8572918910658835150ull}},
+{{6286488624351637251ull, 10712174131164811130ull,
+  1782882729875174900ull, 5358074319161771969ull}},
+{{17081482817294322372ull, 13390217663956013912ull,
+  6840289430771356529ull, 6697592898952214961ull}},
+{{2905109447908351349ull, 2902714024662853679ull,
+  13162047806891583566ull, 8371991123690268701ull}},
+{{8733222432583801449ull, 15649254320696447261ull,
+  10532122888520933680ull, 5232494452306417938ull}},
+{{15528214059157139716ull, 1114823827161007460ull,
+  3941781573796391293ull, 6540618065383022423ull}},
+{{963523500236873028ull, 6005215802378647230ull, 315540948818101212ull,
+  8175772581728778029ull}},
+{{14437260242930209355ull, 12976631913341430326ull,
+  2503056102225007209ull, 5109857863580486268ull}},
+{{8823203266807985885ull, 2385731836394624196ull,
+  3128820127781259012ull, 6387322329475607835ull}},
+{{11029004083509982357ull, 2982164795493280245ull,
+  17746083215008737477ull, 7984152911844509793ull}},
+{{9198970561407432925ull, 4169696006396994105ull,
+  4173772981739379067ull, 4990095569902818621ull}},
+{{16110399220186679060ull, 600433989568854727ull,
+  9828902245601611738ull, 6237619462378523276ull}},
+{{15526313006805960921ull, 9973914523815844217ull,
+  12286127807002014672ull, 7797024327973154095ull}},
+{{2786416601612643720ull, 6233696577384902636ull,
+  14596358907017341026ull, 4873140204983221309ull}},
+{{3483020752015804650ull, 17015492758585904103ull,
+  4410390578489512570ull, 6091425256229026637ull}},
+{{18188833995301919524ull, 12045993911377604320ull,
+  10124674241539278617ull, 7614281570286283296ull}},
+{{11368021247063699703ull, 611217166969920844ull,
+  6327921400962049136ull, 4758925981428927060ull}},
+{{14210026558829624628ull, 764021458712401055ull,
+  7909901751202561420ull, 5948657476786158825ull}},
+{{13150847180109642881ull, 955026823390501319ull,
+  14499063207430589679ull, 7435821845982698531ull}},
+{{15136808515209608657ull, 7514420792260145180ull,
+  6756071495430424597ull, 4647388653739186582ull}},
+{{474266570302459205ull, 14004712008752569380ull,
+  17668461406142806554ull, 5809235817173983227ull}},
+{{592833212878074006ull, 8282517974085935917ull,
+  17473890739251120289ull, 7261544771467479034ull}},
+{{5352727534524980412ull, 14964833486034807800ull,
+  12618991387209124553ull, 9076930964334348793ull}},
+{{3345454709078112758ull, 2435491901130673019ull, 969340589364620990ull,
+  5673081852708967996ull}},
+{{18016876441629804659ull, 12267736913268117081ull,
+  1211675736705776237ull, 7091352315886209995ull}},
+{{8686037496755092111ull, 1499613086302982640ull,
+  15349652726164384009ull, 8864190394857762493ull}},
+{{5428773435471932570ull, 12466473225007833910ull,
+  11899375963066433957ull, 5540118996786101558ull}},
+{{16009338831194691520ull, 1748033475977628675ull,
+  5650847916978266639ull, 6925148745982626948ull}},
+{{15399987520565976496ull, 16020099900254199556ull,
+  7063559896222833298ull, 8656435932478283685ull}},
+{{401620163498959502ull, 14624248456086262627ull,
+  6720567944352964763ull, 5410272457798927303ull}},
+{{14337083259655863090ull, 13668624551680440379ull,
+  3789023912013818050ull, 6762840572248659129ull}},
+{{13309668056142440958ull, 7862408652745774666ull,
+  9347965908444660467ull, 8453550715310823911ull}},
+{{12930228553516413503ull, 2608162398752415214ull,
+  12760007720418994648ull, 5283469197069264944ull}},
+{{6939413655040741070ull, 3260202998440519018ull,
+  15950009650523743310ull, 6604336496336581180ull}},
+{{17897639105655702146ull, 13298625784905424580ull,
+  1490767989445127521ull, 8255420620420726476ull}},
+{{1962652404180038033ull, 1394112087924808507ull,
+  10155102030257980509ull, 5159637887762954047ull}},
+{{16288373560507211254ull, 6354326128333398537ull,
+  8082191519395087732ull, 6449547359703692559ull}},
+{{6525408895351850355ull, 7942907660416748172ull,
+  5491053380816471761ull, 8061934199629615699ull}},
+{{13301752596449682280ull, 16493532333828937367ull,
+  1126065353796600898ull, 5038708874768509812ull}},
+{{12015504727134714946ull, 11393543380431395901ull,
+  1407581692245751123ull, 6298386093460637265ull}},
+{{1184322853636229970ull, 9630243207111856973ull,
+  6371163133734576808ull, 7872982616825796581ull}},
+{{3046044792736337684ull, 6018902004444910608ull,
+  6287819967797804457ull, 4920614135516122863ull}},
+{{3807555990920422104ull, 12135313523983526164ull,
+  3248088941319867667ull, 6150767669395153579ull}},
+{{4759444988650527630ull, 10557455886552019801ull,
+  17895169231931998296ull, 7688459586743941973ull}},
+{{14503868163975049529ull, 6598409929095012375ull,
+  13490323779171192887ull, 4805287241714963733ull}},
+{{13518149186541424007ull, 3636326392941377565ull,
+  3027846668681827397ull, 6006609052143704667ull}},
+{{3062628427894616297ull, 9157094009604109861ull,
+  17619866391134447958ull, 7508261315179630833ull}},
+{{4219985776647829138ull, 1111497737575180759ull,
+  4094887466817948118ull, 4692663321987269271ull}},
+{{663296202382398518ull, 10612744208823751757ull, 506923315095047243ull,
+  5865829152484086589ull}},
+{{5440806271405386052ull, 8654244242602301792ull,
+  5245340162296196958ull, 7332286440605108236ull}},
+{{6801007839256732564ull, 1594433266398101432ull,
+  6556675202870246198ull, 9165358050756385295ull}},
+{{4250629899535457853ull, 14831578846780977107ull,
+  11015451029434985729ull, 5728348781722740809ull}},
+{{701601355991934412ull, 4704415503194057672ull,
+  18380999805221120066ull, 7160435977153426011ull}},
+{{877001694989918015ull, 15103891415847347898ull,
+  18364563738099012178ull, 8950544971441782514ull}},
+{{5159812077796086663ull, 14051618153331980340ull,
+  16089538354739270515ull, 5594090607151114071ull}},
+{{6449765097245108329ull, 12952836673237587521ull,
+  15500236924996700240ull, 6992613258938892589ull}},
+{{12673892389983773315ull, 16191045841546984401ull,
+  5540238100963711588ull, 8740766573673615737ull}},
+{{1003653716098776466ull, 896031614112089443ull,
+  14991863859170789503ull, 5462979108546009835ull}},
+{{15089625200405634295ull, 14955097572922275515ull,
+  14128143805536098974ull, 6828723885682512294ull}},
+{{14250345482079654964ull, 9470499929298068586ull,
+  8436807720065347910ull, 8535904857103140368ull}},
+{{13518151944727172257ull, 1307376437383904962ull,
+  5273004825040842444ull, 5334940535689462730ull}},
+{{7674317894054189513ull, 1634220546729881203ull,
+  15814628068155828863ull, 6668675669611828412ull}},
+{{4981211349140348987ull, 15877833738694515216ull,
+  1321541011485234462ull, 8335844587014785516ull}},
+{{3113257093212718117ull, 5311960068256684106ull,
+  10049335169033047347ull, 5209902866884240947ull}},
+{{13114943403370673454ull, 2028264066893467228ull,
+  7949982942863921280ull, 6512378583605301184ull}},
+{{16393679254213341818ull, 2535330083616834035ull,
+  9937478678579901600ull, 8140473229506626480ull}},
+{{7940206524669644684ull, 1584581302260521272ull,
+  6210924174112438500ull, 5087795768441641550ull}},
+{{9925258155837055855ull, 1980726627825651590ull,
+  16987027254495323933ull, 6359744710552051937ull}},
+{{3183200657941544011ull, 7087594303209452392ull,
+  7398726012836991204ull, 7949680888190064922ull}},
+{{1989500411213465007ull, 13653118476360683553ull,
+  9235889776450507406ull, 4968550555118790576ull}},
+{{7098561532444219163ull, 7843026058596078633ull,
+  11544862220563134258ull, 6210688193898488220ull}},
+{{13484887933982661857ull, 580410536390322483ull,
+  14431077775703917823ull, 7763360242373110275ull}},
+{{6122211949525469709ull, 7280285612885033408ull,
+  6713580600601254687ull, 4852100151483193922ull}},
+{{7652764936906837136ull, 4488670997678903856ull,
+  17615347787606344167ull, 6065125189353992402ull}},
+{{9565956171133546420ull, 999152728671241916ull,
+  12795812697653154401ull, 7581406486692490503ull}},
+{{15202094643813242321ull, 12153685501487995957ull,
+  14914911963674303356ull, 4738379054182806564ull}},
+{{5167560249484389189ull, 15192106876859994947ull,
+  196895880883327579ull, 5922973817728508206ull}},
+{{1847764293428098582ull, 14378447577647605780ull,
+  9469491887958935282ull, 7403717272160635257ull}},
+{{10378224720247337422ull, 13598215754457141516ull,
+  17447647476042804311ull, 4627323295100397035ull}},
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+  18122663549660756504ull, 8129066595831417061ull}},
+{{11087507829586354744ull, 10111648023750710902ull,
+  13632507727751666767ull, 5080666622394635663ull}},
+{{4636012750128167622ull, 8027874011261000724ull,
+  12428948641262195555ull, 6350833277993294579ull}},
+{{5795015937660209527ull, 5423156495648863001ull,
+  10924499783150356540ull, 7938541597491618224ull}},
+{{15151100007106100715ull, 12612844846635315183ull,
+  6827812364468972837ull, 4961588498432261390ull}},
+{{14327188990455237989ull, 1930998003011980267ull,
+  17758137492440991855ull, 6201985623040326737ull}},
+{{13297300219641659582ull, 16248805559047139046ull,
+  8362613810269076106ull, 7752482028800408422ull}},
+{{3699126618848649335ull, 14767189492831849808ull,
+  614947612990784662ull, 4845301268000255264ull}}
+};
+
+static const UINT256 multipliers2_binary80[] =
+  { {{6207925045053820451ull, 7278732838564269635ull,
+      11692571226397904350ull, 2627592000557903659ull}},
+{{3148220287889887660ull, 18321788085060112852ull,
+  10004028014569992533ull, 3284490000697379574ull}},
+{{3935275359862359575ull, 9067177051042977353ull,
+  3281662981357714859ull, 4105612500871724468ull}},
+{{13988762145982444495ull, 3361142647688166893ull,
+  11274411400203347595ull, 2566007813044827792ull}},
+{{3650894627195891906ull, 18036486364892372329ull,
+  14093014250254184493ull, 3207509766306034740ull}},
+{{9175304302422252786ull, 8710549900833301699ull,
+  17616267812817730617ull, 4009387207882543425ull}},
+{{3428722179800214040ull, 16973308734089283322ull,
+  4092638355369999779ull, 2505867004926589641ull}},
+{{13509274761605043357ull, 16604949899184216248ull,
+  9727483962639887628ull, 3132333756158237051ull}},
+{{16886593452006304197ull, 2309443300270718694ull,
+  7547668934872471632ull, 3915417195197796314ull}},
+{{5942434889076552219ull, 1443402062669199184ull,
+  9328979102722682674ull, 2447135746998622696ull}},
+{{7428043611345690274ull, 11027624615191274788ull,
+  11661223878403353342ull, 3058919683748278370ull}},
+{{9285054514182112842ull, 4561158732134317677ull,
+  5353157811149415870ull, 3823649604685347963ull}},
+{{8109002080577514479ull, 16685782262866112260ull,
+  1039880622754690966ull, 2389781002928342477ull}},
+{{10136252600721893098ull, 11633855791727864517ull,
+  5911536796870751612ull, 2987226253660428096ull}},
+{{17282001769329754276ull, 14542319739659830646ull,
+  7389420996088439515ull, 3734032817075535120ull}},
+{{6189565087403708519ull, 6783106828073700202ull,
+  4618388122555274697ull, 2333770510672209450ull}},
+{{16960328396109411457ull, 13090569553519513156ull,
+  14996357190048869179ull, 2917213138340261812ull}},
+{{2753666421427212705ull, 11751525923472003542ull,
+  298702413851534858ull, 3646516422925327266ull}},
+{{12665455063638791689ull, 5466035367485228619ull,
+  9596750054169194381ull, 4558145528656659082ull}},
+{{5610066405560550854ull, 5722115113891961839ull,
+  10609654802283134392ull, 2848840955410411926ull}},
+{{2400896988523300663ull, 7152643892364952299ull,
+  4038696465999142182ull, 3561051194263014908ull}},
+{{16836179290936289540ull, 18164176902310966181ull,
+  5048370582498927727ull, 4451313992828768635ull}},
+{{12828455066048874915ull, 18270139591585435719ull,
+  849388604848135877ull, 2782071245517980397ull}},
+{{11423882814133705740ull, 9002616434199630937ull,
+  5673421774487557751ull, 3477589056897475496ull}},
+{{444795462384968462ull, 6641584524322150768ull, 7091777218109447189ull,
+  4346986321121844370ull}},
+{{277997163990605289ull, 6456833336915038182ull, 9044046779745792397ull,
+  2716866450701152731ull}},
+{{9570868491843032419ull, 12682727689571185631ull,
+  6693372456254852592ull, 3396083063376440914ull}},
+{{7351899596376402620ull, 15853409611963982039ull,
+  17590087607173341548ull, 4245103829220551142ull}},
+{{11512466275376333494ull, 685008970622712966ull,
+  6382118736055950564ull, 2653189893262844464ull}},
+{{5167210807365641059ull, 856261213278391208ull, 7977648420069938205ull,
+  3316487366578555580ull}},
+{{6459013509207051324ull, 5682012535025376914ull,
+  9972060525087422756ull, 4145609208223194475ull}},
+{{8648569461681794981ull, 12774629871245636379ull,
+  3926694818965945270ull, 2591005755139496547ull}},
+{{6199025808674855823ull, 6744915302202269666ull, 296682505280043684ull,
+  3238757193924370684ull}},
+{{16972154297698345586ull, 8431144127752837082ull,
+  370853131600054605ull, 4048446492405463355ull}},
+{{15219282454488853896ull, 7575308089059217128ull,
+  16372684271745891792ull, 2530279057753414596ull}},
+{{577358994401515753ull, 9469135111324021411ull, 2019111265972813124ull,
+  3162848822191768246ull}},
+{{14556756798284058404ull, 11836418889155026763ull,
+  11747261119320792213ull, 3953561027739710307ull}},
+{{6792129989713842550ull, 9703604814935585679ull,
+  5036195190361801181ull, 2470975642337318942ull}},
+{{3878476468714915284ull, 16741192037096870003ull,
+  15518616024807027284ull, 3088719552921648677ull}},
+{{236409567466256201ull, 2479745972661535888ull, 5563211975726620394ull,
+  3860899441152060847ull}},
+{{147755979666410126ull, 6161527251340847834ull,
+  10394536512470219602ull, 2413062150720038029ull}},
+{{9408067011437788465ull, 16925281101030835600ull,
+  17604856659015162406ull, 3016327688400047536ull}},
+{{11760083764297235581ull, 11933229339433768692ull,
+  3559326750059401392ull, 3770409610500059421ull}},
+{{16573424389540548046ull, 7458268337146105432ull,
+  4530422228000819822ull, 2356506006562537138ull}},
+{{2270036413216133442ull, 99463384577855983ull, 14886399821855800586ull,
+  2945632508203171422ull}},
+{{16672603571802330514ull, 9347701267577095786ull,
+  9384627740464974924ull, 3682040635253964278ull}},
+{{11617382427898137335ull, 11684626584471369733ull,
+  2507412638726442847ull, 4602550794067455348ull}},
+{{9566707026650029786ull, 14220420642935687939ull,
+  10790504936058802587ull, 2876594246292159592ull}},
+{{7346697764885149329ull, 13163839785242222020ull,
+  13488131170073503234ull, 3595742807865199490ull}},
+{{9183372206106436661ull, 7231427694698001717ull,
+  7636791925737103235ull, 4494678509831499363ull}},
+{{8045450638030216865ull, 2213799299972557121ull,
+  2467151944371995570ull, 2809174068644687102ull}},
+{{14668499315965158985ull, 11990621161820472209ull,
+  12307311967319770270ull, 3511467585805858877ull}},
+{{4500566089674285020ull, 5764904415420814454ull,
+  1549081903867549126ull, 4389334482257323597ull}},
+{{16647911861328591849ull, 17438123314920172745ull,
+  3274019199130912155ull, 2743334051410827248ull}},
+{{6974831771378576100ull, 17185968125222828028ull,
+  4092523998913640194ull, 3429167564263534060ull}},
+{{8718539714223220124ull, 12259088119673759227ull,
+  5115654998642050243ull, 4286459455329417575ull}},
+{{3143244312175818626ull, 5356087065582405565ull,
+  10114813401792363258ull, 2679037159580885984ull}},
+{{8540741408647161186ull, 15918480868832782764ull,
+  12643516752240454072ull, 3348796449476107480ull}},
+{{10675926760808951483ull, 1451357012331426839ull,
+  15804395940300567591ull, 4185995561845134350ull}},
+{{13589983253146676533ull, 7824627160348223630ull,
+  5266061444260466840ull, 2616247226153208969ull}},
+{{7764107029578569858ull, 9780783950435279538ull,
+  11194262823752971454ull, 3270309032691511211ull}},
+{{481761750118436514ull, 3002607901189323615ull, 9381142511263826414ull,
+  4087886290864389014ull}},
+{{7218630121465104678ull, 15711687993525490971ull,
+  1251528051112503604ull, 2554928931790243134ull}},
+{{4411601633403992943ull, 1192865918197312098ull,
+  10787782100745405314ull, 3193661164737803917ull}},
+{{14737874078609766987ull, 10714454434601415930ull,
+  18096413644359144546ull, 3992076455922254896ull}},
+{{13822857317558492271ull, 11308220040053272860ull,
+  11310258527724465341ull, 2495047784951409310ull}},
+{{17278571646948115338ull, 300216994784427363ull,
+  4914451122800805869ull, 3118809731189261638ull}},
+{{16986528540257756269ull, 4986957261907922108ull,
+  15366435940355783144ull, 3898512163986577047ull}},
+{{1393208300806321860ull, 3116848288692451318ull,
+  16521551490363446321ull, 2436570102491610654ull}},
+{{10964882412862678133ull, 8507746379292952051ull,
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+{{9094416997650959762ull, 15246368992543577968ull,
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+{{5684010623531849852ull, 305608583484960422ull, 3163960700481024568ull,
+  2379462990714463530ull}},
+{{16328385316269588122ull, 382010729356200527ull,
+  13178322912456056518ull, 2974328738393079412ull}},
+{{15798795626909597249ull, 9700885448550026467ull,
+  16472903640570070647ull, 3717910922991349265ull}},
+{{7568404257604804329ull, 12980582432984848398ull,
+  3378035747715212298ull, 2323694326869593291ull}},
+{{237133285151229603ull, 7002356004376284690ull,
+  18057602739926179085ull, 2904617908586991613ull}},
+{{9519788643293812811ull, 13364631023897743766ull,
+  8736945369625560144ull, 3630772385733739517ull}},
+{{2676363767262490206ull, 16705788779872179708ull,
+  15532867730459338084ull, 4538465482167174396ull}},
+{{10896099391393832187ull, 1217745950565336509ull,
+  484670294682310495ull, 2836540926354483998ull}},
+{{18231810257669678138ull, 15357240493488834348ull,
+  9829209905207663926ull, 3545676157943104997ull}},
+{{4343018748377546056ull, 9973178580006267128ull,
+  16898198399936967812ull, 4432095197428881246ull}},
+{{2714386717735966285ull, 15456608649358692763ull,
+  5949687981533216978ull, 2770059498393050779ull}},
+{{17228041452452121568ull, 10097388774843590145ull,
+  2825423958489133319ull, 3462574372991313474ull}},
+{{7699993760282988248ull, 8010049950127099778ull,
+  12755151984966192457ull, 4328217966239141842ull}},
+{{9424182118604255559ull, 16535496264897907121ull,
+  12583656009031258189ull, 2705136228899463651ull}},
+{{16391913666682707353ull, 6834312275840220189ull,
+  11117883992861684833ull, 3381420286124329564ull}},
+{{6654834028071220479ull, 13154576363227663141ull,
+  13897354991077106041ull, 4226775357655411955ull}},
+{{6465114276758206752ull, 1304081199376207607ull,
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+{{3469706827520370535ull, 1630101499220259509ull,
+  7975004825261871655ull, 3302168248168290590ull}},
+{{8948819552827851073ull, 15872684929307488098ull,
+  745383994722563760ull, 4127710310210363238ull}},
+{{10204698238944794825ull, 9920428080817180061ull,
+  14300923051983766062ull, 2579818943881477023ull}},
+{{17367558817108381435ull, 3177163064166699268ull,
+  13264467796552319674ull, 3224773679851846279ull}},
+{{3262704447675925178ull, 13194825867063149894ull,
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+{{14865332608113044642ull, 13265638574371282244ull,
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+{{134921686431754186ull, 7358676181109326998ull, 6970832580036200290ull,
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+{{13286405774037780823ull, 10612887991627651604ull,
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+{{5410117942696772518ull, 3299467935572504726ull,
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+{{17216381769467646536ull, 15897225515014979165ull,
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+{{7685419156552394458ull, 6036473838486560245ull,
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+{{12261093351573941489ull, 6471454735200454977ull,
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+{{1491308634185263149ull, 8089318419000568722ull,
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+{{5543753914793177372ull, 14279196048730131259ull,
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+{{2318006375064083811ull, 13237309042485276170ull,
+  15437846357485873585ull, 3175416638996647289ull}},
+{{12120880005684880572ull, 2711578247824431500ull,
+  5462249891575178270ull, 3969270798745809112ull}},
+{{16798922040407826166ull, 15529794460172433399ull,
+  3413906182234486418ull, 2480794249216130695ull}},
+{{16386966532082394803ull, 10188871038360765941ull,
+  18102440783075271735ull, 3100992811520163368ull}},
+{{6648650109820829791ull, 8124402779523569523ull,
+  4181306905134538053ull, 3876241014400204211ull}},
+{{1849563309424324668ull, 7383594746415924904ull, 307473806495392331ull,
+  2422650634000127632ull}}
+};
+
+#endif // matches #if __ENABLE_BINARY80__
+
+// **********************************************************************
+
+static const UINT128 breakpoints_binary128[] =
+  { {{2195700805160846264ull, 1755099732929698ull}},
+{{9135258273612497656ull, 1404079786343758ull}},
+{{10927064423038085928ull, 2246527658150013ull}},
+{{16120349167914289388ull, 1797222126520010ull}},
+{{12896279334331431512ull, 1437777701216008ull}},
+{{17695721096948965856ull, 1150222160972806ull}},
+{{2487712051924973104ull, 1840355457556491ull}},
+{{16747564900507619776ull, 1472284366045192ull}},
+{{6019354290922275176ull, 1177827492836154ull}},
+{{17009664494959460928ull, 1884523988537846ull}},
+{{9918382781225658420ull, 1507619190830277ull}},
+{{556008595496706088ull, 1206095352664222ull}},
+{{4578962567536640064ull, 1929752564262755ull}},
+{{3663170054029312052ull, 1543802051410204ull}},
+{{6619884857965359964ull, 1235041641128163ull}},
+{{6902466958002665620ull, 1976066625805061ull}},
+{{1832624751660222172ull, 1580853300644049ull}},
+{{5155448616070088060ull, 1264682640515239ull}},
+{{15627415415195961544ull, 2023492224824382ull}},
+{{5123234702672948588ull, 1618793779859506ull}},
+{{409238947396448548ull, 1295035023887605ull}},
+{{654782315834317676ull, 2072056038220168ull}},
+{{7902523482151274788ull, 1657644830576134ull}},
+{{10011367600462930152ull, 1326115864460907ull}},
+{{1260792901773046952ull, 2121785383137452ull}},
+{{12076680765644168532ull, 1697428306509961ull}},
+{{5971995797773424504ull, 1357942645207969ull}},
+{{16933890905921299852ull, 2172708232332750ull}},
+{{13547112724737039880ull, 1738166585866200ull}},
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+{{15513921364784793796ull, 1458079812752989ull}},
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+{{9226419306785923236ull, 1377117447418713ull}},
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+{{13143545366429380048ull, 1892695807812599ull}},
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+{{6411950518705186428ull, 1240397124608065ull}},
+{{10259120829928298284ull, 1984635399372904ull}},
+{{11896645478684548952ull, 1587708319498323ull}},
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+{{18341529795303011324ull, 2130986033697630ull}},
+{{14673223836242409060ull, 1704788826958104ull}},
+{{15427927883735837572ull, 1363831061566483ull}},
+{{2548591725525878176ull, 2182129698506374ull}},
+{{5728222195162612864ull, 1745703758805099ull}},
+{{8271926570872000612ull, 1396563007044079ull}},
+{{2167036069169470012ull, 2234500811270527ull}},
+{{12801675299561306980ull, 1787600649016421ull}},
+{{6551991424907135260ull, 1430080519213137ull}},
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+{{3942788353025615184ull, 1450273942844185ull}},
+{{3154230682420492148ull, 1160219154275348ull}},
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+{{13519236089218522956ull, 1827058209770009ull}},
+{{14504737686116728688ull, 1461646567816007ull}},
+{{4225092519409562304ull, 1169317254252806ull}},
+{{17828194475281030656ull, 1870907606804489ull}},
+{{17951904394966734848ull, 1496726085443591ull}},
+{{10672174701231477556ull, 1197380868354873ull}},
+{{13386130707228453764ull, 1915809389367797ull}},
+{{3330206936298942364ull, 1532647511494238ull}},
+{{10042863178522974540ull, 1226118009195390ull}},
+{{16068581085636759264ull, 1961788814712624ull}},
+{{16544213683251317732ull, 1569431051770099ull}},
+{{16924719761342964508ull, 1255544841416079ull}},
+{{16011505173923012248ull, 2008871746265727ull}},
+{{5430506509654589152ull, 1607097397012582ull}},
+{{15412451651949402288ull, 1285677917610065ull}},
+{{6213178569409492048ull, 2057084668176105ull}},
+{{4970542855527593640ull, 1645667734540884ull}},
+{{7665783099163985232ull, 1316534187632707ull}},
+{{15954601773404286696ull, 2106454700212331ull}},
+{{9074332603981519036ull, 1685163760169865ull}},
+{{7259466083185215228ull, 1348131008135892ull}},
+{{15304494547838254688ull, 2157009613017427ull}},
+{{4864898008786783104ull, 1725607690413942ull}},
+{{14959964851255157452ull, 1380486152331153ull}},
+{{1799850873556789984ull, 2208777843729846ull}},
+{{16197275957813073280ull, 1767022274983876ull}},
+{{9268471951508548300ull, 1413617819987101ull}},
+{{3725428746464928316ull, 1130894255989681ull}},
+{{17028732438569616280ull, 1809430809583489ull}},
+{{17312334765597603344ull, 1447544647666791ull}},
+{{10160518997736172352ull, 1158035718133433ull}},
+{{12567481581635965444ull, 1852857149013493ull}},
+{{17432682894792593000ull, 1482285719210794ull}},
+{{17635495130575984724ull, 1185828575368635ull}},
+{{9770048135212023940ull, 1897325720589817ull}},
+{{437340878685798508ull, 1517860576471854ull}},
+{{4039221517690549128ull, 1214288461177483ull}},
+{{2773405613562968284ull, 1942861537883973ull}},
+{{9597422120334195272ull, 1554289230307178ull}},
+{{15056635325751176864ull, 1243431384245742ull}},
+{{9333221262234241692ull, 1989490214793188ull}},
+{{14845274639271214000ull, 1591592171834550ull}},
+{{11876219711416971200ull, 1273273737467640ull}},
+{{555207464557602304ull, 2037237979948225ull}},
+{{444165971646081840ull, 1629790383958580ull}},
+{{355332777316865472ull, 1303832307166864ull}},
+{{7947230073190805404ull, 2086131691466982ull}},
+{{17425830502778375292ull, 1668905353173585ull}},
+{{13940664402222700232ull, 1335124282538868ull}},
+{{168970155104858436ull, 2136198852062190ull}},
+{{135176124083886748ull, 1708959081649752ull}},
+{{11176187343492840368ull, 1367167265319801ull}},
+{{10503202120104723944ull, 2187467624511682ull}},
+{{1023864066599958508ull, 1749974099609346ull}},
+{{15576486512247608100ull, 1399979279687476ull}},
+{{17543680790112352312ull, 2239966847499962ull}},
+{{6656247002606061204ull, 1791973477999970ull}},
+{{5324997602084848964ull, 1433578782399976ull}},
+{{570649266925968848ull, 1146863025919981ull}},
+{{11981085271307281124ull, 1834980841471969ull}},
+{{13274217031787735224ull, 1467984673177575ull}},
+{{10619373625430188176ull, 1174387738542060ull}},
+{{16990997800688301084ull, 1879020381667296ull}},
+{{9903449425808730544ull, 1503216305333837ull}},
+{{544061911163163788ull, 1202573044267070ull}},
+{{870499057861062064ull, 1924116870827312ull}},
+{{11764445690514580620ull, 1539293496661849ull}},
+{{13100905367153574820ull, 1231434797329479ull}},
+{{9893402143219988740ull, 1970295675727167ull}},
+{{536024085092170348ull, 1576236540581734ull}},
+{{4118168082815646600ull, 1260989232465387ull}},
+{{10278417747246944884ull, 2017582771944619ull}},
+{{11912083012539466232ull, 1614066217555695ull}},
+{{9529666410031572984ull, 1291252974044556ull}},
+{{7868768626566696128ull, 2066004758471290ull}},
+{{6295014901253356904ull, 1652803806777032ull}},
+{{16104058365228416492ull, 1322243045421625ull}},
+{{7319749310655914772ull, 2115588872674601ull}},
+{{2166450633782821492ull, 1692471098139681ull}},
+{{16490555765993898488ull, 1353976878511744ull}},
+{{15316842781364506612ull, 2166363005618791ull}},
+{{8564125410349694964ull, 1733090404495033ull}},
+{{14229997957763576620ull, 1386472323596026ull}},
+{{15389299102937901944ull, 2218355717753642ull}},
+{{4932741652866500908ull, 1774684574202914ull}},
+{{7635542137035111048ull, 1419747659362331ull}},
+{{2419084894886178516ull, 1135798127489865ull}},
+{{3870535831817885628ull, 1817277003983784ull}},
+{{6785777480196218824ull, 1453821603187027ull}},
+{{16496668428382706028ull, 1163057282549621ull}},
+{{569227782218957384ull, 1860891652079395ull}},
+{{455382225775165908ull, 1488713321663516ull}},
+{{15121701039587774020ull, 1190970657330812ull}},
+{{9437326404372797136ull, 1905553051729300ull}},
+{{7549861123498237708ull, 1524442441383440ull}},
+{{6039888898798590168ull, 1219553953106752ull}},
+{{13353171052819654592ull, 1951286324970803ull}},
+{{18061234471739544320ull, 1561029059976642ull}},
+{{7070289947907814808ull, 1248823247981314ull}},
+{{244417472426772728ull, 1998117196770103ull}},
+{{7574231607425238828ull, 1598493757416082ull}},
+{{17127431730165922032ull, 1278795005932865ull}},
+{{8957146694555923636ull, 2046072009492585ull}},
+{{7165717355644738908ull, 1636857607594068ull}},
+{{13111271513999611772ull, 1309486086075254ull}},
+{{9909987978173647868ull, 2095177737720407ull}},
+{{549292753055097648ull, 1676142190176326ull}},
+{{15196829461411719408ull, 1340913752141060ull}},
+{{5868183064549199440ull, 2145462003425697ull}},
+{{15762592895865090520ull, 1716369602740557ull}},
+{{5231376687208251772ull, 1373095682192446ull}},
+{{991505070049382188ull, 2196953091507914ull}},
+{{4482552870781416072ull, 1757562473206331ull}},
+{{18343437555592774152ull, 1406049978565064ull}},
+{{18281453644722707672ull, 2249679965704103ull}},
+{{3557116471552435168ull, 1799743972563283ull}},
+{{10224390806725768780ull, 1439795178050626ull}},
+{{4490163830638704700ull, 1151836142440501ull}},
+{{18252308573247658492ull, 1842937827904801ull}},
+{{10912498043856216468ull, 1474350262323841ull}},
+{{5040649620343062852ull, 1179480209859073ull}},
+{{4375690577806990240ull, 1887168335774517ull}},
+{{14568598906471323164ull, 1509734668619613ull}},
+{{586832680951327560ull, 1207787734895691ull}},
+{{12006978733747855068ull, 1932460375833105ull}},
+{{9605582986998284052ull, 1545968300666484ull}},
+{{11373815204340537564ull, 1236774640533187ull}},
+{{3440709067977218812ull, 1978839424853100ull}},
+{{2752567254381775048ull, 1583071539882480ull}},
+{{2202053803505420040ull, 1266457231905984ull}},
+{{10901983715092492712ull, 2026331571049574ull}},
+{{12410935786815904492ull, 1621065256839659ull}},
+{{13618097444194633916ull, 1296852205471727ull}},
+{{7031560651743772972ull, 2074963528754764ull}},
+{{9314597336136928700ull, 1659970823003811ull}},
+{{3762329054167632636ull, 1327976658403049ull}},
+{{13398424116152032868ull, 2124762653444878ull}},
+{{18097436922405446940ull, 1699810122755902ull}},
+{{7099251908440536904ull, 1359848098204722ull}},
+{{15048151868246769372ull, 2175756957127555ull}},
+{{12038521494597415500ull, 1740605565702044ull}},
+{{13320166010419842720ull, 1392484452561635ull}},
+{{2865521542962196740ull, 2227975124098617ull}},
+{{13360463678595488360ull, 1782380099278893ull}},
+{{18067068572360211336ull, 1425904079423114ull}},
+{{18143003672630079392ull, 1140723263538491ull}},
+{{3203364173014754764ull, 1825157221661587ull}},
+{{13630737782637534780ull, 1460125777329269ull}},
+{{14593939040851938148ull, 1168100621863415ull}},
+{{4903558391653549420ull, 1868960994981465ull}},
+{{3922846713322839536ull, 1495168795985172ull}},
+{{14206323814884002596ull, 1196135036788137ull}},
+{{7972722844846762864ull, 1913816058861020ull}},
+{{6378178275877410292ull, 1531052847088816ull}},
+{{1413193805960017908ull, 1224842277671053ull}},
+{{17018505348503669948ull, 1959747644273684ull}},
+{{17304153093544846284ull, 1567798115418947ull}},
+{{6464624845352056380ull, 1254238492335158ull}},
+{{6654050937821379884ull, 2006781587736253ull}},
+{{12701938379740924552ull, 1605425270189002ull}},
+{{2782853074308918996ull, 1284340216151202ull}},
+{{8141913733636180720ull, 2054944345841923ull}},
+{{13892228616392765220ull, 1643955476673538ull}},
+{{45736448888481208ull, 1315164381338831ull}},
+{{11141224762447300900ull, 2104263010142129ull}},
+{{12602328624699751044ull, 1683410408113703ull}},
+{{17460560529243621480ull, 1346728326490962ull}},
+{{13179501587822153080ull, 2154765322385540ull}},
+{{10543601270257722464ull, 1723812257908432ull}},
+{{1056183386722357324ull, 1379049806326746ull}},
+{{12757939862981502688ull, 2206479690122793ull}},
+{{17585049519869022796ull, 1765183752098234ull}},
+{{17757388430637128560ull, 1412147001678587ull}},
+{{6827213115025882200ull, 1129717601342870ull}},
+{{10923540984041411524ull, 1807548162148592ull}},
+{{1360135157749308572ull, 1446038529718874ull}},
+{{4777456940941357180ull, 1156830823775099ull}},
+{{15022628734989992136ull, 1850929318040158ull}},
+{{950056543766262740ull, 1480743454432127ull}},
+{{11828091679238741160ull, 1184594763545701ull}},
+{{11546249057298165212ull, 1895351621673122ull}},
+{{1858301616354711520ull, 1516281297338498ull}},
+{{8865338922567589864ull, 1213025037870798ull}},
+{{10495193461366233460ull, 1940840060593277ull}},
+{{1017457139609166120ull, 1552672048474622ull}},
+{{11882012155913063864ull, 1242137638779697ull}},
+{{4253824190493260892ull, 1987420222047516ull}},
+{{18160454611362250008ull, 1589936177638012ull}},
+{{7149666059605979360ull, 1271948942110410ull}},
+{{11439465695369566976ull, 2035118307376656ull}},
+{{5462223741553743256ull, 1628094645901325ull}},
+{{4369778993242994604ull, 1302475716721060ull}},
+{{6991646389188791368ull, 2083961146753696ull}},
+{{1903968296609122772ull, 1667168917402957ull}},
+{{12591221081513029188ull, 1333735133922365ull}},
+{{1699209656711295084ull, 2133976214275785ull}},
+{{1359367725369036068ull, 1707180971420628ull}},
+{{8466191809779049500ull, 1365744777136502ull}},
+{{17235255710388389524ull, 2185191643418403ull}},
+{{2720158124084980648ull, 1748153314734723ull}},
+{{9554824128751805164ull, 1398522651787778ull}},
+{{11598369791260977940ull, 2237636242860445ull}},
+{{9278695833008782352ull, 1790108994288356ull}},
+{{3733607851665115560ull, 1432087195430685ull}},
+{{2986886281332092448ull, 1145669756344548ull}},
+{{1089669235389437592ull, 1833071610151277ull}},
+{{11939781832537281044ull, 1466457288121021ull}},
+{{5862476651287914512ull, 1173165830496817ull}},
+{{13069311456802573544ull, 1877065328794907ull}},
+{{3076751535958238188ull, 1501652263035926ull}},
+{{17218796487734231840ull, 1201321810428740ull}},
+{{9103330306665219332ull, 1922114896685985ull}},
+{{7282664245332175464ull, 1537691917348788ull}},
+{{13204829025749561020ull, 1230153533879030ull}},
+{{2680982367489746016ull, 1968245654206449ull}},
+{{5834134708733707136ull, 1574596523365159ull}},
+{{8356656581728876032ull, 1259677218692127ull}},
+{{17059999345508111972ull, 2015483549907403ull}},
+{{2579953032180758608ull, 1612386839925923ull}},
+{{9442660055228427532ull, 1289909471940738ull}},
+{{11418907273623573732ull, 2063855155105181ull}},
+{{5445777004156948660ull, 1651084124084145ull}},
+{{4356621603325558928ull, 1320867299267316ull}},
+{{18038641009546625256ull, 2113387678827705ull}},
+{{14430912807637300204ull, 1690710143062164ull}},
+{{15234079060851750488ull, 1352568114449731ull}},
+{{16995828867878980132ull, 2164108983119570ull}},
+{{13596663094303184104ull, 1731287186495656ull}},
+{{7187981660700636960ull, 1385029749196525ull}},
+{{11500770657121019140ull, 2216047598714440ull}},
+{{9200616525696815312ull, 1772838078971552ull}},
+{{18428539664783183216ull, 1418270463177241ull}},
+{{11053482917084636252ull, 1134616370541793ull}},
+{{13996223852593507680ull, 1815386192866869ull}},
+{{14886327896816716464ull, 1452308954293495ull}},
+{{11909062317453373172ull, 1161847163434796ull}},
+{{11675802078441576432ull, 1858955461495674ull}},
+{{13029990477495171468ull, 1487164369196539ull}},
+{{14113341196738047496ull, 1189731495357231ull}},
+{{15202648285297055348ull, 1903570392571570ull}},
+{{12162118628237644280ull, 1522856314057256ull}},
+{{6040346087848205100ull, 1218285051245805ull}},
+{{9664553740557128160ull, 1949256081993288ull}},
+{{15110340621929523176ull, 1559404865594630ull}},
+{{12088272497543618540ull, 1247523892475704ull}},
+{{8273189551844058696ull, 1996038227961127ull}},
+{{17686598085700977924ull, 1596830582368901ull}},
+{{10459929653818872016ull, 1277464465895121ull}},
+{{9357189816626374580ull, 2043943145432194ull}},
+{{11175100668043009988ull, 1635154516345755ull}},
+{{8940080534434407988ull, 1308123613076604ull}},
+{{3236082410869321816ull, 2092997780922567ull}},
+{{13656912372921188420ull, 1674398224738053ull}},
+{{18304227527820771384ull, 1339518579790442ull}},
+{{14529368785545592920ull, 2143229727664708ull}}
+};
+
+static const int exponents_binary128[] = { -115,
+  -112,
+  -108,
+  -105,
+  -102,
+  -99,
+  -95,
+  -92,
+  -89,
+  -85,
+  -82,
+  -79,
+  -75,
+  -72,
+  -69,
+  -65,
+  -62,
+  -59,
+  -55,
+  -52,
+  -49,
+  -45,
+  -42,
+  -39,
+  -35,
+  -32,
+  -29,
+  -25,
+  -22,
+  -19,
+  -15,
+  -12,
+  -9,
+  -6,
+  -2,
+  1,
+  4,
+  8,
+  11,
+  14,
+  18,
+  21,
+  24,
+  28,
+  31,
+  34,
+  38,
+  41,
+  44,
+  48,
+  51,
+  54,
+  58,
+  61,
+  64,
+  68,
+  71,
+  74,
+  78,
+  81,
+  84,
+  87,
+  91,
+  94,
+  97,
+  101,
+  104,
+  107,
+  111,
+  114,
+  117,
+  121,
+  124,
+  127,
+  131,
+  134,
+  137,
+  141,
+  144,
+  147,
+  151,
+  154,
+  157,
+  161,
+  164,
+  167,
+  171,
+  174,
+  177,
+  181,
+  184,
+  187,
+  190,
+  194,
+  197,
+  200,
+  204,
+  207,
+  210,
+  214,
+  217,
+  220,
+  224,
+  227,
+  230,
+  234,
+  237,
+  240,
+  244,
+  247,
+  250,
+  254,
+  257,
+  260,
+  264,
+  267,
+  270,
+  274,
+  277,
+  280,
+  283,
+  287,
+  290,
+  293,
+  297,
+  300,
+  303,
+  307,
+  310,
+  313,
+  317,
+  320,
+  323,
+  327,
+  330,
+  333,
+  337,
+  340,
+  343,
+  347,
+  350,
+  353,
+  357,
+  360,
+  363,
+  367,
+  370,
+  373,
+  377,
+  380,
+  383,
+  386,
+  390,
+  393,
+  396,
+  400,
+  403,
+  406,
+  410,
+  413,
+  416,
+  420,
+  423,
+  426,
+  430,
+  433,
+  436,
+  440,
+  443,
+  446,
+  450,
+  453,
+  456,
+  460,
+  463,
+  466,
+  470,
+  473,
+  476,
+  479,
+  483,
+  486,
+  489,
+  493,
+  496,
+  499,
+  503,
+  506,
+  509,
+  513,
+  516,
+  519,
+  523,
+  526,
+  529,
+  533,
+  536,
+  539,
+  543,
+  546,
+  549,
+  553,
+  556,
+  559,
+  563,
+  566,
+  569,
+  572,
+  576,
+  579,
+  582,
+  586,
+  589,
+  592,
+  596,
+  599,
+  602,
+  606,
+  609,
+  612,
+  616,
+  619,
+  622,
+  626,
+  629,
+  632,
+  636,
+  639,
+  642,
+  646,
+  649,
+  652,
+  656,
+  659,
+  662,
+  666,
+  669,
+  672,
+  675,
+  679,
+  682,
+  685,
+  689,
+  692,
+  695,
+  699,
+  702,
+  705,
+  709,
+  712,
+  715,
+  719,
+  722,
+  725,
+  729,
+  732,
+  735,
+  739,
+  742,
+  745,
+  749,
+  752,
+  755,
+  759,
+  762,
+  765,
+  768,
+  772,
+  775,
+  778,
+  782,
+  785,
+  788,
+  792,
+  795,
+  798,
+  802,
+  805,
+  808,
+  812,
+  815,
+  818,
+  822,
+  825,
+  828,
+  832,
+  835,
+  838,
+  842,
+  845,
+  848,
+  852,
+  855,
+  858,
+  862,
+  865,
+  868,
+  871,
+  875,
+  878,
+  881,
+  885,
+  888,
+  891,
+  895,
+  898,
+  901,
+  905,
+  908,
+  911,
+  915,
+  918,
+  921,
+  925,
+  928,
+  931,
+  935,
+  938,
+  941,
+  945,
+  948,
+  951,
+  955,
+  958,
+  961,
+  964,
+  968,
+  971,
+  974,
+  978,
+  981,
+  984,
+  988,
+  991,
+  994,
+  998,
+  1001,
+  1004,
+  1008,
+  1011,
+  1014,
+  1018,
+  1021,
+  1024,
+  1028,
+  1031,
+  1034,
+  1038,
+  1041,
+  1044,
+  1048,
+  1051,
+  1054,
+  1058,
+  1061,
+  1064,
+  1067,
+  1071,
+  1074,
+  1077,
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+  32134,
+  32137,
+  32141,
+  32144,
+  32147,
+  32151,
+  32154,
+  32157,
+  32161,
+  32164,
+  32167,
+  32171,
+  32174,
+  32177,
+  32181,
+  32184,
+  32187,
+  32191,
+  32194,
+  32197,
+  32201,
+  32204,
+  32207,
+  32211,
+  32214,
+  32217,
+  32221,
+  32224,
+  32227,
+  32230,
+  32234,
+  32237,
+  32240,
+  32244,
+  32247,
+  32250,
+  32254,
+  32257,
+  32260,
+  32264,
+  32267,
+  32270,
+  32274,
+  32277,
+  32280,
+  32284,
+  32287,
+  32290,
+  32294,
+  32297,
+  32300,
+  32304,
+  32307,
+  32310,
+  32314,
+  32317,
+  32320,
+  32323,
+  32327,
+  32330,
+  32333,
+  32337,
+  32340,
+  32343,
+  32347,
+  32350,
+  32353,
+  32357,
+  32360,
+  32363,
+  32367,
+  32370,
+  32373,
+  32377,
+  32380,
+  32383,
+  32387,
+  32390,
+  32393,
+  32397,
+  32400,
+  32403,
+  32407,
+  32410,
+  32413,
+  32417,
+  32420,
+  32423,
+  32426,
+  32430,
+  32433,
+  32436,
+  32440,
+  32443,
+  32446,
+  32450,
+  32453,
+  32456,
+  32460,
+  32463,
+  32466,
+  32470,
+  32473,
+  32476,
+  32480,
+  32483,
+  32486,
+  32490,
+  32493,
+  32496,
+  32500,
+  32503,
+  32506,
+  32510,
+  32513,
+  32516,
+  32519,
+  32523,
+  32526,
+  32529,
+  32533,
+  32536,
+  32539,
+  32543,
+  32546,
+  32549,
+  32553,
+  32556,
+  32559,
+  32563,
+  32566,
+  32569,
+  32573,
+  32576,
+  32579,
+  32583,
+  32586,
+  32589,
+  32593,
+  32596,
+  32599,
+  32603,
+  32606,
+  32609,
+  32612,
+  32616,
+  32619,
+  32622,
+  32626,
+  32629,
+  32632,
+  32636,
+  32639,
+  32642,
+  32646,
+  32649,
+  32652,
+  32656,
+  32659,
+  32662,
+  32666,
+  32669,
+  32672,
+  32676,
+  32679,
+  32682,
+  32686,
+  32689,
+  32692,
+  32696,
+  32699,
+  32702,
+  32706,
+  32709,
+  32712,
+  32715,
+  32719,
+  32722,
+  32725,
+  32729,
+  32732,
+  32735,
+  32739,
+  32742,
+  32745,
+  32749,
+  32752,
+  32755,
+  32759,
+  32762,
+  32765,
+  32769,
+  32772,
+  32775,
+  32779,
+  32782,
+  32785,
+  32789,
+  32792,
+  32795,
+  32799,
+  32802,
+  32805,
+  32808,
+  32812,
+  32815,
+  32818,
+  32822,
+  32825,
+  32828,
+  32832,
+  32835,
+  32838,
+  32842,
+  32845,
+  32848,
+  32852,
+  32855,
+  32858,
+  32862,
+  32865,
+  32868,
+  32872,
+  32875,
+  32878,
+  32882,
+};
+
+static const UINT256 multipliers1_binary128[] =
+  { {{15420861665977618167ull, 8795339322986628986ull,
+      11692172791063221495ull, 5916811177297135519ull}},
+{{10052705045617246901ull, 6382488135305898329ull,
+  10003529970401638965ull, 7396013971621419399ull}},
+{{17812155699579249073ull, 6294898093779880407ull,
+  13169735259142106209ull, 4622508732263387124ull}},
+{{17653508606046673438ull, 12480308635652238413ull,
+  16462169073927632761ull, 5778135915329233905ull}},
+{{8231827702276178085ull, 1765327739283134305ull,
+  6742653287127377240ull, 7222669894161542382ull}},
+{{14901470646272610510ull, 2206659674103917881ull,
+  17651688645763997358ull, 9028337367701927977ull}},
+{{2395890126279299713ull, 15214220351597112388ull,
+  4114776375961416492ull, 5642710854813704986ull}},
+{{2994862657849124641ull, 571031365786838869ull,
+  14366842506806546424ull, 7053388568517131232ull}},
+{{8355264340738793705ull, 713789207233548586ull,
+  17958553133508183030ull, 8816735710646414040ull}},
+{{9833726231389133970ull, 14281176309803131578ull,
+  11224095708442614393ull, 5510459819154008775ull}},
+{{3068785752381641654ull, 4016412331971750761ull,
+  9418433617125880088ull, 6888074773942510969ull}},
+{{8447668208904439972ull, 5020515414964688451ull,
+  16384728039834738014ull, 8610093467428138711ull}},
+{{2973949621351581031ull, 16972880189635093994ull,
+  17157984052537793114ull, 5381308417142586694ull}},
+{{12940809063544252096ull, 11992728200189091684ull,
+  12224108028817465585ull, 6726635521428233368ull}},
+{{16176011329430315120ull, 1155852194954200893ull,
+  15280135036021831982ull, 8408294401785291710ull}},
+{{12415850090107640902ull, 14557465677128539270ull,
+  4938398379086257084ull, 5255184001115807319ull}},
+{{6296440575779775320ull, 18196832096410674088ull,
+  1561311955430433451ull, 6568980001394759149ull}},
+{{7870550719724719149ull, 18134354102085954706ull,
+  6563325962715429718ull, 8211225001743448936ull}},
+{{9530780218255337373ull, 6722285295376333787ull,
+  4102078726697143574ull, 5132015626089655585ull}},
+{{7301789254391783812ull, 17626228656075193042ull,
+  9739284426798817371ull, 6415019532612069481ull}},
+{{18350608604844505572ull, 17421099801666603398ull,
+  16785791551925909618ull, 8018774415765086851ull}},
+{{6857444359600428079ull, 15499873394469015028ull,
+  8185276710739999559ull, 5011734009853179282ull}},
+{{8571805449500535098ull, 14763155724658880881ull,
+  1008223851570223641ull, 6264667512316474103ull}},
+{{15326442830303056777ull, 4618886600541437389ull,
+  15095337869744943264ull, 7830834390395592628ull}},
+{{11884869778153104438ull, 2886804125338398368ull,
+  211214131735813732ull, 4894271493997245393ull}},
+{{14856087222691380547ull, 3608505156672997960ull,
+  4875703683097155069ull, 6117839367496556741ull}},
+{{123364954654674068ull, 9122317464268635355ull,
+  10706315622298831740ull, 7647299209370695926ull}},
+{{16218004161155028957ull, 14924820452022672904ull,
+  2079761245509381933ull, 4779562005856684954ull}},
+{{1825761127734234580ull, 4820967509746177419ull,
+  11823073593741503225ull, 5974452507320856192ull}},
+{{16117259464949956936ull, 10637895405610109677ull,
+  14778841992176879031ull, 7468065634151070240ull}},
+{{12379130174807417037ull, 13566213656147400404ull,
+  9236776245110549394ull, 4667541021344418900ull}},
+{{15473912718509271297ull, 7734395033329474697ull,
+  11545970306388186743ull, 5834426276680523625ull}},
+{{5507332842854425409ull, 5056307773234455468ull, 597404827703069717ull,
+  7293032845850654532ull}},
+{{6884166053568031761ull, 10932070734970457239ull,
+  746756034628837146ull, 9116291057313318165ull}},
+{{11220132811121101707ull, 11444230227783923678ull,
+  2772565530856717168ull, 5697681910820823853ull}},
+{{4801793977046601325ull, 14305287784729904598ull,
+  8077392931998284364ull, 7122102388526029816ull}},
+{{15225614508163027464ull, 17881609730912380747ull,
+  10096741164997855455ull, 8902627985657537270ull}},
+{{7210166058388198213ull, 18093535109461319823ull,
+  1698777209696271755ull, 5564142491035960794ull}},
+{{4401021554557859863ull, 18005232868399261875ull,
+  11346843548975115502ull, 6955178113794950992ull}},
+{{889590924769936924ull, 13283169048644301536ull,
+  14183554436218894378ull, 8693972642243688740ull}},
+{{555994327981210578ull, 12913666673830076364ull,
+  18088093559491584794ull, 5433732901402305462ull}},
+{{694992909976513222ull, 6918711305432819647ull,
+  13386744912509705185ull, 6792166126752881828ull}},
+{{14703799192752805239ull, 13260075150218412462ull,
+  16733431140637131481ull, 8490207658441102285ull}},
+{{4578188477043115371ull, 1370017941245425933ull,
+  12764237472111901128ull, 5306379786525688928ull}},
+{{10334421614731282117ull, 1712522426556782416ull,
+  15955296840139876410ull, 6632974733157111160ull}},
+{{12918027018414102647ull, 11364025070050753828ull,
+  1497376976465293896ull, 8291218416446388951ull}},
+{{17297138923363589962ull, 7102515668781721142ull,
+  7853389637931890541ull, 5182011510278993094ull}},
+{{12398051617349711645ull, 13489830604404539332ull,
+  593365010560087368ull, 6477514387848741368ull}},
+{{15497564521687139556ull, 16862288255505674165ull,
+  741706263200109210ull, 8096892984810926710ull}},
+{{11991820835268156175ull, 15150616178118434257ull,
+  14298624469782231968ull, 5060558115506829193ull}},
+{{1154717988803031506ull, 491526148938491206ull, 4038222531945626249ull,
+  6325697644383536492ull}},
+{{10666769522858565191ull, 5226093704600501911ull,
+  5047778164932032811ull, 7907122055479420615ull}},
+{{13584259979427685100ull, 960465556161619742ull,
+  10072390380723602363ull, 4941951284674637884ull}},
+{{7756952937429830567ull, 15035640000484188390ull,
+  12590487975904502953ull, 6177439105843297355ull}},
+{{472819134932512401ull, 4959491945323071776ull,
+  11126423951453240788ull, 7721798882304121694ull}},
+{{295511959332820251ull, 12323054502681695668ull,
+  2342328951230887588ull, 4826124301440076059ull}},
+{{369389949166025313ull, 15403818128352119585ull,
+  16762969244320773197ull, 6032655376800095073ull}},
+{{5073423454884919546ull, 5419714605157985769ull,
+  7118653500118802785ull, 7540819221000118842ull}},
+{{14700104705371544476ull, 14916536674292210865ull,
+  9060844456001639644ull, 4713012013125074276ull}},
+{{4540072826432266883ull, 198926769155711966ull,
+  11326055570002049556ull, 5891265016406342845ull}},
+{{14898463069895109412ull, 248658461444639957ull, 322511407220398233ull,
+  7364081270507928557ull}},
+{{4788020782086723053ull, 4922509095233187851ull,
+  5014825277452885695ull, 9205101588134910696ull}},
+{{686669979590507956ull, 9994097212161824263ull, 3134265798408053559ull,
+  5753188492584319185ull}},
+{{14693395529770298657ull, 7880935496774892424ull,
+  8529518266437454853ull, 7191485615730398981ull}},
+{{18366744412212873321ull, 14462855389396003434ull,
+  15273583851474206470ull, 8989357019662998726ull}},
+{{16090901276060433730ull, 4427598599945114242ull,
+  4934303888743991140ull, 5618348137289374204ull}},
+{{10890254558220766354ull, 5534498249931392803ull,
+  6167879860929988925ull, 7022935171611717755ull}},
+{{9001132179348570039ull, 11529808830841628908ull,
+  3098163807735098252ull, 8778668964514647194ull}},
+{{14849079648947632082ull, 16429502556130793875ull,
+  6548038398261824311ull, 5486668102821654496ull}},
+{{13949663542757152199ull, 15925192176736104440ull,
+  8185047997827280389ull, 6858335128527068120ull}},
+{{17437079428446440248ull, 6071432165637966838ull,
+  10231309997284100487ull, 8572918910658835150ull}},
+{{6286488624351637251ull, 10712174131164811130ull,
+  1782882729875174900ull, 5358074319161771969ull}},
+{{17081482817294322372ull, 13390217663956013912ull,
+  6840289430771356529ull, 6697592898952214961ull}},
+{{2905109447908351349ull, 2902714024662853679ull,
+  13162047806891583566ull, 8371991123690268701ull}},
+{{8733222432583801449ull, 15649254320696447261ull,
+  10532122888520933680ull, 5232494452306417938ull}},
+{{15528214059157139716ull, 1114823827161007460ull,
+  3941781573796391293ull, 6540618065383022423ull}},
+{{963523500236873028ull, 6005215802378647230ull, 315540948818101212ull,
+  8175772581728778029ull}},
+{{14437260242930209355ull, 12976631913341430326ull,
+  2503056102225007209ull, 5109857863580486268ull}},
+{{8823203266807985885ull, 2385731836394624196ull,
+  3128820127781259012ull, 6387322329475607835ull}},
+{{11029004083509982357ull, 2982164795493280245ull,
+  17746083215008737477ull, 7984152911844509793ull}},
+{{9198970561407432925ull, 4169696006396994105ull,
+  4173772981739379067ull, 4990095569902818621ull}},
+{{16110399220186679060ull, 600433989568854727ull,
+  9828902245601611738ull, 6237619462378523276ull}},
+{{15526313006805960921ull, 9973914523815844217ull,
+  12286127807002014672ull, 7797024327973154095ull}},
+{{2786416601612643720ull, 6233696577384902636ull,
+  14596358907017341026ull, 4873140204983221309ull}},
+{{3483020752015804650ull, 17015492758585904103ull,
+  4410390578489512570ull, 6091425256229026637ull}},
+{{18188833995301919524ull, 12045993911377604320ull,
+  10124674241539278617ull, 7614281570286283296ull}},
+{{11368021247063699703ull, 611217166969920844ull,
+  6327921400962049136ull, 4758925981428927060ull}},
+{{14210026558829624628ull, 764021458712401055ull,
+  7909901751202561420ull, 5948657476786158825ull}},
+{{13150847180109642881ull, 955026823390501319ull,
+  14499063207430589679ull, 7435821845982698531ull}},
+{{15136808515209608657ull, 7514420792260145180ull,
+  6756071495430424597ull, 4647388653739186582ull}},
+{{474266570302459205ull, 14004712008752569380ull,
+  17668461406142806554ull, 5809235817173983227ull}},
+{{592833212878074006ull, 8282517974085935917ull,
+  17473890739251120289ull, 7261544771467479034ull}},
+{{5352727534524980412ull, 14964833486034807800ull,
+  12618991387209124553ull, 9076930964334348793ull}},
+{{3345454709078112758ull, 2435491901130673019ull, 969340589364620990ull,
+  5673081852708967996ull}},
+{{18016876441629804659ull, 12267736913268117081ull,
+  1211675736705776237ull, 7091352315886209995ull}},
+{{8686037496755092111ull, 1499613086302982640ull,
+  15349652726164384009ull, 8864190394857762493ull}},
+{{5428773435471932570ull, 12466473225007833910ull,
+  11899375963066433957ull, 5540118996786101558ull}},
+{{16009338831194691520ull, 1748033475977628675ull,
+  5650847916978266639ull, 6925148745982626948ull}},
+{{15399987520565976496ull, 16020099900254199556ull,
+  7063559896222833298ull, 8656435932478283685ull}},
+{{401620163498959502ull, 14624248456086262627ull,
+  6720567944352964763ull, 5410272457798927303ull}},
+{{14337083259655863090ull, 13668624551680440379ull,
+  3789023912013818050ull, 6762840572248659129ull}},
+{{13309668056142440958ull, 7862408652745774666ull,
+  9347965908444660467ull, 8453550715310823911ull}},
+{{12930228553516413503ull, 2608162398752415214ull,
+  12760007720418994648ull, 5283469197069264944ull}},
+{{6939413655040741070ull, 3260202998440519018ull,
+  15950009650523743310ull, 6604336496336581180ull}},
+{{17897639105655702146ull, 13298625784905424580ull,
+  1490767989445127521ull, 8255420620420726476ull}},
+{{1962652404180038033ull, 1394112087924808507ull,
+  10155102030257980509ull, 5159637887762954047ull}},
+{{16288373560507211254ull, 6354326128333398537ull,
+  8082191519395087732ull, 6449547359703692559ull}},
+{{6525408895351850355ull, 7942907660416748172ull,
+  5491053380816471761ull, 8061934199629615699ull}},
+{{13301752596449682280ull, 16493532333828937367ull,
+  1126065353796600898ull, 5038708874768509812ull}},
+{{12015504727134714946ull, 11393543380431395901ull,
+  1407581692245751123ull, 6298386093460637265ull}},
+{{1184322853636229970ull, 9630243207111856973ull,
+  6371163133734576808ull, 7872982616825796581ull}},
+{{3046044792736337684ull, 6018902004444910608ull,
+  6287819967797804457ull, 4920614135516122863ull}},
+{{3807555990920422104ull, 12135313523983526164ull,
+  3248088941319867667ull, 6150767669395153579ull}},
+{{4759444988650527630ull, 10557455886552019801ull,
+  17895169231931998296ull, 7688459586743941973ull}},
+{{14503868163975049529ull, 6598409929095012375ull,
+  13490323779171192887ull, 4805287241714963733ull}},
+{{13518149186541424007ull, 3636326392941377565ull,
+  3027846668681827397ull, 6006609052143704667ull}},
+{{3062628427894616297ull, 9157094009604109861ull,
+  17619866391134447958ull, 7508261315179630833ull}},
+{{4219985776647829138ull, 1111497737575180759ull,
+  4094887466817948118ull, 4692663321987269271ull}},
+{{663296202382398518ull, 10612744208823751757ull, 506923315095047243ull,
+  5865829152484086589ull}},
+{{5440806271405386052ull, 8654244242602301792ull,
+  5245340162296196958ull, 7332286440605108236ull}},
+{{6801007839256732564ull, 1594433266398101432ull,
+  6556675202870246198ull, 9165358050756385295ull}},
+{{4250629899535457853ull, 14831578846780977107ull,
+  11015451029434985729ull, 5728348781722740809ull}},
+{{701601355991934412ull, 4704415503194057672ull,
+  18380999805221120066ull, 7160435977153426011ull}},
+{{877001694989918015ull, 15103891415847347898ull,
+  18364563738099012178ull, 8950544971441782514ull}},
+{{5159812077796086663ull, 14051618153331980340ull,
+  16089538354739270515ull, 5594090607151114071ull}},
+{{6449765097245108329ull, 12952836673237587521ull,
+  15500236924996700240ull, 6992613258938892589ull}},
+{{12673892389983773315ull, 16191045841546984401ull,
+  5540238100963711588ull, 8740766573673615737ull}},
+{{1003653716098776466ull, 896031614112089443ull,
+  14991863859170789503ull, 5462979108546009835ull}},
+{{15089625200405634295ull, 14955097572922275515ull,
+  14128143805536098974ull, 6828723885682512294ull}},
+{{14250345482079654964ull, 9470499929298068586ull,
+  8436807720065347910ull, 8535904857103140368ull}},
+{{13518151944727172257ull, 1307376437383904962ull,
+  5273004825040842444ull, 5334940535689462730ull}},
+{{7674317894054189513ull, 1634220546729881203ull,
+  15814628068155828863ull, 6668675669611828412ull}},
+{{4981211349140348987ull, 15877833738694515216ull,
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+{{1223562520346494065ull, 9852363118540072253ull,
+  10015369520567701107ull, 7322012258371263258ull}},
+{{6141139168860505485ull, 7703767879747702412ull,
+  3295839863854850576ull, 9152515322964079073ull}},
+{{13061584017392591737ull, 4814854924842314007ull,
+  13589114960977751370ull, 5720322076852549420ull}},
+{{11715294003313351767ull, 15241940692907668317ull,
+  16986393701222189212ull, 7150402596065686775ull}},
+{{809059448859525996ull, 605681792425033781ull, 16621306108100348612ull,
+  8938003245082108469ull}},
+{{2811505164750897700ull, 9601923157120421921ull,
+  12694159326776411834ull, 5586252028176317793ull}},
+{{8126067474366010029ull, 2779031909545751593ull,
+  2032641103188351081ull, 6982815035220397242ull}},
+{{14769270361384900440ull, 8085475905359577395ull,
+  11764173415840214659ull, 8728518794025496552ull}},
+{{6924950966651868823ull, 2747579431636041920ull,
+  7352608384900134162ull, 5455324246265935345ull}},
+{{8656188708314836029ull, 12657846326399828208ull,
+  13802446499552555606ull, 6819155307832419181ull}},
+{{10820235885393545036ull, 6598935871145009452ull,
+  3418000069158530796ull, 8523944134790523977ull}},
+{{15986019465225741455ull, 13347706956320406715ull,
+  13665465089292551507ull, 5327465084244077485ull}},
+{{15370838313104788915ull, 12072947676973120490ull,
+  3246773306333525672ull, 6659331355305096857ull}},
+{{9990175854526210336ull, 15091184596216400613ull,
+  8670152651344294994ull, 8324164194131371071ull}},
+{{8549702918292575412ull, 14043676391062638287ull,
+  12336374434731266227ull, 5202602621332106919ull}},
+{{6075442629438331361ull, 12942909470400909955ull,
+  10808782024986694880ull, 6503253276665133649ull}},
+{{2982617268370526297ull, 16178636838001137444ull,
+  18122663549660756504ull, 8129066595831417061ull}},
+{{11087507829586354744ull, 10111648023750710902ull,
+  13632507727751666767ull, 5080666622394635663ull}},
+{{4636012750128167622ull, 8027874011261000724ull,
+  12428948641262195555ull, 6350833277993294579ull}},
+{{5795015937660209527ull, 5423156495648863001ull,
+  10924499783150356540ull, 7938541597491618224ull}},
+{{15151100007106100715ull, 12612844846635315183ull,
+  6827812364468972837ull, 4961588498432261390ull}},
+{{14327188990455237989ull, 1930998003011980267ull,
+  17758137492440991855ull, 6201985623040326737ull}},
+{{13297300219641659582ull, 16248805559047139046ull,
+  8362613810269076106ull, 7752482028800408422ull}},
+{{3699126618848649335ull, 14767189492831849808ull,
+  614947612990784662ull, 4845301268000255264ull}}
+};
+
+static const UINT256 multipliers2_binary128[] =
+  { {{7710430832988809084ull, 13621041698348090301ull,
+      15069458432386386555ull, 2958405588648567759ull}},
+{{14249724559663399259ull, 12414616104507724972ull,
+  14225137022055595290ull, 3698006985810709699ull}},
+{{18129449886644400345ull, 12370821083744716011ull,
+  6584867629571053104ull, 2311254366131693562ull}},
+{{18050126339878112527ull, 15463526354680895014ull,
+  17454456573818592188ull, 2889067957664616952ull}},
+{{13339285887992864851ull, 882663869641567152ull,
+  3371326643563688620ull, 3611334947080771191ull}},
+{{16674107359991081063ull, 1103329837051958940ull,
+  18049216359736774487ull, 4514168683850963988ull}},
+{{1197945063139649857ull, 7607110175798556194ull,
+  2057388187980708246ull, 2821355427406852493ull}},
+{{10720803365779338129ull, 285515682893419434ull,
+  7183421253403273212ull, 3526694284258565616ull}},
+{{4177632170369396853ull, 356894603616774293ull, 8979276566754091515ull,
+  4408367855323207020ull}},
+{{4916863115694566985ull, 16363960191756341597ull,
+  14835419891076083004ull, 2755229909577004387ull}},
+{{10757764913045596635ull, 2008206165985875380ull,
+  13932588845417715852ull, 3444037386971255484ull}},
+{{13447206141306995794ull, 2510257707482344225ull,
+  17415736056772144815ull, 4305046733714069355ull}},
+{{1486974810675790516ull, 8486440094817546997ull,
+  8578992026268896557ull, 2690654208571293347ull}},
+{{6470404531772126048ull, 15219736136949321650ull,
+  6112054014408732792ull, 3363317760714116684ull}},
+{{17311377701569933368ull, 577926097477100446ull,
+  7640067518010915991ull, 4204147200892645855ull}},
+{{6207925045053820451ull, 7278732838564269635ull,
+  11692571226397904350ull, 2627592000557903659ull}},
+{{3148220287889887660ull, 18321788085060112852ull,
+  10004028014569992533ull, 3284490000697379574ull}},
+{{3935275359862359575ull, 9067177051042977353ull,
+  3281662981357714859ull, 4105612500871724468ull}},
+{{13988762145982444495ull, 3361142647688166893ull,
+  11274411400203347595ull, 2566007813044827792ull}},
+{{3650894627195891906ull, 18036486364892372329ull,
+  14093014250254184493ull, 3207509766306034740ull}},
+{{9175304302422252786ull, 8710549900833301699ull,
+  17616267812817730617ull, 4009387207882543425ull}},
+{{3428722179800214040ull, 16973308734089283322ull,
+  4092638355369999779ull, 2505867004926589641ull}},
+{{13509274761605043357ull, 16604949899184216248ull,
+  9727483962639887628ull, 3132333756158237051ull}},
+{{16886593452006304197ull, 2309443300270718694ull,
+  7547668934872471632ull, 3915417195197796314ull}},
+{{5942434889076552219ull, 1443402062669199184ull,
+  9328979102722682674ull, 2447135746998622696ull}},
+{{7428043611345690274ull, 11027624615191274788ull,
+  11661223878403353342ull, 3058919683748278370ull}},
+{{9285054514182112842ull, 4561158732134317677ull,
+  5353157811149415870ull, 3823649604685347963ull}},
+{{8109002080577514479ull, 16685782262866112260ull,
+  1039880622754690966ull, 2389781002928342477ull}},
+{{10136252600721893098ull, 11633855791727864517ull,
+  5911536796870751612ull, 2987226253660428096ull}},
+{{17282001769329754276ull, 14542319739659830646ull,
+  7389420996088439515ull, 3734032817075535120ull}},
+{{6189565087403708519ull, 6783106828073700202ull,
+  4618388122555274697ull, 2333770510672209450ull}},
+{{16960328396109411457ull, 13090569553519513156ull,
+  14996357190048869179ull, 2917213138340261812ull}},
+{{2753666421427212705ull, 11751525923472003542ull,
+  298702413851534858ull, 3646516422925327266ull}},
+{{12665455063638791689ull, 5466035367485228619ull,
+  9596750054169194381ull, 4558145528656659082ull}},
+{{5610066405560550854ull, 5722115113891961839ull,
+  10609654802283134392ull, 2848840955410411926ull}},
+{{2400896988523300663ull, 7152643892364952299ull,
+  4038696465999142182ull, 3561051194263014908ull}},
+{{16836179290936289540ull, 18164176902310966181ull,
+  5048370582498927727ull, 4451313992828768635ull}},
+{{12828455066048874915ull, 18270139591585435719ull,
+  849388604848135877ull, 2782071245517980397ull}},
+{{11423882814133705740ull, 9002616434199630937ull,
+  5673421774487557751ull, 3477589056897475496ull}},
+{{444795462384968462ull, 6641584524322150768ull, 7091777218109447189ull,
+  4346986321121844370ull}},
+{{277997163990605289ull, 6456833336915038182ull, 9044046779745792397ull,
+  2716866450701152731ull}},
+{{9570868491843032419ull, 12682727689571185631ull,
+  6693372456254852592ull, 3396083063376440914ull}},
+{{7351899596376402620ull, 15853409611963982039ull,
+  17590087607173341548ull, 4245103829220551142ull}},
+{{11512466275376333494ull, 685008970622712966ull,
+  6382118736055950564ull, 2653189893262844464ull}},
+{{5167210807365641059ull, 856261213278391208ull, 7977648420069938205ull,
+  3316487366578555580ull}},
+{{6459013509207051324ull, 5682012535025376914ull,
+  9972060525087422756ull, 4145609208223194475ull}},
+{{8648569461681794981ull, 12774629871245636379ull,
+  3926694818965945270ull, 2591005755139496547ull}},
+{{6199025808674855823ull, 6744915302202269666ull, 296682505280043684ull,
+  3238757193924370684ull}},
+{{16972154297698345586ull, 8431144127752837082ull,
+  370853131600054605ull, 4048446492405463355ull}},
+{{15219282454488853896ull, 7575308089059217128ull,
+  16372684271745891792ull, 2530279057753414596ull}},
+{{577358994401515753ull, 9469135111324021411ull, 2019111265972813124ull,
+  3162848822191768246ull}},
+{{14556756798284058404ull, 11836418889155026763ull,
+  11747261119320792213ull, 3953561027739710307ull}},
+{{6792129989713842550ull, 9703604814935585679ull,
+  5036195190361801181ull, 2470975642337318942ull}},
+{{3878476468714915284ull, 16741192037096870003ull,
+  15518616024807027284ull, 3088719552921648677ull}},
+{{236409567466256201ull, 2479745972661535888ull, 5563211975726620394ull,
+  3860899441152060847ull}},
+{{147755979666410126ull, 6161527251340847834ull,
+  10394536512470219602ull, 2413062150720038029ull}},
+{{9408067011437788465ull, 16925281101030835600ull,
+  17604856659015162406ull, 3016327688400047536ull}},
+{{11760083764297235581ull, 11933229339433768692ull,
+  3559326750059401392ull, 3770409610500059421ull}},
+{{16573424389540548046ull, 7458268337146105432ull,
+  4530422228000819822ull, 2356506006562537138ull}},
+{{2270036413216133442ull, 99463384577855983ull, 14886399821855800586ull,
+  2945632508203171422ull}},
+{{16672603571802330514ull, 9347701267577095786ull,
+  9384627740464974924ull, 3682040635253964278ull}},
+{{11617382427898137335ull, 11684626584471369733ull,
+  2507412638726442847ull, 4602550794067455348ull}},
+{{9566707026650029786ull, 14220420642935687939ull,
+  10790504936058802587ull, 2876594246292159592ull}},
+{{7346697764885149329ull, 13163839785242222020ull,
+  13488131170073503234ull, 3595742807865199490ull}},
+{{9183372206106436661ull, 7231427694698001717ull,
+  7636791925737103235ull, 4494678509831499363ull}},
+{{8045450638030216865ull, 2213799299972557121ull,
+  2467151944371995570ull, 2809174068644687102ull}},
+{{14668499315965158985ull, 11990621161820472209ull,
+  12307311967319770270ull, 3511467585805858877ull}},
+{{4500566089674285020ull, 5764904415420814454ull,
+  1549081903867549126ull, 4389334482257323597ull}},
+{{16647911861328591849ull, 17438123314920172745ull,
+  3274019199130912155ull, 2743334051410827248ull}},
+{{6974831771378576100ull, 17185968125222828028ull,
+  4092523998913640194ull, 3429167564263534060ull}},
+{{8718539714223220124ull, 12259088119673759227ull,
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+{{3143244312175818626ull, 5356087065582405565ull,
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+{{8540741408647161186ull, 15918480868832782764ull,
+  12643516752240454072ull, 3348796449476107480ull}},
+{{10675926760808951483ull, 1451357012331426839ull,
+  15804395940300567591ull, 4185995561845134350ull}},
+{{13589983253146676533ull, 7824627160348223630ull,
+  5266061444260466840ull, 2616247226153208969ull}},
+{{7764107029578569858ull, 9780783950435279538ull,
+  11194262823752971454ull, 3270309032691511211ull}},
+{{481761750118436514ull, 3002607901189323615ull, 9381142511263826414ull,
+  4087886290864389014ull}},
+{{7218630121465104678ull, 15711687993525490971ull,
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+{{4411601633403992943ull, 1192865918197312098ull,
+  10787782100745405314ull, 3193661164737803917ull}},
+{{14737874078609766987ull, 10714454434601415930ull,
+  18096413644359144546ull, 3992076455922254896ull}},
+{{13822857317558492271ull, 11308220040053272860ull,
+  11310258527724465341ull, 2495047784951409310ull}},
+{{17278571646948115338ull, 300216994784427363ull,
+  4914451122800805869ull, 3118809731189261638ull}},
+{{16986528540257756269ull, 4986957261907922108ull,
+  15366435940355783144ull, 3898512163986577047ull}},
+{{1393208300806321860ull, 3116848288692451318ull,
+  16521551490363446321ull, 2436570102491610654ull}},
+{{10964882412862678133ull, 8507746379292952051ull,
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+{{9094416997650959762ull, 15246368992543577968ull,
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+{{5684010623531849852ull, 305608583484960422ull, 3163960700481024568ull,
+  2379462990714463530ull}},
+{{16328385316269588122ull, 382010729356200527ull,
+  13178322912456056518ull, 2974328738393079412ull}},
+{{15798795626909597249ull, 9700885448550026467ull,
+  16472903640570070647ull, 3717910922991349265ull}},
+{{7568404257604804329ull, 12980582432984848398ull,
+  3378035747715212298ull, 2323694326869593291ull}},
+{{237133285151229603ull, 7002356004376284690ull,
+  18057602739926179085ull, 2904617908586991613ull}},
+{{9519788643293812811ull, 13364631023897743766ull,
+  8736945369625560144ull, 3630772385733739517ull}},
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+{{2714386717735966285ull, 15456608649358692763ull,
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+{{17367558817108381435ull, 3177163064166699268ull,
+  13264467796552319674ull, 3224773679851846279ull}},
+{{3262704447675925178ull, 13194825867063149894ull,
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+{{9815533463672890793ull, 4815121603555928486ull,
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+{{350800677995967206ull, 2352207751597028836ull,
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+{{17216381769467646536ull, 15897225515014979165ull,
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+{{12261093351573941489ull, 6471454735200454977ull,
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+{{5543753914793177372ull, 14279196048730131259ull,
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+{{2318006375064083811ull, 13237309042485276170ull,
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+{{12120880005684880572ull, 2711578247824431500ull,
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+{{16798922040407826166ull, 15529794460172433399ull,
+  3413906182234486418ull, 2480794249216130695ull}},
+{{16386966532082394803ull, 10188871038360765941ull,
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+{{6648650109820829791ull, 8124402779523569523ull,
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+{{1849563309424324668ull, 7383594746415924904ull, 307473806495392331ull,
+  2422650634000127632ull}}
+};
+
+// **********************************************************************
+
+static const UINT128 breakpoints_bid32[] = { {{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{11908810229357645280ull, 469708516554766ull}},
+{{5954405114678822640ull, 234854258277383ull}},
+{{12200574594194187128ull, 117427129138691ull}},
+{{15323659333951869372ull, 58713564569345ull}},
+{{2831320374921140396ull, 293567822846729ull}},
+{{10639032224315346006ull, 146783911423364ull}},
+{{5319516112157673003ull, 73391955711682ull}},
+{{8150836487078813399ull, 366959778558411ull}},
+{{13298790280394182507ull, 183479889279205ull}},
+{{15872767177051867061ull, 91739944639602ull}},
+{{5576859590421128845ull, 458699723198014ull}},
+{{2788429795210564422ull, 229349861599007ull}},
+{{10617586934460058019ull, 114674930799503ull}},
+{{14532165504084804817ull, 57337465399751ull}},
+{{17320595299295369240ull, 286687326998758ull}},
+{{8660297649647684620ull, 143343663499379ull}},
+{{13553520861678618118ull, 71671831749689ull}},
+{{12427372087264435742ull, 358359158748448ull}},
+{{6213686043632217871ull, 179179579374224ull}},
+{{3106843021816108935ull, 89589789687112ull}},
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+{{9708884443175340423ull, 279968092772225ull}},
+{{14077814258442446019ull, 139984046386112ull}},
+{{7038907129221223009ull, 69992023193056ull}},
+{{16747791572396563433ull, 349960115965281ull}},
+{{17597267823053057524ull, 174980057982640ull}},
+{{8798633911526528762ull, 87490028991320ull}},
+{{7099681410213540580ull, 437450144956602ull}},
+{{3549840705106770290ull, 218725072478301ull}},
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+{{303983975672290610ull, 427197407184182ull}},
+{{151991987836145305ull, 213598703592091ull}},
+{{9299368030772848460ull, 106799351796045ull}},
+{{9603352006445139071ull, 533996758980227ull}},
+{{14025048040077345343ull, 266998379490113ull}},
+{{16235896056893448479ull, 133499189745056ull}},
+{{8117948028446724239ull, 66749594872528ull}},
+{{3696251994814517967ull, 333747974362642ull}},
+{{1848125997407258983ull, 166873987181321ull}},
+{{10147435035558405299ull, 83436993590660ull}},
+{{13843687030372923267ull, 417184967953302ull}},
+{{6921843515186461633ull, 208592483976651ull}},
+{{12684293794448006624ull, 104296241988325ull}},
+{{8081236751111378276ull, 521481209941628ull}},
+{{4040618375555689138ull, 260740604970814ull}},
+{{2020309187777844569ull, 130370302485407ull}},
+{{10233526630743698092ull, 65185151242703ull}},
+{{14274145006299387230ull, 325925756213517ull}},
+{{16360444540004469423ull, 162962878106758ull}},
+{{8180222270002234711ull, 81481439053379ull}},
+{{4007623202592070326ull, 407407195266897ull}},
+{{11227183638150810971ull, 203703597633448ull}},
+{{5613591819075405485ull, 101851798816724ull}},
+{{9621215021667475812ull, 509258994083621ull}},
+{{14033979547688513714ull, 254629497041810ull}},
+{{7016989773844256857ull, 127314748520905ull}},
+{{12731866923776904236ull, 63657374260452ull}},
+{{8319102397755866334ull, 318286871302263ull}},
+{{13382923235732708975ull, 159143435651131ull}},
+{{15914833654721130295ull, 79571717825565ull}},
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+{{7894826928996089855ull, 132348898008484ull}},
+{{3947413464498044927ull, 66174449004242ull}},
+{{1290323248780673023ull, 330872245021211ull}},
+{{9868533661245112319ull, 165436122510605ull}},
+{{14157638867477331967ull, 82718061255302ull}},
+{{15447962116258004991ull, 413590306276513ull}},
+{{16947353094983778303ull, 206795153138256ull}},
+{{8473676547491889151ull, 103397576569128ull}},
+{{5474894590040342527ull, 516987882845642ull}},
+{{2737447295020171263ull, 258493941422821ull}},
+{{10592095684364861439ull, 129246970711410ull}},
+{{5296047842182430719ull, 64623485355705ull}},
+{{8033495137202601983ull, 323117426778526ull}},
+{{4016747568601300991ull, 161558713389263ull}},
+{{11231745821155426303ull, 80779356694631ull}},
+{{818496884648476671ull, 403896783473158ull}},
+{{409248442324238335ull, 201948391736579ull}},
+{{9427996258016894975ull, 100974195868289ull}},
+{{10246493142665371647ull, 504870979341447ull}},
+{{14346618608187461631ull, 252435489670723ull}},
+{{16396681340948506623ull, 126217744835361ull}},
+{{17421712707329029119ull, 63108872417680ull}},
+{{13321587241806939135ull, 315544362088404ull}},
+{{6660793620903469567ull, 157772181044202ull}},
+{{3330396810451734783ull, 78886090522101ull}},
+{{16651984052258673919ull, 394430452610505ull}},
+{{17549364062984112767ull, 197215226305252ull}},
+{{8774682031492056383ull, 98607613152626ull}},
+{{6979922010041178687ull, 493038065763132ull}},
+{{3489961005020589343ull, 246519032881566ull}},
+{{1744980502510294671ull, 123259516440783ull}},
+{{10095862288109923143ull, 61629758220391ull}},
+{{13585823293130512487ull, 308148791101957ull}},
+{{16016283683420032051ull, 154074395550978ull}},
+{{8008141841710016025ull, 77037197775489ull}},
+{{3147221061130976897ull, 385185988877447ull}},
+{{10796982567420264256ull, 192592994438723ull}},
+{{14621863320564907936ull, 96296497219361ull}},
+{{17769084381695884834ull, 481482486096808ull}},
+{{8884542190847942417ull, 240741243048404ull}},
+{{4442271095423971208ull, 120370621524202ull}},
+{{2221135547711985604ull, 60185310762101ull}},
+{{11105677738559928021ull, 300926553810505ull}},
+{{14776210906134739818ull, 150463276905252ull}},
+{{7388105453067369909ull, 75231638452626ull}},
+{{47039117917746314ull, 376158192263132ull}},
+{{23519558958873157ull, 188079096131566ull}},
+{{11759779479436578ull, 94039548065783ull}},
+{{58798897397182893ull, 470197740328915ull}},
+{{9252771485553367254ull, 235098870164457ull}},
+{{13849757779631459435ull, 117549435082228ull}},
+{{6924878889815729717ull, 58774717541114ull}},
+{{16177650375369096972ull, 293873587705571ull}},
+{{17312197224539324294ull, 146936793852785ull}},
+{{17879470649124437955ull, 73468396926392ull}},
+{{15610376950783983311ull, 367341984631964ull}},
+{{7805188475391991655ull, 183670992315982ull}},
+{{3902594237695995827ull, 91835496157991ull}},
+{{1066227114770427523ull, 459177480789956ull}},
+{{533113557385213761ull, 229588740394978ull}},
+{{266556778692606880ull, 114794370197489ull}},
+{{9356650426201079248ull, 57397185098744ull}},
+{{9889763983586293010ull, 286985925493722ull}},
+{{4944881991793146505ull, 143492962746861ull}},
+{{11695813032751349060ull, 71746481373430ull}},
+{{3138832942628090454ull, 358732406867153ull}},
+{{10792788508168821035ull, 179366203433576ull}},
+{{5396394254084410517ull, 89683101716788ull}},
+{{8535227196712500972ull, 448415508583941ull}},
+{{13490985635211026294ull, 224207754291970ull}},
+{{6745492817605513147ull, 112103877145985ull}},
+{{15280720014318014119ull, 560519385729926ull}},
+{{7640360007159007059ull, 280259692864963ull}},
+{{13043552040434279337ull, 140129846432481ull}},
+{{15745148057071915476ull, 70064923216240ull}},
+{{4938763990521370920ull, 350324616081204ull}},
+{{2469381995260685460ull, 175162308040602ull}},
+{{1234690997630342730ull, 87581154020301ull}},
+{{6173454988151713650ull, 437905770101505ull}},
+{{12310099530930632633ull, 218952885050752ull}},
+{{6155049765465316316ull, 109476442525376ull}},
+{{12328504753617029967ull, 547382212626881ull}},
+{{15387624413663290791ull, 273691106313440ull}},
+{{7693812206831645395ull, 136845553156720ull}},
+{{3846906103415822697ull, 68422776578360ull}},
+{{787786443369561873ull, 342113882891801ull}},
+{{9617265258539556744ull, 171056941445900ull}},
+{{4808632629269778372ull, 85528470722950ull}},
+{{5596419072639340246ull, 427642353614751ull}},
+{{12021581573174445931ull, 213821176807375ull}},
+{{15234162823441998773ull, 106910588403687ull}},
+{{2383837822371787403ull, 534552942018439ull}},
+{{10415290948040669509ull, 267276471009219ull}},
+{{14431017510875110562ull, 133638235504609ull}},
+{{16438880792292331089ull, 66819117752304ull}},
+{{8407427666623448983ull, 334095588761524ull}},
+{{4203713833311724491ull, 167047794380762ull}},
+{{2101856916655862245ull, 83523897190381ull}},
+{{10509284583279311229ull, 417619485951905ull}},
+{{14478014328494431422ull, 208809742975952ull}},
+{{7239007164247215711ull, 104404871487976ull}},
+{{17748291747526526940ull, 522024357439881ull}},
+{{18097517910618039278ull, 261012178719940ull}},
+{{9048758955309019639ull, 130506089359970ull}},
+{{4524379477654509819ull, 65253044679985ull}},
+{{4175153314562997481ull, 326265223399926ull}},
+{{2087576657281498740ull, 163132611699963ull}},
+{{10267160365495525178ull, 81566305849981ull}},
+{{14442313680058522660ull, 407831529249907ull}},
+{{16444528876884037138ull, 203915764624953ull}},
+{{17445636475296794377ull, 101957882312476ull}},
+{{13441206081645765421ull, 509789411562384ull}},
+{{6720603040822882710ull, 254894705781192ull}},
+{{3360301520411441355ull, 127447352890596ull}},
+{{1680150760205720677ull, 63723676445298ull}},
+{{8400753801028603388ull, 318618382226490ull}},
+{{4200376900514301694ull, 159309191113245ull}},
+{{11323560487111926655ull, 79654595556622ull}},
+{{1277570214430978427ull, 398272977783113ull}},
+{{9862157144070265021ull, 199136488891556ull}},
+{{4931078572035132510ull, 99568244445778ull}},
+{{6208648786466110938ull, 497841222228891ull}},
+{{12327696430087831277ull, 248920611114445ull}},
+{{15387220251898691446ull, 124460305557222ull}},
+{{7693610125949345723ull, 62230152778611ull}},
+{{1574562482327625384ull, 311150763893057ull}},
+{{10010653278018588500ull, 155575381946528ull}},
+{{5005326639009294250ull, 77787690973264ull}},
+{{6579889121336919634ull, 388938454866321ull}},
+{{12513316597523235625ull, 194469227433160ull}},
+{{6256658298761617812ull, 97234613716580ull}},
+{{12836547420098537447ull, 486173068582901ull}},
+{{15641645746904044531ull, 243086534291450ull}},
+{{7820822873452022265ull, 121543267145725ull}},
+{{13133783473580786940ull, 60771633572862ull}},
+{{10328685146775279856ull, 303858167864313ull}},
+{{14387714610242415736ull, 151929083932156ull}},
+{{7193857305121207868ull, 75964541966078ull}},
+{{17522542451896487724ull, 379822709830391ull}},
+{{17984643262803019670ull, 189911354915195ull}},
+{{18215693668256285643ull, 94955677457597ull}},
+{{17291492046443221751ull, 474778387287989ull}},
+{{17869118060076386683ull, 237389193643994ull}},
+{{8934559030038193341ull, 118694596821997ull}},
+{{13690651551873872478ull, 59347298410998ull}},
+{{13113025538240707546ull, 296736492054993ull}},
+{{15779884805975129581ull, 148368246027496ull}},
+{{7889942402987564790ull, 74184123013748ull}},
+{{2556223867518720721ull, 370920615068742ull}},
+{{1278111933759360360ull, 185460307534371ull}},
+{{9862428003734455988ull, 92730153767185ull}},
+{{12418651871253176710ull, 463650768835927ull}},
+{{15432697972481364163ull, 231825384417963ull}},
+{{16939721023095457889ull, 115912692208981ull}},
+{{17693232548402504752ull, 57956346104490ull}},
+{{14679186447174317299ull, 289781730522454ull}},
+{{7339593223587158649ull, 144890865261227ull}},
+{{12893168648648355132ull, 72445432630613ull}},
+{{9125611022113120816ull, 362227163153068ull}},
+{{4562805511056560408ull, 181113581576534ull}},
+{{2281402755528280204ull, 90556790788267ull}},
+{{11407013777641401020ull, 452783953941335ull}},
+{{14926878925675476318ull, 226391976970667ull}},
+{{16686811499692513967ull, 113195988485333ull}},
+{{17566777786701032791ull, 56597994242666ull}},
+{{14046912638666957494ull, 282989971213334ull}},
+{{7023456319333478747ull, 141494985606667ull}},
+{{12735100196521515181ull, 70747492803333ull}},
+{{8335268761478921059ull, 353737464016668ull}},
+{{4167634380739460529ull, 176868732008334ull}},
+{{2083817190369730264ull, 88434366004167ull}},
+{{10419085951848651324ull, 442171830020835ull}},
+{{14432915012779101470ull, 221085915010417ull}},
+{{16439829543244326543ull, 110542957505208ull}},
+{{8412171421383426251ull, 552714787526044ull}},
+{{4206085710691713125ull, 276357393763022ull}},
+{{2103042855345856562ull, 138178696881511ull}},
+{{10274893464527704089ull, 69089348440755ull}},
+{{14480979175219417215ull, 345446742203777ull}},
+{{16463861624464484415ull, 172723371101888ull}},
+{{8231930812232242207ull, 86361685550944ull}},
+{{4266165913742107807ull, 431808427754722ull}},
+{{2133082956871053903ull, 215904213877361ull}},
+{{10289913515290302759ull, 107952106938680ull}},
+{{14556079429032410566ull, 539760534693402ull}},
+{{7278039714516205283ull, 269880267346701ull}},
+{{12862391894112878449ull, 134940133673350ull}},
+{{6431195947056439224ull, 67470066836675ull}},
+{{13709235661572644508ull, 337350334183376ull}},
+{{6854617830786322254ull, 168675167091688ull}},
+{{3427308915393161127ull, 84337583545844ull}},
+{{17136544576965805635ull, 421687917729220ull}},
+{{8568272288482902817ull, 210843958864610ull}},
+{{4284136144241451408ull, 105421979432305ull}},
+{{2973936647497705428ull, 527109897161526ull}},
+{{1486968323748852714ull, 263554948580763ull}},
+{{9966856198729202165ull, 131777474290381ull}},
+{{14206800136219376890ull, 65888737145190ull}},
+{{15693768459968229604ull, 329443685725953ull}},
+{{17070256266838890610ull, 164721842862976ull}}
+};
+
+static const int exponents_bid32[] = { -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  0,
+  0,
+  0,
+  0,
+  1,
+  1,
+  1,
+  2,
+  2,
+  2,
+  3,
+  3,
+  3,
+  3,
+  4,
+  4,
+  4,
+  5,
+  5,
+  5,
+  6,
+  6,
+  6,
+  7,
+  7,
+  7,
+  7,
+  8,
+  8,
+  8,
+  9,
+  9,
+  9,
+  10,
+  10,
+  10,
+  10,
+  11,
+  11,
+  11,
+  12,
+  12,
+  12,
+  13,
+  13,
+  13,
+  13,
+  14,
+  14,
+  14,
+  15,
+  15,
+  15,
+  16,
+  16,
+  16,
+  16,
+  17,
+  17,
+  17,
+  18,
+  18,
+  18,
+  19,
+  19,
+  19,
+  19,
+  20,
+  20,
+  20,
+  21,
+  21,
+  21,
+  22,
+  22,
+  22,
+  22,
+  23,
+  23,
+  23,
+  24,
+  24,
+  24,
+  25,
+  25,
+  25,
+  25,
+  26,
+  26,
+  26,
+  27,
+  27,
+  27,
+  28,
+  28,
+  28,
+  28,
+  29,
+  29,
+  29,
+  30,
+  30,
+  30,
+  31,
+  31,
+  31,
+  31,
+  32,
+  32,
+  32,
+  33,
+  33,
+  33,
+  34,
+  34,
+  34,
+  34,
+  35,
+  35,
+  35,
+  36,
+  36,
+  36,
+  37,
+  37,
+  37,
+  38,
+  38,
+  38,
+  38,
+  39,
+  39,
+  39,
+  40,
+  40,
+  40,
+  41,
+  41,
+  41,
+  41,
+  42,
+  42,
+  42,
+  43,
+  43,
+  43,
+  44,
+  44,
+  44,
+  44,
+  45,
+  45,
+  45,
+  46,
+  46,
+  46,
+  47,
+  47,
+  47,
+  47,
+  48,
+  48,
+  48,
+  49,
+  49,
+  49,
+  50,
+  50,
+  50,
+  50,
+  51,
+  51,
+  51,
+  52,
+  52,
+  52,
+  53,
+  53,
+  53,
+  53,
+  54,
+  54,
+  54,
+  55,
+  55,
+  55,
+  56,
+  56,
+  56,
+  56,
+  57,
+  57,
+  57,
+  58,
+  58,
+  58,
+  59,
+  59,
+  59,
+  59,
+  60,
+  60,
+  60,
+  61,
+  61,
+  61,
+  62,
+  62,
+  62,
+  62,
+  63,
+  63,
+  63,
+  64,
+  64,
+  64,
+  65,
+  65,
+  65,
+  66,
+  66,
+  66,
+  66,
+  67,
+  67,
+  67,
+  68,
+  68,
+  68,
+  69,
+  69,
+  69,
+  69,
+  70,
+  70,
+  70,
+  71,
+  71,
+  71,
+  72,
+  72,
+  72,
+  72,
+  73,
+  73,
+  73,
+  74,
+  74,
+  74,
+  75,
+  75,
+  75,
+  75,
+  76,
+  76,
+  76,
+  77,
+  77,
+  77,
+  78,
+  78,
+  78,
+  78,
+  79,
+  79,
+  79,
+  80,
+  80,
+  80,
+  81,
+  81,
+  81,
+  81,
+  82,
+  82,
+  82,
+  83,
+  83,
+  83,
+  84,
+  84,
+  84,
+  84,
+  85,
+  85,
+  85,
+  86,
+  86,
+  86,
+  87,
+  87,
+  87,
+  87,
+  88,
+  88,
+  88,
+  89,
+  89,
+  89,
+  90,
+  90,
+  90,
+  90,
+  91,
+  91,
+  91,
+  92,
+  92,
+  92,
+  93,
+  93,
+  93,
+  93,
+  94,
+  94,
+  94,
+  95,
+  95,
+  95,
+  96,
+  96,
+  96,
+  97,
+  97,
+  97,
+  97,
+  98,
+  98,
+  98,
+  99,
+  99,
+  99,
+  100,
+  100,
+  100,
+  100,
+  101,
+  101,
+  101,
+  102,
+  102,
+  102,
+  103,
+  103,
+  103,
+  103,
+  104,
+  104,
+  104,
+  105,
+  105,
+  105,
+  106,
+  106,
+  106,
+  106,
+  107,
+  107,
+  107,
+  108,
+  108,
+  108,
+  109,
+  109,
+  109,
+  109,
+  110,
+  110,
+  110,
+  111,
+  111,
+  111,
+  112,
+  112,
+  112,
+  112,
+  113,
+  113,
+  113,
+  114,
+  114,
+  114,
+  115,
+  115,
+  115,
+  115,
+  116,
+  116,
+  116,
+  117,
+  117,
+  117,
+  118,
+  118,
+  118,
+  118,
+  119,
+  119,
+  119,
+  120,
+  120,
+  120,
+  121,
+  121,
+  121,
+  121,
+  122,
+  122,
+  122,
+  123,
+  123,
+  123,
+  124,
+  124,
+  124,
+  125,
+  125,
+  125,
+  125,
+  126,
+  126,
+  126,
+  127,
+  127,
+  127,
+  128,
+  128,
+  128,
+  128,
+  129,
+  129,
+  129,
+  130,
+  130,
+  130,
+  131,
+  131,
+  131,
+  131,
+  132,
+  132,
+  132,
+  133,
+  133,
+  133,
+  134,
+  134,
+  134,
+  134,
+  135,
+  135,
+  135,
+  136,
+  136,
+  136,
+  137,
+  137,
+  137,
+  137,
+  138,
+  138,
+  138,
+  139,
+  139,
+  139,
+  140,
+  140,
+  140,
+  140,
+  141,
+  141,
+  141,
+  142,
+  142,
+  142,
+  143,
+  143,
+  143,
+  143,
+  144,
+  144,
+  144,
+  145,
+  145,
+  145,
+  146,
+  146,
+  146,
+  146,
+  147,
+  147,
+  147,
+  148,
+  148,
+  148,
+  149,
+  149,
+  149,
+  149,
+  150,
+  150,
+  150,
+  151,
+  151,
+  151,
+  152,
+  152,
+  152,
+  153,
+  153,
+  153,
+  153,
+  154,
+  154,
+  154,
+  155,
+  155,
+  155,
+  156,
+  156,
+  156,
+  156,
+  157,
+  157,
+  157,
+  158,
+  158,
+  158,
+  159,
+  159,
+  159,
+  159,
+  160,
+  160,
+  160,
+  161,
+  161,
+  161,
+  162,
+  162,
+  162,
+  162,
+  163,
+  163,
+  163,
+  164,
+  164,
+  164,
+  165,
+  165,
+  165,
+  165,
+  166,
+  166,
+  166,
+  167,
+  167,
+  167,
+  168,
+  168,
+  168,
+  168,
+  169,
+  169,
+  169,
+  170,
+  170,
+  170,
+  171,
+  171,
+  171,
+  171,
+  172,
+  172,
+  172,
+  173,
+  173,
+  173,
+  174,
+  174,
+  174,
+  174,
+  175,
+  175,
+  175,
+  176,
+  176,
+  176,
+  177,
+  177,
+  177,
+  177,
+  178,
+  178,
+  178,
+  179,
+  179,
+  179,
+  180,
+  180,
+  180,
+  180,
+  181,
+  181,
+  181,
+  182,
+  182,
+  182,
+  183,
+  183,
+  183,
+  184,
+  184,
+  184,
+  184,
+  185,
+  185,
+  185,
+  186,
+  186,
+  186,
+  187,
+  187,
+  187,
+  187,
+  188,
+  188,
+  188,
+  189,
+  189,
+  189,
+  190,
+  190,
+  190,
+  190,
+  191,
+  191,
+};
+
+static const UINT256 multipliers1_bid32[] = { {{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{8022453891189237964ull, 4305922861044245892ull,
+  15091728617112590342ull, 392727477223ull}},
+{{16044907782378475927ull, 8611845722088491784ull,
+  11736713160515629068ull, 785454954447ull}},
+{{13643071491047400238ull, 17223691444176983569ull,
+  5026682247321706520ull, 1570909908895ull}},
+{{8839398908385248859ull, 16000638814644415523ull,
+  10053364494643413041ull, 3141819817790ull}},
+{{16525275040644691065ull, 6889476577670793427ull,
+  2010672898928682608ull, 628363963558ull}},
+{{14603806007579830513ull, 13778953155341586855ull,
+  4021345797857365216ull, 1256727927116ull}},
+{{10760867941450109410ull, 9111162236973622095ull,
+  8042691595714730433ull, 2513455854232ull}},
+{{2152173588290021882ull, 1822232447394724419ull,
+  8987235948626766733ull, 502691170846ull}},
+{{4304347176580043764ull, 3644464894789448838ull,
+  17974471897253533466ull, 1005382341692ull}},
+{{8608694353160087528ull, 7288929789578897676ull,
+  17502199720797515316ull, 2010764683385ull}},
+{{9100436500115838152ull, 5147134772657689858ull,
+  3500439944159503063ull, 402152936677ull}},
+{{18200873000231676304ull, 10294269545315379716ull,
+  7000879888319006126ull, 804305873354ull}},
+{{17955001926753800992ull, 2141795016921207817ull,
+  14001759776638012253ull, 1608611746708ull}},
+{{17463259779798050368ull, 4283590033842415635ull,
+  9556775479566472890ull, 3217223493417ull}},
+{{10871349585443430720ull, 8235415636252303773ull,
+  9290052725397115224ull, 643444698683ull}},
+{{3295955097177309824ull, 16470831272504607547ull,
+  133361377084678832ull, 1286889397367ull}},
+{{6591910194354619648ull, 14494918471299663478ull,
+  266722754169357665ull, 2573778794734ull}},
+{{8697079668354744576ull, 17656378953227573988ull,
+  14810739809801512825ull, 514755758946ull}},
+{{17394159336709489152ull, 16866013832745596360ull,
+  11174735545893474035ull, 1029511517893ull}},
+{{16341574599709426688ull, 15285283591781641105ull,
+  3902727018077396455ull, 2059023035787ull}},
+{{10647012549425705984ull, 10435754347840148867ull,
+  8159243033099299937ull, 411804607157ull}},
+{{2847281025141860352ull, 2424764621970746119ull,
+  16318486066198599875ull, 823609214314ull}},
+{{5694562050283720704ull, 4849529243941492238ull,
+  14190228058687648134ull, 1647218428629ull}},
+{{4828261224798654464ull, 12037952293014029417ull,
+  17595440870705170919ull, 329443685725ull}},
+{{9656522449597308928ull, 5629160512318507218ull,
+  16744137667700790223ull, 658887371451ull}},
+{{866300825485066240ull, 11258321024637014437ull,
+  15041531261692028830ull, 1317774742903ull}},
+{{1732601650970132480ull, 4069897975564477258ull,
+  11636318449674506045ull, 2635549485807ull}},
+{{346520330194026496ull, 8192677224596716098ull, 9705961319418721855ull,
+  527109897161ull}},
+{{693040660388052992ull, 16385354449193432196ull, 965178565127892094ull,
+  1054219794323ull}},
+{{1386081320776105984ull, 14323964824677312776ull,
+  1930357130255784189ull, 2108439588646ull}},
+{{3966565078897131520ull, 2864792964935462555ull,
+  4075420240793067161ull, 421687917729ull}},
+{{7933130157794263040ull, 5729585929870925110ull,
+  8150840481586134322ull, 843375835458ull}},
+{{15866260315588526080ull, 11459171859741850220ull,
+  16301680963172268644ull, 1686751670916ull}},
+{{3173252063117705216ull, 2291834371948370044ull,
+  6949685007376364052ull, 337350334183ull}},
+{{6346504126235410432ull, 4583668743896740088ull,
+  13899370014752728104ull, 674700668366ull}},
+{{12693008252470820864ull, 9167337487793480176ull,
+  9351995955795904592ull, 1349401336733ull}},
+{{6939272431232090112ull, 18334674975586960353ull,
+  257247837882257568ull, 2698802673467ull}},
+{{12455900930472148992ull, 3666934995117392070ull,
+  7430147197060272160ull, 539760534693ull}},
+{{6465057787234746368ull, 7333869990234784141ull,
+  14860294394120544320ull, 1079521069386ull}},
+{{12930115574469492736ull, 14667739980469568282ull,
+  11273844714531537024ull, 2159042138773ull}},
+{{17343418373861539840ull, 10312245625577734302ull,
+  13322815387132038374ull, 431808427754ull}},
+{{16240092674013528064ull, 2177747177445916989ull,
+  8198886700554525133ull, 863616855509ull}},
+{{14033441274317504512ull, 4355494354891833979ull,
+  16397773401109050266ull, 1727233711018ull}},
+{{13874734699089231872ull, 15628494129946008088ull,
+  14347601124447541022ull, 345446742203ull}},
+{{9302725324468912128ull, 12810244186182464561ull,
+  10248458175185530429ull, 690893484407ull}},
+{{158706575228272640ull, 7173744298655377507ull, 2050172276661509243ull,
+  1381786968815ull}},
+{{317413150456545280ull, 14347488597310755014ull,
+  4100344553323018486ull, 2763573937630ull}},
+{{63482630091309056ull, 6558846534204061326ull, 820068910664603697ull,
+  552714787526ull}},
+{{126965260182618112ull, 13117693068408122652ull,
+  1640137821329207394ull, 1105429575052ull}},
+{{253930520365236224ull, 7788642063106693688ull, 3280275642658414789ull,
+  2210859150104ull}},
+{{3740134918814957568ull, 12625774856847069707ull,
+  15413450387499324250ull, 442171830020ull}},
+{{7480269837629915136ull, 6804805639984587798ull,
+  12380156701289096885ull, 884343660041ull}},
+{{14960539675259830272ull, 13609611279969175596ull,
+  6313569328868642154ull, 1768687320083ull}},
+{{14060154379277697024ull, 10100619885477655765ull,
+  12330760309999459400ull, 353737464016ull}},
+{{9673564684845842432ull, 1754495697245759915ull,
+  6214776546289367185ull, 707474928033ull}},
+{{900385295982133248ull, 3508991394491519831ull,
+  12429553092578734370ull, 1414949856066ull}},
+{{1800770591964266496ull, 7017982788983039662ull,
+  6412362111447917124ull, 2829899712133ull}},
+{{15117549377360494592ull, 8782294187280428578ull,
+  12350518866515314394ull, 565979942426ull}},
+{{11788354681011437568ull, 17564588374560857157ull,
+  6254293659321077172ull, 1131959884853ull}},
+{{5129965288313323520ull, 16682432675412162699ull,
+  12508587318642154345ull, 2263919769706ull}},
+{{1025993057662664704ull, 7025835349824342863ull,
+  6191066278470341192ull, 452783953941ull}},
+{{2051986115325329408ull, 14051670699648685726ull,
+  12382132556940682384ull, 905567907882ull}},
+{{4103972230650658816ull, 9656597325587819836ull,
+  6317521040171813153ull, 1811135815765ull}},
+{{15578189705097773056ull, 12999365909343294936ull,
+  1263504208034362630ull, 362227163153ull}},
+{{12709635336485994496ull, 7551987744977038257ull,
+  2527008416068725261ull, 724454326306ull}},
+{{6972526599262437376ull, 15103975489954076515ull,
+  5054016832137450522ull, 1448908652612ull}},
+{{13945053198524874752ull, 11761206906198601414ull,
+  10108033664274901045ull, 2897817305224ull}},
+{{13857057083930705920ull, 17109636640207361575ull,
+  16779001991822621501ull, 579563461044ull}},
+{{9267370094151860224ull, 15772529206705171535ull,
+  15111259909935691387ull, 1159126922089ull}},
+{{87996114594168832ull, 13098314339700791455ull,
+  11775775746161831159ull, 2318253844179ull}},
+{{11085645667144564736ull, 13687709312165889260ull,
+  17112550408200007524ull, 463650768835ull}},
+{{3724547260579577856ull, 8928674550622226905ull,
+  15778356742690463433ull, 927301537671ull}},
+{{7449094521159155712ull, 17857349101244453810ull,
+  13109969411671375250ull, 1854603075343ull}},
+{{12557865348457562112ull, 14639516264474621731ull,
+  13690040326560006019ull, 370920615068ull}},
+{{6668986623205572608ull, 10832288455239691847ull,
+  8933336579410460423ull, 741841230137ull}},
+{{13337973246411145216ull, 3217832836769832078ull,
+  17866673158820920847ull, 1483682460274ull}},
+{{8229202419112738816ull, 6435665673539664157ull,
+  17286602243932290078ull, 2967364920549ull}},
+{{16403235742790189056ull, 8665830764191753477ull,
+  18214715707754099308ull, 593472984109ull}},
+{{14359727411870826496ull, 17331661528383506955ull,
+  17982687341798647000ull, 1186945968219ull}},
+{{10272710750032101376ull, 16216578983057462295ull,
+  17518630609887742385ull, 2373891936439ull}},
+{{16811937408974061568ull, 18000711055579133751ull,
+  18261121380945189769ull, 474778387287ull}},
+{{15177130744238571520ull, 17554678037448715887ull,
+  18075498688180827923ull, 949556774575ull}},
+{{11907517414767591424ull, 16662612001187880159ull,
+  17704253302652104231ull, 1899113549151ull}},
+{{6070852297695428608ull, 10711220029721396678ull,
+  7230199475272331169ull, 379822709830ull}},
+{{12141704595390857216ull, 2975695985733241740ull,
+  14460398950544662339ull, 759645419660ull}},
+{{5836665117072162816ull, 5951391971466483481ull,
+  10474053827379773062ull, 1519290839321ull}},
+{{11673330234144325632ull, 11902783942932966962ull,
+  2501363581049994508ull, 3038581678643ull}},
+{{13402712491054596096ull, 6069905603328503715ull,
+  11568319160435729871ull, 607716335728ull}},
+{{8358680908399640576ull, 12139811206657007431ull,
+  4689894247161908126ull, 1215432671457ull}},
+{{16717361816799281152ull, 5832878339604463246ull,
+  9379788494323816253ull, 2430865342914ull}},
+{{14411518807585587200ull, 8545273297404713295ull,
+  16633352957832404543ull, 486173068582ull}},
+{{10376293541461622784ull, 17090546594809426591ull,
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+{{2305843009213693952ull, 15734349115909301567ull,
+  11193179610200963325ull, 1944692274331ull}},
+{{11529215046068469760ull, 6836218637923770636ull,
+  5927984736782102988ull, 388938454866ull}},
+{{4611686018427387904ull, 13672437275847541273ull,
+  11855969473564205976ull, 777876909732ull}},
+{{9223372036854775808ull, 8898130477985530930ull,
+  5265194873418860337ull, 1555753819465ull}},
+{{0ull, 17796260955971061861ull, 10530389746837720674ull,
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+{{0ull, 18316647450161853665ull, 2106077949367544134ull,
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+{{0ull, 18186550826614155714ull, 4212155898735088269ull,
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+{{0ull, 17926357579518759812ull, 8424311797470176539ull,
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+{{0ull, 10859891846549414248ull, 14437771163213801585ull,
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+{{0ull, 3273039619389276880ull, 10428798252718051555ull,
+  1991364888915ull}},
+{{0ull, 654607923877855376ull, 2085759650543610311ull,
+  398272977783ull}},
+{{0ull, 1309215847755710752ull, 4171519301087220622ull,
+  796545955566ull}},
+{{0ull, 2618431695511421504ull, 8343038602174441244ull,
+  1593091911132ull}},
+{{0ull, 5236863391022843008ull, 16686077204348882488ull,
+  3186183822264ull}},
+{{0ull, 8426070307688389248ull, 18094610699837417790ull,
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+{{0ull, 16852140615376778496ull, 17742477325965283964ull,
+  1274473528905ull}},
+{{0ull, 15257537157044005376ull, 17038210578221016313ull,
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+{{0ull, 17808902690376442368ull, 7096990930386113585ull,
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+{{0ull, 17171061307043333120ull, 14193981860772227171ull,
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+{{0ull, 10078761616579756032ull, 9737087061613911154ull,
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+{{0ull, 13083798767541682176ull, 16704812671290423523ull,
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+{{0ull, 7720853461373812736ull, 14962881268871295431ull,
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+{{0ull, 15441706922747625472ull, 11479018464033039246ull,
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+{{0ull, 14156387828775256064ull, 9674501322290428495ull,
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+{{1326252829447047930ull, 12842973812980430553ull,
+  4483354495881046442ull, 1018517988167ull}},
+{{2652505658894095859ull, 7239203552251309490ull,
+  8966708991762092885ull, 2037035976334ull}},
+{{15287896390746460465ull, 16205235969417903190ull,
+  16550737057320059869ull, 407407195266ull}},
+{{12129048707783369314ull, 13963727865126254765ull,
+  14654730040930568123ull, 814814390533ull}},
+{{5811353341857187011ull, 9480711656542957915ull,
+  10862716008151584631ull, 1629628781067ull}},
+{{11622706683714374021ull, 514679239376364214ull,
+  3278687942593617647ull, 3259257562135ull}},
+{{6013890151484785128ull, 7481633477359093489ull, 655737588518723529ull,
+  651851512427ull}},
+{{12027780302969570255ull, 14963266954718186978ull,
+  1311475177037447058ull, 1303703024854ull}},
+{{5608816532229588893ull, 11479789835726822341ull,
+  2622950354074894117ull, 2607406049708ull}},
+{{4811112121187828102ull, 2295957967145364468ull,
+  11592636515040709793ull, 521481209941ull}},
+{{9622224242375656204ull, 4591915934290728936ull,
+  4738528956371867970ull, 1042962419883ull}},
+{{797704411041760792ull, 9183831868581457873ull, 9477057912743735940ull,
+  2085924839766ull}},
+{{14916936141175993452ull, 5526115188458201897ull,
+  5584760397290657511ull, 417184967953ull}},
+{{11387128208642435287ull, 11052230376916403795ull,
+  11169520794581315022ull, 834369935906ull}},
+{{4327512343575318957ull, 3657716680123255975ull,
+  3892297515453078429ull, 1668739871813ull}},
+{{8244200098198884438ull, 8110240965508471841ull,
+  11846505947316346655ull, 333747974362ull}},
+{{16488400196397768876ull, 16220481931016943682ull,
+  5246267820923141694ull, 667495948725ull}},
+{{14530056319085986135ull, 13994219788324335749ull,
+  10492535641846283389ull, 1334991897450ull}},
+{{10613368564462420654ull, 9541695502939119883ull,
+  2538327209983015163ull, 2669983794901ull}},
+{{9501371342376304778ull, 16665734359555465269ull,
+  4197014256738513355ull, 533996758980ull}},
+{{555998611043057939ull, 14884724645401378923ull,
+  8394028513477026711ull, 1067993517960ull}},
+{{1111997222086115877ull, 11322705217093206230ull,
+  16788057026954053423ull, 2135987035920ull}},
+{{11290445888642954145ull, 13332587487644372215ull,
+  3357611405390810684ull, 427197407184ull}},
+{{4134147703576356674ull, 8218430901579192815ull,
+  6715222810781621369ull, 854394814368ull}},
+{{8268295407152713348ull, 16436861803158385630ull,
+  13430445621563242738ull, 1708789628736ull}},
+{{16411054340398183963ull, 18044767619599318418ull,
+  6375437939054558870ull, 341757925747ull}},
+{{14375364607086816309ull, 17642791165489085221ull,
+  12750875878109117741ull, 683515851494ull}},
+{{10303985140464081001ull, 16838838257268618827ull,
+  7055007682508683867ull, 1367031702989ull}},
+{{2161226207218610386ull, 15230932440827686039ull,
+  14110015365017367735ull, 2734063405978ull}},
+{{7810942870927542724ull, 14114232932391268177ull,
+  13890049517229204516ull, 546812681195ull}},
+{{15621885741855085448ull, 9781721791072984738ull,
+  9333354960748857417ull, 1093625362391ull}},
+{{12797027410000619279ull, 1116699508436417861ull,
+  219965847788163219ull, 2187250724783ull}},
+{{13627451926225854826ull, 7602037531171104218ull,
+  11112039613783363613ull, 437450144956ull}},
+{{8808159778742158035ull, 15204075062342208437ull,
+  3777335153857175610ull, 874900289913ull}},
+{{17616319557484316070ull, 11961406050974865258ull,
+  7554670307714351221ull, 1749800579826ull}},
+{{3523263911496863214ull, 9770978839678793698ull,
+  5200282876284780567ull, 349960115965ull}},
+{{7046527822993726428ull, 1095213605648035780ull,
+  10400565752569561135ull, 699920231930ull}},
+{{14093055645987452856ull, 2190427211296071560ull,
+  2354387431429570654ull, 1399840463861ull}},
+{{9739367218265354095ull, 4380854422592143121ull,
+  4708774862859141308ull, 2799680927722ull}},
+{{5637222258394981143ull, 876170884518428624ull, 8320452602055648908ull,
+  559936185544ull}},
+{{11274444516789962285ull, 1752341769036857248ull,
+  16640905204111297816ull, 1119872371088ull}}
+};
+
+static const UINT256 multipliers2_bid32[] =
+  { {{7156996302188685206ull, 14694123111064470433ull,
+      3521238664523520994ull, 11704ull}},
+{{14313992604377370412ull, 10941502148419389250ull,
+  7042477329047041989ull, 23408ull}},
+{{10181241135045189207ull, 3436260223129226885ull,
+  14084954658094083979ull, 46816ull}},
+{{1915738196380826798ull, 6872520446258453771ull,
+  9723165242478616342ull, 93633ull}},
+{{3831476392761653595ull, 13745040892516907542ull,
+  999586411247681068ull, 187267ull}},
+{{7662952785523307189ull, 9043337711324263468ull,
+  1999172822495362137ull, 374534ull}},
+{{15325905571046614378ull, 18086675422648526936ull,
+  3998345644990724274ull, 749068ull}},
+{{12205067068383677139ull, 17726606771587502257ull,
+  7996691289981448549ull, 1498136ull}},
+{{5963390063057802661ull, 17006469469465452899ull,
+  15993382579962897099ull, 2996272ull}},
+{{11926780126115605321ull, 15566194865221354182ull,
+  13540021086216242583ull, 5992545ull}},
+{{5406816178521659026ull, 12685645656733156749ull,
+  8633298098722933551ull, 11985091ull}},
+{{10813632357043318052ull, 6924547239756761882ull,
+  17266596197445867103ull, 23970182ull}},
+{{3180520640377084488ull, 13849094479513523765ull,
+  16086448321182182590ull, 47940365ull}},
+{{6361041280754168975ull, 9251444885317495914ull,
+  13726152568654813565ull, 95880731ull}},
+{{12722082561508337950ull, 56145696925440212ull, 9005561063600075515ull,
+  191761463ull}},
+{{6997421049307124283ull, 112291393850880425ull,
+  18011122127200151030ull, 383522926ull}},
+{{13994842098614248565ull, 224582787701760850ull,
+  17575500180690750444ull, 767045853ull}},
+{{9542940123518945513ull, 449165575403521701ull,
+  16704256287671949272ull, 1534091707ull}},
+{{639136173328339410ull, 898331150807043403ull, 14961768501634346928ull,
+  3068183415ull}},
+{{1278272346656678820ull, 1796662301614086806ull,
+  11476792929559142240ull, 6136366831ull}},
+{{2556544693313357639ull, 3593324603228173612ull,
+  4506841785408732864ull, 12272733663ull}},
+{{5113089386626715277ull, 7186649206456347224ull,
+  9013683570817465728ull, 24545467326ull}},
+{{10226178773253430554ull, 14373298412912694448ull,
+  18027367141634931456ull, 49090934652ull}},
+{{2005613472797309491ull, 10299852752115837281ull,
+  17607990209560311297ull, 98181869305ull}},
+{{4011226945594618982ull, 2152961430522122946ull,
+  16769236345411070979ull, 196363738611ull}},
+{{4491594203860834120ull, 430592286104424589ull, 7043196083824124519ull,
+  39272747722ull}},
+{{8983188407721668240ull, 861184572208849178ull,
+  14086392167648249038ull, 78545495444ull}},
+{{17966376815443336479ull, 1722369144417698356ull,
+  9726040261586946460ull, 157090990889ull}},
+{{17486009557177121341ull, 3444738288835396713ull,
+  1005336449464341304ull, 314181981779ull}},
+{{7186550726177334592ull, 11756994101992810312ull,
+  14958462548860509553ull, 62836396355ull}},
+{{14373101452354669183ull, 5067244130276069008ull,
+  11470181024011467491ull, 125672792711ull}},
+{{10299458830999786749ull, 10134488260552138017ull,
+  4493617974313383366ull, 251345585423ull}},
+{{5749240580941867673ull, 16784292911078068896ull,
+  11966770039088407642ull, 50269117084ull}},
+{{11498481161883735346ull, 15121841748446586176ull,
+  5486796004467263669ull, 100538234169ull}},
+{{4550218250057919076ull, 11796939423183620737ull,
+  10973592008934527339ull, 201076468338ull}},
+{{15667438908979225108ull, 9738085514120544793ull,
+  13262764846012636437ull, 40215293667ull}},
+{{12888133744248898600ull, 1029426954531537971ull,
+  8078785618315721259ull, 80430587335ull}},
+{{7329523414788245584ull, 2058853909063075943ull,
+  16157571236631442518ull, 160861174670ull}},
+{{14659046829576491168ull, 4117707818126151886ull,
+  13868398399553333420ull, 321722349341ull}},
+{{10310506995399118880ull, 4512890378367140700ull,
+  6463028494652577007ull, 64344469868ull}},
+{{2174269917088686144ull, 9025780756734281401ull,
+  12926056989305154014ull, 128688939736ull}},
+{{4348539834177372288ull, 18051561513468562802ull,
+  7405369904900756412ull, 257377879473ull}},
+{{8248405596319295104ull, 3610312302693712560ull,
+  12549120425205882252ull, 51475575894ull}},
+{{16496811192638590208ull, 7220624605387425120ull,
+  6651496776702212888ull, 102951151789ull}},
+{{14546878311567628800ull, 14441249210774850241ull,
+  13302993553404425776ull, 205902303578ull}},
+{{2909375662313525760ull, 17645645101122611341ull,
+  13728645154906616124ull, 41180460715ull}},
+{{5818751324627051520ull, 16844546128535671066ull,
+  9010546236103680633ull, 82360921431ull}},
+{{11637502649254103040ull, 15242348183361790516ull,
+  18021092472207361267ull, 164721842862ull}},
+{{2327500529850820608ull, 17805864895639999396ull,
+  10982916123925292899ull, 32944368572ull}},
+{{4655001059701641216ull, 17164985717570447176ull,
+  3519088174141034183ull, 65888737145ull}},
+{{9310002119403282432ull, 15883227361431342736ull,
+  7038176348282068367ull, 131777474290ull}},
+{{173260165097013248ull, 13319710649153133857ull,
+  14076352696564136735ull, 263554948580ull}},
+{{7413349662503223296ull, 2663942129830626771ull,
+  2815270539312827347ull, 52710989716ull}},
+{{14826699325006446592ull, 5327884259661253542ull,
+  5630541078625654694ull, 105421979432ull}},
+{{11206654576303341568ull, 10655768519322507085ull,
+  11261082157251309388ull, 210843958864ull}},
+{{9620028544744488960ull, 9509851333348322063ull,
+  17009611690417903170ull, 42168791772ull}},
+{{793313015779426304ull, 572958592987092511ull, 15572479307126254725ull,
+  84337583545ull}},
+{{1586626031558852608ull, 1145917185974185022ull,
+  12698214540542957834ull, 168675167091ull}},
+{{7696022835795591168ull, 229183437194837004ull, 6228991722850501890ull,
+  33735033418ull}},
+{{15392045671591182336ull, 458366874389674008ull,
+  12457983445701003780ull, 67470066836ull}},
+{{12337347269472813056ull, 916733748779348017ull,
+  6469222817692455944ull, 134940133673ull}},
+{{6227950465236074496ull, 1833467497558696035ull,
+  12938445635384911888ull, 269880267346ull}},
+{{16002985352014856192ull, 15124088758479380499ull,
+  6277037941818892700ull, 53976053469ull}},
+{{13559226630320160768ull, 11801433443249209383ull,
+  12554075883637785401ull, 107952106938ull}},
+{{8671709186930769920ull, 5156122812788867151ull,
+  6661407693566019187ull, 215904213877ull}},
+{{1734341837386153984ull, 15788619821525414723ull,
+  8710979168197024483ull, 43180842775ull}},
+{{3468683674772307968ull, 13130495569341277830ull,
+  17421958336394048967ull, 86361685550ull}},
+{{6937367349544615936ull, 7814247064973004044ull,
+  16397172599078546319ull, 172723371101ull}},
+{{16144868728876564480ull, 1562849412994600808ull,
+  6968783334557619587ull, 34544674220ull}},
+{{13842993384043577344ull, 3125698825989201617ull,
+  13937566669115239174ull, 69089348440ull}},
+{{9239242694377603072ull, 6251397651978403235ull,
+  9428389264520926732ull, 138178696881ull}},
+{{31741315045654528ull, 12502795303956806471ull, 410034455332301848ull,
+  276357393763ull}},
+{{7385045892492951552ull, 6189907875533271617ull,
+  11150053335292191339ull, 55271478752ull}},
+{{14770091784985903104ull, 12379815751066543234ull,
+  3853362596874831062ull, 110542957505ull}},
+{{11093439496262254592ull, 6312887428423534853ull,
+  7706725193749662125ull, 221085915010ull}},
+{{13286734343478181888ull, 1262577485684706970ull,
+  1541345038749932425ull, 44217183002ull}},
+{{8126724613246812160ull, 2525154971369413941ull,
+  3082690077499864850ull, 88434366004ull}},
+{{16253449226493624320ull, 5050309942738827882ull,
+  6165380154999729700ull, 176868732008ull}},
+{{3250689845298724864ull, 12078108432773496546ull,
+  12301122475225676909ull, 35373746401ull}},
+{{6501379690597449728ull, 5709472791837441476ull,
+  6155500876741802203ull, 70747492803ull}},
+{{13002759381194899456ull, 11418945583674882952ull,
+  12311001753483604406ull, 141494985606ull}},
+{{7558774688680247296ull, 4391147093640214289ull,
+  6175259433257657197ull, 282989971213ull}},
+{{16269150196703690752ull, 878229418728042857ull,
+  12303098330877262409ull, 56597994242ull}},
+{{14091556319697829888ull, 1756458837456085715ull,
+  6159452588044973202ull, 113195988485ull}},
+{{9736368565686108160ull, 3512917674912171431ull,
+  12318905176089946404ull, 226391976970ull}},
+{{1947273713137221632ull, 15459978793950075579ull,
+  2463781035217989280ull, 45278395394ull}},
+{{3894547426274443264ull, 12473213514190599542ull,
+  4927562070435978561ull, 90556790788ull}},
+{{7789094852548886528ull, 6499682954671647468ull,
+  9855124140871957123ull, 181113581576ull}},
+{{8936516599993597952ull, 16057331849901970786ull,
+  5660373642916301747ull, 36222716315ull}},
+{{17873033199987195904ull, 13667919626094389956ull,
+  11320747285832603495ull, 72445432630ull}},
+{{17299322326264840192ull, 8889095178479228297ull,
+  4194750497955655375ull, 144890865261ull}},
+{{16151900578820128768ull, 17778190356958456595ull,
+  8389500995911310750ull, 289781730522ull}},
+{{10609077745247846400ull, 10934335700875511965ull,
+  9056597828666082796ull, 57956346104ull}},
+{{2771411416786141184ull, 3421927328041472315ull,
+  18113195657332165593ull, 115912692208ull}},
+{{5542822833572282368ull, 6843854656082944630ull,
+  17779647240954779570ull, 231825384417ull}},
+{{8487262196198277120ull, 8747468560700409572ull,
+  10934627077674776560ull, 46365076883ull}},
+{{16974524392396554240ull, 17494937121400819144ull,
+  3422510081640001504ull, 92730153767ull}},
+{{15502304711083556864ull, 16543130169092086673ull,
+  6845020163280003009ull, 185460307534ull}},
+{{6789809756958621696ull, 14376672478044148304ull,
+  16126399291623641894ull, 37092061506ull}},
+{{13579619513917243392ull, 10306600882378744992ull,
+  13806054509537732173ull, 74184123013ull}},
+{{8712494954124935168ull, 2166457691047938369ull,
+  9165364945365912731ull, 148368246027ull}},
+{{17424989908249870336ull, 4332915382095876738ull,
+  18330729890731825462ull, 296736492054ull}},
+{{18242393240617615360ull, 4555931891161085670ull,
+  18423541237114006385ull, 59347298410ull}},
+{{18038042407525679104ull, 9111863782322171341ull,
+  18400338400518461154ull, 118694596821ull}},
+{{17629340741341806592ull, 18223727564644342683ull,
+  18353932727327370692ull, 237389193643ull}},
+{{14593914592494092288ull, 3644745512928868536ull,
+  14738832989691205108ull, 47477838728ull}},
+{{10741085111278632960ull, 7289491025857737073ull,
+  11030921905672858600ull, 94955677457ull}},
+{{3035426148847714304ull, 14578982051715474147ull,
+  3615099737636165584ull, 189911354915ull}},
+{{4296434044511453184ull, 17673191669310736122ull,
+  723019947527233116ull, 37982270983ull}},
+{{8592868089022906368ull, 16899639264911920628ull,
+  1446039895054466233ull, 75964541966ull}},
+{{17185736178045812736ull, 15352534456114289640ull,
+  2892079790108932467ull, 151929083932ull}},
+{{15924728282382073856ull, 12258324838519027665ull,
+  5784159580217864935ull, 303858167864ull}},
+{{17942340915444056064ull, 17209060226671446825ull,
+  15914227175011214279ull, 60771633572ull}},
+{{17437937757178560512ull, 15971376379633342035ull,
+  13381710276312876943ull, 121543267145ull}},
+{{16429131440647569408ull, 13496008685557132455ull,
+  8316676478916202271ull, 243086534291ull}},
+{{10664523917613334528ull, 10077899366595247137ull,
+  5352684110525150777ull, 48617306858ull}},
+{{2882303761517117440ull, 1709054659480942659ull,
+  10705368221050301555ull, 97234613716ull}},
+{{5764607523034234880ull, 3418109318961885318ull,
+  2963992368391051494ull, 194469227433ull}},
+{{1152921504606846976ull, 8062319493276197710ull,
+  11660844917903941268ull, 38893845486ull}},
+{{2305843009213693952ull, 16124638986552395420ull,
+  4874945762098330920ull, 77787690973ull}},
+{{4611686018427387904ull, 13802533899395239224ull,
+  9749891524196661841ull, 155575381946ull}},
+{{9223372036854775808ull, 9158323725080926832ull,
+  1053038974683772067ull, 311150763893ull}},
+{{9223372036854775808ull, 1831664745016185366ull,
+  11278654239162485383ull, 62230152778ull}},
+{{0ull, 3663329490032370733ull, 4110564404615419150ull,
+  124460305557ull}},
+{{0ull, 7326658980064741466ull, 8221128809230838300ull,
+  248920611114ull}},
+{{0ull, 16222727054980589586ull, 16401621020813808952ull,
+  49784122222ull}},
+{{0ull, 13998710036251627556ull, 14356497967918066289ull,
+  99568244445ull}},
+{{0ull, 9550675998793703496ull, 10266251862126580963ull,
+  199136488891ull}},
+{{0ull, 16667530458726381992ull, 5742599187167226515ull,
+  39827297778ull}},
+{{0ull, 14888316843743212368ull, 11485198374334453031ull,
+  79654595556ull}},
+{{0ull, 11329889613776873120ull, 4523652674959354447ull,
+  159309191113ull}},
+{{0ull, 4213035153844194624ull, 9047305349918708895ull,
+  318618382226ull}},
+{{0ull, 4531955845510749248ull, 5498809884725652102ull,
+  63723676445ull}},
+{{0ull, 9063911691021498496ull, 10997619769451304204ull,
+  127447352890ull}},
+{{0ull, 18127823382042996992ull, 3548495465193056792ull,
+  254894705781ull}},
+{{0ull, 14693611120634330368ull, 4399047907780521681ull,
+  50978941156ull}},
+{{0ull, 10940478167559109120ull, 8798095815561043363ull,
+  101957882312ull}},
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+{{16678945876129319260ull, 17894663030723564360ull,
+  5951328044146287187ull, 72370055773ull}},
+{{14911147678549086904ull, 17342581987737577105ull,
+  11902656088292574375ull, 144740111546ull}},
+{{11375551283388622191ull, 16238419901765602595ull,
+  5358568102875597135ull, 289480223093ull}},
+{{13343156700903455408ull, 14315730424578851488ull,
+  12139760064800850396ull, 57896044618ull}},
+{{8239569328097359200ull, 10184716775448151361ull,
+  5832776055892149177ull, 115792089237ull}},
+{{16479138656194718399ull, 1922689477186751106ull,
+  11665552111784298355ull, 231584178474ull}},
+{{3295827731238943680ull, 15141933154404991514ull,
+  17090505681324500963ull, 46316835694ull}},
+{{6591655462477887360ull, 11837122235100431412ull,
+  15734267288939450311ull, 92633671389ull}},
+{{13183310924955774719ull, 5227500396491311208ull,
+  13021790504169349007ull, 185267342779ull}},
+{{17394057443958796237ull, 4734848894040172564ull,
+  17361753359801511094ull, 37053468555ull}},
+{{16341370814208040858ull, 9469697788080345129ull,
+  16276762645893470572ull, 74106937111ull}},
+{{14235997554706530099ull, 492651502451138643ull,
+  14106781218077389529ull, 148213874223ull}},
+{{10025251035703508581ull, 985303004902277287ull,
+  9766818362445227442ull, 296427748447ull}},
+{{5694399021882612040ull, 14954455859948096750ull,
+  9332061301972866134ull, 59285549689ull}},
+{{11388798043765224079ull, 11462167646186641884ull,
+  217378530236180653ull, 118571099379ull}},
+{{4330852013820896542ull, 4477591218663732153ull, 434757060472361307ull,
+  237142198758ull}},
+{{11934216846989910278ull, 895518243732746430ull,
+  11154997856320203231ull, 47428439751ull}},
+{{5421689620270268940ull, 1791036487465492861ull,
+  3863251638930854846ull, 94856879503ull}},
+{{10843379240540537880ull, 3582072974930985722ull,
+  7726503277861709692ull, 189713759006ull}},
+{{2168675848108107576ull, 11784461039211928114ull,
+  5234649470314252261ull, 37942751801ull}},
+{{4337351696216215152ull, 5122178004714304612ull,
+  10469298940628504523ull, 75885503602ull}},
+{{8674703392432430304ull, 10244356009428609224ull,
+  2491853807547457430ull, 151771007205ull}},
+{{17349406784864860608ull, 2041967945147666832ull,
+  4983707615094914861ull, 303542014410ull}},
+{{14537927801198703092ull, 4097742403771443689ull,
+  996741523018982972ull, 60708402882ull}},
+{{10629111528687854567ull, 8195484807542887379ull,
+  1993483046037965944ull, 121416805764ull}},
+{{2811478983666157517ull, 16390969615085774759ull,
+  3986966092075931888ull, 242833611528ull}},
+{{562295796733231504ull, 6967542737759065275ull,
+  11865439662640917347ull, 48566722305ull}},
+{{1124591593466463007ull, 13935085475518130550ull,
+  5284135251572283078ull, 97133444611ull}},
+{{2249183186932926013ull, 9423426877326709484ull,
+  10568270503144566157ull, 194266889222ull}},
+{{11517883081612316173ull, 16642080634432983189ull,
+  9492351730112733877ull, 38853377844ull}},
+{{4589022089515080729ull, 14837417195156414763ull,
+  537959386515916139ull, 77706755689ull}},
+{{9178044179030161457ull, 11228090316603277910ull,
+  1075918773031832279ull, 155413511378ull}},
+{{18356088358060322914ull, 4009436559497004204ull,
+  2151837546063664559ull, 310827022756ull}},
+{{18428612930579705876ull, 801887311899400840ull,
+  4119716323954643235ull, 62165404551ull}},
+{{18410481787449860135ull, 1603774623798801681ull,
+  8239432647909286470ull, 124330809102ull}},
+{{18374219501190168654ull, 3207549247597603363ull,
+  16478865295818572940ull, 248661618204ull}},
+{{11053541529721854378ull, 15398905108487161965ull,
+  18053168318131355880ull, 49732323640ull}},
+{{3660338985734157139ull, 12351066143264772315ull,
+  17659592562553160145ull, 99464647281ull}},
+{{7320677971468314277ull, 6255388212819993014ull,
+  16872441051396768675ull, 198929294563ull}},
+{{8842833223777483502ull, 12319124086789729572ull,
+  14442534654505084704ull, 39785858912ull}},
+{{17685666447554967004ull, 6191504099869907528ull,
+  10438325235300617793ull, 79571717825ull}},
+{{16924588821400382391ull, 12383008199739815057ull,
+  2429906396891683970ull, 159143435651ull}},
+{{15402433569091213166ull, 6319272325770078499ull,
+  4859812793783367941ull, 318286871302ull}},
+{{10459184343302063280ull, 12331900909379746669ull,
+  8350660188240494234ull, 63657374260ull}},
+{{2471624612894574944ull, 6217057745049941723ull,
+  16701320376480988469ull, 127314748520ull}},
+{{4943249225789149887ull, 12434115490099883446ull,
+  14955896679252425322ull, 254629497041ull}},
+{{15746045104125471271ull, 13554869542245707658ull,
+  6680528150592395387ull, 50925899408ull}},
+{{13045346134541390925ull, 8662995010781863701ull,
+  13361056301184790775ull, 101851798816ull}},
+{{7643948195373230233ull, 17325990021563727403ull,
+  8275368528660029934ull, 203703597633ull}},
+{{1528789639074646047ull, 10843895633796566127ull,
+  12723120149957736956ull, 40740719526ull}},
+{{3057579278149292093ull, 3241047193883580638ull,
+  6999496226205922297ull, 81481439053ull}},
+{{6115158556298584186ull, 6482094387767161276ull,
+  13998992452411844594ull, 162962878106ull}},
+{{12230317112597168372ull, 12964188775534322552ull,
+  9551240831114137572ull, 325925756213ull}},
+{{9824761052003254321ull, 2592837755106864510ull,
+  12978294610448558484ull, 65185151242ull}},
+{{1202778030296957026ull, 5185675510213729021ull,
+  7509845147187565352ull, 130370302485ull}},
+{{2405556060593914051ull, 10371351020427458042ull,
+  15019690294375130704ull, 260740604970ull}},
+{{4170460026860693134ull, 16831665463053132901ull,
+  3003938058875026140ull, 52148120994ull}},
+{{8340920053721386267ull, 15216586852396714186ull,
+  6007876117750052281ull, 104296241988ull}},
+{{16681840107442772534ull, 11986429631083876756ull,
+  12015752235500104563ull, 208592483976ull}},
+{{3336368021488554507ull, 17154681185184416644ull,
+  6092499261841931235ull, 41718496795ull}},
+{{6672736042977109014ull, 15862618296659281672ull,
+  12184998523683862471ull, 83436993590ull}},
+{{13345472085954218027ull, 13278492519609011728ull,
+  5923252973658173327ull, 166873987181ull}},
+{{6358443231932753929ull, 13723744948147533315ull,
+  4873999409473544988ull, 33374797436ull}},
+{{12716886463865507858ull, 9000745822585515014ull,
+  9747998818947089977ull, 66749594872ull}},
+{{6987028854021464099ull, 18001491645171030029ull,
+  1049253564184628338ull, 133499189745ull}},
+{{13974057708042928197ull, 17556239216632508442ull,
+  2098507128369256677ull, 266998379490ull}},
+{{17552206800576226933ull, 10889945472810322334ull,
+  419701425673851335ull, 53399675898ull}},
+{{16657669527442902249ull, 3333146871911093053ull,
+  839402851347702671ull, 106799351796ull}},
+{{14868594981176252881ull, 6666293743822186107ull,
+  1678805702695405342ull, 213598703592ull}},
+{{6663067810977160900ull, 16090654007732078514ull,
+  7714458770022901714ull, 42719740718ull}},
+{{13326135621954321799ull, 13734563941754605412ull,
+  15428917540045803429ull, 85439481436ull}},
+{{8205527170199091982ull, 9022383809799659209ull,
+  12411091006382055243ull, 170878962873ull}},
+{{1641105434039818397ull, 5493825576701842165ull,
+  13550264645502142018ull, 34175792574ull}},
+{{3282210868079636793ull, 10987651153403684330ull,
+  8653785217294732420ull, 68351585149ull}},
+{{6564421736159273585ull, 3528558233097817044ull,
+  17307570434589464841ull, 136703170298ull}},
+{{13128843472318547170ull, 7057116466195634088ull,
+  16168396795469378066ull, 273406340597ull}},
+{{6315117509205619758ull, 12479469737464857787ull,
+  10612376988577696259ull, 54681268119ull}},
+{{12630235018411239515ull, 6512195401220163958ull,
+  2778009903445840903ull, 109362536239ull}},
+{{6813725963112927413ull, 13024390802440327917ull,
+  5556019806891681806ull, 218725072478ull}},
+{{5052094007364495806ull, 17362273419455706876ull,
+  12179250405604067330ull, 43745014495ull}},
+{{10104188014728991612ull, 16277802765201862136ull,
+  5911756737498583045ull, 87490028991ull}},
+{{1761631955748431607ull, 14108861456694172657ull,
+  11823513474997166091ull, 174980057982ull}},
+{{352326391149686322ull, 13889818735564565501ull,
+  9743400324483253864ull, 34996011596ull}},
+{{704652782299372643ull, 9332893397419579386ull, 1040056575256956113ull,
+  69992023193ull}},
+{{1409305564598745286ull, 219042721129607156ull, 2080113150513912227ull,
+  139984046386ull}},
+{{2818611129197490572ull, 438085442259214312ull, 4160226301027824454ull,
+  279968092772ull}},
+{{11631768670065229084ull, 3776965903193753185ull,
+  8210742889689385537ull, 55993618554ull}},
+{{4816793266420906552ull, 7553931806387506371ull,
+  16421485779378771074ull, 111987237108ull}}
+};
+
+static const UINT128 coefflimits_bid32[] = { {{10000000ull, 0ull}},
+{{2000000ull, 0ull}},
+{{400000ull, 0ull}},
+{{80000ull, 0ull}},
+{{16000ull, 0ull}},
+{{3200ull, 0ull}},
+{{640ull, 0ull}},
+{{128ull, 0ull}},
+{{25ull, 0ull}},
+{{5ull, 0ull}},
+{{1ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}}
+};
+
+// **********************************************************************
+
+static const UINT128 breakpoints_bid64[] = { {{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{632147898099709952ull, 73239311802481213ull}},
+{{9539445985904630784ull, 36619655901240606ull}},
+{{4769722992952315392ull, 18309827950620303ull}},
+{{5401870891052025344ull, 91549139753101516ull}},
+{{2700935445526012672ull, 45774569876550758ull}},
+{{1350467722763006208ull, 22887284938275379ull}},
+{{6752338613815031552ull, 114436424691376895ull}},
+{{12599541343762291456ull, 57218212345688447ull}},
+{{15523142708735921408ull, 28609106172844223ull}},
+{{3828737248841401600ull, 143045530864221119ull}},
+{{11137740661275476480ull, 71522765432110559ull}},
+{{14792242367492514048ull, 35761382716055279ull}},
+{{16619493220601032704ull, 17880691358027639ull}},
+{{9310489808166957824ull, 89403456790138199ull}},
+{{13878616940938254592ull, 44701728395069099ull}},
+{{16162680507323902976ull, 22350864197534549ull}},
+{{7026426241781309440ull, 111754320987672749ull}},
+{{12736585157745430528ull, 55877160493836374ull}},
+{{6368292578872715264ull, 27938580246918187ull}},
+{{13394718820654024704ull, 139692901234590936ull}},
+{{6697359410327012352ull, 69846450617295468ull}},
+{{3348679705163506176ull, 34923225308647734ull}},
+{{1674339852581753088ull, 17461612654323867ull}},
+{{8371699262908765440ull, 87308063271619335ull}},
+{{13409221668309158400ull, 43654031635809667ull}},
+{{15927982871009355008ull, 21827015817904833ull}},
+{{5852938060208568832ull, 109135079089524169ull}},
+{{12149841066959060224ull, 54567539544762084ull}},
+{{6074920533479529984ull, 27283769772381042ull}},
+{{11927858593688099072ull, 136418848861905211ull}},
+{{15187301333698825216ull, 68209424430952605ull}},
+{{16817022703704188416ull, 34104712215476302ull}},
+{{8408511351852094208ull, 17052356107738151ull}},
+{{5149068611841367808ull, 85261780538690757ull}},
+{{11797906342775459584ull, 42630890269345378ull}},
+{{5898953171387729664ull, 21315445134672689ull}},
+{{11048021783229097728ull, 106577225673363446ull}},
+{{5524010891614548736ull, 53288612836681723ull}},
+{{11985377482662050048ull, 26644306418340861ull}},
+{{4586655192181596416ull, 133221532091704308ull}},
+{{2293327596090798080ull, 66610766045852154ull}},
+{{1146663798045399040ull, 33305383022926077ull}},
+{{9796703935877475328ull, 16652691511463038ull}},
+{{12090031531968273664ull, 83263457557315192ull}},
+{{6045015765984136704ull, 41631728778657596ull}},
+{{3022507882992068352ull, 20815864389328798ull}},
+{{15112539414960342016ull, 104079321946643990ull}},
+{{7556269707480171008ull, 52039660973321995ull}},
+{{13001506890594861312ull, 26019830486660997ull}},
+{{9667302231845651712ull, 130099152433304988ull}},
+{{4833651115922825728ull, 65049576216652494ull}},
+{{2416825557961412864ull, 32524788108326247ull}},
+{{10431784815835482112ull, 16262394054163123ull}},
+{{15265435931758308096ull, 81311970270815617ull}},
+{{16856090002733929728ull, 40655985135407808ull}},
+{{8428045001366964736ull, 20327992567703904ull}},
+{{5246736859415721472ull, 101639962838519522ull}},
+{{2623368429707860736ull, 50819981419259761ull}},
+{{10535056251708706048ull, 25409990709629880ull}},
+{{15781793111124427520ull, 127049953548149402ull}},
+{{7890896555562213632ull, 63524976774074701ull}},
+{{13168820314635882496ull, 31762488387037350ull}},
+{{6584410157317941248ull, 15881244193518675ull}},
+{{14475306712880155136ull, 79406220967593376ull}},
+{{7237653356440077568ull, 39703110483796688ull}},
+{{3618826678220038656ull, 19851555241898344ull}},
+{{18094133391100194048ull, 99257776209491720ull}},
+{{9047066695550096896ull, 49628888104745860ull}},
+{{4523533347775048448ull, 24814444052372930ull}},
+{{4170922665165690880ull, 124072220261864651ull}},
+{{11308833369437621248ull, 62036110130932325ull}},
+{{14877788721573586432ull, 31018055065466162ull}},
+{{7438894360786793216ull, 15509027532733081ull}},
+{{300983656514862848ull, 77545137663665407ull}},
+{{9373863865112207104ull, 38772568831832703ull}},
+{{13910303969410879232ull, 19386284415916351ull}},
+{{14211287625925742080ull, 96931422079581758ull}},
+{{7105643812962871040ull, 48465711039790879ull}},
+{{12776193943336211200ull, 24232855519895439ull}},
+{{8540737495552401920ull, 121164277599477198ull}},
+{{4270368747776200960ull, 60582138799738599ull}},
+{{11358556410742876160ull, 30291069399869299ull}},
+{{14902650242226213888ull, 15145534699934649ull}},
+{{726274916292863232ull, 75727673499673249ull}},
+{{9586509495001207296ull, 37863836749836624ull}},
+{{4793254747500603648ull, 18931918374918312ull}},
+{{5519529663793467136ull, 94659591874591561ull}},
+{{11983136868751509248ull, 47329795937295780ull}},
+{{5991568434375754496ull, 23664897968647890ull}},
+{{11511098098169221632ull, 118324489843239451ull}},
+{{14978921085939386624ull, 59162244921619725ull}},
+{{16712832579824468992ull, 29581122460809862ull}},
+{{8356416289912234496ull, 14790561230404931ull}},
+{{4888593302142069504ull, 73952806152024657ull}},
+{{11667668687925810432ull, 36976403076012328ull}},
+{{5833834343962905088ull, 18488201538006164ull}},
+{{10722427646104974848ull, 92441007690030821ull}},
+{{14584585859907263232ull, 46220503845015410ull}},
+{{7292292929953631488ull, 23110251922507705ull}},
+{{18014720576058606592ull, 115551259612538526ull}},
+{{9007360288029303296ull, 57775629806269263ull}},
+{{13727052180869427456ull, 28887814903134631ull}},
+{{16086898127289489408ull, 14443907451567315ull}},
+{{6647514341609241088ull, 72219537257836579ull}},
+{{12547129207659396352ull, 36109768628918289ull}},
+{{15496936640684473856ull, 18054884314459144ull}},
+{{3697706908584163584ull, 90274421572295724ull}},
+{{1848853454292081664ull, 45137210786147862ull}},
+{{924426727146040832ull, 22568605393073931ull}},
+{{4622133635730204416ull, 112843026965369655ull}},
+{{11534438854719877888ull, 56421513482684827ull}},
+{{14990591464214714624ull, 28210756741342413ull}},
+{{1165981026235367680ull, 141053783706712069ull}},
+{{9806362549972459520ull, 70526891853356034ull}},
+{{4903181274986229760ull, 35263445926678017ull}},
+{{11674962674347890688ull, 17631722963339008ull}},
+{{3034581150610798848ull, 88158614816695043ull}},
+{{10740662612160175104ull, 44079307408347521ull}},
+{{14593703342934863360ull, 22039653704173760ull}},
+{{17628284493545662208ull, 110198268520868803ull}},
+{{18037514283627606784ull, 55099134260434401ull}},
+{{18242129178668579072ull, 27549567130217200ull}},
+{{17423669598504689920ull, 137747835651086004ull}},
+{{8711834799252344832ull, 68873917825543002ull}},
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+{{4835375308228237312ull, 28357977325280777ull}},
+{{5730132467431634944ull, 141789886626403886ull}},
+{{2865066233715817472ull, 70894943313201943ull}},
+{{10655905153712684544ull, 35447471656600971ull}},
+{{14551324613711118080ull, 17723735828300485ull}},
+{{17416390847426935552ull, 88618679141502428ull}},
+{{8708195423713467648ull, 44309339570751214ull}},
+{{4354097711856733696ull, 22154669785375607ull}},
+{{3323744485574117632ull, 110773348926878036ull}},
+{{1661872242787058688ull, 55386674463439018ull}},
+{{830936121393529344ull, 27693337231719509ull}},
+{{4154680606967647232ull, 138466686158597545ull}},
+{{11300712340338599424ull, 69233343079298772ull}}
+};
+
+static const int exponents_bid64[] = { -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  -1,
+  0,
+  0,
+  0,
+  1,
+  1,
+  1,
+  2,
+  2,
+  2,
+  3,
+  3,
+  3,
+  3,
+  4,
+  4,
+  4,
+  5,
+  5,
+  5,
+  6,
+  6,
+  6,
+  6,
+  7,
+  7,
+  7,
+  8,
+  8,
+  8,
+  9,
+  9,
+  9,
+  9,
+  10,
+  10,
+  10,
+  11,
+  11,
+  11,
+  12,
+  12,
+  12,
+  12,
+  13,
+  13,
+  13,
+  14,
+  14,
+  14,
+  15,
+  15,
+  15,
+  15,
+  16,
+  16,
+  16,
+  17,
+  17,
+  17,
+  18,
+  18,
+  18,
+  18,
+  19,
+  19,
+  19,
+  20,
+  20,
+  20,
+  21,
+  21,
+  21,
+  21,
+  22,
+  22,
+  22,
+  23,
+  23,
+  23,
+  24,
+  24,
+  24,
+  24,
+  25,
+  25,
+  25,
+  26,
+  26,
+  26,
+  27,
+  27,
+  27,
+  27,
+  28,
+  28,
+  28,
+  29,
+  29,
+  29,
+  30,
+  30,
+  30,
+  30,
+  31,
+  31,
+  31,
+  32,
+  32,
+  32,
+  33,
+  33,
+  33,
+  34,
+  34,
+  34,
+  34,
+  35,
+  35,
+  35,
+  36,
+  36,
+  36,
+  37,
+  37,
+  37,
+  37,
+  38,
+  38,
+  38,
+  39,
+  39,
+  39,
+  40,
+  40,
+  40,
+  40,
+  41,
+  41,
+  41,
+  42,
+  42,
+  42,
+  43,
+  43,
+  43,
+  43,
+  44,
+  44,
+  44,
+  45,
+  45,
+  45,
+  46,
+  46,
+  46,
+  46,
+  47,
+  47,
+  47,
+  48,
+  48,
+  48,
+  49,
+  49,
+  49,
+  49,
+  50,
+  50,
+  50,
+  51,
+  51,
+  51,
+  52,
+  52,
+  52,
+  52,
+  53,
+  53,
+  53,
+  54,
+  54,
+  54,
+  55,
+  55,
+  55,
+  55,
+  56,
+  56,
+  56,
+  57,
+  57,
+  57,
+  58,
+  58,
+  58,
+  58,
+  59,
+  59,
+  59,
+  60,
+  60,
+  60,
+  61,
+  61,
+  61,
+  62,
+  62,
+  62,
+  62,
+  63,
+  63,
+  63,
+  64,
+  64,
+  64,
+  65,
+  65,
+  65,
+  65,
+  66,
+  66,
+  66,
+  67,
+  67,
+  67,
+  68,
+  68,
+  68,
+  68,
+  69,
+  69,
+  69,
+  70,
+  70,
+  70,
+  71,
+  71,
+  71,
+  71,
+  72,
+  72,
+  72,
+  73,
+  73,
+  73,
+  74,
+  74,
+  74,
+  74,
+  75,
+  75,
+  75,
+  76,
+  76,
+  76,
+  77,
+  77,
+  77,
+  77,
+  78,
+  78,
+  78,
+  79,
+  79,
+  79,
+  80,
+  80,
+  80,
+  80,
+  81,
+  81,
+  81,
+  82,
+  82,
+  82,
+  83,
+  83,
+  83,
+  83,
+  84,
+  84,
+  84,
+  85,
+  85,
+  85,
+  86,
+  86,
+  86,
+  86,
+  87,
+  87,
+  87,
+  88,
+  88,
+  88,
+  89,
+  89,
+  89,
+  90,
+  90,
+  90,
+  90,
+  91,
+  91,
+  91,
+  92,
+  92,
+  92,
+  93,
+  93,
+  93,
+  93,
+  94,
+  94,
+  94,
+  95,
+  95,
+  95,
+  96,
+  96,
+  96,
+  96,
+  97,
+  97,
+  97,
+  98,
+  98,
+  98,
+  99,
+  99,
+  99,
+  99,
+  100,
+  100,
+  100,
+  101,
+  101,
+  101,
+  102,
+  102,
+  102,
+  102,
+  103,
+  103,
+  103,
+  104,
+  104,
+  104,
+  105,
+  105,
+  105,
+  105,
+  106,
+  106,
+  106,
+  107,
+  107,
+  107,
+  108,
+  108,
+  108,
+  108,
+  109,
+  109,
+  109,
+  110,
+  110,
+  110,
+  111,
+  111,
+  111,
+  111,
+  112,
+  112,
+  112,
+  113,
+  113,
+  113,
+  114,
+  114,
+  114,
+  114,
+  115,
+  115,
+  115,
+  116,
+  116,
+  116,
+  117,
+  117,
+  117,
+  117,
+  118,
+  118,
+  118,
+  119,
+  119,
+  119,
+  120,
+  120,
+  120,
+  121,
+  121,
+  121,
+  121,
+  122,
+  122,
+  122,
+  123,
+  123,
+  123,
+  124,
+  124,
+  124,
+  124,
+  125,
+  125,
+  125,
+  126,
+  126,
+  126,
+  127,
+  127,
+  127,
+  127,
+  128,
+  128,
+  128,
+  129,
+  129,
+  129,
+  130,
+  130,
+  130,
+  130,
+  131,
+  131,
+  131,
+  132,
+  132,
+  132,
+  133,
+  133,
+  133,
+  133,
+  134,
+  134,
+  134,
+  135,
+  135,
+  135,
+  136,
+  136,
+  136,
+  136,
+  137,
+  137,
+  137,
+  138,
+  138,
+  138,
+  139,
+  139,
+  139,
+  139,
+  140,
+  140,
+  140,
+  141,
+  141,
+  141,
+  142,
+  142,
+  142,
+  142,
+  143,
+  143,
+  143,
+  144,
+  144,
+  144,
+  145,
+  145,
+  145,
+  145,
+  146,
+  146,
+  146,
+  147,
+  147,
+  147,
+  148,
+  148,
+  148,
+  149,
+  149,
+  149,
+  149,
+  150,
+  150,
+  150,
+  151,
+  151,
+  151,
+  152,
+  152,
+  152,
+  152,
+  153,
+  153,
+  153,
+  154,
+  154,
+  154,
+  155,
+  155,
+  155,
+  155,
+  156,
+  156,
+  156,
+  157,
+  157,
+  157,
+  158,
+  158,
+  158,
+  158,
+  159,
+  159,
+  159,
+  160,
+  160,
+  160,
+  161,
+  161,
+  161,
+  161,
+  162,
+  162,
+  162,
+  163,
+  163,
+  163,
+  164,
+  164,
+  164,
+  164,
+  165,
+  165,
+  165,
+  166,
+  166,
+  166,
+  167,
+  167,
+  167,
+  167,
+  168,
+  168,
+  168,
+  169,
+  169,
+  169,
+  170,
+  170,
+  170,
+  170,
+  171,
+  171,
+  171,
+  172,
+  172,
+  172,
+  173,
+  173,
+  173,
+  173,
+  174,
+  174,
+  174,
+  175,
+  175,
+  175,
+  176,
+  176,
+  176,
+  176,
+  177,
+  177,
+  177,
+  178,
+  178,
+  178,
+  179,
+  179,
+  179,
+  180,
+  180,
+  180,
+  180,
+  181,
+  181,
+  181,
+  182,
+  182,
+  182,
+  183,
+  183,
+  183,
+  183,
+  184,
+  184,
+  184,
+  185,
+  185,
+  185,
+  186,
+  186,
+  186,
+  186,
+  187,
+  187,
+  187,
+  188,
+  188,
+  188,
+  189,
+  189,
+  189,
+  189,
+  190,
+  190,
+  190,
+  191,
+  191,
+  191,
+  192,
+  192,
+  192,
+  192,
+  193,
+  193,
+  193,
+  194,
+  194,
+  194,
+  195,
+  195,
+  195,
+  195,
+  196,
+  196,
+  196,
+  197,
+  197,
+  197,
+  198,
+  198,
+  198,
+  198,
+  199,
+  199,
+  199,
+  200,
+  200,
+  200,
+  201,
+  201,
+  201,
+  201,
+  202,
+  202,
+  202,
+  203,
+  203,
+  203,
+  204,
+  204,
+  204,
+  204,
+  205,
+  205,
+  205,
+  206,
+  206,
+  206,
+  207,
+  207,
+  207,
+  208,
+  208,
+  208,
+  208,
+  209,
+  209,
+  209,
+  210,
+  210,
+  210,
+  211,
+  211,
+  211,
+  211,
+  212,
+  212,
+  212,
+  213,
+  213,
+  213,
+  214,
+  214,
+  214,
+  214,
+  215,
+  215,
+  215,
+  216,
+  216,
+  216,
+  217,
+  217,
+  217,
+  217,
+  218,
+  218,
+  218,
+  219,
+  219,
+  219,
+  220,
+  220,
+  220,
+  220,
+  221,
+  221,
+  221,
+  222,
+  222,
+  222,
+  223,
+  223,
+  223,
+  223,
+  224,
+  224,
+  224,
+  225,
+  225,
+  225,
+  226,
+  226,
+  226,
+  226,
+  227,
+  227,
+  227,
+  228,
+  228,
+  228,
+  229,
+  229,
+  229,
+  229,
+  230,
+  230,
+  230,
+  231,
+  231,
+  231,
+  232,
+  232,
+  232,
+  232,
+  233,
+  233,
+  233,
+  234,
+  234,
+  234,
+  235,
+  235,
+  235,
+  236,
+  236,
+  236,
+  236,
+  237,
+  237,
+  237,
+  238,
+  238,
+  238,
+  239,
+  239,
+  239,
+  239,
+  240,
+  240,
+  240,
+  241,
+  241,
+  241,
+  242,
+  242,
+  242,
+  242,
+  243,
+  243,
+  243,
+  244,
+  244,
+  244,
+  245,
+  245,
+  245,
+  245,
+  246,
+  246,
+  246,
+  247,
+  247,
+  247,
+  248,
+  248,
+  248,
+  248,
+  249,
+  249,
+  249,
+  250,
+  250,
+  250,
+  251,
+  251,
+  251,
+  251,
+  252,
+  252,
+  252,
+  253,
+  253,
+  253,
+  254,
+  254,
+  254,
+  254,
+  255,
+  255,
+  255,
+  256,
+  256,
+  256,
+  257,
+  257,
+  257,
+  257,
+  258,
+  258,
+  258,
+  259,
+  259,
+  259,
+  260,
+  260,
+  260,
+  260,
+  261,
+  261,
+  261,
+  262,
+  262,
+  262,
+  263,
+  263,
+  263,
+  263,
+  264,
+  264,
+  264,
+  265,
+  265,
+  265,
+  266,
+  266,
+  266,
+  267,
+  267,
+  267,
+  267,
+  268,
+  268,
+  268,
+  269,
+  269,
+  269,
+  270,
+  270,
+  270,
+  270,
+  271,
+  271,
+  271,
+  272,
+  272,
+  272,
+  273,
+  273,
+  273,
+  273,
+  274,
+  274,
+  274,
+  275,
+  275,
+  275,
+  276,
+  276,
+  276,
+  276,
+  277,
+  277,
+  277,
+  278,
+  278,
+  278,
+  279,
+  279,
+  279,
+  279,
+  280,
+  280,
+  280,
+  281,
+  281,
+  281,
+  282,
+  282,
+  282,
+  282,
+  283,
+  283,
+  283,
+  284,
+  284,
+  284,
+  285,
+  285,
+  285,
+  285,
+  286,
+  286,
+  286,
+  287,
+  287,
+  287,
+  288,
+  288,
+  288,
+  288,
+  289,
+  289,
+  289,
+  290,
+  290,
+  290,
+  291,
+  291,
+  291,
+  291,
+  292,
+  292,
+  292,
+  293,
+  293,
+  293,
+  294,
+  294,
+  294,
+  295,
+  295,
+  295,
+  295,
+  296,
+  296,
+  296,
+  297,
+  297,
+  297,
+  298,
+  298,
+  298,
+  298,
+  299,
+  299,
+  299,
+  300,
+  300,
+  300,
+  301,
+  301,
+  301,
+  301,
+  302,
+  302,
+  302,
+  303,
+  303,
+  303,
+  304,
+  304,
+  304,
+  304,
+  305,
+  305,
+  305,
+  306,
+  306,
+  306,
+  307,
+  307,
+  307,
+  307,
+  308,
+  308,
+  308,
+  309,
+  309,
+  309,
+  310,
+  310,
+  310,
+  310,
+  311,
+  311,
+  311,
+  312,
+  312,
+  312,
+  313,
+  313,
+  313,
+  313,
+  314,
+  314,
+  314,
+  315,
+  315,
+  315,
+  316,
+  316,
+  316,
+  316,
+  317,
+  317,
+  317,
+  318,
+  318,
+  318,
+  319,
+  319,
+  319,
+  319,
+  320,
+  320,
+  320,
+  321,
+  321,
+  321,
+  322,
+  322,
+  322,
+  322,
+  323,
+  323,
+  323,
+  324,
+  324,
+  324,
+  325,
+  325,
+  325,
+  326,
+  326,
+  326,
+  326,
+  327,
+  327,
+  327,
+  328,
+  328,
+  328,
+  329,
+  329,
+  329,
+  329,
+  330,
+  330,
+  330,
+  331,
+  331,
+  331,
+  332,
+  332,
+  332,
+  332,
+  333,
+  333,
+  333,
+  334,
+  334,
+  334,
+  335,
+  335,
+  335,
+  335,
+  336,
+  336,
+  336,
+  337,
+  337,
+  337,
+  338,
+  338,
+  338,
+  338,
+  339,
+  339,
+  339,
+  340,
+  340,
+  340,
+  341,
+  341,
+  341,
+  341,
+  342,
+  342,
+  342,
+  343,
+  343,
+  343,
+  344,
+  344,
+  344,
+  344,
+  345,
+  345,
+  345,
+  346,
+  346,
+  346,
+  347,
+  347,
+  347,
+  347,
+  348,
+  348,
+  348,
+  349,
+  349,
+  349,
+  350,
+  350,
+  350,
+  350,
+  351,
+  351,
+  351,
+  352,
+  352,
+  352,
+  353,
+  353,
+  353,
+  354,
+  354,
+  354,
+  354,
+  355,
+  355,
+  355,
+  356,
+  356,
+  356,
+  357,
+  357,
+  357,
+  357,
+  358,
+  358,
+  358,
+  359,
+  359,
+  359,
+  360,
+  360,
+  360,
+  360,
+  361,
+  361,
+  361,
+  362,
+  362,
+  362,
+  363,
+  363,
+  363,
+  363,
+  364,
+  364,
+  364,
+  365,
+  365,
+  365,
+  366,
+  366,
+  366,
+  366,
+  367,
+  367,
+  367,
+  368,
+  368,
+  368,
+  369,
+  369,
+  369,
+  369,
+  370,
+  370,
+  370,
+  371,
+  371,
+  371,
+  372,
+  372,
+  372,
+  372,
+  373,
+  373,
+  373,
+  374,
+  374,
+  374,
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+  723,
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+  723,
+  723,
+  724,
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+  724,
+  725,
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+  728,
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+  729,
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+  729,
+  729,
+  730,
+  730,
+  730,
+  731,
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+  731,
+  732,
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+  732,
+  733,
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+  733,
+  733,
+  734,
+  734,
+  734,
+  735,
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+  735,
+  736,
+  736,
+  736,
+  736,
+  737,
+  737,
+  737,
+  738,
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+  738,
+  739,
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+  739,
+  739,
+  740,
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+  741,
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+  742,
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+  743,
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+  743,
+  744,
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+  745,
+  745,
+  746,
+  746,
+  746,
+  747,
+  747,
+  747,
+  748,
+  748,
+  748,
+  748,
+  749,
+  749,
+  749,
+  750,
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+  750,
+  751,
+  751,
+  751,
+  751,
+  752,
+  752,
+  752,
+  753,
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+  754,
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+  754,
+  755,
+  755,
+  755,
+  756,
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+  756,
+  757,
+  757,
+  757,
+  757,
+  758,
+  758,
+  758,
+  759,
+  759,
+  759,
+  760,
+  760,
+  760,
+  760,
+  761,
+  761,
+  761,
+  762,
+  762,
+  762,
+  763,
+  763,
+  763,
+  764,
+  764,
+  764,
+  764,
+  765,
+  765,
+  765,
+  766,
+  766,
+  766,
+  767,
+  767,
+};
+
+static const UINT256 multipliers1_bid64[] = { {{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
+{{0ull, 0ull, 0ull, 0ull}},
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+{{2138939251316236451ull, 5589948194650132134ull,
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+{{7806485479747067937ull, 12186036083155757396ull,
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+{{13068018922962131563ull, 15271701081584371842ull,
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+{{13681650228818157283ull, 6743689031058784691ull,
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+{{8916556383926762949ull, 13487378062117569383ull,
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+{{17833112767853525897ull, 8528012050525587150ull,
+  5493207715531443249ull, 10022474136428063862ull}},
+{{7255971368312615503ull, 5394951224847027753ull,
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+{{4230856559816364158ull, 4942573145013334082ull,
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+{{8461713119632728315ull, 9885146290026668164ull,
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+{{12760389068152276633ull, 16734424516972974925ull,
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+{{7074034062595001650ull, 15022104960236398235ull,
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+{{14148068125190003299ull, 11597465846763244854ull,
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+{{9849392176670454981ull, 4748187619816938093ull,
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+{{5659227250076001320ull, 12017683968189118588ull,
+  18420676183650915172ull, 2052602703140467478ull}},
+{{11318454500152002639ull, 5588623862668685560ull,
+  18394608293592278729ull, 4105205406280934957ull}},
+{{4190164926594453662ull, 11177247725337371121ull,
+  18342472513475005842ull, 8210410812561869915ull}},
+{{11906079429544621702ull, 9614147174551294870ull,
+  3668494502695001168ull, 1642082162512373983ull}},
+{{5365414785379691788ull, 781550275393038125ull, 7336989005390002337ull,
+  3284164325024747966ull}},
+{{10730829570759383576ull, 1563100550786076250ull,
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+{{5835514728893787039ull, 4001968924899125573ull,
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+{{453806117501133814ull, 3476508230902941730ull,
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+{{3780110038242137086ull, 4384650460922498669ull,
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+{{15120440152968548344ull, 17538601843689994676ull,
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+{{3024088030593709669ull, 18265115627705640228ull,
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+{{6048176061187419338ull, 18083487181701728840ull,
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+{{12096352122374838675ull, 17720230289693906064ull,
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+{{5745960171040125734ull, 16993716505678260513ull,
+  5388497965526861063ull, 10761549660241094136ull}},
+{{8527889663691845794ull, 18156138560103293395ull,
+  4767048407847282535ull, 2152309932048218827ull}},
+{{17055779327383691587ull, 17865533046497035174ull,
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+{{15664814581057831557ull, 17284322019284518733ull,
+  621449557679578527ull, 8609239728192875309ull}},
+{{17890358175179207605ull, 7146213218598814069ull,
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+{{17333972276648863593ull, 14292426437197628139ull,
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+{{16221200479588175569ull, 10138108800685704663ull,
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+{{3244240095917635114ull, 9406319389620961579ull,
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+{{6488480191835270228ull, 365894705532371542ull,
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+{{12976960383670540455ull, 731789411064743084ull,
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+{{7507176693631529294ull, 1463578822129486169ull,
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+{{1501435338726305859ull, 3982064579167807557ull,
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+{{3002870677452611718ull, 7964129158335615114ull,
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+{{6005741354905223435ull, 15928258316671230228ull,
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+{{12269194715206775657ull, 3185651663334246045ull,
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+{{6091645356703999697ull, 6371303326668492091ull,
+  10702781582174645400ull, 3526344592667801726ull}},
+{{12183290713407999394ull, 12742606653336984182ull,
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+{{17194053401649241172ull, 9927218960151217482ull,
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+{{15941362729588930728ull, 1407693846592883349ull,
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+{{13435981385468309839ull, 2815387693185766699ull,
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+{{8425218697227068061ull, 5630775386371533399ull,
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+{{5374392554187323936ull, 8504852706758127326ull, 208952346056334474ull,
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+{{10748785108374647871ull, 17009705413516254652ull,
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+{{3050826143039744126ull, 15572666753322957689ull,
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+{{4299514043349859149ull, 10493230980148412184ull,
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+{{8599028086699718297ull, 2539717886587272752ull, 334323753690135159ull,
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+{{17198056173399436594ull, 5079435773174545504ull,
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+{{14507657678905618289ull, 15773282413602550393ull,
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+{{10568571284101684961ull, 13099820753495549171ull,
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+{{2690398494493818305ull, 7752897433281546727ull,
+  15292313264871857547ull, 5777562980626926348ull}},
+{{5380796988987636610ull, 15505794866563093454ull,
+  12137882456034163478ull, 11555125961253852697ull}},
+{{15833554656765168615ull, 3101158973312618690ull,
+  9806274120690653342ull, 2311025192250770539ull}},
+{{13220365239820785614ull, 6202317946625237381ull,
+  1165804167671755068ull, 4622050384501541079ull}},
+{{7993986405932019612ull, 12404635893250474763ull,
+  2331608335343510136ull, 9244100769003082158ull}},
+{{8977494910670224569ull, 17238322437617736245ull,
+  11534368111294432996ull, 1848820153800616431ull}},
+{{17954989821340449138ull, 16029900801525920874ull,
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+{{17463235568971346659ull, 13613057529342290133ull,
+  9243984297758628755ull, 7395280615202465726ull}},
+{{18250042372761910625ull, 6411960320610368349ull,
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+{{18053340671814269633ull, 12823920641220736699ull,
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+{{17659937269918987650ull, 7201097208731921783ull,
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+{{16873130466128423684ull, 14402194417463843567ull,
+  7411677246929985362ull, 11832448984323945162ull}},
+{{7063974907967595060ull, 17637834142460410006ull,
+  8861033078869817718ull, 2366489796864789032ull}},
+{{14127949815935190120ull, 16828924211211268396ull,
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+{{9809155558160828624ull, 15211104348712985177ull,
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+{{1961831111632165725ull, 14110267313968328005ull,
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+{{7847324446528662900ull, 1100837034744657172ull,
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+{{5258813704047642904ull, 14977562665916572727ull,
+  14525498325857268115ull, 1514553469993464980ull}},
+{{10517627408095285807ull, 11508381258123593838ull,
+  10604252578004984615ull, 3029106939986929961ull}},
+{{2588510742481019997ull, 4570018442537636061ull,
+  2761761082300417615ull, 6058213879973859923ull}},
+{{5177021484962039993ull, 9140036885075272122ull,
+  5523522164600835230ull, 12116427759947719846ull}},
+{{12103450741218138969ull, 5517356191756964747ull,
+  4794053247662077369ull, 2423285551989543969ull}},
+{{5760157408726726321ull, 11034712383513929495ull,
+  9588106495324154738ull, 4846571103979087938ull}},
+{{11520314817453452641ull, 3622680693318307374ull,
+  729468916938757861ull, 9693142207958175877ull}},
+{{9682760592974511175ull, 11792582582889392444ull,
+  7524591412871572218ull, 1938628441591635175ull}},
+{{918777112239470733ull, 5138421092069233273ull,
+  15049182825743144437ull, 3877256883183270350ull}},
+{{1837554224478941466ull, 10276842184138466546ull,
+  11651621577776737258ull, 7754513766366540701ull}},
+{{367510844895788294ull, 16812763695795334602ull,
+  6019673130297257774ull, 1550902753273308140ull}},
+{{735021689791576587ull, 15178783317881117588ull,
+  12039346260594515549ull, 3101805506546616280ull}},
+{{1470043379583153173ull, 11910822562052683560ull,
+  5631948447479479483ull, 6203611013093232561ull}},
+{{2940086759166306346ull, 5374901050395815504ull,
+  11263896894958958967ull, 12407222026186465122ull}},
+{{11656063796058992239ull, 15832375469046804393ull,
+  9631477008475612439ull, 2481444405237293024ull}},
+{{4865383518408432862ull, 13218006864384057171ull,
+  816209943241673263ull, 4962888810474586049ull}},
+{{9730767036816865723ull, 7989269655058562726ull,
+  1632419886483346527ull, 9925777620949172098ull}},
+{{5635502222105283468ull, 1597853931011712545ull,
+  11394530421522400275ull, 1985155524189834419ull}},
+{{11271004444210566936ull, 3195707862023425090ull,
+  4342316769335248934ull, 3970311048379668839ull}},
+{{4095264814711582255ull, 6391415724046850181ull,
+  8684633538670497868ull, 7940622096759337678ull}},
+{{8197750592426137098ull, 4967631959551280359ull,
+  12804973151959830543ull, 1588124419351867535ull}},
+{{16395501184852274195ull, 9935263919102560718ull,
+  7163202230210109470ull, 3176248838703735071ull}},
+{{14344258295994996774ull, 1423783764495569821ull,
+  14326404460420218941ull, 6352497677407470142ull}},
+{{10241772518280441931ull, 2847567528991139643ull,
+  10206064847130886266ull, 12704995354814940285ull}},
+{{16805749762623729679ull, 4258862320540138251ull,
+  2041212969426177253ull, 2540999070962988057ull}},
+{{15164755451537907742ull, 8517724641080276503ull,
+  4082425938852354506ull, 5081998141925976114ull}},
+{{11882766829366263868ull, 17035449282160553007ull,
+  8164851877704709012ull, 10163996283851952228ull}},
+{{9755250995357073420ull, 3407089856432110601ull,
+  12701016819766672772ull, 2032799256770390445ull}},
+{{1063757917004595224ull, 6814179712864221203ull,
+  6955289565823793928ull, 4065598513540780891ull}},
+{{2127515834009190448ull, 13628359425728442406ull,
+  13910579131647587856ull, 8131197027081561782ull}},
+{{15182898425769479383ull, 13793718329371419450ull,
+  10160813455813338217ull, 1626239405416312356ull}},
+{{11919052777829407149ull, 9140692585033287285ull,
+  1874882837917124819ull, 3252478810832624713ull}},
+{{5391361481949262682ull, 18281385170066574571ull,
+  3749765675834249638ull, 6504957621665249426ull}},
+{{1078272296389852537ull, 18413672292980956207ull,
+  4439301949908760250ull, 1300991524333049885ull}},
+{{2156544592779705073ull, 18380600512252360798ull,
+  8878603899817520501ull, 2601983048666099770ull}},
+{{4313089185559410146ull, 18314456950795169980ull,
+  17757207799635041003ull, 5203966097332199540ull}},
+{{8626178371118820291ull, 18182169827880788344ull,
+  17067671525560530391ull, 10407932194664399081ull}},
+{{5414584488965674382ull, 11015131595059978315ull,
+  7102883119854016401ull, 2081586438932879816ull}},
+{{10829168977931348763ull, 3583519116410405014ull,
+  14205766239708032803ull, 4163172877865759632ull}},
+{{3211593882153145910ull, 7167038232820810029ull,
+  9964788405706513990ull, 8326345755731519265ull}},
+{{15399714035398270475ull, 1433407646564162005ull,
+  1992957681141302798ull, 1665269151146303853ull}},
+{{12352683997086989334ull, 2866815293128324011ull,
+  3985915362282605596ull, 3330538302292607706ull}},
+{{6258623920464427051ull, 5733630586256648023ull,
+  7971830724565211192ull, 6661076604585215412ull}},
+{{8630422413576706057ull, 15904121376218970897ull,
+  8973063774396862884ull, 1332215320917043082ull}},
+{{17260844827153412114ull, 13361498678728390178ull,
+  17946127548793725769ull, 2664430641834086164ull}}
+};
+
+static const UINT256 multipliers2_bid64[] =
+  { {{9438227768328448678ull, 4145630637659340425ull,
+      17596454752367787604ull, 34ull}},
+{{429711462947345740ull, 8291261275318680851ull,
+  16746165431026023592ull, 69ull}},
+{{859422925894691480ull, 16582522550637361702ull,
+  15045586788342495568ull, 139ull}},
+{{1718845851789382959ull, 14718301027565171788ull,
+  11644429502975439521ull, 279ull}},
+{{3437691703578765918ull, 10989857981420791960ull,
+  4842114932241327427ull, 559ull}},
+{{6875383407157531835ull, 3532971889132032304ull,
+  9684229864482654855ull, 1118ull}},
+{{13750766814315063670ull, 7065943778264064608ull,
+  921715655255758094ull, 2237ull}},
+{{9054789554920575724ull, 14131887556528129217ull,
+  1843431310511516188ull, 4474ull}},
+{{18109579109841151448ull, 9817031039346706818ull,
+  3686862621023032377ull, 8948ull}},
+{{17772414145972751280ull, 1187318004983862021ull,
+  7373725242046064755ull, 17896ull}},
+{{17098084218235950944ull, 2374636009967724043ull,
+  14747450484092129510ull, 35792ull}},
+{{15749424362762350272ull, 4749272019935448087ull,
+  11048156894474707404ull, 71585ull}},
+{{13052104651815148928ull, 9498544039870896175ull,
+  3649569715239863192ull, 143171ull}},
+{{7657465229920746239ull, 550344006032240735ull, 7299139430479726385ull,
+  286342ull}},
+{{15314930459841492478ull, 1100688012064481470ull,
+  14598278860959452770ull, 572684ull}},
+{{12183116845973433340ull, 2201376024128962941ull,
+  10749813648209353924ull, 1145369ull}},
+{{5919489618237315063ull, 4402752048257925883ull,
+  3052883222709156232ull, 2290739ull}},
+{{11838979236474630126ull, 8805504096515851766ull,
+  6105766445418312464ull, 4581478ull}},
+{{5231214399239708635ull, 17611008193031703533ull,
+  12211532890836624928ull, 9162956ull}},
+{{10462428798479417270ull, 16775272312353855450ull,
+  5976321707963698241ull, 18325913ull}},
+{{2478113523249282924ull, 15103800550998159285ull,
+  11952643415927396483ull, 36651826ull}},
+{{4956227046498565847ull, 11760857028286766954ull,
+  5458542758145241351ull, 73303653ull}},
+{{9912454092997131693ull, 5074969982863982292ull,
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+{{2420690148243627794ull, 12171517682577123919ull,
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+{{4841380296487255588ull, 5896291291444696222ull,
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+{{12041123147907417542ull, 10022299002360632080ull,
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+{{17165619888549124802ull, 16761855059439767708ull,
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+{{15884495703388697987ull, 15076966045169983801ull,
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+{{9018247747969048066ull, 12061572836135987041ull,
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+{{7050498767266656259ull, 851772464108027650ull, 7786940223369056097ull,
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+{{14100997534533312518ull, 1703544928216055300ull,
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+{{6509548321648572827ull, 4030057800385121383ull,
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+{{13019096643297145654ull, 8060115600770242766ull,
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+{{7591449212884739692ull, 16120231201540485533ull,
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+{{16275685101544589232ull, 6913395055050007429ull,
+  12084127789807064791ull, 162623940541631235ull}},
+{{14104626129379626847ull, 13826790110100014859ull,
+  5721511505904577966ull, 325247881083262471ull}},
+{{9762508185049702077ull, 9206836146490478103ull,
+  11443023011809155933ull, 650495762166524942ull}},
+{{13020548081235671385ull, 1841367229298095620ull,
+  9667302231845651833ull, 130099152433304988ull}},
+{{7594352088761791154ull, 3682734458596191241ull, 887860389981752050ull,
+  260198304866609977ull}},
+{{15188704177523582308ull, 7365468917192382482ull,
+  1775720779963504100ull, 520396609733219954ull}},
+{{11930664281337612999ull, 14730937834384764965ull,
+  3551441559927008200ull, 1040793219466439908ull}},
+{{13454179300493253570ull, 14014234011102683962ull,
+  11778334756211132609ull, 208158643893287981ull}},
+{{8461614527276955523ull, 9581723948495816309ull,
+  5109925438712713603ull, 416317287786575963ull}},
+{{16923229054553911046ull, 716703823282081002ull,
+  10219850877425427207ull, 832634575573151926ull}},
+{{3384645810910782210ull, 11211387208882147170ull,
+  5733318990226995764ull, 166526915114630385ull}},
+{{6769291621821564419ull, 3976030344054742724ull,
+  11466637980453991529ull, 333053830229260770ull}},
+{{13538583243643128837ull, 7952060688109485448ull,
+  4486531887198431442ull, 666107660458521541ull}},
+{{6397065463470536091ull, 12658458581847628059ull,
+  4586655192181596611ull, 133221532091704308ull}},
+{{12794130926941072181ull, 6870173089985704502ull,
+  9173310384363193223ull, 266443064183408616ull}}
+};
+
+static const UINT128 coefflimits_bid64[] = { {{10000000000000000ull, 0ull}},
+{{2000000000000000ull, 0ull}},
+{{400000000000000ull, 0ull}},
+{{80000000000000ull, 0ull}},
+{{16000000000000ull, 0ull}},
+{{3200000000000ull, 0ull}},
+{{640000000000ull, 0ull}},
+{{128000000000ull, 0ull}},
+{{25600000000ull, 0ull}},
+{{5120000000ull, 0ull}},
+{{1024000000ull, 0ull}},
+{{204800000ull, 0ull}},
+{{40960000ull, 0ull}},
+{{8192000ull, 0ull}},
+{{1638400ull, 0ull}},
+{{327680ull, 0ull}},
+{{65536ull, 0ull}},
+{{13107ull, 0ull}},
+{{2621ull, 0ull}},
+{{524ull, 0ull}},
+{{104ull, 0ull}},
+{{20ull, 0ull}},
+{{4ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}},
+{{0ull, 0ull}}
+};
+
+// **********************************************************************
+
+static const UINT128 coefflimits_bid128[] =
+  { {{4003012203950112768ull, 542101086242752ull}},
+{{8179300070273843200ull, 108420217248550ull}},
+{{1635860014054768640ull, 21684043449710ull}},
+{{327172002810953728ull, 4336808689942ull}},
+{{7444132030046011392ull, 867361737988ull}},
+{{12556872850234933248ull, 173472347597ull}},
+{{9890072199530807296ull, 34694469519ull}},
+{{16735409698873802752ull, 6938893903ull}},
+{{14415128384000491520ull, 1387778780ull}},
+{{2883025676800098304ull, 277555756ull}},
+{{4265953950101929984ull, 55511151ull}},
+{{4542539604762296320ull, 11102230ull}},
+{{908507920952459264ull, 2220446ull}},
+{{3871050398932402176ull, 444089ull}},
+{{15531605338754121728ull, 88817ull}},
+{{10485018697234644992ull, 17763ull}},
+{{13165050183672659968ull, 3552ull}},
+{{10011707666218352640ull, 710ull}},
+{{2002341533243670528ull, 142ull}},
+{{7779165936132554752ull, 28ull}},
+{{12623879631452241920ull, 5ull}},
+{{2524775926290448384ull, 1ull}},
+{{4194304000000000000ull, 0ull}},
+{{838860800000000000ull, 0ull}},
+{{167772160000000000ull, 0ull}},
+{{33554432000000000ull, 0ull}},
+{{6710886400000000ull, 0ull}},
+{{1342177280000000ull, 0ull}},
+{{268435456000000ull, 0ull}},
+{{53687091200000ull, 0ull}},
+{{10737418240000ull, 0ull}},
+{{2147483648000ull, 0ull}},
+{{429496729600ull, 0ull}},
+{{85899345920ull, 0ull}},
+{{17179869184ull, 0ull}},
+{{3435973836ull, 0ull}},
+{{687194767ull, 0ull}},
+{{137438953ull, 0ull}},
+{{27487790ull, 0ull}},
+{{5497558ull, 0ull}},
+{{1099511ull, 0ull}},
+{{219902ull, 0ull}},
+{{43980ull, 0ull}},
+{{8796ull, 0ull}},
+{{1759ull, 0ull}},
+{{351ull, 0ull}},
+{{70ull, 0ull}},
+{{14ull, 0ull}},
+{{2ull, 0ull}}
+};
+
+// These are the different, bipartite, tables for conversion to bid128
+// Using the same approach, the tables become extremely large
+// And things are more amenable here since there's never overflow/underflow
+
+static const UINT256 outertable_sig[] =
+  { {{16710528681477587410ull, 1427578414467097172ull,
+      17470362193306814444ull, 17633471421292828081ull}},
+{{15880413049339289368ull, 3169162604521042544ull,
+  12421848348224877000ull, 10175591536883283100ull}},
+{{728324709502741634ull, 5487234822932806241ull,
+  14277366029702694882ull, 11743877385420605756ull}},
+{{5270439690693945016ull, 5335305964155802506ull,
+  4731239033579481048ull, 13553871098685738146ull}},
+{{15770926697301461842ull, 17478494563481727979ull,
+  12172666691698088779ull, 15642825255298684824ull}},
+{{6706015564063194464ull, 9524484409513358023ull,
+  3584925281718916951ull, 18053733887991431306ull}},
+{{11970480524618434228ull, 11405570099769256704ull,
+  15462553542164535233ull, 10418108684938663938ull}},
+{{6786207772287397676ull, 2319456072422691258ull,
+  3306628541457879036ull, 12023771840725819358ull}},
+{{11981052113010165492ull, 3504057943690712651ull,
+  1876153621163772099ull, 13876903538819465956ull}},
+{{9393164661428669080ull, 12786250932199773041ull,
+  1469280998340568779ull, 16015644206874417279ull}},
+{{16924685242153318850ull, 18017830257179898541ull,
+  8443357802200517361ull, 9242006282008467740ull}},
+{{10964968671057563176ull, 5039440430669711539ull,
+  5426243050445487622ull, 10666405798403203685ull}},
+{{10955754838860298353ull, 7697974614691938479ull,
+  5802604364043796934ull, 12310337083160321132ull}},
+{{2020816881108765590ull, 11827301330378587775ull,
+  11428107909474365520ull, 14207634883319258514ull}},
+{{17088069107880998350ull, 4283872614129133981ull,
+  3596834484036483711ull, 16397348635874181367ull}},
+{{17878879927905357932ull, 16765016545576715295ull,
+  16689816215723394984ull, 9462273083962776199ull}},
+{{13121733289080687293ull, 18283685101712419716ull,
+  16276586284347626380ull, 10920620632484725600ull}},
+{{17814811358648632259ull, 13245640156276305425ull,
+  16363965810173909683ull, 12603732099085151178ull}},
+{{4756697993914874888ull, 11508234184157253656ull,
+  5137266535116401279ull, 14546248621894116172ull}},
+{{5318236458935323174ull, 6543830884414701181ull,
+  6453355338781772809ull, 16788150311867950084ull}},
+{{6485710970464102310ull, 9658720758000782538ull,
+  1405691438411884535ull, 9687789553853107178ull}},
+{{16668567668910748869ull, 7353216905500064137ull,
+  16398637311140236340ull, 11180894225541718927ull}},
+{{10250898639443956700ull, 17209112682100433509ull,
+  10404161081088486903ull, 12904119664018836844ull}},
+{{8190593687966138954ull, 9395575747272723417ull,
+  5270639644724875979ull, 14892932617404296676ull}},
+{{16096765186944088526ull, 5812137315202163815ull,
+  13827109944906121794ull, 17188266051577202911ull}},
+{{13125058493821651226ull, 13878096157524874998ull,
+  7819283672493662452ull, 9918680808189048078ull}},
+{{10784977039313888136ull, 7095114120404217728ull,
+  5980679097159643429ull, 11447370977331402726ull}},
+{{18074025829186132275ull, 1141984379626550674ull,
+  7557580538320593620ull, 13211666432945230258ull}},
+{{884127375074722974ull, 5630658839879210216ull, 8888788495242174599ull,
+  15247879210087606793ull}},
+{{14794677677148287412ull, 15991859528909753139ull,
+  2255166953101703543ull, 17597917839164816062ull}},
+{{11781503818372409883ull, 16487377189598053250ull,
+  1614766483381505408ull, 10155074945409931597ull}},
+{{13901203812957478350ull, 17671725616207330354ull,
+  9774501520532043416ull, 11720198729122693309ull}},
+{{2841277750318224700ull, 62614824260888948ull, 7875289095414864909ull,
+  13526543032773672749ull}},
+{{4177215723684349918ull, 5549883551398310595ull,
+  6548711429670794128ull, 15611285324269742443ull}},
+{{10113135653152274419ull, 1238174514434849746ull,
+  15010187426055142985ull, 18017332949391848572ull}},
+{{15332868447221136909ull, 16659234357027498643ull,
+  8156814090647504084ull, 10397103116953834012ull}},
+{{15245187402216469644ull, 12129929088655149192ull,
+  9861651730211963150ull, 11999528845718521943ull}},
+{{11169863271521019024ull, 11690833164181629132ull,
+  18055231442152805128ull, 13848924157002783033ull}},
+{{5681139181384005971ull, 16315598095635316730ull,
+  12429006944274865118ull, 15983352577617880224ull}},
+{{0ull, 0ull, 0ull, 9223372036854775808ull}},
+{{847738094735128551ull, 159020156881263929ull, 14298703881791668535ull,
+  10644899600020376799ull}},
+{{12571812103339493257ull, 9592188640606484874ull,
+  15977522551232326327ull, 12285516299433008781ull}},
+{{11255846670375652269ull, 16219642565822741785ull,
+  1164180458167399492ull, 14178988662640388631ull}},
+{{4768530159026621925ull, 11269558331910606010ull,
+  14728279675391465720ull, 16364287392998134214ull}},
+{{10435171899994305314ull, 3358688235984080491ull,
+  10873005112892106269ull, 9443194724678278428ull}},
+{{9001934648837042518ull, 12742858465034581069ull,
+  7821978264675184102ull, 10898601872067700364ull}},
+{{17621267265258286727ull, 4697230115438671198ull,
+  9730745556445007669ull, 12578319756070083561ull}},
+{{15489206033570711069ull, 5939008219696634639ull,
+  7281543418588385486ull, 14516919669433371671ull}},
+{{5582382164278045428ull, 1021128504191590019ull,
+  15859662269683349667ull, 16754301112998936544ull}},
+{{13306060077138970688ull, 17077419079040409017ull,
+  602300193611639289ull, 9668256495766433483ull}},
+{{16144900726383728979ull, 6332437060439625781ull,
+  3394061071468721991ull, 11158350687084940805ull}},
+{{841527738022137013ull, 8576187517129556015ull, 4780478900157118356ull,
+  12878101662951253988ull}},
+{{6209518431268106959ull, 6563228687006195825ull,
+  8680557599339190037ull, 14862904661462481806ull}},
+{{13777918056850427098ull, 13980713634323581067ull,
+  3260730320187665275ull, 17153610117183879308ull}},
+{{14026398967643035423ull, 16044002814696042637ull,
+  13563648246219923183ull, 9898682214361989196ull}},
+{{8580849201736980837ull, 7652064075251385167ull,
+  12055336643618066002ull, 11424290153682525668ull}},
+{{7703450277136593061ull, 30939122015382097ull, 1733744904199768989ull,
+  13185028339041359606ull}},
+{{16645858086931268484ull, 268706294728574543ull,
+  4562366333509913804ull, 15217135591158481007ull}},
+{{1535817262145462730ull, 16249574698204674087ull,
+  1726174694286833848ull, 17562435942139069664ull}},
+{{1327779613951528273ull, 12607890553358950732ull,
+  6773080245737622022ull, 10134599720625107110ull}},
+{{10146669700226523625ull, 6816618733538609533ull,
+  17338427607494047961ull, 11696567815043613180ull}},
+{{1218646606393179524ull, 8053984438814192242ull,
+  5512554737593155320ull, 13499270067222312908ull}},
+{{8529816360522570005ull, 2898610325645650649ull,
+  12799329154556421864ull, 15579808985797328396ull}},
+{{8976626101186384018ull, 17306366585957786234ull,
+  18289272351796647404ull, 17981005404381600394ull}},
+{{13259258789938866699ull, 3853966764738768487ull,
+  3962898110873089456ull, 10376139901559067117ull}},
+{{899097863387258947ull, 18205835716688941338ull,
+  5828614502416977816ull, 11975334730781032005ull}},
+{{6805696657844643720ull, 11269663690239600300ull,
+  15713752492130876427ull, 13821001188766021149ull}},
+{{1390669429605106863ull, 9874674503958832077ull,
+  10784451562526769943ull, 15951126056533488631ull}},
+{{5704986635434998471ull, 13359511205918707297ull,
+  13484363347568202582ull, 18409550726197325520ull}},
+{{8031416311578790746ull, 15203770801091158414ull,
+  10108131133879485063ull, 10623436763626360685ull}},
+{{14540970352057967818ull, 10823414366732926995ull,
+  16152175176069010361ull, 12260745560745135745ull}},
+{{15950896424073439808ull, 7311065895593189991ull,
+  14504991862333000338ull, 14150400200058902426ull}},
+{{5978819348613013533ull, 5596367464999577452ull,
+  9804643584580705193ull, 16331292810031855499ull}},
+{{8586457898440847299ull, 6018330550275346810ull,
+  7956755163056284140ull, 9424154832238877876ull}},
+{{1114429888821394320ull, 1760611426277998851ull,
+  9839409379426382903ull, 10876627507095459665ull}},
+{{7554605751361075608ull, 6504275622057553570ull,
+  9148491728899045148ull, 12552958650829068784ull}},
+{{9208049516541304162ull, 15518058123431536615ull,
+  17563500997894963674ull, 14487649851631658771ull}},
+{{1484107481346855224ull, 16657394431011607502ull,
+  12009304572091620947ull, 16720520162760224108ull}},
+{{14325586681310127114ull, 11250726580617083666ull,
+  2403442209646777766ull, 9648762821313776241ull}},
+{{14963893077912294692ull, 3450059817568720983ull,
+  15313875826588494017ull, 11135852602159508258ull}}
+};
+
+static const UINT256 innertable_sig[] =
+  { {{1014026100135492416ull, 3035406636157676337ull,
+      4549648098962661924ull, 12141680576410806693ull}},
+{{5879218643596753424ull, 3794258295197095421ull,
+  10298746142130715309ull, 15177100720513508366ull}},
+{{5980354661461664842ull, 4677254443711878590ull,
+  1825030320404309164ull, 9485687950320942729ull}},
+{{16698815363681856860ull, 5846568054639848237ull,
+  6892973918932774359ull, 11857109937901178411ull}},
+{{7038461149320157363ull, 2696524049872422393ull,
+  4004531380238580045ull, 14821387422376473014ull}},
+{{15928253264393568112ull, 3991170540383957947ull,
+  16337890167931276240ull, 9263367138985295633ull}},
+{{15298630562064572236ull, 4988963175479947434ull,
+  6587304654631931588ull, 11579208923731619542ull}},
+{{9899916165725939487ull, 6236203969349934293ull,
+  17457502855144690293ull, 14474011154664524427ull}},
+{{16986581225584812263ull, 12406940980114805770ull,
+  17210192550503474962ull, 18092513943330655534ull}},
+{{15228299284417895569ull, 12366024130999141510ull,
+  6144684325637283947ull, 11307821214581659709ull}},
+{{9812002068667593653ull, 10845844145321538984ull,
+  12292541425473992838ull, 14134776518227074636ull}},
+{{12265002585834492066ull, 4333933144797147922ull,
+  15365676781842491048ull, 17668470647783843295ull}},
+{{12277312634573945445ull, 2708708215498217451ull,
+  16521077016292638761ull, 11042794154864902059ull}},
+{{10734954774790043902ull, 7997571287800159718ull,
+  16039660251938410547ull, 13803492693581127574ull}},
+{{4195321431632779070ull, 5385278091322811744ull,
+  10826203278068237376ull, 17254365866976409468ull}},
+{{2622075894770486919ull, 3365798807076757340ull,
+  15989749085647424168ull, 10783978666860255917ull}},
+{{3277594868463108648ull, 4207248508845946675ull,
+  6152128301777116498ull, 13479973333575319897ull}},
+{{17932051640861049522ull, 14482432672912209151ull,
+  12301846395648783526ull, 16849966666969149871ull}},
+{{18125061303179237808ull, 4439834402142742815ull,
+  14606183024921571560ull, 10531229166855718669ull}},
+{{18044640610546659355ull, 5549793002678428519ull,
+  4422670725869800738ull, 13164036458569648337ull}},
+{{17944114744755936290ull, 16160613290202811457ull,
+  10140024425764638826ull, 16455045573212060421ull}},
+{{4297542687831378326ull, 14712069324804145065ull,
+  8643358275316593218ull, 10284403483257537763ull}},
+{{9983614378216610811ull, 9166714619150405523ull,
+  6192511825718353619ull, 12855504354071922204ull}},
+{{7867831954343375609ull, 6846707255510619000ull,
+  7740639782147942024ull, 16069380442589902755ull}},
+{{4917394971464609756ull, 4279192034694136875ull,
+  2532056854628769813ull, 10043362776618689222ull}},
+{{1535057695903374291ull, 9960676061795058998ull,
+  12388443105140738074ull, 12554203470773361527ull}},
+{{11142194156733993672ull, 3227473040389047939ull,
+  10873867862998534689ull, 15692754338466701909ull}},
+{{4658028338745052093ull, 13546385696311624722ull,
+  9102010423587778132ull, 9807971461541688693ull}},
+{{15045907460286090924ull, 16932982120389530902ull,
+  15989199047912110569ull, 12259964326927110866ull}},
+{{9584012288502837847ull, 7331169595204749916ull,
+  10763126773035362404ull, 15324955408658888583ull}},
+{{15213379717169049462ull, 13805353033857744505ull,
+  13644483260788183358ull, 9578097130411805364ull}},
+{{5181666591179148116ull, 8033319255467404824ull,
+  17055604075985229198ull, 11972621413014756705ull}},
+{{6477083238973935145ull, 818277032479480222ull, 7484447039699372786ull,
+  14965776766268445882ull}},
+{{17883235079640873178ull, 5123109163727063042ull,
+  9289465418239495895ull, 9353610478917778676ull}},
+{{13130671812696315664ull, 1792200436231440899ull,
+  11611831772799369869ull, 11692013098647223345ull}},
+{{11801653747443006676ull, 6851936563716689028ull,
+  679731660717048624ull, 14615016373309029182ull}},
+{{14752067184303758345ull, 8564920704645861285ull,
+  10073036612751086588ull, 18268770466636286477ull}},
+{{11525884999403542918ull, 14576447477258439111ull,
+  8601490892183123069ull, 11417981541647679048ull}},
+{{9795670230827040743ull, 4385501291290885177ull,
+  10751863615228903837ull, 14272476927059598810ull}},
+{{16856273806961188833ull, 10093562632540994375ull,
+  4216457482181353988ull, 17840596158824498513ull}},
+{{17452700156991824877ull, 15531848682192897292ull,
+  14164500972431816002ull, 11150372599265311570ull}},
+{{3369131122530229480ull, 10191438815886345808ull,
+  8482254178684994195ull, 13937965749081639463ull}},
+{{4211413903162786849ull, 8127612501430544356ull,
+  5991131704928854840ull, 17422457186352049329ull}},
+{{11855505726331517589ull, 5079757813394090222ull,
+  15273672361649004035ull, 10889035741470030830ull}},
+{{5596010121059621178ull, 1738011248315224874ull,
+  9868718415206479236ull, 13611294676837538538ull}},
+{{16218384688179302281ull, 2172514060394031092ull,
+  3112525982153323237ull, 17014118346046923173ull}},
+{{913118393257288118ull, 3663664296959963385ull, 4251171748059520975ull,
+  10633823966279326983ull}},
+{{5753084009998998051ull, 18414638426482117943ull,
+  702278666647013314ull, 13292279957849158729ull}},
+{{2579668994071359659ull, 13794925996247871621ull,
+  5489534351736154547ull, 16615349947311448411ull}},
+{{3918136130508293739ull, 6315985738441225811ull,
+  1125115960621402640ull, 10384593717069655257ull}},
+{{285984144707979270ull, 7894982173051532264ull, 6018080969204141204ull,
+  12980742146337069071ull}},
+{{357480180884974087ull, 9868727716314415330ull, 2910915193077788601ull,
+  16225927682921336339ull}},
+{{4835111131480496709ull, 17697169868764979341ull,
+  17960223060169475539ull, 10141204801825835211ull}},
+{{10655574932778008790ull, 17509776317528836272ull,
+  17838592806784456520ull, 12676506002282294014ull}},
+{{13319468665972510987ull, 3440476323201493724ull,
+  13074868971625794843ull, 15845632502852867518ull}},
+{{17548039953087595175ull, 18291198766496791241ull,
+  3560107088838733872ull, 9903520314283042199ull}},
+{{8099991886077330257ull, 4417254384411437436ull,
+  18285191916330581053ull, 12379400392853802748ull}},
+{{10124989857596662821ull, 10133253998941684699ull,
+  4409745821703674700ull, 15474250491067253436ull}},
+{{4022275651784220311ull, 15556655786193328745ull,
+  11979463175419572495ull, 9671406556917033397ull}},
+{{9639530583157663293ull, 14834133714314273027ull,
+  1139270913992301907ull, 12089258196146291747ull}},
+{{7437727210519691212ull, 13930981124465453380ull,
+  15259146697772541096ull, 15111572745182864683ull}},
+{{13871951543429582816ull, 8706863202790908362ull,
+  7231123676894144233ull, 9444732965739290427ull}},
+{{8116567392432202712ull, 15495265021916023357ull,
+  4427218577690292387ull, 11805916207174113034ull}},
+{{14757395258967641293ull, 14757395258967641292ull,
+  14757395258967641292ull, 14757395258967641292ull}},
+{{0ull, 0ull, 0ull, 9223372036854775808ull}},
+{{0ull, 0ull, 0ull, 11529215046068469760ull}},
+{{0ull, 0ull, 0ull, 14411518807585587200ull}},
+{{0ull, 0ull, 0ull, 18014398509481984000ull}},
+{{0ull, 0ull, 0ull, 11258999068426240000ull}},
+{{0ull, 0ull, 0ull, 14073748835532800000ull}},
+{{0ull, 0ull, 0ull, 17592186044416000000ull}},
+{{0ull, 0ull, 0ull, 10995116277760000000ull}},
+{{0ull, 0ull, 0ull, 13743895347200000000ull}},
+{{0ull, 0ull, 0ull, 17179869184000000000ull}},
+{{0ull, 0ull, 0ull, 10737418240000000000ull}},
+{{0ull, 0ull, 0ull, 13421772800000000000ull}},
+{{0ull, 0ull, 0ull, 16777216000000000000ull}},
+{{0ull, 0ull, 0ull, 10485760000000000000ull}},
+{{0ull, 0ull, 0ull, 13107200000000000000ull}},
+{{0ull, 0ull, 0ull, 16384000000000000000ull}},
+{{0ull, 0ull, 0ull, 10240000000000000000ull}},
+{{0ull, 0ull, 0ull, 12800000000000000000ull}},
+{{0ull, 0ull, 0ull, 16000000000000000000ull}},
+{{0ull, 0ull, 0ull, 10000000000000000000ull}},
+{{0ull, 0ull, 0ull, 12500000000000000000ull}},
+{{0ull, 0ull, 0ull, 15625000000000000000ull}},
+{{0ull, 0ull, 0ull, 9765625000000000000ull}},
+{{0ull, 0ull, 0ull, 12207031250000000000ull}},
+{{0ull, 0ull, 0ull, 15258789062500000000ull}},
+{{0ull, 0ull, 0ull, 9536743164062500000ull}},
+{{0ull, 0ull, 0ull, 11920928955078125000ull}},
+{{0ull, 0ull, 0ull, 14901161193847656250ull}},
+{{0ull, 0ull, 4611686018427387904ull, 9313225746154785156ull}},
+{{0ull, 0ull, 5764607523034234880ull, 11641532182693481445ull}},
+{{0ull, 0ull, 11817445422220181504ull, 14551915228366851806ull}},
+{{0ull, 0ull, 5548434740920451072ull, 18189894035458564758ull}},
+{{0ull, 0ull, 17302829768357445632ull, 11368683772161602973ull}},
+{{0ull, 0ull, 7793479155164643328ull, 14210854715202003717ull}},
+{{0ull, 0ull, 14353534962383192064ull, 17763568394002504646ull}},
+{{0ull, 0ull, 4359273333062107136ull, 11102230246251565404ull}},
+{{0ull, 0ull, 5449091666327633920ull, 13877787807814456755ull}},
+{{0ull, 0ull, 2199678564482154496ull, 17347234759768070944ull}},
+{{0ull, 0ull, 1374799102801346560ull, 10842021724855044340ull}},
+{{0ull, 0ull, 1718498878501683200ull, 13552527156068805425ull}},
+{{0ull, 0ull, 6759809616554491904ull, 16940658945086006781ull}},
+{{0ull, 0ull, 6530724019560251392ull, 10587911840678754238ull}},
+{{0ull, 0ull, 17386777061305090048ull, 13234889800848442797ull}},
+{{0ull, 0ull, 7898413271349198848ull, 16543612251060553497ull}},
+{{0ull, 0ull, 16465723340661719040ull, 10339757656912845935ull}},
+{{0ull, 0ull, 15970468157399760896ull, 12924697071141057419ull}},
+{{0ull, 0ull, 15351399178322313216ull, 16155871338926321774ull}},
+{{0ull, 0ull, 4982938468024057856ull, 10097419586828951109ull}},
+{{0ull, 0ull, 10840359103457460224ull, 12621774483536188886ull}},
+{{0ull, 0ull, 4327076842467049472ull, 15777218104420236108ull}},
+{{0ull, 0ull, 11927795063396681728ull, 9860761315262647567ull}},
+{{0ull, 0ull, 10298057810818464256ull, 12325951644078309459ull}},
+{{0ull, 0ull, 8260886245095692416ull, 15407439555097886824ull}},
+{{0ull, 0ull, 5163053903184807760ull, 9629649721936179265ull}},
+{{0ull, 0ull, 11065503397408397604ull, 12037062152420224081ull}},
+{{0ull, 0ull, 18443565265187884909ull, 15046327690525280101ull}},
+{{0ull, 2305843009213693952ull, 13833071299956122020ull,
+  9403954806578300063ull}},
+{{0ull, 2882303761517117440ull, 12679653106517764621ull,
+  11754943508222875079ull}},
+{{0ull, 8214565720323784704ull, 11237880364719817872ull,
+  14693679385278593849ull}},
+{{0ull, 10268207150404730880ull, 212292400617608628ull,
+  18367099231598242312ull}},
+{{0ull, 15641001505857732608ull, 132682750386005392ull,
+  11479437019748901445ull}},
+{{0ull, 1104507808612614144ull, 4777539456409894645ull,
+  14349296274686126806ull}},
+{{0ull, 5992320779193155584ull, 15195296357367144114ull,
+  17936620343357658507ull}},
+{{0ull, 8356886505423110144ull, 7191217214140771119ull,
+  11210387714598536567ull}}
+};
+
+static const int outertable_exp[] = { -16839,
+  -16413,
+  -15988,
+  -15563,
+  -15138,
+  -14713,
+  -14287,
+  -13862,
+  -13437,
+  -13012,
+  -12586,
+  -12161,
+  -11736,
+  -11311,
+  -10886,
+  -10460,
+  -10035,
+  -9610,
+  -9185,
+  -8760,
+  -8334,
+  -7909,
+  -7484,
+  -7059,
+  -6634,
+  -6208,
+  -5783,
+  -5358,
+  -4933,
+  -4508,
+  -4082,
+  -3657,
+  -3232,
+  -2807,
+  -2382,
+  -1956,
+  -1531,
+  -1106,
+  -681,
+  -255,
+  170,
+  595,
+  1020,
+  1445,
+  1871,
+  2296,
+  2721,
+  3146,
+  3571,
+  3997,
+  4422,
+  4847,
+  5272,
+  5697,
+  6123,
+  6548,
+  6973,
+  7398,
+  7823,
+  8249,
+  8674,
+  9099,
+  9524,
+  9949,
+  10375,
+  10800,
+  11225,
+  11650,
+  12075,
+  12501,
+  12926,
+  13351,
+  13776,
+  14202,
+  14627,
+  15052,
+  15477,
+  15902,
+  16328,
+  16753,
+};
+
+static const int innertable_exp[] = { -468,
+  -465,
+  -461,
+  -458,
+  -455,
+  -451,
+  -448,
+  -445,
+  -442,
+  -438,
+  -435,
+  -432,
+  -428,
+  -425,
+  -422,
+  -418,
+  -415,
+  -412,
+  -408,
+  -405,
+  -402,
+  -398,
+  -395,
+  -392,
+  -388,
+  -385,
+  -382,
+  -378,
+  -375,
+  -372,
+  -368,
+  -365,
+  -362,
+  -358,
+  -355,
+  -352,
+  -349,
+  -345,
+  -342,
+  -339,
+  -335,
+  -332,
+  -329,
+  -325,
+  -322,
+  -319,
+  -315,
+  -312,
+  -309,
+  -305,
+  -302,
+  -299,
+  -295,
+  -292,
+  -289,
+  -285,
+  -282,
+  -279,
+  -275,
+  -272,
+  -269,
+  -265,
+  -262,
+  -259,
+  -255,
+  -252,
+  -249,
+  -246,
+  -242,
+  -239,
+  -236,
+  -232,
+  -229,
+  -226,
+  -222,
+  -219,
+  -216,
+  -212,
+  -209,
+  -206,
+  -202,
+  -199,
+  -196,
+  -192,
+  -189,
+  -186,
+  -182,
+  -179,
+  -176,
+  -172,
+  -169,
+  -166,
+  -162,
+  -159,
+  -156,
+  -153,
+  -149,
+  -146,
+  -143,
+  -139,
+  -136,
+  -133,
+  -129,
+  -126,
+  -123,
+  -119,
+  -116,
+  -113,
+  -109,
+  -106,
+  -103,
+  -99,
+  -96,
+  -93,
+  -89,
+  -86,
+  -83,
+  -79,
+  -76,
+  -73,
+  -69,
+  -66,
+  -63,
+  -60,
+  -56,
+  -53,
+  -50,
+  -46,
+};
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid32_to_binary32 (float *pres, UINT32 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT32 x = *px;
+#else
+float
+bid32_to_binary32 (UINT32 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid32 (x, s, e, k, (c.w[1]), return_binary32_zero (s),
+                return_binary32_inf (s), return_binary32_nan);
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-24=89
+// Thus a shift of 25 given that we've already upacked in c.w[1]
+
+  c.w[1] = c.w[1] << 25;
+  c.w[0] = 0;
+  k = k + 89;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is e >= ceil(128 * log_10(2)) = 39
+
+  if (e >= 39) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -80)
+    e = -80;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary32 + 80)[e];
+  e_out = (exponents_binary32 + 80)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary32 + 80)[e];
+  } else {
+    r = (multipliers2_binary32 + 80)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 26)
+      d = 26;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 24)) {
+      c_prov = 1ull << 23;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 23)) && (e_out == 1)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[4] < (1ull << 63))))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 255) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 23))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 23) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_binary32 (float *pres, UINT64 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+float
+bid64_to_binary32 (UINT64 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid64 (x, s, e, k, (c.w[0]), return_binary32_zero (s),
+                return_binary32_inf (s), return_binary32_nan);
+  c.w[1] = 0;
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-54=59
+
+  sll128_short (c.w[1], c.w[0], 59);
+  k = k + 59;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is e >= ceil(128 * log_10(2)) = 39
+
+  if (e >= 39) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -80)
+    e = -80;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary32 + 80)[e];
+  e_out = (exponents_binary32 + 80)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary32 + 80)[e];
+  } else {
+    r = (multipliers2_binary32 + 80)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 26)
+      d = 26;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 24)) {
+      c_prov = 1ull << 23;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 23)) && (e_out == 1)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[4] < (1ull << 63))))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 255) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 23))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 23) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_to_binary32 (float *pres, UINT128 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+float
+bid128_to_binary32 (UINT128 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid128 (x, s, e, k, c, return_binary32_zero (s),
+                 return_binary32_inf (s), return_binary32_nan);
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is e >= ceil(128 * log_10(2)) = 39
+
+  if (e >= 39) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -80)
+    e = -80;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary32 + 80)[e];
+  e_out = (exponents_binary32 + 80)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary32 + 80)[e];
+  } else {
+    r = (multipliers2_binary32 + 80)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 26)
+      d = 26;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 24)) {
+      c_prov = 1ull << 23;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 23)) && (e_out == 1)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[4] < (1ull << 63))))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 255) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary32_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 23))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 23) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid32_to_binary64 (double *pres, UINT32 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT32 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#else
+double
+bid32_to_binary64 (UINT32 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+  unpack_bid32 (x, s, e, k, (c.w[1]), return_binary64_zero (s),
+                return_binary64_inf (s), return_binary64_nan);
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-24=89
+// In fact shift a further 6 places ready for reciprocal multiplication
+// Thus (113-24)+6=95, a shift of 31 given that we've already upacked in c.w[1]
+
+  c.w[1] = c.w[1] << 31;
+  c.w[0] = 0;
+  k = k + 89;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is e >= ceil(1024 * log_10(2)) = ceil(308.25) = 309
+
+  if (e >= 309) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -358)
+    e = -358;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary64 + 358)[e];
+  e_out = (exponents_binary64 + 358)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary64 + 358)[e];
+  } else {
+    r = (multipliers2_binary64 + 358)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 55)
+      d = 55;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 53)) {
+      c_prov = 1ull << 52;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 2047) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 52))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 52) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_binary64 (double *pres, UINT64 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#else
+double
+bid64_to_binary64 (UINT64 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+  unpack_bid64 (x, s, e, k, (c.w[1]), return_binary64_zero (s),
+                return_binary64_inf (s), return_binary64_nan);
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-54=59
+// In fact shift a further 6 places ready for reciprocal multiplication
+// Thus (113-54)+6=65, a shift of 1 given that we've already upacked in c.w[1]
+
+  c.w[1] = c.w[1] << 1;
+  c.w[0] = 0;
+  k = k + 59;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(1024 * log_10(2)) = ceil(308.25) = 309
+
+  if (e >= 309) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -358)
+    e = -358;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary64 + 358)[e];
+  e_out = (exponents_binary64 + 358)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary64 + 358)[e];
+  } else {
+    r = (multipliers2_binary64 + 358)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 55)
+      d = 55;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 53)) {
+      c_prov = 1ull << 52;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 52)) && (e_out == 1))
+    {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[4] < (1ull << 63))))
+
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 2047) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 52))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 52) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_to_binary64 (double *pres, UINT128 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#else
+double
+bid128_to_binary64 (UINT128 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+  unpack_bid128 (x, s, e, k, c, return_binary64_zero (s),
+                 return_binary64_inf (s), return_binary64_nan);
+
+// Shift 6 more places left ready for reciprocal multiplication
+
+  sll128_short (c.w[1], c.w[0], 6);
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(1024 * log_10(2)) = ceil(308.25) = 309
+
+  if (e >= 309) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -358)
+    e = -358;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary64 + 358)[e];
+  e_out = (exponents_binary64 + 358)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary64 + 358)[e];
+  } else {
+    r = (multipliers2_binary64 + 358)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 55)
+      d = 55;
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == (1ull << 53)) {
+      c_prov = 1ull << 52;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 52)) && (e_out == 1)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[4] < (1ull << 63))))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 2047) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary64_ovf (s);
+  }
+// Modify exponent for a tiny result, otherwise lop the implicit bit
+
+  if (c_prov < (1ull << 52))
+    e_out = 0;
+  else
+    c_prov = c_prov & ((1ull << 52) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if __ENABLE_BINARY80__
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid32_to_binary80 (BINARY80 * pres, UINT32 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT32 x = *px;
+#else
+BINARY80
+bid32_to_binary80 (UINT32 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid32 (x, s, e, k, (c.w[1]), return_binary80_zero (s),
+                return_binary80_inf (s), return_binary80_nan);
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-24=89
+// Given that we've unpacked in the high part (<<64), that's just <<25
+
+  c.w[1] = c.w[1] << 25;
+  c.w[0] = 0;
+  k = k + 89;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -4985)
+    e = -4985;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary80 + 4985)[e];
+  e_out = (exponents_binary80 + 4985)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary80 + 4985)[e];
+  } else {
+    r = (multipliers2_binary80 + 4985)[e];
+    e_out = e_out + 1;
+  }
+
+
+// Do the reciprocal multiplication; make an effective shift of 303 bits
+// by shifting 47 places right and taking the result from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], 47);
+
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+
+  if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 66)
+      d = 66;
+    if (d >= 64) {
+      d -= 64;
+      z.w[1] = z.w[2], z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[4], z.w[3], z.w[2], z.w[1], d);
+  }
+  c_prov = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 0) {
+      c_prov = 1ull << 63;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Modify exponent for a tiny result
+
+  if (c_prov < (1ull << 63))
+    e_out = 0;
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary80 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_binary80 (BINARY80 * pres, UINT64 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+BINARY80
+bid64_to_binary80 (UINT64 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid64 (x, s, e, k, (c.w[0]), return_binary80_zero (s),
+                return_binary80_inf (s), return_binary80_nan);
+  c.w[1] = 0;
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-54=59
+
+  sll128_short (c.w[1], c.w[0], 59);
+  k = k + 59;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -4985)
+    e = -4985;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary80 + 4985)[e];
+  e_out = (exponents_binary80 + 4985)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary80 + 4985)[e];
+  } else {
+    r = (multipliers2_binary80 + 4985)[e];
+    e_out = e_out + 1;
+  }
+
+
+// Do the reciprocal multiplication; make an effective shift of 303 bits
+// by shifting 47 places right and taking the result from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], 47);
+
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+
+  if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 66)
+      d = 66;
+    if (d >= 64) {
+      d -= 64;
+      z.w[1] = z.w[2], z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[4], z.w[3], z.w[2], z.w[1], d);
+  }
+  c_prov = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 0) {
+      c_prov = 1ull << 63;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Modify exponent for a tiny result
+
+  if (c_prov < (1ull << 63))
+    e_out = 0;
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary80 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_to_binary80 (BINARY80 * pres, UINT128 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+BINARY80
+bid128_to_binary80 (UINT128 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid128 (x, s, e, k, c, return_binary80_zero (s),
+                 return_binary80_inf (s), return_binary80_nan);
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 115) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -4985)
+    e = -4985;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary80 + 4985)[e];
+  e_out = (exponents_binary80 + 4985)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary80 + 4985)[e];
+  } else {
+    r = (multipliers2_binary80 + 4985)[e];
+    e_out = e_out + 1;
+  }
+
+
+// Do the reciprocal multiplication; make an effective shift of 303 bits
+// by shifting 47 places right and taking the result from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], 47);
+
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+
+  if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 66)
+      d = 66;
+    if (d >= 64) {
+      d -= 64;
+      z.w[1] = z.w[2], z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[4], z.w[3], z.w[2], z.w[1], d);
+  }
+  c_prov = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 0) {
+      c_prov = 1ull << 63;
+      e_out = e_out + 1;
+    } else if ((c_prov == (1ull << 63)) && (e_out == 1)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[3] < (3ull << 62))) ||
+          ((rnd_mode + (s & 1) == 2) && (z.w[3] < (1ull << 63))))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary80_ovf (s);
+  }
+// Modify exponent for a tiny result
+
+  if (c_prov < (1ull << 63))
+    e_out = 0;
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary80 (s, e_out, c_prov);
+}
+
+#endif // matches #if __ENABLE_BINARY80__
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid32_to_binary128 (BINARY128 * pres, UINT32 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  UINT32 x = *px;
+#else
+BINARY128
+bid32_to_binary128 (UINT32 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid32 (x, s, e, k, (c.w[1]), return_binary128_zero (s),
+                return_binary128_inf (s), return_binary128_nan);
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-24=89
+// But also make an additional shift of 2 places to get a whole-word lop:
+// (c * r) >> 254 = ((c << 2) * r) >> 256. Given that we unpack in the high
+// end, our shift is (89+2)-64 = 27
+
+  c.w[0] = 0;
+  c.w[1] = c.w[1] << 27;
+  k = k + 89;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 114) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -5000)
+    e = -5000;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary128 + 5000)[e];
+  e_out = (exponents_binary128 + 5000)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary128 + 5000)[e];
+  } else {
+    r = (multipliers2_binary128 + 5000)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication; make an effective shift of 254 bits
+// (given that we already shifted left 2 places) by lopping from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 115)
+      d = 115;
+    if (d >= 64) {
+      d -= 64;
+      z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = z.w[5], z.w[5] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0) {
+      c_prov_hi = c_prov_hi + 1;
+      if (c_prov_hi == 1ull << 49) {
+        c_prov_hi = 1ull << 48;
+        e_out = e_out + 1;
+      }
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Modify exponent for a tiny result; otherwise lop off the implicit bit
+
+  if (c_prov_hi < (1ull << 48))
+    e_out = 0;
+  else
+    c_prov_hi = c_prov_hi & ((1ull << 48) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_to_binary128 (BINARY128 * pres, UINT64 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+BINARY128
+bid64_to_binary128 (UINT64 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+  unpack_bid64 (x, s, e, k, (c.w[0]), return_binary128_zero (s),
+                return_binary128_inf (s), return_binary128_nan);
+  c.w[1] = 0;
+
+// Correct to 2^112 <= c < 2^113 with corresponding exponent adding 113-54=59
+// But also make an additional shift of 2 places to get a whole-word lop:
+// (c * r) >> 254 = ((c << 2) * r) >> 256
+
+  sll128_short (c.w[1], c.w[0], 61);
+  k = k + 59;
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 114) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -5000)
+    e = -5000;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary128 + 5000)[e];
+  e_out = (exponents_binary128 + 5000)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary128 + 5000)[e];
+  } else {
+    r = (multipliers2_binary128 + 5000)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication; make an effective shift of 254 bits
+// (given that we already shifted left 2 places) by lopping from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 115)
+      d = 115;
+    if (d >= 64) {
+      d -= 64;
+      z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = z.w[5], z.w[5] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0) {
+      c_prov_hi = c_prov_hi + 1;
+      if (c_prov_hi == 1ull << 49) {
+        c_prov_hi = 1ull << 48;
+        e_out = e_out + 1;
+      }
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Modify exponent for a tiny result; otherwise lop off the implicit bit
+
+  if (c_prov_hi < (1ull << 48))
+    e_out = 0;
+  else
+    c_prov_hi = c_prov_hi & ((1ull << 48) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_to_binary128 (BINARY128 * pres, UINT128 * px
+                     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                     _EXC_INFO_PARAM) {
+  UINT128 x = *px;
+#else
+BINARY128
+bid128_to_binary128 (UINT128 x
+                     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                     _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT128 c;
+  UINT128 m_min;
+  int s, e, k, e_out;
+  UINT256 r;
+  UINT384 z;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input and shift two further places for reciprocal multiplication
+
+  unpack_bid128 (x, s, e, k, c, return_binary128_zero (s),
+                 return_binary128_inf (s), return_binary128_nan);
+  sll128_short (c.w[1], c.w[0], 2);
+
+// Check for "trivial" overflow, when 10^e * 1 > 2^{sci_emax+1}, just to
+// keep tables smaller (it would be intercepted later otherwise).
+//
+// (Note that we may have normalized the coefficient, but we have a
+//  corresponding exponent postcorrection to account for; this can
+//  afford to be conservative anyway.)
+//
+// We actually check if e >= ceil((sci_emax + 1) * log_10(2))
+// which in this case is 2 >= ceil(16384 * log_10(2)) = ceil(4932.07544) = 4933
+
+  if (e >= 4933) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Also check for "trivial" underflow, when 10^e * 2^113 <= 2^emin * 1/4,
+// so test e <= floor((emin - 114) * log_10(2))
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -5000)
+    e = -5000;
+
+// Look up the breakpoint and approximate exponent
+
+  m_min = (breakpoints_binary128 + 5000)[e];
+  e_out = (exponents_binary128 + 5000)[e] - k;
+
+// Choose provisional exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_binary128 + 5000)[e];
+  } else {
+    r = (multipliers2_binary128 + 5000)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication; make an effective shift of 254 bits
+// (given that we already shifted left 2 places) by lopping from word 4
+
+  __mul_128x256_to_384 (z, c, r)
+// Check for exponent underflow and compensate by shifting the product
+// Cut off the process at precision+2, since we can't really shift further
+    if (e_out < 1) {
+    int d;
+    d = 1 - e_out;
+    if (d > 115)
+      d = 115;
+    if (d >= 64) {
+      d -= 64;
+      z.w[2] = z.w[3], z.w[3] = z.w[4], z.w[4] = z.w[5], z.w[5] = 0;
+    }
+    e_out = 1;
+    srl256 (z.w[5], z.w[4], z.w[3], z.w[2], d);
+  }
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill into the next binade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0) {
+      c_prov_hi = c_prov_hi + 1;
+      if (c_prov_hi == 1ull << 49) {
+        c_prov_hi = 1ull << 48;
+        e_out = e_out + 1;
+      } else if ((c_prov_hi == (1ull << 48)) && (e_out == 1)) {
+        if ((((rnd_mode & 3) == 0) && (z.w[3] < (3ull << 62))) ||
+            ((rnd_mode + (s & 1) == 2) && (z.w[3] < (1ull << 63))))
+          *pfpsf |= UNDERFLOW_EXCEPTION;
+      }
+    }
+  }
+// Check for overflow
+
+  if (e_out >= 32767) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_binary128_ovf (s);
+  }
+// Modify exponent for a tiny result; otherwise lop off the implicit bit
+
+  if (c_prov_hi < (1ull << 48))
+    e_out = 0;
+  else
+    c_prov_hi = c_prov_hi & ((1ull << 48) - 1);
+
+// Set the inexact and underflow flag as appropriate
+
+  if ((z.w[3] != 0) || (z.w[2] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (e_out == 0)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result as a binary floating-point number
+
+  return_binary128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary32_to_bid32 (UINT32 * pres, float *px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  float x = *px;
+#else
+UINT32
+binary32_to_bid32 (float x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary32 (x, s, e, c.w[1], t, return_bid32_zero (s),
+                   return_bid32_inf (s), return_bid32_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-24} * c * r) >> 320,
+// where 320 is the truncation value for the reciprocal multiples, exactly
+// five 64-bit words. So we shift 113-24=89 places. Since we unpacked in
+// the high end, shift a further 89-64=25 places
+//
+// Remember to compensate for the fact that exponents are integer for quad
+
+  c.w[0] = 0;
+  c.w[1] = c.w[1] << 25;
+  t += (113 - 24);
+  e -= (113 - 24);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 211) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], -e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000ull))
+        return_bid32 (s, 101, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid32[a];
+      srl128 (cint.w[1], cint.w[0], t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid32 (s, 101 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -450)
+    e = -450;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid32 + 450)[e];
+  e_out = (exponents_bid32 + 450)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid32 + 450)[e];
+  } else {
+    r = (multipliers2_bid32 + 450)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000ull) {
+      c_prov = 1000000ull;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 90 + 101) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary64_to_bid32 (UINT32 * pres, double *px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  double x = *px;
+#else
+UINT32
+binary64_to_bid32 (double x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary64 (x, s, e, c.w[0], t, return_bid32_zero (s),
+                   return_bid32_inf (s), return_bid32_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-53} * c * r) >> 320,
+// where 320 is the truncation value for the reciprocal multiples, exactly
+// five 64-bit words. So we shift 113-53=60 places
+//
+// Remember to compensate for the fact that exponents are integer for quad
+
+  c.w[1] = 0;
+  sll128_short (c.w[1], c.w[0], 60);
+  t += (113 - 53);
+  e -= (113 - 53);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 211) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], -e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000ull))
+        return_bid32 (s, 101, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid32[a];
+      srl128 (cint.w[1], cint.w[0], t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid32 (s, 101 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -450)
+    e = -450;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid32 + 450)[e];
+  e_out = (exponents_bid32 + 450)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid32 + 450)[e];
+  } else {
+    r = (multipliers2_bid32 + 450)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000ull) {
+      c_prov = 1000000ull;
+      e_out = e_out + 1;
+    } else if ((c_prov == 1000000ull) && (e_out == 0)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] <= 17524406870024074035ull))
+          || ((rnd_mode + (s & 1) == 2)
+              && (z.w[4] <= 16602069666338596454ull)))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 90 + 101) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if __ENABLE_BINARY80__
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary80_to_bid32 (UINT32 * pres, BINARY80 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  BINARY80 x = *px;
+#else
+UINT32
+binary80_to_bid32 (BINARY80 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary80 (x, s, e, c.w[0], t, return_bid32_zero (s),
+                   return_bid32_inf (s), return_bid32_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-64} * c * r) >> 320,
+// where 320 is the truncation value for the reciprocal multiples, exactly
+// five 64-bit words. So we shift 113-64=49 places
+//
+// Remember to compensate for the fact that exponents are integer for quad
+
+  c.w[1] = 0;
+  sll128_short (c.w[1], c.w[0], 49);
+  t += (113 - 64);
+  e -= (113 - 64);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 211) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], -e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000ull))
+        return_bid32 (s, 101, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid32[a];
+      srl128 (cint.w[1], cint.w[0], t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid32 (s, 101 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -450)
+    e = -450;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid32 + 450)[e];
+  e_out = (exponents_bid32 + 450)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid32 + 450)[e];
+  } else {
+    r = (multipliers2_bid32 + 450)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000ull) {
+      c_prov = 1000000ull;
+      e_out = e_out + 1;
+    } else if ((c_prov == 1000000ull) && (e_out == 0)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] <= 17524406870024074035ull))
+          || ((rnd_mode + (s & 1) == 2)
+              && (z.w[4] <= 16602069666338596454ull)))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 90 + 101) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid32 (s, e_out, c_prov);
+}
+
+#endif // matches #if __ENABLE_BINARY80__
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary128_to_bid32 (UINT32 * pres, BINARY128 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  BINARY128 x = *px;
+#else
+UINT32
+binary128_to_bid32 (BINARY128 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary128 (x, s, e, c.w[1], c.w[0], t, return_bid32_zero (s),
+                    return_bid32_inf (s), return_bid32_nan);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 211) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], -e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000ull))
+        return_bid32 (s, 101, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid32[a];
+      srl128 (cint.w[1], cint.w[0], t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid32 (s, 101 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -450)
+    e = -450;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid32 + 450)[e];
+  e_out = (exponents_bid32 + 450)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid32 + 450)[e];
+  } else {
+    r = (multipliers2_bid32 + 450)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+// This needs to be done in extra precision because of the precision disparity
+// and the fact that the breakpoint isn't an exact binary number.
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000ull) {
+      c_prov = 1000000ull;
+      e_out = e_out + 1;
+    } else if ((c_prov == 1000000ull) && (e_out == 0)) {
+      if ((((rnd_mode & 3) == 0) &&
+           le128 (z.w[4], z.w[3],
+                  17524406870024074035ull, 3689348814741910323ull)) ||
+          ((rnd_mode + (s & 1) == 2) &&
+           le128 (z.w[4], z.w[3],
+                  16602069666338596454ull, 7378697629483820646ull)))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 90 + 101) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid32_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid32 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary32_to_bid64 (UINT64 * pres, float *px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  float x = *px;
+#else
+UINT64
+binary32_to_bid64 (float x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary32 (x, s, e, c.w[1], t, return_bid64_zero (s),
+                   return_bid64_inf (s), return_bid64_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-24} * c * r) >> 312
+// (312 is the shift value for these tables) which can be written as
+// (2^97 c * r) >> 320, lopping off exactly 320 bits = 5 words. Thus we put
+// input coefficient as the high part of c (<<64) shifted by 33 bits (<<97)
+//
+// Remember to compensate for the fact that exponents are integer for quad
+
+  c.w[1] = c.w[1] << 33;
+  c.w[0] = 0;
+  t += (113 - 24);
+  e -= (113 - 24);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 1168) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 8 places to the left in preparation for the reciprocal
+// multiplication; thus we add 8 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 8 - e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000000000000ull))
+        return_bid64 (s, 398, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid64[a];
+      srl128 (cint.w[1], cint.w[0], 8 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid64 (s, 398 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -1437)
+    e = -1437;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid64 + 1437)[e];
+  e_out = (exponents_bid64 + 1437)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid64 + 1437)[e];
+  } else {
+    r = (multipliers2_bid64 + 1437)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000000000000ull) {
+      c_prov = 1000000000000000ull;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 369 + 398) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000000000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary64_to_bid64 (UINT64 * pres, double *px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  double x = *px;
+#else
+UINT64
+binary64_to_bid64 (double x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary64 (x, s, e, c.w[1], t, return_bid64_zero (s),
+                   return_bid64_inf (s), return_bid64_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-53} * c * r) >> 312
+// (312 is the shift value for these tables) which can be written as
+// (2^68 c * r) >> 320, lopping off exactly 320 bits = 5 words. Thus we put
+// input coefficient as the high part of c (<<64) shifted by 4 bits (<<68)
+//
+// Remember to compensate for the fact that exponents are integer for quad
+
+  c.w[1] = c.w[1] << 4;
+  c.w[0] = 0;
+  t += (113 - 53);
+  e -= (113 - 53);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 1168) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 8 places to the left in preparation for the reciprocal
+// multiplication; thus we add 8 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 8 - e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000000000000ull))
+        return_bid64 (s, 398, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid64[a];
+      srl128 (cint.w[1], cint.w[0], 8 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid64 (s, 398 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -1437)
+    e = -1437;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid64 + 1437)[e];
+  e_out = (exponents_bid64 + 1437)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid64 + 1437)[e];
+  } else {
+    r = (multipliers2_bid64 + 1437)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000000000000ull) {
+      c_prov = 1000000000000000ull;
+      e_out = e_out + 1;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 369 + 398) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000000000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if __ENABLE_BINARY80__
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary80_to_bid64 (UINT64 * pres, BINARY80 * px
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+  BINARY80 x = *px;
+#else
+UINT64
+binary80_to_bid64 (BINARY80 x
+                   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                   _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary80 (x, s, e, c.w[1], t, return_bid64_zero (s),
+                   return_bid64_inf (s), return_bid64_nan);
+
+// Treat like a quad input for uniformity, so (2^{113-64} * c * r) >> 312
+// (312 is the shift value for these tables) which can be written as
+// (2^57 c * r) >> 320, lopping off exactly 320 bits = 5 words. Thus we put the
+// input in the high part then shift right 7 places
+
+  c.w[0] = 0;
+  srl128_short (c.w[1], c.w[0], 7);
+  t += (113 - 64);
+  e -= (113 - 64);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 1168) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 8 places to the left in preparation for the reciprocal
+// multiplication; thus we add 8 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 8 - e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000000000000ull))
+        return_bid64 (s, 398, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid64[a];
+      srl128 (cint.w[1], cint.w[0], 8 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid64 (s, 398 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -1437)
+    e = -1437;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid64 + 1437)[e];
+  e_out = (exponents_bid64 + 1437)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid64 + 1437)[e];
+  } else {
+    r = (multipliers2_bid64 + 1437)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000000000000ull) {
+      c_prov = 1000000000000000ull;
+      e_out = e_out + 1;
+    } else if ((c_prov == 1000000000000000ull) && (e_out == 0)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] <= 17524406870024074035ull))
+          || ((rnd_mode + (s & 1) == 2)
+              && (z.w[4] <= 16602069666338596454ull)))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 369 + 398) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000000000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid64 (s, e_out, c_prov);
+}
+
+#endif // matches #if __ENABLE_BINARY80__
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary128_to_bid64 (UINT64 * pres, BINARY128 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  BINARY128 x = *px;
+#else
+UINT64
+binary128_to_bid64 (BINARY128 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov;
+  UINT128 m_min;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary128 (x, s, e, c.w[1], c.w[0], t, return_bid64_zero (s),
+                    return_bid64_inf (s), return_bid64_nan);
+
+// Shift left 8 spaces so (c * r) >> 312 = ((c<<8) * r) >> 320 and we
+// can lop off exactly 5 words
+
+  sll128_short (c.w[1], c.w[0], 8);
+
+// Check for "trivial" overflow, when 2^e * 2^112 > 10^emax * 10^d.
+// We actually check if e >= ceil((emax + d) * log_2(10) - 112)
+// This could be intercepted later, but it's convenient to keep tables smaller
+
+  if (e >= 1168) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 8 places to the left in preparation for the reciprocal
+// multiplication; thus we add 8 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 8 - e);
+      if ((cint.w[1] == 0) && (cint.w[0] < 10000000000000000ull))
+        return_bid64 (s, 398, cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid64[a];
+      srl128 (cint.w[1], cint.w[0], 8 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid64 (s, 398 - a, cc.w[0]);
+      }
+    }
+  }
+// Check for "trivial" underflow, when 2^e * 2^113 <= 10^emin * 1/4,
+// so test e <= floor(emin * log_2(10) - 115)
+// In this case just fix ourselves at that value for uniformity.
+//
+// This is important not only to keep the tables small but to maintain the
+// testing of the round/sticky words as a correct rounding method
+
+  if (e <= -1437)
+    e = -1437;
+
+// Now look up our exponent e, and the breakpoint between e and e+1
+
+  m_min = (breakpoints_bid64 + 1437)[e];
+  e_out = (exponents_bid64 + 1437)[e];
+
+// Choose exponent and reciprocal multiplier based on breakpoint
+
+  if (le128 (c.w[1], c.w[0], m_min.w[1], m_min.w[0])) {
+    r = (multipliers1_bid64 + 1437)[e];
+  } else {
+    r = (multipliers2_bid64 + 1437)[e];
+    e_out = e_out + 1;
+  }
+
+// Do the reciprocal multiplication
+
+  __mul_128x256_to_384 (z, c, r)
+    c_prov = z.w[5];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+// Flag underflow where it may be needed even for |result| = SNN
+
+  if (lt128
+      (roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) + (c_prov & 1)].
+       w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov & 1)].w[0], z.w[4], z.w[3])) {
+    c_prov = c_prov + 1;
+    if (c_prov == 10000000000000000ull) {
+      c_prov = 1000000000000000ull;
+      e_out = e_out + 1;
+    } else if ((c_prov == 1000000000000000ull) && (e_out == 0)) {
+      if ((((rnd_mode & 3) == 0) && (z.w[4] <= 17524406870024074035ull))
+          || ((rnd_mode + (s & 1) == 2)
+              && (z.w[4] <= 16602069666338596454ull)))
+        *pfpsf |= UNDERFLOW_EXCEPTION;
+    }
+  }
+// Check for overflow
+
+  if (e_out > 369 + 398) {
+    *pfpsf |= (OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+    return_bid64_ovf (s);
+  }
+// Set the inexact flag as appropriate and check underflow
+// It's no doubt superfluous to check inexactness, but anyway...
+
+  if ((z.w[4] != 0) || (z.w[3] != 0)) {
+    *pfpsf |= INEXACT_EXCEPTION;
+    if (c_prov < 1000000000000000ull)
+      *pfpsf |= UNDERFLOW_EXCEPTION;
+  }
+// Package up the result
+
+  return_bid64 (s, e_out, c_prov);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary32_to_bid128 (UINT128 * pres, float *px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  float x = *px;
+#else
+UINT128
+binary32_to_bid128 (float x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out, e_plus, e_hi, e_lo, f;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary32 (x, s, e, c.w[1], t, return_bid128_zero (s),
+                   return_bid128_inf (s), return_bid128_nan);
+
+// Shift up to the top: like a pure quad coefficient with a shift of 15.
+// In our case, this is 2^{113-24+15} times the core, so unpack at the
+// high end shifted by 40.
+
+  c.w[0] = 0;
+  c.w[1] = c.w[1] << 40;
+
+  t += (113 - 24);
+  e -= (113 - 24);
+
+// (We never need to check for overflow: this format is the biggest of all!)
+
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 15 places to the left in preparation for the reciprocal
+// multiplication; thus we add 15 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 15 - e);
+      if (lt128 (cint.w[1], cint.w[0],
+                 542101086242752ull, 4003012203950112768ull))
+        return_bid128 (s, 6176, cint.w[1], cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid128[a];
+      srl128 (cint.w[1], cint.w[0], 15 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid128 (s, 6176 - a, cc.w[1], cc.w[0]);
+      }
+    }
+  }
+// Input exponent can stretch between the maximal and minimal
+// exponents (remembering we force normalization): -16607 <= e <= 16271
+
+// Compute the estimated decimal exponent e_out; the provisional exponent
+// will be either "e_out" or "e_out-1" depending on later significand check
+// NB: this is the *biased* exponent
+
+  e_plus = e + 42152;
+  e_out = (((19728 * e_plus) + ((19779 * e_plus) >> 16)) >> 16) - 6512;
+
+// Set up pointers into the bipartite table
+
+  e_hi = 11232 - e_out;
+  e_lo = e_hi & 127;
+  e_hi = e_hi >> 7;
+
+// Look up the inner entry first
+
+  r = innertable_sig[e_lo], f = innertable_exp[e_lo];
+
+// If we need the other entry, multiply significands and add exponents
+
+  if (e_hi != 39) {
+    UINT256 s = outertable_sig[e_hi];
+    UINT512 t;
+    f = f + 256 + outertable_exp[e_hi];
+    __mul_256x256_to_512 (t, r, s);
+    r.w[0] = t.w[4] + 1, r.w[1] = t.w[5],
+      r.w[2] = t.w[6], r.w[3] = t.w[7];
+  }
+
+  __mul_128x256_to_384 (z, c, r);
+
+// Make adjustive shift, ignoring the lower 128 bits
+
+  e = -(241 + e + f);
+  srl256 (z.w[5], z.w[4], z.w[3], z.w[2], e);
+
+// Now test against 10^33 and so decide on adjustment
+// I feel there ought to be a smarter way of doing the multiplication
+
+  if (lt128 (z.w[5], z.w[4], 54210108624275ull, 4089650035136921600ull)) {
+    __mul_10x256_to_256 (z.w[5], z.w[4], z.w[3], z.w[2], z.w[5], z.w[4],
+                         z.w[3], z.w[2]);
+    e_out = e_out - 1;
+  }
+// Set up provisional results
+
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0)
+      c_prov_hi = c_prov_hi + 1;
+    else if ((c_prov_lo == 4003012203950112768ull) &&
+             (c_prov_hi == 542101086242752ull)) {
+      c_prov_hi = 54210108624275ull;
+      c_prov_lo = 4089650035136921600ull;
+      e_out = e_out + 1;
+    }
+  }
+// Don't need to check overflow or underflow; however set inexact flag
+
+  if ((z.w[3] != 0) || (z.w[2] != 0))
+    *pfpsf |= INEXACT_EXCEPTION;
+
+// Package up the result
+
+  return_bid128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary64_to_bid128 (UINT128 * pres, double *px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  double x = *px;
+#else
+UINT128
+binary64_to_bid128 (double x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out, e_plus, e_hi, e_lo, f;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary64 (x, s, e, c.w[1], t, return_bid128_zero (s),
+                   return_bid128_inf (s), return_bid128_nan);
+
+// Shift up to the top: like a pure quad coefficient with a shift of 15.
+// In our case, this is 2^{113-53+15} times the core, so unpack at the
+// high end shifted by 11.
+
+  c.w[0] = 0;
+  c.w[1] = c.w[1] << 11;
+
+  t += (113 - 53);
+  e -= (113 - 53);
+
+// (We never need to check for overflow: this format is the biggest of all!)
+
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 15 places to the left in preparation for the reciprocal
+// multiplication; thus we add 15 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 15 - e);
+      if (lt128 (cint.w[1], cint.w[0],
+                 542101086242752ull, 4003012203950112768ull))
+        return_bid128 (s, 6176, cint.w[1], cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid128[a];
+      srl128 (cint.w[1], cint.w[0], 15 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid128 (s, 6176 - a, cc.w[1], cc.w[0]);
+      }
+    }
+  }
+// Input exponent can stretch between the maximal and minimal
+// exponents (remembering we force normalization): -16607 <= e <= 16271
+
+// Compute the estimated decimal exponent e_out; the provisional exponent
+// will be either "e_out" or "e_out-1" depending on later significand check
+// NB: this is the *biased* exponent
+
+  e_plus = e + 42152;
+  e_out = (((19728 * e_plus) + ((19779 * e_plus) >> 16)) >> 16) - 6512;
+
+// Set up pointers into the bipartite table
+
+  e_hi = 11232 - e_out;
+  e_lo = e_hi & 127;
+  e_hi = e_hi >> 7;
+
+// Look up the inner entry first
+
+  r = innertable_sig[e_lo], f = innertable_exp[e_lo];
+
+// If we need the other entry, multiply significands and add exponents
+
+  if (e_hi != 39) {
+    UINT256 s = outertable_sig[e_hi];
+    UINT512 t;
+    f = f + 256 + outertable_exp[e_hi];
+    __mul_256x256_to_512 (t, r, s);
+    r.w[0] = t.w[4] + 1, r.w[1] = t.w[5],
+      r.w[2] = t.w[6], r.w[3] = t.w[7];
+  }
+
+  __mul_128x256_to_384 (z, c, r);
+
+// Make adjustive shift, ignoring the lower 128 bits
+
+  e = -(241 + e + f);
+  srl256 (z.w[5], z.w[4], z.w[3], z.w[2], e);
+
+// Now test against 10^33 and so decide on adjustment
+// I feel there ought to be a smarter way of doing the multiplication
+
+  if (lt128 (z.w[5], z.w[4], 54210108624275ull, 4089650035136921600ull)) {
+    __mul_10x256_to_256 (z.w[5], z.w[4], z.w[3], z.w[2], z.w[5], z.w[4],
+                         z.w[3], z.w[2]);
+    e_out = e_out - 1;
+  }
+// Set up provisional results
+
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0)
+      c_prov_hi = c_prov_hi + 1;
+    else if ((c_prov_lo == 4003012203950112768ull) &&
+             (c_prov_hi == 542101086242752ull)) {
+      c_prov_hi = 54210108624275ull;
+      c_prov_lo = 4089650035136921600ull;
+      e_out = e_out + 1;
+    }
+  }
+// Don't need to check overflow or underflow; however set inexact flag
+
+  if ((z.w[3] != 0) || (z.w[2] != 0))
+    *pfpsf |= INEXACT_EXCEPTION;
+
+// Package up the result
+
+  return_bid128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+// **********************************************************************
+
+#if __ENABLE_BINARY80__
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary80_to_bid128 (UINT128 * pres, BINARY80 * px
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+  BINARY80 x = *px;
+#else
+UINT128
+binary80_to_bid128 (BINARY80 x
+                    _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                    _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out, e_plus, e_hi, e_lo, f;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary80 (x, s, e, c.w[1], t, return_bid128_zero (s),
+                   return_bid128_inf (s), return_bid128_nan);
+
+// Treat like a pure quad coefficient with a shift of 15. We get this
+// just by unpacking at the high end
+
+  c.w[0] = 0;
+
+  t += (113 - 64);
+  e -= (113 - 64);
+
+// (We never need to check for overflow: this format is the biggest of all!)
+
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 15 places to the left in preparation for the reciprocal
+// multiplication; thus we add 15 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 15 - e);
+      if (lt128 (cint.w[1], cint.w[0],
+                 542101086242752ull, 4003012203950112768ull))
+        return_bid128 (s, 6176, cint.w[1], cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid128[a];
+      srl128 (cint.w[1], cint.w[0], 15 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid128 (s, 6176 - a, cc.w[1], cc.w[0]);
+      }
+    }
+  }
+// Input exponent can stretch between the maximal and minimal
+// exponents (remembering we force normalization): -16607 <= e <= 16271
+
+// Compute the estimated decimal exponent e_out; the provisional exponent
+// will be either "e_out" or "e_out-1" depending on later significand check
+// NB: this is the *biased* exponent
+
+  e_plus = e + 42152;
+  e_out = (((19728 * e_plus) + ((19779 * e_plus) >> 16)) >> 16) - 6512;
+
+// Set up pointers into the bipartite table
+
+  e_hi = 11232 - e_out;
+  e_lo = e_hi & 127;
+  e_hi = e_hi >> 7;
+
+// Look up the inner entry first
+
+  r = innertable_sig[e_lo], f = innertable_exp[e_lo];
+
+// If we need the other entry, multiply significands and add exponents
+
+  if (e_hi != 39) {
+    UINT256 s = outertable_sig[e_hi];
+    UINT512 t;
+    f = f + 256 + outertable_exp[e_hi];
+    __mul_256x256_to_512 (t, r, s);
+    r.w[0] = t.w[4] + 1, r.w[1] = t.w[5],
+      r.w[2] = t.w[6], r.w[3] = t.w[7];
+  }
+
+  __mul_128x256_to_384 (z, c, r);
+
+// Make adjustive shift, ignoring the lower 128 bits
+
+  e = -(241 + e + f);
+  srl256 (z.w[5], z.w[4], z.w[3], z.w[2], e);
+
+// Now test against 10^33 and so decide on adjustment
+// I feel there ought to be a smarter way of doing the multiplication
+
+  if (lt128 (z.w[5], z.w[4], 54210108624275ull, 4089650035136921600ull)) {
+    __mul_10x256_to_256 (z.w[5], z.w[4], z.w[3], z.w[2], z.w[5], z.w[4],
+                         z.w[3], z.w[2]);
+    e_out = e_out - 1;
+  }
+// Set up provisional results
+
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0)
+      c_prov_hi = c_prov_hi + 1;
+    else if ((c_prov_lo == 4003012203950112768ull) &&
+             (c_prov_hi == 542101086242752ull)) {
+      c_prov_hi = 54210108624275ull;
+      c_prov_lo = 4089650035136921600ull;
+      e_out = e_out + 1;
+    }
+  }
+// Don't need to check overflow or underflow; however set inexact flag
+
+  if ((z.w[3] != 0) || (z.w[2] != 0))
+    *pfpsf |= INEXACT_EXCEPTION;
+
+// Package up the result
+
+  return_bid128 (s, e_out, c_prov_hi, c_prov_lo);
+}
+
+#endif // matches #if __ENABLE_BINARY80__
+
+// **********************************************************************
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+binary128_to_bid128 (UINT128 * pres, BINARY128 * px
+                     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                     _EXC_INFO_PARAM) {
+  BINARY128 x = *px;
+#else
+UINT128
+binary128_to_bid128 (BINARY128 x
+                     _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+                     _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 c;
+  UINT64 c_prov_hi, c_prov_lo;
+  UINT256 r;
+  UINT384 z;
+
+  int e, s, t, e_out, e_plus, e_hi, e_lo, f;
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+  _IDEC_round rnd_mode = *prnd_mode;
+#endif
+#endif
+
+// Unpack the input
+
+  unpack_binary128 (x, s, e, c.w[1], c.w[0], t, return_bid128_zero (s),
+                    return_bid128_inf (s), return_bid128_nan);
+
+// Shift up 15 places to move to the top
+
+  sll128_short (c.w[1], c.w[0], 15);
+
+// (We never need to check for overflow: this format is the biggest of all!)
+
+// Now filter out all the exact cases where we need to specially force
+// the exponent to 0. We can let through inexact cases and those where the
+// main path will do the right thing anyway, e.g. integers outside coeff range.
+//
+// First check that e <= 0, because if e > 0, the input must be >= 2^113,
+// which is too large for the coefficient of any target decimal format.
+// We write a = -(e + t)
+//
+// (1) If e + t >= 0 <=> a <= 0 the input is an integer; treat it specially
+//     iff it fits in the coefficient range. Shift c' = c >> -e, and
+//     compare with the coefficient range; if it's in range then c' is
+//     our coefficient, exponent is 0. Otherwise we pass through.
+//
+// (2) If a > 0 then we have a non-integer input. The special case would
+//     arise as c' / 2^a where c' = c >> t, i.e. 10^-a * (5^a c'). Now
+//     if a > 48 we can immediately forget this, since 5^49 > 10^34.
+//     Otherwise we determine whether we're in range by a table based on
+//     a, and if so get the multiplier also from a table based on a.
+//
+// Note that when we shift, we need to take into account the fact that
+// c is already 15 places to the left in preparation for the reciprocal
+// multiplication; thus we add 15 to all the shift counts
+
+  if (e <= 0) {
+    UINT128 cint;
+    int a = -(e + t);
+    cint.w[1] = c.w[1], cint.w[0] = c.w[0];
+    if (a <= 0) {
+      srl128 (cint.w[1], cint.w[0], 15 - e);
+      if (lt128 (cint.w[1], cint.w[0],
+                 542101086242752ull, 4003012203950112768ull))
+        return_bid128 (s, 6176, cint.w[1], cint.w[0]);
+    } else if (a <= 48) {
+      UINT128 pow5 = coefflimits_bid128[a];
+      srl128 (cint.w[1], cint.w[0], 15 + t);
+      if (le128 (cint.w[1], cint.w[0], pow5.w[1], pow5.w[0])) {
+        UINT128 cc;
+        cc.w[1] = cint.w[1];
+        cc.w[0] = cint.w[0];
+        pow5 = power_five[a];
+        __mul_128x128_low (cc, cc, pow5);
+        return_bid128 (s, 6176 - a, cc.w[1], cc.w[0]);
+      }
+    }
+  }
+// Input exponent can stretch between the maximal and minimal
+// exponents (remembering we force normalization): -16607 <= e <= 16271
+
+// Compute the estimated decimal exponent e_out; the provisional exponent
+// will be either "e_out" or "e_out-1" depending on later significand check
+// NB: this is the *biased* exponent
+
+  e_plus = e + 42152;
+  e_out = (((19728 * e_plus) + ((19779 * e_plus) >> 16)) >> 16) - 6512;
+
+// Set up pointers into the bipartite table
+
+  e_hi = 11232 - e_out;
+  e_lo = e_hi & 127;
+  e_hi = e_hi >> 7;
+
+// Look up the inner entry first
+
+  r = innertable_sig[e_lo], f = innertable_exp[e_lo];
+
+// If we need the other entry, multiply significands and add exponents
+
+  if (e_hi != 39) {
+    UINT256 s = outertable_sig[e_hi];
+    UINT512 t;
+    f = f + 256 + outertable_exp[e_hi];
+    __mul_256x256_to_512 (t, r, s);
+    // *** NB I should run an exhaustive check this +1 doesn't overflow
+    r.w[0] = t.w[4] + 1, r.w[1] = t.w[5],
+      r.w[2] = t.w[6], r.w[3] = t.w[7];
+  }
+
+  __mul_128x256_to_384 (z, c, r);
+
+// Make adjustive shift, ignoring the lower 128 bits
+
+  e = -(241 + e + f);
+  srl256 (z.w[5], z.w[4], z.w[3], z.w[2], e);
+
+// Now test against 10^33 and so decide on adjustment
+// I feel there ought to be a smarter way of doing the multiplication
+
+  if (lt128 (z.w[5], z.w[4], 54210108624275ull, 4089650035136921600ull)) {
+    __mul_10x256_to_256 (z.w[5], z.w[4], z.w[3], z.w[2], z.w[5], z.w[4],
+                         z.w[3], z.w[2]);
+    e_out = e_out - 1;
+  }
+// Set up provisional results
+
+  c_prov_hi = z.w[5];
+  c_prov_lo = z.w[4];
+
+// Round using round-sticky words
+// If we spill over into the next decade, correct
+
+  if (lt128
+      (roundbound_128
+       [(rnd_mode << 2) + ((s & 1) << 1) + (c_prov_lo & 1)].w[1],
+       roundbound_128[(rnd_mode << 2) + ((s & 1) << 1) +
+                      (c_prov_lo & 1)].w[0], z.w[3], z.w[2])) {
+    c_prov_lo = c_prov_lo + 1;
+    if (c_prov_lo == 0)
+      c_prov_hi = c_prov_hi + 1;
+    else if ((c_prov_lo == 4003012203950112768ull) &&
+             (c_prov_hi == 542101086242752ull)) {
+      c_prov_hi = 54210108624275ull;
+      c_prov_lo = 4089650035136921600ull;
+      e_out = e_out + 1;
+    }
+  }
+// Don't need to check overflow or underflow; however set inexact flag
+
+  if ((z.w[3] != 0) || (z.w[2] != 0))
+    *pfpsf |= INEXACT_EXCEPTION;
+
+// Package up the result
+
+  return_bid128 (s, e_out, c_prov_hi, c_prov_lo);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid_conf.h b/gcc-4.9/libgcc/config/libbid/bid_conf.h
new file mode 100644
index 000000000..68921442e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_conf.h
@@ -0,0 +1,1171 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _BID_CONF_H
+#define _BID_CONF_H
+
+// Name Changes
+
+#define _IDEC_glbflags __bid_IDEC_glbflags
+#define _IDEC_glbround __bid_IDEC_glbround
+#define _IDEC_glbexcepthandling __bid_IDEC_glbexcepthandling
+#define _IDEC_glbexceptionmasks __bid_IDEC_glbexceptionmasks
+#define bid64_add __bid64_add
+#define bid64_sub __bid64_sub
+#define bid64_mul __bid64_mul
+#define bid64_div __bid64_div
+#define bid64dq_div __bid64dq_div
+#define bid64qd_div __bid64qd_div
+#define bid64qq_div __bid64qq_div
+#define bid64q_sqrt __bid64q_sqrt
+#define bid64_sqrt __bid64_sqrt
+#define bid64_rem __bid64_rem
+#define bid64_fma __bid64_fma
+#define bid64_scalb __bid64_scalb
+#define round128_19_38 __bid_round128_19_38
+#define round192_39_57 __bid_round192_39_57
+#define round256_58_76 __bid_round256_58_76
+#define round64_2_18 __bid_round64_2_18
+#define bid64_nextafter __bid64_nextafter
+#define bid64_nextdown __bid64_nextdown
+#define bid64_nextup __bid64_nextup
+#define b2d __bid_b2d
+#define b2d2 __bid_b2d2
+#define b2d3 __bid_b2d3
+#define b2d4 __bid_b2d4
+#define b2d5 __bid_b2d5
+#define bid128_canonize __bid128_canonize
+#define bid32_canonize __bid32_canonize
+#define bid64_canonize __bid64_canonize
+#define bid_to_bid128 __bid_to_bid128
+#define bid_to_bid32 __bid_to_bid32
+#define bid_to_bid64 __bid_to_bid64
+#define bid_to_dpd128 __bid_to_dpd128
+#define bid_to_dpd32 __bid_to_dpd32
+#define bid_to_dpd64 __bid_to_dpd64
+#define d2b __bid_d2b
+#define d2b2 __bid_d2b2
+#define d2b3 __bid_d2b3
+#define d2b4 __bid_d2b4
+#define d2b5 __bid_d2b5
+#define d2b6 __bid_d2b6
+#define dpd_to_bid128 __bid_dpd_to_bid128
+#define dpd_to_bid32 __bid_dpd_to_bid32
+#define dpd_to_bid64 __bid_dpd_to_bid64
+#define bid128_nextafter __bid128_nextafter
+#define bid128_nextdown __bid128_nextdown
+#define bid128_nextup __bid128_nextup
+#define bid64_logb __bid64_logb
+#define bid64_quantize __bid64_quantize
+#define estimate_bin_expon __bid_estimate_bin_expon
+#define estimate_decimal_digits __bid_estimate_decimal_digits
+#define power10_index_binexp __bid_power10_index_binexp
+#define power10_index_binexp_128 __bid_power10_index_binexp_128
+#define power10_table_128 __bid_power10_table_128
+#define reciprocals10_128 __bid_reciprocals10_128
+#define reciprocals10_64 __bid_reciprocals10_64
+#define recip_scale __bid_recip_scale
+#define round_const_table __bid_round_const_table
+#define round_const_table_128 __bid_round_const_table_128
+#define short_recip_scale __bid_short_recip_scale
+#define bid64_from_string __bid64_from_string
+#define bid64_to_string __bid64_to_string
+#define Inv_Tento9 __bid_Inv_Tento9
+#define midi_tbl __bid_midi_tbl
+#define Tento3 __bid_Tento3
+#define Tento6 __bid_Tento6
+#define Tento9 __bid_Tento9
+#define Twoto30_m_10to9 __bid_Twoto30_m_10to9
+#define Twoto60 __bid_Twoto60
+#define Twoto60_m_10to18 __bid_Twoto60_m_10to18
+#define convert_table __bid_convert_table
+#define factors __bid_factors
+#define packed_10000_zeros __bid_packed_10000_zeros
+#define char_table2 __bid_char_table2
+#define char_table3 __bid_char_table3
+#define Ex128m128 __bid_Ex128m128
+#define Ex192m192 __bid_Ex192m192
+#define Ex256m256 __bid_Ex256m256
+#define Ex64m64 __bid_Ex64m64
+#define half128 __bid_half128
+#define half192 __bid_half192
+#define half256 __bid_half256
+#define half64 __bid_half64
+#define Kx128 __bid_Kx128
+#define Kx192 __bid_Kx192
+#define Kx256 __bid_Kx256
+#define Kx64 __bid_Kx64
+#define mask128 __bid_mask128
+#define mask192 __bid_mask192
+#define mask256 __bid_mask256
+#define mask64 __bid_mask64
+#define maskhigh128 __bid_maskhigh128
+#define maskhigh128M __bid_maskhigh128M
+#define maskhigh192M __bid_maskhigh192M
+#define maskhigh256M __bid_maskhigh256M
+#define midpoint128 __bid_midpoint128
+#define midpoint192 __bid_midpoint192
+#define midpoint256 __bid_midpoint256
+#define midpoint64 __bid_midpoint64
+#define nr_digits __bid_nr_digits
+#define onehalf128 __bid_onehalf128
+#define onehalf128M __bid_onehalf128M
+#define onehalf192M __bid_onehalf192M
+#define onehalf256M __bid_onehalf256M
+#define shiftright128 __bid_shiftright128
+#define shiftright128M __bid_shiftright128M
+#define shiftright192M __bid_shiftright192M
+#define shiftright256M __bid_shiftright256M
+#define shift_ten2m3k128 __bid_shift_ten2m3k128
+#define shift_ten2m3k64 __bid_shift_ten2m3k64
+#define ten2k128 __bid_ten2k128
+#define ten2k256 __bid_ten2k256
+#define ten2k64 __bid_ten2k64
+#define ten2m3k128 __bid_ten2m3k128
+#define ten2m3k64 __bid_ten2m3k64
+#define ten2mk128 __bid_ten2mk128
+#define ten2mk128M __bid_ten2mk128M
+#define ten2mk128trunc __bid_ten2mk128trunc
+#define ten2mk128truncM __bid_ten2mk128truncM
+#define ten2mk192M __bid_ten2mk192M
+#define ten2mk192truncM __bid_ten2mk192truncM
+#define ten2mk256M __bid_ten2mk256M
+#define ten2mk256truncM __bid_ten2mk256truncM
+#define ten2mk64 __bid_ten2mk64
+#define ten2mxtrunc128 __bid_ten2mxtrunc128
+#define ten2mxtrunc192 __bid_ten2mxtrunc192
+#define ten2mxtrunc256 __bid_ten2mxtrunc256
+#define ten2mxtrunc64 __bid_ten2mxtrunc64
+#define bid128_add __bid128_add
+#define bid128dd_add __bid128dd_add
+#define bid128dd_sub __bid128dd_sub
+#define bid128dq_add __bid128dq_add
+#define bid128dq_sub __bid128dq_sub
+#define bid128qd_add __bid128qd_add
+#define bid128qd_sub __bid128qd_sub
+#define bid128_sub __bid128_sub
+#define bid64dq_add __bid64dq_add
+#define bid64dq_sub __bid64dq_sub
+#define bid64qd_add __bid64qd_add
+#define bid64qd_sub __bid64qd_sub
+#define bid64qq_add __bid64qq_add
+#define bid64qq_sub __bid64qq_sub
+#define bid128dd_mul __bid128dd_mul
+#define bid128dq_mul __bid128dq_mul
+#define bid128_mul __bid128_mul
+#define bid128qd_mul __bid128qd_mul
+#define bid64dq_mul __bid64dq_mul
+#define bid64qd_mul __bid64qd_mul
+#define bid64qq_mul __bid64qq_mul
+#define bid128dd_div __bid128dd_div
+#define bid128_div __bid128_div
+#define bid128dq_div __bid128dq_div
+#define bid128qd_div __bid128qd_div
+#define bid128d_sqrt __bid128d_sqrt
+#define bid128_sqrt __bid128_sqrt
+#define bid128ddd_fma __bid128ddd_fma
+#define bid128ddq_fma __bid128ddq_fma
+#define bid128dqd_fma __bid128dqd_fma
+#define bid128dqq_fma __bid128dqq_fma
+#define bid128_fma __bid128_fma
+#define bid128qdd_fma __bid128qdd_fma
+#define bid128qdq_fma __bid128qdq_fma
+#define bid128qqd_fma __bid128qqd_fma
+#define bid64ddq_fma __bid64ddq_fma
+#define bid64dqd_fma __bid64dqd_fma
+#define bid64dqq_fma __bid64dqq_fma
+#define bid64qdd_fma __bid64qdd_fma
+#define bid64qdq_fma __bid64qdq_fma
+#define bid64qqd_fma __bid64qqd_fma
+#define bid64qqq_fma __bid64qqq_fma
+#define bid128_round_integral_exact __bid128_round_integral_exact
+#define bid128_round_integral_nearest_away __bid128_round_integral_nearest_away
+#define bid128_round_integral_nearest_even __bid128_round_integral_nearest_even
+#define bid128_round_integral_negative __bid128_round_integral_negative
+#define bid128_round_integral_positive __bid128_round_integral_positive
+#define bid128_round_integral_zero __bid128_round_integral_zero
+#define bid64_round_integral_exact __bid64_round_integral_exact
+#define bid64_round_integral_nearest_away __bid64_round_integral_nearest_away
+#define bid64_round_integral_nearest_even __bid64_round_integral_nearest_even
+#define bid64_round_integral_negative __bid64_round_integral_negative
+#define bid64_round_integral_positive __bid64_round_integral_positive
+#define bid64_round_integral_zero __bid64_round_integral_zero
+#define bid128_quantize __bid128_quantize
+#define bid128_scalb __bid128_scalb
+#define bid64_maxnum __bid64_maxnum
+#define bid64_maxnum_mag __bid64_maxnum_mag
+#define bid64_minnum __bid64_minnum
+#define bid64_minnum_mag __bid64_minnum_mag
+#define bid128_maxnum __bid128_maxnum
+#define bid128_maxnum_mag __bid128_maxnum_mag
+#define bid128_minnum __bid128_minnum
+#define bid128_minnum_mag __bid128_minnum_mag
+#define bid128_rem __bid128_rem
+#define bid128_logb __bid128_logb
+#define getDecimalRoundingDirection __bid_getDecimalRoundingDirection
+#define is754 __bid_is754
+#define is754R __bid_is754R
+#define signalException __bid_signalException
+#define lowerFlags __bid_lowerFlags
+#define restoreFlags __bid_restoreFlags
+#define saveFlags __bid_saveFlags
+#define setDecimalRoundingDirection __bid_setDecimalRoundingDirection
+#define testFlags __bid_testFlags
+#define testSavedFlags __bid_testSavedFlags
+#define bid32_to_bid64 __bid32_to_bid64
+#define bid64_to_bid32 __bid64_to_bid32
+#define bid128_to_string __bid128_to_string
+#define mod10_18_tbl __bid_mod10_18_tbl
+#define bid128_to_bid32 __bid128_to_bid32
+#define bid32_to_bid128 __bid32_to_bid128
+#define bid128_to_bid64 __bid128_to_bid64
+#define bid64_to_bid128 __bid64_to_bid128
+#define bid128_from_string __bid128_from_string
+#define bid128_from_int32 __bid128_from_int32
+#define bid128_from_int64 __bid128_from_int64
+#define bid128_from_uint32 __bid128_from_uint32
+#define bid128_from_uint64 __bid128_from_uint64
+#define bid64_from_int32 __bid64_from_int32
+#define bid64_from_int64 __bid64_from_int64
+#define bid64_from_uint32 __bid64_from_uint32
+#define bid64_from_uint64 __bid64_from_uint64
+#define bid64_abs __bid64_abs
+#define bid64_class __bid64_class
+#define bid64_copy __bid64_copy
+#define bid64_copySign __bid64_copySign
+#define bid64_isCanonical __bid64_isCanonical
+#define bid64_isFinite __bid64_isFinite
+#define bid64_isInf __bid64_isInf
+#define bid64_isNaN __bid64_isNaN
+#define bid64_isNormal __bid64_isNormal
+#define bid64_isSignaling __bid64_isSignaling
+#define bid64_isSigned __bid64_isSigned
+#define bid64_isSubnormal __bid64_isSubnormal
+#define bid64_isZero __bid64_isZero
+#define bid64_negate __bid64_negate
+#define bid64_radix __bid64_radix
+#define bid64_sameQuantum __bid64_sameQuantum
+#define bid64_totalOrder __bid64_totalOrder
+#define bid64_totalOrderMag __bid64_totalOrderMag
+#define bid128_abs __bid128_abs
+#define bid128_class __bid128_class
+#define bid128_copy __bid128_copy
+#define bid128_copySign __bid128_copySign
+#define bid128_isCanonical __bid128_isCanonical
+#define bid128_isFinite __bid128_isFinite
+#define bid128_isInf __bid128_isInf
+#define bid128_isNaN __bid128_isNaN
+#define bid128_isNormal __bid128_isNormal
+#define bid128_isSignaling __bid128_isSignaling
+#define bid128_isSigned __bid128_isSigned
+#define bid128_isSubnormal __bid128_isSubnormal
+#define bid128_isZero __bid128_isZero
+#define bid128_negate __bid128_negate
+#define bid128_radix __bid128_radix
+#define bid128_sameQuantum __bid128_sameQuantum
+#define bid128_totalOrder __bid128_totalOrder
+#define bid128_totalOrderMag __bid128_totalOrderMag
+#define bid64_quiet_equal __bid64_quiet_equal
+#define bid64_quiet_greater __bid64_quiet_greater
+#define bid64_quiet_greater_equal __bid64_quiet_greater_equal
+#define bid64_quiet_greater_unordered __bid64_quiet_greater_unordered
+#define bid64_quiet_less __bid64_quiet_less
+#define bid64_quiet_less_equal __bid64_quiet_less_equal
+#define bid64_quiet_less_unordered __bid64_quiet_less_unordered
+#define bid64_quiet_not_equal __bid64_quiet_not_equal
+#define bid64_quiet_not_greater __bid64_quiet_not_greater
+#define bid64_quiet_not_less __bid64_quiet_not_less
+#define bid64_quiet_ordered __bid64_quiet_ordered
+#define bid64_quiet_unordered __bid64_quiet_unordered
+#define bid64_signaling_greater __bid64_signaling_greater
+#define bid64_signaling_greater_equal __bid64_signaling_greater_equal
+#define bid64_signaling_greater_unordered __bid64_signaling_greater_unordered
+#define bid64_signaling_less __bid64_signaling_less
+#define bid64_signaling_less_equal __bid64_signaling_less_equal
+#define bid64_signaling_less_unordered __bid64_signaling_less_unordered
+#define bid64_signaling_not_greater __bid64_signaling_not_greater
+#define bid64_signaling_not_less __bid64_signaling_not_less
+#define bid128_quiet_equal __bid128_quiet_equal
+#define bid128_quiet_greater __bid128_quiet_greater
+#define bid128_quiet_greater_equal __bid128_quiet_greater_equal
+#define bid128_quiet_greater_unordered __bid128_quiet_greater_unordered
+#define bid128_quiet_less __bid128_quiet_less
+#define bid128_quiet_less_equal __bid128_quiet_less_equal
+#define bid128_quiet_less_unordered __bid128_quiet_less_unordered
+#define bid128_quiet_not_equal __bid128_quiet_not_equal
+#define bid128_quiet_not_greater __bid128_quiet_not_greater
+#define bid128_quiet_not_less __bid128_quiet_not_less
+#define bid128_quiet_ordered __bid128_quiet_ordered
+#define bid128_quiet_unordered __bid128_quiet_unordered
+#define bid128_signaling_greater __bid128_signaling_greater
+#define bid128_signaling_greater_equal __bid128_signaling_greater_equal
+#define bid128_signaling_greater_unordered __bid128_signaling_greater_unordered
+#define bid128_signaling_less __bid128_signaling_less
+#define bid128_signaling_less_equal __bid128_signaling_less_equal
+#define bid128_signaling_less_unordered __bid128_signaling_less_unordered
+#define bid128_signaling_not_greater __bid128_signaling_not_greater
+#define bid128_signaling_not_less __bid128_signaling_not_less
+#define bid64_to_int32_ceil __bid64_to_int32_ceil
+#define bid64_to_int32_floor __bid64_to_int32_floor
+#define bid64_to_int32_int __bid64_to_int32_int
+#define bid64_to_int32_rnint __bid64_to_int32_rnint
+#define bid64_to_int32_rninta __bid64_to_int32_rninta
+#define bid64_to_int32_xceil __bid64_to_int32_xceil
+#define bid64_to_int32_xfloor __bid64_to_int32_xfloor
+#define bid64_to_int32_xint __bid64_to_int32_xint
+#define bid64_to_int32_xrnint __bid64_to_int32_xrnint
+#define bid64_to_int32_xrninta __bid64_to_int32_xrninta
+#define bid64_to_uint32_ceil __bid64_to_uint32_ceil
+#define bid64_to_uint32_floor __bid64_to_uint32_floor
+#define bid64_to_uint32_int __bid64_to_uint32_int
+#define bid64_to_uint32_rnint __bid64_to_uint32_rnint
+#define bid64_to_uint32_rninta __bid64_to_uint32_rninta
+#define bid64_to_uint32_xceil __bid64_to_uint32_xceil
+#define bid64_to_uint32_xfloor __bid64_to_uint32_xfloor
+#define bid64_to_uint32_xint __bid64_to_uint32_xint
+#define bid64_to_uint32_xrnint __bid64_to_uint32_xrnint
+#define bid64_to_uint32_xrninta __bid64_to_uint32_xrninta
+#define bid64_to_int64_ceil __bid64_to_int64_ceil
+#define bid64_to_int64_floor __bid64_to_int64_floor
+#define bid64_to_int64_int __bid64_to_int64_int
+#define bid64_to_int64_rnint __bid64_to_int64_rnint
+#define bid64_to_int64_rninta __bid64_to_int64_rninta
+#define bid64_to_int64_xceil __bid64_to_int64_xceil
+#define bid64_to_int64_xfloor __bid64_to_int64_xfloor
+#define bid64_to_int64_xint __bid64_to_int64_xint
+#define bid64_to_int64_xrnint __bid64_to_int64_xrnint
+#define bid64_to_int64_xrninta __bid64_to_int64_xrninta
+#define bid64_to_uint64_ceil __bid64_to_uint64_ceil
+#define bid64_to_uint64_floor __bid64_to_uint64_floor
+#define bid64_to_uint64_int __bid64_to_uint64_int
+#define bid64_to_uint64_rnint __bid64_to_uint64_rnint
+#define bid64_to_uint64_rninta __bid64_to_uint64_rninta
+#define bid64_to_uint64_xceil __bid64_to_uint64_xceil
+#define bid64_to_uint64_xfloor __bid64_to_uint64_xfloor
+#define bid64_to_uint64_xint __bid64_to_uint64_xint
+#define bid64_to_uint64_xrnint __bid64_to_uint64_xrnint
+#define bid64_to_uint64_xrninta __bid64_to_uint64_xrninta
+#define bid128_to_int32_ceil __bid128_to_int32_ceil
+#define bid128_to_int32_floor __bid128_to_int32_floor
+#define bid128_to_int32_int __bid128_to_int32_int
+#define bid128_to_int32_rnint __bid128_to_int32_rnint
+#define bid128_to_int32_rninta __bid128_to_int32_rninta
+#define bid128_to_int32_xceil __bid128_to_int32_xceil
+#define bid128_to_int32_xfloor __bid128_to_int32_xfloor
+#define bid128_to_int32_xint __bid128_to_int32_xint
+#define bid128_to_int32_xrnint __bid128_to_int32_xrnint
+#define bid128_to_int32_xrninta __bid128_to_int32_xrninta
+#define bid128_to_uint32_ceil __bid128_to_uint32_ceil
+#define bid128_to_uint32_floor __bid128_to_uint32_floor
+#define bid128_to_uint32_int __bid128_to_uint32_int
+#define bid128_to_uint32_rnint __bid128_to_uint32_rnint
+#define bid128_to_uint32_rninta __bid128_to_uint32_rninta
+#define bid128_to_uint32_xceil __bid128_to_uint32_xceil
+#define bid128_to_uint32_xfloor __bid128_to_uint32_xfloor
+#define bid128_to_uint32_xint __bid128_to_uint32_xint
+#define bid128_to_uint32_xrnint __bid128_to_uint32_xrnint
+#define bid128_to_uint32_xrninta __bid128_to_uint32_xrninta
+#define bid128_to_int64_ceil __bid128_to_int64_ceil
+#define bid128_to_int64_floor __bid128_to_int64_floor
+#define bid128_to_int64_int __bid128_to_int64_int
+#define bid128_to_int64_rnint __bid128_to_int64_rnint
+#define bid128_to_int64_rninta __bid128_to_int64_rninta
+#define bid128_to_int64_xceil __bid128_to_int64_xceil
+#define bid128_to_int64_xfloor __bid128_to_int64_xfloor
+#define bid128_to_int64_xint __bid128_to_int64_xint
+#define bid128_to_int64_xrnint __bid128_to_int64_xrnint
+#define bid128_to_int64_xrninta __bid128_to_int64_xrninta
+#define bid128_to_uint64_ceil __bid128_to_uint64_ceil
+#define bid128_to_uint64_floor __bid128_to_uint64_floor
+#define bid128_to_uint64_int __bid128_to_uint64_int
+#define bid128_to_uint64_rnint __bid128_to_uint64_rnint
+#define bid128_to_uint64_rninta __bid128_to_uint64_rninta
+#define bid128_to_uint64_xceil __bid128_to_uint64_xceil
+#define bid128_to_uint64_xfloor __bid128_to_uint64_xfloor
+#define bid128_to_uint64_xint __bid128_to_uint64_xint
+#define bid128_to_uint64_xrnint __bid128_to_uint64_xrnint
+#define bid128_to_uint64_xrninta __bid128_to_uint64_xrninta
+#define bid128_to_binary128 __bid128_to_binary128
+#define bid128_to_binary32 __bid128_to_binary32
+#define bid128_to_binary64 __bid128_to_binary64
+#define bid128_to_binary80 __bid128_to_binary80
+#define bid32_to_binary128 __bid32_to_binary128
+#define bid32_to_binary32 __bid32_to_binary32
+#define bid32_to_binary64 __bid32_to_binary64
+#define bid32_to_binary80 __bid32_to_binary80
+#define bid64_to_binary128 __bid64_to_binary128
+#define bid64_to_binary32 __bid64_to_binary32
+#define bid64_to_binary64 __bid64_to_binary64
+#define bid64_to_binary80 __bid64_to_binary80
+#define binary128_to_bid128 __binary128_to_bid128
+#define binary128_to_bid32 __binary128_to_bid32
+#define binary128_to_bid64 __binary128_to_bid64
+#define binary32_to_bid128 __binary32_to_bid128
+#define binary32_to_bid32 __binary32_to_bid32
+#define binary32_to_bid64 __binary32_to_bid64
+#define binary64_to_bid128 __binary64_to_bid128
+#define binary64_to_bid32 __binary64_to_bid32
+#define binary64_to_bid64 __binary64_to_bid64
+#define binary80_to_bid128 __binary80_to_bid128
+#define binary80_to_bid32 __binary80_to_bid32
+#define binary80_to_bid64 __binary80_to_bid64
+#define bid64_to_uint16_ceil __bid64_to_uint16_ceil
+#define bid64_to_uint16_floor __bid64_to_uint16_floor
+#define bid64_to_uint16_int __bid64_to_uint16_int
+#define bid64_to_uint16_rnint __bid64_to_uint16_rnint
+#define bid64_to_uint16_rninta __bid64_to_uint16_rninta
+#define bid64_to_uint16_xceil __bid64_to_uint16_xceil
+#define bid64_to_uint16_xfloor __bid64_to_uint16_xfloor
+#define bid64_to_uint16_xint __bid64_to_uint16_xint
+#define bid64_to_uint16_xrnint __bid64_to_uint16_xrnint
+#define bid64_to_uint16_xrninta __bid64_to_uint16_xrninta
+#define bid64_to_int16_ceil __bid64_to_int16_ceil
+#define bid64_to_int16_floor __bid64_to_int16_floor
+#define bid64_to_int16_int __bid64_to_int16_int
+#define bid64_to_int16_rnint __bid64_to_int16_rnint
+#define bid64_to_int16_rninta __bid64_to_int16_rninta
+#define bid64_to_int16_xceil __bid64_to_int16_xceil
+#define bid64_to_int16_xfloor __bid64_to_int16_xfloor
+#define bid64_to_int16_xint __bid64_to_int16_xint
+#define bid64_to_int16_xrnint __bid64_to_int16_xrnint
+#define bid64_to_int16_xrninta __bid64_to_int16_xrninta
+#define bid128_to_uint16_ceil __bid128_to_uint16_ceil
+#define bid128_to_uint16_floor __bid128_to_uint16_floor
+#define bid128_to_uint16_int __bid128_to_uint16_int
+#define bid128_to_uint16_rnint __bid128_to_uint16_rnint
+#define bid128_to_uint16_rninta __bid128_to_uint16_rninta
+#define bid128_to_uint16_xceil __bid128_to_uint16_xceil
+#define bid128_to_uint16_xfloor __bid128_to_uint16_xfloor
+#define bid128_to_uint16_xint __bid128_to_uint16_xint
+#define bid128_to_uint16_xrnint __bid128_to_uint16_xrnint
+#define bid128_to_uint16_xrninta __bid128_to_uint16_xrninta
+#define bid128_to_int16_ceil __bid128_to_int16_ceil
+#define bid128_to_int16_floor __bid128_to_int16_floor
+#define bid128_to_int16_int __bid128_to_int16_int
+#define bid128_to_int16_rnint __bid128_to_int16_rnint
+#define bid128_to_int16_rninta __bid128_to_int16_rninta
+#define bid128_to_int16_xceil __bid128_to_int16_xceil
+#define bid128_to_int16_xfloor __bid128_to_int16_xfloor
+#define bid128_to_int16_xint __bid128_to_int16_xint
+#define bid128_to_int16_xrnint __bid128_to_int16_xrnint
+#define bid128_to_int16_xrninta __bid128_to_int16_xrninta
+#define bid64_to_uint8_ceil __bid64_to_uint8_ceil
+#define bid64_to_uint8_floor __bid64_to_uint8_floor
+#define bid64_to_uint8_int __bid64_to_uint8_int
+#define bid64_to_uint8_rnint __bid64_to_uint8_rnint
+#define bid64_to_uint8_rninta __bid64_to_uint8_rninta
+#define bid64_to_uint8_xceil __bid64_to_uint8_xceil
+#define bid64_to_uint8_xfloor __bid64_to_uint8_xfloor
+#define bid64_to_uint8_xint __bid64_to_uint8_xint
+#define bid64_to_uint8_xrnint __bid64_to_uint8_xrnint
+#define bid64_to_uint8_xrninta __bid64_to_uint8_xrninta
+#define bid64_to_int8_ceil __bid64_to_int8_ceil
+#define bid64_to_int8_floor __bid64_to_int8_floor
+#define bid64_to_int8_int __bid64_to_int8_int
+#define bid64_to_int8_rnint __bid64_to_int8_rnint
+#define bid64_to_int8_rninta __bid64_to_int8_rninta
+#define bid64_to_int8_xceil __bid64_to_int8_xceil
+#define bid64_to_int8_xfloor __bid64_to_int8_xfloor
+#define bid64_to_int8_xint __bid64_to_int8_xint
+#define bid64_to_int8_xrnint __bid64_to_int8_xrnint
+#define bid64_to_int8_xrninta __bid64_to_int8_xrninta
+#define bid128_to_uint8_ceil __bid128_to_uint8_ceil
+#define bid128_to_uint8_floor __bid128_to_uint8_floor
+#define bid128_to_uint8_int __bid128_to_uint8_int
+#define bid128_to_uint8_rnint __bid128_to_uint8_rnint
+#define bid128_to_uint8_rninta __bid128_to_uint8_rninta
+#define bid128_to_uint8_xceil __bid128_to_uint8_xceil
+#define bid128_to_uint8_xfloor __bid128_to_uint8_xfloor
+#define bid128_to_uint8_xint __bid128_to_uint8_xint
+#define bid128_to_uint8_xrnint __bid128_to_uint8_xrnint
+#define bid128_to_uint8_xrninta __bid128_to_uint8_xrninta
+#define bid128_to_int8_ceil __bid128_to_int8_ceil
+#define bid128_to_int8_floor __bid128_to_int8_floor
+#define bid128_to_int8_int __bid128_to_int8_int
+#define bid128_to_int8_rnint __bid128_to_int8_rnint
+#define bid128_to_int8_rninta __bid128_to_int8_rninta
+#define bid128_to_int8_xceil __bid128_to_int8_xceil
+#define bid128_to_int8_xfloor __bid128_to_int8_xfloor
+#define bid128_to_int8_xint __bid128_to_int8_xint
+#define bid128_to_int8_xrnint __bid128_to_int8_xrnint
+#define bid128_to_int8_xrninta __bid128_to_int8_xrninta
+
+#ifdef IN_LIBGCC2
+#if !defined ENABLE_DECIMAL_BID_FORMAT || !ENABLE_DECIMAL_BID_FORMAT
+#error BID not enabled in libbid
+#endif
+
+#ifndef BID_BIG_ENDIAN
+#define BID_BIG_ENDIAN __FLOAT_WORD_ORDER__ == __ORDER_BIG_ENDIAN__
+#endif
+
+#ifndef BID_THREAD
+#if defined (HAVE_CC_TLS) && defined (USE_TLS)
+#define BID_THREAD __thread
+#endif
+#endif
+
+#define _intptr_t_defined
+#define DECIMAL_CALL_BY_REFERENCE 0
+#define DECIMAL_GLOBAL_ROUNDING 1
+#define DECIMAL_GLOBAL_ROUNDING_ACCESS_FUNCTIONS 1
+#define DECIMAL_GLOBAL_EXCEPTION_FLAGS 1
+#define DECIMAL_GLOBAL_EXCEPTION_FLAGS_ACCESS_FUNCTIONS 1
+#define BID_HAS_GCC_DECIMAL_INTRINSICS 1
+#endif /* IN_LIBGCC2 */
+
+// Configuration Options
+
+#define SET_STATUS_FLAGS
+
+#ifndef BID_THREAD
+#define BID_THREAD
+#endif
+
+#ifndef BID_HAS_GCC_DECIMAL_INTRINSICS
+#define BID_HAS_GCC_DECIMAL_INTRINSICS 0
+#endif
+
+#if !defined(WINDOWS) || defined(__INTEL_COMPILER)
+// #define UNCHANGED_BINARY_STATUS_FLAGS
+#endif
+// #define HPUX_OS
+
+// If DECIMAL_CALL_BY_REFERENCE is defined then numerical arguments and results
+// are passed by reference otherwise they are passed by value (except that
+// a pointer is always passed to the status flags)
+
+#ifndef DECIMAL_CALL_BY_REFERENCE
+#define DECIMAL_CALL_BY_REFERENCE 0
+#endif
+
+// If DECIMAL_GLOBAL_ROUNDING is defined then the rounding mode is a global 
+// variable _IDEC_glbround, otherwise it is passed as a parameter when needed
+
+#ifndef DECIMAL_GLOBAL_ROUNDING
+#define DECIMAL_GLOBAL_ROUNDING 0
+#endif
+
+#ifndef DECIMAL_GLOBAL_ROUNDING_ACCESS_FUNCTIONS
+#define DECIMAL_GLOBAL_ROUNDING_ACCESS_FUNCTIONS 0
+#endif
+
+// If DECIMAL_GLOBAL_EXCEPTION_FLAGS is defined then the exception status flags
+// are represented by a global variable _IDEC_glbflags, otherwise they are 
+// passed as a parameter when needed
+
+#ifndef DECIMAL_GLOBAL_EXCEPTION_FLAGS
+#define DECIMAL_GLOBAL_EXCEPTION_FLAGS 0
+#endif
+
+#ifndef DECIMAL_GLOBAL_EXCEPTION_FLAGS_ACCESS_FUNCTIONS
+#define DECIMAL_GLOBAL_EXCEPTION_FLAGS_ACCESS_FUNCTIONS 0
+#endif
+
+// If DECIMAL_ALTERNATE_EXCEPTION_HANDLING is defined then the exception masks
+// are examined and exception handling information is provided to the caller 
+// if alternate exception handling is necessary
+
+#ifndef DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+#define DECIMAL_ALTERNATE_EXCEPTION_HANDLING 0
+#endif
+
+typedef unsigned int _IDEC_round;
+typedef unsigned int _IDEC_flags;	// could be a struct with diagnostic info
+
+#if DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+  // If DECIMAL_GLOBAL_EXCEPTION_MASKS is defined then the exception mask bits
+  // are represented by a global variable _IDEC_exceptionmasks, otherwise they
+  // are passed as a parameter when needed; DECIMAL_GLOBAL_EXCEPTION_MASKS is 
+  // ignored
+  // if DECIMAL_ALTERNATE_EXCEPTION_HANDLING is not defined
+  // **************************************************************************
+#define DECIMAL_GLOBAL_EXCEPTION_MASKS 0
+  // **************************************************************************
+
+  // If DECIMAL_GLOBAL_EXCEPTION_INFO is defined then the alternate exception  
+  // handling information is represented by a global data structure 
+  // _IDEC_glbexcepthandling, otherwise it is passed by reference as a
+  // parameter when needed; DECIMAL_GLOBAL_EXCEPTION_INFO is ignored
+  // if DECIMAL_ALTERNATE_EXCEPTION_HANDLING is not defined
+  // **************************************************************************
+#define DECIMAL_GLOBAL_EXCEPTION_INFO 0
+  // **************************************************************************
+#endif
+
+// Notes: 1) rnd_mode from _RND_MODE_ARG is used by the caller of a function
+//           from this library, and can be any name
+//        2) rnd_mode and prnd_mode from _RND_MODE_PARAM are fixed names 
+//           and *must* be used in the library functions
+//        3) _IDEC_glbround is the fixed name for the global variable holding 
+//           the rounding mode
+
+#if !DECIMAL_GLOBAL_ROUNDING
+#if DECIMAL_CALL_BY_REFERENCE
+#define _RND_MODE_ARG , &rnd_mode
+#define _RND_MODE_PARAM , _IDEC_round *prnd_mode
+#define _RND_MODE_ARG_ALONE &rnd_mode
+#define _RND_MODE_PARAM_ALONE _IDEC_round *prnd_mode
+#else
+#define _RND_MODE_ARG , rnd_mode
+#define _RND_MODE_PARAM , _IDEC_round rnd_mode
+#define _RND_MODE_ARG_ALONE rnd_mode
+#define _RND_MODE_PARAM_ALONE _IDEC_round rnd_mode
+#endif
+#else
+#define _RND_MODE_ARG
+#define _RND_MODE_PARAM
+#define _RND_MODE_ARG_ALONE
+#define _RND_MODE_PARAM_ALONE
+#define rnd_mode _IDEC_glbround
+#endif
+
+// Notes: 1) pfpsf from _EXC_FLAGS_ARG is used by the caller of a function
+//           from this library, and can be any name 
+//        2) pfpsf from _EXC_FLAGS_PARAM is a fixed name and *must* be used  
+//           in the library functions
+//        3) _IDEC_glbflags is the fixed name for the global variable holding 
+//           the floating-point status flags
+#if !DECIMAL_GLOBAL_EXCEPTION_FLAGS
+#define _EXC_FLAGS_ARG , pfpsf
+#define _EXC_FLAGS_PARAM , _IDEC_flags *pfpsf
+#else
+#define _EXC_FLAGS_ARG
+#define _EXC_FLAGS_PARAM
+#define pfpsf &_IDEC_glbflags
+#endif
+
+#if DECIMAL_GLOBAL_ROUNDING
+extern BID_THREAD _IDEC_round _IDEC_glbround;
+#endif
+
+#if DECIMAL_GLOBAL_EXCEPTION_FLAGS
+extern BID_THREAD _IDEC_flags _IDEC_glbflags;
+#endif
+
+#if DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+#if DECIMAL_GLOBAL_EXCEPTION_MASKS
+extern BID_THREAD _IDEC_exceptionmasks _IDEC_glbexceptionmasks;
+#endif
+#if DECIMAL_GLOBAL_EXCEPTION_INFO
+extern BID_THREAD _IDEC_excepthandling _IDEC_glbexcepthandling;
+#endif
+#endif
+
+#if DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+
+  // Notes: 1) exc_mask from _EXC_MASKS_ARG is used by the caller of a function
+  //           from this library, and can be any name
+  //        2) exc_mask and pexc_mask from _EXC_MASKS_PARAM are fixed names
+  //           and *must* be used in the library functions
+  //        3) _IDEC_glbexceptionmasks is the fixed name for the global 
+  //           variable holding the floating-point exception masks
+#if !DECIMAL_GLOBAL_EXCEPTION_MASKS
+#if DECIMAL_CALL_BY_REFERENCE
+#define _EXC_MASKS_ARG , &exc_mask
+#define _EXC_MASKS_PARAM , _IDEC_exceptionmasks *pexc_mask
+#else
+#define _EXC_MASKS_ARG , exc_mask
+#define _EXC_MASKS_PARAM , _IDEC_exceptionmasks exc_mask
+#endif
+#else
+#define _EXC_MASKS_ARG
+#define _EXC_MASKS_PARAM
+#define exc_mask _IDEC_glbexceptionmasks
+#endif
+
+  // Notes: 1) pexc_info from _EXC_INFO_ARG is used by the caller of a function
+  //           from this library, and can be any name
+  //        2) pexc_info from _EXC_INFO_PARAM is a fixed name and *must* be  
+  //           used in the library functions
+  //        3) _IDEC_glbexcepthandling is the fixed name for the global  
+  //           variable holding the floating-point exception information
+#if !DECIMAL_GLOBAL_EXCEPTION_INFO
+#define _EXC_INFO_ARG , pexc_info
+#define _EXC_INFO_PARAM , _IDEC_excepthandling *pexc_info
+#else
+#define _EXC_INFO_ARG
+#define _EXC_INFO_PARAM
+#define pexc_info &_IDEC_glbexcepthandling
+#endif
+#else
+#define _EXC_MASKS_ARG
+#define _EXC_MASKS_PARAM
+#define _EXC_INFO_ARG
+#define _EXC_INFO_PARAM
+#endif
+
+
+#ifndef BID_BIG_ENDIAN
+#define BID_BIG_ENDIAN 0
+#endif
+
+#if BID_BIG_ENDIAN
+#define BID_SWAP128(x) {  \
+  UINT64 sw;              \
+  sw = (x).w[1];          \
+  (x).w[1] = (x).w[0];    \
+  (x).w[0] = sw;          \
+  }
+#else
+#define BID_SWAP128(x)
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#define BID_RETURN_VAL(x) { *pres = (x); return; }
+#if BID_BIG_ENDIAN && defined BID_128RES
+#define BID_RETURN(x) { BID_SWAP128(x); *pres = (x); return; }
+#else
+#define BID_RETURN(x) { *pres = (x); return; }
+#endif
+#else
+#define BID_RETURN_VAL(x) return(x);
+#if BID_BIG_ENDIAN && defined BID_128RES
+#define BID_RETURN(x) { BID_SWAP128(x); return(x); }
+#else
+#define BID_RETURN(x) return(x);
+#endif
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#define BIDECIMAL_CALL1(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), &(_OP1) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), &(_OP1) _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2(_FUNC, _RES, _OP1, _OP2) \
+    _FUNC(&(_RES), &(_OP1), &(_OP2) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2_NORND(_FUNC, _RES, _OP1, _OP2) \
+    _FUNC(&(_RES), &(_OP1), &(_OP2) _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_RESREF(_FUNC, _RES, _OP1) \
+    _FUNC((_RES), &(_OP1) _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_RESARG(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), (_OP1) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_RESREF(_FUNC, _RES, _OP1) \
+    _FUNC((_RES), &(_OP1) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_NOSTAT(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), &(_OP1) _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2_NORND_NOSTAT(_FUNC, _RES, _OP1, _OP2) \
+    _FUNC(&(_RES), &(_OP1), &(_OP2) _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL3(_FUNC, _RES, _OP1, _OP2, _OP3) \
+    _FUNC(&(_RES), &(_OP1), &(_OP2), &(_OP3) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), &(_OP1) _EXC_FLAGS_ARG )
+#define BIDECIMAL_CALL1_NORND_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _FUNC(&(_RES), &(_OP1) )
+#define BIDECIMAL_CALL2_NORND_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1, _OP2) \
+    _FUNC(&(_RES), &(_OP1), &(_OP2) )
+#define BIDECIMAL_CALL1_NORND_NOMASK_NOINFO_RESVOID(_FUNC, _OP1) \
+    _FUNC(&(_OP1) _EXC_FLAGS_ARG )
+#define BIDECIMAL_CALL2_NORND_NOMASK_NOINFO_RESVOID(_FUNC, _OP1, _OP2) \
+    _FUNC(&(_OP1), &(_OP2) _EXC_FLAGS_ARG )
+#define BIDECIMAL_CALLV_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES) \
+    _FUNC(&(_RES) _RND_MODE_ARG)
+#define BIDECIMAL_CALL1_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _FUNC(&(_OP1) _RND_MODE_ARG)
+#else
+#define BIDECIMAL_CALL1(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2(_FUNC, _RES, _OP1, _OP2) \
+    _RES = _FUNC((_OP1), (_OP2) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2_NORND(_FUNC, _RES, _OP1, _OP2) \
+    _RES = _FUNC((_OP1), (_OP2) _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_RESREF(_FUNC, _RES, _OP1) \
+    _FUNC((_RES), _OP1 _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_RESARG(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_RESREF(_FUNC, _RES, _OP1) \
+    _FUNC((_RES), _OP1 _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_NOSTAT(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL2_NORND_NOSTAT(_FUNC, _RES, _OP1, _OP2) \
+    _RES = _FUNC((_OP1), (_OP2) _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL3(_FUNC, _RES, _OP1, _OP2, _OP3) \
+    _RES = _FUNC((_OP1), (_OP2), (_OP3) _RND_MODE_ARG _EXC_FLAGS_ARG _EXC_MASKS_ARG _EXC_INFO_ARG)
+#define BIDECIMAL_CALL1_NORND_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _EXC_FLAGS_ARG)
+#define BIDECIMAL_CALL1_NORND_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) )
+#define BIDECIMAL_CALL2_NORND_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1, _OP2) \
+    _RES = _FUNC((_OP1), (_OP2) )
+#define BIDECIMAL_CALL1_NORND_NOMASK_NOINFO_RESVOID(_FUNC, _OP1) \
+    _FUNC((_OP1) _EXC_FLAGS_ARG)
+#define BIDECIMAL_CALL2_NORND_NOMASK_NOINFO_RESVOID(_FUNC, _OP1, _OP2) \
+    _FUNC((_OP1), (_OP2) _EXC_FLAGS_ARG)
+#define BIDECIMAL_CALLV_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES) \
+    _RES = _FUNC(_RND_MODE_ARG_ALONE)
+#if !DECIMAL_GLOBAL_ROUNDING
+#define BIDECIMAL_CALL1_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _RES = _FUNC((_OP1) _RND_MODE_ARG)
+#else
+#define BIDECIMAL_CALL1_NOFLAGS_NOMASK_NOINFO(_FUNC, _RES, _OP1) \
+    _FUNC((_OP1) _RND_MODE_ARG)
+#endif
+#endif
+
+#if BID_BIG_ENDIAN
+#define HIGH_128W 0
+#define LOW_128W  1
+#else
+#define HIGH_128W 1
+#define LOW_128W  0
+#endif
+
+#if BID_BIG_ENDIAN
+#define COPY_ARG_REF(arg_name) \
+       UINT128 arg_name={ pbid_##arg_name->w[1], pbid_##arg_name->w[0]};
+#define COPY_ARG_VAL(arg_name) \
+       UINT128 arg_name={ bid_##arg_name.w[1], bid_##arg_name.w[0]};
+#else
+#define COPY_ARG_REF(arg_name) \
+       UINT128 arg_name=*pbid_##arg_name;
+#define COPY_ARG_VAL(arg_name) \
+       UINT128 arg_name= bid_##arg_name;
+#endif
+
+#define COPY_ARG_TYPE_REF(type, arg_name) \
+       type arg_name=*pbid_##arg_name;
+#define COPY_ARG_TYPE_VAL(type, arg_name) \
+       type arg_name= bid_##arg_name;
+
+#if !DECIMAL_GLOBAL_ROUNDING
+#define SET_RND_MODE() \
+  _IDEC_round rnd_mode = *prnd_mode;
+#else
+#define SET_RND_MODE()
+#endif
+
+#define PROLOG_REF(arg_name) \
+       COPY_ARG_REF(arg_name)
+
+#define PROLOG_VAL(arg_name) \
+       COPY_ARG_VAL(arg_name)
+
+#define PROLOG_TYPE_REF(type, arg_name) \
+       COPY_ARG_TYPE_REF(type, arg_name)
+
+#define PROLOG_TYPE_VAL(type, arg_name) \
+      COPY_ARG_TYPE_VAL(type, arg_name)
+
+#define OTHER_PROLOG_REF()
+#define OTHER_PROLOG_VAL()
+
+#if DECIMAL_CALL_BY_REFERENCE
+#define       BID128_FUNCTION_ARG1(fn_name, arg_name)\
+      void fn_name (UINT128 * pres, \
+           UINT128 *  \
+           pbid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARG1_NORND(fn_name, arg_name)\
+      void fn_name (UINT128 * pres, \
+           UINT128 *  \
+           pbid_##arg_name _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name)   \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE(restype, fn_name, arg_name)\
+      void fn_name (restype * pres, \
+           UINT128 *  \
+           pbid_##arg_name _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name)   \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARG2(fn_name, arg_name1, arg_name2)\
+      void fn_name (UINT128 * pres, \
+           UINT128 *pbid_##arg_name1,  UINT128 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name1)   \
+     PROLOG_REF(arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE(restype, fn_name, arg_name1, arg_name2)\
+      void fn_name (restype * pres, \
+           UINT128 *pbid_##arg_name1,  UINT128 *pbid_##arg_name2  \
+           _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name1)   \
+     PROLOG_REF(arg_name2)   \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARG128_ARGTYPE2(fn_name, arg_name1, type2, arg_name2)\
+      void fn_name (UINT128 * pres, \
+           UINT128 *pbid_##arg_name1,  type2 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name1)   \
+     PROLOG_TYPE_REF(type2, arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_ARGTYPE2(type0, fn_name, type1, arg_name1, type2, arg_name2)\
+      void fn_name (type0 *pres, \
+           type1 *pbid_##arg_name1,  type2 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name1)   \
+     PROLOG_TYPE_REF(type2, arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARGTYPE1_ARG128(fn_name, type1, arg_name1, arg_name2)\
+      void fn_name (UINT128 * pres, \
+           type1 *pbid_##arg_name1,  UINT128 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name1)   \
+     PROLOG_REF(arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARG128_ARGTYPE2(type0, fn_name, arg_name1, type2, arg_name2)\
+      void fn_name (type0 *pres, \
+           UINT128 *pbid_##arg_name1,  type2 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name1)   \
+     PROLOG_TYPE_REF(type2, arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_ARG128(type0, fn_name, type1, arg_name1, arg_name2)\
+      void fn_name (type0 *pres, \
+           type1 *pbid_##arg_name1,  UINT128 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name1)   \
+     PROLOG_REF(arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARG128_ARG128(type0, fn_name, arg_name1, arg_name2)\
+      void fn_name (type0 * pres, \
+           UINT128 *pbid_##arg_name1,  UINT128 *pbid_##arg_name2  \
+           _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name1)   \
+     PROLOG_REF(arg_name2)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARG1(type0, fn_name, arg_name)\
+      void fn_name (type0 * pres, \
+           UINT128 *  \
+           pbid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_REF(arg_name)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       BID128_FUNCTION_ARGTYPE1(fn_name, type1, arg_name)\
+      void fn_name (UINT128 * pres, \
+           type1 *  \
+           pbid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARGTYPE1(type0, fn_name, type1, arg_name)\
+      void fn_name (type0 * pres, \
+           type1 *  \
+           pbid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name)   \
+     SET_RND_MODE()         \
+     OTHER_PROLOG_REF()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_NORND(type0, fn_name, type1, arg_name)\
+      void fn_name (type0 * pres, \
+           type1 *  \
+           pbid_##arg_name _EXC_FLAGS_PARAM _EXC_MASKS_PARAM \
+           _EXC_INFO_PARAM) {\
+     PROLOG_TYPE_REF(type1, arg_name)   \
+     OTHER_PROLOG_REF()
+
+//////////////////////////////////////////
+/////////////////////////////////////////
+////////////////////////////////////////
+
+#else
+
+//////////////////////////////////////////
+/////////////////////////////////////////
+////////////////////////////////////////
+
+#define       BID128_FUNCTION_ARG1(fn_name, arg_name)\
+     UINT128                                     \
+     fn_name (UINT128 bid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_VAL(arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARG1_NORND(fn_name, arg_name)\
+     UINT128                                     \
+     fn_name (UINT128 bid_##arg_name _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_VAL(arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARG1_NORND_CUSTOMRESTYPE(restype, fn_name, arg_name)\
+     restype                                     \
+     fn_name (UINT128 bid_##arg_name _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_VAL(arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARG2(fn_name, arg_name1, arg_name2)\
+     UINT128                                     \
+     fn_name (UINT128 bid_##arg_name1,      \
+            UINT128 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_VAL(arg_name1)                      \
+     PROLOG_VAL(arg_name2)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARG2_NORND_CUSTOMRESTYPE(restype, fn_name, arg_name1, arg_name2)\
+     restype                                    \
+     fn_name (UINT128 bid_##arg_name1,      \
+            UINT128 bid_##arg_name2 _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_VAL(arg_name1)                      \
+     PROLOG_VAL(arg_name2)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARG128_ARGTYPE2(fn_name, arg_name1, type2, arg_name2)\
+     UINT128                                     \
+     fn_name (UINT128 bid_##arg_name1,      \
+            type2 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_VAL(arg_name1)                      \
+     PROLOG_TYPE_VAL(type2, arg_name2)          \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_ARGTYPE2(type0, fn_name, type1, arg_name1, type2, arg_name2)\
+     type0                                     \
+     fn_name (type1 bid_##arg_name1,      \
+            type2 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_TYPE_VAL(type1, arg_name1)                      \
+     PROLOG_TYPE_VAL(type2, arg_name2)          \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARGTYPE1_ARG128(fn_name, type1, arg_name1, arg_name2)\
+     UINT128                                     \
+     fn_name (type1 bid_##arg_name1,      \
+            UINT128 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_TYPE_VAL(type1, arg_name1)          \
+     PROLOG_VAL(arg_name2)                      \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARG128_ARGTYPE2(type0, fn_name, arg_name1, type2, arg_name2)\
+     type0                                     \
+     fn_name (UINT128 bid_##arg_name1,      \
+            type2 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_VAL(arg_name1)                      \
+     PROLOG_TYPE_VAL(type2, arg_name2)          \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_ARG128(type0, fn_name, type1, arg_name1, arg_name2)\
+     type0                                     \
+     fn_name (type1 bid_##arg_name1,      \
+            UINT128 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_TYPE_VAL(type1, arg_name1)                      \
+     PROLOG_VAL(arg_name2)          \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARG128_ARG128(type0, fn_name, arg_name1, arg_name2)\
+     type0                                     \
+     fn_name (UINT128 bid_##arg_name1,      \
+            UINT128 bid_##arg_name2 _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) {  \
+     PROLOG_VAL(arg_name1)                      \
+     PROLOG_VAL(arg_name2)                      \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARG1(type0, fn_name, arg_name)\
+     type0                                     \
+     fn_name (UINT128 bid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_VAL(arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       BID128_FUNCTION_ARGTYPE1(fn_name, type1, arg_name)\
+     UINT128                                     \
+     fn_name (type1 bid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_TYPE_VAL(type1, arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARGTYPE1(type0, fn_name, type1, arg_name)\
+     type0                                     \
+     fn_name (type1 bid_##arg_name _RND_MODE_PARAM _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_TYPE_VAL(type1, arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#define       TYPE0_FUNCTION_ARGTYPE1_NORND(type0, fn_name, type1, arg_name)\
+     type0                                     \
+     fn_name (type1 bid_##arg_name _EXC_FLAGS_PARAM  \
+           _EXC_MASKS_PARAM _EXC_INFO_PARAM) { \
+     PROLOG_TYPE_VAL(type1, arg_name)                      \
+     OTHER_PROLOG_VAL()
+
+#endif
+
+
+
+#define   BID_TO_SMALL_UINT_CVT_FUNCTION(type0, fn_name, type1, arg_name, cvt_fn_name, type2, size_mask, invalid_res)\
+    TYPE0_FUNCTION_ARGTYPE1_NORND(type0, fn_name, type1, arg_name)\
+	type2 res;                                                    \
+	_IDEC_flags saved_fpsc=*pfpsf;                                \
+    BIDECIMAL_CALL1_NORND(cvt_fn_name, res, arg_name);            \
+	if(res & size_mask) {                                         \
+      *pfpsf = saved_fpsc | INVALID_EXCEPTION;                    \
+	  res = invalid_res; }                                        \
+    BID_RETURN_VAL((type0)res);                                   \
+		   }
+
+#define   BID_TO_SMALL_INT_CVT_FUNCTION(type0, fn_name, type1, arg_name, cvt_fn_name, type2, size_mask, invalid_res)\
+    TYPE0_FUNCTION_ARGTYPE1_NORND(type0, fn_name, type1, arg_name)\
+	type2 res, sgn_mask;                                          \
+	_IDEC_flags saved_fpsc=*pfpsf;                                \
+    BIDECIMAL_CALL1_NORND(cvt_fn_name, res, arg_name);            \
+	sgn_mask = res & size_mask;                                   \
+	if(sgn_mask && (sgn_mask != (type2)size_mask)) {                     \
+      *pfpsf = saved_fpsc | INVALID_EXCEPTION;                    \
+	  res = invalid_res; }                                        \
+    BID_RETURN_VAL((type0)res);                                   \
+		   }
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_convert_data.c b/gcc-4.9/libgcc/config/libbid/bid_convert_data.c
new file mode 100644
index 000000000..746c342b1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_convert_data.c
@@ -0,0 +1,2108 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+// convert_table[j][k][i] = digit i (base 10^8) of k*2^(26+7*j)
+const UINT32 convert_table[5][128][2] = {
+  {{0, 0}
+   , {67108864, 0}
+   , {34217728, 1}
+   , {1326592, 2}
+   , {68435456, 2}
+   ,
+   {35544320, 3}
+   , {2653184, 4}
+   , {69762048, 4}
+   , {36870912, 5}
+   , {3979776, 6}
+   ,
+   {71088640, 6}
+   , {38197504, 7}
+   , {5306368, 8}
+   , {72415232, 8}
+   , {39524096, 9}
+   ,
+   {6632960, 10}
+   , {73741824, 10}
+   , {40850688, 11}
+   , {7959552, 12}
+   , {75068416, 12}
+   ,
+   {42177280, 13}
+   , {9286144, 14}
+   , {76395008, 14}
+   , {43503872, 15}
+   , {10612736, 16}
+   ,
+   {77721600, 16}
+   , {44830464, 17}
+   , {11939328, 18}
+   , {79048192, 18}
+   , {46157056, 19}
+   ,
+   {13265920, 20}
+   , {80374784, 20}
+   , {47483648, 21}
+   , {14592512, 22}
+   , {81701376, 22}
+   ,
+   {48810240, 23}
+   , {15919104, 24}
+   , {83027968, 24}
+   , {50136832, 25}
+   , {17245696, 26}
+   ,
+   {84354560, 26}
+   , {51463424, 27}
+   , {18572288, 28}
+   , {85681152, 28}
+   , {52790016, 29}
+   ,
+   {19898880, 30}
+   , {87007744, 30}
+   , {54116608, 31}
+   , {21225472, 32}
+   , {88334336, 32}
+   ,
+   {55443200, 33}
+   , {22552064, 34}
+   , {89660928, 34}
+   , {56769792, 35}
+   , {23878656, 36}
+   ,
+   {90987520, 36}
+   , {58096384, 37}
+   , {25205248, 38}
+   , {92314112, 38}
+   , {59422976, 39}
+   ,
+   {26531840, 40}
+   , {93640704, 40}
+   , {60749568, 41}
+   , {27858432, 42}
+   , {94967296, 42}
+   ,
+   {62076160, 43}
+   , {29185024, 44}
+   , {96293888, 44}
+   , {63402752, 45}
+   , {30511616, 46}
+   ,
+   {97620480, 46}
+   , {64729344, 47}
+   , {31838208, 48}
+   , {98947072, 48}
+   , {66055936, 49}
+   ,
+   {33164800, 50}
+   , {273664, 51}
+   , {67382528, 51}
+   , {34491392, 52}
+   , {1600256, 53}
+   ,
+   {68709120, 53}
+   , {35817984, 54}
+   , {2926848, 55}
+   , {70035712, 55}
+   , {37144576, 56}
+   ,
+   {4253440, 57}
+   , {71362304, 57}
+   , {38471168, 58}
+   , {5580032, 59}
+   , {72688896, 59}
+   ,
+   {39797760, 60}
+   , {6906624, 61}
+   , {74015488, 61}
+   , {41124352, 62}
+   , {8233216, 63}
+   ,
+   {75342080, 63}
+   , {42450944, 64}
+   , {9559808, 65}
+   , {76668672, 65}
+   , {43777536, 66}
+   ,
+   {10886400, 67}
+   , {77995264, 67}
+   , {45104128, 68}
+   , {12212992, 69}
+   , {79321856, 69}
+   ,
+   {46430720, 70}
+   , {13539584, 71}
+   , {80648448, 71}
+   , {47757312, 72}
+   , {14866176, 73}
+   ,
+   {81975040, 73}
+   , {49083904, 74}
+   , {16192768, 75}
+   , {83301632, 75}
+   , {50410496, 76}
+   ,
+   {17519360, 77}
+   , {84628224, 77}
+   , {51737088, 78}
+   , {18845952, 79}
+   , {85954816, 79}
+   ,
+   {53063680, 80}
+   , {20172544, 81}
+   , {87281408, 81}
+   , {54390272, 82}
+   , {21499136, 83}
+   ,
+   {88608000, 83}
+   , {55716864, 84}
+   , {22825728, 85}
+   ,
+   }
+  ,
+
+  {{0, 0}
+   , {89934592, 85}
+   , {79869184, 171}
+   , {69803776, 257}
+   , {59738368, 343}
+   ,
+   {49672960, 429}
+   , {39607552, 515}
+   , {29542144, 601}
+   , {19476736, 687}
+   , {9411328, 773}
+   ,
+   {99345920, 858}
+   , {89280512, 944}
+   , {79215104, 1030}
+   , {69149696, 1116}
+   , {59084288, 1202}
+   ,
+   {49018880, 1288}
+   , {38953472, 1374}
+   , {28888064, 1460}
+   , {18822656, 1546}
+   , {8757248, 1632}
+   ,
+   {98691840, 1717}
+   , {88626432, 1803}
+   , {78561024, 1889}
+   , {68495616, 1975}
+   , {58430208, 2061}
+   ,
+   {48364800, 2147}
+   , {38299392, 2233}
+   , {28233984, 2319}
+   , {18168576, 2405}
+   , {8103168, 2491}
+   ,
+   {98037760, 2576}
+   , {87972352, 2662}
+   , {77906944, 2748}
+   , {67841536, 2834}
+   , {57776128, 2920}
+   ,
+   {47710720, 3006}
+   , {37645312, 3092}
+   , {27579904, 3178}
+   , {17514496, 3264}
+   , {7449088, 3350}
+   ,
+   {97383680, 3435}
+   , {87318272, 3521}
+   , {77252864, 3607}
+   , {67187456, 3693}
+   , {57122048, 3779}
+   ,
+   {47056640, 3865}
+   , {36991232, 3951}
+   , {26925824, 4037}
+   , {16860416, 4123}
+   , {6795008, 4209}
+   ,
+   {96729600, 4294}
+   , {86664192, 4380}
+   , {76598784, 4466}
+   , {66533376, 4552}
+   , {56467968, 4638}
+   ,
+   {46402560, 4724}
+   , {36337152, 4810}
+   , {26271744, 4896}
+   , {16206336, 4982}
+   , {6140928, 5068}
+   ,
+   {96075520, 5153}
+   , {86010112, 5239}
+   , {75944704, 5325}
+   , {65879296, 5411}
+   , {55813888, 5497}
+   ,
+   {45748480, 5583}
+   , {35683072, 5669}
+   , {25617664, 5755}
+   , {15552256, 5841}
+   , {5486848, 5927}
+   ,
+   {95421440, 6012}
+   , {85356032, 6098}
+   , {75290624, 6184}
+   , {65225216, 6270}
+   , {55159808, 6356}
+   ,
+   {45094400, 6442}
+   , {35028992, 6528}
+   , {24963584, 6614}
+   , {14898176, 6700}
+   , {4832768, 6786}
+   ,
+   {94767360, 6871}
+   , {84701952, 6957}
+   , {74636544, 7043}
+   , {64571136, 7129}
+   , {54505728, 7215}
+   ,
+   {44440320, 7301}
+   , {34374912, 7387}
+   , {24309504, 7473}
+   , {14244096, 7559}
+   , {4178688, 7645}
+   ,
+   {94113280, 7730}
+   , {84047872, 7816}
+   , {73982464, 7902}
+   , {63917056, 7988}
+   , {53851648, 8074}
+   ,
+   {43786240, 8160}
+   , {33720832, 8246}
+   , {23655424, 8332}
+   , {13590016, 8418}
+   , {3524608, 8504}
+   ,
+   {93459200, 8589}
+   , {83393792, 8675}
+   , {73328384, 8761}
+   , {63262976, 8847}
+   , {53197568, 8933}
+   ,
+   {43132160, 9019}
+   , {33066752, 9105}
+   , {23001344, 9191}
+   , {12935936, 9277}
+   , {2870528, 9363}
+   ,
+   {92805120, 9448}
+   , {82739712, 9534}
+   , {72674304, 9620}
+   , {62608896, 9706}
+   , {52543488, 9792}
+   ,
+   {42478080, 9878}
+   , {32412672, 9964}
+   , {22347264, 10050}
+   , {12281856, 10136}
+   , {2216448, 10222}
+   ,
+   {92151040, 10307}
+   , {82085632, 10393}
+   , {72020224, 10479}
+   , {61954816, 10565}
+   , {51889408, 10651}
+   ,
+   {41824000, 10737}
+   , {31758592, 10823}
+   , {21693184, 10909}
+   ,
+   }
+  ,
+
+  {{0, 0}
+   , {11627776, 10995}
+   , {23255552, 21990}
+   , {34883328, 32985}
+   , {46511104, 43980}
+   ,
+   {58138880, 54975}
+   , {69766656, 65970}
+   , {81394432, 76965}
+   , {93022208, 87960}
+   , {4649984, 98956}
+   ,
+   {16277760, 109951}
+   , {27905536, 120946}
+   , {39533312, 131941}
+   , {51161088, 142936}
+   , {62788864, 153931}
+   ,
+   {74416640, 164926}
+   , {86044416, 175921}
+   , {97672192, 186916}
+   , {9299968, 197912}
+   , {20927744, 208907}
+   ,
+   {32555520, 219902}
+   , {44183296, 230897}
+   , {55811072, 241892}
+   , {67438848, 252887}
+   , {79066624, 263882}
+   ,
+   {90694400, 274877}
+   , {2322176, 285873}
+   , {13949952, 296868}
+   , {25577728, 307863}
+   , {37205504, 318858}
+   ,
+   {48833280, 329853}
+   , {60461056, 340848}
+   , {72088832, 351843}
+   , {83716608, 362838}
+   , {95344384, 373833}
+   ,
+   {6972160, 384829}
+   , {18599936, 395824}
+   , {30227712, 406819}
+   , {41855488, 417814}
+   , {53483264, 428809}
+   ,
+   {65111040, 439804}
+   , {76738816, 450799}
+   , {88366592, 461794}
+   , {99994368, 472789}
+   , {11622144, 483785}
+   ,
+   {23249920, 494780}
+   , {34877696, 505775}
+   , {46505472, 516770}
+   , {58133248, 527765}
+   , {69761024, 538760}
+   ,
+   {81388800, 549755}
+   , {93016576, 560750}
+   , {4644352, 571746}
+   , {16272128, 582741}
+   , {27899904, 593736}
+   ,
+   {39527680, 604731}
+   , {51155456, 615726}
+   , {62783232, 626721}
+   , {74411008, 637716}
+   , {86038784, 648711}
+   ,
+   {97666560, 659706}
+   , {9294336, 670702}
+   , {20922112, 681697}
+   , {32549888, 692692}
+   , {44177664, 703687}
+   ,
+   {55805440, 714682}
+   , {67433216, 725677}
+   , {79060992, 736672}
+   , {90688768, 747667}
+   , {2316544, 758663}
+   ,
+   {13944320, 769658}
+   , {25572096, 780653}
+   , {37199872, 791648}
+   , {48827648, 802643}
+   , {60455424, 813638}
+   ,
+   {72083200, 824633}
+   , {83710976, 835628}
+   , {95338752, 846623}
+   , {6966528, 857619}
+   , {18594304, 868614}
+   ,
+   {30222080, 879609}
+   , {41849856, 890604}
+   , {53477632, 901599}
+   , {65105408, 912594}
+   , {76733184, 923589}
+   ,
+   {88360960, 934584}
+   , {99988736, 945579}
+   , {11616512, 956575}
+   , {23244288, 967570}
+   , {34872064, 978565}
+   ,
+   {46499840, 989560}
+   , {58127616, 1000555}
+   , {69755392, 1011550}
+   , {81383168, 1022545}
+   , {93010944, 1033540}
+   ,
+   {4638720, 1044536}
+   , {16266496, 1055531}
+   , {27894272, 1066526}
+   , {39522048, 1077521}
+   , {51149824, 1088516}
+   ,
+   {62777600, 1099511}
+   , {74405376, 1110506}
+   , {86033152, 1121501}
+   , {97660928, 1132496}
+   , {9288704, 1143492}
+   ,
+   {20916480, 1154487}
+   , {32544256, 1165482}
+   , {44172032, 1176477}
+   , {55799808, 1187472}
+   , {67427584, 1198467}
+   ,
+   {79055360, 1209462}
+   , {90683136, 1220457}
+   , {2310912, 1231453}
+   , {13938688, 1242448}
+   , {25566464, 1253443}
+   ,
+   {37194240, 1264438}
+   , {48822016, 1275433}
+   , {60449792, 1286428}
+   , {72077568, 1297423}
+   , {83705344, 1308418}
+   ,
+   {95333120, 1319413}
+   , {6960896, 1330409}
+   , {18588672, 1341404}
+   , {30216448, 1352399}
+   , {41844224, 1363394}
+   ,
+   {53472000, 1374389}
+   , {65099776, 1385384}
+   , {76727552, 1396379}
+   ,
+   }
+  ,
+
+  {{0, 0}
+   , {88355328, 1407374}
+   , {76710656, 2814749}
+   , {65065984, 4222124}
+   , {53421312, 5629499}
+   ,
+   {41776640, 7036874}
+   , {30131968, 8444249}
+   , {18487296, 9851624}
+   , {6842624, 11258999}
+   , {95197952, 12666373}
+   ,
+   {83553280, 14073748}
+   , {71908608, 15481123}
+   , {60263936, 16888498}
+   , {48619264, 18295873}
+   , {36974592, 19703248}
+   ,
+   {25329920, 21110623}
+   , {13685248, 22517998}
+   , {2040576, 23925373}
+   , {90395904, 25332747}
+   , {78751232, 26740122}
+   ,
+   {67106560, 28147497}
+   , {55461888, 29554872}
+   , {43817216, 30962247}
+   , {32172544, 32369622}
+   , {20527872, 33776997}
+   ,
+   {8883200, 35184372}
+   , {97238528, 36591746}
+   , {85593856, 37999121}
+   , {73949184, 39406496}
+   , {62304512, 40813871}
+   ,
+   {50659840, 42221246}
+   , {39015168, 43628621}
+   , {27370496, 45035996}
+   , {15725824, 46443371}
+   , {4081152, 47850746}
+   ,
+   {92436480, 49258120}
+   , {80791808, 50665495}
+   , {69147136, 52072870}
+   , {57502464, 53480245}
+   , {45857792, 54887620}
+   ,
+   {34213120, 56294995}
+   , {22568448, 57702370}
+   , {10923776, 59109745}
+   , {99279104, 60517119}
+   , {87634432, 61924494}
+   ,
+   {75989760, 63331869}
+   , {64345088, 64739244}
+   , {52700416, 66146619}
+   , {41055744, 67553994}
+   , {29411072, 68961369}
+   ,
+   {17766400, 70368744}
+   , {6121728, 71776119}
+   , {94477056, 73183493}
+   , {82832384, 74590868}
+   , {71187712, 75998243}
+   ,
+   {59543040, 77405618}
+   , {47898368, 78812993}
+   , {36253696, 80220368}
+   , {24609024, 81627743}
+   , {12964352, 83035118}
+   ,
+   {1319680, 84442493}
+   , {89675008, 85849867}
+   , {78030336, 87257242}
+   , {66385664, 88664617}
+   , {54740992, 90071992}
+   ,
+   {43096320, 91479367}
+   , {31451648, 92886742}
+   , {19806976, 94294117}
+   , {8162304, 95701492}
+   , {96517632, 97108866}
+   ,
+   {84872960, 98516241}
+   , {73228288, 99923616}
+   , {61583616, 1330991}
+   , {49938944, 2738366}
+   , {38294272, 4145741}
+   ,
+   {26649600, 5553116}
+   , {15004928, 6960491}
+   , {3360256, 8367866}
+   , {91715584, 9775240}
+   , {80070912, 11182615}
+   ,
+   {68426240, 12589990}
+   , {56781568, 13997365}
+   , {45136896, 15404740}
+   , {33492224, 16812115}
+   , {21847552, 18219490}
+   ,
+   {10202880, 19626865}
+   , {98558208, 21034239}
+   , {86913536, 22441614}
+   , {75268864, 23848989}
+   , {63624192, 25256364}
+   ,
+   {51979520, 26663739}
+   , {40334848, 28071114}
+   , {28690176, 29478489}
+   , {17045504, 30885864}
+   , {5400832, 32293239}
+   ,
+   {93756160, 33700613}
+   , {82111488, 35107988}
+   , {70466816, 36515363}
+   , {58822144, 37922738}
+   , {47177472, 39330113}
+   ,
+   {35532800, 40737488}
+   , {23888128, 42144863}
+   , {12243456, 43552238}
+   , {598784, 44959613}
+   , {88954112, 46366987}
+   ,
+   {77309440, 47774362}
+   , {65664768, 49181737}
+   , {54020096, 50589112}
+   , {42375424, 51996487}
+   , {30730752, 53403862}
+   ,
+   {19086080, 54811237}
+   , {7441408, 56218612}
+   , {95796736, 57625986}
+   , {84152064, 59033361}
+   , {72507392, 60440736}
+   ,
+   {60862720, 61848111}
+   , {49218048, 63255486}
+   , {37573376, 64662861}
+   , {25928704, 66070236}
+   , {14284032, 67477611}
+   ,
+   {2639360, 68884986}
+   , {90994688, 70292360}
+   , {79350016, 71699735}
+   , {67705344, 73107110}
+   , {56060672, 74514485}
+   ,
+   {44416000, 75921860}
+   , {32771328, 77329235}
+   , {21126656, 78736610}
+   ,
+   }
+  ,
+
+  {{0, 0}
+   , {9481984, 80143985}
+   , {18963968, 60287970}
+   , {28445952, 40431955}
+   , {37927936, 20575940}
+   ,
+   {47409920, 719925}
+   , {56891904, 80863910}
+   , {66373888, 61007895}
+   , {75855872, 41151880}
+   , {85337856, 21295865}
+   ,
+   {94819840, 1439850}
+   , {4301824, 81583836}
+   , {13783808, 61727821}
+   , {23265792, 41871806}
+   , {32747776, 22015791}
+   ,
+   {42229760, 2159776}
+   , {51711744, 82303761}
+   , {61193728, 62447746}
+   , {70675712, 42591731}
+   , {80157696, 22735716}
+   ,
+   {89639680, 2879701}
+   , {99121664, 83023686}
+   , {8603648, 63167672}
+   , {18085632, 43311657}
+   , {27567616, 23455642}
+   ,
+   {37049600, 3599627}
+   , {46531584, 83743612}
+   , {56013568, 63887597}
+   , {65495552, 44031582}
+   , {74977536, 24175567}
+   ,
+   {84459520, 4319552}
+   , {93941504, 84463537}
+   , {3423488, 64607523}
+   , {12905472, 44751508}
+   , {22387456, 24895493}
+   ,
+   {31869440, 5039478}
+   , {41351424, 85183463}
+   , {50833408, 65327448}
+   , {60315392, 45471433}
+   , {69797376, 25615418}
+   ,
+   {79279360, 5759403}
+   , {88761344, 85903388}
+   , {98243328, 66047373}
+   , {7725312, 46191359}
+   , {17207296, 26335344}
+   ,
+   {26689280, 6479329}
+   , {36171264, 86623314}
+   , {45653248, 66767299}
+   , {55135232, 46911284}
+   , {64617216, 27055269}
+   ,
+   {74099200, 7199254}
+   , {83581184, 87343239}
+   , {93063168, 67487224}
+   , {2545152, 47631210}
+   , {12027136, 27775195}
+   ,
+   {21509120, 7919180}
+   , {30991104, 88063165}
+   , {40473088, 68207150}
+   , {49955072, 48351135}
+   , {59437056, 28495120}
+   ,
+   {68919040, 8639105}
+   , {78401024, 88783090}
+   , {87883008, 68927075}
+   , {97364992, 49071060}
+   , {6846976, 29215046}
+   ,
+   {16328960, 9359031}
+   , {25810944, 89503016}
+   , {35292928, 69647001}
+   , {44774912, 49790986}
+   , {54256896, 29934971}
+   ,
+   {63738880, 10078956}
+   , {73220864, 90222941}
+   , {82702848, 70366926}
+   , {92184832, 50510911}
+   , {1666816, 30654897}
+   ,
+   {11148800, 10798882}
+   , {20630784, 90942867}
+   , {30112768, 71086852}
+   , {39594752, 51230837}
+   , {49076736, 31374822}
+   ,
+   {58558720, 11518807}
+   , {68040704, 91662792}
+   , {77522688, 71806777}
+   , {87004672, 51950762}
+   , {96486656, 32094747}
+   ,
+   {5968640, 12238733}
+   , {15450624, 92382718}
+   , {24932608, 72526703}
+   , {34414592, 52670688}
+   , {43896576, 32814673}
+   ,
+   {53378560, 12958658}
+   , {62860544, 93102643}
+   , {72342528, 73246628}
+   , {81824512, 53390613}
+   , {91306496, 33534598}
+   ,
+   {788480, 13678584}
+   , {10270464, 93822569}
+   , {19752448, 73966554}
+   , {29234432, 54110539}
+   , {38716416, 34254524}
+   ,
+   {48198400, 14398509}
+   , {57680384, 94542494}
+   , {67162368, 74686479}
+   , {76644352, 54830464}
+   , {86126336, 34974449}
+   ,
+   {95608320, 15118434}
+   , {5090304, 95262420}
+   , {14572288, 75406405}
+   , {24054272, 55550390}
+   , {33536256, 35694375}
+   ,
+   {43018240, 15838360}
+   , {52500224, 95982345}
+   , {61982208, 76126330}
+   , {71464192, 56270315}
+   , {80946176, 36414300}
+   ,
+   {90428160, 16558285}
+   , {99910144, 96702270}
+   , {9392128, 76846256}
+   , {18874112, 56990241}
+   , {28356096, 37134226}
+   ,
+   {37838080, 17278211}
+   , {47320064, 97422196}
+   , {56802048, 77566181}
+   , {66284032, 57710166}
+   , {75766016, 37854151}
+   ,
+   {85248000, 17998136}
+   , {94729984, 98142121}
+   , {4211968, 78286107}
+   ,
+   }
+  ,
+};
+
+// for j>=min_j[i+1], there is k s.t. convert_table[i][j][k]>0
+// int min_j[] = { 0, 0, 0, 3 };
+
+// for even k, ((packed_10000_zeros[k>>3])>>(k&7))&3)=greatest(i) s.t. 10^i divides k
+const UINT8 packed_10000_zeros[] = {
+
+  0x3, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x3, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x3, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x2, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x3, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x3, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x2, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x3, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x3, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x3, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x2, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x3, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10, 0x40, 0x0, 0x3, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1,
+  0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40,
+  0x0, 0x2, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0,
+  0x2, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x20,
+  0x40, 0x0, 0x1,
+  0x4, 0x10, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0, 0x2, 0x4, 0x10, 0x40,
+  0x0, 0x1, 0x4,
+  0x10, 0x40, 0x0, 0x1, 0x4, 0x20, 0x40, 0x0, 0x1, 0x4, 0x10, 0x40, 0x0,
+  0x1, 0x4, 0x10,
+  0x40, 0x0,
+};
+
+
+const SINT8 factors[1024][2] = {
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {4, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 2}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {5, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {4, 0}
+  , {0, 0}
+  , {1, 2}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
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+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {4, 0}
+  , {0, 0}
+  , {1, 2}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {5, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 3}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {4, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {7, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 2}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {4, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 2}
+  , {1, 0}
+  , {0, 0}
+  , {5, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {4, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 2}
+  ,
+  {0, 0}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {6, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 2}
+  , {4, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {5, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {3, 3}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 0}
+  , {0, 1}
+  , {1, 0}
+  , {0, 0}
+  , {4, 0}
+  , {0, 0}
+  , {1, 1}
+  ,
+  {0, 0}
+  , {2, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 1}
+  , {3, 0}
+  , {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {2, 1}
+  ,
+  {0, 0}
+  , {1, 0}
+  , {0, 0}
+  , {10, 0}
+  ,
+};
diff --git a/gcc-4.9/libgcc/config/libbid/bid_decimal_data.c b/gcc-4.9/libgcc/config/libbid/bid_decimal_data.c
new file mode 100644
index 000000000..36bdf1afe
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_decimal_data.c
@@ -0,0 +1,1293 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+UINT64 round_const_table[][19] = {
+  {	// RN
+   0ull,	// 0 extra digits
+   5ull,	// 1 extra digits
+   50ull,	// 2 extra digits
+   500ull,	// 3 extra digits
+   5000ull,	// 4 extra digits
+   50000ull,	// 5 extra digits
+   500000ull,	// 6 extra digits
+   5000000ull,	// 7 extra digits
+   50000000ull,	// 8 extra digits
+   500000000ull,	// 9 extra digits
+   5000000000ull,	// 10 extra digits
+   50000000000ull,	// 11 extra digits
+   500000000000ull,	// 12 extra digits
+   5000000000000ull,	// 13 extra digits
+   50000000000000ull,	// 14 extra digits
+   500000000000000ull,	// 15 extra digits
+   5000000000000000ull,	// 16 extra digits
+   50000000000000000ull,	// 17 extra digits
+   500000000000000000ull	// 18 extra digits
+   }
+  ,
+  {	// RD
+   0ull,	// 0 extra digits
+   0ull,	// 1 extra digits
+   0ull,	// 2 extra digits
+   00ull,	// 3 extra digits
+   000ull,	// 4 extra digits
+   0000ull,	// 5 extra digits
+   00000ull,	// 6 extra digits
+   000000ull,	// 7 extra digits
+   0000000ull,	// 8 extra digits
+   00000000ull,	// 9 extra digits
+   000000000ull,	// 10 extra digits
+   0000000000ull,	// 11 extra digits
+   00000000000ull,	// 12 extra digits
+   000000000000ull,	// 13 extra digits
+   0000000000000ull,	// 14 extra digits
+   00000000000000ull,	// 15 extra digits
+   000000000000000ull,	// 16 extra digits
+   0000000000000000ull,	// 17 extra digits
+   00000000000000000ull	// 18 extra digits
+   }
+  ,
+  {	// round to Inf
+   0ull,	// 0 extra digits
+   9ull,	// 1 extra digits
+   99ull,	// 2 extra digits
+   999ull,	// 3 extra digits
+   9999ull,	// 4 extra digits
+   99999ull,	// 5 extra digits
+   999999ull,	// 6 extra digits
+   9999999ull,	// 7 extra digits
+   99999999ull,	// 8 extra digits
+   999999999ull,	// 9 extra digits
+   9999999999ull,	// 10 extra digits
+   99999999999ull,	// 11 extra digits
+   999999999999ull,	// 12 extra digits
+   9999999999999ull,	// 13 extra digits
+   99999999999999ull,	// 14 extra digits
+   999999999999999ull,	// 15 extra digits
+   9999999999999999ull,	// 16 extra digits
+   99999999999999999ull,	// 17 extra digits
+   999999999999999999ull	// 18 extra digits
+   }
+  ,
+  {	// RZ
+   0ull,	// 0 extra digits
+   0ull,	// 1 extra digits
+   0ull,	// 2 extra digits
+   00ull,	// 3 extra digits
+   000ull,	// 4 extra digits
+   0000ull,	// 5 extra digits
+   00000ull,	// 6 extra digits
+   000000ull,	// 7 extra digits
+   0000000ull,	// 8 extra digits
+   00000000ull,	// 9 extra digits
+   000000000ull,	// 10 extra digits
+   0000000000ull,	// 11 extra digits
+   00000000000ull,	// 12 extra digits
+   000000000000ull,	// 13 extra digits
+   0000000000000ull,	// 14 extra digits
+   00000000000000ull,	// 15 extra digits
+   000000000000000ull,	// 16 extra digits
+   0000000000000000ull,	// 17 extra digits
+   00000000000000000ull	// 18 extra digits
+   }
+  ,
+  {	// round ties away from 0
+   0ull,	// 0 extra digits
+   5ull,	// 1 extra digits
+   50ull,	// 2 extra digits
+   500ull,	// 3 extra digits
+   5000ull,	// 4 extra digits
+   50000ull,	// 5 extra digits
+   500000ull,	// 6 extra digits
+   5000000ull,	// 7 extra digits
+   50000000ull,	// 8 extra digits
+   500000000ull,	// 9 extra digits
+   5000000000ull,	// 10 extra digits
+   50000000000ull,	// 11 extra digits
+   500000000000ull,	// 12 extra digits
+   5000000000000ull,	// 13 extra digits
+   50000000000000ull,	// 14 extra digits
+   500000000000000ull,	// 15 extra digits
+   5000000000000000ull,	// 16 extra digits
+   50000000000000000ull,	// 17 extra digits
+   500000000000000000ull	// 18 extra digits
+   }
+  ,
+};
+
+UINT128 round_const_table_128[][36] = {
+  {	//RN
+   {{0ull, 0ull}
+    }
+   ,	// 0 extra digits
+   {{5ull, 0ull}
+    }
+   ,	// 1 extra digits
+   {{50ull, 0ull}
+    }
+   ,	// 2 extra digits
+   {{500ull, 0ull}
+    }
+   ,	// 3 extra digits
+   {{5000ull, 0ull}
+    }
+   ,	// 4 extra digits
+   {{50000ull, 0ull}
+    }
+   ,	// 5 extra digits
+   {{500000ull, 0ull}
+    }
+   ,	// 6 extra digits
+   {{5000000ull, 0ull}
+    }
+   ,	// 7 extra digits
+   {{50000000ull, 0ull}
+    }
+   ,	// 8 extra digits
+   {{500000000ull, 0ull}
+    }
+   ,	// 9 extra digits
+   {{5000000000ull, 0ull}
+    }
+   ,	// 10 extra digits
+   {{50000000000ull, 0ull}
+    }
+   ,	// 11 extra digits
+   {{500000000000ull, 0ull}
+    }
+   ,	// 12 extra digits
+   {{5000000000000ull, 0ull}
+    }
+   ,	// 13 extra digits
+   {{50000000000000ull, 0ull}
+    }
+   ,	// 14 extra digits
+   {{500000000000000ull, 0ull}
+    }
+   ,	// 15 extra digits
+   {{5000000000000000ull, 0ull}
+    }
+   ,	// 16 extra digits
+   {{50000000000000000ull, 0ull}
+    }
+   ,	// 17 extra digits
+   {{500000000000000000ull, 0ull}
+    }
+   ,	// 18 extra digits
+   {{5000000000000000000ull, 0ull}
+    }
+   ,	// 19 extra digits
+   {{0xb5e3af16b1880000ull, 2ull}
+    }
+   ,	//20
+   {{0x1ae4d6e2ef500000ull, 27ull}
+    }
+   ,	//21
+   {{0xcf064dd59200000ull, 271ull}
+    }
+   ,	//22
+   {{0x8163f0a57b400000ull, 2710ull}
+    }
+   ,	//23
+   {{0xde76676d0800000ull, 27105ull}
+    }
+   ,	//24
+   {{0x8b0a00a425000000ull, 0x422caull}
+    }
+   ,	//25
+   {{0x6e64066972000000ull, 0x295be9ull}
+    }
+   ,	//26
+   {{0x4fe8401e74000000ull, 0x19d971eull}
+    }
+   ,	//27
+   {{0x1f12813088000000ull, 0x1027e72full}
+    }
+   ,	//28
+   {{0x36b90be550000000ull, 0xa18f07d7ull}
+    }
+   ,	//29
+   {{0x233a76f520000000ull, 0x64f964e68ull}
+    }
+   ,	//30
+   {{0x6048a59340000000ull, 0x3f1bdf1011ull}
+    }
+   ,	//31
+   {{0xc2d677c080000000ull, 0x27716b6a0adull}
+    }
+   ,	//32
+   {{0x9c60ad8500000000ull, 0x18a6e32246c9ull}
+    }
+   ,	//33
+   {{0x1bc6c73200000000ull, 0xf684df56c3e0ull}
+    }
+   ,	//34
+   {{0x15c3c7f400000000ull, 0x9a130b963a6c1ull}
+    }
+   ,	//35
+   }
+  ,
+  {	//RD
+   {{0ull, 0ull}
+    }
+   ,	// 0 extra digits
+   {{0ull, 0ull}
+    }
+   ,	// 1 extra digits
+   {{0ull, 0ull}
+    }
+   ,	// 2 extra digits
+   {{00ull, 0ull}
+    }
+   ,	// 3 extra digits
+   {{000ull, 0ull}
+    }
+   ,	// 4 extra digits
+   {{0000ull, 0ull}
+    }
+   ,	// 5 extra digits
+   {{00000ull, 0ull}
+    }
+   ,	// 6 extra digits
+   {{000000ull, 0ull}
+    }
+   ,	// 7 extra digits
+   {{0000000ull, 0ull}
+    }
+   ,	// 8 extra digits
+   {{00000000ull, 0ull}
+    }
+   ,	// 9 extra digits
+   {{000000000ull, 0ull}
+    }
+   ,	// 10 extra digits
+   {{0000000000ull, 0ull}
+    }
+   ,	// 11 extra digits
+   {{00000000000ull, 0ull}
+    }
+   ,	// 12 extra digits
+   {{000000000000ull, 0ull}
+    }
+   ,	// 13 extra digits
+   {{0000000000000ull, 0ull}
+    }
+   ,	// 14 extra digits
+   {{00000000000000ull, 0ull}
+    }
+   ,	// 15 extra digits
+   {{000000000000000ull, 0ull}
+    }
+   ,	// 16 extra digits
+   {{0000000000000000ull, 0ull}
+    }
+   ,	// 17 extra digits
+   {{00000000000000000ull, 0ull}
+    }
+   ,	// 18 extra digits
+   {{000000000000000000ull, 0ull}
+    }
+   ,	// 19 extra digits
+   {{0ull, 0ull}
+    }
+   ,	//20
+   {{0ull, 0ull}
+    }
+   ,	//21
+   {{0ull, 0ull}
+    }
+   ,	//22
+   {{0ull, 0ull}
+    }
+   ,	//23
+   {{0ull, 0ull}
+    }
+   ,	//24
+   {{0ull, 0ull}
+    }
+   ,	//25
+   {{0ull, 0ull}
+    }
+   ,	//26
+   {{0ull, 0ull}
+    }
+   ,	//27
+   {{0ull, 0ull}
+    }
+   ,	//28
+   {{0ull, 0ull}
+    }
+   ,	//29
+   {{0ull, 0ull}
+    }
+   ,	//30
+   {{0ull, 0ull}
+    }
+   ,	//31
+   {{0ull, 0ull}
+    }
+   ,	//32
+   {{0ull, 0ull}
+    }
+   ,	//33
+   {{0ull, 0ull}
+    }
+   ,	//34
+   {{0ull, 0ull}
+    }
+   ,	//35
+   }
+  ,
+  {	//RU
+   {{0ull, 0ull}
+    }
+   ,	// 0 extra digits
+   {{9ull, 0ull}
+    }
+   ,	// 1 extra digits
+   {{99ull, 0ull}
+    }
+   ,	// 2 extra digits
+   {{999ull, 0ull}
+    }
+   ,	// 3 extra digits
+   {{9999ull, 0ull}
+    }
+   ,	// 4 extra digits
+   {{99999ull, 0ull}
+    }
+   ,	// 5 extra digits
+   {{999999ull, 0ull}
+    }
+   ,	// 6 extra digits
+   {{9999999ull, 0ull}
+    }
+   ,	// 7 extra digits
+   {{99999999ull, 0ull}
+    }
+   ,	// 8 extra digits
+   {{999999999ull, 0ull}
+    }
+   ,	// 9 extra digits
+   {{9999999999ull, 0ull}
+    }
+   ,	// 10 extra digits
+   {{99999999999ull, 0ull}
+    }
+   ,	// 11 extra digits
+   {{999999999999ull, 0ull}
+    }
+   ,	// 12 extra digits
+   {{9999999999999ull, 0ull}
+    }
+   ,	// 13 extra digits
+   {{99999999999999ull, 0ull}
+    }
+   ,	// 14 extra digits
+   {{999999999999999ull, 0ull}
+    }
+   ,	// 15 extra digits
+   {{9999999999999999ull, 0ull}
+    }
+   ,	// 16 extra digits
+   {{99999999999999999ull, 0ull}
+    }
+   ,	// 17 extra digits
+   {{999999999999999999ull, 0ull}
+    }
+   ,	// 18 extra digits
+   {{9999999999999999999ull, 0ull}
+    }
+   ,	// 19 extra digits
+   {{0x6BC75E2D630FFFFFull, 0x5ull}
+    }
+   ,	//20
+   {{0x35C9ADC5DE9FFFFFull, 0x36ull}
+    }
+   ,	//21
+   {{0x19E0C9BAB23FFFFFull, 0x21eull}
+    }
+   ,	//22
+   {{0x2C7E14AF67FFFFFull, 0x152dull}
+    }
+   ,	//23
+   {{0x1BCECCEDA0FFFFFFull, 0xd3c2ull}
+    }
+   ,	//24
+   {{0x1614014849FFFFFFull, 0x84595ull}
+    }
+   ,	//25
+   {{0xDCC80CD2E3FFFFFFull, 0x52b7d2ull}
+    }
+   ,	//26
+   {{0x9FD0803CE7FFFFFFull, 0x33B2E3Cull}
+    }
+   ,	//27
+   {{0x3E2502610FFFFFFFull, 0x204FCE5Eull}
+    }
+   ,	//28
+   {{0x6D7217CA9FFFFFFFull, 0x1431E0FAEull}
+    }
+   ,	//29
+   {{0x4674EDEA3FFFFFFFull, 0xC9F2C9CD0ull}
+    }
+   ,	//30
+   {{0xC0914B267FFFFFFFull, 0x7E37BE2022ull}
+    }
+   ,	//31
+   {{0x85ACEF80FFFFFFFFull, 0x4EE2D6D415Bull}
+    }
+   ,	//32
+   {{0x38c15b09ffffffffull, 0x314dc6448d93ull}
+    }
+   ,	//33
+   {{0x378d8e63ffffffffull, 0x1ed09bead87c0ull}
+    }
+   ,	//34
+   {{0x2b878fe7ffffffffull, 0x13426172c74d82ull}
+    }
+   ,	//35
+   }
+  ,
+  {	//RZ
+   {{0ull, 0ull}
+    }
+   ,	// 0 extra digits
+   {{0ull, 0ull}
+    }
+   ,	// 1 extra digits
+   {{0ull, 0ull}
+    }
+   ,	// 2 extra digits
+   {{00ull, 0ull}
+    }
+   ,	// 3 extra digits
+   {{000ull, 0ull}
+    }
+   ,	// 4 extra digits
+   {{0000ull, 0ull}
+    }
+   ,	// 5 extra digits
+   {{00000ull, 0ull}
+    }
+   ,	// 6 extra digits
+   {{000000ull, 0ull}
+    }
+   ,	// 7 extra digits
+   {{0000000ull, 0ull}
+    }
+   ,	// 8 extra digits
+   {{00000000ull, 0ull}
+    }
+   ,	// 9 extra digits
+   {{000000000ull, 0ull}
+    }
+   ,	// 10 extra digits
+   {{0000000000ull, 0ull}
+    }
+   ,	// 11 extra digits
+   {{00000000000ull, 0ull}
+    }
+   ,	// 12 extra digits
+   {{000000000000ull, 0ull}
+    }
+   ,	// 13 extra digits
+   {{0000000000000ull, 0ull}
+    }
+   ,	// 14 extra digits
+   {{00000000000000ull, 0ull}
+    }
+   ,	// 15 extra digits
+   {{000000000000000ull, 0ull}
+    }
+   ,	// 16 extra digits
+   {{0000000000000000ull, 0ull}
+    }
+   ,	// 17 extra digits
+   {{00000000000000000ull, 0ull}
+    }
+   ,	// 18 extra digits
+   {{000000000000000000ull, 0ull}
+    }
+   ,	// 19 extra digits
+   {{0ull, 0ull}
+    }
+   ,	//20
+   {{0ull, 0ull}
+    }
+   ,	//21
+   {{0ull, 0ull}
+    }
+   ,	//22
+   {{0ull, 0ull}
+    }
+   ,	//23
+   {{0ull, 0ull}
+    }
+   ,	//24
+   {{0ull, 0ull}
+    }
+   ,	//25
+   {{0ull, 0ull}
+    }
+   ,	//26
+   {{0ull, 0ull}
+    }
+   ,	//27
+   {{0ull, 0ull}
+    }
+   ,	//28
+   {{0ull, 0ull}
+    }
+   ,	//29
+   {{0ull, 0ull}
+    }
+   ,	//30
+   {{0ull, 0ull}
+    }
+   ,	//31
+   {{0ull, 0ull}
+    }
+   ,	//32
+   {{0ull, 0ull}
+    }
+   ,	//33
+   {{0ull, 0ull}
+    }
+   ,	//34
+   {{0ull, 0ull}
+    }
+   ,	//35
+   }
+  ,
+  {	//RN, ties away
+   {{0ull, 0ull}
+    }
+   ,	// 0 extra digits
+   {{5ull, 0ull}
+    }
+   ,	// 1 extra digits
+   {{50ull, 0ull}
+    }
+   ,	// 2 extra digits
+   {{500ull, 0ull}
+    }
+   ,	// 3 extra digits
+   {{5000ull, 0ull}
+    }
+   ,	// 4 extra digits
+   {{50000ull, 0ull}
+    }
+   ,	// 5 extra digits
+   {{500000ull, 0ull}
+    }
+   ,	// 6 extra digits
+   {{5000000ull, 0ull}
+    }
+   ,	// 7 extra digits
+   {{50000000ull, 0ull}
+    }
+   ,	// 8 extra digits
+   {{500000000ull, 0ull}
+    }
+   ,	// 9 extra digits
+   {{5000000000ull, 0ull}
+    }
+   ,	// 10 extra digits
+   {{50000000000ull, 0ull}
+    }
+   ,	// 11 extra digits
+   {{500000000000ull, 0ull}
+    }
+   ,	// 12 extra digits
+   {{5000000000000ull, 0ull}
+    }
+   ,	// 13 extra digits
+   {{50000000000000ull, 0ull}
+    }
+   ,	// 14 extra digits
+   {{500000000000000ull, 0ull}
+    }
+   ,	// 15 extra digits
+   {{5000000000000000ull, 0ull}
+    }
+   ,	// 16 extra digits
+   {{50000000000000000ull, 0ull}
+    }
+   ,	// 17 extra digits
+   {{500000000000000000ull, 0ull}
+    }
+   ,	// 18 extra digits
+   {{5000000000000000000ull, 0ull}
+    }
+   ,	// 19 extra digits
+   {{0xb5e3af16b1880000ull, 2ull}
+    }
+   ,	//20
+   {{0x1ae4d6e2ef500000ull, 27ull}
+    }
+   ,	//21
+   {{0xcf064dd59200000ull, 271ull}
+    }
+   ,	//22
+   {{0x8163f0a57b400000ull, 2710ull}
+    }
+   ,	//23
+   {{0xde76676d0800000ull, 27105ull}
+    }
+   ,	//24
+   {{0x8b0a00a425000000ull, 0x422caull}
+    }
+   ,	//25
+   {{0x6e64066972000000ull, 0x295be9ull}
+    }
+   ,	//26
+   {{0x4fe8401e74000000ull, 0x19d971eull}
+    }
+   ,	//27
+   {{0x1f12813088000000ull, 0x1027e72full}
+    }
+   ,	//28
+   {{0x36b90be550000000ull, 0xa18f07d7ull}
+    }
+   ,	//29
+   {{0x233a76f520000000ull, 0x64f964e68ull}
+    }
+   ,	//30
+   {{0x6048a59340000000ull, 0x3f1bdf1011ull}
+    }
+   ,	//31
+   {{0xc2d677c080000000ull, 0x27716b6a0adull}
+    }
+   ,	//32
+   {{0x9c60ad8500000000ull, 0x18a6e32246c9ull}
+    }
+   ,	//33
+   {{0x1bc6c73200000000ull, 0xf684df56c3e0ull}
+    }
+   ,	//34
+   {{0x15c3c7f400000000ull, 0x9a130b963a6c1ull}
+    }
+   ,	//35
+   }
+};
+
+
+UINT128 reciprocals10_128[] = {
+  {{0ull, 0ull}
+   }
+  ,	// 0 extra digits
+  {{0x3333333333333334ull, 0x3333333333333333ull}
+   }
+  ,	// 1 extra digit
+  {{0x51eb851eb851eb86ull, 0x051eb851eb851eb8ull}
+   }
+  ,	// 2 extra digits
+  {{0x3b645a1cac083127ull, 0x0083126e978d4fdfull}
+   }
+  ,	// 3 extra digits
+  {{0x4af4f0d844d013aaULL, 0x00346dc5d6388659ULL}
+   }
+  ,	//  10^(-4) * 2^131
+  {{0x08c3f3e0370cdc88ULL, 0x0029f16b11c6d1e1ULL}
+   }
+  ,	//  10^(-5) * 2^134
+  {{0x6d698fe69270b06dULL, 0x00218def416bdb1aULL}
+   }
+  ,	//  10^(-6) * 2^137
+  {{0xaf0f4ca41d811a47ULL, 0x0035afe535795e90ULL}
+   }
+  ,	//  10^(-7) * 2^141
+  {{0xbf3f70834acdaea0ULL, 0x002af31dc4611873ULL}
+   }
+  ,	//  10^(-8) * 2^144
+  {{0x65cc5a02a23e254dULL, 0x00225c17d04dad29ULL}
+   }
+  ,	//  10^(-9) * 2^147
+  {{0x6fad5cd10396a214ULL, 0x0036f9bfb3af7b75ULL}
+   }
+  ,	// 10^(-10) * 2^151
+  {{0xbfbde3da69454e76ULL, 0x002bfaffc2f2c92aULL}
+   }
+  ,	// 10^(-11) * 2^154
+  {{0x32fe4fe1edd10b92ULL, 0x00232f33025bd422ULL}
+   }
+  ,	// 10^(-12) * 2^157
+  {{0x84ca19697c81ac1cULL, 0x00384b84d092ed03ULL}
+   }
+  ,	// 10^(-13) * 2^161
+  {{0x03d4e1213067bce4ULL, 0x002d09370d425736ULL}
+   }
+  ,	// 10^(-14) * 2^164
+  {{0x3643e74dc052fd83ULL, 0x0024075f3dceac2bULL}
+   }
+  ,	// 10^(-15) * 2^167
+  {{0x56d30baf9a1e626bULL, 0x0039a5652fb11378ULL}
+   }
+  ,	// 10^(-16) * 2^171
+  {{0x12426fbfae7eb522ULL, 0x002e1dea8c8da92dULL}
+   }
+  ,	// 10^(-17) * 2^174
+  {{0x41cebfcc8b9890e8ULL, 0x0024e4bba3a48757ULL}
+   }
+  ,	// 10^(-18) * 2^177
+  {{0x694acc7a78f41b0dULL, 0x003b07929f6da558ULL}
+   }
+  ,	// 10^(-19) * 2^181
+  {{0xbaa23d2ec729af3eULL, 0x002f394219248446ULL}
+   }
+  ,	// 10^(-20) * 2^184
+  {{0xfbb4fdbf05baf298ULL, 0x0025c768141d369eULL}
+   }
+  ,	// 10^(-21) * 2^187
+  {{0x2c54c931a2c4b759ULL, 0x003c7240202ebdcbULL}
+   }
+  ,	// 10^(-22) * 2^191
+  {{0x89dd6dc14f03c5e1ULL, 0x00305b66802564a2ULL}
+   }
+  ,	// 10^(-23) * 2^194
+  {{0xd4b1249aa59c9e4eULL, 0x0026af8533511d4eULL}
+   }
+  ,	// 10^(-24) * 2^197
+  {{0x544ea0f76f60fd49ULL, 0x003de5a1ebb4fbb1ULL}
+   }
+  ,	// 10^(-25) * 2^201
+  {{0x76a54d92bf80caa1ULL, 0x00318481895d9627ULL}
+   }
+  ,	// 10^(-26) * 2^204
+  {{0x921dd7a89933d54eULL, 0x00279d346de4781fULL}
+   }
+  ,	// 10^(-27) * 2^207
+  {{0x8362f2a75b862215ULL, 0x003f61ed7ca0c032ULL}
+   }
+  ,	// 10^(-28) * 2^211
+  {{0xcf825bb91604e811ULL, 0x0032b4bdfd4d668eULL}
+   }
+  ,	// 10^(-29) * 2^214
+  {{0x0c684960de6a5341ULL, 0x00289097fdd7853fULL}
+   }
+  ,	// 10^(-30) * 2^217
+  {{0x3d203ab3e521dc34ULL, 0x002073accb12d0ffULL}
+   }
+  ,	// 10^(-31) * 2^220
+  {{0x2e99f7863b696053ULL, 0x0033ec47ab514e65ULL}
+   }
+  ,	// 10^(-32) * 2^224
+  {{0x587b2c6b62bab376ULL, 0x002989d2ef743eb7ULL}
+   }
+  ,	// 10^(-33) * 2^227
+  {{0xad2f56bc4efbc2c5ULL, 0x00213b0f25f69892ULL}
+   }
+  ,	// 10^(-34) * 2^230
+  {{0x0f2abc9d8c9689d1ull, 0x01a95a5b7f87a0efull}
+   }
+  ,	// 35 extra digits
+};
+
+
+int recip_scale[] = {
+  129 - 128,	// 1
+  129 - 128,	// 1/10
+  129 - 128,	// 1/10^2
+  129 - 128,	// 1/10^3
+  3,	// 131 - 128
+  6,	// 134 - 128
+  9,	// 137 - 128
+  13,	// 141 - 128
+  16,	// 144 - 128
+  19,	// 147 - 128
+  23,	// 151 - 128
+  26,	// 154 - 128
+  29,	// 157 - 128
+  33,	// 161 - 128
+  36,	// 164 - 128
+  39,	// 167 - 128
+  43,	// 171 - 128
+  46,	// 174 - 128
+  49,	// 177 - 128
+  53,	// 181 - 128
+  56,	// 184 - 128
+  59,	// 187 - 128
+  63,	// 191 - 128
+
+  66,	// 194 - 128
+  69,	// 197 - 128
+  73,	// 201 - 128
+  76,	// 204 - 128
+  79,	// 207 - 128
+  83,	// 211 - 128
+  86,	// 214 - 128
+  89,	// 217 - 128
+  92,	// 220 - 128
+  96,	// 224 - 128
+  99,	// 227 - 128
+  102,	// 230 - 128
+  109,	// 237 - 128, 1/10^35
+};
+
+
+// tables used in computation
+int estimate_decimal_digits[129] = {
+  1,	//2^0 =1     < 10^0
+  1,	//2^1 =2     < 10^1
+  1,	//2^2 =4     < 10^1
+  1,	//2^3 =8     < 10^1
+  2,	//2^4 =16    < 10^2
+  2,	//2^5 =32    < 10^2
+  2,	//2^6 =64    < 10^2
+  3,	//2^7 =128   < 10^3
+  3,	//2^8 =256   < 10^3
+  3,	//2^9 =512   < 10^3
+  4,	//2^10=1024  < 10^4
+  4,	//2^11=2048  < 10^4
+  4,	//2^12=4096  < 10^4
+  4,	//2^13=8192  < 10^4
+  5,	//2^14=16384 < 10^5
+  5,	//2^15=32768 < 10^5
+
+  5,	//2^16=65536     < 10^5
+  6,	//2^17=131072    < 10^6
+  6,	//2^18=262144    < 10^6
+  6,	//2^19=524288    < 10^6
+  7,	//2^20=1048576   < 10^7
+  7,	//2^21=2097152   < 10^7
+  7,	//2^22=4194304   < 10^7
+  7,	//2^23=8388608   < 10^7
+  8,	//2^24=16777216  < 10^8
+  8,	//2^25=33554432  < 10^8
+  8,	//2^26=67108864  < 10^8
+  9,	//2^27=134217728 < 10^9
+  9,	//2^28=268435456 < 10^9
+  9,	//2^29=536870912 < 10^9
+  10,	//2^30=1073741824< 10^10
+  10,	//2^31=2147483648< 10^10
+
+  10,	//2^32=4294967296     < 10^10
+  10,	//2^33=8589934592     < 10^10
+  11,	//2^34=17179869184    < 10^11
+  11,	//2^35=34359738368    < 10^11
+  11,	//2^36=68719476736    < 10^11
+  12,	//2^37=137438953472   < 10^12
+  12,	//2^38=274877906944   < 10^12
+  12,	//2^39=549755813888   < 10^12
+  13,	//2^40=1099511627776  < 10^13
+  13,	//2^41=2199023255552  < 10^13
+  13,	//2^42=4398046511104  < 10^13
+  13,	//2^43=8796093022208  < 10^13
+  14,	//2^44=17592186044416 < 10^14
+  14,	//2^45=35184372088832 < 10^14
+  14,	//2^46=70368744177664 < 10^14
+  15,	//2^47=140737488355328< 10^15
+
+  15,	//2^48=281474976710656    < 10^15
+  15,	//2^49=562949953421312    < 10^15
+  16,	//2^50=1125899906842624   < 10^16
+  16,	//2^51=2251799813685248   < 10^16
+  16,	//2^52=4503599627370496   < 10^16
+  16,	//2^53=9007199254740992   < 10^16
+  17,	//2^54=18014398509481984  < 10^17
+  17,	//2^55=36028797018963968  < 10^17
+  17,	//2^56=72057594037927936  < 10^17
+  18,	//2^57=144115188075855872 < 10^18
+  18,	//2^58=288230376151711744 < 10^18
+  18,	//2^59=576460752303423488 < 10^18
+  19,	//2^60=1152921504606846976< 10^19
+  19,	//2^61=2305843009213693952< 10^19
+  19,	//2^62=4611686018427387904< 10^19
+  19,	//2^63=9223372036854775808< 10^19
+
+  20,	//2^64=18446744073709551616
+  20,	//2^65=36893488147419103232
+  20,	//2^66=73786976294838206464
+  21,	//2^67=147573952589676412928
+  21,	//2^68=295147905179352825856
+  21,	//2^69=590295810358705651712
+  22,	//2^70=1180591620717411303424
+  22,	//2^71=2361183241434822606848
+  22,	//2^72=4722366482869645213696
+  22,	//2^73=9444732965739290427392
+  23,	//2^74=18889465931478580854784
+  23,	//2^75=37778931862957161709568
+  23,	//2^76=75557863725914323419136
+  24,	//2^77=151115727451828646838272
+  24,	//2^78=302231454903657293676544
+  24,	//2^79=604462909807314587353088
+
+  25,	//2^80=1208925819614629174706176
+  25,	//2^81=2417851639229258349412352
+  25,	//2^82=4835703278458516698824704
+  25,	//2^83=9671406556917033397649408
+  26,	//2^84=19342813113834066795298816
+  26,	//2^85=38685626227668133590597632
+  26,	//2^86=77371252455336267181195264
+  27,	//2^87=154742504910672534362390528
+  27,	//2^88=309485009821345068724781056
+  27,	//2^89=618970019642690137449562112
+  28,	//2^90=1237940039285380274899124224
+  28,	//2^91=2475880078570760549798248448
+  28,	//2^92=4951760157141521099596496896
+  28,	//2^93=9903520314283042199192993792
+  29,	//2^94=19807040628566084398385987584
+  29,	//2^95=39614081257132168796771975168
+  29,	//2^96=79228162514264337593543950336
+
+  30,	//2^97=158456325028528675187087900672
+  30,	//2^98=316912650057057350374175801344
+  30,	//2^99=633825300114114700748351602688
+  31,	//2^100=1267650600228229401496703205376
+  31,	//2^101=2535301200456458802993406410752
+  31,	//2^102=5070602400912917605986812821504
+  32,	//2^103=10141204801825835211973625643008
+  32,	//2^104=20282409603651670423947251286016
+  32,	//2^105=40564819207303340847894502572032
+  32,	//2^106=81129638414606681695789005144064
+  33,	//2^107=162259276829213363391578010288128
+  33,	// 2^108
+  33,	// 2^109
+  34,	// 2^110
+  34,	// 2^111
+  34,	// 2^112
+  35,	// 2^113
+  35,	// 2^114
+  35,	// 2^115
+  35,	// 2^116
+  36,	// 2^117
+  36,	// 2^118
+  36,	// 2^119
+  37,	// 2^120
+  37,	// 2^121
+  37,	// 2^122
+  38,	// 2^123
+  38,	// 2^124
+  38,	// 2^125
+  38,	// 2^126
+  39,	// 2^127
+  39	// 2^128
+};
+
+
+UINT128 power10_table_128[] = {
+  {{0x0000000000000001ull, 0x0000000000000000ull}},	// 10^0
+  {{0x000000000000000aull, 0x0000000000000000ull}},	// 10^1
+  {{0x0000000000000064ull, 0x0000000000000000ull}},	// 10^2
+  {{0x00000000000003e8ull, 0x0000000000000000ull}},	// 10^3
+  {{0x0000000000002710ull, 0x0000000000000000ull}},	// 10^4
+  {{0x00000000000186a0ull, 0x0000000000000000ull}},	// 10^5
+  {{0x00000000000f4240ull, 0x0000000000000000ull}},	// 10^6
+  {{0x0000000000989680ull, 0x0000000000000000ull}},	// 10^7
+  {{0x0000000005f5e100ull, 0x0000000000000000ull}},	// 10^8
+  {{0x000000003b9aca00ull, 0x0000000000000000ull}},	// 10^9
+  {{0x00000002540be400ull, 0x0000000000000000ull}},	// 10^10
+  {{0x000000174876e800ull, 0x0000000000000000ull}},	// 10^11
+  {{0x000000e8d4a51000ull, 0x0000000000000000ull}},	// 10^12
+  {{0x000009184e72a000ull, 0x0000000000000000ull}},	// 10^13
+  {{0x00005af3107a4000ull, 0x0000000000000000ull}},	// 10^14
+  {{0x00038d7ea4c68000ull, 0x0000000000000000ull}},	// 10^15
+  {{0x002386f26fc10000ull, 0x0000000000000000ull}},	// 10^16
+  {{0x016345785d8a0000ull, 0x0000000000000000ull}},	// 10^17
+  {{0x0de0b6b3a7640000ull, 0x0000000000000000ull}},	// 10^18
+  {{0x8ac7230489e80000ull, 0x0000000000000000ull}},	// 10^19
+  {{0x6bc75e2d63100000ull, 0x0000000000000005ull}},	// 10^20
+  {{0x35c9adc5dea00000ull, 0x0000000000000036ull}},	// 10^21
+  {{0x19e0c9bab2400000ull, 0x000000000000021eull}},	// 10^22
+  {{0x02c7e14af6800000ull, 0x000000000000152dull}},	// 10^23
+  {{0x1bcecceda1000000ull, 0x000000000000d3c2ull}},	// 10^24
+  {{0x161401484a000000ull, 0x0000000000084595ull}},	// 10^25
+  {{0xdcc80cd2e4000000ull, 0x000000000052b7d2ull}},	// 10^26
+  {{0x9fd0803ce8000000ull, 0x00000000033b2e3cull}},	// 10^27
+  {{0x3e25026110000000ull, 0x00000000204fce5eull}},	// 10^28
+  {{0x6d7217caa0000000ull, 0x00000001431e0faeull}},	// 10^29
+  {{0x4674edea40000000ull, 0x0000000c9f2c9cd0ull}},	// 10^30
+  {{0xc0914b2680000000ull, 0x0000007e37be2022ull}},	// 10^31
+  {{0x85acef8100000000ull, 0x000004ee2d6d415bull}},	// 10^32
+  {{0x38c15b0a00000000ull, 0x0000314dc6448d93ull}},	// 10^33
+  {{0x378d8e6400000000ull, 0x0001ed09bead87c0ull}},	// 10^34
+  {{0x2b878fe800000000ull, 0x0013426172c74d82ull}},	// 10^35
+  {{0xb34b9f1000000000ull, 0x00c097ce7bc90715ull}},	// 10^36
+  {{0x00f436a000000000ull, 0x0785ee10d5da46d9ull}},	// 10^37
+  {{0x098a224000000000ull, 0x4b3b4ca85a86c47aull}},	// 10^38
+};
+
+
+int estimate_bin_expon[] = {
+  0,	// 10^0
+  3,	// 10^1
+  6,	// 10^2
+  9,	// 10^3
+  13,	// 10^4
+  16,	// 10^5
+  19,	// 10^6
+  23,	// 10^7
+  26,	// 10^8
+  29,	// 10^9
+  33,	// 10^10
+  36,	// 10^11
+  39,	// 10^12
+  43,	// 10^13
+  46,	// 10^14
+  49,	// 10^15
+  53	// 10^16
+};
+
+
+UINT64 power10_index_binexp[] = {
+  0x000000000000000aull,
+  0x000000000000000aull,
+  0x000000000000000aull,
+  0x000000000000000aull,
+  0x0000000000000064ull,
+  0x0000000000000064ull,
+  0x0000000000000064ull,
+  0x00000000000003e8ull,
+  0x00000000000003e8ull,
+  0x00000000000003e8ull,
+  0x0000000000002710ull,
+  0x0000000000002710ull,
+  0x0000000000002710ull,
+  0x0000000000002710ull,
+  0x00000000000186a0ull,
+  0x00000000000186a0ull,
+  0x00000000000186a0ull,
+  0x00000000000f4240ull,
+  0x00000000000f4240ull,
+  0x00000000000f4240ull,
+  0x0000000000989680ull,
+  0x0000000000989680ull,
+  0x0000000000989680ull,
+  0x0000000000989680ull,
+  0x0000000005f5e100ull,
+  0x0000000005f5e100ull,
+  0x0000000005f5e100ull,
+  0x000000003b9aca00ull,
+  0x000000003b9aca00ull,
+  0x000000003b9aca00ull,
+  0x00000002540be400ull,
+  0x00000002540be400ull,
+  0x00000002540be400ull,
+  0x00000002540be400ull,
+  0x000000174876e800ull,
+  0x000000174876e800ull,
+  0x000000174876e800ull,
+  0x000000e8d4a51000ull,
+  0x000000e8d4a51000ull,
+  0x000000e8d4a51000ull,
+  0x000009184e72a000ull,
+  0x000009184e72a000ull,
+  0x000009184e72a000ull,
+  0x000009184e72a000ull,
+  0x00005af3107a4000ull,
+  0x00005af3107a4000ull,
+  0x00005af3107a4000ull,
+  0x00038d7ea4c68000ull,
+  0x00038d7ea4c68000ull,
+  0x00038d7ea4c68000ull,
+  0x002386f26fc10000ull,
+  0x002386f26fc10000ull,
+  0x002386f26fc10000ull,
+  0x002386f26fc10000ull,
+  0x016345785d8a0000ull,
+  0x016345785d8a0000ull,
+  0x016345785d8a0000ull,
+  0x0de0b6b3a7640000ull,
+  0x0de0b6b3a7640000ull,
+  0x0de0b6b3a7640000ull,
+  0x8ac7230489e80000ull,
+  0x8ac7230489e80000ull,
+  0x8ac7230489e80000ull,
+  0x8ac7230489e80000ull
+};
+
+
+int short_recip_scale[] = {
+  1,
+  65 - 64,
+  69 - 64,
+  71 - 64,
+  75 - 64,
+  78 - 64,
+  81 - 64,
+  85 - 64,
+  88 - 64,
+  91 - 64,
+  95 - 64,
+  98 - 64,
+  101 - 64,
+  105 - 64,
+  108 - 64,
+  111 - 64,
+  115 - 64,	//114 - 64
+  118 - 64
+};
+
+
+UINT64 reciprocals10_64[] = {
+  1ull,	// dummy value for 0 extra digits
+  0x3333333333333334ull,	// 1 extra digit
+  0x51eb851eb851eb86ull,
+  0x20c49ba5e353f7cfull,
+  0x346dc5d63886594bull,
+  0x29f16b11c6d1e109ull,
+  0x218def416bdb1a6eull,
+  0x35afe535795e90b0ull,
+  0x2af31dc4611873c0ull,
+  0x225c17d04dad2966ull,
+  0x36f9bfb3af7b7570ull,
+  0x2bfaffc2f2c92ac0ull,
+  0x232f33025bd42233ull,
+  0x384b84d092ed0385ull,
+  0x2d09370d42573604ull,
+  0x24075f3dceac2b37ull,
+  0x39a5652fb1137857ull,
+  0x2e1dea8c8da92d13ull
+};
+
+
+
+UINT128 power10_index_binexp_128[] = {
+  {{0x000000000000000aull, 0x0000000000000000ull}},
+  {{0x000000000000000aull, 0x0000000000000000ull}},
+  {{0x000000000000000aull, 0x0000000000000000ull}},
+  {{0x000000000000000aull, 0x0000000000000000ull}},
+  {{0x0000000000000064ull, 0x0000000000000000ull}},
+  {{0x0000000000000064ull, 0x0000000000000000ull}},
+  {{0x0000000000000064ull, 0x0000000000000000ull}},
+  {{0x00000000000003e8ull, 0x0000000000000000ull}},
+  {{0x00000000000003e8ull, 0x0000000000000000ull}},
+  {{0x00000000000003e8ull, 0x0000000000000000ull}},
+  {{0x0000000000002710ull, 0x0000000000000000ull}},
+  {{0x0000000000002710ull, 0x0000000000000000ull}},
+  {{0x0000000000002710ull, 0x0000000000000000ull}},
+  {{0x0000000000002710ull, 0x0000000000000000ull}},
+  {{0x00000000000186a0ull, 0x0000000000000000ull}},
+  {{0x00000000000186a0ull, 0x0000000000000000ull}},
+  {{0x00000000000186a0ull, 0x0000000000000000ull}},
+  {{0x00000000000f4240ull, 0x0000000000000000ull}},
+  {{0x00000000000f4240ull, 0x0000000000000000ull}},
+  {{0x00000000000f4240ull, 0x0000000000000000ull}},
+  {{0x0000000000989680ull, 0x0000000000000000ull}},
+  {{0x0000000000989680ull, 0x0000000000000000ull}},
+  {{0x0000000000989680ull, 0x0000000000000000ull}},
+  {{0x0000000000989680ull, 0x0000000000000000ull}},
+  {{0x0000000005f5e100ull, 0x0000000000000000ull}},
+  {{0x0000000005f5e100ull, 0x0000000000000000ull}},
+  {{0x0000000005f5e100ull, 0x0000000000000000ull}},
+  {{0x000000003b9aca00ull, 0x0000000000000000ull}},
+  {{0x000000003b9aca00ull, 0x0000000000000000ull}},
+  {{0x000000003b9aca00ull, 0x0000000000000000ull}},
+  {{0x00000002540be400ull, 0x0000000000000000ull}},
+  {{0x00000002540be400ull, 0x0000000000000000ull}},
+  {{0x00000002540be400ull, 0x0000000000000000ull}},
+  {{0x00000002540be400ull, 0x0000000000000000ull}},
+  {{0x000000174876e800ull, 0x0000000000000000ull}},
+  {{0x000000174876e800ull, 0x0000000000000000ull}},
+  {{0x000000174876e800ull, 0x0000000000000000ull}},
+  {{0x000000e8d4a51000ull, 0x0000000000000000ull}},
+  {{0x000000e8d4a51000ull, 0x0000000000000000ull}},
+  {{0x000000e8d4a51000ull, 0x0000000000000000ull}},
+  {{0x000009184e72a000ull, 0x0000000000000000ull}},
+  {{0x000009184e72a000ull, 0x0000000000000000ull}},
+  {{0x000009184e72a000ull, 0x0000000000000000ull}},
+  {{0x000009184e72a000ull, 0x0000000000000000ull}},
+  {{0x00005af3107a4000ull, 0x0000000000000000ull}},
+  {{0x00005af3107a4000ull, 0x0000000000000000ull}},
+  {{0x00005af3107a4000ull, 0x0000000000000000ull}},
+  {{0x00038d7ea4c68000ull, 0x0000000000000000ull}},
+  {{0x00038d7ea4c68000ull, 0x0000000000000000ull}},
+  {{0x00038d7ea4c68000ull, 0x0000000000000000ull}},
+  {{0x002386f26fc10000ull, 0x0000000000000000ull}},
+  {{0x002386f26fc10000ull, 0x0000000000000000ull}},
+  {{0x002386f26fc10000ull, 0x0000000000000000ull}},
+  {{0x002386f26fc10000ull, 0x0000000000000000ull}},
+  {{0x016345785d8a0000ull, 0x0000000000000000ull}},
+  {{0x016345785d8a0000ull, 0x0000000000000000ull}},
+  {{0x016345785d8a0000ull, 0x0000000000000000ull}},
+  {{0x0de0b6b3a7640000ull, 0x0000000000000000ull}},
+  {{0x0de0b6b3a7640000ull, 0x0000000000000000ull}},
+  {{0x0de0b6b3a7640000ull, 0x0000000000000000ull}},
+  {{0x8ac7230489e80000ull, 0x0000000000000000ull}},
+  {{0x8ac7230489e80000ull, 0x0000000000000000ull}},
+  {{0x8ac7230489e80000ull, 0x0000000000000000ull}},
+  {{0x8ac7230489e80000ull, 0x0000000000000000ull}},
+  {{0x6bc75e2d63100000ull, 0x0000000000000005ull}},	// 10^20
+  {{0x6bc75e2d63100000ull, 0x0000000000000005ull}},	// 10^20
+  {{0x6bc75e2d63100000ull, 0x0000000000000005ull}},	// 10^20
+  {{0x35c9adc5dea00000ull, 0x0000000000000036ull}},	// 10^21
+  {{0x35c9adc5dea00000ull, 0x0000000000000036ull}},	// 10^21
+  {{0x35c9adc5dea00000ull, 0x0000000000000036ull}},	// 10^21
+  {{0x19e0c9bab2400000ull, 0x000000000000021eull}},	// 10^22
+  {{0x19e0c9bab2400000ull, 0x000000000000021eull}},	// 10^22
+  {{0x19e0c9bab2400000ull, 0x000000000000021eull}},	// 10^22
+  {{0x19e0c9bab2400000ull, 0x000000000000021eull}},	// 10^22
+  {{0x02c7e14af6800000ull, 0x000000000000152dull}},	// 10^23
+  {{0x02c7e14af6800000ull, 0x000000000000152dull}},	// 10^23
+  {{0x02c7e14af6800000ull, 0x000000000000152dull}},	// 10^23
+  {{0x1bcecceda1000000ull, 0x000000000000d3c2ull}},	// 10^24
+  {{0x1bcecceda1000000ull, 0x000000000000d3c2ull}},	// 10^24
+  {{0x1bcecceda1000000ull, 0x000000000000d3c2ull}},	// 10^24
+  {{0x161401484a000000ull, 0x0000000000084595ull}},	// 10^25
+  {{0x161401484a000000ull, 0x0000000000084595ull}},	// 10^25
+  {{0x161401484a000000ull, 0x0000000000084595ull}},	// 10^25
+  {{0x161401484a000000ull, 0x0000000000084595ull}},	// 10^25
+  {{0xdcc80cd2e4000000ull, 0x000000000052b7d2ull}},	// 10^26
+  {{0xdcc80cd2e4000000ull, 0x000000000052b7d2ull}},	// 10^26
+  {{0xdcc80cd2e4000000ull, 0x000000000052b7d2ull}},	// 10^26
+  {{0x9fd0803ce8000000ull, 0x00000000033b2e3cull}},	// 10^27
+  {{0x9fd0803ce8000000ull, 0x00000000033b2e3cull}},	// 10^27
+  {{0x9fd0803ce8000000ull, 0x00000000033b2e3cull}},	// 10^27
+  {{0x3e25026110000000ull, 0x00000000204fce5eull}},	// 10^28
+  {{0x3e25026110000000ull, 0x00000000204fce5eull}},	// 10^28
+  {{0x3e25026110000000ull, 0x00000000204fce5eull}},	// 10^28
+  {{0x3e25026110000000ull, 0x00000000204fce5eull}},	// 10^28
+  {{0x6d7217caa0000000ull, 0x00000001431e0faeull}},	// 10^29
+  {{0x6d7217caa0000000ull, 0x00000001431e0faeull}},	// 10^29
+  {{0x6d7217caa0000000ull, 0x00000001431e0faeull}},	// 10^29
+  {{0x4674edea40000000ull, 0x0000000c9f2c9cd0ull}},	// 10^30
+  {{0x4674edea40000000ull, 0x0000000c9f2c9cd0ull}},	// 10^30
+  {{0x4674edea40000000ull, 0x0000000c9f2c9cd0ull}},	// 10^30
+  {{0xc0914b2680000000ull, 0x0000007e37be2022ull}},	// 10^31
+  {{0xc0914b2680000000ull, 0x0000007e37be2022ull}},	// 10^31
+  {{0xc0914b2680000000ull, 0x0000007e37be2022ull}},	// 10^31
+  {{0x85acef8100000000ull, 0x000004ee2d6d415bull}},	// 10^32
+  {{0x85acef8100000000ull, 0x000004ee2d6d415bull}},	// 10^32
+  {{0x85acef8100000000ull, 0x000004ee2d6d415bull}},	// 10^32
+  {{0x85acef8100000000ull, 0x000004ee2d6d415bull}},	// 10^32
+  {{0x38c15b0a00000000ull, 0x0000314dc6448d93ull}},	// 10^33
+  {{0x38c15b0a00000000ull, 0x0000314dc6448d93ull}},	// 10^33
+  {{0x38c15b0a00000000ull, 0x0000314dc6448d93ull}},	// 10^33, entry 112
+  {{0x378d8e6400000000ull, 0x0001ed09bead87c0ull}},	// 10^34
+  {{0x378d8e6400000000ull, 0x0001ed09bead87c0ull}},	// 10^34
+  {{0x378d8e6400000000ull, 0x0001ed09bead87c0ull}},	// 10^34
+  {{0x2b878fe800000000ull, 0x0013426172c74d82ull}},	// 10^35
+  {{0x2b878fe800000000ull, 0x0013426172c74d82ull}},	// 10^35
+  {{0x2b878fe800000000ull, 0x0013426172c74d82ull}},	// 10^35
+  {{0x2b878fe800000000ull, 0x0013426172c74d82ull}},	// 10^35
+  {{0xb34b9f1000000000ull, 0x00c097ce7bc90715ull}},	// 10^36
+  {{0x00f436a000000000ull, 0x0785ee10d5da46d9ull}},	// 10^37
+  {{0x00f436a000000000ull, 0x0785ee10d5da46d9ull}},	// 10^37
+  {{0x00f436a000000000ull, 0x0785ee10d5da46d9ull}},	// 10^37
+  {{0x098a224000000000ull, 0x4b3b4ca85a86c47aull}},	// 10^38
+  {{0x098a224000000000ull, 0x4b3b4ca85a86c47aull}},	// 10^38
+  {{0x098a224000000000ull, 0x4b3b4ca85a86c47aull}},	// 10^38
+  {{0x098a224000000000ull, 0x4b3b4ca85a86c47aull}},	// 10^38
+};
diff --git a/gcc-4.9/libgcc/config/libbid/bid_decimal_globals.c b/gcc-4.9/libgcc/config/libbid/bid_decimal_globals.c
new file mode 100644
index 000000000..d96bd01e7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_decimal_globals.c
@@ -0,0 +1,100 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+#include "bid_gcc_intrinsics.h"
+
+#if DECIMAL_GLOBAL_ROUNDING
+BID_THREAD _IDEC_round _IDEC_glbround = ROUNDING_TO_NEAREST;
+
+#if DECIMAL_GLOBAL_ROUNDING_ACCESS_FUNCTIONS
+void
+__dfp_set_round (int mode) {
+  _IDEC_glbround = mode;
+}
+
+int
+__dfp_get_round (void) {
+  return _IDEC_glbround;
+}
+#endif
+#endif
+
+#if DECIMAL_GLOBAL_EXCEPTION_FLAGS
+BID_THREAD _IDEC_flags _IDEC_glbflags = EXACT_STATUS;
+
+#if DECIMAL_GLOBAL_EXCEPTION_FLAGS_ACCESS_FUNCTIONS
+#include <fenv.h>
+
+void
+__dfp_clear_except (void) {
+  _IDEC_glbflags &= ~FLAG_MASK;
+}
+
+int
+__dfp_test_except (int mask) {
+  int flags = 0;
+
+  if ((_IDEC_glbflags & INEXACT_EXCEPTION) != 0)
+    flags |= mask & FE_INEXACT;
+  if ((_IDEC_glbflags & UNDERFLOW_EXCEPTION) != 0)
+    flags |= mask & FE_UNDERFLOW;
+  if ((_IDEC_glbflags & OVERFLOW_EXCEPTION) != 0)
+    flags |= mask & FE_OVERFLOW;
+  if ((_IDEC_glbflags & ZERO_DIVIDE_EXCEPTION) != 0)
+    flags |= mask & FE_DIVBYZERO;
+  if ((_IDEC_glbflags & INVALID_EXCEPTION) != 0)
+    flags |= mask & FE_INVALID;
+
+  return flags;
+}
+
+void
+__dfp_raise_except (int mask) {
+  _IDEC_flags flags = 0;
+
+  if ((mask & FE_INEXACT) != 0)
+    flags |= INEXACT_EXCEPTION;
+  if ((mask & FE_UNDERFLOW) != 0)
+    flags |= UNDERFLOW_EXCEPTION;
+  if ((mask & FE_OVERFLOW) != 0)
+    flags |= OVERFLOW_EXCEPTION;
+  if ((mask & FE_DIVBYZERO) != 0)
+    flags |= ZERO_DIVIDE_EXCEPTION;
+  if ((mask & FE_INVALID) != 0)
+    flags |= INVALID_EXCEPTION;
+
+  _IDEC_glbflags |= flags;
+}
+#endif
+#endif
+
+#if DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+#if DECIMAL_GLOBAL_EXCEPTION_MASKS
+BID_THREAD _IDEC_exceptionmasks _IDEC_glbexceptionmasks =
+  _IDEC_allexcmasksset;
+#endif
+#if DECIMAL_GLOBAL_EXCEPTION_INFO
+BID_THREAD _IDEC_excepthandling _IDEC_glbexcepthandling;
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_div_macros.h b/gcc-4.9/libgcc/config/libbid/bid_div_macros.h
new file mode 100644
index 000000000..e8404f364
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_div_macros.h
@@ -0,0 +1,540 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _DIV_MACROS_H_
+#define _DIV_MACROS_H_
+
+#include "bid_internal.h"
+
+#define FENCE __fence
+//#define FENCE 
+
+//#define DOUBLE_EXTENDED_ON
+
+#if DOUBLE_EXTENDED_ON
+
+
+__BID_INLINE__ void
+__div_128_by_128 (UINT128 * pCQ, UINT128 * pCR, UINT128 CX, UINT128 CY) {
+  UINT128 CB, CB2, CB4, CB8, CQB, CA;
+  int_double d64, dm64, ds;
+  int_float t64;
+  double dx, dq, dqh;
+  BINARY80 lq, lx, ly;
+  UINT64 Rh, R, B2, B4, Ph, Ql, Ql2, carry, Qh;
+
+  if (!CY.w[1]) {
+    pCR->w[1] = 0;
+
+    if (!CX.w[1]) {
+      pCQ->w[0] = CX.w[0] / CY.w[0];
+      pCQ->w[1] = 0;
+      pCR->w[1] = 0;
+      pCR->w[0] = CX.w[0] - pCQ->w[0] * CY.w[0];
+    } else {
+
+      // This path works for CX<2^116 only 
+
+      // 2^64
+      d64.i = 0x43f0000000000000;
+      // 2^64
+      dm64.i = 0x3bf0000000000000;
+      // 1.5*2^(-52)
+      ds.i = 0x3cb8000000000000;
+      dx = (BINARY80) CX.w[1] * d64.d + (BINARY80) CX.w[0];
+      dq = dx / (BINARY80) CY.w[0];
+      dq -= dq * (ds.d);
+      dqh = dq * dm64.d;
+      Qh = (UINT64) dqh;
+      Ql = (UINT64) (dq - ((double) Qh) * d64.d);
+
+      Rh = CX.w[0] - Ql * CY.w[0];
+      Ql2 = Rh / CY.w[0];
+      pCR->w[0] = Rh - Ql2 * CY.w[0];
+      __add_carry_out ((pCQ->w[0]), carry, Ql, Ql2);
+      pCQ->w[1] = Qh + carry;
+
+    }
+    return;
+  }
+  // now CY.w[1] > 0
+
+  // 2^64
+  t64.i = 0x5f800000;
+  lx = (BINARY80) CX.w[1] * (BINARY80) t64.d + (BINARY80) CX.w[0];
+  ly = (BINARY80) CY.w[1] * (BINARY80) t64.d + (BINARY80) CY.w[0];
+  lq = lx / ly;
+  pCQ->w[0] = (UINT64) lq;
+
+  pCQ->w[1] = 0;
+
+  if (!pCQ->w[0]) {
+    /*if(__unsigned_compare_ge_128(CX,CY))
+       {
+       pCQ->w[0] = 1;
+       __sub_128_128((*pCR), CX, CY);
+       }
+       else */
+    {
+      pCR->w[1] = CX.w[1];
+      pCR->w[0] = CX.w[0];
+    }
+    return;
+  }
+
+  if (CY.w[1] >= 16 || pCQ->w[0] <= 0x1000000000000000ull) {
+    pCQ->w[0] = (UINT64) lq - 1;
+    __mul_64x128_full (Ph, CQB, (pCQ->w[0]), CY);
+    __sub_128_128 (CA, CX, CQB);
+    if (__unsigned_compare_ge_128 (CA, CY)) {
+      __sub_128_128 (CA, CA, CY);
+      pCQ->w[0]++;
+      if (__unsigned_compare_ge_128 (CA, CY)) {
+	__sub_128_128 (CA, CA, CY);
+	pCQ->w[0]++;
+      }
+    }
+    pCR->w[1] = CA.w[1];
+    pCR->w[0] = CA.w[0];
+  } else {
+    pCQ->w[0] = (UINT64) lq - 6;
+
+    __mul_64x128_full (Ph, CQB, (pCQ->w[0]), CY);
+    __sub_128_128 (CA, CX, CQB);
+
+    CB8.w[1] = (CY.w[1] << 3) | (CY.w[0] >> 61);
+    CB8.w[0] = CY.w[0] << 3;
+    CB4.w[1] = (CY.w[1] << 2) | (CY.w[0] >> 62);
+    CB4.w[0] = CY.w[0] << 2;
+    CB2.w[1] = (CY.w[1] << 1) | (CY.w[0] >> 63);
+    CB2.w[0] = CY.w[0] << 1;
+
+    if (__unsigned_compare_ge_128 (CA, CB8)) {
+      pCQ->w[0] += 8;
+      __sub_128_128 (CA, CA, CB8);
+    }
+    if (__unsigned_compare_ge_128 (CA, CB4)) {
+      pCQ->w[0] += 4;
+      __sub_128_128 (CA, CA, CB4);
+    }
+    if (__unsigned_compare_ge_128 (CA, CB2)) {
+      pCQ->w[0] += 2;
+      __sub_128_128 (CA, CA, CB2);
+    }
+    if (__unsigned_compare_ge_128 (CA, CY)) {
+      pCQ->w[0] += 1;
+      __sub_128_128 (CA, CA, CY);
+    }
+
+    pCR->w[1] = CA.w[1];
+    pCR->w[0] = CA.w[0];
+  }
+}
+
+
+
+
+
+
+__BID_INLINE__ void
+__div_256_by_128 (UINT128 * pCQ, UINT256 * pCA4, UINT128 CY) {
+  UINT256 CQ2Y;
+  UINT128 CQ2, CQ3Y;
+  UINT64 Q3, carry64;
+  int_double d64;
+  BINARY80 lx, ly, lq, l64, l128;
+
+  // 2^64
+  d64.i = 0x43f0000000000000ull;
+  l64 = (BINARY80) d64.d;
+  // 2^128
+  l128 = l64 * l64;
+
+  lx =
+    ((BINARY80) (*pCA4).w[3] * l64 +
+     (BINARY80) (*pCA4).w[2]) * l128 +
+    (BINARY80) (*pCA4).w[1] * l64 + (BINARY80) (*pCA4).w[0];
+  ly = (BINARY80) CY.w[1] * l128 + (BINARY80) CY.w[0] * l64;
+
+  lq = lx / ly;
+  CQ2.w[1] = (UINT64) lq;
+  lq = (lq - CQ2.w[1]) * l64;
+  CQ2.w[0] = (UINT64) lq;
+
+  // CQ2*CY
+  __mul_128x128_to_256 (CQ2Y, CY, CQ2);
+
+  // CQ2Y <= (*pCA4) ?
+  if (CQ2Y.w[3] < (*pCA4).w[3]
+      || (CQ2Y.w[3] == (*pCA4).w[3]
+	  && (CQ2Y.w[2] < (*pCA4).w[2]
+	      || (CQ2Y.w[2] == (*pCA4).w[2]
+		  && (CQ2Y.w[1] < (*pCA4).w[1]
+		      || (CQ2Y.w[1] == (*pCA4).w[1]
+			  && (CQ2Y.w[0] <= (*pCA4).w[0]))))))) {
+
+    // (*pCA4) -CQ2Y, guaranteed below 5*2^49*CY < 5*2^(49+128)
+    __sub_borrow_out ((*pCA4).w[0], carry64, (*pCA4).w[0], CQ2Y.w[0]);
+    __sub_borrow_in_out ((*pCA4).w[1], carry64, (*pCA4).w[1], CQ2Y.w[1],
+			 carry64);
+    (*pCA4).w[2] = (*pCA4).w[2] - CQ2Y.w[2] - carry64;
+
+    lx = ((BINARY80) (*pCA4).w[2] * l128 +
+	  ((BINARY80) (*pCA4).w[1] * l64 +
+	   (BINARY80) (*pCA4).w[0])) * l64;
+    lq = lx / ly;
+    Q3 = (UINT64) lq;
+
+    if (Q3) {
+      Q3--;
+      __mul_64x128_short (CQ3Y, Q3, CY);
+      __sub_borrow_out ((*pCA4).w[0], carry64, (*pCA4).w[0], CQ3Y.w[0]);
+      (*pCA4).w[1] = (*pCA4).w[1] - CQ3Y.w[1] - carry64;
+
+      if ((*pCA4).w[1] > CY.w[1]
+	  || ((*pCA4).w[1] == CY.w[1] && (*pCA4).w[0] >= CY.w[0])) {
+	Q3++;
+	__sub_borrow_out ((*pCA4).w[0], carry64, (*pCA4).w[0], CY.w[0]);
+	(*pCA4).w[1] = (*pCA4).w[1] - CY.w[1] - carry64;
+	if ((*pCA4).w[1] > CY.w[1]
+	    || ((*pCA4).w[1] == CY.w[1] && (*pCA4).w[0] >= CY.w[0])) {
+	  Q3++;
+	  __sub_borrow_out ((*pCA4).w[0], carry64, (*pCA4).w[0],
+			    CY.w[0]);
+	  (*pCA4).w[1] = (*pCA4).w[1] - CY.w[1] - carry64;
+	}
+      }
+      // add Q3 to Q2
+      __add_carry_out (CQ2.w[0], carry64, Q3, CQ2.w[0]);
+      CQ2.w[1] += carry64;
+    }
+  } else {
+    // CQ2Y - (*pCA4), guaranteed below 5*2^(49+128)
+    __sub_borrow_out ((*pCA4).w[0], carry64, CQ2Y.w[0], (*pCA4).w[0]);
+    __sub_borrow_in_out ((*pCA4).w[1], carry64, CQ2Y.w[1], (*pCA4).w[1],
+			 carry64);
+    (*pCA4).w[2] = CQ2Y.w[2] - (*pCA4).w[2] - carry64;
+
+    lx =
+      ((BINARY80) (*pCA4).w[2] * l128 +
+       (BINARY80) (*pCA4).w[1] * l64 + (BINARY80) (*pCA4).w[0]) * l64;
+    lq = lx / ly;
+    Q3 = 1 + (UINT64) lq;
+
+    __mul_64x128_short (CQ3Y, Q3, CY);
+    __sub_borrow_out ((*pCA4).w[0], carry64, CQ3Y.w[0], (*pCA4).w[0]);
+    (*pCA4).w[1] = CQ3Y.w[1] - (*pCA4).w[1] - carry64;
+
+    if ((SINT64) (*pCA4).w[1] > (SINT64) CY.w[1]
+	|| ((*pCA4).w[1] == CY.w[1] && (*pCA4).w[0] >= CY.w[0])) {
+      Q3--;
+      __sub_borrow_out ((*pCA4).w[0], carry64, (*pCA4).w[0], CY.w[0]);
+      (*pCA4).w[1] = (*pCA4).w[1] - CY.w[1] - carry64;
+    } else if ((SINT64) (*pCA4).w[1] < 0) {
+      Q3++;
+      __add_carry_out ((*pCA4).w[0], carry64, (*pCA4).w[0], CY.w[0]);
+      (*pCA4).w[1] = (*pCA4).w[1] + CY.w[1] + carry64;
+    }
+    // subtract Q3 from Q2
+    __sub_borrow_out (CQ2.w[0], carry64, CQ2.w[0], Q3);
+    CQ2.w[1] -= carry64;
+  }
+
+  // (*pCQ) + CQ2 + carry
+  __add_carry_out ((*pCQ).w[0], carry64, CQ2.w[0], (*pCQ).w[0]);
+  (*pCQ).w[1] = (*pCQ).w[1] + CQ2.w[1] + carry64;
+
+
+}
+#else
+
+__BID_INLINE__ void
+__div_128_by_128 (UINT128 * pCQ, UINT128 * pCR, UINT128 CX0, UINT128 CY) {
+  UINT128 CY36, CY51, CQ, A2, CX, CQT;
+  UINT64 Q;
+  int_double t64, d49, d60;
+  double lx, ly, lq;
+
+  if (!CX0.w[1] && !CY.w[1]) {
+    pCQ->w[0] = CX0.w[0] / CY.w[0];
+    pCQ->w[1] = 0;
+    pCR->w[1] = pCR->w[0] = 0;
+    pCR->w[0] = CX0.w[0] - pCQ->w[0] * CY.w[0];
+    return;
+  }
+
+  CX.w[1] = CX0.w[1];
+  CX.w[0] = CX0.w[0];
+
+  // 2^64
+  t64.i = 0x43f0000000000000ull;
+  lx = (double) CX.w[1] * t64.d + (double) CX.w[0];
+  ly = (double) CY.w[1] * t64.d + (double) CY.w[0];
+  lq = lx / ly;
+
+  CY36.w[1] = CY.w[0] >> (64 - 36);
+  CY36.w[0] = CY.w[0] << 36;
+
+  CQ.w[1] = CQ.w[0] = 0;
+
+  // Q >= 2^100 ?
+  if (!CY.w[1] && !CY36.w[1] && (CX.w[1] >= CY36.w[0])) {
+    // then Q >= 2^100
+
+    // 2^(-60)*CX/CY
+    d60.i = 0x3c30000000000000ull;
+    lq *= d60.d;
+    Q = (UINT64) lq - 4ull;
+
+    // Q*CY
+    __mul_64x64_to_128 (A2, Q, CY.w[0]);
+
+    // A2 <<= 60
+    A2.w[1] = (A2.w[1] << 60) | (A2.w[0] >> (64 - 60));
+    A2.w[0] <<= 60;
+
+    __sub_128_128 (CX, CX, A2);
+
+    lx = (double) CX.w[1] * t64.d + (double) CX.w[0];
+    lq = lx / ly;
+
+    CQ.w[1] = Q >> (64 - 60);
+    CQ.w[0] = Q << 60;
+  }
+
+
+  CY51.w[1] = (CY.w[1] << 51) | (CY.w[0] >> (64 - 51));
+  CY51.w[0] = CY.w[0] << 51;
+
+  if (CY.w[1] < (UINT64) (1 << (64 - 51))
+      && (__unsigned_compare_gt_128 (CX, CY51))) {
+    // Q > 2^51 
+
+    // 2^(-49)*CX/CY
+    d49.i = 0x3ce0000000000000ull;
+    lq *= d49.d;
+
+    Q = (UINT64) lq - 1ull;
+
+    // Q*CY
+    __mul_64x64_to_128 (A2, Q, CY.w[0]);
+    A2.w[1] += Q * CY.w[1];
+
+    // A2 <<= 49
+    A2.w[1] = (A2.w[1] << 49) | (A2.w[0] >> (64 - 49));
+    A2.w[0] <<= 49;
+
+    __sub_128_128 (CX, CX, A2);
+
+    CQT.w[1] = Q >> (64 - 49);
+    CQT.w[0] = Q << 49;
+    __add_128_128 (CQ, CQ, CQT);
+
+    lx = (double) CX.w[1] * t64.d + (double) CX.w[0];
+    lq = lx / ly;
+  }
+
+  Q = (UINT64) lq;
+
+  __mul_64x64_to_128 (A2, Q, CY.w[0]);
+  A2.w[1] += Q * CY.w[1];
+
+  __sub_128_128 (CX, CX, A2);
+  if ((SINT64) CX.w[1] < 0) {
+    Q--;
+    CX.w[0] += CY.w[0];
+    if (CX.w[0] < CY.w[0])
+      CX.w[1]++;
+    CX.w[1] += CY.w[1];
+    if ((SINT64) CX.w[1] < 0) {
+      Q--;
+      CX.w[0] += CY.w[0];
+      if (CX.w[0] < CY.w[0])
+	CX.w[1]++;
+      CX.w[1] += CY.w[1];
+    }
+  } else if (__unsigned_compare_ge_128 (CX, CY)) {
+    Q++;
+    __sub_128_128 (CX, CX, CY);
+  }
+
+  __add_128_64 (CQ, CQ, Q);
+
+
+  pCQ->w[1] = CQ.w[1];
+  pCQ->w[0] = CQ.w[0];
+  pCR->w[1] = CX.w[1];
+  pCR->w[0] = CX.w[0];
+  return;
+}
+
+
+__BID_INLINE__ void
+__div_256_by_128 (UINT128 * pCQ, UINT256 * pCA4, UINT128 CY) {
+  UINT256 CA4, CA2, CY51, CY36;
+  UINT128 CQ, A2, A2h, CQT;
+  UINT64 Q, carry64;
+  int_double t64, d49, d60;
+  double lx, ly, lq, d128, d192;
+
+  // the quotient is assumed to be at most 113 bits, 
+  // as needed by BID128 divide routines
+
+  // initial dividend
+  CA4.w[3] = (*pCA4).w[3];
+  CA4.w[2] = (*pCA4).w[2];
+  CA4.w[1] = (*pCA4).w[1];
+  CA4.w[0] = (*pCA4).w[0];
+  CQ.w[1] = (*pCQ).w[1];
+  CQ.w[0] = (*pCQ).w[0];
+
+  // 2^64
+  t64.i = 0x43f0000000000000ull;
+  d128 = t64.d * t64.d;
+  d192 = d128 * t64.d;
+  lx = (double) CA4.w[3] * d192 + ((double) CA4.w[2] * d128 +
+				   ((double) CA4.w[1] * t64.d +
+				    (double) CA4.w[0]));
+  ly = (double) CY.w[1] * t64.d + (double) CY.w[0];
+  lq = lx / ly;
+
+  CY36.w[2] = CY.w[1] >> (64 - 36);
+  CY36.w[1] = (CY.w[1] << 36) | (CY.w[0] >> (64 - 36));
+  CY36.w[0] = CY.w[0] << 36;
+
+  CQ.w[1] = (*pCQ).w[1];
+  CQ.w[0] = (*pCQ).w[0];
+
+  // Q >= 2^100 ?
+  if (CA4.w[3] > CY36.w[2]
+      || (CA4.w[3] == CY36.w[2]
+	  && (CA4.w[2] > CY36.w[1]
+	      || (CA4.w[2] == CY36.w[1] && CA4.w[1] >= CY36.w[0])))) {
+    // 2^(-60)*CA4/CY
+    d60.i = 0x3c30000000000000ull;
+    lq *= d60.d;
+    Q = (UINT64) lq - 4ull;
+
+    // Q*CY
+    __mul_64x128_to_192 (CA2, Q, CY);
+
+    // CA2 <<= 60
+    // CA2.w[3] = CA2.w[2] >> (64-60);
+    CA2.w[2] = (CA2.w[2] << 60) | (CA2.w[1] >> (64 - 60));
+    CA2.w[1] = (CA2.w[1] << 60) | (CA2.w[0] >> (64 - 60));
+    CA2.w[0] <<= 60;
+
+    // CA4 -= CA2
+    __sub_borrow_out (CA4.w[0], carry64, CA4.w[0], CA2.w[0]);
+    __sub_borrow_in_out (CA4.w[1], carry64, CA4.w[1], CA2.w[1],
+			 carry64);
+    CA4.w[2] = CA4.w[2] - CA2.w[2] - carry64;
+
+    lx = ((double) CA4.w[2] * d128 +
+	  ((double) CA4.w[1] * t64.d + (double) CA4.w[0]));
+    lq = lx / ly;
+
+    CQT.w[1] = Q >> (64 - 60);
+    CQT.w[0] = Q << 60;
+    __add_128_128 (CQ, CQ, CQT);
+  }
+
+  CY51.w[2] = CY.w[1] >> (64 - 51);
+  CY51.w[1] = (CY.w[1] << 51) | (CY.w[0] >> (64 - 51));
+  CY51.w[0] = CY.w[0] << 51;
+
+  if (CA4.w[2] > CY51.w[2] || ((CA4.w[2] == CY51.w[2])
+			       &&
+			       (__unsigned_compare_gt_128 (CA4, CY51))))
+  {
+    // Q > 2^51 
+
+    // 2^(-49)*CA4/CY
+    d49.i = 0x3ce0000000000000ull;
+    lq *= d49.d;
+
+    Q = (UINT64) lq - 1ull;
+
+    // Q*CY
+    __mul_64x64_to_128 (A2, Q, CY.w[0]);
+    __mul_64x64_to_128 (A2h, Q, CY.w[1]);
+    A2.w[1] += A2h.w[0];
+    if (A2.w[1] < A2h.w[0])
+      A2h.w[1]++;
+
+    // A2 <<= 49
+    CA2.w[2] = (A2h.w[1] << 49) | (A2.w[1] >> (64 - 49));
+    CA2.w[1] = (A2.w[1] << 49) | (A2.w[0] >> (64 - 49));
+    CA2.w[0] = A2.w[0] << 49;
+
+    __sub_borrow_out (CA4.w[0], carry64, CA4.w[0], CA2.w[0]);
+    __sub_borrow_in_out (CA4.w[1], carry64, CA4.w[1], CA2.w[1],
+			 carry64);
+    CA4.w[2] = CA4.w[2] - CA2.w[2] - carry64;
+
+    CQT.w[1] = Q >> (64 - 49);
+    CQT.w[0] = Q << 49;
+    __add_128_128 (CQ, CQ, CQT);
+
+    lx = ((double) CA4.w[2] * d128 +
+	  ((double) CA4.w[1] * t64.d + (double) CA4.w[0]));
+    lq = lx / ly;
+  }
+
+  Q = (UINT64) lq;
+  __mul_64x64_to_128 (A2, Q, CY.w[0]);
+  A2.w[1] += Q * CY.w[1];
+
+  __sub_128_128 (CA4, CA4, A2);
+  if ((SINT64) CA4.w[1] < 0) {
+    Q--;
+    CA4.w[0] += CY.w[0];
+    if (CA4.w[0] < CY.w[0])
+      CA4.w[1]++;
+    CA4.w[1] += CY.w[1];
+    if ((SINT64) CA4.w[1] < 0) {
+      Q--;
+      CA4.w[0] += CY.w[0];
+      if (CA4.w[0] < CY.w[0])
+	CA4.w[1]++;
+      CA4.w[1] += CY.w[1];
+    }
+  } else if (__unsigned_compare_ge_128 (CA4, CY)) {
+    Q++;
+    __sub_128_128 (CA4, CA4, CY);
+  }
+
+  __add_128_64 (CQ, CQ, Q);
+
+  pCQ->w[1] = CQ.w[1];
+  pCQ->w[0] = CQ.w[0];
+  pCA4->w[1] = CA4.w[1];
+  pCA4->w[0] = CA4.w[0];
+  return;
+
+
+
+}
+
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_dpd.c b/gcc-4.9/libgcc/config/libbid/bid_dpd.c
new file mode 100644
index 000000000..69184968b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_dpd.c
@@ -0,0 +1,782 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define  DECNUMDIGITS 34	// work with up to 34 digits
+
+#include "bid_internal.h"
+#include "bid_b2d.h"
+
+UINT32
+bid_to_bid32 (UINT32 ba) {
+  UINT32 res;
+  UINT32 sign, comb, exp;
+  UINT32 trailing;
+  UINT32 bcoeff;
+
+  sign = (ba & 0x80000000ul);
+  comb = (ba & 0x7ff00000ul) >> 20;
+  trailing = (ba & 0x000ffffful);
+
+  if ((comb & 0x780) == 0x780) {
+    ba &= 0xfff0000ul;
+    return ba;
+  } else {
+    if ((comb & 0x600) == 0x600) {	// G0..G1 = 11 -> exp is G2..G11
+      exp = (comb >> 1) & 0xff;
+      bcoeff = ((8 + (comb & 1)) << 20) | trailing;
+    } else {
+      exp = (comb >> 3) & 0xff;
+      bcoeff = ((comb & 7) << 20) | trailing;
+    }
+    if (bcoeff >= 10000000)
+      bcoeff = 0;
+    res = very_fast_get_BID32 (sign, exp, bcoeff);
+  }
+  return res;
+}
+
+UINT64
+bid_to_bid64 (UINT64 ba) {
+  UINT64 res;
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  UINT64 bcoeff;
+
+  sign = (ba & 0x8000000000000000ull);
+  comb = (ba & 0x7ffc000000000000ull) >> 50;
+  trailing = (ba & 0x0003ffffffffffffull);
+
+  if ((comb & 0x1e00) == 0x1e00) {
+    ba &= 0xfff000000000000ULL;
+    return ba;
+  } else {
+    if ((comb & 0x1800) == 0x1800) {	// G0..G1 = 11 -> exp is G2..G11
+      exp = (comb >> 1) & 0x3ff;
+      bcoeff = ((8 + (comb & 1)) << 50) | trailing;
+    } else {
+      exp = (comb >> 3) & 0x3ff;
+      bcoeff = ((comb & 7) << 50) | trailing;
+    }
+    if (bcoeff >= 10000000000000000ull)
+      bcoeff = 0ull;
+    res = very_fast_get_BID64 (sign, exp, bcoeff);
+  }
+  return res;
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid_to_dpd32 (UINT32 * pres, UINT32 * pba) {
+  UINT32 ba = *pba;
+#else
+UINT32
+bid_to_dpd32 (UINT32 ba) {
+#endif
+  UINT32 res;
+
+  UINT32 sign, comb, exp, trailing;
+  UINT32 b0, b1, b2;
+  UINT32 bcoeff, dcoeff;
+  UINT32 nanb = 0;
+
+  sign = (ba & 0x80000000);
+  comb = (ba & 0x7ff00000) >> 20;
+  trailing = (ba & 0xfffff);
+
+  // Detect infinity, and return canonical infinity
+  if ((comb & 0x7c0) == 0x780) {
+    res = sign | 0x78000000;
+    BID_RETURN (res);
+    // Detect NaN, and canonicalize trailing
+  } else if ((comb & 0x7c0) == 0x7c0) {
+    if (trailing > 999999)
+      trailing = 0;
+    nanb = ba & 0xfe000000;
+    exp = 0;
+    bcoeff = trailing;
+  } else {	// Normal number
+    if ((comb & 0x600) == 0x600) {	// G0..G1 = 11 -> exp is G2..G11
+      exp = (comb >> 1) & 0xff;
+      bcoeff = ((8 + (comb & 1)) << 20) | trailing;
+    } else {
+      exp = (comb >> 3) & 0xff;
+      bcoeff = ((comb & 7) << 20) | trailing;
+    }
+    // Zero the coefficient if non-canonical (>= 10^7)
+    if (bcoeff >= 10000000)
+      bcoeff = 0;
+  }
+
+  b0 = bcoeff / 1000000;
+  b1 = (bcoeff / 1000) % 1000;
+  b2 = bcoeff % 1000;
+  dcoeff = (b2d[b1] << 10) | b2d[b2];
+
+  if (b0 >= 8)	// is b0 8 or 9?
+    res =
+      sign |
+      ((0x600 | ((exp >> 6) << 7) | ((b0 & 1) << 6) | (exp & 0x3f)) <<
+       20) | dcoeff;
+  else	// else b0 is 0..7
+    res =
+      sign | ((((exp >> 6) << 9) | (b0 << 6) | (exp & 0x3f)) << 20) |
+      dcoeff;
+
+  res |= nanb;
+
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid_to_dpd64 (UINT64 * pres, UINT64 * pba) {
+  UINT64 ba = *pba;
+#else
+UINT64
+bid_to_dpd64 (UINT64 ba) {
+#endif
+  UINT64 res;
+
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  UINT32 b0, b1, b2, b3, b4, b5;
+  UINT64 bcoeff;
+  UINT64 dcoeff;
+  UINT32 yhi, ylo;
+  UINT64 nanb = 0;
+
+//printf("arg bid "FMT_LLX16" \n", ba);
+  sign = (ba & 0x8000000000000000ull);
+  comb = (ba & 0x7ffc000000000000ull) >> 50;
+  trailing = (ba & 0x0003ffffffffffffull);
+
+  // Detect infinity, and return canonical infinity
+  if ((comb & 0x1f00) == 0x1e00) {
+    res = sign | 0x7800000000000000ull;
+    BID_RETURN (res);
+    // Detect NaN, and canonicalize trailing
+  } else if ((comb & 0x1e00) == 0x1e00) {
+    if (trailing > 999999999999999ull)
+      trailing = 0;
+    nanb = ba & 0xfe00000000000000ull;
+    exp = 0;
+    bcoeff = trailing;
+  } else {	// Normal number
+    if ((comb & 0x1800) == 0x1800) {	// G0..G1 = 11 -> exp is G2..G11
+      exp = (comb >> 1) & 0x3ff;
+      bcoeff = ((8 + (comb & 1)) << 50) | trailing;
+    } else {
+      exp = (comb >> 3) & 0x3ff;
+      bcoeff = ((comb & 7) << 50) | trailing;
+    }
+
+    // Zero the coefficient if it is non-canonical (>= 10^16)
+    if (bcoeff >= 10000000000000000ull)
+      bcoeff = 0;
+  }
+
+// Floor(2^61 / 10^9)
+#define D61 (2305843009ull)
+
+// Multipy the binary coefficient by ceil(2^64 / 1000), and take the upper
+// 64-bits in order to compute a division by 1000.
+
+#if 1
+  yhi =
+    ((UINT64) D61 *
+     (UINT64) (UINT32) (bcoeff >> (UINT64) 27)) >> (UINT64) 34;
+  ylo = bcoeff - 1000000000ull * yhi;
+  if (ylo >= 1000000000) {
+    ylo = ylo - 1000000000;
+    yhi = yhi + 1;
+  }
+#else
+  yhi = bcoeff / 1000000000ull;
+  ylo = bcoeff % 1000000000ull;
+#endif
+
+  // yhi = ABBBCCC ylo = DDDEEEFFF
+  b5 = ylo % 1000;	// b5 = FFF
+  b3 = ylo / 1000000;	// b3 = DDD
+  b4 = (ylo / 1000) - (1000 * b3);	// b4 = EEE
+  b2 = yhi % 1000;	// b2 = CCC
+  b0 = yhi / 1000000;	// b0 = A
+  b1 = (yhi / 1000) - (1000 * b0);	// b1 = BBB
+
+  dcoeff = b2d[b5] | b2d2[b4] | b2d3[b3] | b2d4[b2] | b2d5[b1];
+
+  if (b0 >= 8)	// is b0 8 or 9?
+    res =
+      sign |
+      ((0x1800 | ((exp >> 8) << 9) | ((b0 & 1) << 8) | (exp & 0xff)) <<
+       50) | dcoeff;
+  else	// else b0 is 0..7
+    res =
+      sign | ((((exp >> 8) << 11) | (b0 << 8) | (exp & 0xff)) << 50) |
+      dcoeff;
+
+  res |= nanb;
+
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+dpd_to_bid32 (UINT32 * pres, UINT32 * pda) {
+  UINT32 da = *pda;
+#else
+UINT32
+dpd_to_bid32 (UINT32 da) {
+#endif
+  UINT32 in = *(UINT32 *) & da;
+  UINT32 res;
+
+  UINT32 sign, comb, exp;
+  UINT32 trailing;
+  UINT32 d0 = 0, d1, d2;
+  UINT64 bcoeff;
+  UINT32 nanb = 0;
+
+  sign = (in & 0x80000000);
+  comb = (in & 0x7ff00000) >> 20;
+  trailing = (in & 0x000fffff);
+
+  if ((comb & 0x7e0) == 0x780) {	// G0..G4 = 1111 -> Inf
+    res = in & 0xf8000000;
+    BID_RETURN (res);
+  } else if ((comb & 0x7c0) == 0x7c0) {	// G0..G5 = 11111 -> NaN
+    nanb = in & 0xfe000000;
+    exp = 0;
+  } else {	// Normal number
+    if ((comb & 0x600) == 0x600) {	// G0..G1 = 11 -> d0 = 8 + G4
+      d0 = ((comb >> 6) & 1) | 8;
+      exp = ((comb & 0x180) >> 1) | (comb & 0x3f);
+    } else {
+      d0 = (comb >> 6) & 0x7;
+      exp = ((comb & 0x600) >> 3) | (comb & 0x3f);
+    }
+  }
+  d1 = d2b2[(trailing >> 10) & 0x3ff];
+  d2 = d2b[(trailing) & 0x3ff];
+
+  bcoeff = d2 + d1 + (1000000 * d0);
+  if (bcoeff < 0x800000) {
+    res = (exp << 23) | bcoeff | sign;
+  } else {
+    res = (exp << 21) | sign | 0x60000000 | (bcoeff & 0x1fffff);
+  }
+
+  res |= nanb;
+
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+dpd_to_bid64 (UINT64 * pres, UINT64 * pda) {
+  UINT64 da = *pda;
+#else
+UINT64
+dpd_to_bid64 (UINT64 da) {
+#endif
+  UINT64 in = *(UINT64 *) & da;
+  UINT64 res;
+
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  // UINT64 d0, d1, d2, d3, d4, d5;
+
+  UINT64 d1, d2;
+  UINT32 d0, d3, d4, d5;
+  UINT64 bcoeff;
+  UINT64 nanb = 0;
+
+//printf("arg dpd "FMT_LLX16" \n", in);
+  sign = (in & 0x8000000000000000ull);
+  comb = (in & 0x7ffc000000000000ull) >> 50;
+  trailing = (in & 0x0003ffffffffffffull);
+
+  if ((comb & 0x1f00) == 0x1e00) {	// G0..G4 = 1111 -> Inf
+    res = in & 0xf800000000000000ull;
+    BID_RETURN (res);
+  } else if ((comb & 0x1f00) == 0x1f00) {	// G0..G5 = 11111 -> NaN
+    nanb = in & 0xfe00000000000000ull;
+    exp = 0;
+    d0 = 0;
+  } else {	// Normal number
+    if ((comb & 0x1800) == 0x1800) {	// G0..G1 = 11 -> d0 = 8 + G4
+      d0 = ((comb >> 8) & 1) | 8;
+      // d0 = (comb & 0x0100 ? 9 : 8);
+      exp = (comb & 0x600) >> 1;
+      // exp = (comb & 0x0400 ? 1 : 0) * 0x200 + (comb & 0x0200 ? 1 : 0) * 0x100; // exp leading bits are G2..G3
+    } else {
+      d0 = (comb >> 8) & 0x7;
+      exp = (comb & 0x1800) >> 3;
+      // exp = (comb & 0x1000 ? 1 : 0) * 0x200 + (comb & 0x0800 ? 1 : 0) * 0x100; // exp loading bits are G0..G1
+    }
+  }
+  d1 = d2b5[(trailing >> 40) & 0x3ff];
+  d2 = d2b4[(trailing >> 30) & 0x3ff];
+  d3 = d2b3[(trailing >> 20) & 0x3ff];
+  d4 = d2b2[(trailing >> 10) & 0x3ff];
+  d5 = d2b[(trailing) & 0x3ff];
+
+  bcoeff = (d5 + d4 + d3) + d2 + d1 + (1000000000000000ull * d0);
+  exp += (comb & 0xff);
+  res = very_fast_get_BID64 (sign, exp, bcoeff);
+
+  res |= nanb;
+
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid_to_dpd128 (UINT128 * pres, UINT128 * pba) {
+  UINT128 ba = *pba;
+#else
+UINT128
+bid_to_dpd128 (UINT128 ba) {
+#endif
+  UINT128 res;
+
+  UINT128 sign;
+  UINT32 comb, exp;
+  UINT128 trailing;
+  UINT128 d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11;
+  UINT128 bcoeff;
+  UINT128 dcoeff;
+  UINT64 nanb = 0;
+
+  sign.w[1] = (ba.w[HIGH_128W] & 0x8000000000000000ull);
+  sign.w[0] = 0;
+  comb = (ba.w[HIGH_128W] & 0x7fffc00000000000ull) >> 46;
+  trailing.w[1] = (ba.w[HIGH_128W] & 0x00003fffffffffffull);
+  trailing.w[0] = ba.w[LOW_128W];
+  exp = 0;
+
+  if ((comb & 0x1f000) == 0x1e000) {	// G0..G4 = 1111 -> Inf
+    res.w[HIGH_128W] = ba.w[HIGH_128W] & 0xf800000000000000ull;
+    res.w[LOW_128W] = 0;
+    BID_RETURN (res);
+    // Detect NaN, and canonicalize trailing
+  } else if ((comb & 0x1f000) == 0x1f000) {
+    if ((trailing.w[1] > 0x0000314dc6448d93ULL) ||	// significand is non-canonical
+	((trailing.w[1] == 0x0000314dc6448d93ULL)
+	 && (trailing.w[0] >= 0x38c15b0a00000000ULL))
+	// significand is non-canonical
+      ) {
+      trailing.w[1] = trailing.w[0] = 0ull;
+    }
+    bcoeff.w[1] = trailing.w[1];
+    bcoeff.w[0] = trailing.w[0];
+    nanb = ba.w[HIGH_128W] & 0xfe00000000000000ull;
+    exp = 0;
+  } else {	// Normal number
+    if ((comb & 0x18000) == 0x18000) {	// G0..G1 = 11 -> exp is G2..G11
+      exp = (comb >> 1) & 0x3fff;
+      bcoeff.w[1] =
+	((UINT64) (8 + (comb & 1)) << (UINT64) 46) | trailing.w[1];
+      bcoeff.w[0] = trailing.w[0];
+    } else {
+      exp = (comb >> 3) & 0x3fff;
+      bcoeff.w[1] =
+	((UINT64) (comb & 7) << (UINT64) 46) | trailing.w[1];
+      bcoeff.w[0] = trailing.w[0];
+    }
+    // Zero the coefficient if non-canonical (>= 10^34)
+    if (bcoeff.w[1] > 0x1ed09bead87c0ull ||
+	(bcoeff.w[1] == 0x1ed09bead87c0ull
+	 && bcoeff.w[0] >= 0x378D8E6400000000ull)) {
+      bcoeff.w[0] = bcoeff.w[1] = 0;
+    }
+  }
+  // Constant 2^128 / 1000 + 1
+  {
+    UINT128 t;
+    UINT64 t2;
+    UINT128 d1000;
+    UINT128 b11, b10, b9, b8, b7, b6, b5, b4, b3, b2, b1;
+    d1000.w[1] = 0x4189374BC6A7EFull;
+    d1000.w[0] = 0x9DB22D0E56041894ull;
+    __mul_128x128_high (b11, bcoeff, d1000);
+    __mul_128x128_high (b10, b11, d1000);
+    __mul_128x128_high (b9, b10, d1000);
+    __mul_128x128_high (b8, b9, d1000);
+    __mul_128x128_high (b7, b8, d1000);
+    __mul_128x128_high (b6, b7, d1000);
+    __mul_128x128_high (b5, b6, d1000);
+    __mul_128x128_high (b4, b5, d1000);
+    __mul_128x128_high (b3, b4, d1000);
+    __mul_128x128_high (b2, b3, d1000);
+    __mul_128x128_high (b1, b2, d1000);
+
+
+    __mul_64x128_full (t2, t, 1000ull, b11);
+    __sub_128_128 (d11, bcoeff, t);
+    __mul_64x128_full (t2, t, 1000ull, b10);
+    __sub_128_128 (d10, b11, t);
+    __mul_64x128_full (t2, t, 1000ull, b9);
+    __sub_128_128 (d9, b10, t);
+    __mul_64x128_full (t2, t, 1000ull, b8);
+    __sub_128_128 (d8, b9, t);
+    __mul_64x128_full (t2, t, 1000ull, b7);
+    __sub_128_128 (d7, b8, t);
+    __mul_64x128_full (t2, t, 1000ull, b6);
+    __sub_128_128 (d6, b7, t);
+    __mul_64x128_full (t2, t, 1000ull, b5);
+    __sub_128_128 (d5, b6, t);
+    __mul_64x128_full (t2, t, 1000ull, b4);
+    __sub_128_128 (d4, b5, t);
+    __mul_64x128_full (t2, t, 1000ull, b3);
+    __sub_128_128 (d3, b4, t);
+    __mul_64x128_full (t2, t, 1000ull, b2);
+    __sub_128_128 (d2, b3, t);
+    __mul_64x128_full (t2, t, 1000ull, b1);
+    __sub_128_128 (d1, b2, t);
+    d0 = b1;
+
+  }
+
+  dcoeff.w[0] = b2d[d11.w[0]] | (b2d[d10.w[0]] << 10) |
+    (b2d[d9.w[0]] << 20) | (b2d[d8.w[0]] << 30) | (b2d[d7.w[0]] << 40) |
+    (b2d[d6.w[0]] << 50) | (b2d[d5.w[0]] << 60);
+  dcoeff.w[1] =
+    (b2d[d5.w[0]] >> 4) | (b2d[d4.w[0]] << 6) | (b2d[d3.w[0]] << 16) |
+    (b2d[d2.w[0]] << 26) | (b2d[d1.w[0]] << 36);
+
+  res.w[0] = dcoeff.w[0];
+  if (d0.w[0] >= 8) {
+    res.w[1] =
+      sign.
+      w[1] |
+      ((0x18000 | ((exp >> 12) << 13) | ((d0.w[0] & 1) << 12) |
+	(exp & 0xfff)) << 46) | dcoeff.w[1];
+  } else {
+    res.w[1] =
+      sign.
+      w[1] | ((((exp >> 12) << 15) | (d0.w[0] << 12) | (exp & 0xfff))
+	      << 46) | dcoeff.w[1];
+  }
+
+  res.w[1] |= nanb;
+
+  BID_SWAP128 (res);
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+dpd_to_bid128 (UINT128 * pres, UINT128 * pda) {
+  UINT128 da = *pda;
+#else
+UINT128
+dpd_to_bid128 (UINT128 da) {
+#endif
+  UINT128 in = *(UINT128 *) & da;
+  UINT128 res;
+
+  UINT128 sign;
+  UINT64 exp, comb;
+  UINT128 trailing;
+  UINT64 d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11;
+  UINT128 bcoeff;
+  UINT64 tl, th;
+  UINT64 nanb = 0;
+
+  sign.w[1] = (in.w[HIGH_128W] & 0x8000000000000000ull);
+  sign.w[0] = 0;
+  comb = (in.w[HIGH_128W] & 0x7fffc00000000000ull) >> 46;
+  trailing.w[1] = (in.w[HIGH_128W] & 0x00003fffffffffffull);
+  trailing.w[0] = in.w[LOW_128W];
+  exp = 0;
+
+  if ((comb & 0x1f000) == 0x1e000) {	// G0..G4 = 1111 -> Inf
+    res.w[HIGH_128W] = in.w[HIGH_128W] & 0xf800000000000000ull;
+    res.w[LOW_128W] = 0ull;
+    BID_RETURN (res);
+  } else if ((comb & 0x1f000) == 0x1f000) {	// G0..G4 = 11111 -> NaN
+    nanb = in.w[HIGH_128W] & 0xfe00000000000000ull;
+    exp = 0;
+    d0 = 0;
+  } else {	// Normal number
+    if ((comb & 0x18000) == 0x18000) {	// G0..G1 = 11 -> d0 = 8 + G4
+      d0 = 8 + (comb & 0x01000 ? 1 : 0);
+      exp =
+	(comb & 0x04000 ? 1 : 0) * 0x2000 +
+	(comb & 0x02000 ? 1 : 0) * 0x1000;
+      // exp leading bits are G2..G3
+    } else {
+      d0 =
+	4 * (comb & 0x04000 ? 1 : 0) + 2 * (comb & 0x2000 ? 1 : 0) +
+	(comb & 0x1000 ? 1 : 0);
+      exp =
+	(comb & 0x10000 ? 1 : 0) * 0x2000 +
+	(comb & 0x08000 ? 1 : 0) * 0x1000;
+      // exp loading bits are G0..G1
+    }
+  }
+
+  d11 = d2b[(trailing.w[0]) & 0x3ff];
+  d10 = d2b[(trailing.w[0] >> 10) & 0x3ff];
+  d9 = d2b[(trailing.w[0] >> 20) & 0x3ff];
+  d8 = d2b[(trailing.w[0] >> 30) & 0x3ff];
+  d7 = d2b[(trailing.w[0] >> 40) & 0x3ff];
+  d6 = d2b[(trailing.w[0] >> 50) & 0x3ff];
+  d5 = d2b[(trailing.w[0] >> 60) | ((trailing.w[1] & 0x3f) << 4)];
+  d4 = d2b[(trailing.w[1] >> 6) & 0x3ff];
+  d3 = d2b[(trailing.w[1] >> 16) & 0x3ff];
+  d2 = d2b[(trailing.w[1] >> 26) & 0x3ff];
+  d1 = d2b[(trailing.w[1] >> 36) & 0x3ff];
+
+  tl =
+    d11 + (d10 * 1000ull) + (d9 * 1000000ull) + (d8 * 1000000000ull) +
+    (d7 * 1000000000000ull) + (d6 * 1000000000000000ull);
+  th =
+    d5 + (d4 * 1000ull) + (d3 * 1000000ull) + (d2 * 1000000000ull) +
+    (d1 * 1000000000000ull) + (d0 * 1000000000000000ull);
+  __mul_64x64_to_128 (bcoeff, th, 1000000000000000000ull);
+  __add_128_64 (bcoeff, bcoeff, tl);
+
+  if (!nanb)
+    exp += (comb & 0xfff);
+
+  res.w[0] = bcoeff.w[0];
+  res.w[1] = (exp << 49) | sign.w[1] | bcoeff.w[1];
+
+  res.w[1] |= nanb;
+
+  BID_SWAP128 (res);
+  BID_RETURN (res);
+}
+
+UINT128
+bid_to_bid128 (UINT128 bq) {
+  UINT128 res;
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  UINT64 bcoeff;
+
+  UINT128 rq;
+  UINT128 qcoeff;
+  UINT64 ba, bb;
+
+  ba = *((UINT64 *) & bq + HIGH_128W);
+  bb = *((UINT64 *) & bq + LOW_128W);
+
+  sign = (ba & 0x8000000000000000ull);
+  comb = (ba & 0x7fffc00000000000ull) >> 46;
+  trailing = (ba & 0x00003fffffffffffull);
+
+  if ((comb & 0x18000) == 0x18000) {	// G0..G1 = 11 -> exp is G2..G11
+    exp = (comb >> 1) & 0x3fff;
+    bcoeff = ((8 + (comb & 1)) << 46) | trailing;
+  } else {
+    exp = (comb >> 3) & 0x3fff;
+    bcoeff = ((comb & 7) << 46) | trailing;
+  }
+
+  if ((comb & 0x1f000) == 0x1f000) {	//NaN
+    ba &= 0xfe003fffffffffffULL;	// make exponent 0
+    bcoeff &= 0x00003fffffffffffull;	// NaN payloat is only T.  
+    if ((bcoeff > 0x0000314dc6448d93ULL) ||	// significand is non-canonical
+	((bcoeff == 0x0000314dc6448d93ULL)
+	 && (bb >= 0x38c15b0a00000000ULL))
+	// significand is non-canonical
+      ) {
+      bcoeff = 0ull;
+      ba &= ~0x00003fffffffffffull;
+      bb = 0ull;
+    }
+    *((UINT64 *) & rq + HIGH_128W) = ba;
+    *((UINT64 *) & rq + LOW_128W) = bb;
+    return rq;
+  } else if ((comb & 0x1e000) == 0x1e000) {	//Inf
+    ba &= 0xf800000000000000ULL;	// make exponent and significand 0
+    bb = 0;
+    *((UINT64 *) & rq + HIGH_128W) = ba;
+    *((UINT64 *) & rq + LOW_128W) = bb;
+    return rq;
+  }
+
+  if ((bcoeff > 0x0001ed09bead87c0ull)
+      || ((bcoeff == 0x0001ed09bead87c0ull)
+	  && (bb > 0x378d8e63ffffffffull))) {
+    // significand is non-canonical
+    bcoeff = 0ull;
+    bb = 0ull;
+  }
+
+  *((UINT64 *) & qcoeff + 1) = bcoeff;
+  *((UINT64 *) & qcoeff + 0) = bb;
+
+  get_BID128_fast (&res, sign, exp, qcoeff);
+
+  BID_SWAP128 (res);
+  return res;
+}
+
+UINT32
+bid32_canonize (UINT32 ba) {
+  FPSC bidrnd;
+  unsigned int rnd = 0;
+
+  UINT32 res;
+  UINT32 sign, comb, exp;
+  UINT32 trailing;
+  UINT32 bcoeff;
+
+  sign = (ba & 0x80000000);
+  comb = (ba & 0x7ff00000) >> 20;
+  trailing = (ba & 0x000fffff);
+
+  if ((comb & 0x600) == 0x600) {	// G0..G1 = 11 -> exp is G2..G11
+    exp = (comb >> 1) & 0xff;
+    bcoeff = ((8 + (comb & 1)) << 20) | trailing;
+  } else {
+    exp = (comb >> 3) & 0xff;
+    bcoeff = ((comb & 7) << 20) | trailing;
+  }
+
+  if ((comb & 0x7c0) == 0x7c0) {	//NaN
+    ba &= 0xfe0fffff;	// make exponent 0
+    bcoeff &= 0x000fffff;	// NaN payloat is only T.     
+    if (bcoeff >= 1000000)
+      ba &= 0xfff00000;	//treat non-canonical significand
+    return ba;
+  } else if ((comb & 0x780) == 0x780) {	//Inf
+    ba &= 0xf8000000;	// make exponent and significand 0
+    return ba;
+  }
+
+  if (bcoeff >= 10000000)
+    bcoeff = 0;
+  rnd = bidrnd = ROUNDING_TO_NEAREST;
+  res = get_BID32 (sign, exp, bcoeff, rnd, &bidrnd);
+  return res;
+}
+
+UINT64
+bid64_canonize (UINT64 ba) {
+  UINT64 res;
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  UINT64 bcoeff;
+
+  sign = (ba & 0x8000000000000000ull);
+  comb = (ba & 0x7ffc000000000000ull) >> 50;
+  trailing = (ba & 0x0003ffffffffffffull);
+
+
+  if ((comb & 0x1800) == 0x1800) {	// G0..G1 = 11 -> exp is G2..G11
+    exp = (comb >> 1) & 0x3ff;
+    bcoeff = ((8 + (comb & 1)) << 50) | trailing;
+  } else {
+    exp = (comb >> 3) & 0x3ff;
+    bcoeff = ((comb & 7) << 50) | trailing;
+  }
+
+  if ((comb & 0x1f00) == 0x1f00) {	//NaN
+    ba &= 0xfe03ffffffffffffULL;	// make exponent 0
+    bcoeff &= 0x0003ffffffffffffull;	// NaN payloat is only T.  
+    if (bcoeff >= 1000000000000000ull)
+      ba &= 0xfe00000000000000ull;	// treat non canonical significand and zero G6-G12
+    return ba;
+  } else if ((comb & 0x1e00) == 0x1e00) {	//Inf
+    ba &= 0xf800000000000000ULL;	// make exponent and significand 0
+    return ba;
+  }
+
+  if (bcoeff >= 10000000000000000ull) {
+    bcoeff = 0ull;
+  }
+  res = very_fast_get_BID64 (sign, exp, bcoeff);
+  return res;
+}
+
+UINT128
+bid128_canonize (UINT128 bq) {
+  UINT128 res;
+  UINT64 sign, comb, exp;
+  UINT64 trailing;
+  UINT64 bcoeff;
+
+  UINT128 rq;
+  UINT128 qcoeff;
+  UINT64 ba, bb;
+
+  ba = *((UINT64 *) & bq + HIGH_128W);
+  bb = *((UINT64 *) & bq + LOW_128W);
+
+  sign = (ba & 0x8000000000000000ull);
+  comb = (ba & 0x7fffc00000000000ull) >> 46;
+  trailing = (ba & 0x00003fffffffffffull);
+
+  if ((comb & 0x18000) == 0x18000) {	// G0..G1 = 11 -> exp is G2..G11
+    exp = (comb >> 1) & 0x3fff;
+    bcoeff = ((8 + (comb & 1)) << 46) | trailing;
+  } else {
+    exp = (comb >> 3) & 0x3fff;
+    bcoeff = ((comb & 7) << 46) | trailing;
+  }
+
+  if ((comb & 0x1f000) == 0x1f000) {	//NaN
+    ba &= 0xfe003fffffffffffULL;	// make exponent 0
+    bcoeff &= 0x00003fffffffffffull;	// NaN payload is only T.  
+
+    if ((bcoeff > 0x0000314dc6448d93ULL) ||	// significand is non-canonical
+	((bcoeff == 0x0000314dc6448d93ULL)
+	 && (bb >= 0x38c15b0a00000000ULL))
+	// significand is non-canonical
+      ) {
+      bcoeff = 0ull;
+      ba &= ~0x00003fffffffffffull;
+      bb = 0ull;
+    }
+    *((UINT64 *) & rq + HIGH_128W) = ba;
+    *((UINT64 *) & rq + LOW_128W) = bb;
+    return rq;
+  } else if ((comb & 0x1e000) == 0x1e000) {	//Inf
+    ba &= 0xf800000000000000ULL;	// make exponent and significand 0
+    bb = 0;
+    *((UINT64 *) & rq + HIGH_128W) = ba;
+    *((UINT64 *) & rq + LOW_128W) = bb;
+    return rq;
+  }
+
+  if ((bcoeff > 0x0001ed09bead87c0ull) ||	// significand is non-canonical
+      ((bcoeff == 0x0001ed09bead87c0ull)
+       && (bb > 0x378d8e63ffffffffull))
+      // significand is non-canonical
+    ) {
+    bcoeff = 0ull;
+    bb = 0ull;
+  }
+
+  *((UINT64 *) & qcoeff + 1) = bcoeff;
+  *((UINT64 *) & qcoeff + 0) = bb;
+
+  get_BID128_fast (&res, sign, exp, qcoeff);
+  BID_SWAP128 (res);
+  return res;
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid_flag_operations.c b/gcc-4.9/libgcc/config/libbid/bid_flag_operations.c
new file mode 100644
index 000000000..2078b063a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_flag_operations.c
@@ -0,0 +1,345 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *    Non-computational Operations on Flags:
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+// Note the following definitions from bid_conf.h: if the status flags are
+// global, they have a fixed name recognized by the library functions:
+// _IDEC_glbflags; pfpsf, defined as &_IDEC_glbflags, can be used instead; no
+// argument is passed for the status flags to the library functions; if the 
+// status flags are local then they are passed as an arument, always by
+// reference, to the library functions
+//
+// #if !DECIMAL_GLOBAL_EXCEPTION_FLAGS
+//   #define _EXC_FLAGS_PARAM , _IDEC_flags *pfpsf
+// #else
+//   extern _IDEC_flags _IDEC_glbflags;
+//   #define _EXC_FLAGS_PARAM
+//   #define pfpsf &_IDEC_glbflags
+// #endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+signalException (_IDEC_flags * pflagsmask _EXC_FLAGS_PARAM) {
+  // *pflagsmask is the logical OR of the flags to be set, e.g.
+  // *pflagsmask =INVALID_EXCEPTION | ZERO_DIVIDE_EXCEPTION | OVERFLOW_EXCEPTION
+  // UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION to set all five IEEE 754R
+  // exception flags
+  *pfpsf = *pfpsf | (*pflagsmask & BID_IEEE_FLAGS);
+}
+#else
+void
+signalException (_IDEC_flags flagsmask _EXC_FLAGS_PARAM) {
+  // flagsmask is the logical OR of the flags to be set, e.g.
+  // flagsmask = INVALID_EXCEPTION | ZERO_DIVIDE_EXCEPTION | OVERFLOW_EXCEPTION
+  // UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION to set all five IEEE 754R
+  // exception flags
+  *pfpsf = *pfpsf | (flagsmask & BID_IEEE_FLAGS);
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+lowerFlags (_IDEC_flags * pflagsmask _EXC_FLAGS_PARAM) {
+  // *pflagsmask is the logical OR of the flags to be cleared, e.g.
+  // *pflagsmask =INVALID_EXCEPTION | ZERO_DIVIDE_EXCEPTION | OVERFLOW_EXCEPTION
+  // UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION to clear all five IEEE 754R 
+  // exception flags
+  *pfpsf = *pfpsf & ~(*pflagsmask & BID_IEEE_FLAGS);
+}
+#else
+void
+lowerFlags (_IDEC_flags flagsmask _EXC_FLAGS_PARAM) {
+  // flagsmask is the logical OR of the flags to be cleared, e.g.
+  // flagsmask = INVALID_EXCEPTION | ZERO_DIVIDE_EXCEPTION | OVERFLOW_EXCEPTION 
+  // UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION to clear all five IEEE 754R    
+  // exception flags
+  *pfpsf = *pfpsf & ~(flagsmask & BID_IEEE_FLAGS);
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+testFlags (_IDEC_flags * praised,
+	   _IDEC_flags * pflagsmask _EXC_FLAGS_PARAM) {
+  // *praised is a pointer to the result, i.e. the logical OR of the flags 
+  // selected by *pflagsmask that are set; e.g. if
+  // *pflagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) then upon return 
+  // *praised = INVALID_EXCEPTION | INEXACT_EXCEPTION
+  *praised = *pfpsf & (*pflagsmask & BID_IEEE_FLAGS);
+}
+#else
+_IDEC_flags
+testFlags (_IDEC_flags flagsmask _EXC_FLAGS_PARAM) {
+  _IDEC_flags raised;
+  // the raturn value raised is the logical OR of the flags  
+  // selected by flagsmask, that are set; e.g. if
+  // flagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION and
+  // only the invalid and inexact flags are raised (set) then the return value
+  // is raised = INVALID_EXCEPTION | INEXACT_EXCEPTION
+  raised = *pfpsf & (flagsmask & BID_IEEE_FLAGS);
+  return (raised);
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+testSavedFlags (_IDEC_flags * praised, _IDEC_flags * psavedflags,
+		_IDEC_flags * pflagsmask) {
+  // *praised is a pointer to the result, i.e. the logical OR of the flags
+  // selected by *pflagsmask that are set in *psavedflags; e.g. if
+  // *pflagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) in *psavedflags
+  // then upon return *praised = INVALID_EXCEPTION | INEXACT_EXCEPTION
+  // Note that the flags could be saved in a global variable, but this function
+  // would still expect that value as an argument passed by reference
+  *praised = *psavedflags & (*pflagsmask & BID_IEEE_FLAGS);
+}
+#else
+_IDEC_flags
+testSavedFlags (_IDEC_flags savedflags, _IDEC_flags flagsmask) {
+  _IDEC_flags raised;
+  // the raturn value raised is the logical OR of the flags
+  // selected by flagsmask, that are set in savedflags; e.g. if
+  // flagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION and
+  // only the invalid and inexact flags are raised (set) in savedflags
+  // then the return value is raised = INVALID_EXCEPTION | INEXACT_EXCEPTION
+  // Note that the flags could be saved in a global variable, but this function
+  // would still expect that value as an argument passed by value
+  raised = savedflags & (flagsmask & BID_IEEE_FLAGS);
+  return (raised);
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+restoreFlags (_IDEC_flags * pflagsvalues,
+	      _IDEC_flags * pflagsmask _EXC_FLAGS_PARAM) {
+  // restore the status flags selected by *pflagsmask to the values speciafied
+  // (as a logical OR) in *pflagsvalues; e.g. if
+  // *pflagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) in *pflagsvalues
+  // then upon return the invalid status flag will be set, the underflow status
+  // flag will be clear, and the inexact status flag will be set
+  *pfpsf = *pfpsf & ~(*pflagsmask & BID_IEEE_FLAGS);
+  // clear flags that have to be restored
+  *pfpsf = *pfpsf | (*pflagsvalues & (*pflagsmask & BID_IEEE_FLAGS));
+  // restore flags
+}
+#else
+void
+restoreFlags (_IDEC_flags flagsvalues,
+	      _IDEC_flags flagsmask _EXC_FLAGS_PARAM) {
+  // restore the status flags selected by flagsmask to the values speciafied
+  // (as a logical OR) in flagsvalues; e.g. if 
+  // flagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) in flagsvalues 
+  // then upon return the invalid status flag will be set, the underflow status
+  // flag will be clear, and the inexact status flag will be set
+  *pfpsf = *pfpsf & ~(flagsmask & BID_IEEE_FLAGS);
+  // clear flags that have to be restored
+  *pfpsf = *pfpsf | (flagsvalues & (flagsmask & BID_IEEE_FLAGS));
+  // restore flags
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+saveFlags (_IDEC_flags * pflagsvalues,
+	   _IDEC_flags * pflagsmask _EXC_FLAGS_PARAM) {
+  // return in *pflagsvalues the status flags specified (as a logical OR) in
+  // *pflagsmask; e.g. if
+  // *pflagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) in the status word,
+  // then upon return the value in *pflagsvalues will have the invalid status 
+  // flag set, the underflow status flag clear, and the inexact status flag set
+  *pflagsvalues = *pfpsf & (*pflagsmask & BID_IEEE_FLAGS);
+}
+#else
+_IDEC_flags
+saveFlags (_IDEC_flags flagsmask _EXC_FLAGS_PARAM) {
+  _IDEC_flags flagsvalues;
+  // return the status flags specified (as a logical OR) in flagsmask; e.g. if 
+  // flagsmask = INVALID_EXCEPTION | UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION
+  // and only the invalid and inexact flags are raised (set) in the status word,
+  // then the return value will have the invalid status  flag set, the 
+  // underflow status flag clear, and the inexact status flag set 
+  flagsvalues = *pfpsf & (flagsmask & BID_IEEE_FLAGS);
+  return (flagsvalues);
+}
+#endif
+
+// Note the following definitions from bid_conf.h (rearranged): if the rounding
+// mode is global, it has a fixed name recognized by the library functions:
+// _IDEC_glbround; rnd_mode, defined as &_IDEC_glbround, can be used instead; no
+// argument is passed for the rounding mode to the library functions; if the
+// rounding mode is local then it is passed as an arument, by reference or by
+// value, to the library functions
+//
+// #if DECIMAL_CALL_BY_REFERENCE
+//   #if !DECIMAL_GLOBAL_ROUNDING
+//     #define _RND_MODE_PARAM , _IDEC_round *prnd_mode
+//   #else
+//     #define _RND_MODE_PARAM
+//     #define rnd_mode _IDEC_glbround
+//   #endif
+// #else
+//   #if !DECIMAL_GLOBAL_ROUNDING
+//     #define _RND_MODE_PARAM , _IDEC_round rnd_mode
+//   #else
+//     #define _RND_MODE_PARAM
+//     #define rnd_mode _IDEC_glbround
+//   #endif
+// #endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+    // #define _RND_MODE_PARAM , _IDEC_round *prnd_mode
+void
+getDecimalRoundingDirection (_IDEC_round * rounding_mode
+			     _RND_MODE_PARAM) {
+  // returns the current rounding mode
+  *rounding_mode = *prnd_mode;
+}
+#else
+    // #define _RND_MODE_PARAM
+    // #define rnd_mode _IDEC_glbround
+void
+getDecimalRoundingDirection (_IDEC_round * rounding_mode
+			     _RND_MODE_PARAM) {
+  // returns the current rounding mode
+  *rounding_mode = rnd_mode;
+}
+#endif
+#else
+#if !DECIMAL_GLOBAL_ROUNDING
+    // #define _RND_MODE_PARAM , _IDEC_round rnd_mode
+_IDEC_round
+getDecimalRoundingDirection (_IDEC_round rnd_mode) {
+  // returns the current rounding mode
+  return (rnd_mode);
+}
+#else
+    // #define _RND_MODE_PARAM
+    // #define rnd_mode _IDEC_glbround
+_IDEC_round
+getDecimalRoundingDirection (void) {
+  // returns the current rounding mode
+  return (rnd_mode);
+}
+#endif
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+#if !DECIMAL_GLOBAL_ROUNDING
+    // #define _RND_MODE_PARAM , _IDEC_round *prnd_mode
+void
+setDecimalRoundingDirection (_IDEC_round * rounding_mode
+			     _RND_MODE_PARAM) {
+  // sets the current rounding mode to the value in *rounding_mode, if valid
+  if (*rounding_mode == ROUNDING_TO_NEAREST ||
+      *rounding_mode == ROUNDING_DOWN ||
+      *rounding_mode == ROUNDING_UP ||
+      *rounding_mode == ROUNDING_TO_ZERO ||
+      *rounding_mode == ROUNDING_TIES_AWAY) {
+    *prnd_mode = *rounding_mode;
+  }
+}
+#else
+    // #define _RND_MODE_PARAM
+    // #define rnd_mode _IDEC_glbround
+void
+setDecimalRoundingDirection (_IDEC_round * rounding_mode
+			     ) {
+  // sets the global rounding mode to the value in *rounding_mode, if valid
+  if (*rounding_mode == ROUNDING_TO_NEAREST ||
+      *rounding_mode == ROUNDING_DOWN ||
+      *rounding_mode == ROUNDING_UP ||
+      *rounding_mode == ROUNDING_TO_ZERO ||
+      *rounding_mode == ROUNDING_TIES_AWAY) {
+    rnd_mode = *rounding_mode;
+  }
+}
+#endif
+#else
+#if !DECIMAL_GLOBAL_ROUNDING
+    // #define _RND_MODE_PARAM , _IDEC_round rnd_mode
+_IDEC_round
+setDecimalRoundingDirection (_IDEC_round rounding_mode _RND_MODE_PARAM) {
+  // sets the current rounding mode to the value in rounding_mode;
+  // however, when arguments are passed by value and the rounding mode
+  // is a local variable, this is not of any use
+  if (rounding_mode == ROUNDING_TO_NEAREST ||
+      rounding_mode == ROUNDING_DOWN ||
+      rounding_mode == ROUNDING_UP ||
+      rounding_mode == ROUNDING_TO_ZERO ||
+      rounding_mode == ROUNDING_TIES_AWAY) {
+    return (rounding_mode);
+  }
+  return (rnd_mode);
+}
+#else
+    // #define _RND_MODE_PARAM
+    // #define rnd_mode _IDEC_glbround
+void
+setDecimalRoundingDirection (_IDEC_round rounding_mode) {
+  // sets the current rounding mode to the value in rounding_mode, if valid;
+  if (rounding_mode == ROUNDING_TO_NEAREST ||
+      rounding_mode == ROUNDING_DOWN ||
+      rounding_mode == ROUNDING_UP ||
+      rounding_mode == ROUNDING_TO_ZERO ||
+      rounding_mode == ROUNDING_TIES_AWAY) {
+    rnd_mode = rounding_mode;
+  }
+}
+#endif
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+is754 (int *retval) {
+  *retval = 0;
+}
+#else
+int
+is754 (void) {
+  return 0;
+}
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+is754R (int *retval) {
+  *retval = 1;
+}
+#else
+int
+is754R (void) {
+  return 1;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_from_int.c b/gcc-4.9/libgcc/config/libbid/bid_from_int.c
new file mode 100644
index 000000000..0c4a311ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_from_int.c
@@ -0,0 +1,349 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "bid_internal.h"
+
+/*****************************************************************************
+ *  BID64_round_integral_exact
+ ****************************************************************************/
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_from_int32 (UINT64 * pres,
+		  int *px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  int x = *px;
+#else
+UINT64
+bid64_from_int32 (int x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  // if integer is negative, put the absolute value
+  // in the lowest 32bits of the result
+  if ((x & SIGNMASK32) == SIGNMASK32) {
+    // negative int32
+    x = ~x + 1;	// 2's complement of x
+    res = (unsigned int) x | 0xb1c0000000000000ull;
+    // (exp << 53)) = biased exp. is 0
+  } else {	// positive int32
+    res = x | 0x31c0000000000000ull;	// (exp << 53)) = biased exp. is 0
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_from_uint32 (UINT64 * pres, unsigned int *px
+		   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  unsigned int x = *px;
+#else
+UINT64
+bid64_from_uint32 (unsigned int x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT64 res;
+
+  res = x | 0x31c0000000000000ull;	// (exp << 53)) = biased exp. is 0
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_from_int64 (UINT64 * pres, SINT64 * px
+		  _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		  _EXC_INFO_PARAM) {
+  SINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64_from_int64 (SINT64 x
+		  _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		  _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res;
+  UINT64 x_sign, C;
+  unsigned int q, ind;
+  int incr_exp = 0;
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0;
+  int is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+
+  x_sign = x & 0x8000000000000000ull;
+  // if the integer is negative, use the absolute value
+  if (x_sign)
+    C = ~((UINT64) x) + 1;
+  else
+    C = x;
+  if (C <= BID64_SIG_MAX) {	// |C| <= 10^16-1 and the result is exact
+    if (C < 0x0020000000000000ull) {	// C < 2^53
+      res = x_sign | 0x31c0000000000000ull | C;
+    } else {	// C >= 2^53
+      res =
+	x_sign | 0x6c70000000000000ull | (C & 0x0007ffffffffffffull);
+    }
+  } else {	// |C| >= 10^16 and the result may be inexact 
+    // the smallest |C| is 10^16 which has 17 decimal digits
+    // the largest |C| is 0x8000000000000000 = 9223372036854775808 w/ 19 digits
+    if (C < 0x16345785d8a0000ull) {	// x < 10^17 
+      q = 17;
+      ind = 1;	// number of digits to remove for q = 17
+    } else if (C < 0xde0b6b3a7640000ull) {	// C < 10^18
+      q = 18;
+      ind = 2;	// number of digits to remove for q = 18 
+    } else {	// C < 10^19
+      q = 19;
+      ind = 3;	// number of digits to remove for q = 19
+    }
+    // overflow and underflow are not possible
+    // Note: performace can be improved by inlining this call
+    round64_2_18 (	// will work for 19 digits too if C fits in 64 bits
+		   q, ind, C, &res, &incr_exp,
+		   &is_midpoint_lt_even, &is_midpoint_gt_even,
+		   &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+    if (incr_exp)
+      ind++;
+    // set the inexact flag
+    if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+	is_midpoint_lt_even || is_midpoint_gt_even)
+      *pfpsf |= INEXACT_EXCEPTION;
+    // general correction from RN to RA, RM, RP, RZ; result uses ind for exp
+    if (rnd_mode != ROUNDING_TO_NEAREST) {
+      if ((!x_sign
+	   && ((rnd_mode == ROUNDING_UP && is_inexact_lt_midpoint)
+	       ||
+	       ((rnd_mode == ROUNDING_TIES_AWAY
+		 || rnd_mode == ROUNDING_UP) && is_midpoint_gt_even)))
+	  || (x_sign
+	      && ((rnd_mode == ROUNDING_DOWN && is_inexact_lt_midpoint)
+		  ||
+		  ((rnd_mode == ROUNDING_TIES_AWAY
+		    || rnd_mode == ROUNDING_DOWN)
+		   && is_midpoint_gt_even)))) {
+	res = res + 1;
+	if (res == 0x002386f26fc10000ull) {	// res = 10^16 => rounding overflow
+	  res = 0x00038d7ea4c68000ull;	// 10^15
+	  ind = ind + 1;
+	}
+      } else if ((is_midpoint_lt_even || is_inexact_gt_midpoint) &&
+		 ((x_sign && (rnd_mode == ROUNDING_UP ||
+			      rnd_mode == ROUNDING_TO_ZERO)) ||
+		  (!x_sign && (rnd_mode == ROUNDING_DOWN ||
+			       rnd_mode == ROUNDING_TO_ZERO)))) {
+	res = res - 1;
+	// check if we crossed into the lower decade
+	if (res == 0x00038d7ea4c67fffull) {	// 10^15 - 1
+	  res = 0x002386f26fc0ffffull;	// 10^16 - 1
+	  ind = ind - 1;
+	}
+      } else {
+	;	// exact, the result is already correct
+      }
+    }
+    if (res < 0x0020000000000000ull) {	// res < 2^53
+      res = x_sign | (((UINT64) ind + 398) << 53) | res;
+    } else {	// res >= 2^53 
+      res =
+	x_sign | 0x6000000000000000ull | (((UINT64) ind + 398) << 51) |
+	(res & 0x0007ffffffffffffull);
+    }
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid64_from_uint64 (UINT64 * pres, UINT64 * px
+		   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		   _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#if !DECIMAL_GLOBAL_ROUNDING
+  unsigned int rnd_mode = *prnd_mode;
+#endif
+#else
+UINT64
+bid64_from_uint64 (UINT64 x
+		   _RND_MODE_PARAM _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+		   _EXC_INFO_PARAM) {
+#endif
+
+  UINT64 res;
+  UINT128 x128, res128;
+  unsigned int q, ind;
+  int incr_exp = 0;
+  int is_midpoint_lt_even = 0, is_midpoint_gt_even = 0;
+  int is_inexact_lt_midpoint = 0, is_inexact_gt_midpoint = 0;
+
+  if (x <= BID64_SIG_MAX) {	// x <= 10^16-1 and the result is exact
+    if (x < 0x0020000000000000ull) {	// x < 2^53
+      res = 0x31c0000000000000ull | x;
+    } else {	// x >= 2^53
+      res = 0x6c70000000000000ull | (x & 0x0007ffffffffffffull);
+    }
+  } else {	// x >= 10^16 and the result may be inexact 
+    // the smallest x is 10^16 which has 17 decimal digits
+    // the largest x is 0xffffffffffffffff = 18446744073709551615 w/ 20 digits
+    if (x < 0x16345785d8a0000ull) {	// x < 10^17 
+      q = 17;
+      ind = 1;	// number of digits to remove for q = 17
+    } else if (x < 0xde0b6b3a7640000ull) {	// x < 10^18
+      q = 18;
+      ind = 2;	// number of digits to remove for q = 18 
+    } else if (x < 0x8ac7230489e80000ull) {	// x < 10^19
+      q = 19;
+      ind = 3;	// number of digits to remove for q = 19
+    } else {	// x < 10^20
+      q = 20;
+      ind = 4;	// number of digits to remove for q = 20
+    }
+    // overflow and underflow are not possible
+    // Note: performace can be improved by inlining this call
+    if (q <= 19) {
+      round64_2_18 (	// will work for 20 digits too if x fits in 64 bits
+		     q, ind, x, &res, &incr_exp,
+		     &is_midpoint_lt_even, &is_midpoint_gt_even,
+		     &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+    } else {	// q = 20
+      x128.w[1] = 0x0;
+      x128.w[0] = x;
+      round128_19_38 (q, ind, x128, &res128, &incr_exp,
+		      &is_midpoint_lt_even, &is_midpoint_gt_even,
+		      &is_inexact_lt_midpoint, &is_inexact_gt_midpoint);
+      res = res128.w[0];	// res.w[1] is 0
+    }
+    if (incr_exp)
+      ind++;
+    // set the inexact flag
+    if (is_inexact_lt_midpoint || is_inexact_gt_midpoint ||
+	is_midpoint_lt_even || is_midpoint_gt_even)
+      *pfpsf |= INEXACT_EXCEPTION;
+    // general correction from RN to RA, RM, RP, RZ; result uses ind for exp
+    if (rnd_mode != ROUNDING_TO_NEAREST) {
+      if ((rnd_mode == ROUNDING_UP && is_inexact_lt_midpoint) ||
+	  ((rnd_mode == ROUNDING_TIES_AWAY || rnd_mode == ROUNDING_UP)
+	   && is_midpoint_gt_even)) {
+	res = res + 1;
+	if (res == 0x002386f26fc10000ull) {	// res = 10^16 => rounding overflow
+	  res = 0x00038d7ea4c68000ull;	// 10^15
+	  ind = ind + 1;
+	}
+      } else if ((is_midpoint_lt_even || is_inexact_gt_midpoint) &&
+		 (rnd_mode == ROUNDING_DOWN ||
+		  rnd_mode == ROUNDING_TO_ZERO)) {
+	res = res - 1;
+	// check if we crossed into the lower decade
+	if (res == 0x00038d7ea4c67fffull) {	// 10^15 - 1
+	  res = 0x002386f26fc0ffffull;	// 10^16 - 1
+	  ind = ind - 1;
+	}
+      } else {
+	;	// exact, the result is already correct
+      }
+    }
+    if (res < 0x0020000000000000ull) {	// res < 2^53
+      res = (((UINT64) ind + 398) << 53) | res;
+    } else {	// res >= 2^53 
+      res = 0x6000000000000000ull | (((UINT64) ind + 398) << 51) |
+	(res & 0x0007ffffffffffffull);
+    }
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_from_int32 (UINT128 * pres,
+		   int *px _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  int x = *px;
+#else
+UINT128
+bid128_from_int32 (int x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  // if integer is negative, use the absolute value
+  if ((x & SIGNMASK32) == SIGNMASK32) {
+    res.w[HIGH_128W] = 0xb040000000000000ull;
+    res.w[LOW_128W] = ~((unsigned int) x) + 1;	// 2's complement of x
+  } else {
+    res.w[HIGH_128W] = 0x3040000000000000ull;
+    res.w[LOW_128W] = (unsigned int) x;
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_from_uint32 (UINT128 * pres, unsigned int *px
+		    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  unsigned int x = *px;
+#else
+UINT128
+bid128_from_uint32 (unsigned int x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+  UINT128 res;
+
+  res.w[HIGH_128W] = 0x3040000000000000ull;
+  res.w[LOW_128W] = x;
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_from_int64 (UINT128 * pres, SINT64 * px
+		   _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  SINT64 x = *px;
+#else
+UINT128
+bid128_from_int64 (SINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res;
+
+  // if integer is negative, use the absolute value
+  if ((x & SIGNMASK64) == SIGNMASK64) {
+    res.w[HIGH_128W] = 0xb040000000000000ull;
+    res.w[LOW_128W] = ~x + 1;	// 2's complement of x
+  } else {
+    res.w[HIGH_128W] = 0x3040000000000000ull;
+    res.w[LOW_128W] = x;
+  }
+  BID_RETURN (res);
+}
+
+#if DECIMAL_CALL_BY_REFERENCE
+void
+bid128_from_uint64 (UINT128 * pres, UINT64 * px
+		    _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+  UINT64 x = *px;
+#else
+UINT128
+bid128_from_uint64 (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM) {
+#endif
+
+  UINT128 res;
+
+  res.w[HIGH_128W] = 0x3040000000000000ull;
+  res.w[LOW_128W] = x;
+  BID_RETURN (res);
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid_functions.h b/gcc-4.9/libgcc/config/libbid/bid_functions.h
new file mode 100644
index 000000000..e8afac562
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_functions.h
@@ -0,0 +1,3279 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _BID_FUNCTIONS_H
+#define _BID_FUNCTIONS_H
+
+#ifdef IN_LIBGCC2
+// When we are built as the part of the gcc runtime library, libgcc,
+// we will use gcc types defined in bid_gcc_intrinsics.h.
+#include "bid_gcc_intrinsics.h"
+
+#define ALIGN(n) __attribute__ ((aligned(n)))
+#else
+typedef char SINT8;
+typedef unsigned char UINT8;
+typedef unsigned UINT32;
+typedef signed SINT32;
+
+#ifdef __GNUC__
+#define __int64 long long
+#endif
+
+#if __GNUC__ || defined LINUX || defined SUNOS
+typedef unsigned long long UINT64;
+typedef signed long long SINT64;
+#else
+typedef unsigned __int64 UINT64;
+typedef signed __int64 SINT64;
+#endif
+
+#if defined _MSC_VER
+#if defined _M_IX86 && !defined __INTEL_COMPILER	// Win IA-32, MS compiler
+#define ALIGN(n)
+#else
+#define ALIGN(n) __declspec(align(n))
+#endif
+#else
+#define ALIGN(n) __attribute__ ((aligned(n)))
+#endif
+
+// bid_gcc_intrinsics.h will also define this.
+typedef
+ALIGN (16)
+     struct {
+       UINT64 w[2];
+     } UINT128;
+#endif
+
+
+#if !defined _MSC_VER || defined __INTEL_COMPILER
+#define __ENABLE_BINARY80__  1
+#endif
+
+#ifndef HPUX_OS
+#define BINARY80 long double
+#define BINARY128 UINT128
+#define SQRT80 sqrtl
+#else
+#define BINARY80 __float80
+#define BINARY128 __float128
+#define SQRT80 sqrtw
+#endif
+
+     typedef ALIGN (16)
+     struct {
+       UINT64 w[3];
+     } UINT192;
+     typedef ALIGN (16)
+     struct {
+       UINT64 w[4];
+     } UINT256;
+     typedef unsigned int FPSC;	// floating-point status and control
+
+// TYPE parameters
+#define BID128_MAXDIGITS	34
+#define BID64_MAXDIGITS		16
+#define BID32_MAXDIGITS		7
+
+// rounding modes
+#define ROUNDING_TO_NEAREST	0x00000
+#define ROUNDING_DOWN		0x00001
+#define ROUNDING_UP		0x00002
+#define ROUNDING_TO_ZERO	0x00003
+#define ROUNDING_TIES_AWAY      0x00004
+
+#define RMODE_MASK (ROUNDING_TO_NEAREST | ROUNDING_DOWN | ROUNDING_UP | ROUNDING_TO_ZERO | ROUNDING_TIES_AWAY)
+
+// status
+#define FLAG_MASK	        0x0000003f
+#define BID_IEEE_FLAGS		0x0000003d
+#define EXACT_STATUS            0x00000000
+#define INEXACT_EXCEPTION	0x00000020
+#define UNDERFLOW_EXCEPTION	0x00000010
+#define OVERFLOW_EXCEPTION	0x00000008
+#define ZERO_DIVIDE_EXCEPTION	0x00000004
+#define DENORMAL_EXCEPTION	0x00000002
+#define INVALID_EXCEPTION	0x00000001
+
+#define MODE_MASK               0x00001f80
+#define INEXACT_MODE            0x00001000
+#define UNDERFLOW_MODE          0x00000800
+#define OVERFLOW_MODE           0x00000400
+#define ZERO_DIVIDE_MODE        0x00000200
+#define DENORMAL_MODE           0x00000100
+#define INVALID_MODE            0x00000080
+
+#if defined LINUX || defined __GLIBC__ || defined SUNOS
+#define LX16  "%016llx"
+#define LX    "%llx"
+#define LD4   "%4llu"
+#define LD16  "%016lld"
+#define LD    "%lld"
+#define LUD   "%llu"
+#define LUD16 "%016llu"
+#define X8    "%08x"
+#define X4    "%04x"
+
+#define FMT_LLX16  "%016llx"
+#define FMT_LLX    "%llx"
+#define FMT_LLU4   "%4llu"
+#define FMT_LLD16  "%016lld"
+#define FMT_LLD    "%lld"
+#define FMT_LLU    "%llu"
+#define FMT_LLU16  "%016llu"
+#define FMT_X8     "%08x"
+#define FMT_X4     "%04x"
+#else
+#define LX16  "%016I64x"
+#define LX    "%I64x"
+#define LD16  "%016I64d"
+#define LD4   "%4I64u"
+#define LD    "%I64d"
+#define LUD    "%I64u"
+#define LUD16 "%016I64u"
+#define X8    "%08x"
+#define X4    "%04x"
+
+#define FMT_LLX16 "%016I64x"
+#define FMT_LLX   "%I64x"
+#define FMT_LLD16 "%016I64d"
+#define FMT_LLU4  "%4I64u"
+#define FMT_LLD   "%I64d"
+#define FMT_LLU   "%I64u"
+#define FMT_LLU16 "%016I64u"
+#define FMT_X8    "%08x"
+#define FMT_X4    "%04x"
+#endif
+
+#define decNumberIsSNaN(dn)      (((dn)->bits&(DECSNAN))!=0)
+     int __signbitf (float);
+     int __signbit (double);
+
+#define __IMFC99MACRO_( __x__, __func__ ) \
+        (( sizeof( __x__ ) > sizeof( float )) \
+         ? __func__( (double)(__x__) ) \
+                : __func__##f( (float)(__x__) ))
+
+#define signbit( __x__ )    __IMFC99MACRO_( __x__, __signbit )
+
+#if !defined(__INTEL_COMPILER)
+
+#define __fence
+
+#define isinf( __x__ )      __IMFC99MACRO_( __x__, __isinf )
+#define isnan( __x__ )      __IMFC99MACRO_( __x__, __isnan )
+
+     int __isnanf (float);
+     int __isnan (double);
+
+     int __isinff (float);
+     int __isinf (double);
+
+#endif
+
+/* rounding modes */
+// typedef unsigned int _IDEC_round;
+     extern _IDEC_round _IDEC_gblround;	// initialized to ROUNDING_TO_NEAREST
+
+/* exception flags */
+// typedef unsigned int _IDEC_flags;  // could be a struct with diagnostic info
+     extern _IDEC_flags _IDEC_gblflags;	// initialized to EXACT_STATUS
+
+/* exception masks */
+     typedef unsigned int _IDEC_exceptionmasks;
+     extern _IDEC_exceptionmasks _IDEC_gblexceptionmasks;	// initialized to MODE_MASK
+
+#if DECIMAL_ALTERNATE_EXCEPTION_HANDLING
+
+/* exception information */
+
+     typedef struct {
+       unsigned int inexact_result:1;
+       unsigned int underflow:1;
+       unsigned int overflow:1;
+       unsigned int zero_divide:1;
+       unsigned int invalid_operation:1;
+     } fpieee_exception_flags_t;
+
+     typedef enum {
+       _fp_round_nearest,
+       _fp_round_minus_infinity,
+       _fp_round_plus_infinity,
+       _fp_round_chopped,
+       _fp_round_away
+     } fpieee_rounding_mode_t;
+
+     typedef enum {
+       _fp_precision24,
+       _fp_precision63,
+       _fp_precision64,
+       _fp_precision7,
+       _fp_precision16,
+       _fp_precision34
+     } _fpieee_precision_t;
+
+     typedef enum {
+       _fp_code_unspecified,
+       _fp_code_add,
+       _fp_code_subtract,
+       _fp_code_multiply,
+       _fp_code_divide,
+       _fp_code_square_root,
+       _fp_code_compare,
+       _fp_code_convert,
+       _fp_code_convert_to_integer_neareven,
+       _fp_code_convert_to_integer_down,
+       _fp_code_convert_to_integer_up,
+       _fp_code_convert_to_integer_truncate,
+       _fp_code_convert_to_integer_nearaway,
+       _fp_code_fma,
+       _fp_code_fmin,
+       _fp_code_fmax,
+       _fp_code_famin,
+       _fp_code_famax,
+       _fp_code_round_to_integral,
+       _fp_code_minnum,
+       _fp_code_maxnum,
+       _fp_code_minnummag,
+       _fp_code_maxnummag,
+       _fp_code_quantize,
+       _fp_code_logb,
+       _fp_code_scaleb,
+       _fp_code_remainder,
+       _fp_code_nextup,
+       _fp_code_nextdown,
+       _fp_code_nextafter,
+     } fp_operation_code_t;
+
+     typedef enum {
+       _fp_compare_equal,
+       _fp_compare_greater,
+       _fp_compare_less,
+       _fp_compare_unordered
+     } fpieee_compare_result_t;
+
+     typedef enum {
+       _fp_format_fp32,
+       _fp_format_fp64,
+       _fp_format_fp80,
+       _fp_format_fp128,
+       _fp_format_dec_fp32,
+       _fp_format_dec_fp64,
+       _fp_format_dec_fp128,
+       _fp_format_i8,		/* 8-bit integer */
+       _fp_format_i16,		/* 16-bit integer */
+       _fp_format_i32,		/* 32-bit integer */
+       _fp_format_i64,		/* 64-bit integer */
+       _fp_format_u8,		/* 8-bit unsigned integer */
+       _fp_format_u16,		/* 16-bit unsigned integer */
+       _fp_format_u32,		/* 32-bit unsigned integer */
+       _fp_format_u64,		/* 64-bit unsigned integer */
+       _fp_format_compare,	/* compare value format */
+       _fp_format_decimal_char,	/* decimal character */
+       _fp_format_string	/* string */
+     } fpieee_format_t;
+
+     typedef struct {
+       unsigned short W[5];
+     } _float80_t;
+
+     typedef struct {
+       unsigned int W[4];
+     } _float128_t;
+
+     typedef struct {
+       union {
+	 float fp32_value;
+	 double fp64_value;
+	 _float80_t fp80_value;
+	 _float128_t fp128_value;
+	 UINT32 decfp32_value;
+	 UINT64 decfp64_value;
+	 UINT128 decfp128_value;
+	 char i8_value;
+	 short i16_value;
+	 int i32_value;
+	 SINT64 i64_value;
+	 unsigned char u8_value;
+	 unsigned short u16_value;
+	 unsigned int u32_value;
+	 unsigned long u64_value;
+	 fpieee_compare_result_t compare_value;
+	 unsigned char s[256];
+       } value;
+       unsigned int operand_valid:1;
+       fpieee_format_t format:5;
+     } fpieee_value_t;
+
+     typedef struct {
+       unsigned int rounding_mode:3;
+       unsigned int precision:3;
+       unsigned int operation:26;
+       fpieee_exception_flags_t cause;
+       fpieee_exception_flags_t enable;
+       fpieee_exception_flags_t status;
+       fpieee_value_t operand1;
+       fpieee_value_t operand2;
+       fpieee_value_t operand3;
+       fpieee_value_t result;
+     } _IDEC_excepthandling;
+     extern _IDEC_excepthandling _IDEC_glbexcepthandling;
+
+#endif
+
+#if DECIMAL_CALL_BY_REFERENCE
+
+     extern void bid_to_dpd32 (UINT32 * pres, UINT32 * px);
+     extern void bid_to_dpd64 (UINT64 * pres, UINT64 * px);
+     extern void bid_to_dpd128 (UINT128 * pres, UINT128 * px);
+     extern void dpd_to_bid32 (UINT32 * pres, UINT32 * px);
+     extern void dpd_to_bid64 (UINT64 * pres, UINT64 * px);
+     extern void dpd_to_bid128 (UINT128 * pres, UINT128 * px);
+
+     extern void bid128dd_add (UINT128 * pres, UINT64 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dq_add (UINT128 * pres, UINT64 * px,
+			       UINT128 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qd_add (UINT128 * pres, UINT128 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_add (UINT128 * pres, UINT128 * px,
+			     UINT128 *
+			     py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dd_sub (UINT128 * pres, UINT64 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dq_sub (UINT128 * pres, UINT64 * px,
+			       UINT128 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qd_sub (UINT128 * pres, UINT128 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_sub (UINT128 * pres, UINT128 * px,
+			     UINT128 *
+			     py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dd_mul (UINT128 * pres, UINT64 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dq_mul (UINT128 * pres, UINT64 * px,
+			       UINT128 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qd_mul (UINT128 * pres, UINT128 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_mul (UINT128 * pres, UINT128 * px,
+			     UINT128 * py
+			     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_div (UINT128 * pres, UINT128 * px,
+			     UINT128 *
+			     py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dd_div (UINT128 * pres, UINT64 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dq_div (UINT128 * pres, UINT64 * px,
+			       UINT128 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qd_div (UINT128 * pres, UINT128 * px,
+			       UINT64 * py
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_fma (UINT128 * pres, UINT128 * px,
+			     UINT128 * py, UINT128 * pz
+			     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128ddd_fma (UINT128 * pres, UINT64 * px,
+				UINT64 * py, UINT64 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128ddq_fma (UINT128 * pres, UINT64 * px,
+				UINT64 * py, UINT128 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dqd_fma (UINT128 * pres, UINT64 * px,
+				UINT128 * py, UINT64 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128dqq_fma (UINT128 * pres, UINT64 * px,
+				UINT128 * py, UINT128 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qdd_fma (UINT128 * pres, UINT128 * px,
+				UINT64 * py, UINT64 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qdq_fma (UINT128 * pres, UINT128 * px,
+				UINT64 * py, UINT128 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128qqd_fma (UINT128 * pres, UINT128 * px,
+				UINT128 * py, UINT64 * pz
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     // Note: bid128qqq_fma is represented by bid128_fma
+     // Note: bid64ddd_fma is represented by bid64_fma
+     extern void bid64ddq_fma (UINT64 * pres, UINT64 * px,
+			       UINT64 * py, UINT128 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dqd_fma (UINT64 * pres, UINT64 * px,
+			       UINT128 * py, UINT64 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dqq_fma (UINT64 * pres, UINT64 * px,
+			       UINT128 * py, UINT128 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qdd_fma (UINT64 * pres, UINT128 * px,
+			       UINT64 * py, UINT64 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qdq_fma (UINT64 * pres, UINT128 * px,
+			       UINT64 * py, UINT128 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qqd_fma (UINT64 * pres, UINT128 * px,
+			       UINT128 * py, UINT64 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qqq_fma (UINT64 * pres, UINT128 * px,
+			       UINT128 * py, UINT128 * pz
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_sqrt (UINT128 * pres,
+			      UINT128 *
+			      px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128d_sqrt (UINT128 * pres, UINT64 * px
+			       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_add (UINT64 * pres, UINT64 * px,
+			    UINT64 *
+			    py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dq_add (UINT64 * pres, UINT64 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qd_add (UINT64 * pres, UINT128 * px,
+			      UINT64 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qq_add (UINT64 * pres, UINT128 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_sub (UINT64 * pres, UINT64 * px,
+			    UINT64 *
+			    py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dq_sub (UINT64 * pres, UINT64 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qd_sub (UINT64 * pres, UINT128 * px,
+			      UINT64 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qq_sub (UINT64 * pres, UINT128 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_mul (UINT64 * pres, UINT64 * px,
+			    UINT64 * py
+			    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dq_mul (UINT64 * pres, UINT64 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qd_mul (UINT64 * pres, UINT128 * px,
+			      UINT64 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qq_mul (UINT64 * pres, UINT128 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_div (UINT64 * pres, UINT64 * px,
+			    UINT64 *
+			    py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64dq_div (UINT64 * pres, UINT64 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qd_div (UINT64 * pres, UINT128 * px,
+			      UINT64 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64qq_div (UINT64 * pres, UINT128 * px,
+			      UINT128 * py
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_fma (UINT64 * pres, UINT64 * px,
+			    UINT64 * py,
+			    UINT64 *
+			    pz _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_sqrt (UINT64 * pres,
+			     UINT64 *
+			     px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64q_sqrt (UINT64 * pres, UINT128 * px
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_to_int8_rnint (char *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int8_xrnint (char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int8_rninta (char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int8_xrninta (char *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int8_int (char *pres,
+				     UINT128 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int8_xint (char *pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int8_floor (char *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int8_xfloor (char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int8_ceil (char *pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int8_xceil (char *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int16_rnint (short *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int16_xrnint (short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int16_rninta (short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int16_xrninta (short *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_int16_int (short *pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int16_xint (short *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int16_floor (short *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int16_xfloor (short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int16_ceil (short *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int16_xceil (short *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint8_rnint (unsigned char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint8_xrnint (unsigned char *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_rninta (unsigned char *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_xrninta (unsigned char *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_int (unsigned char *pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_xint (unsigned char *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_floor (unsigned char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint8_xfloor (unsigned char *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_ceil (unsigned char *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_uint8_xceil (unsigned char *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint16_rnint (unsigned short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_xrnint (unsigned short *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_rninta (unsigned short *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_xrninta (unsigned short *pres,
+					   UINT128 *
+					   px _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_int (unsigned short *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_xint (unsigned short *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint16_floor (unsigned short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_xfloor (unsigned short *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint16_ceil (unsigned short *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint16_xceil (unsigned short *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int32_rnint (int *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int32_xrnint (int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int32_rninta (int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int32_xrninta (int *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_int32_int (int *pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int32_xint (int *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int32_floor (int *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int32_xfloor (int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int32_ceil (int *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int32_xceil (int *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint32_rnint (unsigned int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_xrnint (unsigned int *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_rninta (unsigned int *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_xrninta (unsigned int *pres,
+					   UINT128 *
+					   px _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_int (unsigned int *pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_xint (unsigned int *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint32_floor (unsigned int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_xfloor (unsigned int *pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint32_ceil (unsigned int *pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint32_xceil (unsigned int *pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int64_rnint (SINT64 * pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int64_xrnint (SINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int64_rninta (SINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int64_xrninta (SINT64 * pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_int64_int (SINT64 * pres,
+				      UINT128 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_int64_xint (SINT64 * pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int64_floor (SINT64 * pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_int64_xfloor (SINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_int64_ceil (SINT64 * pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_int64_xceil (SINT64 * pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint64_rnint (UINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_xrnint (UINT64 * pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_rninta (UINT64 * pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_xrninta (UINT64 * pres,
+					   UINT128 *
+					   px _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_int (UINT64 * pres,
+				       UINT128 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_xint (UINT64 * pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint64_floor (UINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_xfloor (UINT64 * pres,
+					  UINT128 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_to_uint64_ceil (UINT64 * pres,
+					UINT128 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_to_uint64_xceil (UINT64 * pres,
+					 UINT128 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_int32_rnint (int *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int32_xrnint (int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int32_rninta (int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int32_xrninta (int *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_int32_int (int *pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int32_xint (int *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int32_floor (int *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int32_xfloor (int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int32_ceil (int *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int32_xceil (int *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int8_rnint (char *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int8_xrnint (char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int8_rninta (char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int8_xrninta (char *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int8_int (char *pres,
+				    UINT64 *
+				    px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid64_to_int8_xint (char *pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int8_floor (char *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int8_xfloor (char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int8_ceil (char *pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int8_xceil (char *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int16_rnint (short *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int16_xrnint (short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int16_rninta (short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int16_xrninta (short *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_int16_int (short *pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int16_xint (short *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int16_floor (short *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int16_xfloor (short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int16_ceil (short *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int16_xceil (short *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_rnint (unsigned char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_xrnint (unsigned char *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint8_rninta (unsigned char *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint8_xrninta (unsigned char *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_int (unsigned char *pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_xint (unsigned char *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_floor (unsigned char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_xfloor (unsigned char *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint8_ceil (unsigned char *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint8_xceil (unsigned char *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_rnint (unsigned short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint16_xrnint (unsigned short *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_rninta (unsigned short *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_xrninta (unsigned short *pres,
+					  UINT64 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_int (unsigned short *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_xint (unsigned short *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_floor (unsigned short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint16_xfloor (unsigned short *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_ceil (unsigned short *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint16_xceil (unsigned short *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint32_rnint (unsigned int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint32_xrnint (unsigned int *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_rninta (unsigned int *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_xrninta (unsigned int *pres,
+					  UINT64 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_int (unsigned int *pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_xint (unsigned int *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_floor (unsigned int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint32_xfloor (unsigned int *pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_ceil (unsigned int *pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint32_xceil (unsigned int *pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int64_rnint (SINT64 * pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int64_xrnint (SINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int64_rninta (SINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int64_xrninta (SINT64 * pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_int64_int (SINT64 * pres,
+				     UINT64 *
+				     px _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int64_xint (SINT64 * pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int64_floor (SINT64 * pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_int64_xfloor (SINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_int64_ceil (SINT64 * pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_int64_xceil (SINT64 * pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_rnint (UINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint64_xrnint (UINT64 * pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_rninta (UINT64 * pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_xrninta (UINT64 * pres,
+					  UINT64 *
+					  px _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_int (UINT64 * pres,
+				      UINT64 *
+				      px _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_xint (UINT64 * pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_floor (UINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_to_uint64_xfloor (UINT64 * pres,
+					 UINT64 *
+					 px _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_ceil (UINT64 * pres,
+				       UINT64 *
+				       px _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_to_uint64_xceil (UINT64 * pres,
+					UINT64 *
+					px _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern void bid64_quiet_equal (int *pres, UINT64 * px, UINT64 * py
+				    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid64_quiet_greater (int *pres, UINT64 * px,
+				      UINT64 *
+				      py _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_quiet_greater_equal (int *pres, UINT64 * px,
+					    UINT64 *
+					    py _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern void bid64_quiet_greater_unordered (int *pres, UINT64 * px,
+						UINT64 *
+						py _EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern void bid64_quiet_less (int *pres, UINT64 * px,
+				   UINT64 *
+				   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern void bid64_quiet_less_equal (int *pres, UINT64 * px,
+					 UINT64 *
+					 py _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid64_quiet_less_unordered (int *pres, UINT64 * px,
+					     UINT64 *
+					     py _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern void bid64_quiet_not_equal (int *pres, UINT64 * px,
+					UINT64 *
+					py _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_quiet_not_greater (int *pres, UINT64 * px,
+					  UINT64 *
+					  py _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid64_quiet_not_less (int *pres, UINT64 * px,
+				       UINT64 *
+				       py _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_quiet_ordered (int *pres, UINT64 * px,
+				      UINT64 *
+				      py _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_quiet_unordered (int *pres, UINT64 * px,
+					UINT64 *
+					py _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid64_signaling_greater (int *pres, UINT64 * px,
+					  UINT64 *
+					  py _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid64_signaling_greater_equal (int *pres, UINT64 * px,
+						UINT64 *
+						py _EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern void bid64_signaling_greater_unordered (int *pres,
+						    UINT64 * px,
+						    UINT64 *
+						    py _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern void bid64_signaling_less (int *pres, UINT64 * px,
+				       UINT64 *
+				       py _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid64_signaling_less_equal (int *pres, UINT64 * px,
+					     UINT64 *
+					     py _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern void bid64_signaling_less_unordered (int *pres, UINT64 * px,
+						 UINT64 *
+						 py _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern void bid64_signaling_not_greater (int *pres, UINT64 * px,
+					      UINT64 *
+					      py _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern void bid64_signaling_not_less (int *pres, UINT64 * px,
+					   UINT64 *
+					   py _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+
+     extern void bid128_quiet_equal (int *pres, UINT128 * px,
+				     UINT128 *
+				     py _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_quiet_greater (int *pres, UINT128 * px,
+				       UINT128 *
+				       py _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_quiet_greater_equal (int *pres, UINT128 * px,
+					     UINT128 *
+					     py _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern void bid128_quiet_greater_unordered (int *pres,
+						 UINT128 * px,
+						 UINT128 *
+						 py _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern void bid128_quiet_less (int *pres, UINT128 * px,
+				    UINT128 *
+				    py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid128_quiet_less_equal (int *pres, UINT128 * px,
+					  UINT128 *
+					  py _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern void bid128_quiet_less_unordered (int *pres, UINT128 * px,
+					      UINT128 *
+					      py _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern void bid128_quiet_not_equal (int *pres, UINT128 * px,
+					 UINT128 *
+					 py _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_quiet_not_greater (int *pres, UINT128 * px,
+					   UINT128 *
+					   py _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern void bid128_quiet_not_less (int *pres, UINT128 * px,
+					UINT128 *
+					py _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_quiet_ordered (int *pres, UINT128 * px,
+				       UINT128 *
+				       py _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_quiet_unordered (int *pres, UINT128 * px,
+					 UINT128 *
+					 py _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern void bid128_signaling_greater (int *pres, UINT128 * px,
+					   UINT128 *
+					   py _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern void bid128_signaling_greater_equal (int *pres,
+						 UINT128 * px,
+						 UINT128 *
+						 py _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern void bid128_signaling_greater_unordered (int *pres,
+						     UINT128 * px,
+						     UINT128 *
+						     py _EXC_FLAGS_PARAM
+						     _EXC_MASKS_PARAM
+						     _EXC_INFO_PARAM);
+     extern void bid128_signaling_less (int *pres, UINT128 * px,
+					UINT128 *
+					py _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern void bid128_signaling_less_equal (int *pres, UINT128 * px,
+					      UINT128 *
+					      py _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern void bid128_signaling_less_unordered (int *pres,
+						  UINT128 * px,
+						  UINT128 *
+						  py _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern void bid128_signaling_not_greater (int *pres, UINT128 * px,
+					       UINT128 *
+					       py _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern void bid128_signaling_not_less (int *pres, UINT128 * px,
+					    UINT128 *
+					    py _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+
+     extern void bid64_round_integral_exact (UINT64 * pres, UINT64 * px
+					     _RND_MODE_PARAM
+					     _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern void bid64_round_integral_nearest_even (UINT64 * pres,
+						    UINT64 *
+						    px _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern void bid64_round_integral_negative (UINT64 * pres,
+						UINT64 *
+						px _EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern void bid64_round_integral_positive (UINT64 * pres,
+						UINT64 *
+						px _EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern void bid64_round_integral_zero (UINT64 * pres,
+					    UINT64 *
+					    px _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern void bid64_round_integral_nearest_away (UINT64 * pres,
+						    UINT64 *
+						    px _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+
+     extern void bid128_round_integral_exact (UINT128 * pres,
+					      UINT128 *
+					      px _RND_MODE_PARAM
+					      _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern void bid128_round_integral_nearest_even (UINT128 * pres,
+						     UINT128 *
+						     px _EXC_FLAGS_PARAM
+						     _EXC_MASKS_PARAM
+						     _EXC_INFO_PARAM);
+     extern void bid128_round_integral_negative (UINT128 * pres,
+						 UINT128 *
+						 px _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern void bid128_round_integral_positive (UINT128 * pres,
+						 UINT128 *
+						 px _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern void bid128_round_integral_zero (UINT128 * pres,
+					     UINT128 *
+					     px _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern void bid128_round_integral_nearest_away (UINT128 * pres,
+						     UINT128 *
+						     px _EXC_FLAGS_PARAM
+						     _EXC_MASKS_PARAM
+						     _EXC_INFO_PARAM);
+
+     extern void bid64_nextup (UINT64 * pres, UINT64 * px
+			       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM);
+     extern void bid64_nextdown (UINT64 * pres,
+				 UINT64 *
+				 px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern void bid64_nextafter (UINT64 * pres, UINT64 * px,
+				  UINT64 *
+				  py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				  _EXC_INFO_PARAM);
+
+     extern void bid128_nextup (UINT128 * pres, UINT128 * px
+				_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern void bid128_nextdown (UINT128 * pres,
+				  UINT128 *
+				  px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				  _EXC_INFO_PARAM);
+     extern void bid128_nextafter (UINT128 * pres, UINT128 * px,
+				   UINT128 *
+				   py _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+
+     extern void bid64_minnum (UINT64 * pres, UINT64 * px, UINT64 * py
+			       _EXC_FLAGS_PARAM);
+     extern void bid64_minnum_mag (UINT64 * pres, UINT64 * px,
+				   UINT64 * py _EXC_FLAGS_PARAM);
+     extern void bid64_maxnum (UINT64 * pres, UINT64 * px, UINT64 * py
+			       _EXC_FLAGS_PARAM);
+     extern void bid64_maxnum_mag (UINT64 * pres, UINT64 * px,
+				   UINT64 * py _EXC_FLAGS_PARAM);
+
+     extern void bid128_minnum (UINT128 * pres, UINT128 * px,
+				UINT128 * py _EXC_FLAGS_PARAM);
+     extern void bid128_minnum_mag (UINT128 * pres, UINT128 * px,
+				    UINT128 * py _EXC_FLAGS_PARAM);
+     extern void bid128_maxnum (UINT128 * pres, UINT128 * px,
+				UINT128 * py _EXC_FLAGS_PARAM);
+     extern void bid128_maxnum_mag (UINT128 * pres, UINT128 * px,
+				    UINT128 * py _EXC_FLAGS_PARAM);
+
+     extern void bid64_from_int32 (UINT64 * pres, int *px
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_from_uint32 (UINT64 * pres, unsigned int *px
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_from_int64 (UINT64 * pres, SINT64 * px
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_from_uint64 (UINT64 * pres,
+				    UINT64 *
+				    px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_from_int32 (UINT128 * pres,
+				    int *px _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid128_from_uint32 (UINT128 * pres,
+				     unsigned int *px _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+     extern void bid128_from_int64 (UINT128 * pres,
+				    SINT64 *
+				    px _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid128_from_uint64 (UINT128 * pres,
+				     UINT64 *
+				     px _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+
+     extern void bid64_isSigned (int *pres, UINT64 * px
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isNormal (int *pres, UINT64 * px
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isSubnormal (int *pres, UINT64 * px
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isFinite (int *pres, UINT64 * px
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isZero (int *pres, UINT64 * px
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isInf (int *pres, UINT64 * px
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isSignaling (int *pres, UINT64 * px
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isCanonical (int *pres, UINT64 * px
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_isNaN (int *pres, UINT64 * px
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_copy (UINT64 * pres, UINT64 * px
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_negate (UINT64 * pres, UINT64 * px
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_abs (UINT64 * pres, UINT64 * px
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_copySign (UINT64 * pres, UINT64 * px, UINT64 * py
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_class (int *pres, UINT64 * px
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_sameQuantum (int *pres, UINT64 * px, UINT64 * py
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_totalOrder (int *pres, UINT64 * px, UINT64 * py
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_totalOrderMag (int *pres, UINT64 * px,
+				      UINT64 *
+				      py _EXC_MASKS_PARAM
+				      _EXC_INFO_PARAM);
+     extern void bid64_radix (int *pres,
+			      UINT64 *
+			      px _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_isSigned (int *pres, UINT128 * px
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isNormal (int *pres, UINT128 * px
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isSubnormal (int *pres, UINT128 * px
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isFinite (int *pres, UINT128 * px
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isZero (int *pres, UINT128 * px
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isInf (int *pres, UINT128 * px
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isSignaling (int *pres, UINT128 * px
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isCanonical (int *pres, UINT128 * px
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_isNaN (int *pres, UINT128 * px
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_copy (UINT128 * pres, UINT128 * px
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_negate (UINT128 * pres, UINT128 * px
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_abs (UINT128 * pres, UINT128 * px
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_copySign (UINT128 * pres, UINT128 * px,
+				  UINT128 *
+				  py _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_class (int *pres,
+			       UINT128 *
+			       px _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_sameQuantum (int *pres, UINT128 * px,
+				     UINT128 *
+				     py _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+     extern void bid128_totalOrder (int *pres, UINT128 * px,
+				    UINT128 *
+				    py _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern void bid128_totalOrderMag (int *pres, UINT128 * px,
+				       UINT128 *
+				       py _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern void bid128_radix (int *pres,
+			       UINT128 *
+			       px _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_rem (UINT64 * pres, UINT64 * px, UINT64 * py
+			    _EXC_FLAGS_PARAM
+			    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_logb (int * pres, UINT64 * px
+			     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			     _EXC_INFO_PARAM);
+     extern void bid64_scalb (UINT64 * pres, UINT64 * px,
+			      int *pn _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_rem (UINT128 * pres, UINT128 * px, UINT128 * py
+			     _EXC_FLAGS_PARAM
+			     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_logb (int * pres, UINT128 * px
+			      _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_scalb (UINT128 * pres, UINT128 * px,
+			       int *pn _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid32_to_bid64 (UINT64 * pres,
+				 UINT32 *
+				 px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern void bid32_to_bid128 (UINT128 * pres,
+				  UINT32 *
+				  px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				  _EXC_INFO_PARAM);
+     extern void bid64_to_bid128 (UINT128 * pres,
+				  UINT64 *
+				  px _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				  _EXC_INFO_PARAM);
+     extern void bid64_to_bid32 (UINT32 * pres,
+				 UINT64 *
+				 px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_bid32 (UINT32 * pres,
+				  UINT128 *
+				  px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_bid64 (UINT64 * pres,
+				  UINT128 *
+				  px _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_from_string (UINT64 * pres, char *ps
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid64_to_string (char *ps, UINT64 * px
+				  _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_from_string (UINT128 * pres, char *ps
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_string (char *str, UINT128 * px
+				   _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_quantize (UINT64 * pres, UINT64 * px,
+				 UINT64 *
+				 py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_quantize (UINT128 * pres, UINT128 * px,
+				  UINT128 *
+				  py _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_to_binary32 (float *pres, UINT128 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_to_binary64 (double *pres, UINT128 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_to_binary80 (BINARY80 * pres, UINT128 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid128_to_binary128 (BINARY128 * pres, UINT128 * px
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary128_to_bid32 (UINT32 * pres, BINARY128 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary128_to_bid64 (UINT64 * pres, BINARY128 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary128_to_bid128 (UINT128 * pres, BINARY128 * px
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_to_binary32 (float *pres, UINT64 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_to_binary64 (double *pres, UINT64 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_to_binary80 (BINARY80 * pres, UINT64 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_to_binary128 (BINARY128 * pres, UINT64 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary64_to_bid32 (UINT32 * pres, double *px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary64_to_bid64 (UINT64 * pres, double *px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary64_to_bid128 (UINT128 * pres, double *px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid32_to_binary32 (float *pres, UINT32 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid32_to_binary64 (double *pres, UINT32 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid32_to_binary80 (BINARY80 * pres, UINT32 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid32_to_binary128 (BINARY128 * pres, UINT32 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary32_to_bid32 (UINT32 * pres, float *px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary32_to_bid64 (UINT64 * pres, float *px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary32_to_bid128 (UINT128 * pres, float *px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary80_to_bid32 (UINT32 * pres, BINARY80 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary80_to_bid64 (UINT64 * pres, BINARY80 * px
+				    _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void binary80_to_bid128 (UINT128 * pres, BINARY80 * px
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void is754 (int *retval);
+
+     extern void is754R (int *retval);
+
+     extern void signalException (_IDEC_flags *
+				  pflagsmask _EXC_FLAGS_PARAM);
+
+     extern void lowerFlags (_IDEC_flags * pflagsmask _EXC_FLAGS_PARAM);
+
+     extern void testFlags (_IDEC_flags * praised,
+			    _IDEC_flags * pflagsmask _EXC_FLAGS_PARAM);
+
+     extern void testSavedFlags (_IDEC_flags * praised,
+				 _IDEC_flags * psavedflags,
+				 _IDEC_flags * pflagsmask);
+
+     extern void restoreFlags (_IDEC_flags * pflagsvalues,
+			       _IDEC_flags *
+			       pflagsmask _EXC_FLAGS_PARAM);
+
+     extern void saveFlags (_IDEC_flags * pflagsvalues,
+			    _IDEC_flags * pflagsmask _EXC_FLAGS_PARAM);
+
+     void getDecimalRoundingDirection (_IDEC_round *
+				       rounding_mode _RND_MODE_PARAM);
+
+     void setDecimalRoundingDirection (_IDEC_round *
+				       rounding_mode _RND_MODE_PARAM);
+
+#else
+
+     extern UINT32 bid_to_dpd32 (UINT32 px);
+     extern UINT64 bid_to_dpd64 (UINT64 px);
+     extern UINT128 bid_to_dpd128 (UINT128 px);
+     extern UINT32 dpd_to_bid32 (UINT32 px);
+     extern UINT64 dpd_to_bid64 (UINT64 px);
+     extern UINT128 dpd_to_bid128 (UINT128 px);
+
+     extern UINT128 bid128dd_add (UINT64 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dq_add (UINT64 x, UINT128 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qd_add (UINT128 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_add (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dd_sub (UINT64 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dq_sub (UINT64 x, UINT128 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qd_sub (UINT128 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_sub (UINT128 x,
+				UINT128 y _RND_MODE_PARAM
+				_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern UINT128 bid128dd_mul (UINT64 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dq_mul (UINT64 x, UINT128 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qd_mul (UINT128 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_mul (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_div (UINT128 x,
+				UINT128 y _RND_MODE_PARAM
+				_EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern UINT128 bid128dd_div (UINT64 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dq_div (UINT64 x, UINT128 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qd_div (UINT128 x, UINT64 y
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_fma (UINT128 x, UINT128 y, UINT128 z
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128ddd_fma (UINT64 x, UINT64 y, UINT64 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128ddq_fma (UINT64 x, UINT64 y, UINT128 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dqd_fma (UINT64 x, UINT128 y, UINT64 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128dqq_fma (UINT64 x, UINT128 y,
+				   UINT128 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qdd_fma (UINT128 x, UINT64 y, UINT64 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qdq_fma (UINT128 x, UINT64 y,
+				   UINT128 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128qqd_fma (UINT128 x, UINT128 y,
+				   UINT64 z
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     // Note: bid128qqq_fma is represented by bid128_fma
+     // Note: bid64ddd_fma is represented by bid64_fma
+     extern UINT64 bid64ddq_fma (UINT64 x, UINT64 y,
+				 UINT128 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64dqd_fma (UINT64 x, UINT128 y,
+				 UINT64 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64dqq_fma (UINT64 x, UINT128 y,
+				 UINT128 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qdd_fma (UINT128 x, UINT64 y,
+				 UINT64 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qdq_fma (UINT128 x, UINT64 y,
+				 UINT128 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qqd_fma (UINT128 x, UINT128 y,
+				 UINT64 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qqq_fma (UINT128 x, UINT128 y,
+				 UINT128 z
+				 _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				 _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 bid128_sqrt (UINT128 x _RND_MODE_PARAM
+				 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern UINT128 bid128d_sqrt (UINT64 x
+				  _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 bid64_add (UINT64 x, UINT64 y
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64dq_add (UINT64 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qd_add (UINT128 x, UINT64 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qq_add (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_sub (UINT64 x,
+			      UINT64 y _RND_MODE_PARAM
+			      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern UINT64 bid64dq_sub (UINT64 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qd_sub (UINT128 x, UINT64 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qq_sub (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_mul (UINT64 x, UINT64 y
+			      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64dq_mul (UINT64 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qd_mul (UINT128 x, UINT64 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qq_mul (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_div (UINT64 x,
+			      UINT64 y _RND_MODE_PARAM
+			      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern UINT64 bid64dq_div (UINT64 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qd_div (UINT128 x, UINT64 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64qq_div (UINT128 x, UINT128 y
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_fma (UINT64 x, UINT64 y,
+			      UINT64 z _RND_MODE_PARAM
+			      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern UINT64 bid64_sqrt (UINT64 x _RND_MODE_PARAM
+			       _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM);
+     extern UINT64 bid64q_sqrt (UINT128 x
+				_RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern char bid128_to_int8_rnint (UINT128 x
+				       _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern char bid128_to_int8_xrnint (UINT128 x
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern char bid128_to_int8_rninta (UINT128 x
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern char bid128_to_int8_xrninta (UINT128 x
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern char bid128_to_int8_int (UINT128 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid128_to_int8_xint (UINT128 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid128_to_int8_floor (UINT128 x
+				       _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern char bid128_to_int8_xfloor (UINT128 x
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern char bid128_to_int8_ceil (UINT128 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid128_to_int8_xceil (UINT128 x
+				       _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern short bid128_to_int16_rnint (UINT128 x
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern short bid128_to_int16_xrnint (UINT128 x
+					  _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern short bid128_to_int16_rninta (UINT128 x
+					  _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern short bid128_to_int16_xrninta (UINT128 x
+					   _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern short bid128_to_int16_int (UINT128 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern short bid128_to_int16_xint (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern short bid128_to_int16_floor (UINT128 x
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern short bid128_to_int16_xfloor (UINT128 x
+					  _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern short bid128_to_int16_ceil (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern short bid128_to_int16_xceil (UINT128 x
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_rnint (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_xrnint (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_rninta (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_xrninta (UINT128 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_int (UINT128 x
+					       _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_xint (UINT128 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_floor (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_xfloor (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_ceil (UINT128 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned char bid128_to_uint8_xceil (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_rnint (UINT128 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_xrnint (UINT128 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_rninta (UINT128 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_xrninta (UINT128 x
+						     _EXC_FLAGS_PARAM
+						     _EXC_MASKS_PARAM
+						     _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_int (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_xint (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_floor (UINT128 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_xfloor (UINT128 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_ceil (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned short bid128_to_uint16_xceil (UINT128 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern int bid128_to_int32_rnint (UINT128 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid128_to_int32_xrnint (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid128_to_int32_rninta (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid128_to_int32_xrninta (UINT128 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern int bid128_to_int32_int (UINT128 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_to_int32_xint (UINT128 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_to_int32_floor (UINT128 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid128_to_int32_xfloor (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid128_to_int32_ceil (UINT128 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_to_int32_xceil (UINT128 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_rnint (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_xrnint (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_rninta (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_xrninta (UINT128 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_int (UINT128 x
+					       _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_xint (UINT128 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_floor (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_xfloor (UINT128 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_ceil (UINT128 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned int bid128_to_uint32_xceil (UINT128 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_rnint (UINT128 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_xrnint (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_rninta (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_xrninta (UINT128 x _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_int (UINT128 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_xint (UINT128 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_floor (UINT128 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_xfloor (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_ceil (UINT128 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern SINT64 bid128_to_int64_xceil (UINT128 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_rnint (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_xrnint (UINT128 x _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_rninta (UINT128 x _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_xrninta (UINT128 x _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_int (UINT128 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_xint (UINT128 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_floor (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_xfloor (UINT128 x _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_ceil (UINT128 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_uint64_xceil (UINT128 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern int bid64_to_int32_rnint (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_to_int32_xrnint (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid64_to_int32_rninta (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid64_to_int32_xrninta (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid64_to_int32_int (UINT64 x _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_to_int32_xint (UINT64 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_to_int32_floor (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_to_int32_xfloor (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid64_to_int32_ceil (UINT64 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_to_int32_xceil (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_rnint (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_xrnint (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern char bid64_to_int8_rninta (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern char bid64_to_int8_xrninta (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern char bid64_to_int8_int (UINT64 x _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_xint (UINT64 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_floor (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_xfloor (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern char bid64_to_int8_ceil (UINT64 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern char bid64_to_int8_xceil (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern short bid64_to_int16_rnint (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern short bid64_to_int16_xrnint (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern short bid64_to_int16_rninta (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern short bid64_to_int16_xrninta (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern short bid64_to_int16_int (UINT64 x _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern short bid64_to_int16_xint (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern short bid64_to_int16_floor (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern short bid64_to_int16_xfloor (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern short bid64_to_int16_ceil (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern short bid64_to_int16_xceil (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_rnint (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_xrnint (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_rninta (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_xrninta (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_int (UINT64 x _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_xint (UINT64 x _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_floor (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_xfloor (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_ceil (UINT64 x _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned char bid64_to_uint8_xceil (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_rnint (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_xrnint (UINT64 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_rninta (UINT64 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_xrninta (UINT64 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_int (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_xint (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_floor (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_xfloor (UINT64 x
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_ceil (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned short bid64_to_uint16_xceil (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_rnint (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_xrnint (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_rninta (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_xrninta (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_int (UINT64 x _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_xint (UINT64 x _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_floor (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_xfloor (UINT64 x
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_ceil (UINT64 x _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern unsigned int bid64_to_uint32_xceil (UINT64 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_rnint (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_xrnint (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_rninta (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_xrninta (UINT64 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_int (UINT64 x _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_xint (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_floor (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_xfloor (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_ceil (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern SINT64 bid64_to_int64_xceil (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_rnint (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_xrnint (UINT64 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_rninta (UINT64 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_xrninta (UINT64 x _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_int (UINT64 x _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_xint (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_floor (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_xfloor (UINT64 x _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_ceil (UINT64 x _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern UINT64 bid64_to_uint64_xceil (UINT64 x _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+
+     extern int bid64_quiet_equal (UINT64 x, UINT64 y
+				   _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid64_quiet_greater (UINT64 x,
+				     UINT64 y _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_quiet_greater_equal (UINT64 x,
+					   UINT64 y _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+     extern int bid64_quiet_greater_unordered (UINT64 x,
+					       UINT64 y _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern int bid64_quiet_less (UINT64 x,
+				  UINT64 y _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_quiet_less_equal (UINT64 x,
+					UINT64 y _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid64_quiet_less_unordered (UINT64 x,
+					    UINT64 y _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern int bid64_quiet_not_equal (UINT64 x,
+				       UINT64 y _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid64_quiet_not_greater (UINT64 x,
+					 UINT64 y _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern int bid64_quiet_not_less (UINT64 x,
+				      UINT64 y _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_quiet_ordered (UINT64 x,
+				     UINT64 y _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_quiet_unordered (UINT64 x,
+				       UINT64 y _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid64_signaling_greater (UINT64 x,
+					 UINT64 y _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern int bid64_signaling_greater_equal (UINT64 x,
+					       UINT64 y _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern int bid64_signaling_greater_unordered (UINT64 x,
+						   UINT64 y
+						   _EXC_FLAGS_PARAM
+						   _EXC_MASKS_PARAM
+						   _EXC_INFO_PARAM);
+     extern int bid64_signaling_less (UINT64 x,
+				      UINT64 y _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_signaling_less_equal (UINT64 x,
+					    UINT64 y _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern int bid64_signaling_less_unordered (UINT64 x,
+						UINT64 y
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern int bid64_signaling_not_greater (UINT64 x,
+					     UINT64 y _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern int bid64_signaling_not_less (UINT64 x,
+					  UINT64 y _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+
+     extern int bid128_quiet_equal (UINT128 x, UINT128 y
+				    _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern int bid128_quiet_greater (UINT128 x,
+				      UINT128 y _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_quiet_greater_equal (UINT128 x,
+					    UINT128 y _EXC_FLAGS_PARAM
+					    _EXC_MASKS_PARAM
+					    _EXC_INFO_PARAM);
+     extern int bid128_quiet_greater_unordered (UINT128 x,
+						UINT128 y
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern int bid128_quiet_less (UINT128 x,
+				   UINT128 y _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_quiet_less_equal (UINT128 x,
+					 UINT128 y _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+     extern int bid128_quiet_less_unordered (UINT128 x,
+					     UINT128 y _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern int bid128_quiet_not_equal (UINT128 x,
+					UINT128 y _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid128_quiet_not_greater (UINT128 x,
+					  UINT128 y _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern int bid128_quiet_not_less (UINT128 x,
+				       UINT128 y _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid128_quiet_ordered (UINT128 x,
+				      UINT128 y _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_quiet_unordered (UINT128 x,
+					UINT128 y _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern int bid128_signaling_greater (UINT128 x,
+					  UINT128 y _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+     extern int bid128_signaling_greater_equal (UINT128 x,
+						UINT128 y
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern int bid128_signaling_greater_unordered (UINT128 x,
+						    UINT128 y
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern int bid128_signaling_less (UINT128 x,
+				       UINT128 y _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern int bid128_signaling_less_equal (UINT128 x,
+					     UINT128 y _EXC_FLAGS_PARAM
+					     _EXC_MASKS_PARAM
+					     _EXC_INFO_PARAM);
+     extern int bid128_signaling_less_unordered (UINT128 x,
+						 UINT128 y
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern int bid128_signaling_not_greater (UINT128 x,
+					      UINT128 y _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern int bid128_signaling_not_less (UINT128 x,
+					   UINT128 y _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+
+     extern UINT64 bid64_round_integral_exact (UINT64 x
+					       _RND_MODE_PARAM
+					       _EXC_FLAGS_PARAM
+					       _EXC_MASKS_PARAM
+					       _EXC_INFO_PARAM);
+     extern UINT64 bid64_round_integral_nearest_even (UINT64 x
+						      _EXC_FLAGS_PARAM
+						      _EXC_MASKS_PARAM
+						      _EXC_INFO_PARAM);
+     extern UINT64 bid64_round_integral_negative (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern UINT64 bid64_round_integral_positive (UINT64 x
+						  _EXC_FLAGS_PARAM
+						  _EXC_MASKS_PARAM
+						  _EXC_INFO_PARAM);
+     extern UINT64 bid64_round_integral_zero (UINT64 x _EXC_FLAGS_PARAM
+					      _EXC_MASKS_PARAM
+					      _EXC_INFO_PARAM);
+     extern UINT64 bid64_round_integral_nearest_away (UINT64 x
+						      _EXC_FLAGS_PARAM
+						      _EXC_MASKS_PARAM
+						      _EXC_INFO_PARAM);
+
+     extern UINT128 bid128_round_integral_exact (UINT128 x
+						 _RND_MODE_PARAM
+						 _EXC_FLAGS_PARAM
+						 _EXC_MASKS_PARAM
+						 _EXC_INFO_PARAM);
+     extern UINT128 bid128_round_integral_nearest_even (UINT128 x
+							_EXC_FLAGS_PARAM
+							_EXC_MASKS_PARAM
+							_EXC_INFO_PARAM);
+     extern UINT128 bid128_round_integral_negative (UINT128 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern UINT128 bid128_round_integral_positive (UINT128 x
+						    _EXC_FLAGS_PARAM
+						    _EXC_MASKS_PARAM
+						    _EXC_INFO_PARAM);
+     extern UINT128 bid128_round_integral_zero (UINT128 x
+						_EXC_FLAGS_PARAM
+						_EXC_MASKS_PARAM
+						_EXC_INFO_PARAM);
+     extern UINT128 bid128_round_integral_nearest_away (UINT128 x
+							_EXC_FLAGS_PARAM
+							_EXC_MASKS_PARAM
+							_EXC_INFO_PARAM);
+
+     extern UINT64 bid64_nextup (UINT64 x
+				 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern UINT64 bid64_nextdown (UINT64 x _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_nextafter (UINT64 x,
+				    UINT64 y _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 bid128_nextup (UINT128 x
+				   _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern UINT128 bid128_nextdown (UINT128 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_nextafter (UINT128 x,
+				      UINT128 y _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 bid64_minnum (UINT64 x, UINT64 y _EXC_FLAGS_PARAM);
+     extern UINT64 bid64_minnum_mag (UINT64 x,
+				     UINT64 y _EXC_FLAGS_PARAM);
+     extern UINT64 bid64_maxnum (UINT64 x, UINT64 y _EXC_FLAGS_PARAM);
+     extern UINT64 bid64_maxnum_mag (UINT64 x,
+				     UINT64 y _EXC_FLAGS_PARAM);
+
+     extern UINT128 bid128_minnum (UINT128 x,
+				   UINT128 y _EXC_FLAGS_PARAM);
+     extern UINT128 bid128_minnum_mag (UINT128 x,
+				       UINT128 y _EXC_FLAGS_PARAM);
+     extern UINT128 bid128_maxnum (UINT128 x,
+				   UINT128 y _EXC_FLAGS_PARAM);
+     extern UINT128 bid128_maxnum_mag (UINT128 x,
+				       UINT128 y _EXC_FLAGS_PARAM);
+
+     extern UINT64 bid64_from_int32 (int x _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+     extern UINT64 bid64_from_uint32 (unsigned int x _EXC_MASKS_PARAM
+				      _EXC_INFO_PARAM);
+     extern UINT64 bid64_from_int64 (SINT64 x _RND_MODE_PARAM
+				     _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+     extern UINT64 bid64_from_uint64 (UINT64 _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				      _EXC_INFO_PARAM);
+     extern UINT128 bid128_from_int32 (int x _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern UINT128 bid128_from_uint32 (unsigned int x _EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+     extern UINT128 bid128_from_int64 (SINT64 x _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+     extern UINT128 bid128_from_uint64 (UINT64 x _EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern int bid64_isSigned (UINT64 x _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern int bid64_isNormal (UINT64 x _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern int bid64_isSubnormal (UINT64 x _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid64_isFinite (UINT64 x _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern int bid64_isZero (UINT64 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern int bid64_isInf (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_isSignaling (UINT64 x _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid64_isCanonical (UINT64 x _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid64_isNaN (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_copy (UINT64 x _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM);
+     extern UINT64 bid64_negate (UINT64 x _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern UINT64 bid64_abs (UINT64 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern UINT64 bid64_copySign (UINT64 x,
+				   UINT64 y _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid64_class (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_sameQuantum (UINT64 x, UINT64 y
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_totalOrder (UINT64 x, UINT64 y
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_totalOrderMag (UINT64 x, UINT64 y
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_radix (UINT64 x _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern int bid128_isSigned (UINT128 x _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern int bid128_isNormal (UINT128 x _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern int bid128_isSubnormal (UINT128 x _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern int bid128_isFinite (UINT128 x _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern int bid128_isZero (UINT128 x _EXC_MASKS_PARAM
+			       _EXC_INFO_PARAM);
+     extern int bid128_isInf (UINT128 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern int bid128_isSignaling (UINT128 x _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern int bid128_isCanonical (UINT128 x _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern int bid128_isNaN (UINT128 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern UINT128 bid128_copy (UINT128 x _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern UINT128 bid128_negate (UINT128 x _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern UINT128 bid128_abs (UINT128 x _EXC_MASKS_PARAM
+				_EXC_INFO_PARAM);
+     extern UINT128 bid128_copySign (UINT128 x,
+				     UINT128 y _EXC_MASKS_PARAM
+				     _EXC_INFO_PARAM);
+     extern int bid128_class (UINT128 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+     extern int bid128_sameQuantum (UINT128 x,
+				    UINT128 y _EXC_MASKS_PARAM
+				    _EXC_INFO_PARAM);
+     extern int bid128_totalOrder (UINT128 x,
+				   UINT128 y _EXC_MASKS_PARAM
+				   _EXC_INFO_PARAM);
+     extern int bid128_totalOrderMag (UINT128 x,
+				      UINT128 y _EXC_MASKS_PARAM
+				      _EXC_INFO_PARAM);
+     extern int bid128_radix (UINT128 x _EXC_MASKS_PARAM
+			      _EXC_INFO_PARAM);
+
+     extern UINT64 bid64_rem (UINT64 x, UINT64 y
+			      _EXC_FLAGS_PARAM
+			      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid64_logb (UINT64 x _EXC_FLAGS_PARAM
+			       _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_scalb (UINT64 x,
+				int n _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 bid128_rem (UINT128 x, UINT128 y
+				_EXC_FLAGS_PARAM
+				_EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern int bid128_logb (UINT128 x
+				 _EXC_FLAGS_PARAM _EXC_MASKS_PARAM
+				 _EXC_INFO_PARAM);
+     extern UINT128 bid128_scalb (UINT128 x,
+				  int n _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 bid32_to_bid64 (UINT32 x _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid32_to_bid128 (UINT32 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid64_to_bid128 (UINT64 x _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT32 bid64_to_bid32 (UINT64 x
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT32 bid128_to_bid32 (UINT128 x _RND_MODE_PARAM
+				    _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid128_to_bid64 (UINT128 x _RND_MODE_PARAM
+				    _EXC_FLAGS_PARAM
+				    _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern void bid64_to_string (char *ps, UINT64 x
+				  _EXC_FLAGS_PARAM
+				  _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT64 bid64_from_string (char *ps
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern void bid128_to_string (char *str, UINT128 x
+				   _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+     extern UINT128 bid128_from_string (char *ps
+					_RND_MODE_PARAM _EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern UINT64 bid64_quantize (UINT64 x, UINT64 y
+				   _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				   _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 bid128_quantize (UINT128 x, UINT128 y
+				     _RND_MODE_PARAM
+				     _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+
+     extern UINT32 binary128_to_bid32 (BINARY128 x
+				       _RND_MODE_PARAM
+				       _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+
+     extern UINT64 binary128_to_bid64 (BINARY128 x
+				       _RND_MODE_PARAM
+				       _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+
+     extern UINT128 binary128_to_bid128 (BINARY128 x
+					 _RND_MODE_PARAM
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+
+     extern UINT32 binary64_to_bid32 (double x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 binary64_to_bid64 (double x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 binary64_to_bid128 (double x
+					_RND_MODE_PARAM
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern UINT32 binary80_to_bid32 (BINARY80 x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 binary80_to_bid64 (BINARY80 x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 binary80_to_bid128 (BINARY80 x
+					_RND_MODE_PARAM
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern UINT32 binary32_to_bid32 (float x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT64 binary32_to_bid64 (float x
+				      _RND_MODE_PARAM
+				      _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern UINT128 binary32_to_bid128 (float x
+					_RND_MODE_PARAM
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern float bid128_to_binary32 (UINT128 x
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern double bid128_to_binary64 (UINT128 x
+				       _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				       _EXC_MASKS_PARAM
+				       _EXC_INFO_PARAM);
+
+     extern BINARY80 bid128_to_binary80 (UINT128 x
+					 _RND_MODE_PARAM
+					 _EXC_FLAGS_PARAM
+					 _EXC_MASKS_PARAM
+					 _EXC_INFO_PARAM);
+
+     extern BINARY128 bid128_to_binary128 (UINT128 x
+					   _RND_MODE_PARAM
+					   _EXC_FLAGS_PARAM
+					   _EXC_MASKS_PARAM
+					   _EXC_INFO_PARAM);
+
+     extern float bid64_to_binary32 (UINT64 x
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern double bid64_to_binary64 (UINT64 x
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern BINARY80 bid64_to_binary80 (UINT64 x
+					_RND_MODE_PARAM
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern BINARY128 bid64_to_binary128 (UINT64 x
+					  _RND_MODE_PARAM
+					  _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+
+     extern float bid32_to_binary32 (UINT32 x
+				     _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				     _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern double bid32_to_binary64 (UINT32 x
+				      _RND_MODE_PARAM _EXC_FLAGS_PARAM
+				      _EXC_MASKS_PARAM _EXC_INFO_PARAM);
+
+     extern BINARY80 bid32_to_binary80 (UINT32 x
+					_RND_MODE_PARAM
+					_EXC_FLAGS_PARAM
+					_EXC_MASKS_PARAM
+					_EXC_INFO_PARAM);
+
+     extern BINARY128 bid32_to_binary128 (UINT32 x
+					  _RND_MODE_PARAM
+					  _EXC_FLAGS_PARAM
+					  _EXC_MASKS_PARAM
+					  _EXC_INFO_PARAM);
+
+     extern int is754 (void);
+
+     extern int is754R (void);
+
+     extern void signalException (_IDEC_flags flagsmask
+				  _EXC_FLAGS_PARAM);
+
+     extern void lowerFlags (_IDEC_flags flagsmask _EXC_FLAGS_PARAM);
+
+     extern _IDEC_flags testFlags (_IDEC_flags flagsmask
+				   _EXC_FLAGS_PARAM);
+
+     extern _IDEC_flags testSavedFlags (_IDEC_flags savedflags,
+					_IDEC_flags flagsmask);
+
+     extern void restoreFlags (_IDEC_flags flagsvalues,
+			       _IDEC_flags flagsmask _EXC_FLAGS_PARAM);
+
+     extern _IDEC_flags saveFlags (_IDEC_flags flagsmask
+				   _EXC_FLAGS_PARAM);
+
+#if !DECIMAL_GLOBAL_ROUNDING
+     _IDEC_round getDecimalRoundingDirection (_IDEC_round rnd_mode);
+#else
+     _IDEC_round getDecimalRoundingDirection (void);
+#endif
+
+#if !DECIMAL_GLOBAL_ROUNDING
+     _IDEC_round setDecimalRoundingDirection (_IDEC_round
+					      rounding_mode
+					      _RND_MODE_PARAM);
+#else
+     void setDecimalRoundingDirection (_IDEC_round rounding_mode);
+#endif
+
+#endif
+
+// Internal Functions
+
+     extern void
+       round64_2_18 (int q,
+		     int x,
+		     UINT64 C,
+		     UINT64 * ptr_Cstar,
+		     int *delta_exp,
+		     int *ptr_is_midpoint_lt_even,
+		     int *ptr_is_midpoint_gt_even,
+		     int *ptr_is_inexact_lt_midpoint,
+		     int *ptr_is_inexact_gt_midpoint);
+
+     extern void
+       round128_19_38 (int q,
+		       int x,
+		       UINT128 C,
+		       UINT128 * ptr_Cstar,
+		       int *delta_exp,
+		       int *ptr_is_midpoint_lt_even,
+		       int *ptr_is_midpoint_gt_even,
+		       int *ptr_is_inexact_lt_midpoint,
+		       int *ptr_is_inexact_gt_midpoint);
+
+     extern void
+       round192_39_57 (int q,
+		       int x,
+		       UINT192 C,
+		       UINT192 * ptr_Cstar,
+		       int *delta_exp,
+		       int *ptr_is_midpoint_lt_even,
+		       int *ptr_is_midpoint_gt_even,
+		       int *ptr_is_inexact_lt_midpoint,
+		       int *ptr_is_inexact_gt_midpoint);
+
+     extern void
+       round256_58_76 (int q,
+		       int x,
+		       UINT256 C,
+		       UINT256 * ptr_Cstar,
+		       int *delta_exp,
+		       int *ptr_is_midpoint_lt_even,
+		       int *ptr_is_midpoint_gt_even,
+		       int *ptr_is_inexact_lt_midpoint,
+		       int *ptr_is_inexact_gt_midpoint);
+
+#endif
+
+// Prototypes for Internal Functions
+
+     extern UINT32 bid_to_bid32 (UINT32);
+     extern UINT64 bid_to_bid64 (UINT64);
+     extern UINT128 bid_to_bid128 (UINT128);
+     extern UINT32 bid32_canonize (UINT32);
+     extern UINT64 bid64_canonize (UINT64);
+     extern UINT128 bid128_canonize (UINT128);
diff --git a/gcc-4.9/libgcc/config/libbid/bid_gcc_intrinsics.h b/gcc-4.9/libgcc/config/libbid/bid_gcc_intrinsics.h
new file mode 100644
index 000000000..eec68bc05
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_gcc_intrinsics.h
@@ -0,0 +1,288 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _BID_GCC_INTRINSICS_H
+#define _BID_GCC_INTRINSICS_H
+
+#ifdef IN_LIBGCC2
+
+#include "tconfig.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+
+#ifndef LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE LONG_DOUBLE_TYPE_SIZE
+#endif
+
+#ifndef LIBGCC2_HAS_XF_MODE
+#define LIBGCC2_HAS_XF_MODE \
+  (BITS_PER_UNIT == 8 && LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 80)
+#endif
+
+#ifndef LIBGCC2_HAS_TF_MODE
+#define LIBGCC2_HAS_TF_MODE \
+  (BITS_PER_UNIT == 8 && LIBGCC2_LONG_DOUBLE_TYPE_SIZE == 128)
+#endif
+
+#ifndef BID_HAS_XF_MODE
+#define BID_HAS_XF_MODE LIBGCC2_HAS_XF_MODE
+#endif
+
+#ifndef BID_HAS_TF_MODE
+#define BID_HAS_TF_MODE LIBGCC2_HAS_TF_MODE
+#endif
+
+/* Some handy typedefs.  */
+
+typedef float SFtype __attribute__ ((mode (SF)));
+typedef float DFtype __attribute__ ((mode (DF)));
+#if LIBGCC2_HAS_XF_MODE
+typedef float XFtype __attribute__ ((mode (XF)));
+#endif /* LIBGCC2_HAS_XF_MODE */
+#if LIBGCC2_HAS_TF_MODE
+typedef float TFtype __attribute__ ((mode (TF)));
+#endif /* LIBGCC2_HAS_XF_MODE */
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef int DItype __attribute__ ((mode (DI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef unsigned int UDItype __attribute__ ((mode (DI)));
+
+/* The type of the result of a decimal float comparison.  This must
+   match `word_mode' in GCC for the target.  */
+
+typedef int CMPtype __attribute__ ((mode (word)));
+
+typedef int SINT8 __attribute__ ((mode (QI)));
+typedef unsigned int UINT8 __attribute__ ((mode (QI)));
+typedef USItype UINT32;
+typedef SItype SINT32;
+typedef UDItype UINT64;
+typedef DItype SINT64;
+
+/* It has to be identical to the one defined in bid_functions.h.  */
+typedef __attribute__ ((aligned(16))) struct
+{
+  UINT64 w[2];
+} UINT128;
+#else	/* if not IN_LIBGCC2 */
+
+#ifndef BID_HAS_XF_MODE
+#define BID_HAS_XF_MODE 1
+#endif
+
+#ifndef BID_HAS_TF_MODE
+#if defined __i386__
+#define BID_HAS_TF_MODE 0
+#else
+#define BID_HAS_TF_MODE 1
+#endif
+#endif
+
+#ifndef SFtype
+#define SFtype float
+#endif
+
+#ifndef DFtype
+#define DFtype double
+#endif
+
+#if BID_HAS_XF_MODE
+#ifndef XFtype
+#define XFtype long double
+#endif
+
+#endif   /* IN_LIBGCC2 */
+
+#if BID_HAS_TF_MODE
+#ifndef TFtype
+#define TFtype __float128
+#endif
+#endif
+
+#ifndef SItype
+#define SItype SINT32
+#endif
+
+#ifndef DItype
+#define DItype SINT64
+#endif
+
+#ifndef USItype
+#define USItype UINT32
+#endif
+
+#ifndef UDItype
+#define UDItype UINT64
+#endif
+
+#ifndef CMPtype
+#define CMPtype long
+#endif
+#endif	/* IN_LIBGCC2 */
+
+#if BID_HAS_GCC_DECIMAL_INTRINSICS
+/* Prototypes for gcc instrinsics  */
+
+extern _Decimal64 __bid_adddd3 (_Decimal64, _Decimal64);
+extern _Decimal64 __bid_subdd3 (_Decimal64, _Decimal64);
+extern _Decimal32 __bid_addsd3 (_Decimal32, _Decimal32);
+extern _Decimal32 __bid_subsd3 (_Decimal32, _Decimal32);
+extern _Decimal128 __bid_addtd3 (_Decimal128, _Decimal128);
+extern _Decimal128 __bid_subtd3 (_Decimal128, _Decimal128);
+extern DFtype __bid_truncdddf (_Decimal64);
+extern DItype __bid_fixdddi (_Decimal64);
+extern _Decimal32 __bid_truncddsd2 (_Decimal64);
+extern SFtype __bid_truncddsf (_Decimal64);
+extern SItype __bid_fixddsi (_Decimal64);
+extern _Decimal128 __bid_extendddtd2 (_Decimal64);
+#if BID_HAS_TF_MODE
+extern TFtype __bid_extendddtf (_Decimal64);
+#endif
+extern UDItype __bid_fixunsdddi (_Decimal64);
+extern USItype __bid_fixunsddsi (_Decimal64);
+#if BID_HAS_XF_MODE
+extern XFtype __bid_extendddxf (_Decimal64);
+#endif
+extern _Decimal64 __bid_extenddfdd (DFtype);
+extern _Decimal32 __bid_truncdfsd (DFtype);
+extern _Decimal128 __bid_extenddftd (DFtype);
+extern _Decimal64 __bid_floatdidd (DItype);
+extern _Decimal32 __bid_floatdisd (DItype);
+extern _Decimal128 __bid_floatditd (DItype);
+extern _Decimal64 __bid_divdd3 (_Decimal64, _Decimal64);
+extern _Decimal32 __bid_divsd3 (_Decimal32, _Decimal32);
+extern _Decimal128 __bid_divtd3 (_Decimal128, _Decimal128);
+extern CMPtype __bid_eqdd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_eqsd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_eqtd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_gedd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_gesd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_getd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_gtdd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_gtsd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_gttd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_ledd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_lesd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_letd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_ltdd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_ltsd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_lttd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_nedd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_nesd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_netd2 (_Decimal128, _Decimal128);
+extern CMPtype __bid_unorddd2 (_Decimal64, _Decimal64);
+extern CMPtype __bid_unordsd2 (_Decimal32, _Decimal32);
+extern CMPtype __bid_unordtd2 (_Decimal128, _Decimal128);
+extern _Decimal64 __bid_muldd3 (_Decimal64, _Decimal64);
+extern _Decimal32 __bid_mulsd3 (_Decimal32, _Decimal32);
+extern _Decimal128 __bid_multd3 (_Decimal128, _Decimal128);
+extern _Decimal64 __bid_extendsddd2 (_Decimal32);
+extern DFtype __bid_extendsddf (_Decimal32);
+extern DItype __bid_fixsddi (_Decimal32);
+extern SFtype __bid_truncsdsf (_Decimal32);
+extern SItype __bid_fixsdsi (_Decimal32);
+extern _Decimal128 __bid_extendsdtd2 (_Decimal32);
+#if BID_HAS_TF_MODE
+extern TFtype __bid_extendsdtf (_Decimal32);
+#endif
+extern UDItype __bid_fixunssddi (_Decimal32);
+extern USItype __bid_fixunssdsi (_Decimal32);
+#if BID_HAS_XF_MODE
+extern XFtype __bid_extendsdxf (_Decimal32);
+#endif
+extern _Decimal64 __bid_extendsfdd (SFtype);
+extern _Decimal32 __bid_extendsfsd (SFtype);
+extern _Decimal128 __bid_extendsftd (SFtype);
+extern _Decimal64 __bid_floatsidd (SItype);
+extern _Decimal32 __bid_floatsisd (SItype);
+extern _Decimal128 __bid_floatsitd (SItype);
+extern _Decimal64 __bid_trunctddd2 (_Decimal128);
+extern DFtype __bid_trunctddf (_Decimal128);
+extern DItype __bid_fixtddi (_Decimal128);
+extern _Decimal32 __bid_trunctdsd2 (_Decimal128);
+extern SFtype __bid_trunctdsf (_Decimal128);
+extern SItype __bid_fixtdsi (_Decimal128);
+#if BID_HAS_TF_MODE
+extern TFtype __bid_trunctdtf (_Decimal128);
+#endif
+extern UDItype __bid_fixunstddi (_Decimal128);
+extern USItype __bid_fixunstdsi (_Decimal128);
+#if BID_HAS_XF_MODE
+extern XFtype __bid_trunctdxf (_Decimal128);
+#endif
+#if BID_HAS_TF_MODE
+extern _Decimal64 __bid_trunctfdd (TFtype);
+extern _Decimal32 __bid_trunctfsd (TFtype);
+extern _Decimal128 __bid_extendtftd (TFtype);
+#endif
+extern _Decimal64 __bid_floatunsdidd (UDItype);
+extern _Decimal32 __bid_floatunsdisd (UDItype);
+extern _Decimal128 __bid_floatunsditd (UDItype);
+extern _Decimal64 __bid_floatunssidd (USItype);
+extern _Decimal32 __bid_floatunssisd (USItype);
+extern _Decimal128 __bid_floatunssitd (USItype);
+#if BID_HAS_XF_MODE
+extern _Decimal64 __bid_truncxfdd (XFtype);
+extern _Decimal32 __bid_truncxfsd (XFtype);
+extern _Decimal128 __bid_extendxftd (XFtype);
+#endif
+extern int isinfd32 (_Decimal32);
+extern int isinfd64 (_Decimal64);
+extern int isinfd128 (_Decimal128);
+#endif  /* BID_HAS_GCC_DECIMAL_INTRINSICS */
+
+extern void __dfp_set_round (int);
+extern int __dfp_get_round (void);
+extern void __dfp_clear_except (void);
+extern int __dfp_test_except (int);
+extern void __dfp_raise_except (int);
+
+#if BID_HAS_GCC_DECIMAL_INTRINSICS
+/* Used by gcc intrinsics.  We have to define them after UINT128
+   is defined.  */
+union decimal32 {
+  _Decimal32 d;
+  UINT32 i;
+};
+ 
+union decimal64 {
+  _Decimal64 d;
+  UINT64 i;
+};
+ 
+union decimal128 {
+  _Decimal128 d;
+  UINT128 i;
+};
+ 
+#if BID_HAS_TF_MODE
+union float128 {
+  TFtype f;
+  UINT128 i;
+};
+#endif
+#endif  /* BID_HAS_GCC_DECIMAL_INTRINSICS */
+
+#endif /* _BID_GCC_INTRINSICS_H */
diff --git a/gcc-4.9/libgcc/config/libbid/bid_inline_add.h b/gcc-4.9/libgcc/config/libbid/bid_inline_add.h
new file mode 100644
index 000000000..331e610a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_inline_add.h
@@ -0,0 +1,1253 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *
+ *    Helper add functions (for fma)
+ *
+ *    __BID_INLINE__ UINT64 get_add64(
+ *        UINT64 sign_x, int exponent_x, UINT64 coefficient_x, 
+ *        UINT64 sign_y, int exponent_y, UINT64 coefficient_y, 
+ *  					 int rounding_mode)
+ *
+ *   __BID_INLINE__ UINT64 get_add128(
+ *                       UINT64 sign_x, int exponent_x, UINT64 coefficient_x, 
+ *                       UINT64 sign_y, int final_exponent_y, UINT128 CY, 
+ *                       int extra_digits, int rounding_mode)
+ *
+ *****************************************************************************
+ *
+ *  Algorithm description:
+ *
+ *  get_add64:  same as BID64 add, but arguments are unpacked and there 
+ *                                 are no special case checks
+ *
+ *  get_add128: add 64-bit coefficient to 128-bit product (which contains 
+ *                                        16+extra_digits decimal digits), 
+ *                         return BID64 result
+ *              - the exponents are compared and the two coefficients are 
+ *                properly aligned for addition/subtraction
+ *              - multiple paths are needed
+ *              - final result exponent is calculated and the lower term is
+ *                      rounded first if necessary, to avoid manipulating 
+ *                      coefficients longer than 128 bits 
+ *
+ ****************************************************************************/
+
+#ifndef _INLINE_BID_ADD_H_
+#define _INLINE_BID_ADD_H_
+
+#include "bid_internal.h"
+
+#define MAX_FORMAT_DIGITS     16
+#define DECIMAL_EXPONENT_BIAS 398
+#define MASK_BINARY_EXPONENT  0x7ff0000000000000ull
+#define BINARY_EXPONENT_BIAS  0x3ff
+#define UPPER_EXPON_LIMIT     51
+
+///////////////////////////////////////////////////////////////////////
+//
+// get_add64() is essentially the same as bid_add(), except that 
+//             the arguments are unpacked
+//
+//////////////////////////////////////////////////////////////////////
+__BID_INLINE__ UINT64
+get_add64 (UINT64 sign_x, int exponent_x, UINT64 coefficient_x,
+	   UINT64 sign_y, int exponent_y, UINT64 coefficient_y,
+	   int rounding_mode, unsigned *fpsc) {
+  UINT128 CA, CT, CT_new;
+  UINT64 sign_a, sign_b, coefficient_a, coefficient_b, sign_s, sign_ab,
+    rem_a;
+  UINT64 saved_ca, saved_cb, C0_64, C64, remainder_h, T1, carry, tmp,
+    C64_new;
+  int_double tempx;
+  int exponent_a, exponent_b, diff_dec_expon;
+  int bin_expon_ca, extra_digits, amount, scale_k, scale_ca;
+  unsigned rmode, status;
+
+  // sort arguments by exponent
+  if (exponent_x <= exponent_y) {
+    sign_a = sign_y;
+    exponent_a = exponent_y;
+    coefficient_a = coefficient_y;
+    sign_b = sign_x;
+    exponent_b = exponent_x;
+    coefficient_b = coefficient_x;
+  } else {
+    sign_a = sign_x;
+    exponent_a = exponent_x;
+    coefficient_a = coefficient_x;
+    sign_b = sign_y;
+    exponent_b = exponent_y;
+    coefficient_b = coefficient_y;
+  }
+
+  // exponent difference
+  diff_dec_expon = exponent_a - exponent_b;
+
+  /* get binary coefficients of x and y */
+
+  //--- get number of bits in the coefficients of x and y ---
+
+  tempx.d = (double) coefficient_a;
+  bin_expon_ca = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+
+  if (!coefficient_a) {
+    return get_BID64 (sign_b, exponent_b, coefficient_b, rounding_mode,
+		      fpsc);
+  }
+  if (diff_dec_expon > MAX_FORMAT_DIGITS) {
+    // normalize a to a 16-digit coefficient
+
+    scale_ca = estimate_decimal_digits[bin_expon_ca];
+    if (coefficient_a >= power10_table_128[scale_ca].w[0])
+      scale_ca++;
+
+    scale_k = 16 - scale_ca;
+
+    coefficient_a *= power10_table_128[scale_k].w[0];
+
+    diff_dec_expon -= scale_k;
+    exponent_a -= scale_k;
+
+    /* get binary coefficients of x and y */
+
+    //--- get number of bits in the coefficients of x and y ---
+    tempx.d = (double) coefficient_a;
+    bin_expon_ca = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+
+    if (diff_dec_expon > MAX_FORMAT_DIGITS) {
+#ifdef SET_STATUS_FLAGS
+      if (coefficient_b) {
+	__set_status_flags (fpsc, INEXACT_EXCEPTION);
+      }
+#endif
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (((rounding_mode) & 3) && coefficient_b)	// not ROUNDING_TO_NEAREST
+      {
+	switch (rounding_mode) {
+	case ROUNDING_DOWN:
+	  if (sign_b) {
+	    coefficient_a -= ((((SINT64) sign_a) >> 63) | 1);
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    } else if (coefficient_a >= 10000000000000000ull) {
+	      exponent_a++;
+	      coefficient_a = 1000000000000000ull;
+	    }
+	  }
+	  break;
+	case ROUNDING_UP:
+	  if (!sign_b) {
+	    coefficient_a += ((((SINT64) sign_a) >> 63) | 1);
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    } else if (coefficient_a >= 10000000000000000ull) {
+	      exponent_a++;
+	      coefficient_a = 1000000000000000ull;
+	    }
+	  }
+	  break;
+	default:	// RZ
+	  if (sign_a != sign_b) {
+	    coefficient_a--;
+	    if (coefficient_a < 1000000000000000ull) {
+	      exponent_a--;
+	      coefficient_a = 9999999999999999ull;
+	    }
+	  }
+	  break;
+	}
+      } else
+#endif
+#endif
+	// check special case here
+	if ((coefficient_a == 1000000000000000ull)
+	    && (diff_dec_expon == MAX_FORMAT_DIGITS + 1)
+	    && (sign_a ^ sign_b)
+	    && (coefficient_b > 5000000000000000ull)) {
+	coefficient_a = 9999999999999999ull;
+	exponent_a--;
+      }
+
+      return get_BID64 (sign_a, exponent_a, coefficient_a,
+			rounding_mode, fpsc);
+    }
+  }
+  // test whether coefficient_a*10^(exponent_a-exponent_b)  may exceed 2^62
+  if (bin_expon_ca + estimate_bin_expon[diff_dec_expon] < 60) {
+    // coefficient_a*10^(exponent_a-exponent_b)<2^63
+
+    // multiply by 10^(exponent_a-exponent_b)
+    coefficient_a *= power10_table_128[diff_dec_expon].w[0];
+
+    // sign mask
+    sign_b = ((SINT64) sign_b) >> 63;
+    // apply sign to coeff. of b
+    coefficient_b = (coefficient_b + sign_b) ^ sign_b;
+
+    // apply sign to coefficient a
+    sign_a = ((SINT64) sign_a) >> 63;
+    coefficient_a = (coefficient_a + sign_a) ^ sign_a;
+
+    coefficient_a += coefficient_b;
+    // get sign
+    sign_s = ((SINT64) coefficient_a) >> 63;
+    coefficient_a = (coefficient_a + sign_s) ^ sign_s;
+    sign_s &= 0x8000000000000000ull;
+
+    // coefficient_a < 10^16 ?
+    if (coefficient_a < power10_table_128[MAX_FORMAT_DIGITS].w[0]) {
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rounding_mode == ROUNDING_DOWN && (!coefficient_a)
+	  && sign_a != sign_b)
+	sign_s = 0x8000000000000000ull;
+#endif
+#endif
+      return get_BID64 (sign_s, exponent_b, coefficient_a,
+			rounding_mode, fpsc);
+    }
+    // otherwise rounding is necessary
+
+    // already know coefficient_a<10^19
+    // coefficient_a < 10^17 ?
+    if (coefficient_a < power10_table_128[17].w[0])
+      extra_digits = 1;
+    else if (coefficient_a < power10_table_128[18].w[0])
+      extra_digits = 2;
+    else
+      extra_digits = 3;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rounding_mode;
+    if (sign_s && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+    coefficient_a += round_const_table[rmode][extra_digits];
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_64x64_to_128 (CT, coefficient_a,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+    C64 = CT.w[1] >> amount;
+
+  } else {
+    // coefficient_a*10^(exponent_a-exponent_b) is large
+    sign_s = sign_a;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    rmode = rounding_mode;
+    if (sign_s && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#else
+    rmode = 0;
+#endif
+#else
+    rmode = 0;
+#endif
+
+    // check whether we can take faster path
+    scale_ca = estimate_decimal_digits[bin_expon_ca];
+
+    sign_ab = sign_a ^ sign_b;
+    sign_ab = ((SINT64) sign_ab) >> 63;
+
+    // T1 = 10^(16-diff_dec_expon)
+    T1 = power10_table_128[16 - diff_dec_expon].w[0];
+
+    // get number of digits in coefficient_a
+    //P_ca = power10_table_128[scale_ca].w[0];
+    //P_ca_m1 = power10_table_128[scale_ca-1].w[0];
+    if (coefficient_a >= power10_table_128[scale_ca].w[0]) {
+      scale_ca++;
+      //P_ca_m1 = P_ca;
+      //P_ca = power10_table_128[scale_ca].w[0];
+    }
+
+    scale_k = 16 - scale_ca;
+
+    // apply sign
+    //Ts = (T1 + sign_ab) ^ sign_ab;
+
+    // test range of ca
+    //X = coefficient_a + Ts - P_ca_m1;
+
+    // addition
+    saved_ca = coefficient_a - T1;
+    coefficient_a =
+      (SINT64) saved_ca *(SINT64) power10_table_128[scale_k].w[0];
+    extra_digits = diff_dec_expon - scale_k;
+
+    // apply sign
+    saved_cb = (coefficient_b + sign_ab) ^ sign_ab;
+    // add 10^16 and rounding constant
+    coefficient_b =
+      saved_cb + 10000000000000000ull +
+      round_const_table[rmode][extra_digits];
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_64x64_to_128 (CT, coefficient_b,
+			reciprocals10_64[extra_digits]);
+
+    // now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+    amount = short_recip_scale[extra_digits];
+    C0_64 = CT.w[1] >> amount;
+
+    // result coefficient 
+    C64 = C0_64 + coefficient_a;
+    // filter out difficult (corner) cases
+    // the following test is equivalent to 
+    // ( (initial_coefficient_a + Ts) < P_ca && 
+    //     (initial_coefficient_a + Ts) > P_ca_m1 ), 
+    // which ensures the number of digits in coefficient_a does not change 
+    // after adding (the appropriately scaled and rounded) coefficient_b
+    if ((UINT64) (C64 - 1000000000000000ull - 1) >
+	9000000000000000ull - 2) {
+      if (C64 >= 10000000000000000ull) {
+	// result has more than 16 digits
+	if (!scale_k) {
+	  // must divide coeff_a by 10
+	  saved_ca = saved_ca + T1;
+	  __mul_64x64_to_128 (CA, saved_ca, 0x3333333333333334ull);
+	  //reciprocals10_64[1]);
+	  coefficient_a = CA.w[1] >> 1;
+	  rem_a =
+	    saved_ca - (coefficient_a << 3) - (coefficient_a << 1);
+	  coefficient_a = coefficient_a - T1;
+
+	  saved_cb +=
+	    /*90000000000000000 */ +rem_a *
+	    power10_table_128[diff_dec_expon].w[0];
+	} else
+	  coefficient_a =
+	    (SINT64) (saved_ca - T1 -
+		      (T1 << 3)) * (SINT64) power10_table_128[scale_k -
+							      1].w[0];
+
+	extra_digits++;
+	coefficient_b =
+	  saved_cb + 100000000000000000ull +
+	  round_const_table[rmode][extra_digits];
+
+	// get P*(2^M[extra_digits])/10^extra_digits
+	__mul_64x64_to_128 (CT, coefficient_b,
+			    reciprocals10_64[extra_digits]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+	amount = short_recip_scale[extra_digits];
+	C0_64 = CT.w[1] >> amount;
+
+	// result coefficient 
+	C64 = C0_64 + coefficient_a;
+      } else if (C64 <= 1000000000000000ull) {
+	// less than 16 digits in result
+	coefficient_a =
+	  (SINT64) saved_ca *(SINT64) power10_table_128[scale_k +
+							1].w[0];
+	//extra_digits --;
+	exponent_b--;
+	coefficient_b =
+	  (saved_cb << 3) + (saved_cb << 1) + 100000000000000000ull +
+	  round_const_table[rmode][extra_digits];
+
+	// get P*(2^M[extra_digits])/10^extra_digits
+	__mul_64x64_to_128 (CT_new, coefficient_b,
+			    reciprocals10_64[extra_digits]);
+
+	// now get P/10^extra_digits: shift C64 right by M[extra_digits]-128
+	amount = short_recip_scale[extra_digits];
+	C0_64 = CT_new.w[1] >> amount;
+
+	// result coefficient 
+	C64_new = C0_64 + coefficient_a;
+	if (C64_new < 10000000000000000ull) {
+	  C64 = C64_new;
+#ifdef SET_STATUS_FLAGS
+	  CT = CT_new;
+#endif
+	} else
+	  exponent_b++;
+      }
+
+    }
+
+  }
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+    if (C64 & 1) {
+      // check whether fractional part of initial_P/10^extra_digits 
+      // is exactly .5
+      // this is the same as fractional part of 
+      //      (initial_P + 0.5*10^extra_digits)/10^extra_digits is exactly zero
+
+      // get remainder
+      remainder_h = CT.w[1] << (64 - amount);
+
+      // test whether fractional part is 0
+      if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits])) {
+	C64--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+  status = INEXACT_EXCEPTION;
+
+  // get remainder
+  remainder_h = CT.w[1] << (64 - amount);
+
+  switch (rmode) {
+  case ROUNDING_TO_NEAREST:
+  case ROUNDING_TIES_AWAY:
+    // test whether fractional part is 0
+    if ((remainder_h == 0x8000000000000000ull)
+	&& (CT.w[0] < reciprocals10_64[extra_digits]))
+      status = EXACT_STATUS;
+    break;
+  case ROUNDING_DOWN:
+  case ROUNDING_TO_ZERO:
+    if (!remainder_h && (CT.w[0] < reciprocals10_64[extra_digits]))
+      status = EXACT_STATUS;
+    break;
+  default:
+    // round up
+    __add_carry_out (tmp, carry, CT.w[0],
+		     reciprocals10_64[extra_digits]);
+    if ((remainder_h >> (64 - amount)) + carry >=
+	(((UINT64) 1) << amount))
+      status = EXACT_STATUS;
+    break;
+  }
+  __set_status_flags (fpsc, status);
+
+#endif
+
+  return get_BID64 (sign_s, exponent_b + extra_digits, C64,
+		    rounding_mode, fpsc);
+}
+
+
+///////////////////////////////////////////////////////////////////
+// round 128-bit coefficient and return result in BID64 format
+// do not worry about midpoint cases
+//////////////////////////////////////////////////////////////////
+static UINT64
+__bid_simple_round64_sticky (UINT64 sign, int exponent, UINT128 P,
+			     int extra_digits, int rounding_mode,
+			     unsigned *fpsc) {
+  UINT128 Q_high, Q_low, C128;
+  UINT64 C64;
+  int amount, rmode;
+
+  rmode = rounding_mode;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (sign && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#endif
+#endif
+  __add_128_64 (P, P, round_const_table[rmode][extra_digits]);
+
+  // get P*(2^M[extra_digits])/10^extra_digits
+  __mul_128x128_full (Q_high, Q_low, P,
+		      reciprocals10_128[extra_digits]);
+
+  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+  amount = recip_scale[extra_digits];
+  __shr_128 (C128, Q_high, amount);
+
+  C64 = __low_64 (C128);
+
+#ifdef SET_STATUS_FLAGS
+
+  __set_status_flags (fpsc, INEXACT_EXCEPTION);
+
+#endif
+
+  return get_BID64 (sign, exponent, C64, rounding_mode, fpsc);
+}
+
+///////////////////////////////////////////////////////////////////
+// round 128-bit coefficient and return result in BID64 format
+///////////////////////////////////////////////////////////////////
+static UINT64
+__bid_full_round64 (UINT64 sign, int exponent, UINT128 P,
+		    int extra_digits, int rounding_mode,
+		    unsigned *fpsc) {
+  UINT128 Q_high, Q_low, C128, Stemp, PU;
+  UINT64 remainder_h, C64, carry, CY;
+  int amount, amount2, rmode, status = 0;
+
+  if (exponent < 0) {
+    if (exponent >= -16 && (extra_digits + exponent < 0)) {
+      extra_digits = -exponent;
+#ifdef SET_STATUS_FLAGS
+      if (extra_digits > 0) {
+	rmode = rounding_mode;
+	if (sign && (unsigned) (rmode - 1) < 2)
+	  rmode = 3 - rmode;
+	__add_128_128 (PU, P,
+		       round_const_table_128[rmode][extra_digits]);
+	if (__unsigned_compare_gt_128
+	    (power10_table_128[extra_digits + 15], PU))
+	  status = UNDERFLOW_EXCEPTION;
+      }
+#endif
+    }
+  }
+
+  if (extra_digits > 0) {
+    exponent += extra_digits;
+    rmode = rounding_mode;
+    if (sign && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+    __add_128_128 (P, P, round_const_table_128[rmode][extra_digits]);
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_128x128_full (Q_high, Q_low, P,
+			reciprocals10_128[extra_digits]);
+
+    // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+    amount = recip_scale[extra_digits];
+    __shr_128_long (C128, Q_high, amount);
+
+    C64 = __low_64 (C128);
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+      if (C64 & 1) {
+	// check whether fractional part of initial_P/10^extra_digits 
+	// is exactly .5
+
+	// get remainder
+	amount2 = 64 - amount;
+	remainder_h = 0;
+	remainder_h--;
+	remainder_h >>= amount2;
+	remainder_h = remainder_h & Q_high.w[0];
+
+	if (!remainder_h
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0]))) {
+	  C64--;
+	}
+      }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+    status |= INEXACT_EXCEPTION;
+
+    // get remainder
+    remainder_h = Q_high.w[0] << (64 - amount);
+
+    switch (rmode) {
+    case ROUNDING_TO_NEAREST:
+    case ROUNDING_TIES_AWAY:
+      // test whether fractional part is 0
+      if (remainder_h == 0x8000000000000000ull
+	  && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && Q_low.w[0] <
+		  reciprocals10_128[extra_digits].w[0])))
+	status = EXACT_STATUS;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if (!remainder_h
+	  && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && Q_low.w[0] <
+		  reciprocals10_128[extra_digits].w[0])))
+	status = EXACT_STATUS;
+      break;
+    default:
+      // round up
+      __add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+		       reciprocals10_128[extra_digits].w[0]);
+      __add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			  reciprocals10_128[extra_digits].w[1], CY);
+      if ((remainder_h >> (64 - amount)) + carry >=
+	  (((UINT64) 1) << amount))
+	status = EXACT_STATUS;
+    }
+
+    __set_status_flags (fpsc, status);
+
+#endif
+  } else {
+    C64 = P.w[0];
+    if (!C64) {
+      sign = 0;
+      if (rounding_mode == ROUNDING_DOWN)
+	sign = 0x8000000000000000ull;
+    }
+  }
+  return get_BID64 (sign, exponent, C64, rounding_mode, fpsc);
+}
+
+/////////////////////////////////////////////////////////////////////////////////
+// round 192-bit coefficient (P, remainder_P) and return result in BID64 format
+// the lowest 64 bits (remainder_P) are used for midpoint checking only
+////////////////////////////////////////////////////////////////////////////////
+static UINT64
+__bid_full_round64_remainder (UINT64 sign, int exponent, UINT128 P,
+			      int extra_digits, UINT64 remainder_P,
+			      int rounding_mode, unsigned *fpsc,
+			      unsigned uf_status) {
+  UINT128 Q_high, Q_low, C128, Stemp;
+  UINT64 remainder_h, C64, carry, CY;
+  int amount, amount2, rmode, status = uf_status;
+
+  rmode = rounding_mode;
+  if (sign && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+  if (rmode == ROUNDING_UP && remainder_P) {
+    P.w[0]++;
+    if (!P.w[0])
+      P.w[1]++;
+  }
+
+  if (extra_digits) {
+    __add_128_64 (P, P, round_const_table[rmode][extra_digits]);
+
+    // get P*(2^M[extra_digits])/10^extra_digits
+    __mul_128x128_full (Q_high, Q_low, P,
+			reciprocals10_128[extra_digits]);
+
+    // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+    amount = recip_scale[extra_digits];
+    __shr_128 (C128, Q_high, amount);
+
+    C64 = __low_64 (C128);
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+      if (!remainder_P && (C64 & 1)) {
+	// check whether fractional part of initial_P/10^extra_digits 
+	// is exactly .5
+
+	// get remainder
+	amount2 = 64 - amount;
+	remainder_h = 0;
+	remainder_h--;
+	remainder_h >>= amount2;
+	remainder_h = remainder_h & Q_high.w[0];
+
+	if (!remainder_h
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0]))) {
+	  C64--;
+	}
+      }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+    status |= INEXACT_EXCEPTION;
+
+    if (!remainder_P) {
+      // get remainder
+      remainder_h = Q_high.w[0] << (64 - amount);
+
+      switch (rmode) {
+      case ROUNDING_TO_NEAREST:
+      case ROUNDING_TIES_AWAY:
+	// test whether fractional part is 0
+	if (remainder_h == 0x8000000000000000ull
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      case ROUNDING_DOWN:
+      case ROUNDING_TO_ZERO:
+	if (!remainder_h
+	    && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		|| (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		    && Q_low.w[0] <
+		    reciprocals10_128[extra_digits].w[0])))
+	  status = EXACT_STATUS;
+	break;
+      default:
+	// round up
+	__add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+			 reciprocals10_128[extra_digits].w[0]);
+	__add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			    reciprocals10_128[extra_digits].w[1], CY);
+	if ((remainder_h >> (64 - amount)) + carry >=
+	    (((UINT64) 1) << amount))
+	  status = EXACT_STATUS;
+      }
+    }
+    __set_status_flags (fpsc, status);
+
+#endif
+  } else {
+    C64 = P.w[0];
+#ifdef SET_STATUS_FLAGS
+    if (remainder_P) {
+      __set_status_flags (fpsc, uf_status | INEXACT_EXCEPTION);
+    }
+#endif
+  }
+
+  return get_BID64 (sign, exponent + extra_digits, C64, rounding_mode,
+		    fpsc);
+}
+
+
+///////////////////////////////////////////////////////////////////
+// get P/10^extra_digits
+// result fits in 64 bits
+///////////////////////////////////////////////////////////////////
+__BID_INLINE__ UINT64
+__truncate (UINT128 P, int extra_digits)
+// extra_digits <= 16
+{
+  UINT128 Q_high, Q_low, C128;
+  UINT64 C64;
+  int amount;
+
+  // get P*(2^M[extra_digits])/10^extra_digits
+  __mul_128x128_full (Q_high, Q_low, P,
+		      reciprocals10_128[extra_digits]);
+
+  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+  amount = recip_scale[extra_digits];
+  __shr_128 (C128, Q_high, amount);
+
+  C64 = __low_64 (C128);
+
+  return C64;
+}
+
+
+///////////////////////////////////////////////////////////////////
+// return number of decimal digits in 128-bit value X
+///////////////////////////////////////////////////////////////////
+__BID_INLINE__ int
+__get_dec_digits64 (UINT128 X) {
+  int_double tempx;
+  int digits_x, bin_expon_cx;
+
+  if (!X.w[1]) {
+    //--- get number of bits in the coefficients of x and y ---
+    tempx.d = (double) X.w[0];
+    bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+    // get number of decimal digits in the coeff_x
+    digits_x = estimate_decimal_digits[bin_expon_cx];
+    if (X.w[0] >= power10_table_128[digits_x].w[0])
+      digits_x++;
+    return digits_x;
+  }
+  tempx.d = (double) X.w[1];
+  bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+  // get number of decimal digits in the coeff_x
+  digits_x = estimate_decimal_digits[bin_expon_cx + 64];
+  if (__unsigned_compare_ge_128 (X, power10_table_128[digits_x]))
+    digits_x++;
+
+  return digits_x;
+}
+
+
+////////////////////////////////////////////////////////////////////////////////
+//
+// add 64-bit coefficient to 128-bit coefficient, return result in BID64 format
+//
+////////////////////////////////////////////////////////////////////////////////
+__BID_INLINE__ UINT64
+get_add128 (UINT64 sign_x, int exponent_x, UINT64 coefficient_x,
+	    UINT64 sign_y, int final_exponent_y, UINT128 CY,
+	    int extra_digits, int rounding_mode, unsigned *fpsc) {
+  UINT128 CY_L, CX, FS, F, CT, ST, T2;
+  UINT64 CYh, CY0L, T, S, coefficient_y, remainder_y;
+  SINT64 D = 0;
+  int_double tempx;
+  int diff_dec_expon, extra_digits2, exponent_y, status;
+  int extra_dx, diff_dec2, bin_expon_cx, digits_x, rmode;
+
+  // CY has more than 16 decimal digits
+
+  exponent_y = final_exponent_y - extra_digits;
+
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+  rounding_mode = 0;
+#endif
+#ifdef IEEE_ROUND_NEAREST
+  rounding_mode = 0;
+#endif
+
+  if (exponent_x > exponent_y) {
+    // normalize x
+    //--- get number of bits in the coefficients of x and y ---
+    tempx.d = (double) coefficient_x;
+    bin_expon_cx = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+    // get number of decimal digits in the coeff_x
+    digits_x = estimate_decimal_digits[bin_expon_cx];
+    if (coefficient_x >= power10_table_128[digits_x].w[0])
+      digits_x++;
+
+    extra_dx = 16 - digits_x;
+    coefficient_x *= power10_table_128[extra_dx].w[0];
+    if ((sign_x ^ sign_y) && (coefficient_x == 1000000000000000ull)) {
+      extra_dx++;
+      coefficient_x = 10000000000000000ull;
+    }
+    exponent_x -= extra_dx;
+
+    if (exponent_x > exponent_y) {
+
+      // exponent_x > exponent_y
+      diff_dec_expon = exponent_x - exponent_y;
+
+      if (exponent_x <= final_exponent_y + 1) {
+	__mul_64x64_to_128 (CX, coefficient_x,
+			    power10_table_128[diff_dec_expon].w[0]);
+
+	if (sign_x == sign_y) {
+	  __add_128_128 (CT, CY, CX);
+	  if ((exponent_x >
+	       final_exponent_y) /*&& (final_exponent_y>0) */ )
+	    extra_digits++;
+	  if (__unsigned_compare_ge_128
+	      (CT, power10_table_128[16 + extra_digits]))
+	    extra_digits++;
+	} else {
+	  __sub_128_128 (CT, CY, CX);
+	  if (((SINT64) CT.w[1]) < 0) {
+	    CT.w[0] = 0 - CT.w[0];
+	    CT.w[1] = 0 - CT.w[1];
+	    if (CT.w[0])
+	      CT.w[1]--;
+	    sign_y = sign_x;
+	  } else if (!(CT.w[1] | CT.w[0])) {
+	    sign_y =
+	      (rounding_mode !=
+	       ROUNDING_DOWN) ? 0 : 0x8000000000000000ull;
+	  }
+	  if ((exponent_x + 1 >=
+	       final_exponent_y) /*&& (final_exponent_y>=0) */ ) {
+	    extra_digits = __get_dec_digits64 (CT) - 16;
+	    if (extra_digits <= 0) {
+	      if (!CT.w[0] && rounding_mode == ROUNDING_DOWN)
+		sign_y = 0x8000000000000000ull;
+	      return get_BID64 (sign_y, exponent_y, CT.w[0],
+				rounding_mode, fpsc);
+	    }
+	  } else
+	    if (__unsigned_compare_gt_128
+		(power10_table_128[15 + extra_digits], CT))
+	    extra_digits--;
+	}
+
+	return __bid_full_round64 (sign_y, exponent_y, CT, extra_digits,
+				   rounding_mode, fpsc);
+      }
+      // diff_dec2+extra_digits is the number of digits to eliminate from 
+      //                           argument CY
+      diff_dec2 = exponent_x - final_exponent_y;
+
+      if (diff_dec2 >= 17) {
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+	if ((rounding_mode) & 3) {
+	  switch (rounding_mode) {
+	  case ROUNDING_UP:
+	    if (!sign_y) {
+	      D = ((SINT64) (sign_x ^ sign_y)) >> 63;
+	      D = D + D + 1;
+	      coefficient_x += D;
+	    }
+	    break;
+	  case ROUNDING_DOWN:
+	    if (sign_y) {
+	      D = ((SINT64) (sign_x ^ sign_y)) >> 63;
+	      D = D + D + 1;
+	      coefficient_x += D;
+	    }
+	    break;
+	  case ROUNDING_TO_ZERO:
+	    if (sign_y != sign_x) {
+	      D = 0 - 1;
+	      coefficient_x += D;
+	    }
+	    break;
+	  }
+	  if (coefficient_x < 1000000000000000ull) {
+	    coefficient_x -= D;
+	    coefficient_x =
+	      D + (coefficient_x << 1) + (coefficient_x << 3);
+	    exponent_x--;
+	  }
+	}
+#endif
+#endif
+#ifdef SET_STATUS_FLAGS
+	if (CY.w[1] | CY.w[0])
+	  __set_status_flags (fpsc, INEXACT_EXCEPTION);
+#endif
+	return get_BID64 (sign_x, exponent_x, coefficient_x,
+			  rounding_mode, fpsc);
+      }
+      // here exponent_x <= 16+final_exponent_y
+
+      // truncate CY to 16 dec. digits
+      CYh = __truncate (CY, extra_digits);
+
+      // get remainder
+      T = power10_table_128[extra_digits].w[0];
+      __mul_64x64_to_64 (CY0L, CYh, T);
+
+      remainder_y = CY.w[0] - CY0L;
+
+      // align coeff_x, CYh
+      __mul_64x64_to_128 (CX, coefficient_x,
+			  power10_table_128[diff_dec2].w[0]);
+
+      if (sign_x == sign_y) {
+	__add_128_64 (CT, CX, CYh);
+	if (__unsigned_compare_ge_128
+	    (CT, power10_table_128[16 + diff_dec2]))
+	  diff_dec2++;
+      } else {
+	if (remainder_y)
+	  CYh++;
+	__sub_128_64 (CT, CX, CYh);
+	if (__unsigned_compare_gt_128
+	    (power10_table_128[15 + diff_dec2], CT))
+	  diff_dec2--;
+      }
+
+      return __bid_full_round64_remainder (sign_x, final_exponent_y, CT,
+					   diff_dec2, remainder_y,
+					   rounding_mode, fpsc, 0);
+    }
+  }
+  // Here (exponent_x <= exponent_y)
+  {
+    diff_dec_expon = exponent_y - exponent_x;
+
+    if (diff_dec_expon > MAX_FORMAT_DIGITS) {
+      rmode = rounding_mode;
+
+      if ((sign_x ^ sign_y)) {
+	if (!CY.w[0])
+	  CY.w[1]--;
+	CY.w[0]--;
+	if (__unsigned_compare_gt_128
+	    (power10_table_128[15 + extra_digits], CY)) {
+	  if (rmode & 3) {
+	    extra_digits--;
+	    final_exponent_y--;
+	  } else {
+	    CY.w[0] = 1000000000000000ull;
+	    CY.w[1] = 0;
+	    extra_digits = 0;
+	  }
+	}
+      }
+      __scale128_10 (CY, CY);
+      extra_digits++;
+      CY.w[0] |= 1;
+
+      return __bid_simple_round64_sticky (sign_y, final_exponent_y, CY,
+					  extra_digits, rmode, fpsc);
+    }
+    // apply sign to coeff_x
+    sign_x ^= sign_y;
+    sign_x = ((SINT64) sign_x) >> 63;
+    CX.w[0] = (coefficient_x + sign_x) ^ sign_x;
+    CX.w[1] = sign_x;
+
+    // check whether CY (rounded to 16 digits) and CX have 
+    //                     any digits in the same position
+    diff_dec2 = final_exponent_y - exponent_x;
+
+    if (diff_dec2 <= 17) {
+      // align CY to 10^ex
+      S = power10_table_128[diff_dec_expon].w[0];
+      __mul_64x128_short (CY_L, S, CY);
+
+      __add_128_128 (ST, CY_L, CX);
+      extra_digits2 = __get_dec_digits64 (ST) - 16;
+      return __bid_full_round64 (sign_y, exponent_x, ST, extra_digits2,
+				 rounding_mode, fpsc);
+    }
+    // truncate CY to 16 dec. digits
+    CYh = __truncate (CY, extra_digits);
+
+    // get remainder
+    T = power10_table_128[extra_digits].w[0];
+    __mul_64x64_to_64 (CY0L, CYh, T);
+
+    coefficient_y = CY.w[0] - CY0L;
+    // add rounding constant
+    rmode = rounding_mode;
+    if (sign_y && (unsigned) (rmode - 1) < 2)
+      rmode = 3 - rmode;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (!(rmode & 3))	//ROUNDING_TO_NEAREST
+#endif
+#endif
+    {
+      coefficient_y += round_const_table[rmode][extra_digits];
+    }
+    // align coefficient_y,  coefficient_x
+    S = power10_table_128[diff_dec_expon].w[0];
+    __mul_64x64_to_128 (F, coefficient_y, S);
+
+    // fraction
+    __add_128_128 (FS, F, CX);
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+    {
+      // rounding code, here RN_EVEN
+      // 10^(extra_digits+diff_dec_expon)
+      T2 = power10_table_128[diff_dec_expon + extra_digits];
+      if (__unsigned_compare_gt_128 (FS, T2)
+	  || ((CYh & 1) && __test_equal_128 (FS, T2))) {
+	CYh++;
+	__sub_128_128 (FS, FS, T2);
+      }
+    }
+#endif
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+    if (rmode == 4)	//ROUNDING_TO_NEAREST
+#endif
+    {
+      // rounding code, here RN_AWAY
+      // 10^(extra_digits+diff_dec_expon)
+      T2 = power10_table_128[diff_dec_expon + extra_digits];
+      if (__unsigned_compare_ge_128 (FS, T2)) {
+	CYh++;
+	__sub_128_128 (FS, FS, T2);
+      }
+    }
+#endif
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+    switch (rmode) {
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if ((SINT64) FS.w[1] < 0) {
+	CYh--;
+	if (CYh < 1000000000000000ull) {
+	  CYh = 9999999999999999ull;
+	  final_exponent_y--;
+	}
+      } else {
+	T2 = power10_table_128[diff_dec_expon + extra_digits];
+	if (__unsigned_compare_ge_128 (FS, T2)) {
+	  CYh++;
+	  __sub_128_128 (FS, FS, T2);
+	}
+      }
+      break;
+    case ROUNDING_UP:
+      if ((SINT64) FS.w[1] < 0)
+	break;
+      T2 = power10_table_128[diff_dec_expon + extra_digits];
+      if (__unsigned_compare_gt_128 (FS, T2)) {
+	CYh += 2;
+	__sub_128_128 (FS, FS, T2);
+      } else if ((FS.w[1] == T2.w[1]) && (FS.w[0] == T2.w[0])) {
+	CYh++;
+	FS.w[1] = FS.w[0] = 0;
+      } else if (FS.w[1] | FS.w[0])
+	CYh++;
+      break;
+    }
+#endif
+#endif
+
+#ifdef SET_STATUS_FLAGS
+    status = INEXACT_EXCEPTION;
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+    if (!(rmode & 3))
+#endif
+#endif
+    {
+      // RN modes
+      if ((FS.w[1] ==
+	   round_const_table_128[0][diff_dec_expon + extra_digits].w[1])
+	  && (FS.w[0] ==
+	      round_const_table_128[0][diff_dec_expon +
+				       extra_digits].w[0]))
+	status = EXACT_STATUS;
+    }
+#ifndef IEEE_ROUND_NEAREST
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+    else if (!FS.w[1] && !FS.w[0])
+      status = EXACT_STATUS;
+#endif
+#endif
+
+    __set_status_flags (fpsc, status);
+#endif
+
+    return get_BID64 (sign_y, final_exponent_y, CYh, rounding_mode,
+		      fpsc);
+  }
+
+}
+
+//////////////////////////////////////////////////////////////////////////
+//
+//  If coefficient_z is less than 16 digits long, normalize to 16 digits
+//
+/////////////////////////////////////////////////////////////////////////
+static UINT64
+BID_normalize (UINT64 sign_z, int exponent_z,
+	       UINT64 coefficient_z, UINT64 round_dir, int round_flag,
+	       int rounding_mode, unsigned *fpsc) {
+  SINT64 D;
+  int_double tempx;
+  int digits_z, bin_expon, scale, rmode;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  rmode = rounding_mode;
+  if (sign_z && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#else
+  if (coefficient_z >= power10_table_128[15].w[0])
+    return z;
+#endif
+#endif
+
+  //--- get number of bits in the coefficients of x and y ---
+  tempx.d = (double) coefficient_z;
+  bin_expon = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+  // get number of decimal digits in the coeff_x
+  digits_z = estimate_decimal_digits[bin_expon];
+  if (coefficient_z >= power10_table_128[digits_z].w[0])
+    digits_z++;
+
+  scale = 16 - digits_z;
+  exponent_z -= scale;
+  if (exponent_z < 0) {
+    scale += exponent_z;
+    exponent_z = 0;
+  }
+  coefficient_z *= power10_table_128[scale].w[0];
+
+#ifdef SET_STATUS_FLAGS
+  if (round_flag) {
+    __set_status_flags (fpsc, INEXACT_EXCEPTION);
+    if (coefficient_z < 1000000000000000ull)
+      __set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+    else if ((coefficient_z == 1000000000000000ull) && !exponent_z
+	     && ((SINT64) (round_dir ^ sign_z) < 0) && round_flag
+	     && (rmode == ROUNDING_DOWN || rmode == ROUNDING_TO_ZERO))
+      __set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+  }
+#endif
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (round_flag && (rmode & 3)) {
+    D = round_dir ^ sign_z;
+
+    if (rmode == ROUNDING_UP) {
+      if (D >= 0)
+	coefficient_z++;
+    } else {
+      if (D < 0)
+	coefficient_z--;
+      if (coefficient_z < 1000000000000000ull && exponent_z) {
+	coefficient_z = 9999999999999999ull;
+	exponent_z--;
+      }
+    }
+  }
+#endif
+#endif
+
+  return get_BID64 (sign_z, exponent_z, coefficient_z, rounding_mode,
+		    fpsc);
+}
+
+
+//////////////////////////////////////////////////////////////////////////
+//
+//    0*10^ey + cz*10^ez,   ey<ez  
+//
+//////////////////////////////////////////////////////////////////////////
+
+__BID_INLINE__ UINT64
+add_zero64 (int exponent_y, UINT64 sign_z, int exponent_z,
+	    UINT64 coefficient_z, unsigned *prounding_mode,
+	    unsigned *fpsc) {
+  int_double tempx;
+  int bin_expon, scale_k, scale_cz;
+  int diff_expon;
+
+  diff_expon = exponent_z - exponent_y;
+
+  tempx.d = (double) coefficient_z;
+  bin_expon = ((tempx.i & MASK_BINARY_EXPONENT) >> 52) - 0x3ff;
+  scale_cz = estimate_decimal_digits[bin_expon];
+  if (coefficient_z >= power10_table_128[scale_cz].w[0])
+    scale_cz++;
+
+  scale_k = 16 - scale_cz;
+  if (diff_expon < scale_k)
+    scale_k = diff_expon;
+  coefficient_z *= power10_table_128[scale_k].w[0];
+
+  return get_BID64 (sign_z, exponent_z - scale_k, coefficient_z,
+		    *prounding_mode, fpsc);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_internal.h b/gcc-4.9/libgcc/config/libbid/bid_internal.h
new file mode 100644
index 000000000..71cba9eed
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_internal.h
@@ -0,0 +1,2607 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __BIDECIMAL_H
+#define __BIDECIMAL_H
+
+#include "bid_conf.h"
+#include "bid_functions.h"
+
+#define __BID_INLINE__ static __inline
+
+/*********************************************************************
+ *
+ *      Logical Shift Macros
+ *
+ *********************************************************************/
+
+#define __shr_128(Q, A, k)                        \
+{                                                 \
+     (Q).w[0] = (A).w[0] >> k;                      \
+	 (Q).w[0] |= (A).w[1] << (64-k);               \
+	 (Q).w[1] = (A).w[1] >> k;                    \
+}
+
+#define __shr_128_long(Q, A, k)                   \
+{                                                 \
+	if((k)<64) {                                  \
+     (Q).w[0] = (A).w[0] >> k;                    \
+	 (Q).w[0] |= (A).w[1] << (64-k);              \
+	 (Q).w[1] = (A).w[1] >> k;                    \
+	}                                             \
+	else {                                        \
+	 (Q).w[0] = (A).w[1]>>((k)-64);               \
+	 (Q).w[1] = 0;                                \
+	}                                             \
+}
+
+#define __shl_128_long(Q, A, k)                   \
+{                                                 \
+	if((k)<64) {                                  \
+     (Q).w[1] = (A).w[1] << k;                    \
+	 (Q).w[1] |= (A).w[0] >> (64-k);              \
+	 (Q).w[0] = (A).w[0] << k;                    \
+	}                                             \
+	else {                                        \
+	 (Q).w[1] = (A).w[0]<<((k)-64);               \
+	 (Q).w[0] = 0;                                \
+	}                                             \
+}
+
+#define __low_64(Q)  (Q).w[0]
+/*********************************************************************
+ *
+ *      String Macros
+ *
+ *********************************************************************/
+#define tolower_macro(x) (((unsigned char)((x)-'A')<=('Z'-'A'))?((x)-'A'+'a'):(x))
+/*********************************************************************
+ *
+ *      Compare Macros
+ *
+ *********************************************************************/
+// greater than
+//  return 0 if A<=B
+//  non-zero if A>B
+#define __unsigned_compare_gt_128(A, B)  \
+    ((A.w[1]>B.w[1]) || ((A.w[1]==B.w[1]) && (A.w[0]>B.w[0])))
+// greater-or-equal
+#define __unsigned_compare_ge_128(A, B)  \
+    ((A.w[1]>B.w[1]) || ((A.w[1]==B.w[1]) && (A.w[0]>=B.w[0])))
+#define __test_equal_128(A, B)  (((A).w[1]==(B).w[1]) && ((A).w[0]==(B).w[0]))
+// tighten exponent range
+#define __tight_bin_range_128(bp, P, bin_expon)  \
+{                                                \
+UINT64 M;                                        \
+	M = 1;                                       \
+	(bp) = (bin_expon);                          \
+	if((bp)<63) {                                \
+	  M <<= ((bp)+1);                            \
+	  if((P).w[0] >= M) (bp)++; }                 \
+	else if((bp)>64) {                           \
+	  M <<= ((bp)+1-64);                         \
+	  if(((P).w[1]>M) ||((P).w[1]==M && (P).w[0]))\
+	      (bp)++; }                              \
+	else if((P).w[1]) (bp)++;                    \
+}
+/*********************************************************************
+ *
+ *      Add/Subtract Macros
+ *
+ *********************************************************************/
+// add 64-bit value to 128-bit 
+#define __add_128_64(R128, A128, B64)    \
+{                                        \
+UINT64 R64H;                             \
+	R64H = (A128).w[1];                 \
+	(R128).w[0] = (B64) + (A128).w[0];     \
+	if((R128).w[0] < (B64))               \
+	  R64H ++;                           \
+    (R128).w[1] = R64H;                  \
+}
+// subtract 64-bit value from 128-bit 
+#define __sub_128_64(R128, A128, B64)    \
+{                                        \
+UINT64 R64H;                             \
+	R64H = (A128).w[1];                  \
+	if((A128).w[0] < (B64))               \
+	  R64H --;                           \
+    (R128).w[1] = R64H;                  \
+	(R128).w[0] = (A128).w[0] - (B64);     \
+}
+// add 128-bit value to 128-bit 
+// assume no carry-out
+#define __add_128_128(R128, A128, B128)  \
+{                                        \
+UINT128 Q128;                            \
+	Q128.w[1] = (A128).w[1]+(B128).w[1]; \
+	Q128.w[0] = (B128).w[0] + (A128).w[0];  \
+	if(Q128.w[0] < (B128).w[0])            \
+	  Q128.w[1] ++;                      \
+    (R128).w[1] = Q128.w[1];             \
+    (R128).w[0] = Q128.w[0];               \
+}
+#define __sub_128_128(R128, A128, B128)  \
+{                                        \
+UINT128 Q128;                            \
+	Q128.w[1] = (A128).w[1]-(B128).w[1]; \
+	Q128.w[0] = (A128).w[0] - (B128).w[0];  \
+	if((A128).w[0] < (B128).w[0])          \
+	  Q128.w[1] --;                      \
+    (R128).w[1] = Q128.w[1];             \
+    (R128).w[0] = Q128.w[0];               \
+}
+#define __add_carry_out(S, CY, X, Y)    \
+{                                      \
+UINT64 X1=X;                           \
+	S = X + Y;                         \
+	CY = (S<X1) ? 1 : 0;                \
+}
+#define __add_carry_in_out(S, CY, X, Y, CI)    \
+{                                             \
+UINT64 X1;                                    \
+	X1 = X + CI;                              \
+	S = X1 + Y;                               \
+	CY = ((S<X1) || (X1<CI)) ? 1 : 0;          \
+}
+#define __sub_borrow_out(S, CY, X, Y)    \
+{                                      \
+UINT64 X1=X;                           \
+	S = X - Y;                         \
+	CY = (S>X1) ? 1 : 0;                \
+}
+#define __sub_borrow_in_out(S, CY, X, Y, CI)    \
+{                                             \
+UINT64 X1, X0=X;                              \
+	X1 = X - CI;                              \
+	S = X1 - Y;                               \
+	CY = ((S>X1) || (X1>X0)) ? 1 : 0;          \
+}
+// increment C128 and check for rounding overflow: 
+// if (C_128) = 10^34 then (C_128) = 10^33 and increment the exponent
+#define INCREMENT(C_128, exp)                                           \
+{                                                                       \
+  C_128.w[0]++;                                                         \
+  if (C_128.w[0] == 0) C_128.w[1]++;                                    \
+  if (C_128.w[1] == 0x0001ed09bead87c0ull &&                            \
+      C_128.w[0] == 0x378d8e6400000000ull) {                            \
+    exp++;                                                              \
+    C_128.w[1] = 0x0000314dc6448d93ull;                                 \
+    C_128.w[0] = 0x38c15b0a00000000ull;                                 \
+  }                                                                     \
+}
+// decrement C128 and check for rounding underflow, but only at the
+// boundary: if C_128 = 10^33 - 1 and exp > 0 then C_128 = 10^34 - 1 
+// and decrement the exponent 
+#define DECREMENT(C_128, exp)                                           \
+{                                                                       \
+  C_128.w[0]--;                                                         \
+  if (C_128.w[0] == 0xffffffffffffffffull) C_128.w[1]--;                \
+  if (C_128.w[1] == 0x0000314dc6448d93ull &&                            \
+      C_128.w[0] == 0x38c15b09ffffffffull && exp > 0) {                 \
+    exp--;                                                              \
+    C_128.w[1] = 0x0001ed09bead87c0ull;                                 \
+    C_128.w[0] = 0x378d8e63ffffffffull;                                 \
+  }                                                                     \
+}
+
+ /*********************************************************************
+ *
+ *      Multiply Macros
+ *
+ *********************************************************************/
+#define __mul_64x64_to_64(P64, CX, CY)  (P64) = (CX) * (CY)
+/***************************************
+ *  Signed, Full 64x64-bit Multiply
+ ***************************************/
+#define __imul_64x64_to_128(P, CX, CY)  \
+{                                       \
+UINT64 SX, SY;                          \
+   __mul_64x64_to_128(P, CX, CY);       \
+                                        \
+   SX = ((SINT64)(CX))>>63;             \
+   SY = ((SINT64)(CY))>>63;             \
+   SX &= CY;   SY &= CX;                \
+                                        \
+   (P).w[1] = (P).w[1] - SX - SY;       \
+}
+/***************************************
+ *  Signed, Full 64x128-bit Multiply
+ ***************************************/
+#define __imul_64x128_full(Ph, Ql, A, B)          \
+{                                                 \
+UINT128 ALBL, ALBH, QM2, QM;                      \
+                                                  \
+	__imul_64x64_to_128(ALBH, (A), (B).w[1]);     \
+	__imul_64x64_to_128(ALBL, (A), (B).w[0]);      \
+                                                  \
+	(Ql).w[0] = ALBL.w[0];                          \
+	QM.w[0] = ALBL.w[1];                           \
+	QM.w[1] = ((SINT64)ALBL.w[1])>>63;            \
+    __add_128_128(QM2, ALBH, QM);                 \
+	(Ql).w[1] = QM2.w[0];                          \
+    Ph = QM2.w[1];                                \
+}
+/*****************************************************
+ *      Unsigned Multiply Macros
+ *****************************************************/
+// get full 64x64bit product
+//
+#define __mul_64x64_to_128(P, CX, CY)   \
+{                                       \
+UINT64 CXH, CXL, CYH,CYL,PL,PH,PM,PM2;\
+	CXH = (CX) >> 32;                     \
+	CXL = (UINT32)(CX);                   \
+	CYH = (CY) >> 32;                     \
+	CYL = (UINT32)(CY);                   \
+	                                      \
+    PM = CXH*CYL;                         \
+	PH = CXH*CYH;                         \
+	PL = CXL*CYL;                         \
+	PM2 = CXL*CYH;                        \
+	PH += (PM>>32);                       \
+	PM = (UINT64)((UINT32)PM)+PM2+(PL>>32); \
+                                          \
+	(P).w[1] = PH + (PM>>32);             \
+	(P).w[0] = (PM<<32)+(UINT32)PL;       \
+}
+// get full 64x64bit product
+// Note:
+// This macro is used for CX < 2^61, CY < 2^61
+//
+#define __mul_64x64_to_128_fast(P, CX, CY)   \
+{                                       \
+UINT64 CXH, CXL, CYH, CYL, PL, PH, PM;  \
+	CXH = (CX) >> 32;                   \
+	CXL = (UINT32)(CX);                 \
+	CYH = (CY) >> 32;                   \
+	CYL = (UINT32)(CY);                 \
+	                                    \
+    PM = CXH*CYL;                       \
+	PL = CXL*CYL;                       \
+	PH = CXH*CYH;                       \
+	PM += CXL*CYH;                      \
+	PM += (PL>>32);                     \
+                                        \
+	(P).w[1] = PH + (PM>>32);           \
+	(P).w[0] = (PM<<32)+(UINT32)PL;      \
+}
+// used for CX< 2^60
+#define __sqr64_fast(P, CX)   \
+{                                       \
+UINT64 CXH, CXL, PL, PH, PM;            \
+	CXH = (CX) >> 32;                   \
+	CXL = (UINT32)(CX);                 \
+	                                    \
+    PM = CXH*CXL;                       \
+	PL = CXL*CXL;                       \
+	PH = CXH*CXH;                       \
+	PM += PM;                           \
+	PM += (PL>>32);                     \
+                                        \
+	(P).w[1] = PH + (PM>>32);           \
+	(P).w[0] = (PM<<32)+(UINT32)PL;     \
+}
+// get full 64x64bit product
+// Note:
+// This implementation is used for CX < 2^61, CY < 2^61
+//
+#define __mul_64x64_to_64_high_fast(P, CX, CY)   \
+{                                       \
+UINT64 CXH, CXL, CYH, CYL, PL, PH, PM;  \
+	CXH = (CX) >> 32;                   \
+	CXL = (UINT32)(CX);                 \
+	CYH = (CY) >> 32;                   \
+	CYL = (UINT32)(CY);                 \
+	                                    \
+    PM = CXH*CYL;                       \
+	PL = CXL*CYL;                       \
+	PH = CXH*CYH;                       \
+	PM += CXL*CYH;                      \
+	PM += (PL>>32);                     \
+                                        \
+	(P) = PH + (PM>>32);                \
+}
+// get full 64x64bit product 
+//
+#define __mul_64x64_to_128_full(P, CX, CY)     \
+{                                         \
+UINT64 CXH, CXL, CYH,CYL,PL,PH,PM,PM2;\
+	CXH = (CX) >> 32;                     \
+	CXL = (UINT32)(CX);                   \
+	CYH = (CY) >> 32;                     \
+	CYL = (UINT32)(CY);                   \
+	                                      \
+    PM = CXH*CYL;                         \
+	PH = CXH*CYH;                         \
+	PL = CXL*CYL;                         \
+	PM2 = CXL*CYH;                        \
+	PH += (PM>>32);                       \
+	PM = (UINT64)((UINT32)PM)+PM2+(PL>>32); \
+                                          \
+	(P).w[1] = PH + (PM>>32);             \
+	(P).w[0] = (PM<<32)+(UINT32)PL;        \
+}
+#define __mul_128x128_high(Q, A, B)               \
+{                                                 \
+UINT128 ALBL, ALBH, AHBL, AHBH, QM, QM2;          \
+                                                  \
+	__mul_64x64_to_128(ALBH, (A).w[0], (B).w[1]);  \
+	__mul_64x64_to_128(AHBL, (B).w[0], (A).w[1]);  \
+	__mul_64x64_to_128(ALBL, (A).w[0], (B).w[0]);   \
+	__mul_64x64_to_128(AHBH, (A).w[1],(B).w[1]);  \
+                                                  \
+    __add_128_128(QM, ALBH, AHBL);                \
+    __add_128_64(QM2, QM, ALBL.w[1]);             \
+    __add_128_64((Q), AHBH, QM2.w[1]);            \
+}
+#define __mul_128x128_full(Qh, Ql, A, B)          \
+{                                                 \
+UINT128 ALBL, ALBH, AHBL, AHBH, QM, QM2;          \
+                                                  \
+	__mul_64x64_to_128(ALBH, (A).w[0], (B).w[1]);  \
+	__mul_64x64_to_128(AHBL, (B).w[0], (A).w[1]);  \
+	__mul_64x64_to_128(ALBL, (A).w[0], (B).w[0]);   \
+	__mul_64x64_to_128(AHBH, (A).w[1],(B).w[1]);  \
+                                                  \
+    __add_128_128(QM, ALBH, AHBL);                \
+	(Ql).w[0] = ALBL.w[0];                          \
+    __add_128_64(QM2, QM, ALBL.w[1]);             \
+    __add_128_64((Qh), AHBH, QM2.w[1]);           \
+	(Ql).w[1] = QM2.w[0];                          \
+}
+#define __mul_128x128_low(Ql, A, B)               \
+{                                                 \
+UINT128 ALBL;                                     \
+UINT64 QM64;                                      \
+                                                  \
+	__mul_64x64_to_128(ALBL, (A).w[0], (B).w[0]);   \
+	QM64 = (B).w[0]*(A).w[1] + (A).w[0]*(B).w[1];   \
+                                                  \
+	(Ql).w[0] = ALBL.w[0];                          \
+	(Ql).w[1] = QM64 + ALBL.w[1];                 \
+}
+#define __mul_64x128_low(Ql, A, B)                \
+{                                                 \
+  UINT128 ALBL, ALBH, QM2;                        \
+  __mul_64x64_to_128(ALBH, (A), (B).w[1]);        \
+  __mul_64x64_to_128(ALBL, (A), (B).w[0]);        \
+  (Ql).w[0] = ALBL.w[0];                          \
+  __add_128_64(QM2, ALBH, ALBL.w[1]);             \
+  (Ql).w[1] = QM2.w[0];                           \
+}
+#define __mul_64x128_full(Ph, Ql, A, B)           \
+{                                                 \
+UINT128 ALBL, ALBH, QM2;                          \
+                                                  \
+	__mul_64x64_to_128(ALBH, (A), (B).w[1]);      \
+	__mul_64x64_to_128(ALBL, (A), (B).w[0]);       \
+                                                  \
+	(Ql).w[0] = ALBL.w[0];                          \
+    __add_128_64(QM2, ALBH, ALBL.w[1]);           \
+	(Ql).w[1] = QM2.w[0];                          \
+    Ph = QM2.w[1];                                \
+}
+#define __mul_64x128_to_192(Q, A, B)              \
+{                                                 \
+UINT128 ALBL, ALBH, QM2;                          \
+                                                  \
+	__mul_64x64_to_128(ALBH, (A), (B).w[1]);      \
+	__mul_64x64_to_128(ALBL, (A), (B).w[0]);      \
+                                                  \
+	(Q).w[0] = ALBL.w[0];                         \
+    __add_128_64(QM2, ALBH, ALBL.w[1]);           \
+	(Q).w[1] = QM2.w[0];                          \
+    (Q).w[2] = QM2.w[1];                          \
+}
+#define __mul_64x128_to192(Q, A, B)          \
+{                                             \
+UINT128 ALBL, ALBH, QM2;                      \
+                                              \
+    __mul_64x64_to_128(ALBH, (A), (B).w[1]);  \
+    __mul_64x64_to_128(ALBL, (A), (B).w[0]);  \
+                                              \
+    (Q).w[0] = ALBL.w[0];                    \
+    __add_128_64(QM2, ALBH, ALBL.w[1]);       \
+    (Q).w[1] = QM2.w[0];                     \
+    (Q).w[2] = QM2.w[1];                     \
+}
+#define __mul_128x128_to_256(P256, A, B)                         \
+{                                                                \
+UINT128 Qll, Qlh;                                                \
+UINT64 Phl, Phh, CY1, CY2;                                         \
+                                                                 \
+   __mul_64x128_full(Phl, Qll, A.w[0], B);                       \
+   __mul_64x128_full(Phh, Qlh, A.w[1], B);                       \
+  (P256).w[0] = Qll.w[0];                                        \
+	   __add_carry_out((P256).w[1],CY1, Qlh.w[0], Qll.w[1]);      \
+	   __add_carry_in_out((P256).w[2],CY2, Qlh.w[1], Phl, CY1);    \
+	   (P256).w[3] = Phh + CY2;                                   \
+}
+//
+// For better performance, will check A.w[1] against 0,
+//                         but not B.w[1]
+// Use this macro accordingly
+#define __mul_128x128_to_256_check_A(P256, A, B)                   \
+{                                                                  \
+UINT128 Qll, Qlh;                                                  \
+UINT64 Phl, Phh, CY1, CY2;                                           \
+                                                                   \
+   __mul_64x128_full(Phl, Qll, A.w[0], B);                          \
+  (P256).w[0] = Qll.w[0];                                        \
+   if(A.w[1])  {                                                   \
+	   __mul_64x128_full(Phh, Qlh, A.w[1], B);                     \
+	   __add_carry_out((P256).w[1],CY1, Qlh.w[0], Qll.w[1]);      \
+	   __add_carry_in_out((P256).w[2],CY2, Qlh.w[1], Phl, CY1);   \
+	   (P256).w[3] = Phh + CY2;   }                              \
+   else  {                                                         \
+	   (P256).w[1] = Qll.w[1];                                  \
+	   (P256).w[2] = Phl;                                       \
+	   (P256).w[3] = 0;  }                                      \
+}
+#define __mul_64x192_to_256(lP, lA, lB)                      \
+{                                                         \
+UINT128 lP0,lP1,lP2;                                      \
+UINT64 lC;                                                 \
+	__mul_64x64_to_128(lP0, lA, (lB).w[0]);              \
+	__mul_64x64_to_128(lP1, lA, (lB).w[1]);              \
+	__mul_64x64_to_128(lP2, lA, (lB).w[2]);              \
+	(lP).w[0] = lP0.w[0];                                \
+	__add_carry_out((lP).w[1],lC,lP1.w[0],lP0.w[1]);      \
+	__add_carry_in_out((lP).w[2],lC,lP2.w[0],lP1.w[1],lC); \
+	(lP).w[3] = lP2.w[1] + lC;                           \
+}
+#define __mul_64x256_to_320(P, A, B)                    \
+{                                                       \
+UINT128 lP0,lP1,lP2,lP3;                                \
+UINT64 lC;                                               \
+	__mul_64x64_to_128(lP0, A, (B).w[0]);             \
+	__mul_64x64_to_128(lP1, A, (B).w[1]);             \
+	__mul_64x64_to_128(lP2, A, (B).w[2]);             \
+	__mul_64x64_to_128(lP3, A, (B).w[3]);             \
+	(P).w[0] = lP0.w[0];                               \
+	__add_carry_out((P).w[1],lC,lP1.w[0],lP0.w[1]);      \
+	__add_carry_in_out((P).w[2],lC,lP2.w[0],lP1.w[1],lC); \
+	__add_carry_in_out((P).w[3],lC,lP3.w[0],lP2.w[1],lC); \
+	(P).w[4] = lP3.w[1] + lC;                          \
+}
+#define __mul_192x192_to_384(P, A, B)                          \
+{                                                              \
+UINT256 P0,P1,P2;                                              \
+UINT64 CY;                                                      \
+	__mul_64x192_to_256(P0, (A).w[0], B);                   \
+	__mul_64x192_to_256(P1, (A).w[1], B);                   \
+	__mul_64x192_to_256(P2, (A).w[2], B);                   \
+	(P).w[0] = P0.w[0];                                  \
+	__add_carry_out((P).w[1],CY,P1.w[0],P0.w[1]);      \
+	__add_carry_in_out((P).w[2],CY,P1.w[1],P0.w[2],CY); \
+	__add_carry_in_out((P).w[3],CY,P1.w[2],P0.w[3],CY); \
+	(P).w[4] = P1.w[3] + CY;                              \
+	__add_carry_out((P).w[2],CY,P2.w[0],(P).w[2]);     \
+	__add_carry_in_out((P).w[3],CY,P2.w[1],(P).w[3],CY);   \
+	__add_carry_in_out((P).w[4],CY,P2.w[2],(P).w[4],CY);   \
+	(P).w[5] = P2.w[3] + CY;                              \
+}
+#define __mul_64x320_to_384(P, A, B)                    \
+{                                                       \
+UINT128 lP0,lP1,lP2,lP3,lP4;                            \
+UINT64 lC;                                               \
+	__mul_64x64_to_128(lP0, A, (B).w[0]);             \
+	__mul_64x64_to_128(lP1, A, (B).w[1]);             \
+	__mul_64x64_to_128(lP2, A, (B).w[2]);             \
+	__mul_64x64_to_128(lP3, A, (B).w[3]);             \
+	__mul_64x64_to_128(lP4, A, (B).w[4]);             \
+	(P).w[0] = lP0.w[0];                               \
+	__add_carry_out((P).w[1],lC,lP1.w[0],lP0.w[1]);      \
+	__add_carry_in_out((P).w[2],lC,lP2.w[0],lP1.w[1],lC); \
+	__add_carry_in_out((P).w[3],lC,lP3.w[0],lP2.w[1],lC); \
+	__add_carry_in_out((P).w[4],lC,lP4.w[0],lP3.w[1],lC); \
+	(P).w[5] = lP4.w[1] + lC;                          \
+}
+// A*A
+// Full 128x128-bit product
+#define __sqr128_to_256(P256, A)                                 \
+{                                                                \
+UINT128 Qll, Qlh, Qhh;                                           \
+UINT64 TMP_C1, TMP_C2;                                 \
+                                                                 \
+   __mul_64x64_to_128(Qhh, A.w[1], A.w[1]);                      \
+   __mul_64x64_to_128(Qlh, A.w[0], A.w[1]);                      \
+   Qhh.w[1] += (Qlh.w[1]>>63);                                   \
+   Qlh.w[1] = (Qlh.w[1]+Qlh.w[1])|(Qlh.w[0]>>63);                \
+   Qlh.w[0] += Qlh.w[0];                                         \
+   __mul_64x64_to_128(Qll, A.w[0], A.w[0]);                      \
+                                                                 \
+   __add_carry_out((P256).w[1],TMP_C1, Qlh.w[0], Qll.w[1]);      \
+   (P256).w[0] = Qll.w[0];                                       \
+   __add_carry_in_out((P256).w[2],TMP_C2, Qlh.w[1], Qhh.w[0], TMP_C1);    \
+   (P256).w[3] = Qhh.w[1]+TMP_C2;                                         \
+}
+#define __mul_128x128_to_256_low_high(PQh, PQl, A, B)            \
+{                                                                \
+UINT128 Qll, Qlh;                                                \
+UINT64 Phl, Phh, C1, C2;                                         \
+                                                                 \
+   __mul_64x128_full(Phl, Qll, A.w[0], B);                       \
+   __mul_64x128_full(Phh, Qlh, A.w[1], B);                       \
+  (PQl).w[0] = Qll.w[0];                                        \
+	   __add_carry_out((PQl).w[1],C1, Qlh.w[0], Qll.w[1]);      \
+	   __add_carry_in_out((PQh).w[0],C2, Qlh.w[1], Phl, C1);    \
+	   (PQh).w[1] = Phh + C2;                                   \
+}
+#define __mul_256x256_to_512(P, A, B)                          \
+{                                                              \
+UINT512 P0,P1,P2,P3;                                           \
+UINT64 CY;                                                      \
+	__mul_64x256_to_320(P0, (A).w[0], B);                   \
+	__mul_64x256_to_320(P1, (A).w[1], B);                   \
+	__mul_64x256_to_320(P2, (A).w[2], B);                   \
+	__mul_64x256_to_320(P3, (A).w[3], B);                   \
+	(P).w[0] = P0.w[0];                                  \
+	__add_carry_out((P).w[1],CY,P1.w[0],P0.w[1]);      \
+	__add_carry_in_out((P).w[2],CY,P1.w[1],P0.w[2],CY); \
+	__add_carry_in_out((P).w[3],CY,P1.w[2],P0.w[3],CY); \
+	__add_carry_in_out((P).w[4],CY,P1.w[3],P0.w[4],CY); \
+	(P).w[5] = P1.w[4] + CY;                              \
+	__add_carry_out((P).w[2],CY,P2.w[0],(P).w[2]);     \
+	__add_carry_in_out((P).w[3],CY,P2.w[1],(P).w[3],CY);   \
+	__add_carry_in_out((P).w[4],CY,P2.w[2],(P).w[4],CY);   \
+	__add_carry_in_out((P).w[5],CY,P2.w[3],(P).w[5],CY);   \
+	(P).w[6] = P2.w[4] + CY;                              \
+	__add_carry_out((P).w[3],CY,P3.w[0],(P).w[3]);     \
+	__add_carry_in_out((P).w[4],CY,P3.w[1],(P).w[4],CY);   \
+	__add_carry_in_out((P).w[5],CY,P3.w[2],(P).w[5],CY);   \
+	__add_carry_in_out((P).w[6],CY,P3.w[3],(P).w[6],CY);   \
+	(P).w[7] = P3.w[4] + CY;                              \
+}
+#define __mul_192x256_to_448(P, A, B)                          \
+{                                                              \
+UINT512 P0,P1,P2;                                           \
+UINT64 CY;                                                      \
+	__mul_64x256_to_320(P0, (A).w[0], B);                   \
+	__mul_64x256_to_320(P1, (A).w[1], B);                   \
+	__mul_64x256_to_320(P2, (A).w[2], B);                   \
+	(P).w[0] = P0.w[0];                                  \
+	__add_carry_out((P).w[1],CY,P1.w[0],P0.w[1]);      \
+	__add_carry_in_out((P).w[2],CY,P1.w[1],P0.w[2],CY); \
+	__add_carry_in_out((P).w[3],CY,P1.w[2],P0.w[3],CY); \
+	__add_carry_in_out((P).w[4],CY,P1.w[3],P0.w[4],CY); \
+	(P).w[5] = P1.w[4] + CY;                              \
+	__add_carry_out((P).w[2],CY,P2.w[0],(P).w[2]);     \
+	__add_carry_in_out((P).w[3],CY,P2.w[1],(P).w[3],CY);   \
+	__add_carry_in_out((P).w[4],CY,P2.w[2],(P).w[4],CY);   \
+	__add_carry_in_out((P).w[5],CY,P2.w[3],(P).w[5],CY);   \
+	(P).w[6] = P2.w[4] + CY;                              \
+}
+#define __mul_320x320_to_640(P, A, B)                          \
+{                                                              \
+UINT512 P0,P1,P2,P3;                                           \
+UINT64 CY;                                                     \
+	__mul_256x256_to_512((P), (A), B);                   \
+	__mul_64x256_to_320(P1, (A).w[4], B);                   \
+	__mul_64x256_to_320(P2, (B).w[4], A);                   \
+	__mul_64x64_to_128(P3, (A).w[4], (B).w[4]);               \
+	__add_carry_out((P0).w[0],CY,P1.w[0],P2.w[0]);      \
+	__add_carry_in_out((P0).w[1],CY,P1.w[1],P2.w[1],CY); \
+	__add_carry_in_out((P0).w[2],CY,P1.w[2],P2.w[2],CY); \
+	__add_carry_in_out((P0).w[3],CY,P1.w[3],P2.w[3],CY); \
+	__add_carry_in_out((P0).w[4],CY,P1.w[4],P2.w[4],CY); \
+	P3.w[1] += CY;                                       \
+	__add_carry_out((P).w[4],CY,(P).w[4],P0.w[0]);      \
+	__add_carry_in_out((P).w[5],CY,(P).w[5],P0.w[1],CY); \
+	__add_carry_in_out((P).w[6],CY,(P).w[6],P0.w[2],CY); \
+	__add_carry_in_out((P).w[7],CY,(P).w[7],P0.w[3],CY); \
+	__add_carry_in_out((P).w[8],CY,P3.w[0],P0.w[4],CY); \
+	(P).w[9] = P3.w[1] + CY;                             \
+}
+#define __mul_384x384_to_768(P, A, B)                          \
+{                                                              \
+UINT512 P0,P1,P2,P3;                                           \
+UINT64 CY;                                                     \
+	__mul_320x320_to_640((P), (A), B);                         \
+	__mul_64x320_to_384(P1, (A).w[5], B);                   \
+	__mul_64x320_to_384(P2, (B).w[5], A);                   \
+	__mul_64x64_to_128(P3, (A).w[5], (B).w[5]);               \
+	__add_carry_out((P0).w[0],CY,P1.w[0],P2.w[0]);      \
+	__add_carry_in_out((P0).w[1],CY,P1.w[1],P2.w[1],CY); \
+	__add_carry_in_out((P0).w[2],CY,P1.w[2],P2.w[2],CY); \
+	__add_carry_in_out((P0).w[3],CY,P1.w[3],P2.w[3],CY); \
+	__add_carry_in_out((P0).w[4],CY,P1.w[4],P2.w[4],CY); \
+	__add_carry_in_out((P0).w[5],CY,P1.w[5],P2.w[5],CY); \
+	P3.w[1] += CY;                                       \
+	__add_carry_out((P).w[5],CY,(P).w[5],P0.w[0]);      \
+	__add_carry_in_out((P).w[6],CY,(P).w[6],P0.w[1],CY); \
+	__add_carry_in_out((P).w[7],CY,(P).w[7],P0.w[2],CY); \
+	__add_carry_in_out((P).w[8],CY,(P).w[8],P0.w[3],CY); \
+	__add_carry_in_out((P).w[9],CY,(P).w[9],P0.w[4],CY); \
+	__add_carry_in_out((P).w[10],CY,P3.w[0],P0.w[5],CY); \
+	(P).w[11] = P3.w[1] + CY;                             \
+}
+#define __mul_64x128_short(Ql, A, B)              \
+{                                                 \
+UINT64 ALBH_L;                                    \
+                                                  \
+	__mul_64x64_to_64(ALBH_L, (A),(B).w[1]);      \
+	__mul_64x64_to_128((Ql), (A), (B).w[0]);       \
+                                                  \
+	(Ql).w[1] += ALBH_L;                          \
+}
+#define __scale128_10(D,_TMP)                            \
+{                                                        \
+UINT128 _TMP2,_TMP8;                                     \
+	  _TMP2.w[1] = (_TMP.w[1]<<1)|(_TMP.w[0]>>63);       \
+	  _TMP2.w[0] = _TMP.w[0]<<1;                         \
+	  _TMP8.w[1] = (_TMP.w[1]<<3)|(_TMP.w[0]>>61);       \
+	  _TMP8.w[0] = _TMP.w[0]<<3;                         \
+	  __add_128_128(D, _TMP2, _TMP8);                    \
+}
+// 64x64-bit product
+#define __mul_64x64_to_128MACH(P128, CX64, CY64)  \
+{                                                  \
+  UINT64 CXH,CXL,CYH,CYL,PL,PH,PM,PM2;     \
+  CXH = (CX64) >> 32;                              \
+  CXL = (UINT32)(CX64);                            \
+  CYH = (CY64) >> 32;                              \
+  CYL = (UINT32)(CY64);                            \
+  PM = CXH*CYL;                                    \
+  PH = CXH*CYH;                                    \
+  PL = CXL*CYL;                                    \
+  PM2 = CXL*CYH;                                   \
+  PH += (PM>>32);                                  \
+  PM = (UINT64)((UINT32)PM)+PM2+(PL>>32);          \
+  (P128).w[1] = PH + (PM>>32);                     \
+  (P128).w[0] = (PM<<32)+(UINT32)PL;                \
+}
+// 64x64-bit product
+#define __mul_64x64_to_128HIGH(P64, CX64, CY64)  \
+{                                                  \
+  UINT64 CXH,CXL,CYH,CYL,PL,PH,PM,PM2;     \
+  CXH = (CX64) >> 32;                              \
+  CXL = (UINT32)(CX64);                            \
+  CYH = (CY64) >> 32;                              \
+  CYL = (UINT32)(CY64);                            \
+  PM = CXH*CYL;                                    \
+  PH = CXH*CYH;                                    \
+  PL = CXL*CYL;                                    \
+  PM2 = CXL*CYH;                                   \
+  PH += (PM>>32);                                  \
+  PM = (UINT64)((UINT32)PM)+PM2+(PL>>32);          \
+  P64 = PH + (PM>>32);                     \
+}
+#define __mul_128x64_to_128(Q128, A64, B128)        \
+{                                                  \
+  UINT64 ALBH_L;                                   \
+  ALBH_L = (A64) * (B128).w[1];                    \
+  __mul_64x64_to_128MACH((Q128), (A64), (B128).w[0]);   \
+  (Q128).w[1] += ALBH_L;                           \
+}
+// might simplify by calculating just QM2.w[0]
+#define __mul_64x128_to_128(Ql, A, B)           \
+{                                                 \
+  UINT128 ALBL, ALBH, QM2;                        \
+  __mul_64x64_to_128(ALBH, (A), (B).w[1]);        \
+  __mul_64x64_to_128(ALBL, (A), (B).w[0]);        \
+  (Ql).w[0] = ALBL.w[0];                          \
+  __add_128_64(QM2, ALBH, ALBL.w[1]);             \
+  (Ql).w[1] = QM2.w[0];                           \
+}
+/*********************************************************************
+ *
+ *      BID Pack/Unpack Macros
+ *
+ *********************************************************************/
+/////////////////////////////////////////
+// BID64 definitions
+////////////////////////////////////////
+#define DECIMAL_MAX_EXPON_64  767
+#define DECIMAL_EXPONENT_BIAS 398
+#define MAX_FORMAT_DIGITS     16
+/////////////////////////////////////////
+// BID128 definitions
+////////////////////////////////////////
+#define DECIMAL_MAX_EXPON_128  12287
+#define DECIMAL_EXPONENT_BIAS_128  6176
+#define MAX_FORMAT_DIGITS_128      34
+/////////////////////////////////////////
+// BID32 definitions
+////////////////////////////////////////
+#define DECIMAL_MAX_EXPON_32  191
+#define DECIMAL_EXPONENT_BIAS_32  101
+#define MAX_FORMAT_DIGITS_32      7
+////////////////////////////////////////
+// Constant Definitions
+///////////////////////////////////////
+#define SPECIAL_ENCODING_MASK64 0x6000000000000000ull
+#define INFINITY_MASK64         0x7800000000000000ull
+#define SINFINITY_MASK64        0xf800000000000000ull
+#define SSNAN_MASK64            0xfc00000000000000ull
+#define NAN_MASK64              0x7c00000000000000ull
+#define SNAN_MASK64             0x7e00000000000000ull
+#define QUIET_MASK64            0xfdffffffffffffffull
+#define LARGE_COEFF_MASK64      0x0007ffffffffffffull
+#define LARGE_COEFF_HIGH_BIT64  0x0020000000000000ull
+#define SMALL_COEFF_MASK64      0x001fffffffffffffull
+#define EXPONENT_MASK64         0x3ff
+#define EXPONENT_SHIFT_LARGE64  51
+#define EXPONENT_SHIFT_SMALL64  53
+#define LARGEST_BID64           0x77fb86f26fc0ffffull
+#define SMALLEST_BID64          0xf7fb86f26fc0ffffull
+#define SMALL_COEFF_MASK128     0x0001ffffffffffffull
+#define LARGE_COEFF_MASK128     0x00007fffffffffffull
+#define EXPONENT_MASK128        0x3fff
+#define LARGEST_BID128_HIGH     0x5fffed09bead87c0ull
+#define LARGEST_BID128_LOW      0x378d8e63ffffffffull
+#define SPECIAL_ENCODING_MASK32 0x60000000ul
+#define INFINITY_MASK32         0x78000000ul
+#define LARGE_COEFF_MASK32      0x007ffffful
+#define LARGE_COEFF_HIGH_BIT32  0x00800000ul
+#define SMALL_COEFF_MASK32      0x001ffffful
+#define EXPONENT_MASK32         0xff
+#define LARGEST_BID32           0x77f8967f
+#define NAN_MASK32              0x7c000000
+#define SNAN_MASK32             0x7e000000
+#define MASK_BINARY_EXPONENT  0x7ff0000000000000ull
+#define BINARY_EXPONENT_BIAS  0x3ff
+#define UPPER_EXPON_LIMIT     51
+// data needed for BID pack/unpack macros
+extern UINT64 round_const_table[][19];
+extern UINT128 reciprocals10_128[];
+extern int recip_scale[];
+extern UINT128 power10_table_128[];
+extern int estimate_decimal_digits[];
+extern int estimate_bin_expon[];
+extern UINT64 power10_index_binexp[];
+extern int short_recip_scale[];
+extern UINT64 reciprocals10_64[];
+extern UINT128 power10_index_binexp_128[];
+extern UINT128 round_const_table_128[][36];
+
+
+//////////////////////////////////////////////
+//  Status Flag Handling
+/////////////////////////////////////////////
+#define __set_status_flags(fpsc, status)  *(fpsc) |= status
+#define is_inexact(fpsc)  ((*(fpsc))&INEXACT_EXCEPTION)
+
+__BID_INLINE__ UINT64
+unpack_BID64 (UINT64 * psign_x, int *pexponent_x,
+	      UINT64 * pcoefficient_x, UINT64 x) {
+  UINT64 tmp, coeff;
+
+  *psign_x = x & 0x8000000000000000ull;
+
+  if ((x & SPECIAL_ENCODING_MASK64) == SPECIAL_ENCODING_MASK64) {
+    // special encodings
+    // coefficient
+    coeff = (x & LARGE_COEFF_MASK64) | LARGE_COEFF_HIGH_BIT64;
+
+    if ((x & INFINITY_MASK64) == INFINITY_MASK64) {
+      *pexponent_x = 0;
+      *pcoefficient_x = x & 0xfe03ffffffffffffull;
+      if ((x & 0x0003ffffffffffffull) >= 1000000000000000ull)
+	*pcoefficient_x = x & 0xfe00000000000000ull;
+      if ((x & NAN_MASK64) == INFINITY_MASK64)
+	*pcoefficient_x = x & SINFINITY_MASK64;
+      return 0;	// NaN or Infinity
+    }
+    // check for non-canonical values
+    if (coeff >= 10000000000000000ull)
+      coeff = 0;
+    *pcoefficient_x = coeff;
+    // get exponent
+    tmp = x >> EXPONENT_SHIFT_LARGE64;
+    *pexponent_x = (int) (tmp & EXPONENT_MASK64);
+    return coeff;
+  }
+  // exponent
+  tmp = x >> EXPONENT_SHIFT_SMALL64;
+  *pexponent_x = (int) (tmp & EXPONENT_MASK64);
+  // coefficient
+  *pcoefficient_x = (x & SMALL_COEFF_MASK64);
+
+  return *pcoefficient_x;
+}
+
+//
+//   BID64 pack macro (general form)
+//
+__BID_INLINE__ UINT64
+get_BID64 (UINT64 sgn, int expon, UINT64 coeff, int rmode,
+	   unsigned *fpsc) {
+  UINT128 Stemp, Q_low;
+  UINT64 QH, r, mask, C64, remainder_h, CY, carry;
+  int extra_digits, amount, amount2;
+  unsigned status;
+
+  if (coeff > 9999999999999999ull) {
+    expon++;
+    coeff = 1000000000000000ull;
+  }
+  // check for possible underflow/overflow
+  if (((unsigned) expon) >= 3 * 256) {
+    if (expon < 0) {
+      // underflow
+      if (expon + MAX_FORMAT_DIGITS < 0) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (fpsc,
+			    UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+	if (rmode == ROUNDING_DOWN && sgn)
+	  return 0x8000000000000001ull;
+	if (rmode == ROUNDING_UP && !sgn)
+	  return 1ull;
+#endif
+#endif
+	// result is 0
+	return sgn;
+      }
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (sgn && (unsigned) (rmode - 1) < 2)
+	rmode = 3 - rmode;
+#endif
+#endif
+      // get digits to be shifted out
+      extra_digits = -expon;
+      coeff += round_const_table[rmode][extra_digits];
+
+      // get coeff*(2^M[extra_digits])/10^extra_digits
+      __mul_64x128_full (QH, Q_low, coeff,
+			 reciprocals10_128[extra_digits]);
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[extra_digits];
+
+      C64 = QH >> amount;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+	if (C64 & 1) {
+	  // check whether fractional part of initial_P/10^extra_digits is exactly .5
+
+	  // get remainder
+	  amount2 = 64 - amount;
+	  remainder_h = 0;
+	  remainder_h--;
+	  remainder_h >>= amount2;
+	  remainder_h = remainder_h & QH;
+
+	  if (!remainder_h
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0]))) {
+	    C64--;
+	  }
+	}
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+      if (is_inexact (fpsc))
+	__set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+      else {
+	status = INEXACT_EXCEPTION;
+	// get remainder
+	remainder_h = QH << (64 - amount);
+
+	switch (rmode) {
+	case ROUNDING_TO_NEAREST:
+	case ROUNDING_TIES_AWAY:
+	  // test whether fractional part is 0
+	  if (remainder_h == 0x8000000000000000ull
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0])))
+	    status = EXACT_STATUS;
+	  break;
+	case ROUNDING_DOWN:
+	case ROUNDING_TO_ZERO:
+	  if (!remainder_h
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0])))
+	    status = EXACT_STATUS;
+	  break;
+	default:
+	  // round up
+	  __add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+			   reciprocals10_128[extra_digits].w[0]);
+	  __add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			      reciprocals10_128[extra_digits].w[1], CY);
+	  if ((remainder_h >> (64 - amount)) + carry >=
+	      (((UINT64) 1) << amount))
+	    status = EXACT_STATUS;
+	}
+
+	if (status != EXACT_STATUS)
+	  __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+      }
+
+#endif
+
+      return sgn | C64;
+    }
+    while (coeff < 1000000000000000ull && expon >= 3 * 256) {
+      expon--;
+      coeff = (coeff << 3) + (coeff << 1);
+    }
+    if (expon > DECIMAL_MAX_EXPON_64) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (fpsc, OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+      // overflow
+      r = sgn | INFINITY_MASK64;
+      switch (rmode) {
+      case ROUNDING_DOWN:
+	if (!sgn)
+	  r = LARGEST_BID64;
+	break;
+      case ROUNDING_TO_ZERO:
+	r = sgn | LARGEST_BID64;
+	break;
+      case ROUNDING_UP:
+	// round up
+	if (sgn)
+	  r = SMALLEST_BID64;
+      }
+      return r;
+    }
+  }
+
+  mask = 1;
+  mask <<= EXPONENT_SHIFT_SMALL64;
+
+  // check whether coefficient fits in 10*5+3 bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (coeff | sgn);
+    return r;
+  }
+  // special format
+
+  // eliminate the case coeff==10^16 after rounding
+  if (coeff == 10000000000000000ull) {
+    r = expon + 1;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (1000000000000000ull | sgn);
+    return r;
+  }
+
+  r = expon;
+  r <<= EXPONENT_SHIFT_LARGE64;
+  r |= (sgn | SPECIAL_ENCODING_MASK64);
+  // add coeff, without leading bits
+  mask = (mask >> 2) - 1;
+  coeff &= mask;
+  r |= coeff;
+
+  return r;
+}
+
+
+
+
+//
+//   No overflow/underflow checking 
+//
+__BID_INLINE__ UINT64
+fast_get_BID64 (UINT64 sgn, int expon, UINT64 coeff) {
+  UINT64 r, mask;
+
+  mask = 1;
+  mask <<= EXPONENT_SHIFT_SMALL64;
+
+  // check whether coefficient fits in 10*5+3 bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (coeff | sgn);
+    return r;
+  }
+  // special format
+
+  // eliminate the case coeff==10^16 after rounding
+  if (coeff == 10000000000000000ull) {
+    r = expon + 1;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (1000000000000000ull | sgn);
+    return r;
+  }
+
+  r = expon;
+  r <<= EXPONENT_SHIFT_LARGE64;
+  r |= (sgn | SPECIAL_ENCODING_MASK64);
+  // add coeff, without leading bits
+  mask = (mask >> 2) - 1;
+  coeff &= mask;
+  r |= coeff;
+
+  return r;
+}
+
+
+//
+//   no underflow checking
+//
+__BID_INLINE__ UINT64
+fast_get_BID64_check_OF (UINT64 sgn, int expon, UINT64 coeff, int rmode,
+			 unsigned *fpsc) {
+  UINT64 r, mask;
+
+  if (((unsigned) expon) >= 3 * 256 - 1) {
+    if ((expon == 3 * 256 - 1) && coeff == 10000000000000000ull) {
+      expon = 3 * 256;
+      coeff = 1000000000000000ull;
+    }
+
+    if (((unsigned) expon) >= 3 * 256) {
+      while (coeff < 1000000000000000ull && expon >= 3 * 256) {
+	expon--;
+	coeff = (coeff << 3) + (coeff << 1);
+      }
+      if (expon > DECIMAL_MAX_EXPON_64) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (fpsc,
+			    OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+	// overflow
+	r = sgn | INFINITY_MASK64;
+	switch (rmode) {
+	case ROUNDING_DOWN:
+	  if (!sgn)
+	    r = LARGEST_BID64;
+	  break;
+	case ROUNDING_TO_ZERO:
+	  r = sgn | LARGEST_BID64;
+	  break;
+	case ROUNDING_UP:
+	  // round up
+	  if (sgn)
+	    r = SMALLEST_BID64;
+	}
+	return r;
+      }
+    }
+  }
+
+  mask = 1;
+  mask <<= EXPONENT_SHIFT_SMALL64;
+
+  // check whether coefficient fits in 10*5+3 bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (coeff | sgn);
+    return r;
+  }
+  // special format
+
+  // eliminate the case coeff==10^16 after rounding
+  if (coeff == 10000000000000000ull) {
+    r = expon + 1;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (1000000000000000ull | sgn);
+    return r;
+  }
+
+  r = expon;
+  r <<= EXPONENT_SHIFT_LARGE64;
+  r |= (sgn | SPECIAL_ENCODING_MASK64);
+  // add coeff, without leading bits
+  mask = (mask >> 2) - 1;
+  coeff &= mask;
+  r |= coeff;
+
+  return r;
+}
+
+
+//
+//   No overflow/underflow checking 
+//   or checking for coefficients equal to 10^16 (after rounding)
+//
+__BID_INLINE__ UINT64
+very_fast_get_BID64 (UINT64 sgn, int expon, UINT64 coeff) {
+  UINT64 r, mask;
+
+  mask = 1;
+  mask <<= EXPONENT_SHIFT_SMALL64;
+
+  // check whether coefficient fits in 10*5+3 bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= EXPONENT_SHIFT_SMALL64;
+    r |= (coeff | sgn);
+    return r;
+  }
+  // special format
+  r = expon;
+  r <<= EXPONENT_SHIFT_LARGE64;
+  r |= (sgn | SPECIAL_ENCODING_MASK64);
+  // add coeff, without leading bits
+  mask = (mask >> 2) - 1;
+  coeff &= mask;
+  r |= coeff;
+
+  return r;
+}
+
+//
+//   No overflow/underflow checking or checking for coefficients above 2^53
+//
+__BID_INLINE__ UINT64
+very_fast_get_BID64_small_mantissa (UINT64 sgn, int expon, UINT64 coeff) {
+  // no UF/OF
+  UINT64 r;
+
+  r = expon;
+  r <<= EXPONENT_SHIFT_SMALL64;
+  r |= (coeff | sgn);
+  return r;
+}
+
+
+//
+// This pack macro is used when underflow is known to occur
+//
+__BID_INLINE__ UINT64
+get_BID64_UF (UINT64 sgn, int expon, UINT64 coeff, UINT64 R, int rmode,
+	      unsigned *fpsc) {
+  UINT128 C128, Q_low, Stemp;
+  UINT64 C64, remainder_h, QH, carry, CY;
+  int extra_digits, amount, amount2;
+  unsigned status;
+
+  // underflow
+  if (expon + MAX_FORMAT_DIGITS < 0) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if (rmode == ROUNDING_DOWN && sgn)
+      return 0x8000000000000001ull;
+    if (rmode == ROUNDING_UP && !sgn)
+      return 1ull;
+#endif
+#endif
+    // result is 0
+    return sgn;
+  }
+  // 10*coeff
+  coeff = (coeff << 3) + (coeff << 1);
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (sgn && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#endif
+#endif
+  if (R)
+    coeff |= 1;
+  // get digits to be shifted out
+  extra_digits = 1 - expon;
+  C128.w[0] = coeff + round_const_table[rmode][extra_digits];
+
+  // get coeff*(2^M[extra_digits])/10^extra_digits
+  __mul_64x128_full (QH, Q_low, C128.w[0],
+		     reciprocals10_128[extra_digits]);
+
+  // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+  amount = recip_scale[extra_digits];
+
+  C64 = QH >> amount;
+  //__shr_128(C128, Q_high, amount); 
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+    if (C64 & 1) {
+      // check whether fractional part of initial_P/10^extra_digits is exactly .5
+
+      // get remainder
+      amount2 = 64 - amount;
+      remainder_h = 0;
+      remainder_h--;
+      remainder_h >>= amount2;
+      remainder_h = remainder_h & QH;
+
+      if (!remainder_h
+	  && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && Q_low.w[0] <
+		  reciprocals10_128[extra_digits].w[0]))) {
+	C64--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+  if (is_inexact (fpsc))
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+  else {
+    status = INEXACT_EXCEPTION;
+    // get remainder
+    remainder_h = QH << (64 - amount);
+
+    switch (rmode) {
+    case ROUNDING_TO_NEAREST:
+    case ROUNDING_TIES_AWAY:
+      // test whether fractional part is 0
+      if (remainder_h == 0x8000000000000000ull
+	  && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && Q_low.w[0] <
+		  reciprocals10_128[extra_digits].w[0])))
+	status = EXACT_STATUS;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if (!remainder_h
+	  && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+	      || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		  && Q_low.w[0] <
+		  reciprocals10_128[extra_digits].w[0])))
+	status = EXACT_STATUS;
+      break;
+    default:
+      // round up
+      __add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+		       reciprocals10_128[extra_digits].w[0]);
+      __add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			  reciprocals10_128[extra_digits].w[1], CY);
+      if ((remainder_h >> (64 - amount)) + carry >=
+	  (((UINT64) 1) << amount))
+	status = EXACT_STATUS;
+    }
+
+    if (status != EXACT_STATUS)
+      __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+  }
+
+#endif
+
+  return sgn | C64;
+
+}
+
+
+
+//
+//   This pack macro doesnot check for coefficients above 2^53 
+//
+__BID_INLINE__ UINT64
+get_BID64_small_mantissa (UINT64 sgn, int expon, UINT64 coeff,
+			  int rmode, unsigned *fpsc) {
+  UINT128 C128, Q_low, Stemp;
+  UINT64 r, mask, C64, remainder_h, QH, carry, CY;
+  int extra_digits, amount, amount2;
+  unsigned status;
+
+  // check for possible underflow/overflow
+  if (((unsigned) expon) >= 3 * 256) {
+    if (expon < 0) {
+      // underflow
+      if (expon + MAX_FORMAT_DIGITS < 0) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (fpsc,
+			    UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+	if (rmode == ROUNDING_DOWN && sgn)
+	  return 0x8000000000000001ull;
+	if (rmode == ROUNDING_UP && !sgn)
+	  return 1ull;
+#endif
+#endif
+	// result is 0
+	return sgn;
+      }
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (sgn && (unsigned) (rmode - 1) < 2)
+	rmode = 3 - rmode;
+#endif
+#endif
+      // get digits to be shifted out
+      extra_digits = -expon;
+      C128.w[0] = coeff + round_const_table[rmode][extra_digits];
+
+      // get coeff*(2^M[extra_digits])/10^extra_digits
+      __mul_64x128_full (QH, Q_low, C128.w[0],
+			 reciprocals10_128[extra_digits]);
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = recip_scale[extra_digits];
+
+      C64 = QH >> amount;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+	if (C64 & 1) {
+	  // check whether fractional part of initial_P/10^extra_digits is exactly .5
+
+	  // get remainder
+	  amount2 = 64 - amount;
+	  remainder_h = 0;
+	  remainder_h--;
+	  remainder_h >>= amount2;
+	  remainder_h = remainder_h & QH;
+
+	  if (!remainder_h
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0]))) {
+	    C64--;
+	  }
+	}
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+      if (is_inexact (fpsc))
+	__set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+      else {
+	status = INEXACT_EXCEPTION;
+	// get remainder
+	remainder_h = QH << (64 - amount);
+
+	switch (rmode) {
+	case ROUNDING_TO_NEAREST:
+	case ROUNDING_TIES_AWAY:
+	  // test whether fractional part is 0
+	  if (remainder_h == 0x8000000000000000ull
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0])))
+	    status = EXACT_STATUS;
+	  break;
+	case ROUNDING_DOWN:
+	case ROUNDING_TO_ZERO:
+	  if (!remainder_h
+	      && (Q_low.w[1] < reciprocals10_128[extra_digits].w[1]
+		  || (Q_low.w[1] == reciprocals10_128[extra_digits].w[1]
+		      && Q_low.w[0] <
+		      reciprocals10_128[extra_digits].w[0])))
+	    status = EXACT_STATUS;
+	  break;
+	default:
+	  // round up
+	  __add_carry_out (Stemp.w[0], CY, Q_low.w[0],
+			   reciprocals10_128[extra_digits].w[0]);
+	  __add_carry_in_out (Stemp.w[1], carry, Q_low.w[1],
+			      reciprocals10_128[extra_digits].w[1], CY);
+	  if ((remainder_h >> (64 - amount)) + carry >=
+	      (((UINT64) 1) << amount))
+	    status = EXACT_STATUS;
+	}
+
+	if (status != EXACT_STATUS)
+	  __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+      }
+
+#endif
+
+      return sgn | C64;
+    }
+
+    while (coeff < 1000000000000000ull && expon >= 3 * 256) {
+      expon--;
+      coeff = (coeff << 3) + (coeff << 1);
+    }
+    if (expon > DECIMAL_MAX_EXPON_64) {
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (fpsc, OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+      // overflow
+      r = sgn | INFINITY_MASK64;
+      switch (rmode) {
+      case ROUNDING_DOWN:
+	if (!sgn)
+	  r = LARGEST_BID64;
+	break;
+      case ROUNDING_TO_ZERO:
+	r = sgn | LARGEST_BID64;
+	break;
+      case ROUNDING_UP:
+	// round up
+	if (sgn)
+	  r = SMALLEST_BID64;
+      }
+      return r;
+    } else {
+      mask = 1;
+      mask <<= EXPONENT_SHIFT_SMALL64;
+      if (coeff >= mask) {
+	r = expon;
+	r <<= EXPONENT_SHIFT_LARGE64;
+	r |= (sgn | SPECIAL_ENCODING_MASK64);
+	// add coeff, without leading bits
+	mask = (mask >> 2) - 1;
+	coeff &= mask;
+	r |= coeff;
+	return r;
+      }
+    }
+  }
+
+  r = expon;
+  r <<= EXPONENT_SHIFT_SMALL64;
+  r |= (coeff | sgn);
+
+  return r;
+}
+
+
+/*****************************************************************************
+*
+*    BID128 pack/unpack macros
+*
+*****************************************************************************/
+
+//
+//   Macro for handling BID128 underflow
+//         sticky bit given as additional argument
+//
+__BID_INLINE__ UINT128 *
+handle_UF_128_rem (UINT128 * pres, UINT64 sgn, int expon, UINT128 CQ,
+		   UINT64 R, unsigned *prounding_mode, unsigned *fpsc) {
+  UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1, CQ2, CQ8;
+  UINT64 carry, CY;
+  int ed2, amount;
+  unsigned rmode, status;
+
+  // UF occurs
+  if (expon + MAX_FORMAT_DIGITS_128 < 0) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+    pres->w[1] = sgn;
+    pres->w[0] = 0;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if ((sgn && *prounding_mode == ROUNDING_DOWN)
+	|| (!sgn && *prounding_mode == ROUNDING_UP))
+      pres->w[0] = 1ull;
+#endif
+#endif
+    return pres;
+  }
+  // CQ *= 10
+  CQ2.w[1] = (CQ.w[1] << 1) | (CQ.w[0] >> 63);
+  CQ2.w[0] = CQ.w[0] << 1;
+  CQ8.w[1] = (CQ.w[1] << 3) | (CQ.w[0] >> 61);
+  CQ8.w[0] = CQ.w[0] << 3;
+  __add_128_128 (CQ, CQ2, CQ8);
+
+  // add remainder
+  if (R)
+    CQ.w[0] |= 1;
+
+  ed2 = 1 - expon;
+  // add rounding constant to CQ
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  rmode = *prounding_mode;
+  if (sgn && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#else
+  rmode = 0;
+#endif
+#else
+  rmode = 0;
+#endif
+  T128 = round_const_table_128[rmode][ed2];
+  __add_carry_out (CQ.w[0], carry, T128.w[0], CQ.w[0]);
+  CQ.w[1] = CQ.w[1] + T128.w[1] + carry;
+
+  TP128 = reciprocals10_128[ed2];
+  __mul_128x128_full (Qh, Ql, CQ, TP128);
+  amount = recip_scale[ed2];
+
+  if (amount >= 64) {
+    CQ.w[0] = Qh.w[1] >> (amount - 64);
+    CQ.w[1] = 0;
+  } else {
+    __shr_128 (CQ, Qh, amount);
+  }
+
+  expon = 0;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (!(*prounding_mode))
+#endif
+    if (CQ.w[0] & 1) {
+      // check whether fractional part of initial_P/10^ed1 is exactly .5
+
+      // get remainder
+      __shl_128_long (Qh1, Qh, (128 - amount));
+
+      if (!Qh1.w[1] && !Qh1.w[0]
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0]))) {
+	CQ.w[0]--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+  if (is_inexact (fpsc))
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+  else {
+    status = INEXACT_EXCEPTION;
+    // get remainder
+    __shl_128_long (Qh1, Qh, (128 - amount));
+
+    switch (rmode) {
+    case ROUNDING_TO_NEAREST:
+    case ROUNDING_TIES_AWAY:
+      // test whether fractional part is 0
+      if (Qh1.w[1] == 0x8000000000000000ull && (!Qh1.w[0])
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0])))
+	status = EXACT_STATUS;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if ((!Qh1.w[1]) && (!Qh1.w[0])
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0])))
+	status = EXACT_STATUS;
+      break;
+    default:
+      // round up
+      __add_carry_out (Stemp.w[0], CY, Ql.w[0],
+		       reciprocals10_128[ed2].w[0]);
+      __add_carry_in_out (Stemp.w[1], carry, Ql.w[1],
+			  reciprocals10_128[ed2].w[1], CY);
+      __shr_128_long (Qh, Qh1, (128 - amount));
+      Tmp.w[0] = 1;
+      Tmp.w[1] = 0;
+      __shl_128_long (Tmp1, Tmp, amount);
+      Qh.w[0] += carry;
+      if (Qh.w[0] < carry)
+	Qh.w[1]++;
+      if (__unsigned_compare_ge_128 (Qh, Tmp1))
+	status = EXACT_STATUS;
+    }
+
+    if (status != EXACT_STATUS)
+      __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+  }
+
+#endif
+
+  pres->w[1] = sgn | CQ.w[1];
+  pres->w[0] = CQ.w[0];
+
+  return pres;
+
+}
+
+
+//
+//   Macro for handling BID128 underflow
+//
+__BID_INLINE__ UINT128 *
+handle_UF_128 (UINT128 * pres, UINT64 sgn, int expon, UINT128 CQ,
+	       unsigned *prounding_mode, unsigned *fpsc) {
+  UINT128 T128, TP128, Qh, Ql, Qh1, Stemp, Tmp, Tmp1;
+  UINT64 carry, CY;
+  int ed2, amount;
+  unsigned rmode, status;
+
+  // UF occurs
+  if (expon + MAX_FORMAT_DIGITS_128 < 0) {
+#ifdef SET_STATUS_FLAGS
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+    pres->w[1] = sgn;
+    pres->w[0] = 0;
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+    if ((sgn && *prounding_mode == ROUNDING_DOWN)
+	|| (!sgn && *prounding_mode == ROUNDING_UP))
+      pres->w[0] = 1ull;
+#endif
+#endif
+    return pres;
+  }
+
+  ed2 = 0 - expon;
+  // add rounding constant to CQ
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  rmode = *prounding_mode;
+  if (sgn && (unsigned) (rmode - 1) < 2)
+    rmode = 3 - rmode;
+#else
+  rmode = 0;
+#endif
+#else
+  rmode = 0;
+#endif
+
+  T128 = round_const_table_128[rmode][ed2];
+  __add_carry_out (CQ.w[0], carry, T128.w[0], CQ.w[0]);
+  CQ.w[1] = CQ.w[1] + T128.w[1] + carry;
+
+  TP128 = reciprocals10_128[ed2];
+  __mul_128x128_full (Qh, Ql, CQ, TP128);
+  amount = recip_scale[ed2];
+
+  if (amount >= 64) {
+    CQ.w[0] = Qh.w[1] >> (amount - 64);
+    CQ.w[1] = 0;
+  } else {
+    __shr_128 (CQ, Qh, amount);
+  }
+
+  expon = 0;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+  if (!(*prounding_mode))
+#endif
+    if (CQ.w[0] & 1) {
+      // check whether fractional part of initial_P/10^ed1 is exactly .5
+
+      // get remainder
+      __shl_128_long (Qh1, Qh, (128 - amount));
+
+      if (!Qh1.w[1] && !Qh1.w[0]
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0]))) {
+	CQ.w[0]--;
+      }
+    }
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+  if (is_inexact (fpsc))
+    __set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+  else {
+    status = INEXACT_EXCEPTION;
+    // get remainder
+    __shl_128_long (Qh1, Qh, (128 - amount));
+
+    switch (rmode) {
+    case ROUNDING_TO_NEAREST:
+    case ROUNDING_TIES_AWAY:
+      // test whether fractional part is 0
+      if (Qh1.w[1] == 0x8000000000000000ull && (!Qh1.w[0])
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0])))
+	status = EXACT_STATUS;
+      break;
+    case ROUNDING_DOWN:
+    case ROUNDING_TO_ZERO:
+      if ((!Qh1.w[1]) && (!Qh1.w[0])
+	  && (Ql.w[1] < reciprocals10_128[ed2].w[1]
+	      || (Ql.w[1] == reciprocals10_128[ed2].w[1]
+		  && Ql.w[0] < reciprocals10_128[ed2].w[0])))
+	status = EXACT_STATUS;
+      break;
+    default:
+      // round up
+      __add_carry_out (Stemp.w[0], CY, Ql.w[0],
+		       reciprocals10_128[ed2].w[0]);
+      __add_carry_in_out (Stemp.w[1], carry, Ql.w[1],
+			  reciprocals10_128[ed2].w[1], CY);
+      __shr_128_long (Qh, Qh1, (128 - amount));
+      Tmp.w[0] = 1;
+      Tmp.w[1] = 0;
+      __shl_128_long (Tmp1, Tmp, amount);
+      Qh.w[0] += carry;
+      if (Qh.w[0] < carry)
+	Qh.w[1]++;
+      if (__unsigned_compare_ge_128 (Qh, Tmp1))
+	status = EXACT_STATUS;
+    }
+
+    if (status != EXACT_STATUS)
+      __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+  }
+
+#endif
+
+  pres->w[1] = sgn | CQ.w[1];
+  pres->w[0] = CQ.w[0];
+
+  return pres;
+
+}
+
+
+
+//
+//  BID128 unpack, input passed by value
+//
+__BID_INLINE__ UINT64
+unpack_BID128_value (UINT64 * psign_x, int *pexponent_x,
+		     UINT128 * pcoefficient_x, UINT128 x) {
+  UINT128 coeff, T33, T34;
+  UINT64 ex;
+
+  *psign_x = (x.w[1]) & 0x8000000000000000ull;
+
+  // special encodings
+  if ((x.w[1] & INFINITY_MASK64) >= SPECIAL_ENCODING_MASK64) {
+    if ((x.w[1] & INFINITY_MASK64) < INFINITY_MASK64) {
+      // non-canonical input
+      pcoefficient_x->w[0] = 0;
+      pcoefficient_x->w[1] = 0;
+      ex = (x.w[1]) >> 47;
+      *pexponent_x = ((int) ex) & EXPONENT_MASK128;
+      return 0;
+    }
+    // 10^33
+    T33 = power10_table_128[33];
+    /*coeff.w[0] = x.w[0];
+       coeff.w[1] = (x.w[1]) & LARGE_COEFF_MASK128;
+       pcoefficient_x->w[0] = x.w[0];
+       pcoefficient_x->w[1] = x.w[1];
+       if (__unsigned_compare_ge_128 (coeff, T33)) // non-canonical
+       pcoefficient_x->w[1] &= (~LARGE_COEFF_MASK128); */
+
+    pcoefficient_x->w[0] = x.w[0];
+    pcoefficient_x->w[1] = (x.w[1]) & 0x00003fffffffffffull;
+    if (__unsigned_compare_ge_128 ((*pcoefficient_x), T33))	// non-canonical
+    {
+      pcoefficient_x->w[1] = (x.w[1]) & 0xfe00000000000000ull;
+      pcoefficient_x->w[0] = 0;
+    } else
+      pcoefficient_x->w[1] = (x.w[1]) & 0xfe003fffffffffffull;
+    if ((x.w[1] & NAN_MASK64) == INFINITY_MASK64) {
+      pcoefficient_x->w[0] = 0;
+      pcoefficient_x->w[1] = x.w[1] & SINFINITY_MASK64;
+    }
+    *pexponent_x = 0;
+    return 0;	// NaN or Infinity 
+  }
+
+  coeff.w[0] = x.w[0];
+  coeff.w[1] = (x.w[1]) & SMALL_COEFF_MASK128;
+
+  // 10^34
+  T34 = power10_table_128[34];
+  // check for non-canonical values
+  if (__unsigned_compare_ge_128 (coeff, T34))
+    coeff.w[0] = coeff.w[1] = 0;
+
+  pcoefficient_x->w[0] = coeff.w[0];
+  pcoefficient_x->w[1] = coeff.w[1];
+
+  ex = (x.w[1]) >> 49;
+  *pexponent_x = ((int) ex) & EXPONENT_MASK128;
+
+  return coeff.w[0] | coeff.w[1];
+}
+
+
+//
+//  BID128 unpack, input pased by reference
+//
+__BID_INLINE__ UINT64
+unpack_BID128 (UINT64 * psign_x, int *pexponent_x,
+	       UINT128 * pcoefficient_x, UINT128 * px) {
+  UINT128 coeff, T33, T34;
+  UINT64 ex;
+
+  *psign_x = (px->w[1]) & 0x8000000000000000ull;
+
+  // special encodings
+  if ((px->w[1] & INFINITY_MASK64) >= SPECIAL_ENCODING_MASK64) {
+    if ((px->w[1] & INFINITY_MASK64) < INFINITY_MASK64) {
+      // non-canonical input
+      pcoefficient_x->w[0] = 0;
+      pcoefficient_x->w[1] = 0;
+      ex = (px->w[1]) >> 47;
+      *pexponent_x = ((int) ex) & EXPONENT_MASK128;
+      return 0;
+    }
+    // 10^33
+    T33 = power10_table_128[33];
+    coeff.w[0] = px->w[0];
+    coeff.w[1] = (px->w[1]) & LARGE_COEFF_MASK128;
+    pcoefficient_x->w[0] = px->w[0];
+    pcoefficient_x->w[1] = px->w[1];
+    if (__unsigned_compare_ge_128 (coeff, T33)) {	// non-canonical
+      pcoefficient_x->w[1] &= (~LARGE_COEFF_MASK128);
+      pcoefficient_x->w[0] = 0;
+    }
+    *pexponent_x = 0;
+    return 0;	// NaN or Infinity 
+  }
+
+  coeff.w[0] = px->w[0];
+  coeff.w[1] = (px->w[1]) & SMALL_COEFF_MASK128;
+
+  // 10^34
+  T34 = power10_table_128[34];
+  // check for non-canonical values
+  if (__unsigned_compare_ge_128 (coeff, T34))
+    coeff.w[0] = coeff.w[1] = 0;
+
+  pcoefficient_x->w[0] = coeff.w[0];
+  pcoefficient_x->w[1] = coeff.w[1];
+
+  ex = (px->w[1]) >> 49;
+  *pexponent_x = ((int) ex) & EXPONENT_MASK128;
+
+  return coeff.w[0] | coeff.w[1];
+}
+
+//
+//   Pack macro checks for overflow, but not underflow
+//
+__BID_INLINE__ UINT128 *
+get_BID128_very_fast_OF (UINT128 * pres, UINT64 sgn, int expon,
+			 UINT128 coeff, unsigned *prounding_mode,
+			 unsigned *fpsc) {
+  UINT128 T;
+  UINT64 tmp, tmp2;
+
+  if ((unsigned) expon > DECIMAL_MAX_EXPON_128) {
+
+    if (expon - MAX_FORMAT_DIGITS_128 <= DECIMAL_MAX_EXPON_128) {
+      T = power10_table_128[MAX_FORMAT_DIGITS_128 - 1];
+      while (__unsigned_compare_gt_128 (T, coeff)
+	     && expon > DECIMAL_MAX_EXPON_128) {
+	coeff.w[1] =
+	  (coeff.w[1] << 3) + (coeff.w[1] << 1) + (coeff.w[0] >> 61) +
+	  (coeff.w[0] >> 63);
+	tmp2 = coeff.w[0] << 3;
+	coeff.w[0] = (coeff.w[0] << 1) + tmp2;
+	if (coeff.w[0] < tmp2)
+	  coeff.w[1]++;
+
+	expon--;
+      }
+    }
+    if ((unsigned) expon > DECIMAL_MAX_EXPON_128) {
+      // OF
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (fpsc, OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (*prounding_mode == ROUNDING_TO_ZERO
+	  || (sgn && *prounding_mode == ROUNDING_UP) || (!sgn
+							 &&
+							 *prounding_mode
+							 ==
+							 ROUNDING_DOWN))
+      {
+	pres->w[1] = sgn | LARGEST_BID128_HIGH;
+	pres->w[0] = LARGEST_BID128_LOW;
+      } else
+#endif
+#endif
+      {
+	pres->w[1] = sgn | INFINITY_MASK64;
+	pres->w[0] = 0;
+      }
+      return pres;
+    }
+  }
+
+  pres->w[0] = coeff.w[0];
+  tmp = expon;
+  tmp <<= 49;
+  pres->w[1] = sgn | tmp | coeff.w[1];
+
+  return pres;
+}
+
+
+//
+//   No overflow/underflow checks
+//   No checking for coefficient == 10^34 (rounding artifact)
+//
+__BID_INLINE__ UINT128 *
+get_BID128_very_fast (UINT128 * pres, UINT64 sgn, int expon,
+		      UINT128 coeff) {
+  UINT64 tmp;
+
+  pres->w[0] = coeff.w[0];
+  tmp = expon;
+  tmp <<= 49;
+  pres->w[1] = sgn | tmp | coeff.w[1];
+
+  return pres;
+}
+
+//
+//   No overflow/underflow checks
+//
+__BID_INLINE__ UINT128 *
+get_BID128_fast (UINT128 * pres, UINT64 sgn, int expon, UINT128 coeff) {
+  UINT64 tmp;
+
+  // coeff==10^34?
+  if (coeff.w[1] == 0x0001ed09bead87c0ull
+      && coeff.w[0] == 0x378d8e6400000000ull) {
+    expon++;
+    // set coefficient to 10^33
+    coeff.w[1] = 0x0000314dc6448d93ull;
+    coeff.w[0] = 0x38c15b0a00000000ull;
+  }
+
+  pres->w[0] = coeff.w[0];
+  tmp = expon;
+  tmp <<= 49;
+  pres->w[1] = sgn | tmp | coeff.w[1];
+
+  return pres;
+}
+
+//
+//   General BID128 pack macro
+//
+__BID_INLINE__ UINT128 *
+get_BID128 (UINT128 * pres, UINT64 sgn, int expon, UINT128 coeff,
+	    unsigned *prounding_mode, unsigned *fpsc) {
+  UINT128 T;
+  UINT64 tmp, tmp2;
+
+  // coeff==10^34?
+  if (coeff.w[1] == 0x0001ed09bead87c0ull
+      && coeff.w[0] == 0x378d8e6400000000ull) {
+    expon++;
+    // set coefficient to 10^33
+    coeff.w[1] = 0x0000314dc6448d93ull;
+    coeff.w[0] = 0x38c15b0a00000000ull;
+  }
+  // check OF, UF
+  if (expon < 0 || expon > DECIMAL_MAX_EXPON_128) {
+    // check UF
+    if (expon < 0) {
+      return handle_UF_128 (pres, sgn, expon, coeff, prounding_mode,
+			    fpsc);
+    }
+
+    if (expon - MAX_FORMAT_DIGITS_128 <= DECIMAL_MAX_EXPON_128) {
+      T = power10_table_128[MAX_FORMAT_DIGITS_128 - 1];
+      while (__unsigned_compare_gt_128 (T, coeff)
+	     && expon > DECIMAL_MAX_EXPON_128) {
+	coeff.w[1] =
+	  (coeff.w[1] << 3) + (coeff.w[1] << 1) + (coeff.w[0] >> 61) +
+	  (coeff.w[0] >> 63);
+	tmp2 = coeff.w[0] << 3;
+	coeff.w[0] = (coeff.w[0] << 1) + tmp2;
+	if (coeff.w[0] < tmp2)
+	  coeff.w[1]++;
+
+	expon--;
+      }
+    }
+    if (expon > DECIMAL_MAX_EXPON_128) {
+      if (!(coeff.w[1] | coeff.w[0])) {
+	pres->w[1] = sgn | (((UINT64) DECIMAL_MAX_EXPON_128) << 49);
+	pres->w[0] = 0;
+	return pres;
+      }
+      // OF
+#ifdef SET_STATUS_FLAGS
+      __set_status_flags (fpsc, OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (*prounding_mode == ROUNDING_TO_ZERO
+	  || (sgn && *prounding_mode == ROUNDING_UP) || (!sgn
+							 &&
+							 *prounding_mode
+							 ==
+							 ROUNDING_DOWN))
+      {
+	pres->w[1] = sgn | LARGEST_BID128_HIGH;
+	pres->w[0] = LARGEST_BID128_LOW;
+      } else
+#endif
+#endif
+      {
+	pres->w[1] = sgn | INFINITY_MASK64;
+	pres->w[0] = 0;
+      }
+      return pres;
+    }
+  }
+
+  pres->w[0] = coeff.w[0];
+  tmp = expon;
+  tmp <<= 49;
+  pres->w[1] = sgn | tmp | coeff.w[1];
+
+  return pres;
+}
+
+
+//
+//  Macro used for conversions from string 
+//        (no additional arguments given for rounding mode, status flags) 
+//
+__BID_INLINE__ UINT128 *
+get_BID128_string (UINT128 * pres, UINT64 sgn, int expon, UINT128 coeff) {
+  UINT128 D2, D8;
+  UINT64 tmp;
+  unsigned rmode = 0, status;
+
+  // coeff==10^34?
+  if (coeff.w[1] == 0x0001ed09bead87c0ull
+      && coeff.w[0] == 0x378d8e6400000000ull) {
+    expon++;
+    // set coefficient to 10^33
+    coeff.w[1] = 0x0000314dc6448d93ull;
+    coeff.w[0] = 0x38c15b0a00000000ull;
+  }
+  // check OF, UF
+  if ((unsigned) expon > DECIMAL_MAX_EXPON_128) {
+    // check UF
+    if (expon < 0)
+      return handle_UF_128 (pres, sgn, expon, coeff, &rmode, &status);
+
+    // OF
+
+    if (expon < DECIMAL_MAX_EXPON_128 + 34) {
+      while (expon > DECIMAL_MAX_EXPON_128 &&
+	     (coeff.w[1] < power10_table_128[33].w[1] ||
+	      (coeff.w[1] == power10_table_128[33].w[1]
+	       && coeff.w[0] < power10_table_128[33].w[0]))) {
+	D2.w[1] = (coeff.w[1] << 1) | (coeff.w[0] >> 63);
+	D2.w[0] = coeff.w[0] << 1;
+	D8.w[1] = (coeff.w[1] << 3) | (coeff.w[0] >> 61);
+	D8.w[0] = coeff.w[0] << 3;
+
+	__add_128_128 (coeff, D2, D8);
+	expon--;
+      }
+    } else if (!(coeff.w[0] | coeff.w[1]))
+      expon = DECIMAL_MAX_EXPON_128;
+
+    if (expon > DECIMAL_MAX_EXPON_128) {
+      pres->w[1] = sgn | INFINITY_MASK64;
+      pres->w[0] = 0;
+      switch (rmode) {
+      case ROUNDING_DOWN:
+	if (!sgn) {
+	  pres->w[1] = LARGEST_BID128_HIGH;
+	  pres->w[0] = LARGEST_BID128_LOW;
+	}
+	break;
+      case ROUNDING_TO_ZERO:
+	pres->w[1] = sgn | LARGEST_BID128_HIGH;
+	pres->w[0] = LARGEST_BID128_LOW;
+	break;
+      case ROUNDING_UP:
+	// round up
+	if (sgn) {
+	  pres->w[1] = sgn | LARGEST_BID128_HIGH;
+	  pres->w[0] = LARGEST_BID128_LOW;
+	}
+	break;
+      }
+
+      return pres;
+    }
+  }
+
+  pres->w[0] = coeff.w[0];
+  tmp = expon;
+  tmp <<= 49;
+  pres->w[1] = sgn | tmp | coeff.w[1];
+
+  return pres;
+}
+
+
+
+/*****************************************************************************
+*
+*    BID32 pack/unpack macros
+*
+*****************************************************************************/
+
+
+__BID_INLINE__ UINT32
+unpack_BID32 (UINT32 * psign_x, int *pexponent_x,
+	      UINT32 * pcoefficient_x, UINT32 x) {
+  UINT32 tmp;
+
+  *psign_x = x & 0x80000000;
+
+  if ((x & SPECIAL_ENCODING_MASK32) == SPECIAL_ENCODING_MASK32) {
+    // special encodings
+    if ((x & INFINITY_MASK32) == INFINITY_MASK32) {
+      *pcoefficient_x = x & 0xfe0fffff;
+      if ((x & 0x000fffff) >= 1000000)
+	*pcoefficient_x = x & 0xfe000000;
+      if ((x & NAN_MASK32) == INFINITY_MASK32)
+	*pcoefficient_x = x & 0xf8000000;
+      *pexponent_x = 0;
+      return 0;	// NaN or Infinity
+    }
+    // coefficient
+    *pcoefficient_x = (x & SMALL_COEFF_MASK32) | LARGE_COEFF_HIGH_BIT32;
+    // check for non-canonical value
+    if (*pcoefficient_x >= 10000000)
+      *pcoefficient_x = 0;
+    // get exponent
+    tmp = x >> 21;
+    *pexponent_x = tmp & EXPONENT_MASK32;
+    return 1;
+  }
+  // exponent
+  tmp = x >> 23;
+  *pexponent_x = tmp & EXPONENT_MASK32;
+  // coefficient
+  *pcoefficient_x = (x & LARGE_COEFF_MASK32);
+
+  return *pcoefficient_x;
+}
+
+//
+//   General pack macro for BID32 
+//
+__BID_INLINE__ UINT32
+get_BID32 (UINT32 sgn, int expon, UINT64 coeff, int rmode,
+	   unsigned *fpsc) {
+  UINT128 Q;
+  UINT64 C64, remainder_h, carry, Stemp;
+  UINT32 r, mask;
+  int extra_digits, amount, amount2;
+  unsigned status;
+
+  if (coeff > 9999999ull) {
+    expon++;
+    coeff = 1000000ull;
+  }
+  // check for possible underflow/overflow
+  if (((unsigned) expon) > DECIMAL_MAX_EXPON_32) {
+    if (expon < 0) {
+      // underflow
+      if (expon + MAX_FORMAT_DIGITS_32 < 0) {
+#ifdef SET_STATUS_FLAGS
+	__set_status_flags (fpsc,
+			    UNDERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+	if (rmode == ROUNDING_DOWN && sgn)
+	  return 0x80000001;
+	if (rmode == ROUNDING_UP && !sgn)
+	  return 1;
+#endif
+#endif
+	// result is 0
+	return sgn;
+      }
+      // get digits to be shifted out
+#ifdef IEEE_ROUND_NEAREST_TIES_AWAY
+      rmode = 0;
+#endif
+#ifdef IEEE_ROUND_NEAREST
+      rmode = 0;
+#endif
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (sgn && (unsigned) (rmode - 1) < 2)
+	rmode = 3 - rmode;
+#endif
+#endif
+
+      extra_digits = -expon;
+      coeff += round_const_table[rmode][extra_digits];
+
+      // get coeff*(2^M[extra_digits])/10^extra_digits
+      __mul_64x64_to_128 (Q, coeff, reciprocals10_64[extra_digits]);
+
+      // now get P/10^extra_digits: shift Q_high right by M[extra_digits]-128
+      amount = short_recip_scale[extra_digits];
+
+      C64 = Q.w[1] >> amount;
+
+#ifndef IEEE_ROUND_NEAREST_TIES_AWAY
+#ifndef IEEE_ROUND_NEAREST
+      if (rmode == 0)	//ROUNDING_TO_NEAREST
+#endif
+	if (C64 & 1) {
+	  // check whether fractional part of initial_P/10^extra_digits is exactly .5
+
+	  // get remainder
+	  amount2 = 64 - amount;
+	  remainder_h = 0;
+	  remainder_h--;
+	  remainder_h >>= amount2;
+	  remainder_h = remainder_h & Q.w[1];
+
+	  if (!remainder_h && (Q.w[0] < reciprocals10_64[extra_digits])) {
+	    C64--;
+	  }
+	}
+#endif
+
+#ifdef SET_STATUS_FLAGS
+
+      if (is_inexact (fpsc))
+	__set_status_flags (fpsc, UNDERFLOW_EXCEPTION);
+      else {
+	status = INEXACT_EXCEPTION;
+	// get remainder
+	remainder_h = Q.w[1] << (64 - amount);
+
+	switch (rmode) {
+	case ROUNDING_TO_NEAREST:
+	case ROUNDING_TIES_AWAY:
+	  // test whether fractional part is 0
+	  if (remainder_h == 0x8000000000000000ull
+	      && (Q.w[0] < reciprocals10_64[extra_digits]))
+	    status = EXACT_STATUS;
+	  break;
+	case ROUNDING_DOWN:
+	case ROUNDING_TO_ZERO:
+	  if (!remainder_h && (Q.w[0] < reciprocals10_64[extra_digits]))
+	    status = EXACT_STATUS;
+	  break;
+	default:
+	  // round up
+	  __add_carry_out (Stemp, carry, Q.w[0],
+			   reciprocals10_64[extra_digits]);
+	  if ((remainder_h >> (64 - amount)) + carry >=
+	      (((UINT64) 1) << amount))
+	    status = EXACT_STATUS;
+	}
+
+	if (status != EXACT_STATUS)
+	  __set_status_flags (fpsc, UNDERFLOW_EXCEPTION | status);
+      }
+
+#endif
+
+      return sgn | (UINT32) C64;
+    }
+
+    while (coeff < 1000000 && expon > DECIMAL_MAX_EXPON_32) {
+      coeff = (coeff << 3) + (coeff << 1);
+      expon--;
+    }
+    if (((unsigned) expon) > DECIMAL_MAX_EXPON_32) {
+      __set_status_flags (fpsc, OVERFLOW_EXCEPTION | INEXACT_EXCEPTION);
+      // overflow
+      r = sgn | INFINITY_MASK32;
+      switch (rmode) {
+      case ROUNDING_DOWN:
+	if (!sgn)
+	  r = LARGEST_BID32;
+	break;
+      case ROUNDING_TO_ZERO:
+	r = sgn | LARGEST_BID32;
+	break;
+      case ROUNDING_UP:
+	// round up
+	if (sgn)
+	  r = sgn | LARGEST_BID32;
+      }
+      return r;
+    }
+  }
+
+  mask = 1 << 23;
+
+  // check whether coefficient fits in DECIMAL_COEFF_FIT bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= 23;
+    r |= ((UINT32) coeff | sgn);
+    return r;
+  }
+  // special format
+
+  r = expon;
+  r <<= 21;
+  r |= (sgn | SPECIAL_ENCODING_MASK32);
+  // add coeff, without leading bits
+  mask = (1 << 21) - 1;
+  r |= (((UINT32) coeff) & mask);
+
+  return r;
+}
+
+
+
+//
+//   no overflow/underflow checks
+//
+__BID_INLINE__ UINT32
+very_fast_get_BID32 (UINT32 sgn, int expon, UINT32 coeff) {
+  UINT32 r, mask;
+
+  mask = 1 << 23;
+
+  // check whether coefficient fits in 10*2+3 bits
+  if (coeff < mask) {
+    r = expon;
+    r <<= 23;
+    r |= (coeff | sgn);
+    return r;
+  }
+  // special format
+  r = expon;
+  r <<= 21;
+  r |= (sgn | SPECIAL_ENCODING_MASK32);
+  // add coeff, without leading bits
+  mask = (1 << 21) - 1;
+  coeff &= mask;
+  r |= coeff;
+
+  return r;
+}
+
+
+
+/*************************************************************
+ *
+ *************************************************************/
+typedef
+ALIGN (16)
+     struct {
+       UINT64 w[6];
+     } UINT384;
+     typedef ALIGN (16)
+     struct {
+       UINT64 w[8];
+     } UINT512;
+
+// #define P                               34
+#define MASK_STEERING_BITS              0x6000000000000000ull
+#define MASK_BINARY_EXPONENT1           0x7fe0000000000000ull
+#define MASK_BINARY_SIG1                0x001fffffffffffffull
+#define MASK_BINARY_EXPONENT2           0x1ff8000000000000ull
+    //used to take G[2:w+3] (sec 3.3)
+#define MASK_BINARY_SIG2                0x0007ffffffffffffull
+    //used to mask out G4:T0 (sec 3.3)
+#define MASK_BINARY_OR2                 0x0020000000000000ull
+    //used to prefix 8+G4 to T (sec 3.3)
+#define UPPER_EXPON_LIMIT               51
+#define MASK_EXP                        0x7ffe000000000000ull
+#define MASK_SPECIAL                    0x7800000000000000ull
+#define MASK_NAN                        0x7c00000000000000ull
+#define MASK_SNAN                       0x7e00000000000000ull
+#define MASK_ANY_INF                    0x7c00000000000000ull
+#define MASK_INF                        0x7800000000000000ull
+#define MASK_SIGN                       0x8000000000000000ull
+#define MASK_COEFF                      0x0001ffffffffffffull
+#define BIN_EXP_BIAS                    (0x1820ull << 49)
+
+#define EXP_MIN                         0x0000000000000000ull
+   // EXP_MIN = (-6176 + 6176) << 49
+#define EXP_MAX                         0x5ffe000000000000ull
+  // EXP_MAX = (6111 + 6176) << 49
+#define EXP_MAX_P1                      0x6000000000000000ull
+  // EXP_MAX + 1 = (6111 + 6176 + 1) << 49
+#define EXP_P1                          0x0002000000000000ull
+  // EXP_ P1= 1 << 49
+#define expmin                            -6176
+  // min unbiased exponent
+#define expmax                            6111
+  // max unbiased exponent
+#define expmin16                          -398
+  // min unbiased exponent
+#define expmax16                          369
+  // max unbiased exponent
+
+#define SIGNMASK32 0x80000000
+#define BID64_SIG_MAX 0x002386F26FC0ffffull
+#define SIGNMASK64    0x8000000000000000ull
+
+// typedef unsigned int FPSC; // floating-point status and control
+	// bit31:
+	// bit30:
+	// bit29:
+	// bit28:
+	// bit27:
+	// bit26:
+	// bit25:
+	// bit24:
+	// bit23:
+	// bit22:
+	// bit21:
+	// bit20:
+	// bit19:
+	// bit18:
+	// bit17:
+	// bit16:
+	// bit15:
+	// bit14: RC:2
+	// bit13: RC:1
+	// bit12: RC:0
+	// bit11: PM
+	// bit10: UM
+	// bit9:  OM
+	// bit8:  ZM
+	// bit7:  DM
+	// bit6:  IM
+	// bit5:  PE
+	// bit4:  UE
+	// bit3:  OE
+	// bit2:  ZE
+	// bit1:  DE
+	// bit0:  IE
+
+#define ROUNDING_MODE_MASK	0x00007000
+
+     typedef struct _DEC_DIGITS {
+       unsigned int digits;
+       UINT64 threshold_hi;
+       UINT64 threshold_lo;
+       unsigned int digits1;
+     } DEC_DIGITS;
+
+     extern DEC_DIGITS nr_digits[];
+     extern UINT64 midpoint64[];
+     extern UINT128 midpoint128[];
+     extern UINT192 midpoint192[];
+     extern UINT256 midpoint256[];
+     extern UINT64 ten2k64[];
+     extern UINT128 ten2k128[];
+     extern UINT256 ten2k256[];
+     extern UINT128 ten2mk128[];
+     extern UINT64 ten2mk64[];
+     extern UINT128 ten2mk128trunc[];
+     extern int shiftright128[];
+     extern UINT64 maskhigh128[];
+     extern UINT64 maskhigh128M[];
+     extern UINT64 maskhigh192M[];
+     extern UINT64 maskhigh256M[];
+     extern UINT64 onehalf128[];
+     extern UINT64 onehalf128M[];
+     extern UINT64 onehalf192M[];
+     extern UINT64 onehalf256M[];
+     extern UINT128 ten2mk128M[];
+     extern UINT128 ten2mk128truncM[];
+     extern UINT192 ten2mk192truncM[];
+     extern UINT256 ten2mk256truncM[];
+     extern int shiftright128M[];
+     extern int shiftright192M[];
+     extern int shiftright256M[];
+     extern UINT192 ten2mk192M[];
+     extern UINT256 ten2mk256M[];
+     extern unsigned char char_table2[];
+     extern unsigned char char_table3[];
+
+     extern UINT64 ten2m3k64[];
+     extern unsigned int shift_ten2m3k64[];
+     extern UINT128 ten2m3k128[];
+     extern unsigned int shift_ten2m3k128[];
+
+
+
+/***************************************************************************
+ *************** TABLES FOR GENERAL ROUNDING FUNCTIONS *********************
+ ***************************************************************************/
+
+     extern UINT64 Kx64[];
+     extern unsigned int Ex64m64[];
+     extern UINT64 half64[];
+     extern UINT64 mask64[];
+     extern UINT64 ten2mxtrunc64[];
+
+     extern UINT128 Kx128[];
+     extern unsigned int Ex128m128[];
+     extern UINT64 half128[];
+     extern UINT64 mask128[];
+     extern UINT128 ten2mxtrunc128[];
+
+     extern UINT192 Kx192[];
+     extern unsigned int Ex192m192[];
+     extern UINT64 half192[];
+     extern UINT64 mask192[];
+     extern UINT192 ten2mxtrunc192[];
+
+     extern UINT256 Kx256[];
+     extern unsigned int Ex256m256[];
+     extern UINT64 half256[];
+     extern UINT64 mask256[];
+     extern UINT256 ten2mxtrunc256[];
+
+     typedef union __bid64_128 {
+       UINT64 b64;
+       UINT128 b128;
+     } BID64_128;
+
+     BID64_128 bid_fma (unsigned int P0,
+			BID64_128 x1, unsigned int P1,
+			BID64_128 y1, unsigned int P2,
+			BID64_128 z1, unsigned int P3,
+			unsigned int rnd_mode, FPSC * fpsc);
+
+#define         P16     16
+#define         P34     34
+
+     union __int_double {
+       UINT64 i;
+       double d;
+     };
+     typedef union __int_double int_double;
+
+
+     union __int_float {
+       UINT32 i;
+       float d;
+     };
+     typedef union __int_float int_float;
+
+#define SWAP(A,B,T) {\
+        T = A; \
+        A = B; \
+        B = T; \
+}
+
+// this macro will find coefficient_x to be in [2^A, 2^(A+1) )
+// ie it knows that it is A bits long
+#define NUMBITS(A, coefficient_x, tempx){\
+      temp_x.d=(float)coefficient_x;\
+      A=((tempx.i >>23) & EXPONENT_MASK32) - 0x7f;\
+}
+
+     enum class_types {
+       signalingNaN,
+       quietNaN,
+       negativeInfinity,
+       negativeNormal,
+       negativeSubnormal,
+       negativeZero,
+       positiveZero,
+       positiveSubnormal,
+       positiveNormal,
+       positiveInfinity
+     };
+
+     typedef union {
+       UINT64 ui64;
+       double d;
+     } BID_UI64DOUBLE;
+
+#endif
diff --git a/gcc-4.9/libgcc/config/libbid/bid_round.c b/gcc-4.9/libgcc/config/libbid/bid_round.c
new file mode 100644
index 000000000..ed0a71db9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_round.c
@@ -0,0 +1,1049 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*****************************************************************************
+ *
+ *  BID64 encoding:
+ * ****************************************
+ *  63  62              53 52           0
+ * |---|------------------|--------------|
+ * | S |  Biased Exp (E)  |  Coeff (c)   |
+ * |---|------------------|--------------|
+ *
+ * bias = 398
+ * number = (-1)^s * 10^(E-398) * c
+ * coefficient range - 0 to (2^53)-1
+ * COEFF_MAX = 2^53-1 = 9007199254740991
+ *
+ *****************************************************************************
+ *
+ * BID128 encoding:
+ *   1-bit sign
+ *   14-bit biased exponent in [0x21, 0x3020] = [33, 12320]
+ *         unbiased exponent in [-6176, 6111]; exponent bias = 6176
+ *   113-bit unsigned binary integer coefficient (49-bit high + 64-bit low)
+ *   Note: 10^34-1 ~ 2^112.945555... < 2^113 => coefficient fits in 113 bits
+ *
+ *   Note: assume invalid encodings are not passed to this function
+ *
+ * Round a number C with q decimal digits, represented as a binary integer
+ * to q - x digits. Six different routines are provided for different values 
+ * of q. The maximum value of q used in the library is q = 3 * P - 1 where 
+ * P = 16 or P = 34 (so q <= 111 decimal digits). 
+ * The partitioning is based on the following, where Kx is the scaled
+ * integer representing the value of 10^(-x) rounded up to a number of bits
+ * sufficient to ensure correct rounding:
+ *
+ * --------------------------------------------------------------------------
+ * q    x           max. value of  a            max number      min. number 
+ *                                              of bits in C    of bits in Kx
+ * --------------------------------------------------------------------------
+ *
+ *                          GROUP 1: 64 bits
+ *                          round64_2_18 ()
+ *
+ * 2    [1,1]       10^1 - 1 < 2^3.33            4              4
+ * ...  ...         ...                         ...             ...
+ * 18   [1,17]      10^18 - 1 < 2^59.80         60              61
+ *
+ *                        GROUP 2: 128 bits
+ *                        round128_19_38 ()
+ *
+ * 19   [1,18]      10^19 - 1 < 2^63.11         64              65
+ * 20   [1,19]      10^20 - 1 < 2^66.44         67              68
+ * ...  ...         ...                         ...             ...
+ * 38   [1,37]      10^38 - 1 < 2^126.24        127             128
+ *
+ *                        GROUP 3: 192 bits
+ *                        round192_39_57 ()
+ *
+ * 39   [1,38]      10^39 - 1 < 2^129.56        130             131
+ * ...  ...         ...                         ...             ...
+ * 57   [1,56]      10^57 - 1 < 2^189.35        190             191
+ *
+ *                        GROUP 4: 256 bits
+ *                        round256_58_76 ()
+ *
+ * 58   [1,57]      10^58 - 1 < 2^192.68        193             194
+ * ...  ...         ...                         ...             ...
+ * 76   [1,75]      10^76 - 1 < 2^252.47        253             254
+ *
+ *                        GROUP 5: 320 bits
+ *                        round320_77_96 ()
+ *
+ * 77   [1,76]      10^77 - 1 < 2^255.79        256             257
+ * 78   [1,77]      10^78 - 1 < 2^259.12        260             261
+ * ...  ...         ...                         ...             ...
+ * 96   [1,95]      10^96 - 1 < 2^318.91        319             320
+ *
+ *                        GROUP 6: 384 bits
+ *                        round384_97_115 ()
+ *
+ * 97   [1,96]      10^97 - 1 < 2^322.23        323             324 
+ * ...  ...         ...                         ...             ...
+ * 115  [1,114]     10^115 - 1 < 2^382.03       383             384
+ *
+ ****************************************************************************/
+
+#include "bid_internal.h"
+
+void
+round64_2_18 (int q,
+	      int x,
+	      UINT64 C,
+	      UINT64 * ptr_Cstar,
+	      int *incr_exp,
+	      int *ptr_is_midpoint_lt_even,
+	      int *ptr_is_midpoint_gt_even,
+	      int *ptr_is_inexact_lt_midpoint,
+	      int *ptr_is_inexact_gt_midpoint) {
+
+  UINT128 P128;
+  UINT128 fstar;
+  UINT64 Cstar;
+  UINT64 tmp64;
+  int shift;
+  int ind;
+
+  // Note:
+  //    In round128_2_18() positive numbers with 2 <= q <= 18 will be 
+  //    rounded to nearest only for 1 <= x <= 3:
+  //     x = 1 or x = 2 when q = 17
+  //     x = 2 or x = 3 when q = 18
+  // However, for generality and possible uses outside the frame of IEEE 754R
+  // this implementation works for 1 <= x <= q - 1
+
+  // assume *ptr_is_midpoint_lt_even, *ptr_is_midpoint_gt_even,
+  // *ptr_is_inexact_lt_midpoint, and *ptr_is_inexact_gt_midpoint are
+  // initialized to 0 by the caller
+
+  // round a number C with q decimal digits, 2 <= q <= 18
+  // to q - x digits, 1 <= x <= 17
+  // C = C + 1/2 * 10^x where the result C fits in 64 bits
+  // (because the largest value is 999999999999999999 + 50000000000000000 =
+  // 0x0e92596fd628ffff, which fits in 60 bits)
+  ind = x - 1;	// 0 <= ind <= 16
+  C = C + midpoint64[ind];
+  // kx ~= 10^(-x), kx = Kx64[ind] * 2^(-Ex), 0 <= ind <= 16
+  // P128 = (C + 1/2 * 10^x) * kx * 2^Ex = (C + 1/2 * 10^x) * Kx
+  // the approximation kx of 10^(-x) was rounded up to 64 bits
+  __mul_64x64_to_128MACH (P128, C, Kx64[ind]);
+  // calculate C* = floor (P128) and f*
+  // Cstar = P128 >> Ex
+  // fstar = low Ex bits of P128
+  shift = Ex64m64[ind];	// in [3, 56]
+  Cstar = P128.w[1] >> shift;
+  fstar.w[1] = P128.w[1] & mask64[ind];
+  fstar.w[0] = P128.w[0];
+  // the top Ex bits of 10^(-x) are T* = ten2mxtrunc64[ind], e.g.
+  // if x=1, T*=ten2mxtrunc64[0]=0xcccccccccccccccc
+  // if (0 < f* < 10^(-x)) then the result is a midpoint
+  //   if floor(C*) is even then C* = floor(C*) - logical right
+  //       shift; C* has q - x decimal digits, correct by Prop. 1)
+  //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+  //       shift; C* has q - x decimal digits, correct by Pr. 1)
+  // else
+  //   C* = floor(C*) (logical right shift; C has q - x decimal digits,
+  //       correct by Property 1)
+  // in the caling function n = C* * 10^(e+x)
+
+  // determine inexactness of the rounding of C*
+  // if (0 < f* - 1/2 < 10^(-x)) then
+  //   the result is exact
+  // else // if (f* - 1/2 > T*) then
+  //   the result is inexact
+  if (fstar.w[1] > half64[ind] ||
+      (fstar.w[1] == half64[ind] && fstar.w[0])) {
+    // f* > 1/2 and the result may be exact
+    // Calculate f* - 1/2
+    tmp64 = fstar.w[1] - half64[ind];
+    if (tmp64 || fstar.w[0] > ten2mxtrunc64[ind]) {	// f* - 1/2 > 10^(-x)
+      *ptr_is_inexact_lt_midpoint = 1;
+    }	// else the result is exact
+  } else {	// the result is inexact; f2* <= 1/2
+    *ptr_is_inexact_gt_midpoint = 1;
+  }
+  // check for midpoints (could do this before determining inexactness)
+  if (fstar.w[1] == 0 && fstar.w[0] <= ten2mxtrunc64[ind]) {
+    // the result is a midpoint
+    if (Cstar & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+      // if floor(C*) is odd C = floor(C*) - 1; the result may be 0
+      Cstar--;	// Cstar is now even
+      *ptr_is_midpoint_gt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    } else {	// else MP in [ODD, EVEN]
+      *ptr_is_midpoint_lt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    }
+  }
+  // check for rounding overflow, which occurs if Cstar = 10^(q-x)
+  ind = q - x;	// 1 <= ind <= q - 1
+  if (Cstar == ten2k64[ind]) {	// if  Cstar = 10^(q-x)
+    Cstar = ten2k64[ind - 1];	// Cstar = 10^(q-x-1)
+    *incr_exp = 1;
+  } else {	// 10^33 <= Cstar <= 10^34 - 1
+    *incr_exp = 0;
+  }
+  *ptr_Cstar = Cstar;
+}
+
+
+void
+round128_19_38 (int q,
+		int x,
+		UINT128 C,
+		UINT128 * ptr_Cstar,
+		int *incr_exp,
+		int *ptr_is_midpoint_lt_even,
+		int *ptr_is_midpoint_gt_even,
+		int *ptr_is_inexact_lt_midpoint,
+		int *ptr_is_inexact_gt_midpoint) {
+
+  UINT256 P256;
+  UINT256 fstar;
+  UINT128 Cstar;
+  UINT64 tmp64;
+  int shift;
+  int ind;
+
+  // Note:
+  //    In round128_19_38() positive numbers with 19 <= q <= 38 will be 
+  //    rounded to nearest only for 1 <= x <= 23:
+  //     x = 3 or x = 4 when q = 19
+  //     x = 4 or x = 5 when q = 20
+  //     ...
+  //     x = 18 or x = 19 when q = 34
+  //     x = 1 or x = 2 or x = 19 or x = 20 when q = 35
+  //     x = 2 or x = 3 or x = 20 or x = 21 when q = 36
+  //     x = 3 or x = 4 or x = 21 or x = 22 when q = 37
+  //     x = 4 or x = 5 or x = 22 or x = 23 when q = 38
+  // However, for generality and possible uses outside the frame of IEEE 754R
+  // this implementation works for 1 <= x <= q - 1
+
+  // assume *ptr_is_midpoint_lt_even, *ptr_is_midpoint_gt_even,
+  // *ptr_is_inexact_lt_midpoint, and *ptr_is_inexact_gt_midpoint are
+  // initialized to 0 by the caller
+
+  // round a number C with q decimal digits, 19 <= q <= 38
+  // to q - x digits, 1 <= x <= 37
+  // C = C + 1/2 * 10^x where the result C fits in 128 bits
+  // (because the largest value is 99999999999999999999999999999999999999 + 
+  // 5000000000000000000000000000000000000 =
+  // 0x4efe43b0c573e7e68a043d8fffffffff, which fits is 127 bits)
+
+  ind = x - 1;	// 0 <= ind <= 36 
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint64[ind];
+    if (C.w[0] < tmp64)
+      C.w[1]++;
+  } else {	// if 19 <= ind <= 37
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint128[ind - 19].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+    }
+    C.w[1] = C.w[1] + midpoint128[ind - 19].w[1];
+  }
+  // kx ~= 10^(-x), kx = Kx128[ind] * 2^(-Ex), 0 <= ind <= 36
+  // P256 = (C + 1/2 * 10^x) * kx * 2^Ex = (C + 1/2 * 10^x) * Kx
+  // the approximation kx of 10^(-x) was rounded up to 128 bits
+  __mul_128x128_to_256 (P256, C, Kx128[ind]);
+  // calculate C* = floor (P256) and f*
+  // Cstar = P256 >> Ex
+  // fstar = low Ex bits of P256
+  shift = Ex128m128[ind];	// in [2, 63] but have to consider two cases
+  if (ind <= 18) {	// if 0 <= ind <= 18 
+    Cstar.w[0] = (P256.w[2] >> shift) | (P256.w[3] << (64 - shift));
+    Cstar.w[1] = (P256.w[3] >> shift);
+    fstar.w[0] = P256.w[0];
+    fstar.w[1] = P256.w[1];
+    fstar.w[2] = P256.w[2] & mask128[ind];
+    fstar.w[3] = 0x0ULL;
+  } else {	// if 19 <= ind <= 37
+    Cstar.w[0] = P256.w[3] >> shift;
+    Cstar.w[1] = 0x0ULL;
+    fstar.w[0] = P256.w[0];
+    fstar.w[1] = P256.w[1];
+    fstar.w[2] = P256.w[2];
+    fstar.w[3] = P256.w[3] & mask128[ind];
+  }
+  // the top Ex bits of 10^(-x) are T* = ten2mxtrunc64[ind], e.g.
+  // if x=1, T*=ten2mxtrunc128[0]=0xcccccccccccccccccccccccccccccccc
+  // if (0 < f* < 10^(-x)) then the result is a midpoint
+  //   if floor(C*) is even then C* = floor(C*) - logical right
+  //       shift; C* has q - x decimal digits, correct by Prop. 1)
+  //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+  //       shift; C* has q - x decimal digits, correct by Pr. 1)
+  // else
+  //   C* = floor(C*) (logical right shift; C has q - x decimal digits,
+  //       correct by Property 1)
+  // in the caling function n = C* * 10^(e+x)
+
+  // determine inexactness of the rounding of C*
+  // if (0 < f* - 1/2 < 10^(-x)) then
+  //   the result is exact
+  // else // if (f* - 1/2 > T*) then
+  //   the result is inexact
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    if (fstar.w[2] > half128[ind] ||
+	(fstar.w[2] == half128[ind] && (fstar.w[1] || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[2] - half128[ind];
+      if (tmp64 || fstar.w[1] > ten2mxtrunc128[ind].w[1] || (fstar.w[1] == ten2mxtrunc128[ind].w[1] && fstar.w[0] > ten2mxtrunc128[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else {	// if 19 <= ind <= 37
+    if (fstar.w[3] > half128[ind] || (fstar.w[3] == half128[ind] &&
+				      (fstar.w[2] || fstar.w[1]
+				       || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[3] - half128[ind];
+      if (tmp64 || fstar.w[2] || fstar.w[1] > ten2mxtrunc128[ind].w[1] || (fstar.w[1] == ten2mxtrunc128[ind].w[1] && fstar.w[0] > ten2mxtrunc128[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  }
+  // check for midpoints (could do this before determining inexactness)
+  if (fstar.w[3] == 0 && fstar.w[2] == 0 &&
+      (fstar.w[1] < ten2mxtrunc128[ind].w[1] ||
+       (fstar.w[1] == ten2mxtrunc128[ind].w[1] &&
+	fstar.w[0] <= ten2mxtrunc128[ind].w[0]))) {
+    // the result is a midpoint
+    if (Cstar.w[0] & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+      // if floor(C*) is odd C = floor(C*) - 1; the result may be 0
+      Cstar.w[0]--;	// Cstar is now even
+      if (Cstar.w[0] == 0xffffffffffffffffULL) {
+	Cstar.w[1]--;
+      }
+      *ptr_is_midpoint_gt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    } else {	// else MP in [ODD, EVEN]
+      *ptr_is_midpoint_lt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    }
+  }
+  // check for rounding overflow, which occurs if Cstar = 10^(q-x)
+  ind = q - x;	// 1 <= ind <= q - 1
+  if (ind <= 19) {
+    if (Cstar.w[1] == 0x0ULL && Cstar.w[0] == ten2k64[ind]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[ind - 1];	// Cstar = 10^(q-x-1)
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind == 20) {
+    // if ind = 20
+    if (Cstar.w[1] == ten2k128[0].w[1]
+	&& Cstar.w[0] == ten2k128[0].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[19];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = 0x0ULL;
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else {	// if 21 <= ind <= 37
+    if (Cstar.w[1] == ten2k128[ind - 20].w[1] &&
+	Cstar.w[0] == ten2k128[ind - 20].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k128[ind - 21].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k128[ind - 21].w[1];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  }
+  ptr_Cstar->w[1] = Cstar.w[1];
+  ptr_Cstar->w[0] = Cstar.w[0];
+}
+
+
+void
+round192_39_57 (int q,
+		int x,
+		UINT192 C,
+		UINT192 * ptr_Cstar,
+		int *incr_exp,
+		int *ptr_is_midpoint_lt_even,
+		int *ptr_is_midpoint_gt_even,
+		int *ptr_is_inexact_lt_midpoint,
+		int *ptr_is_inexact_gt_midpoint) {
+
+  UINT384 P384;
+  UINT384 fstar;
+  UINT192 Cstar;
+  UINT64 tmp64;
+  int shift;
+  int ind;
+
+  // Note:
+  //    In round192_39_57() positive numbers with 39 <= q <= 57 will be 
+  //    rounded to nearest only for 5 <= x <= 42:
+  //     x = 23 or x = 24 or x = 5 or x = 6 when q = 39
+  //     x = 24 or x = 25 or x = 6 or x = 7 when q = 40
+  //     ...
+  //     x = 41 or x = 42 or x = 23 or x = 24 when q = 57
+  // However, for generality and possible uses outside the frame of IEEE 754R
+  // this implementation works for 1 <= x <= q - 1
+
+  // assume *ptr_is_midpoint_lt_even, *ptr_is_midpoint_gt_even,
+  // *ptr_is_inexact_lt_midpoint, and *ptr_is_inexact_gt_midpoint are
+  // initialized to 0 by the caller
+
+  // round a number C with q decimal digits, 39 <= q <= 57
+  // to q - x digits, 1 <= x <= 56
+  // C = C + 1/2 * 10^x where the result C fits in 192 bits
+  // (because the largest value is
+  // 999999999999999999999999999999999999999999999999999999999 +
+  //  50000000000000000000000000000000000000000000000000000000 =
+  // 0x2ad282f212a1da846afdaf18c034ff09da7fffffffffffff, which fits in 190 bits)
+  ind = x - 1;	// 0 <= ind <= 55
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint64[ind];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0) {
+	C.w[2]++;
+      }
+    }
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint128[ind - 19].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0) {
+	C.w[2]++;
+      }
+    }
+    tmp64 = C.w[1];
+    C.w[1] = C.w[1] + midpoint128[ind - 19].w[1];
+    if (C.w[1] < tmp64) {
+      C.w[2]++;
+    }
+  } else {	// if 38 <= ind <= 57 (actually ind <= 55)
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint192[ind - 38].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0ull) {
+	C.w[2]++;
+      }
+    }
+    tmp64 = C.w[1];
+    C.w[1] = C.w[1] + midpoint192[ind - 38].w[1];
+    if (C.w[1] < tmp64) {
+      C.w[2]++;
+    }
+    C.w[2] = C.w[2] + midpoint192[ind - 38].w[2];
+  }
+  // kx ~= 10^(-x), kx = Kx192[ind] * 2^(-Ex), 0 <= ind <= 55
+  // P384 = (C + 1/2 * 10^x) * kx * 2^Ex = (C + 1/2 * 10^x) * Kx
+  // the approximation kx of 10^(-x) was rounded up to 192 bits
+  __mul_192x192_to_384 (P384, C, Kx192[ind]);
+  // calculate C* = floor (P384) and f*
+  // Cstar = P384 >> Ex
+  // fstar = low Ex bits of P384
+  shift = Ex192m192[ind];	// in [1, 63] but have to consider three cases
+  if (ind <= 18) {	// if 0 <= ind <= 18 
+    Cstar.w[2] = (P384.w[5] >> shift);
+    Cstar.w[1] = (P384.w[5] << (64 - shift)) | (P384.w[4] >> shift);
+    Cstar.w[0] = (P384.w[4] << (64 - shift)) | (P384.w[3] >> shift);
+    fstar.w[5] = 0x0ULL;
+    fstar.w[4] = 0x0ULL;
+    fstar.w[3] = P384.w[3] & mask192[ind];
+    fstar.w[2] = P384.w[2];
+    fstar.w[1] = P384.w[1];
+    fstar.w[0] = P384.w[0];
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    Cstar.w[2] = 0x0ULL;
+    Cstar.w[1] = P384.w[5] >> shift;
+    Cstar.w[0] = (P384.w[5] << (64 - shift)) | (P384.w[4] >> shift);
+    fstar.w[5] = 0x0ULL;
+    fstar.w[4] = P384.w[4] & mask192[ind];
+    fstar.w[3] = P384.w[3];
+    fstar.w[2] = P384.w[2];
+    fstar.w[1] = P384.w[1];
+    fstar.w[0] = P384.w[0];
+  } else {	// if 38 <= ind <= 57
+    Cstar.w[2] = 0x0ULL;
+    Cstar.w[1] = 0x0ULL;
+    Cstar.w[0] = P384.w[5] >> shift;
+    fstar.w[5] = P384.w[5] & mask192[ind];
+    fstar.w[4] = P384.w[4];
+    fstar.w[3] = P384.w[3];
+    fstar.w[2] = P384.w[2];
+    fstar.w[1] = P384.w[1];
+    fstar.w[0] = P384.w[0];
+  }
+
+  // the top Ex bits of 10^(-x) are T* = ten2mxtrunc192[ind], e.g. if x=1,
+  // T*=ten2mxtrunc192[0]=0xcccccccccccccccccccccccccccccccccccccccccccccccc
+  // if (0 < f* < 10^(-x)) then the result is a midpoint
+  //   if floor(C*) is even then C* = floor(C*) - logical right
+  //       shift; C* has q - x decimal digits, correct by Prop. 1)
+  //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+  //       shift; C* has q - x decimal digits, correct by Pr. 1)
+  // else
+  //   C* = floor(C*) (logical right shift; C has q - x decimal digits,
+  //       correct by Property 1)
+  // in the caling function n = C* * 10^(e+x)
+
+  // determine inexactness of the rounding of C*
+  // if (0 < f* - 1/2 < 10^(-x)) then
+  //   the result is exact
+  // else // if (f* - 1/2 > T*) then
+  //   the result is inexact
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    if (fstar.w[3] > half192[ind] || (fstar.w[3] == half192[ind] &&
+				      (fstar.w[2] || fstar.w[1]
+				       || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[3] - half192[ind];
+      if (tmp64 || fstar.w[2] > ten2mxtrunc192[ind].w[2] || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] > ten2mxtrunc192[ind].w[1]) || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] == ten2mxtrunc192[ind].w[1] && fstar.w[0] > ten2mxtrunc192[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    if (fstar.w[4] > half192[ind] || (fstar.w[4] == half192[ind] &&
+				      (fstar.w[3] || fstar.w[2]
+				       || fstar.w[1] || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[4] - half192[ind];
+      if (tmp64 || fstar.w[3] || fstar.w[2] > ten2mxtrunc192[ind].w[2] || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] > ten2mxtrunc192[ind].w[1]) || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] == ten2mxtrunc192[ind].w[1] && fstar.w[0] > ten2mxtrunc192[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else {	// if 38 <= ind <= 55
+    if (fstar.w[5] > half192[ind] || (fstar.w[5] == half192[ind] &&
+				      (fstar.w[4] || fstar.w[3]
+				       || fstar.w[2] || fstar.w[1]
+				       || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[5] - half192[ind];
+      if (tmp64 || fstar.w[4] || fstar.w[3] || fstar.w[2] > ten2mxtrunc192[ind].w[2] || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] > ten2mxtrunc192[ind].w[1]) || (fstar.w[2] == ten2mxtrunc192[ind].w[2] && fstar.w[1] == ten2mxtrunc192[ind].w[1] && fstar.w[0] > ten2mxtrunc192[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  }
+  // check for midpoints (could do this before determining inexactness)
+  if (fstar.w[5] == 0 && fstar.w[4] == 0 && fstar.w[3] == 0 &&
+      (fstar.w[2] < ten2mxtrunc192[ind].w[2] ||
+       (fstar.w[2] == ten2mxtrunc192[ind].w[2] &&
+	fstar.w[1] < ten2mxtrunc192[ind].w[1]) ||
+       (fstar.w[2] == ten2mxtrunc192[ind].w[2] &&
+	fstar.w[1] == ten2mxtrunc192[ind].w[1] &&
+	fstar.w[0] <= ten2mxtrunc192[ind].w[0]))) {
+    // the result is a midpoint
+    if (Cstar.w[0] & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+      // if floor(C*) is odd C = floor(C*) - 1; the result may be 0
+      Cstar.w[0]--;	// Cstar is now even
+      if (Cstar.w[0] == 0xffffffffffffffffULL) {
+	Cstar.w[1]--;
+	if (Cstar.w[1] == 0xffffffffffffffffULL) {
+	  Cstar.w[2]--;
+	}
+      }
+      *ptr_is_midpoint_gt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    } else {	// else MP in [ODD, EVEN]
+      *ptr_is_midpoint_lt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    }
+  }
+  // check for rounding overflow, which occurs if Cstar = 10^(q-x)
+  ind = q - x;	// 1 <= ind <= q - 1
+  if (ind <= 19) {
+    if (Cstar.w[2] == 0x0ULL && Cstar.w[1] == 0x0ULL &&
+	Cstar.w[0] == ten2k64[ind]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[ind - 1];	// Cstar = 10^(q-x-1)
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind == 20) {
+    // if ind = 20
+    if (Cstar.w[2] == 0x0ULL && Cstar.w[1] == ten2k128[0].w[1] &&
+	Cstar.w[0] == ten2k128[0].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[19];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = 0x0ULL;
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind <= 38) {	// if 21 <= ind <= 38
+    if (Cstar.w[2] == 0x0ULL && Cstar.w[1] == ten2k128[ind - 20].w[1] &&
+	Cstar.w[0] == ten2k128[ind - 20].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k128[ind - 21].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k128[ind - 21].w[1];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind == 39) {
+    if (Cstar.w[2] == ten2k256[0].w[2] && Cstar.w[1] == ten2k256[0].w[1]
+	&& Cstar.w[0] == ten2k256[0].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k128[18].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k128[18].w[1];
+      Cstar.w[2] = 0x0ULL;
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else {	// if 40 <= ind <= 56
+    if (Cstar.w[2] == ten2k256[ind - 39].w[2] &&
+	Cstar.w[1] == ten2k256[ind - 39].w[1] &&
+	Cstar.w[0] == ten2k256[ind - 39].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k256[ind - 40].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k256[ind - 40].w[1];
+      Cstar.w[2] = ten2k256[ind - 40].w[2];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  }
+  ptr_Cstar->w[2] = Cstar.w[2];
+  ptr_Cstar->w[1] = Cstar.w[1];
+  ptr_Cstar->w[0] = Cstar.w[0];
+}
+
+
+void
+round256_58_76 (int q,
+		int x,
+		UINT256 C,
+		UINT256 * ptr_Cstar,
+		int *incr_exp,
+		int *ptr_is_midpoint_lt_even,
+		int *ptr_is_midpoint_gt_even,
+		int *ptr_is_inexact_lt_midpoint,
+		int *ptr_is_inexact_gt_midpoint) {
+
+  UINT512 P512;
+  UINT512 fstar;
+  UINT256 Cstar;
+  UINT64 tmp64;
+  int shift;
+  int ind;
+
+  // Note:
+  //    In round256_58_76() positive numbers with 58 <= q <= 76 will be 
+  //    rounded to nearest only for 24 <= x <= 61:
+  //     x = 42 or x = 43 or x = 24 or x = 25 when q = 58
+  //     x = 43 or x = 44 or x = 25 or x = 26 when q = 59
+  //     ...
+  //     x = 60 or x = 61 or x = 42 or x = 43 when q = 76
+  // However, for generality and possible uses outside the frame of IEEE 754R
+  // this implementation works for 1 <= x <= q - 1
+
+  // assume *ptr_is_midpoint_lt_even, *ptr_is_midpoint_gt_even,
+  // *ptr_is_inexact_lt_midpoint, and *ptr_is_inexact_gt_midpoint are
+  // initialized to 0 by the caller
+
+  // round a number C with q decimal digits, 58 <= q <= 76
+  // to q - x digits, 1 <= x <= 75
+  // C = C + 1/2 * 10^x where the result C fits in 256 bits
+  // (because the largest value is 9999999999999999999999999999999999999999
+  //     999999999999999999999999999999999999 + 500000000000000000000000000
+  //     000000000000000000000000000000000000000000000000 =
+  //     0x1736ca15d27a56cae15cf0e7b403d1f2bd6ebb0a50dc83ffffffffffffffffff, 
+  // which fits in 253 bits)
+  ind = x - 1;	// 0 <= ind <= 74
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint64[ind];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0) {
+	C.w[2]++;
+	if (C.w[2] == 0x0) {
+	  C.w[3]++;
+	}
+      }
+    }
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint128[ind - 19].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0) {
+	C.w[2]++;
+	if (C.w[2] == 0x0) {
+	  C.w[3]++;
+	}
+      }
+    }
+    tmp64 = C.w[1];
+    C.w[1] = C.w[1] + midpoint128[ind - 19].w[1];
+    if (C.w[1] < tmp64) {
+      C.w[2]++;
+      if (C.w[2] == 0x0) {
+	C.w[3]++;
+      }
+    }
+  } else if (ind <= 57) {	// if 38 <= ind <= 57
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint192[ind - 38].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0ull) {
+	C.w[2]++;
+	if (C.w[2] == 0x0) {
+	  C.w[3]++;
+	}
+      }
+    }
+    tmp64 = C.w[1];
+    C.w[1] = C.w[1] + midpoint192[ind - 38].w[1];
+    if (C.w[1] < tmp64) {
+      C.w[2]++;
+      if (C.w[2] == 0x0) {
+	C.w[3]++;
+      }
+    }
+    tmp64 = C.w[2];
+    C.w[2] = C.w[2] + midpoint192[ind - 38].w[2];
+    if (C.w[2] < tmp64) {
+      C.w[3]++;
+    }
+  } else {	// if 58 <= ind <= 76 (actually 58 <= ind <= 74)
+    tmp64 = C.w[0];
+    C.w[0] = C.w[0] + midpoint256[ind - 58].w[0];
+    if (C.w[0] < tmp64) {
+      C.w[1]++;
+      if (C.w[1] == 0x0ull) {
+	C.w[2]++;
+	if (C.w[2] == 0x0) {
+	  C.w[3]++;
+	}
+      }
+    }
+    tmp64 = C.w[1];
+    C.w[1] = C.w[1] + midpoint256[ind - 58].w[1];
+    if (C.w[1] < tmp64) {
+      C.w[2]++;
+      if (C.w[2] == 0x0) {
+	C.w[3]++;
+      }
+    }
+    tmp64 = C.w[2];
+    C.w[2] = C.w[2] + midpoint256[ind - 58].w[2];
+    if (C.w[2] < tmp64) {
+      C.w[3]++;
+    }
+    C.w[3] = C.w[3] + midpoint256[ind - 58].w[3];
+  }
+  // kx ~= 10^(-x), kx = Kx256[ind] * 2^(-Ex), 0 <= ind <= 74
+  // P512 = (C + 1/2 * 10^x) * kx * 2^Ex = (C + 1/2 * 10^x) * Kx
+  // the approximation kx of 10^(-x) was rounded up to 192 bits
+  __mul_256x256_to_512 (P512, C, Kx256[ind]);
+  // calculate C* = floor (P512) and f*
+  // Cstar = P512 >> Ex
+  // fstar = low Ex bits of P512
+  shift = Ex256m256[ind];	// in [0, 63] but have to consider four cases
+  if (ind <= 18) {	// if 0 <= ind <= 18 
+    Cstar.w[3] = (P512.w[7] >> shift);
+    Cstar.w[2] = (P512.w[7] << (64 - shift)) | (P512.w[6] >> shift);
+    Cstar.w[1] = (P512.w[6] << (64 - shift)) | (P512.w[5] >> shift);
+    Cstar.w[0] = (P512.w[5] << (64 - shift)) | (P512.w[4] >> shift);
+    fstar.w[7] = 0x0ULL;
+    fstar.w[6] = 0x0ULL;
+    fstar.w[5] = 0x0ULL;
+    fstar.w[4] = P512.w[4] & mask256[ind];
+    fstar.w[3] = P512.w[3];
+    fstar.w[2] = P512.w[2];
+    fstar.w[1] = P512.w[1];
+    fstar.w[0] = P512.w[0];
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    Cstar.w[3] = 0x0ULL;
+    Cstar.w[2] = P512.w[7] >> shift;
+    Cstar.w[1] = (P512.w[7] << (64 - shift)) | (P512.w[6] >> shift);
+    Cstar.w[0] = (P512.w[6] << (64 - shift)) | (P512.w[5] >> shift);
+    fstar.w[7] = 0x0ULL;
+    fstar.w[6] = 0x0ULL;
+    fstar.w[5] = P512.w[5] & mask256[ind];
+    fstar.w[4] = P512.w[4];
+    fstar.w[3] = P512.w[3];
+    fstar.w[2] = P512.w[2];
+    fstar.w[1] = P512.w[1];
+    fstar.w[0] = P512.w[0];
+  } else if (ind <= 56) {	// if 38 <= ind <= 56
+    Cstar.w[3] = 0x0ULL;
+    Cstar.w[2] = 0x0ULL;
+    Cstar.w[1] = P512.w[7] >> shift;
+    Cstar.w[0] = (P512.w[7] << (64 - shift)) | (P512.w[6] >> shift);
+    fstar.w[7] = 0x0ULL;
+    fstar.w[6] = P512.w[6] & mask256[ind];
+    fstar.w[5] = P512.w[5];
+    fstar.w[4] = P512.w[4];
+    fstar.w[3] = P512.w[3];
+    fstar.w[2] = P512.w[2];
+    fstar.w[1] = P512.w[1];
+    fstar.w[0] = P512.w[0];
+  } else if (ind == 57) {
+    Cstar.w[3] = 0x0ULL;
+    Cstar.w[2] = 0x0ULL;
+    Cstar.w[1] = 0x0ULL;
+    Cstar.w[0] = P512.w[7];
+    fstar.w[7] = 0x0ULL;
+    fstar.w[6] = P512.w[6];
+    fstar.w[5] = P512.w[5];
+    fstar.w[4] = P512.w[4];
+    fstar.w[3] = P512.w[3];
+    fstar.w[2] = P512.w[2];
+    fstar.w[1] = P512.w[1];
+    fstar.w[0] = P512.w[0];
+  } else {	// if 58 <= ind <= 74
+    Cstar.w[3] = 0x0ULL;
+    Cstar.w[2] = 0x0ULL;
+    Cstar.w[1] = 0x0ULL;
+    Cstar.w[0] = P512.w[7] >> shift;
+    fstar.w[7] = P512.w[7] & mask256[ind];
+    fstar.w[6] = P512.w[6];
+    fstar.w[5] = P512.w[5];
+    fstar.w[4] = P512.w[4];
+    fstar.w[3] = P512.w[3];
+    fstar.w[2] = P512.w[2];
+    fstar.w[1] = P512.w[1];
+    fstar.w[0] = P512.w[0];
+  }
+
+  // the top Ex bits of 10^(-x) are T* = ten2mxtrunc256[ind], e.g. if x=1,
+  // T*=ten2mxtrunc256[0]=
+  //     0xcccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccccc
+  // if (0 < f* < 10^(-x)) then the result is a midpoint
+  //   if floor(C*) is even then C* = floor(C*) - logical right
+  //       shift; C* has q - x decimal digits, correct by Prop. 1)
+  //   else if floor(C*) is odd C* = floor(C*)-1 (logical right
+  //       shift; C* has q - x decimal digits, correct by Pr. 1)
+  // else
+  //   C* = floor(C*) (logical right shift; C has q - x decimal digits,
+  //       correct by Property 1)
+  // in the caling function n = C* * 10^(e+x)
+
+  // determine inexactness of the rounding of C*
+  // if (0 < f* - 1/2 < 10^(-x)) then
+  //   the result is exact
+  // else // if (f* - 1/2 > T*) then
+  //   the result is inexact
+  if (ind <= 18) {	// if 0 <= ind <= 18
+    if (fstar.w[4] > half256[ind] || (fstar.w[4] == half256[ind] &&
+				      (fstar.w[3] || fstar.w[2]
+				       || fstar.w[1] || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[4] - half256[ind];
+      if (tmp64 || fstar.w[3] > ten2mxtrunc256[ind].w[2] || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] > ten2mxtrunc256[ind].w[2]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] > ten2mxtrunc256[ind].w[1]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] == ten2mxtrunc256[ind].w[1] && fstar.w[0] > ten2mxtrunc256[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else if (ind <= 37) {	// if 19 <= ind <= 37
+    if (fstar.w[5] > half256[ind] || (fstar.w[5] == half256[ind] &&
+				      (fstar.w[4] || fstar.w[3]
+				       || fstar.w[2] || fstar.w[1]
+				       || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[5] - half256[ind];
+      if (tmp64 || fstar.w[4] || fstar.w[3] > ten2mxtrunc256[ind].w[3] || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] > ten2mxtrunc256[ind].w[2]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] > ten2mxtrunc256[ind].w[1]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] == ten2mxtrunc256[ind].w[1] && fstar.w[0] > ten2mxtrunc256[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else if (ind <= 57) {	// if 38 <= ind <= 57
+    if (fstar.w[6] > half256[ind] || (fstar.w[6] == half256[ind] &&
+				      (fstar.w[5] || fstar.w[4]
+				       || fstar.w[3] || fstar.w[2]
+				       || fstar.w[1] || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[6] - half256[ind];
+      if (tmp64 || fstar.w[5] || fstar.w[4] || fstar.w[3] > ten2mxtrunc256[ind].w[3] || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] > ten2mxtrunc256[ind].w[2]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] > ten2mxtrunc256[ind].w[1]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] == ten2mxtrunc256[ind].w[1] && fstar.w[0] > ten2mxtrunc256[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  } else {	// if 58 <= ind <= 74
+    if (fstar.w[7] > half256[ind] || (fstar.w[7] == half256[ind] &&
+				      (fstar.w[6] || fstar.w[5]
+				       || fstar.w[4] || fstar.w[3]
+				       || fstar.w[2] || fstar.w[1]
+				       || fstar.w[0]))) {
+      // f* > 1/2 and the result may be exact
+      // Calculate f* - 1/2
+      tmp64 = fstar.w[7] - half256[ind];
+      if (tmp64 || fstar.w[6] || fstar.w[5] || fstar.w[4] || fstar.w[3] > ten2mxtrunc256[ind].w[3] || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] > ten2mxtrunc256[ind].w[2]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] > ten2mxtrunc256[ind].w[1]) || (fstar.w[3] == ten2mxtrunc256[ind].w[3] && fstar.w[2] == ten2mxtrunc256[ind].w[2] && fstar.w[1] == ten2mxtrunc256[ind].w[1] && fstar.w[0] > ten2mxtrunc256[ind].w[0])) {	// f* - 1/2 > 10^(-x)
+	*ptr_is_inexact_lt_midpoint = 1;
+      }	// else the result is exact
+    } else {	// the result is inexact; f2* <= 1/2
+      *ptr_is_inexact_gt_midpoint = 1;
+    }
+  }
+  // check for midpoints (could do this before determining inexactness)
+  if (fstar.w[7] == 0 && fstar.w[6] == 0 &&
+      fstar.w[5] == 0 && fstar.w[4] == 0 &&
+      (fstar.w[3] < ten2mxtrunc256[ind].w[3] ||
+       (fstar.w[3] == ten2mxtrunc256[ind].w[3] &&
+	fstar.w[2] < ten2mxtrunc256[ind].w[2]) ||
+       (fstar.w[3] == ten2mxtrunc256[ind].w[3] &&
+	fstar.w[2] == ten2mxtrunc256[ind].w[2] &&
+	fstar.w[1] < ten2mxtrunc256[ind].w[1]) ||
+       (fstar.w[3] == ten2mxtrunc256[ind].w[3] &&
+	fstar.w[2] == ten2mxtrunc256[ind].w[2] &&
+	fstar.w[1] == ten2mxtrunc256[ind].w[1] &&
+	fstar.w[0] <= ten2mxtrunc256[ind].w[0]))) {
+    // the result is a midpoint
+    if (Cstar.w[0] & 0x01) {	// Cstar is odd; MP in [EVEN, ODD]
+      // if floor(C*) is odd C = floor(C*) - 1; the result may be 0
+      Cstar.w[0]--;	// Cstar is now even
+      if (Cstar.w[0] == 0xffffffffffffffffULL) {
+	Cstar.w[1]--;
+	if (Cstar.w[1] == 0xffffffffffffffffULL) {
+	  Cstar.w[2]--;
+	  if (Cstar.w[2] == 0xffffffffffffffffULL) {
+	    Cstar.w[3]--;
+	  }
+	}
+      }
+      *ptr_is_midpoint_gt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    } else {	// else MP in [ODD, EVEN]
+      *ptr_is_midpoint_lt_even = 1;
+      *ptr_is_inexact_lt_midpoint = 0;
+      *ptr_is_inexact_gt_midpoint = 0;
+    }
+  }
+  // check for rounding overflow, which occurs if Cstar = 10^(q-x)
+  ind = q - x;	// 1 <= ind <= q - 1
+  if (ind <= 19) {
+    if (Cstar.w[3] == 0x0ULL && Cstar.w[2] == 0x0ULL &&
+	Cstar.w[1] == 0x0ULL && Cstar.w[0] == ten2k64[ind]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[ind - 1];	// Cstar = 10^(q-x-1)
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind == 20) {
+    // if ind = 20
+    if (Cstar.w[3] == 0x0ULL && Cstar.w[2] == 0x0ULL &&
+	Cstar.w[1] == ten2k128[0].w[1]
+	&& Cstar.w[0] == ten2k128[0].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k64[19];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = 0x0ULL;
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind <= 38) {	// if 21 <= ind <= 38
+    if (Cstar.w[3] == 0x0ULL && Cstar.w[2] == 0x0ULL &&
+	Cstar.w[1] == ten2k128[ind - 20].w[1] &&
+	Cstar.w[0] == ten2k128[ind - 20].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k128[ind - 21].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k128[ind - 21].w[1];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind == 39) {
+    if (Cstar.w[3] == 0x0ULL && Cstar.w[2] == ten2k256[0].w[2] &&
+	Cstar.w[1] == ten2k256[0].w[1]
+	&& Cstar.w[0] == ten2k256[0].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k128[18].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k128[18].w[1];
+      Cstar.w[2] = 0x0ULL;
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  } else if (ind <= 57) {	// if 40 <= ind <= 57
+    if (Cstar.w[3] == 0x0ULL && Cstar.w[2] == ten2k256[ind - 39].w[2] &&
+	Cstar.w[1] == ten2k256[ind - 39].w[1] &&
+	Cstar.w[0] == ten2k256[ind - 39].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k256[ind - 40].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k256[ind - 40].w[1];
+      Cstar.w[2] = ten2k256[ind - 40].w[2];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+    // else if (ind == 58) is not needed becauae we do not have ten2k192[] yet
+  } else {	// if 58 <= ind <= 77 (actually 58 <= ind <= 74)
+    if (Cstar.w[3] == ten2k256[ind - 39].w[3] &&
+	Cstar.w[2] == ten2k256[ind - 39].w[2] &&
+	Cstar.w[1] == ten2k256[ind - 39].w[1] &&
+	Cstar.w[0] == ten2k256[ind - 39].w[0]) {
+      // if  Cstar = 10^(q-x)
+      Cstar.w[0] = ten2k256[ind - 40].w[0];	// Cstar = 10^(q-x-1)
+      Cstar.w[1] = ten2k256[ind - 40].w[1];
+      Cstar.w[2] = ten2k256[ind - 40].w[2];
+      Cstar.w[3] = ten2k256[ind - 40].w[3];
+      *incr_exp = 1;
+    } else {
+      *incr_exp = 0;
+    }
+  }
+  ptr_Cstar->w[3] = Cstar.w[3];
+  ptr_Cstar->w[2] = Cstar.w[2];
+  ptr_Cstar->w[1] = Cstar.w[1];
+  ptr_Cstar->w[0] = Cstar.w[0];
+
+}
diff --git a/gcc-4.9/libgcc/config/libbid/bid_sqrt_macros.h b/gcc-4.9/libgcc/config/libbid/bid_sqrt_macros.h
new file mode 100644
index 000000000..0d0f8a073
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libbid/bid_sqrt_macros.h
@@ -0,0 +1,331 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _SQRT_MACROS_H_
+#define _SQRT_MACROS_H_
+
+#define FENCE __fence
+
+#if DOUBLE_EXTENDED_ON
+
+extern BINARY80 SQRT80 (BINARY80);
+
+
+__BID_INLINE__ UINT64
+short_sqrt128 (UINT128 A10) {
+  BINARY80 lx, ly, l64;
+  int_float f64;
+
+  // 2^64
+  f64.i = 0x5f800000;
+  l64 = (BINARY80) f64.d;
+  lx = (BINARY80) A10.w[1] * l64 + (BINARY80) A10.w[0];
+  ly = SQRT80 (lx);
+  return (UINT64) ly;
+}
+
+
+__BID_INLINE__ void
+long_sqrt128 (UINT128 * pCS, UINT256 C256) {
+  UINT256 C4;
+  UINT128 CS;
+  UINT64 X;
+  SINT64 SE;
+  BINARY80 l64, lm64, l128, lxL, lx, ly, lS, lSH, lSL, lE, l3, l2,
+    l1, l0, lp, lCl;
+  int_float fx, f64, fm64;
+  int *ple = (int *) &lx;
+
+  // 2^64
+  f64.i = 0x5f800000;
+  l64 = (BINARY80) f64.d;
+
+  l128 = l64 * l64;
+  lx = l3 = (BINARY80) C256.w[3] * l64 * l128;
+  l2 = (BINARY80) C256.w[2] * l128;
+  lx = FENCE (lx + l2);
+  l1 = (BINARY80) C256.w[1] * l64;
+  lx = FENCE (lx + l1);
+  l0 = (BINARY80) C256.w[0];
+  lx = FENCE (lx + l0);
+  // sqrt(C256)
+  lS = SQRT80 (lx);
+
+  // get coefficient
+  // 2^(-64)
+  fm64.i = 0x1f800000;
+  lm64 = (BINARY80) fm64.d;
+  CS.w[1] = (UINT64) (lS * lm64);
+  CS.w[0] = (UINT64) (lS - (BINARY80) CS.w[1] * l64);
+
+  ///////////////////////////////////////
+  //  CAUTION!
+  //  little endian code only
+  //  add solution for big endian
+  //////////////////////////////////////
+  lSH = lS;
+  *((UINT64 *) & lSH) &= 0xffffffff00000000ull;
+
+  // correction for C256 rounding
+  lCl = FENCE (l3 - lx);
+  lCl = FENCE (lCl + l2);
+  lCl = FENCE (lCl + l1);
+  lCl = FENCE (lCl + l0);
+
+  lSL = lS - lSH;
+
+  //////////////////////////////////////////
+  //   Watch for compiler re-ordering
+  //
+  /////////////////////////////////////////
+  // C256-S^2
+  lxL = FENCE (lx - lSH * lSH);
+  lp = lSH * lSL;
+  lp += lp;
+  lxL = FENCE (lxL - lp);
+  lSL *= lSL;
+  lxL = FENCE (lxL - lSL);
+  lCl += lxL;
+
+  // correction term
+  lE = lCl / (lS + lS);
+
+  // get low part of coefficient
+  X = CS.w[0];
+  if (lCl >= 0) {
+    SE = (SINT64) (lE);
+    CS.w[0] += SE;
+    if (CS.w[0] < X)
+      CS.w[1]++;
+  } else {
+    SE = (SINT64) (-lE);
+    CS.w[0] -= SE;
+    if (CS.w[0] > X)
+      CS.w[1]--;
+  }
+
+  pCS->w[0] = CS.w[0];
+  pCS->w[1] = CS.w[1];
+}
+
+#else
+
+extern double sqrt (double);
+
+__BID_INLINE__ UINT64
+short_sqrt128 (UINT128 A10) {
+  UINT256 ARS, ARS0, AE0, AE, S;
+
+  UINT64 MY, ES, CY;
+  double lx, l64;
+  int_double f64, ly;
+  int ey, k;
+
+  // 2^64
+  f64.i = 0x43f0000000000000ull;
+  l64 = f64.d;
+  lx = (double) A10.w[1] * l64 + (double) A10.w[0];
+  ly.d = 1.0 / sqrt (lx);
+
+  MY = (ly.i & 0x000fffffffffffffull) | 0x0010000000000000ull;
+  ey = 0x3ff - (ly.i >> 52);
+
+  // A10*RS^2
+  __mul_64x128_to_192 (ARS0, MY, A10);
+  __mul_64x192_to_256 (ARS, MY, ARS0);
+
+  // shr by 2*ey+40, to get a 64-bit value
+  k = (ey << 1) + 104 - 64;
+  if (k >= 128) {
+    if (k > 128)
+      ES = (ARS.w[2] >> (k - 128)) | (ARS.w[3] << (192 - k));
+    else
+      ES = ARS.w[2];
+  } else {
+    if (k >= 64) {
+      ARS.w[0] = ARS.w[1];
+      ARS.w[1] = ARS.w[2];
+      k -= 64;
+    }
+    if (k) {
+      __shr_128 (ARS, ARS, k);
+    }
+    ES = ARS.w[0];
+  }
+
+  ES = ((SINT64) ES) >> 1;
+
+  if (((SINT64) ES) < 0) {
+    ES = -ES;
+
+    // A*RS*eps (scaled by 2^64)
+    __mul_64x192_to_256 (AE0, ES, ARS0);
+
+    AE.w[0] = AE0.w[1];
+    AE.w[1] = AE0.w[2];
+    AE.w[2] = AE0.w[3];
+
+    __add_carry_out (S.w[0], CY, ARS0.w[0], AE.w[0]);
+    __add_carry_in_out (S.w[1], CY, ARS0.w[1], AE.w[1], CY);
+    S.w[2] = ARS0.w[2] + AE.w[2] + CY;
+  } else {
+    // A*RS*eps (scaled by 2^64)
+    __mul_64x192_to_256 (AE0, ES, ARS0);
+
+    AE.w[0] = AE0.w[1];
+    AE.w[1] = AE0.w[2];
+    AE.w[2] = AE0.w[3];
+
+    __sub_borrow_out (S.w[0], CY, ARS0.w[0], AE.w[0]);
+    __sub_borrow_in_out (S.w[1], CY, ARS0.w[1], AE.w[1], CY);
+    S.w[2] = ARS0.w[2] - AE.w[2] - CY;
+  }
+
+  k = ey + 51;
+
+  if (k >= 64) {
+    if (k >= 128) {
+      S.w[0] = S.w[2];
+      S.w[1] = 0;
+      k -= 128;
+    } else {
+      S.w[0] = S.w[1];
+      S.w[1] = S.w[2];
+    }
+    k -= 64;
+  }
+  if (k) {
+    __shr_128 (S, S, k);
+  }
+
+
+  return (UINT64) ((S.w[0] + 1) >> 1);
+
+}
+
+
+
+__BID_INLINE__ void
+long_sqrt128 (UINT128 * pCS, UINT256 C256) {
+  UINT512 ARS0, ARS;
+  UINT256 ARS00, AE, AE2, S;
+  UINT128 ES, ES2, ARS1;
+  UINT64 ES32, CY, MY;
+  double l64, l128, lx, l2, l1, l0;
+  int_double f64, ly;
+  int ey, k, k2;
+
+  // 2^64
+  f64.i = 0x43f0000000000000ull;
+  l64 = f64.d;
+
+  l128 = l64 * l64;
+  lx = (double) C256.w[3] * l64 * l128;
+  l2 = (double) C256.w[2] * l128;
+  lx = FENCE (lx + l2);
+  l1 = (double) C256.w[1] * l64;
+  lx = FENCE (lx + l1);
+  l0 = (double) C256.w[0];
+  lx = FENCE (lx + l0);
+  // sqrt(C256)
+  ly.d = 1.0 / sqrt (lx);
+
+  MY = (ly.i & 0x000fffffffffffffull) | 0x0010000000000000ull;
+  ey = 0x3ff - (ly.i >> 52);
+
+  // A10*RS^2, scaled by 2^(2*ey+104)
+  __mul_64x256_to_320 (ARS0, MY, C256);
+  __mul_64x320_to_384 (ARS, MY, ARS0);
+
+  // shr by k=(2*ey+104)-128
+  // expect k is in the range (192, 256) if result in [10^33, 10^34)
+  // apply an additional signed shift by 1 at the same time (to get eps=eps0/2)
+  k = (ey << 1) + 104 - 128 - 192;
+  k2 = 64 - k;
+  ES.w[0] = (ARS.w[3] >> (k + 1)) | (ARS.w[4] << (k2 - 1));
+  ES.w[1] = (ARS.w[4] >> k) | (ARS.w[5] << k2);
+  ES.w[1] = ((SINT64) ES.w[1]) >> 1;
+
+  // A*RS >> 192 (for error term computation)
+  ARS1.w[0] = ARS0.w[3];
+  ARS1.w[1] = ARS0.w[4];
+
+  // A*RS>>64
+  ARS00.w[0] = ARS0.w[1];
+  ARS00.w[1] = ARS0.w[2];
+  ARS00.w[2] = ARS0.w[3];
+  ARS00.w[3] = ARS0.w[4];
+
+  if (((SINT64) ES.w[1]) < 0) {
+    ES.w[0] = -ES.w[0];
+    ES.w[1] = -ES.w[1];
+    if (ES.w[0])
+      ES.w[1]--;
+
+    // A*RS*eps 
+    __mul_128x128_to_256 (AE, ES, ARS1);
+
+    __add_carry_out (S.w[0], CY, ARS00.w[0], AE.w[0]);
+    __add_carry_in_out (S.w[1], CY, ARS00.w[1], AE.w[1], CY);
+    __add_carry_in_out (S.w[2], CY, ARS00.w[2], AE.w[2], CY);
+    S.w[3] = ARS00.w[3] + AE.w[3] + CY;
+  } else {
+    // A*RS*eps 
+    __mul_128x128_to_256 (AE, ES, ARS1);
+
+    __sub_borrow_out (S.w[0], CY, ARS00.w[0], AE.w[0]);
+    __sub_borrow_in_out (S.w[1], CY, ARS00.w[1], AE.w[1], CY);
+    __sub_borrow_in_out (S.w[2], CY, ARS00.w[2], AE.w[2], CY);
+    S.w[3] = ARS00.w[3] - AE.w[3] - CY;
+  }
+
+  // 3/2*eps^2, scaled by 2^128
+  ES32 = ES.w[1] + (ES.w[1] >> 1);
+  __mul_64x64_to_128 (ES2, ES32, ES.w[1]);
+  // A*RS*3/2*eps^2
+  __mul_128x128_to_256 (AE2, ES2, ARS1);
+
+  // result, scaled by 2^(ey+52-64)
+  __add_carry_out (S.w[0], CY, S.w[0], AE2.w[0]);
+  __add_carry_in_out (S.w[1], CY, S.w[1], AE2.w[1], CY);
+  __add_carry_in_out (S.w[2], CY, S.w[2], AE2.w[2], CY);
+  S.w[3] = S.w[3] + AE2.w[3] + CY;
+
+  // k in (0, 64)
+  k = ey + 51 - 128;
+  k2 = 64 - k;
+  S.w[0] = (S.w[1] >> k) | (S.w[2] << k2);
+  S.w[1] = (S.w[2] >> k) | (S.w[3] << k2);
+
+  // round to nearest
+  S.w[0]++;
+  if (!S.w[0])
+    S.w[1]++;
+
+  pCS->w[0] = (S.w[1] << 63) | (S.w[0] >> 1);
+  pCS->w[1] = S.w[1] >> 1;
+
+}
+
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/libgcc-glibc.ver b/gcc-4.9/libgcc/config/libgcc-glibc.ver
new file mode 100644
index 000000000..bfbe4baf6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libgcc-glibc.ver
@@ -0,0 +1,55 @@
+# Copyright (C) 2000-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+%exclude {
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.0
+GLIBC_2.0 {
+  # Sampling of DImode arithmetic used by (at least) i386 and m68k.
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+
+  # Exception handling support functions used by most everyone.
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
diff --git a/gcc-4.9/libgcc/config/libgcc-libsystem.ver b/gcc-4.9/libgcc/config/libgcc-libsystem.ver
new file mode 100644
index 000000000..47631749d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/libgcc-libsystem.ver
@@ -0,0 +1 @@
+_darwin10_Unwind_FindEnclosingFunction
diff --git a/gcc-4.9/libgcc/config/lm32/_ashlsi3.S b/gcc-4.9/libgcc/config/lm32/_ashlsi3.S
new file mode 100644
index 000000000..ac2378302
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_ashlsi3.S
@@ -0,0 +1,114 @@
+# _ashlsi3.S for Lattice Mico32 
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+# 
+
+/* Arithmetic left shift.  */
+        
+        .text
+
+        .global __ashlsi3
+        .type __ashlsi3,@function
+
+        .align 4        
+__ashlsi3:
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
+        andi    r2, r2, 0x1f
+        /* Get address of offset into unrolled shift loop to jump to.  */
+#ifdef __PIC__
+        lw      r3, (gp+got(__ashlsi3_0))
+#else
+        mvhi    r3, hi(__ashlsi3_0)
+        ori     r3, r3, lo(__ashlsi3_0)
+#endif
+        add     r2, r2, r2
+        add     r2, r2, r2
+        sub     r3, r3, r2
+        b       r3        
+        
+__ashlsi3_31:
+        add     r1, r1, r1
+__ashlsi3_30:
+        add     r1, r1, r1
+__ashlsi3_29:
+        add     r1, r1, r1
+__ashlsi3_28:
+        add     r1, r1, r1
+__ashlsi3_27:
+        add     r1, r1, r1
+__ashlsi3_26:
+        add     r1, r1, r1
+__ashlsi3_25:
+        add     r1, r1, r1
+__ashlsi3_24:
+        add     r1, r1, r1
+__ashlsi3_23:
+        add     r1, r1, r1
+__ashlsi3_22:
+        add     r1, r1, r1
+__ashlsi3_21:
+        add     r1, r1, r1
+__ashlsi3_20:
+        add     r1, r1, r1
+__ashlsi3_19:
+        add     r1, r1, r1
+__ashlsi3_18:
+        add     r1, r1, r1
+__ashlsi3_17:
+        add     r1, r1, r1
+__ashlsi3_16:
+        add     r1, r1, r1
+__ashlsi3_15:
+        add     r1, r1, r1
+__ashlsi3_14:
+        add     r1, r1, r1
+__ashlsi3_13:
+        add     r1, r1, r1
+__ashlsi3_12:
+        add     r1, r1, r1
+__ashlsi3_11:
+        add     r1, r1, r1
+__ashlsi3_10:
+        add     r1, r1, r1
+__ashlsi3_9:
+        add     r1, r1, r1
+__ashlsi3_8:
+        add     r1, r1, r1
+__ashlsi3_7:
+        add     r1, r1, r1
+__ashlsi3_6:
+        add     r1, r1, r1
+__ashlsi3_5:
+        add     r1, r1, r1
+__ashlsi3_4:
+        add     r1, r1, r1
+__ashlsi3_3:
+        add     r1, r1, r1
+__ashlsi3_2:
+        add     r1, r1, r1
+__ashlsi3_1:
+        add     r1, r1, r1
+__ashlsi3_0:
+        ret
+                
+        
\ No newline at end of file
diff --git a/gcc-4.9/libgcc/config/lm32/_ashrsi3.S b/gcc-4.9/libgcc/config/lm32/_ashrsi3.S
new file mode 100644
index 000000000..6e86c50cc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_ashrsi3.S
@@ -0,0 +1,110 @@
+# _ashrsi3.S for Lattice Mico32 
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+# 
+
+/* Arithmetic right shift.  */
+
+        .global __ashrsi3
+        .type __ashrsi3,@function
+                                                  
+__ashrsi3:
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
+        andi    r2, r2, 0x1f
+        /* Get address of offset into unrolled shift loop to jump to.  */
+#ifdef __PIC__
+        lw      r3, (gp+got(__ashrsi3_0))
+#else
+        mvhi    r3, hi(__ashrsi3_0)
+        ori     r3, r3, lo(__ashrsi3_0)
+#endif
+        add     r2, r2, r2
+        add     r2, r2, r2
+        sub     r3, r3, r2
+        b       r3        
+        
+__ashrsi3_31:
+        sri     r1, r1, 1
+__ashrsi3_30:
+        sri     r1, r1, 1
+__ashrsi3_29:
+        sri     r1, r1, 1
+__ashrsi3_28:
+        sri     r1, r1, 1
+__ashrsi3_27:
+        sri     r1, r1, 1
+__ashrsi3_26:
+        sri     r1, r1, 1
+__ashrsi3_25:
+        sri     r1, r1, 1
+__ashrsi3_24:
+        sri     r1, r1, 1
+__ashrsi3_23:
+        sri     r1, r1, 1
+__ashrsi3_22:
+        sri     r1, r1, 1
+__ashrsi3_21:
+        sri     r1, r1, 1
+__ashrsi3_20:
+        sri     r1, r1, 1
+__ashrsi3_19:
+        sri     r1, r1, 1
+__ashrsi3_18:
+        sri     r1, r1, 1
+__ashrsi3_17:
+        sri     r1, r1, 1
+__ashrsi3_16:
+        sri     r1, r1, 1
+__ashrsi3_15:
+        sri     r1, r1, 1
+__ashrsi3_14:
+        sri     r1, r1, 1
+__ashrsi3_13:
+        sri     r1, r1, 1
+__ashrsi3_12:
+        sri     r1, r1, 1
+__ashrsi3_11:
+        sri     r1, r1, 1
+__ashrsi3_10:
+        sri     r1, r1, 1
+__ashrsi3_9:
+        sri     r1, r1, 1
+__ashrsi3_8:
+        sri     r1, r1, 1
+__ashrsi3_7:
+        sri     r1, r1, 1
+__ashrsi3_6:
+        sri     r1, r1, 1
+__ashrsi3_5:
+        sri     r1, r1, 1
+__ashrsi3_4:
+        sri     r1, r1, 1
+__ashrsi3_3:
+        sri     r1, r1, 1
+__ashrsi3_2:
+        sri     r1, r1, 1
+__ashrsi3_1:
+        sri     r1, r1, 1
+__ashrsi3_0:
+        ret
+        
\ No newline at end of file
diff --git a/gcc-4.9/libgcc/config/lm32/_divsi3.c b/gcc-4.9/libgcc/config/lm32/_divsi3.c
new file mode 100644
index 000000000..3d934ca14
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_divsi3.c
@@ -0,0 +1,99 @@
+/* _divsi3 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Signed integer division.  */
+
+static const UQItype __divsi3_table[] = {
+  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
+  0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
+  0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
+  0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+  0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
+  0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+  0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
+  0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
+  0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
+};
+
+SItype
+__divsi3 (SItype a, SItype b)
+{
+  int neg = 0;
+  SItype res;
+  int cfg;
+
+  if (b == 0)
+    {
+      /* Raise divide by zero exception.  */
+      int eba, sr;
+      /* Save interrupt enable.  */
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+      sr = (sr & 1) << 1;
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+      /* Branch to exception handler.  */
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+      eba += 32 * 5;
+      __asm__ __volatile__ ("mv ea, ra");
+      __asm__ __volatile__ ("b %0"::"r" (eba));
+      __builtin_unreachable ();
+    }
+
+  if (((USItype) (a | b)) < 16)
+    res = __divsi3_table[(a << 4) + b];
+  else
+    {
+
+      if (a < 0)
+	{
+	  a = -a;
+	  neg = !neg;
+	}
+
+      if (b < 0)
+	{
+	  b = -b;
+	  neg = !neg;
+	}
+
+    __asm__ ("rcsr %0, CFG":"=r" (cfg));
+      if (cfg & 2)
+      __asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
+      else
+	res = __udivmodsi4 (a, b, 0);
+
+      if (neg)
+	res = -res;
+    }
+
+  return res;
+}
diff --git a/gcc-4.9/libgcc/config/lm32/_lshrsi3.S b/gcc-4.9/libgcc/config/lm32/_lshrsi3.S
new file mode 100644
index 000000000..dc262d87b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_lshrsi3.S
@@ -0,0 +1,109 @@
+# _lshrsi3.S for Lattice Mico32 
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+# 
+
+/* Logical right shift.  */
+        
+        .global __lshrsi3
+        .type __lshrsi3,@function
+
+__lshrsi3:
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
+        andi    r2, r2, 0x1f
+        /* Get address of offset into unrolled shift loop to jump to.  */
+#ifdef __PIC__
+        lw      r3, (gp+got(__lshrsi3_0))
+#else
+        mvhi    r3, hi(__lshrsi3_0)
+        ori     r3, r3, lo(__lshrsi3_0)
+#endif
+        add     r2, r2, r2
+        add     r2, r2, r2
+        sub     r3, r3, r2
+        b       r3        
+        
+__lshrsi3_31:        
+        srui    r1, r1, 1
+__lshrsi3_30:        
+        srui    r1, r1, 1
+__lshrsi3_29:        
+        srui    r1, r1, 1
+__lshrsi3_28:        
+        srui    r1, r1, 1
+__lshrsi3_27:        
+        srui    r1, r1, 1
+__lshrsi3_26:        
+        srui    r1, r1, 1
+__lshrsi3_25:        
+        srui    r1, r1, 1
+__lshrsi3_24:        
+        srui    r1, r1, 1
+__lshrsi3_23:        
+        srui    r1, r1, 1
+__lshrsi3_22:        
+        srui    r1, r1, 1
+__lshrsi3_21:        
+        srui    r1, r1, 1
+__lshrsi3_20:        
+        srui    r1, r1, 1
+__lshrsi3_19:        
+        srui    r1, r1, 1
+__lshrsi3_18:        
+        srui    r1, r1, 1
+__lshrsi3_17:        
+        srui    r1, r1, 1
+__lshrsi3_16:        
+        srui    r1, r1, 1
+__lshrsi3_15:        
+        srui    r1, r1, 1
+__lshrsi3_14:        
+        srui    r1, r1, 1
+__lshrsi3_13:        
+        srui    r1, r1, 1
+__lshrsi3_12:        
+        srui    r1, r1, 1
+__lshrsi3_11:        
+        srui    r1, r1, 1
+__lshrsi3_10:        
+        srui    r1, r1, 1
+__lshrsi3_9:        
+        srui    r1, r1, 1
+__lshrsi3_8:        
+        srui    r1, r1, 1
+__lshrsi3_7:        
+        srui    r1, r1, 1
+__lshrsi3_6:        
+        srui    r1, r1, 1
+__lshrsi3_5:        
+        srui    r1, r1, 1
+__lshrsi3_4:        
+        srui    r1, r1, 1
+__lshrsi3_3:        
+        srui    r1, r1, 1
+__lshrsi3_2:        
+        srui    r1, r1, 1
+__lshrsi3_1:        
+        srui    r1, r1, 1
+__lshrsi3_0:        
+        ret
diff --git a/gcc-4.9/libgcc/config/lm32/_modsi3.c b/gcc-4.9/libgcc/config/lm32/_modsi3.c
new file mode 100644
index 000000000..5e23f2b2b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_modsi3.c
@@ -0,0 +1,71 @@
+/* _modsi3 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Signed integer modulus.  */
+
+SItype
+__modsi3 (SItype a, SItype b)
+{
+  int neg = 0;
+  SItype res;
+  int cfg;
+
+  if (b == 0)
+    {
+      /* Raise divide by zero exception.  */
+      int eba, sr;
+      /* Save interrupt enable.  */
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+      sr = (sr & 1) << 1;
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+      /* Branch to exception handler.  */
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+      eba += 32 * 5;
+      __asm__ __volatile__ ("mv ea, ra");
+      __asm__ __volatile__ ("b %0"::"r" (eba));
+      __builtin_unreachable ();
+    }
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+__asm__ ("rcsr %0, CFG":"=r" (cfg));
+  if (cfg & 2)
+  __asm__ ("modu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
+  else
+    res = __udivmodsi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
diff --git a/gcc-4.9/libgcc/config/lm32/_mulsi3.c b/gcc-4.9/libgcc/config/lm32/_mulsi3.c
new file mode 100644
index 000000000..9770820f3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_mulsi3.c
@@ -0,0 +1,48 @@
+/* _mulsi3 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Integer multiplication.  */
+
+USItype
+__mulsi3 (USItype a, USItype b)
+{
+  USItype result;
+
+  result = 0;
+
+  if (a == 0)
+    return 0;
+
+  while (b != 0)
+    {
+      if (b & 1)
+	result += a;
+      a <<= 1;
+      b >>= 1;
+    }
+
+  return result;
+}
diff --git a/gcc-4.9/libgcc/config/lm32/_udivmodsi4.c b/gcc-4.9/libgcc/config/lm32/_udivmodsi4.c
new file mode 100644
index 000000000..f0a844c08
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_udivmodsi4.c
@@ -0,0 +1,53 @@
+/* _udivmodsi4 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned integer division/modulus.  */
+
+USItype
+__udivmodsi4 (USItype num, USItype den, int modwanted)
+{
+  USItype bit = 1;
+  USItype res = 0;
+
+  while (den < num && bit && !(den & (1L << 31)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
diff --git a/gcc-4.9/libgcc/config/lm32/_udivsi3.c b/gcc-4.9/libgcc/config/lm32/_udivsi3.c
new file mode 100644
index 000000000..b416d8f84
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_udivsi3.c
@@ -0,0 +1,49 @@
+/* _udivsi3 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned integer division.  */
+
+USItype
+__udivsi3 (USItype a, USItype b)
+{
+  if (b == 0)
+    {
+      /* Raise divide by zero exception.  */
+      int eba, sr;
+      /* Save interrupt enable.  */
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+      sr = (sr & 1) << 1;
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+      /* Branch to exception handler.  */
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+      eba += 32 * 5;
+      __asm__ __volatile__ ("mv ea, ra");
+      __asm__ __volatile__ ("b %0"::"r" (eba));
+      __builtin_unreachable ();
+    }
+
+  return __udivmodsi4 (a, b, 0);
+}
diff --git a/gcc-4.9/libgcc/config/lm32/_umodsi3.c b/gcc-4.9/libgcc/config/lm32/_umodsi3.c
new file mode 100644
index 000000000..01a42359c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/_umodsi3.c
@@ -0,0 +1,49 @@
+/* _umodsi3 for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned modulus.  */
+
+USItype
+__umodsi3 (USItype a, USItype b)
+{
+  if (b == 0)
+    {
+      /* Raise divide by zero exception.  */
+      int eba, sr;
+      /* Save interrupt enable.  */
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+      sr = (sr & 1) << 1;
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+      /* Branch to exception handler.  */
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+      eba += 32 * 5;
+      __asm__ __volatile__ ("mv ea, ra");
+      __asm__ __volatile__ ("b %0"::"r" (eba));
+      __builtin_unreachable ();
+    }
+
+  return __udivmodsi4 (a, b, 1);
+}
diff --git a/gcc-4.9/libgcc/config/lm32/crti.S b/gcc-4.9/libgcc/config/lm32/crti.S
new file mode 100644
index 000000000..4375378c8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/crti.S
@@ -0,0 +1,40 @@
+# crti.S for Lattice Mico32 
+# Contributed by Jon Beniston <jon@beniston.com>
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+#
+
+        .section .init
+        .global _init
+        .type _init,@function
+        .align 4
+_init:
+        addi    sp, sp, -4        
+        sw      (sp+4), ra
+
+        .section .fini
+        .global _fini
+        .type _fini,@function
+        .align 4
+_fini:        
+        addi    sp, sp, -4        
+        sw      (sp+4), ra
diff --git a/gcc-4.9/libgcc/config/lm32/crtn.S b/gcc-4.9/libgcc/config/lm32/crtn.S
new file mode 100644
index 000000000..e31dc8a9c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/crtn.S
@@ -0,0 +1,37 @@
+# crtn.S for Lattice Mico32
+# Contributed by Jon Beniston <jon@beniston.com>
+#
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+# 
+
+        .section .init
+        
+        lw      ra, (sp+4)
+        addi    sp, sp, 4
+        ret
+                
+        .section .fini
+        
+        lw      ra, (sp+4)
+        addi    sp, sp, 4
+        ret
+        
diff --git a/gcc-4.9/libgcc/config/lm32/libgcc_lm32.h b/gcc-4.9/libgcc/config/lm32/libgcc_lm32.h
new file mode 100644
index 000000000..2fc5e1d8e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/libgcc_lm32.h
@@ -0,0 +1,43 @@
+/* Integer arithmetic support for Lattice Mico32.
+   Contributed by Jon Beniston <jon@beniston.com> 
+   
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>. */
+
+#ifndef LIBGCC_LM32_H
+#define LIBGCC_LM32_H 
+
+/* Types.  */
+
+typedef unsigned char UQItype __attribute__ ((mode (QI)));
+typedef long SItype __attribute__ ((mode (SI)));
+typedef unsigned long USItype __attribute__ ((mode (SI)));
+
+/* Prototypes.  */
+
+USItype __mulsi3 (USItype a, USItype b);
+USItype __udivmodsi4 (USItype num, USItype den, int modwanted);
+SItype __divsi3 (SItype a, SItype b);
+SItype __modsi3 (SItype a, SItype b);
+USItype __udivsi3 (USItype a, USItype b);
+USItype __umodsi3 (USItype a, USItype b);
+
+#endif /* LIBGCC_LM32_H */
diff --git a/gcc-4.9/libgcc/config/lm32/sfp-machine.h b/gcc-4.9/libgcc/config/lm32/sfp-machine.h
new file mode 100644
index 000000000..f3f2e9adb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/sfp-machine.h
@@ -0,0 +1,55 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#define __BYTE_ORDER __BIG_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/lm32/t-elf b/gcc-4.9/libgcc/config/lm32/t-elf
new file mode 100644
index 000000000..f96c0988b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/t-elf
@@ -0,0 +1,2 @@
+CRTSTUFF_T_CFLAGS = -G 0 -msign-extend-enabled
+HOST_LIBGCC2_CFLAGS += -G 0 -msign-extend-enabled
diff --git a/gcc-4.9/libgcc/config/lm32/t-lm32 b/gcc-4.9/libgcc/config/lm32/t-lm32
new file mode 100644
index 000000000..725e09a79
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/t-lm32
@@ -0,0 +1,10 @@
+LIB2ADD += \
+        $(srcdir)/config/lm32/_ashlsi3.S \
+        $(srcdir)/config/lm32/_ashrsi3.S \
+        $(srcdir)/config/lm32/_lshrsi3.S \
+        $(srcdir)/config/lm32/_mulsi3.c \
+        $(srcdir)/config/lm32/_udivmodsi4.c \
+        $(srcdir)/config/lm32/_divsi3.c \
+        $(srcdir)/config/lm32/_modsi3.c \
+        $(srcdir)/config/lm32/_udivsi3.c \
+        $(srcdir)/config/lm32/_umodsi3.c
diff --git a/gcc-4.9/libgcc/config/lm32/t-uclinux b/gcc-4.9/libgcc/config/lm32/t-uclinux
new file mode 100644
index 000000000..764243c8f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/lm32/t-uclinux
@@ -0,0 +1,2 @@
+CRTSTUFF_T_CFLAGS = $(PICFLAG) -msign-extend-enabled
+HOST_LIBGCC2_CFLAGS += -msign-extend-enabled
diff --git a/gcc-4.9/libgcc/config/m32c/lib1funcs.S b/gcc-4.9/libgcc/config/m32c/lib1funcs.S
new file mode 100644
index 000000000..821d37314
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32c/lib1funcs.S
@@ -0,0 +1,230 @@
+/* libgcc routines for R8C/M16C/M32C
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if defined(__r8c_cpu__) || defined(__m16c_cpu__)
+#define A16
+#define A(n,w) n
+#define W w
+#else
+#define A24
+#define A(n,w) w
+#define W l
+#endif
+
+
+#ifdef L__m32c_memregs
+
+/* Warning: these memory locations are used as a register bank.  They
+   *must* end up consecutive in any final executable, so you may *not*
+   use the otherwise obvious ".comm" directive to allocate space for
+   them. */
+
+	.bss
+	.global	mem0
+mem0:	.space	1
+	.global	mem1
+mem1:	.space	1
+	.global	mem2
+mem2:	.space	1
+	.global	mem3
+mem3:	.space	1
+	.global	mem4
+mem4:	.space	1
+	.global	mem5
+mem5:	.space	1
+	.global	mem6
+mem6:	.space	1
+	.global	mem7
+mem7:	.space	1
+	.global	mem8
+mem8:	.space	1
+	.global	mem9
+mem9:	.space	1
+	.global	mem10
+mem10:	.space	1
+	.global	mem11
+mem11:	.space	1
+	.global	mem12
+mem12:	.space	1
+	.global	mem13
+mem13:	.space	1
+	.global	mem14
+mem14:	.space	1
+	.global	mem15
+mem15:	.space	1
+
+#endif
+
+#ifdef L__m32c_eh_return
+	.text
+	.global __m32c_eh_return
+__m32c_eh_return:	
+
+	/* At this point, r0 has the stack adjustment, r1r3 has the
+	   address to return to.  The stack looks like this:
+
+	   old_ra
+	   old_fp
+	   <- unwound sp
+	   ...
+	   fb
+	   through
+	   r0
+	   <- sp
+
+	   What we need to do is restore all the registers, update the
+	   stack, and return to the right place.
+	*/
+
+	stc	sp,a0
+	
+	add.W	A(#16,#24),a0
+	/* a0 points to the current stack, just above the register
+	   save areas */
+
+	mov.w	a0,a1
+	exts.w	r0
+	sub.W	A(r0,r2r0),a1
+	sub.W	A(#3,#4),a1
+	/* a1 points to the new stack.  */
+
+	/* This is for the "rts" below.  */
+	mov.w	r1,[a1]
+#ifdef A16
+	mov.w	r2,r1
+	mov.b	r1l,2[a1]
+#else
+	mov.w	r2,2[a1]
+#endif
+
+	/* This is for the "popc sp" below.  */
+	mov.W	a1,[a0]	
+
+	popm    r0,r1,r2,r3,a0,a1,sb,fb
+	popc	sp
+	rts
+#endif
+
+/* SImode arguments for SI foo(SI,SI) functions.  */
+#ifdef A16
+#define SAL  5[fb]
+#define SAH  7[fb]
+#define SBL  9[fb]
+#define SBH 11[fb]
+#else
+#define SAL  8[fb]
+#define SAH 10[fb]
+#define SBL 12[fb]
+#define SBH 14[fb]
+#endif
+
+#ifdef L__m32c_mulsi3
+	.text
+	.global ___mulsi3
+___mulsi3:
+	enter	#0
+	push.w	r2
+	mov.w	SAL,r0
+	mulu.w	SBL,r0		/* writes to r2r0 */
+	mov.w	r0,mem0
+	mov.w	r2,mem2
+	mov.w	SAL,r0
+	mulu.w	SBH,r0		/* writes to r2r0 */
+	add.w	r0,mem2
+	mov.w	SAH,r0
+	mulu.w	SBL,r0		/* writes to r2r0 */
+	add.w	r0,mem2
+	pop.w	r2
+	exitd
+#endif
+
+#ifdef L__m32c_cmpsi2
+	.text
+	.global ___cmpsi2
+___cmpsi2:
+	enter	#0
+	cmp.w	SBH,SAH
+	jgt	cmpsi_gt
+	jlt	cmpsi_lt
+	cmp.w	SBL,SAL
+	jgt	cmpsi_gt
+	jlt	cmpsi_lt
+	mov.w	#1,r0
+	exitd
+cmpsi_gt:
+	mov.w	#2,r0
+	exitd
+cmpsi_lt:
+	mov.w	#0,r0
+	exitd
+#endif
+
+#ifdef L__m32c_ucmpsi2
+	.text
+	.global ___ucmpsi2
+___ucmpsi2:
+	enter	#0
+	cmp.w	SBH,SAH
+	jgtu	cmpsi_gt
+	jltu	cmpsi_lt
+	cmp.w	SBL,SAL
+	jgtu	cmpsi_gt
+	jltu	cmpsi_lt
+	mov.w	#1,r0
+	exitd
+cmpsi_gt:
+	mov.w	#2,r0
+	exitd
+cmpsi_lt:
+	mov.w	#0,r0
+	exitd
+#endif
+
+#ifdef L__m32c_jsri16
+	.text
+#ifdef A16
+	.global	m32c_jsri16
+m32c_jsri16:
+	add.w	#-1, sp
+
+	/* Read the address (16 bits) and return address (24 bits) off
+	the stack.  */
+	mov.w	4[sp], r0
+	mov.w	1[sp], r3
+	mov.b	3[sp], a0 /* This zero-extends, so the high byte has
+			     zero in it.  */
+
+	/* Write the return address, then new address, to the stack.  */
+	mov.w	a0, 1[sp] /* Just to get the zero in 2[sp].  */
+	mov.w	r0, 0[sp]
+	mov.w	r3, 3[sp]
+	mov.b	a0, 5[sp]
+
+	/* This "returns" to the target address, leaving the pending
+	return address on the stack.  */
+	rts
+#endif
+
+#endif
diff --git a/gcc-4.9/libgcc/config/m32c/lib2funcs.c b/gcc-4.9/libgcc/config/m32c/lib2funcs.c
new file mode 100644
index 000000000..0bc6c194b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32c/lib2funcs.c
@@ -0,0 +1,147 @@
+/* libgcc routines for R8C/M16C/M32C
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+uint32_type udivmodsi4 (uint32_type, uint32_type, word_type);
+sint32_type __divsi3   (sint32_type, sint32_type);
+sint32_type __modsi3   (sint32_type, sint32_type);
+
+uint32_type
+udivmodsi4 (uint32_type num, uint32_type den, word_type modwanted)
+{
+  uint32_type bit = 1;
+  uint32_type res = 0;
+
+  while (den < num && bit && !(den & (1L << 31)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
+
+sint32_type
+__divsi3 (sint32_type a, sint32_type b)
+{
+  word_type neg = 0;
+  sint32_type res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodsi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+sint32_type
+__modsi3 (sint32_type a, sint32_type b)
+{
+  word_type neg = 0;
+  sint32_type res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodsi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+/* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
+   m32c.h for why we are creating extra versions of some of the
+   functions defined in libgcc2.c.  */
+
+#define LIBGCC2_UNITS_PER_WORD 2
+
+#define L_clzsi2
+#define L_ctzsi2
+#define L_ffssi2
+#define L_paritysi2
+#define L_popcountsi2
+
+#include "libgcc2.c"
+
+uint32_type
+__udivsi3 (uint32_type a, uint32_type b)
+{
+  return udivmodsi4 (a, b, 0);
+}
+
+uint32_type
+__umoddi3 (uint32_type a, uint32_type b)
+{
+  return udivmodsi4 (a, b, 1);
+}
+
+/* Returns the number of leading redundant sign bits in X.
+   I.e. the number of bits following the most significant bit which are
+   identical to it.  There are no special cases for 0 or other values.  */
+
+int
+__clrsbhi2 (word_type x)
+{
+  if (x < 0)
+    x = ~x;
+  if (x == 0)
+    return 15;
+  return __builtin_clz (x) - 1;
+}
diff --git a/gcc-4.9/libgcc/config/m32c/t-m32c b/gcc-4.9/libgcc/config/m32c/t-m32c
new file mode 100644
index 000000000..dac99ec65
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32c/t-m32c
@@ -0,0 +1,13 @@
+LIB1ASMSRC = m32c/lib1funcs.S
+
+LIB1ASMFUNCS = \
+	__m32c_memregs \
+	__m32c_eh_return \
+	__m32c_mulsi3 \
+	__m32c_cmpsi2 \
+	__m32c_ucmpsi2 \
+	__m32c_jsri16
+
+LIB2ADD = $(srcdir)/config/m32c/lib2funcs.c \
+	  $(srcdir)/config/m32c/trapv.c
+
diff --git a/gcc-4.9/libgcc/config/m32c/trapv.c b/gcc-4.9/libgcc/config/m32c/trapv.c
new file mode 100644
index 000000000..14cddc135
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32c/trapv.c
@@ -0,0 +1,42 @@
+/* 16-bit trapping arithmetic routines for R8C/M16C/M32C
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
+   m32c.h for why we are creating extra versions of some of the
+   functions defined in libgcc2.c.
+
+   Note - this file is separate from lib2funcs.c so that the following
+   functions will appear in the their object file.  This is necessary
+   because they call abort() which is defined in the C library whereas
+   the functions in lib2funcs.c are completely self sufficient.  */
+
+#define LIBGCC2_UNITS_PER_WORD 2
+
+#define L_mulvsi3
+#define L_negvsi2
+#define L_addvsi3
+#define L_subvsi3
+
+#include "libgcc2.c"
diff --git a/gcc-4.9/libgcc/config/m32r/initfini.c b/gcc-4.9/libgcc/config/m32r/initfini.c
new file mode 100644
index 000000000..80dd063ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32r/initfini.c
@@ -0,0 +1,168 @@
+/* .init/.fini section handling + C++ global constructor/destructor handling.
+   This file is based on crtstuff.c, sol2-crti.S, sol2-crtn.S.
+
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/*  Declare a pointer to void function type.  */
+typedef void (*func_ptr) (void);
+
+#ifdef CRT_INIT
+
+/* NOTE:  In order to be able to support SVR4 shared libraries, we arrange
+   to have one set of symbols { __CTOR_LIST__, __DTOR_LIST__, __CTOR_END__,
+   __DTOR_END__ } per root executable and also one set of these symbols
+   per shared library.  So in any given whole process image, we may have
+   multiple definitions of each of these symbols.  In order to prevent
+   these definitions from conflicting with one another, and in order to
+   ensure that the proper lists are used for the initialization/finalization
+   of each individual shared library (respectively), we give these symbols
+   only internal (i.e. `static') linkage, and we also make it a point to
+   refer to only the __CTOR_END__ symbol in crtfini.o and the __DTOR_LIST__
+   symbol in crtinit.o, where they are defined.  */
+
+static func_ptr __CTOR_LIST__[1]
+  __attribute__ ((used, section (".ctors")))
+     = { (func_ptr) (-1) };
+
+static func_ptr __DTOR_LIST__[1]
+  __attribute__ ((used, section (".dtors")))
+     = { (func_ptr) (-1) };
+
+/* Run all the global destructors on exit from the program.  */
+ 
+/* Some systems place the number of pointers in the first word of the
+   table.  On SVR4 however, that word is -1.  In all cases, the table is
+   null-terminated.  On SVR4, we start from the beginning of the list and
+   invoke each per-compilation-unit destructor routine in order
+   until we find that null.
+
+   Note that this function MUST be static.  There will be one of these
+   functions in each root executable and one in each shared library, but
+   although they all have the same code, each one is unique in that it
+   refers to one particular associated `__DTOR_LIST__' which belongs to the
+   same particular root executable or shared library file.  */
+
+static void __do_global_dtors (void)
+asm ("__do_global_dtors") __attribute__ ((used, section (".text")));
+
+static void
+__do_global_dtors (void)
+{
+  func_ptr *p;
+
+  for (p = __DTOR_LIST__ + 1; *p; p++)
+    (*p) ();
+}
+
+/* .init section start.
+   This must appear at the start of the .init section.  */
+
+asm ("\n\
+	.section .init,\"ax\",@progbits\n\
+	.balign 4\n\
+	.global __init\n\
+__init:\n\
+	push fp\n\
+	push lr\n\
+	mv fp,sp\n\
+	seth r0, #shigh(__fini)\n\
+	add3 r0, r0, #low(__fini)\n\
+	bl atexit\n\
+	.fillinsn\n\
+");
+
+/* .fini section start.
+   This must appear at the start of the .init section.  */
+
+asm ("\n\
+	.section .fini,\"ax\",@progbits\n\
+	.balign 4\n\
+	.global __fini\n\
+__fini:\n\
+	push fp\n\
+	push lr\n\
+	mv fp,sp\n\
+	bl __do_global_dtors\n\
+	.fillinsn\n\
+");
+
+#endif /* CRT_INIT */
+
+#ifdef CRT_FINI
+
+/* Put a word containing zero at the end of each of our two lists of function
+   addresses.  Note that the words defined here go into the .ctors and .dtors
+   sections of the crtend.o file, and since that file is always linked in
+   last, these words naturally end up at the very ends of the two lists
+   contained in these two sections.  */
+
+static func_ptr __CTOR_END__[1]
+  __attribute__ ((used, section (".ctors")))
+     = { (func_ptr) 0 };
+
+static func_ptr __DTOR_END__[1]
+  __attribute__ ((used, section (".dtors")))
+     = { (func_ptr) 0 };
+
+/* Run all global constructors for the program.
+   Note that they are run in reverse order.  */
+
+static void __do_global_ctors (void)
+asm ("__do_global_ctors") __attribute__ ((used, section (".text")));
+
+static void
+__do_global_ctors (void)
+{
+  func_ptr *p;
+
+  for (p = __CTOR_END__ - 1; *p != (func_ptr) -1; p--)
+    (*p) ();
+}
+
+/* .init section end.
+   This must live at the end of the .init section.  */
+
+asm ("\n\
+	.section .init,\"ax\",@progbits\n\
+	bl __do_global_ctors\n\
+	mv sp,fp\n\
+	pop lr\n\
+	pop fp\n\
+	jmp lr\n\
+	.fillinsn\n\
+");
+
+/* .fini section end.
+   This must live at the end of the .fini section.  */
+
+asm ("\n\
+	.section .fini,\"ax\",@progbits\n\
+	mv sp,fp\n\
+	pop lr\n\
+	pop fp\n\
+	jmp lr\n\
+	.fillinsn\n\
+");
+
+#endif /* CRT_FINI */
diff --git a/gcc-4.9/libgcc/config/m32r/libgcc-glibc.ver b/gcc-4.9/libgcc/config/m32r/libgcc-glibc.ver
new file mode 100644
index 000000000..a23407c08
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32r/libgcc-glibc.ver
@@ -0,0 +1,48 @@
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+# Note that we cannot use the default libgcc-glibc.ver file on sh,
+# because GLIBC_2.0 does not exist on this architecture, as the first 
+# ever glibc release on the platform was GLIBC_2.3.
+
+%exclude {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.3
+GLIBC_2.3 {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
diff --git a/gcc-4.9/libgcc/config/m32r/t-linux b/gcc-4.9/libgcc/config/m32r/t-linux
new file mode 100644
index 000000000..5223b731f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32r/t-linux
@@ -0,0 +1,5 @@
+# Turn off the SDA while compiling libgcc2.  There are no headers for it
+# and we want maximal upward compatibility here.
+HOST_LIBGCC2_CFLAGS += -G 0
+
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/m32r/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/m32r/t-m32r b/gcc-4.9/libgcc/config/m32r/t-m32r
new file mode 100644
index 000000000..861044b15
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m32r/t-m32r
@@ -0,0 +1,23 @@
+# Turn off the SDA while compiling libgcc2.  There are no headers for it
+# and we want maximal upward compatibility here.
+HOST_LIBGCC2_CFLAGS += -G 0
+
+# We need to use -fpic when we are using gcc to compile the routines in
+# initfini.c.  This is only really needed when we are going to use gcc/g++
+# to produce a shared library, but since we don't know ahead of time when
+# we will be doing that, we just always use -fpic when compiling the
+# routines in initfini.c.
+# -fpic currently isn't supported for the m32r.
+# FIXME: No longer true.  Empty CRTSTUFF_T_CFLAGS is the default.
+CRTSTUFF_T_CFLAGS =
+
+# .init/.fini section routines
+crtinit.o: $(srcdir)/config/m32r/initfini.c
+	$(crt_compile) $(CRTSTUFF_T_CFLAGS) -DCRT_INIT \
+	-finhibit-size-directive -fno-inline-functions -g0 \
+	-mmodel=medium -c $<
+
+crtfini.o: $(srcdir)/config/m32r/initfini.c
+	$(crt_compile) $(CRTSTUFF_T_CFLAGS) -DCRT_FINI \
+	-finhibit-size-directive -fno-inline-functions -g0 \
+	-mmodel=medium -c $<
diff --git a/gcc-4.9/libgcc/config/m68k/crti.S b/gcc-4.9/libgcc/config/m68k/crti.S
new file mode 100644
index 000000000..8cc60ddbb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/crti.S
@@ -0,0 +1,44 @@
+/* Specialized code needed to support construction and destruction of
+   file-scope objects in C++ and Java code, and to support exception handling.
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Charles-Antoine Gauthier (charles.gauthier@iit.nrc.ca).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file just supplies function prologues for the .init and .fini
+ * sections.  It is linked in before crtbegin.o.
+ */
+
+	.ident  "GNU C crti.o"
+
+	.section .init
+	.globl  _init
+	.type   _init,@function
+_init:
+	linkw %fp,#0
+
+	.section .fini
+	.globl  _fini
+	.type   _fini,@function
+_fini:
+	linkw %fp,#0
diff --git a/gcc-4.9/libgcc/config/m68k/crtn.S b/gcc-4.9/libgcc/config/m68k/crtn.S
new file mode 100644
index 000000000..7a36e7606
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/crtn.S
@@ -0,0 +1,40 @@
+/* Specialized code needed to support construction and destruction of
+   file-scope objects in C++ and Java code, and to support exception handling.
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Charles-Antoine Gauthier (charles.gauthier@iit.nrc.ca).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * This file supplies function epilogues for the .init and .fini sections.
+ * It is linked in after all other files.
+ */
+
+	.ident  "GNU C crtn.o"
+
+	.section .init
+	unlk %fp
+	rts
+
+	.section .fini
+	unlk %fp
+	rts
diff --git a/gcc-4.9/libgcc/config/m68k/fpgnulib.c b/gcc-4.9/libgcc/config/m68k/fpgnulib.c
new file mode 100644
index 000000000..fe41edf26
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/fpgnulib.c
@@ -0,0 +1,595 @@
+/* This is a stripped down version of floatlib.c.  It supplies only those
+   functions which exist in libgcc, but for which there is not assembly
+   language versions in m68k/lb1sf68.S.
+
+   It also includes simplistic support for extended floats (by working in
+   double precision).  You must compile this file again with -DEXTFLOAT
+   to get this support.  */
+
+/*
+** gnulib support for software floating point.
+** Copyright (C) 1991 by Pipeline Associates, Inc.  All rights reserved.
+** Permission is granted to do *anything* you want with this file,
+** commercial or otherwise, provided this message remains intact.  So there!
+** I would appreciate receiving any updates/patches/changes that anyone
+** makes, and am willing to be the repository for said changes (am I
+** making a big mistake?).
+**
+** Pat Wood
+** Pipeline Associates, Inc.
+** pipeline!phw@motown.com or
+** sun!pipeline!phw or
+** uunet!motown!pipeline!phw
+**
+** 05/01/91 -- V1.0 -- first release to gcc mailing lists
+** 05/04/91 -- V1.1 -- added float and double prototypes and return values
+**                  -- fixed problems with adding and subtracting zero
+**                  -- fixed rounding in truncdfsf2
+**                  -- fixed SWAP define and tested on 386
+*/
+
+/*
+** The following are routines that replace the gnulib soft floating point
+** routines that are called automatically when -msoft-float is selected.
+** The support single and double precision IEEE format, with provisions
+** for byte-swapped machines (tested on 386).  Some of the double-precision
+** routines work at full precision, but most of the hard ones simply punt
+** and call the single precision routines, producing a loss of accuracy.
+** long long support is not assumed or included.
+** Overall accuracy is close to IEEE (actually 68882) for single-precision
+** arithmetic.  I think there may still be a 1 in 1000 chance of a bit
+** being rounded the wrong way during a multiply.  I'm not fussy enough to
+** bother with it, but if anyone is, knock yourself out.
+**
+** Efficiency has only been addressed where it was obvious that something
+** would make a big difference.  Anyone who wants to do this right for
+** best speed should go in and rewrite in assembler.
+**
+** I have tested this only on a 68030 workstation and 386/ix integrated
+** in with -msoft-float.
+*/
+
+/* the following deal with IEEE single-precision numbers */
+#define EXCESS		126L
+#define SIGNBIT		0x80000000L
+#define HIDDEN		(1L << 23L)
+#define SIGN(fp)	((fp) & SIGNBIT)
+#define EXP(fp)		(((fp) >> 23L) & 0xFF)
+#define MANT(fp)	(((fp) & 0x7FFFFFL) | HIDDEN)
+#define PACK(s,e,m)	((s) | ((e) << 23L) | (m))
+
+/* the following deal with IEEE double-precision numbers */
+#define EXCESSD		1022L
+#define HIDDEND		(1L << 20L)
+#define EXPDBITS	11
+#define EXPDMASK	0x7FFL
+#define EXPD(fp)	(((fp.l.upper) >> 20L) & 0x7FFL)
+#define SIGND(fp)	((fp.l.upper) & SIGNBIT)
+#define MANTD(fp)	(((((fp.l.upper) & 0xFFFFF) | HIDDEND) << 10) | \
+				(fp.l.lower >> 22))
+#define MANTDMASK	0xFFFFFL /* mask of upper part */
+
+/* the following deal with IEEE extended-precision numbers */
+#define EXCESSX		16382L
+#define HIDDENX		(1L << 31L)
+#define EXPXBITS	15
+#define EXPXMASK	0x7FFF
+#define EXPX(fp)	(((fp.l.upper) >> 16) & EXPXMASK)
+#define SIGNX(fp)	((fp.l.upper) & SIGNBIT)
+#define MANTXMASK	0x7FFFFFFFL /* mask of upper part */
+
+union double_long 
+{
+  double d;
+  struct {
+      long upper;
+      unsigned long lower;
+    } l;
+};
+
+union float_long {
+  float f;
+  long l;
+};
+
+union long_double_long
+{
+  long double ld;
+  struct
+    {
+      long upper;
+      unsigned long middle;
+      unsigned long lower;
+    } l;
+};
+
+#ifndef EXTFLOAT
+
+int
+__unordsf2(float a, float b)
+{
+  union float_long fl;
+
+  fl.f = a;
+  if (EXP(fl.l) == EXP(~0u) && (MANT(fl.l) & ~HIDDEN) != 0)
+    return 1;
+  fl.f = b;
+  if (EXP(fl.l) == EXP(~0u) && (MANT(fl.l) & ~HIDDEN) != 0)
+    return 1;
+  return 0;
+}
+
+int
+__unorddf2(double a, double b)
+{
+  union double_long dl;
+
+  dl.d = a;
+  if (EXPD(dl) == EXPDMASK
+      && ((dl.l.upper & MANTDMASK) != 0 || dl.l.lower != 0))
+    return 1;
+  dl.d = b;
+  if (EXPD(dl) == EXPDMASK
+      && ((dl.l.upper & MANTDMASK) != 0 || dl.l.lower != 0))
+    return 1;
+  return 0;
+}
+
+/* convert unsigned int to double */
+double
+__floatunsidf (unsigned long a1)
+{
+  long exp = 32 + EXCESSD;
+  union double_long dl;
+
+  if (!a1)
+    {
+      dl.l.upper = dl.l.lower = 0;
+      return dl.d;
+    }
+
+  while (a1 < 0x2000000L)
+    {
+      a1 <<= 4;
+      exp -= 4;
+    }
+
+  while (a1 < 0x80000000L)
+    {
+      a1 <<= 1;
+      exp--;
+    }
+
+  /* pack up and go home */
+  dl.l.upper = exp << 20L;
+  dl.l.upper |= (a1 >> 11L) & ~HIDDEND;
+  dl.l.lower = a1 << 21L;
+
+  return dl.d;
+}
+
+/* convert int to double */
+double
+__floatsidf (long a1)
+{
+  long sign = 0, exp = 31 + EXCESSD;
+  union double_long dl;
+
+  if (!a1)
+    {
+      dl.l.upper = dl.l.lower = 0;
+      return dl.d;
+    }
+
+  if (a1 < 0)
+    {
+      sign = SIGNBIT;
+      a1 = (long)-(unsigned long)a1;
+      if (a1 < 0)
+	{
+	  dl.l.upper = SIGNBIT | ((32 + EXCESSD) << 20L);
+	  dl.l.lower = 0;
+	  return dl.d;
+        }
+    }
+
+  while (a1 < 0x1000000L)
+    {
+      a1 <<= 4;
+      exp -= 4;
+    }
+
+  while (a1 < 0x40000000L)
+    {
+      a1 <<= 1;
+      exp--;
+    }
+
+  /* pack up and go home */
+  dl.l.upper = sign;
+  dl.l.upper |= exp << 20L;
+  dl.l.upper |= (a1 >> 10L) & ~HIDDEND;
+  dl.l.lower = a1 << 22L;
+
+  return dl.d;
+}
+
+/* convert unsigned int to float */
+float
+__floatunsisf (unsigned long l)
+{
+  double foo = __floatunsidf (l);
+  return foo;
+}
+
+/* convert int to float */
+float
+__floatsisf (long l)
+{
+  double foo = __floatsidf (l);
+  return foo;
+}
+
+/* convert float to double */
+double
+__extendsfdf2 (float a1)
+{
+  register union float_long fl1;
+  register union double_long dl;
+  register long exp;
+  register long mant;
+
+  fl1.f = a1;
+
+  dl.l.upper = SIGN (fl1.l);
+  if ((fl1.l & ~SIGNBIT) == 0)
+    {
+      dl.l.lower = 0;
+      return dl.d;
+    }
+
+  exp = EXP(fl1.l);
+  mant = MANT (fl1.l) & ~HIDDEN;
+  if (exp == 0)
+    {
+      /* Denormal.  */
+      exp = 1;
+      while (!(mant & HIDDEN))
+	{
+	  mant <<= 1;
+	  exp--;
+	}
+      mant &= ~HIDDEN;
+    }
+  exp = exp - EXCESS + EXCESSD;
+  dl.l.upper |= exp << 20;
+  dl.l.upper |= mant >> 3;
+  dl.l.lower = mant << 29;
+	
+  return dl.d;
+}
+
+/* convert double to float */
+float
+__truncdfsf2 (double a1)
+{
+  register long exp;
+  register long mant;
+  register union float_long fl;
+  register union double_long dl1;
+  int sticky;
+  int shift;
+
+  dl1.d = a1;
+
+  if ((dl1.l.upper & ~SIGNBIT) == 0 && !dl1.l.lower)
+    {
+      fl.l = SIGND(dl1);
+      return fl.f;
+    }
+
+  exp = EXPD (dl1) - EXCESSD + EXCESS;
+
+  sticky = dl1.l.lower & ((1 << 22) - 1);
+  mant = MANTD (dl1);
+  /* shift double mantissa 6 bits so we can round */
+  sticky |= mant & ((1 << 6) - 1);
+  mant >>= 6;
+
+  /* Check for underflow and denormals.  */
+  if (exp <= 0)
+    {
+      if (exp < -24)
+	{
+	  sticky |= mant;
+	  mant = 0;
+	}
+      else
+	{
+	  sticky |= mant & ((1 << (1 - exp)) - 1);
+	  mant >>= 1 - exp;
+	}
+      exp = 0;
+    }
+  
+  /* now round */
+  shift = 1;
+  if ((mant & 1) && (sticky || (mant & 2)))
+    {
+      int rounding = exp ? 2 : 1;
+
+      mant += 1;
+
+      /* did the round overflow? */
+      if (mant >= (HIDDEN << rounding))
+	{
+	  exp++;
+	  shift = rounding;
+	}
+    }
+  /* shift down */
+  mant >>= shift;
+
+  mant &= ~HIDDEN;
+
+  /* pack up and go home */
+  fl.l = PACK (SIGND (dl1), exp, mant);
+  return (fl.f);
+}
+
+/* convert double to int */
+long
+__fixdfsi (double a1)
+{
+  register union double_long dl1;
+  register long exp;
+  register long l;
+
+  dl1.d = a1;
+
+  if (!dl1.l.upper && !dl1.l.lower) 
+    return 0;
+
+  exp = EXPD (dl1) - EXCESSD - 31;
+  l = MANTD (dl1);
+
+  if (exp > 0) 
+    {
+      /* Return largest integer.  */
+      return SIGND (dl1) ? 0x80000000L : 0x7fffffffL;
+    }
+
+  if (exp <= -32)
+    return 0;
+
+  /* shift down until exp = 0 */
+  if (exp < 0)
+    l >>= -exp;
+
+  return (SIGND (dl1) ? -l : l);
+}
+
+/* convert float to int */
+long
+__fixsfsi (float a1)
+{
+  double foo = a1;
+  return __fixdfsi (foo);
+}
+
+#else /* EXTFLOAT */
+
+/* We do not need these routines for coldfire, as it has no extended
+   float format. */
+#if !defined (__mcoldfire__)
+
+/* Primitive extended precision floating point support.
+
+   We assume all numbers are normalized, don't do any rounding, etc.  */
+
+/* Prototypes for the above in case we use them.  */
+double __floatunsidf (unsigned long);
+double __floatsidf (long);
+float __floatsisf (long);
+double __extendsfdf2 (float);
+float __truncdfsf2 (double);
+long __fixdfsi (double);
+long __fixsfsi (float);
+
+int
+__unordxf2(long double a, long double b)
+{
+  union long_double_long ldl;
+
+  ldl.ld = a;
+  if (EXPX(ldl) == EXPXMASK
+      && ((ldl.l.middle & MANTXMASK) != 0 || ldl.l.lower != 0))
+    return 1;
+  ldl.ld = b;
+  if (EXPX(ldl) == EXPXMASK
+      && ((ldl.l.middle & MANTXMASK) != 0 || ldl.l.lower != 0))
+    return 1;
+  return 0;
+}
+
+/* convert double to long double */
+long double
+__extenddfxf2 (double d)
+{
+  register union double_long dl;
+  register union long_double_long ldl;
+  register long exp;
+
+  dl.d = d;
+  /*printf ("dfxf in: %g\n", d);*/
+
+  ldl.l.upper = SIGND (dl);
+  if ((dl.l.upper & ~SIGNBIT) == 0 && !dl.l.lower)
+    {
+      ldl.l.middle = 0;
+      ldl.l.lower = 0;
+      return ldl.ld;
+    }
+
+  exp = EXPD (dl) - EXCESSD + EXCESSX;
+  ldl.l.upper |= exp << 16;
+  ldl.l.middle = HIDDENX;
+  /* 31-20: # mantissa bits in ldl.l.middle - # mantissa bits in dl.l.upper */
+  ldl.l.middle |= (dl.l.upper & MANTDMASK) << (31 - 20);
+  /* 1+20: explicit-integer-bit + # mantissa bits in dl.l.upper */
+  ldl.l.middle |= dl.l.lower >> (1 + 20);
+  /* 32 - 21: # bits of dl.l.lower in ldl.l.middle */
+  ldl.l.lower = dl.l.lower << (32 - 21);
+
+  /*printf ("dfxf out: %s\n", dumpxf (ldl.ld));*/
+  return ldl.ld;
+}
+
+/* convert long double to double */
+double
+__truncxfdf2 (long double ld)
+{
+  register long exp;
+  register union double_long dl;
+  register union long_double_long ldl;
+
+  ldl.ld = ld;
+  /*printf ("xfdf in: %s\n", dumpxf (ld));*/
+
+  dl.l.upper = SIGNX (ldl);
+  if ((ldl.l.upper & ~SIGNBIT) == 0 && !ldl.l.middle && !ldl.l.lower)
+    {
+      dl.l.lower = 0;
+      return dl.d;
+    }
+
+  exp = EXPX (ldl) - EXCESSX + EXCESSD;
+  /* ??? quick and dirty: keep `exp' sane */
+  if (exp >= EXPDMASK)
+    exp = EXPDMASK - 1;
+  dl.l.upper |= exp << (32 - (EXPDBITS + 1));
+  /* +1-1: add one for sign bit, but take one off for explicit-integer-bit */
+  dl.l.upper |= (ldl.l.middle & MANTXMASK) >> (EXPDBITS + 1 - 1);
+  dl.l.lower = (ldl.l.middle & MANTXMASK) << (32 - (EXPDBITS + 1 - 1));
+  dl.l.lower |= ldl.l.lower >> (EXPDBITS + 1 - 1);
+
+  /*printf ("xfdf out: %g\n", dl.d);*/
+  return dl.d;
+}
+
+/* convert a float to a long double */
+long double
+__extendsfxf2 (float f)
+{
+  long double foo = __extenddfxf2 (__extendsfdf2 (f));
+  return foo;
+}
+
+/* convert a long double to a float */
+float
+__truncxfsf2 (long double ld)
+{
+  float foo = __truncdfsf2 (__truncxfdf2 (ld));
+  return foo;
+}
+
+/* convert an int to a long double */
+long double
+__floatsixf (long l)
+{
+  double foo = __floatsidf (l);
+  return foo;
+}
+
+/* convert an unsigned int to a long double */
+long double
+__floatunsixf (unsigned long l)
+{
+  double foo = __floatunsidf (l);
+  return foo;
+}
+
+/* convert a long double to an int */
+long
+__fixxfsi (long double ld)
+{
+  long foo = __fixdfsi ((double) ld);
+  return foo;
+}
+
+/* The remaining provide crude math support by working in double precision.  */
+
+long double
+__addxf3 (long double x1, long double x2)
+{
+  return (double) x1 + (double) x2;
+}
+
+long double
+__subxf3 (long double x1, long double x2)
+{
+  return (double) x1 - (double) x2;
+}
+
+long double
+__mulxf3 (long double x1, long double x2)
+{
+  return (double) x1 * (double) x2;
+}
+
+long double
+__divxf3 (long double x1, long double x2)
+{
+  return (double) x1 / (double) x2;
+}
+
+long double
+__negxf2 (long double x1)
+{
+  return - (double) x1;
+}
+
+long
+__cmpxf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__eqxf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__nexf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__ltxf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__lexf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__gtxf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+long
+__gexf2 (long double x1, long double x2)
+{
+  return __cmpdf2 ((double) x1, (double) x2);
+}
+
+#endif /* !__mcoldfire__ */
+#endif /* EXTFLOAT */
diff --git a/gcc-4.9/libgcc/config/m68k/lb1sf68.S b/gcc-4.9/libgcc/config/m68k/lb1sf68.S
new file mode 100644
index 000000000..afd1defa8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/lb1sf68.S
@@ -0,0 +1,4116 @@
+/* libgcc routines for 68000 w/o floating-point hardware.
+   Copyright (C) 1994-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Use this one for any 680x0; assumes no floating point hardware.
+   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
+   Some of this code comes from MINIX, via the folks at ericsson.
+   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
+*/
+
+/* These are predefined by new versions of GNU cpp.  */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __IMMEDIATE_PREFIX__
+#define __IMMEDIATE_PREFIX__ #
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Note that X is a function.  */
+	
+#ifdef __ELF__
+#define FUNC(x) .type SYM(x),function
+#else
+/* The .proc pseudo-op is accepted, but ignored, by GAS.  We could just	
+   define this to the empty string for non-ELF systems, but defining it
+   to .proc means that the information is available to the assembler if
+   the need arises.  */
+#define FUNC(x) .proc
+#endif
+		
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for immediate values.  */
+
+#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
+
+#define d0 REG (d0)
+#define d1 REG (d1)
+#define d2 REG (d2)
+#define d3 REG (d3)
+#define d4 REG (d4)
+#define d5 REG (d5)
+#define d6 REG (d6)
+#define d7 REG (d7)
+#define a0 REG (a0)
+#define a1 REG (a1)
+#define a2 REG (a2)
+#define a3 REG (a3)
+#define a4 REG (a4)
+#define a5 REG (a5)
+#define a6 REG (a6)
+#define fp REG (fp)
+#define sp REG (sp)
+#define pc REG (pc)
+
+/* Provide a few macros to allow for PIC code support.
+ * With PIC, data is stored A5 relative so we've got to take a bit of special
+ * care to ensure that all loads of global data is via A5.  PIC also requires
+ * jumps and subroutine calls to be PC relative rather than absolute.  We cheat
+ * a little on this and in the PIC case, we use short offset branches and
+ * hope that the final object code is within range (which it should be).
+ */
+#ifndef __PIC__
+
+	/* Non PIC (absolute/relocatable) versions */
+
+	.macro PICCALL addr
+	jbsr	\addr
+	.endm
+
+	.macro PICJUMP addr
+	jmp	\addr
+	.endm
+
+	.macro PICLEA sym, reg
+	lea	\sym, \reg
+	.endm
+
+	.macro PICPEA sym, areg
+	pea	\sym
+	.endm
+
+#else /* __PIC__ */
+
+# if defined (__uClinux__)
+
+	/* Versions for uClinux */
+
+#  if defined(__ID_SHARED_LIBRARY__)
+
+	/* -mid-shared-library versions  */
+
+	.macro PICLEA sym, reg
+	movel	a5@(_current_shared_library_a5_offset_), \reg
+	movel	\sym@GOT(\reg), \reg
+	.endm
+
+	.macro PICPEA sym, areg
+	movel	a5@(_current_shared_library_a5_offset_), \areg
+	movel	\sym@GOT(\areg), sp@-
+	.endm
+
+	.macro PICCALL addr
+	PICLEA	\addr,a0
+	jsr	a0@
+	.endm
+
+	.macro PICJUMP addr
+	PICLEA	\addr,a0
+	jmp	a0@
+	.endm
+
+#  else /* !__ID_SHARED_LIBRARY__ */
+
+	/* Versions for -msep-data */
+
+	.macro PICLEA sym, reg
+	movel	\sym@GOT(a5), \reg
+	.endm
+
+	.macro PICPEA sym, areg
+	movel	\sym@GOT(a5), sp@-
+	.endm
+
+	.macro PICCALL addr
+#if defined (__mcoldfire__) && !defined (__mcfisab__) && !defined (__mcfisac__)
+	lea	\addr-.-8,a0
+	jsr	pc@(a0)
+#else
+	jbsr	\addr
+#endif
+	.endm
+
+	.macro PICJUMP addr
+	/* ISA C has no bra.l instruction, and since this assembly file
+	   gets assembled into multiple object files, we avoid the
+	   bra instruction entirely.  */
+#if defined (__mcoldfire__) && !defined (__mcfisab__)
+	lea	\addr-.-8,a0
+	jmp	pc@(a0)
+#else
+	bra	\addr
+#endif
+	.endm
+
+#  endif
+
+# else /* !__uClinux__ */
+
+	/* Versions for Linux */
+
+	.macro PICLEA sym, reg
+	movel	#_GLOBAL_OFFSET_TABLE_@GOTPC, \reg
+	lea	(-6, pc, \reg), \reg
+	movel	\sym@GOT(\reg), \reg
+	.endm
+
+	.macro PICPEA sym, areg
+	movel	#_GLOBAL_OFFSET_TABLE_@GOTPC, \areg
+	lea	(-6, pc, \areg), \areg
+	movel	\sym@GOT(\areg), sp@-
+	.endm
+
+	.macro PICCALL addr
+#if defined (__mcoldfire__) && !defined (__mcfisab__) && !defined (__mcfisac__)
+	lea	\addr-.-8,a0
+	jsr	pc@(a0)
+#else
+	jbsr	\addr
+#endif
+	.endm
+
+	.macro PICJUMP addr
+	/* ISA C has no bra.l instruction, and since this assembly file
+	   gets assembled into multiple object files, we avoid the
+	   bra instruction entirely.  */
+#if defined (__mcoldfire__) && !defined (__mcfisab__)
+	lea	\addr-.-8,a0
+	jmp	pc@(a0)
+#else
+	bra	\addr
+#endif
+	.endm
+
+# endif
+#endif /* __PIC__ */
+
+
+#ifdef L_floatex
+
+| This is an attempt at a decent floating point (single, double and 
+| extended double) code for the GNU C compiler. It should be easy to
+| adapt to other compilers (but beware of the local labels!).
+
+| Starting date: 21 October, 1990
+
+| It is convenient to introduce the notation (s,e,f) for a floating point
+| number, where s=sign, e=exponent, f=fraction. We will call a floating
+| point number fpn to abbreviate, independently of the precision.
+| Let MAX_EXP be in each case the maximum exponent (255 for floats, 1023 
+| for doubles and 16383 for long doubles). We then have the following 
+| different cases:
+|  1. Normalized fpns have 0 < e < MAX_EXP. They correspond to 
+|     (-1)^s x 1.f x 2^(e-bias-1).
+|  2. Denormalized fpns have e=0. They correspond to numbers of the form
+|     (-1)^s x 0.f x 2^(-bias).
+|  3. +/-INFINITY have e=MAX_EXP, f=0.
+|  4. Quiet NaN (Not a Number) have all bits set.
+|  5. Signaling NaN (Not a Number) have s=0, e=MAX_EXP, f=1.
+
+|=============================================================================
+|                                  exceptions
+|=============================================================================
+
+| This is the floating point condition code register (_fpCCR):
+|
+| struct {
+|   short _exception_bits;	
+|   short _trap_enable_bits;	
+|   short _sticky_bits;
+|   short _rounding_mode;
+|   short _format;
+|   short _last_operation;
+|   union {
+|     float sf;
+|     double df;
+|   } _operand1;
+|   union {
+|     float sf;
+|     double df;
+|   } _operand2;
+| } _fpCCR;
+
+	.data
+	.even
+
+	.globl	SYM (_fpCCR)
+	
+SYM (_fpCCR):
+__exception_bits:
+	.word	0
+__trap_enable_bits:
+	.word	0
+__sticky_bits:
+	.word	0
+__rounding_mode:
+	.word	ROUND_TO_NEAREST
+__format:
+	.word	NIL
+__last_operation:
+	.word	NOOP
+__operand1:
+	.long	0
+	.long	0
+__operand2:
+	.long 	0
+	.long	0
+
+| Offsets:
+EBITS  = __exception_bits - SYM (_fpCCR)
+TRAPE  = __trap_enable_bits - SYM (_fpCCR)
+STICK  = __sticky_bits - SYM (_fpCCR)
+ROUND  = __rounding_mode - SYM (_fpCCR)
+FORMT  = __format - SYM (_fpCCR)
+LASTO  = __last_operation - SYM (_fpCCR)
+OPER1  = __operand1 - SYM (_fpCCR)
+OPER2  = __operand2 - SYM (_fpCCR)
+
+| The following exception types are supported:
+INEXACT_RESULT 		= 0x0001
+UNDERFLOW 		= 0x0002
+OVERFLOW 		= 0x0004
+DIVIDE_BY_ZERO 		= 0x0008
+INVALID_OPERATION 	= 0x0010
+
+| The allowed rounding modes are:
+UNKNOWN           = -1
+ROUND_TO_NEAREST  = 0 | round result to nearest representable value
+ROUND_TO_ZERO     = 1 | round result towards zero
+ROUND_TO_PLUS     = 2 | round result towards plus infinity
+ROUND_TO_MINUS    = 3 | round result towards minus infinity
+
+| The allowed values of format are:
+NIL          = 0
+SINGLE_FLOAT = 1
+DOUBLE_FLOAT = 2
+LONG_FLOAT   = 3
+
+| The allowed values for the last operation are:
+NOOP         = 0
+ADD          = 1
+MULTIPLY     = 2
+DIVIDE       = 3
+NEGATE       = 4
+COMPARE      = 5
+EXTENDSFDF   = 6
+TRUNCDFSF    = 7
+
+|=============================================================================
+|                           __clear_sticky_bits
+|=============================================================================
+
+| The sticky bits are normally not cleared (thus the name), whereas the 
+| exception type and exception value reflect the last computation. 
+| This routine is provided to clear them (you can also write to _fpCCR,
+| since it is globally visible).
+
+	.globl  SYM (__clear_sticky_bit)
+
+	.text
+	.even
+
+| void __clear_sticky_bits(void);
+SYM (__clear_sticky_bit):		
+	PICLEA	SYM (_fpCCR),a0
+#ifndef __mcoldfire__
+	movew	IMM (0),a0@(STICK)
+#else
+	clr.w	a0@(STICK)
+#endif
+	rts
+
+|=============================================================================
+|                           $_exception_handler
+|=============================================================================
+
+	.globl  $_exception_handler
+
+	.text
+	.even
+
+| This is the common exit point if an exception occurs.
+| NOTE: it is NOT callable from C!
+| It expects the exception type in d7, the format (SINGLE_FLOAT,
+| DOUBLE_FLOAT or LONG_FLOAT) in d6, and the last operation code in d5.
+| It sets the corresponding exception and sticky bits, and the format. 
+| Depending on the format if fills the corresponding slots for the 
+| operands which produced the exception (all this information is provided
+| so if you write your own exception handlers you have enough information
+| to deal with the problem).
+| Then checks to see if the corresponding exception is trap-enabled, 
+| in which case it pushes the address of _fpCCR and traps through 
+| trap FPTRAP (15 for the moment).
+
+FPTRAP = 15
+
+$_exception_handler:
+	PICLEA	SYM (_fpCCR),a0
+	movew	d7,a0@(EBITS)	| set __exception_bits
+#ifndef __mcoldfire__
+	orw	d7,a0@(STICK)	| and __sticky_bits
+#else
+	movew	a0@(STICK),d4
+	orl	d7,d4
+	movew	d4,a0@(STICK)
+#endif
+	movew	d6,a0@(FORMT)	| and __format
+	movew	d5,a0@(LASTO)	| and __last_operation
+
+| Now put the operands in place:
+#ifndef __mcoldfire__
+	cmpw	IMM (SINGLE_FLOAT),d6
+#else
+	cmpl	IMM (SINGLE_FLOAT),d6
+#endif
+	beq	1f
+	movel	a6@(8),a0@(OPER1)
+	movel	a6@(12),a0@(OPER1+4)
+	movel	a6@(16),a0@(OPER2)
+	movel	a6@(20),a0@(OPER2+4)
+	bra	2f
+1:	movel	a6@(8),a0@(OPER1)
+	movel	a6@(12),a0@(OPER2)
+2:
+| And check whether the exception is trap-enabled:
+#ifndef __mcoldfire__
+	andw	a0@(TRAPE),d7	| is exception trap-enabled?
+#else
+	clrl	d6
+	movew	a0@(TRAPE),d6
+	andl	d6,d7
+#endif
+	beq	1f		| no, exit
+	PICPEA	SYM (_fpCCR),a1	| yes, push address of _fpCCR
+	trap	IMM (FPTRAP)	| and trap
+#ifndef __mcoldfire__
+1:	moveml	sp@+,d2-d7	| restore data registers
+#else
+1:	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+#endif /* L_floatex */
+
+#ifdef  L_mulsi3
+	.text
+	FUNC(__mulsi3)
+	.globl	SYM (__mulsi3)
+SYM (__mulsi3):
+	movew	sp@(4), d0	/* x0 -> d0 */
+	muluw	sp@(10), d0	/* x0*y1 */
+	movew	sp@(6), d1	/* x1 -> d1 */
+	muluw	sp@(8), d1	/* x1*y0 */
+#ifndef __mcoldfire__
+	addw	d1, d0
+#else
+	addl	d1, d0
+#endif
+	swap	d0
+	clrw	d0
+	movew	sp@(6), d1	/* x1 -> d1 */
+	muluw	sp@(10), d1	/* x1*y1 */
+	addl	d1, d0
+
+	rts
+#endif /* L_mulsi3 */
+
+#ifdef  L_udivsi3
+	.text
+	FUNC(__udivsi3)
+	.globl	SYM (__udivsi3)
+SYM (__udivsi3):
+#ifndef __mcoldfire__
+	movel	d2, sp@-
+	movel	sp@(12), d1	/* d1 = divisor */
+	movel	sp@(8), d0	/* d0 = dividend */
+
+	cmpl	IMM (0x10000), d1 /* divisor >= 2 ^ 16 ?   */
+	jcc	L3		/* then try next algorithm */
+	movel	d0, d2
+	clrw	d2
+	swap	d2
+	divu	d1, d2          /* high quotient in lower word */
+	movew	d2, d0		/* save high quotient */
+	swap	d0
+	movew	sp@(10), d2	/* get low dividend + high rest */
+	divu	d1, d2		/* low quotient */
+	movew	d2, d0
+	jra	L6
+
+L3:	movel	d1, d2		/* use d2 as divisor backup */
+L4:	lsrl	IMM (1), d1	/* shift divisor */
+	lsrl	IMM (1), d0	/* shift dividend */
+	cmpl	IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ?  */
+	jcc	L4
+	divu	d1, d0		/* now we have 16-bit divisor */
+	andl	IMM (0xffff), d0 /* mask out divisor, ignore remainder */
+
+/* Multiply the 16-bit tentative quotient with the 32-bit divisor.  Because of
+   the operand ranges, this might give a 33-bit product.  If this product is
+   greater than the dividend, the tentative quotient was too large. */
+	movel	d2, d1
+	mulu	d0, d1		/* low part, 32 bits */
+	swap	d2
+	mulu	d0, d2		/* high part, at most 17 bits */
+	swap	d2		/* align high part with low part */
+	tstw	d2		/* high part 17 bits? */
+	jne	L5		/* if 17 bits, quotient was too large */
+	addl	d2, d1		/* add parts */
+	jcs	L5		/* if sum is 33 bits, quotient was too large */
+	cmpl	sp@(8), d1	/* compare the sum with the dividend */
+	jls	L6		/* if sum > dividend, quotient was too large */
+L5:	subql	IMM (1), d0	/* adjust quotient */
+
+L6:	movel	sp@+, d2
+	rts
+
+#else /* __mcoldfire__ */
+
+/* ColdFire implementation of non-restoring division algorithm from
+   Hennessy & Patterson, Appendix A. */
+	link	a6,IMM (-12)
+	moveml	d2-d4,sp@
+	movel	a6@(8),d0
+	movel	a6@(12),d1
+	clrl	d2		| clear p
+	moveq	IMM (31),d4
+L1:	addl	d0,d0		| shift reg pair (p,a) one bit left
+	addxl	d2,d2
+	movl	d2,d3		| subtract b from p, store in tmp.
+	subl	d1,d3
+	jcs	L2		| if no carry,
+	bset	IMM (0),d0	| set the low order bit of a to 1,
+	movl	d3,d2		| and store tmp in p.
+L2:	subql	IMM (1),d4
+	jcc	L1
+	moveml	sp@,d2-d4	| restore data registers
+	unlk	a6		| and return
+	rts
+#endif /* __mcoldfire__ */
+
+#endif /* L_udivsi3 */
+
+#ifdef  L_divsi3
+	.text
+	FUNC(__divsi3)
+	.globl	SYM (__divsi3)
+SYM (__divsi3):
+	movel	d2, sp@-
+
+	moveq	IMM (1), d2	/* sign of result stored in d2 (=1 or =-1) */
+	movel	sp@(12), d1	/* d1 = divisor */
+	jpl	L1
+	negl	d1
+#ifndef __mcoldfire__
+	negb	d2		/* change sign because divisor <0  */
+#else
+	negl	d2		/* change sign because divisor <0  */
+#endif
+L1:	movel	sp@(8), d0	/* d0 = dividend */
+	jpl	L2
+	negl	d0
+#ifndef __mcoldfire__
+	negb	d2
+#else
+	negl	d2
+#endif
+
+L2:	movel	d1, sp@-
+	movel	d0, sp@-
+	PICCALL	SYM (__udivsi3)	/* divide abs(dividend) by abs(divisor) */
+	addql	IMM (8), sp
+
+	tstb	d2
+	jpl	L3
+	negl	d0
+
+L3:	movel	sp@+, d2
+	rts
+#endif /* L_divsi3 */
+
+#ifdef  L_umodsi3
+	.text
+	FUNC(__umodsi3)
+	.globl	SYM (__umodsi3)
+SYM (__umodsi3):
+	movel	sp@(8), d1	/* d1 = divisor */
+	movel	sp@(4), d0	/* d0 = dividend */
+	movel	d1, sp@-
+	movel	d0, sp@-
+	PICCALL	SYM (__udivsi3)
+	addql	IMM (8), sp
+	movel	sp@(8), d1	/* d1 = divisor */
+#ifndef __mcoldfire__
+	movel	d1, sp@-
+	movel	d0, sp@-
+	PICCALL	SYM (__mulsi3)	/* d0 = (a/b)*b */
+	addql	IMM (8), sp
+#else
+	mulsl	d1,d0
+#endif
+	movel	sp@(4), d1	/* d1 = dividend */
+	subl	d0, d1		/* d1 = a - (a/b)*b */
+	movel	d1, d0
+	rts
+#endif /* L_umodsi3 */
+
+#ifdef  L_modsi3
+	.text
+	FUNC(__modsi3)
+	.globl	SYM (__modsi3)
+SYM (__modsi3):
+	movel	sp@(8), d1	/* d1 = divisor */
+	movel	sp@(4), d0	/* d0 = dividend */
+	movel	d1, sp@-
+	movel	d0, sp@-
+	PICCALL	SYM (__divsi3)
+	addql	IMM (8), sp
+	movel	sp@(8), d1	/* d1 = divisor */
+#ifndef __mcoldfire__
+	movel	d1, sp@-
+	movel	d0, sp@-
+	PICCALL	SYM (__mulsi3)	/* d0 = (a/b)*b */
+	addql	IMM (8), sp
+#else
+	mulsl	d1,d0
+#endif
+	movel	sp@(4), d1	/* d1 = dividend */
+	subl	d0, d1		/* d1 = a - (a/b)*b */
+	movel	d1, d0
+	rts
+#endif /* L_modsi3 */
+
+
+#ifdef  L_double
+
+	.globl	SYM (_fpCCR)
+	.globl  $_exception_handler
+
+QUIET_NaN      = 0xffffffff
+
+D_MAX_EXP      = 0x07ff
+D_BIAS         = 1022
+DBL_MAX_EXP    = D_MAX_EXP - D_BIAS
+DBL_MIN_EXP    = 1 - D_BIAS
+DBL_MANT_DIG   = 53
+
+INEXACT_RESULT 		= 0x0001
+UNDERFLOW 		= 0x0002
+OVERFLOW 		= 0x0004
+DIVIDE_BY_ZERO 		= 0x0008
+INVALID_OPERATION 	= 0x0010
+
+DOUBLE_FLOAT = 2
+
+NOOP         = 0
+ADD          = 1
+MULTIPLY     = 2
+DIVIDE       = 3
+NEGATE       = 4
+COMPARE      = 5
+EXTENDSFDF   = 6
+TRUNCDFSF    = 7
+
+UNKNOWN           = -1
+ROUND_TO_NEAREST  = 0 | round result to nearest representable value
+ROUND_TO_ZERO     = 1 | round result towards zero
+ROUND_TO_PLUS     = 2 | round result towards plus infinity
+ROUND_TO_MINUS    = 3 | round result towards minus infinity
+
+| Entry points:
+
+	.globl SYM (__adddf3)
+	.globl SYM (__subdf3)
+	.globl SYM (__muldf3)
+	.globl SYM (__divdf3)
+	.globl SYM (__negdf2)
+	.globl SYM (__cmpdf2)
+	.globl SYM (__cmpdf2_internal)
+	.hidden SYM (__cmpdf2_internal)
+
+	.text
+	.even
+
+| These are common routines to return and signal exceptions.	
+
+Ld$den:
+| Return and signal a denormalized number
+	orl	d7,d0
+	movew	IMM (INEXACT_RESULT+UNDERFLOW),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Ld$infty:
+Ld$overflow:
+| Return a properly signed INFINITY and set the exception flags 
+	movel	IMM (0x7ff00000),d0
+	movel	IMM (0),d1
+	orl	d7,d0
+	movew	IMM (INEXACT_RESULT+OVERFLOW),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Ld$underflow:
+| Return 0 and set the exception flags 
+	movel	IMM (0),d0
+	movel	d0,d1
+	movew	IMM (INEXACT_RESULT+UNDERFLOW),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Ld$inop:
+| Return a quiet NaN and set the exception flags
+	movel	IMM (QUIET_NaN),d0
+	movel	d0,d1
+	movew	IMM (INEXACT_RESULT+INVALID_OPERATION),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Ld$div$0:
+| Return a properly signed INFINITY and set the exception flags
+	movel	IMM (0x7ff00000),d0
+	movel	IMM (0),d1
+	orl	d7,d0
+	movew	IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+|=============================================================================
+|=============================================================================
+|                         double precision routines
+|=============================================================================
+|=============================================================================
+
+| A double precision floating point number (double) has the format:
+|
+| struct _double {
+|  unsigned int sign      : 1;  /* sign bit */ 
+|  unsigned int exponent  : 11; /* exponent, shifted by 126 */
+|  unsigned int fraction  : 52; /* fraction */
+| } double;
+| 
+| Thus sizeof(double) = 8 (64 bits). 
+|
+| All the routines are callable from C programs, and return the result 
+| in the register pair d0-d1. They also preserve all registers except 
+| d0-d1 and a0-a1.
+
+|=============================================================================
+|                              __subdf3
+|=============================================================================
+
+| double __subdf3(double, double);
+	FUNC(__subdf3)
+SYM (__subdf3):
+	bchg	IMM (31),sp@(12) | change sign of second operand
+				| and fall through, so we always add
+|=============================================================================
+|                              __adddf3
+|=============================================================================
+
+| double __adddf3(double, double);
+	FUNC(__adddf3)
+SYM (__adddf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)	| everything will be done in registers
+	moveml	d2-d7,sp@-	| save all data registers and a2 (but d0-d1)
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0	| get first operand
+	movel	a6@(12),d1	| 
+	movel	a6@(16),d2	| get second operand
+	movel	a6@(20),d3	| 
+
+	movel	d0,d7		| get d0's sign bit in d7 '
+	addl	d1,d1		| check and clear sign bit of a, and gain one
+	addxl	d0,d0		| bit of extra precision
+	beq	Ladddf$b	| if zero return second operand
+
+	movel	d2,d6		| save sign in d6 
+	addl	d3,d3		| get rid of sign bit and gain one bit of
+	addxl	d2,d2		| extra precision
+	beq	Ladddf$a	| if zero return first operand
+
+	andl	IMM (0x80000000),d7 | isolate a's sign bit '
+        swap	d6		| and also b's sign bit '
+#ifndef __mcoldfire__
+	andw	IMM (0x8000),d6	|
+	orw	d6,d7		| and combine them into d7, so that a's sign '
+				| bit is in the high word and b's is in the '
+				| low word, so d6 is free to be used
+#else
+	andl	IMM (0x8000),d6
+	orl	d6,d7
+#endif
+	movel	d7,a0		| now save d7 into a0, so d7 is free to
+                		| be used also
+
+| Get the exponents and check for denormalized and/or infinity.
+
+	movel	IMM (0x001fffff),d6 | mask for the fraction
+	movel	IMM (0x00200000),d7 | mask to put hidden bit back
+
+	movel	d0,d4		| 
+	andl	d6,d0		| get fraction in d0
+	notl	d6		| make d6 into mask for the exponent
+	andl	d6,d4		| get exponent in d4
+	beq	Ladddf$a$den	| branch if a is denormalized
+	cmpl	d6,d4		| check for INFINITY or NaN
+	beq	Ladddf$nf       | 
+	orl	d7,d0		| and put hidden bit back
+Ladddf$1:
+	swap	d4		| shift right exponent so that it starts
+#ifndef __mcoldfire__
+	lsrw	IMM (5),d4	| in bit 0 and not bit 20
+#else
+	lsrl	IMM (5),d4	| in bit 0 and not bit 20
+#endif
+| Now we have a's exponent in d4 and fraction in d0-d1 '
+	movel	d2,d5		| save b to get exponent
+	andl	d6,d5		| get exponent in d5
+	beq	Ladddf$b$den	| branch if b is denormalized
+	cmpl	d6,d5		| check for INFINITY or NaN
+	beq	Ladddf$nf
+	notl	d6		| make d6 into mask for the fraction again
+	andl	d6,d2		| and get fraction in d2
+	orl	d7,d2		| and put hidden bit back
+Ladddf$2:
+	swap	d5		| shift right exponent so that it starts
+#ifndef __mcoldfire__
+	lsrw	IMM (5),d5	| in bit 0 and not bit 20
+#else
+	lsrl	IMM (5),d5	| in bit 0 and not bit 20
+#endif
+
+| Now we have b's exponent in d5 and fraction in d2-d3. '
+
+| The situation now is as follows: the signs are combined in a0, the 
+| numbers are in d0-d1 (a) and d2-d3 (b), and the exponents in d4 (a)
+| and d5 (b). To do the rounding correctly we need to keep all the
+| bits until the end, so we need to use d0-d1-d2-d3 for the first number
+| and d4-d5-d6-d7 for the second. To do this we store (temporarily) the
+| exponents in a2-a3.
+
+#ifndef __mcoldfire__
+	moveml	a2-a3,sp@-	| save the address registers
+#else
+	movel	a2,sp@-	
+	movel	a3,sp@-	
+	movel	a4,sp@-	
+#endif
+
+	movel	d4,a2		| save the exponents
+	movel	d5,a3		| 
+
+	movel	IMM (0),d7	| and move the numbers around
+	movel	d7,d6		|
+	movel	d3,d5		|
+	movel	d2,d4		|
+	movel	d7,d3		|
+	movel	d7,d2		|
+
+| Here we shift the numbers until the exponents are the same, and put 
+| the largest exponent in a2.
+#ifndef __mcoldfire__
+	exg	d4,a2		| get exponents back
+	exg	d5,a3		|
+	cmpw	d4,d5		| compare the exponents
+#else
+	movel	d4,a4		| get exponents back
+	movel	a2,d4
+	movel	a4,a2
+	movel	d5,a4
+	movel	a3,d5
+	movel	a4,a3
+	cmpl	d4,d5		| compare the exponents
+#endif
+	beq	Ladddf$3	| if equal don't shift '
+	bhi	9f		| branch if second exponent is higher
+
+| Here we have a's exponent larger than b's, so we have to shift b. We do 
+| this by using as counter d2:
+1:	movew	d4,d2		| move largest exponent to d2
+#ifndef __mcoldfire__
+	subw	d5,d2		| and subtract second exponent
+	exg	d4,a2		| get back the longs we saved
+	exg	d5,a3		|
+#else
+	subl	d5,d2		| and subtract second exponent
+	movel	d4,a4		| get back the longs we saved
+	movel	a2,d4
+	movel	a4,a2
+	movel	d5,a4
+	movel	a3,d5
+	movel	a4,a3
+#endif
+| if difference is too large we don't shift (actually, we can just exit) '
+#ifndef __mcoldfire__
+	cmpw	IMM (DBL_MANT_DIG+2),d2
+#else
+	cmpl	IMM (DBL_MANT_DIG+2),d2
+#endif
+	bge	Ladddf$b$small
+#ifndef __mcoldfire__
+	cmpw	IMM (32),d2	| if difference >= 32, shift by longs
+#else
+	cmpl	IMM (32),d2	| if difference >= 32, shift by longs
+#endif
+	bge	5f
+2:
+#ifndef __mcoldfire__
+	cmpw	IMM (16),d2	| if difference >= 16, shift by words	
+#else
+	cmpl	IMM (16),d2	| if difference >= 16, shift by words	
+#endif
+	bge	6f
+	bra	3f		| enter dbra loop
+
+4:
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d4
+	roxrl	IMM (1),d5
+	roxrl	IMM (1),d6
+	roxrl	IMM (1),d7
+#else
+	lsrl	IMM (1),d7
+	btst	IMM (0),d6
+	beq	10f
+	bset	IMM (31),d7
+10:	lsrl	IMM (1),d6
+	btst	IMM (0),d5
+	beq	11f
+	bset	IMM (31),d6
+11:	lsrl	IMM (1),d5
+	btst	IMM (0),d4
+	beq	12f
+	bset	IMM (31),d5
+12:	lsrl	IMM (1),d4
+#endif
+3:
+#ifndef __mcoldfire__
+	dbra	d2,4b
+#else
+	subql	IMM (1),d2
+	bpl	4b	
+#endif
+	movel	IMM (0),d2
+	movel	d2,d3	
+	bra	Ladddf$4
+5:
+	movel	d6,d7
+	movel	d5,d6
+	movel	d4,d5
+	movel	IMM (0),d4
+#ifndef __mcoldfire__
+	subw	IMM (32),d2
+#else
+	subl	IMM (32),d2
+#endif
+	bra	2b
+6:
+	movew	d6,d7
+	swap	d7
+	movew	d5,d6
+	swap	d6
+	movew	d4,d5
+	swap	d5
+	movew	IMM (0),d4
+	swap	d4
+#ifndef __mcoldfire__
+	subw	IMM (16),d2
+#else
+	subl	IMM (16),d2
+#endif
+	bra	3b
+	
+9:
+#ifndef __mcoldfire__
+	exg	d4,d5
+	movew	d4,d6
+	subw	d5,d6		| keep d5 (largest exponent) in d4
+	exg	d4,a2
+	exg	d5,a3
+#else
+	movel	d5,d6
+	movel	d4,d5
+	movel	d6,d4
+	subl	d5,d6
+	movel	d4,a4
+	movel	a2,d4
+	movel	a4,a2
+	movel	d5,a4
+	movel	a3,d5
+	movel	a4,a3
+#endif
+| if difference is too large we don't shift (actually, we can just exit) '
+#ifndef __mcoldfire__
+	cmpw	IMM (DBL_MANT_DIG+2),d6
+#else
+	cmpl	IMM (DBL_MANT_DIG+2),d6
+#endif
+	bge	Ladddf$a$small
+#ifndef __mcoldfire__
+	cmpw	IMM (32),d6	| if difference >= 32, shift by longs
+#else
+	cmpl	IMM (32),d6	| if difference >= 32, shift by longs
+#endif
+	bge	5f
+2:
+#ifndef __mcoldfire__
+	cmpw	IMM (16),d6	| if difference >= 16, shift by words	
+#else
+	cmpl	IMM (16),d6	| if difference >= 16, shift by words	
+#endif
+	bge	6f
+	bra	3f		| enter dbra loop
+
+4:
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+#else
+	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d2
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	12f
+	bset	IMM (31),d1
+12:	lsrl	IMM (1),d0
+#endif
+3:
+#ifndef __mcoldfire__
+	dbra	d6,4b
+#else
+	subql	IMM (1),d6
+	bpl	4b
+#endif
+	movel	IMM (0),d7
+	movel	d7,d6
+	bra	Ladddf$4
+5:
+	movel	d2,d3
+	movel	d1,d2
+	movel	d0,d1
+	movel	IMM (0),d0
+#ifndef __mcoldfire__
+	subw	IMM (32),d6
+#else
+	subl	IMM (32),d6
+#endif
+	bra	2b
+6:
+	movew	d2,d3
+	swap	d3
+	movew	d1,d2
+	swap	d2
+	movew	d0,d1
+	swap	d1
+	movew	IMM (0),d0
+	swap	d0
+#ifndef __mcoldfire__
+	subw	IMM (16),d6
+#else
+	subl	IMM (16),d6
+#endif
+	bra	3b
+Ladddf$3:
+#ifndef __mcoldfire__
+	exg	d4,a2	
+	exg	d5,a3
+#else
+	movel	d4,a4
+	movel	a2,d4
+	movel	a4,a2
+	movel	d5,a4
+	movel	a3,d5
+	movel	a4,a3
+#endif
+Ladddf$4:	
+| Now we have the numbers in d0--d3 and d4--d7, the exponent in a2, and
+| the signs in a4.
+
+| Here we have to decide whether to add or subtract the numbers:
+#ifndef __mcoldfire__
+	exg	d7,a0		| get the signs 
+	exg	d6,a3		| a3 is free to be used
+#else
+	movel	d7,a4
+	movel	a0,d7
+	movel	a4,a0
+	movel	d6,a4
+	movel	a3,d6
+	movel	a4,a3
+#endif
+	movel	d7,d6		|
+	movew	IMM (0),d7	| get a's sign in d7 '
+	swap	d6              |
+	movew	IMM (0),d6	| and b's sign in d6 '
+	eorl	d7,d6		| compare the signs
+	bmi	Lsubdf$0	| if the signs are different we have 
+				| to subtract
+#ifndef __mcoldfire__
+	exg	d7,a0		| else we add the numbers
+	exg	d6,a3		|
+#else
+	movel	d7,a4
+	movel	a0,d7
+	movel	a4,a0
+	movel	d6,a4
+	movel	a3,d6
+	movel	a4,a3
+#endif
+	addl	d7,d3		|
+	addxl	d6,d2		|
+	addxl	d5,d1		| 
+	addxl	d4,d0           |
+
+	movel	a2,d4		| return exponent to d4
+	movel	a0,d7		| 
+	andl	IMM (0x80000000),d7 | d7 now has the sign
+
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3	
+#else
+	movel	sp@+,a4	
+	movel	sp@+,a3	
+	movel	sp@+,a2	
+#endif
+
+| Before rounding normalize so bit #DBL_MANT_DIG is set (we will consider
+| the case of denormalized numbers in the rounding routine itself).
+| As in the addition (not in the subtraction!) we could have set 
+| one more bit we check this:
+	btst	IMM (DBL_MANT_DIG+1),d0	
+	beq	1f
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+	addw	IMM (1),d4
+#else
+	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d2
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	12f
+	bset	IMM (31),d1
+12:	lsrl	IMM (1),d0
+	addl	IMM (1),d4
+#endif
+1:
+	lea	pc@(Ladddf$5),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Ladddf$5:
+| Put back the exponent and check for overflow
+#ifndef __mcoldfire__
+	cmpw	IMM (0x7ff),d4	| is the exponent big?
+#else
+	cmpl	IMM (0x7ff),d4	| is the exponent big?
+#endif
+	bge	1f
+	bclr	IMM (DBL_MANT_DIG-1),d0
+#ifndef __mcoldfire__
+	lslw	IMM (4),d4	| put exponent back into position
+#else
+	lsll	IMM (4),d4	| put exponent back into position
+#endif
+	swap	d0		| 
+#ifndef __mcoldfire__
+	orw	d4,d0		|
+#else
+	orl	d4,d0		|
+#endif
+	swap	d0		|
+	bra	Ladddf$ret
+1:
+	moveq	IMM (ADD),d5
+	bra	Ld$overflow
+
+Lsubdf$0:
+| Here we do the subtraction.
+#ifndef __mcoldfire__
+	exg	d7,a0		| put sign back in a0
+	exg	d6,a3		|
+#else
+	movel	d7,a4
+	movel	a0,d7
+	movel	a4,a0
+	movel	d6,a4
+	movel	a3,d6
+	movel	a4,a3
+#endif
+	subl	d7,d3		|
+	subxl	d6,d2		|
+	subxl	d5,d1		|
+	subxl	d4,d0		|
+	beq	Ladddf$ret$1	| if zero just exit
+	bpl	1f		| if positive skip the following
+	movel	a0,d7		|
+	bchg	IMM (31),d7	| change sign bit in d7
+	movel	d7,a0		|
+	negl	d3		|
+	negxl	d2		|
+	negxl	d1              | and negate result
+	negxl	d0              |
+1:	
+	movel	a2,d4		| return exponent to d4
+	movel	a0,d7
+	andl	IMM (0x80000000),d7 | isolate sign bit
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3	|
+#else
+	movel	sp@+,a4
+	movel	sp@+,a3
+	movel	sp@+,a2
+#endif
+
+| Before rounding normalize so bit #DBL_MANT_DIG is set (we will consider
+| the case of denormalized numbers in the rounding routine itself).
+| As in the addition (not in the subtraction!) we could have set 
+| one more bit we check this:
+	btst	IMM (DBL_MANT_DIG+1),d0	
+	beq	1f
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+	addw	IMM (1),d4
+#else
+	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d2
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	12f
+	bset	IMM (31),d1
+12:	lsrl	IMM (1),d0
+	addl	IMM (1),d4
+#endif
+1:
+	lea	pc@(Lsubdf$1),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Lsubdf$1:
+| Put back the exponent and sign (we don't have overflow). '
+	bclr	IMM (DBL_MANT_DIG-1),d0	
+#ifndef __mcoldfire__
+	lslw	IMM (4),d4	| put exponent back into position
+#else
+	lsll	IMM (4),d4	| put exponent back into position
+#endif
+	swap	d0		| 
+#ifndef __mcoldfire__
+	orw	d4,d0		|
+#else
+	orl	d4,d0		|
+#endif
+	swap	d0		|
+	bra	Ladddf$ret
+
+| If one of the numbers was too small (difference of exponents >= 
+| DBL_MANT_DIG+1) we return the other (and now we don't have to '
+| check for finiteness or zero).
+Ladddf$a$small:
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3	
+#else
+	movel	sp@+,a4
+	movel	sp@+,a3
+	movel	sp@+,a2
+#endif
+	movel	a6@(16),d0
+	movel	a6@(20),d1
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| restore data registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+
+Ladddf$b$small:
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3	
+#else
+	movel	sp@+,a4	
+	movel	sp@+,a3	
+	movel	sp@+,a2	
+#endif
+	movel	a6@(8),d0
+	movel	a6@(12),d1
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| restore data registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+
+Ladddf$a$den:
+	movel	d7,d4		| d7 contains 0x00200000
+	bra	Ladddf$1
+
+Ladddf$b$den:
+	movel	d7,d5           | d7 contains 0x00200000
+	notl	d6
+	bra	Ladddf$2
+
+Ladddf$b:
+| Return b (if a is zero)
+	movel	d2,d0
+	movel	d3,d1
+	bne	1f			| Check if b is -0
+	cmpl	IMM (0x80000000),d0
+	bne	1f
+	andl	IMM (0x80000000),d7	| Use the sign of a
+	clrl	d0
+	bra	Ladddf$ret
+Ladddf$a:
+	movel	a6@(8),d0
+	movel	a6@(12),d1
+1:
+	moveq	IMM (ADD),d5
+| Check for NaN and +/-INFINITY.
+	movel	d0,d7         		|
+	andl	IMM (0x80000000),d7	|
+	bclr	IMM (31),d0		|
+	cmpl	IMM (0x7ff00000),d0	|
+	bge	2f			|
+	movel	d0,d0           	| check for zero, since we don't  '
+	bne	Ladddf$ret		| want to return -0 by mistake
+	bclr	IMM (31),d7		|
+	bra	Ladddf$ret		|
+2:
+	andl	IMM (0x000fffff),d0	| check for NaN (nonzero fraction)
+	orl	d1,d0			|
+	bne	Ld$inop         	|
+	bra	Ld$infty		|
+	
+Ladddf$ret$1:
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3	| restore regs and exit
+#else
+	movel	sp@+,a4
+	movel	sp@+,a3
+	movel	sp@+,a2
+#endif
+
+Ladddf$ret:
+| Normal exit.
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+	orl	d7,d0		| put sign bit back
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+Ladddf$ret$den:
+| Return a denormalized number.
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0	| shift right once more
+	roxrl	IMM (1),d1	|
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+#endif
+	bra	Ladddf$ret
+
+Ladddf$nf:
+	moveq	IMM (ADD),d5
+| This could be faster but it is not worth the effort, since it is not
+| executed very often. We sacrifice speed for clarity here.
+	movel	a6@(8),d0	| get the numbers back (remember that we
+	movel	a6@(12),d1	| did some processing already)
+	movel	a6@(16),d2	| 
+	movel	a6@(20),d3	| 
+	movel	IMM (0x7ff00000),d4 | useful constant (INFINITY)
+	movel	d0,d7		| save sign bits
+	movel	d2,d6		| 
+	bclr	IMM (31),d0	| clear sign bits
+	bclr	IMM (31),d2	| 
+| We know that one of them is either NaN of +/-INFINITY
+| Check for NaN (if either one is NaN return NaN)
+	cmpl	d4,d0		| check first a (d0)
+	bhi	Ld$inop		| if d0 > 0x7ff00000 or equal and
+	bne	2f
+	tstl	d1		| d1 > 0, a is NaN
+	bne	Ld$inop		| 
+2:	cmpl	d4,d2		| check now b (d1)
+	bhi	Ld$inop		| 
+	bne	3f
+	tstl	d3		| 
+	bne	Ld$inop		| 
+3:
+| Now comes the check for +/-INFINITY. We know that both are (maybe not
+| finite) numbers, but we have to check if both are infinite whether we
+| are adding or subtracting them.
+	eorl	d7,d6		| to check sign bits
+	bmi	1f
+	andl	IMM (0x80000000),d7 | get (common) sign bit
+	bra	Ld$infty
+1:
+| We know one (or both) are infinite, so we test for equality between the
+| two numbers (if they are equal they have to be infinite both, so we
+| return NaN).
+	cmpl	d2,d0		| are both infinite?
+	bne	1f		| if d0 <> d2 they are not equal
+	cmpl	d3,d1		| if d0 == d2 test d3 and d1
+	beq	Ld$inop		| if equal return NaN
+1:	
+	andl	IMM (0x80000000),d7 | get a's sign bit '
+	cmpl	d4,d0		| test now for infinity
+	beq	Ld$infty	| if a is INFINITY return with this sign
+	bchg	IMM (31),d7	| else we know b is INFINITY and has
+	bra	Ld$infty	| the opposite sign
+
+|=============================================================================
+|                              __muldf3
+|=============================================================================
+
+| double __muldf3(double, double);
+	FUNC(__muldf3)
+SYM (__muldf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0		| get a into d0-d1
+	movel	a6@(12),d1		| 
+	movel	a6@(16),d2		| and b into d2-d3
+	movel	a6@(20),d3		|
+	movel	d0,d7			| d7 will hold the sign of the product
+	eorl	d2,d7			|
+	andl	IMM (0x80000000),d7	|
+	movel	d7,a0			| save sign bit into a0 
+	movel	IMM (0x7ff00000),d7	| useful constant (+INFINITY)
+	movel	d7,d6			| another (mask for fraction)
+	notl	d6			|
+	bclr	IMM (31),d0		| get rid of a's sign bit '
+	movel	d0,d4			| 
+	orl	d1,d4			| 
+	beq	Lmuldf$a$0		| branch if a is zero
+	movel	d0,d4			|
+	bclr	IMM (31),d2		| get rid of b's sign bit '
+	movel	d2,d5			|
+	orl	d3,d5			| 
+	beq	Lmuldf$b$0		| branch if b is zero
+	movel	d2,d5			| 
+	cmpl	d7,d0			| is a big?
+	bhi	Lmuldf$inop		| if a is NaN return NaN
+	beq	Lmuldf$a$nf		| we still have to check d1 and b ...
+	cmpl	d7,d2			| now compare b with INFINITY
+	bhi	Lmuldf$inop		| is b NaN?
+	beq	Lmuldf$b$nf 		| we still have to check d3 ...
+| Here we have both numbers finite and nonzero (and with no sign bit).
+| Now we get the exponents into d4 and d5.
+	andl	d7,d4			| isolate exponent in d4
+	beq	Lmuldf$a$den		| if exponent zero, have denormalized
+	andl	d6,d0			| isolate fraction
+	orl	IMM (0x00100000),d0	| and put hidden bit back
+	swap	d4			| I like exponents in the first byte
+#ifndef __mcoldfire__
+	lsrw	IMM (4),d4		| 
+#else
+	lsrl	IMM (4),d4		| 
+#endif
+Lmuldf$1:			
+	andl	d7,d5			|
+	beq	Lmuldf$b$den		|
+	andl	d6,d2			|
+	orl	IMM (0x00100000),d2	| and put hidden bit back
+	swap	d5			|
+#ifndef __mcoldfire__
+	lsrw	IMM (4),d5		|
+#else
+	lsrl	IMM (4),d5		|
+#endif
+Lmuldf$2:				|
+#ifndef __mcoldfire__
+	addw	d5,d4			| add exponents
+	subw	IMM (D_BIAS+1),d4	| and subtract bias (plus one)
+#else
+	addl	d5,d4			| add exponents
+	subl	IMM (D_BIAS+1),d4	| and subtract bias (plus one)
+#endif
+
+| We are now ready to do the multiplication. The situation is as follows:
+| both a and b have bit 52 ( bit 20 of d0 and d2) set (even if they were 
+| denormalized to start with!), which means that in the product bit 104 
+| (which will correspond to bit 8 of the fourth long) is set.
+
+| Here we have to do the product.
+| To do it we have to juggle the registers back and forth, as there are not
+| enough to keep everything in them. So we use the address registers to keep
+| some intermediate data.
+
+#ifndef __mcoldfire__
+	moveml	a2-a3,sp@-	| save a2 and a3 for temporary use
+#else
+	movel	a2,sp@-
+	movel	a3,sp@-
+	movel	a4,sp@-
+#endif
+	movel	IMM (0),a2	| a2 is a null register
+	movel	d4,a3		| and a3 will preserve the exponent
+
+| First, shift d2-d3 so bit 20 becomes bit 31:
+#ifndef __mcoldfire__
+	rorl	IMM (5),d2	| rotate d2 5 places right
+	swap	d2		| and swap it
+	rorl	IMM (5),d3	| do the same thing with d3
+	swap	d3		|
+	movew	d3,d6		| get the rightmost 11 bits of d3
+	andw	IMM (0x07ff),d6	|
+	orw	d6,d2		| and put them into d2
+	andw	IMM (0xf800),d3	| clear those bits in d3
+#else
+	moveq	IMM (11),d7	| left shift d2 11 bits
+	lsll	d7,d2
+	movel	d3,d6		| get a copy of d3
+	lsll	d7,d3		| left shift d3 11 bits
+	andl	IMM (0xffe00000),d6 | get the top 11 bits of d3
+	moveq	IMM (21),d7	| right shift them 21 bits
+	lsrl	d7,d6
+	orl	d6,d2		| stick them at the end of d2
+#endif
+
+	movel	d2,d6		| move b into d6-d7
+	movel	d3,d7           | move a into d4-d5
+	movel	d0,d4           | and clear d0-d1-d2-d3 (to put result)
+	movel	d1,d5           |
+	movel	IMM (0),d3	|
+	movel	d3,d2           |
+	movel	d3,d1           |
+	movel	d3,d0	        |
+
+| We use a1 as counter:	
+	movel	IMM (DBL_MANT_DIG-1),a1		
+#ifndef __mcoldfire__
+	exg	d7,a1
+#else
+	movel	d7,a4
+	movel	a1,d7
+	movel	a4,a1
+#endif
+
+1:
+#ifndef __mcoldfire__
+	exg	d7,a1		| put counter back in a1
+#else
+	movel	d7,a4
+	movel	a1,d7
+	movel	a4,a1
+#endif
+	addl	d3,d3		| shift sum once left
+	addxl	d2,d2           |
+	addxl	d1,d1           |
+	addxl	d0,d0           |
+	addl	d7,d7		|
+	addxl	d6,d6		|
+	bcc	2f		| if bit clear skip the following
+#ifndef __mcoldfire__
+	exg	d7,a2		|
+#else
+	movel	d7,a4
+	movel	a2,d7
+	movel	a4,a2
+#endif
+	addl	d5,d3		| else add a to the sum
+	addxl	d4,d2		|
+	addxl	d7,d1		|
+	addxl	d7,d0		|
+#ifndef __mcoldfire__
+	exg	d7,a2		| 
+#else
+	movel	d7,a4
+	movel	a2,d7
+	movel	a4,a2
+#endif
+2:
+#ifndef __mcoldfire__
+	exg	d7,a1		| put counter in d7
+	dbf	d7,1b		| decrement and branch
+#else
+	movel	d7,a4
+	movel	a1,d7
+	movel	a4,a1
+	subql	IMM (1),d7
+	bpl	1b
+#endif
+
+	movel	a3,d4		| restore exponent
+#ifndef __mcoldfire__
+	moveml	sp@+,a2-a3
+#else
+	movel	sp@+,a4
+	movel	sp@+,a3
+	movel	sp@+,a2
+#endif
+
+| Now we have the product in d0-d1-d2-d3, with bit 8 of d0 set. The 
+| first thing to do now is to normalize it so bit 8 becomes bit 
+| DBL_MANT_DIG-32 (to do the rounding); later we will shift right.
+	swap	d0
+	swap	d1
+	movew	d1,d0
+	swap	d2
+	movew	d2,d1
+	swap	d3
+	movew	d3,d2
+	movew	IMM (0),d3
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+#else
+	moveq	IMM (29),d6
+	lsrl	IMM (3),d3
+	movel	d2,d7
+	lsll	d6,d7
+	orl	d7,d3
+	lsrl	IMM (3),d2
+	movel	d1,d7
+	lsll	d6,d7
+	orl	d7,d2
+	lsrl	IMM (3),d1
+	movel	d0,d7
+	lsll	d6,d7
+	orl	d7,d1
+	lsrl	IMM (3),d0
+#endif
+	
+| Now round, check for over- and underflow, and exit.
+	movel	a0,d7		| get sign bit back into d7
+	moveq	IMM (MULTIPLY),d5
+
+	btst	IMM (DBL_MANT_DIG+1-32),d0
+	beq	Lround$exit
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	addw	IMM (1),d4
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+	addl	IMM (1),d4
+#endif
+	bra	Lround$exit
+
+Lmuldf$inop:
+	moveq	IMM (MULTIPLY),d5
+	bra	Ld$inop
+
+Lmuldf$b$nf:
+	moveq	IMM (MULTIPLY),d5
+	movel	a0,d7		| get sign bit back into d7
+	tstl	d3		| we know d2 == 0x7ff00000, so check d3
+	bne	Ld$inop		| if d3 <> 0 b is NaN
+	bra	Ld$overflow	| else we have overflow (since a is finite)
+
+Lmuldf$a$nf:
+	moveq	IMM (MULTIPLY),d5
+	movel	a0,d7		| get sign bit back into d7
+	tstl	d1		| we know d0 == 0x7ff00000, so check d1
+	bne	Ld$inop		| if d1 <> 0 a is NaN
+	bra	Ld$overflow	| else signal overflow
+
+| If either number is zero return zero, unless the other is +/-INFINITY or
+| NaN, in which case we return NaN.
+Lmuldf$b$0:
+	moveq	IMM (MULTIPLY),d5
+#ifndef __mcoldfire__
+	exg	d2,d0		| put b (==0) into d0-d1
+	exg	d3,d1		| and a (with sign bit cleared) into d2-d3
+	movel	a0,d0		| set result sign
+#else
+	movel	d0,d2		| put a into d2-d3
+	movel	d1,d3
+	movel	a0,d0		| put result zero into d0-d1
+	movq	IMM(0),d1
+#endif
+	bra	1f
+Lmuldf$a$0:
+	movel	a0,d0		| set result sign
+	movel	a6@(16),d2	| put b into d2-d3 again
+	movel	a6@(20),d3	|
+	bclr	IMM (31),d2	| clear sign bit
+1:	cmpl	IMM (0x7ff00000),d2 | check for non-finiteness
+	bge	Ld$inop		| in case NaN or +/-INFINITY return NaN
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+| If a number is denormalized we put an exponent of 1 but do not put the 
+| hidden bit back into the fraction; instead we shift left until bit 21
+| (the hidden bit) is set, adjusting the exponent accordingly. We do this
+| to ensure that the product of the fractions is close to 1.
+Lmuldf$a$den:
+	movel	IMM (1),d4
+	andl	d6,d0
+1:	addl	d1,d1           | shift a left until bit 20 is set
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	subw	IMM (1),d4	| and adjust exponent
+#else
+	subl	IMM (1),d4	| and adjust exponent
+#endif
+	btst	IMM (20),d0	|
+	bne	Lmuldf$1        |
+	bra	1b
+
+Lmuldf$b$den:
+	movel	IMM (1),d5
+	andl	d6,d2
+1:	addl	d3,d3		| shift b left until bit 20 is set
+	addxl	d2,d2		|
+#ifndef __mcoldfire__
+	subw	IMM (1),d5	| and adjust exponent
+#else
+	subql	IMM (1),d5	| and adjust exponent
+#endif
+	btst	IMM (20),d2	|
+	bne	Lmuldf$2	|
+	bra	1b
+
+
+|=============================================================================
+|                              __divdf3
+|=============================================================================
+
+| double __divdf3(double, double);
+	FUNC(__divdf3)
+SYM (__divdf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0	| get a into d0-d1
+	movel	a6@(12),d1	| 
+	movel	a6@(16),d2	| and b into d2-d3
+	movel	a6@(20),d3	|
+	movel	d0,d7		| d7 will hold the sign of the result
+	eorl	d2,d7		|
+	andl	IMM (0x80000000),d7
+	movel	d7,a0		| save sign into a0
+	movel	IMM (0x7ff00000),d7 | useful constant (+INFINITY)
+	movel	d7,d6		| another (mask for fraction)
+	notl	d6		|
+	bclr	IMM (31),d0	| get rid of a's sign bit '
+	movel	d0,d4		|
+	orl	d1,d4		|
+	beq	Ldivdf$a$0	| branch if a is zero
+	movel	d0,d4		|
+	bclr	IMM (31),d2	| get rid of b's sign bit '
+	movel	d2,d5		|
+	orl	d3,d5		|
+	beq	Ldivdf$b$0	| branch if b is zero
+	movel	d2,d5
+	cmpl	d7,d0		| is a big?
+	bhi	Ldivdf$inop	| if a is NaN return NaN
+	beq	Ldivdf$a$nf	| if d0 == 0x7ff00000 we check d1
+	cmpl	d7,d2		| now compare b with INFINITY 
+	bhi	Ldivdf$inop	| if b is NaN return NaN
+	beq	Ldivdf$b$nf	| if d2 == 0x7ff00000 we check d3
+| Here we have both numbers finite and nonzero (and with no sign bit).
+| Now we get the exponents into d4 and d5 and normalize the numbers to
+| ensure that the ratio of the fractions is around 1. We do this by
+| making sure that both numbers have bit #DBL_MANT_DIG-32-1 (hidden bit)
+| set, even if they were denormalized to start with.
+| Thus, the result will satisfy: 2 > result > 1/2.
+	andl	d7,d4		| and isolate exponent in d4
+	beq	Ldivdf$a$den	| if exponent is zero we have a denormalized
+	andl	d6,d0		| and isolate fraction
+	orl	IMM (0x00100000),d0 | and put hidden bit back
+	swap	d4		| I like exponents in the first byte
+#ifndef __mcoldfire__
+	lsrw	IMM (4),d4	| 
+#else
+	lsrl	IMM (4),d4	| 
+#endif
+Ldivdf$1:			| 
+	andl	d7,d5		|
+	beq	Ldivdf$b$den	|
+	andl	d6,d2		|
+	orl	IMM (0x00100000),d2
+	swap	d5		|
+#ifndef __mcoldfire__
+	lsrw	IMM (4),d5	|
+#else
+	lsrl	IMM (4),d5	|
+#endif
+Ldivdf$2:			|
+#ifndef __mcoldfire__
+	subw	d5,d4		| subtract exponents
+	addw	IMM (D_BIAS),d4	| and add bias
+#else
+	subl	d5,d4		| subtract exponents
+	addl	IMM (D_BIAS),d4	| and add bias
+#endif
+
+| We are now ready to do the division. We have prepared things in such a way
+| that the ratio of the fractions will be less than 2 but greater than 1/2.
+| At this point the registers in use are:
+| d0-d1	hold a (first operand, bit DBL_MANT_DIG-32=0, bit 
+| DBL_MANT_DIG-1-32=1)
+| d2-d3	hold b (second operand, bit DBL_MANT_DIG-32=1)
+| d4	holds the difference of the exponents, corrected by the bias
+| a0	holds the sign of the ratio
+
+| To do the rounding correctly we need to keep information about the
+| nonsignificant bits. One way to do this would be to do the division
+| using four registers; another is to use two registers (as originally
+| I did), but use a sticky bit to preserve information about the 
+| fractional part. Note that we can keep that info in a1, which is not
+| used.
+	movel	IMM (0),d6	| d6-d7 will hold the result
+	movel	d6,d7		| 
+	movel	IMM (0),a1	| and a1 will hold the sticky bit
+
+	movel	IMM (DBL_MANT_DIG-32+1),d5	
+	
+1:	cmpl	d0,d2		| is a < b?
+	bhi	3f		| if b > a skip the following
+	beq	4f		| if d0==d2 check d1 and d3
+2:	subl	d3,d1		| 
+	subxl	d2,d0		| a <-- a - b
+	bset	d5,d6		| set the corresponding bit in d6
+3:	addl	d1,d1		| shift a by 1
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	dbra	d5,1b		| and branch back
+#else
+	subql	IMM (1), d5
+	bpl	1b
+#endif
+	bra	5f			
+4:	cmpl	d1,d3		| here d0==d2, so check d1 and d3
+	bhi	3b		| if d1 > d2 skip the subtraction
+	bra	2b		| else go do it
+5:
+| Here we have to start setting the bits in the second long.
+	movel	IMM (31),d5	| again d5 is counter
+
+1:	cmpl	d0,d2		| is a < b?
+	bhi	3f		| if b > a skip the following
+	beq	4f		| if d0==d2 check d1 and d3
+2:	subl	d3,d1		| 
+	subxl	d2,d0		| a <-- a - b
+	bset	d5,d7		| set the corresponding bit in d7
+3:	addl	d1,d1		| shift a by 1
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	dbra	d5,1b		| and branch back
+#else
+	subql	IMM (1), d5
+	bpl	1b
+#endif
+	bra	5f			
+4:	cmpl	d1,d3		| here d0==d2, so check d1 and d3
+	bhi	3b		| if d1 > d2 skip the subtraction
+	bra	2b		| else go do it
+5:
+| Now go ahead checking until we hit a one, which we store in d2.
+	movel	IMM (DBL_MANT_DIG),d5
+1:	cmpl	d2,d0		| is a < b?
+	bhi	4f		| if b < a, exit
+	beq	3f		| if d0==d2 check d1 and d3
+2:	addl	d1,d1		| shift a by 1
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	dbra	d5,1b		| and branch back
+#else
+	subql	IMM (1), d5
+	bpl	1b
+#endif
+	movel	IMM (0),d2	| here no sticky bit was found
+	movel	d2,d3
+	bra	5f			
+3:	cmpl	d1,d3		| here d0==d2, so check d1 and d3
+	bhi	2b		| if d1 > d2 go back
+4:
+| Here put the sticky bit in d2-d3 (in the position which actually corresponds
+| to it; if you don't do this the algorithm loses in some cases). '
+	movel	IMM (0),d2
+	movel	d2,d3
+#ifndef __mcoldfire__
+	subw	IMM (DBL_MANT_DIG),d5
+	addw	IMM (63),d5
+	cmpw	IMM (31),d5
+#else
+	subl	IMM (DBL_MANT_DIG),d5
+	addl	IMM (63),d5
+	cmpl	IMM (31),d5
+#endif
+	bhi	2f
+1:	bset	d5,d3
+	bra	5f
+#ifndef __mcoldfire__
+	subw	IMM (32),d5
+#else
+	subl	IMM (32),d5
+#endif
+2:	bset	d5,d2
+5:
+| Finally we are finished! Move the longs in the address registers to
+| their final destination:
+	movel	d6,d0
+	movel	d7,d1
+	movel	IMM (0),d3
+
+| Here we have finished the division, with the result in d0-d1-d2-d3, with
+| 2^21 <= d6 < 2^23. Thus bit 23 is not set, but bit 22 could be set.
+| If it is not, then definitely bit 21 is set. Normalize so bit 22 is
+| not set:
+	btst	IMM (DBL_MANT_DIG-32+1),d0
+	beq	1f
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	roxrl	IMM (1),d2
+	roxrl	IMM (1),d3
+	addw	IMM (1),d4
+#else
+	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d2
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	12f
+	bset	IMM (31),d1
+12:	lsrl	IMM (1),d0
+	addl	IMM (1),d4
+#endif
+1:
+| Now round, check for over- and underflow, and exit.
+	movel	a0,d7		| restore sign bit to d7
+	moveq	IMM (DIVIDE),d5
+	bra	Lround$exit
+
+Ldivdf$inop:
+	moveq	IMM (DIVIDE),d5
+	bra	Ld$inop
+
+Ldivdf$a$0:
+| If a is zero check to see whether b is zero also. In that case return
+| NaN; then check if b is NaN, and return NaN also in that case. Else
+| return a properly signed zero.
+	moveq	IMM (DIVIDE),d5
+	bclr	IMM (31),d2	|
+	movel	d2,d4		| 
+	orl	d3,d4		| 
+	beq	Ld$inop		| if b is also zero return NaN
+	cmpl	IMM (0x7ff00000),d2 | check for NaN
+	bhi	Ld$inop		| 
+	blt	1f		|
+	tstl	d3		|
+	bne	Ld$inop		|
+1:	movel	a0,d0		| else return signed zero
+	moveq	IMM(0),d1	| 
+	PICLEA	SYM (_fpCCR),a0	| clear exception flags
+	movew	IMM (0),a0@	|
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| 
+#else
+	moveml	sp@,d2-d7	| 
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| 
+	rts			| 	
+
+Ldivdf$b$0:
+	moveq	IMM (DIVIDE),d5
+| If we got here a is not zero. Check if a is NaN; in that case return NaN,
+| else return +/-INFINITY. Remember that a is in d0 with the sign bit 
+| cleared already.
+	movel	a0,d7		| put a's sign bit back in d7 '
+	cmpl	IMM (0x7ff00000),d0 | compare d0 with INFINITY
+	bhi	Ld$inop		| if larger it is NaN
+	tstl	d1		| 
+	bne	Ld$inop		| 
+	bra	Ld$div$0	| else signal DIVIDE_BY_ZERO
+
+Ldivdf$b$nf:
+	moveq	IMM (DIVIDE),d5
+| If d2 == 0x7ff00000 we have to check d3.
+	tstl	d3		|
+	bne	Ld$inop		| if d3 <> 0, b is NaN
+	bra	Ld$underflow	| else b is +/-INFINITY, so signal underflow
+
+Ldivdf$a$nf:
+	moveq	IMM (DIVIDE),d5
+| If d0 == 0x7ff00000 we have to check d1.
+	tstl	d1		|
+	bne	Ld$inop		| if d1 <> 0, a is NaN
+| If a is INFINITY we have to check b
+	cmpl	d7,d2		| compare b with INFINITY 
+	bge	Ld$inop		| if b is NaN or INFINITY return NaN
+	tstl	d3		|
+	bne	Ld$inop		| 
+	bra	Ld$overflow	| else return overflow
+
+| If a number is denormalized we put an exponent of 1 but do not put the 
+| bit back into the fraction.
+Ldivdf$a$den:
+	movel	IMM (1),d4
+	andl	d6,d0
+1:	addl	d1,d1		| shift a left until bit 20 is set
+	addxl	d0,d0
+#ifndef __mcoldfire__
+	subw	IMM (1),d4	| and adjust exponent
+#else
+	subl	IMM (1),d4	| and adjust exponent
+#endif
+	btst	IMM (DBL_MANT_DIG-32-1),d0
+	bne	Ldivdf$1
+	bra	1b
+
+Ldivdf$b$den:
+	movel	IMM (1),d5
+	andl	d6,d2
+1:	addl	d3,d3		| shift b left until bit 20 is set
+	addxl	d2,d2
+#ifndef __mcoldfire__
+	subw	IMM (1),d5	| and adjust exponent
+#else
+	subql	IMM (1),d5	| and adjust exponent
+#endif
+	btst	IMM (DBL_MANT_DIG-32-1),d2
+	bne	Ldivdf$2
+	bra	1b
+
+Lround$exit:
+| This is a common exit point for __muldf3 and __divdf3. When they enter
+| this point the sign of the result is in d7, the result in d0-d1, normalized
+| so that 2^21 <= d0 < 2^22, and the exponent is in the lower byte of d4.
+
+| First check for underlow in the exponent:
+#ifndef __mcoldfire__
+	cmpw	IMM (-DBL_MANT_DIG-1),d4		
+#else
+	cmpl	IMM (-DBL_MANT_DIG-1),d4		
+#endif
+	blt	Ld$underflow	
+| It could happen that the exponent is less than 1, in which case the 
+| number is denormalized. In this case we shift right and adjust the 
+| exponent until it becomes 1 or the fraction is zero (in the latter case 
+| we signal underflow and return zero).
+	movel	d7,a0		|
+	movel	IMM (0),d6	| use d6-d7 to collect bits flushed right
+	movel	d6,d7		| use d6-d7 to collect bits flushed right
+#ifndef __mcoldfire__
+	cmpw	IMM (1),d4	| if the exponent is less than 1 we 
+#else
+	cmpl	IMM (1),d4	| if the exponent is less than 1 we 
+#endif
+	bge	2f		| have to shift right (denormalize)
+1:
+#ifndef __mcoldfire__
+	addw	IMM (1),d4	| adjust the exponent
+	lsrl	IMM (1),d0	| shift right once 
+	roxrl	IMM (1),d1	|
+	roxrl	IMM (1),d2	|
+	roxrl	IMM (1),d3	|
+	roxrl	IMM (1),d6	| 
+	roxrl	IMM (1),d7	|
+	cmpw	IMM (1),d4	| is the exponent 1 already?
+#else
+	addl	IMM (1),d4	| adjust the exponent
+	lsrl	IMM (1),d7
+	btst	IMM (0),d6
+	beq	13f
+	bset	IMM (31),d7
+13:	lsrl	IMM (1),d6
+	btst	IMM (0),d3
+	beq	14f
+	bset	IMM (31),d6
+14:	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d2
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	12f
+	bset	IMM (31),d1
+12:	lsrl	IMM (1),d0
+	cmpl	IMM (1),d4	| is the exponent 1 already?
+#endif
+	beq	2f		| if not loop back
+	bra	1b              |
+	bra	Ld$underflow	| safety check, shouldn't execute '
+2:	orl	d6,d2		| this is a trick so we don't lose  '
+	orl	d7,d3		| the bits which were flushed right
+	movel	a0,d7		| get back sign bit into d7
+| Now call the rounding routine (which takes care of denormalized numbers):
+	lea	pc@(Lround$0),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Lround$0:
+| Here we have a correctly rounded result (either normalized or denormalized).
+
+| Here we should have either a normalized number or a denormalized one, and
+| the exponent is necessarily larger or equal to 1 (so we don't have to  '
+| check again for underflow!). We have to check for overflow or for a 
+| denormalized number (which also signals underflow).
+| Check for overflow (i.e., exponent >= 0x7ff).
+#ifndef __mcoldfire__
+	cmpw	IMM (0x07ff),d4
+#else
+	cmpl	IMM (0x07ff),d4
+#endif
+	bge	Ld$overflow
+| Now check for a denormalized number (exponent==0):
+	movew	d4,d4
+	beq	Ld$den
+1:
+| Put back the exponents and sign and return.
+#ifndef __mcoldfire__
+	lslw	IMM (4),d4	| exponent back to fourth byte
+#else
+	lsll	IMM (4),d4	| exponent back to fourth byte
+#endif
+	bclr	IMM (DBL_MANT_DIG-32-1),d0
+	swap	d0		| and put back exponent
+#ifndef __mcoldfire__
+	orw	d4,d0		| 
+#else
+	orl	d4,d0		| 
+#endif
+	swap	d0		|
+	orl	d7,d0		| and sign also
+
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+|=============================================================================
+|                              __negdf2
+|=============================================================================
+
+| double __negdf2(double, double);
+	FUNC(__negdf2)
+SYM (__negdf2):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	moveq	IMM (NEGATE),d5
+	movel	a6@(8),d0	| get number to negate in d0-d1
+	movel	a6@(12),d1	|
+	bchg	IMM (31),d0	| negate
+	movel	d0,d2		| make a positive copy (for the tests)
+	bclr	IMM (31),d2	|
+	movel	d2,d4		| check for zero
+	orl	d1,d4		|
+	beq	2f		| if zero (either sign) return +zero
+	cmpl	IMM (0x7ff00000),d2 | compare to +INFINITY
+	blt	1f		| if finite, return
+	bhi	Ld$inop		| if larger (fraction not zero) is NaN
+	tstl	d1		| if d2 == 0x7ff00000 check d1
+	bne	Ld$inop		|
+	movel	d0,d7		| else get sign and return INFINITY
+	andl	IMM (0x80000000),d7
+	bra	Ld$infty		
+1:	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+2:	bclr	IMM (31),d0
+	bra	1b
+
+|=============================================================================
+|                              __cmpdf2
+|=============================================================================
+
+GREATER =  1
+LESS    = -1
+EQUAL   =  0
+
+| int __cmpdf2_internal(double, double, int);
+SYM (__cmpdf2_internal):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@- 	| save registers
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	moveq	IMM (COMPARE),d5
+	movel	a6@(8),d0	| get first operand
+	movel	a6@(12),d1	|
+	movel	a6@(16),d2	| get second operand
+	movel	a6@(20),d3	|
+| First check if a and/or b are (+/-) zero and in that case clear
+| the sign bit.
+	movel	d0,d6		| copy signs into d6 (a) and d7(b)
+	bclr	IMM (31),d0	| and clear signs in d0 and d2
+	movel	d2,d7		|
+	bclr	IMM (31),d2	|
+	cmpl	IMM (0x7ff00000),d0 | check for a == NaN
+	bhi	Lcmpd$inop		| if d0 > 0x7ff00000, a is NaN
+	beq	Lcmpdf$a$nf	| if equal can be INFINITY, so check d1
+	movel	d0,d4		| copy into d4 to test for zero
+	orl	d1,d4		|
+	beq	Lcmpdf$a$0	|
+Lcmpdf$0:
+	cmpl	IMM (0x7ff00000),d2 | check for b == NaN
+	bhi	Lcmpd$inop		| if d2 > 0x7ff00000, b is NaN
+	beq	Lcmpdf$b$nf	| if equal can be INFINITY, so check d3
+	movel	d2,d4		|
+	orl	d3,d4		|
+	beq	Lcmpdf$b$0	|
+Lcmpdf$1:
+| Check the signs
+	eorl	d6,d7
+	bpl	1f
+| If the signs are not equal check if a >= 0
+	tstl	d6
+	bpl	Lcmpdf$a$gt$b	| if (a >= 0 && b < 0) => a > b
+	bmi	Lcmpdf$b$gt$a	| if (a < 0 && b >= 0) => a < b
+1:
+| If the signs are equal check for < 0
+	tstl	d6
+	bpl	1f
+| If both are negative exchange them
+#ifndef __mcoldfire__
+	exg	d0,d2
+	exg	d1,d3
+#else
+	movel	d0,d7
+	movel	d2,d0
+	movel	d7,d2
+	movel	d1,d7
+	movel	d3,d1
+	movel	d7,d3
+#endif
+1:
+| Now that they are positive we just compare them as longs (does this also
+| work for denormalized numbers?).
+	cmpl	d0,d2
+	bhi	Lcmpdf$b$gt$a	| |b| > |a|
+	bne	Lcmpdf$a$gt$b	| |b| < |a|
+| If we got here d0 == d2, so we compare d1 and d3.
+	cmpl	d1,d3
+	bhi	Lcmpdf$b$gt$a	| |b| > |a|
+	bne	Lcmpdf$a$gt$b	| |b| < |a|
+| If we got here a == b.
+	movel	IMM (EQUAL),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+Lcmpdf$a$gt$b:
+	movel	IMM (GREATER),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+Lcmpdf$b$gt$a:
+	movel	IMM (LESS),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+Lcmpdf$a$0:	
+	bclr	IMM (31),d6
+	bra	Lcmpdf$0
+Lcmpdf$b$0:
+	bclr	IMM (31),d7
+	bra	Lcmpdf$1
+
+Lcmpdf$a$nf:
+	tstl	d1
+	bne	Ld$inop
+	bra	Lcmpdf$0
+
+Lcmpdf$b$nf:
+	tstl	d3
+	bne	Ld$inop
+	bra	Lcmpdf$1
+
+Lcmpd$inop:
+	movl	a6@(24),d0
+	moveq	IMM (INEXACT_RESULT+INVALID_OPERATION),d7
+	moveq	IMM (DOUBLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+| int __cmpdf2(double, double);
+	FUNC(__cmpdf2)
+SYM (__cmpdf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+
+|=============================================================================
+|                           rounding routines
+|=============================================================================
+
+| The rounding routines expect the number to be normalized in registers
+| d0-d1-d2-d3, with the exponent in register d4. They assume that the 
+| exponent is larger or equal to 1. They return a properly normalized number
+| if possible, and a denormalized number otherwise. The exponent is returned
+| in d4.
+
+Lround$to$nearest:
+| We now normalize as suggested by D. Knuth ("Seminumerical Algorithms"):
+| Here we assume that the exponent is not too small (this should be checked
+| before entering the rounding routine), but the number could be denormalized.
+
+| Check for denormalized numbers:
+1:	btst	IMM (DBL_MANT_DIG-32),d0
+	bne	2f		| if set the number is normalized
+| Normalize shifting left until bit #DBL_MANT_DIG-32 is set or the exponent 
+| is one (remember that a denormalized number corresponds to an 
+| exponent of -D_BIAS+1).
+#ifndef __mcoldfire__
+	cmpw	IMM (1),d4	| remember that the exponent is at least one
+#else
+	cmpl	IMM (1),d4	| remember that the exponent is at least one
+#endif
+ 	beq	2f		| an exponent of one means denormalized
+	addl	d3,d3		| else shift and adjust the exponent
+	addxl	d2,d2		|
+	addxl	d1,d1		|
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	dbra	d4,1b		|
+#else
+	subql	IMM (1), d4
+	bpl	1b
+#endif
+2:
+| Now round: we do it as follows: after the shifting we can write the
+| fraction part as f + delta, where 1 < f < 2^25, and 0 <= delta <= 2.
+| If delta < 1, do nothing. If delta > 1, add 1 to f. 
+| If delta == 1, we make sure the rounded number will be even (odd?) 
+| (after shifting).
+	btst	IMM (0),d1	| is delta < 1?
+	beq	2f		| if so, do not do anything
+	orl	d2,d3		| is delta == 1?
+	bne	1f		| if so round to even
+	movel	d1,d3		| 
+	andl	IMM (2),d3	| bit 1 is the last significant bit
+	movel	IMM (0),d2	|
+	addl	d3,d1		|
+	addxl	d2,d0		|
+	bra	2f		| 
+1:	movel	IMM (1),d3	| else add 1 
+	movel	IMM (0),d2	|
+	addl	d3,d1		|
+	addxl	d2,d0
+| Shift right once (because we used bit #DBL_MANT_DIG-32!).
+2:
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1		
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+#endif
+
+| Now check again bit #DBL_MANT_DIG-32 (rounding could have produced a
+| 'fraction overflow' ...).
+	btst	IMM (DBL_MANT_DIG-32),d0	
+	beq	1f
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	addw	IMM (1),d4
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+	addl	IMM (1),d4
+#endif
+1:
+| If bit #DBL_MANT_DIG-32-1 is clear we have a denormalized number, so we 
+| have to put the exponent to zero and return a denormalized number.
+	btst	IMM (DBL_MANT_DIG-32-1),d0
+	beq	1f
+	jmp	a0@
+1:	movel	IMM (0),d4
+	jmp	a0@
+
+Lround$to$zero:
+Lround$to$plus:
+Lround$to$minus:
+	jmp	a0@
+#endif /* L_double */
+
+#ifdef  L_float
+
+	.globl	SYM (_fpCCR)
+	.globl  $_exception_handler
+
+QUIET_NaN    = 0xffffffff
+SIGNL_NaN    = 0x7f800001
+INFINITY     = 0x7f800000
+
+F_MAX_EXP      = 0xff
+F_BIAS         = 126
+FLT_MAX_EXP    = F_MAX_EXP - F_BIAS
+FLT_MIN_EXP    = 1 - F_BIAS
+FLT_MANT_DIG   = 24
+
+INEXACT_RESULT 		= 0x0001
+UNDERFLOW 		= 0x0002
+OVERFLOW 		= 0x0004
+DIVIDE_BY_ZERO 		= 0x0008
+INVALID_OPERATION 	= 0x0010
+
+SINGLE_FLOAT = 1
+
+NOOP         = 0
+ADD          = 1
+MULTIPLY     = 2
+DIVIDE       = 3
+NEGATE       = 4
+COMPARE      = 5
+EXTENDSFDF   = 6
+TRUNCDFSF    = 7
+
+UNKNOWN           = -1
+ROUND_TO_NEAREST  = 0 | round result to nearest representable value
+ROUND_TO_ZERO     = 1 | round result towards zero
+ROUND_TO_PLUS     = 2 | round result towards plus infinity
+ROUND_TO_MINUS    = 3 | round result towards minus infinity
+
+| Entry points:
+
+	.globl SYM (__addsf3)
+	.globl SYM (__subsf3)
+	.globl SYM (__mulsf3)
+	.globl SYM (__divsf3)
+	.globl SYM (__negsf2)
+	.globl SYM (__cmpsf2)
+	.globl SYM (__cmpsf2_internal)
+	.hidden SYM (__cmpsf2_internal)
+
+| These are common routines to return and signal exceptions.	
+
+	.text
+	.even
+
+Lf$den:
+| Return and signal a denormalized number
+	orl	d7,d0
+	moveq	IMM (INEXACT_RESULT+UNDERFLOW),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Lf$infty:
+Lf$overflow:
+| Return a properly signed INFINITY and set the exception flags 
+	movel	IMM (INFINITY),d0
+	orl	d7,d0
+	moveq	IMM (INEXACT_RESULT+OVERFLOW),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Lf$underflow:
+| Return 0 and set the exception flags 
+	moveq	IMM (0),d0
+	moveq	IMM (INEXACT_RESULT+UNDERFLOW),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Lf$inop:
+| Return a quiet NaN and set the exception flags
+	movel	IMM (QUIET_NaN),d0
+	moveq	IMM (INEXACT_RESULT+INVALID_OPERATION),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+Lf$div$0:
+| Return a properly signed INFINITY and set the exception flags
+	movel	IMM (INFINITY),d0
+	orl	d7,d0
+	moveq	IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+|=============================================================================
+|=============================================================================
+|                         single precision routines
+|=============================================================================
+|=============================================================================
+
+| A single precision floating point number (float) has the format:
+|
+| struct _float {
+|  unsigned int sign      : 1;  /* sign bit */ 
+|  unsigned int exponent  : 8;  /* exponent, shifted by 126 */
+|  unsigned int fraction  : 23; /* fraction */
+| } float;
+| 
+| Thus sizeof(float) = 4 (32 bits). 
+|
+| All the routines are callable from C programs, and return the result 
+| in the single register d0. They also preserve all registers except 
+| d0-d1 and a0-a1.
+
+|=============================================================================
+|                              __subsf3
+|=============================================================================
+
+| float __subsf3(float, float);
+	FUNC(__subsf3)
+SYM (__subsf3):
+	bchg	IMM (31),sp@(8)	| change sign of second operand
+				| and fall through
+|=============================================================================
+|                              __addsf3
+|=============================================================================
+
+| float __addsf3(float, float);
+	FUNC(__addsf3)
+SYM (__addsf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)	| everything will be done in registers
+	moveml	d2-d7,sp@-	| save all data registers but d0-d1
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0	| get first operand
+	movel	a6@(12),d1	| get second operand
+	movel	d0,a0		| get d0's sign bit '
+	addl	d0,d0		| check and clear sign bit of a
+	beq	Laddsf$b	| if zero return second operand
+	movel	d1,a1		| save b's sign bit '
+	addl	d1,d1		| get rid of sign bit
+	beq	Laddsf$a	| if zero return first operand
+
+| Get the exponents and check for denormalized and/or infinity.
+
+	movel	IMM (0x00ffffff),d4	| mask to get fraction
+	movel	IMM (0x01000000),d5	| mask to put hidden bit back
+
+	movel	d0,d6		| save a to get exponent
+	andl	d4,d0		| get fraction in d0
+	notl 	d4		| make d4 into a mask for the exponent
+	andl	d4,d6		| get exponent in d6
+	beq	Laddsf$a$den	| branch if a is denormalized
+	cmpl	d4,d6		| check for INFINITY or NaN
+	beq	Laddsf$nf
+	swap	d6		| put exponent into first word
+	orl	d5,d0		| and put hidden bit back
+Laddsf$1:
+| Now we have a's exponent in d6 (second byte) and the mantissa in d0. '
+	movel	d1,d7		| get exponent in d7
+	andl	d4,d7		| 
+	beq	Laddsf$b$den	| branch if b is denormalized
+	cmpl	d4,d7		| check for INFINITY or NaN
+	beq	Laddsf$nf
+	swap	d7		| put exponent into first word
+	notl 	d4		| make d4 into a mask for the fraction
+	andl	d4,d1		| get fraction in d1
+	orl	d5,d1		| and put hidden bit back
+Laddsf$2:
+| Now we have b's exponent in d7 (second byte) and the mantissa in d1. '
+
+| Note that the hidden bit corresponds to bit #FLT_MANT_DIG-1, and we 
+| shifted right once, so bit #FLT_MANT_DIG is set (so we have one extra
+| bit).
+
+	movel	d1,d2		| move b to d2, since we want to use
+				| two registers to do the sum
+	movel	IMM (0),d1	| and clear the new ones
+	movel	d1,d3		|
+
+| Here we shift the numbers in registers d0 and d1 so the exponents are the
+| same, and put the largest exponent in d6. Note that we are using two
+| registers for each number (see the discussion by D. Knuth in "Seminumerical 
+| Algorithms").
+#ifndef __mcoldfire__
+	cmpw	d6,d7		| compare exponents
+#else
+	cmpl	d6,d7		| compare exponents
+#endif
+	beq	Laddsf$3	| if equal don't shift '
+	bhi	5f		| branch if second exponent largest
+1:
+	subl	d6,d7		| keep the largest exponent
+	negl	d7
+#ifndef __mcoldfire__
+	lsrw	IMM (8),d7	| put difference in lower byte
+#else
+	lsrl	IMM (8),d7	| put difference in lower byte
+#endif
+| if difference is too large we don't shift (actually, we can just exit) '
+#ifndef __mcoldfire__
+	cmpw	IMM (FLT_MANT_DIG+2),d7		
+#else
+	cmpl	IMM (FLT_MANT_DIG+2),d7		
+#endif
+	bge	Laddsf$b$small
+#ifndef __mcoldfire__
+	cmpw	IMM (16),d7	| if difference >= 16 swap
+#else
+	cmpl	IMM (16),d7	| if difference >= 16 swap
+#endif
+	bge	4f
+2:
+#ifndef __mcoldfire__
+	subw	IMM (1),d7
+#else
+	subql	IMM (1), d7
+#endif
+3:
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d2	| shift right second operand
+	roxrl	IMM (1),d3
+	dbra	d7,3b
+#else
+	lsrl	IMM (1),d3
+	btst	IMM (0),d2
+	beq	10f
+	bset	IMM (31),d3
+10:	lsrl	IMM (1),d2
+	subql	IMM (1), d7
+	bpl	3b
+#endif
+	bra	Laddsf$3
+4:
+	movew	d2,d3
+	swap	d3
+	movew	d3,d2
+	swap	d2
+#ifndef __mcoldfire__
+	subw	IMM (16),d7
+#else
+	subl	IMM (16),d7
+#endif
+	bne	2b		| if still more bits, go back to normal case
+	bra	Laddsf$3
+5:
+#ifndef __mcoldfire__
+	exg	d6,d7		| exchange the exponents
+#else
+	eorl	d6,d7
+	eorl	d7,d6
+	eorl	d6,d7
+#endif
+	subl	d6,d7		| keep the largest exponent
+	negl	d7		|
+#ifndef __mcoldfire__
+	lsrw	IMM (8),d7	| put difference in lower byte
+#else
+	lsrl	IMM (8),d7	| put difference in lower byte
+#endif
+| if difference is too large we don't shift (and exit!) '
+#ifndef __mcoldfire__
+	cmpw	IMM (FLT_MANT_DIG+2),d7		
+#else
+	cmpl	IMM (FLT_MANT_DIG+2),d7		
+#endif
+	bge	Laddsf$a$small
+#ifndef __mcoldfire__
+	cmpw	IMM (16),d7	| if difference >= 16 swap
+#else
+	cmpl	IMM (16),d7	| if difference >= 16 swap
+#endif
+	bge	8f
+6:
+#ifndef __mcoldfire__
+	subw	IMM (1),d7
+#else
+	subl	IMM (1),d7
+#endif
+7:
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0	| shift right first operand
+	roxrl	IMM (1),d1
+	dbra	d7,7b
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+	subql	IMM (1),d7
+	bpl	7b
+#endif
+	bra	Laddsf$3
+8:
+	movew	d0,d1
+	swap	d1
+	movew	d1,d0
+	swap	d0
+#ifndef __mcoldfire__
+	subw	IMM (16),d7
+#else
+	subl	IMM (16),d7
+#endif
+	bne	6b		| if still more bits, go back to normal case
+				| otherwise we fall through
+
+| Now we have a in d0-d1, b in d2-d3, and the largest exponent in d6 (the
+| signs are stored in a0 and a1).
+
+Laddsf$3:
+| Here we have to decide whether to add or subtract the numbers
+#ifndef __mcoldfire__
+	exg	d6,a0		| get signs back
+	exg	d7,a1		| and save the exponents
+#else
+	movel	d6,d4
+	movel	a0,d6
+	movel	d4,a0
+	movel	d7,d4
+	movel	a1,d7
+	movel	d4,a1
+#endif
+	eorl	d6,d7		| combine sign bits
+	bmi	Lsubsf$0	| if negative a and b have opposite 
+				| sign so we actually subtract the
+				| numbers
+
+| Here we have both positive or both negative
+#ifndef __mcoldfire__
+	exg	d6,a0		| now we have the exponent in d6
+#else
+	movel	d6,d4
+	movel	a0,d6
+	movel	d4,a0
+#endif
+	movel	a0,d7		| and sign in d7
+	andl	IMM (0x80000000),d7
+| Here we do the addition.
+	addl	d3,d1
+	addxl	d2,d0
+| Note: now we have d2, d3, d4 and d5 to play with! 
+
+| Put the exponent, in the first byte, in d2, to use the "standard" rounding
+| routines:
+	movel	d6,d2
+#ifndef __mcoldfire__
+	lsrw	IMM (8),d2
+#else
+	lsrl	IMM (8),d2
+#endif
+
+| Before rounding normalize so bit #FLT_MANT_DIG is set (we will consider
+| the case of denormalized numbers in the rounding routine itself).
+| As in the addition (not in the subtraction!) we could have set 
+| one more bit we check this:
+	btst	IMM (FLT_MANT_DIG+1),d0	
+	beq	1f
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+#endif
+	addl	IMM (1),d2
+1:
+	lea	pc@(Laddsf$4),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Laddsf$4:
+| Put back the exponent, but check for overflow.
+#ifndef __mcoldfire__
+	cmpw	IMM (0xff),d2
+#else
+	cmpl	IMM (0xff),d2
+#endif
+	bhi	1f
+	bclr	IMM (FLT_MANT_DIG-1),d0
+#ifndef __mcoldfire__
+	lslw	IMM (7),d2
+#else
+	lsll	IMM (7),d2
+#endif
+	swap	d2
+	orl	d2,d0
+	bra	Laddsf$ret
+1:
+	moveq	IMM (ADD),d5
+	bra	Lf$overflow
+
+Lsubsf$0:
+| We are here if a > 0 and b < 0 (sign bits cleared).
+| Here we do the subtraction.
+	movel	d6,d7		| put sign in d7
+	andl	IMM (0x80000000),d7
+
+	subl	d3,d1		| result in d0-d1
+	subxl	d2,d0		|
+	beq	Laddsf$ret	| if zero just exit
+	bpl	1f		| if positive skip the following
+	bchg	IMM (31),d7	| change sign bit in d7
+	negl	d1
+	negxl	d0
+1:
+#ifndef __mcoldfire__
+	exg	d2,a0		| now we have the exponent in d2
+	lsrw	IMM (8),d2	| put it in the first byte
+#else
+	movel	d2,d4
+	movel	a0,d2
+	movel	d4,a0
+	lsrl	IMM (8),d2	| put it in the first byte
+#endif
+
+| Now d0-d1 is positive and the sign bit is in d7.
+
+| Note that we do not have to normalize, since in the subtraction bit
+| #FLT_MANT_DIG+1 is never set, and denormalized numbers are handled by
+| the rounding routines themselves.
+	lea	pc@(Lsubsf$1),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Lsubsf$1:
+| Put back the exponent (we can't have overflow!). '
+	bclr	IMM (FLT_MANT_DIG-1),d0
+#ifndef __mcoldfire__
+	lslw	IMM (7),d2
+#else
+	lsll	IMM (7),d2
+#endif
+	swap	d2
+	orl	d2,d0
+	bra	Laddsf$ret
+
+| If one of the numbers was too small (difference of exponents >= 
+| FLT_MANT_DIG+2) we return the other (and now we don't have to '
+| check for finiteness or zero).
+Laddsf$a$small:
+	movel	a6@(12),d0
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| restore data registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+
+Laddsf$b$small:
+	movel	a6@(8),d0
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| restore data registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+
+| If the numbers are denormalized remember to put exponent equal to 1.
+
+Laddsf$a$den:
+	movel	d5,d6		| d5 contains 0x01000000
+	swap	d6
+	bra	Laddsf$1
+
+Laddsf$b$den:
+	movel	d5,d7
+	swap	d7
+	notl 	d4		| make d4 into a mask for the fraction
+				| (this was not executed after the jump)
+	bra	Laddsf$2
+
+| The rest is mainly code for the different results which can be 
+| returned (checking always for +/-INFINITY and NaN).
+
+Laddsf$b:
+| Return b (if a is zero).
+	movel	a6@(12),d0
+	cmpl	IMM (0x80000000),d0	| Check if b is -0
+	bne	1f
+	movel	a0,d7
+	andl	IMM (0x80000000),d7	| Use the sign of a
+	clrl	d0
+	bra	Laddsf$ret
+Laddsf$a:
+| Return a (if b is zero).
+	movel	a6@(8),d0
+1:
+	moveq	IMM (ADD),d5
+| We have to check for NaN and +/-infty.
+	movel	d0,d7
+	andl	IMM (0x80000000),d7	| put sign in d7
+	bclr	IMM (31),d0		| clear sign
+	cmpl	IMM (INFINITY),d0	| check for infty or NaN
+	bge	2f
+	movel	d0,d0		| check for zero (we do this because we don't '
+	bne	Laddsf$ret	| want to return -0 by mistake
+	bclr	IMM (31),d7	| if zero be sure to clear sign
+	bra	Laddsf$ret	| if everything OK just return
+2:
+| The value to be returned is either +/-infty or NaN
+	andl	IMM (0x007fffff),d0	| check for NaN
+	bne	Lf$inop			| if mantissa not zero is NaN
+	bra	Lf$infty
+
+Laddsf$ret:
+| Normal exit (a and b nonzero, result is not NaN nor +/-infty).
+| We have to clear the exception flags (just the exception type).
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+	orl	d7,d0		| put sign bit
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| restore data registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| and return
+	rts
+
+Laddsf$ret$den:
+| Return a denormalized number (for addition we don't signal underflow) '
+	lsrl	IMM (1),d0	| remember to shift right back once
+	bra	Laddsf$ret	| and return
+
+| Note: when adding two floats of the same sign if either one is 
+| NaN we return NaN without regard to whether the other is finite or 
+| not. When subtracting them (i.e., when adding two numbers of 
+| opposite signs) things are more complicated: if both are INFINITY 
+| we return NaN, if only one is INFINITY and the other is NaN we return
+| NaN, but if it is finite we return INFINITY with the corresponding sign.
+
+Laddsf$nf:
+	moveq	IMM (ADD),d5
+| This could be faster but it is not worth the effort, since it is not
+| executed very often. We sacrifice speed for clarity here.
+	movel	a6@(8),d0	| get the numbers back (remember that we
+	movel	a6@(12),d1	| did some processing already)
+	movel	IMM (INFINITY),d4 | useful constant (INFINITY)
+	movel	d0,d2		| save sign bits
+	movel	d1,d3
+	bclr	IMM (31),d0	| clear sign bits
+	bclr	IMM (31),d1
+| We know that one of them is either NaN of +/-INFINITY
+| Check for NaN (if either one is NaN return NaN)
+	cmpl	d4,d0		| check first a (d0)
+	bhi	Lf$inop		
+	cmpl	d4,d1		| check now b (d1)
+	bhi	Lf$inop		
+| Now comes the check for +/-INFINITY. We know that both are (maybe not
+| finite) numbers, but we have to check if both are infinite whether we
+| are adding or subtracting them.
+	eorl	d3,d2		| to check sign bits
+	bmi	1f
+	movel	d0,d7
+	andl	IMM (0x80000000),d7	| get (common) sign bit
+	bra	Lf$infty
+1:
+| We know one (or both) are infinite, so we test for equality between the
+| two numbers (if they are equal they have to be infinite both, so we
+| return NaN).
+	cmpl	d1,d0		| are both infinite?
+	beq	Lf$inop		| if so return NaN
+
+	movel	d0,d7
+	andl	IMM (0x80000000),d7 | get a's sign bit '
+	cmpl	d4,d0		| test now for infinity
+	beq	Lf$infty	| if a is INFINITY return with this sign
+	bchg	IMM (31),d7	| else we know b is INFINITY and has
+	bra	Lf$infty	| the opposite sign
+
+|=============================================================================
+|                             __mulsf3
+|=============================================================================
+
+| float __mulsf3(float, float);
+	FUNC(__mulsf3)
+SYM (__mulsf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0	| get a into d0
+	movel	a6@(12),d1	| and b into d1
+	movel	d0,d7		| d7 will hold the sign of the product
+	eorl	d1,d7		|
+	andl	IMM (0x80000000),d7
+	movel	IMM (INFINITY),d6	| useful constant (+INFINITY)
+	movel	d6,d5			| another (mask for fraction)
+	notl	d5			|
+	movel	IMM (0x00800000),d4	| this is to put hidden bit back
+	bclr	IMM (31),d0		| get rid of a's sign bit '
+	movel	d0,d2			|
+	beq	Lmulsf$a$0		| branch if a is zero
+	bclr	IMM (31),d1		| get rid of b's sign bit '
+	movel	d1,d3		|
+	beq	Lmulsf$b$0	| branch if b is zero
+	cmpl	d6,d0		| is a big?
+	bhi	Lmulsf$inop	| if a is NaN return NaN
+	beq	Lmulsf$inf	| if a is INFINITY we have to check b
+	cmpl	d6,d1		| now compare b with INFINITY
+	bhi	Lmulsf$inop	| is b NaN?
+	beq	Lmulsf$overflow | is b INFINITY?
+| Here we have both numbers finite and nonzero (and with no sign bit).
+| Now we get the exponents into d2 and d3.
+	andl	d6,d2		| and isolate exponent in d2
+	beq	Lmulsf$a$den	| if exponent is zero we have a denormalized
+	andl	d5,d0		| and isolate fraction
+	orl	d4,d0		| and put hidden bit back
+	swap	d2		| I like exponents in the first byte
+#ifndef __mcoldfire__
+	lsrw	IMM (7),d2	| 
+#else
+	lsrl	IMM (7),d2	| 
+#endif
+Lmulsf$1:			| number
+	andl	d6,d3		|
+	beq	Lmulsf$b$den	|
+	andl	d5,d1		|
+	orl	d4,d1		|
+	swap	d3		|
+#ifndef __mcoldfire__
+	lsrw	IMM (7),d3	|
+#else
+	lsrl	IMM (7),d3	|
+#endif
+Lmulsf$2:			|
+#ifndef __mcoldfire__
+	addw	d3,d2		| add exponents
+	subw	IMM (F_BIAS+1),d2 | and subtract bias (plus one)
+#else
+	addl	d3,d2		| add exponents
+	subl	IMM (F_BIAS+1),d2 | and subtract bias (plus one)
+#endif
+
+| We are now ready to do the multiplication. The situation is as follows:
+| both a and b have bit FLT_MANT_DIG-1 set (even if they were 
+| denormalized to start with!), which means that in the product 
+| bit 2*(FLT_MANT_DIG-1) (that is, bit 2*FLT_MANT_DIG-2-32 of the 
+| high long) is set. 
+
+| To do the multiplication let us move the number a little bit around ...
+	movel	d1,d6		| second operand in d6
+	movel	d0,d5		| first operand in d4-d5
+	movel	IMM (0),d4
+	movel	d4,d1		| the sums will go in d0-d1
+	movel	d4,d0
+
+| now bit FLT_MANT_DIG-1 becomes bit 31:
+	lsll	IMM (31-FLT_MANT_DIG+1),d6		
+
+| Start the loop (we loop #FLT_MANT_DIG times):
+	moveq	IMM (FLT_MANT_DIG-1),d3	
+1:	addl	d1,d1		| shift sum 
+	addxl	d0,d0
+	lsll	IMM (1),d6	| get bit bn
+	bcc	2f		| if not set skip sum
+	addl	d5,d1		| add a
+	addxl	d4,d0
+2:
+#ifndef __mcoldfire__
+	dbf	d3,1b		| loop back
+#else
+	subql	IMM (1),d3
+	bpl	1b
+#endif
+
+| Now we have the product in d0-d1, with bit (FLT_MANT_DIG - 1) + FLT_MANT_DIG
+| (mod 32) of d0 set. The first thing to do now is to normalize it so bit 
+| FLT_MANT_DIG is set (to do the rounding).
+#ifndef __mcoldfire__
+	rorl	IMM (6),d1
+	swap	d1
+	movew	d1,d3
+	andw	IMM (0x03ff),d3
+	andw	IMM (0xfd00),d1
+#else
+	movel	d1,d3
+	lsll	IMM (8),d1
+	addl	d1,d1
+	addl	d1,d1
+	moveq	IMM (22),d5
+	lsrl	d5,d3
+	orl	d3,d1
+	andl	IMM (0xfffffd00),d1
+#endif
+	lsll	IMM (8),d0
+	addl	d0,d0
+	addl	d0,d0
+#ifndef __mcoldfire__
+	orw	d3,d0
+#else
+	orl	d3,d0
+#endif
+
+	moveq	IMM (MULTIPLY),d5
+	
+	btst	IMM (FLT_MANT_DIG+1),d0
+	beq	Lround$exit
+#ifndef __mcoldfire__
+	lsrl	IMM (1),d0
+	roxrl	IMM (1),d1
+	addw	IMM (1),d2
+#else
+	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+	addql	IMM (1),d2
+#endif
+	bra	Lround$exit
+
+Lmulsf$inop:
+	moveq	IMM (MULTIPLY),d5
+	bra	Lf$inop
+
+Lmulsf$overflow:
+	moveq	IMM (MULTIPLY),d5
+	bra	Lf$overflow
+
+Lmulsf$inf:
+	moveq	IMM (MULTIPLY),d5
+| If either is NaN return NaN; else both are (maybe infinite) numbers, so
+| return INFINITY with the correct sign (which is in d7).
+	cmpl	d6,d1		| is b NaN?
+	bhi	Lf$inop		| if so return NaN
+	bra	Lf$overflow	| else return +/-INFINITY
+
+| If either number is zero return zero, unless the other is +/-INFINITY, 
+| or NaN, in which case we return NaN.
+Lmulsf$b$0:
+| Here d1 (==b) is zero.
+	movel	a6@(8),d1	| get a again to check for non-finiteness
+	bra	1f
+Lmulsf$a$0:
+	movel	a6@(12),d1	| get b again to check for non-finiteness
+1:	bclr	IMM (31),d1	| clear sign bit 
+	cmpl	IMM (INFINITY),d1 | and check for a large exponent
+	bge	Lf$inop		| if b is +/-INFINITY or NaN return NaN
+	movel	d7,d0		| else return signed zero
+	PICLEA	SYM (_fpCCR),a0	|
+	movew	IMM (0),a0@	| 
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7	| 
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6		| 
+	rts			| 
+
+| If a number is denormalized we put an exponent of 1 but do not put the 
+| hidden bit back into the fraction; instead we shift left until bit 23
+| (the hidden bit) is set, adjusting the exponent accordingly. We do this
+| to ensure that the product of the fractions is close to 1.
+Lmulsf$a$den:
+	movel	IMM (1),d2
+	andl	d5,d0
+1:	addl	d0,d0		| shift a left (until bit 23 is set)
+#ifndef __mcoldfire__
+	subw	IMM (1),d2	| and adjust exponent
+#else
+	subql	IMM (1),d2	| and adjust exponent
+#endif
+	btst	IMM (FLT_MANT_DIG-1),d0
+	bne	Lmulsf$1	|
+	bra	1b		| else loop back
+
+Lmulsf$b$den:
+	movel	IMM (1),d3
+	andl	d5,d1
+1:	addl	d1,d1		| shift b left until bit 23 is set
+#ifndef __mcoldfire__
+	subw	IMM (1),d3	| and adjust exponent
+#else
+	subql	IMM (1),d3	| and adjust exponent
+#endif
+	btst	IMM (FLT_MANT_DIG-1),d1
+	bne	Lmulsf$2	|
+	bra	1b		| else loop back
+
+|=============================================================================
+|                             __divsf3
+|=============================================================================
+
+| float __divsf3(float, float);
+	FUNC(__divsf3)
+SYM (__divsf3):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	movel	a6@(8),d0		| get a into d0
+	movel	a6@(12),d1		| and b into d1
+	movel	d0,d7			| d7 will hold the sign of the result
+	eorl	d1,d7			|
+	andl	IMM (0x80000000),d7	| 
+	movel	IMM (INFINITY),d6	| useful constant (+INFINITY)
+	movel	d6,d5			| another (mask for fraction)
+	notl	d5			|
+	movel	IMM (0x00800000),d4	| this is to put hidden bit back
+	bclr	IMM (31),d0		| get rid of a's sign bit '
+	movel	d0,d2			|
+	beq	Ldivsf$a$0		| branch if a is zero
+	bclr	IMM (31),d1		| get rid of b's sign bit '
+	movel	d1,d3			|
+	beq	Ldivsf$b$0		| branch if b is zero
+	cmpl	d6,d0			| is a big?
+	bhi	Ldivsf$inop		| if a is NaN return NaN
+	beq	Ldivsf$inf		| if a is INFINITY we have to check b
+	cmpl	d6,d1			| now compare b with INFINITY 
+	bhi	Ldivsf$inop		| if b is NaN return NaN
+	beq	Ldivsf$underflow
+| Here we have both numbers finite and nonzero (and with no sign bit).
+| Now we get the exponents into d2 and d3 and normalize the numbers to
+| ensure that the ratio of the fractions is close to 1. We do this by
+| making sure that bit #FLT_MANT_DIG-1 (hidden bit) is set.
+	andl	d6,d2		| and isolate exponent in d2
+	beq	Ldivsf$a$den	| if exponent is zero we have a denormalized
+	andl	d5,d0		| and isolate fraction
+	orl	d4,d0		| and put hidden bit back
+	swap	d2		| I like exponents in the first byte
+#ifndef __mcoldfire__
+	lsrw	IMM (7),d2	| 
+#else
+	lsrl	IMM (7),d2	| 
+#endif
+Ldivsf$1:			| 
+	andl	d6,d3		|
+	beq	Ldivsf$b$den	|
+	andl	d5,d1		|
+	orl	d4,d1		|
+	swap	d3		|
+#ifndef __mcoldfire__
+	lsrw	IMM (7),d3	|
+#else
+	lsrl	IMM (7),d3	|
+#endif
+Ldivsf$2:			|
+#ifndef __mcoldfire__
+	subw	d3,d2		| subtract exponents
+ 	addw	IMM (F_BIAS),d2	| and add bias
+#else
+	subl	d3,d2		| subtract exponents
+ 	addl	IMM (F_BIAS),d2	| and add bias
+#endif
+ 
+| We are now ready to do the division. We have prepared things in such a way
+| that the ratio of the fractions will be less than 2 but greater than 1/2.
+| At this point the registers in use are:
+| d0	holds a (first operand, bit FLT_MANT_DIG=0, bit FLT_MANT_DIG-1=1)
+| d1	holds b (second operand, bit FLT_MANT_DIG=1)
+| d2	holds the difference of the exponents, corrected by the bias
+| d7	holds the sign of the ratio
+| d4, d5, d6 hold some constants
+	movel	d7,a0		| d6-d7 will hold the ratio of the fractions
+	movel	IMM (0),d6	| 
+	movel	d6,d7
+
+	moveq	IMM (FLT_MANT_DIG+1),d3
+1:	cmpl	d0,d1		| is a < b?
+	bhi	2f		|
+	bset	d3,d6		| set a bit in d6
+	subl	d1,d0		| if a >= b  a <-- a-b
+	beq	3f		| if a is zero, exit
+2:	addl	d0,d0		| multiply a by 2
+#ifndef __mcoldfire__
+	dbra	d3,1b
+#else
+	subql	IMM (1),d3
+	bpl	1b
+#endif
+
+| Now we keep going to set the sticky bit ...
+	moveq	IMM (FLT_MANT_DIG),d3
+1:	cmpl	d0,d1
+	ble	2f
+	addl	d0,d0
+#ifndef __mcoldfire__
+	dbra	d3,1b
+#else
+	subql	IMM(1),d3
+	bpl	1b
+#endif
+	movel	IMM (0),d1
+	bra	3f
+2:	movel	IMM (0),d1
+#ifndef __mcoldfire__
+	subw	IMM (FLT_MANT_DIG),d3
+	addw	IMM (31),d3
+#else
+	subl	IMM (FLT_MANT_DIG),d3
+	addl	IMM (31),d3
+#endif
+	bset	d3,d1
+3:
+	movel	d6,d0		| put the ratio in d0-d1
+	movel	a0,d7		| get sign back
+
+| Because of the normalization we did before we are guaranteed that 
+| d0 is smaller than 2^26 but larger than 2^24. Thus bit 26 is not set,
+| bit 25 could be set, and if it is not set then bit 24 is necessarily set.
+	btst	IMM (FLT_MANT_DIG+1),d0		
+	beq	1f              | if it is not set, then bit 24 is set
+	lsrl	IMM (1),d0	|
+#ifndef __mcoldfire__
+	addw	IMM (1),d2	|
+#else
+	addl	IMM (1),d2	|
+#endif
+1:
+| Now round, check for over- and underflow, and exit.
+	moveq	IMM (DIVIDE),d5
+	bra	Lround$exit
+
+Ldivsf$inop:
+	moveq	IMM (DIVIDE),d5
+	bra	Lf$inop
+
+Ldivsf$overflow:
+	moveq	IMM (DIVIDE),d5
+	bra	Lf$overflow
+
+Ldivsf$underflow:
+	moveq	IMM (DIVIDE),d5
+	bra	Lf$underflow
+
+Ldivsf$a$0:
+	moveq	IMM (DIVIDE),d5
+| If a is zero check to see whether b is zero also. In that case return
+| NaN; then check if b is NaN, and return NaN also in that case. Else
+| return a properly signed zero.
+	andl	IMM (0x7fffffff),d1	| clear sign bit and test b
+	beq	Lf$inop			| if b is also zero return NaN
+	cmpl	IMM (INFINITY),d1	| check for NaN
+	bhi	Lf$inop			| 
+	movel	d7,d0			| else return signed zero
+	PICLEA	SYM (_fpCCR),a0		|
+	movew	IMM (0),a0@		|
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7		| 
+#else
+	moveml	sp@,d2-d7		| 
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6			| 
+	rts				| 
+	
+Ldivsf$b$0:
+	moveq	IMM (DIVIDE),d5
+| If we got here a is not zero. Check if a is NaN; in that case return NaN,
+| else return +/-INFINITY. Remember that a is in d0 with the sign bit 
+| cleared already.
+	cmpl	IMM (INFINITY),d0	| compare d0 with INFINITY
+	bhi	Lf$inop			| if larger it is NaN
+	bra	Lf$div$0		| else signal DIVIDE_BY_ZERO
+
+Ldivsf$inf:
+	moveq	IMM (DIVIDE),d5
+| If a is INFINITY we have to check b
+	cmpl	IMM (INFINITY),d1	| compare b with INFINITY 
+	bge	Lf$inop			| if b is NaN or INFINITY return NaN
+	bra	Lf$overflow		| else return overflow
+
+| If a number is denormalized we put an exponent of 1 but do not put the 
+| bit back into the fraction.
+Ldivsf$a$den:
+	movel	IMM (1),d2
+	andl	d5,d0
+1:	addl	d0,d0		| shift a left until bit FLT_MANT_DIG-1 is set
+#ifndef __mcoldfire__
+	subw	IMM (1),d2	| and adjust exponent
+#else
+	subl	IMM (1),d2	| and adjust exponent
+#endif
+	btst	IMM (FLT_MANT_DIG-1),d0
+	bne	Ldivsf$1
+	bra	1b
+
+Ldivsf$b$den:
+	movel	IMM (1),d3
+	andl	d5,d1
+1:	addl	d1,d1		| shift b left until bit FLT_MANT_DIG is set
+#ifndef __mcoldfire__
+	subw	IMM (1),d3	| and adjust exponent
+#else
+	subl	IMM (1),d3	| and adjust exponent
+#endif
+	btst	IMM (FLT_MANT_DIG-1),d1
+	bne	Ldivsf$2
+	bra	1b
+
+Lround$exit:
+| This is a common exit point for __mulsf3 and __divsf3. 
+
+| First check for underlow in the exponent:
+#ifndef __mcoldfire__
+	cmpw	IMM (-FLT_MANT_DIG-1),d2		
+#else
+	cmpl	IMM (-FLT_MANT_DIG-1),d2		
+#endif
+	blt	Lf$underflow	
+| It could happen that the exponent is less than 1, in which case the 
+| number is denormalized. In this case we shift right and adjust the 
+| exponent until it becomes 1 or the fraction is zero (in the latter case 
+| we signal underflow and return zero).
+	movel	IMM (0),d6	| d6 is used temporarily
+#ifndef __mcoldfire__
+	cmpw	IMM (1),d2	| if the exponent is less than 1 we 
+#else
+	cmpl	IMM (1),d2	| if the exponent is less than 1 we 
+#endif
+	bge	2f		| have to shift right (denormalize)
+1:
+#ifndef __mcoldfire__
+	addw	IMM (1),d2	| adjust the exponent
+	lsrl	IMM (1),d0	| shift right once 
+	roxrl	IMM (1),d1	|
+	roxrl	IMM (1),d6	| d6 collect bits we would lose otherwise
+	cmpw	IMM (1),d2	| is the exponent 1 already?
+#else
+	addql	IMM (1),d2	| adjust the exponent
+	lsrl	IMM (1),d6
+	btst	IMM (0),d1
+	beq	11f
+	bset	IMM (31),d6
+11:	lsrl	IMM (1),d1
+	btst	IMM (0),d0
+	beq	10f
+	bset	IMM (31),d1
+10:	lsrl	IMM (1),d0
+	cmpl	IMM (1),d2	| is the exponent 1 already?
+#endif
+	beq	2f		| if not loop back
+	bra	1b              |
+	bra	Lf$underflow	| safety check, shouldn't execute '
+2:	orl	d6,d1		| this is a trick so we don't lose  '
+				| the extra bits which were flushed right
+| Now call the rounding routine (which takes care of denormalized numbers):
+	lea	pc@(Lround$0),a0 | to return from rounding routine
+	PICLEA	SYM (_fpCCR),a1	| check the rounding mode
+#ifdef __mcoldfire__
+	clrl	d6
+#endif
+	movew	a1@(6),d6	| rounding mode in d6
+	beq	Lround$to$nearest
+#ifndef __mcoldfire__
+	cmpw	IMM (ROUND_TO_PLUS),d6
+#else
+	cmpl	IMM (ROUND_TO_PLUS),d6
+#endif
+	bhi	Lround$to$minus
+	blt	Lround$to$zero
+	bra	Lround$to$plus
+Lround$0:
+| Here we have a correctly rounded result (either normalized or denormalized).
+
+| Here we should have either a normalized number or a denormalized one, and
+| the exponent is necessarily larger or equal to 1 (so we don't have to  '
+| check again for underflow!). We have to check for overflow or for a 
+| denormalized number (which also signals underflow).
+| Check for overflow (i.e., exponent >= 255).
+#ifndef __mcoldfire__
+	cmpw	IMM (0x00ff),d2
+#else
+	cmpl	IMM (0x00ff),d2
+#endif
+	bge	Lf$overflow
+| Now check for a denormalized number (exponent==0).
+	movew	d2,d2
+	beq	Lf$den
+1:
+| Put back the exponents and sign and return.
+#ifndef __mcoldfire__
+	lslw	IMM (7),d2	| exponent back to fourth byte
+#else
+	lsll	IMM (7),d2	| exponent back to fourth byte
+#endif
+	bclr	IMM (FLT_MANT_DIG-1),d0
+	swap	d0		| and put back exponent
+#ifndef __mcoldfire__
+	orw	d2,d0		| 
+#else
+	orl	d2,d0
+#endif
+	swap	d0		|
+	orl	d7,d0		| and sign also
+
+	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+|=============================================================================
+|                             __negsf2
+|=============================================================================
+
+| This is trivial and could be shorter if we didn't bother checking for NaN '
+| and +/-INFINITY.
+
+| float __negsf2(float);
+	FUNC(__negsf2)
+SYM (__negsf2):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@-
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	moveq	IMM (NEGATE),d5
+	movel	a6@(8),d0	| get number to negate in d0
+	bchg	IMM (31),d0	| negate
+	movel	d0,d1		| make a positive copy
+	bclr	IMM (31),d1	|
+	tstl	d1		| check for zero
+	beq	2f		| if zero (either sign) return +zero
+	cmpl	IMM (INFINITY),d1 | compare to +INFINITY
+	blt	1f		|
+	bhi	Lf$inop		| if larger (fraction not zero) is NaN
+	movel	d0,d7		| else get sign and return INFINITY
+	andl	IMM (0x80000000),d7
+	bra	Lf$infty		
+1:	PICLEA	SYM (_fpCCR),a0
+	movew	IMM (0),a0@
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+2:	bclr	IMM (31),d0
+	bra	1b
+
+|=============================================================================
+|                             __cmpsf2
+|=============================================================================
+
+GREATER =  1
+LESS    = -1
+EQUAL   =  0
+
+| int __cmpsf2_internal(float, float, int);
+SYM (__cmpsf2_internal):
+#ifndef __mcoldfire__
+	link	a6,IMM (0)
+	moveml	d2-d7,sp@- 	| save registers
+#else
+	link	a6,IMM (-24)
+	moveml	d2-d7,sp@
+#endif
+	moveq	IMM (COMPARE),d5
+	movel	a6@(8),d0	| get first operand
+	movel	a6@(12),d1	| get second operand
+| Check if either is NaN, and in that case return garbage and signal
+| INVALID_OPERATION. Check also if either is zero, and clear the signs
+| if necessary.
+	movel	d0,d6
+	andl	IMM (0x7fffffff),d0
+	beq	Lcmpsf$a$0
+	cmpl	IMM (0x7f800000),d0
+	bhi	Lcmpf$inop
+Lcmpsf$1:
+	movel	d1,d7
+	andl	IMM (0x7fffffff),d1
+	beq	Lcmpsf$b$0
+	cmpl	IMM (0x7f800000),d1
+	bhi	Lcmpf$inop
+Lcmpsf$2:
+| Check the signs
+	eorl	d6,d7
+	bpl	1f
+| If the signs are not equal check if a >= 0
+	tstl	d6
+	bpl	Lcmpsf$a$gt$b	| if (a >= 0 && b < 0) => a > b
+	bmi	Lcmpsf$b$gt$a	| if (a < 0 && b >= 0) => a < b
+1:
+| If the signs are equal check for < 0
+	tstl	d6
+	bpl	1f
+| If both are negative exchange them
+#ifndef __mcoldfire__
+	exg	d0,d1
+#else
+	movel	d0,d7
+	movel	d1,d0
+	movel	d7,d1
+#endif
+1:
+| Now that they are positive we just compare them as longs (does this also
+| work for denormalized numbers?).
+	cmpl	d0,d1
+	bhi	Lcmpsf$b$gt$a	| |b| > |a|
+	bne	Lcmpsf$a$gt$b	| |b| < |a|
+| If we got here a == b.
+	movel	IMM (EQUAL),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+#endif
+	unlk	a6
+	rts
+Lcmpsf$a$gt$b:
+	movel	IMM (GREATER),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+Lcmpsf$b$gt$a:
+	movel	IMM (LESS),d0
+#ifndef __mcoldfire__
+	moveml	sp@+,d2-d7 	| put back the registers
+#else
+	moveml	sp@,d2-d7
+	| XXX if frame pointer is ever removed, stack pointer must
+	| be adjusted here.
+#endif
+	unlk	a6
+	rts
+
+Lcmpsf$a$0:	
+	bclr	IMM (31),d6
+	bra	Lcmpsf$1
+Lcmpsf$b$0:
+	bclr	IMM (31),d7
+	bra	Lcmpsf$2
+
+Lcmpf$inop:
+	movl	a6@(16),d0
+	moveq	IMM (INEXACT_RESULT+INVALID_OPERATION),d7
+	moveq	IMM (SINGLE_FLOAT),d6
+	PICJUMP	$_exception_handler
+
+| int __cmpsf2(float, float);
+	FUNC(__cmpsf2)
+SYM (__cmpsf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+
+|=============================================================================
+|                           rounding routines
+|=============================================================================
+
+| The rounding routines expect the number to be normalized in registers
+| d0-d1, with the exponent in register d2. They assume that the 
+| exponent is larger or equal to 1. They return a properly normalized number
+| if possible, and a denormalized number otherwise. The exponent is returned
+| in d2.
+
+Lround$to$nearest:
+| We now normalize as suggested by D. Knuth ("Seminumerical Algorithms"):
+| Here we assume that the exponent is not too small (this should be checked
+| before entering the rounding routine), but the number could be denormalized.
+
+| Check for denormalized numbers:
+1:	btst	IMM (FLT_MANT_DIG),d0
+	bne	2f		| if set the number is normalized
+| Normalize shifting left until bit #FLT_MANT_DIG is set or the exponent 
+| is one (remember that a denormalized number corresponds to an 
+| exponent of -F_BIAS+1).
+#ifndef __mcoldfire__
+	cmpw	IMM (1),d2	| remember that the exponent is at least one
+#else
+	cmpl	IMM (1),d2	| remember that the exponent is at least one
+#endif
+ 	beq	2f		| an exponent of one means denormalized
+	addl	d1,d1		| else shift and adjust the exponent
+	addxl	d0,d0		|
+#ifndef __mcoldfire__
+	dbra	d2,1b		|
+#else
+	subql	IMM (1),d2
+	bpl	1b
+#endif
+2:
+| Now round: we do it as follows: after the shifting we can write the
+| fraction part as f + delta, where 1 < f < 2^25, and 0 <= delta <= 2.
+| If delta < 1, do nothing. If delta > 1, add 1 to f. 
+| If delta == 1, we make sure the rounded number will be even (odd?) 
+| (after shifting).
+	btst	IMM (0),d0	| is delta < 1?
+	beq	2f		| if so, do not do anything
+	tstl	d1		| is delta == 1?
+	bne	1f		| if so round to even
+	movel	d0,d1		| 
+	andl	IMM (2),d1	| bit 1 is the last significant bit
+	addl	d1,d0		| 
+	bra	2f		| 
+1:	movel	IMM (1),d1	| else add 1 
+	addl	d1,d0		|
+| Shift right once (because we used bit #FLT_MANT_DIG!).
+2:	lsrl	IMM (1),d0		
+| Now check again bit #FLT_MANT_DIG (rounding could have produced a
+| 'fraction overflow' ...).
+	btst	IMM (FLT_MANT_DIG),d0	
+	beq	1f
+	lsrl	IMM (1),d0
+#ifndef __mcoldfire__
+	addw	IMM (1),d2
+#else
+	addql	IMM (1),d2
+#endif
+1:
+| If bit #FLT_MANT_DIG-1 is clear we have a denormalized number, so we 
+| have to put the exponent to zero and return a denormalized number.
+	btst	IMM (FLT_MANT_DIG-1),d0
+	beq	1f
+	jmp	a0@
+1:	movel	IMM (0),d2
+	jmp	a0@
+
+Lround$to$zero:
+Lround$to$plus:
+Lround$to$minus:
+	jmp	a0@
+#endif /* L_float */
+
+| gcc expects the routines __eqdf2, __nedf2, __gtdf2, __gedf2,
+| __ledf2, __ltdf2 to all return the same value as a direct call to
+| __cmpdf2 would.  In this implementation, each of these routines
+| simply calls __cmpdf2.  It would be more efficient to give the
+| __cmpdf2 routine several names, but separating them out will make it
+| easier to write efficient versions of these routines someday.
+| If the operands recompare unordered unordered __gtdf2 and __gedf2 return -1.
+| The other routines return 1.
+
+#ifdef  L_eqdf2
+	.text
+	FUNC(__eqdf2)
+	.globl	SYM (__eqdf2)
+SYM (__eqdf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_eqdf2 */
+
+#ifdef  L_nedf2
+	.text
+	FUNC(__nedf2)
+	.globl	SYM (__nedf2)
+SYM (__nedf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_nedf2 */
+
+#ifdef  L_gtdf2
+	.text
+	FUNC(__gtdf2)
+	.globl	SYM (__gtdf2)
+SYM (__gtdf2):
+	link	a6,IMM (0)
+	pea	-1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_gtdf2 */
+
+#ifdef  L_gedf2
+	.text
+	FUNC(__gedf2)
+	.globl	SYM (__gedf2)
+SYM (__gedf2):
+	link	a6,IMM (0)
+	pea	-1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_gedf2 */
+
+#ifdef  L_ltdf2
+	.text
+	FUNC(__ltdf2)
+	.globl	SYM (__ltdf2)
+SYM (__ltdf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_ltdf2 */
+
+#ifdef  L_ledf2
+	.text
+	FUNC(__ledf2)
+	.globl	SYM (__ledf2)
+SYM (__ledf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(20),sp@-
+	movl	a6@(16),sp@-
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpdf2_internal)
+	unlk	a6
+	rts
+#endif /* L_ledf2 */
+
+| The comments above about __eqdf2, et. al., also apply to __eqsf2,
+| et. al., except that the latter call __cmpsf2 rather than __cmpdf2.
+
+#ifdef  L_eqsf2
+	.text
+	FUNC(__eqsf2)
+	.globl	SYM (__eqsf2)
+SYM (__eqsf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_eqsf2 */
+
+#ifdef  L_nesf2
+	.text
+	FUNC(__nesf2)
+	.globl	SYM (__nesf2)
+SYM (__nesf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_nesf2 */
+
+#ifdef  L_gtsf2
+	.text
+	FUNC(__gtsf2)
+	.globl	SYM (__gtsf2)
+SYM (__gtsf2):
+	link	a6,IMM (0)
+	pea	-1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_gtsf2 */
+
+#ifdef  L_gesf2
+	.text
+	FUNC(__gesf2)
+	.globl	SYM (__gesf2)
+SYM (__gesf2):
+	link	a6,IMM (0)
+	pea	-1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_gesf2 */
+
+#ifdef  L_ltsf2
+	.text
+	FUNC(__ltsf2)
+	.globl	SYM (__ltsf2)
+SYM (__ltsf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_ltsf2 */
+
+#ifdef  L_lesf2
+	.text
+	FUNC(__lesf2)
+	.globl	SYM (__lesf2)
+SYM (__lesf2):
+	link	a6,IMM (0)
+	pea	1
+	movl	a6@(12),sp@-
+	movl	a6@(8),sp@-
+	PICCALL	SYM (__cmpsf2_internal)
+	unlk	a6
+	rts
+#endif /* L_lesf2 */
+
+#if defined (__ELF__) && defined (__linux__)
+	/* Make stack non-executable for ELF linux targets.  */
+	.section	.note.GNU-stack,"",@progbits
+#endif
diff --git a/gcc-4.9/libgcc/config/m68k/linux-atomic.c b/gcc-4.9/libgcc/config/m68k/linux-atomic.c
new file mode 100644
index 000000000..99b0db7be
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/linux-atomic.c
@@ -0,0 +1,211 @@
+/* Linux-specific atomic operations for m68k Linux.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Based on code contributed by CodeSourcery for ARM EABI Linux.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Coldfire dropped the CAS instruction from the base M68K ISA.
+
+   GCC automatically issues a asm memory barrier when it encounters
+   a __sync_synchronize builtin.  Thus, we do not need to define this
+   builtin.
+
+   We implement byte, short and int versions of each atomic operation
+   using the kernel helper defined below.  There is no support for
+   64-bit operations yet.  */
+
+#include <asm/unistd.h>
+#include <stdbool.h>
+
+#ifndef __NR_atomic_cmpxchg_32
+#define __NR_atomic_cmpxchg_32  335
+#endif
+
+/* Kernel helper for compare-and-exchange a 32-bit value.  */
+static inline unsigned
+__kernel_cmpxchg (unsigned *mem, unsigned oldval, unsigned newval)
+{
+  register unsigned *a0 asm("a0") = mem;
+  register unsigned d2 asm("d2") = oldval;
+  register unsigned d1 asm("d1") = newval;
+  register unsigned d0 asm("d0") = __NR_atomic_cmpxchg_32;
+
+  asm volatile ("trap #0"
+		: "=r"(d0), "=r"(d1), "=r"(a0)
+		: "r"(d0), "r"(d1), "r"(d2), "r"(a0)
+		: "memory", "a1");
+
+  return d0;
+}
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+/* Big endian masks  */
+#define INVERT_MASK_1 24
+#define INVERT_MASK_2 16
+
+#define MASK_1 0xffu
+#define MASK_2 0xffffu
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+#define WORD_SYNC_OP(OP, PFX_OP, INF_OP, RETURN)			\
+  unsigned HIDDEN							\
+  NAME##_##RETURN (OP, 4) (unsigned *ptr, unsigned val)			\
+  {									\
+    unsigned oldval, newval, cmpval = *ptr;				\
+									\
+    do {								\
+      oldval = cmpval;							\
+      newval = PFX_OP (oldval INF_OP val);				\
+      cmpval = __kernel_cmpxchg (ptr, oldval, newval);			\
+    } while (__builtin_expect (oldval != cmpval, 0));			\
+									\
+    return RETURN;							\
+  }
+
+#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN)	\
+  TYPE HIDDEN								\
+  NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE sval)			\
+  {									\
+    unsigned *wordptr = (unsigned *) ((unsigned long) ptr & ~3);	\
+    unsigned int mask, shift, oldval, newval, cmpval, wval;		\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+    wval = (sval & MASK_##WIDTH) << shift;				\
+									\
+    cmpval = *wordptr;							\
+    do {								\
+      oldval = cmpval;							\
+      newval = PFX_OP (oldval INF_OP wval);				\
+      newval = (newval & mask) | (oldval & ~mask);			\
+      cmpval = __kernel_cmpxchg (wordptr, oldval, newval);		\
+    } while (__builtin_expect (oldval != cmpval, 0));			\
+									\
+    return (RETURN >> shift) & MASK_##WIDTH;				\
+  }
+
+WORD_SYNC_OP (add,   , +, oldval)
+WORD_SYNC_OP (sub,   , -, oldval)
+WORD_SYNC_OP (or,    , |, oldval)
+WORD_SYNC_OP (and,   , &, oldval)
+WORD_SYNC_OP (xor,   , ^, oldval)
+WORD_SYNC_OP (nand, ~, &, oldval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval)
+
+WORD_SYNC_OP (add,   , +, newval)
+WORD_SYNC_OP (sub,   , -, newval)
+WORD_SYNC_OP (or,    , |, newval)
+WORD_SYNC_OP (and,   , &, newval)
+WORD_SYNC_OP (xor,   , ^, newval)
+WORD_SYNC_OP (nand, ~, &, newval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval)
+
+unsigned HIDDEN
+__sync_val_compare_and_swap_4 (unsigned *ptr, unsigned oldval, unsigned newval)
+{
+  return __kernel_cmpxchg (ptr, oldval, newval);
+}
+
+bool HIDDEN
+__sync_bool_compare_and_swap_4 (unsigned *ptr, unsigned oldval,
+				unsigned newval)
+{
+  return __kernel_cmpxchg (ptr, oldval, newval) == oldval;
+}
+
+#define SUBWORD_VAL_CAS(TYPE, WIDTH)					\
+  TYPE HIDDEN								\
+  __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE soldval,		\
+				       TYPE snewval)			\
+  {									\
+    unsigned *wordptr = (unsigned *)((unsigned long) ptr & ~3);		\
+    unsigned int mask, shift, woldval, wnewval;				\
+    unsigned oldval, newval, cmpval;					\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+    woldval = (soldval & MASK_##WIDTH) << shift;			\
+    wnewval = (snewval & MASK_##WIDTH) << shift;			\
+    cmpval = *wordptr;							\
+									\
+    do {								\
+      oldval = cmpval;							\
+      if ((oldval & mask) != woldval)					\
+	break;								\
+      newval = (oldval & ~mask) | wnewval;				\
+      cmpval = __kernel_cmpxchg (wordptr, oldval, newval);		\
+    } while (__builtin_expect (oldval != cmpval, 0));			\
+									\
+    return (oldval >> shift) & MASK_##WIDTH;				\
+  }
+
+SUBWORD_VAL_CAS (unsigned short, 2)
+SUBWORD_VAL_CAS (unsigned char,  1)
+
+#define SUBWORD_BOOL_CAS(TYPE, WIDTH)					\
+  bool HIDDEN								\
+  __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+					TYPE newval)			\
+  {									\
+    return (__sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval)	\
+	    == oldval);							\
+  }
+
+SUBWORD_BOOL_CAS (unsigned short, 2)
+SUBWORD_BOOL_CAS (unsigned char,  1)
+
+#undef NAME_oldval
+#define NAME_oldval(OP, WIDTH) __sync_lock_##OP##_##WIDTH
+#define COMMA ,
+
+WORD_SYNC_OP (test_and_set, , COMMA, oldval)
+SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned short, 2, oldval)
diff --git a/gcc-4.9/libgcc/config/m68k/linux-unwind.h b/gcc-4.9/libgcc/config/m68k/linux-unwind.h
new file mode 100644
index 000000000..1ba2a0c43
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/linux-unwind.h
@@ -0,0 +1,158 @@
+/* DWARF2 EH unwinding support for Linux/m68k.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
+
+#include <signal.h>
+
+/* <sys/ucontext.h> is unfortunately broken right now.  */
+struct uw_ucontext {
+	unsigned long	  uc_flags;
+	struct ucontext  *uc_link;
+	stack_t		  uc_stack;
+	mcontext_t	  uc_mcontext;
+	unsigned long	  uc_filler[80];
+	__sigset_t	  uc_sigmask;
+};
+
+#define MD_FALLBACK_FRAME_STATE_FOR m68k_fallback_frame_state
+
+#ifdef __mcoldfire__
+#define M68K_FP_SIZE  8
+#else
+#define M68K_FP_SIZE  12
+#endif
+
+static _Unwind_Reason_Code
+m68k_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  unsigned short *pc = context->ra;
+  long cfa;
+
+  /* moveq #__NR_sigreturn,%d0; trap #0  */
+  if (pc[0] == 0x7077 && pc[1] == 0x4e40)
+    {
+      struct sigcontext *sc;
+
+      /* Context is passed as the 3rd argument.  */
+      sc = *(struct sigcontext **) (context->cfa + 8);
+
+      cfa = sc->sc_usp;
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = 15;
+      fs->regs.cfa_offset = cfa - (long) context->cfa;
+
+      fs->regs.reg[0].how = REG_SAVED_OFFSET;
+      fs->regs.reg[0].loc.offset = (long) &sc->sc_d0 - cfa;
+      fs->regs.reg[1].how = REG_SAVED_OFFSET;
+      fs->regs.reg[1].loc.offset = (long) &sc->sc_d1 - cfa;
+      fs->regs.reg[8].how = REG_SAVED_OFFSET;
+      fs->regs.reg[8].loc.offset = (long) &sc->sc_a0 - cfa;
+      fs->regs.reg[9].how = REG_SAVED_OFFSET;
+      fs->regs.reg[9].loc.offset = (long) &sc->sc_a1 - cfa;
+
+#ifdef __uClinux__
+      fs->regs.reg[13].how = REG_SAVED_OFFSET;
+      fs->regs.reg[13].loc.offset = (long) &sc->sc_a5 - cfa;
+#endif
+
+      fs->regs.reg[24].how = REG_SAVED_OFFSET;
+      fs->regs.reg[24].loc.offset = (long) &sc->sc_pc - cfa;
+
+#ifndef __uClinux__
+      if (*(int *) sc->sc_fpstate)
+	{
+	  int *fpregs = (int *) sc->sc_fpregs;
+
+	  fs->regs.reg[16].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[16].loc.offset = (long) &fpregs[0] - cfa;
+	  fs->regs.reg[17].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[17].loc.offset = (long) &fpregs[M68K_FP_SIZE/4] - cfa;
+	}
+#elif defined __mcffpu__
+# error Implement this when uClinux kernel is ported to an FPU architecture
+#endif
+    }
+#ifdef __mcoldfire__
+  /* move.l #__NR_rt_sigreturn,%d0; trap #0 */
+  else if (pc[0] == 0x203c && pc[1] == 0x0000 &&
+	   pc[2] == 0x00ad && pc[3] == 0x4e40)
+#else
+  /* moveq #~__NR_rt_sigreturn,%d0; not.b %d0; trap #0 */
+  else if (pc[0] == 0x7052 && pc[1] == 0x4600 && pc[2] == 0x4e40)
+#endif
+    {
+      struct uw_ucontext *uc;
+      greg_t *gregs;
+      int i;
+
+      /* Context is passed as the 3rd argument.  */
+      uc = *(struct uw_ucontext **) (context->cfa + 8);
+
+      gregs = uc->uc_mcontext.gregs;
+      cfa = gregs[15];
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = 15;
+      fs->regs.cfa_offset = cfa - (long) context->cfa;
+
+      /* register %d0-%d7/%a0-%a6  */
+      for (i = 0; i <= 14; i++)
+	{
+	  fs->regs.reg[i].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i].loc.offset = (long) &gregs[i] - cfa;
+	}
+
+      /* return address  */
+      fs->regs.reg[24].how = REG_SAVED_OFFSET;
+      fs->regs.reg[24].loc.offset = (long) &gregs[16] - cfa;
+
+#define uc_fpstate      uc_filler[0]
+
+      if (uc->uc_fpstate)
+	{
+	  long fpregs = (long) uc->uc_mcontext.fpregs.f_fpregs;
+
+	  /* register %fp0-%fp7  */
+	  for (i = 16; i <= 23; i++)
+	    {
+	      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+	      fs->regs.reg[i].loc.offset = fpregs - cfa;
+	      fpregs += M68K_FP_SIZE;
+	    }
+	}
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  fs->retaddr_column = 24;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+#endif /* ifdef inhibit_libc  */
diff --git a/gcc-4.9/libgcc/config/m68k/t-floatlib b/gcc-4.9/libgcc/config/m68k/t-floatlib
new file mode 100644
index 000000000..1ee8782d9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/t-floatlib
@@ -0,0 +1,11 @@
+LIB1ASMSRC = m68k/lb1sf68.S
+LIB1ASMFUNCS = _mulsi3 _udivsi3 _divsi3 _umodsi3 _modsi3 \
+   _double _float _floatex \
+   _eqdf2 _nedf2 _gtdf2 _gedf2 _ltdf2 _ledf2 \
+   _eqsf2 _nesf2 _gtsf2 _gesf2 _ltsf2 _lesf2
+
+LIB2ADD = $(srcdir)/config/m68k/fpgnulib.c xfgnulib.c
+
+xfgnulib.c: $(srcdir)/config/m68k/fpgnulib.c
+	echo '#define EXTFLOAT' > xfgnulib.c
+	cat $< >> xfgnulib.c
diff --git a/gcc-4.9/libgcc/config/m68k/t-linux b/gcc-4.9/libgcc/config/m68k/t-linux
new file mode 100644
index 000000000..06f0fe09f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/t-linux
@@ -0,0 +1 @@
+LIB2ADD_ST = $(srcdir)/config/m68k/linux-atomic.c
diff --git a/gcc-4.9/libgcc/config/m68k/t-slibgcc-elf-ver b/gcc-4.9/libgcc/config/m68k/t-slibgcc-elf-ver
new file mode 100644
index 000000000..6aac37cc0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/m68k/t-slibgcc-elf-ver
@@ -0,0 +1,3 @@
+# Bump the version number of the shared libgcc library
+
+SHLIB_SOVERSION = 2
diff --git a/gcc-4.9/libgcc/config/mcore/crti.S b/gcc-4.9/libgcc/config/mcore/crti.S
new file mode 100644
index 000000000..4b67933ef
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mcore/crti.S
@@ -0,0 +1,62 @@
+# crti.S for ELF based systems
+
+#   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+#   Written By David Vinayak Henkel-Wallace, June 1992
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+# This file just makes a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+	.section	".init"
+	.global	_init
+	.type	_init,@function
+	.align	4
+_init:
+	subi	r0, 16
+	st.w	r15, (r0, 12)
+
+	# These nops are here to align the end of this code with a 16 byte
+	# boundary.  The linker will start inserting code into the .init
+	# section at such a boundary.
+	
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+	
+	.section	".fini"
+	.global	_fini
+	.type	_fini,@function
+	.align	4
+_fini:
+	subi	r0, 16
+	st.w	r15, (r0, 12)
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
diff --git a/gcc-4.9/libgcc/config/mcore/crtn.S b/gcc-4.9/libgcc/config/mcore/crtn.S
new file mode 100644
index 000000000..87f350cfb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mcore/crtn.S
@@ -0,0 +1,44 @@
+# crtn.S for ELF based systems
+
+# Copyright (C) 1992-2014 Free Software Foundation, Inc.
+# Written By David Vinayak Henkel-Wallace, June 1992
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	.section	".init"
+	.align		4
+
+        ldw     r15,(r0, 12)
+        addi    r0,16
+        jmp     r15
+	
+	.section	".fini"
+	.align		4
+
+        ldw     r15, (r0, 12)
+        addi    r0,16
+        jmp     r15
+
+# Th-th-th-that is all folks!
+
diff --git a/gcc-4.9/libgcc/config/mcore/lib1funcs.S b/gcc-4.9/libgcc/config/mcore/lib1funcs.S
new file mode 100644
index 000000000..8f486caf6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mcore/lib1funcs.S
@@ -0,0 +1,303 @@
+/* libgcc routines for the MCore.
+   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__, x)
+
+#ifdef __ELF__
+#define TYPE(x) .type SYM (x),@function
+#define SIZE(x) .size SYM (x), . - SYM (x)
+#else
+#define TYPE(x)
+#define SIZE(x)
+#endif
+
+.macro FUNC_START name
+	.text
+	.globl SYM (\name)
+	TYPE (\name)
+SYM (\name):
+.endm
+
+.macro FUNC_END name
+	SIZE (\name)
+.endm
+
+#ifdef	L_udivsi3
+FUNC_START udiv32
+FUNC_START udivsi32
+
+	movi	r1,0		// r1-r2 form 64 bit dividend
+	movi	r4,1		// r4 is quotient (1 for a sentinel)
+
+	cmpnei	r3,0		// look for 0 divisor
+	bt	9f
+	trap	3		// divide by 0
+9:
+	// control iterations; skip across high order 0 bits in dividend
+	mov	r7,r2
+	cmpnei	r7,0
+	bt	8f
+	movi	r2,0		// 0 dividend
+	jmp	r15		// quick return
+8:
+	ff1	r7		// figure distance to skip
+	lsl	r4,r7		// move the sentinel along (with 0's behind)
+	lsl	r2,r7		// and the low 32 bits of numerator
+
+// appears to be wrong...
+// tested out incorrectly in our OS work...
+//	mov	r7,r3		// looking at divisor
+//	ff1	r7		// I can move 32-r7 more bits to left.
+//	addi	r7,1		// ok, one short of that...
+//	mov	r1,r2
+//	lsr	r1,r7		// bits that came from low order...
+//	rsubi	r7,31		// r7 == "32-n" == LEFT distance
+//	addi	r7,1		// this is (32-n)
+//	lsl	r4,r7		// fixes the high 32 (quotient)
+//	lsl	r2,r7
+//	cmpnei	r4,0
+//	bf	4f		// the sentinel went away...
+
+	// run the remaining bits
+
+1:	lslc	r2,1		// 1 bit left shift of r1-r2
+	addc	r1,r1
+	cmphs	r1,r3		// upper 32 of dividend >= divisor?
+	bf	2f
+	sub	r1,r3		// if yes, subtract divisor
+2:	addc	r4,r4		// shift by 1 and count subtracts
+	bf	1b		// if sentinel falls out of quotient, stop
+
+4:	mov	r2,r4		// return quotient
+	mov	r3,r1		// and piggyback the remainder
+	jmp	r15
+FUNC_END udiv32
+FUNC_END udivsi32
+#endif
+
+#ifdef	L_umodsi3
+FUNC_START urem32
+FUNC_START umodsi3
+	movi	r1,0		// r1-r2 form 64 bit dividend
+	movi	r4,1		// r4 is quotient (1 for a sentinel)
+	cmpnei	r3,0		// look for 0 divisor
+	bt	9f
+	trap	3		// divide by 0
+9:
+	// control iterations; skip across high order 0 bits in dividend
+	mov	r7,r2
+	cmpnei	r7,0
+	bt	8f
+	movi	r2,0		// 0 dividend
+	jmp	r15		// quick return
+8:
+	ff1	r7		// figure distance to skip
+	lsl	r4,r7		// move the sentinel along (with 0's behind)
+	lsl	r2,r7		// and the low 32 bits of numerator
+
+1:	lslc	r2,1		// 1 bit left shift of r1-r2
+	addc	r1,r1
+	cmphs	r1,r3		// upper 32 of dividend >= divisor?
+	bf	2f
+	sub	r1,r3		// if yes, subtract divisor
+2:	addc	r4,r4		// shift by 1 and count subtracts
+	bf	1b		// if sentinel falls out of quotient, stop
+	mov	r2,r1		// return remainder
+	jmp	r15
+FUNC_END urem32
+FUNC_END umodsi3
+#endif
+
+#ifdef	L_divsi3
+FUNC_START div32
+FUNC_START divsi3
+	mov	r5,r2		// calc sign of quotient
+	xor	r5,r3
+	abs	r2		// do unsigned divide
+	abs	r3
+	movi	r1,0		// r1-r2 form 64 bit dividend
+	movi	r4,1		// r4 is quotient (1 for a sentinel)
+	cmpnei	r3,0		// look for 0 divisor
+	bt	9f
+	trap	3		// divide by 0
+9:
+	// control iterations; skip across high order 0 bits in dividend
+	mov	r7,r2
+	cmpnei	r7,0
+	bt	8f
+	movi	r2,0		// 0 dividend
+	jmp	r15		// quick return
+8:
+	ff1	r7		// figure distance to skip
+	lsl	r4,r7		// move the sentinel along (with 0's behind)
+	lsl	r2,r7		// and the low 32 bits of numerator
+
+// tested out incorrectly in our OS work...
+//	mov	r7,r3		// looking at divisor
+//	ff1	r7		// I can move 32-r7 more bits to left.
+//	addi	r7,1		// ok, one short of that...
+//	mov	r1,r2
+//	lsr	r1,r7		// bits that came from low order...
+//	rsubi	r7,31		// r7 == "32-n" == LEFT distance
+//	addi	r7,1		// this is (32-n)
+//	lsl	r4,r7		// fixes the high 32 (quotient)
+//	lsl	r2,r7
+//	cmpnei	r4,0
+//	bf	4f		// the sentinel went away...
+
+	// run the remaining bits
+1:	lslc	r2,1		// 1 bit left shift of r1-r2
+	addc	r1,r1
+	cmphs	r1,r3		// upper 32 of dividend >= divisor?
+	bf	2f
+	sub	r1,r3		// if yes, subtract divisor
+2:	addc	r4,r4		// shift by 1 and count subtracts
+	bf	1b		// if sentinel falls out of quotient, stop
+
+4:	mov	r2,r4		// return quotient
+	mov	r3,r1		// piggyback the remainder
+	btsti	r5,31		// after adjusting for sign
+	bf	3f
+	rsubi	r2,0
+	rsubi	r3,0
+3:	jmp	r15
+FUNC_END div32
+FUNC_END divsi3
+#endif
+
+#ifdef	L_modsi3
+FUNC_START rem32
+FUNC_START modsi3
+	mov	r5,r2		// calc sign of remainder
+	abs	r2		// do unsigned divide
+	abs	r3
+	movi	r1,0		// r1-r2 form 64 bit dividend
+	movi	r4,1		// r4 is quotient (1 for a sentinel)
+	cmpnei	r3,0		// look for 0 divisor
+	bt	9f
+	trap	3		// divide by 0
+9: 
+	// control iterations; skip across high order 0 bits in dividend
+	mov	r7,r2
+	cmpnei	r7,0
+	bt	8f
+	movi	r2,0		// 0 dividend
+	jmp	r15		// quick return
+8:
+	ff1	r7		// figure distance to skip
+	lsl	r4,r7		// move the sentinel along (with 0's behind)
+	lsl	r2,r7		// and the low 32 bits of numerator
+
+1:	lslc	r2,1		// 1 bit left shift of r1-r2
+	addc	r1,r1
+	cmphs	r1,r3		// upper 32 of dividend >= divisor?
+	bf	2f
+	sub	r1,r3		// if yes, subtract divisor
+2:	addc	r4,r4		// shift by 1 and count subtracts
+	bf	1b		// if sentinel falls out of quotient, stop
+	mov	r2,r1		// return remainder
+	btsti	r5,31		// after adjusting for sign
+	bf	3f
+	rsubi	r2,0
+3:	jmp	r15
+FUNC_END rem32
+FUNC_END modsi3
+#endif
+
+
+/* GCC expects that {__eq,__ne,__gt,__ge,__le,__lt}{df2,sf2}
+   will behave as __cmpdf2. So, we stub the implementations to
+   jump on to __cmpdf2 and __cmpsf2.
+ 
+   All of these shortcircuit the return path so that __cmp{sd}f2
+   will go directly back to the caller.  */
+
+.macro  COMPARE_DF_JUMP name
+	.import SYM (cmpdf2)
+FUNC_START \name
+	jmpi SYM (cmpdf2)
+FUNC_END \name
+.endm
+		
+#ifdef  L_eqdf2
+COMPARE_DF_JUMP eqdf2
+#endif /* L_eqdf2 */
+
+#ifdef  L_nedf2
+COMPARE_DF_JUMP nedf2
+#endif /* L_nedf2 */
+
+#ifdef  L_gtdf2
+COMPARE_DF_JUMP gtdf2
+#endif /* L_gtdf2 */
+
+#ifdef  L_gedf2
+COMPARE_DF_JUMP gedf2
+#endif /* L_gedf2 */
+
+#ifdef  L_ltdf2
+COMPARE_DF_JUMP ltdf2
+#endif /* L_ltdf2 */
+	
+#ifdef  L_ledf2
+COMPARE_DF_JUMP ledf2
+#endif /* L_ledf2 */
+
+/* SINGLE PRECISION FLOATING POINT STUBS */
+
+.macro  COMPARE_SF_JUMP name
+	.import SYM (cmpsf2)
+FUNC_START \name
+	jmpi SYM (cmpsf2)
+FUNC_END \name
+.endm
+		
+#ifdef  L_eqsf2
+COMPARE_SF_JUMP eqsf2
+#endif /* L_eqsf2 */
+	
+#ifdef  L_nesf2
+COMPARE_SF_JUMP nesf2
+#endif /* L_nesf2 */
+	
+#ifdef  L_gtsf2
+COMPARE_SF_JUMP gtsf2
+#endif /* L_gtsf2 */
+	
+#ifdef  L_gesf2
+COMPARE_SF_JUMP __gesf2
+#endif /* L_gesf2 */
+	
+#ifdef  L_ltsf2
+COMPARE_SF_JUMP __ltsf2
+#endif /* L_ltsf2 */
+	
+#ifdef  L_lesf2
+COMPARE_SF_JUMP lesf2
+#endif /* L_lesf2 */
diff --git a/gcc-4.9/libgcc/config/mcore/t-mcore b/gcc-4.9/libgcc/config/mcore/t-mcore
new file mode 100644
index 000000000..8268a17e7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mcore/t-mcore
@@ -0,0 +1,5 @@
+LIB1ASMSRC    = mcore/lib1funcs.S
+LIB1ASMFUNCS  = _divsi3 _udivsi3 _modsi3 _umodsi3
+
+# could use -msifilter to be safe from interrupt/jmp interactions and others.
+HOST_LIBGCC2_CFLAGS += -O3 -DNO_FLOATLIB_FIXUNSDFSI #-msifilter
diff --git a/gcc-4.9/libgcc/config/mep/lib1funcs.S b/gcc-4.9/libgcc/config/mep/lib1funcs.S
new file mode 100644
index 000000000..56fc1840f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mep/lib1funcs.S
@@ -0,0 +1,125 @@
+/* libgcc routines for Toshiba Media Processor.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3 of the License, or (at your
+option) any later version.
+  
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+  
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define SAVEALL \
+	add3	$sp, $sp, -16*4 ; \
+	sw	$0, ($sp) ; \
+	sw	$1, 4($sp) ; \
+	sw	$2, 8($sp) ; \
+	sw	$3, 12($sp) ; \
+	sw	$4, 16($sp) ; \
+	sw	$5, 20($sp) ; \
+	sw	$6, 24($sp) ; \
+	sw	$7, 28($sp) ; \
+	sw	$8, 32($sp) ; \
+	sw	$9, 36($sp) ; \
+	sw	$10, 40($sp) ; \
+	sw	$11, 44($sp) ; \
+	sw	$12, 48($sp) ; \
+	sw	$13, 52($sp) ; \
+	sw	$14, 56($sp) ; \
+	ldc	$5, $lp	; \
+	add	$5, 3 ; \
+	mov	$6, -4 ; \
+	and	$5, $6
+
+#define RESTOREALL \
+	stc	$5, $lp ; \
+	lw	$14, 56($sp) ; \
+	lw	$13, 52($sp) ; \
+	lw	$12, 48($sp) ; \
+	lw	$11, 44($sp) ; \
+	lw	$10, 40($sp) ; \
+	lw	$9, 36($sp) ; \
+	lw	$8, 32($sp) ; \
+	lw	$7, 28($sp) ; \
+	lw	$6, 24($sp) ; \
+	lw	$5, 20($sp) ; \
+	lw	$4, 16($sp) ; \
+	lw	$3, 12($sp) ; \
+	lw	$2, 8($sp) ; \
+	lw	$1, 4($sp) ; \
+	lw	$0, ($sp) ; \
+	add3	$sp, $sp, 16*4 ; \
+	ret
+
+#ifdef L_mep_profile
+	.text
+	.global __mep_mcount
+__mep_mcount:
+	SAVEALL
+	ldc	$1, $lp
+	mov	$2, $0
+	bsr	__mep_mcount_2
+	RESTOREALL
+#endif
+
+#ifdef L_mep_bb_init_trace
+	.text
+	.global __mep_bb_init_trace_func
+__mep_bb_init_trace_func:
+	SAVEALL
+	lw	$1, ($5)
+	lw	$2, 4($5)
+	add	$5, 8
+	bsr	__bb_init_trace_func
+	RESTOREALL
+#endif
+
+#ifdef L_mep_bb_init
+	.text
+	.global __mep_bb_init_func
+__mep_bb_init_func:
+	SAVEALL
+	lw	$1, ($5)
+	add	$5, 4
+	bsr	__bb_init_func
+	RESTOREALL
+#endif
+
+#ifdef L_mep_bb_trace
+	.text
+	.global __mep_bb_trace_func
+__mep_bb_trace_func:
+	SAVEALL
+	movu	$3, __bb
+	lw	$1, ($5)
+	sw	$1, ($3)
+	lw	$2, 4($5)
+	sw	$2, 4($3)
+	add	$5, 8
+	bsr	__bb_trace_func
+	RESTOREALL
+#endif
+
+#ifdef L_mep_bb_increment
+	.text
+	.global __mep_bb_increment_func
+__mep_bb_increment_func:
+	SAVEALL
+	lw	$1, ($5)
+	lw	$0, ($1)
+	add	$0, 1
+	sw	$0, ($1)
+	add	$5, 4
+	RESTOREALL
+#endif
diff --git a/gcc-4.9/libgcc/config/mep/lib2funcs.c b/gcc-4.9/libgcc/config/mep/lib2funcs.c
new file mode 100644
index 000000000..3be913219
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mep/lib2funcs.c
@@ -0,0 +1,139 @@
+/* libgcc routines for MeP.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3 of the License, or (at your
+option) any later version.
+  
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+  
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef		 int SItype		__attribute__ ((mode (SI)));
+typedef unsigned int USItype		__attribute__ ((mode (SI)));
+
+typedef int word_type			__attribute__ ((mode (__word__)));
+
+USItype
+__mulsi3 (USItype a, USItype b)
+{
+  USItype c = 0;
+
+  while (a != 0)
+    {
+      if (a & 1)
+	c += b;
+      a >>= 1;
+      b <<= 1;
+    }
+
+  return c;
+}
+
+
+
+USItype
+udivmodsi4(USItype num, USItype den, word_type modwanted)
+{
+  USItype bit = 1;
+  USItype res = 0;
+
+  while (den < num && bit && !(den & (1L<<31)))
+    {
+      den <<=1;
+      bit <<=1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>=1;
+      den >>=1;
+    }
+  if (modwanted) return num;
+  return res;
+}
+
+
+
+SItype
+__divsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodsi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+
+SItype
+__modsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodsi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+
+
+SItype
+__udivsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 0);
+}
+
+
+
+SItype
+__umodsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 1);
+}
diff --git a/gcc-4.9/libgcc/config/mep/t-mep b/gcc-4.9/libgcc/config/mep/t-mep
new file mode 100644
index 000000000..fb3a0d60c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mep/t-mep
@@ -0,0 +1,16 @@
+# profiling support
+LIB1ASMSRC = mep/lib1funcs.S
+
+LIB1ASMFUNCS = _mep_profile \
+	       _mep_bb_init_trace \
+	       _mep_bb_init \
+	       _mep_bb_trace \
+	       _mep_bb_increment
+
+# multiply and divide routines
+LIB2ADD = \
+	$(srcdir)/config/mep/lib2funcs.c \
+	$(srcdir)/config/mep/tramp.c
+
+# Use -O0 instead of -O2 so we don't get complex relocations
+CRTSTUFF_CFLAGS += -O0
diff --git a/gcc-4.9/libgcc/config/mep/tramp.c b/gcc-4.9/libgcc/config/mep/tramp.c
new file mode 100644
index 000000000..4b294c6df
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mep/tramp.c
@@ -0,0 +1,103 @@
+/* Trampoline support for MeP
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3 of the License, or (at your
+option) any later version.
+  
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+  
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+  7a0a		ldc $10,$pc
+  c0ae000a	lw $0,10($10)
+  caae000e	lw $10,14($10)
+  10ae		jmp $10
+  00000000	static chain
+  00000000	function address
+*/
+
+static inline int
+cache_config_register(void) {
+  int rv;
+  asm ("ldc\t%0, $ccfg" : "=r" (rv));
+  return rv;
+}
+
+#define ICACHE_SIZE ((cache_config_register() >> 16) & 0x7f)
+#define DCACHE_SIZE (cache_config_register() & 0x7f)
+
+#define ICACHE_DATA_BASE 0x00300000
+#define ICACHE_TAG_BASE  0x00310000
+#define DCACHE_DATA_BASE 0x00320000
+#define DCACHE_TAG_BASE  0x00330000
+
+static inline void
+flush_dcache (int addr)
+{
+  asm volatile ("cache\t0, (%0)" : : "r" (addr));
+}
+
+void
+__mep_trampoline_helper (unsigned long *tramp,
+			 int function_address,
+			 int static_chain);
+
+void
+__mep_trampoline_helper (unsigned long *tramp,
+			 int function_address,
+			 int static_chain)
+{
+  int dsize, isize;
+
+#ifdef __LITTLE_ENDIAN__
+  tramp[0] = 0xc0ae7a0a;
+  tramp[1] = 0xcaae000a;
+  tramp[2] = 0x10ae000e;
+#else
+  tramp[0] = 0x7a0ac0ae;
+  tramp[1] = 0x000acaae;
+  tramp[2] = 0x000e10ae;
+#endif
+  tramp[3] = static_chain;
+  tramp[4] = function_address;
+
+  dsize = DCACHE_SIZE;
+  isize = ICACHE_SIZE;
+
+  if (dsize)
+    {
+      flush_dcache ((int)tramp);
+      flush_dcache ((int)tramp+16);
+    }
+
+  if (isize)
+    {
+      int imask = (isize * 1024) - 1;
+      int tmask = ~imask;
+      unsigned int i;
+      volatile unsigned int *tags;
+
+      imask &= 0xffe0;
+
+      for (i=(unsigned int)tramp; i<(unsigned int)tramp+20; i+=16)
+	{
+	  tags = (unsigned int *)(ICACHE_TAG_BASE + (i & imask));
+	  if ((*tags & tmask) == (i & tmask))
+	    *tags &= ~1;
+	}
+    }
+}
diff --git a/gcc-4.9/libgcc/config/microblaze/crti.S b/gcc-4.9/libgcc/config/microblaze/crti.S
new file mode 100644
index 000000000..68328b172
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/crti.S
@@ -0,0 +1,49 @@
+/* crti.s for __init, __fini
+   This file supplies the prologue for __init and __fini routines 
+
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   Contributed by Michael Eager <eager@eagercon.com>.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+ 
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+    .section .init, "ax"
+    .global __init
+
+    .weak _stack
+    .set  _stack, 0xffffffff
+    .weak _stack_end
+    .set  _stack_end, 0
+
+    .align 2
+__init: 
+    addik   r1, r1, -8
+    sw      r15, r0, r1
+    la      r11, r0, _stack
+    mts     rshr, r11
+    la      r11, r0, _stack_end
+    mts     rslr, r11
+
+    .section .fini, "ax"
+    .global __fini
+    .align 2
+__fini: 
+    addik   r1, r1, -8
+    sw      r15, r0, r1
diff --git a/gcc-4.9/libgcc/config/microblaze/crtn.S b/gcc-4.9/libgcc/config/microblaze/crtn.S
new file mode 100644
index 000000000..5f26d8e45
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/crtn.S
@@ -0,0 +1,35 @@
+/* crtn.s for __init, __fini
+   This file supplies the epilogue for __init and __fini routines 
+
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   Contributed by Michael Eager <eager@eagercon.com>.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+ 
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+    .section .init, "ax"
+    lw      r15, r0, r1
+    rtsd    r15, 8 
+    addik   r1, r1, 8
+
+    .section .fini, "ax"
+    lw      r15, r0, r1
+    rtsd    r15, 8 
+    addik   r1, r1, 8    
diff --git a/gcc-4.9/libgcc/config/microblaze/divsi3.S b/gcc-4.9/libgcc/config/microblaze/divsi3.S
new file mode 100644
index 000000000..0f918255d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/divsi3.S
@@ -0,0 +1,96 @@
+###################################-
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+#
+#  divsi3.S
+# 
+#  Divide operation for 32 bit integers.
+#	Input :	Dividend in Reg r5
+#		Divisor in Reg r6
+#	Output: Result in Reg r3
+# 
+#######################################
+	
+	.globl	__divsi3
+	.ent	__divsi3
+	.type	__divsi3,@function
+__divsi3:
+	.frame	r1,0,r15	
+
+	ADDIK   r1,r1,-16
+	SWI     r28,r1,0
+	SWI     r29,r1,4
+	SWI     r30,r1,8
+	SWI     r31,r1,12
+
+	BEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
+	BEQI    r5,$LaResult_Is_Zero    # Result is Zero 
+	BGEID   r5,$LaR5_Pos 
+	XOR     r28,r5,r6               # Get the sign of the result
+	RSUBI   r5,r5,0                 # Make r5 positive
+$LaR5_Pos:
+	BGEI    r6,$LaR6_Pos
+	RSUBI   r6,r6,0                 # Make r6 positive
+$LaR6_Pos:
+	ADDIK   r30,r0,0                # Clear mod
+	ADDIK   r3,r0,0                 # clear div
+	ADDIK   r29,r0,32               # Initialize the loop count
+
+        # First part try to find the first '1' in the r5
+$LaDIV0: 
+        BLTI    r5,$LaDIV2              # This traps r5 == 0x80000000 
+$LaDIV1:
+	ADD     r5,r5,r5                # left shift logical r5
+	BGTID   r5,$LaDIV1       
+	ADDIK   r29,r29,-1
+$LaDIV2:
+	ADD     r5,r5,r5                # left shift logical  r5 get the '1' into the Carry
+	ADDC    r30,r30,r30             # Move that bit into the Mod register
+	RSUB    r31,r6,r30              # Try to subtract (r30 a r6)
+	BLTI    r31,$LaMOD_TOO_SMALL
+	OR      r30,r0,r31              # Move the r31 to mod since the result was positive
+	ADDIK   r3,r3,1
+$LaMOD_TOO_SMALL:
+	ADDIK   r29,r29,-1
+	BEQi    r29,$LaLOOP_END
+	ADD     r3,r3,r3                # Shift in the '1' into div
+	BRI     $LaDIV2                 # Div2
+$LaLOOP_END:
+	BGEI    r28,$LaRETURN_HERE
+	BRID    $LaRETURN_HERE
+	RSUBI   r3,r3,0                 # Negate the result
+$LaDiv_By_Zero:
+$LaResult_Is_Zero:
+	OR      r3,r0,r0 # set result to 0
+$LaRETURN_HERE:
+# Restore values of CSRs and that of r3 and the divisor and the dividend
+	LWI     r28,r1,0
+	LWI     r29,r1,4
+	LWI     r30,r1,8
+	LWI     r31,r1,12
+	RTSD    r15,8
+	ADDIK   r1,r1,16
+.end __divsi3
+	.size	__divsi3, . - __divsi3
+
diff --git a/gcc-4.9/libgcc/config/microblaze/divsi3_table.c b/gcc-4.9/libgcc/config/microblaze/divsi3_table.c
new file mode 100644
index 000000000..4201e9290
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/divsi3_table.c
@@ -0,0 +1,62 @@
+/*  Table for software lookup divide for Xilinx MicroBlaze.
+ 
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+   Contributed by Michael Eager <eager@eagercon.com>.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+ 
+unsigned char _divsi3_table[] =
+{
+       0,   0/1,   0/2,   0/3,   0/4,   0/5,   0/6,   0/7, 
+     0/8,   0/9,  0/10,  0/11,  0/12,  0/13,  0/14,  0/15,
+       0,   1/1,   1/2,   1/3,   1/4,   1/5,   1/6,   1/7, 
+     1/8,   1/9,  1/10,  1/11,  1/12,  1/13,  1/14,  1/15,
+       0,   2/1,   2/2,   2/3,   2/4,   2/5,   2/6,   2/7, 
+     2/8,   2/9,  2/10,  2/11,  2/12,  2/13,  2/14,  2/15,
+       0,   3/1,   3/2,   3/3,   3/4,   3/5,   3/6,   3/7, 
+     3/8,   3/9,  3/10,  3/11,  3/12,  3/13,  3/14,  3/15,
+       0,   4/1,   4/2,   4/3,   4/4,   4/5,   4/6,   4/7, 
+     4/8,   4/9,  4/10,  4/11,  4/12,  4/13,  4/14,  4/15,
+       0,   5/1,   5/2,   5/3,   5/4,   5/5,   5/6,   5/7, 
+     5/8,   5/9,  5/10,  5/11,  5/12,  5/13,  5/14,  5/15,
+       0,   6/1,   6/2,   6/3,   6/4,   6/5,   6/6,   6/7, 
+     6/8,   6/9,  6/10,  6/11,  6/12,  6/13,  6/14,  6/15,
+       0,   7/1,   7/2,   7/3,   7/4,   7/5,   7/6,   7/7, 
+     7/8,   7/9,  7/10,  7/11,  7/12,  7/13,  7/14,  7/15,
+       0,   8/1,   8/2,   8/3,   8/4,   8/5,   8/6,   8/7, 
+     8/8,   8/9,  8/10,  8/11,  8/12,  8/13,  8/14,  8/15,
+       0,   9/1,   9/2,   9/3,   9/4,   9/5,   9/6,   9/7, 
+     9/8,   9/9,  9/10,  9/11,  9/12,  9/13,  9/14,  9/15,
+       0,  10/1,  10/2,  10/3,  10/4,  10/5,  10/6,  10/7, 
+    10/8,  10/9, 10/10, 10/11, 10/12, 10/13, 10/14, 10/15,
+       0,  11/1,  11/2,  11/3,  11/4,  11/5,  11/6,  11/7, 
+    11/8,  11/9, 11/10, 11/11, 11/12, 11/13, 11/14, 11/15,
+       0,  12/1,  12/2,  12/3,  12/4,  12/5,  12/6,  12/7, 
+    12/8,  12/9, 12/10, 12/11, 12/12, 12/13, 12/14, 12/15,
+       0,  13/1,  13/2,  13/3,  13/4,  13/5,  13/6,  13/7, 
+    13/8,  13/9, 13/10, 13/11, 13/12, 13/13, 13/14, 13/15,
+       0,  14/1,  14/2,  14/3,  14/4,  14/5,  14/6,  14/7, 
+    14/8,  14/9, 14/10, 14/11, 14/12, 14/13, 14/14, 14/15,
+       0,  15/1,  15/2,  15/3,  15/4,  15/5,  15/6,  15/7, 
+    15/8,  15/9, 15/10, 15/11, 15/12, 15/13, 15/14, 15/15,
+};
+
diff --git a/gcc-4.9/libgcc/config/microblaze/moddi3.S b/gcc-4.9/libgcc/config/microblaze/moddi3.S
new file mode 100644
index 000000000..6c7bf5d76
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/moddi3.S
@@ -0,0 +1,115 @@
+###################################
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+#
+#  modsi3.S
+# 
+#  modulo operation for 64 bit integers.
+# 
+#######################################
+
+
+	.globl	__moddi3
+	.ent	__moddi3
+__moddi3:
+	.frame	r1,0,r15	
+
+#Change the stack pointer value and Save callee saved regs
+	addik	r1,r1,-24
+	swi	r25,r1,0
+	swi	r26,r1,4
+	swi	r27,r1,8	# used for sign
+	swi	r28,r1,12	# used for loop count
+	swi	r29,r1,16	# Used for div value High
+	swi	r30,r1,20	# Used for div value Low
+
+#Check for Zero Value in the divisor/dividend
+	OR	r9,r5,r6			# Check for the op1 being zero
+	BEQID	r9,$LaResult_Is_Zero		# Result is zero
+	OR	r9,r7,r8			# Check for the dividend being zero
+	BEQI	r9,$LaDiv_By_Zero	        # Div_by_Zero   # Division Error
+	BGEId	r5,$La1_Pos 
+	XOR	r27,r5,r7			# Get the sign of the result
+	RSUBI	r6,r6,0				# Make dividend positive
+	RSUBIC	r5,r5,0				# Make dividend positive
+$La1_Pos:
+	BGEI	r7,$La2_Pos
+	RSUBI	r8,r8,0				# Make Divisor Positive
+	RSUBIC	r9,r9,0				# Make Divisor Positive
+$La2_Pos:
+	ADDIK	r4,r0,0				# Clear mod low
+	ADDIK	r3,r0,0                	        # Clear mod high
+	ADDIK	r29,r0,0			# clear div high
+	ADDIK	r30,r0,0			# clear div low
+	ADDIK	r28,r0,64			# Initialize the loop count
+   # First part try to find the first '1' in the r5/r6
+$LaDIV1:
+	ADD	r6,r6,r6
+	ADDC	r5,r5,r5			# left shift logical r5
+	BGEID	r5,$LaDIV1			
+	ADDIK	r28,r28,-1
+$LaDIV2:
+	ADD	r6,r6,r6
+	ADDC	r5,r5,r5	# left shift logical r5/r6 get the '1' into the Carry
+	ADDC	r4,r4,r4	# Move that bit into the Mod register
+	ADDC	r3,r3,r3	# Move carry into high mod register
+	rsub	r18,r7,r3	# Compare the High Parts of Mod and Divisor
+	bnei	r18,$L_High_EQ
+	rsub	r18,r6,r4	# Compare Low Parts only if Mod[h] == Divisor[h]
+$L_High_EQ:	
+	rSUB	r26,r8,r4	# Subtract divisor[L] from Mod[L]
+	rsubc	r25,r7,r3	# Subtract divisor[H] from Mod[H]
+	BLTi	r25,$LaMOD_TOO_SMALL
+	OR	r3,r0,r25	# move r25 to mod [h]
+	OR	r4,r0,r26	# move r26 to mod [l]
+	ADDI	r30,r30,1
+	ADDC	r29,r29,r0
+$LaMOD_TOO_SMALL:
+	ADDIK	r28,r28,-1
+	BEQi	r28,$LaLOOP_END
+	ADD	r30,r30,r30		# Shift in the '1' into div [low]
+	ADDC	r29,r29,r29		# Move the carry generated into high
+	BRI	$LaDIV2   # Div2
+$LaLOOP_END:
+	BGEI	r27,$LaRETURN_HERE
+	rsubi	r30,r30,0
+	rsubc	r29,r29,r0
+	BRI	$LaRETURN_HERE
+$LaDiv_By_Zero:
+$LaResult_Is_Zero:
+	or	r29,r0,r0	# set result to 0 [High]
+	or	r30,r0,r0	# set result to 0 [Low]
+$LaRETURN_HERE:
+# Restore values of CSRs and that of r29 and the divisor and the dividend
+	
+	lwi	r25,r1,0
+	lwi	r26,r1,4
+	lwi	r27,r1,8
+	lwi	r28,r1,12
+	lwi	r29,r1,16
+	lwi	r30,r1,20
+	rtsd	r15,8
+	addik r1,r1,24
+        .end __moddi3
+	
diff --git a/gcc-4.9/libgcc/config/microblaze/modsi3.S b/gcc-4.9/libgcc/config/microblaze/modsi3.S
new file mode 100644
index 000000000..73951eccf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/modsi3.S
@@ -0,0 +1,95 @@
+###################################
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+# 
+#  modsi3.S
+# 
+#  modulo operation for 32 bit integers.
+#	Input :	op1 in Reg r5
+#		op2 in Reg r6
+#	Output: op1 mod op2 in Reg r3
+# 
+#######################################
+
+	.globl	__modsi3
+	.ent	__modsi3
+	.type	__modsi3,@function
+__modsi3:
+	.frame	r1,0,r15	
+
+	addik	r1,r1,-16
+	swi	r28,r1,0
+	swi	r29,r1,4
+	swi	r30,r1,8
+	swi	r31,r1,12
+
+	BEQI	r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
+	BEQI	r5,$LaResult_Is_Zero    # Result is Zero 
+	BGEId	r5,$LaR5_Pos 
+	ADD	r28,r5,r0               # Get the sign of the result [ Depends only on the first arg]
+	RSUBI	r5,r5,0	                # Make r5 positive
+$LaR5_Pos:
+	BGEI	r6,$LaR6_Pos
+	RSUBI	r6,r6,0	    # Make r6 positive
+$LaR6_Pos:
+	ADDIK	r3,r0,0      # Clear mod
+	ADDIK	r30,r0,0     # clear div
+	BLTId	r5,$LaDIV2   # If r5 is still negative (0x80000000), skip
+			     # the first bit search.
+	ADDIK	r29,r0,32    # Initialize the loop count
+   # First part try to find the first '1' in the r5
+$LaDIV1:
+	ADD	r5,r5,r5         # left shift logical r5
+	BGEID	r5,$LaDIV1       #
+	ADDIK	r29,r29,-1
+$LaDIV2:
+	ADD	r5,r5,r5         # left shift logical  r5 get the '1' into the Carry
+	ADDC	r3,r3,r3         # Move that bit into the Mod register
+	rSUB	r31,r6,r3        # Try to subtract (r30 a r6)
+	BLTi	r31,$LaMOD_TOO_SMALL
+	OR	r3,r0,r31       # Move the r31 to mod since the result was positive
+	ADDIK	r30,r30,1
+$LaMOD_TOO_SMALL:
+	ADDIK	r29,r29,-1
+	BEQi	r29,$LaLOOP_END
+	ADD	r30,r30,r30         # Shift in the '1' into div
+	BRI	$LaDIV2          # Div2
+$LaLOOP_END:
+	BGEI	r28,$LaRETURN_HERE
+	BRId	$LaRETURN_HERE
+	rsubi	r3,r3,0 # Negate the result
+$LaDiv_By_Zero:
+$LaResult_Is_Zero:
+	or	r3,r0,r0        # set result to 0 [Both mod as well as div are 0]
+$LaRETURN_HERE:
+# Restore values of CSRs and that of r3 and the divisor and the dividend
+	lwi	r28,r1,0
+	lwi	r29,r1,4
+	lwi	r30,r1,8
+	lwi	r31,r1,12
+	rtsd	r15,8
+	addik	r1,r1,16
+        .end __modsi3
+	.size	__modsi3, . - __modsi3
+
diff --git a/gcc-4.9/libgcc/config/microblaze/muldi3_hard.S b/gcc-4.9/libgcc/config/microblaze/muldi3_hard.S
new file mode 100644
index 000000000..14721281c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/muldi3_hard.S
@@ -0,0 +1,144 @@
+###################################- 
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+# 
+#  muldi3_hard.S
+# 
+#  Multiply operation for 64 bit integers, for devices with hard multiply
+#	Input :	Operand1[H] in Reg r5
+#		Operand1[L] in Reg r6		
+#		Operand2[H] in Reg r7
+#		Operand2[L] in Reg r8	
+#	Output: Result[H] in Reg r3
+#		Result[L] in Reg r4	
+# 
+#  Explaination:
+#
+# 	Both the input numbers are divided into 16 bit number as follows
+#		op1 = A B C D
+# 		op2 = E F G H
+#	result =    D * H 
+#		 + (C * H + D * G) << 16
+#		 + (B * H + C * G + D * F) << 32
+#		 + (A * H + B * G + C * F + D * E) << 48 
+#
+# 	Only 64 bits of the output are considered
+#
+#######################################
+
+	.globl	muldi3_hardproc
+	.ent	muldi3_hardproc
+muldi3_hardproc:
+	addi	r1,r1,-40
+
+#  Save the input operands on the caller's stack
+	swi	r5,r1,44
+	swi	r6,r1,48
+	swi	r7,r1,52
+	swi	r8,r1,56
+
+# Store all the callee saved registers 
+	sw	r20,r1,r0
+	swi	r21,r1,4
+	swi	r22,r1,8
+	swi	r23,r1,12
+	swi	r24,r1,16
+	swi	r25,r1,20
+	swi	r26,r1,24
+	swi	r27,r1,28
+
+# Load all the 16 bit values for A through H
+	lhui	r20,r1,44   # A
+	lhui	r21,r1,46   # B
+	lhui	r22,r1,48   # C
+	lhui	r23,r1,50   # D
+	lhui	r24,r1,52   # E
+	lhui	r25,r1,54   # F
+	lhui	r26,r1,56   # G
+	lhui	r27,r1,58   # H
+
+# D * H ==> LSB of the result on stack ==> Store1
+	mul	r9,r23,r27
+	swi	r9,r1,36    # Pos2 and Pos3
+
+# Hi (Store1) + C * H + D * G ==> Store2 ==> Pos1 and Pos2
+# Store the carry generated in position 2 for Pos 3
+	lhui	r11,r1,36   # Pos2
+	mul	r9,r22,r27   # C * H
+	mul	r10,r23,r26  # D * G
+	add	r9,r9,r10
+	addc	r12,r0,r0
+	add	r9,r9,r11
+	addc	r12,r12,r0    # Store the Carry
+	shi	r9,r1,36    # Store Pos2
+	swi	r9,r1,32 
+	lhui	r11,r1,32
+	shi	r11,r1,34   # Store Pos1
+
+# Hi (Store2) + B * H + C * G + D * F ==> Store3 ==> Pos0 and Pos1
+	mul	r9,r21,r27  # B * H
+	mul	r10,r22,r26 # C * G
+	mul	r7,r23,r25 # D * F	
+	add	r9,r9,r11
+	add	r9,r9,r10
+	add	r9,r9,r7
+	swi	r9,r1,32   # Pos0 and Pos1
+
+# Hi (Store3) + A * H + B * G + C * F + D * E ==> Store3 ==> Pos0
+	lhui	r11,r1,32  # Pos0
+	mul	r9,r20,r27  # A * H
+	mul	r10,r21,r26 # B * G
+	mul	r7,r22,r25 # C * F
+	mul	r8,r23,r24 # D * E
+	add	r9,r9,r11
+	add 	r9,r9,r10
+	add	r9,r9,r7
+	add	r9,r9,r8
+	sext16	r9,r9       # Sign extend the MSB
+	shi	r9,r1,32
+
+# Move results to r3 and r4
+	lhui	r3,r1,32
+	add	r3,r3,r12
+	shi	r3,r1,32
+	lwi	r3,r1,32  # Hi Part
+	lwi	r4,r1,36  # Lo Part
+
+# Restore Callee saved registers
+	lw	r20,r1,r0
+	lwi	r21,r1,4
+	lwi	r22,r1,8
+	lwi	r23,r1,12
+	lwi	r24,r1,16
+	lwi	r25,r1,20
+	lwi	r26,r1,24
+	lwi	r27,r1,28
+
+# Restore Frame and return	
+	rtsd	r15,8
+	addi	r1,r1,40
+
+.end muldi3_hardproc 
+	
+
diff --git a/gcc-4.9/libgcc/config/microblaze/mulsi3.S b/gcc-4.9/libgcc/config/microblaze/mulsi3.S
new file mode 100644
index 000000000..7e739a1e0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/mulsi3.S
@@ -0,0 +1,69 @@
+###################################-*-asm*- 
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+# 
+#  mulsi3.S
+# 
+#  Multiply operation for 32 bit integers.
+#	Input :	Operand1 in Reg r5
+#		Operand2 in Reg r6
+#	Output: Result [op1 * op2] in Reg r3
+# 
+#######################################
+
+	.globl	__mulsi3
+	.ent	__mulsi3
+	.type	__mulsi3,@function
+__mulsi3:
+	.frame	r1,0,r15
+	add	r3,r0,r0
+	BEQI	r5,$L_Result_Is_Zero      # Multiply by Zero
+	BEQI	r6,$L_Result_Is_Zero      # Multiply by Zero
+	BGEId	r5,$L_R5_Pos 
+	XOR	r4,r5,r6                  # Get the sign of the result
+	RSUBI	r5,r5,0	                  # Make r5 positive
+$L_R5_Pos:
+	BGEI	r6,$L_R6_Pos
+	RSUBI	r6,r6,0	                  # Make r6 positive
+$L_R6_Pos:	
+	bri	$L1
+$L2:	
+	add	r5,r5,r5
+$L1:	
+	srl	r6,r6
+	addc	r7,r0,r0
+	beqi	r7,$L2
+	bneid	r6,$L2
+	add	r3,r3,r5	
+	blti	r4,$L_NegateResult			
+	rtsd	r15,8
+	nop
+$L_NegateResult:
+	rtsd	r15,8
+	rsub	r3,r3,r0
+$L_Result_Is_Zero:
+	rtsd	r15,8
+	addi	r3,r0,0
+	.end __mulsi3
+	.size	__mulsi3, . - __mulsi3
diff --git a/gcc-4.9/libgcc/config/microblaze/stack_overflow_exit.S b/gcc-4.9/libgcc/config/microblaze/stack_overflow_exit.S
new file mode 100644
index 000000000..6bac47c98
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/stack_overflow_exit.S
@@ -0,0 +1,61 @@
+###################################-*-asm*- 
+# 
+#    Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# 
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>.  
+# 
+#  stack_overflow_exit.S
+# 
+#  Checks for stack overflows and sets the global variable 
+#  stack_overflow_error with the value of current stack pointer
+#
+#  This routine exits from the program
+# 
+#######################################
+
+	.globl	_stack_overflow_error
+	.data
+	.align	2
+	.type	_stack_overflow_error,@object
+	.size	_stack_overflow_error,4
+_stack_overflow_error:
+	.data32	0
+
+	.text 
+	.globl	_stack_overflow_exit	
+	.ent	_stack_overflow_exit
+	.type	_stack_overflow_exit,@function
+
+_stack_overflow_exit:
+#ifdef __PIC__
+	mfs	r20,rpc
+	addik	r20,r20,_GLOBAL_OFFSET_TABLE_+8
+	swi	r1,r20,_stack_overflow_error@GOTOFF
+	bri	exit@PLT
+#else
+	swi	r1,r0,_stack_overflow_error
+	bri	exit
+#endif
+
+	.end 	_stack_overflow_exit
+	.size	_stack_overflow_exit,. - _stack_overflow_exit
diff --git a/gcc-4.9/libgcc/config/microblaze/t-microblaze b/gcc-4.9/libgcc/config/microblaze/t-microblaze
new file mode 100644
index 000000000..96959f029
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/t-microblaze
@@ -0,0 +1,12 @@
+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _moddi3 _mulsi3 _udivsi3 _umodsi3
+
+LIB2ADD += \
+        $(srcdir)/config/microblaze/divsi3.S \
+        $(srcdir)/config/microblaze/moddi3.S \
+        $(srcdir)/config/microblaze/modsi3.S \
+        $(srcdir)/config/microblaze/muldi3_hard.S \
+        $(srcdir)/config/microblaze/mulsi3.S \
+        $(srcdir)/config/microblaze/stack_overflow_exit.S \
+        $(srcdir)/config/microblaze/udivsi3.S \
+        $(srcdir)/config/microblaze/umodsi3.S \
+        $(srcdir)/config/microblaze/divsi3_table.c
diff --git a/gcc-4.9/libgcc/config/microblaze/udivsi3.S b/gcc-4.9/libgcc/config/microblaze/udivsi3.S
new file mode 100644
index 000000000..69cb8eb20
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/udivsi3.S
@@ -0,0 +1,103 @@
+###################################-
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+# 
+#  udivsi3.S
+# 
+#  Unsigned divide operation.
+#	Input :	Divisor in Reg r5
+#		Dividend in Reg r6
+#	Output: Result in Reg r3
+# 
+#######################################
+	
+	.globl	__udivsi3
+	.ent	__udivsi3
+	.type	__udivsi3,@function
+__udivsi3:
+	.frame	r1,0,r15	
+
+	ADDIK   r1,r1,-12
+    	SWI     r29,r1,0
+	SWI     r30,r1,4
+	SWI     r31,r1,8
+
+	BEQI    r6,$LaDiv_By_Zero           # Div_by_Zero   # Division Error
+	BEQID   r5,$LaResult_Is_Zero        # Result is Zero 
+	ADDIK   r30,r0,0                    # Clear mod
+	ADDIK   r29,r0,32                   # Initialize the loop count
+
+        # Check if r6 and r5 are equal # if yes, return 1
+	RSUB 	r18,r5,r6
+	BEQID	r18,$LaRETURN_HERE
+	ADDIK	r3,r0,1
+
+        # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
+	XOR	r18,r5,r6
+	BGEID	r18,16
+	ADD	r3,r0,r0                    # We would anyways clear r3
+	BLTI	r6,$LaRETURN_HERE           # r6[bit 31 = 1] hence is greater
+	BRI	$LCheckr6
+	RSUB	r18,r6,r5                   # MICROBLAZEcmp
+	BLTI	r18,$LaRETURN_HERE
+
+        # If r6 [bit 31] is set, then return result as 1
+$LCheckr6:
+	BGTI	r6,$LaDIV0
+	BRID	$LaRETURN_HERE
+	ADDIK	r3,r0,1
+
+        # First part try to find the first '1' in the r5
+$LaDIV0:
+	BLTI    r5,$LaDIV2	
+$LaDIV1:
+	ADD     r5,r5,r5                    # left shift logical r5
+	BGTID   r5,$LaDIV1       
+	ADDIK   r29,r29,-1
+$LaDIV2:
+	ADD     r5,r5,r5                    # left shift logical  r5 get the '1' into the Carry
+	ADDC    r30,r30,r30                 # Move that bit into the Mod register
+	RSUB    r31,r6,r30                  # Try to subtract (r30 a r6)
+    	BLTI    r31,$LaMOD_TOO_SMALL
+	OR      r30,r0,r31                  # Move the r31 to mod since the result was positive
+	ADDIK   r3,r3,1
+$LaMOD_TOO_SMALL:
+	ADDIK   r29,r29,-1
+	BEQi    r29,$LaLOOP_END
+	ADD     r3,r3,r3 # Shift in the '1' into div
+	BRI     $LaDIV2   # Div2
+$LaLOOP_END:
+	BRI     $LaRETURN_HERE
+$LaDiv_By_Zero:
+$LaResult_Is_Zero:
+	OR      r3,r0,r0 # set result to 0
+$LaRETURN_HERE:
+        # Restore values of CSRs and that of r3 and the divisor and the dividend
+	LWI     r29,r1,0
+	LWI     r30,r1,4
+	LWI     r31,r1,8
+	RTSD    r15,8
+	ADDIK   r1,r1,12
+        .end __udivsi3
+	.size	__udivsi3, . - __udivsi3
diff --git a/gcc-4.9/libgcc/config/microblaze/umodsi3.S b/gcc-4.9/libgcc/config/microblaze/umodsi3.S
new file mode 100644
index 000000000..11cf6575a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/microblaze/umodsi3.S
@@ -0,0 +1,106 @@
+###################################
+# 
+#  Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+#  Contributed by Michael Eager <eager@eagercon.com>.
+#
+#  This file is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by the
+#  Free Software Foundation; either version 3, or (at your option) any
+#  later version.
+#
+#  GCC is distributed in the hope that it will be useful, but WITHOUT
+#  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+#  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+#  License for more details.
+#
+#  Under Section 7 of GPL version 3, you are granted additional
+#  permissions described in the GCC Runtime Library Exception, version
+#  3.1, as published by the Free Software Foundation.
+#
+#  You should have received a copy of the GNU General Public License and
+#  a copy of the GCC Runtime Library Exception along with this program;
+#  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+#  <http://www.gnu.org/licenses/>. 
+# 
+#  umodsi3.S
+#
+#  Unsigned modulo operation for 32 bit integers.
+#	Input :	op1 in Reg r5
+#		op2 in Reg r6
+#	Output: op1 mod op2 in Reg r3
+# 
+#######################################
+	
+	.globl	__umodsi3
+	.ent	__umodsi3
+	.type	__umodsi3,@function
+__umodsi3:
+	.frame	r1,0,r15	
+
+	addik	r1,r1,-12
+	swi	r29,r1,0
+	swi	r30,r1,4
+	swi	r31,r1,8
+
+	BEQI	r6,$LaDiv_By_Zero         # Div_by_Zero   # Division Error
+	BEQId	r5,$LaResult_Is_Zero     # Result is Zero 
+	ADDIK 	r3,r0,0                  # Clear div
+	ADDIK 	r30,r0,0     	# clear mod
+	ADDIK 	r29,r0,32       # Initialize the loop count
+
+# Check if r6 and r5 are equal # if yes, return 0
+	rsub 	r18,r5,r6
+	beqi	r18,$LaRETURN_HERE
+
+# Check if (uns)r6 is greater than (uns)r5. In that case, just return r5
+	xor	r18,r5,r6
+	bgeid	r18,16
+	addik	r3,r5,0
+	blti	r6,$LaRETURN_HERE
+	bri	$LCheckr6
+	rsub	r18,r5,r6 # MICROBLAZEcmp
+	bgti	r18,$LaRETURN_HERE
+
+# If r6 [bit 31] is set, then return result as r5-r6
+$LCheckr6:
+	bgtid	r6,$LaDIV0
+	addik	r3,r0,0
+	addik	r18,r0,0x7fffffff
+	and	r5,r5,r18
+	and 	r6,r6,r18
+	brid	$LaRETURN_HERE
+	rsub	r3,r6,r5
+# First part: try to find the first '1' in the r5
+$LaDIV0:
+	BLTI	r5,$LaDIV2
+$LaDIV1:
+	ADD 	r5,r5,r5     # left shift logical r5
+	BGEID 	r5,$LaDIV1   #
+	ADDIK 	r29,r29,-1
+$LaDIV2:
+	ADD 	r5,r5,r5     # left shift logical  r5 get the '1' into the Carry
+	ADDC 	r3,r3,r3     # Move that bit into the Mod register
+	rSUB 	r31,r6,r3    # Try to subtract (r3 a r6)
+	BLTi 	r31,$LaMOD_TOO_SMALL
+	OR  	r3,r0,r31    # Move the r31 to mod since the result was positive
+	ADDIK 	r30,r30,1
+$LaMOD_TOO_SMALL:
+	ADDIK 	r29,r29,-1
+	BEQi 	r29,$LaLOOP_END
+	ADD 	r30,r30,r30 # Shift in the '1' into div
+	BRI 	$LaDIV2     # Div2
+$LaLOOP_END:
+	BRI 	$LaRETURN_HERE
+$LaDiv_By_Zero:
+$LaResult_Is_Zero:
+	or 	r3,r0,r0   # set result to 0
+$LaRETURN_HERE:
+# Restore values of CSRs and that of r3 and the divisor and the dividend
+	lwi 	r29,r1,0
+	lwi 	r30,r1,4
+	lwi 	r31,r1,8
+	rtsd 	r15,8
+	addik 	r1,r1,12
+.end __umodsi3
+	.size	__umodsi3, . - __umodsi3
diff --git a/gcc-4.9/libgcc/config/mips/crtfastmath.c b/gcc-4.9/libgcc/config/mips/crtfastmath.c
new file mode 100644
index 000000000..a64e13d44
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/crtfastmath.c
@@ -0,0 +1,53 @@
+/* Copyright (C) 2010-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   and a copy of the GCC Runtime Library Exception along with this
+   program; see the files COPYING3 and COPYING.RUNTIME respectively.
+   If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef __mips_hard_float
+
+/* Flush denormalized numbers to zero.  */
+#define _FPU_FLUSH_TZ   0x1000000
+
+/* Rounding control.  */
+#define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
+#define _FPU_RC_ZERO    0x1
+#define _FPU_RC_UP      0x2
+#define _FPU_RC_DOWN    0x3
+
+/* Enable interrupts for IEEE exceptions.  */
+#define _FPU_IEEE     0x00000F80
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
+
+static void __attribute__((constructor,nomips16))
+set_fast_math (void)
+{
+  unsigned int fcr;
+
+  /* Flush to zero, round to nearest, IEEE exceptions disabled.  */
+  fcr = _FPU_FLUSH_TZ | _FPU_RC_NEAREST;
+
+  _FPU_SETCW(fcr);
+}
+
+#endif /* __mips_hard_float */
diff --git a/gcc-4.9/libgcc/config/mips/crti.S b/gcc-4.9/libgcc/config/mips/crti.S
new file mode 100644
index 000000000..698059464
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/crti.S
@@ -0,0 +1,49 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* 4 slots for argument spill area.  1 for cpreturn, 1 for stack.
+   Return spill offset of 40 and 20.  Aligned to 16 bytes for n32.  */
+
+	.section .init,"ax",@progbits
+	.globl	_init
+	.type	_init,@function
+_init:
+#ifdef __mips64
+	daddu   $sp,$sp,-48
+	sd      $31,40($sp)
+#else
+	addu	$sp,$sp,-32
+	sw	$31,20($sp)
+#endif
+
+	.section .fini,"ax",@progbits
+	.globl	_fini
+	.type	_fini,@function
+_fini:
+#ifdef __mips64
+	daddu   $sp,$sp,-48
+	sd      $31,40($sp)
+#else
+	addu	$sp,$sp,-32
+	sw	$31,20($sp)
+#endif
diff --git a/gcc-4.9/libgcc/config/mips/crtn.S b/gcc-4.9/libgcc/config/mips/crtn.S
new file mode 100644
index 000000000..0de2d0c41
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/crtn.S
@@ -0,0 +1,54 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* 4 slots for argument spill area.  1 for cpreturn, 1 for stack.
+   Return spill offset of 40 and 20.  Aligned to 16 bytes for n32.  */
+
+#ifdef	__mips16
+#define RA $7
+#else
+#define RA $31
+#endif
+
+	.section .init,"ax",@progbits
+init:	
+#ifdef __mips64
+	ld      RA,40($sp)
+	daddu	$sp,$sp,48
+#else
+	lw	RA,20($sp)
+	addu	$sp,$sp,32
+#endif
+	j	RA
+
+	.section .fini,"ax",@progbits
+fini:	
+#ifdef	__mips64
+	ld	RA,40($sp)
+	daddu	$sp,$sp,48
+#else
+	lw	RA,20($sp)
+	addu	$sp,$sp,32
+#endif
+	j	RA
+
diff --git a/gcc-4.9/libgcc/config/mips/gthr-mipssde.h b/gcc-4.9/libgcc/config/mips/gthr-mipssde.h
new file mode 100644
index 000000000..834701399
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/gthr-mipssde.h
@@ -0,0 +1,237 @@
+/* MIPS SDE threads compatibility routines for libgcc2 and libobjc.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributed by Nigel Stephens <nigel@mips.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_MIPSSDE_H
+#define GCC_GTHR_MIPSSDE_H
+
+/* MIPS SDE threading API specific definitions.
+   Easy, since the interface is pretty much one-to-one.  */
+
+#define __GTHREADS 1
+
+#include <sdethread.h>
+#include <unistd.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef __sdethread_key_t __gthread_key_t;
+typedef __sdethread_once_t __gthread_once_t;
+typedef __sdethread_mutex_t __gthread_mutex_t;
+
+typedef struct {
+  long depth;
+  __sdethread_t owner;
+  __sdethread_mutex_t actual;
+} __gthread_recursive_mutex_t;
+
+#define __GTHREAD_MUTEX_INIT __SDETHREAD_MUTEX_INITIALIZER("gthr")
+#define __GTHREAD_ONCE_INIT __SDETHREAD_ONCE_INIT
+static inline int
+__gthread_recursive_mutex_init_function(__gthread_recursive_mutex_t *__mutex);
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION __gthread_recursive_mutex_init_function
+
+#if SUPPORTS_WEAK && GTHREAD_USE_WEAK
+# define __gthrw(name) \
+  static __typeof(name) __gthrw_ ## name __attribute__ ((__weakref__(#name)));
+# define __gthrw_(name) __gthrw_ ## name
+#else
+# define __gthrw(name)
+# define __gthrw_(name) name
+#endif
+
+__gthrw(__sdethread_once)
+__gthrw(__sdethread_key_create)
+__gthrw(__sdethread_key_delete)
+__gthrw(__sdethread_getspecific)
+__gthrw(__sdethread_setspecific)
+
+__gthrw(__sdethread_self)
+
+__gthrw(__sdethread_mutex_lock)
+__gthrw(__sdethread_mutex_trylock)
+__gthrw(__sdethread_mutex_unlock)
+
+__gthrw(__sdethread_mutex_init)
+
+__gthrw(__sdethread_threading)
+
+#if SUPPORTS_WEAK && GTHREAD_USE_WEAK
+
+static inline int
+__gthread_active_p (void)
+{
+  return !!(void *)&__sdethread_threading;
+}
+
+#else /* not SUPPORTS_WEAK */
+
+static inline int
+__gthread_active_p (void)
+{
+  return 1;
+}
+
+#endif /* SUPPORTS_WEAK */
+
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+  if (__gthread_active_p ())
+    return __gthrw_(__sdethread_once) (__once, __func);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_key_create (__gthread_key_t *__key, void (*__dtor) (void *))
+{
+  return __gthrw_(__sdethread_key_create) (__key, __dtor);
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key)
+{
+  return __gthrw_(__sdethread_key_delete) (__key);
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  return __gthrw_(__sdethread_getspecific) (__key);
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  return __gthrw_(__sdethread_setspecific) (__key, __ptr);
+}
+
+static inline int
+__gthread_mutex_destroy (__gthread_mutex_t * UNUSED(__mutex))
+{
+  return 0;
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(__sdethread_mutex_lock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(__sdethread_mutex_trylock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(__sdethread_mutex_unlock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *__mutex)
+{
+  __mutex->depth = 0;
+  __mutex->owner = __gthrw_(__sdethread_self) ();
+  return __gthrw_(__sdethread_mutex_init) (&__mutex->actual, NULL);
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      __sdethread_t __me = __gthrw_(__sdethread_self) ();
+
+      if (__mutex->owner != __me)
+	{
+	  __gthrw_(__sdethread_mutex_lock) (&__mutex->actual);
+	  __mutex->owner = __me;
+	}
+
+      __mutex->depth++;
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      __sdethread_t __me = __gthrw_(__sdethread_self) ();
+
+      if (__mutex->owner != __me)
+	{
+	  if (__gthrw_(__sdethread_mutex_trylock) (&__mutex->actual))
+	    return 1;
+	  __mutex->owner = __me;
+	}
+
+      __mutex->depth++;
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      if (--__mutex->depth == 0)
+	{
+	   __mutex->owner = (__sdethread_t) 0;
+	   __gthrw_(__sdethread_mutex_unlock) (&__mutex->actual);
+	}
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t
+                                   * UNUSED(__mutex))
+{
+  return 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! GCC_GTHR_MIPSSDE_H */
diff --git a/gcc-4.9/libgcc/config/mips/lib2funcs.c b/gcc-4.9/libgcc/config/mips/lib2funcs.c
new file mode 100644
index 000000000..395433e95
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/lib2funcs.c
@@ -0,0 +1,44 @@
+/* libgcc routines for MIPS
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   DMULT/DDIV replacement support by Juergen Urban, JuergenUrban@gmx.de.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#if defined(__mips64) && defined(_MIPS_ARCH_R5900)
+
+/* Build DI version of libgcc functions. */
+#define LIBGCC2_UNITS_PER_WORD 4
+
+/* The following function is needed when !ISA_HAS_DMULT. */
+#define L_muldi3
+
+/* The following functions are needed when !ISA_HAS_DDIV. */
+#define L_divdi3
+#define L_moddi3
+#define L_udivdi3
+#define L_umoddi3
+#define L_udivmoddi4
+
+/* Use generic definition of functions. */
+#include "libgcc2.c"
+
+#endif
diff --git a/gcc-4.9/libgcc/config/mips/libgcc-mips16.ver b/gcc-4.9/libgcc/config/mips/libgcc-mips16.ver
new file mode 100644
index 000000000..e26d58c98
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/libgcc-mips16.ver
@@ -0,0 +1,48 @@
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+GCC_4.4.0 {
+  __mips16_addsf3
+  __mips16_subsf3
+  __mips16_mulsf3
+  __mips16_divsf3
+  __mips16_eqsf2
+  __mips16_nesf2
+  __mips16_gtsf2
+  __mips16_gesf2
+  __mips16_lesf2
+  __mips16_ltsf2
+  __mips16_floatsisf
+  __mips16_floatunsisf
+  __mips16_fix_truncsfsi
+  __mips16_adddf3
+  __mips16_subdf3
+  __mips16_muldf3
+  __mips16_divdf3
+  __mips16_extendsfdf2
+  __mips16_truncdfsf2
+  __mips16_eqdf2
+  __mips16_nedf2
+  __mips16_gtdf2
+  __mips16_gedf2
+  __mips16_ledf2
+  __mips16_ltdf2
+  __mips16_floatsidf
+  __mips16_floatunsidf
+  __mips16_fix_truncdfsi
+}
diff --git a/gcc-4.9/libgcc/config/mips/linux-unwind.h b/gcc-4.9/libgcc/config/mips/linux-unwind.h
new file mode 100644
index 000000000..9cf7c807e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/linux-unwind.h
@@ -0,0 +1,125 @@
+/* DWARF2 EH unwinding support for MIPS Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef inhibit_libc
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#include <signal.h>
+#include <asm/unistd.h>
+
+/* The third parameter to the signal handler points to something with
+ * this structure defined in asm/ucontext.h, but the name clashes with
+ * struct ucontext from sys/ucontext.h so this private copy is used.  */
+typedef struct _sig_ucontext {
+    unsigned long         uc_flags;
+    struct _sig_ucontext  *uc_link;
+    stack_t               uc_stack;
+    struct sigcontext uc_mcontext;
+    sigset_t      uc_sigmask;
+} _sig_ucontext_t;
+
+#define MD_FALLBACK_FRAME_STATE_FOR mips_fallback_frame_state
+
+static _Unwind_Reason_Code
+mips_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  u_int32_t *pc = (u_int32_t *) context->ra;
+  struct sigcontext *sc;
+  _Unwind_Ptr new_cfa, reg_offset;
+  int i;
+
+  /* A MIPS16 or microMIPS frame.  Signal frames always use the standard
+     ISA encoding.  */
+  if ((_Unwind_Ptr) pc & 3)
+    return _URC_END_OF_STACK;
+
+  /* 24021061 li v0, 0x1061 (rt_sigreturn)*/
+  /* 0000000c syscall    */
+  /*    or */
+  /* 24021017 li v0, 0x1017 (sigreturn) */
+  /* 0000000c syscall  */
+  if (pc[1] != 0x0000000c)
+    return _URC_END_OF_STACK;
+#if _MIPS_SIM == _ABIO32
+  if (pc[0] == (0x24020000 | __NR_sigreturn))
+    {
+      struct sigframe {
+	u_int32_t ass[4];  /* Argument save space for o32.  */
+	u_int32_t trampoline[2];
+	struct sigcontext sigctx;
+      } *rt_ = context->cfa;
+      sc = &rt_->sigctx;
+    }
+  else
+#endif
+  if (pc[0] == (0x24020000 | __NR_rt_sigreturn))
+    {
+      struct rt_sigframe {
+	u_int32_t ass[4];  /* Argument save space for o32.  */
+	u_int32_t trampoline[2];
+	siginfo_t info;
+	_sig_ucontext_t uc;
+      } *rt_ = context->cfa;
+      sc = &rt_->uc.uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = (_Unwind_Ptr) sc;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
+
+  /* On o32 Linux, the register save slots in the sigcontext are
+     eight bytes.  We need the lower half of each register slot,
+     so slide our view of the structure back four bytes.  */
+#if _MIPS_SIM == _ABIO32 && defined __MIPSEB__
+  reg_offset = 4;
+#else
+  reg_offset = 0;
+#endif
+
+  for (i = 0; i < 32; i++) {
+    fs->regs.reg[i].how = REG_SAVED_OFFSET;
+    fs->regs.reg[i].loc.offset
+      = (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
+  }
+  /* "PC & -2" points to the faulting instruction, but the unwind code
+     searches for "(ADDR & -2) - 1".  (See MASK_RETURN_ADDR for the source
+     of the -2 mask.)  Adding 2 here ensures that "(ADDR & -2) - 1" is the
+     address of the second byte of the faulting instruction.
+
+     Note that setting fs->signal_frame would not work.  As the comment
+     above MASK_RETURN_ADDR explains, MIPS unwinders must earch for an
+     odd-valued address.  */
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET;
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset
+    = (_Unwind_Ptr)(sc->sc_pc) + 2 - new_cfa;
+  fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+
+  return _URC_NO_REASON;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/mips/mips16.S b/gcc-4.9/libgcc/config/mips/mips16.S
new file mode 100644
index 000000000..6a43a9839
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/mips16.S
@@ -0,0 +1,752 @@
+/* mips16 floating point support code
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   Contributed by Cygnus Support
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __mips_micromips
+  /* DO NOTHING */
+#else
+
+/* This file contains mips16 floating point support functions.  These
+   functions are called by mips16 code to handle floating point when
+   -msoft-float is not used.  They accept the arguments and return
+   values using the soft-float calling convention, but do the actual
+   operation using the hard floating point instructions.  */
+
+#if defined _MIPS_SIM && (_MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIO64)
+
+/* This file contains 32-bit assembly code.  */
+	.set nomips16
+
+/* Start a function.  */
+
+#define STARTFN(NAME) .globl NAME; .ent NAME; NAME:
+
+/* Finish a function.  */
+
+#define ENDFN(NAME) .end NAME
+
+/* ARG1
+	The FPR that holds the first floating-point argument.
+
+   ARG2
+	The FPR that holds the second floating-point argument.
+
+   RET
+	The FPR that holds a floating-point return value.  */
+
+#define RET $f0
+#define ARG1 $f12
+#ifdef __mips64
+#define ARG2 $f13
+#else
+#define ARG2 $f14
+#endif
+
+/* Set 64-bit register GPR so that its high 32 bits contain HIGH_FPR
+   and so that its low 32 bits contain LOW_FPR.  */
+#define MERGE_GPRf(GPR, HIGH_FPR, LOW_FPR)	\
+	.set	noat;				\
+	mfc1	$1, LOW_FPR;			\
+	mfc1	GPR, HIGH_FPR;			\
+	dsll	$1, $1, 32;			\
+	dsll	GPR, GPR, 32;			\
+	dsrl	$1, $1, 32;			\
+	or	GPR, GPR, $1;			\
+	.set	at
+
+/* Move the high 32 bits of GPR to HIGH_FPR and the low 32 bits of
+   GPR to LOW_FPR.  */
+#define MERGE_GPRt(GPR, HIGH_FPR, LOW_FPR)	\
+	.set	noat;				\
+	dsrl	$1, GPR, 32;			\
+	mtc1	GPR, LOW_FPR;			\
+	mtc1	$1, HIGH_FPR;			\
+	.set	at
+
+/* Jump to T, and use "OPCODE, OP2" to implement a delayed move.  */
+#define DELAYt(T, OPCODE, OP2)			\
+	.set	noreorder;			\
+	jr	T;				\
+	OPCODE, OP2;				\
+	.set	reorder
+
+#if __mips >= 4
+/* Coprocessor moves are interlocked from the MIPS IV ISA up.  */
+#define DELAYf(T, OPCODE, OP2) DELAYt (T, OPCODE, OP2)
+#else
+/* Use "OPCODE. OP2" and jump to T.  */
+#define DELAYf(T, OPCODE, OP2) OPCODE, OP2; jr T
+#endif
+
+/* MOVE_SF_BYTE0(D)
+	Move the first single-precision floating-point argument between
+	GPRs and FPRs.
+
+   MOVE_SI_BYTE0(D)
+	Likewise the first single-precision integer argument.
+
+   MOVE_SF_BYTE4(D)
+	Move the second single-precision floating-point argument between
+	GPRs and FPRs, given that the first argument occupies 4 bytes.
+
+   MOVE_SF_BYTE8(D)
+	Move the second single-precision floating-point argument between
+	GPRs and FPRs, given that the first argument occupies 8 bytes.
+
+   MOVE_DF_BYTE0(D)
+	Move the first double-precision floating-point argument between
+	GPRs and FPRs.
+
+   MOVE_DF_BYTE8(D)
+	Likewise the second double-precision floating-point argument.
+
+   MOVE_SF_RET(D, T)
+	Likewise a single-precision floating-point return value,
+	then jump to T.
+
+   MOVE_SC_RET(D, T)
+	Likewise a complex single-precision floating-point return value.
+
+   MOVE_DF_RET(D, T)
+	Likewise a double-precision floating-point return value.
+
+   MOVE_DC_RET(D, T)
+	Likewise a complex double-precision floating-point return value.
+
+   MOVE_SI_RET(D, T)
+	Likewise a single-precision integer return value.
+
+   The D argument is "t" to move to FPRs and "f" to move from FPRs.
+   The return macros may assume that the target of the jump does not
+   use a floating-point register.  */
+
+#define MOVE_SF_RET(D, T) DELAY##D (T, m##D##c1 $2,$f0)
+#define MOVE_SI_RET(D, T) DELAY##D (T, m##D##c1 $2,$f0)
+
+#if defined(__mips64) && defined(__MIPSEB__)
+#define MOVE_SC_RET(D, T) MERGE_GPR##D ($2, $f0, $f1); jr T
+#elif defined(__mips64)
+/* The high 32 bits of $2 correspond to the second word in memory;
+   i.e. the imaginary part.  */
+#define MOVE_SC_RET(D, T) MERGE_GPR##D ($2, $f1, $f0); jr T
+#elif __mips_fpr == 64
+#define MOVE_SC_RET(D, T) m##D##c1 $2,$f0; DELAY##D (T, m##D##c1 $3,$f1)
+#else
+#define MOVE_SC_RET(D, T) m##D##c1 $2,$f0; DELAY##D (T, m##D##c1 $3,$f2)
+#endif
+
+#if defined(__mips64)
+#define MOVE_SF_BYTE0(D) m##D##c1 $4,$f12
+#define MOVE_SF_BYTE4(D) m##D##c1 $5,$f13
+#define MOVE_SF_BYTE8(D) m##D##c1 $5,$f13
+#else
+#define MOVE_SF_BYTE0(D) m##D##c1 $4,$f12
+#define MOVE_SF_BYTE4(D) m##D##c1 $5,$f14
+#define MOVE_SF_BYTE8(D) m##D##c1 $6,$f14
+#endif
+#define MOVE_SI_BYTE0(D) MOVE_SF_BYTE0(D)
+
+#if defined(__mips64)
+#define MOVE_DF_BYTE0(D) dm##D##c1 $4,$f12
+#define MOVE_DF_BYTE8(D) dm##D##c1 $5,$f13
+#define MOVE_DF_RET(D, T) DELAY##D (T, dm##D##c1 $2,$f0)
+#define MOVE_DC_RET(D, T) dm##D##c1 $3,$f1; MOVE_DF_RET (D, T)
+#elif __mips_fpr == 64 && defined(__MIPSEB__)
+#define MOVE_DF_BYTE0(D) m##D##c1 $5,$f12; m##D##hc1 $4,$f12
+#define MOVE_DF_BYTE8(D) m##D##c1 $7,$f14; m##D##hc1 $6,$f14
+#define MOVE_DF_RET(D, T) m##D##c1 $3,$f0; DELAY##D (T, m##D##hc1 $2,$f0)
+#define MOVE_DC_RET(D, T) m##D##c1 $5,$f1; m##D##hc1 $4,$f1; MOVE_DF_RET (D, T)
+#elif __mips_fpr == 64
+#define MOVE_DF_BYTE0(D) m##D##c1 $4,$f12; m##D##hc1 $5,$f12
+#define MOVE_DF_BYTE8(D) m##D##c1 $6,$f14; m##D##hc1 $7,$f14
+#define MOVE_DF_RET(D, T) m##D##c1 $2,$f0; DELAY##D (T, m##D##hc1 $3,$f0)
+#define MOVE_DC_RET(D, T) m##D##c1 $4,$f1; m##D##hc1 $5,$f1; MOVE_DF_RET (D, T)
+#elif defined(__MIPSEB__)
+/* FPRs are little-endian.  */
+#define MOVE_DF_BYTE0(D) m##D##c1 $4,$f13; m##D##c1 $5,$f12
+#define MOVE_DF_BYTE8(D) m##D##c1 $6,$f15; m##D##c1 $7,$f14
+#define MOVE_DF_RET(D, T) m##D##c1 $2,$f1; DELAY##D (T, m##D##c1 $3,$f0)
+#define MOVE_DC_RET(D, T) m##D##c1 $4,$f3; m##D##c1 $5,$f2; MOVE_DF_RET (D, T)
+#else
+#define MOVE_DF_BYTE0(D) m##D##c1 $4,$f12; m##D##c1 $5,$f13
+#define MOVE_DF_BYTE8(D) m##D##c1 $6,$f14; m##D##c1 $7,$f15
+#define MOVE_DF_RET(D, T) m##D##c1 $2,$f0; DELAY##D (T, m##D##c1 $3,$f1)
+#define MOVE_DC_RET(D, T) m##D##c1 $4,$f2; m##D##c1 $5,$f3; MOVE_DF_RET (D, T)
+#endif
+
+/* Single-precision math.  */
+
+/* Define a function NAME that loads two single-precision values,
+   performs FPU operation OPCODE on them, and returns the single-
+   precision result.  */
+
+#define OPSF3(NAME, OPCODE)	\
+STARTFN (NAME);			\
+	MOVE_SF_BYTE0 (t);	\
+	MOVE_SF_BYTE4 (t);	\
+	OPCODE	RET,ARG1,ARG2;	\
+	MOVE_SF_RET (f, $31);	\
+	ENDFN (NAME)
+
+#ifdef L_m16addsf3
+OPSF3 (__mips16_addsf3, add.s)
+#endif
+#ifdef L_m16subsf3
+OPSF3 (__mips16_subsf3, sub.s)
+#endif
+#ifdef L_m16mulsf3
+OPSF3 (__mips16_mulsf3, mul.s)
+#endif
+#ifdef L_m16divsf3
+OPSF3 (__mips16_divsf3, div.s)
+#endif
+
+/* Define a function NAME that loads a single-precision value,
+   performs FPU operation OPCODE on it, and returns the single-
+   precision result.  */
+
+#define OPSF2(NAME, OPCODE)	\
+STARTFN (NAME);			\
+	MOVE_SF_BYTE0 (t);	\
+	OPCODE	RET,ARG1;	\
+	MOVE_SF_RET (f, $31);	\
+	ENDFN (NAME)
+
+#ifdef L_m16negsf2
+OPSF2 (__mips16_negsf2, neg.s)
+#endif
+#ifdef L_m16abssf2
+OPSF2 (__mips16_abssf2, abs.s)
+#endif
+
+/* Single-precision comparisons.  */
+
+/* Define a function NAME that loads two single-precision values,
+   performs floating point comparison OPCODE, and returns TRUE or
+   FALSE depending on the result.  */
+
+#define CMPSF(NAME, OPCODE, TRUE, FALSE)	\
+STARTFN (NAME);					\
+	MOVE_SF_BYTE0 (t);			\
+	MOVE_SF_BYTE4 (t);			\
+	OPCODE	ARG1,ARG2;			\
+	li	$2,TRUE;			\
+	bc1t	1f;				\
+	li	$2,FALSE;			\
+1:;						\
+	j	$31;				\
+	ENDFN (NAME)
+
+/* Like CMPSF, but reverse the comparison operands.  */
+
+#define REVCMPSF(NAME, OPCODE, TRUE, FALSE)	\
+STARTFN (NAME);					\
+	MOVE_SF_BYTE0 (t);			\
+	MOVE_SF_BYTE4 (t);			\
+	OPCODE	ARG2,ARG1;			\
+	li	$2,TRUE;			\
+	bc1t	1f;				\
+	li	$2,FALSE;			\
+1:;						\
+	j	$31;				\
+	ENDFN (NAME)
+
+#ifdef L_m16eqsf2
+CMPSF (__mips16_eqsf2, c.eq.s, 0, 1)
+#endif
+#ifdef L_m16nesf2
+CMPSF (__mips16_nesf2, c.eq.s, 0, 1)
+#endif
+#ifdef L_m16gtsf2
+REVCMPSF (__mips16_gtsf2, c.lt.s, 1, 0)
+#endif
+#ifdef L_m16gesf2
+REVCMPSF (__mips16_gesf2, c.le.s, 0, -1)
+#endif
+#ifdef L_m16lesf2
+CMPSF (__mips16_lesf2, c.le.s, 0, 1)
+#endif
+#ifdef L_m16ltsf2
+CMPSF (__mips16_ltsf2, c.lt.s, -1, 0)
+#endif
+#ifdef L_m16unordsf2
+CMPSF(__mips16_unordsf2, c.un.s, 1, 0)
+#endif
+
+
+/* Single-precision conversions.  */
+
+#ifdef L_m16fltsisf
+STARTFN (__mips16_floatsisf)
+	MOVE_SF_BYTE0 (t)
+	cvt.s.w	RET,ARG1
+	MOVE_SF_RET (f, $31)
+	ENDFN (__mips16_floatsisf)
+#endif
+
+#ifdef L_m16fltunsisf
+STARTFN (__mips16_floatunsisf)
+	.set	noreorder
+	bltz	$4,1f
+	MOVE_SF_BYTE0 (t)
+	.set	reorder
+	cvt.s.w	RET,ARG1
+	MOVE_SF_RET (f, $31)
+1:		
+	and	$2,$4,1
+	srl	$3,$4,1
+	or	$2,$2,$3
+	mtc1	$2,RET
+	cvt.s.w	RET,RET
+	add.s	RET,RET,RET
+	MOVE_SF_RET (f, $31)
+	ENDFN (__mips16_floatunsisf)
+#endif
+	
+#ifdef L_m16fix_truncsfsi
+STARTFN (__mips16_fix_truncsfsi)
+	MOVE_SF_BYTE0 (t)
+	trunc.w.s RET,ARG1,$4
+	MOVE_SI_RET (f, $31)
+	ENDFN (__mips16_fix_truncsfsi)
+#endif
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+/* Double-precision math.  */
+
+/* Define a function NAME that loads two double-precision values,
+   performs FPU operation OPCODE on them, and returns the double-
+   precision result.  */
+
+#define OPDF3(NAME, OPCODE)	\
+STARTFN (NAME);			\
+	MOVE_DF_BYTE0 (t);	\
+	MOVE_DF_BYTE8 (t);	\
+	OPCODE RET,ARG1,ARG2;	\
+	MOVE_DF_RET (f, $31);	\
+	ENDFN (NAME)
+
+#ifdef L_m16adddf3
+OPDF3 (__mips16_adddf3, add.d)
+#endif
+#ifdef L_m16subdf3
+OPDF3 (__mips16_subdf3, sub.d)
+#endif
+#ifdef L_m16muldf3
+OPDF3 (__mips16_muldf3, mul.d)
+#endif
+#ifdef L_m16divdf3
+OPDF3 (__mips16_divdf3, div.d)
+#endif
+
+/* Define a function NAME that loads a double-precision value,
+   performs FPU operation OPCODE on it, and returns the double-
+   precision result.  */
+
+#define OPDF2(NAME, OPCODE)	\
+STARTFN (NAME);			\
+	MOVE_DF_BYTE0 (t);	\
+	OPCODE RET,ARG1;	\
+	MOVE_DF_RET (f, $31);	\
+	ENDFN (NAME)
+
+#ifdef L_m16negdf2
+OPDF2 (__mips16_negdf2, neg.d)
+#endif
+#ifdef L_m16absdf2
+OPDF2 (__mips16_absdf2, abs.d)
+#endif
+
+/* Conversions between single and double precision.  */
+
+#ifdef L_m16extsfdf2
+STARTFN (__mips16_extendsfdf2)
+	MOVE_SF_BYTE0 (t)
+	cvt.d.s	RET,ARG1
+	MOVE_DF_RET (f, $31)
+	ENDFN (__mips16_extendsfdf2)
+#endif
+
+#ifdef L_m16trdfsf2
+STARTFN (__mips16_truncdfsf2)
+	MOVE_DF_BYTE0 (t)
+	cvt.s.d	RET,ARG1
+	MOVE_SF_RET (f, $31)
+	ENDFN (__mips16_truncdfsf2)
+#endif
+
+/* Double-precision comparisons.  */
+
+/* Define a function NAME that loads two double-precision values,
+   performs floating point comparison OPCODE, and returns TRUE or
+   FALSE depending on the result.  */
+
+#define CMPDF(NAME, OPCODE, TRUE, FALSE)	\
+STARTFN (NAME);					\
+	MOVE_DF_BYTE0 (t);			\
+	MOVE_DF_BYTE8 (t);			\
+	OPCODE	ARG1,ARG2;			\
+	li	$2,TRUE;			\
+	bc1t	1f;				\
+	li	$2,FALSE;			\
+1:;						\
+	j	$31;				\
+	ENDFN (NAME)
+
+/* Like CMPDF, but reverse the comparison operands.  */
+
+#define REVCMPDF(NAME, OPCODE, TRUE, FALSE)	\
+STARTFN (NAME);					\
+	MOVE_DF_BYTE0 (t);			\
+	MOVE_DF_BYTE8 (t);			\
+	OPCODE	ARG2,ARG1;			\
+	li	$2,TRUE;			\
+	bc1t	1f;				\
+	li	$2,FALSE;			\
+1:;						\
+	j	$31;				\
+	ENDFN (NAME)
+
+#ifdef L_m16eqdf2
+CMPDF (__mips16_eqdf2, c.eq.d, 0, 1)
+#endif
+#ifdef L_m16nedf2
+CMPDF (__mips16_nedf2, c.eq.d, 0, 1)
+#endif
+#ifdef L_m16gtdf2
+REVCMPDF (__mips16_gtdf2, c.lt.d, 1, 0)
+#endif
+#ifdef L_m16gedf2
+REVCMPDF (__mips16_gedf2, c.le.d, 0, -1)
+#endif
+#ifdef L_m16ledf2
+CMPDF (__mips16_ledf2, c.le.d, 0, 1)
+#endif
+#ifdef L_m16ltdf2
+CMPDF (__mips16_ltdf2, c.lt.d, -1, 0)
+#endif
+#ifdef L_m16unorddf2
+CMPDF(__mips16_unorddf2, c.un.d, 1, 0)
+#endif
+
+/* Double-precision conversions.  */
+
+#ifdef L_m16fltsidf
+STARTFN (__mips16_floatsidf)
+	MOVE_SI_BYTE0 (t)
+	cvt.d.w	RET,ARG1
+	MOVE_DF_RET (f, $31)
+	ENDFN (__mips16_floatsidf)
+#endif
+	
+#ifdef L_m16fltunsidf
+STARTFN (__mips16_floatunsidf)
+	MOVE_SI_BYTE0 (t)
+	cvt.d.w RET,ARG1
+	bgez	$4,1f
+	li.d	ARG1, 4.294967296e+9
+	add.d	RET, RET, ARG1
+1:	MOVE_DF_RET (f, $31)
+	ENDFN (__mips16_floatunsidf)
+#endif
+	
+#ifdef L_m16fix_truncdfsi
+STARTFN (__mips16_fix_truncdfsi)
+	MOVE_DF_BYTE0 (t)
+	trunc.w.d RET,ARG1,$4
+	MOVE_SI_RET (f, $31)
+	ENDFN (__mips16_fix_truncdfsi)
+#endif
+#endif /* !__mips_single_float */
+
+/* We don't export stubs from libgcc_s.so and always require static
+   versions to be pulled from libgcc.a as needed because they use $2
+   and possibly $3 as arguments, diverging from the standard SysV ABI,
+   and as such would require severe pessimisation of MIPS16 PLT entries
+   just for this single special case.
+
+   For compatibility with old binaries that used safe standard MIPS PLT
+   entries and referred to these functions we still export them at
+   version GCC_4.4.0 for run-time loading only.  */
+
+#ifdef SHARED
+#define CE_STARTFN(NAME)			\
+STARTFN (NAME##_compat);			\
+	.symver NAME##_compat, NAME@GCC_4.4.0
+#define CE_ENDFN(NAME) ENDFN (NAME##_compat)
+#else
+#define CE_STARTFN(NAME)			\
+STARTFN (NAME);					\
+	.hidden NAME
+#define CE_ENDFN(NAME) ENDFN (NAME)
+#endif
+
+/* Define a function NAME that moves a return value of mode MODE from
+   FPRs to GPRs.  */
+
+#define RET_FUNCTION(NAME, MODE)	\
+CE_STARTFN (NAME);			\
+	MOVE_##MODE##_RET (t, $31);	\
+	CE_ENDFN (NAME)
+
+#ifdef L_m16retsf
+RET_FUNCTION (__mips16_ret_sf, SF)
+#endif
+
+#ifdef L_m16retsc
+RET_FUNCTION (__mips16_ret_sc, SC)
+#endif
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+#ifdef L_m16retdf
+RET_FUNCTION (__mips16_ret_df, DF)
+#endif
+
+#ifdef L_m16retdc
+RET_FUNCTION (__mips16_ret_dc, DC)
+#endif
+#endif /* !__mips_single_float */
+
+/* STUB_ARGS_X copies the arguments from GPRs to FPRs for argument
+   code X.  X is calculated as ARG1 + ARG2 * 4, where ARG1 and ARG2
+   classify the first and second arguments as follows:
+
+	1: a single-precision argument
+	2: a double-precision argument
+	0: no argument, or not one of the above.  */
+
+#define STUB_ARGS_0						/* () */
+#define STUB_ARGS_1 MOVE_SF_BYTE0 (t)				/* (sf) */
+#define STUB_ARGS_5 MOVE_SF_BYTE0 (t); MOVE_SF_BYTE4 (t)	/* (sf, sf) */
+#define STUB_ARGS_9 MOVE_SF_BYTE0 (t); MOVE_DF_BYTE8 (t)	/* (sf, df) */
+#define STUB_ARGS_2 MOVE_DF_BYTE0 (t)				/* (df) */
+#define STUB_ARGS_6 MOVE_DF_BYTE0 (t); MOVE_SF_BYTE8 (t)	/* (df, sf) */
+#define STUB_ARGS_10 MOVE_DF_BYTE0 (t); MOVE_DF_BYTE8 (t)	/* (df, df) */
+
+/* These functions are used by 16-bit code when calling via a function
+   pointer.  They must copy the floating point arguments from the GPRs
+   to FPRs and then call function $2.  */
+
+#define CALL_STUB_NO_RET(NAME, CODE)	\
+CE_STARTFN (NAME);			\
+	STUB_ARGS_##CODE;		\
+	.set	noreorder;		\
+	jr	$2;			\
+	move	$25,$2;			\
+	.set	reorder;		\
+	CE_ENDFN (NAME)
+
+#ifdef L_m16stub1
+CALL_STUB_NO_RET (__mips16_call_stub_1, 1)
+#endif
+
+#ifdef L_m16stub5
+CALL_STUB_NO_RET (__mips16_call_stub_5, 5)
+#endif
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#ifdef L_m16stub2
+CALL_STUB_NO_RET (__mips16_call_stub_2, 2)
+#endif
+
+#ifdef L_m16stub6
+CALL_STUB_NO_RET (__mips16_call_stub_6, 6)
+#endif
+
+#ifdef L_m16stub9
+CALL_STUB_NO_RET (__mips16_call_stub_9, 9)
+#endif
+
+#ifdef L_m16stub10
+CALL_STUB_NO_RET (__mips16_call_stub_10, 10)
+#endif
+#endif /* !__mips_single_float */
+
+/* Now we have the same set of functions, except that this time the
+   function being called returns an SFmode, SCmode, DFmode or DCmode
+   value; we need to instantiate a set for each case.  The calling
+   function will arrange to preserve $18, so these functions are free
+   to use it to hold the return address.
+
+   Note that we do not know whether the function we are calling is 16
+   bit or 32 bit.  However, it does not matter, because 16-bit
+   functions always return floating point values in both the gp and
+   the fp regs.  It would be possible to check whether the function
+   being called is 16 bits, in which case the copy is unnecessary;
+   however, it's faster to always do the copy.  */
+
+#define CALL_STUB_RET(NAME, CODE, MODE)					\
+CE_STARTFN (NAME);							\
+	.cfi_startproc;							\
+	/* Create a fake CFA 4 bytes below the stack pointer.  */	\
+	.cfi_def_cfa 29,-4;						\
+	/* "Save" $sp in itself so we don't use the fake CFA.		\
+	   This is: DW_CFA_val_expression r29, { DW_OP_reg29 }.  */	\
+	.cfi_escape 0x16,29,1,0x6d;					\
+	move	$18,$31;						\
+	.cfi_register 31,18;						\
+	STUB_ARGS_##CODE;						\
+	.set	noreorder;						\
+	jalr	$2;							\
+	move	$25,$2;							\
+	.set	reorder;						\
+	MOVE_##MODE##_RET (f, $18);					\
+	.cfi_endproc;							\
+	CE_ENDFN (NAME)
+
+/* First, instantiate the single-float set.  */
+
+#ifdef L_m16stubsf0
+CALL_STUB_RET (__mips16_call_stub_sf_0, 0, SF)
+#endif
+
+#ifdef L_m16stubsf1
+CALL_STUB_RET (__mips16_call_stub_sf_1, 1, SF)
+#endif
+
+#ifdef L_m16stubsf5
+CALL_STUB_RET (__mips16_call_stub_sf_5, 5, SF)
+#endif
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+#ifdef L_m16stubsf2
+CALL_STUB_RET (__mips16_call_stub_sf_2, 2, SF)
+#endif
+
+#ifdef L_m16stubsf6
+CALL_STUB_RET (__mips16_call_stub_sf_6, 6, SF)
+#endif
+
+#ifdef L_m16stubsf9
+CALL_STUB_RET (__mips16_call_stub_sf_9, 9, SF)
+#endif
+
+#ifdef L_m16stubsf10
+CALL_STUB_RET (__mips16_call_stub_sf_10, 10, SF)
+#endif
+#endif /* !__mips_single_float */
+
+
+/* Now we have the same set of functions again, except that this time
+   the function being called returns an DFmode value.  */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+#ifdef L_m16stubdf0
+CALL_STUB_RET (__mips16_call_stub_df_0, 0, DF)
+#endif
+
+#ifdef L_m16stubdf1
+CALL_STUB_RET (__mips16_call_stub_df_1, 1, DF)
+#endif
+
+#ifdef L_m16stubdf5
+CALL_STUB_RET (__mips16_call_stub_df_5, 5, DF)
+#endif
+
+#ifdef L_m16stubdf2
+CALL_STUB_RET (__mips16_call_stub_df_2, 2, DF)
+#endif
+
+#ifdef L_m16stubdf6
+CALL_STUB_RET (__mips16_call_stub_df_6, 6, DF)
+#endif
+
+#ifdef L_m16stubdf9
+CALL_STUB_RET (__mips16_call_stub_df_9, 9, DF)
+#endif
+
+#ifdef L_m16stubdf10
+CALL_STUB_RET (__mips16_call_stub_df_10, 10, DF)
+#endif
+#endif /* !__mips_single_float */
+
+
+/* Ho hum.  Here we have the same set of functions again, this time
+   for when the function being called returns an SCmode value.  */
+
+#ifdef L_m16stubsc0
+CALL_STUB_RET (__mips16_call_stub_sc_0, 0, SC)
+#endif
+
+#ifdef L_m16stubsc1
+CALL_STUB_RET (__mips16_call_stub_sc_1, 1, SC)
+#endif
+
+#ifdef L_m16stubsc5
+CALL_STUB_RET (__mips16_call_stub_sc_5, 5, SC)
+#endif
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+#ifdef L_m16stubsc2
+CALL_STUB_RET (__mips16_call_stub_sc_2, 2, SC)
+#endif
+
+#ifdef L_m16stubsc6
+CALL_STUB_RET (__mips16_call_stub_sc_6, 6, SC)
+#endif
+
+#ifdef L_m16stubsc9
+CALL_STUB_RET (__mips16_call_stub_sc_9, 9, SC)
+#endif
+
+#ifdef L_m16stubsc10
+CALL_STUB_RET (__mips16_call_stub_sc_10, 10, SC)
+#endif
+#endif /* !__mips_single_float */
+
+
+/* Finally, another set of functions for DCmode.  */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+#ifdef L_m16stubdc0
+CALL_STUB_RET (__mips16_call_stub_dc_0, 0, DC)
+#endif
+
+#ifdef L_m16stubdc1
+CALL_STUB_RET (__mips16_call_stub_dc_1, 1, DC)
+#endif
+
+#ifdef L_m16stubdc5
+CALL_STUB_RET (__mips16_call_stub_dc_5, 5, DC)
+#endif
+
+#ifdef L_m16stubdc2
+CALL_STUB_RET (__mips16_call_stub_dc_2, 2, DC)
+#endif
+
+#ifdef L_m16stubdc6
+CALL_STUB_RET (__mips16_call_stub_dc_6, 6, DC)
+#endif
+
+#ifdef L_m16stubdc9
+CALL_STUB_RET (__mips16_call_stub_dc_9, 9, DC)
+#endif
+
+#ifdef L_m16stubdc10
+CALL_STUB_RET (__mips16_call_stub_dc_10, 10, DC)
+#endif
+#endif /* !__mips_single_float */
+
+#endif
+#endif /* __mips_micromips */
diff --git a/gcc-4.9/libgcc/config/mips/sfp-machine.h b/gcc-4.9/libgcc/config/mips/sfp-machine.h
new file mode 100644
index 000000000..e9d33b7dc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/sfp-machine.h
@@ -0,0 +1,180 @@
+/* softfp machine description for MIPS.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __mips64
+#define _FP_W_TYPE_SIZE		64
+#define _FP_W_TYPE		unsigned long long
+#define _FP_WS_TYPE		signed long long
+#define _FP_I_TYPE		long long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+#define TI_BITS (__CHAR_BIT__ * (int) sizeof (TItype))
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#ifdef __mips_nan2008
+# define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+# define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1)
+# define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1
+#else
+# define _FP_NANFRAC_S		(_FP_QNANBIT_S - 1)
+# define _FP_NANFRAC_D		(_FP_QNANBIT_D - 1)
+# define _FP_NANFRAC_Q		(_FP_QNANBIT_Q - 1), -1
+#endif
+#else
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned int
+#define _FP_WS_TYPE		signed int
+#define _FP_I_TYPE		int
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_udiv_norm(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#ifdef __mips_nan2008
+# define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+# define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+# define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#else
+# define _FP_NANFRAC_S		(_FP_QNANBIT_S - 1)
+# define _FP_NANFRAC_D		(_FP_QNANBIT_D - 1), -1
+# define _FP_NANFRAC_Q		(_FP_QNANBIT_Q - 1), -1, -1, -1
+#endif
+#endif
+
+/* The type of the result of a floating point comparison.  This must
+   match __libgcc_cmp_return__ in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#ifdef __mips_nan2008
+# define _FP_QNANNEGATEDP 0
+#else
+# define _FP_QNANNEGATEDP 1
+#endif
+
+/* Comment from glibc: */
+/* From my experiments it seems X is chosen unless one of the
+   NaNs is sNaN,  in which case the result is NANSIGN/NANFRAC.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) |				\
+	 _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs)		\
+      {								\
+	R##_s = _FP_NANSIGN_##fs;				\
+	_FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs);			\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#ifdef __mips_hard_float
+#define FP_EX_INVALID           0x40
+#define FP_EX_DIVZERO           0x20
+#define FP_EX_OVERFLOW          0x10
+#define FP_EX_UNDERFLOW         0x08
+#define FP_EX_INEXACT           0x04
+#define FP_EX_ALL \
+	(FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \
+	 | FP_EX_INEXACT)
+
+#define FP_EX_ENABLE_SHIFT	5
+#define FP_EX_CAUSE_SHIFT	10
+
+#define FP_RND_NEAREST		0x0
+#define FP_RND_ZERO		0x1
+#define FP_RND_PINF		0x2
+#define FP_RND_MINF		0x3
+#define FP_RND_MASK		0x3
+
+#define _FP_DECL_EX \
+  unsigned long int _fcsr __attribute__ ((unused)) = FP_RND_NEAREST
+
+#define FP_INIT_ROUNDMODE			\
+  do {						\
+    _fcsr = __builtin_mips_get_fcsr ();		\
+  } while (0)
+
+#define FP_ROUNDMODE (_fcsr & FP_RND_MASK)
+
+#define FP_TRAPPING_EXCEPTIONS ((_fcsr >> FP_EX_ENABLE_SHIFT) & FP_EX_ALL)
+
+#define FP_HANDLE_EXCEPTIONS				\
+  do {							\
+    _fcsr &= ~(FP_EX_ALL << FP_EX_CAUSE_SHIFT);		\
+    /* Also clear Unimplemented Operation.  */		\
+    _fcsr &= ~(1 << 17);				\
+    _fcsr |= _fex | (_fex << FP_EX_CAUSE_SHIFT);	\
+    __builtin_mips_set_fcsr (_fcsr);			\
+  } while (0);
+
+#else
+#define FP_EX_INVALID           (1 << 4)
+#define FP_EX_DIVZERO           (1 << 3)
+#define FP_EX_OVERFLOW          (1 << 2)
+#define FP_EX_UNDERFLOW         (1 << 1)
+#define FP_EX_INEXACT           (1 << 0)
+#endif
+
+#define _FP_TININESS_AFTER_ROUNDING 1
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined _MIPSEB
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/mips/t-crtstuff b/gcc-4.9/libgcc/config/mips/t-crtstuff
new file mode 100644
index 000000000..d8ab43be2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-crtstuff
@@ -0,0 +1,2 @@
+# Don't let CTOR_LIST end up in sdata section.
+CRTSTUFF_T_CFLAGS = -G 0
diff --git a/gcc-4.9/libgcc/config/mips/t-elf b/gcc-4.9/libgcc/config/mips/t-elf
new file mode 100644
index 000000000..651f10a53
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-elf
@@ -0,0 +1,3 @@
+# We must build libgcc2.a with -G 0, in case the user wants to link
+# without the $gp register.
+HOST_LIBGCC2_CFLAGS += -G 0
diff --git a/gcc-4.9/libgcc/config/mips/t-mips b/gcc-4.9/libgcc/config/mips/t-mips
new file mode 100644
index 000000000..4fb8e1362
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-mips
@@ -0,0 +1,9 @@
+LIB2_SIDITI_CONV_FUNCS = yes
+
+softfp_float_modes :=
+softfp_int_modes := si di
+softfp_extensions :=
+softfp_truncations :=
+softfp_exclude_libgcc2 := n
+
+LIB2ADD_ST += $(srcdir)/config/mips/lib2funcs.c
diff --git a/gcc-4.9/libgcc/config/mips/t-mips16 b/gcc-4.9/libgcc/config/mips/t-mips16
new file mode 100644
index 000000000..451ba9b81
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-mips16
@@ -0,0 +1,45 @@
+# Copyright (C) 2007-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB1ASMSRC = mips/mips16.S
+LIB1ASMFUNCS = _m16addsf3 _m16subsf3 _m16mulsf3 _m16divsf3 \
+	_m16eqsf2 _m16nesf2 _m16gtsf2 _m16gesf2 _m16lesf2 _m16ltsf2 \
+	_m16unordsf2 \
+	_m16fltsisf _m16fix_truncsfsi _m16fltunsisf \
+	_m16adddf3 _m16subdf3 _m16muldf3 _m16divdf3 \
+	_m16extsfdf2 _m16trdfsf2 \
+	_m16eqdf2 _m16nedf2 _m16gtdf2 _m16gedf2 _m16ledf2 _m16ltdf2 \
+	_m16unorddf2 \
+	_m16fltsidf _m16fix_truncdfsi _m16fltunsidf \
+	_m16retsf _m16retdf \
+	_m16retsc _m16retdc \
+	_m16stub1 _m16stub2 _m16stub5 _m16stub6 _m16stub9 _m16stub10 \
+	_m16stubsf0 _m16stubsf1 _m16stubsf2 _m16stubsf5 _m16stubsf6 \
+	_m16stubsf9 _m16stubsf10 \
+	_m16stubdf0 _m16stubdf1 _m16stubdf2 _m16stubdf5 _m16stubdf6 \
+	_m16stubdf9 _m16stubdf10 \
+	_m16stubsc0 _m16stubsc1 _m16stubsc2 _m16stubsc5 _m16stubsc6 \
+	_m16stubsc9 _m16stubsc10 \
+	_m16stubdc0 _m16stubdc1 _m16stubdc2 _m16stubdc5 _m16stubdc6 \
+	_m16stubdc9 _m16stubdc10
+
+SYNC = yes
+SYNC_CFLAGS = -mno-mips16
+
+# Version these symbols if building libgcc.so.
+SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips16.ver
diff --git a/gcc-4.9/libgcc/config/mips/t-mips64 b/gcc-4.9/libgcc/config/mips/t-mips64
new file mode 100644
index 000000000..a1e3513e2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-mips64
@@ -0,0 +1 @@
+softfp_int_modes += ti
diff --git a/gcc-4.9/libgcc/config/mips/t-sdemtk b/gcc-4.9/libgcc/config/mips/t-sdemtk
new file mode 100644
index 000000000..a06e828b5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-sdemtk
@@ -0,0 +1,3 @@
+# Don't build FPBIT and DPBIT; we'll be using the SDE soft-float library.
+FPBIT =
+DPBIT =
diff --git a/gcc-4.9/libgcc/config/mips/t-softfp-tf b/gcc-4.9/libgcc/config/mips/t-softfp-tf
new file mode 100644
index 000000000..306677b12
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-softfp-tf
@@ -0,0 +1,3 @@
+softfp_float_modes += tf
+softfp_extensions += sftf dftf
+softfp_truncations += tfsf tfdf
diff --git a/gcc-4.9/libgcc/config/mips/t-vr b/gcc-4.9/libgcc/config/mips/t-vr
new file mode 100644
index 000000000..601fbdece
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/t-vr
@@ -0,0 +1,2 @@
+LIB2ADD_ST = $(srcdir)/config/mips/mips16.S \
+	     $(srcdir)/config/mips/vr4120-div.S
diff --git a/gcc-4.9/libgcc/config/mips/vr4120-div.S b/gcc-4.9/libgcc/config/mips/vr4120-div.S
new file mode 100644
index 000000000..76c4e7a45
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mips/vr4120-div.S
@@ -0,0 +1,79 @@
+/* Support file for -mfix-vr4120.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* This file contains functions which implement divsi3 and modsi3 for
+   -mfix-vr4120.  div and ddiv do not give the correct result when one
+   of the operands is negative.  */
+
+	.set	nomips16
+
+#define DIV								\
+	xor	$3,$4,$5	/* t = x ^ y */ ;			\
+	li	$2,0x80000000;						\
+	.set	noreorder;						\
+	bgez	$4,1f		/* x >= 0 */; 				\
+	and	$3,$3,$2	/* t = (x ^ y) & 0x80000000 in delay slot */ ;\
+	.set	reorder;						\
+	subu	$4,$0,$4	/* x = -x */ ;				\
+1:; 									\
+	.set	noreorder;						\
+	bgez	$5,2f		/* y >= 0 */ ;				\
+	nop;								\
+	subu	$5,$0,$5	/* y = -y */ ;				\
+	.set	reorder;						\
+2:;									\
+	divu	$0,$4,$5;	/* we use divu because of INT_MIN */	\
+	.set	noreorder;						\
+	bne	$5,$0,3f;						\
+	nop;								\
+	break	7		/* division on zero y */ ;		\
+3:;									\
+	.set	reorder;						\
+	mflo	$2		/* r = x / y */ ;			\
+	.set	noreorder;						\
+	beq	$3,$0,4f	/* t == 0 */ ;				\
+	nop;								\
+	subu	$2,$0,$2	/* r = -r */ ;				\
+	.set	reorder;						\
+4:
+
+	.globl	__vr4120_divsi3
+	.ent	__vr4120_divsi3
+__vr4120_divsi3:
+	DIV
+	j	$31
+	.end	__vr4120_divsi3
+
+	.globl	__vr4120_modsi3
+	.ent	__vr4120_modsi3
+__vr4120_modsi3:
+	move	$6,$4		# x1 = x
+	move	$7,$5		# y1 = y
+	DIV
+	mult	$2,$7		# r = r * y1
+	mflo	$2
+	.set	noreorder
+	j	$31
+	subu	$2,$6,$2	# r = x1 - r  in delay slot
+	.end	__vr4120_modsi3
diff --git a/gcc-4.9/libgcc/config/mmix/crti.S b/gcc-4.9/libgcc/config/mmix/crti.S
new file mode 100644
index 000000000..82ffa6de8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mmix/crti.S
@@ -0,0 +1,152 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Hans-Peter Nilsson <hp@bitrange.com>
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+% This is the crt0 equivalent for mmix-knuth-mmixware, for setting up
+% things for compiler-generated assembly-code and for setting up things
+% between where the simulator calls and main, and shutting things down on
+% the way back.  There's an actual crt0.o elsewhere, but that's a dummy.
+
+% This file and the GCC output are supposed to be *reasonably*
+% mmixal-compatible to enable people to re-use output with Knuth's mmixal.
+% However, forward references are used more freely: we are using the
+% binutils tools.  Users of mmixal beware; you will sometimes have to
+% re-order things or use temporary variables.
+
+% Users of mmixal will want to set up 8H and 9H to be .text and .data
+% respectively, so the compiler can switch between them pretending they're
+% segments.
+
+% This little treasure (some contents) is required so the 32 lowest
+% address bits of user data will not be zero.  Because of truncation,
+% that would cause testcase gcc.c-torture/execute/980701-1.c to
+% incorrectly fail.
+
+	.data	! mmixal:= 8H LOC Data_Segment
+	.p2align 3
+dstart	OCTA 2009
+
+	.text	! mmixal:= 9H LOC 8B; LOC #100
+	.global Main
+
+% The __Stack_start symbol is provided by the link script.
+stackpp	OCTA __Stack_start
+crtstxt	OCTA _init	% Assumed to be the lowest executed address.
+	OCTA __etext	% Assumed to be beyond the highest executed address.
+
+crtsdat	OCTA dstart	% Assumed to be the lowest accessed address.
+	OCTA _end	% Assumed to be beyond the highest accessed address.
+
+% "Main" is the magic symbol the simulator jumps to.  We want to go
+% on to "main".
+% We need to set rG explicitly to avoid hard-to-debug situations.
+Main	SETL	$255,32
+	PUT	rG,$255
+
+% Make sure we have valid memory for addresses in .text and .data (and
+% .bss, but we include this in .data), for the benefit of mmo-using
+% simulators that require validation of addresses for which contents
+% is not present.  Due to its implicit-zero nature, zeros in contents
+% may be left out in the mmo format, but we don't know the boundaries
+% of those zero-chunks; for mmo files from binutils, they correspond
+% to the beginning and end of sections in objects before linking.  We
+% validate the contents by executing PRELD (0; one byte) on each
+% 2048-byte-boundary of our .text .data, and we assume this size
+% matches the magic lowest-denominator chunk-size for all
+% validation-requiring simulators.  The effect of the PRELD (any size)
+% is assumed to be the same as initial loading of the contents, as
+% long as the PRELD happens before the first PUSHJ/PUSHGO.  If it
+% happens after that, we'll need to distinguish between
+% access-for-execution and read/write access.
+
+	GETA	$255,crtstxt
+	LDOU	$2,$255,0
+	ANDNL	$2,#7ff		% Align the start at a 2048-boundary.
+	LDOU	$3,$255,8
+	SETL	$4,2048
+0H	PRELD	0,$2,0
+	ADDU	$2,$2,$4
+	CMP	$255,$2,$3
+	BN	$255,0B
+
+	GETA	$255,crtsdat
+	LDOU	$2,$255,0
+	ANDNL	$2,#7ff
+	LDOU	$3,$255,8
+0H	PRELD	0,$2,0
+	ADDU	$2,$2,$4
+	CMP	$255,$2,$3
+	BN	$255,0B
+
+% Initialize the stack pointer.  It is supposedly made a global
+% zero-initialized (allowed to change) register in crtn.S; we use the
+% explicit number.
+	GETA	$255,stackpp
+	LDOU	$254,$255,0
+
+	PUSHJ	$2,_init
+
+#ifdef __MMIX_ABI_GNU__
+% Copy argc and argv from their initial position to argument registers
+% where necessary.
+	SET	$231,$0
+	SET	$232,$1
+#else
+% For the mmixware ABI, we need to move arguments.  The return value will
+% appear in $0.
+	SET	$2,$1
+	SET	$1,$0
+#endif
+
+	PUSHJ	$0,main
+	JMP	exit
+
+% Provide the first part of _init and _fini.  Save the return address on the
+% register stack.  We eventually ignore the return address of these
+% PUSHJ:s, so it doesn't matter that whether .init and .fini code calls
+% functions or where they store rJ.  We shouldn't get there, so die
+% (TRAP Halt) if that happens.
+
+	.section .init,"ax",@progbits
+	.global	_init
+_init:
+	GET	$0,:rJ
+	PUSHJ	$1,0F
+	SETL	$255,255
+	TRAP	0,0,0
+0H	IS	@
+
+% Register _fini to be executed as the last atexit function.
+#ifdef __MMIX_ABI_GNU__
+	GETA	$231,_fini
+#else
+	GETA	$1,_fini
+#endif
+	PUSHJ	$0,atexit
+
+	.section .fini,"ax",@progbits
+	.global	_fini
+_fini:
+	GET	$0,:rJ
+	PUSHJ	$1,0F
+	SETL	$255,255
+	TRAP	0,0,0
+0H	IS	@
diff --git a/gcc-4.9/libgcc/config/mmix/crtn.S b/gcc-4.9/libgcc/config/mmix/crtn.S
new file mode 100644
index 000000000..d520a9e6f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mmix/crtn.S
@@ -0,0 +1,87 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Hans-Peter Nilsson <hp@bitrange.com>
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+% This must be the last file on the link-line, allocating global registers
+% from the top.
+
+% Register $254 is the stack-pointer.
+sp GREG
+
+% Register $253 is frame-pointer.  It's not supposed to be used in most
+% functions.
+fp GREG
+
+% $252 is the static chain register; nested functions receive the
+% context of the surrounding function through a pointer passed in this
+% register.
+static_chain GREG
+struct_value_reg GREG
+
+% These registers are used to pass state at an exceptional return (C++).
+eh_state_3 GREG
+eh_state_2 GREG
+eh_state_1 GREG
+eh_state_0 GREG
+
+#ifdef __MMIX_ABI_GNU__
+
+% Allocate global registers used by the GNU ABI.
+gnu_parm_reg_16 GREG
+gnu_parm_reg_15 GREG
+gnu_parm_reg_14 GREG
+gnu_parm_reg_13 GREG
+gnu_parm_reg_12 GREG
+gnu_parm_reg_11 GREG
+gnu_parm_reg_10 GREG
+gnu_parm_reg_9 GREG
+gnu_parm_reg_8 GREG
+gnu_parm_reg_7 GREG
+gnu_parm_reg_6 GREG
+gnu_parm_reg_5 GREG
+gnu_parm_reg_4 GREG
+gnu_parm_reg_3 GREG
+gnu_parm_reg_2 GREG
+gnu_parm_reg_1 GREG
+
+#endif /* __MMIX_ABI_GNU__ */
+
+% Provide last part of _init and _fini.
+
+% The return address is stored in the topmost stored register in the
+% register-stack.  We ignore the current value in rJ.  It is probably
+% garbage because each fragment of _init and _fini may have their own idea
+% of the current stack frame, if they're cut out from a "real" function
+% like in gcc/crtstuff.c.
+
+	.section .init,"ax",@progbits
+	GETA	$255,0F
+	PUT	rJ,$255
+	POP	0,0
+0H	PUT	rJ,$0
+	POP	0,0
+	
+	.section .fini,"ax",@progbits
+	GETA	$255,0F
+	PUT	rJ,$255
+	POP	0,0
+0H	PUT	rJ,$0
+	POP	0,0
diff --git a/gcc-4.9/libgcc/config/mmix/t-mmix b/gcc-4.9/libgcc/config/mmix/t-mmix
new file mode 100644
index 000000000..2ee4f001a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/mmix/t-mmix
@@ -0,0 +1,22 @@
+HOST_LIBGCC2_CFLAGS += -mlibfuncs -O2
+
+# We need to turn off some assumptions on normality for code in crtstuff.c
+# and crt{i,n}.S, specifically about execution not continuing past the
+# end of the section in the file being compiled.  Thus we must stop the
+# assembler from generating stubbable PUSHJ relocs, because that will add
+# stubs at the end of the current section when necessary.
+CRTSTUFF_T_CFLAGS = -Wa,--no-stubs
+
+# Don't use global registers in libraries.
+# FIXME: Not applied at "root" level, so disabled at the moment to stop
+# incorrect comparisons with -mabi=gnu.
+#MULTILIB_EXTRA_OPTS = mno-base-addresses
+
+# Cannot use default rules due to $(CRTSTUFF_T_CFLAGS).
+CUSTOM_CRTIN = yes
+
+crti.o: $(srcdir)/config/mmix/crti.S
+	$(crt_compile) $(CRTSTUFF_T_CFLAGS) -c $<
+
+crtn.o: $(srcdir)/config/mmix/crtn.S
+	$(crt_compile) $(CRTSTUFF_T_CFLAGS) -c $<
diff --git a/gcc-4.9/libgcc/config/moxie/crti.S b/gcc-4.9/libgcc/config/moxie/crti.S
new file mode 100644
index 000000000..25206cf29
--- /dev/null
+++ b/gcc-4.9/libgcc/config/moxie/crti.S
@@ -0,0 +1,40 @@
+# crti.S for moxie
+#
+#   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just make a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+	.file		"crti.S"
+
+	.section	".init"
+	.global	_init
+	.type	_init, @function	
+	.p2align	1
+_init:
+
+	.section	".fini"
+	.global	_fini
+	.type	_fini,@function
+	.p2align	1
+_fini:
diff --git a/gcc-4.9/libgcc/config/moxie/crtn.S b/gcc-4.9/libgcc/config/moxie/crtn.S
new file mode 100644
index 000000000..e49e54c6c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/moxie/crtn.S
@@ -0,0 +1,34 @@
+# crtn.S for moxie
+# 
+#   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+	.file		"crtn.S"
+
+	.section	".init"
+	ret
+	
+	.section	".fini"
+	ret
diff --git a/gcc-4.9/libgcc/config/moxie/sfp-machine.h b/gcc-4.9/libgcc/config/moxie/sfp-machine.h
new file mode 100644
index 000000000..6394de30b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/moxie/sfp-machine.h
@@ -0,0 +1,61 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+# define __BYTE_ORDER __BIG_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
diff --git a/gcc-4.9/libgcc/config/msp430/cmpd.c b/gcc-4.9/libgcc/config/msp430/cmpd.c
new file mode 100644
index 000000000..03e690dff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/cmpd.c
@@ -0,0 +1,19 @@
+/* Public domain.  */
+int
+__mspabi_cmpf (float x, float y)
+{
+  if (x < y)
+    return -1;
+  if (x > y)
+    return 1;
+  return 0;
+}
+int
+__mspabi_cmpd (double x, double y)
+{
+  if (x < y)
+    return -1;
+  if (x > y)
+    return 1;
+  return 0;
+}
diff --git a/gcc-4.9/libgcc/config/msp430/cmpsi2.S b/gcc-4.9/libgcc/config/msp430/cmpsi2.S
new file mode 100644
index 000000000..7f85c0b9b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/cmpsi2.S
@@ -0,0 +1,98 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+#ifdef __MSP430X_LARGE__
+#define ret_	RETA
+#else
+#define ret_	RET
+#endif
+
+	.text
+
+	;;   int __cmpsi2 (signed long A, signed long B)
+	;;
+	;; Performs a signed comparison of A and B.
+	;; If A is less than B it returns 0.  If A is greater
+	;; than B it returns 2.  If they are equal it returns 1.
+
+	;;  Note - this code is also used by the __ucmpsi2 routine below.
+
+	.global	__cmpsi2
+        .type   __cmpsi2, @function
+__cmpsi2:
+	;; A is in r12 (low), r13 (high)
+	;; B is in r14 (low), r15 (high)
+	;; Result put in r12
+
+	cmp.w	r13, r15
+	jeq	.L_compare_low
+	jge	.L_less_than
+.L_greater_than:
+	mov.w	#2, r12
+	ret_
+.L_less_than:
+	mov.w	#0, r12
+	ret_
+
+.L_compare_low:
+	cmp.w	r12, r14
+	jl	.L_greater_than
+	jne     .L_less_than
+	mov.w	#1, r12
+	ret_
+
+	.size	__cmpsi2, . - __cmpsi2
+
+
+	;;   int __ucmpsi2 (unsigned long A, unsigned long B)
+	;;
+	;; Performs an unsigned comparison of A and B.
+	;; If A is less than B it returns 0.  If A is greater
+	;; than B it returns 2.  If they are equal it returns 1.
+
+;;;  Note - this function branches into the __cmpsi2 code above.
+
+	.global	__ucmpsi2
+        .type   __ucmpsi2, @function
+__ucmpsi2:
+	;; A is in r12 (low), r13 (high)
+	;; B is in r14 (low), r15 (high)
+	;; Result put in r12
+
+	tst	r13
+	jn	.L_top_bit_set_in_A
+	tst	r15
+;;; If the top bit of B is set, but A's is clear we know that A < B.
+	jn	.L_less_than
+;;; Neither A nor B has their top bit set so we can use the __cmpsi2 routine.
+;;; Note we use Jc rather than BR as that saves two bytes.  The TST insn always
+;;; sets the C bit.
+	jc	__cmpsi2
+
+.L_top_bit_set_in_A:
+	tst	r15
+;;;  If both A and B have their top bit set we can use the __cmpsi2 routine.
+	jn	__cmpsi2
+;;; Otherwise A has its top bit set and B does not so A > B.
+	jc	.L_greater_than
+
+	.size	__ucmpsi2, . - __ucmpsi2
diff --git a/gcc-4.9/libgcc/config/msp430/epilogue.S b/gcc-4.9/libgcc/config/msp430/epilogue.S
new file mode 100644
index 000000000..93ad0caf1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/epilogue.S
@@ -0,0 +1,51 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+	.text
+
+	.global	__mspabi_func_epilog_7
+	.global	__mspabi_func_epilog_6
+	.global	__mspabi_func_epilog_5
+	.global	__mspabi_func_epilog_4
+	.global	__mspabi_func_epilog_3
+	.global	__mspabi_func_epilog_2
+	.global	__mspabi_func_epilog_1
+
+__mspabi_func_epilog_7:
+	POP	R4
+__mspabi_func_epilog_6:
+	POP	R5
+__mspabi_func_epilog_5:
+	POP	R6
+__mspabi_func_epilog_4:
+	POP	R7
+__mspabi_func_epilog_3:
+	POP	R8
+__mspabi_func_epilog_2:
+	POP	R9
+__mspabi_func_epilog_1:
+	POP	R10
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
diff --git a/gcc-4.9/libgcc/config/msp430/floathidf.c b/gcc-4.9/libgcc/config/msp430/floathidf.c
new file mode 100644
index 000000000..304731d51
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/floathidf.c
@@ -0,0 +1,8 @@
+/* Public domain.  */
+extern double __floatsidf (long);
+
+double
+__floathidf (int u)
+{
+  return __floatsidf ((long)u);
+}
diff --git a/gcc-4.9/libgcc/config/msp430/floathisf.c b/gcc-4.9/libgcc/config/msp430/floathisf.c
new file mode 100644
index 000000000..64e5d805d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/floathisf.c
@@ -0,0 +1,11 @@
+/* Public domain.  */
+typedef int HItype __attribute__ ((mode (HI)));
+typedef float SFtype __attribute__ ((mode (SF)));
+
+extern SFtype __floatsisf (unsigned long);
+
+SFtype
+__floathisf (HItype u)
+{
+  return __floatsisf ((unsigned long)u);
+}
diff --git a/gcc-4.9/libgcc/config/msp430/floatunhidf.c b/gcc-4.9/libgcc/config/msp430/floatunhidf.c
new file mode 100644
index 000000000..f13b55076
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/floatunhidf.c
@@ -0,0 +1,12 @@
+/* Public domain.  */
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+typedef float DFtype __attribute__ ((mode (DF)));
+
+extern DFtype __floatunsidf (unsigned long);
+
+DFtype
+__floatunhidf (UHItype u)
+{
+  return __floatunsidf ((unsigned long)u);
+}
diff --git a/gcc-4.9/libgcc/config/msp430/floatunhisf.c b/gcc-4.9/libgcc/config/msp430/floatunhisf.c
new file mode 100644
index 000000000..ea920bd85
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/floatunhisf.c
@@ -0,0 +1,12 @@
+/* Public domain.  */
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+typedef float SFtype __attribute__ ((mode (SF)));
+
+extern SFtype __floatunsisf (unsigned long);
+
+SFtype
+__floatunhisf (UHItype u)
+{
+  return __floatunsisf ((unsigned long)u);
+}
diff --git a/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c b/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c
new file mode 100644
index 000000000..02c5d58d2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c
@@ -0,0 +1,49 @@
+/* libgcc routines for MSP430
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef          int  sint08_type   __attribute__ ((mode (QI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+/* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
+   msp430.h for why we are creating extra versions of some of the
+   functions defined in libgcc2.c.  */
+
+#define LIBGCC2_UNITS_PER_WORD 2
+
+#define L_clzsi2
+#define L_ctzsi2
+#define L_ffssi2
+#define L_paritysi2
+#define L_popcountsi2
+
+#include "libgcc2.c"
diff --git a/gcc-4.9/libgcc/config/msp430/lib2divHI.c b/gcc-4.9/libgcc/config/msp430/lib2divHI.c
new file mode 100644
index 000000000..287463e1f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2divHI.c
@@ -0,0 +1,42 @@
+/* HI mode divide routines for libgcc for MSP430
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef          int  sint08_type   __attribute__ ((mode (QI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+#define UINT_TYPE	uint16_type
+#define SINT_TYPE	sint16_type
+#define BITS_MINUS_1	15
+#define NAME_MODE	hi
+
+#include "msp430-divmod.h"
diff --git a/gcc-4.9/libgcc/config/msp430/lib2divQI.c b/gcc-4.9/libgcc/config/msp430/lib2divQI.c
new file mode 100644
index 000000000..7e3f4b2d9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2divQI.c
@@ -0,0 +1,43 @@
+/* QI mode divide routines for libgcc for MSP430
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef          int  sint08_type   __attribute__ ((mode (QI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+#define UINT_TYPE	uint08_type
+#define SINT_TYPE	sint08_type
+#define BITS_MINUS_1	7
+#define NAME_MODE	qi
+
+#include "msp430-divmod.h"
+
diff --git a/gcc-4.9/libgcc/config/msp430/lib2divSI.c b/gcc-4.9/libgcc/config/msp430/lib2divSI.c
new file mode 100644
index 000000000..1bd1822d1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2divSI.c
@@ -0,0 +1,42 @@
+/* SI mode divide routines for libgcc for MSP430
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef          int  sint08_type   __attribute__ ((mode (QI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+#define UINT_TYPE	uint32_type
+#define SINT_TYPE	sint32_type
+#define BITS_MINUS_1	31
+#define NAME_MODE	si
+
+#include "msp430-divmod.h"
diff --git a/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S b/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S
new file mode 100644
index 000000000..7c83323ed
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S
@@ -0,0 +1,226 @@
+;   Copyright (C) 2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+.macro start_func name
+	.pushsection .text.\name,"ax",@progbits
+	.align 2
+	.global \name
+	.type \name , @function
+\name:
+	PUSH.W	sr			; Save current interrupt state
+	DINT				; Disable interrupts
+	NOP				; Account for latency
+.endm
+
+.macro end_func name
+#ifdef __MSP430X_LARGE__
+	POP.W  sr
+        RETA
+#else
+	RETI
+#endif
+	.size \name , . - \name
+	.popsection
+.endm
+
+.macro mult16 OP1, OP2, RESULT
+;* * 16-bit hardware multiply:  int16 = int16 * int16
+;*  
+;*   - Operand 1 is in R12
+;*   - Operand 2 is in R13
+;*   - Result is in R12
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry.  Interrupt state is restored upon exit.
+;*
+;*   Registers used:  R12, R13
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+	
+	MOV.W	r12, &\OP1		; Load operand 1 into multiplier
+	MOV.W	r13, &\OP2		; Load operand 2 which triggers MPY
+	MOV.W	&\RESULT, r12		; Move result into return register
+.endm
+
+.macro mult1632 OP1, OP2, RESULT_LO, RESULT_HI
+;* * 16-bit hardware multiply with a 32-bit result:
+;*	int32 = int16 * int16
+;* 	uint32 = uint16 * uint16
+;*  
+;*   - Operand 1 is in R12
+;*   - Operand 2 is in R13
+;*   - Result is in R12, R13
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry.  Interrupt state is restored upon exit.
+;*
+;*   Registers used:  R12, R13
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+	
+	MOV.W	r12, &\OP1		; Load operand 1 into multiplier
+	MOV.W	r13, &\OP2		; Load operand 2 which triggers MPY
+	MOV.W	&\RESULT_LO, r12	; Move low result into return register
+	MOV.W	&\RESULT_HI, r13	; Move high result into return register
+.endm
+
+.macro mult32 OP1, OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI
+;* * 32-bit hardware multiply with a 32-bit result using 16 multiply and accumulate:
+;*	int32 = int32 * int32
+;*  
+;*   - Operand 1 is in R12, R13
+;*   - Operand 2 is in R14, R15
+;*   - Result    is in R12, R13
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry.  Interrupt state is restored upon exit.
+;*
+;*   Registers used:  R12, R13, R14, R15
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+	
+	MOV.W	r12, &\OP1		; Load operand 1 Low into multiplier
+	MOV.W	r14, &\OP2		; Load operand 2 Low which triggers MPY
+	MOV.W	r12, &\MAC_OP1		; Load operand 1 Low into mac
+	MOV.W   &\RESULT_LO, r12	; Low 16-bits of result ready for return
+	MOV.W   &\RESULT_HI, &\RESULT_LO; MOV intermediate mpy high into low
+	MOV.W	r15, &\MAC_OP2		; Load operand 2 High, trigger MAC
+	MOV.W	r13, &\MAC_OP1		; Load operand 1 High
+	MOV.W	r14, &\MAC_OP2		; Load operand 2 Lo, trigger MAC
+	MOV.W	&\RESULT_LO, r13        ; Upper 16-bits result ready for return
+.endm
+
+
+.macro mult32_hw  OP1_LO  OP1_HI  OP2_LO  OP2_HI  RESULT_LO  RESULT_HI
+;* * 32-bit hardware multiply with a 32-bit result
+;*	int32 = int32 * int32
+;*  
+;*   - Operand 1 is in R12, R13
+;*   - Operand 2 is in R14, R15
+;*   - Result    is in R12, R13
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry.  Interrupt state is restored upon exit.
+;*
+;*   Registers used:  R12, R13, R14, R15
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+	
+	MOV.W	r12, &\OP1_LO		; Load operand 1 Low into multiplier
+	MOV.W	r13, &\OP1_HI		; Load operand 1 High into multiplier
+	MOV.W	r14, &\OP2_LO		; Load operand 2 Low into multiplier
+	MOV.W	r15, &\OP2_HI		; Load operand 2 High, trigger MPY
+	MOV.W	&\RESULT_LO, r12	; Ready low 16-bits for return
+	MOV.W   &\RESULT_HI, r13	; Ready high 16-bits for return
+.endm
+
+.macro mult3264_hw  OP1_LO  OP1_HI  OP2_LO  OP2_HI  RES0 RES1 RES2 RES3
+;* * 32-bit hardware multiply with a 64-bit result
+;*	int64 = int32 * int32
+;*	uint64 = uint32 * uint32
+;*  
+;*   - Operand 1 is in R12, R13
+;*   - Operand 2 is in R14, R15
+;*   - Result    is in R12, R13, R14, R15
+;*
+;* To ensure that the multiply is performed atomically, interrupts are
+;* disabled upon routine entry.  Interrupt state is restored upon exit.
+;*
+;*   Registers used:  R12, R13, R14, R15
+;*
+;* Macro arguments are the memory locations of the hardware registers.
+	
+	MOV.W	r12, &\OP1_LO		; Load operand 1 Low into multiplier
+	MOV.W	r13, &\OP1_HI		; Load operand 1 High into multiplier
+	MOV.W	r14, &\OP2_LO		; Load operand 2 Low into multiplier
+	MOV.W	r15, &\OP2_HI		; Load operand 2 High, trigger MPY
+	MOV.W	&\RES0, R12		; Ready low 16-bits for return
+	MOV.W   &\RES1, R13		; 
+	MOV.W	&\RES2, R14		; 
+	MOV.W   &\RES3, R15		; Ready high 16-bits for return
+.endm
+
+
+;;  First generation MSP430 hardware multiplies ....
+
+.set MPY_OP1,   0x0130
+.set MPY_OP1_S, 0x0132
+.set MAC_OP1, 	0x0134
+.set MPY_OP2, 	0x0138
+.set MAC_OP2, 	0x0138
+.set RESULT_LO, 0x013A
+.set RESULT_HI, 0x013C
+	
+	start_func __mulhi2
+	mult16 MPY_OP1, MPY_OP2, RESULT_LO
+	end_func __mulhi2
+
+	start_func __mulsihi2
+	mult1632 MPY_OP1_S, MPY_OP2, RESULT_LO, RESULT_HI
+	end_func __mulsihi2
+
+	start_func __umulsihi2
+	mult1632 MPY_OP1, MPY_OP2, RESULT_LO, RESULT_HI
+	end_func __umulsihi2
+
+	start_func __mulsi2
+	mult32 MPY_OP1, MPY_OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI
+	end_func __mulsi2
+
+	start_func __mulsi2_hw32
+	mult32_hw 0x0140, 0x0142, 0x0150, 0x0152, 0x0154, 0x0156
+	end_func __mulsi2_hw32
+
+	start_func __muldisi2_hw32
+	mult3264_hw 0x0144, 0x146, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A
+	end_func __muldisi2_hw32
+
+	start_func __umuldisi2_hw32
+	mult3264_hw 0x0140, 0x142, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A
+	end_func __umuldisi2_hw32
+	
+/* The F5xxx series of MCUs support the same 16-bit hardware
+   multiply, but it is accessed from different memory registers.  */
+	
+	start_func __mulhi2_f5
+	mult16 0x04C0, 0x04C8, 0x04CA
+	end_func __mulhi2_f5
+
+	start_func __mulsihi2_f5
+	mult1632 0x04C2, 0x04C8, 0x04CA, 0x04CC
+	end_func __mulsihi2_f5
+	
+	start_func __umulsihi2_f5
+	mult1632 0x04C0, 0x04C8, 0x04CA, 0x04CC
+	end_func __umulsihi2_f5
+
+	start_func __mulsi2_f5
+	mult32_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6
+	end_func __mulsi2_f5
+	
+	start_func __muldisi2_f5
+	mult3264_hw 0x04D4, 0x04D6, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA
+	end_func __muldisi2_f5
+	
+	start_func __umuldisi2_f5
+	mult3264_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA
+	end_func __umuldisi2_f5
diff --git a/gcc-4.9/libgcc/config/msp430/lib2mul.c b/gcc-4.9/libgcc/config/msp430/lib2mul.c
new file mode 100644
index 000000000..1a36af56b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2mul.c
@@ -0,0 +1,58 @@
+/* libgcc routines for MSP430
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+
+#define UINT_TYPE	uint16_type
+#define BITS_MINUS_1	15
+#define NAME_MODE	hi
+
+#include "msp430-mul.h"
+
+#undef UINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint08_type
+#define BITS_MINUS_1	7
+#define NAME_MODE	qi
+
+#include "msp430-mul.h"
+
+#undef UINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint32_type
+#define BITS_MINUS_1	31
+#define NAME_MODE	si
+
+#include "msp430-mul.h"
diff --git a/gcc-4.9/libgcc/config/msp430/lib2shift.c b/gcc-4.9/libgcc/config/msp430/lib2shift.c
new file mode 100644
index 000000000..472247836
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/lib2shift.c
@@ -0,0 +1,113 @@
+/* Shift functions for the GCC support library for the MSP430
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+
+uint32_type __ashlsi3 (uint32_type in, char bit);
+sint32_type __ashrsi3 (sint32_type in, char bit);
+int __clrsbhi2 (sint16_type x);
+extern int __clrsbsi2 (sint32_type x);
+
+typedef struct
+{
+  union
+  {
+    uint32_type u;
+    uint16_type h[2];
+  } u;
+} dd;
+
+uint32_type
+__ashlsi3 (uint32_type in, char bit)
+{
+  uint16_type h, l;
+  dd d;
+
+  if (bit > 32)
+    return 0;
+  if (bit < 0)
+    return in;
+
+  d.u.u = in;
+  h = d.u.h[1];
+  l = d.u.h[0];
+
+  if (bit > 15)
+    {
+      h = l;
+      l = 0;
+      bit -= 16;
+    }
+
+  while (bit)
+    {
+      h = (h << 1) | (l >> 15);
+      l <<= 1;
+      bit --;
+    }
+
+  d.u.h[1] = h;
+  d.u.h[0] = l;
+  return d.u.u;
+}
+
+sint32_type
+__ashrsi3 (sint32_type in, char bit)
+{
+  sint16_type h;
+  uint16_type l;
+  dd d;
+
+  if (bit > 32)
+    return 0;
+  if (bit < 0)
+    return in;
+
+  d.u.u = in;
+  h = d.u.h[1];
+  l = d.u.h[0];
+
+  while (bit)
+    {
+      l = (h << 15) | (l >> 1);
+      h >>= 1;
+      bit --;
+    }
+
+  d.u.h[1] = h;
+  d.u.h[0] = l;
+  return d.u.u;
+}
+
+int
+__clrsbhi2 (sint16_type x)
+{
+  if (x == 0)
+    return 15;
+  return __clrsbsi2 ((sint32_type) x) - 16;
+}
diff --git a/gcc-4.9/libgcc/config/msp430/mpy.c b/gcc-4.9/libgcc/config/msp430/mpy.c
new file mode 100644
index 000000000..57cffd0ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/mpy.c
@@ -0,0 +1,15 @@
+/* Public domain.  */
+extern int __mulhi3 (int, int);
+
+int
+__mulhi3 (int x, int y)
+{
+  volatile int rv = 0;
+
+  while (y > 0)
+    {
+      rv += x;
+      y --;
+    }
+  return rv;
+}
diff --git a/gcc-4.9/libgcc/config/msp430/msp430-divmod.h b/gcc-4.9/libgcc/config/msp430/msp430-divmod.h
new file mode 100644
index 000000000..8e482a661
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/msp430-divmod.h
@@ -0,0 +1,117 @@
+/* libgcc routines for MSP430
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+UINT_TYPE C3(udivmod,NAME_MODE,4) (UINT_TYPE, UINT_TYPE, word_type);
+SINT_TYPE C3(__div,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
+SINT_TYPE C3(__mod,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
+UINT_TYPE C3(__udiv,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
+UINT_TYPE C3(__umod,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
+
+UINT_TYPE
+C3(udivmod,NAME_MODE,4) (UINT_TYPE num, UINT_TYPE den, word_type modwanted)
+{
+  UINT_TYPE bit = 1;
+  UINT_TYPE res = 0;
+
+  while (den < num && bit && !(den & (1L << BITS_MINUS_1)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
+
+SINT_TYPE
+C3(__div,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
+{
+  word_type neg = 0;
+  SINT_TYPE res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = C3(udivmod,NAME_MODE,4) (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+SINT_TYPE
+C3(__mod,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
+{
+  word_type neg = 0;
+  SINT_TYPE res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = C3(udivmod,NAME_MODE,4) (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+UINT_TYPE
+C3(__udiv,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  return C3(udivmod,NAME_MODE,4) (a, b, 0);
+}
+
+UINT_TYPE
+C3(__umod,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  return C3(udivmod,NAME_MODE,4) (a, b, 1);
+}
diff --git a/gcc-4.9/libgcc/config/msp430/msp430-mul.h b/gcc-4.9/libgcc/config/msp430/msp430-mul.h
new file mode 100644
index 000000000..29e72a8a7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/msp430-mul.h
@@ -0,0 +1,42 @@
+/* libgcc routines for RL78
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+UINT_TYPE C3(__mul,NAME_MODE,3)   (UINT_TYPE, UINT_TYPE);
+UINT_TYPE
+C3(__mul,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  UINT_TYPE rv = 0;
+
+  char bit;
+
+  for (bit=0; b && bit<sizeof(UINT_TYPE)*8; bit++)
+    {
+      if (b & 1)
+	rv += a;
+      a <<= 1;
+      b >>= 1;
+    }
+  return rv;
+}
diff --git a/gcc-4.9/libgcc/config/msp430/slli.S b/gcc-4.9/libgcc/config/msp430/slli.S
new file mode 100644
index 000000000..98210fb87
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/slli.S
@@ -0,0 +1,108 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+	
+	.text
+
+/* Logical Left Shift - R12 -> R12 */
+
+	.macro	_slli n
+	.global __mspabi_slli_\n
+__mspabi_slli_\n:
+	ADD.W	R12,R12
+	.endm
+
+	_slli	15
+	_slli	14
+	_slli	13
+	_slli	12
+	_slli	11
+	_slli	10
+	_slli	9
+	_slli	8
+	_slli	7
+	_slli	6
+	_slli	5
+	_slli	4
+	_slli	3
+	_slli	2
+	_slli	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R13
+	ADD.W	R12,R12
+	.global	__mspabi_slli
+__mspabi_slli:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+/* Logical Left Shift - R12:R13 -> R12:R13 */
+
+	.macro	_slll	n
+	.global	__mspabi_slll_\n
+__mspabi_slll_\n:
+	ADD.W	R12,R12
+	ADDC.W	R13,R13
+	.endm
+
+	_slll	15
+	_slll	14
+	_slll	13
+	_slll	12
+	_slll	11
+	_slll	10
+	_slll	9
+	_slll	8
+	_slll	7
+	_slll	6
+	_slll	5
+	_slll	4
+	_slll	3
+	_slll	2
+	_slll	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R14
+	ADD.W	R12,R12
+	ADDC.W	R13,R13
+	.global	__mspabi_slll
+__mspabi_slll:
+	CMP	#0,R14
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
diff --git a/gcc-4.9/libgcc/config/msp430/srai.S b/gcc-4.9/libgcc/config/msp430/srai.S
new file mode 100644
index 000000000..3a7bf52ba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/srai.S
@@ -0,0 +1,106 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+	
+	.text
+
+	.macro	_srai n
+	.global __mspabi_srai_\n
+__mspabi_srai_\n:
+	RRA.W	R12
+	.endm
+
+/* Logical Right Shift - R12 -> R12 */
+	_srai	15
+	_srai	14
+	_srai	13
+	_srai	12
+	_srai	11
+	_srai	10
+	_srai	9
+	_srai	8
+	_srai	7
+	_srai	6
+	_srai	5
+	_srai	4
+	_srai	3
+	_srai	2
+	_srai	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R13
+	RRA.W	R12,R12
+	.global	__mspabi_srai
+__mspabi_srai:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+/* Logical Right Shift - R12:R13 -> R12:R13 */
+
+	.macro	_sral	n
+	.global	__mspabi_sral_\n
+__mspabi_sral_\n:
+	RRA.W	R13
+	RRC.W	R12
+	.endm
+
+	_sral	15
+	_sral	14
+	_sral	13
+	_sral	12
+	_sral	11
+	_sral	10
+	_sral	9
+	_sral	8
+	_sral	7
+	_sral	6
+	_sral	5
+	_sral	4
+	_sral	3
+	_sral	2
+	_sral	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R14
+	RRA.W	R13
+	RRC.W	R12
+	.global	__mspabi_sral
+__mspabi_sral:
+	CMP	#0,R14
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
diff --git a/gcc-4.9/libgcc/config/msp430/srli.S b/gcc-4.9/libgcc/config/msp430/srli.S
new file mode 100644
index 000000000..9455f5948
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/srli.S
@@ -0,0 +1,110 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+	
+	.text
+
+	.macro	_srli n
+	.global __mspabi_srli_\n
+__mspabi_srli_\n:
+	CLRC
+	RRC.W	R12
+	.endm
+
+/* Logical Right Shift - R12 -> R12 */
+	_srli	15
+	_srli	14
+	_srli	13
+	_srli	12
+	_srli	11
+	_srli	10
+	_srli	9
+	_srli	8
+	_srli	7
+	_srli	6
+	_srli	5
+	_srli	4
+	_srli	3
+	_srli	2
+	_srli	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R13
+	CLRC
+	RRC.W	R12,R12
+	.global	__mspabi_srli
+__mspabi_srli:
+	CMP	#0,R13
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+/* Logical Right Shift - R12:R13 -> R12:R13 */
+
+	.macro	_srll	n
+	.global	__mspabi_srll_\n
+__mspabi_srll_\n:
+	CLRC
+	RRC.W	R13
+	RRC.W	R12
+	.endm
+
+	_srll	15
+	_srll	14
+	_srll	13
+	_srll	12
+	_srll	11
+	_srll	10
+	_srll	9
+	_srll	8
+	_srll	7
+	_srll	6
+	_srll	5
+	_srll	4
+	_srll	3
+	_srll	2
+	_srll	1
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
+
+1:	ADD.W	#-1,R14
+	CLRC
+	RRC.W	R13
+	RRC.W	R12
+	.global	__mspabi_srll
+__mspabi_srll:
+	CMP	#0,R14
+	JNZ	1b
+#ifdef __MSP430X_LARGE__
+	RETA
+#else
+	RET
+#endif
diff --git a/gcc-4.9/libgcc/config/msp430/t-msp430 b/gcc-4.9/libgcc/config/msp430/t-msp430
new file mode 100644
index 000000000..7a7b68007
--- /dev/null
+++ b/gcc-4.9/libgcc/config/msp430/t-msp430
@@ -0,0 +1,49 @@
+# Makefile fragment for building LIBGCC for the TI MSP430 processor.
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Red Hat.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Note - we have separate versions of the lib2div<mode> files
+# as the functions are quite large and we do not want to pull
+# in unneeded division routines.
+
+LIB2ADD = \
+	$(srcdir)/config/msp430/lib2divQI.c \
+	$(srcdir)/config/msp430/lib2divHI.c \
+	$(srcdir)/config/msp430/lib2divSI.c \
+	$(srcdir)/config/msp430/lib2bitcountHI.c \
+	$(srcdir)/config/msp430/lib2mul.c \
+	$(srcdir)/config/msp430/lib2shift.c \
+	$(srcdir)/config/msp430/epilogue.S \
+	$(srcdir)/config/msp430/mpy.c \
+	$(srcdir)/config/msp430/slli.S \
+	$(srcdir)/config/msp430/srai.S \
+	$(srcdir)/config/msp430/srli.S \
+	$(srcdir)/config/msp430/cmpsi2.S \
+	$(srcdir)/config/msp430/lib2hw_mul.S \
+	$(srcdir)/config/msp430/floatunhisf.c \
+	$(srcdir)/config/msp430/floatunhidf.c \
+	$(srcdir)/config/msp430/floathidf.c \
+	$(srcdir)/config/msp430/floathisf.c \
+	$(srcdir)/config/msp430/cmpd.c
+
+HOST_LIBGCC2_CFLAGS += -Os -ffunction-sections -fdata-sections
+
+# Local Variables:
+# mode: Makefile
+# End:
diff --git a/gcc-4.9/libgcc/config/nds32/crtzero.S b/gcc-4.9/libgcc/config/nds32/crtzero.S
new file mode 100644
index 000000000..7ffd347ed
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/crtzero.S
@@ -0,0 +1,103 @@
+/* The startup code sample of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+!!==============================================================================
+!!
+!!      crtzero.S
+!!
+!!      This is JUST A SAMPLE of nds32 startup code !!
+!!      You can refer this content and implement
+!!      the actual one in newlib/mculib.
+!!
+!!==============================================================================
+
+!!------------------------------------------------------------------------------
+!! Jump to start up code
+!!------------------------------------------------------------------------------
+	.section	.nds32_init, "ax"
+	j	_start
+
+!!------------------------------------------------------------------------------
+!! Startup code implementation
+!!------------------------------------------------------------------------------
+	.section	.text
+	.global	_start
+	.weak	_SDA_BASE_
+	.weak	_FP_BASE_
+	.align	2
+	.func	_start
+	.type	_start, @function
+_start:
+.L_fp_gp_lp_init:
+	la	$fp, _FP_BASE_		! init $fp
+	la	$gp, _SDA_BASE_		! init $gp for small data access
+	movi	$lp, 0			! init $lp
+
+.L_stack_init:
+	la	$sp, _stack		! init $sp
+	movi	$r0, -8			! align $sp to 8-byte (use 0xfffffff8)
+	and	$sp, $sp, $r0		! align $sp to 8-byte (filter out lower 3-bit)
+
+.L_bss_init:
+	! clear BSS, this process can be 4 time faster if data is 4 byte aligned
+	! if so, use swi.p instead of sbi.p
+	! the related stuff are defined in linker script
+	la	$r0, _edata		! get the starting addr of bss
+	la	$r2, _end		! get ending addr of bss
+	beq	$r0, $r2, .L_call_main	! if no bss just do nothing
+	movi	$r1, 0			! should be cleared to 0
+.L_clear_bss:
+	sbi.p	$r1, [$r0], 1		! Set 0 to bss
+	bne	$r0, $r2, .L_clear_bss	! Still bytes left to set
+
+!.L_stack_heap_check:
+!	la	$r0, _end		! init heap_end
+!	s.w	$r0, heap_end		! save it
+
+
+!.L_init_argc_argv:
+!	! argc/argv initialization if necessary; default implementation is in crt1.o
+!	la	$r9, _arg_init		! load address of _arg_init?
+!	beqz	$r9, .L4		! has _arg_init? no, go check main()
+!	addi	$sp, $sp, -512		! allocate space for command line + arguments
+!	move	$r6, $sp		! r6 = buffer addr of cmd line
+!	move	$r0, $r6		! r0 = buffer addr of cmd line
+!	syscall	6002			! get cmd line
+!	move	$r0, $r6		! r0 = buffer addr of cmd line
+!	addi	$r1, $r6, 256		! r1 = argv
+!	jral	$r9			! init argc/argv
+!	addi	$r1, $r6, 256		! r1 = argv
+
+.L_call_main:
+	! call main() if main() is provided
+	la	$r15, main		! load address of main
+	jral	$r15			! call main
+
+.L_terminate_program:
+	syscall	0x1			! use syscall 0x1 to terminate program
+	.size	_start, .-_start
+	.end
+
+!! ------------------------------------------------------------------------
diff --git a/gcc-4.9/libgcc/config/nds32/initfini.c b/gcc-4.9/libgcc/config/nds32/initfini.c
new file mode 100644
index 000000000..7d84fee22
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/initfini.c
@@ -0,0 +1,159 @@
+/* .init/.fini section handling + C++ global constructor/destructor
+   handling of Andes NDS32 cpu for GNU compiler.
+   This file is based on crtstuff.c, sol2-crti.asm, sol2-crtn.asm.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/*  Declare a pointer to void function type.  */
+typedef void (*func_ptr) (void);
+
+#ifdef CRT_BEGIN
+
+/* NOTE:  In order to be able to support SVR4 shared libraries, we arrange
+   to have one set of symbols { __CTOR_LIST__, __DTOR_LIST__, __CTOR_END__,
+   __DTOR_END__ } per root executable and also one set of these symbols
+   per shared library.  So in any given whole process image, we may have
+   multiple definitions of each of these symbols.  In order to prevent
+   these definitions from conflicting with one another, and in order to
+   ensure that the proper lists are used for the initialization/finalization
+   of each individual shared library (respectively), we give these symbols
+   only internal (i.e. `static') linkage, and we also make it a point to
+   refer to only the __CTOR_END__ symbol in crtfini.o and the __DTOR_LIST__
+   symbol in crtinit.o, where they are defined.  */
+
+static func_ptr __CTOR_LIST__[1] __attribute__ ((section (".ctors")))
+     = { (func_ptr) (-1) };
+
+static func_ptr __DTOR_LIST__[1] __attribute__ ((section (".dtors")))
+     = { (func_ptr) (-1) };
+
+/* Run all the global destructors on exit from the program.  */
+
+/* Some systems place the number of pointers in the first word of the
+   table.  On SVR4 however, that word is -1.  In all cases, the table is
+   null-terminated.  On SVR4, we start from the beginning of the list and
+   invoke each per-compilation-unit destructor routine in order
+   until we find that null.
+
+   Note that this function MUST be static.  There will be one of these
+   functions in each root executable and one in each shared library, but
+   although they all have the same code, each one is unique in that it
+   refers to one particular associated `__DTOR_LIST__' which belongs to the
+   same particular root executable or shared library file.  */
+
+static void __do_global_dtors (void)
+asm ("__do_global_dtors") __attribute__ ((section (".text")));
+
+static void
+__do_global_dtors (void)
+{
+  func_ptr *p;
+  for (p = __DTOR_LIST__ + 1; *p; p++)
+    (*p) ();
+}
+
+/* .init section start.
+   This must appear at the start of the .init section.  */
+
+asm ("\n\
+	.section .init\n\
+	.global _init\n\
+	.type	_init, @function\n\
+_init:\n\
+	! 1. store $fp\n\
+	! 2. adjust $fp by $sp\n\
+	! 3. adjust $sp\n\
+");
+
+/* .fini section start.
+   This must appear at the start of the .fini section.  */
+
+asm ("\n\
+	.section .fini\n\
+	.global _fini\n\
+	.type	_fini, @function\n\
+_fini:\n\
+	! 1. store $fp\n\
+	! 2. adjust $fp by $sp\n\
+	! 3. adjust $sp\n\
+	! 4. call __do_global_dtors\n\
+	j	__do_global_dtors\n\
+");
+
+#endif /* CRT_BEGIN */
+
+#ifdef CRT_END
+
+/* Define __dso_handle which would be needed for C++ library.
+   Since our elf-toolchain only builds programs with static link,
+   we can directly define 'void *__dso_handle = 0'.  */
+void *__dso_handle = 0;
+
+/* Put a word containing zero at the end of each of our two lists of function
+   addresses.  Note that the words defined here go into the .ctors and .dtors
+   sections of the crtend.o file, and since that file is always linked in
+   last, these words naturally end up at the very ends of the two lists
+   contained in these two sections.  */
+
+static func_ptr __CTOR_END__[1] __attribute__ ((section (".ctors")))
+     = { (func_ptr) 0 };
+
+static func_ptr __DTOR_END__[1] __attribute__ ((section (".dtors")))
+     = { (func_ptr) 0 };
+
+/* Run all global constructors for the program.
+   Note that they are run in reverse order.  */
+
+static void __do_global_ctors (void)
+asm ("__do_global_ctors") __attribute__ ((section (".text")));
+
+static void
+__do_global_ctors (void)
+{
+  func_ptr *p;
+  for (p = __CTOR_END__ - 1; *p != (func_ptr) -1; p--)
+    (*p) ();
+}
+
+/* .init section end.
+   This must live at the end of the .init section.  */
+
+asm ("\n\
+	.section .init\n\
+	! 1. call __do_global_ctors\n\
+	! 2. adjust back $sp\n\
+	! 3. restore $fp\n\
+	j	__do_global_ctors\n\
+");
+
+/* .fini section end.
+   This must live at the end of the .fini section.  */
+
+asm ("\n\
+	.section .fini\n\
+	! 1. adjust back $sp\n\
+	! 2. restore $fp\n\
+");
+
+#endif /* CRT_END */
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/adj_intr_lvl.inc b/gcc-4.9/libgcc/config/nds32/isr-library/adj_intr_lvl.inc
new file mode 100644
index 000000000..b264f9bf2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/adj_intr_lvl.inc
@@ -0,0 +1,38 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro ADJ_INTR_LVL
+#if defined(NDS32_NESTED) /* Nested handler.  */
+	mfsr	$r3, $PSW
+	addi	$r3, $r3, #-0x1
+	mtsr	$r3, $PSW
+#elif defined(NDS32_NESTED_READY) /* Nested ready handler.  */
+	/* Save ipc and ipsw and lower INT level.  */
+	mfsr	$r3, $PSW
+	addi	$r3, $r3, #-0x2
+	mtsr	$r3, $PSW
+#else /* Not nested handler.  */
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr.S b/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr.S
new file mode 100644
index 000000000..c9da7325e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr.S
@@ -0,0 +1,132 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "save_mac_regs.inc"
+#include "save_fpu_regs.inc"
+#include "save_fpu_regs_00.inc"
+#include "save_fpu_regs_01.inc"
+#include "save_fpu_regs_02.inc"
+#include "save_fpu_regs_03.inc"
+#include "save_all.inc"
+#include "save_partial.inc"
+#include "adj_intr_lvl.inc"
+#include "restore_mac_regs.inc"
+#include "restore_fpu_regs_00.inc"
+#include "restore_fpu_regs_01.inc"
+#include "restore_fpu_regs_02.inc"
+#include "restore_fpu_regs_03.inc"
+#include "restore_fpu_regs.inc"
+#include "restore_all.inc"
+#include "restore_partial.inc"
+	.section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
+	.align	1
+/*
+  First Level Handlers
+  1. First Level Handlers are invokded in vector section via jump instruction
+  with specific names for different configurations.
+  2. Naming Format: _nds32_e_SR_NT for exception handlers.
+		    _nds32_i_SR_NT for interrupt handlers.
+  2.1 All upper case letters are replaced with specific lower case letters encodings.
+  2.2 SR: Saved Registers
+      sa: Save All regs (context)
+      ps: Partial Save (all caller-saved regs)
+  2.3 NT: Nested Type
+      ns: nested
+      nn: not nested
+      nr: nested ready
+*/
+
+/*
+  This is original 16-byte vector size version.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.globl	_nds32_e_sa_ns
+	.type	_nds32_e_sa_ns, @function
+_nds32_e_sa_ns:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_e_sa_nr
+	.type	_nds32_e_sa_nr, @function
+_nds32_e_sa_nr:
+#else /* Not nested handler. */
+	.globl	_nds32_e_sa_nn
+	.type	_nds32_e_sa_nn, @function
+_nds32_e_sa_nn:
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.globl	_nds32_e_ps_ns
+	.type	_nds32_e_ps_ns, @function
+_nds32_e_ps_ns:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_e_ps_nr
+	.type	_nds32_e_ps_nr, @function
+_nds32_e_ps_nr:
+#else /* Not nested handler. */
+	.globl	_nds32_e_ps_nn
+	.type	_nds32_e_ps_nn, @function
+_nds32_e_ps_nn:
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
+
+/*
+  This is 16-byte vector size version.
+  The vector id was restored into $r0 in vector by compiler.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+        SAVE_ALL
+#else
+        SAVE_PARTIAL
+#endif
+	/* Prepare to call 2nd level handler. */
+	la	$r2, _nds32_jmptbl_00
+	lw	$r2, [$r2 + $r0 << #2]
+	ADJ_INTR_LVL	/* Adjust INTR level. $r3 is clobbered.  */
+	jral    $r2
+	/* Restore used registers. */
+#ifdef NDS32_SAVE_ALL_REGS
+	RESTORE_ALL
+#else
+	RESTORE_PARTIAL
+#endif
+	iret
+
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.size	_nds32_e_sa_ns, .-_nds32_e_sa_ns
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_e_sa_nr, .-_nds32_e_sa_nr
+#else /* Not nested handler. */
+	.size	_nds32_e_sa_nn, .-_nds32_e_sa_nn
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.size	_nds32_e_ps_ns, .-_nds32_e_ps_ns
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_e_ps_nr, .-_nds32_e_ps_nr
+#else /* Not nested handler. */
+	.size	_nds32_e_ps_nn, .-_nds32_e_ps_nn
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr_4b.S
new file mode 100644
index 000000000..12074488f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/excp_isr_4b.S
@@ -0,0 +1,133 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "save_mac_regs.inc"
+#include "save_fpu_regs.inc"
+#include "save_fpu_regs_00.inc"
+#include "save_fpu_regs_01.inc"
+#include "save_fpu_regs_02.inc"
+#include "save_fpu_regs_03.inc"
+#include "save_all.inc"
+#include "save_partial.inc"
+#include "adj_intr_lvl.inc"
+#include "restore_mac_regs.inc"
+#include "restore_fpu_regs_00.inc"
+#include "restore_fpu_regs_01.inc"
+#include "restore_fpu_regs_02.inc"
+#include "restore_fpu_regs_03.inc"
+#include "restore_fpu_regs.inc"
+#include "restore_all.inc"
+#include "restore_partial.inc"
+	.section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
+	.align	1
+/*
+  First Level Handlers
+  1. First Level Handlers are invokded in vector section via jump instruction
+  with specific names for different configurations.
+  2. Naming Format: _nds32_e_SR_NT for exception handlers.
+		    _nds32_i_SR_NT for interrupt handlers.
+  2.1 All upper case letters are replaced with specific lower case letters encodings.
+  2.2 SR: Saved Registers
+      sa: Save All regs (context)
+      ps: Partial Save (all caller-saved regs)
+  2.3 NT: Nested Type
+      ns: nested
+      nn: not nested
+      nr: nested ready
+*/
+
+/*
+  This is 4-byte vector size version.
+  The "_4b" postfix was added for 4-byte version symbol.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.globl	_nds32_e_sa_ns_4b
+	.type	_nds32_e_sa_ns_4b, @function
+_nds32_e_sa_ns_4b:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_e_sa_nr_4b
+	.type	_nds32_e_sa_nr_4b, @function
+_nds32_e_sa_nr_4b:
+#else /* Not nested handler. */
+	.globl	_nds32_e_sa_nn_4b
+	.type	_nds32_e_sa_nn_4b, @function
+_nds32_e_sa_nn_4b:
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.globl	_nds32_e_ps_ns_4b
+	.type	_nds32_e_ps_ns_4b, @function
+_nds32_e_ps_ns_4b:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_e_ps_nr_4b
+	.type	_nds32_e_ps_nr_4b, @function
+_nds32_e_ps_nr_4b:
+#else /* Not nested handler. */
+	.globl	_nds32_e_ps_nn_4b
+	.type	_nds32_e_ps_nn_4b, @function
+_nds32_e_ps_nn_4b:
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
+
+/*
+  This is 4-byte vector size version.
+  The vector id was restored into $lp in vector by compiler.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+	SAVE_ALL_4B
+#else
+	SAVE_PARTIAL_4B
+#endif
+	/* Prepare to call 2nd level handler. */
+	la	$r2, _nds32_jmptbl_00
+	lw	$r2, [$r2 + $r0 << #2]
+	ADJ_INTR_LVL	/* Adjust INTR level. $r3 is clobbered.  */
+	jral    $r2
+	/* Restore used registers. */
+#ifdef NDS32_SAVE_ALL_REGS
+	RESTORE_ALL
+#else
+	RESTORE_PARTIAL
+#endif
+	iret
+
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.size	_nds32_e_sa_ns_4b, .-_nds32_e_sa_ns_4b
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_e_sa_nr_4b, .-_nds32_e_sa_nr_4b
+#else /* Not nested handler. */
+	.size	_nds32_e_sa_nn_4b, .-_nds32_e_sa_nn_4b
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.size	_nds32_e_ps_ns_4b, .-_nds32_e_ps_ns_4b
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_e_ps_nr_4b, .-_nds32_e_ps_nr_4b
+#else /* Not nested handler. */
+	.size	_nds32_e_ps_nn_4b, .-_nds32_e_ps_nn_4b
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr.S b/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr.S
new file mode 100644
index 000000000..fe7433725
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr.S
@@ -0,0 +1,132 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "save_mac_regs.inc"
+#include "save_fpu_regs.inc"
+#include "save_fpu_regs_00.inc"
+#include "save_fpu_regs_01.inc"
+#include "save_fpu_regs_02.inc"
+#include "save_fpu_regs_03.inc"
+#include "save_all.inc"
+#include "save_partial.inc"
+#include "adj_intr_lvl.inc"
+#include "restore_mac_regs.inc"
+#include "restore_fpu_regs_00.inc"
+#include "restore_fpu_regs_01.inc"
+#include "restore_fpu_regs_02.inc"
+#include "restore_fpu_regs_03.inc"
+#include "restore_fpu_regs.inc"
+#include "restore_all.inc"
+#include "restore_partial.inc"
+	.section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
+	.align	1
+/*
+  First Level Handlers
+  1. First Level Handlers are invokded in vector section via jump instruction
+  with specific names for different configurations.
+  2. Naming Format: _nds32_e_SR_NT for exception handlers.
+		    _nds32_i_SR_NT for interrupt handlers.
+  2.1 All upper case letters are replaced with specific lower case letters encodings.
+  2.2 SR: Saved Registers
+      sa: Save All regs (context)
+      ps: Partial Save (all caller-saved regs)
+  2.3 NT: Nested Type
+      ns: nested
+      nn: not nested
+      nr: nested ready
+*/
+
+/*
+  This is original 16-byte vector size version.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.globl	_nds32_i_sa_ns
+	.type	_nds32_i_sa_ns, @function
+_nds32_i_sa_ns:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_i_sa_nr
+	.type	_nds32_i_sa_nr, @function
+_nds32_i_sa_nr:
+#else /* Not nested handler. */
+	.globl	_nds32_i_sa_nn
+	.type	_nds32_i_sa_nn, @function
+_nds32_i_sa_nn:
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.globl	_nds32_i_ps_ns
+	.type	_nds32_i_ps_ns, @function
+_nds32_i_ps_ns:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_i_ps_nr
+	.type	_nds32_i_ps_nr, @function
+_nds32_i_ps_nr:
+#else /* Not nested handler. */
+	.globl	_nds32_i_ps_nn
+	.type	_nds32_i_ps_nn, @function
+_nds32_i_ps_nn:
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
+
+/*
+  This is 16-byte vector size version.
+  The vector id was restored into $r0 in vector by compiler.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+        SAVE_ALL
+#else
+        SAVE_PARTIAL
+#endif
+	/* Prepare to call 2nd level handler. */
+	la	$r2, _nds32_jmptbl_09	/* For zero-based vcetor id.  */
+	lw	$r2, [$r2 + $r0 << #2]
+	ADJ_INTR_LVL	/* Adjust INTR level. $r3 is clobbered.  */
+	jral    $r2
+	/* Restore used registers. */
+#ifdef NDS32_SAVE_ALL_REGS
+	RESTORE_ALL
+#else
+	RESTORE_PARTIAL
+#endif
+	iret
+
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.size	_nds32_i_sa_ns, .-_nds32_i_sa_ns
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_i_sa_nr, .-_nds32_i_sa_nr
+#else /* Not nested handler. */
+	.size	_nds32_i_sa_nn, .-_nds32_i_sa_nn
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.size	_nds32_i_ps_ns, .-_nds32_i_ps_ns
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_i_ps_nr, .-_nds32_i_ps_nr
+#else /* Not nested handler. */
+	.size	_nds32_i_ps_nn, .-_nds32_i_ps_nn
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr_4b.S
new file mode 100644
index 000000000..8fc6f2bf4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/intr_isr_4b.S
@@ -0,0 +1,134 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "save_mac_regs.inc"
+#include "save_fpu_regs.inc"
+#include "save_fpu_regs_00.inc"
+#include "save_fpu_regs_01.inc"
+#include "save_fpu_regs_02.inc"
+#include "save_fpu_regs_03.inc"
+#include "save_all.inc"
+#include "save_partial.inc"
+#include "adj_intr_lvl.inc"
+#include "restore_mac_regs.inc"
+#include "restore_fpu_regs_00.inc"
+#include "restore_fpu_regs_01.inc"
+#include "restore_fpu_regs_02.inc"
+#include "restore_fpu_regs_03.inc"
+#include "restore_fpu_regs.inc"
+#include "restore_all.inc"
+#include "restore_partial.inc"
+	.section .nds32_isr, "ax"       /* Put it in the section of 1st level handler. */
+	.align	1
+/*
+  First Level Handlers
+  1. First Level Handlers are invokded in vector section via jump instruction
+  with specific names for different configurations.
+  2. Naming Format: _nds32_e_SR_NT for exception handlers.
+		    _nds32_i_SR_NT for interrupt handlers.
+  2.1 All upper case letters are replaced with specific lower case letters encodings.
+  2.2 SR: Saved Registers
+      sa: Save All regs (context)
+      ps: Partial Save (all caller-saved regs)
+  2.3 NT: Nested Type
+      ns: nested
+      nn: not nested
+      nr: nested ready
+*/
+
+/*
+  This is 4-byte vector size version.
+  The "_4b" postfix was added for 4-byte version symbol.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.globl	_nds32_i_sa_ns_4b
+	.type	_nds32_i_sa_ns_4b, @function
+_nds32_i_sa_ns_4b:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_i_sa_nr_4b
+	.type	_nds32_i_sa_nr_4b, @function
+_nds32_i_sa_nr_4b:
+#else /* Not nested handler. */
+	.globl	_nds32_i_sa_nn_4b
+	.type	_nds32_i_sa_nn_4b, @function
+_nds32_i_sa_nn_4b:
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.globl	_nds32_i_ps_ns_4b
+	.type	_nds32_i_ps_ns_4b, @function
+_nds32_i_ps_ns_4b:
+#elif defined(NDS32_NESTED_READY)
+	.globl	_nds32_i_ps_nr_4b
+	.type	_nds32_i_ps_nr_4b, @function
+_nds32_i_ps_nr_4b:
+#else /* Not nested handler. */
+	.globl	_nds32_i_ps_nn_4b
+	.type	_nds32_i_ps_nn_4b, @function
+_nds32_i_ps_nn_4b:
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
+
+/*
+  This is 4-byte vector size version.
+  The vector id was restored into $lp in vector by compiler.
+*/
+#ifdef NDS32_SAVE_ALL_REGS
+	SAVE_ALL_4B
+#else
+        SAVE_PARTIAL_4B
+#endif
+	/* Prepare to call 2nd level handler. */
+	la	$r2, _nds32_jmptbl_00
+	lw	$r2, [$r2 + $r0 << #2]
+	addi    $r0, $r0, #-9	/* Make interrput vector id zero-based.  */
+	ADJ_INTR_LVL	/* Adjust INTR level. $r3 is clobbered.  */
+	jral    $r2
+	/* Restore used registers. */
+#ifdef NDS32_SAVE_ALL_REGS
+	RESTORE_ALL
+#else
+	RESTORE_PARTIAL
+#endif
+	iret
+
+#ifdef NDS32_SAVE_ALL_REGS
+#if defined(NDS32_NESTED)
+	.size	_nds32_i_sa_ns_4b, .-_nds32_i_sa_ns_4b
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_i_sa_nr_4b, .-_nds32_i_sa_nr_4b
+#else /* Not nested handler. */
+	.size	_nds32_i_sa_nn_4b, .-_nds32_i_sa_nn_4b
+#endif /* endif for Nest Type */
+#else /* not NDS32_SAVE_ALL_REGS */
+#if defined(NDS32_NESTED)
+	.size	_nds32_i_ps_ns_4b, .-_nds32_i_ps_ns_4b
+#elif defined(NDS32_NESTED_READY)
+	.size	_nds32_i_ps_nr_4b, .-_nds32_i_ps_nr_4b
+#else /* Not nested handler. */
+	.size	_nds32_i_ps_nn_4b, .-_nds32_i_ps_nn_4b
+#endif /* endif for Nest Type */
+#endif /* not NDS32_SAVE_ALL_REGS */
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid00.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid00.S
new file mode 100644
index 000000000..109369eff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid00.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.00, "a"
+	.align	2
+	.weak	_nds32_jmptbl_00
+	.type	_nds32_jmptbl_00, @object
+_nds32_jmptbl_00:
+	.word	0
+	.size	_nds32_jmptbl_00, .-_nds32_jmptbl_00
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid01.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid01.S
new file mode 100644
index 000000000..49fd97657
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid01.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.01, "a"
+	.align	2
+	.weak	_nds32_jmptbl_01
+	.type	_nds32_jmptbl_01, @object
+_nds32_jmptbl_01:
+	.word	0
+	.size	_nds32_jmptbl_01, .-_nds32_jmptbl_01
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid02.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid02.S
new file mode 100644
index 000000000..61f9d5e9b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid02.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.02, "a"
+	.align	2
+	.weak	_nds32_jmptbl_02
+	.type	_nds32_jmptbl_02, @object
+_nds32_jmptbl_02:
+	.word	0
+	.size	_nds32_jmptbl_02, .-_nds32_jmptbl_02
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid03.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid03.S
new file mode 100644
index 000000000..063a728f6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid03.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.03, "a"
+	.align	2
+	.weak	_nds32_jmptbl_03
+	.type	_nds32_jmptbl_03, @object
+_nds32_jmptbl_03:
+	.word	0
+	.size	_nds32_jmptbl_03, .-_nds32_jmptbl_03
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid04.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid04.S
new file mode 100644
index 000000000..58c33168e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid04.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.04, "a"
+	.align	2
+	.weak	_nds32_jmptbl_04
+	.type	_nds32_jmptbl_04, @object
+_nds32_jmptbl_04:
+	.word	0
+	.size	_nds32_jmptbl_04, .-_nds32_jmptbl_04
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid05.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid05.S
new file mode 100644
index 000000000..4c83e80b1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid05.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.05, "a"
+	.align	2
+	.weak	_nds32_jmptbl_05
+	.type	_nds32_jmptbl_05, @object
+_nds32_jmptbl_05:
+	.word	0
+	.size	_nds32_jmptbl_05, .-_nds32_jmptbl_05
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid06.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid06.S
new file mode 100644
index 000000000..507d5eaac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid06.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.06, "a"
+	.align	2
+	.weak	_nds32_jmptbl_06
+	.type	_nds32_jmptbl_06, @object
+_nds32_jmptbl_06:
+	.word	0
+	.size	_nds32_jmptbl_06, .-_nds32_jmptbl_06
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid07.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid07.S
new file mode 100644
index 000000000..22983e462
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid07.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.07, "a"
+	.align	2
+	.weak	_nds32_jmptbl_07
+	.type	_nds32_jmptbl_07, @object
+_nds32_jmptbl_07:
+	.word	0
+	.size	_nds32_jmptbl_07, .-_nds32_jmptbl_07
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid08.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid08.S
new file mode 100644
index 000000000..0b17ea5b8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid08.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.08, "a"
+	.align	2
+	.weak	_nds32_jmptbl_08
+	.type	_nds32_jmptbl_08, @object
+_nds32_jmptbl_08:
+	.word	0
+	.size	_nds32_jmptbl_08, .-_nds32_jmptbl_08
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid09.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid09.S
new file mode 100644
index 000000000..b81660238
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid09.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.09, "a"
+	.align	2
+	.weak	_nds32_jmptbl_09
+	.type	_nds32_jmptbl_09, @object
+_nds32_jmptbl_09:
+	.word	0
+	.size	_nds32_jmptbl_09, .-_nds32_jmptbl_09
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid10.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid10.S
new file mode 100644
index 000000000..0927e6235
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid10.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.10, "a"
+	.align	2
+	.weak	_nds32_jmptbl_10
+	.type	_nds32_jmptbl_10, @object
+_nds32_jmptbl_10:
+	.word	0
+	.size	_nds32_jmptbl_10, .-_nds32_jmptbl_10
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid11.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid11.S
new file mode 100644
index 000000000..e3a9b24d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid11.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.11, "a"
+	.align	2
+	.weak	_nds32_jmptbl_11
+	.type	_nds32_jmptbl_11, @object
+_nds32_jmptbl_11:
+	.word	0
+	.size	_nds32_jmptbl_11, .-_nds32_jmptbl_11
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid12.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid12.S
new file mode 100644
index 000000000..0fbb5304e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid12.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.12, "a"
+	.align	2
+	.weak	_nds32_jmptbl_12
+	.type	_nds32_jmptbl_12, @object
+_nds32_jmptbl_12:
+	.word	0
+	.size	_nds32_jmptbl_12, .-_nds32_jmptbl_12
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid13.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid13.S
new file mode 100644
index 000000000..a4a22f3d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid13.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.13, "a"
+	.align	2
+	.weak	_nds32_jmptbl_13
+	.type	_nds32_jmptbl_13, @object
+_nds32_jmptbl_13:
+	.word	0
+	.size	_nds32_jmptbl_13, .-_nds32_jmptbl_13
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid14.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid14.S
new file mode 100644
index 000000000..be5be0008
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid14.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.14, "a"
+	.align	2
+	.weak	_nds32_jmptbl_14
+	.type	_nds32_jmptbl_14, @object
+_nds32_jmptbl_14:
+	.word	0
+	.size	_nds32_jmptbl_14, .-_nds32_jmptbl_14
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid15.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid15.S
new file mode 100644
index 000000000..dbf4f8aa2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid15.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.15, "a"
+	.align	2
+	.weak	_nds32_jmptbl_15
+	.type	_nds32_jmptbl_15, @object
+_nds32_jmptbl_15:
+	.word	0
+	.size	_nds32_jmptbl_15, .-_nds32_jmptbl_15
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid16.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid16.S
new file mode 100644
index 000000000..2ff61636d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid16.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.16, "a"
+	.align	2
+	.weak	_nds32_jmptbl_16
+	.type	_nds32_jmptbl_16, @object
+_nds32_jmptbl_16:
+	.word	0
+	.size	_nds32_jmptbl_16, .-_nds32_jmptbl_16
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid17.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid17.S
new file mode 100644
index 000000000..11ecb15e2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid17.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.17, "a"
+	.align	2
+	.weak	_nds32_jmptbl_17
+	.type	_nds32_jmptbl_17, @object
+_nds32_jmptbl_17:
+	.word	0
+	.size	_nds32_jmptbl_17, .-_nds32_jmptbl_17
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid18.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid18.S
new file mode 100644
index 000000000..c66a46158
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid18.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.18, "a"
+	.align	2
+	.weak	_nds32_jmptbl_18
+	.type	_nds32_jmptbl_18, @object
+_nds32_jmptbl_18:
+	.word	0
+	.size	_nds32_jmptbl_18, .-_nds32_jmptbl_18
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid19.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid19.S
new file mode 100644
index 000000000..c62d2d3ee
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid19.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.19, "a"
+	.align	2
+	.weak	_nds32_jmptbl_19
+	.type	_nds32_jmptbl_19, @object
+_nds32_jmptbl_19:
+	.word	0
+	.size	_nds32_jmptbl_19, .-_nds32_jmptbl_19
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid20.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid20.S
new file mode 100644
index 000000000..38a0753e4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid20.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.20, "a"
+	.align	2
+	.weak	_nds32_jmptbl_20
+	.type	_nds32_jmptbl_20, @object
+_nds32_jmptbl_20:
+	.word	0
+	.size	_nds32_jmptbl_20, .-_nds32_jmptbl_20
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid21.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid21.S
new file mode 100644
index 000000000..fe1405b88
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid21.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.21, "a"
+	.align	2
+	.weak	_nds32_jmptbl_21
+	.type	_nds32_jmptbl_21, @object
+_nds32_jmptbl_21:
+	.word	0
+	.size	_nds32_jmptbl_21, .-_nds32_jmptbl_21
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid22.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid22.S
new file mode 100644
index 000000000..7432e4735
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid22.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.22, "a"
+	.align	2
+	.weak	_nds32_jmptbl_22
+	.type	_nds32_jmptbl_22, @object
+_nds32_jmptbl_22:
+	.word	0
+	.size	_nds32_jmptbl_22, .-_nds32_jmptbl_22
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid23.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid23.S
new file mode 100644
index 000000000..d592a483c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid23.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.23, "a"
+	.align	2
+	.weak	_nds32_jmptbl_23
+	.type	_nds32_jmptbl_23, @object
+_nds32_jmptbl_23:
+	.word	0
+	.size	_nds32_jmptbl_23, .-_nds32_jmptbl_23
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid24.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid24.S
new file mode 100644
index 000000000..08a661c3d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid24.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.24, "a"
+	.align	2
+	.weak	_nds32_jmptbl_24
+	.type	_nds32_jmptbl_24, @object
+_nds32_jmptbl_24:
+	.word	0
+	.size	_nds32_jmptbl_24, .-_nds32_jmptbl_24
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid25.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid25.S
new file mode 100644
index 000000000..b2b06dd6b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid25.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.25, "a"
+	.align	2
+	.weak	_nds32_jmptbl_25
+	.type	_nds32_jmptbl_25, @object
+_nds32_jmptbl_25:
+	.word	0
+	.size	_nds32_jmptbl_25, .-_nds32_jmptbl_25
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid26.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid26.S
new file mode 100644
index 000000000..f6ec3759e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid26.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.26, "a"
+	.align	2
+	.weak	_nds32_jmptbl_26
+	.type	_nds32_jmptbl_26, @object
+_nds32_jmptbl_26:
+	.word	0
+	.size	_nds32_jmptbl_26, .-_nds32_jmptbl_26
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid27.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid27.S
new file mode 100644
index 000000000..1bf1ce9bd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid27.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.27, "a"
+	.align	2
+	.weak	_nds32_jmptbl_27
+	.type	_nds32_jmptbl_27, @object
+_nds32_jmptbl_27:
+	.word	0
+	.size	_nds32_jmptbl_27, .-_nds32_jmptbl_27
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid28.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid28.S
new file mode 100644
index 000000000..7a2efd7b6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid28.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.28, "a"
+	.align	2
+	.weak	_nds32_jmptbl_28
+	.type	_nds32_jmptbl_28, @object
+_nds32_jmptbl_28:
+	.word	0
+	.size	_nds32_jmptbl_28, .-_nds32_jmptbl_28
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid29.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid29.S
new file mode 100644
index 000000000..e5a8c44a6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid29.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.29, "a"
+	.align	2
+	.weak	_nds32_jmptbl_29
+	.type	_nds32_jmptbl_29, @object
+_nds32_jmptbl_29:
+	.word	0
+	.size	_nds32_jmptbl_29, .-_nds32_jmptbl_29
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid30.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid30.S
new file mode 100644
index 000000000..dbcb66f27
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid30.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.30, "a"
+	.align	2
+	.weak	_nds32_jmptbl_30
+	.type	_nds32_jmptbl_30, @object
+_nds32_jmptbl_30:
+	.word	0
+	.size	_nds32_jmptbl_30, .-_nds32_jmptbl_30
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid31.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid31.S
new file mode 100644
index 000000000..522baf095
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid31.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.31, "a"
+	.align	2
+	.weak	_nds32_jmptbl_31
+	.type	_nds32_jmptbl_31, @object
+_nds32_jmptbl_31:
+	.word	0
+	.size	_nds32_jmptbl_31, .-_nds32_jmptbl_31
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid32.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid32.S
new file mode 100644
index 000000000..8de26cc20
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid32.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.32, "a"
+	.align	2
+	.weak	_nds32_jmptbl_32
+	.type	_nds32_jmptbl_32, @object
+_nds32_jmptbl_32:
+	.word	0
+	.size	_nds32_jmptbl_32, .-_nds32_jmptbl_32
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid33.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid33.S
new file mode 100644
index 000000000..5c6f935b7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid33.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.33, "a"
+	.align	2
+	.weak	_nds32_jmptbl_33
+	.type	_nds32_jmptbl_33, @object
+_nds32_jmptbl_33:
+	.word	0
+	.size	_nds32_jmptbl_33, .-_nds32_jmptbl_33
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid34.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid34.S
new file mode 100644
index 000000000..cadb37416
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid34.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.34, "a"
+	.align	2
+	.weak	_nds32_jmptbl_34
+	.type	_nds32_jmptbl_34, @object
+_nds32_jmptbl_34:
+	.word	0
+	.size	_nds32_jmptbl_34, .-_nds32_jmptbl_34
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid35.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid35.S
new file mode 100644
index 000000000..3e87fdd5b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid35.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.35, "a"
+	.align	2
+	.weak	_nds32_jmptbl_35
+	.type	_nds32_jmptbl_35, @object
+_nds32_jmptbl_35:
+	.word	0
+	.size	_nds32_jmptbl_35, .-_nds32_jmptbl_35
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid36.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid36.S
new file mode 100644
index 000000000..c3d2284f7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid36.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.36, "a"
+	.align	2
+	.weak	_nds32_jmptbl_36
+	.type	_nds32_jmptbl_36, @object
+_nds32_jmptbl_36:
+	.word	0
+	.size	_nds32_jmptbl_36, .-_nds32_jmptbl_36
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid37.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid37.S
new file mode 100644
index 000000000..19d6956a5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid37.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.37, "a"
+	.align	2
+	.weak	_nds32_jmptbl_37
+	.type	_nds32_jmptbl_37, @object
+_nds32_jmptbl_37:
+	.word	0
+	.size	_nds32_jmptbl_37, .-_nds32_jmptbl_37
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid38.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid38.S
new file mode 100644
index 000000000..364c751a5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid38.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.38, "a"
+	.align	2
+	.weak	_nds32_jmptbl_38
+	.type	_nds32_jmptbl_38, @object
+_nds32_jmptbl_38:
+	.word	0
+	.size	_nds32_jmptbl_38, .-_nds32_jmptbl_38
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid39.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid39.S
new file mode 100644
index 000000000..b0ce72ae4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid39.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.39, "a"
+	.align	2
+	.weak	_nds32_jmptbl_39
+	.type	_nds32_jmptbl_39, @object
+_nds32_jmptbl_39:
+	.word	0
+	.size	_nds32_jmptbl_39, .-_nds32_jmptbl_39
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid40.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid40.S
new file mode 100644
index 000000000..c25264622
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid40.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.40, "a"
+	.align	2
+	.weak	_nds32_jmptbl_40
+	.type	_nds32_jmptbl_40, @object
+_nds32_jmptbl_40:
+	.word	0
+	.size	_nds32_jmptbl_40, .-_nds32_jmptbl_40
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid41.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid41.S
new file mode 100644
index 000000000..6200da9d0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid41.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.41, "a"
+	.align	2
+	.weak	_nds32_jmptbl_41
+	.type	_nds32_jmptbl_41, @object
+_nds32_jmptbl_41:
+	.word	0
+	.size	_nds32_jmptbl_41, .-_nds32_jmptbl_41
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid42.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid42.S
new file mode 100644
index 000000000..5281cc442
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid42.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.42, "a"
+	.align	2
+	.weak	_nds32_jmptbl_42
+	.type	_nds32_jmptbl_42, @object
+_nds32_jmptbl_42:
+	.word	0
+	.size	_nds32_jmptbl_42, .-_nds32_jmptbl_42
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid43.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid43.S
new file mode 100644
index 000000000..3489e6909
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid43.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.43, "a"
+	.align	2
+	.weak	_nds32_jmptbl_43
+	.type	_nds32_jmptbl_43, @object
+_nds32_jmptbl_43:
+	.word	0
+	.size	_nds32_jmptbl_43, .-_nds32_jmptbl_43
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid44.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid44.S
new file mode 100644
index 000000000..f4c21d2b3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid44.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.44, "a"
+	.align	2
+	.weak	_nds32_jmptbl_44
+	.type	_nds32_jmptbl_44, @object
+_nds32_jmptbl_44:
+	.word	0
+	.size	_nds32_jmptbl_44, .-_nds32_jmptbl_44
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid45.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid45.S
new file mode 100644
index 000000000..143cb0c5b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid45.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.45, "a"
+	.align	2
+	.weak	_nds32_jmptbl_45
+	.type	_nds32_jmptbl_45, @object
+_nds32_jmptbl_45:
+	.word	0
+	.size	_nds32_jmptbl_45, .-_nds32_jmptbl_45
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid46.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid46.S
new file mode 100644
index 000000000..c0459bdc4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid46.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.46, "a"
+	.align	2
+	.weak	_nds32_jmptbl_46
+	.type	_nds32_jmptbl_46, @object
+_nds32_jmptbl_46:
+	.word	0
+	.size	_nds32_jmptbl_46, .-_nds32_jmptbl_46
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid47.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid47.S
new file mode 100644
index 000000000..596f1dcd2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid47.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.47, "a"
+	.align	2
+	.weak	_nds32_jmptbl_47
+	.type	_nds32_jmptbl_47, @object
+_nds32_jmptbl_47:
+	.word	0
+	.size	_nds32_jmptbl_47, .-_nds32_jmptbl_47
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid48.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid48.S
new file mode 100644
index 000000000..b2e3bb35b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid48.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.48, "a"
+	.align	2
+	.weak	_nds32_jmptbl_48
+	.type	_nds32_jmptbl_48, @object
+_nds32_jmptbl_48:
+	.word	0
+	.size	_nds32_jmptbl_48, .-_nds32_jmptbl_48
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid49.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid49.S
new file mode 100644
index 000000000..03f279b6b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid49.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.49, "a"
+	.align	2
+	.weak	_nds32_jmptbl_49
+	.type	_nds32_jmptbl_49, @object
+_nds32_jmptbl_49:
+	.word	0
+	.size	_nds32_jmptbl_49, .-_nds32_jmptbl_49
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid50.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid50.S
new file mode 100644
index 000000000..635bc1998
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid50.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.50, "a"
+	.align	2
+	.weak	_nds32_jmptbl_50
+	.type	_nds32_jmptbl_50, @object
+_nds32_jmptbl_50:
+	.word	0
+	.size	_nds32_jmptbl_50, .-_nds32_jmptbl_50
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid51.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid51.S
new file mode 100644
index 000000000..26505db75
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid51.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.51, "a"
+	.align	2
+	.weak	_nds32_jmptbl_51
+	.type	_nds32_jmptbl_51, @object
+_nds32_jmptbl_51:
+	.word	0
+	.size	_nds32_jmptbl_51, .-_nds32_jmptbl_51
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid52.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid52.S
new file mode 100644
index 000000000..5230e8f3f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid52.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.52, "a"
+	.align	2
+	.weak	_nds32_jmptbl_52
+	.type	_nds32_jmptbl_52, @object
+_nds32_jmptbl_52:
+	.word	0
+	.size	_nds32_jmptbl_52, .-_nds32_jmptbl_52
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid53.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid53.S
new file mode 100644
index 000000000..3b5c931cb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid53.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.53, "a"
+	.align	2
+	.weak	_nds32_jmptbl_53
+	.type	_nds32_jmptbl_53, @object
+_nds32_jmptbl_53:
+	.word	0
+	.size	_nds32_jmptbl_53, .-_nds32_jmptbl_53
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid54.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid54.S
new file mode 100644
index 000000000..b00b24258
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid54.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.54, "a"
+	.align	2
+	.weak	_nds32_jmptbl_54
+	.type	_nds32_jmptbl_54, @object
+_nds32_jmptbl_54:
+	.word	0
+	.size	_nds32_jmptbl_54, .-_nds32_jmptbl_54
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid55.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid55.S
new file mode 100644
index 000000000..f527c3697
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid55.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.55, "a"
+	.align	2
+	.weak	_nds32_jmptbl_55
+	.type	_nds32_jmptbl_55, @object
+_nds32_jmptbl_55:
+	.word	0
+	.size	_nds32_jmptbl_55, .-_nds32_jmptbl_55
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid56.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid56.S
new file mode 100644
index 000000000..54248ea98
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid56.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.56, "a"
+	.align	2
+	.weak	_nds32_jmptbl_56
+	.type	_nds32_jmptbl_56, @object
+_nds32_jmptbl_56:
+	.word	0
+	.size	_nds32_jmptbl_56, .-_nds32_jmptbl_56
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid57.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid57.S
new file mode 100644
index 000000000..1b3381f86
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid57.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.57, "a"
+	.align	2
+	.weak	_nds32_jmptbl_57
+	.type	_nds32_jmptbl_57, @object
+_nds32_jmptbl_57:
+	.word	0
+	.size	_nds32_jmptbl_57, .-_nds32_jmptbl_57
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid58.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid58.S
new file mode 100644
index 000000000..6e2e63c73
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid58.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.58, "a"
+	.align	2
+	.weak	_nds32_jmptbl_58
+	.type	_nds32_jmptbl_58, @object
+_nds32_jmptbl_58:
+	.word	0
+	.size	_nds32_jmptbl_58, .-_nds32_jmptbl_58
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid59.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid59.S
new file mode 100644
index 000000000..d60b11719
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid59.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.59, "a"
+	.align	2
+	.weak	_nds32_jmptbl_59
+	.type	_nds32_jmptbl_59, @object
+_nds32_jmptbl_59:
+	.word	0
+	.size	_nds32_jmptbl_59, .-_nds32_jmptbl_59
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid60.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid60.S
new file mode 100644
index 000000000..b24f19e99
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid60.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.60, "a"
+	.align	2
+	.weak	_nds32_jmptbl_60
+	.type	_nds32_jmptbl_60, @object
+_nds32_jmptbl_60:
+	.word	0
+	.size	_nds32_jmptbl_60, .-_nds32_jmptbl_60
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid61.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid61.S
new file mode 100644
index 000000000..780e775bd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid61.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.61, "a"
+	.align	2
+	.weak	_nds32_jmptbl_61
+	.type	_nds32_jmptbl_61, @object
+_nds32_jmptbl_61:
+	.word	0
+	.size	_nds32_jmptbl_61, .-_nds32_jmptbl_61
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid62.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid62.S
new file mode 100644
index 000000000..e0ff5622c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid62.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.62, "a"
+	.align	2
+	.weak	_nds32_jmptbl_62
+	.type	_nds32_jmptbl_62, @object
+_nds32_jmptbl_62:
+	.word	0
+	.size	_nds32_jmptbl_62, .-_nds32_jmptbl_62
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid63.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid63.S
new file mode 100644
index 000000000..4b86ed7f7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid63.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.63, "a"
+	.align	2
+	.weak	_nds32_jmptbl_63
+	.type	_nds32_jmptbl_63, @object
+_nds32_jmptbl_63:
+	.word	0
+	.size	_nds32_jmptbl_63, .-_nds32_jmptbl_63
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid64.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid64.S
new file mode 100644
index 000000000..cdb3c91a6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid64.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.64, "a"
+	.align	2
+	.weak	_nds32_jmptbl_64
+	.type	_nds32_jmptbl_64, @object
+_nds32_jmptbl_64:
+	.word	0
+	.size	_nds32_jmptbl_64, .-_nds32_jmptbl_64
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid65.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid65.S
new file mode 100644
index 000000000..fc988f08e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid65.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.65, "a"
+	.align	2
+	.weak	_nds32_jmptbl_65
+	.type	_nds32_jmptbl_65, @object
+_nds32_jmptbl_65:
+	.word	0
+	.size	_nds32_jmptbl_65, .-_nds32_jmptbl_65
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid66.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid66.S
new file mode 100644
index 000000000..c32e1fbd2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid66.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.66, "a"
+	.align	2
+	.weak	_nds32_jmptbl_66
+	.type	_nds32_jmptbl_66, @object
+_nds32_jmptbl_66:
+	.word	0
+	.size	_nds32_jmptbl_66, .-_nds32_jmptbl_66
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid67.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid67.S
new file mode 100644
index 000000000..971bbf785
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid67.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.67, "a"
+	.align	2
+	.weak	_nds32_jmptbl_67
+	.type	_nds32_jmptbl_67, @object
+_nds32_jmptbl_67:
+	.word	0
+	.size	_nds32_jmptbl_67, .-_nds32_jmptbl_67
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid68.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid68.S
new file mode 100644
index 000000000..1e0c37bf1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid68.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.68, "a"
+	.align	2
+	.weak	_nds32_jmptbl_68
+	.type	_nds32_jmptbl_68, @object
+_nds32_jmptbl_68:
+	.word	0
+	.size	_nds32_jmptbl_68, .-_nds32_jmptbl_68
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid69.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid69.S
new file mode 100644
index 000000000..c8f11c456
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid69.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.69, "a"
+	.align	2
+	.weak	_nds32_jmptbl_69
+	.type	_nds32_jmptbl_69, @object
+_nds32_jmptbl_69:
+	.word	0
+	.size	_nds32_jmptbl_69, .-_nds32_jmptbl_69
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid70.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid70.S
new file mode 100644
index 000000000..c154d76d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid70.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.70, "a"
+	.align	2
+	.weak	_nds32_jmptbl_70
+	.type	_nds32_jmptbl_70, @object
+_nds32_jmptbl_70:
+	.word	0
+	.size	_nds32_jmptbl_70, .-_nds32_jmptbl_70
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid71.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid71.S
new file mode 100644
index 000000000..120fb3f03
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid71.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.71, "a"
+	.align	2
+	.weak	_nds32_jmptbl_71
+	.type	_nds32_jmptbl_71, @object
+_nds32_jmptbl_71:
+	.word	0
+	.size	_nds32_jmptbl_71, .-_nds32_jmptbl_71
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid72.S b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid72.S
new file mode 100644
index 000000000..2a5b4f9d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/jmptbl_vid72.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_jmptbl.72, "a"
+	.align	2
+	.weak	_nds32_jmptbl_72
+	.type	_nds32_jmptbl_72, @object
+_nds32_jmptbl_72:
+	.word	0
+	.size	_nds32_jmptbl_72, .-_nds32_jmptbl_72
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/nmih.S b/gcc-4.9/libgcc/config/nds32/isr-library/nmih.S
new file mode 100644
index 000000000..6c06d023b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/nmih.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_nmih, "a"
+	.align	2
+	.weak	_nds32_nmih
+	.type	_nds32_nmih, @object
+_nds32_nmih:
+	.word	0
+	.size	_nds32_nmih, .-_nds32_nmih
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/reset.S b/gcc-4.9/libgcc/config/nds32/isr-library/reset.S
new file mode 100644
index 000000000..c814fc021
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/reset.S
@@ -0,0 +1,130 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section .nds32_isr, "ax"	/* Put it in the section of 1st level handler.  */
+	.align	1
+	.weak	_SDA_BASE_	/* For reset handler only.  */
+	.weak	_FP_BASE_	/* For reset handler only.  */
+	.weak	_nds32_init_mem	/* User defined memory initialization function.  */
+	.globl	_start
+	.globl	_nds32_reset
+	.type	_nds32_reset, @function
+_nds32_reset:
+_start:
+#ifdef  NDS32_EXT_EX9
+	.no_ex9_begin
+#endif
+	/* Handle NMI and warm boot if any of them exists.  */
+	beqz	$sp, 1f		/* Reset, NMI or warm boot?  */
+	/* Either NMI or warm boot; save all regs.  */
+
+	/* Preserve registers for context-switching.  */
+#ifdef __NDS32_REDUCED_REGS__
+	/* For 16-reg mode.  */
+	smw.adm $r0, [$sp], $r10, #0x0
+	smw.adm $r15, [$sp], $r15, #0xf
+#else
+	/* For 32-reg mode.  */
+	smw.adm $r0, [$sp], $r27, #0xf
+#endif
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+
+	la	$gp, _SDA_BASE_	/* Init GP for small data access.  */
+	move	$r0, $sp	/* Init parameter.  */
+	mfsr	$r1, $ITYPE	/* Check ITYPE for NMI or warm boot.  */
+	andi	$r1, $r1, #0xf
+	addi	$r1, $r1, #-1
+	beqz	$r1, 2f		/* Warm boot if true.  */
+	l.w	$r15, _nds32_nmih	/* Load NMI handler.  */
+	j	3f
+2:
+	l.w	$r15, _nds32_wrh	/* Load warm boot handler.  */
+3:
+	beqz    $r15, 1f	/* If no handler, do cold boot.  */
+	jral    $r15		/* Call handler.  */
+	bnez    $r0, 1f		/* If fail to resume, do cold boot.  */
+
+	/* Restore registers for context-switching.  */
+#ifdef NDS32_EXT_IFC
+	lmw.bim	$r1, [$sp], $r2, #0x0	/* Restore extra $r2 to keep
+					   stack 8-byte alignment.  */
+	mtusr   $r1, $IFC_LP
+#endif
+#ifdef __NDS32_REDUCED_REGS__
+	/* For 16-reg mode.  */
+	lmw.bim	$r15, [$sp], $r15, #0xf
+	lmw.bim	$r0, [$sp], $r10, #0x0
+#else
+	/* For 32-reg mode.  */
+	lmw.bim $r0, [$sp], $r27, #0xf
+#endif
+	iret	/* Resume operation.  */
+
+
+1:	/* Cold boot.  */
+	/* Set IVB.ESZ = 1 (vector table entry size = 16 bytes)  */
+	mfsr    $r0, $IVB
+	li	$r1, #0xffff3fff
+	and	$r0, $r0, $r1
+	ori	$r0, $r0, #0x4000
+	mtsr    $r0, $IVB
+	dsb
+
+	la	$gp, _SDA_BASE_		/* Init $gp.  */
+	la	$fp, _FP_BASE_		/* Init $fp.  */
+	la	$sp, _stack		/* Init $sp.  */
+#ifdef  NDS32_EXT_EX9
+/*
+ *	Initialize the table base of EX9 instruction
+ *	ex9 generation needs to disable before the ITB is set
+ */
+	mfsr    $r0, $MSC_CFG	/* Check if HW support of EX9.  */
+	srli	$r0, $r0, 24
+	andi	$r0, $r0, 0x1
+	beqz	$r0, 4f		/* Zero means HW does not support EX9.  */
+	la      $r0, _ITB_BASE_	/* Init $ITB.  */
+	mtusr   $r0, $ITB
+	.no_ex9_end
+4:
+#endif
+	la	$r15, _nds32_init_mem	/* Call DRAM init. _nds32_init_mem
+					  may written by C language.  */
+	beqz	$r15, 6f
+	jral	$r15
+6:
+	l.w	$r15, _nds32_jmptbl_00	/* Load reset handler.  */
+	jral	$r15
+/* Reset handler() should never return in a RTOS or non-OS system.
+   In case it does return, an exception will be generated.
+   This exception will be caught either by default break handler or by EDM.
+   Default break handle may just do an infinite loop.
+   EDM will notify GDB and GDB will regain control when the ID is 0x7fff. */
+5:
+	break    #0x7fff
+	.size	_nds32_reset, .-_nds32_reset
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/reset_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/reset_4b.S
new file mode 100644
index 000000000..f5b533321
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/reset_4b.S
@@ -0,0 +1,131 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section .nds32_isr, "ax"	/* Put it in the section of 1st level handler.  */
+	.align	1
+	.weak	_SDA_BASE_	/* For reset handler only.  */
+	.weak	_FP_BASE_	/* For reset handler only.  */
+	.weak	_nds32_init_mem	/* User defined memory initialization function.  */
+	.globl	_start
+	.globl	_nds32_reset_4b
+	.type	_nds32_reset_4b, @function
+_nds32_reset_4b:
+_start:
+#ifdef  NDS32_EXT_EX9
+	.no_ex9_begin
+#endif
+	/* Handle NMI and warm boot if any of them exists.  */
+	beqz	$sp, 1f		/* Reset, NMI or warm boot?  */
+	/* Either NMI or warm boot; save all regs.  */
+
+	/* Preserve registers for context-switching.  */
+#ifdef __NDS32_REDUCED_REGS__
+	/* For 16-reg mode.  */
+	smw.adm $r0, [$sp], $r10, #0x0
+	smw.adm $r15, [$sp], $r15, #0xf
+#else
+	/* For 32-reg mode.  */
+	smw.adm $r0, [$sp], $r27, #0xf
+#endif
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+
+	la	$gp, _SDA_BASE_	/* Init GP for small data access.  */
+	move	$r0, $sp	/* Init parameter.  */
+	mfsr	$r1, $ITYPE	/* Check ITYPE for NMI or warm boot.  */
+	andi	$r1, $r1, #0xf
+	addi	$r1, $r1, #-1
+	beqz	$r1, 2f		/* Warm boot if true.  */
+	l.w	$r15, _nds32_nmih	/* Load NMI handler.  */
+	j	3f
+2:
+	l.w	$r15, _nds32_wrh	/* Load warm boot handler.  */
+3:
+	beqz    $r15, 1f	/* If no handler, do cold boot.  */
+	jral    $r15		/* Call handler.  */
+	bnez    $r0, 1f		/* If fail to resume, do cold boot.  */
+
+	/* Restore registers for context-switching.  */
+#ifdef NDS32_EXT_IFC
+	lmw.bim	$r1, [$sp], $r2, #0x0	/* Restore extra $r2 to keep
+					   stack 8-byte alignment.  */
+	mtusr   $r1, $IFC_LP
+#endif
+#ifdef __NDS32_REDUCED_REGS__
+	/* For 16-reg mode.  */
+	lmw.bim	$r15, [$sp], $r15, #0xf
+	lmw.bim	$r0, [$sp], $r10, #0x0
+#else
+	/* For 32-reg mode.  */
+	lmw.bim $r0, [$sp], $r27, #0xf
+#endif
+	iret	/* Resume operation.  */
+
+
+1:	/* Cold boot.  */
+	/* With vector ID feature, set default vector size to 4B.  */
+	/* Set IVB.ESZ = 0 (vector table entry size = 4 bytes)  */
+	mfsr    $r0, $IVB
+	li      $r1, #0xc000
+	or      $r0, $r0, $r1
+	xor     $r0, $r0, $r1
+	mtsr    $r0, $IVB
+	dsb
+
+	la	$gp, _SDA_BASE_		/* Init $gp.  */
+	la	$fp, _FP_BASE_		/* Init $fp.  */
+	la	$sp, _stack		/* Init $sp.  */
+#ifdef  NDS32_EXT_EX9
+/*
+ *	Initialize the table base of EX9 instruction
+ *	ex9 generation needs to disable before the ITB is set
+ */
+	mfsr    $r0, $MSC_CFG	/* Check if HW support of EX9.  */
+	srli	$r0, $r0, 24
+	andi	$r0, $r0, 0x1
+	beqz	$r0, 4f		/* Zero means HW does not support EX9.  */
+	la      $r0, _ITB_BASE_	/* Init $ITB.  */
+	mtusr   $r0, $ITB
+	.no_ex9_end
+4:
+#endif
+	la	$r15, _nds32_init_mem	/* Call DRAM init. _nds32_init_mem
+					  may written by C language.  */
+	beqz	$r15, 6f
+	jral	$r15
+6:
+	l.w	$r15, _nds32_jmptbl_00	/* Load reset handler.  */
+	jral	$r15
+/* Reset handler() should never return in a RTOS or non-OS system.
+   In case it does return, an exception will be generated.
+   This exception will be caught either by default break handler or by EDM.
+   Default break handle may just do an infinite loop.
+   EDM will notify GDB and GDB will regain control when the ID is 0x7fff. */
+5:
+	break    #0x7fff
+	.size	_nds32_reset_4b, .-_nds32_reset_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_all.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_all.inc
new file mode 100644
index 000000000..b19b3ce1d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_all.inc
@@ -0,0 +1,45 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_ALL
+	setgie.d
+	dsb
+	lmw.bim $r1, [$sp], $r2, #0x0   /* Restore IPC, IPSW.  */
+	mtsr	$r1, $IPC
+	mtsr	$r2, $IPSW
+	RESTORE_FPU_REGS
+	RESTORE_MAC_REGS
+#ifdef NDS32_EXT_IFC
+	lmw.bim	$r1, [$sp], $r2, #0x0	/* Restore extra $r2 to keep
+					   stack 8-byte alignment.  */
+	mtusr   $r1, $IFC_LP
+#endif
+#ifdef __NDS32_REDUCED_REGS__
+	lmw.bim $r0, [$sp], $r10, #0x0	/* Restore all regs.  */
+	lmw.bim $r15, [$sp], $r15, #0xf
+#else /* not __NDS32_REDUCED_REGS__ */
+	lmw.bim $r0, [$sp], $r27, #0xf	/* Restore all regs.  */
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs.inc
new file mode 100644
index 000000000..525ecbbf9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs.inc
@@ -0,0 +1,36 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_FPU_REGS
+#if defined(NDS32_EXT_FPU_CONFIG_0)
+	RESTORE_FPU_REGS_00
+#elif defined(NDS32_EXT_FPU_CONFIG_1)
+	RESTORE_FPU_REGS_01
+#elif defined(NDS32_EXT_FPU_CONFIG_2)
+	RESTORE_FPU_REGS_02
+#elif defined(NDS32_EXT_FPU_CONFIG_3)
+	RESTORE_FPU_REGS_03
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_00.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_00.inc
new file mode 100644
index 000000000..3a0ad69e3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_00.inc
@@ -0,0 +1,31 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_FPU_REGS_00
+	fldi.bi	$fd0, [$sp], #8
+	fldi.bi	$fd1, [$sp], #8
+	fldi.bi	$fd2, [$sp], #8
+	fldi.bi	$fd3, [$sp], #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_01.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_01.inc
new file mode 100644
index 000000000..deb20b776
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_01.inc
@@ -0,0 +1,35 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_FPU_REGS_01
+	fldi.bi	$fd0, [$sp], #8
+	fldi.bi	$fd1, [$sp], #8
+	fldi.bi	$fd2, [$sp], #8
+	fldi.bi	$fd3, [$sp], #8
+	fldi.bi	$fd4, [$sp], #8
+	fldi.bi	$fd5, [$sp], #8
+	fldi.bi	$fd6, [$sp], #8
+	fldi.bi	$fd7, [$sp], #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_02.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_02.inc
new file mode 100644
index 000000000..c74c01b3f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_02.inc
@@ -0,0 +1,43 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_FPU_REGS_02
+	fldi.bi	$fd0, [$sp], 8
+	fldi.bi	$fd1, [$sp], 8
+	fldi.bi	$fd2, [$sp], 8
+	fldi.bi	$fd3, [$sp], 8
+	fldi.bi	$fd4, [$sp], 8
+	fldi.bi	$fd5, [$sp], 8
+	fldi.bi	$fd6, [$sp], 8
+	fldi.bi	$fd7, [$sp], 8
+	fldi.bi	$fd8, [$sp], 8
+	fldi.bi	$fd9, [$sp], 8
+	fldi.bi	$fd10, [$sp], 8
+	fldi.bi	$fd11, [$sp], 8
+	fldi.bi	$fd12, [$sp], 8
+	fldi.bi	$fd13, [$sp], 8
+	fldi.bi	$fd14, [$sp], 8
+	fldi.bi	$fd15, [$sp], 8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_03.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_03.inc
new file mode 100644
index 000000000..2bdf435a5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_fpu_regs_03.inc
@@ -0,0 +1,59 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_FPU_REGS_03
+	fldi.bi	$fd0, [$sp], #8
+	fldi.bi	$fd1, [$sp], #8
+	fldi.bi	$fd2, [$sp], #8
+	fldi.bi	$fd3, [$sp], #8
+	fldi.bi	$fd4, [$sp], #8
+	fldi.bi	$fd5, [$sp], #8
+	fldi.bi	$fd6, [$sp], #8
+	fldi.bi	$fd7, [$sp], #8
+	fldi.bi	$fd8, [$sp], #8
+	fldi.bi	$fd9, [$sp], #8
+	fldi.bi	$fd10, [$sp], #8
+	fldi.bi	$fd11, [$sp], #8
+	fldi.bi	$fd12, [$sp], #8
+	fldi.bi	$fd13, [$sp], #8
+	fldi.bi	$fd14, [$sp], #8
+	fldi.bi	$fd15, [$sp], #8
+	fldi.bi	$fd16, [$sp], #8
+	fldi.bi	$fd17, [$sp], #8
+	fldi.bi	$fd18, [$sp], #8
+	fldi.bi	$fd19, [$sp], #8
+	fldi.bi	$fd20, [$sp], #8
+	fldi.bi	$fd21, [$sp], #8
+	fldi.bi	$fd22, [$sp], #8
+	fldi.bi	$fd23, [$sp], #8
+	fldi.bi	$fd24, [$sp], #8
+	fldi.bi	$fd25, [$sp], #8
+	fldi.bi	$fd26, [$sp], #8
+	fldi.bi	$fd27, [$sp], #8
+	fldi.bi	$fd28, [$sp], #8
+	fldi.bi	$fd29, [$sp], #8
+	fldi.bi	$fd30, [$sp], #8
+	fldi.bi	$fd31, [$sp], #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_mac_regs.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_mac_regs.inc
new file mode 100644
index 000000000..a0645ed3d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_mac_regs.inc
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_MAC_REGS
+#ifdef NDS32_DX_REGS
+	lmw.bim	$r1, [$sp], $r4, #0x0
+	mtusr	$r1, $d0.lo
+	mtusr	$r2, $d0.hi
+	mtusr	$r3, $d1.lo
+	mtusr	$r4, $d1.hi
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/restore_partial.inc b/gcc-4.9/libgcc/config/nds32/isr-library/restore_partial.inc
new file mode 100644
index 000000000..60b86e461
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/restore_partial.inc
@@ -0,0 +1,47 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro RESTORE_PARTIAL
+#if defined(NDS32_NESTED) || defined(NDS32_NESTED_READY)
+	setgie.d
+	dsb
+	lmw.bim $r1, [$sp], $r2, #0x0	/* Restore IPC, IPSW.  */
+	mtsr $r1, $IPC	/* Set IPC.  */
+	mtsr $r2, $IPSW	/* Set IPSW.  */
+#endif
+	RESTORE_FPU_REGS
+	RESTORE_MAC_REGS
+#ifdef NDS32_EXT_IFC
+	lmw.bim	$r1, [$sp], $r2, #0x0	/* Restore extra $r2 to keep
+					   stack 8-byte alignment.  */
+	mtusr   $r1, $IFC_LP
+#endif
+	lmw.bim $r0, [$sp], $r5, #0x0	/* Restore all regs.  */
+#ifdef __NDS32_REDUCED_REGS__
+	lmw.bim $r15, [$sp], $r15, #0x2
+#else
+	lmw.bim $r15, [$sp], $r27, #0x2	/* Restore all regs.  */
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_all.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_all.inc
new file mode 100644
index 000000000..a2835ac2b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_all.inc
@@ -0,0 +1,67 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_ALL_4B
+#ifdef __NDS32_REDUCED_REGS__
+	smw.adm $r15, [$sp], $r15, #0xf
+	smw.adm $r0, [$sp], $r10, #0x0
+#else /* not __NDS32_REDUCED_REGS__ */
+	smw.adm $r0, [$sp], $r27, #0xf
+#endif /* not __NDS32_REDUCED_REGS__ */
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+	SAVE_MAC_REGS
+	SAVE_FPU_REGS
+	mfsr	$r1, $IPC	/* Get IPC.  */
+	mfsr	$r2, $IPSW	/* Get IPSW.  */
+	smw.adm	$r1, [$sp], $r2, #0x0	/* Push IPC, IPSW.  */
+	move	$r1, $sp	/* $r1 is ptr to NDS32_CONTEXT.  */
+	mfsr	$r0, $ITYPE	/* Get VID to $r0.  */
+	srli	$r0, $r0, #5
+#ifdef __NDS32_ISA_V2__
+	andi	$r0, $r0, #127
+#else
+	fexti33	$r0, #6
+#endif
+.endm
+
+.macro SAVE_ALL
+/* SAVE_REG_TBL code has been moved to
+   vector table generated by compiler.  */
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+	SAVE_MAC_REGS
+	SAVE_FPU_REGS
+	mfsr	$r1, $IPC	/* Get IPC.  */
+	mfsr	$r2, $IPSW	/* Get IPSW.  */
+	smw.adm	$r1, [$sp], $r2, #0x0	/* Push IPC, IPSW.  */
+	move	$r1, $sp	/* $r1 is ptr to NDS32_CONTEXT.  */
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs.inc
new file mode 100644
index 000000000..52034a1a9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs.inc
@@ -0,0 +1,36 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_FPU_REGS
+#if defined(NDS32_EXT_FPU_CONFIG_0)
+	SAVE_FPU_REGS_00
+#elif defined(NDS32_EXT_FPU_CONFIG_1)
+	SAVE_FPU_REGS_01
+#elif defined(NDS32_EXT_FPU_CONFIG_2)
+	SAVE_FPU_REGS_02
+#elif defined(NDS32_EXT_FPU_CONFIG_3)
+	SAVE_FPU_REGS_03
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_00.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_00.inc
new file mode 100644
index 000000000..e31ed235f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_00.inc
@@ -0,0 +1,33 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_FPU_REGS_00
+	addi	$sp, $sp, #-8
+	fsdi.bi	$fd3, [$sp], #-8
+	fsdi.bi	$fd2, [$sp], #-8
+	fsdi.bi	$fd1, [$sp], #-8
+	fsdi.bi	$fd0, [$sp], #-8
+	addi	$sp, $sp, #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_01.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_01.inc
new file mode 100644
index 000000000..46859ac53
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_01.inc
@@ -0,0 +1,37 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_FPU_REGS_01
+	addi	$sp, $sp, #-8
+	fsdi.bi	$fd7, [$sp], #-8
+	fsdi.bi	$fd6, [$sp], #-8
+	fsdi.bi	$fd5, [$sp], #-8
+	fsdi.bi	$fd4, [$sp], #-8
+	fsdi.bi	$fd3, [$sp], #-8
+	fsdi.bi	$fd2, [$sp], #-8
+	fsdi.bi	$fd1, [$sp], #-8
+	fsdi.bi	$fd0, [$sp], #-8
+	addi	$sp, $sp, #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_02.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_02.inc
new file mode 100644
index 000000000..e73d276c5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_02.inc
@@ -0,0 +1,45 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_FPU_REGS_02
+	addi	$sp, $sp, #-8
+	fsdi.bi	$fd15, [$sp], #-8
+	fsdi.bi	$fd14, [$sp], #-8
+	fsdi.bi	$fd13, [$sp], #-8
+	fsdi.bi	$fd12, [$sp], #-8
+	fsdi.bi	$fd11, [$sp], #-8
+	fsdi.bi	$fd10, [$sp], #-8
+	fsdi.bi	$fd9, [$sp], #-8
+	fsdi.bi	$fd8, [$sp], #-8
+	fsdi.bi	$fd7, [$sp], #-8
+	fsdi.bi	$fd6, [$sp], #-8
+	fsdi.bi	$fd5, [$sp], #-8
+	fsdi.bi	$fd4, [$sp], #-8
+	fsdi.bi	$fd3, [$sp], #-8
+	fsdi.bi	$fd2, [$sp], #-8
+	fsdi.bi	$fd1, [$sp], #-8
+	fsdi.bi	$fd0, [$sp], #-8
+	addi	$sp, $sp, #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_03.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_03.inc
new file mode 100644
index 000000000..44dae9854
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_fpu_regs_03.inc
@@ -0,0 +1,61 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_FPU_REGS_03
+	addi	$sp, $sp, #-8
+	fsdi.bi	$fd31, [$sp], #-8
+	fsdi.bi	$fd30, [$sp], #-8
+	fsdi.bi	$fd29, [$sp], #-8
+	fsdi.bi	$fd28, [$sp], #-8
+	fsdi.bi	$fd27, [$sp], #-8
+	fsdi.bi	$fd26, [$sp], #-8
+	fsdi.bi	$fd25, [$sp], #-8
+	fsdi.bi	$fd24, [$sp], #-8
+	fsdi.bi	$fd23, [$sp], #-8
+	fsdi.bi	$fd22, [$sp], #-8
+	fsdi.bi	$fd21, [$sp], #-8
+	fsdi.bi	$fd20, [$sp], #-8
+	fsdi.bi	$fd19, [$sp], #-8
+	fsdi.bi	$fd18, [$sp], #-8
+	fsdi.bi	$fd17, [$sp], #-8
+	fsdi.bi	$fd16, [$sp], #-8
+	fsdi.bi	$fd15, [$sp], #-8
+	fsdi.bi	$fd14, [$sp], #-8
+	fsdi.bi	$fd13, [$sp], #-8
+	fsdi.bi	$fd12, [$sp], #-8
+	fsdi.bi	$fd11, [$sp], #-8
+	fsdi.bi	$fd10, [$sp], #-8
+	fsdi.bi	$fd9, [$sp], #-8
+	fsdi.bi	$fd8, [$sp], #-8
+	fsdi.bi	$fd7, [$sp], #-8
+	fsdi.bi	$fd6, [$sp], #-8
+	fsdi.bi	$fd5, [$sp], #-8
+	fsdi.bi	$fd4, [$sp], #-8
+	fsdi.bi	$fd3, [$sp], #-8
+	fsdi.bi	$fd2, [$sp], #-8
+	fsdi.bi	$fd1, [$sp], #-8
+	fsdi.bi	$fd0, [$sp], #-8
+	addi	$sp, $sp, #8
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_mac_regs.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_mac_regs.inc
new file mode 100644
index 000000000..2de4b2c54
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_mac_regs.inc
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_MAC_REGS
+#ifdef NDS32_DX_REGS
+	mfusr	$r1, $d0.lo
+	mfusr	$r2, $d0.hi
+	mfusr	$r3, $d1.lo
+	mfusr	$r4, $d1.hi
+	smw.adm	$r1, [$sp], $r4, #0x0
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/save_partial.inc b/gcc-4.9/libgcc/config/nds32/isr-library/save_partial.inc
new file mode 100644
index 000000000..df9ab6a60
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/save_partial.inc
@@ -0,0 +1,69 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+.macro SAVE_PARTIAL_4B
+#ifdef __NDS32_REDUCED_REGS__
+	smw.adm $r15, [$sp], $r15, #0x2
+#else /* not __NDS32_REDUCED_REGS__ */
+	smw.adm $r15, [$sp], $r27, #0x2
+#endif /* not __NDS32_REDUCED_REGS__ */
+	smw.adm $r0, [$sp], $r5, #0x0
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+	SAVE_MAC_REGS
+	SAVE_FPU_REGS
+#if defined(NDS32_NESTED) || defined(NDS32_NESTED_READY)
+       mfsr    $r1, $IPC       /* Get IPC.  */
+       mfsr    $r2, $IPSW      /* Get IPSW.  */
+       smw.adm $r1, [$sp], $r2, #0x0   /* Push IPC, IPSW.  */
+#endif
+	mfsr	$r0, $ITYPE	/* Get VID to $r0.  */
+	srli	$r0, $r0, #5
+#ifdef __NDS32_ISA_V2__
+	andi	$r0, $r0, #127
+#else
+	fexti33	$r0, #6
+#endif
+.endm
+
+.macro SAVE_PARTIAL
+/* SAVE_CALLER_REGS code has been moved to
+   vector table generated by compiler.  */
+#ifdef NDS32_EXT_IFC
+	mfusr   $r1, $IFC_LP
+	smw.adm $r1, [$sp], $r2, #0x0	/* Save extra $r2 to keep
+					   stack 8-byte alignment.  */
+#endif
+	SAVE_MAC_REGS
+	SAVE_FPU_REGS
+#if defined(NDS32_NESTED) || defined(NDS32_NESTED_READY)
+       mfsr    $r1, $IPC       /* Get IPC.  */
+       mfsr    $r2, $IPSW      /* Get IPSW.  */
+       smw.adm $r1, [$sp], $r2, #0x0   /* Push IPC, IPSW.  */
+#endif
+.endm
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00.S
new file mode 100644
index 000000000..8dbfac356
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.00, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_00
+	.type	_nds32_vector_00, @function
+_nds32_vector_00:
+1:
+	j	1b
+	.size	_nds32_vector_00, .-_nds32_vector_00
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00_4b.S
new file mode 100644
index 000000000..185aca269
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid00_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.00, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_00_4b
+	.type	_nds32_vector_00_4b, @function
+_nds32_vector_00_4b:
+1:
+	j	1b
+	.size	_nds32_vector_00_4b, .-_nds32_vector_00_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01.S
new file mode 100644
index 000000000..fe96aca5c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.01, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_01
+	.type	_nds32_vector_01, @function
+_nds32_vector_01:
+1:
+	j	1b
+	.size	_nds32_vector_01, .-_nds32_vector_01
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01_4b.S
new file mode 100644
index 000000000..5a4a767e0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid01_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.01, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_01_4b
+	.type	_nds32_vector_01_4b, @function
+_nds32_vector_01_4b:
+1:
+	j	1b
+	.size	_nds32_vector_01_4b, .-_nds32_vector_01_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02.S
new file mode 100644
index 000000000..77e84942a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.02, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_02
+	.type	_nds32_vector_02, @function
+_nds32_vector_02:
+1:
+	j	1b
+	.size	_nds32_vector_02, .-_nds32_vector_02
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02_4b.S
new file mode 100644
index 000000000..e0a5a405b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid02_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.02, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_02_4b
+	.type	_nds32_vector_02_4b, @function
+_nds32_vector_02_4b:
+1:
+	j	1b
+	.size	_nds32_vector_02_4b, .-_nds32_vector_02_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03.S
new file mode 100644
index 000000000..7423f7ad3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.03, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_03
+	.type	_nds32_vector_03, @function
+_nds32_vector_03:
+1:
+	j	1b
+	.size	_nds32_vector_03, .-_nds32_vector_03
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03_4b.S
new file mode 100644
index 000000000..3b8ef06ec
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid03_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.03, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_03_4b
+	.type	_nds32_vector_03_4b, @function
+_nds32_vector_03_4b:
+1:
+	j	1b
+	.size	_nds32_vector_03_4b, .-_nds32_vector_03_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04.S
new file mode 100644
index 000000000..63ecb4da0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.04, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_04
+	.type	_nds32_vector_04, @function
+_nds32_vector_04:
+1:
+	j	1b
+	.size	_nds32_vector_04, .-_nds32_vector_04
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04_4b.S
new file mode 100644
index 000000000..6633522c8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid04_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.04, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_04_4b
+	.type	_nds32_vector_04_4b, @function
+_nds32_vector_04_4b:
+1:
+	j	1b
+	.size	_nds32_vector_04_4b, .-_nds32_vector_04_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05.S
new file mode 100644
index 000000000..839547031
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.05, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_05
+	.type	_nds32_vector_05, @function
+_nds32_vector_05:
+1:
+	j	1b
+	.size	_nds32_vector_05, .-_nds32_vector_05
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05_4b.S
new file mode 100644
index 000000000..9b24b9cf8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid05_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.05, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_05_4b
+	.type	_nds32_vector_05_4b, @function
+_nds32_vector_05_4b:
+1:
+	j	1b
+	.size	_nds32_vector_05_4b, .-_nds32_vector_05_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06.S
new file mode 100644
index 000000000..81d4c59a3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.06, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_06
+	.type	_nds32_vector_06, @function
+_nds32_vector_06:
+1:
+	j	1b
+	.size	_nds32_vector_06, .-_nds32_vector_06
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06_4b.S
new file mode 100644
index 000000000..b8206a2ef
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid06_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.06, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_06_4b
+	.type	_nds32_vector_06_4b, @function
+_nds32_vector_06_4b:
+1:
+	j	1b
+	.size	_nds32_vector_06_4b, .-_nds32_vector_06_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07.S
new file mode 100644
index 000000000..ac151100b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.07, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_07
+	.type	_nds32_vector_07, @function
+_nds32_vector_07:
+1:
+	j	1b
+	.size	_nds32_vector_07, .-_nds32_vector_07
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07_4b.S
new file mode 100644
index 000000000..d9be240c3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid07_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.07, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_07_4b
+	.type	_nds32_vector_07_4b, @function
+_nds32_vector_07_4b:
+1:
+	j	1b
+	.size	_nds32_vector_07_4b, .-_nds32_vector_07_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08.S
new file mode 100644
index 000000000..8652345b0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.08, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_08
+	.type	_nds32_vector_08, @function
+_nds32_vector_08:
+1:
+	j	1b
+	.size	_nds32_vector_08, .-_nds32_vector_08
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08_4b.S
new file mode 100644
index 000000000..86f36693a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid08_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.08, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_08_4b
+	.type	_nds32_vector_08_4b, @function
+_nds32_vector_08_4b:
+1:
+	j	1b
+	.size	_nds32_vector_08_4b, .-_nds32_vector_08_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09.S
new file mode 100644
index 000000000..8b7d702f5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.09, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_09
+	.type	_nds32_vector_09, @function
+_nds32_vector_09:
+1:
+	j	1b
+	.size	_nds32_vector_09, .-_nds32_vector_09
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09_4b.S
new file mode 100644
index 000000000..19a5cc1a5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid09_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.09, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_09_4b
+	.type	_nds32_vector_09_4b, @function
+_nds32_vector_09_4b:
+1:
+	j	1b
+	.size	_nds32_vector_09_4b, .-_nds32_vector_09_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10.S
new file mode 100644
index 000000000..bb4612bba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.10, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_10
+	.type	_nds32_vector_10, @function
+_nds32_vector_10:
+1:
+	j	1b
+	.size	_nds32_vector_10, .-_nds32_vector_10
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10_4b.S
new file mode 100644
index 000000000..0250b8e59
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid10_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.10, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_10_4b
+	.type	_nds32_vector_10_4b, @function
+_nds32_vector_10_4b:
+1:
+	j	1b
+	.size	_nds32_vector_10_4b, .-_nds32_vector_10_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11.S
new file mode 100644
index 000000000..e8dfe487f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.11, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_11
+	.type	_nds32_vector_11, @function
+_nds32_vector_11:
+1:
+	j	1b
+	.size	_nds32_vector_11, .-_nds32_vector_11
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11_4b.S
new file mode 100644
index 000000000..d9efe4223
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid11_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.11, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_11_4b
+	.type	_nds32_vector_11_4b, @function
+_nds32_vector_11_4b:
+1:
+	j	1b
+	.size	_nds32_vector_11_4b, .-_nds32_vector_11_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12.S
new file mode 100644
index 000000000..1d9368b83
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.12, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_12
+	.type	_nds32_vector_12, @function
+_nds32_vector_12:
+1:
+	j	1b
+	.size	_nds32_vector_12, .-_nds32_vector_12
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12_4b.S
new file mode 100644
index 000000000..bf5751a32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid12_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.12, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_12_4b
+	.type	_nds32_vector_12_4b, @function
+_nds32_vector_12_4b:
+1:
+	j	1b
+	.size	_nds32_vector_12_4b, .-_nds32_vector_12_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13.S
new file mode 100644
index 000000000..e830e43fa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.13, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_13
+	.type	_nds32_vector_13, @function
+_nds32_vector_13:
+1:
+	j	1b
+	.size	_nds32_vector_13, .-_nds32_vector_13
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13_4b.S
new file mode 100644
index 000000000..8dffad9e3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid13_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.13, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_13_4b
+	.type	_nds32_vector_13_4b, @function
+_nds32_vector_13_4b:
+1:
+	j	1b
+	.size	_nds32_vector_13_4b, .-_nds32_vector_13_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14.S
new file mode 100644
index 000000000..d4ce5cc8b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.14, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_14
+	.type	_nds32_vector_14, @function
+_nds32_vector_14:
+1:
+	j	1b
+	.size	_nds32_vector_14, .-_nds32_vector_14
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14_4b.S
new file mode 100644
index 000000000..3ab3ef7b2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid14_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.14, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_14_4b
+	.type	_nds32_vector_14_4b, @function
+_nds32_vector_14_4b:
+1:
+	j	1b
+	.size	_nds32_vector_14_4b, .-_nds32_vector_14_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15.S
new file mode 100644
index 000000000..f87fe909d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.15, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_15
+	.type	_nds32_vector_15, @function
+_nds32_vector_15:
+1:
+	j	1b
+	.size	_nds32_vector_15, .-_nds32_vector_15
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15_4b.S
new file mode 100644
index 000000000..aa0405976
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid15_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.15, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_15_4b
+	.type	_nds32_vector_15_4b, @function
+_nds32_vector_15_4b:
+1:
+	j	1b
+	.size	_nds32_vector_15_4b, .-_nds32_vector_15_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16.S
new file mode 100644
index 000000000..eb6f842d1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.16, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_16
+	.type	_nds32_vector_16, @function
+_nds32_vector_16:
+1:
+	j	1b
+	.size	_nds32_vector_16, .-_nds32_vector_16
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16_4b.S
new file mode 100644
index 000000000..c7dcf1093
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid16_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.16, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_16_4b
+	.type	_nds32_vector_16_4b, @function
+_nds32_vector_16_4b:
+1:
+	j	1b
+	.size	_nds32_vector_16_4b, .-_nds32_vector_16_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17.S
new file mode 100644
index 000000000..b0c322a92
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.17, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_17
+	.type	_nds32_vector_17, @function
+_nds32_vector_17:
+1:
+	j	1b
+	.size	_nds32_vector_17, .-_nds32_vector_17
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17_4b.S
new file mode 100644
index 000000000..305e4b1f8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid17_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.17, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_17_4b
+	.type	_nds32_vector_17_4b, @function
+_nds32_vector_17_4b:
+1:
+	j	1b
+	.size	_nds32_vector_17_4b, .-_nds32_vector_17_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18.S
new file mode 100644
index 000000000..2e599f13d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.18, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_18
+	.type	_nds32_vector_18, @function
+_nds32_vector_18:
+1:
+	j	1b
+	.size	_nds32_vector_18, .-_nds32_vector_18
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18_4b.S
new file mode 100644
index 000000000..d29462d89
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid18_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.18, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_18_4b
+	.type	_nds32_vector_18_4b, @function
+_nds32_vector_18_4b:
+1:
+	j	1b
+	.size	_nds32_vector_18_4b, .-_nds32_vector_18_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19.S
new file mode 100644
index 000000000..ba0871976
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.19, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_19
+	.type	_nds32_vector_19, @function
+_nds32_vector_19:
+1:
+	j	1b
+	.size	_nds32_vector_19, .-_nds32_vector_19
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19_4b.S
new file mode 100644
index 000000000..21160d082
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid19_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.19, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_19_4b
+	.type	_nds32_vector_19_4b, @function
+_nds32_vector_19_4b:
+1:
+	j	1b
+	.size	_nds32_vector_19_4b, .-_nds32_vector_19_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20.S
new file mode 100644
index 000000000..c960c785a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.20, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_20
+	.type	_nds32_vector_20, @function
+_nds32_vector_20:
+1:
+	j	1b
+	.size	_nds32_vector_20, .-_nds32_vector_20
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20_4b.S
new file mode 100644
index 000000000..92105d62c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid20_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.20, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_20_4b
+	.type	_nds32_vector_20_4b, @function
+_nds32_vector_20_4b:
+1:
+	j	1b
+	.size	_nds32_vector_20_4b, .-_nds32_vector_20_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21.S
new file mode 100644
index 000000000..a47693f9e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.21, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_21
+	.type	_nds32_vector_21, @function
+_nds32_vector_21:
+1:
+	j	1b
+	.size	_nds32_vector_21, .-_nds32_vector_21
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21_4b.S
new file mode 100644
index 000000000..843dcb877
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid21_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.21, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_21_4b
+	.type	_nds32_vector_21_4b, @function
+_nds32_vector_21_4b:
+1:
+	j	1b
+	.size	_nds32_vector_21_4b, .-_nds32_vector_21_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22.S
new file mode 100644
index 000000000..c389bd92e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.22, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_22
+	.type	_nds32_vector_22, @function
+_nds32_vector_22:
+1:
+	j	1b
+	.size	_nds32_vector_22, .-_nds32_vector_22
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22_4b.S
new file mode 100644
index 000000000..fea74cb5f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid22_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.22, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_22_4b
+	.type	_nds32_vector_22_4b, @function
+_nds32_vector_22_4b:
+1:
+	j	1b
+	.size	_nds32_vector_22_4b, .-_nds32_vector_22_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23.S
new file mode 100644
index 000000000..2e2df81bc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.23, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_23
+	.type	_nds32_vector_23, @function
+_nds32_vector_23:
+1:
+	j	1b
+	.size	_nds32_vector_23, .-_nds32_vector_23
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23_4b.S
new file mode 100644
index 000000000..2b143de7c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid23_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.23, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_23_4b
+	.type	_nds32_vector_23_4b, @function
+_nds32_vector_23_4b:
+1:
+	j	1b
+	.size	_nds32_vector_23_4b, .-_nds32_vector_23_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24.S
new file mode 100644
index 000000000..520447557
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.24, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_24
+	.type	_nds32_vector_24, @function
+_nds32_vector_24:
+1:
+	j	1b
+	.size	_nds32_vector_24, .-_nds32_vector_24
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24_4b.S
new file mode 100644
index 000000000..daedf45c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid24_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.24, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_24_4b
+	.type	_nds32_vector_24_4b, @function
+_nds32_vector_24_4b:
+1:
+	j	1b
+	.size	_nds32_vector_24_4b, .-_nds32_vector_24_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25.S
new file mode 100644
index 000000000..bdbe9f7a0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.25, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_25
+	.type	_nds32_vector_25, @function
+_nds32_vector_25:
+1:
+	j	1b
+	.size	_nds32_vector_25, .-_nds32_vector_25
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25_4b.S
new file mode 100644
index 000000000..a50588f76
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid25_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.25, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_25_4b
+	.type	_nds32_vector_25_4b, @function
+_nds32_vector_25_4b:
+1:
+	j	1b
+	.size	_nds32_vector_25_4b, .-_nds32_vector_25_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26.S
new file mode 100644
index 000000000..bc95a880b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.26, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_26
+	.type	_nds32_vector_26, @function
+_nds32_vector_26:
+1:
+	j	1b
+	.size	_nds32_vector_26, .-_nds32_vector_26
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26_4b.S
new file mode 100644
index 000000000..cf037920e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid26_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.26, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_26_4b
+	.type	_nds32_vector_26_4b, @function
+_nds32_vector_26_4b:
+1:
+	j	1b
+	.size	_nds32_vector_26_4b, .-_nds32_vector_26_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27.S
new file mode 100644
index 000000000..96b967c37
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.27, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_27
+	.type	_nds32_vector_27, @function
+_nds32_vector_27:
+1:
+	j	1b
+	.size	_nds32_vector_27, .-_nds32_vector_27
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27_4b.S
new file mode 100644
index 000000000..3d34042c0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid27_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.27, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_27_4b
+	.type	_nds32_vector_27_4b, @function
+_nds32_vector_27_4b:
+1:
+	j	1b
+	.size	_nds32_vector_27_4b, .-_nds32_vector_27_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28.S
new file mode 100644
index 000000000..d9de47291
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.28, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_28
+	.type	_nds32_vector_28, @function
+_nds32_vector_28:
+1:
+	j	1b
+	.size	_nds32_vector_28, .-_nds32_vector_28
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28_4b.S
new file mode 100644
index 000000000..caf9f15fd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid28_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.28, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_28_4b
+	.type	_nds32_vector_28_4b, @function
+_nds32_vector_28_4b:
+1:
+	j	1b
+	.size	_nds32_vector_28_4b, .-_nds32_vector_28_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29.S
new file mode 100644
index 000000000..9ac7af077
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.29, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_29
+	.type	_nds32_vector_29, @function
+_nds32_vector_29:
+1:
+	j	1b
+	.size	_nds32_vector_29, .-_nds32_vector_29
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29_4b.S
new file mode 100644
index 000000000..4c8529f78
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid29_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.29, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_29_4b
+	.type	_nds32_vector_29_4b, @function
+_nds32_vector_29_4b:
+1:
+	j	1b
+	.size	_nds32_vector_29_4b, .-_nds32_vector_29_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30.S
new file mode 100644
index 000000000..2b4165a2e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.30, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_30
+	.type	_nds32_vector_30, @function
+_nds32_vector_30:
+1:
+	j	1b
+	.size	_nds32_vector_30, .-_nds32_vector_30
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30_4b.S
new file mode 100644
index 000000000..80e1d80fa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid30_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.30, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_30_4b
+	.type	_nds32_vector_30_4b, @function
+_nds32_vector_30_4b:
+1:
+	j	1b
+	.size	_nds32_vector_30_4b, .-_nds32_vector_30_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31.S
new file mode 100644
index 000000000..f6ffcf6f3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.31, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_31
+	.type	_nds32_vector_31, @function
+_nds32_vector_31:
+1:
+	j	1b
+	.size	_nds32_vector_31, .-_nds32_vector_31
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31_4b.S
new file mode 100644
index 000000000..5503c611a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid31_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.31, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_31_4b
+	.type	_nds32_vector_31_4b, @function
+_nds32_vector_31_4b:
+1:
+	j	1b
+	.size	_nds32_vector_31_4b, .-_nds32_vector_31_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32.S
new file mode 100644
index 000000000..5a0250a48
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.32, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_32
+	.type	_nds32_vector_32, @function
+_nds32_vector_32:
+1:
+	j	1b
+	.size	_nds32_vector_32, .-_nds32_vector_32
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32_4b.S
new file mode 100644
index 000000000..4a606f051
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid32_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.32, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_32_4b
+	.type	_nds32_vector_32_4b, @function
+_nds32_vector_32_4b:
+1:
+	j	1b
+	.size	_nds32_vector_32_4b, .-_nds32_vector_32_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33.S
new file mode 100644
index 000000000..5efcbdf74
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.33, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_33
+	.type	_nds32_vector_33, @function
+_nds32_vector_33:
+1:
+	j	1b
+	.size	_nds32_vector_33, .-_nds32_vector_33
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33_4b.S
new file mode 100644
index 000000000..ad8556235
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid33_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.33, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_33_4b
+	.type	_nds32_vector_33_4b, @function
+_nds32_vector_33_4b:
+1:
+	j	1b
+	.size	_nds32_vector_33_4b, .-_nds32_vector_33_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34.S
new file mode 100644
index 000000000..4859c93ec
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.34, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_34
+	.type	_nds32_vector_34, @function
+_nds32_vector_34:
+1:
+	j	1b
+	.size	_nds32_vector_34, .-_nds32_vector_34
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34_4b.S
new file mode 100644
index 000000000..3cd9484aa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid34_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.34, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_34_4b
+	.type	_nds32_vector_34_4b, @function
+_nds32_vector_34_4b:
+1:
+	j	1b
+	.size	_nds32_vector_34_4b, .-_nds32_vector_34_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35.S
new file mode 100644
index 000000000..cd7b7183b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.35, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_35
+	.type	_nds32_vector_35, @function
+_nds32_vector_35:
+1:
+	j	1b
+	.size	_nds32_vector_35, .-_nds32_vector_35
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35_4b.S
new file mode 100644
index 000000000..401e6a25d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid35_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.35, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_35_4b
+	.type	_nds32_vector_35_4b, @function
+_nds32_vector_35_4b:
+1:
+	j	1b
+	.size	_nds32_vector_35_4b, .-_nds32_vector_35_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36.S
new file mode 100644
index 000000000..3162b4fa4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.36, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_36
+	.type	_nds32_vector_36, @function
+_nds32_vector_36:
+1:
+	j	1b
+	.size	_nds32_vector_36, .-_nds32_vector_36
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36_4b.S
new file mode 100644
index 000000000..c23f65d0a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid36_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.36, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_36_4b
+	.type	_nds32_vector_36_4b, @function
+_nds32_vector_36_4b:
+1:
+	j	1b
+	.size	_nds32_vector_36_4b, .-_nds32_vector_36_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37.S
new file mode 100644
index 000000000..bdb1f15e3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.37, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_37
+	.type	_nds32_vector_37, @function
+_nds32_vector_37:
+1:
+	j	1b
+	.size	_nds32_vector_37, .-_nds32_vector_37
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37_4b.S
new file mode 100644
index 000000000..a8f5249d6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid37_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.37, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_37_4b
+	.type	_nds32_vector_37_4b, @function
+_nds32_vector_37_4b:
+1:
+	j	1b
+	.size	_nds32_vector_37_4b, .-_nds32_vector_37_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38.S
new file mode 100644
index 000000000..af0fb2a3f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.38, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_38
+	.type	_nds32_vector_38, @function
+_nds32_vector_38:
+1:
+	j	1b
+	.size	_nds32_vector_38, .-_nds32_vector_38
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38_4b.S
new file mode 100644
index 000000000..2941a6917
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid38_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.38, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_38_4b
+	.type	_nds32_vector_38_4b, @function
+_nds32_vector_38_4b:
+1:
+	j	1b
+	.size	_nds32_vector_38_4b, .-_nds32_vector_38_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39.S
new file mode 100644
index 000000000..31220fe1f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.39, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_39
+	.type	_nds32_vector_39, @function
+_nds32_vector_39:
+1:
+	j	1b
+	.size	_nds32_vector_39, .-_nds32_vector_39
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39_4b.S
new file mode 100644
index 000000000..21efbfdfa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid39_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.39, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_39_4b
+	.type	_nds32_vector_39_4b, @function
+_nds32_vector_39_4b:
+1:
+	j	1b
+	.size	_nds32_vector_39_4b, .-_nds32_vector_39_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40.S
new file mode 100644
index 000000000..ae7b055dd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.40, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_40
+	.type	_nds32_vector_40, @function
+_nds32_vector_40:
+1:
+	j	1b
+	.size	_nds32_vector_40, .-_nds32_vector_40
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40_4b.S
new file mode 100644
index 000000000..fd3787604
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid40_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.40, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_40_4b
+	.type	_nds32_vector_40_4b, @function
+_nds32_vector_40_4b:
+1:
+	j	1b
+	.size	_nds32_vector_40_4b, .-_nds32_vector_40_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41.S
new file mode 100644
index 000000000..8392e63d1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.41, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_41
+	.type	_nds32_vector_41, @function
+_nds32_vector_41:
+1:
+	j	1b
+	.size	_nds32_vector_41, .-_nds32_vector_41
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41_4b.S
new file mode 100644
index 000000000..867d28d3b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid41_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.41, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_41_4b
+	.type	_nds32_vector_41_4b, @function
+_nds32_vector_41_4b:
+1:
+	j	1b
+	.size	_nds32_vector_41_4b, .-_nds32_vector_41_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42.S
new file mode 100644
index 000000000..b9e9a7078
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.42, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_42
+	.type	_nds32_vector_42, @function
+_nds32_vector_42:
+1:
+	j	1b
+	.size	_nds32_vector_42, .-_nds32_vector_42
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42_4b.S
new file mode 100644
index 000000000..69b76873d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid42_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.42, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_42_4b
+	.type	_nds32_vector_42_4b, @function
+_nds32_vector_42_4b:
+1:
+	j	1b
+	.size	_nds32_vector_42_4b, .-_nds32_vector_42_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43.S
new file mode 100644
index 000000000..4d3ac72f9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.43, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_43
+	.type	_nds32_vector_43, @function
+_nds32_vector_43:
+1:
+	j	1b
+	.size	_nds32_vector_43, .-_nds32_vector_43
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43_4b.S
new file mode 100644
index 000000000..7ae8c1add
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid43_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.43, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_43_4b
+	.type	_nds32_vector_43_4b, @function
+_nds32_vector_43_4b:
+1:
+	j	1b
+	.size	_nds32_vector_43_4b, .-_nds32_vector_43_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44.S
new file mode 100644
index 000000000..ee44f447f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.44, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_44
+	.type	_nds32_vector_44, @function
+_nds32_vector_44:
+1:
+	j	1b
+	.size	_nds32_vector_44, .-_nds32_vector_44
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44_4b.S
new file mode 100644
index 000000000..244aeef01
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid44_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.44, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_44_4b
+	.type	_nds32_vector_44_4b, @function
+_nds32_vector_44_4b:
+1:
+	j	1b
+	.size	_nds32_vector_44_4b, .-_nds32_vector_44_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45.S
new file mode 100644
index 000000000..fe4f619c0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.45, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_45
+	.type	_nds32_vector_45, @function
+_nds32_vector_45:
+1:
+	j	1b
+	.size	_nds32_vector_45, .-_nds32_vector_45
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45_4b.S
new file mode 100644
index 000000000..0b0da918b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid45_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.45, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_45_4b
+	.type	_nds32_vector_45_4b, @function
+_nds32_vector_45_4b:
+1:
+	j	1b
+	.size	_nds32_vector_45_4b, .-_nds32_vector_45_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46.S
new file mode 100644
index 000000000..d796b9bc1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.46, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_46
+	.type	_nds32_vector_46, @function
+_nds32_vector_46:
+1:
+	j	1b
+	.size	_nds32_vector_46, .-_nds32_vector_46
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46_4b.S
new file mode 100644
index 000000000..9268b3eff
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid46_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.46, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_46_4b
+	.type	_nds32_vector_46_4b, @function
+_nds32_vector_46_4b:
+1:
+	j	1b
+	.size	_nds32_vector_46_4b, .-_nds32_vector_46_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47.S
new file mode 100644
index 000000000..2923a7abb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.47, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_47
+	.type	_nds32_vector_47, @function
+_nds32_vector_47:
+1:
+	j	1b
+	.size	_nds32_vector_47, .-_nds32_vector_47
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47_4b.S
new file mode 100644
index 000000000..a530380af
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid47_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.47, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_47_4b
+	.type	_nds32_vector_47_4b, @function
+_nds32_vector_47_4b:
+1:
+	j	1b
+	.size	_nds32_vector_47_4b, .-_nds32_vector_47_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48.S
new file mode 100644
index 000000000..4b65412f7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.48, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_48
+	.type	_nds32_vector_48, @function
+_nds32_vector_48:
+1:
+	j	1b
+	.size	_nds32_vector_48, .-_nds32_vector_48
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48_4b.S
new file mode 100644
index 000000000..7210fb1b9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid48_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.48, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_48_4b
+	.type	_nds32_vector_48_4b, @function
+_nds32_vector_48_4b:
+1:
+	j	1b
+	.size	_nds32_vector_48_4b, .-_nds32_vector_48_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49.S
new file mode 100644
index 000000000..8af230502
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.49, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_49
+	.type	_nds32_vector_49, @function
+_nds32_vector_49:
+1:
+	j	1b
+	.size	_nds32_vector_49, .-_nds32_vector_49
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49_4b.S
new file mode 100644
index 000000000..f9c287405
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid49_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.49, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_49_4b
+	.type	_nds32_vector_49_4b, @function
+_nds32_vector_49_4b:
+1:
+	j	1b
+	.size	_nds32_vector_49_4b, .-_nds32_vector_49_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50.S
new file mode 100644
index 000000000..c2538c90b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.50, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_50
+	.type	_nds32_vector_50, @function
+_nds32_vector_50:
+1:
+	j	1b
+	.size	_nds32_vector_50, .-_nds32_vector_50
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50_4b.S
new file mode 100644
index 000000000..a994cb134
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid50_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.50, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_50_4b
+	.type	_nds32_vector_50_4b, @function
+_nds32_vector_50_4b:
+1:
+	j	1b
+	.size	_nds32_vector_50_4b, .-_nds32_vector_50_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51.S
new file mode 100644
index 000000000..41abff724
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.51, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_51
+	.type	_nds32_vector_51, @function
+_nds32_vector_51:
+1:
+	j	1b
+	.size	_nds32_vector_51, .-_nds32_vector_51
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51_4b.S
new file mode 100644
index 000000000..0c8f400c2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid51_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.51, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_51_4b
+	.type	_nds32_vector_51_4b, @function
+_nds32_vector_51_4b:
+1:
+	j	1b
+	.size	_nds32_vector_51_4b, .-_nds32_vector_51_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52.S
new file mode 100644
index 000000000..da40b63f5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.52, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_52
+	.type	_nds32_vector_52, @function
+_nds32_vector_52:
+1:
+	j	1b
+	.size	_nds32_vector_52, .-_nds32_vector_52
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52_4b.S
new file mode 100644
index 000000000..2e967bc7b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid52_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.52, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_52_4b
+	.type	_nds32_vector_52_4b, @function
+_nds32_vector_52_4b:
+1:
+	j	1b
+	.size	_nds32_vector_52_4b, .-_nds32_vector_52_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53.S
new file mode 100644
index 000000000..327fc0562
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.53, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_53
+	.type	_nds32_vector_53, @function
+_nds32_vector_53:
+1:
+	j	1b
+	.size	_nds32_vector_53, .-_nds32_vector_53
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53_4b.S
new file mode 100644
index 000000000..1a1e657e6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid53_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.53, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_53_4b
+	.type	_nds32_vector_53_4b, @function
+_nds32_vector_53_4b:
+1:
+	j	1b
+	.size	_nds32_vector_53_4b, .-_nds32_vector_53_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54.S
new file mode 100644
index 000000000..368013a37
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.54, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_54
+	.type	_nds32_vector_54, @function
+_nds32_vector_54:
+1:
+	j	1b
+	.size	_nds32_vector_54, .-_nds32_vector_54
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54_4b.S
new file mode 100644
index 000000000..46008e494
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid54_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.54, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_54_4b
+	.type	_nds32_vector_54_4b, @function
+_nds32_vector_54_4b:
+1:
+	j	1b
+	.size	_nds32_vector_54_4b, .-_nds32_vector_54_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55.S
new file mode 100644
index 000000000..d9a597e53
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.55, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_55
+	.type	_nds32_vector_55, @function
+_nds32_vector_55:
+1:
+	j	1b
+	.size	_nds32_vector_55, .-_nds32_vector_55
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55_4b.S
new file mode 100644
index 000000000..71b39721c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid55_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.55, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_55_4b
+	.type	_nds32_vector_55_4b, @function
+_nds32_vector_55_4b:
+1:
+	j	1b
+	.size	_nds32_vector_55_4b, .-_nds32_vector_55_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56.S
new file mode 100644
index 000000000..f82174856
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.56, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_56
+	.type	_nds32_vector_56, @function
+_nds32_vector_56:
+1:
+	j	1b
+	.size	_nds32_vector_56, .-_nds32_vector_56
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56_4b.S
new file mode 100644
index 000000000..bd43a4507
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid56_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.56, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_56_4b
+	.type	_nds32_vector_56_4b, @function
+_nds32_vector_56_4b:
+1:
+	j	1b
+	.size	_nds32_vector_56_4b, .-_nds32_vector_56_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57.S
new file mode 100644
index 000000000..f9ec9d852
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.57, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_57
+	.type	_nds32_vector_57, @function
+_nds32_vector_57:
+1:
+	j	1b
+	.size	_nds32_vector_57, .-_nds32_vector_57
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57_4b.S
new file mode 100644
index 000000000..136111b01
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid57_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.57, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_57_4b
+	.type	_nds32_vector_57_4b, @function
+_nds32_vector_57_4b:
+1:
+	j	1b
+	.size	_nds32_vector_57_4b, .-_nds32_vector_57_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58.S
new file mode 100644
index 000000000..af682b1af
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.58, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_58
+	.type	_nds32_vector_58, @function
+_nds32_vector_58:
+1:
+	j	1b
+	.size	_nds32_vector_58, .-_nds32_vector_58
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58_4b.S
new file mode 100644
index 000000000..19cc66446
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid58_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.58, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_58_4b
+	.type	_nds32_vector_58_4b, @function
+_nds32_vector_58_4b:
+1:
+	j	1b
+	.size	_nds32_vector_58_4b, .-_nds32_vector_58_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59.S
new file mode 100644
index 000000000..dd762a988
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.59, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_59
+	.type	_nds32_vector_59, @function
+_nds32_vector_59:
+1:
+	j	1b
+	.size	_nds32_vector_59, .-_nds32_vector_59
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59_4b.S
new file mode 100644
index 000000000..d51299334
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid59_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.59, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_59_4b
+	.type	_nds32_vector_59_4b, @function
+_nds32_vector_59_4b:
+1:
+	j	1b
+	.size	_nds32_vector_59_4b, .-_nds32_vector_59_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60.S
new file mode 100644
index 000000000..1d6012f11
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.60, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_60
+	.type	_nds32_vector_60, @function
+_nds32_vector_60:
+1:
+	j	1b
+	.size	_nds32_vector_60, .-_nds32_vector_60
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60_4b.S
new file mode 100644
index 000000000..7ac29a1dd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid60_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.60, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_60_4b
+	.type	_nds32_vector_60_4b, @function
+_nds32_vector_60_4b:
+1:
+	j	1b
+	.size	_nds32_vector_60_4b, .-_nds32_vector_60_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61.S
new file mode 100644
index 000000000..d236e6b9d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.61, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_61
+	.type	_nds32_vector_61, @function
+_nds32_vector_61:
+1:
+	j	1b
+	.size	_nds32_vector_61, .-_nds32_vector_61
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61_4b.S
new file mode 100644
index 000000000..b5f396b87
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid61_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.61, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_61_4b
+	.type	_nds32_vector_61_4b, @function
+_nds32_vector_61_4b:
+1:
+	j	1b
+	.size	_nds32_vector_61_4b, .-_nds32_vector_61_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62.S
new file mode 100644
index 000000000..83a80bd54
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.62, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_62
+	.type	_nds32_vector_62, @function
+_nds32_vector_62:
+1:
+	j	1b
+	.size	_nds32_vector_62, .-_nds32_vector_62
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62_4b.S
new file mode 100644
index 000000000..20a7acd9b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid62_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.62, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_62_4b
+	.type	_nds32_vector_62_4b, @function
+_nds32_vector_62_4b:
+1:
+	j	1b
+	.size	_nds32_vector_62_4b, .-_nds32_vector_62_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63.S
new file mode 100644
index 000000000..800827b32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.63, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_63
+	.type	_nds32_vector_63, @function
+_nds32_vector_63:
+1:
+	j	1b
+	.size	_nds32_vector_63, .-_nds32_vector_63
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63_4b.S
new file mode 100644
index 000000000..ffb181666
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid63_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.63, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_63_4b
+	.type	_nds32_vector_63_4b, @function
+_nds32_vector_63_4b:
+1:
+	j	1b
+	.size	_nds32_vector_63_4b, .-_nds32_vector_63_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64.S
new file mode 100644
index 000000000..bf15d00a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.64, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_64
+	.type	_nds32_vector_64, @function
+_nds32_vector_64:
+1:
+	j	1b
+	.size	_nds32_vector_64, .-_nds32_vector_64
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64_4b.S
new file mode 100644
index 000000000..996c31908
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid64_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.64, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_64_4b
+	.type	_nds32_vector_64_4b, @function
+_nds32_vector_64_4b:
+1:
+	j	1b
+	.size	_nds32_vector_64_4b, .-_nds32_vector_64_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65.S
new file mode 100644
index 000000000..c37927b98
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.65, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_65
+	.type	_nds32_vector_65, @function
+_nds32_vector_65:
+1:
+	j	1b
+	.size	_nds32_vector_65, .-_nds32_vector_65
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65_4b.S
new file mode 100644
index 000000000..c8a0c3e94
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid65_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.65, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_65_4b
+	.type	_nds32_vector_65_4b, @function
+_nds32_vector_65_4b:
+1:
+	j	1b
+	.size	_nds32_vector_65_4b, .-_nds32_vector_65_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66.S
new file mode 100644
index 000000000..8ef537b21
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.66, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_66
+	.type	_nds32_vector_66, @function
+_nds32_vector_66:
+1:
+	j	1b
+	.size	_nds32_vector_66, .-_nds32_vector_66
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66_4b.S
new file mode 100644
index 000000000..c6eb4129e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid66_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.66, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_66_4b
+	.type	_nds32_vector_66_4b, @function
+_nds32_vector_66_4b:
+1:
+	j	1b
+	.size	_nds32_vector_66_4b, .-_nds32_vector_66_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67.S
new file mode 100644
index 000000000..fd8b42480
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.67, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_67
+	.type	_nds32_vector_67, @function
+_nds32_vector_67:
+1:
+	j	1b
+	.size	_nds32_vector_67, .-_nds32_vector_67
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67_4b.S
new file mode 100644
index 000000000..27a797aa4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid67_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.67, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_67_4b
+	.type	_nds32_vector_67_4b, @function
+_nds32_vector_67_4b:
+1:
+	j	1b
+	.size	_nds32_vector_67_4b, .-_nds32_vector_67_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68.S
new file mode 100644
index 000000000..08e8ba916
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.68, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_68
+	.type	_nds32_vector_68, @function
+_nds32_vector_68:
+1:
+	j	1b
+	.size	_nds32_vector_68, .-_nds32_vector_68
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68_4b.S
new file mode 100644
index 000000000..de57f6bab
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid68_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.68, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_68_4b
+	.type	_nds32_vector_68_4b, @function
+_nds32_vector_68_4b:
+1:
+	j	1b
+	.size	_nds32_vector_68_4b, .-_nds32_vector_68_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69.S
new file mode 100644
index 000000000..1bd459b99
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.69, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_69
+	.type	_nds32_vector_69, @function
+_nds32_vector_69:
+1:
+	j	1b
+	.size	_nds32_vector_69, .-_nds32_vector_69
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69_4b.S
new file mode 100644
index 000000000..89073d826
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid69_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.69, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_69_4b
+	.type	_nds32_vector_69_4b, @function
+_nds32_vector_69_4b:
+1:
+	j	1b
+	.size	_nds32_vector_69_4b, .-_nds32_vector_69_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70.S
new file mode 100644
index 000000000..be517b713
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.70, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_70
+	.type	_nds32_vector_70, @function
+_nds32_vector_70:
+1:
+	j	1b
+	.size	_nds32_vector_70, .-_nds32_vector_70
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70_4b.S
new file mode 100644
index 000000000..5dd016df3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid70_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.70, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_70_4b
+	.type	_nds32_vector_70_4b, @function
+_nds32_vector_70_4b:
+1:
+	j	1b
+	.size	_nds32_vector_70_4b, .-_nds32_vector_70_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71.S
new file mode 100644
index 000000000..54f38c56a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.71, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_71
+	.type	_nds32_vector_71, @function
+_nds32_vector_71:
+1:
+	j	1b
+	.size	_nds32_vector_71, .-_nds32_vector_71
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71_4b.S
new file mode 100644
index 000000000..f851043f7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid71_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.71, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_71_4b
+	.type	_nds32_vector_71_4b, @function
+_nds32_vector_71_4b:
+1:
+	j	1b
+	.size	_nds32_vector_71_4b, .-_nds32_vector_71_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72.S
new file mode 100644
index 000000000..2faeba682
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.72, "ax"
+	.vec_size	16
+	.align	4
+	.weak	_nds32_vector_72
+	.type	_nds32_vector_72, @function
+_nds32_vector_72:
+1:
+	j	1b
+	.size	_nds32_vector_72, .-_nds32_vector_72
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72_4b.S b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72_4b.S
new file mode 100644
index 000000000..d7638fe04
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/vec_vid72_4b.S
@@ -0,0 +1,34 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_vector.72, "ax"
+	.vec_size	4
+	.align	2
+	.weak	_nds32_vector_72_4b
+	.type	_nds32_vector_72_4b, @function
+_nds32_vector_72_4b:
+1:
+	j	1b
+	.size	_nds32_vector_72_4b, .-_nds32_vector_72_4b
diff --git a/gcc-4.9/libgcc/config/nds32/isr-library/wrh.S b/gcc-4.9/libgcc/config/nds32/isr-library/wrh.S
new file mode 100644
index 000000000..bf5e1c038
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/isr-library/wrh.S
@@ -0,0 +1,32 @@
+/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.nds32_wrh, "a"
+	.align	2
+	.weak	_nds32_wrh
+	.type	_nds32_wrh, @object
+_nds32_wrh:
+	.word	0
+	.size	_nds32_wrh, .-_nds32_wrh
diff --git a/gcc-4.9/libgcc/config/nds32/lib1asmsrc-mculib.S b/gcc-4.9/libgcc/config/nds32/lib1asmsrc-mculib.S
new file mode 100644
index 000000000..6e1c3d07a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/lib1asmsrc-mculib.S
@@ -0,0 +1,5213 @@
+/* mculib libgcc routines of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.mdebug.abi_nds32
+	.previous
+
+
+/* ------------------------------------------- */
+/* FPBIT floating point operations for libgcc  */
+/* ------------------------------------------- */
+
+#ifdef L_addsub_sf
+
+	.text
+	.align	2
+	.global	__subsf3
+	.type	__subsf3, @function
+__subsf3:
+	push    $lp
+	pushm   $r6, $r9
+
+	move    $r2, #0x80000000
+	xor     $r1, $r1, $r2
+
+	j       .Lsfpadd
+
+	.global	__addsf3
+	.type	__addsf3, @function
+__addsf3:
+	push    $lp
+	pushm   $r6, $r9
+.Lsfpadd:
+	srli    $r5, $r0, #23
+	andi    $r5, $r5, #0xff
+	srli    $r7, $r1, #23
+	andi    $r7, $r7, #0xff
+	move    $r3, #0x80000000
+	slli    $r4, $r0, #8
+	or      $r4, $r4, $r3
+	slli    $r6, $r1, #8
+	or      $r6, $r6, $r3
+
+	addi    $r9, $r5, #-1
+	slti    $r15, $r9, #0xfe
+	beqzs8  .LEspecA
+
+.LElab1:
+	addi    $r9, $r7, #-1
+	slti    $r15, $r9, #0xfe
+	beqzs8  .LEspecB
+
+.LElab2:
+	sub     $r8, $r5, $r7
+	sltsi   $r15, $r8, #0
+	bnezs8  .Li1
+	sltsi   $r15, $r8, #0x20
+	bnezs8  .Li2
+	move    $r6, #2
+	j       .Le1
+.Li2:
+	move    $r2, $r6
+	srl     $r6, $r6, $r8
+	sll     $r9, $r6, $r8
+	beq     $r9, $r2, .Le1
+	ori     $r6, $r6, #2
+	j       .Le1
+.Li1:
+	move    $r5, $r7
+	subri   $r8, $r8, #0
+	sltsi   $r15, $r8, #0x20
+	bnezs8  .Li4
+	move    $r4, #2
+	j       .Le1
+.Li4:
+	move    $r2, $r4
+	srl     $r4, $r4, $r8
+	sll     $r9, $r4, $r8
+	beq     $r9, $r2, .Le1
+	ori     $r4, $r4, #2
+
+.Le1:
+	and     $r8, $r0, $r3
+	xor     $r9, $r8, $r1
+	sltsi   $r15, $r9, #0
+	bnezs8  .LEsub1
+
+	#ADD($r4, $r6)
+	add     $r4, $r4, $r6
+	slt     $r15, $r4, $r6
+	beqzs8  .LEres
+	andi    $r9, $r4, #1
+	beqz    $r9, .Li7
+	ori     $r4, $r4, #2
+.Li7:
+	srli    $r4, $r4, #1
+	addi    $r5, $r5, #1
+	subri   $r15, $r5, #0xff
+	bnezs8  .LEres
+	move    $r4, #0
+	j       .LEres
+
+.LEsub1:
+	#SUB($r4, $r6)
+	move    $r15, $r4
+	sub     $r4, $r4, $r6
+	slt     $r15, $r15, $r4
+	beqzs8  .Li9
+	subri   $r4, $r4, #0
+	xor     $r8, $r8, $r3
+	j       .Le9
+.Li9:
+	beqz    $r4, .LEzer
+.Le9:
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, $r4
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+	sub     $r5, $r5, $r2
+	sll     $r4, $r4, $r2
+
+.LEres:
+	blez    $r5, .LEund
+
+.LElab12:
+	#ADD($r4, $0x80)
+	move    $r15, #0x80
+	add     $r4, $r4, $r15
+	slt     $r15, $r4, $r15
+
+	#ADDC($r5, $0x0)
+	add     $r5, $r5, $r15
+	srli    $r9, $r4, #8
+	andi    $r9, $r9, #1
+	sub     $r4, $r4, $r9
+	slli    $r4, $r4, #1
+	srli    $r4, $r4, #9
+	slli    $r9, $r5, #23
+	or      $r4, $r4, $r9
+	or      $r0, $r4, $r8
+
+.LE999:
+	popm    $r6, $r9
+	pop     $lp
+	ret5    $lp
+
+.LEund:
+	subri   $r2, $r5, #1
+	slti    $r15, $r2, #0x20
+	beqzs8  .LEzer
+	move    $r9, #0x80000000
+	or      $r4, $r4, $r9
+	subri   $r9, $r2, #0x20
+	sll     $r5, $r4, $r9
+	srl     $r4, $r4, $r2
+	beqz    $r5, .Li10
+	ori     $r4, $r4, #1
+.Li10:
+	move    $r5, #0
+	addi    $r9, $r4, #0x80
+	sltsi   $r15, $r9, #0
+	beqzs8  .LElab12
+	move    $r5, #1
+	j       .LElab12
+
+.LEspecA:
+	bnez    $r5, .Li12
+	add     $r4, $r4, $r4
+	beqz    $r4, .Li13
+#ifdef __NDS32_PERF_EXT__
+	clz	$r8, $r4
+#else
+	pushm	$r0, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r8, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r5, $r5, $r8
+	sll     $r4, $r4, $r8
+	j       .LElab1
+.Li13:
+	subri   $r15, $r7, #0xff
+	beqzs8  .LEspecB
+	move    $r9, #0x80000000
+	bne     $r1, $r9, .LEretB
+.Li12:
+	add     $r9, $r4, $r4
+	bnez    $r9, .LEnan
+	subri   $r15, $r7, #0xff
+	bnezs8  .LEretA
+	xor     $r9, $r0, $r1
+	sltsi   $r15, $r9, #0
+	bnezs8  .LEnan
+	j       .LEretB
+
+.LEspecB:
+	bnez    $r7, .Li15
+	add     $r6, $r6, $r6
+	beqz    $r6, .LEretA
+#ifdef __NDS32_PERF_EXT__
+	clz	$r8, $r6
+#else
+	pushm	$r0, $r5
+	move	$r0, $r6
+	bal	__clzsi2
+	move	$r8, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r7, $r7, $r8
+	sll     $r6, $r6, $r8
+	j       .LElab2
+.Li15:
+	add     $r9, $r6, $r6
+	bnez    $r9, .LEnan
+
+.LEretB:
+	move    $r0, $r1
+	j       .LE999
+
+.LEretA:
+	j       .LE999
+
+.LEzer:
+	move    $r0, #0
+	j       .LE999
+
+.LEnan:
+	move    $r0, #0xffc00000
+	j       .LE999
+	.size	__subsf3, .-__subsf3
+	.size	__addsf3, .-__addsf3
+#endif /* L_addsub_sf */
+
+
+
+#ifdef L_sf_to_si
+
+	.text
+	.align	2
+	.global	__fixsfsi
+	.type	__fixsfsi, @function
+__fixsfsi:
+	push    $lp
+
+	slli    $r1, $r0, #8
+	move    $r3, #0x80000000
+	or      $r1, $r1, $r3
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	subri   $r2, $r3, #0x9e
+	blez    $r2, .LJspec
+	sltsi   $r15, $r2, #0x20
+	bnezs8  .Li42
+	move    $r0, #0
+	j       .LJ999
+.Li42:
+	srl     $r1, $r1, $r2
+	sltsi   $r15, $r0, #0
+	beqzs8  .Li43
+	subri   $r1, $r1, #0
+.Li43:
+	move    $r0, $r1
+
+.LJ999:
+	pop     $lp
+	ret5    $lp
+
+.LJspec:
+	move    $r3, #0x7f800000
+	slt     $r15, $r3, $r0
+	beqzs8  .Li44
+	move    $r0, #0x80000000
+	j       .LJ999
+.Li44:
+	move    $r0, #0x7fffffff
+	j       .LJ999
+	.size	__fixsfsi, .-__fixsfsi
+#endif /* L_sf_to_si */
+
+
+
+#ifdef L_divsi3
+
+	.text
+	.align	2
+	.globl	__divsi3
+	.type	__divsi3, @function
+__divsi3:
+	! ---------------------------------------------------------------------
+	! neg = 0;
+	! if (a < 0)
+	! {   a = -a;
+	!     neg = !neg;
+	! }
+	! ---------------------------------------------------------------------
+	sltsi	$r5, $r0, 0			! $r5  <- neg = (a < 0) ? 1 : 0
+	subri	$r4, $r0, 0			! $r4  <- a = -a
+	cmovn	$r0, $r4, $r5			! $r0  <- a = neg ? -a : a
+.L2:
+	! ---------------------------------------------------------------------
+	! if (b < 0)
+	! ---------------------------------------------------------------------
+	bgez	$r1, .L3			! if b >= 0, skip
+	! ---------------------------------------------------------------------
+	! {   b=-b;
+	!     neg=!neg;
+	! }
+	! ---------------------------------------------------------------------
+	subri	$r1, $r1, 0			! $r1  <- b = -b
+	subri	$r5, $r5, 1			! $r5  <- neg = !neg
+.L3:
+	! ---------------------------------------------------------------------
+	!!res = udivmodsi4 (a, b, 1);
+	! res = 0;
+	! if (den != 0)
+	! ---------------------------------------------------------------------
+	movi	$r2, 0				! $r2  <- res = 0
+	beqz	$r1, .L1			! if den == 0, skip
+	! ---------------------------------------------------------------------
+	! bit = 1;
+	! ---------------------------------------------------------------------
+	movi	$r4, 1				! $r4  <- bit = 1
+#ifndef __OPTIMIZE_SIZE__
+.L6:
+#endif
+	! ---------------------------------------------------------------------
+	! while (den < num && bit && !(den & (1L << 31)))
+	! ---------------------------------------------------------------------
+	slt	$ta, $r1, $r0			! $ta  <- den < num ?
+	beqz	$ta, .L5			! if no, skip
+	! ---------------------------------------------------------------------
+	! {   den << = 1;
+	!     bit << = 1;
+	! }
+	! ---------------------------------------------------------------------
+#if defined (__OPTIMIZE_SIZE__) && !defined (__NDS32_ISA_V3M__)
+	clz	$r3, $r1			! $r3  <- leading zero count for den
+	clz	$ta, $r0			! $ta  <- leading zero count for num
+	sub	$r3, $r3, $ta			! $r3  <- number of bits to shift
+	sll	$r1, $r1, $r3			! $r1  <- den
+	sll	$r4, $r4, $r3			! $r2  <- bit
+#else
+	slli	$r1, $r1, 1			! $r1  <- den << = 1
+	slli	$r4, $r4, 1			! $r4  <- bit << = 1
+	b	.L6				! continue loop
+#endif
+.L5:
+	! ---------------------------------------------------------------------
+	! while (bit)
+	! {   if (num >= den)
+	! ---------------------------------------------------------------------
+	slt	$ta, $r0, $r1			! $ta  <- num < den ?
+	bnez	$ta, .L9			! if yes, skip
+	! ---------------------------------------------------------------------
+	!     {   num -= den;
+	!         res |= bit;
+	!     }
+	! ---------------------------------------------------------------------
+	sub	$r0, $r0, $r1			! $r0  <- num -= den
+	or	$r2, $r2, $r4			! $r2  <- res |= bit
+.L9:
+	! ---------------------------------------------------------------------
+	!     bit >> = 1;
+	!     den >> = 1;
+	! }
+	!!if (modwanted)
+	!!    return num;
+	!!return res;
+	! ---------------------------------------------------------------------
+	srli	$r4, $r4, 1			! $r4  <- bit >> = 1
+	srli	$r1, $r1, 1			! $r1  <- den >> = 1
+	bnez	$r4, .L5			! if bit != 0, continue loop
+.L1:
+	! ---------------------------------------------------------------------
+	! if (neg)
+	!     res = -res;
+	! return res;
+	! ---------------------------------------------------------------------
+	subri	$r0, $r2, 0			! $r0  <- -res
+	cmovz	$r0, $r2, $r5			! $r0  <- neg ? -res : res
+	! ---------------------------------------------------------------------
+	ret
+	.size	__divsi3, .-__divsi3
+#endif /* L_divsi3 */
+
+
+
+#ifdef L_divdi3
+
+	!--------------------------------------
+	#ifdef __big_endian__
+		#define  V1H  $r0
+		#define  V1L  $r1
+		#define  V2H  $r2
+		#define  V2L  $r3
+	#else
+		#define  V1H  $r1
+		#define  V1L  $r0
+		#define  V2H  $r3
+		#define  V2L  $r2
+	#endif
+	!--------------------------------------
+	.text
+	.align	2
+	.globl	__divdi3
+	.type	__divdi3, @function
+__divdi3:
+	! prologue
+#ifdef __NDS32_ISA_V3M__
+	push25	$r10, 0
+#else
+	smw.adm	$r6, [$sp], $r10, 2
+#endif
+	! end of prologue
+	move	$r8, V1L
+	move	$r9, V1H
+	move	$r6, V2L
+	move	$r7, V2H
+	movi	$r10, 0
+	bgez	V1H, .L80
+	bal	__negdi2
+	move	$r8, V1L
+	move	$r9, V1H
+	movi	$r10, -1
+.L80:
+	bgez	$r7, .L81
+	move	V1L, $r6
+	move	V1H, $r7
+	bal	__negdi2
+	move	$r6, V1L
+	move	$r7, V1H
+	nor	$r10, $r10, $r10
+.L81:
+	move	V2L, $r6
+	move	V2H, $r7
+	move	V1L, $r8
+	move	V1H, $r9
+	movi	$r4, 0
+	bal	__udivmoddi4
+	beqz	$r10, .L82
+	bal	__negdi2
+.L82:
+	! epilogue
+#ifdef __NDS32_ISA_V3M__
+	pop25	$r10, 0
+#else
+	lmw.bim	$r6, [$sp], $r10, 2
+	ret
+#endif
+	.size	__divdi3, .-__divdi3
+#endif /* L_divdi3 */
+
+
+
+#ifdef L_modsi3
+
+	.text
+	.align	2
+	.globl	__modsi3
+	.type	__modsi3, @function
+__modsi3:
+	! ---------------------------------------------------------------------
+	! neg=0;
+	! if (a<0)
+	! {   a=-a;
+	!     neg=1;
+	! }
+	! ---------------------------------------------------------------------
+	sltsi	$r5, $r0, 0			! $r5  <- neg < 0 ? 1 : 0
+	subri	$r4, $r0, 0			! $r4  <- -a
+	cmovn	$r0, $r4, $r5			! $r0  <- |a|
+	! ---------------------------------------------------------------------
+	! if (b < 0)
+#ifndef __NDS32_PERF_EXT__
+	! ---------------------------------------------------------------------
+	bgez	$r1, .L3			! if b >= 0, skip
+	! ---------------------------------------------------------------------
+	!     b = -b;
+	! ---------------------------------------------------------------------
+	subri	$r1, $r1, 0			! $r1  <- |b|
+.L3:
+	! ---------------------------------------------------------------------
+	!!res = udivmodsi4 (a, b, 1);
+	! if (den != 0)
+	! ---------------------------------------------------------------------
+#else /* __NDS32_PERF_EXT__ */
+	!     b = -b;
+	!!res = udivmodsi4 (a, b, 1);
+	! if (den != 0)
+	! ---------------------------------------------------------------------
+	abs	$r1, $r1			! $r1  <- |b|
+#endif /* __NDS32_PERF_EXT__ */
+	beqz	$r1, .L1			! if den == 0, skip
+	! ---------------------------------------------------------------------
+	! {   bit = 1;
+	!     res = 0;
+	! ---------------------------------------------------------------------
+	movi	$r4, 1				! $r4  <- bit = 1
+#ifndef __OPTIMIZE_SIZE__
+.L6:
+#endif
+	! ---------------------------------------------------------------------
+	!     while (den < num&&bit && !(den & (1L << 31)))
+	! ---------------------------------------------------------------------
+	slt	$ta, $r1, $r0			! $ta  <- den < num ?
+	beqz	$ta, .L5			! if no, skip
+	! ---------------------------------------------------------------------
+	!     {   den << = 1;
+	!         bit << = 1;
+	!     }
+	! ---------------------------------------------------------------------
+#if defined (__OPTIMIZE_SIZE__) && ! defined (__NDS32_ISA_V3M__)
+	clz	$r3, $r1			! $r3  <- leading zero count for den
+	clz	$ta, $r0			! $ta  <- leading zero count for num
+	sub	$r3, $r3, $ta			! $r3  <- number of bits to shift
+	sll	$r1, $r1, $r3			! $r1  <- den
+	sll	$r4, $r4, $r3			! $r2  <- bit
+#else
+	slli	$r1, $r1, 1			! $r1  <- den << = 1
+	slli	$r4, $r4, 1			! $r4  <- bit << = 1
+	b	.L6				! continue loop
+#endif
+.L5:
+	! ---------------------------------------------------------------------
+	!     while (bit)
+	!     {   if (num >= den)
+	!         {   num -= den;
+	!             res |= bit;
+	!         }
+	!         bit >> = 1;
+	!         den >> = 1;
+	!     }
+	! }
+	!!if (modwanted)
+	!!    return num;
+	!!return res;
+	! ---------------------------------------------------------------------
+	sub	$r2, $r0, $r1			! $r2  <- num - den
+	slt	$ta, $r0, $r1			! $ta  <- num < den ?
+	srli	$r4, $r4, 1			! $r4  <- bit >> = 1
+	cmovz	$r0, $r2, $ta			! $r0  <- num = (num < den) ? num : num - den
+	srli	$r1, $r1, 1			! $r1  <- den >> = 1
+	bnez	$r4, .L5			! if bit != 0, continue loop
+.L1:
+	! ---------------------------------------------------------------------
+	! if (neg)
+	!     res = -res;
+	! return res;
+	! ---------------------------------------------------------------------
+	subri	$r3, $r0, 0			! $r3  <- -res
+	cmovn	$r0, $r3, $r5			! $r0  <- neg ? -res : res
+	! ---------------------------------------------------------------------
+	ret
+	.size	__modsi3, .-__modsi3
+#endif /* L_modsi3 */
+
+
+
+#ifdef L_moddi3
+
+	!--------------------------------------
+	#ifdef __big_endian__
+		#define  V1H  $r0
+		#define  V1L  $r1
+		#define  V2H  $r2
+		#define  V2L  $r3
+	#else
+		#define  V1H  $r1
+		#define  V1L  $r0
+		#define  V2H  $r3
+		#define  V2L  $r2
+	#endif
+	!--------------------------------------
+	.text
+	.align	2
+	.globl	__moddi3
+	.type	__moddi3, @function
+__moddi3:
+	! =====================================================================
+	! stack allocation:
+	! sp+32 +-----------------------+
+	!       | $lp                   |
+	! sp+28 +-----------------------+
+	!       | $r6 - $r10            |
+	! sp+8  +-----------------------+
+	!       |                       |
+	! sp+4  +-----------------------+
+	!       |                       |
+	! sp    +-----------------------+
+	! =====================================================================
+	! prologue
+#ifdef __NDS32_ISA_V3M__
+	push25	$r10, 8
+#else
+	smw.adm	$r6, [$sp], $r10, 2
+	addi	$sp, $sp, -8
+#endif
+	! end of prologue
+	!------------------------------------------
+	! 	__moddi3 (DWtype u, DWtype v)
+	!		{
+	!			word_type c = 0;
+	!			DWunion uu = {.ll = u};
+	!			DWunion vv = {.ll = v};
+	!			DWtype w;
+	!		if (uu.s.high < 0)
+	!  		  c = ~c,
+	!		  uu.ll = -uu.ll;
+	!---------------------------------------------
+	move	$r8, V1L
+	move	$r9, V1H
+	move	$r6, V2L
+	move	$r7, V2H
+	movi	$r10, 0        ! r10 = c = 0
+	bgez	V1H, .L80      ! if u > 0 , go L80
+	bal	__negdi2
+	move	$r8, V1L
+	move	$r9, V1H
+	movi	$r10, -1       ! r10 = c = ~c
+	!------------------------------------------------
+	!	 	if (vv.s.high < 0)
+	!		  vv.ll = -vv.ll;
+	!----------------------------------------------
+.L80:
+	bgez	$r7, .L81     !  if v > 0 , go L81
+	move	V1L, $r6
+	move	V1H, $r7
+	bal	__negdi2
+	move	$r6, V1L
+	move	$r7, V1H
+	!------------------------------------------
+	!		(void) __udivmoddi4 (uu.ll, vv.ll, &w);
+	!		if (c)
+	!		  w = -w;
+	!		return w;
+	!-----------------------------------------
+.L81:
+	move	V2L, $r6
+	move	V2H, $r7
+	move	V1L, $r8
+	move	V1H, $r9
+	addi	$r4, $sp, 0
+	bal	__udivmoddi4
+	lwi	$r0, [$sp+(0)]    ! le: sp + 0 is low, be: sp + 0 is high
+	lwi	$r1, [$sp+(4)]    ! le: sp + 4 is low, be: sp + 4 is high
+	beqz	$r10, .L82
+	bal	__negdi2
+.L82:
+	! epilogue
+#ifdef __NDS32_ISA_V3M__
+	pop25	$r10, 8
+#else
+	addi	$sp, $sp, 8
+	lmw.bim	$r6, [$sp], $r10, 2
+	ret
+#endif
+	.size	__moddi3, .-__moddi3
+#endif /* L_moddi3 */
+
+
+
+#ifdef L_mulsi3
+
+	.text
+	.align	2
+	.globl	__mulsi3
+	.type	__mulsi3, @function
+__mulsi3:
+	! ---------------------------------------------------------------------
+	! r = 0;
+	! while (a)
+	! $r0:       r
+	! $r1:       b
+	! $r2:       a
+	! ---------------------------------------------------------------------
+	beqz	$r0, .L7			! if a == 0, done
+	move	$r2, $r0			! $r2  <- a
+	movi	$r0, 0				! $r0  <- r <- 0
+.L8:
+	! ---------------------------------------------------------------------
+	! {   if (a & 1)
+	!         r += b;
+	!     a >> = 1;
+	!     b << = 1;
+	! }
+	! $r0:       r
+	! $r1:       b
+	! $r2:       a
+	! $r3:       scratch
+	! $r4:       scratch
+	! ---------------------------------------------------------------------
+	andi	$r3, $r2, 1			! $r3  <- a & 1
+	add	$r4, $r0, $r1			! $r4  <- r += b
+	cmovn	$r0, $r4, $r3			! $r0  <- r
+	srli	$r2, $r2, 1			! $r2  <- a >> = 1
+	slli	$r1, $r1, 1			! $r1  <- b << = 1
+	bnez	$r2, .L8			! if a != 0, continue loop
+.L7:
+	! ---------------------------------------------------------------------
+	! $r0:       return code
+	! ---------------------------------------------------------------------
+	ret
+	.size	__mulsi3, .-__mulsi3
+#endif /* L_mulsi3 */
+
+
+
+#ifdef L_udivsi3
+
+	.text
+	.align	2
+	.globl	__udivsi3
+	.type	__udivsi3, @function
+__udivsi3:
+	! ---------------------------------------------------------------------
+	!!res=udivmodsi4(a,b,0);
+	! res=0;
+	! if (den!=0)
+	! ---------------------------------------------------------------------
+	movi	$r2, 0				! $r2  <- res=0
+	beqz	$r1, .L1			! if den==0, skip
+	! ---------------------------------------------------------------------
+	! {   bit=1;
+	! ---------------------------------------------------------------------
+	movi	$r4, 1				! $r4  <- bit=1
+#ifndef __OPTIMIZE_SIZE__
+.L6:
+#endif
+	! ---------------------------------------------------------------------
+	!     while (den<num
+	! ---------------------------------------------------------------------
+	slt	$ta, $r1, $r0			! $ta  <- den<num?
+	beqz	$ta, .L5			! if no, skip
+	! ---------------------------------------------------------------------
+	!          &&bit&&!(den&(1L<<31)))
+	! ---------------------------------------------------------------------
+	bltz	$r1, .L5			! if den<0, skip
+	! ---------------------------------------------------------------------
+	!     {   den<<=1;
+	!         bit<<=1;
+	!     }
+	! ---------------------------------------------------------------------
+#if defined (__OPTIMIZE_SIZE__) && ! defined (__NDS32_ISA_V3M__)
+	clz	$r3, $r1			! $r3  <- leading zero count for den
+	clz	$ta, $r0			! $ta  <- leading zero count for num
+	sub	$r3, $r3, $ta			! $r3  <- number of bits to shift
+	sll	$r1, $r1, $r3			! $r1  <- den
+	sll	$r2, $r2, $r3			! $r2  <- bit
+#else
+	slli	$r1, $r1, 1			! $r1  <- den<<=1
+	slli	$r4, $r4, 1			! $r4  <- bit<<=1
+	b	.L6				! continue loop
+#endif
+.L5:
+	! ---------------------------------------------------------------------
+	!     while (bit)
+	!     {   if (num>=den)
+	! ---------------------------------------------------------------------
+	slt	$ta, $r0, $r1			! $ta  <- num<den?
+	bnez	$ta, .L9			! if yes, skip
+	! ---------------------------------------------------------------------
+	!         {   num-=den;
+	!             res|=bit;
+	!         }
+	! ---------------------------------------------------------------------
+	sub	$r0, $r0, $r1			! $r0  <- num-=den
+	or	$r2, $r2, $r4			! $r2  <- res|=bit
+.L9:
+	! ---------------------------------------------------------------------
+	!         bit>>=1;
+	!         den>>=1;
+	!     }
+	! }
+	!!if (modwanted)
+	!!    return num;
+	!!return res;
+	! ---------------------------------------------------------------------
+	srli	$r4, $r4, 1			! $r4  <- bit>>=1
+	srli	$r1, $r1, 1			! $r1  <- den>>=1
+	bnez	$r4, .L5			! if bit!=0, continue loop
+.L1:
+	! ---------------------------------------------------------------------
+	! return res;
+	! ---------------------------------------------------------------------
+	move	$r0, $r2			! $r0  <- return value
+	! ---------------------------------------------------------------------
+	! ---------------------------------------------------------------------
+	ret
+	.size	__udivsi3, .-__udivsi3
+#endif /* L_udivsi3 */
+
+
+
+#ifdef L_udivdi3
+
+	!--------------------------------------
+	#ifdef __big_endian__
+		#define  V1H  $r0
+		#define  V1L  $r1
+		#define  V2H  $r2
+		#define  V2L  $r3
+	#else
+		#define  V1H  $r1
+		#define  V1L  $r0
+		#define  V2H  $r3
+		#define  V2L  $r2
+	#endif
+	!--------------------------------------
+
+	.text
+	.align	2
+	.globl	__udivdi3
+	.type	__udivdi3, @function
+__udivdi3:
+	! prologue
+#ifdef __NDS32_ISA_V3M__
+	push25	$r8, 0
+#else
+	smw.adm	$r6, [$sp], $r8, 2
+#endif
+	! end of prologue
+	movi	$r4, 0
+	bal	__udivmoddi4
+	! epilogue
+#ifdef __NDS32_ISA_V3M__
+	pop25	$r8, 0
+#else
+	lmw.bim	$r6, [$sp], $r8, 2
+	ret
+#endif
+	.size	__udivdi3, .-__udivdi3
+#endif /* L_udivdi3 */
+
+
+
+#ifdef L_udivmoddi4
+
+	.text
+	.align	2
+	.globl	fudiv_qrnnd
+	.type	fudiv_qrnnd, @function
+	#ifdef __big_endian__
+		#define P1H     $r0
+		#define P1L     $r1
+		#define P2H     $r2
+		#define P2L     $r3
+		#define W6H     $r4
+		#define W6L     $r5
+		#define OFFSET_L 4
+		#define OFFSET_H 0
+	#else
+		#define P1H     $r1
+		#define P1L     $r0
+		#define P2H     $r3
+		#define P2L     $r2
+		#define W6H     $r5
+		#define W6L     $r4
+		#define OFFSET_L 0
+		#define OFFSET_H 4
+	#endif
+fudiv_qrnnd:
+	!------------------------------------------------------
+	! function:  fudiv_qrnnd(quotient, remainder, high_numerator, low_numerator, denominator)
+	!            divides a UDWtype, composed by the UWtype integers,HIGH_NUMERATOR (from $r4)
+	!            and LOW_NUMERATOR(from $r5) by DENOMINATOR(from $r6), and places the quotient
+	!            in $r7 and the remainder in $r8.
+	!------------------------------------------------------
+	!  in reg:$r4(n1), $r5(n0), $r6(d0)
+	!  __d1 = ((USItype) (d) >> ((4 * 8) / 2));
+	!  __d0 = ((USItype) (d) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+	!  __r1 = (n1) % __d1;
+	!  __q1 = (n1) / __d1;
+	!  __m = (USItype) __q1 * __d0;
+	!  __r1 = __r1 * ((USItype) 1 << ((4 * 8) / 2)) | ((USItype) (n0) >> ((4 * 8) / 2));
+	!   if (__r1 < __m)
+	!    {
+	!------------------------------------------------------
+	smw.adm $r0, [$sp], $r4, 2				! store $lp, when use BASELINE_V1,and must store $r0-$r3
+	srli	$r7, $r6, 16					! $r7 = d1 =__ll_highpart (d)
+	movi	$ta, 65535
+	and	  $r8, $r6, $ta       				! $r8 = d0 = __ll_lowpart (d)
+
+	divr	$r9, $r10, $r4, $r7				! $r9 = q1, $r10 = r1
+	and	  $r4, $r5, $ta       				! $r4 = __ll_lowpart (n0)
+	slli	$r10, $r10, 16      				! $r10 = r1 << 16
+	srli	$ta, $r5, 16        				! $ta = __ll_highpart (n0)
+
+	or	$r10, $r10, $ta					! $r10 <- $r0|$r3=__r1
+	mul	$r5, $r9, $r8					! $r5 = m =  __q1*__d0
+	slt	$ta, $r10, $r5					! $ta <- __r1<__m
+	beqz	$ta, .L2					!if yes,skip
+	!------------------------------------------------------
+	!    __q1--, __r1 += (d);
+	!    if (__r1 >= (d))
+	!     {
+	!------------------------------------------------------
+
+	add	$r10, $r10, $r6					!$r10 <- __r1+d=__r1
+	addi	$r9, $r9, -1					!$r9 <- __q1--=__q1
+	slt	$ta, $r10, $r6					!$ta <- __r1<d
+	bnez	$ta, .L2					!if yes,skip
+	!------------------------------------------------------
+	!       if (__r1 < __m)
+	!        {
+	!------------------------------------------------------
+
+	slt	$ta, $r10, $r5					!$ta <- __r1<__m
+	beqz	$ta, .L2					!if yes,skip
+	!------------------------------------------------------
+	!           __q1--, __r1 += (d);
+	!        }
+	!     }
+	!  }
+	!------------------------------------------------------
+
+	addi	$r9, $r9, -1					!$r9 <- __q1--=__q1
+	add	$r10, $r10, $r6					!$r2 <- __r1+d=__r1
+.L2:
+	!------------------------------------------------------
+	!  __r1 -= __m;
+	!  __r0 = __r1 % __d1;
+	!  __q0 = __r1 / __d1;
+	!  __m = (USItype) __q0 * __d0;
+	!  __r0 = __r0 * ((USItype) 1 << ((4 * 8) / 2)) \
+	!        | ((USItype) (n0) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+	!  if (__r0 < __m)
+	!   {
+	!------------------------------------------------------
+	sub  $r10, $r10, $r5					!$r10 <- __r1-__m=__r1
+	divr	$r7, $r10, $r10, $r7				!$r7 <- r1/__d1=__q0,$r10 <- r1%__d1=__r0
+	slli	$r10, $r10, 16					!$r10 <- __r0<<16
+	mul	$r5, $r8, $r7					!$r5 <- __q0*__d0=__m
+	or	$r10, $r4, $r10					!$r3 <- $r0|__ll_lowpart (n0) =__r0
+	slt	$ta, $r10, $r5					!$ta <- __r0<__m
+	beqz	$ta, .L5					!if yes,skip
+	!------------------------------------------------------
+	!      __q0--, __r0 += (d);
+	!      if (__r0 >= (d))
+	!       {
+	!------------------------------------------------------
+
+	add	$r10, $r10, $r6					!$r10 <- __r0+d=__r0
+	addi	$r7, $r7, -1					!$r7 <- __q0--=__q0
+	slt	$ta, $r10, $r6					!$ta <- __r0<d
+	bnez	$ta, .L5					!if yes,skip
+	!------------------------------------------------------
+	!         if (__r0 < __m)
+	!          {
+	!------------------------------------------------------
+
+	slt	$ta, $r10, $r5					!$ta <- __r0<__m
+	beqz	$ta, .L5					!if yes,skip
+	!------------------------------------------------------
+	!             __q0--, __r0 += (d);
+	!          }
+	!       }
+	!   }
+	!------------------------------------------------------
+
+	add	  $r10, $r10, $r6				!$r3 <- __r0+d=__r0
+	addi	$r7, $r7, -1					!$r2 <- __q0--=__q0
+.L5:
+	!------------------------------------------------------
+	!   __r0 -= __m;
+	!   *q = (USItype) __q1 * ((USItype) 1 << ((4 * 8) / 2)) | __q0;
+	!   *r = __r0;
+	!}
+	!------------------------------------------------------
+
+	sub		$r8, $r10, $r5				!$r8 = r = r0 = __r0-__m
+	slli	$r9, $r9, 16					!$r9 <- __q1<<16
+	or	$r7, $r9, $r7					!$r7 = q = $r9|__q0
+	lmw.bim $r0, [$sp], $r4, 2
+	ret
+	.size	fudiv_qrnnd, .-fudiv_qrnnd
+
+	.align	2
+	.globl	__udivmoddi4
+	.type	__udivmoddi4, @function
+__udivmoddi4:
+	! =====================================================================
+	! stack allocation:
+	! sp+40 +------------------+
+	!       | q1               |
+	! sp+36 +------------------+
+	!       | q0               |
+	! sp+32 +------------------+
+	!       | bm               |
+	! sp+28 +------------------+
+	!       | $lp              |
+	! sp+24 +------------------+
+	!       | $fp              |
+	! sp+20 +------------------+
+	!       | $r6 - $r10       |
+	! sp    +------------------+
+	! =====================================================================
+
+	addi	$sp, $sp, -40
+	smw.bi	$r6, [$sp], $r10, 10
+	!------------------------------------------------------
+	!  d0 = dd.s.low;
+	!  d1 = dd.s.high;
+	!  n0 = nn.s.low;
+	!  n1 = nn.s.high;
+	!  if (d1 == 0)
+	!   {
+	!------------------------------------------------------
+
+	move	$fp, $r4					!$fp <- rp
+	bnez	P2H, .L9					!if yes,skip
+	!------------------------------------------------------
+	!     if (d0 > n1)
+	!      {
+	!------------------------------------------------------
+
+	slt	$ta, P1H, P2L					!$ta <- n1<d0
+	beqz	$ta, .L10					!if yes,skip
+#ifndef __NDS32_PERF_EXT__
+	smw.adm $r0, [$sp], $r5, 0
+	move    $r0, P2L
+	bal __clzsi2
+	move	$r7, $r0
+	lmw.bim $r0, [$sp], $r5, 0
+#else
+	clz  $r7, P2L
+#endif
+	swi     $r7,  [$sp+(28)]
+	beqz	$r7, .L18					!if yes,skip
+	!------------------------------------------------------
+	!         d0 = d0 << bm;
+	!         n1 = (n1 << bm) | (n0 >> ((4 * 8) - bm));
+	!         n0 = n0 << bm;
+	!      }
+	!------------------------------------------------------
+
+	subri	$r5, $r7, 32					!$r5 <- 32-bm
+	srl	$r5, P1L, $r5					!$r5 <- n0>>$r5
+	sll	$r6, P1H, $r7					!$r6 <- n1<<bm
+	or	P1H, $r6, $r5					!P2h <- $r5|$r6=n1
+	sll	P1L, P1L, $r7					!P1H <- n0<<bm=n0
+	sll	P2L, P2L, $r7					!P2L <- d0<<bm=d0
+.L18:
+	!------------------------------------------------------
+	!    fudiv_qrnnd (&q0, &n0, n1, n0, d0);
+	!    q1 = 0;
+	!  } #if (d0 > n1)
+	!------------------------------------------------------
+
+	move 	$r4,P1H						! give fudiv_qrnnd args
+	move 	$r5,P1L						!
+	move 	$r6,P2L						!
+	bal	fudiv_qrnnd					!calcaulte q0 n0
+	movi	$r6, 0						!P1L <- 0
+	swi     $r7,[$sp+32]                                    !q0
+	swi     $r6,[$sp+36]                                    !q1
+	move    P1L,$r8						!n0
+	b	.L19
+.L10:
+	!------------------------------------------------------
+	!  else #if (d0 > n1)
+	!   {
+	!     if(d0 == 0)
+	!------------------------------------------------------
+
+	bnez	P2L, .L20					!if yes,skip
+	!------------------------------------------------------
+	!      d0 = 1 / d0;
+	!------------------------------------------------------
+
+	movi	$r4, 1						!P1L <- 1
+	divr	P2L, $r4, $r4, P2L				!$r9=1/d0,P1L=1%d0
+.L20:
+
+#ifndef __NDS32_PERF_EXT__
+	smw.adm $r0, [$sp], $r5, 0
+	move    $r0, P2L
+	bal __clzsi2
+	move    $r7, $r0
+	lmw.bim $r0, [$sp], $r5, 0
+#else
+	clz  $r7, P2L
+#endif
+	swi     $r7,[$sp+(28)]      ! store bm
+	beqz	$r7, .L28					! if yes,skip
+	!------------------------------------------------------
+	!         b = (4 * 8) - bm;
+	!         d0 = d0 << bm;
+	!         n2 = n1 >> b;
+	!         n1 = (n1 << bm) | (n0 >> b);
+	!         n0 = n0 << bm;
+	!         fudiv_qrnnd (&q1, &n1, n2, n1, d0);
+	!    }
+	!------------------------------------------------------
+
+	subri	$r10, $r7, 32					!$r10 <- 32-bm=b
+	srl	$r4, P1L, $r10					!$r4 <- n0>>b
+	sll	$r5, P1H, $r7					!$r5 <- n1<<bm
+	or	$r5, $r5, $r4					!$r5 <- $r5|$r4=n1  !for fun
+	sll	P2L, P2L, $r7					!P2L <- d0<<bm=d0   !for fun
+	sll	P1L, P1L, $r7					!P1L <- n0<<bm=n0
+	srl	$r4, P1H, $r10					!$r4 <- n1>>b=n2    !for fun
+
+	move    $r6,P2L                     			!for fun
+	bal	fudiv_qrnnd					!caculate q1, n1
+
+	swi  $r7,[$sp+(36)]          ! q1 store
+	move P1H,$r8                 ! n1 store
+
+	move $r4,$r8	             ! prepare for next fudiv_qrnnd()
+	move $r5,P1L
+	move $r6,P2L
+	b	.L29
+.L28:
+	!------------------------------------------------------
+	!    else // bm != 0
+	!     {
+	!        n1 -= d0;
+	!        q1 = 1;
+	!
+	!------------------------------------------------------
+
+	sub	P1H, P1H, P2L					!P1L <- n1-d0=n1
+	movi	$ta, 1						!
+	swi	$ta, [$sp+(36)]	                                !1 -> [$sp+(36)]
+
+	move $r4,P1H						! give fudiv_qrnnd args
+	move $r5,P1L
+	move $r6,P2L
+.L29:
+	!------------------------------------------------------
+	!    fudiv_qrnnd (&q0, &n0, n1, n0, d0);
+	!------------------------------------------------------
+
+	bal	fudiv_qrnnd					!calcuate  q0, n0
+	swi     $r7,[$sp+(32)]  !q0 store
+	move    P1L,$r8		!n0
+.L19:
+	!------------------------------------------------------
+	!    if (rp != 0)
+	!     {
+	!------------------------------------------------------
+
+	beqz	$fp, .L31					!if yes,skip
+	!------------------------------------------------------
+	!         rr.s.low = n0 >> bm;
+	!         rr.s.high = 0;
+	!         *rp = rr.ll;
+	!     }
+	!------------------------------------------------------
+
+	movi    $r5, 0							!$r5 <- 0
+	lwi     $r7,[$sp+(28)]    					!load bm
+	srl	$r4, P1L, $r7     	     				!$r4 <- n0>>bm
+        swi	$r4, [$fp+OFFSET_L]	  !r0				!$r4 -> [$sp+(48)]
+	swi	$r5, [$fp+OFFSET_H]	  !r1				!0 -> [$sp+(52)]
+	b .L31
+.L9:
+	!------------------------------------------------------
+	! else # d1 == 0
+	!  {
+	!     if(d1 > n1)
+	!      {
+	!------------------------------------------------------
+
+	slt	$ta, P1H, P2H					!$ta <- n1<d1
+	beqz	$ta, .L32					!if yes,skip
+	!------------------------------------------------------
+	!         q0 = 0;
+	!	  q1 = 0;
+	!         if (rp != 0)
+	!          {
+	!------------------------------------------------------
+
+	movi	$r5, 0						!$r5 <- 0
+	swi	$r5, [$sp+(32)]	   !q0				!0 -> [$sp+(40)]=q1
+	swi	$r5, [$sp+(36)]    !q1				!0 -> [$sp+(32)]=q0
+	beqz	$fp, .L31					!if yes,skip
+	!------------------------------------------------------
+	!             rr.s.low = n0;
+	!	      rr.s.high = n1;
+	!             *rp = rr.ll;
+	!          }
+	!------------------------------------------------------
+
+	swi	P1L, [$fp+OFFSET_L]					!P1L -> [rp]
+	swi	P1H, [$fp+OFFSET_H]					!P1H -> [rp+4]
+	b	.L31
+.L32:
+#ifndef __NDS32_PERF_EXT__
+	smw.adm $r0, [$sp], $r5, 0
+	move    $r0, P2H
+	bal __clzsi2
+	move    $r7, $r0
+	lmw.bim $r0, [$sp], $r5, 0
+#else
+	clz  $r7,P2H
+#endif
+        swi     $r7,[$sp+(28)] 	                                !$r7=bm  store
+	beqz	$r7, .L42					!if yes,skip
+	!------------------------------------------------------
+	!        USItype m1, m0;
+	!        b = (4 * 8) - bm;
+	!        d1 = (d0 >> b) | (d1 << bm);
+	!        d0 = d0 << bm;
+	!        n2 = n1 >> b;
+	!        n1 = (n0 >> b) | (n1 << bm);
+	!        n0 = n0 << bm;
+	!        fudiv_qrnnd (&q0, &n1, n2, n1, d1);
+	!------------------------------------------------------
+
+	subri	$r10, $r7, 32					!$r10 <- 32-bm=b
+	srl	$r5, P2L, $r10					!$r5 <- d0>>b
+	sll	$r6, P2H, $r7					!$r6 <- d1<<bm
+	or      $r6, $r5, $r6                                   !$r6 <- $r5|$r6=d1  !! func
+	move	P2H, $r6 					!P2H <- d1
+	srl     $r4, P1H, $r10                                  !$r4 <- n1>>b=n2    !!! func
+	srl	$r8, P1L, $r10					!$r8 <- n0>>b       !!$r8
+	sll     $r9, P1H, $r7                                   !$r9 <- n1<<bm
+	or	$r5, $r8, $r9					!$r5 <- $r8|$r9=n1  !func
+	sll     P2L, P2L, $r7                                   !P2L <- d0<<bm=d0
+	sll	P1L, P1L, $r7					!P1L <- n0<<bm=n0
+
+	bal	fudiv_qrnnd					! cal  q0,n1
+	swi     $r7,[$sp+(32)]
+	move    P1H,$r8            ! fudiv_qrnnd (&q0, &n1, n2, n1, d1);
+        move    $r6, $r7           ! from func
+
+	!----------------------------------------------------
+	!       #umul_ppmm (m1, m0, q0, d0);
+	!        do
+	!         {     USItype __x0, __x1, __x2, __x3;
+	!               USItype __ul, __vl, __uh, __vh;
+	!               __ul = ((USItype) (q0) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+	!               __uh = ((USItype) (q0) >> ((4 * 8) / 2));
+	!               __vl = ((USItype) (d0) & (((USItype) 1 << ((4 * 8) / 2)) - 1));
+	!               __vh = ((USItype) (d0) >> ((4 * 8) / 2));
+	!               __x0 = (USItype) __ul * __vl;
+	!               __x1 = (USItype) __ul * __vh;
+	!               __x2 = (USItype) __uh * __vl;
+	!               __x3 = (USItype) __uh * __vh;
+	!               __x1 += ((USItype) (__x0) >> ((4 * 8) / 2));
+	!               __x1 += __x2;
+	!               if (__x1 < __x2)
+	!                  __x3 += ((USItype) 1 << ((4 * 8) / 2));
+	!               (m1) = __x3 + ((USItype) (__x1) >> ((4 * 8) / 2));
+	!               (m0) = (USItype)(q0*d0);
+	!        }
+	!        if (m1 > n1)
+	!---------------------------------------------------
+#ifdef __NDS32_ISA_V3M__
+        !mulr64  $r4, P2L, $r6
+	smw.adm $r0, [$sp], $r3, 0
+	move	P1L, P2L
+	move	P2L, $r6
+	movi	P1H, 0
+	movi	P2H, 0
+	bal	__muldi3
+	movd44	$r4, $r0
+	lmw.bim $r0, [$sp], $r3, 0
+        move    $r8, W6H
+        move    $r5, W6L
+#else
+        mulr64  $r4, P2L, $r6
+        move    $r8, W6H
+        move    $r5, W6L
+#endif
+	slt	$ta, P1H, $r8					!$ta <- n1<m1
+	bnez	$ta, .L46					!if yes,skip
+	!------------------------------------------------------
+	!   if(m1 == n1)
+	!------------------------------------------------------
+
+	bne	$r8, P1H, .L45					!if yes,skip
+	!------------------------------------------------------
+	!   if(m0 > n0)
+	!------------------------------------------------------
+
+	slt	$ta, P1L, $r5					!$ta <- n0<m0
+	beqz	$ta, .L45					!if yes,skip
+.L46:
+	!------------------------------------------------------
+	!    {
+	!       q0--;
+	!       # sub_ddmmss (m1, m0, m1, m0, d1, d0);
+	!       do
+	!        {   USItype __x;
+	!            __x = (m0) - (d0);
+	!            (m1) = (m1) - (d1) - (__x > (m0));
+	!            (m0) = __x;
+	!        }
+	!    }
+	!------------------------------------------------------
+
+	sub	$r4, $r5, P2L					!$r4 <- m0-d0=__x
+	addi	$r6, $r6, -1					!$r6 <- q0--=q0
+	sub	$r8, $r8, P2H					!$r8 <- m1-d1
+	swi	$r6, [$sp+(32)]	      ! q0			!$r6->[$sp+(32)]
+	slt	$ta, $r5, $r4					!$ta <- m0<__x
+	sub	$r8, $r8, $ta					!$r8 <- P1H-P1L=m1
+	move	$r5, $r4					!$r5 <- __x=m0
+.L45:
+	!------------------------------------------------------
+	!    q1 = 0;
+	!    if (rp != 0)
+	!     {
+	!------------------------------------------------------
+
+	movi	$r4, 0						!$r4 <- 0
+	swi	$r4, [$sp+(36)]					!0 -> [$sp+(40)]=q1
+	beqz	$fp, .L31					!if yes,skip
+	!------------------------------------------------------
+	!      # sub_ddmmss (n1, n0, n1, n0, m1, m0);
+	!      do
+	!       {   USItype __x;
+	!           __x = (n0) - (m0);
+	!           (n1) = (n1) - (m1) - (__x > (n0));
+	!           (n0) = __x;
+	!       }
+	!       rr.s.low = (n1 << b) | (n0 >> bm);
+	!       rr.s.high = n1 >> bm;
+	!       *rp = rr.ll;
+	!------------------------------------------------------
+
+	sub	$r4, P1H, $r8					!$r4 <- n1-m1
+	sub	$r6, P1L, $r5					!$r6 <- n0-m0=__x=n0
+	slt	$ta, P1L, $r6					!$ta <- n0<__x
+	sub	P1H, $r4, $ta					!P1H <- $r4-$ta=n1
+	move    P1L, $r6
+
+	lwi     $r7,[$sp+(28)]         ! load bm
+	subri   $r10,$r7,32
+	sll	$r4, P1H, $r10					!$r4 <- n1<<b
+	srl	$r5, P1L, $r7					!$r5 <- __x>>bm
+	or	$r6, $r5, $r4					!$r6 <- $r5|$r4=rr.s.low
+	srl	$r8, P1H, $r7					!$r8 <- n1>>bm =rr.s.high
+	swi	$r6, [$fp+OFFSET_L]				!
+	swi	$r8, [$fp+OFFSET_H]				!
+	b	.L31
+.L42:
+	!------------------------------------------------------
+	!  else
+	!   {
+	!     if(n1 > d1)
+	!------------------------------------------------------
+
+	slt	$ta, P2H, P1H					!$ta <- P2H<P1H
+	bnez	$ta, .L52					!if yes,skip
+	!------------------------------------------------------
+	!     if (n0 >= d0)
+	!------------------------------------------------------
+
+	slt	$ta, P1L, P2L					!$ta <- P1L<P2L
+	bnez	$ta, .L51					!if yes,skip
+	!------------------------------------------------------
+	!        q0 = 1;
+	!        do
+	!         {   USItype __x;
+	!             __x = (n0) - (d0);
+	!             (n1) = (n1) - (d1) - (__x > (n0));
+	!             (n0) = __x;
+	!         }
+	!------------------------------------------------------
+.L52:
+	sub	$r4, P1H, P2H					!$r4 <- P1H-P2H
+	sub	$r6, P1L, P2L					!$r6 <- no-d0=__x=n0
+	slt	$ta, P1L, $r6					!$ta <- no<__x
+	sub	P1H, $r4, $ta					!P1H <- $r4-$ta=n1
+	move    P1L, $r6					!n0
+	movi	$r5, 1						!
+	swi	$r5, [$sp+(32)]					!1 -> [$sp+(32)]=q0
+	b	.L54
+.L51:
+	!------------------------------------------------------
+	!       q0 = 0;
+	!------------------------------------------------------
+
+	movi    $r5,0
+	swi	$r5, [$sp+(32)]					!$r5=0 -> [$sp+(32)]
+.L54:
+	!------------------------------------------------------
+	!       q1 = 0;
+	!       if (rp != 0)
+	!        {
+	!------------------------------------------------------
+
+	movi	$r5, 0						!
+	swi	$r5, [$sp+(36)]					!0 -> [$sp+(36)]
+	beqz	$fp, .L31
+	!------------------------------------------------------
+	!          rr.s.low = n0;
+	!          rr.s.high = n1;
+	!          *rp = rr.ll;
+	!        }
+	!------------------------------------------------------
+
+	swi	P1L, [$fp+OFFSET_L]				!remainder
+	swi	P1H, [$fp+OFFSET_H]				!
+.L31:
+	!------------------------------------------------------
+	! const DWunion ww = {{.low = q0, .high = q1}};
+	! return ww.ll;
+	!}
+	!------------------------------------------------------
+
+	lwi	P1L, [$sp+(32)]					!quotient
+	lwi	P1H, [$sp+(36)]
+	lmw.bim	$r6, [$sp], $r10, 10
+	addi	$sp, $sp, 12
+	ret
+	.size	__udivmoddi4, .-__udivmoddi4
+#endif /* L_udivmoddi4 */
+
+
+
+#ifdef L_umodsi3
+
+	! =====================================================================
+	.text
+	.align	2
+	.globl	__umodsi3
+	.type	__umodsi3, @function
+__umodsi3:
+	! ---------------------------------------------------------------------
+	!!res=udivmodsi4(a,b,1);
+	! if (den==0)
+	!     return num;
+	! ---------------------------------------------------------------------
+	beqz	$r1, .L1			! if den==0, skip
+	! ---------------------------------------------------------------------
+	! bit=1;
+	! res=0;
+	! ---------------------------------------------------------------------
+	movi	$r4, 1				! $r4  <- bit=1
+#ifndef __OPTIMIZE_SIZE__
+.L6:
+#endif
+	! ---------------------------------------------------------------------
+	! while (den<num
+	! ---------------------------------------------------------------------
+	slt	$ta, $r1, $r0			! $ta  <- den<num?
+	beqz	$ta, .L5			! if no, skip
+	! ---------------------------------------------------------------------
+	!      &&bit&&!(den&(1L<<31)))
+	! ---------------------------------------------------------------------
+	bltz	$r1, .L5			! if den<0, skip
+	! ---------------------------------------------------------------------
+	! {   den<<=1;
+	!     bit<<=1;
+	! }
+	! ---------------------------------------------------------------------
+#if defined (__OPTIMIZE_SIZE__) && ! defined (__NDS32_ISA_V3M__)
+	clz	$r3, $r1			! $r3  <- leading zero count for den
+	clz	$ta, $r0			! $ta  <- leading zero count for num
+	sub	$r3, $r3, $ta			! $r3  <- number of bits to shift
+	sll	$r1, $r1, $r3			! $r1  <- den
+	sll	$r4, $r4, $r3			! $r2  <- bit
+#else
+	slli	$r1, $r1, 1			! $r1  <- den<<=1
+	slli	$r4, $r4, 1			! $r4  <- bit<<=1
+	b	.L6				! continue loop
+#endif
+.L5:
+	! ---------------------------------------------------------------------
+	! while (bit)
+	! {   if (num>=den)
+	!     {   num-=den;
+	!         res|=bit;
+	!     }
+	!     bit>>=1;
+	!     den>>=1;
+	! }
+	!!if (modwanted)
+	!!    return num;
+	!!return res;
+	! ---------------------------------------------------------------------
+	sub	$r2, $r0, $r1			! $r2  <- num-den
+	slt	$ta, $r0, $r1			! $ta  <- num<den?
+	srli	$r4, $r4, 1			! $r4  <- bit>>=1
+	cmovz	$r0, $r2, $ta			! $r0  <- num=(num<den)?num:num-den
+	srli	$r1, $r1, 1			! $r1  <- den>>=1
+	bnez	$r4, .L5			! if bit!=0, continue loop
+.L1:
+	! ---------------------------------------------------------------------
+	! return res;
+	! ---------------------------------------------------------------------
+	ret
+	.size	__umodsi3, .-__umodsi3
+#endif /* L_umodsi3 */
+
+
+
+#ifdef L_umoddi3
+
+	!--------------------------------------
+	#ifdef __big_endian__
+		#define  V1H  $r0
+		#define  V1L  $r1
+		#define  V2H  $r2
+		#define  V2L  $r3
+	#else
+		#define  V1H  $r1
+		#define  V1L  $r0
+		#define  V2H  $r3
+		#define  V2L  $r2
+	#endif
+	!--------------------------------------
+	.text
+	.align	2
+	.globl	__umoddi3
+	.type	__umoddi3, @function
+__umoddi3:
+	! prologue
+	addi	$sp, $sp, -12
+	swi $lp, [$sp+(0)]
+	! end of prologue
+	addi	$r4, $sp, 4
+	bal	__udivmoddi4
+	lwi	$r0, [$sp+(4)]    ! __udivmoddi4 return low when LE mode or return high when BE mode
+	lwi	$r1, [$sp+(8)]    !
+.L82:
+	! epilogue
+	lwi $lp, [$sp+(0)]
+	addi	$sp, $sp, 12
+	ret
+	.size	__umoddi3, .-__umoddi3
+#endif /* L_umoddi3 */
+
+
+
+#ifdef L_muldi3
+
+#ifdef __big_endian__
+	#define P1H	$r0
+	#define P1L	$r1
+	#define P2H	$r2
+	#define P2L	$r3
+
+	#define V2H $r4
+	#define V2L $r5
+#else
+	#define P1H	$r1
+	#define P1L	$r0
+	#define P2H	$r3
+	#define P2L	$r2
+
+	#define V2H $r5
+	#define V2L $r4
+#endif
+
+	! ====================================================================
+	.text
+	.align	2
+	.globl	__muldi3
+	.type	__muldi3, @function
+__muldi3:
+	! parameter passing for libgcc functions normally involves 2 doubles
+	!---------------------------------------
+#ifdef __NDS32_ISA_V3M__
+	! There is no mulr64 instruction in Andes ISA V3M.
+	! So we must provide a sequence of calculations to complete the job.
+	smw.adm   $r6, [$sp], $r9, 0x0
+	zeh33	  $r4, P1L
+	srli      $r7, P1L, 16
+	zeh33     $r5, P2L
+	mul       $r6, $r5, $r4
+	mul33     $r5, $r7
+	srli      $r8, P2L, 16
+	mov55     $r9, $r5
+	maddr32   $r9, $r8, $r4
+	srli      $r4, $r6, 16
+	add       $r4, $r9, $r4
+	slt45     $r4, $r5
+	slli      $r5, $r15, 16
+	maddr32   $r5, $r8, $r7
+	mul       P2L, P1H, P2L
+	srli      $r7, $r4, 16
+	maddr32   P2L, P2H, P1L
+	add333    P1H, $r5, $r7
+	slli      $r4, $r4, 16
+	zeh33     $r6, $r6
+	add333    P1L, $r4, $r6
+	add333    P1H, P2L, P1H
+	lmw.bim   $r6, [$sp], $r9, 0x0
+	ret
+#else /* not  __NDS32_ISA_V3M__ */
+	mul	    $ta, P1L, P2H
+	mulr64	$r4, P1L, P2L
+	maddr32	$ta, P1H, P2L
+	move	  P1L, V2L
+	add	    P1H, $ta, V2H
+	ret
+#endif /* not __NDS32_ISA_V3M__ */
+	.size	__muldi3, .-__muldi3
+#endif /* L_muldi3 */
+
+
+
+#ifdef L_addsub_df
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+	#define P3L     $r4
+	#define P3H     $r5
+	#define O1L     $r7
+	#define O1H	$r8
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+	#define P3H     $r4
+	#define P3L     $r5
+	#define O1H     $r7
+	#define O1L	$r8
+#endif
+	.text
+	.align	2
+	.global  __subdf3
+	.type    __subdf3, @function
+__subdf3:
+	push    $lp
+	pushm   $r6, $r10
+
+	move    $r4, #0x80000000
+	xor     P2H, P2H, $r4
+
+	j       .Lsdpadd
+
+	.global  __adddf3
+	.type    __adddf3, @function
+__adddf3:
+	push    $lp
+	pushm   $r6, $r10
+.Lsdpadd:
+	slli    $r6, P1H, #1
+	srli    $r6, $r6, #21
+	slli    P3H, P1H, #11
+	srli    $r10, P1L, #21
+	or      P3H, P3H, $r10
+	slli    P3L, P1L, #11
+	move    O1L, #0x80000000
+	or      P3H, P3H, O1L
+	slli    $r9, P2H, #1
+	srli    $r9, $r9, #21
+	slli    O1H, P2H, #11
+	srli    $r10, P2L, #21
+	or      O1H, O1H, $r10
+	or      O1H, O1H, O1L
+	slli    O1L, P2L, #11
+
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LEspecA
+
+.LElab1:
+	addi    $r10, $r9, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LEspecB
+
+.LElab2:
+	#NORMd($r4, P2L, P1L)
+	bnez    P3H, .LL1
+	bnez    P3L, .LL2
+	move    $r6, #0
+	j       .LL3
+.LL2:
+	move    P3H, P3L
+	move    P3L, #0
+	move    P2L, #32
+	sub     $r6, $r6, P2L
+.LL1:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, $r5
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, $r5
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, $r4
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+#endif /* __big_endian__ */
+	beqz    P2L, .LL3
+	sub     $r6, $r6, P2L
+	subri   P1L, P2L, #32
+	srl     P1L, P3L, P1L
+	sll     P3L, P3L, P2L
+	sll     P3H, P3H, P2L
+	or      P3H, P3H, P1L
+.LL3:
+	#NORMd End
+
+	#NORMd($r7, P2L, P1L)
+	bnez    O1H, .LL4
+	bnez    O1L, .LL5
+	move    $r9, #0
+	j       .LL6
+.LL5:
+	move    O1H, O1L
+	move    O1L, #0
+	move    P2L, #32
+	sub     $r9, $r9, P2L
+.LL4:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, O1H
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, O1H
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, O1H
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	move	$r0, O1H
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+#endif /* __big_endian__ */
+	beqz    P2L, .LL6
+	sub     $r9, $r9, P2L
+	subri   P1L, P2L, #32
+	srl     P1L, O1L, P1L
+	sll     O1L, O1L, P2L
+	sll     O1H, O1H, P2L
+	or      O1H, O1H, P1L
+.LL6:
+	#NORMd End
+
+	move    $r10, #0x80000000
+	and     P1H, P1H, $r10
+
+	beq     $r6, $r9, .LEadd3
+	slts    $r15, $r9, $r6
+	beqzs8  .Li1
+	sub     $r9, $r6, $r9
+	move    P2L, #0
+.LL7:
+	move    $r10, #0x20
+	slt     $r15, $r9, $r10
+	bnezs8  .LL8
+	or      P2L, P2L, O1L
+	move    O1L, O1H
+	move    O1H, #0
+	addi    $r9, $r9, #0xffffffe0
+	bnez    O1L, .LL7
+.LL8:
+	beqz    $r9, .LEadd3
+	move    P1L, O1H
+	move    $r10, O1L
+	srl     O1L, O1L, $r9
+	srl     O1H, O1H, $r9
+	subri   $r9, $r9, #0x20
+	sll     P1L, P1L, $r9
+	or      O1L, O1L, P1L
+	sll     $r10, $r10, $r9
+	or      P2L, P2L, $r10
+	beqz    P2L, .LEadd3
+	ori     O1L, O1L, #1
+	j       .LEadd3
+.Li1:
+	move    $r15, $r6
+	move    $r6, $r9
+	sub     $r9, $r9, $r15
+	move    P2L, #0
+.LL10:
+	move    $r10, #0x20
+	slt     $r15, $r9, $r10
+	bnezs8  .LL11
+	or      P2L, P2L, P3L
+	move    P3L, P3H
+	move    P3H, #0
+	addi    $r9, $r9, #0xffffffe0
+	bnez    P3L, .LL10
+.LL11:
+	beqz    $r9, .LEadd3
+	move    P1L, P3H
+	move    $r10, P3L
+	srl     P3L, P3L, $r9
+	srl     P3H, P3H, $r9
+	subri   $r9, $r9, #0x20
+	sll     P1L, P1L, $r9
+	or      P3L, P3L, P1L
+	sll     $r10, $r10, $r9
+	or      P2L, P2L, $r10
+	beqz    P2L, .LEadd3
+	ori     P3L, P3L, #1
+
+.LEadd3:
+	xor     $r10, P1H, P2H
+	sltsi   $r15, $r10, #0
+	bnezs8  .LEsub1
+
+	#ADD(P3L, O1L)
+	add     P3L, P3L, O1L
+	slt     $r15, P3L, O1L
+
+	#ADDCC(P3H, O1H)
+	beqzs8  .LL13
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .LL14
+	addi    P3H, P3H, #0x1
+	j       .LL15
+.LL14:
+	move    $r15, #1
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+	j       .LL15
+.LL13:
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+.LL15:
+
+	beqzs8  .LEres
+	andi    $r10, P3L, #1
+	beqz    $r10, .Li3
+	ori     P3L, P3L, #2
+.Li3:
+	srli    P3L, P3L, #1
+	slli    $r10, P3H, #31
+	or      P3L, P3L, $r10
+	srli    P3H, P3H, #1
+	move    $r10, #0x80000000
+	or      P3H, P3H, $r10
+	addi    $r6, $r6, #1
+	subri   $r15, $r6, #0x7ff
+	bnezs8  .LEres
+	move    $r10, #0x7ff00000
+	or      P1H, P1H, $r10
+	move    P1L, #0
+	j       .LEretA
+
+.LEsub1:
+	#SUB(P3L, O1L)
+	move    $r15, P3L
+	sub     P3L, P3L, O1L
+	slt     $r15, $r15, P3L
+
+	#SUBCC(P3H, O1H)
+	beqzs8  .LL16
+	move    $r15, P3H
+	sub     P3H, P3H, O1H
+	slt     $r15, $r15, P3H
+	beqzs8  .LL17
+	subi333 P3H, P3H, #1
+	j       .LL18
+.LL17:
+	move    $r15, P3H
+	subi333 P3H, P3H, #1
+	slt     $r15, $r15, P3H
+	j       .LL18
+.LL16:
+	move    $r15, P3H
+	sub     P3H, P3H, O1H
+	slt     $r15, $r15, P3H
+.LL18:
+
+	beqzs8  .Li5
+	move    $r10, #0x80000000
+	xor     P1H, P1H, $r10
+
+	subri   P3H, P3H, #0
+	beqz    P3L, .LL19
+	subri   P3L, P3L, #0
+	subi45  P3H, #1
+.LL19:
+
+.Li5:
+	#NORMd($r4, $r9, P1L)
+	bnez    P3H, .LL20
+	bnez    P3L, .LL21
+	move    $r6, #0
+	j       .LL22
+.LL21:
+	move    P3H, P3L
+	move    P3L, #0
+	move    $r9, #32
+	sub     $r6, $r6, $r9
+.LL20:
+#ifdef __NDS32_PERF_EXT__
+	clz	$r9, P3H
+#else
+	pushm	$r0, $r5
+	move	$r0, P3H
+	bal	__clzsi2
+	move	$r9, $r0
+	popm	$r0, $r5
+#endif
+	beqz    $r9, .LL22
+	sub     $r6, $r6, $r9
+	subri   P1L, $r9, #32
+	srl     P1L, P3L, P1L
+	sll     P3L, P3L, $r9
+	sll     P3H, P3H, $r9
+	or      P3H, P3H, P1L
+.LL22:
+	#NORMd End
+
+	or      $r10, P3H, P3L
+	bnez    $r10, .LEres
+	move    P1H, #0
+
+.LEres:
+	blez    $r6, .LEund
+
+.LElab8:
+	#ADD(P3L, $0x400)
+	move    $r15, #0x400
+	add     P3L, P3L, $r15
+	slt     $r15, P3L, $r15
+
+	#ADDCC(P3H, $0x0)
+	beqzs8  .LL25
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+.LL25:
+
+	#ADDC($r6, $0x0)
+	add     $r6, $r6, $r15
+	srli    $r10, P3L, #11
+	andi    $r10, $r10, #1
+	sub     P3L, P3L, $r10
+	srli    P1L, P3L, #11
+	slli    $r10, P3H, #21
+	or      P1L, P1L, $r10
+	slli    $r10, P3H, #1
+	srli    $r10, $r10, #12
+	or      P1H, P1H, $r10
+	slli    $r10, $r6, #20
+	or      P1H, P1H, $r10
+
+.LEretA:
+.LE999:
+	popm    $r6, $r10
+	pop     $lp
+	ret5    $lp
+
+.LEspecA:
+	#ADD(P3L, P3L)
+	move    $r15, P3L
+	add     P3L, P3L, P3L
+	slt     $r15, P3L, $r15
+
+	#ADDC(P3H, P3H)
+	add     P3H, P3H, P3H
+	add     P3H, P3H, $r15
+	bnez    $r6, .Li7
+	or      $r10, P3H, P3L
+	beqz    $r10, .Li8
+	j       .LElab1
+.Li8:
+	subri   $r15, $r9, #0x7ff
+	beqzs8  .LEspecB
+	add     P3L, P2H, P2H
+	or      $r10, P3L, P2L
+	bnez    $r10, .LEretB
+	sltsi   $r15, P2H, #0
+	bnezs8  .LEretA
+
+.LEretB:
+	move    P1L, P2L
+	move    P1H, P2H
+	j       .LE999
+.Li7:
+	or      $r10, P3H, P3L
+	bnez    $r10, .LEnan
+	subri   $r15, $r9, #0x7ff
+	bnezs8  .LEretA
+	xor     $r10, P1H, P2H
+	sltsi   $r15, $r10, #0
+	bnezs8  .LEnan
+	j       .LEretB
+
+.LEspecB:
+	#ADD(O1L, O1L)
+	move    $r15, O1L
+	add     O1L, O1L, O1L
+	slt     $r15, O1L, $r15
+
+	#ADDC(O1H, O1H)
+	add     O1H, O1H, O1H
+	add     O1H, O1H, $r15
+	bnez    $r9, .Li11
+	or      $r10, O1H, O1L
+	beqz    $r10, .LEretA
+	j       .LElab2
+.Li11:
+	or      $r10, O1H, O1L
+	beqz    $r10, .LEretB
+
+.LEnan:
+	move    P1H, #0xfff80000
+	move    P1L, #0
+	j       .LEretA
+
+.LEund:
+	subri   $r9, $r6, #1
+	move    P2L, #0
+.LL26:
+	move    $r10, #0x20
+	slt     $r15, $r9, $r10
+	bnezs8  .LL27
+	or      P2L, P2L, P3L
+	move    P3L, P3H
+	move    P3H, #0
+	addi    $r9, $r9, #0xffffffe0
+	bnez    P3L, .LL26
+.LL27:
+	beqz    $r9, .LL28
+	move    P1L, P3H
+	move    $r10, P3L
+	srl     P3L, P3L, $r9
+	srl     P3H, P3H, $r9
+	subri   $r9, $r9, #0x20
+	sll     P1L, P1L, $r9
+	or      P3L, P3L, P1L
+	sll     $r10, $r10, $r9
+	or      P2L, P2L, $r10
+	beqz    P2L, .LL28
+	ori     P3L, P3L, #1
+.LL28:
+	move    $r6, #0
+	j       .LElab8
+	.size   __subdf3, .-__subdf3
+	.size   __adddf3, .-__adddf3
+#endif /* L_addsub_df */
+
+
+
+#ifdef L_mul_sf
+
+#if !defined (__big_endian__)
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#endif
+	.text
+	.align	2
+	.global	__mulsf3
+	.type	__mulsf3, @function
+__mulsf3:
+	push    $lp
+	pushm   $r6, $r10
+
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	srli    $r5, $r1, #23
+	andi    $r5, $r5, #0xff
+	move    $r6, #0x80000000
+	slli    $r2, $r0, #8
+	or      $r2, $r2, $r6
+	slli    $r4, $r1, #8
+	or      $r4, $r4, $r6
+	xor     $r8, $r0, $r1
+	and     $r6, $r6, $r8
+
+	addi    $r8, $r3, #-1
+	slti    $r15, $r8, #0xfe
+	beqzs8  .LFspecA
+
+.LFlab1:
+	addi    $r8, $r5, #-1
+	slti    $r15, $r8, #0xfe
+	beqzs8  .LFspecB
+
+.LFlab2:
+	move    $r10, $r3
+/* This is a 64-bit multiple. ($r2, $r7) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r2, $r2, $r4
+#else
+	pushm	$r0, $r1
+	pushm	$r4, $r5
+	move	P1L, $r2
+	movi	P1H, #0
+	move	P2L, $r4
+	movi	P2H, #0
+	bal	__muldi3
+	movd44	$r2, $r0
+	popm	$r4, $r5
+	popm	$r0, $r1
+#endif
+#ifndef __big_endian__
+	move    $r7, $r2
+	move    $r2, $r3
+#else
+	move	$r7, $r3
+#endif
+	move    $r3, $r10
+
+	beqz    $r7, .Li17
+	ori     $r2, $r2, #1
+
+.Li17:
+	sltsi   $r15, $r2, #0
+	bnezs8  .Li18
+	slli    $r2, $r2, #1
+	addi    $r3, $r3, #-1
+.Li18:
+	addi    $r8, $r5, #0xffffff82
+	add     $r3, $r3, $r8
+	addi    $r8, $r3, #-1
+	slti    $r15, $r8, #0xfe
+	beqzs8  .LFoveund
+
+.LFlab8:
+	#ADD($r2, $0x80)
+	move    $r15, #0x80
+	add     $r2, $r2, $r15
+	slt     $r15, $r2, $r15
+
+	#ADDC($r3, $0x0)
+	add     $r3, $r3, $r15
+	srli    $r8, $r2, #8
+	andi    $r8, $r8, #1
+	sub     $r2, $r2, $r8
+	slli    $r2, $r2, #1
+	srli    $r2, $r2, #9
+	slli    $r8, $r3, #23
+	or      $r2, $r2, $r8
+	or      $r0, $r2, $r6
+
+.LF999:
+	popm    $r6, $r10
+	pop     $lp
+	ret5    $lp
+
+.LFspecA:
+	bnez    $r3, .Li19
+	add     $r2, $r2, $r2
+	beqz    $r2, .Li20
+#ifdef __NDS32_PERF_EXT__
+	clz	$r7, $r2
+#else
+	pushm	$r0, $r5
+	move	$r0, $r2
+	bal	__clzsi2
+	move	$r7, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r3, $r3, $r7
+	sll     $r2, $r2, $r7
+	j       .LFlab1
+.Li20:
+	subri   $r15, $r5, #0xff
+	beqzs8  .LFnan
+	j       .LFzer
+.Li19:
+	add     $r8, $r2, $r2
+	bnez    $r8, .LFnan
+	bnez    $r5, .Li21
+	add     $r8, $r4, $r4
+	beqz    $r8, .LFnan
+.Li21:
+	subri   $r15, $r5, #0xff
+	bnezs8  .LFinf
+
+.LFspecB:
+	bnez    $r5, .Li22
+	add     $r4, $r4, $r4
+	beqz    $r4, .LFzer
+#ifdef __NDS32_PERF_EXT__
+	clz	$r7, $r4
+#else
+	pushm	$r0, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r7, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r5, $r5, $r7
+	sll     $r4, $r4, $r7
+	j       .LFlab2
+
+.LFzer:
+	move    $r0, $r6
+	j       .LF999
+.Li22:
+	add     $r8, $r4, $r4
+	bnez    $r8, .LFnan
+
+.LFinf:
+	move    $r8, #0x7f800000
+	or      $r0, $r6, $r8
+	j       .LF999
+
+.LFnan:
+	move    $r0, #0xffc00000
+	j       .LF999
+
+.LFoveund:
+	bgtz    $r3, .LFinf
+	subri   $r7, $r3, #1
+	slti    $r15, $r7, #0x20
+	beqzs8  .LFzer
+	subri   $r8, $r7, #0x20
+	sll     $r3, $r2, $r8
+	srl     $r2, $r2, $r7
+	beqz    $r3, .Li25
+	ori     $r2, $r2, #2
+.Li25:
+	move    $r3, #0
+	addi    $r8, $r2, #0x80
+	sltsi   $r15, $r8, #0
+	beqzs8  .LFlab8
+	move    $r3, #1
+	j       .LFlab8
+	.size	__mulsf3, .-__mulsf3
+#endif /* L_mul_sf */
+
+
+
+#ifdef L_mul_df
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+	#define P3L     $r4
+	#define P3H     $r5
+	#define O1L     $r7
+	#define O1H	$r8
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+	#define P3H     $r4
+	#define P3L     $r5
+	#define O1H     $r7
+	#define O1L	$r8
+#endif
+	.text
+	.align	2
+	.global	__muldf3
+	.type	__muldf3, @function
+__muldf3:
+	push    $lp
+	pushm   $r6, $r10
+
+	slli    $r6, P1H, #1
+	srli    $r6, $r6, #21
+	slli    P3H, P1H, #11
+	srli    $r10, P1L, #21
+	or      P3H, P3H, $r10
+	slli    P3L, P1L, #11
+	move    O1L, #0x80000000
+	or      P3H, P3H, O1L
+	slli    $r9, P2H, #1
+	srli    $r9, $r9, #21
+	slli    O1H, P2H, #11
+	srli    $r10, P2L, #21
+	or      O1H, O1H, $r10
+	or      O1H, O1H, O1L
+	xor     P1H, P1H, P2H
+	and     P1H, P1H, O1L
+	slli    O1L, P2L, #11
+
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LFspecA
+
+.LFlab1:
+	addi    $r10, $r9, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LFspecB
+
+.LFlab2:
+	addi    $r10, $r9, #0xfffffc02
+	add     $r6, $r6, $r10
+
+	move    $r10, $r8
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r9, $r3) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r8, $r5, $r8
+#else
+	pushm	$r0, $r5
+	move	$r0, $r5
+	movi	$r1, #0
+	move	$r2, $r8
+	movi	$r3, #0
+	bal	__muldi3
+	movd44	$r8, $r0
+	popm	$r0, $r5
+#endif
+	move    $r3, $r8
+#else /* __big_endian__ */
+/* For big endain: ($r9, $r2) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r8, $r4, $r7
+#else
+	pushm	$r0, $r5
+	move	$r1, $r4
+	movi	$r0, #0
+	move	$r3, $r7
+	movi	$r2, #0
+	bal	__muldi3
+	movd44	$r8, $r0
+	popm	$r0, $r5
+#endif
+	move    $r2, $r9
+	move    $r9, $r8
+#endif /* __big_endian__ */
+	move    $r8, $r10
+
+	move    $r10, P1H
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r0, $r2) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r4, $r8
+#else
+	pushm	$r2, $r5
+	move	$r0, $r4
+	movi	$r1, #0
+	move	$r2, $r8
+	movi	$r3, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r2, $r0
+	move    $r0, $r1
+#else /* __big_endian__ */
+/* For big endain: ($r1, $r3) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r5, $r7
+#else
+	pushm	$r2, $r5
+	move	$r1, $r5
+	movi	$r0, #0
+	move	$r3, $r7
+	movi	$r2, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r3, $r1
+	move    $r1, $r0
+#endif /* __big_endian__ */
+	move    P1H, $r10
+
+	#ADD(P2H, P1L)
+	add     P2H, P2H, P1L
+	slt     $r15, P2H, P1L
+
+	#ADDC($r9, $0x0)
+	add     $r9, $r9, $r15
+
+	move    $r10, P1H
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r0, $r8) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r5, $r7
+#else
+	pushm	$r2, $r5
+	move	$r0, $r5
+	movi	$r1, #0
+	move	$r2, $r7
+	movi	$r3, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r8, $r0
+	move    $r0, $r1
+#else /* __big_endian__ */
+/* For big endian: ($r1, $r7) is (high, low). */
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r4, $r8
+#else
+	pushm	$r2, $r5
+	move	$r1, $r4
+	movi	$r0, #0
+	move	$r3, $r8
+	movi	$r2, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move	$r7, $r1
+	move	$r1, $r0
+#endif /* __big_endian__ */
+	move    P1H, $r10
+
+	#ADD(P2L, O1H)
+	add     P2L, P2L, O1H
+	slt     $r15, P2L, O1H
+
+
+	#ADDCC(P2H, P1L)
+	beqzs8  .LL29
+	add     P2H, P2H, P1L
+	slt     $r15, P2H, P1L
+	beqzs8  .LL30
+	addi    P2H, P2H, #0x1
+	j       .LL31
+.LL30:
+	move    $r15, #1
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+	j       .LL31
+.LL29:
+	add     P2H, P2H, P1L
+	slt     $r15, P2H, P1L
+.LL31:
+
+	#ADDC($r9, $0x0)
+	add     $r9, $r9, $r15
+
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r8, $r0) is (high, low). */
+	move    $r10, $r9
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r8, $r4, $r7
+#else
+	pushm	$r0, $r5
+	move	$r0, $r4
+	movi	$r1, #0
+	move	$r2, $r7
+	movi	$r3, #0
+	bal	__muldi3
+	movd44	$r8, $r0
+	popm	$r0, $r5
+#endif
+	move    $r0, $r8
+	move    $r8, $r9
+	move    $r9, $r10
+#else /* __big_endian__ */
+/* For big endian: ($r7, $r1) is (high, low). */
+	move	$r10, $r6
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r6, $r5, $r8
+#else
+	pushm	$r0, $r5
+	move	$r1, $r5
+	movi	$r0, #0
+	move	$r3, $r8
+	movi	$r2, #0
+	bal	__muldi3
+	movd44	$r6, $r0
+	popm	$r0, $r5
+#endif
+	move	$r1, $r7
+	move	$r7, $r6
+	move	$r6, $r10
+#endif /* __big_endian__ */
+
+	#ADD(P2L, O1H)
+	add     P2L, P2L, O1H
+	slt     $r15, P2L, O1H
+
+
+	#ADDCC(P2H, $0x0)
+	beqzs8  .LL34
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+.LL34:
+
+	#ADDC($r9, $0x0)
+	add     $r9, $r9, $r15
+	or      $r10, P1L, P2L
+	beqz    $r10, .Li13
+	ori     P2H, P2H, #1
+.Li13:
+	move    P3H, $r9
+	move    P3L, P2H
+	sltsi   $r15, P3H, #0
+	bnezs8  .Li14
+
+	move    $r15, P3L
+	add     P3L, P3L, P3L
+	slt     $r15, P3L, $r15
+	add     P3H, P3H, P3H
+	add     P3H, P3H, $r15
+	addi    $r6, $r6, #-1
+.Li14:
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LFoveund
+
+	#ADD(P3L, $0x400)
+	move    $r15, #0x400
+	add     P3L, P3L, $r15
+	slt     $r15, P3L, $r15
+
+
+	#ADDCC(P3H, $0x0)
+	beqzs8  .LL37
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+.LL37:
+
+	#ADDC($r6, $0x0)
+	add     $r6, $r6, $r15
+
+.LFlab8:
+	srli    $r10, P3L, #11
+	andi    $r10, $r10, #1
+	sub     P3L, P3L, $r10
+	srli    P1L, P3L, #11
+	slli    $r10, P3H, #21
+	or      P1L, P1L, $r10
+	slli    $r10, P3H, #1
+	srli    $r10, $r10, #12
+	or      P1H, P1H, $r10
+	slli    $r10, $r6, #20
+	or      P1H, P1H, $r10
+
+.LFret:
+.LF999:
+	popm    $r6, $r10
+	pop     $lp
+	ret5    $lp
+
+.LFspecA:
+	#ADD(P3L, P3L)
+	move    $r15, P3L
+	add     P3L, P3L, P3L
+	slt     $r15, P3L, $r15
+
+	#ADDC(P3H, P3H)
+	add     P3H, P3H, P3H
+	add     P3H, P3H, $r15
+	bnez    $r6, .Li15
+	or      $r10, P3H, P3L
+	beqz    $r10, .Li16
+
+
+	#NORMd($r4, P1L, P2H)
+	bnez    P3H, .LL38
+	bnez    P3L, .LL39
+	move    $r6, #0
+	j       .LL40
+.LL39:
+	move    P3H, P3L
+	move    P3L, #0
+	move    P1L, #32
+	sub     $r6, $r6, P1L
+.LL38:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r0, P3H
+#else
+	pushm	$r1, P3H
+	move	$r0, P3H
+	bal	__clzsi2
+	popm	$r1, $r5
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r1, $r4
+#else
+	push	$r0
+	pushm	$r2, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r1, $r0
+	popm	$r2, $r5
+	pop	$r0
+#endif
+#endif /* __big_endian__ */
+	beqz    P1L, .LL40
+	sub     $r6, $r6, P1L
+	subri   P2H, P1L, #32
+	srl     P2H, P3L, P2H
+	sll     P3L, P3L, P1L
+	sll     P3H, P3H, P1L
+	or      P3H, P3H, P2H
+.LL40:
+	#NORMd End
+
+	j       .LFlab1
+.Li16:
+	subri   $r15, $r9, #0x7ff
+	beqzs8  .LFnan
+	j       .LFret
+.Li15:
+	or      $r10, P3H, P3L
+	bnez    $r10, .LFnan
+	bnez    $r9, .Li17
+	slli    $r10, O1H, #1
+	or      $r10, $r10, O1L
+	beqz    $r10, .LFnan
+.Li17:
+	subri   $r15, $r9, #0x7ff
+	bnezs8  .LFinf
+
+.LFspecB:
+	#ADD(O1L, O1L)
+	move    $r15, O1L
+	add     O1L, O1L, O1L
+	slt     $r15, O1L, $r15
+
+	#ADDC(O1H, O1H)
+	add     O1H, O1H, O1H
+	add     O1H, O1H, $r15
+	bnez    $r9, .Li18
+	or      $r10, O1H, O1L
+	beqz    $r10, .Li19
+
+
+	#NORMd($r7, P2L, P1L)
+	bnez    O1H, .LL41
+	bnez    O1L, .LL42
+	move    $r9, #0
+	j       .LL43
+.LL42:
+	move    O1H, O1L
+	move    O1L, #0
+	move    P2L, #32
+	sub     $r9, $r9, P2L
+.LL41:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, $r8
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, $r8
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, $r7
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	move	$r0, $r7
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+#endif /* __big_endian__ */
+	beqz    P2L, .LL43
+	sub     $r9, $r9, P2L
+	subri   P1L, P2L, #32
+	srl     P1L, O1L, P1L
+	sll     O1L, O1L, P2L
+	sll     O1H, O1H, P2L
+	or      O1H, O1H, P1L
+.LL43:
+	#NORMd End
+
+	j       .LFlab2
+.Li19:
+	move    P1L, #0
+	j       .LFret
+.Li18:
+	or      $r10, O1H, O1L
+	bnez    $r10, .LFnan
+
+.LFinf:
+	move    $r10, #0x7ff00000
+	or      P1H, P1H, $r10
+	move    P1L, #0
+	j       .LFret
+
+.LFnan:
+	move    P1H, #0xfff80000
+	move    P1L, #0
+	j       .LFret
+
+.LFoveund:
+	bgtz    $r6, .LFinf
+	subri   P1L, $r6, #1
+	move    P2L, #0
+.LL44:
+	move    $r10, #0x20
+	slt     $r15, P1L, $r10
+	bnezs8  .LL45
+	or      P2L, P2L, P3L
+	move    P3L, P3H
+	move    P3H, #0
+	addi    P1L, P1L, #0xffffffe0
+	bnez    P3L, .LL44
+.LL45:
+	beqz    P1L, .LL46
+	move    P2H, P3H
+	move    $r10, P3L
+	srl     P3L, P3L, P1L
+	srl     P3H, P3H, P1L
+	subri   P1L, P1L, #0x20
+	sll     P2H, P2H, P1L
+	or      P3L, P3L, P2H
+	sll     $r10, $r10, P1L
+	or      P2L, P2L, $r10
+	beqz    P2L, .LL46
+	ori     P3L, P3L, #1
+.LL46:
+	#ADD(P3L, $0x400)
+	move    $r15, #0x400
+	add     P3L, P3L, $r15
+	slt     $r15, P3L, $r15
+
+	#ADDC(P3H, $0x0)
+	add     P3H, P3H, $r15
+	srli    $r6, P3H, #31
+	j       .LFlab8
+	.size __muldf3, .-__muldf3
+#endif /* L_mul_df */
+
+
+
+#ifdef L_div_sf
+
+	.text
+	.align	2
+	.global	__divsf3
+	.type	__divsf3, @function
+__divsf3:
+	push    $lp
+	pushm   $r6, $r10
+
+	move    $r7, #0x80000000
+	srli    $r4, $r0, #23
+	andi    $r4, $r4, #0xff
+	srli    $r6, $r1, #23
+	andi    $r6, $r6, #0xff
+	slli    $r3, $r0, #8
+	or      $r3, $r3, $r7
+	slli    $r5, $r1, #8
+	or      $r5, $r5, $r7
+	xor     $r10, $r0, $r1
+	and     $r7, $r7, $r10
+
+	addi    $r10, $r4, #-1
+	slti    $r15, $r10, #0xfe
+	beqzs8  .LGspecA
+
+.LGlab1:
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0xfe
+	beqzs8  .LGspecB
+
+.LGlab2:
+	slt     $r15, $r3, $r5
+	bnezs8  .Li27
+	srli    $r3, $r3, #1
+	addi    $r4, $r4, #1
+.Li27:
+	srli    $r8, $r5, #14
+	divr    $r0, $r2, $r3, $r8
+	andi    $r9, $r5, #0x3fff
+	mul     $r1, $r9, $r0
+	slli    $r2, $r2, #14
+
+	#SUB($r2, $r1)
+	move    $r15, $r2
+	sub     $r2, $r2, $r1
+	slt     $r15, $r15, $r2
+	beqzs8  .Li28
+	addi    $r0, $r0, #-1
+
+	#ADD($r2, $r5)
+	add     $r2, $r2, $r5
+	slt     $r15, $r2, $r5
+.Li28:
+	divr    $r3, $r2, $r2, $r8
+	mul     $r1, $r9, $r3
+	slli    $r2, $r2, #14
+
+	#SUB($r2, $r1)
+	move    $r15, $r2
+	sub     $r2, $r2, $r1
+	slt     $r15, $r15, $r2
+	beqzs8  .Li29
+	addi    $r3, $r3, #-1
+
+	#ADD($r2, $r5)
+	add     $r2, $r2, $r5
+	slt     $r15, $r2, $r5
+.Li29:
+	slli    $r10, $r0, #14
+	add     $r3, $r3, $r10
+	slli    $r3, $r3, #4
+	beqz    $r2, .Li30
+	ori     $r3, $r3, #1
+.Li30:
+	subri   $r10, $r6, #0x7e
+	add     $r4, $r4, $r10
+	addi    $r10, $r4, #-1
+	slti    $r15, $r10, #0xfe
+	beqzs8  .LGoveund
+
+.LGlab8:
+	#ADD($r3, $0x80)
+	move    $r15, #0x80
+	add     $r3, $r3, $r15
+	slt     $r15, $r3, $r15
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r10, $r3, #8
+	andi    $r10, $r10, #1
+	sub     $r3, $r3, $r10
+	slli    $r3, $r3, #1
+	srli    $r3, $r3, #9
+	slli    $r10, $r4, #23
+	or      $r3, $r3, $r10
+	or      $r0, $r3, $r7
+
+.LG999:
+	popm    $r6, $r10
+	pop     $lp
+	ret5    $lp
+
+.LGspecA:
+	bnez    $r4, .Li31
+	add     $r3, $r3, $r3
+	beqz    $r3, .Li31
+#ifdef __NDS32_PERF_EXT__
+	clz	$r8, $r3
+#else
+	pushm	$r0, $r5
+	move	$r0, $r3
+	bal	__clzsi2
+	move	$r8, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r4, $r4, $r8
+	sll     $r3, $r3, $r8
+	j       .LGlab1
+.Li31:
+	bne     $r6, $r4, .Li33
+	add     $r10, $r5, $r5
+	beqz    $r10, .LGnan
+.Li33:
+	subri   $r15, $r6, #0xff
+	beqzs8  .LGspecB
+	beqz    $r4, .LGzer
+	add     $r10, $r3, $r3
+	bnez    $r10, .LGnan
+	j       .LGinf
+
+.LGspecB:
+	bnez    $r6, .Li34
+	add     $r5, $r5, $r5
+	beqz    $r5, .LGinf
+#ifdef __NDS32_PERF_EXT__
+	clz	$r8, $r5
+#else
+	pushm	$r0, $r5
+	move	$r0, $r5
+	bal	__clzsi2
+	move	$r8, $r0
+	popm	$r0, $r5
+#endif
+	sub     $r6, $r6, $r8
+	sll     $r5, $r5, $r8
+	j       .LGlab2
+.Li34:
+	add     $r10, $r5, $r5
+	bnez    $r10, .LGnan
+
+.LGzer:
+	move    $r0, $r7
+	j       .LG999
+
+.LGoveund:
+	bgtz    $r4, .LGinf
+	subri   $r8, $r4, #1
+	slti    $r15, $r8, #0x20
+	beqzs8  .LGzer
+	subri   $r10, $r8, #0x20
+	sll     $r4, $r3, $r10
+	srl     $r3, $r3, $r8
+	beqz    $r4, .Li37
+	ori     $r3, $r3, #2
+.Li37:
+	move    $r4, #0
+	addi    $r10, $r3, #0x80
+	sltsi   $r15, $r10, #0
+	beqzs8  .LGlab8
+	move    $r4, #1
+	j       .LGlab8
+
+.LGinf:
+	move    $r10, #0x7f800000
+	or      $r0, $r7, $r10
+	j       .LG999
+
+.LGnan:
+	move    $r0, #0xffc00000
+	j       .LG999
+	.size	__divsf3, .-__divsf3
+#endif /* L_div_sf */
+
+
+
+#ifdef L_div_df
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+	#define P3L     $r4
+	#define P3H     $r5
+	#define O1L     $r7
+	#define O1H	$r8
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+	#define P3H     $r4
+	#define P3L     $r5
+	#define O1H     $r7
+	#define O1L	$r8
+#endif
+	.text
+	.align	2
+	.global	__divdf3
+	.type	__divdf3, @function
+__divdf3:
+	push    $lp
+	pushm   $r6, $r10
+
+	slli    $r6, P1H, #1
+	srli    $r6, $r6, #21
+	slli    P3H, P1H, #11
+	srli    $r10, P1L, #21
+	or      P3H, P3H, $r10
+	slli    P3L, P1L, #11
+	move    O1L, #0x80000000
+	or      P3H, P3H, O1L
+	slli    $r9, P2H, #1
+	srli    $r9, $r9, #21
+	slli    O1H, P2H, #11
+	srli    $r10, P2L, #21
+	or      O1H, O1H, $r10
+	or      O1H, O1H, O1L
+	xor     P1H, P1H, P2H
+	and     P1H, P1H, O1L
+	slli    O1L, P2L, #11
+
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LGspecA
+
+.LGlab1:
+	addi    $r10, $r9, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LGspecB
+
+.LGlab2:
+	sub     $r6, $r6, $r9
+	addi    $r6, $r6, #0x3ff
+	srli    P3L, P3L, #1
+	slli    $r10, P3H, #31
+	or      P3L, P3L, $r10
+	srli    P3H, P3H, #1
+	srli    $r9, O1H, #16
+	divr    P2H, P3H, P3H, $r9
+	move    $r10, #0xffff
+	and     P2L, O1H, $r10
+	mul     P1L, P2L, P2H
+	slli    P3H, P3H, #16
+	srli    $r10, P3L, #16
+	or      P3H, P3H, $r10
+
+	#SUB(P3H, P1L)
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .Li20
+
+.Lb21:
+	addi    P2H, P2H, #-1
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .Lb21
+.Li20:
+	divr    $r9, P3H, P3H, $r9
+	mul     P1L, P2L, $r9
+	slli    P3H, P3H, #16
+	move    $r15, #0xffff
+	and     $r10, P3L, $r15
+	or      P3H, P3H, $r10
+
+	#SUB(P3H, P1L)
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .Li22
+
+.Lb23:
+	addi    $r9, $r9, #-1
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .Lb23
+.Li22:
+	slli    P2H, P2H, #16
+	add     P2H, P2H, $r9
+
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r0, $r9) is (high, low). */
+	move    $r10, $r1
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r3, $r7
+#else
+	pushm	$r2, $r5
+	move	$r0, $r3
+	movi	$r1, #0
+	move	$r2, $r7
+	movi	$r3, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r9, $r0
+	move    $r0, $r1
+	move    $r1, $r10
+#else /* __big_endian__ */
+/* For big endian: ($r1, $r9) is (high, low). */
+	move    $r10, $r0
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r2, $r8
+#else
+	pushm	$r2, $r5
+	move	$r1, $r2
+	movi	$r0, #0
+	move	$r3, $r8
+	movi	$r2, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r9, $r1
+	move    $r1, $r0
+	move    $r0, $r10
+#endif /* __big_endian__ */
+
+	move    P3L, #0
+
+	#SUB(P3L, $r9)
+	move    $r15, P3L
+	sub     P3L, P3L, $r9
+	slt     $r15, $r15, P3L
+
+
+	#SUBCC(P3H, P1L)
+	beqzs8  .LL47
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .LL48
+	subi333 P3H, P3H, #1
+	j       .LL49
+.LL48:
+	move    $r15, P3H
+	subi333 P3H, P3H, #1
+	slt     $r15, $r15, P3H
+	j       .LL49
+.LL47:
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+.LL49:
+
+	beqzs8  .Li24
+
+.LGlab3:
+	addi    P2H, P2H, #-1
+
+	#ADD(P3L, O1L)
+	add     P3L, P3L, O1L
+	slt     $r15, P3L, O1L
+
+
+	#ADDCC(P3H, O1H)
+	beqzs8  .LL50
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .LL51
+	addi    P3H, P3H, #0x1
+	j       .LL52
+.LL51:
+	move    $r15, #1
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+	j       .LL52
+.LL50:
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+.LL52:
+
+	beqzs8  .LGlab3
+.Li24:
+	bne     P3H, O1H, .Li25
+	move    P1L, O1L
+	move    P3H, P3L
+	move    $r9, #0
+	move    P2L, $r9
+	j       .Le25
+.Li25:
+	srli    P2L, O1H, #16
+	divr    $r9, P3H, P3H, P2L
+	move    $r10, #0xffff
+	and     $r10, O1H, $r10
+	mul     P1L, $r10, $r9
+	slli    P3H, P3H, #16
+	srli    $r15, P3L, #16
+	or      P3H, P3H, $r15
+
+	#SUB(P3H, P1L)
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .Li26
+
+.Lb27:
+	addi    $r9, $r9, #-1
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .Lb27
+.Li26:
+	divr    P2L, P3H, P3H, P2L
+	mul     P1L, $r10, P2L
+	slli    P3H, P3H, #16
+	move    $r10, #0xffff
+	and     $r10, P3L, $r10
+	or      P3H, P3H, $r10
+
+	#SUB(P3H, P1L)
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .Li28
+
+.Lb29:
+	addi    P2L, P2L, #-1
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .Lb29
+.Li28:
+	slli    $r9, $r9, #16
+	add     $r9, $r9, P2L
+
+/* This is a 64-bit multiple. */
+#ifndef __big_endian__
+/* For little endian: ($r0, $r2) is (high, low). */
+	move    $r10, $r1
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r9, $r7
+#else
+	pushm	$r2, $r5
+	move	$r0, $r9
+	movi	$r1, #0
+	move	$r2, $r7
+	movi	$r3, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move    $r2, $r0
+	move    $r0, $r1
+	move    $r1, $r10
+#else /* __big_endian__ */
+/* For big endian: ($r1, $r3) is (high, low). */
+	move	$r10, $r0
+#ifndef __NDS32_ISA_V3M__
+	mulr64	$r0, $r9, $r8
+#else
+	pushm	$r2, $r5
+	move	$r0, $r9
+	movi	$r1, #0
+	move	$r2, $r7
+	movi	$r3, #0
+	bal	__muldi3
+	popm	$r2, $r5
+#endif
+	move	$r3, $r1
+	move	$r1, $r0
+	move	$r0, $r10
+#endif /* __big_endian__ */
+
+.Le25:
+	move    P3L, #0
+
+	#SUB(P3L, P2L)
+	move    $r15, P3L
+	sub     P3L, P3L, P2L
+	slt     $r15, $r15, P3L
+
+
+	#SUBCC(P3H, P1L)
+	beqzs8  .LL53
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+	beqzs8  .LL54
+	subi333 P3H, P3H, #1
+	j       .LL55
+.LL54:
+	move    $r15, P3H
+	subi333 P3H, P3H, #1
+	slt     $r15, $r15, P3H
+	j       .LL55
+.LL53:
+	move    $r15, P3H
+	sub     P3H, P3H, P1L
+	slt     $r15, $r15, P3H
+.LL55:
+
+	beqzs8  .Li30
+
+.LGlab4:
+	addi    $r9, $r9, #-1
+
+	#ADD(P3L, O1L)
+	add     P3L, P3L, O1L
+	slt     $r15, P3L, O1L
+
+
+	#ADDCC(P3H, O1H)
+	beqzs8  .LL56
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+	beqzs8  .LL57
+	addi    P3H, P3H, #0x1
+	j       .LL58
+.LL57:
+	move    $r15, #1
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+	j       .LL58
+.LL56:
+	add     P3H, P3H, O1H
+	slt     $r15, P3H, O1H
+.LL58:
+
+	beqzs8  .LGlab4
+.Li30:
+	sltsi   $r15, P2H, #0
+	bnezs8  .Li31
+
+	#ADD($r9, $r9)
+	move    $r15, $r9
+	add     $r9, $r9, $r9
+	slt     $r15, $r9, $r15
+
+	#ADDC(P2H, P2H)
+	add     P2H, P2H, P2H
+	add     P2H, P2H, $r15
+	addi    $r6, $r6, #-1
+.Li31:
+	or      $r10, P3H, P3L
+	beqz    $r10, .Li32
+	ori     $r9, $r9, #1
+.Li32:
+	move    P3H, P2H
+	move    P3L, $r9
+	addi    $r10, $r6, #-1
+	slti    $r15, $r10, #0x7fe
+	beqzs8  .LGoveund
+
+	#ADD(P3L, $0x400)
+	move    $r15, #0x400
+	add     P3L, P3L, $r15
+	slt     $r15, P3L, $r15
+
+
+	#ADDCC(P3H, $0x0)
+	beqzs8  .LL61
+	add     P3H, P3H, $r15
+	slt     $r15, P3H, $r15
+.LL61:
+
+	#ADDC($r6, $0x0)
+	add     $r6, $r6, $r15
+
+.LGlab8:
+	srli    $r10, P3L, #11
+	andi    $r10, $r10, #1
+	sub     P3L, P3L, $r10
+	srli    P1L, P3L, #11
+	slli    $r10, P3H, #21
+	or      P1L, P1L, $r10
+	slli    $r10, P3H, #1
+	srli    $r10, $r10, #12
+	or      P1H, P1H, $r10
+	slli    $r10, $r6, #20
+	or      P1H, P1H, $r10
+
+.LGret:
+.LG999:
+	popm    $r6, $r10
+	pop     $lp
+	ret5    $lp
+
+.LGoveund:
+	bgtz    $r6, .LGinf
+	subri   P2H, $r6, #1
+	move    P1L, #0
+.LL62:
+	move    $r10, #0x20
+	slt     $r15, P2H, $r10
+	bnezs8  .LL63
+	or      P1L, P1L, P3L
+	move    P3L, P3H
+	move    P3H, #0
+	addi    P2H, P2H, #0xffffffe0
+	bnez    P3L, .LL62
+.LL63:
+	beqz    P2H, .LL64
+	move    P2L, P3H
+	move    $r10, P3L
+	srl     P3L, P3L, P2H
+	srl     P3H, P3H, P2H
+	subri   P2H, P2H, #0x20
+	sll     P2L, P2L, P2H
+	or      P3L, P3L, P2L
+	sll     $r10, $r10, P2H
+	or      P1L, P1L, $r10
+	beqz    P1L, .LL64
+	ori     P3L, P3L, #1
+.LL64:
+	#ADD(P3L, $0x400)
+	move    $r15, #0x400
+	add     P3L, P3L, $r15
+	slt     $r15, P3L, $r15
+
+	#ADDC(P3H, $0x0)
+	add     P3H, P3H, $r15
+	srli    $r6, P3H, #31
+	j       .LGlab8
+
+.LGspecA:
+	#ADD(P3L, P3L)
+	move    $r15, P3L
+	add     P3L, P3L, P3L
+	slt     $r15, P3L, $r15
+
+	#ADDC(P3H, P3H)
+	add     P3H, P3H, P3H
+	add     P3H, P3H, $r15
+	bnez    $r6, .Li33
+	or      $r10, P3H, P3L
+	beqz    $r10, .Li33
+
+
+	#NORMd($r4, P2H, P2L)
+	bnez    P3H, .LL65
+	bnez    P3L, .LL66
+	move    $r6, #0
+	j       .LL67
+.LL66:
+	move    P3H, P3L
+	move    P3L, #0
+	move    P2H, #32
+	sub     $r6, $r6, P2H
+.LL65:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, $r5
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	move	$r0, $r5
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, $r4
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, $r4
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+#endif /* __big_endian_ */
+	beqz    P2H, .LL67
+	sub     $r6, $r6, P2H
+	subri   P2L, P2H, #32
+	srl     P2L, P3L, P2L
+	sll     P3L, P3L, P2H
+	sll     P3H, P3H, P2H
+	or      P3H, P3H, P2L
+.LL67:
+	#NORMd End
+
+	j       .LGlab1
+.Li33:
+	bne     $r6, $r9, .Li35
+	slli    $r10, O1H, #1
+	or      $r10, $r10, O1L
+	beqz    $r10, .LGnan
+.Li35:
+	subri   $r15, $r9, #0x7ff
+	beqzs8  .LGspecB
+	beqz    $r6, .LGret
+	or      $r10, P3H, P3L
+	bnez    $r10, .LGnan
+
+.LGinf:
+	move    $r10, #0x7ff00000
+	or      P1H, P1H, $r10
+	move    P1L, #0
+	j       .LGret
+
+.LGspecB:
+	#ADD(O1L, O1L)
+	move    $r15, O1L
+	add     O1L, O1L, O1L
+	slt     $r15, O1L, $r15
+
+	#ADDC(O1H, O1H)
+	add     O1H, O1H, O1H
+	add     O1H, O1H, $r15
+	bnez    $r9, .Li36
+	or      $r10, O1H, O1L
+	beqz    $r10, .LGinf
+
+
+	#NORMd($r7, P2H, P2L)
+	bnez    O1H, .LL68
+	bnez    O1L, .LL69
+	move    $r9, #0
+	j       .LL70
+.LL69:
+	move    O1H, O1L
+	move    O1L, #0
+	move    P2H, #32
+	sub     $r9, $r9, P2H
+.LL68:
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, $r8
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	move	$r0, $r8
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r2, $r7
+#else
+	pushm	$r0, $r1
+	pushm	$r3, $r5
+	move	$r0, $r7
+	bal	__clzsi2
+	move	$r2, $r0
+	popm	$r3, $r5
+	popm	$r0, $r1
+#endif
+#endif /* __big_endian__ */
+	beqz    P2H, .LL70
+	sub     $r9, $r9, P2H
+	subri   P2L, P2H, #32
+	srl     P2L, O1L, P2L
+	sll     O1L, O1L, P2H
+	sll     O1H, O1H, P2H
+	or      O1H, O1H, P2L
+.LL70:
+	#NORMd End
+
+	j       .LGlab2
+.Li36:
+	or      $r10, O1H, O1L
+	beqz    $r10, .Li38
+
+.LGnan:
+	move    P1H, #0xfff80000
+.Li38:
+	move    P1L, #0
+	j       .LGret
+	.size __divdf3, .-__divdf3
+#endif /* L_div_df */
+
+
+
+#ifdef L_negate_sf
+
+	.text
+	.align	2
+	.global	__negsf2
+	.type	__negsf2, @function
+__negsf2:
+	push    $lp
+
+	move    $r1, #0x80000000
+	xor     $r0, $r0, $r1
+
+.LN999:
+	pop     $lp
+	ret5    $lp
+	.size __negsf2, .-__negsf2
+#endif /* L_negate_sf */
+
+
+
+#ifdef L_negate_df
+
+#ifndef __big_endian__
+	#define P1H     $r1
+#else
+	#define P1H     $r0
+#endif
+	.text
+	.align	2
+	.global	__negdf2
+	.type	__negdf2, @function
+__negdf2:
+	push    $lp
+
+	move    $r2, #0x80000000
+	xor     P1H, P1H, $r2
+
+.LP999:
+	pop     $lp
+	ret5    $lp
+	.size __negdf2, .-__negdf2
+#endif /* L_negate_df */
+
+
+
+#ifdef L_sf_to_df
+
+#ifndef __big_endian__
+	#define O1L     $r1
+	#define O1H     $r2
+#else
+	#define O1H     $r1
+	#define O1L     $r2
+#endif
+	.text
+	.align	2
+	.global	__extendsfdf2
+	.type	__extendsfdf2, @function
+__extendsfdf2:
+	push    $lp
+
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	move    $r5, #0x80000000
+	and     O1H, $r0, $r5
+	addi    $r5, $r3, #-1
+	slti    $r15, $r5, #0xfe
+	beqzs8  .LJspec
+
+.LJlab1:
+	addi    $r3, $r3, #0x380
+	slli    $r5, $r0, #9
+	srli    $r5, $r5, #12
+	or      O1H, O1H, $r5
+	slli    O1L, $r0, #29
+
+.LJret:
+	slli    $r5, $r3, #20
+	or      O1H, O1H, $r5
+	move    $r0, $r1
+	move    $r1, $r2
+
+.LJ999:
+	pop     $lp
+	ret5    $lp
+
+.LJspec:
+	move    O1L, #0
+	add     $r0, $r0, $r0
+	beqz    $r0, .LJret
+	bnez    $r3, .Li42
+
+.Lb43:
+	addi    $r3, $r3, #-1
+	add     $r0, $r0, $r0
+	move    $r5, #0x800000
+	slt     $r15, $r0, $r5
+	bnezs8  .Lb43
+	j       .LJlab1
+.Li42:
+	move    $r3, #0x7ff
+	move    $r5, #0xff000000
+	slt     $r15, $r5, $r0
+	beqzs8  .LJret
+	move    O1H, #0xfff80000
+	j       .LJret
+	.size __extendsfdf2, .-__extendsfdf2
+#endif /* L_sf_to_df */
+
+
+
+#ifdef L_df_to_sf
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#endif
+	.text
+	.align	2
+	.global	__truncdfsf2
+	.type	__truncdfsf2, @function
+__truncdfsf2:
+	push    $lp
+	pushm   $r6, $r8
+
+	slli    P2H, P1H, #11
+	srli    $r7, P1L, #21
+	or      P2H, P2H, $r7
+	slli    P2L, P1L, #11
+	move    $r7, #0x80000000
+	or      P2H, P2H, $r7
+	and     $r5, P1H, $r7
+	slli    $r4, P1H, #1
+	srli    $r4, $r4, #21
+	addi    $r4, $r4, #0xfffffc80
+	addi    $r7, $r4, #-1
+	slti    $r15, $r7, #0xfe
+	beqzs8  .LKspec
+
+.LKlab1:
+	beqz    P2L, .Li45
+	ori     P2H, P2H, #1
+.Li45:
+	#ADD(P2H, $0x80)
+	move    $r15, #0x80
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r7, P2H, #8
+	andi    $r7, $r7, #1
+	sub     P2H, P2H, $r7
+	slli    P2H, P2H, #1
+	srli    P2H, P2H, #9
+	slli    $r7, $r4, #23
+	or      P2H, P2H, $r7
+	or      $r0, P2H, $r5
+
+.LK999:
+	popm    $r6, $r8
+	pop     $lp
+	ret5    $lp
+
+.LKspec:
+	subri   $r15, $r4, #0x47f
+	bnezs8  .Li46
+	slli    $r7, P2H, #1
+	or      $r7, $r7, P2L
+	beqz    $r7, .Li46
+	move    $r0, #0xffc00000
+	j       .LK999
+.Li46:
+	sltsi   $r15, $r4, #0xff
+	bnezs8  .Li48
+	move    $r7, #0x7f800000
+	or      $r0, $r5, $r7
+	j       .LK999
+.Li48:
+	subri   $r6, $r4, #1
+	move    $r7, #0x20
+	slt     $r15, $r6, $r7
+	bnezs8  .Li49
+	move    $r0, $r5
+	j       .LK999
+.Li49:
+	subri   $r8, $r6, #0x20
+	sll     $r7, P2H, $r8
+	or      P2L, P2L, $r7
+	srl     P2H, P2H, $r6
+	move    $r4, #0
+	move    $r7, #0x80000000
+	or      P2H, P2H, $r7
+	j       .LKlab1
+	.size __truncdfsf2, .-__truncdfsf2
+#endif /* L_df_to_sf */
+
+
+
+#ifdef L_df_to_si
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+#endif
+	.global	__fixdfsi
+	.type	__fixdfsi, @function
+__fixdfsi:
+	push    $lp
+	pushm   $r6, $r6
+
+	slli    $r3, P1H, #11
+	srli    $r6, P1L, #21
+	or      $r3, $r3, $r6
+	move    $r6, #0x80000000
+	or      $r3, $r3, $r6
+	slli    $r6, P1H, #1
+	srli    $r6, $r6, #21
+	subri   $r2, $r6, #0x41e
+	blez    $r2, .LLnaninf
+	move    $r6, #0x20
+	slt     $r15, $r2, $r6
+	bnezs8  .LL72
+	move    $r3, #0
+.LL72:
+	srl     $r3, $r3, $r2
+	sltsi   $r15, P1H, #0
+	beqzs8  .Li50
+	subri   $r3, $r3, #0
+.Li50:
+	move    $r0, $r3
+
+.LL999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+
+.LLnaninf:
+	beqz    P1L, .Li51
+	ori     P1H, P1H, #1
+.Li51:
+	move    $r6, #0x7ff00000
+	slt     $r15, $r6, P1H
+	beqzs8  .Li52
+	move    $r0, #0x80000000
+	j       .LL999
+.Li52:
+	move    $r0, #0x7fffffff
+	j       .LL999
+	.size __fixdfsi, .-__fixdfsi
+#endif /* L_df_to_si */
+
+
+
+#ifdef L_fixsfdi
+
+#ifndef __big_endian__
+	#define O1L     $r1
+	#define O1H     $r2
+#else
+	#define O1H     $r1
+	#define O1L     $r2
+#endif
+	.text
+	.align	2
+	.global	__fixsfdi
+	.type	__fixsfdi, @function
+__fixsfdi:
+	push    $lp
+
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	slli    O1H, $r0, #8
+	move    $r5, #0x80000000
+	or      O1H, O1H, $r5
+	move    O1L, #0
+	sltsi   $r15, $r3, #0xbe
+	beqzs8  .LCinfnan
+	subri   $r3, $r3, #0xbe
+.LL8:
+	move    $r5, #0x20
+	slt     $r15, $r3, $r5
+	bnezs8  .LL9
+	move    O1L, O1H
+	move    O1H, #0
+	addi    $r3, $r3, #0xffffffe0
+	bnez    O1L, .LL8
+.LL9:
+	beqz    $r3, .LL10
+	move    $r4, O1H
+	srl     O1L, O1L, $r3
+	srl     O1H, O1H, $r3
+	subri   $r3, $r3, #0x20
+	sll     $r4, $r4, $r3
+	or      O1L, O1L, $r4
+.LL10:
+	sltsi   $r15, $r0, #0
+	beqzs8  .LCret
+
+	subri   O1H, O1H, #0
+	beqz    O1L, .LL11
+	subri   O1L, O1L, #0
+	subi45  O1H, #1
+.LL11:
+
+.LCret:
+	move    $r0, $r1
+	move    $r1, $r2
+
+.LC999:
+	pop     $lp
+	ret5    $lp
+
+.LCinfnan:
+	sltsi   $r15, $r0, #0
+	bnezs8  .LCret3
+	subri   $r15, $r3, #0xff
+	bnezs8  .Li7
+	slli    $r5, O1H, #1
+	beqz    $r5, .Li7
+
+.LCret3:
+	move    O1H, #0x80000000
+	j       .LCret
+.Li7:
+	move    O1H, #0x7fffffff
+	move    O1L, #-1
+	j       .LCret
+	.size	__fixsfdi, .-__fixsfdi
+#endif /* L_fixsfdi */
+
+
+
+#ifdef L_fixdfdi
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define O1L     $r3
+	#define O1H     $r4
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define O1H     $r3
+	#define O1L     $r4
+#endif
+	.text
+	.align	2
+	.global	__fixdfdi
+	.type	__fixdfdi, @function
+__fixdfdi:
+	push    $lp
+	pushm   $r6, $r6
+
+	slli    $r5, P1H, #1
+	srli    $r5, $r5, #21
+	slli    O1H, P1H, #11
+	srli    $r6, P1L, #21
+	or      O1H, O1H, $r6
+	slli    O1L, P1L, #11
+	move    $r6, #0x80000000
+	or      O1H, O1H, $r6
+	slti    $r15, $r5, #0x43e
+	beqzs8  .LCnaninf
+	subri   $r2, $r5, #0x43e
+.LL14:
+	move    $r6, #0x20
+	slt     $r15, $r2, $r6
+	bnezs8  .LL15
+	move    O1L, O1H
+	move    O1H, #0
+	addi    $r2, $r2, #0xffffffe0
+	bnez    O1L, .LL14
+.LL15:
+	beqz    $r2, .LL16
+	move    P1L, O1H
+	srl     O1L, O1L, $r2
+	srl     O1H, O1H, $r2
+	subri   $r2, $r2, #0x20
+	sll     P1L, P1L, $r2
+	or      O1L, O1L, P1L
+.LL16:
+	sltsi   $r15, P1H, #0
+	beqzs8  .LCret
+
+	subri   O1H, O1H, #0
+	beqz    O1L, .LL17
+	subri   O1L, O1L, #0
+	subi45  O1H, #1
+.LL17:
+
+.LCret:
+	move    P1L, O1L
+	move    P1H, O1H
+
+.LC999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+
+.LCnaninf:
+	sltsi   $r15, P1H, #0
+	bnezs8  .LCret3
+	subri   $r15, $r5, #0x7ff
+	bnezs8  .Li5
+	slli    $r6, O1H, #1
+	or      $r6, $r6, O1L
+	beqz    $r6, .Li5
+
+.LCret3:
+	move    O1H, #0x80000000
+	move    O1L, #0
+	j       .LCret
+.Li5:
+	move    O1H, #0x7fffffff
+	move    O1L, #-1
+	j       .LCret
+	.size	__fixdfdi, .-__fixdfdi
+#endif /* L_fixdfdi */
+
+
+
+#ifdef L_fixunssfsi
+
+	.global	__fixunssfsi
+	.type	__fixunssfsi, @function
+__fixunssfsi:
+	push    $lp
+
+	slli    $r1, $r0, #8
+	move    $r3, #0x80000000
+	or      $r1, $r1, $r3
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	subri   $r2, $r3, #0x9e
+	sltsi   $r15, $r2, #0
+	bnezs8  .LLspec
+	sltsi   $r15, $r2, #0x20
+	bnezs8  .Li45
+	move    $r0, #0
+	j       .LL999
+.Li45:
+	srl     $r1, $r1, $r2
+	sltsi   $r15, $r0, #0
+	beqzs8  .Li46
+	subri   $r1, $r1, #0
+.Li46:
+	move    $r0, $r1
+
+.LL999:
+	pop     $lp
+	ret5    $lp
+
+.LLspec:
+	move    $r3, #0x7f800000
+	slt     $r15, $r3, $r0
+	beqzs8  .Li47
+	move    $r0, #0x80000000
+	j       .LL999
+.Li47:
+	move    $r0, #-1
+	j       .LL999
+	.size	__fixunssfsi, .-__fixunssfsi
+#endif /* L_fixunssfsi */
+
+
+
+#ifdef L_fixunsdfsi
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+#endif
+	.text
+	.align	2
+	.global	__fixunsdfsi
+	.type	__fixunsdfsi, @function
+__fixunsdfsi:
+	push    $lp
+	pushm   $r6, $r6
+
+	slli    $r3, P1H, #11
+	srli    $r6, P1L, #21
+	or      $r3, $r3, $r6
+	move    $r6, #0x80000000
+	or      $r3, $r3, $r6
+	slli    $r6, P1H, #1
+	srli    $r6, $r6, #21
+	subri   $r2, $r6, #0x41e
+	sltsi   $r15, $r2, #0
+	bnezs8  .LNnaninf
+	move    $r6, #0x20
+	slt     $r15, $r2, $r6
+	bnezs8  .LL73
+	move    $r3, #0
+.LL73:
+	srl     $r3, $r3, $r2
+	sltsi   $r15, P1H, #0
+	beqzs8  .Li53
+	subri   $r3, $r3, #0
+.Li53:
+	move    $r0, $r3
+
+.LN999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+
+.LNnaninf:
+	beqz    P1L, .Li54
+	ori     P1H, P1H, #1
+.Li54:
+	move    $r6, #0x7ff00000
+	slt     $r15, $r6, P1H
+	beqzs8  .Li55
+	move    $r0, #0x80000000
+	j       .LN999
+.Li55:
+	move    $r0, #-1
+	j       .LN999
+	.size __fixunsdfsi, .-__fixunsdfsi
+#endif /* L_fixunsdfsi */
+
+
+
+#ifdef L_fixunssfdi
+
+#ifndef __big_endian__
+	#define O1L     $r1
+	#define O1H     $r2
+#else
+	#define O1H     $r1
+	#define O1L     $r2
+#endif
+	.text
+	.align	2
+	.global	__fixunssfdi
+	.type	__fixunssfdi, @function
+__fixunssfdi:
+	push    $lp
+
+	srli    $r3, $r0, #23
+	andi    $r3, $r3, #0xff
+	slli    O1H, $r0, #8
+	move    $r5, #0x80000000
+	or      O1H, O1H, $r5
+	move    O1L, #0
+	sltsi   $r15, $r3, #0xbe
+	beqzs8  .LDinfnan
+	subri   $r3, $r3, #0xbe
+.LL12:
+	move    $r5, #0x20
+	slt     $r15, $r3, $r5
+	bnezs8  .LL13
+	move    O1L, O1H
+	move    O1H, #0
+	addi    $r3, $r3, #0xffffffe0
+	bnez    O1L, .LL12
+.LL13:
+	beqz    $r3, .LL14
+	move    $r4, O1H
+	srl     O1L, O1L, $r3
+	srl     O1H, O1H, $r3
+	subri   $r3, $r3, #0x20
+	sll     $r4, $r4, $r3
+	or      O1L, O1L, $r4
+.LL14:
+	sltsi   $r15, $r0, #0
+	beqzs8  .LDret
+
+	subri   O1H, O1H, #0
+	beqz    O1L, .LL15
+	subri   O1L, O1L, #0
+	subi45  O1H, #1
+.LL15:
+
+.LDret:
+	move    $r0, $r1
+	move    $r1, $r2
+
+.LD999:
+	pop     $lp
+	ret5    $lp
+
+.LDinfnan:
+	move    O1H, #0x80000000
+	move    O1L, #0
+	j       .LDret
+	.size	__fixunssfdi, .-__fixunssfdi
+#endif /* L_fixunssfdi */
+
+
+
+#ifdef L_fixunsdfdi
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define O1L     $r3
+	#define O1H     $r4
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define O1H     $r3
+	#define O1L     $r4
+#endif
+	.text
+	.align	2
+	.global	__fixunsdfdi
+	.type	__fixunsdfdi, @function
+__fixunsdfdi:
+	push    $lp
+	pushm   $r6, $r6
+
+	slli    $r5, P1H, #1
+	srli    $r5, $r5, #21
+	slli    O1H, P1H, #11
+	srli    $r6, P1L, #21
+	or      O1H, O1H, $r6
+	slli    O1L, P1L, #11
+	move    $r6, #0x80000000
+	or      O1H, O1H, $r6
+	slti    $r15, $r5, #0x43e
+	beqzs8  .LDnaninf
+	subri   $r2, $r5, #0x43e
+.LL18:
+	move    $r6, #0x20
+	slt     $r15, $r2, $r6
+	bnezs8  .LL19
+	move    O1L, O1H
+	move    O1H, #0
+	addi    $r2, $r2, #0xffffffe0
+	bnez    O1L, .LL18
+.LL19:
+	beqz    $r2, .LL20
+	move    P1L, O1H
+	srl     O1L, O1L, $r2
+	srl     O1H, O1H, $r2
+	subri   $r2, $r2, #0x20
+	sll     P1L, P1L, $r2
+	or      O1L, O1L, P1L
+.LL20:
+	sltsi   $r15, P1H, #0
+	beqzs8  .LDret
+
+	subri   O1H, O1H, #0
+	beqz    O1L, .LL21
+	subri   O1L, O1L, #0
+	subi45  O1H, #1
+.LL21:
+
+.LDret:
+	move    P1L, O1L
+	move    P1H, O1H
+
+.LD999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+
+.LDnaninf:
+	move    O1H, #0x80000000
+	move    O1L, #0
+	j       .LDret
+	.size	__fixunsdfdi, .-__fixunsdfdi
+#endif /* L_fixunsdfdi */
+
+
+
+#ifdef L_si_to_sf
+
+	.text
+	.align	2
+	.global	__floatsisf
+	.type	__floatsisf, @function
+__floatsisf:
+	push    $lp
+
+	move    $r4, #0x80000000
+	and     $r2, $r0, $r4
+	beqz    $r0, .Li39
+	sltsi   $r15, $r0, #0
+	beqzs8  .Li40
+	subri   $r0, $r0, #0
+.Li40:
+	move    $r1, #0x9e
+#ifdef __NDS32_PERF_EXT__
+	clz	$r3, $r0
+#else
+	pushm	$r0, $r2
+	pushm	$r4, $r5
+	bal	__clzsi2
+	move	$r3, $r0
+	popm	$r4, $r5
+	popm	$r0, $r2
+#endif
+	sub     $r1, $r1, $r3
+	sll     $r0, $r0, $r3
+
+	#ADD($r0, $0x80)
+	move    $r15, #0x80
+	add     $r0, $r0, $r15
+	slt     $r15, $r0, $r15
+
+	#ADDC($r1, $0x0)
+	add     $r1, $r1, $r15
+	srai    $r4, $r0, #8
+	andi    $r4, $r4, #1
+	sub     $r0, $r0, $r4
+	slli    $r0, $r0, #1
+	srli    $r0, $r0, #9
+	slli    $r4, $r1, #23
+	or      $r0, $r0, $r4
+.Li39:
+	or      $r0, $r0, $r2
+
+.LH999:
+	pop     $lp
+	ret5    $lp
+	.size	__floatsisf, .-__floatsisf
+#endif /* L_si_to_sf */
+
+
+
+#ifdef L_si_to_df
+
+#ifndef __big_endian__
+	#define O1L     $r1
+	#define O1H     $r2
+	#define O2L     $r4
+	#define O2H	$r5
+#else
+	#define O1H     $r1
+	#define O1L     $r2
+	#define O2H     $r4
+	#define O2L	$r5
+#endif
+	.text
+	.align	2
+	.global	__floatsidf
+	.type	__floatsidf, @function
+__floatsidf:
+	push    $lp
+	pushm   $r6, $r6
+
+	move    O1L, #0
+	move    O2H, O1L
+	move    $r3, O1L
+	move    O1H, $r0
+	beqz    O1H, .Li39
+	sltsi   $r15, O1H, #0
+	beqzs8  .Li40
+	move    O2H, #0x80000000
+
+	subri   O1H, O1H, #0
+	beqz    O1L, .LL71
+	subri   O1L, O1L, #0
+	subi45  O1H, #1
+.LL71:
+.Li40:
+	move    $r3, #0x41e
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r4, $r2
+#else
+	pushm	$r0, $r3
+	push	$r5
+	move	$r0, $r2
+	bal	__clzsi2
+	move	$r4, $r0
+	pop	$r5
+	popm	$r0, $r3
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r5, $r1
+#else
+	pushm	$r0, $r4
+	move	$r0, $r1
+	bal	__clzsi2
+	move	$r5, $r0
+	popm	$r0, $r4
+#endif
+#endif /* __big_endian__ */
+	sub     $r3, $r3, O2L
+	sll     O1H, O1H, O2L
+.Li39:
+	srli    O2L, O1L, #11
+	slli    $r6, O1H, #21
+	or      O2L, O2L, $r6
+	slli    $r6, O1H, #1
+	srli    $r6, $r6, #12
+	or      O2H, O2H, $r6
+	slli    $r6, $r3, #20
+	or      O2H, O2H, $r6
+	move    $r0, $r4
+	move    $r1, $r5
+
+.LH999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+	.size __floatsidf, .-__floatsidf
+#endif /* L_si_to_df */
+
+
+
+#ifdef L_floatdisf
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#endif
+	.text
+	.align	2
+	.global	__floatdisf
+	.type	__floatdisf, @function
+__floatdisf:
+	push    $lp
+	pushm   $r6, $r7
+
+	move    $r7, #0x80000000
+	and     $r5, P1H, $r7
+	move    P2H, P1H
+	move    P2L, P1L
+	or      $r7, P1H, P1L
+	beqz    $r7, .Li1
+	sltsi   $r15, P1H, #0
+	beqzs8  .Li2
+
+	subri   P2H, P2H, #0
+	beqz    P2L, .LL1
+	subri   P2L, P2L, #0
+	subi45  P2H, #1
+.LL1:
+.Li2:
+	move    $r4, #0xbe
+
+
+	#NORMd($r2, $r6, P1L)
+	bnez    P2H, .LL2
+	bnez    P2L, .LL3
+	move    $r4, #0
+	j       .LL4
+.LL3:
+	move    P2H, P2L
+	move    P2L, #0
+	move    $r6, #32
+	sub     $r4, $r4, $r6
+.LL2:
+#ifdef __NDS32_PERF_EXT__
+	clz	$r6, P2H
+#else
+	pushm	$r0, $r5
+	move	$r0, P2H
+	bal	__clzsi2
+	move	$r6, $r0
+	popm	$r0, $r5
+#endif
+	beqz    $r6, .LL4
+	sub     $r4, $r4, $r6
+	subri   P1L, $r6, #32
+	srl     P1L, P2L, P1L
+	sll     P2L, P2L, $r6
+	sll     P2H, P2H, $r6
+	or      P2H, P2H, P1L
+.LL4:
+	#NORMd End
+
+	beqz    P2L, .Li3
+	ori     P2H, P2H, #1
+.Li3:
+	#ADD(P2H, $0x80)
+	move    $r15, #0x80
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r7, P2H, #8
+	andi    $r7, $r7, #1
+	sub     P2H, P2H, $r7
+	slli    P2H, P2H, #1
+	srli    P2H, P2H, #9
+	slli    $r7, $r4, #23
+	or      P2H, P2H, $r7
+.Li1:
+	or      $r0, P2H, $r5
+
+.LA999:
+	popm    $r6, $r7
+	pop     $lp
+	ret5    $lp
+	.size	__floatdisf, .-__floatdisf
+#endif /* L_floatdisf */
+
+
+
+#ifdef L_floatdidf
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+	#define O1L     $r5
+	#define O1H     $r6
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+	#define O1H     $r5
+	#define O1L     $r6
+#endif
+	.text
+	.align	2
+	.global	__floatdidf
+	.type	__floatdidf, @function
+__floatdidf:
+	push    $lp
+	pushm   $r6, $r8
+
+	move    $r4, #0
+	move    $r7, $r4
+	move    P2H, P1H
+	move    P2L, P1L
+	or      $r8, P1H, P1L
+	beqz    $r8, .Li1
+	move    $r4, #0x43e
+	sltsi   $r15, P1H, #0
+	beqzs8  .Li2
+	move    $r7, #0x80000000
+
+	subri   P2H, P2H, #0
+	beqz    P2L, .LL1
+	subri   P2L, P2L, #0
+	subi45  P2H, #1
+.LL1:
+
+.Li2:
+	#NORMd($r2, O1H, O1L)
+	bnez    P2H, .LL2
+	bnez    P2L, .LL3
+	move    $r4, #0
+	j       .LL4
+.LL3:
+	move    P2H, P2L
+	move    P2L, #0
+	move    O1H, #32
+	sub     $r4, $r4, O1H
+.LL2:
+#ifdef __NDS32_PERF_EXT__
+	clz	O1H, P2H
+#else /* not __NDS32_PERF_EXT__ */
+/*
+  Replace clz with function call.
+	clz     O1H, P2H
+  EL:	clz     $r6, $r3
+  EB:	clz	$r5, $r2
+*/
+#ifndef __big_endian__
+	pushm	$r0, $r5
+	move	$r0, $r3
+	bal	__clzsi2
+	move	$r6, $r0
+	popm	$r0, $r5
+#else
+	pushm	$r0, $r4
+	move	$r0, $r2
+	bal	__clzsi2
+	move	$r5, $r0
+	popm	$r0, $r4
+#endif
+#endif /* not __NDS32_PERF_EXT__ */
+	beqz    O1H, .LL4
+	sub     $r4, $r4, O1H
+	subri   O1L, O1H, #32
+	srl     O1L, P2L, O1L
+	sll     P2L, P2L, O1H
+	sll     P2H, P2H, O1H
+	or      P2H, P2H, O1L
+.LL4:
+	#NORMd End
+
+	#ADD(P2L, $0x400)
+	move    $r15, #0x400
+	add     P2L, P2L, $r15
+	slt     $r15, P2L, $r15
+
+
+	#ADDCC(P2H, $0x0)
+	beqzs8  .LL7
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+.LL7:
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r8, P2L, #11
+	andi    $r8, $r8, #1
+	sub     P2L, P2L, $r8
+.Li1:
+	srli    O1L, P2L, #11
+	slli    $r8, P2H, #21
+	or      O1L, O1L, $r8
+	slli    O1H, P2H, #1
+	srli    O1H, O1H, #12
+	slli    $r8, $r4, #20
+	or      O1H, O1H, $r8
+	or      O1H, O1H, $r7
+	move    P1L, O1L
+	move    P1H, O1H
+
+.LA999:
+	popm    $r6, $r8
+	pop     $lp
+	ret5    $lp
+	.size	__floatdidf, .-__floatdidf
+#endif /* L_floatdidf */
+
+
+
+#ifdef L_floatunsisf
+
+	.text
+	.align	2
+	.global	__floatunsisf
+	.type	__floatunsisf, @function
+__floatunsisf:
+	push    $lp
+
+	beqz    $r0, .Li41
+	move    $r2, #0x9e
+#ifdef __NDS32_PERF_EXT__
+	clz	$r1, $r0
+#else
+	push	$r0
+	pushm	$r2, $r5
+	bal	__clzsi2
+	move	$r1, $r0
+	popm	$r2, $r5
+	pop	$r0
+#endif
+
+	sub     $r2, $r2, $r1
+	sll     $r0, $r0, $r1
+
+	#ADD($r0, $0x80)
+	move    $r15, #0x80
+	add     $r0, $r0, $r15
+	slt     $r15, $r0, $r15
+
+	#ADDC($r2, $0x0)
+	add     $r2, $r2, $r15
+	srli    $r3, $r0, #8
+	andi    $r3, $r3, #1
+	sub     $r0, $r0, $r3
+	slli    $r0, $r0, #1
+	srli    $r0, $r0, #9
+	slli    $r3, $r2, #23
+	or      $r0, $r0, $r3
+
+.Li41:
+.LI999:
+	pop     $lp
+	ret5    $lp
+	.size	__floatunsisf, .-__floatunsisf
+#endif /* L_floatunsisf */
+
+
+
+#ifdef L_floatunsidf
+
+#ifndef __big_endian__
+	#define O1L     $r1
+	#define O1H     $r2
+	#define O2L     $r4
+	#define O2H	$r5
+#else
+	#define O1H     $r1
+	#define O1L     $r2
+	#define O2H     $r4
+	#define O2L	$r5
+#endif
+	.text
+	.align	2
+	.global	__floatunsidf
+	.type	__floatunsidf, @function
+__floatunsidf:
+	push    $lp
+	pushm   $r6, $r6
+
+	move    O1L, #0
+	move    $r3, O1L
+	move    O1H, $r0
+	beqz    O1H, .Li41
+	move    $r3, #0x41e
+#ifndef __big_endian__
+#ifdef __NDS32_PERF_EXT__
+	clz	$r5, $r2
+#else
+	pushm	$r0, $r4
+	move	$r0, $r2
+	bal	__clzsi2
+	move	$r5, $r0
+	popm	$r0, $r4
+#endif
+#else /* __big_endian__ */
+#ifdef __NDS32_PERF_EXT__
+	clz	$r4, $r1
+#else
+	pushm	$r0, $r3
+	push	$r5
+	move	$r0, $r1
+	bal	__clzsi2
+	move	$r4, $r0
+	pop	$r5
+	popm	$r0, $r3
+#endif
+#endif /* __big_endian__ */
+	sub     $r3, $r3, O2H
+	sll     O1H, O1H, O2H
+.Li41:
+	srli    O2L, O1L, #11
+	slli    $r6, O1H, #21
+	or      O2L, O2L, $r6
+	slli    O2H, O1H, #1
+	srli    O2H, O2H, #12
+	slli    $r6, $r3, #20
+	or      O2H, O2H, $r6
+	move    $r0, $r4
+	move    $r1, $r5
+
+.LI999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+	.size __floatunsidf, .-__floatunsidf
+#endif /* L_floatunsidf */
+
+
+
+#ifdef L_floatundisf
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#endif
+	.text
+	.align	2
+	.global	__floatundisf
+	.type	__floatundisf, @function
+__floatundisf:
+	push    $lp
+	pushm   $r6, $r6
+
+	move    P2H, P1H
+	move    P2L, P1L
+	or      $r6, P1H, P1L
+	beqz    $r6, .Li4
+	move    $r4, #0xbe
+
+
+	#NORMd($r2, $r5, P1L)
+	bnez    P2H, .LL5
+	bnez    P2L, .LL6
+	move    $r4, #0
+	j       .LL7
+.LL6:
+	move    P2H, P2L
+	move    P2L, #0
+	move    $r5, #32
+	sub     $r4, $r4, $r5
+.LL5:
+#ifdef __NDS32_PERF_EXT__
+	clz	$r5, P2H
+#else
+	pushm	$r0, $r4
+	move	$r0, P2H
+	bal	__clzsi2
+	move	$r5, $r0
+	popm	$r0, $r4
+#endif
+	beqz    $r5, .LL7
+	sub     $r4, $r4, $r5
+	subri   P1L, $r5, #32
+	srl     P1L, P2L, P1L
+	sll     P2L, P2L, $r5
+	sll     P2H, P2H, $r5
+	or      P2H, P2H, P1L
+.LL7:
+	#NORMd End
+
+	beqz    P2L, .Li5
+	ori     P2H, P2H, #1
+.Li5:
+	#ADD(P2H, $0x80)
+	move    $r15, #0x80
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r6, P2H, #8
+	andi    $r6, $r6, #1
+	sub     P2H, P2H, $r6
+	slli    P2H, P2H, #1
+	srli    P2H, P2H, #9
+	slli    $r6, $r4, #23
+	or      P2H, P2H, $r6
+.Li4:
+	move    $r0, P2H
+
+.LB999:
+	popm    $r6, $r6
+	pop     $lp
+	ret5    $lp
+	.size	__floatundisf, .-__floatundisf
+#endif /* L_floatundisf */
+
+
+
+#ifdef L_floatundidf
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+	#define O1L     $r5
+	#define O1H     $r6
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+	#define O1H     $r5
+	#define O1L     $r6
+#endif
+	.text
+	.align	2
+	.global	__floatundidf
+	.type	__floatundidf, @function
+__floatundidf:
+	push    $lp
+	pushm   $r6, $r7
+
+	move    $r4, #0
+	move    P2H, P1H
+	move    P2L, P1L
+	or      $r7, P1H, P1L
+	beqz    $r7, .Li3
+	move    $r4, #0x43e
+
+
+	#NORMd($r2, O1H, O1L)
+	bnez    P2H, .LL8
+	bnez    P2L, .LL9
+	move    $r4, #0
+	j       .LL10
+.LL9:
+	move    P2H, P2L
+	move    P2L, #0
+	move    O1H, #32
+	sub     $r4, $r4, O1H
+.LL8:
+#ifdef __NDS32_PERF_EXT__
+	clz	O1H, P2H
+#else /* not __NDS32_PERF_EXT__ */
+/*
+  Replace clz with function call.
+	clz     O1H, P2H
+  EL:	clz     $r6, $r3
+  EB:	clz	$r5, $r2
+*/
+#ifndef __big_endian__
+	pushm	$r0, $r5
+	move	$r0, $r3
+	bal	__clzsi2
+	move	$r6, $r0
+	popm	$r0, $r5
+#else
+	pushm	$r0, $r4
+	move	$r0, $r2
+	bal	__clzsi2
+	move	$r5, $r0
+	popm	$r0, $r4
+#endif
+#endif /* not __NDS32_PERF_EXT__ */
+	beqz    O1H, .LL10
+	sub     $r4, $r4, O1H
+	subri   O1L, O1H, #32
+	srl     O1L, P2L, O1L
+	sll     P2L, P2L, O1H
+	sll     P2H, P2H, O1H
+	or      P2H, P2H, O1L
+.LL10:
+	#NORMd End
+
+	#ADD(P2L, $0x400)
+	move    $r15, #0x400
+	add     P2L, P2L, $r15
+	slt     $r15, P2L, $r15
+
+
+	#ADDCC(P2H, $0x0)
+	beqzs8  .LL13
+	add     P2H, P2H, $r15
+	slt     $r15, P2H, $r15
+.LL13:
+
+	#ADDC($r4, $0x0)
+	add     $r4, $r4, $r15
+	srli    $r7, P2L, #11
+	andi    $r7, $r7, #1
+	sub     P2L, P2L, $r7
+.Li3:
+	srli    O1L, P2L, #11
+	slli    $r7, P2H, #21
+	or      O1L, O1L, $r7
+	slli    O1H, P2H, #1
+	srli    O1H, O1H, #12
+	slli    $r7, $r4, #20
+	or      O1H, O1H, $r7
+	move    P1L, O1L
+	move    P1H, O1H
+
+.LB999:
+	popm    $r6, $r7
+	pop     $lp
+	ret5    $lp
+	.size	__floatundidf, .-__floatundidf
+#endif /* L_floatundidf */
+
+
+
+#ifdef L_compare_sf
+
+	.text
+	.align	2
+	.global	__cmpsf2
+	.type	__cmpsf2, @function
+__cmpsf2:
+	.global	__eqsf2
+	.type	__eqsf2, @function
+__eqsf2:
+	.global	__ltsf2
+	.type	__ltsf2, @function
+__ltsf2:
+	.global	__lesf2
+	.type	__lesf2, @function
+__lesf2:
+	.global	__nesf2
+	.type	__nesf2, @function
+__nesf2:
+	move    $r4, #1
+	j	.LA
+
+	.global	__gesf2
+	.type	__gesf2, @function
+__gesf2:
+	.global	__gtsf2
+	.type	__gtsf2, @function
+__gtsf2:
+	move	$r4, #-1
+.LA:
+	push    $lp
+
+	slli    $r2, $r0, #1
+	slli    $r3, $r1, #1
+	or      $r5, $r2, $r3
+	beqz    $r5, .LMequ
+	move    $r5, #0xff000000
+	slt     $r15, $r5, $r2
+	bnezs8  .LMnan
+	slt     $r15, $r5, $r3
+	bnezs8  .LMnan
+	srli    $r2, $r2, #1
+	sltsi   $r15, $r0, #0
+	beqzs8  .Li48
+	subri   $r2, $r2, #0
+.Li48:
+	srli    $r3, $r3, #1
+	sltsi   $r15, $r1, #0
+	beqzs8  .Li49
+	subri   $r3, $r3, #0
+.Li49:
+	slts    $r15, $r2, $r3
+	beqzs8  .Li50
+	move    $r0, #-1
+	j       .LM999
+.Li50:
+	slts    $r15, $r3, $r2
+	beqzs8  .LMequ
+	move    $r0, #1
+	j       .LM999
+
+.LMequ:
+	move    $r0, #0
+
+.LM999:
+	pop     $lp
+	ret5    $lp
+
+.LMnan:
+	move    $r0, $r4
+	j       .LM999
+	.size   __cmpsf2, .-__cmpsf2
+	.size   __eqsf2, .-__eqsf2
+	.size   __ltsf2, .-__ltsf2
+	.size   __lesf2, .-__lesf2
+	.size   __nesf2, .-__nesf2
+	.size   __gesf2, .-__gesf2
+	.size   __gtsf2, .-__gtsf2
+#endif /* L_compare_sf */
+
+
+
+#ifdef L_compare_df
+
+#ifdef __big_endian__
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#else
+	#define P1H     $r1
+	#define P1L     $r0
+	#define P2H     $r3
+	#define P2L     $r2
+#endif
+	.align	2
+	.globl	__gtdf2
+	.globl	__gedf2
+	.globl	__ltdf2
+	.globl	__ledf2
+	.globl	__eqdf2
+	.globl	__nedf2
+	.globl	__cmpdf2
+	.type	__gtdf2, @function
+	.type	__gedf2, @function
+	.type	__ltdf2, @function
+	.type	__ledf2, @function
+	.type	__eqdf2, @function
+	.type	__nedf2, @function
+	.type	__cmpdf2, @function
+__gtdf2:
+__gedf2:
+	movi	$r4, -1
+	b	.L1
+
+__ltdf2:
+__ledf2:
+__cmpdf2:
+__nedf2:
+__eqdf2:
+	movi	$r4, 1
+.L1:
+#if defined (__NDS32_ISA_V3M__)
+	push25	$r10, 0
+#else
+	smw.adm	$r6, [$sp], $r9, 0
+#endif
+
+	sethi	$r5, 0x7ff00
+	and	$r6, P1H, $r5	! r6=aExp
+	and	$r7, P2H, $r5	! r7=bExp
+	slli	$r8, P1H, 12	! r8=aSig0
+	slli	$r9, P2H, 12	! r9=bSig0
+	beq	$r6, $r5, .L11	! aExp==0x7ff
+	beq	$r7, $r5, .L12	! bExp==0x7ff
+.L2:
+	slli	$ta, P1H, 1	! ta=ahigh<<1
+	or	$ta, P1L, $ta	!
+	xor	$r5, P1H, P2H	! r5=ahigh^bhigh
+	beqz	$ta, .L3	! if(ahigh<<1)==0,go .L3
+	!-------------------------------
+	! (ahigh<<1)!=0 || (bhigh<<1)!=0
+	!-------------------------------
+.L4:
+	beqz	$r5, .L5	! ahigh==bhigh, go .L5
+	!--------------------
+	! a != b
+	!--------------------
+.L6:
+	bltz	$r5, .L7	! if(aSign!=bSign), go .L7
+	!--------------------
+	! aSign==bSign
+	!--------------------
+	slt	$ta, $r6, $r7	! ta=(aExp<bExp)
+	bne	$r6, $r7, .L8	! if(aExp!=bExp),go .L8
+	slt	$ta, $r8, $r9	! ta=(aSig0<bSig0)
+	bne	$r8, $r9, .L8	! if(aSig0!=bSig0),go .L8
+	slt	$ta, P1L, P2L	! ta=(aSig1<bSig1)
+.L8:
+	beqz	$ta, .L10	! if(|a|>|b|), go .L10
+	nor	$r0, P2H, P2H	! if(|a|<|b|),return (~yh)
+.L14:
+#if defined (__NDS32_ISA_V3M__)
+	pop25	$r10, 0
+#else
+	lmw.bim	$r6, [$sp], $r9, 0
+	ret
+#endif
+.L10:
+	ori	$r0, P2H, 1	! return (yh|1)
+	b	.L14
+	!--------------------
+	! (ahigh<<1)=0
+	!--------------------
+.L3:
+	slli	$ta, P2H, 1	! ta=bhigh<<1
+	or	$ta, P2L, $ta	!
+	bnez	$ta, .L4	! ta=(bhigh<<1)!=0,go .L4
+.L5:
+	xor	$ta, P1L, P2L	! ta=alow^blow
+	bnez	$ta, .L6	! alow!=blow,go .L6
+	movi	$r0, 0		! a==b, return 0
+	b	.L14
+	!--------------------
+	! aExp=0x7ff;
+	!--------------------
+.L11:
+	or	P1L, P1L, $r8	! x1=(aSig0|aSig1)
+	bnez	P1L, .L13	! if(a=nan), go.L13
+	xor	$ta, $r7, $r5	! ta=(bExp^0x7ff)
+	bnez	$ta, .L2	! if(bExp!=0x7ff), go .L2
+	!--------------------
+	! bExp=0x7ff;
+	!--------------------
+.L12:
+	or	$ta, P2L, $r9	! ta=(bSig0|bSig1)
+	beqz	$ta, .L2	! if(b!=nan), go .L2
+.L13:
+	move	$r0, $r4
+	b	.L14
+	!--------------------
+	! aSign!=bSign
+	!--------------------
+.L7:
+	ori	$r0, P1H, 1	! if(aSign!=bSign), return (ahigh|1)
+	b	.L14
+
+	.size	__gtdf2, .-__gtdf2
+	.size	__gedf2, .-__gedf2
+	.size	__ltdf2, .-__ltdf2
+	.size	__ledf2, .-__ledf2
+	.size	__eqdf2, .-__eqdf2
+	.size	__nedf2, .-__nedf2
+	.size	__cmpdf2, .-__cmpdf2
+#endif /* L_compare_df */
+
+
+
+#ifdef L_unord_sf
+
+	.text
+	.align	2
+	.global	__unordsf2
+	.type	__unordsf2, @function
+__unordsf2:
+	push    $lp
+
+	slli    $r2, $r0, #1
+	move    $r3, #0xff000000
+	slt     $r15, $r3, $r2
+	beqzs8  .Li52
+	move    $r0, #1
+	j       .LP999
+.Li52:
+	slli    $r2, $r1, #1
+	move    $r3, #0xff000000
+	slt     $r15, $r3, $r2
+	beqzs8  .Li53
+	move    $r0, #1
+	j       .LP999
+.Li53:
+	move    $r0, #0
+
+.LP999:
+	pop     $lp
+	ret5    $lp
+	.size	__unordsf2, .-__unordsf2
+#endif /* L_unord_sf */
+
+
+
+#ifdef L_unord_df
+
+#ifndef __big_endian__
+	#define P1L     $r0
+	#define P1H     $r1
+	#define P2L     $r2
+	#define P2H     $r3
+#else
+	#define P1H     $r0
+	#define P1L     $r1
+	#define P2H     $r2
+	#define P2L     $r3
+#endif
+	.text
+	.align	2
+	.global	__unorddf2
+	.type	__unorddf2, @function
+__unorddf2:
+	push    $lp
+
+	slli    $r4, P1H, #1
+	beqz    P1L, .Li66
+	addi    $r4, $r4, #1
+.Li66:
+	move    $r5, #0xffe00000
+	slt     $r15, $r5, $r4
+	beqzs8  .Li67
+	move    $r0, #1
+	j       .LR999
+.Li67:
+	slli    $r4, P2H, #1
+	beqz    P2L, .Li68
+	addi    $r4, $r4, #1
+.Li68:
+	move    $r5, #0xffe00000
+	slt     $r15, $r5, $r4
+	beqzs8  .Li69
+	move    $r0, #1
+	j       .LR999
+.Li69:
+	move    $r0, #0
+
+.LR999:
+	pop     $lp
+	ret5    $lp
+	.size __unorddf2, .-__unorddf2
+#endif /* L_unord_df */
+/* ------------------------------------------- */
+/* DPBIT floating point operations for libgcc  */
+/* ------------------------------------------- */
diff --git a/gcc-4.9/libgcc/config/nds32/lib1asmsrc-newlib.S b/gcc-4.9/libgcc/config/nds32/lib1asmsrc-newlib.S
new file mode 100644
index 000000000..679b070c4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/lib1asmsrc-newlib.S
@@ -0,0 +1,204 @@
+/* newlib libgcc routines of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+	.section	.mdebug.abi_nds32
+	.previous
+
+#ifdef L_divsi3
+
+	.text
+	.align	2
+	.globl	__divsi3
+	.type	__divsi3, @function
+__divsi3:
+	movi	$r5, 0		! res = 0
+	xor	$r4, $r0, $r1	! neg
+	bltz	$r0, .L1
+	bltz	$r1, .L2
+.L3:
+	movi	$r2, 1		! bit = 1
+	slt	$r3, $r1, $r0	! test if dividend is smaller than or equal to divisor
+	beqz	$r3, .L5
+	bltz	$r1, .L5
+
+.L4:
+	slli	$r2, $r2, 1
+	beqz	$r2, .L6
+	slli	$r1, $r1, 1
+	slt	$r3, $r1, $r0
+	beqz	$r3, .L5
+	bgez	$r1, .L4
+
+.L5:
+	slt	$r3, $r0, $r1
+	bnez	$r3, .L8
+	sub	$r0, $r0, $r1
+	or	$r5, $r5, $r2
+.L8:
+	srli	$r1, $r1, 1
+	srli	$r2, $r2, 1
+	bnez	$r2, .L5
+.L6:
+	bgez	$r4, .L7
+	subri	$r5, $r5, 0	! negate if $r4 < 0
+.L7:
+	move	$r0, $r5
+	ret
+.L1:
+	subri	$r0, $r0, 0	! change neg to pos
+	bgez	$r1, .L3
+.L2:
+	subri	$r1, $r1, 0	! change neg to pos
+	j	.L3
+	.size	__divsi3, .-__divsi3
+
+#endif /* L_divsi3 */
+
+
+#ifdef L_modsi3
+
+	.text
+	.align	2
+	.globl	__modsi3
+	.type	__modsi3, @function
+__modsi3:
+	movi	$r5, 0		! res = 0
+	move	$r4, $r0	! neg
+	bltz	$r0, .L1
+	bltz	$r1, .L2
+.L3:
+	movi	$r2, 1		! bit = 1
+	slt	$r3, $r1, $r0	! test if dividend is smaller than or equal to divisor
+	beqz	$r3, .L5
+	bltz	$r1, .L5
+
+.L4:
+	slli	$r2, $r2, 1
+	beqz	$r2, .L6
+	slli	$r1, $r1, 1
+	slt	$r3, $r1, $r0
+	beqz	$r3, .L5
+	bgez	$r1, .L4
+
+.L5:
+	slt	$r3, $r0, $r1
+	bnez	$r3, .L8
+	sub	$r0, $r0, $r1
+	or	$r5, $r5, $r2
+.L8:
+	srli	$r1, $r1, 1
+	srli	$r2, $r2, 1
+	bnez	$r2, .L5
+.L6:
+	bgez	$r4, .L7
+	subri	$r0, $r0, 0	! negate if $r4 < 0
+.L7:
+	ret
+.L1:
+	subri	$r0, $r0, 0	! change neg to pos
+	bgez	$r1, .L3
+.L2:
+	subri	$r1, $r1, 0	! change neg to pos
+	j	.L3
+	.size	__modsi3, .-__modsi3
+
+#endif /* L_modsi3  */
+
+
+#ifdef L_udivsi3
+
+	.text
+	.align	2
+	.globl	__udivsi3
+	.type	__udivsi3, @function
+__udivsi3:
+	movi	$r5, 0		! res = 0
+	movi	$r2, 1		! bit = 1
+	slt	$r3, $r1, $r0	! test if dividend is smaller than or equal to divisor
+	beqz	$r3, .L5
+	bltz	$r1, .L5
+
+.L4:
+	slli	$r2, $r2, 1
+	beqz	$r2, .L6
+	slli	$r1, $r1, 1
+	slt	$r3, $r1, $r0
+	beqz	$r3, .L5
+	bgez	$r1, .L4
+
+.L5:
+	slt	$r3, $r0, $r1
+	bnez	$r3, .L8
+	sub	$r0, $r0, $r1
+	or	$r5, $r5, $r2
+.L8:
+	srli	$r1, $r1, 1
+	srli	$r2, $r2, 1
+	bnez	$r2, .L5
+.L6:
+	move	$r0, $r5
+	ret
+	.size	__udivsi3, .-__udivsi3
+
+#endif /* L_udivsi3  */
+
+
+#ifdef L_umodsi3
+
+	.text
+	.align	2
+	.globl	__umodsi3
+	.type	__umodsi3, @function
+__umodsi3:
+	movi	$r5, 0		! res = 0
+	movi	$r2, 1		! bit = 1
+	slt	$r3, $r1, $r0	! test if dividend is smaller than or equal to divisor
+	beqz	$r3, .L5
+	bltz	$r1, .L5
+
+.L4:
+	slli	$r2, $r2, 1
+	beqz	$r2, .L6
+	slli	$r1, $r1, 1
+	slt	$r3, $r1, $r0
+	beqz	$r3, .L5
+	bgez	$r1, .L4
+
+.L5:
+	slt	$r3, $r0, $r1
+	bnez	$r3, .L8
+	sub	$r0, $r0, $r1
+	or	$r5, $r5, $r2
+.L8:
+	srli	$r1, $r1, 1
+	srli	$r2, $r2, 1
+	bnez	$r2, .L5
+.L6:
+	ret
+	.size	__umodsi3, .-__umodsi3
+
+#endif /* L_umodsi3  */
+
+/* ----------------------------------------------------------- */
diff --git a/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzdi2.c b/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzdi2.c
new file mode 100644
index 000000000..aa60fb5d8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzdi2.c
@@ -0,0 +1,38 @@
+/* mculib libgcc routines of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+extern int __clzsi2 (int val);
+int
+__clzdi2 (long long val)
+{
+  if (val >> 32)
+    {
+      return __clzsi2 (val >> 32);
+    }
+  else
+    {
+      return __clzsi2 (val) + 32;
+    }
+}
diff --git a/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzsi2.c b/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzsi2.c
new file mode 100644
index 000000000..8749b5017
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/lib2csrc-mculib/_clzsi2.c
@@ -0,0 +1,49 @@
+/* mculib libgcc routines of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+int
+__clzsi2 (int val)
+{
+  int i = 32;
+  int j = 16;
+  int temp;
+
+  for (; j; j >>= 1)
+    {
+      if (temp = val >> j)
+	{
+	  if (j == 1)
+	    {
+	      return (i - 2);
+	    }
+	  else
+	    {
+	      i -= j;
+	      val = temp;
+	    }
+	}
+    }
+  return (i - val);
+}
diff --git a/gcc-4.9/libgcc/config/nds32/sfp-machine.h b/gcc-4.9/libgcc/config/nds32/sfp-machine.h
new file mode 100644
index 000000000..aeda774f8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/sfp-machine.h
@@ -0,0 +1,94 @@
+/* Machine settings for software floating-point emulation
+   of Andes NDS32 cpu for GNU compiler
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Andes Technology Corporation.
+
+   This file is part of GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   In addition to the permissions in the GNU Lesser General Public
+   License, the Free Software Foundation gives you unlimited
+   permission to link the compiled version of this file into
+   combinations with other programs, and to distribute those
+   combinations without any restriction coming from the use of this
+   file.  (The Lesser General Public License restrictions do apply in
+   other respects; for example, they cover modification of the file,
+   and distribution when not linked into a combine executable.)
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __big_endian__
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/nds32/t-nds32 b/gcc-4.9/libgcc/config/nds32/t-nds32
new file mode 100644
index 000000000..3b3ad8407
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/t-nds32
@@ -0,0 +1,58 @@
+# Rules of libgcc and crtstuff of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+
+# Note:
+#   Because GCC has its own make rules for crtbegin.o and crtend.o,
+#   we cannot use crtbegin.o and crtend.o rules.
+#   So we create crtbegin1.o and crtend1.o instead.
+#   Make sure the linker script include these two objects
+#   for building .ctors/.dtors sections.
+
+# Use -DCRT_BEGIN to create beginning parts of .init and .fini content
+# Make sure you are building crtbegin1.o with -O0 optimization,
+# otherwise the static function will be optimized out
+crtbegin1.o: $(srcdir)/config/nds32/initfini.c $(GCC_PASSES) $(CONFIG_H)
+	$(GCC_FOR_TARGET) $(INCLUDES) \
+	$(CFLAGS) \
+	-DCRT_BEGIN \
+	-finhibit-size-directive -fno-inline-functions \
+	-O0 -c $(srcdir)/config/nds32/initfini.c -o crtbegin1.o
+
+# Use -DCRT_END to create ending parts of .init and .fini content
+# Make sure you are building crtend1.o with -O0 optimization,
+# otherwise the static function will be optimized out
+crtend1.o: $(srcdir)/config/nds32/initfini.c $(GCC_PASSES) $(CONFIG_H)
+	$(GCC_FOR_TARGET) $(INCLUDES) \
+	$(CFLAGS) \
+	-DCRT_END \
+	-finhibit-size-directive -fno-inline-functions \
+	-O0 -c $(srcdir)/config/nds32/initfini.c -o crtend1.o
+
+# Use this rule if and only if your crt0.o does not come from library
+# Also, be sure to add 'crtzero.o' in extra_parts in libgcc/config.host
+# and change STARTFILE_SPEC in nds32.h
+#
+#crtzero.o: $(srcdir)/config/nds32/crtzero.S $(GCC_PASSES) $(CONFIG_H)
+#	$(GCC_FOR_TARGET) $(INCLUDES) \
+#	-c $(srcdir)/config/nds32/crtzero.S -o crtzero.o
+
+
+# ------------------------------------------------------------------------
diff --git a/gcc-4.9/libgcc/config/nds32/t-nds32-isr b/gcc-4.9/libgcc/config/nds32/t-nds32-isr
new file mode 100644
index 000000000..341d4f0db
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/t-nds32-isr
@@ -0,0 +1,212 @@
+# Rules of c-isr library stuff of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+
+###############################################################################
+# Makfile fragment rules for libnds32_isr.a to support ISR attribute extension
+###############################################################################
+
+# basic flags setting
+ISR_CFLAGS = $(CFLAGS) -c
+
+# the object files we would like to create
+LIBNDS32_ISR_16B_OBJS = \
+		vec_vid00.o vec_vid01.o vec_vid02.o vec_vid03.o \
+		vec_vid04.o vec_vid05.o vec_vid06.o vec_vid07.o \
+		vec_vid08.o vec_vid09.o vec_vid10.o vec_vid11.o \
+		vec_vid12.o vec_vid13.o vec_vid14.o vec_vid15.o \
+		vec_vid16.o vec_vid17.o vec_vid18.o vec_vid19.o \
+		vec_vid20.o vec_vid21.o vec_vid22.o vec_vid23.o \
+		vec_vid24.o vec_vid25.o vec_vid26.o vec_vid27.o \
+		vec_vid28.o vec_vid29.o vec_vid30.o vec_vid31.o \
+		vec_vid32.o vec_vid33.o vec_vid34.o vec_vid35.o \
+		vec_vid36.o vec_vid37.o vec_vid38.o vec_vid39.o \
+		vec_vid40.o vec_vid41.o vec_vid42.o vec_vid43.o \
+		vec_vid44.o vec_vid45.o vec_vid46.o vec_vid47.o \
+		vec_vid48.o vec_vid49.o vec_vid50.o vec_vid51.o \
+		vec_vid52.o vec_vid53.o vec_vid54.o vec_vid55.o \
+		vec_vid56.o vec_vid57.o vec_vid58.o vec_vid59.o \
+		vec_vid60.o vec_vid61.o vec_vid62.o vec_vid63.o \
+		vec_vid64.o vec_vid65.o vec_vid66.o vec_vid67.o \
+		vec_vid68.o vec_vid69.o vec_vid70.o vec_vid71.o \
+		vec_vid72.o \
+		excp_isr_ps_nn.o excp_isr_ps_ns.o excp_isr_ps_nr.o \
+		excp_isr_sa_nn.o excp_isr_sa_ns.o excp_isr_sa_nr.o \
+		intr_isr_ps_nn.o intr_isr_ps_ns.o intr_isr_ps_nr.o \
+		intr_isr_sa_nn.o intr_isr_sa_ns.o intr_isr_sa_nr.o \
+		reset.o
+
+LIBNDS32_ISR_4B_OBJS = \
+		vec_vid00_4b.o vec_vid01_4b.o vec_vid02_4b.o vec_vid03_4b.o \
+		vec_vid04_4b.o vec_vid05_4b.o vec_vid06_4b.o vec_vid07_4b.o \
+		vec_vid08_4b.o vec_vid09_4b.o vec_vid10_4b.o vec_vid11_4b.o \
+		vec_vid12_4b.o vec_vid13_4b.o vec_vid14_4b.o vec_vid15_4b.o \
+		vec_vid16_4b.o vec_vid17_4b.o vec_vid18_4b.o vec_vid19_4b.o \
+		vec_vid20_4b.o vec_vid21_4b.o vec_vid22_4b.o vec_vid23_4b.o \
+		vec_vid24_4b.o vec_vid25_4b.o vec_vid26_4b.o vec_vid27_4b.o \
+		vec_vid28_4b.o vec_vid29_4b.o vec_vid30_4b.o vec_vid31_4b.o \
+		vec_vid32_4b.o vec_vid33_4b.o vec_vid34_4b.o vec_vid35_4b.o \
+		vec_vid36_4b.o vec_vid37_4b.o vec_vid38_4b.o vec_vid39_4b.o \
+		vec_vid40_4b.o vec_vid41_4b.o vec_vid42_4b.o vec_vid43_4b.o \
+		vec_vid44_4b.o vec_vid45_4b.o vec_vid46_4b.o vec_vid47_4b.o \
+		vec_vid48_4b.o vec_vid49_4b.o vec_vid50_4b.o vec_vid51_4b.o \
+		vec_vid52_4b.o vec_vid53_4b.o vec_vid54_4b.o vec_vid55_4b.o \
+		vec_vid56_4b.o vec_vid57_4b.o vec_vid58_4b.o vec_vid59_4b.o \
+		vec_vid60_4b.o vec_vid61_4b.o vec_vid62_4b.o vec_vid63_4b.o \
+		vec_vid64_4b.o vec_vid65_4b.o vec_vid66_4b.o vec_vid67_4b.o \
+		vec_vid68_4b.o vec_vid69_4b.o vec_vid70_4b.o vec_vid71_4b.o \
+		vec_vid72_4b.o \
+		excp_isr_ps_nn_4b.o excp_isr_ps_ns_4b.o excp_isr_ps_nr_4b.o \
+		excp_isr_sa_nn_4b.o excp_isr_sa_ns_4b.o excp_isr_sa_nr_4b.o \
+		intr_isr_ps_nn_4b.o intr_isr_ps_ns_4b.o intr_isr_ps_nr_4b.o \
+		intr_isr_sa_nn_4b.o intr_isr_sa_ns_4b.o intr_isr_sa_nr_4b.o \
+		reset_4b.o
+
+LIBNDS32_ISR_COMMON_OBJS = \
+		jmptbl_vid00.o jmptbl_vid01.o jmptbl_vid02.o jmptbl_vid03.o \
+		jmptbl_vid04.o jmptbl_vid05.o jmptbl_vid06.o jmptbl_vid07.o \
+		jmptbl_vid08.o jmptbl_vid09.o jmptbl_vid10.o jmptbl_vid11.o \
+		jmptbl_vid12.o jmptbl_vid13.o jmptbl_vid14.o jmptbl_vid15.o \
+		jmptbl_vid16.o jmptbl_vid17.o jmptbl_vid18.o jmptbl_vid19.o \
+		jmptbl_vid20.o jmptbl_vid21.o jmptbl_vid22.o jmptbl_vid23.o \
+		jmptbl_vid24.o jmptbl_vid25.o jmptbl_vid26.o jmptbl_vid27.o \
+		jmptbl_vid28.o jmptbl_vid29.o jmptbl_vid30.o jmptbl_vid31.o \
+		jmptbl_vid32.o jmptbl_vid33.o jmptbl_vid34.o jmptbl_vid35.o \
+		jmptbl_vid36.o jmptbl_vid37.o jmptbl_vid38.o jmptbl_vid39.o \
+		jmptbl_vid40.o jmptbl_vid41.o jmptbl_vid42.o jmptbl_vid43.o \
+		jmptbl_vid44.o jmptbl_vid45.o jmptbl_vid46.o jmptbl_vid47.o \
+		jmptbl_vid48.o jmptbl_vid49.o jmptbl_vid50.o jmptbl_vid51.o \
+		jmptbl_vid52.o jmptbl_vid53.o jmptbl_vid54.o jmptbl_vid55.o \
+		jmptbl_vid56.o jmptbl_vid57.o jmptbl_vid58.o jmptbl_vid59.o \
+		jmptbl_vid60.o jmptbl_vid61.o jmptbl_vid62.o jmptbl_vid63.o \
+		jmptbl_vid64.o jmptbl_vid65.o jmptbl_vid66.o jmptbl_vid67.o \
+		jmptbl_vid68.o jmptbl_vid69.o jmptbl_vid70.o jmptbl_vid71.o \
+		jmptbl_vid72.o \
+		nmih.o \
+		wrh.o
+
+LIBNDS32_ISR_COMPLETE_OBJS = $(LIBNDS32_ISR_16B_OBJS) $(LIBNDS32_ISR_4B_OBJS) $(LIBNDS32_ISR_COMMON_OBJS)
+
+
+# Build common objects for ISR library
+nmih.o: $(srcdir)/config/nds32/isr-library/nmih.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/nmih.S -o nmih.o
+
+wrh.o: $(srcdir)/config/nds32/isr-library/wrh.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/wrh.S -o wrh.o
+
+jmptbl_vid%.o: $(srcdir)/config/nds32/isr-library/jmptbl_vid%.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $< -o $@
+
+
+
+# Build 16b version objects for ISR library. (no "_4b" postfix string)
+vec_vid%.o: $(srcdir)/config/nds32/isr-library/vec_vid%.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $< -o $@
+
+excp_isr_ps_nn.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_ps_nn.o
+
+excp_isr_ps_ns.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_ps_ns.o
+
+excp_isr_ps_nr.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_ps_nr.o
+
+excp_isr_sa_nn.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_sa_nn.o
+
+excp_isr_sa_ns.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_sa_ns.o
+
+excp_isr_sa_nr.o: $(srcdir)/config/nds32/isr-library/excp_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/excp_isr.S -o excp_isr_sa_nr.o
+
+intr_isr_ps_nn.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_ps_nn.o
+
+intr_isr_ps_ns.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_ps_ns.o
+
+intr_isr_ps_nr.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_ps_nr.o
+
+intr_isr_sa_nn.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_sa_nn.o
+
+intr_isr_sa_ns.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_sa_ns.o
+
+intr_isr_sa_nr.o: $(srcdir)/config/nds32/isr-library/intr_isr.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/intr_isr.S -o intr_isr_sa_nr.o
+
+reset.o: $(srcdir)/config/nds32/isr-library/reset.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/reset.S -o reset.o
+
+# Build 4b version objects for ISR library.
+vec_vid%_4b.o: $(srcdir)/config/nds32/isr-library/vec_vid%_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $< -o $@
+
+excp_isr_ps_nn_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_ps_nn_4b.o
+
+excp_isr_ps_ns_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_ps_ns_4b.o
+
+excp_isr_ps_nr_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_ps_nr_4b.o
+
+excp_isr_sa_nn_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_sa_nn_4b.o
+
+excp_isr_sa_ns_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_sa_ns_4b.o
+
+excp_isr_sa_nr_4b.o: $(srcdir)/config/nds32/isr-library/excp_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/excp_isr_4b.S -o excp_isr_sa_nr_4b.o
+
+intr_isr_ps_nn_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_ps_nn_4b.o
+
+intr_isr_ps_ns_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_ps_ns_4b.o
+
+intr_isr_ps_nr_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_ps_nr_4b.o
+
+intr_isr_sa_nn_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_sa_nn_4b.o
+
+intr_isr_sa_ns_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_sa_ns_4b.o
+
+intr_isr_sa_nr_4b.o: $(srcdir)/config/nds32/isr-library/intr_isr_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) -DNDS32_SAVE_ALL_REGS -DNDS32_NESTED_READY $(srcdir)/config/nds32/isr-library/intr_isr_4b.S -o intr_isr_sa_nr_4b.o
+
+reset_4b.o: $(srcdir)/config/nds32/isr-library/reset_4b.S
+	$(GCC_FOR_TARGET) $(ISR_CFLAGS) $(srcdir)/config/nds32/isr-library/reset_4b.S -o reset_4b.o
+
+
+# The rule to create libnds32_isr.a file
+libnds32_isr.a: $(LIBNDS32_ISR_COMPLETE_OBJS)
+	$(AR) rc libnds32_isr.a $(LIBNDS32_ISR_COMPLETE_OBJS)
+
+
+# ------------------------------------------------------------------------
diff --git a/gcc-4.9/libgcc/config/nds32/t-nds32-mculib b/gcc-4.9/libgcc/config/nds32/t-nds32-mculib
new file mode 100644
index 000000000..18635c27a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/t-nds32-mculib
@@ -0,0 +1,77 @@
+# Rules of mculib library makefile of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Compiler flags to use when compiling 'libgcc2.c'
+HOST_LIBGCC2_CFLAGS = -Os
+
+
+LIB1ASMSRC   = nds32/lib1asmsrc-mculib.S
+
+LIB1ASMFUNCS =   \
+	_addsub_sf   \
+	_sf_to_si    \
+	_divsi3      \
+	_divdi3      \
+	_modsi3      \
+	_moddi3      \
+	_mulsi3      \
+	_udivsi3     \
+	_udivdi3     \
+	_udivmoddi4  \
+	_umodsi3     \
+	_umoddi3     \
+	_muldi3      \
+	_addsub_df   \
+	_mul_sf      \
+	_mul_df      \
+	_div_sf      \
+	_div_df      \
+	_negate_sf   \
+	_negate_df   \
+	_sf_to_df    \
+	_df_to_sf    \
+	_df_to_si    \
+	_fixsfdi     \
+	_fixdfdi     \
+	_fixunssfsi  \
+	_fixunsdfsi  \
+	_fixunssfdi  \
+	_fixunsdfdi  \
+	_si_to_sf    \
+	_si_to_df    \
+	_floatdisf   \
+	_floatdidf   \
+	_floatunsisf \
+	_floatunsidf \
+	_floatundisf \
+	_floatundidf \
+	_compare_sf  \
+	_compare_df  \
+	_unord_sf    \
+	_unord_df
+
+# List of functions not to build from libgcc2.c.
+LIB2FUNCS_EXCLUDE = _clzsi2 _clzdi2
+
+# List of extra C and assembler files(*.S) to add to static libgcc2.
+LIB2ADD_ST += $(srcdir)/config/nds32/lib2csrc-mculib/_clzsi2.c
+LIB2ADD_ST += $(srcdir)/config/nds32/lib2csrc-mculib/_clzdi2.c
+
+# ------------------------------------------------------------------------
diff --git a/gcc-4.9/libgcc/config/nds32/t-nds32-newlib b/gcc-4.9/libgcc/config/nds32/t-nds32-newlib
new file mode 100644
index 000000000..ba6ae90dd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nds32/t-nds32-newlib
@@ -0,0 +1,34 @@
+# Rules of newlib library makefile of Andes NDS32 cpu for GNU compiler
+# Copyright (C) 2012-2014 Free Software Foundation, Inc.
+# Contributed by Andes Technology Corporation.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Compiler flags to use when compiling 'libgcc2.c'
+HOST_LIBGCC2_CFLAGS = -O2
+
+
+#LIB1ASMSRC   = nds32/lib1asmsrc-newlib.S
+#LIB1ASMFUNCS = _divsi3 _modsi3 _udivsi3 _umodsi3
+
+# List of functions not to build from libgcc2.c.
+#LIB2FUNCS_EXCLUDE = _clzsi2
+
+# List of extra C and assembler files(*.S) to add to static libgcc2.
+#LIB2ADD_ST += $(srcdir)/config/nds32/lib2csrc-newlib/_clzsi2.c
+
+# ------------------------------------------------------------------------
diff --git a/gcc-4.9/libgcc/config/nios2/crti.S b/gcc-4.9/libgcc/config/nios2/crti.S
new file mode 100644
index 000000000..f21346ce1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/crti.S
@@ -0,0 +1,85 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Jonah Graham (jgraham@altera.com).
+   Contributed by Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file just make a stack frame for the contents of the .fini and
+   .init sections.  Users may put any desired instructions in those
+   sections.
+
+   While technically any code can be put in the init and fini sections
+   most stuff will not work other than stuff which obeys the call frame
+   and ABI.  All the call-preserved registers are saved, the call clobbered
+   registers should have been saved by the code calling init and fini.
+
+   See crtstuff.c for an example of code that inserts itself in the init
+   and fini sections. 
+
+   See crt0.s for the code that calls init and fini.  */
+
+	.section	".init"
+	.align 2
+	.global	_init
+_init:
+	addi	sp, sp, -48
+	stw	ra, 44(sp)
+	stw	r23, 40(sp)
+	stw	r22, 36(sp)
+	stw	r21, 32(sp)
+	stw	r20, 28(sp)
+	stw	r19, 24(sp)
+	stw	r18, 20(sp)
+	stw	r17, 16(sp)
+	stw	r16, 12(sp)
+	stw	fp, 8(sp)
+	addi	fp, sp, 8
+#ifdef linux
+	nextpc	r22
+1:	movhi	r2, %hiadj(_gp_got - 1b)
+	addi	r2, r2, %lo(_gp_got - 1b)
+	add	r22, r22, r2
+#endif
+	
+	
+	.section	".fini"
+	.align	2
+	.global	_fini
+_fini:
+	addi	sp, sp, -48
+	stw	ra, 44(sp)
+	stw	r23, 40(sp)
+	stw	r22, 36(sp)
+	stw	r21, 32(sp)
+	stw	r20, 28(sp)
+	stw	r19, 24(sp)
+	stw	r18, 20(sp)
+	stw	r17, 16(sp)
+	stw	r16, 12(sp)
+	stw	fp, 8(sp)
+	addi	fp, sp, 8
+#ifdef linux
+	nextpc	r22
+1:	movhi	r2, %hiadj(_gp_got - 1b)
+	addi	r2, r2, %lo(_gp_got - 1b)
+	add	r22, r22, r2
+#endif
+
diff --git a/gcc-4.9/libgcc/config/nios2/crtn.S b/gcc-4.9/libgcc/config/nios2/crtn.S
new file mode 100644
index 000000000..54c9cb638
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/crtn.S
@@ -0,0 +1,56 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Jonah Graham (jgraham@altera.com).
+   Contributed by Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* This file just makes sure that the .fini and .init sections do in
+   fact return.  Users may put any desired instructions in those sections.
+   This file is the last thing linked into any executable.  */	
+
+	.section	".init"
+	ldw	ra, 44(sp)
+	ldw	r23, 40(sp)
+	ldw	r22, 36(sp)
+	ldw	r21, 32(sp)
+	ldw	r20, 28(sp)
+	ldw	r19, 24(sp)
+	ldw	r18, 20(sp)
+	ldw	r17, 16(sp)
+	ldw	r16, 12(sp)
+	ldw	fp, 8(sp)
+	addi	sp, sp, 48
+	ret
+	
+	.section	".fini"
+	ldw	ra, 44(sp)
+	ldw	r23, 40(sp)
+	ldw	r22, 36(sp)
+	ldw	r21, 32(sp)
+	ldw	r20, 28(sp)
+	ldw	r19, 24(sp)
+	ldw	r18, 20(sp)
+	ldw	r17, 16(sp)
+	ldw	r16, 12(sp)
+	ldw	fp, 8(sp)
+	addi	sp, sp, 48
+	ret
+
diff --git a/gcc-4.9/libgcc/config/nios2/lib2-divmod-hi.c b/gcc-4.9/libgcc/config/nios2/lib2-divmod-hi.c
new file mode 100644
index 000000000..be7452cb7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/lib2-divmod-hi.c
@@ -0,0 +1,117 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "lib2-nios2.h"
+
+/* 16-bit HI divide and modulo as used in Nios II.  */
+
+static UHItype
+udivmodhi4 (UHItype num, UHItype den, word_type modwanted)
+{
+  UHItype bit = 1;
+  UHItype res = 0;
+
+  while (den < num && bit && !(den & (1L<<15)))
+    {
+      den <<=1;
+      bit <<=1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>=1;
+      den >>=1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
+
+
+HItype
+__divhi3 (HItype a, HItype b)
+{
+  word_type neg = 0;
+  HItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodhi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+HItype
+__modhi3 (HItype a, HItype b)
+{
+  word_type neg = 0;
+  HItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodhi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+UHItype
+__udivhi3 (UHItype a, UHItype b)
+{
+  return udivmodhi4 (a, b, 0);
+}
+
+
+UHItype
+__umodhi3 (UHItype a, UHItype b)
+{
+  return udivmodhi4 (a, b, 1);
+}
+
diff --git a/gcc-4.9/libgcc/config/nios2/lib2-divmod.c b/gcc-4.9/libgcc/config/nios2/lib2-divmod.c
new file mode 100644
index 000000000..cb72ee0c0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/lib2-divmod.c
@@ -0,0 +1,117 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "lib2-nios2.h"
+
+/* 32-bit SI divide and modulo as used in Nios II.  */
+
+static USItype
+udivmodsi4 (USItype num, USItype den, word_type modwanted)
+{
+  USItype bit = 1;
+  USItype res = 0;
+
+  while (den < num && bit && !(den & (1L<<31)))
+    {
+      den <<=1;
+      bit <<=1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>=1;
+      den >>=1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
+
+
+SItype
+__divsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodsi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+SItype
+__modsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodsi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+
+SItype
+__udivsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 0);
+}
+
+
+SItype
+__umodsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 1);
+}
+
diff --git a/gcc-4.9/libgcc/config/nios2/lib2-divtable.c b/gcc-4.9/libgcc/config/nios2/lib2-divtable.c
new file mode 100644
index 000000000..a2d813363
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/lib2-divtable.c
@@ -0,0 +1,60 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "lib2-nios2.h"
+
+UQItype __divsi3_table[] =
+{
+  0, 0/1, 0/2, 0/3, 0/4, 0/5, 0/6, 0/7,
+    0/8, 0/9, 0/10, 0/11, 0/12, 0/13, 0/14, 0/15,
+  0, 1/1, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7,
+    1/8, 1/9, 1/10, 1/11, 1/12, 1/13, 1/14, 1/15,
+  0, 2/1, 2/2, 2/3, 2/4, 2/5, 2/6, 2/7,
+    2/8, 2/9, 2/10, 2/11, 2/12, 2/13, 2/14, 2/15,
+  0, 3/1, 3/2, 3/3, 3/4, 3/5, 3/6, 3/7,
+    3/8, 3/9, 3/10, 3/11, 3/12, 3/13, 3/14, 3/15,
+  0, 4/1, 4/2, 4/3, 4/4, 4/5, 4/6, 4/7,
+    4/8, 4/9, 4/10, 4/11, 4/12, 4/13, 4/14, 4/15,
+  0, 5/1, 5/2, 5/3, 5/4, 5/5, 5/6, 5/7,
+    5/8, 5/9, 5/10, 5/11, 5/12, 5/13, 5/14, 5/15,
+  0, 6/1, 6/2, 6/3, 6/4, 6/5, 6/6, 6/7,
+    6/8, 6/9, 6/10, 6/11, 6/12, 6/13, 6/14, 6/15,
+  0, 7/1, 7/2, 7/3, 7/4, 7/5, 7/6, 7/7,
+    7/8, 7/9, 7/10, 7/11, 7/12, 7/13, 7/14, 7/15,
+  0, 8/1, 8/2, 8/3, 8/4, 8/5, 8/6, 8/7,
+    8/8, 8/9, 8/10, 8/11, 8/12, 8/13, 8/14, 8/15,
+  0, 9/1, 9/2, 9/3, 9/4, 9/5, 9/6, 9/7,
+    9/8, 9/9, 9/10, 9/11, 9/12, 9/13, 9/14, 9/15,
+  0, 10/1, 10/2, 10/3, 10/4, 10/5, 10/6, 10/7,
+    10/8, 10/9, 10/10, 10/11, 10/12, 10/13, 10/14, 10/15,
+  0, 11/1, 11/2, 11/3, 11/4, 11/5, 11/6, 11/7,
+    11/8, 11/9, 11/10, 11/11, 11/12, 11/13, 11/14, 11/15,
+  0, 12/1, 12/2, 12/3, 12/4, 12/5, 12/6, 12/7,
+    12/8, 12/9, 12/10, 12/11, 12/12, 12/13, 12/14, 12/15,
+  0, 13/1, 13/2, 13/3, 13/4, 13/5, 13/6, 13/7,
+    13/8, 13/9, 13/10, 13/11, 13/12, 13/13, 13/14, 13/15,
+  0, 14/1, 14/2, 14/3, 14/4, 14/5, 14/6, 14/7,
+    14/8, 14/9, 14/10, 14/11, 14/12, 14/13, 14/14, 14/15,
+  0, 15/1, 15/2, 15/3, 15/4, 15/5, 15/6, 15/7,
+    15/8, 15/9, 15/10, 15/11, 15/12, 15/13, 15/14, 15/15,
+};
+
diff --git a/gcc-4.9/libgcc/config/nios2/lib2-mul.c b/gcc-4.9/libgcc/config/nios2/lib2-mul.c
new file mode 100644
index 000000000..2852727fa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/lib2-mul.c
@@ -0,0 +1,42 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "lib2-nios2.h"
+
+/* 32-bit SI multiply for Nios II.  */
+
+SItype
+__mulsi3 (SItype a, SItype b)
+{
+  SItype res = 0;
+  USItype cnt = a;
+  
+  while (cnt)
+    {
+      if (cnt & 1)
+	res += b;	  
+      b <<= 1;
+      cnt >>= 1;
+    }
+    
+  return res;
+}
diff --git a/gcc-4.9/libgcc/config/nios2/lib2-nios2.h b/gcc-4.9/libgcc/config/nios2/lib2-nios2.h
new file mode 100644
index 000000000..c582c2f95
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/lib2-nios2.h
@@ -0,0 +1,49 @@
+/* Integer arithmetic support for Altera Nios II.
+   
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+   
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+   
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+   
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef LIB2_NIOS2_H
+#define LIB2_NIOS2_H
+
+/* Types.  */
+
+typedef char QItype __attribute__ ((mode (QI)));
+typedef unsigned char UQItype __attribute__ ((mode (QI)));
+typedef short HItype __attribute__ ((mode (HI)));
+typedef unsigned short UHItype __attribute__ ((mode (HI)));
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef int word_type __attribute__ ((mode (__word__)));
+
+/* Exported functions.  */
+extern SItype __divsi3 (SItype, SItype);
+extern SItype __modsi3 (SItype, SItype);
+extern SItype __udivsi3 (SItype, SItype);
+extern SItype __umodsi3 (SItype, SItype);
+extern HItype __divhi3 (HItype, HItype);
+extern HItype __modhi3 (HItype, HItype);
+extern UHItype __udivhi3 (UHItype, UHItype);
+extern UHItype __umodhi3 (UHItype, UHItype);
+extern SItype __mulsi3 (SItype, SItype);
+
+#endif /* LIB2_NIOS2_H */
diff --git a/gcc-4.9/libgcc/config/nios2/linux-atomic.c b/gcc-4.9/libgcc/config/nios2/linux-atomic.c
new file mode 100644
index 000000000..7070176e4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/linux-atomic.c
@@ -0,0 +1,286 @@
+/* Linux-specific atomic operations for Nios II Linux.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <asm/unistd.h>
+#define EFAULT  14
+#define EBUSY   16
+#define ENOSYS  38
+
+/* We implement byte, short and int versions of each atomic operation
+   using the kernel helper defined below.  There is no support for
+   64-bit operations yet.  */
+
+/* Crash a userspace program with SIGSEV.  */
+#define ABORT_INSTRUCTION asm ("stw zero, 0(zero)")
+
+/* Kernel helper for compare-and-exchange a 32-bit value.  */
+static inline long
+__kernel_cmpxchg (int oldval, int newval, int *mem)
+{
+  register int r2 asm ("r2");
+  register int *r4 asm ("r4") = mem;
+  register int r5 asm ("r5") = oldval;
+  register int r6 asm ("r6") = newval;
+
+  /* Call the kernel provided fixed address cmpxchg helper routine.  */
+  asm volatile ("movi %0, %4\n\t"
+		"callr %0\n"
+		: "=r" (r2)
+		: "r" (r4), "r" (r5), "r" (r6), "I" (0x00001004)
+		: "ra", "memory");
+  return r2;
+}
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#ifdef __nios2_little_endian__
+#define INVERT_MASK_1 0
+#define INVERT_MASK_2 0
+#else
+#define INVERT_MASK_1 24
+#define INVERT_MASK_2 16
+#endif
+
+#define MASK_1 0xffu
+#define MASK_2 0xffffu
+
+#define FETCH_AND_OP_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_fetch_and_##OP##_4 (int *ptr, int val)				\
+  {									\
+    int failure, tmp;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return tmp;								\
+  }
+
+FETCH_AND_OP_WORD (add,   , +)
+FETCH_AND_OP_WORD (sub,   , -)
+FETCH_AND_OP_WORD (or,    , |)
+FETCH_AND_OP_WORD (and,   , &)
+FETCH_AND_OP_WORD (xor,   , ^)
+FETCH_AND_OP_WORD (nand, ~, &)
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for
+   subword-sized quantities.  */
+
+#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN)	\
+  TYPE HIDDEN								\
+  NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE val)			\
+  {									\
+    int *wordptr = (int *) ((unsigned long) ptr & ~3);			\
+    unsigned int mask, shift, oldval, newval;				\
+    int failure;							\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = ((PFX_OP (((oldval & mask) >> shift)			\
+			 INF_OP (unsigned int) val)) << shift) & mask;	\
+      newval |= oldval & ~mask;						\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (RETURN & mask) >> shift;					\
+  }
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval)
+
+#define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_##OP##_and_fetch_4 (int *ptr, int val)				\
+  {									\
+    int tmp, failure;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return PFX_OP (tmp INF_OP val);					\
+  }
+
+OP_AND_FETCH_WORD (add,   , +)
+OP_AND_FETCH_WORD (sub,   , -)
+OP_AND_FETCH_WORD (or,    , |)
+OP_AND_FETCH_WORD (and,   , &)
+OP_AND_FETCH_WORD (xor,   , ^)
+OP_AND_FETCH_WORD (nand, ~, &)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval)
+
+int HIDDEN
+__sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int actual_oldval, fail;
+    
+  while (1)
+    {
+      actual_oldval = *ptr;
+
+      if (oldval != actual_oldval)
+	return actual_oldval;
+
+      fail = __kernel_cmpxchg (actual_oldval, newval, ptr);
+  
+      if (!fail)
+	return oldval;
+    }
+}
+
+#define SUBWORD_VAL_CAS(TYPE, WIDTH)					\
+  TYPE HIDDEN								\
+  __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+				       TYPE newval)			\
+  {									\
+    int *wordptr = (int *)((unsigned long) ptr & ~3), fail;		\
+    unsigned int mask, shift, actual_oldval, actual_newval;		\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    while (1)								\
+      {									\
+	actual_oldval = *wordptr;					\
+									\
+	if (((actual_oldval & mask) >> shift) != (unsigned int) oldval)	\
+          return (actual_oldval & mask) >> shift;			\
+									\
+	actual_newval = (actual_oldval & ~mask)				\
+			| (((unsigned int) newval << shift) & mask);	\
+									\
+	fail = __kernel_cmpxchg (actual_oldval, actual_newval,		\
+				 wordptr);				\
+									\
+	if (!fail)							\
+	  return oldval;						\
+      }									\
+  }
+
+SUBWORD_VAL_CAS (unsigned short, 2)
+SUBWORD_VAL_CAS (unsigned char,  1)
+
+typedef unsigned char bool;
+
+bool HIDDEN
+__sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int failure = __kernel_cmpxchg (oldval, newval, ptr);
+  return (failure == 0);
+}
+
+#define SUBWORD_BOOL_CAS(TYPE, WIDTH)					\
+  bool HIDDEN								\
+  __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+					TYPE newval)			\
+  {									\
+    TYPE actual_oldval							\
+      = __sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval);	\
+    return (oldval == actual_oldval);					\
+  }
+
+SUBWORD_BOOL_CAS (unsigned short, 2)
+SUBWORD_BOOL_CAS (unsigned char,  1)
+
+int HIDDEN
+__sync_lock_test_and_set_4 (int *ptr, int val)
+{
+  int failure, oldval;
+
+  do {
+    oldval = *ptr;
+    failure = __kernel_cmpxchg (oldval, val, ptr);
+  } while (failure != 0);
+
+  return oldval;
+}
+
+#define SUBWORD_TEST_AND_SET(TYPE, WIDTH)				\
+  TYPE HIDDEN								\
+  __sync_lock_test_and_set_##WIDTH (TYPE *ptr, TYPE val)		\
+  {									\
+    int failure;							\
+    unsigned int oldval, newval, shift, mask;				\
+    int *wordptr = (int *) ((unsigned long) ptr & ~3);			\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = (oldval & ~mask)						\
+	       | (((unsigned int) val << shift) & mask);		\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (oldval & mask) >> shift;					\
+  }
+
+SUBWORD_TEST_AND_SET (unsigned short, 2)
+SUBWORD_TEST_AND_SET (unsigned char,  1)
+
+#define SYNC_LOCK_RELEASE(TYPE, WIDTH)					\
+  void HIDDEN								\
+  __sync_lock_release_##WIDTH (TYPE *ptr)				\
+  {									\
+    /* All writes before this point must be seen before we release	\
+       the lock itself.  */						\
+    __builtin_sync ();							\
+    *ptr = 0;								\
+  }
+
+SYNC_LOCK_RELEASE (int,   4)
+SYNC_LOCK_RELEASE (short, 2)
+SYNC_LOCK_RELEASE (char,  1)
diff --git a/gcc-4.9/libgcc/config/nios2/linux-unwind.h b/gcc-4.9/libgcc/config/nios2/linux-unwind.h
new file mode 100644
index 000000000..92ff1f629
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/linux-unwind.h
@@ -0,0 +1,106 @@
+/* DWARF2 EH unwinding support for Nios II Linux.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef inhibit_libc
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.
+   The corresponding bits in the Linux kernel are in
+   arch/nios2/kernel/signal.c.  */
+
+#include <signal.h>
+#include <asm/unistd.h>
+
+/* Exactly the same layout as the kernel structures, unique names.  */
+struct nios2_mcontext {
+  int version;
+  int gregs[32];
+};
+
+struct nios2_ucontext {
+  unsigned long uc_flags;
+  struct ucontext *uc_link;
+  stack_t uc_stack;
+  struct nios2_mcontext uc_mcontext;
+  sigset_t uc_sigmask;	/* mask last for extensibility */
+};
+
+#define MD_FALLBACK_FRAME_STATE_FOR nios2_fallback_frame_state
+
+static _Unwind_Reason_Code
+nios2_fallback_frame_state (struct _Unwind_Context *context,
+			    _Unwind_FrameState *fs)
+{
+  u_int32_t *pc = (u_int32_t *) context->ra;
+  _Unwind_Ptr new_cfa;
+
+  /* The expected sequence of instructions is:
+       movi r2,(rt_sigreturn)
+       trap
+     Check for the trap first.  */
+  if (pc[1] != 0x003b683a)
+    return _URC_END_OF_STACK;
+
+#define NIOS2_REG(NUM,NAME)						\
+  (fs->regs.reg[NUM].how = REG_SAVED_OFFSET,				\
+   fs->regs.reg[NUM].loc.offset = (_Unwind_Ptr)&(regs->NAME) - new_cfa)
+
+  if (pc[0] == (0x00800004 | (__NR_rt_sigreturn << 6)))
+    {
+      struct rt_sigframe {
+	char retcode[12];
+	siginfo_t info;
+	struct nios2_ucontext uc;
+      } *rt_ = context->ra;
+      struct nios2_mcontext *regs = &rt_->uc.uc_mcontext;
+      int i;
+
+      /* MCONTEXT_VERSION is defined to 2 in the kernel.  */
+      if (regs->version != 2)
+	return _URC_END_OF_STACK;
+
+      /* The CFA is the user's incoming stack pointer value.  */
+      new_cfa = (_Unwind_Ptr)regs->gregs[28];
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+      fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
+
+      /* The sequential registers.  */
+      for (i = 1; i < 24; i++)
+	NIOS2_REG (i, gregs[i-1]);
+      
+      /* The random registers.  The kernel stores these in a funny order
+	 in the gregs array.  */
+      NIOS2_REG (RA_REGNO, gregs[23]);
+      NIOS2_REG (FP_REGNO, gregs[24]);
+      NIOS2_REG (GP_REGNO, gregs[25]);
+      NIOS2_REG (EA_REGNO, gregs[27]);
+      
+      fs->retaddr_column = EA_REGNO;
+      fs->signal_frame = 1;
+      
+      return _URC_NO_REASON;
+    }
+#undef NIOS2_REG
+  return _URC_END_OF_STACK;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/nios2/sfp-machine.h b/gcc-4.9/libgcc/config/nios2/sfp-machine.h
new file mode 100644
index 000000000..9e7c60b3c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/sfp-machine.h
@@ -0,0 +1,81 @@
+/* Soft-FP definitions for Altera Nios II.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#ifdef __nios2_little_endian__
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#else
+#define __BYTE_ORDER __BIG_ENDIAN
+#endif
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/nios2/t-linux b/gcc-4.9/libgcc/config/nios2/t-linux
new file mode 100644
index 000000000..1fa581e28
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/t-linux
@@ -0,0 +1,7 @@
+# Soft-float functions go in glibc only, to facilitate the possible
+# future addition of exception and rounding mode support integrated
+# with <fenv.h>.
+
+LIB2FUNCS_EXCLUDE = _floatdidf _floatdisf _fixunsdfsi _fixunssfsi \
+  _fixunsdfdi _fixdfdi _fixunssfdi _fixsfdi _floatundidf _floatundisf
+LIB2ADD += $(srcdir)/config/nios2/linux-atomic.c
diff --git a/gcc-4.9/libgcc/config/nios2/t-nios2 b/gcc-4.9/libgcc/config/nios2/t-nios2
new file mode 100644
index 000000000..7a81a7f02
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/t-nios2
@@ -0,0 +1,8 @@
+LIB2ADD += $(srcdir)/config/nios2/lib2-divmod.c \
+	   $(srcdir)/config/nios2/lib2-divmod-hi.c \
+	   $(srcdir)/config/nios2/lib2-divtable.c \
+	   $(srcdir)/config/nios2/lib2-mul.c \
+	   $(srcdir)/config/nios2/tramp.c
+
+# Disable use of GP-relative addressing in startup code.
+CRTSTUFF_T_CFLAGS += -mno-gpopt
diff --git a/gcc-4.9/libgcc/config/nios2/tramp.c b/gcc-4.9/libgcc/config/nios2/tramp.c
new file mode 100644
index 000000000..78661e237
--- /dev/null
+++ b/gcc-4.9/libgcc/config/nios2/tramp.c
@@ -0,0 +1,61 @@
+/* Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   Contributed by Altera and Mentor Graphics, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Set up trampolines.
+   R12 is the static chain register.
+   R2 is AT, the assembler temporary.
+   The trampoline code looks like:
+	movhi	r12,%hi(chain)
+	ori	r12,%lo(chain)
+	movhi	r2,%hi(fn)
+	ori	r2,%lo(fn)
+	jmp	r2
+*/
+
+#define SC_REGNO 12
+
+#define MOVHI(reg,imm16) \
+  (((reg) << 22) | ((imm16) << 6) | 0x34)
+#define ORI(reg,imm16) \
+  (((reg) << 27) | ((reg) << 22) | ((imm16) << 6) | 0x14)
+#define JMP(reg) \
+  (((reg) << 27) | (0x0d << 11) | 0x3a)
+
+void
+__trampoline_setup (unsigned int *addr, void *fnptr, void *chainptr)
+{
+  unsigned int fn = (unsigned int) fnptr;
+  unsigned int chain = (unsigned int) chainptr;
+  int i;
+
+  addr[0] = MOVHI (SC_REGNO, ((chain >> 16) & 0xffff));
+  addr[1] = ORI (SC_REGNO, (chain & 0xffff));
+  addr[2] = MOVHI (2, ((fn >> 16) & 0xffff));
+  addr[3] = ORI (2, (fn & 0xffff));
+  addr[4] = JMP (2);
+
+  /* Flush the caches.
+     See Example 9-4 in the Nios II Software Developer's Handbook.  */
+  for (i = 0; i < 5; i++)
+    asm volatile ("flushd 0(%0); flushi %0" :: "r"(addr + i) : "memory");
+  asm volatile ("flushp" ::: "memory");
+}
diff --git a/gcc-4.9/libgcc/config/no-sfp-machine.h b/gcc-4.9/libgcc/config/no-sfp-machine.h
new file mode 100644
index 000000000..8f7341d4f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/no-sfp-machine.h
@@ -0,0 +1 @@
+/* Dummy sfp-machine.h header for targets that don't need one.  */
diff --git a/gcc-4.9/libgcc/config/no-unwind.h b/gcc-4.9/libgcc/config/no-unwind.h
new file mode 100644
index 000000000..0ecd78a60
--- /dev/null
+++ b/gcc-4.9/libgcc/config/no-unwind.h
@@ -0,0 +1,2 @@
+/* Dummy header for targets without a definition of
+   MD_FALLBACK_FRAME_STATE_FOR.  */
diff --git a/gcc-4.9/libgcc/config/pa/fptr.c b/gcc-4.9/libgcc/config/pa/fptr.c
new file mode 100644
index 000000000..347f636dd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/fptr.c
@@ -0,0 +1,131 @@
+/* Subroutine for function pointer canonicalization on PA-RISC with ELF32.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by John David Anglin (dave.anglin@nrc.ca).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* WARNING: The code is this function depends on internal and undocumented
+   details of the GNU linker and dynamic loader as implemented for parisc
+   linux.  */
+
+/* This MUST match the defines sysdeps/hppa/dl-machine.h and
+   bfd/elf32-hppa.c.  */
+#define GOT_FROM_PLT_STUB (4*4)
+
+/* List of byte offsets in _dl_runtime_resolve to search for "bl" branches.
+   The first "bl" branch instruction found MUST be a call to fixup.  See
+   the define for TRAMPOLINE_TEMPLATE in sysdeps/hppa/dl-machine.h.  If
+   the trampoline template is changed, the list must be appropriately
+   updated.  The offset of -4 allows for a magic branch at the start of
+   the template should it be necessary to change the current branch
+   position.  */
+#define NOFFSETS 2
+static int fixup_branch_offset[NOFFSETS] = { 32, -4 };
+
+#define GET_FIELD(X, FROM, TO) \
+  ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+#define SIGN_EXTEND(VAL,BITS) \
+  ((int) ((VAL) >> ((BITS) - 1) ? (-1 << (BITS)) | (VAL) : (VAL)))
+
+struct link_map;
+typedef int (*fptr_t) (void);
+typedef int (*fixup_t) (struct link_map *, unsigned int);
+extern unsigned int _GLOBAL_OFFSET_TABLE_;
+
+/* __canonicalize_funcptr_for_compare must be hidden so that it is not
+   placed in the dynamic symbol table.  Like millicode functions, it
+   must be linked into all binaries in order access the got table of 
+   that binary.  However, we don't use the millicode calling convention
+   and the routine must be a normal function so that it can be compiled
+   as pic code.  */
+unsigned int __canonicalize_funcptr_for_compare (fptr_t)
+      __attribute__ ((visibility ("hidden")));
+
+unsigned int
+__canonicalize_funcptr_for_compare (fptr_t fptr)
+{
+  static unsigned int fixup_plabel[2];
+  static fixup_t fixup;
+  unsigned int *plabel, *got;
+
+  /* -1 and page 0 are special.  -1 is used in crtend to mark the end of
+     a list of function pointers.  Also return immediately if the plabel
+     bit is not set in the function pointer.  In this case, the function
+     pointer points directly to the function.  */
+  if ((int) fptr == -1 || (unsigned int) fptr < 4096 || !((int) fptr & 2))
+    return (unsigned int) fptr;
+
+  /* The function pointer points to a function descriptor (plabel).  If
+     the plabel hasn't been resolved, the first word of the plabel points
+     to the entry of the PLT stub just before the global offset table.
+     The second word in the plabel contains the relocation offset for the
+     function.  */
+  plabel = (unsigned int *) ((unsigned int) fptr & ~3);
+  got = (unsigned int *) (plabel[0] + GOT_FROM_PLT_STUB);
+
+  /* Return the address of the function if the plabel has been resolved.  */
+  if (got !=  &_GLOBAL_OFFSET_TABLE_)
+    return plabel[0];
+
+  /* Initialize our plabel for calling fixup if we haven't done so already.
+     This code needs to be thread safe but we don't have to be too careful
+     as the result is invariant.  */
+  if (!fixup)
+    {
+      int i;
+      unsigned int *iptr;
+
+      /* Find the first "bl" branch in the offset search list.  This is a
+	 call to fixup or a magic branch to fixup at the beginning of the
+	 trampoline template.  The fixup function does the actual runtime
+	 resolution of function descriptors.  We only look for "bl" branches
+	 with a 17-bit pc-relative displacement.  */
+      for (i = 0; i < NOFFSETS; i++)
+	{
+	  iptr = (unsigned int *) (got[-2] + fixup_branch_offset[i]);
+	  if ((*iptr & 0xfc00e000) == 0xe8000000)
+	    break;
+	}
+
+      /* This should not happen... */
+      if (i == NOFFSETS)
+	return ~0;
+
+      /* Extract the 17-bit displacement from the instruction.  */
+      iptr += SIGN_EXTEND (GET_FIELD (*iptr, 19, 28) |
+			   GET_FIELD (*iptr, 29, 29) << 10 |
+			   GET_FIELD (*iptr, 11, 15) << 11 |
+			   GET_FIELD (*iptr, 31, 31) << 16, 17);
+
+      /* Build a plabel for an indirect call to fixup.  */
+      fixup_plabel[0] = (unsigned int) iptr + 8;  /* address of fixup */
+      fixup_plabel[1] = got[-1];		  /* ltp for fixup */
+      fixup = (fixup_t) ((int) fixup_plabel | 3);
+    }
+
+  /* Call fixup to resolve the function address.  got[1] contains the
+     link_map pointer and plabel[1] the relocation offset.  */
+  fixup ((struct link_map *) got[1], plabel[1]);
+
+  return plabel[0];
+}
diff --git a/gcc-4.9/libgcc/config/pa/gthr-dce.h b/gcc-4.9/libgcc/config/pa/gthr-dce.h
new file mode 100644
index 000000000..45c9a3e13
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/gthr-dce.h
@@ -0,0 +1,568 @@
+/* Threads compatibility routines for libgcc2 and libobjc.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_DCE_H
+#define GCC_GTHR_DCE_H
+
+/* If _DCE_THREADS is not defined, then we're building the single
+   threaded version of the libraries and do not want to reference
+   anything related to pthreads or dce.  */
+#ifndef _DCE_THREADS
+#include "gthr-single.h"
+#else
+/* DCE threads interface.
+   DCE threads are based on POSIX threads draft 4, and many things
+   have changed since then.  */
+
+/* Make sure CONST_CAST2 (original in system.h) is defined.  */
+#ifndef CONST_CAST2
+#ifdef __cplusplus
+#define CONST_CAST2(TOTYPE,FROMTYPE,X) (const_cast<TOTYPE> (X))
+#else
+#define CONST_CAST2(TOTYPE,FROMTYPE,X) ((__extension__(union {FROMTYPE _q; TOTYPE _nq;})(X))._nq)
+#endif
+#endif
+
+#define __GTHREADS 1
+
+#include <pthread.h>
+
+typedef pthread_key_t __gthread_key_t;
+typedef pthread_once_t __gthread_once_t;
+typedef pthread_mutex_t __gthread_mutex_t;
+typedef pthread_mutex_t __gthread_recursive_mutex_t;
+
+#define __GTHREAD_ONCE_INIT pthread_once_init
+
+#define __GTHREAD_MUTEX_INIT_FUNCTION __gthread_mutex_init_function
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION __gthread_recursive_mutex_init_function
+
+#define __GTHREAD_MUTEX_INIT_DEFAULT pthread_once_init
+
+#if SUPPORTS_WEAK && GTHREAD_USE_WEAK
+# define __gthrw(name) \
+  static __typeof(name) __gthrw_ ## name __attribute__ ((__weakref__(#name)));
+# define __gthrw_(name) __gthrw_ ## name
+#else
+# define __gthrw(name)
+# define __gthrw_(name) name
+#endif
+
+__gthrw(pthread_once)
+__gthrw(pthread_keycreate)
+__gthrw(pthread_getspecific)
+__gthrw(pthread_setspecific)
+__gthrw(pthread_create)
+__gthrw(pthread_mutex_init)
+__gthrw(pthread_mutex_destroy)
+__gthrw(pthread_mutex_lock)
+__gthrw(pthread_mutex_trylock)
+__gthrw(pthread_mutex_unlock)
+__gthrw(pthread_mutexattr_create)
+__gthrw(pthread_mutexattr_setkind_np)
+__gthrw(pthread_mutexattr_delete)
+
+#ifdef _LIBOBJC
+/* Objective-C.  */
+__gthrw(pthread_cond_broadcast)
+__gthrw(pthread_cond_destroy)
+__gthrw(pthread_cond_init)
+__gthrw(pthread_cond_signal)
+__gthrw(pthread_cond_wait)
+__gthrw(pthread_exit)
+
+#ifdef pthread_getunique_np
+# define __gthrw_pthread_getunique_np pthread_getunique_np
+#else
+__gthrw(pthread_getunique_np)
+# define __gthrw_pthread_getunique_np __gthrw_(pthread_getunique_np)
+#endif
+
+__gthrw(pthread_mutex_destroy)
+__gthrw(pthread_self)
+__gthrw(pthread_yield)
+#endif
+
+#if SUPPORTS_WEAK && GTHREAD_USE_WEAK
+
+static inline int
+__gthread_active_p (void)
+{
+  static void *const __gthread_active_ptr = (void *) &__gthrw_(pthread_create);
+  return __gthread_active_ptr != 0;
+}
+
+#else /* not SUPPORTS_WEAK */
+
+static inline int
+__gthread_active_p (void)
+{
+  return 1;
+}
+
+#endif /* SUPPORTS_WEAK */
+
+#ifdef _LIBOBJC
+
+/* Key structure for maintaining thread specific storage */
+static pthread_key_t _objc_thread_storage;
+
+/* Thread local storage for a single thread */
+static void *thread_local_storage = NULL;
+
+/* Backend initialization functions */
+
+/* Initialize the threads subsystem.  */
+static inline int
+__gthread_objc_init_thread_system (void)
+{
+  if (__gthread_active_p ())
+    /* Initialize the thread storage key.  */
+    return __gthrw_(pthread_keycreate) (&_objc_thread_storage, NULL);
+  else
+    return -1;
+}
+
+/* Close the threads subsystem.  */
+static inline int
+__gthread_objc_close_thread_system (void)
+{
+  if (__gthread_active_p ())
+    return 0;
+  else
+    return -1;
+}
+
+/* Backend thread functions */
+
+/* Create a new thread of execution.  */
+static inline objc_thread_t
+__gthread_objc_thread_detach (void (*func)(void *), void *arg)
+{
+  objc_thread_t thread_id;
+  pthread_t new_thread_handle;
+
+  if (!__gthread_active_p ())
+    return NULL;
+
+  if (!(__gthrw_(pthread_create) (&new_thread_handle, pthread_attr_default,
+			(void *) func, arg)))
+    {
+      /* ??? May not work! (64bit) */
+      thread_id = *(objc_thread_t *) &new_thread_handle;
+      pthread_detach (&new_thread_handle); /* Fully detach thread.  */
+    }
+  else
+    thread_id = NULL;
+
+  return thread_id;
+}
+
+/* Set the current thread's priority.  */
+static inline int
+__gthread_objc_thread_set_priority (int priority)
+{
+  int sys_priority = 0;
+
+  if (!__gthread_active_p ())
+    return -1;
+
+  switch (priority)
+    {
+    case OBJC_THREAD_INTERACTIVE_PRIORITY:
+      sys_priority = (PRI_FG_MIN_NP + PRI_FG_MAX_NP) / 2;
+      break;
+    default:
+    case OBJC_THREAD_BACKGROUND_PRIORITY:
+      sys_priority = (PRI_BG_MIN_NP + PRI_BG_MAX_NP) / 2;
+      break;
+    case OBJC_THREAD_LOW_PRIORITY:
+      sys_priority = (PRI_BG_MIN_NP + PRI_BG_MAX_NP) / 2;
+      break;
+    }
+
+  /* Change the priority.  */
+  if (pthread_setprio (__gthrw_(pthread_self) (), sys_priority) >= 0)
+    return 0;
+  else
+    /* Failed */
+    return -1;
+}
+
+/* Return the current thread's priority.  */
+static inline int
+__gthread_objc_thread_get_priority (void)
+{
+  int sys_priority;
+
+  if (__gthread_active_p ())
+    {
+      if ((sys_priority = pthread_getprio (__gthrw_(pthread_self) ())) >= 0)
+	{
+	  if (sys_priority >= PRI_FG_MIN_NP
+	      && sys_priority <= PRI_FG_MAX_NP)
+	    return OBJC_THREAD_INTERACTIVE_PRIORITY;
+	  if (sys_priority >= PRI_BG_MIN_NP
+	      && sys_priority <= PRI_BG_MAX_NP)
+	    return OBJC_THREAD_BACKGROUND_PRIORITY;
+	  return OBJC_THREAD_LOW_PRIORITY;
+	}
+
+      /* Failed */
+      return -1;
+    }
+  else
+    return OBJC_THREAD_INTERACTIVE_PRIORITY;
+}
+
+/* Yield our process time to another thread.  */
+static inline void
+__gthread_objc_thread_yield (void)
+{
+  if (__gthread_active_p ())
+    __gthrw_(pthread_yield) ();
+}
+
+/* Terminate the current thread.  */
+static inline int
+__gthread_objc_thread_exit (void)
+{
+  if (__gthread_active_p ())
+    /* exit the thread */
+    __gthrw_(pthread_exit) (&__objc_thread_exit_status);
+
+  /* Failed if we reached here */
+  return -1;
+}
+
+/* Returns an integer value which uniquely describes a thread.  */
+static inline objc_thread_t
+__gthread_objc_thread_id (void)
+{
+  if (__gthread_active_p ())
+    {
+      pthread_t self = __gthrw_(pthread_self) ();
+
+      return (objc_thread_t) __gthrw_pthread_getunique_np (&self);
+    }
+  else
+    return (objc_thread_t) 1;
+}
+
+/* Sets the thread's local storage pointer.  */
+static inline int
+__gthread_objc_thread_set_data (void *value)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_setspecific) (_objc_thread_storage, value);
+  else
+    {
+      thread_local_storage = value;
+      return 0;
+    }
+}
+
+/* Returns the thread's local storage pointer.  */
+static inline void *
+__gthread_objc_thread_get_data (void)
+{
+  void *value = NULL;
+
+  if (__gthread_active_p ())
+    {
+      if (!(__gthrw_(pthread_getspecific) (_objc_thread_storage, &value)))
+	return value;
+
+      return NULL;
+    }
+  else
+    return thread_local_storage;
+}
+
+/* Backend mutex functions */
+
+/* Allocate a mutex.  */
+static inline int
+__gthread_objc_mutex_allocate (objc_mutex_t mutex)
+{
+  if (__gthread_active_p ())
+    {
+      mutex->backend = objc_malloc (sizeof (pthread_mutex_t));
+
+      if (__gthrw_(pthread_mutex_init) ((pthread_mutex_t *) mutex->backend,
+			      pthread_mutexattr_default))
+	{
+	  objc_free (mutex->backend);
+	  mutex->backend = NULL;
+	  return -1;
+	}
+    }
+
+  return 0;
+}
+
+/* Deallocate a mutex.  */
+static inline int
+__gthread_objc_mutex_deallocate (objc_mutex_t mutex)
+{
+  if (__gthread_active_p ())
+    {
+      if (__gthrw_(pthread_mutex_destroy) ((pthread_mutex_t *) mutex->backend))
+	return -1;
+
+      objc_free (mutex->backend);
+      mutex->backend = NULL;
+    }
+
+  return 0;
+}
+
+/* Grab a lock on a mutex.  */
+static inline int
+__gthread_objc_mutex_lock (objc_mutex_t mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_lock) ((pthread_mutex_t *) mutex->backend);
+  else
+    return 0;
+}
+
+/* Try to grab a lock on a mutex.  */
+static inline int
+__gthread_objc_mutex_trylock (objc_mutex_t mutex)
+{
+  if (__gthread_active_p ()
+      && __gthrw_(pthread_mutex_trylock) ((pthread_mutex_t *) mutex->backend) != 1)
+    return -1;
+
+  return 0;
+}
+
+/* Unlock the mutex */
+static inline int
+__gthread_objc_mutex_unlock (objc_mutex_t mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_unlock) ((pthread_mutex_t *) mutex->backend);
+  else
+    return 0;
+}
+
+/* Backend condition mutex functions */
+
+/* Allocate a condition.  */
+static inline int
+__gthread_objc_condition_allocate (objc_condition_t condition
+				   __attribute__ ((__unused__)))
+{
+  if (__gthread_active_p ())
+    /* Unimplemented.  */
+    return -1;
+  else
+    return 0;
+}
+
+/* Deallocate a condition.  */
+static inline int
+__gthread_objc_condition_deallocate (objc_condition_t condition
+				     __attribute__ ((__unused__)))
+{
+  if (__gthread_active_p ())
+    /* Unimplemented.  */
+    return -1;
+  else
+    return 0;
+}
+
+/* Wait on the condition */
+static inline int
+__gthread_objc_condition_wait (objc_condition_t condition
+			       __attribute__ ((__unused__)),
+			       objc_mutex_t mutex __attribute__ ((__unused__)))
+{
+  if (__gthread_active_p ())
+    /* Unimplemented.  */
+    return -1;
+  else
+    return 0;
+}
+
+/* Wake up all threads waiting on this condition.  */
+static inline int
+__gthread_objc_condition_broadcast (objc_condition_t condition
+				    __attribute__ ((__unused__)))
+{
+  if (__gthread_active_p ())
+    /* Unimplemented.  */
+    return -1;
+  else
+    return 0;
+}
+
+/* Wake up one thread waiting on this condition.  */
+static inline int
+__gthread_objc_condition_signal (objc_condition_t condition
+				 __attribute__ ((__unused__)))
+{
+  if (__gthread_active_p ())
+    /* Unimplemented.  */
+    return -1;
+  else
+    return 0;
+}
+
+#else /* _LIBOBJC */
+
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_once) (__once, __func);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_key_create (__gthread_key_t *__key, void (*__dtor) (void *))
+{
+  return __gthrw_(pthread_keycreate) (__key, __dtor);
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key __attribute__ ((__unused__)))
+{
+  /* Operation is not supported.  */
+  return -1;
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  void *__ptr;
+  if (__gthrw_(pthread_getspecific) (__key, &__ptr) == 0)
+    return __ptr;
+  else
+    return 0;
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  return __gthrw_(pthread_setspecific)
+    (__key, CONST_CAST2(void *, const void *, __ptr));
+}
+
+static inline void
+__gthread_mutex_init_function (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    __gthrw_(pthread_mutex_init) (__mutex, pthread_mutexattr_default);
+}
+
+static inline int
+__gthread_mutex_destroy (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_destroy) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_lock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_trylock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    return __gthrw_(pthread_mutex_unlock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__gthread_active_p ())
+    {
+      pthread_mutexattr_t __attr;
+      int __r;
+
+      __r = __gthrw_(pthread_mutexattr_create) (&__attr);
+      if (!__r)
+	__r = __gthrw_(pthread_mutexattr_setkind_np) (&__attr,
+						      MUTEX_RECURSIVE_NP);
+      if (!__r)
+	__r = __gthrw_(pthread_mutex_init) (__mutex, __attr);
+      if (!__r)
+	__r = __gthrw_(pthread_mutexattr_delete) (&__attr);
+      return __r;
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_lock (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_trylock (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_unlock (__mutex);
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_destroy (__mutex);
+}
+
+#endif /* _LIBOBJC */
+
+#endif
+#endif /* ! GCC_GTHR_DCE_H */
diff --git a/gcc-4.9/libgcc/config/pa/hpux-unwind.h b/gcc-4.9/libgcc/config/pa/hpux-unwind.h
new file mode 100644
index 000000000..567ddd447
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/hpux-unwind.h
@@ -0,0 +1,361 @@
+/* DWARF2 EH unwinding support for PA HP-UX.
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+/* Don't use this if inhibit_libc is set.
+   The build for this target will fail trying to include missing headers. */
+#ifndef inhibit_libc
+#include <signal.h>
+#include <sys/ucontext.h>
+#include <unistd.h>
+
+/* FIXME: We currently ignore the high halves of general, space and
+   control registers on PA 2.0 machines for applications using the
+   32-bit runtime.  We don't restore space registers or the floating
+   point status registers.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR pa_fallback_frame_state
+
+/* HP-UX 10.X doesn't define GetSSReg.  */
+#ifndef GetSSReg
+#define GetSSReg(ssp, ss_reg) \
+  ((UseWideRegs (ssp))							\
+   ? (ssp)->ss_wide.ss_32.ss_reg ## _lo					\
+   : (ssp)->ss_narrow.ss_reg)
+#endif
+
+#if TARGET_64BIT
+#define GetSSRegAddr(ssp, ss_reg) ((long) &((ssp)->ss_wide.ss_64.ss_reg))
+#else
+#define GetSSRegAddr(ssp, ss_reg) \
+  ((UseWideRegs (ssp))							\
+   ? (long) &((ssp)->ss_wide.ss_32.ss_reg ## _lo)			\
+   : (long) &((ssp)->ss_narrow.ss_reg))
+#endif
+
+#define UPDATE_FS_FOR_SAR(FS, N) \
+  (FS)->regs.reg[N].how = REG_SAVED_OFFSET;				\
+  (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_cr11) - new_cfa
+
+#define UPDATE_FS_FOR_GR(FS, GRN, N) \
+  (FS)->regs.reg[N].how = REG_SAVED_OFFSET;				\
+  (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_gr##GRN) - new_cfa
+
+#define UPDATE_FS_FOR_FR(FS, FRN, N) \
+  (FS)->regs.reg[N].how = REG_SAVED_OFFSET;				\
+  (FS)->regs.reg[N].loc.offset = (long) &(mc->ss_fr##FRN) - new_cfa;
+
+#define UPDATE_FS_FOR_PC(FS, N) \
+  (FS)->regs.reg[N].how = REG_SAVED_OFFSET;				\
+  (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_pcoq_head) - new_cfa
+
+/* Extract bit field from word using HP's numbering (MSB = 0).  */
+#define GET_FIELD(X, FROM, TO) \
+  ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+
+static inline int
+sign_extend (int x, int len)
+{
+  int signbit = (1 << (len - 1));
+  int mask = (signbit << 1) - 1;
+  return ((x & mask) ^ signbit) - signbit;
+}
+
+/* Extract a 17-bit signed constant from branch instructions.  */
+static inline int
+extract_17 (unsigned word)
+{
+  return sign_extend (GET_FIELD (word, 19, 28)
+		      | GET_FIELD (word, 29, 29) << 10
+		      | GET_FIELD (word, 11, 15) << 11
+		      | (word & 0x1) << 16, 17);
+}
+
+/* Extract a 22-bit signed constant from branch instructions.  */
+static inline int
+extract_22 (unsigned word)
+{
+  return sign_extend (GET_FIELD (word, 19, 28)
+		      | GET_FIELD (word, 29, 29) << 10
+		      | GET_FIELD (word, 11, 15) << 11
+		      | GET_FIELD (word, 6, 10) << 16
+		      | (word & 0x1) << 21, 22);
+}
+
+static _Unwind_Reason_Code
+pa_fallback_frame_state (struct _Unwind_Context *context,
+			 _Unwind_FrameState *fs)
+{
+  static long cpu;
+  unsigned int *pc = (unsigned int *) context->ra;
+
+  if (pc == 0)
+    return _URC_END_OF_STACK;
+
+  /* Check for relocation of the return value.  */
+  if (!TARGET_64BIT
+      && *(pc + 0) == 0x2fd01224		/* fstd,ma fr4,8(sp) */
+      && *(pc + 1) == 0x0fd9109d		/* ldw -4(sp),ret1 */
+      && *(pc + 2) == 0x0fd130bc)		/* ldw,mb -8(sp),ret0 */
+    pc += 3;
+  else if (!TARGET_64BIT
+	   && *(pc + 0) == 0x27d01224		/* fstw,ma fr4,8(sp) */
+	   && *(pc + 1) == 0x0fd130bc)		/* ldw,mb -8(sp),ret0 */
+    pc += 2;
+  else if (!TARGET_64BIT
+	   && *(pc + 0) == 0x0fdc12b0		/* stw,ma ret0,8(sp) */
+	   && *(pc + 1) == 0x0fdd1299		/* stw ret1,-4(sp) */
+	   && *(pc + 2) == 0x2fd13024)		/* fldd,mb -8(sp),fr4 */
+    pc += 3;
+  else if (!TARGET_64BIT
+	   && *(pc + 0) == 0x0fdc12b0		/* stw,ma ret0,8(sp) */
+	   && *(pc + 1) == 0x27d13024)		/* fldw,mb -8(sp),fr4 */
+    pc += 2;
+
+  /* Check if the return address points to an export stub (PA 1.1 or 2.0).  */
+  if ((!TARGET_64BIT
+       && *(pc + 0) == 0x4bc23fd1		/* ldw -18(sp),rp */
+       && *(pc + 1) == 0x004010a1		/* ldsid (rp),r1 */
+       && *(pc + 2) == 0x00011820		/* mtsp r1,sr0 */
+       && *(pc + 3) == 0xe0400002)		/* be,n 0(sr0,rp) */
+      ||
+      (!TARGET_64BIT
+       && *(pc + 0) == 0x4bc23fd1		/* ldw -18(sp),rp */
+       && *(pc + 1) == 0xe840d002))		/* bve,n (rp) */
+    {
+      fs->regs.cfa_how    = CFA_REG_OFFSET;
+      fs->regs.cfa_reg    = 30;
+      fs->regs.cfa_offset = 0;
+
+      fs->retaddr_column = 0;
+      fs->regs.reg[0].how = REG_SAVED_OFFSET;
+      fs->regs.reg[0].loc.offset = -24;
+
+      /* Update context to describe the stub frame.  */
+      uw_update_context (context, fs);
+
+      /* Set up fs to describe the FDE for the caller of this stub.  */
+      return uw_frame_state_for (context, fs);
+    }
+  /* Check if the return address points to a relocation stub.  */
+  else if (!TARGET_64BIT
+	   && *(pc + 0) == 0x0fd11082		/* ldw -8(sp),rp */
+	   && (*(pc + 1) == 0xe840c002		/* bv,n r0(rp) */
+	       || *(pc + 1) == 0xe840d002))	/* bve,n (rp) */
+    {
+      fs->regs.cfa_how    = CFA_REG_OFFSET;
+      fs->regs.cfa_reg    = 30;
+      fs->regs.cfa_offset = 0;
+
+      fs->retaddr_column = 0;
+      fs->regs.reg[0].how = REG_SAVED_OFFSET;
+      fs->regs.reg[0].loc.offset = -8;
+
+      /* Update context to describe the stub frame.  */
+      uw_update_context (context, fs);
+
+      /* Set up fs to describe the FDE for the caller of this stub.  */
+      return uw_frame_state_for (context, fs);
+    }
+
+  /* Check if the return address is an export stub as signal handlers
+     may return via an export stub.  */
+  if (!TARGET_64BIT
+      && (*pc & 0xffe0e002) == 0xe8400000	/* bl x,r2 */
+      && *(pc + 1) == 0x08000240		/* nop */
+      && *(pc + 2) == 0x4bc23fd1		/* ldw -18(sp),rp */
+      && *(pc + 3) == 0x004010a1		/* ldsid (rp),r1 */
+      && *(pc + 4) == 0x00011820		/* mtsp r1,sr0 */
+      && *(pc + 5) == 0xe0400002)		/* be,n 0(sr0,rp) */
+    /* Extract target address from PA 1.x 17-bit branch.  */
+    pc += extract_17 (*pc) + 2;
+  else if (!TARGET_64BIT
+	   && (*pc & 0xfc00e002) == 0xe800a000	/* b,l x,r2 */
+	   && *(pc + 1) == 0x08000240		/* nop */
+	   && *(pc + 2) == 0x4bc23fd1		/* ldw -18(sp),rp */
+	   && *(pc + 3) == 0xe840d002)		/* bve,n (rp) */
+    /* Extract target address from PA 2.0 22-bit branch.  */
+    pc += extract_22 (*pc) + 2;
+
+  /* Now check if the return address is one of the signal handler
+     returns, _sigreturn or _sigsetreturn.  */
+  if ((TARGET_64BIT
+       && *(pc + 0)  == 0x53db3f51		/* ldd -58(sp),dp */
+       && *(pc + 8)  == 0x34160116		/* ldi 8b,r22 */
+       && *(pc + 9)  == 0x08360ac1		/* shladd,l r22,3,r1,r1 */
+       && *(pc + 10) == 0x0c2010c1		/* ldd 0(r1),r1 */
+       && *(pc + 11) == 0xe4202000)		/* be,l 0(sr4,r1) */
+      ||
+      (TARGET_64BIT
+       && *(pc + 0)  == 0x36dc0000		/* ldo 0(r22),ret0 */
+       && *(pc + 6)  == 0x341601c0		/* ldi e0,r22 */
+       && *(pc + 7)  == 0x08360ac1		/* shladd,l r22,3,r1,r1 */
+       && *(pc + 8)  == 0x0c2010c1		/* ldd 0(r1),r1 */
+       && *(pc + 9)  == 0xe4202000)		/* be,l 0(sr4,r1) */
+      ||
+      (!TARGET_64BIT
+       && *(pc + 0)  == 0x379a0000		/* ldo 0(ret0),r26 */
+       && *(pc + 1)  == 0x6bd33fc9		/* stw r19,-1c(sp) */
+       && *(pc + 2)  == 0x20200801		/* ldil L%-40000000,r1 */
+       && *(pc + 3)  == 0xe420e008		/* be,l 4(sr7,r1) */
+       && *(pc + 4)  == 0x34160116)		/* ldi 8b,r22 */
+      ||
+      (!TARGET_64BIT
+       && *(pc + 0)  == 0x6bd33fc9		/* stw r19,-1c(sp) */
+       && *(pc + 1)  == 0x20200801		/* ldil L%-40000000,r1 */
+       && *(pc + 2)  == 0xe420e008		/* be,l 4(sr7,r1) */
+       && *(pc + 3)  == 0x341601c0))		/* ldi e0,r22 */
+    {
+      /* The previous stack pointer is saved at (long *)SP - 1.  The
+	 ucontext structure is offset from the start of the previous
+	 frame by the siglocal_misc structure.  */
+      struct siglocalx *sl = (struct siglocalx *)
+	(*((long *) context->cfa - 1));
+      mcontext_t *mc = &(sl->sl_uc.uc_mcontext);
+
+      long new_cfa = GetSSReg (mc, ss_sp);
+
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = 30;
+      fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+      UPDATE_FS_FOR_GR (fs, 1, 1);
+      UPDATE_FS_FOR_GR (fs, 2, 2);
+      UPDATE_FS_FOR_GR (fs, 3, 3);
+      UPDATE_FS_FOR_GR (fs, 4, 4);
+      UPDATE_FS_FOR_GR (fs, 5, 5);
+      UPDATE_FS_FOR_GR (fs, 6, 6);
+      UPDATE_FS_FOR_GR (fs, 7, 7);
+      UPDATE_FS_FOR_GR (fs, 8, 8);
+      UPDATE_FS_FOR_GR (fs, 9, 9);
+      UPDATE_FS_FOR_GR (fs, 10, 10);
+      UPDATE_FS_FOR_GR (fs, 11, 11);
+      UPDATE_FS_FOR_GR (fs, 12, 12);
+      UPDATE_FS_FOR_GR (fs, 13, 13);
+      UPDATE_FS_FOR_GR (fs, 14, 14);
+      UPDATE_FS_FOR_GR (fs, 15, 15);
+      UPDATE_FS_FOR_GR (fs, 16, 16);
+      UPDATE_FS_FOR_GR (fs, 17, 17);
+      UPDATE_FS_FOR_GR (fs, 18, 18);
+      UPDATE_FS_FOR_GR (fs, 19, 19);
+      UPDATE_FS_FOR_GR (fs, 20, 20);
+      UPDATE_FS_FOR_GR (fs, 21, 21);
+      UPDATE_FS_FOR_GR (fs, 22, 22);
+      UPDATE_FS_FOR_GR (fs, 23, 23);
+      UPDATE_FS_FOR_GR (fs, 24, 24);
+      UPDATE_FS_FOR_GR (fs, 25, 25);
+      UPDATE_FS_FOR_GR (fs, 26, 26);
+      UPDATE_FS_FOR_GR (fs, 27, 27);
+      UPDATE_FS_FOR_GR (fs, 28, 28);
+      UPDATE_FS_FOR_GR (fs, 29, 29);
+      UPDATE_FS_FOR_GR (fs, 30, 30);
+      UPDATE_FS_FOR_GR (fs, 31, 31);
+
+      if (TARGET_64BIT)
+	{
+	  UPDATE_FS_FOR_FR (fs, 4, 32);
+	  UPDATE_FS_FOR_FR (fs, 5, 33);
+	  UPDATE_FS_FOR_FR (fs, 6, 34);
+	  UPDATE_FS_FOR_FR (fs, 7, 35);
+	  UPDATE_FS_FOR_FR (fs, 8, 36);
+	  UPDATE_FS_FOR_FR (fs, 9, 37);
+	  UPDATE_FS_FOR_FR (fs, 10, 38);
+	  UPDATE_FS_FOR_FR (fs, 11, 39);
+	  UPDATE_FS_FOR_FR (fs, 12, 40);
+	  UPDATE_FS_FOR_FR (fs, 13, 41);
+	  UPDATE_FS_FOR_FR (fs, 14, 42);
+	  UPDATE_FS_FOR_FR (fs, 15, 43);
+	  UPDATE_FS_FOR_FR (fs, 16, 44);
+	  UPDATE_FS_FOR_FR (fs, 17, 45);
+	  UPDATE_FS_FOR_FR (fs, 18, 46);
+	  UPDATE_FS_FOR_FR (fs, 19, 47);
+	  UPDATE_FS_FOR_FR (fs, 20, 48);
+	  UPDATE_FS_FOR_FR (fs, 21, 49);
+	  UPDATE_FS_FOR_FR (fs, 22, 50);
+	  UPDATE_FS_FOR_FR (fs, 23, 51);
+	  UPDATE_FS_FOR_FR (fs, 24, 52);
+	  UPDATE_FS_FOR_FR (fs, 25, 53);
+	  UPDATE_FS_FOR_FR (fs, 26, 54);
+	  UPDATE_FS_FOR_FR (fs, 27, 55);
+	  UPDATE_FS_FOR_FR (fs, 28, 56);
+	  UPDATE_FS_FOR_FR (fs, 29, 57);
+	  UPDATE_FS_FOR_FR (fs, 30, 58);
+	  UPDATE_FS_FOR_FR (fs, 31, 59);
+
+	  UPDATE_FS_FOR_SAR (fs, 60);
+	}
+      else
+	{
+	  UPDATE_FS_FOR_FR (fs, 4, 32);
+	  UPDATE_FS_FOR_FR (fs, 5, 34);
+	  UPDATE_FS_FOR_FR (fs, 6, 36);
+	  UPDATE_FS_FOR_FR (fs, 7, 38);
+	  UPDATE_FS_FOR_FR (fs, 8, 40);
+	  UPDATE_FS_FOR_FR (fs, 9, 44);
+	  UPDATE_FS_FOR_FR (fs, 10, 44);
+	  UPDATE_FS_FOR_FR (fs, 11, 46);
+	  UPDATE_FS_FOR_FR (fs, 12, 48);
+	  UPDATE_FS_FOR_FR (fs, 13, 50);
+	  UPDATE_FS_FOR_FR (fs, 14, 52);
+	  UPDATE_FS_FOR_FR (fs, 15, 54);
+
+	  if (!cpu)
+	    cpu = sysconf (_SC_CPU_VERSION);
+
+	  /* PA-RISC 1.0 only has 16 floating point registers.  */
+	  if (cpu != CPU_PA_RISC1_0)
+	    {
+	      UPDATE_FS_FOR_FR (fs, 16, 56);
+	      UPDATE_FS_FOR_FR (fs, 17, 58);
+	      UPDATE_FS_FOR_FR (fs, 18, 60);
+	      UPDATE_FS_FOR_FR (fs, 19, 62);
+	      UPDATE_FS_FOR_FR (fs, 20, 64);
+	      UPDATE_FS_FOR_FR (fs, 21, 66);
+	      UPDATE_FS_FOR_FR (fs, 22, 68);
+	      UPDATE_FS_FOR_FR (fs, 23, 70);
+	      UPDATE_FS_FOR_FR (fs, 24, 72);
+	      UPDATE_FS_FOR_FR (fs, 25, 74);
+	      UPDATE_FS_FOR_FR (fs, 26, 76);
+	      UPDATE_FS_FOR_FR (fs, 27, 78);
+	      UPDATE_FS_FOR_FR (fs, 28, 80);
+	      UPDATE_FS_FOR_FR (fs, 29, 82);
+	      UPDATE_FS_FOR_FR (fs, 30, 84);
+	      UPDATE_FS_FOR_FR (fs, 31, 86);
+	    }
+
+	  UPDATE_FS_FOR_SAR (fs, 88);
+	}
+
+      fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+      UPDATE_FS_FOR_PC (fs, DWARF_ALT_FRAME_RETURN_COLUMN);
+      fs->signal_frame = 1;
+
+      return _URC_NO_REASON;
+    }
+
+  return _URC_END_OF_STACK;
+}
+#endif /* inhibit_libc */
diff --git a/gcc-4.9/libgcc/config/pa/lib2funcs.S b/gcc-4.9/libgcc/config/pa/lib2funcs.S
new file mode 100644
index 000000000..49c68599d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/lib2funcs.S
@@ -0,0 +1,74 @@
+;  Subroutines for calling unbound dynamic functions from within GDB for HPPA.
+;  Subroutines for out of line prologues and epilogues on for the HPPA
+;  Copyright (C) 1994-2014 Free Software Foundation, Inc.
+
+;  This file is part of GCC.
+
+;  GCC is free software; you can redistribute it and/or modify
+;  it under the terms of the GNU General Public License as published by
+;  the Free Software Foundation; either version 3, or (at your option)
+;  any later version.
+
+;  GCC is distributed in the hope that it will be useful,
+;  but WITHOUT ANY WARRANTY; without even the implied warranty of
+;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;  GNU General Public License for more details.
+
+;  Under Section 7 of GPL version 3, you are granted additional
+;  permissions described in the GCC Runtime Library Exception, version
+;  3.1, as published by the Free Software Foundation.
+
+;  You should have received a copy of the GNU General Public License and
+;  a copy of the GCC Runtime Library Exception along with this program;
+;  see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+;  <http://www.gnu.org/licenses/>.
+
+#if !defined(__pro__) && !defined(__rtems__)
+	.SPACE $PRIVATE$
+	.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
+	.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
+	.SPACE $TEXT$
+	.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
+	.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
+	.SUBSPA $MILLICODE$,QUAD=0,ALIGN=8,ACCESS=44,SORT=8
+#endif
+	.IMPORT $$dyncall,MILLICODE
+#if !defined(__pro__) && !defined(__rtems__)
+	.SPACE $TEXT$
+	.SUBSPA $CODE$
+#else
+	.text
+#endif
+
+; Simply call with the address of the desired import stub in %r22 and
+; arguments in the normal place (%r26-%r23 and stack slots).
+;
+	.align 4
+	.EXPORT __gcc_plt_call,ENTRY,PRIV_LEV=3,RTNVAL=GR
+__gcc_plt_call
+	.PROC
+	.CALLINFO
+	.ENTRY
+	; Our return address comes in %r31, not %r2!
+	stw %r31,-8(%r30)
+
+	; An inline version of dyncall so we don't have to worry
+	; about long calls to millicode, PIC and other complexities.
+	bb,>=,n %r22,30,L$foo
+        depi 0,31,2,%r22
+        ldw 4(%r22),%r19
+        ldw 0(%r22),%r22
+L$foo
+        ldsid (%r22),%r1
+        mtsp %r1,%sr0
+        ble 0(%sr0,%r22)
+	copy %r31,%r2
+	ldw -8(%r30),%r2
+
+	; We're going to be returning to a stack address, so we
+	; need to do an intra-space return.
+	ldsid (%rp),%r1
+	mtsp %r1,%sr0
+	be,n 0(%sr0,%rp)
+	.EXIT
+	.PROCEND
diff --git a/gcc-4.9/libgcc/config/pa/linux-atomic.c b/gcc-4.9/libgcc/config/pa/linux-atomic.c
new file mode 100644
index 000000000..d92d6ef79
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/linux-atomic.c
@@ -0,0 +1,305 @@
+/* Linux-specific atomic operations for PA Linux.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+   Based on code contributed by CodeSourcery for ARM EABI Linux.
+   Modifications for PA Linux by Helge Deller <deller@gmx.de>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#define EFAULT  14 
+#define EBUSY   16
+#define ENOSYS 251 
+
+/* All PA-RISC implementations supported by linux have strongly
+   ordered loads and stores.  Only cache flushes and purges can be
+   delayed.  The data cache implementations are all globally
+   coherent.  Thus, there is no need to synchonize memory accesses.
+
+   GCC automatically issues a asm memory barrier when it encounters
+   a __sync_synchronize builtin.  Thus, we do not need to define this
+   builtin.
+
+   We implement byte, short and int versions of each atomic operation
+   using the kernel helper defined below.  There is no support for
+   64-bit operations yet.  */
+
+/* A privileged instruction to crash a userspace program with SIGILL.  */
+#define ABORT_INSTRUCTION asm ("iitlbp %r0,(%sr0, %r0)")
+
+/* Determine kernel LWS function call (0=32-bit, 1=64-bit userspace).  */
+#define LWS_CAS (sizeof(unsigned long) == 4 ? 0 : 1)
+
+/* Kernel helper for compare-and-exchange a 32-bit value.  */
+static inline long
+__kernel_cmpxchg (int oldval, int newval, int *mem)
+{
+  register unsigned long lws_mem asm("r26") = (unsigned long) (mem);
+  register long lws_ret   asm("r28");
+  register long lws_errno asm("r21");
+  register int lws_old asm("r25") = oldval;
+  register int lws_new asm("r24") = newval;
+  asm volatile (	"ble	0xb0(%%sr2, %%r0)	\n\t"
+			"ldi	%5, %%r20		\n\t"
+	: "=r" (lws_ret), "=r" (lws_errno), "=r" (lws_mem),
+	  "=r" (lws_old), "=r" (lws_new)
+	: "i" (LWS_CAS), "2" (lws_mem), "3" (lws_old), "4" (lws_new)
+	: "r1", "r20", "r22", "r23", "r29", "r31", "memory"
+  );
+  if (__builtin_expect (lws_errno == -EFAULT || lws_errno == -ENOSYS, 0))
+    ABORT_INSTRUCTION;
+
+  /* If the kernel LWS call succeeded (lws_errno == 0), lws_ret contains
+     the old value from memory.  If this value is equal to OLDVAL, the
+     new value was written to memory.  If not, return -EBUSY.  */
+  if (!lws_errno && lws_ret != oldval)
+    lws_errno = -EBUSY;
+
+  return lws_errno;
+}
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+/* Big endian masks  */
+#define INVERT_MASK_1 24
+#define INVERT_MASK_2 16
+
+#define MASK_1 0xffu
+#define MASK_2 0xffffu
+
+#define FETCH_AND_OP_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_fetch_and_##OP##_4 (int *ptr, int val)				\
+  {									\
+    int failure, tmp;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return tmp;								\
+  }
+
+FETCH_AND_OP_WORD (add,   , +)
+FETCH_AND_OP_WORD (sub,   , -)
+FETCH_AND_OP_WORD (or,    , |)
+FETCH_AND_OP_WORD (and,   , &)
+FETCH_AND_OP_WORD (xor,   , ^)
+FETCH_AND_OP_WORD (nand, ~, &)
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for
+   subword-sized quantities.  */
+
+#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN)	\
+  TYPE HIDDEN								\
+  NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE val)			\
+  {									\
+    int *wordptr = (int *) ((unsigned long) ptr & ~3);			\
+    unsigned int mask, shift, oldval, newval;				\
+    int failure;							\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = ((PFX_OP (((oldval & mask) >> shift)			\
+                         INF_OP (unsigned int) val)) << shift) & mask;	\
+      newval |= oldval & ~mask;						\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (RETURN & mask) >> shift;					\
+  }
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval)
+
+#define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP)				\
+  int HIDDEN								\
+  __sync_##OP##_and_fetch_4 (int *ptr, int val)				\
+  {									\
+    int tmp, failure;							\
+									\
+    do {								\
+      tmp = *ptr;							\
+      failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
+    } while (failure != 0);						\
+									\
+    return PFX_OP (tmp INF_OP val);					\
+  }
+
+OP_AND_FETCH_WORD (add,   , +)
+OP_AND_FETCH_WORD (sub,   , -)
+OP_AND_FETCH_WORD (or,    , |)
+OP_AND_FETCH_WORD (and,   , &)
+OP_AND_FETCH_WORD (xor,   , ^)
+OP_AND_FETCH_WORD (nand, ~, &)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval)
+
+SUBWORD_SYNC_OP (add,   , +, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (sub,   , -, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (or,    , |, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (and,   , &, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (xor,   , ^, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval)
+
+int HIDDEN
+__sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int actual_oldval, fail;
+    
+  while (1)
+    {
+      actual_oldval = *ptr;
+
+      if (__builtin_expect (oldval != actual_oldval, 0))
+	return actual_oldval;
+
+      fail = __kernel_cmpxchg (actual_oldval, newval, ptr);
+  
+      if (__builtin_expect (!fail, 1))
+	return actual_oldval;
+    }
+}
+
+#define SUBWORD_VAL_CAS(TYPE, WIDTH)					\
+  TYPE HIDDEN								\
+  __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+				       TYPE newval)			\
+  {									\
+    int *wordptr = (int *)((unsigned long) ptr & ~3), fail;		\
+    unsigned int mask, shift, actual_oldval, actual_newval;		\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    while (1)								\
+      {									\
+	actual_oldval = *wordptr;					\
+									\
+	if (__builtin_expect (((actual_oldval & mask) >> shift)		\
+			      != (unsigned int) oldval, 0))		\
+	  return (actual_oldval & mask) >> shift;			\
+									\
+	actual_newval = (actual_oldval & ~mask)				\
+			| (((unsigned int) newval << shift) & mask);	\
+									\
+	fail = __kernel_cmpxchg (actual_oldval, actual_newval,		\
+				 wordptr);				\
+									\
+	if (__builtin_expect (!fail, 1))				\
+	  return (actual_oldval & mask) >> shift;			\
+      }									\
+  }
+
+SUBWORD_VAL_CAS (unsigned short, 2)
+SUBWORD_VAL_CAS (unsigned char,  1)
+
+typedef unsigned char bool;
+
+bool HIDDEN
+__sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+  int failure = __kernel_cmpxchg (oldval, newval, ptr);
+  return (failure == 0);
+}
+
+#define SUBWORD_BOOL_CAS(TYPE, WIDTH)					\
+  bool HIDDEN								\
+  __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval,		\
+					TYPE newval)			\
+  {									\
+    TYPE actual_oldval							\
+      = __sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval);	\
+    return (oldval == actual_oldval);					\
+  }
+
+SUBWORD_BOOL_CAS (unsigned short, 2)
+SUBWORD_BOOL_CAS (unsigned char,  1)
+
+int HIDDEN
+__sync_lock_test_and_set_4 (int *ptr, int val)
+{
+  int failure, oldval;
+
+  do {
+    oldval = *ptr;
+    failure = __kernel_cmpxchg (oldval, val, ptr);
+  } while (failure != 0);
+
+  return oldval;
+}
+
+#define SUBWORD_TEST_AND_SET(TYPE, WIDTH)				\
+  TYPE HIDDEN								\
+  __sync_lock_test_and_set_##WIDTH (TYPE *ptr, TYPE val)		\
+  {									\
+    int failure;							\
+    unsigned int oldval, newval, shift, mask;				\
+    int *wordptr = (int *) ((unsigned long) ptr & ~3);			\
+									\
+    shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH;	\
+    mask = MASK_##WIDTH << shift;					\
+									\
+    do {								\
+      oldval = *wordptr;						\
+      newval = (oldval & ~mask)						\
+	       | (((unsigned int) val << shift) & mask);		\
+      failure = __kernel_cmpxchg (oldval, newval, wordptr);		\
+    } while (failure != 0);						\
+									\
+    return (oldval & mask) >> shift;					\
+  }
+
+SUBWORD_TEST_AND_SET (unsigned short, 2)
+SUBWORD_TEST_AND_SET (unsigned char,  1)
+
+#define SYNC_LOCK_RELEASE(TYPE, WIDTH)					\
+  void HIDDEN								\
+  __sync_lock_release_##WIDTH (TYPE *ptr)				\
+  {									\
+    *ptr = 0;								\
+  }
+
+SYNC_LOCK_RELEASE (int,   4)
+SYNC_LOCK_RELEASE (short, 2)
+SYNC_LOCK_RELEASE (char,  1)
diff --git a/gcc-4.9/libgcc/config/pa/linux-unwind.h b/gcc-4.9/libgcc/config/pa/linux-unwind.h
new file mode 100644
index 000000000..485f2d98e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/linux-unwind.h
@@ -0,0 +1,141 @@
+/* DWARF2 EH unwinding support for PA Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+/* Don't use this if inhibit_libc is set.
+   The build for this target will fail trying to include missing headers. */
+#ifndef inhibit_libc
+#include <signal.h>
+#include <sys/ucontext.h>
+
+/* Unfortunately, because of various bugs and changes to the kernel,
+   we have several cases to deal with.
+
+   In 2.4, the signal trampoline is 4 words, and (CONTEXT)->ra should
+   point directly at the beginning of the trampoline and struct rt_sigframe.
+
+   In <= 2.6.5-rc2-pa3, the signal trampoline is 9 words, and 
+   (CONTEXT)->ra points at the 4th word in the trampoline structure.  This 
+   is wrong, it should point at the 5th word.  This is fixed in 2.6.5-rc2-pa4.
+
+   To detect these cases, we first take (CONTEXT)->ra, align it to 64-bytes
+   to get the beginning of the signal frame, and then check offsets 0, 4
+   and 5 to see if we found the beginning of the trampoline.  This will
+   tell us how to locate the sigcontext structure.
+
+   Note that with a 2.4 64-bit kernel, the signal context is not properly
+   passed back to userspace so the unwind will not work correctly.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR pa32_fallback_frame_state
+
+static _Unwind_Reason_Code
+pa32_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  unsigned long sp = (unsigned long)context->ra & ~63;
+  unsigned int *pc = (unsigned int *)sp;
+  unsigned long off;
+  _Unwind_Ptr new_cfa;
+  int i;
+  struct sigcontext *sc;
+  struct rt_sigframe {
+    siginfo_t info;
+    struct ucontext uc;
+  } *frame;
+
+  /* rt_sigreturn trampoline:
+     3419000x ldi 0, %r25 or ldi 1, %r25   (x = 0 or 2)
+     3414015a ldi __NR_rt_sigreturn, %r20
+     e4008200 be,l 0x100(%sr2, %r0), %sr0, %r31
+     08000240 nop  */
+
+  if (pc[0] == 0x34190000 || pc[0] == 0x34190002)
+    off = 4*4;
+  else if (pc[4] == 0x34190000 || pc[4] == 0x34190002)
+    {
+      pc += 4;
+      off = 10 * 4;
+    }
+  else if (pc[5] == 0x34190000 || pc[5] == 0x34190002)
+    {
+      pc += 5;
+      off = 10 * 4;
+    }
+  else
+    {
+      /* We may have to unwind through an alternate signal stack.
+	 We assume that the alignment of the alternate signal stack
+	 is BIGGEST_ALIGNMENT (i.e., that it has been allocated using
+	 malloc).  As a result, we can't distinguish trampolines
+	 used prior to 2.6.5-rc2-pa4.  However after 2.6.5-rc2-pa4,
+	 the return address of a signal trampoline will be on an odd
+	 word boundary and we can then determine the frame offset.  */
+      sp = (unsigned long)context->ra;
+      pc = (unsigned int *)sp;
+      if ((pc[0] == 0x34190000 || pc[0] == 0x34190002) && (sp & 4))
+	off = 5 * 4;
+      else
+	return _URC_END_OF_STACK;
+    }
+
+  if (pc[1] != 0x3414015a
+      || pc[2] != 0xe4008200
+      || pc[3] != 0x08000240)
+    return _URC_END_OF_STACK;
+
+  frame = (struct rt_sigframe *)(sp + off);
+  sc = &frame->uc.uc_mcontext;
+
+  new_cfa = sc->sc_gr[30];
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 30;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+  for (i = 1; i <= 31; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset = (long)&sc->sc_gr[i] - new_cfa;
+    }
+  for (i = 4; i <= 31; i++)
+    {
+      /* FP regs have left and right halves */
+      fs->regs.reg[2*i+24].how = REG_SAVED_OFFSET;
+      fs->regs.reg[2*i+24].loc.offset
+	= (long)&sc->sc_fr[i] - new_cfa;
+      fs->regs.reg[2*i+24+1].how = REG_SAVED_OFFSET;
+      fs->regs.reg[2*i+24+1].loc.offset
+	= (long)&sc->sc_fr[i] + 4 - new_cfa;
+    }
+  fs->regs.reg[88].how = REG_SAVED_OFFSET;
+  fs->regs.reg[88].loc.offset = (long) &sc->sc_sar - new_cfa;
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_OFFSET;
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset
+    = (long) &sc->sc_iaoq[0] - new_cfa;
+  fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+#endif /* inhibit_libc */
diff --git a/gcc-4.9/libgcc/config/pa/milli64.S b/gcc-4.9/libgcc/config/pa/milli64.S
new file mode 100644
index 000000000..e92a47b23
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/milli64.S
@@ -0,0 +1,2134 @@
+/* 32 and 64-bit millicode, original author Hewlett-Packard
+   adapted for gcc by Paul Bame <bame@debian.org>
+   and Alan Modra <alan@linuxcare.com.au>.
+
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef pa64
+        .level  2.0w
+#endif
+
+/* Hardware General Registers.  */
+r0:	.reg	%r0
+r1:	.reg	%r1
+r2:	.reg	%r2
+r3:	.reg	%r3
+r4:	.reg	%r4
+r5:	.reg	%r5
+r6:	.reg	%r6
+r7:	.reg	%r7
+r8:	.reg	%r8
+r9:	.reg	%r9
+r10:	.reg	%r10
+r11:	.reg	%r11
+r12:	.reg	%r12
+r13:	.reg	%r13
+r14:	.reg	%r14
+r15:	.reg	%r15
+r16:	.reg	%r16
+r17:	.reg	%r17
+r18:	.reg	%r18
+r19:	.reg	%r19
+r20:	.reg	%r20
+r21:	.reg	%r21
+r22:	.reg	%r22
+r23:	.reg	%r23
+r24:	.reg	%r24
+r25:	.reg	%r25
+r26:	.reg	%r26
+r27:	.reg	%r27
+r28:	.reg	%r28
+r29:	.reg	%r29
+r30:	.reg	%r30
+r31:	.reg	%r31
+
+/* Hardware Space Registers.  */
+sr0:	.reg	%sr0
+sr1:	.reg	%sr1
+sr2:	.reg	%sr2
+sr3:	.reg	%sr3
+sr4:	.reg	%sr4
+sr5:	.reg	%sr5
+sr6:	.reg	%sr6
+sr7:	.reg	%sr7
+
+/* Hardware Floating Point Registers.  */
+fr0:	.reg	%fr0
+fr1:	.reg	%fr1
+fr2:	.reg	%fr2
+fr3:	.reg	%fr3
+fr4:	.reg	%fr4
+fr5:	.reg	%fr5
+fr6:	.reg	%fr6
+fr7:	.reg	%fr7
+fr8:	.reg	%fr8
+fr9:	.reg	%fr9
+fr10:	.reg	%fr10
+fr11:	.reg	%fr11
+fr12:	.reg	%fr12
+fr13:	.reg	%fr13
+fr14:	.reg	%fr14
+fr15:	.reg	%fr15
+
+/* Hardware Control Registers.  */
+cr11:	.reg	%cr11
+sar:	.reg	%cr11	/* Shift Amount Register */
+
+/* Software Architecture General Registers.  */
+rp:	.reg    r2	/* return pointer */
+#ifdef pa64
+mrp:	.reg	r2 	/* millicode return pointer */
+#else
+mrp:	.reg	r31	/* millicode return pointer */
+#endif
+ret0:	.reg    r28	/* return value */
+ret1:	.reg    r29	/* return value (high part of double) */
+sp:	.reg 	r30	/* stack pointer */
+dp:	.reg	r27	/* data pointer */
+arg0:	.reg	r26	/* argument */
+arg1:	.reg	r25	/* argument or high part of double argument */
+arg2:	.reg	r24	/* argument */
+arg3:	.reg	r23	/* argument or high part of double argument */
+
+/* Software Architecture Space Registers.  */
+/* 		sr0	; return link from BLE */
+sret:	.reg	sr1	/* return value */
+sarg:	.reg	sr1	/* argument */
+/* 		sr4	; PC SPACE tracker */
+/* 		sr5	; process private data */
+
+/* Frame Offsets (millicode convention!)  Used when calling other
+   millicode routines.  Stack unwinding is dependent upon these
+   definitions.  */
+r31_slot:	.equ	-20	/* "current RP" slot */
+sr0_slot:	.equ	-16     /* "static link" slot */
+#if defined(pa64)
+mrp_slot:       .equ    -16	/* "current RP" slot */
+psp_slot:       .equ    -8	/* "previous SP" slot */
+#else
+mrp_slot:	.equ	-20     /* "current RP" slot (replacing "r31_slot") */
+#endif
+
+
+#define DEFINE(name,value)name:	.EQU	value
+#define RDEFINE(name,value)name:	.REG	value
+#ifdef milliext
+#define MILLI_BE(lbl)   BE    lbl(sr7,r0)
+#define MILLI_BEN(lbl)  BE,n  lbl(sr7,r0)
+#define MILLI_BLE(lbl)	BLE   lbl(sr7,r0)
+#define MILLI_BLEN(lbl)	BLE,n lbl(sr7,r0)
+#define MILLIRETN	BE,n  0(sr0,mrp)
+#define MILLIRET	BE    0(sr0,mrp)
+#define MILLI_RETN	BE,n  0(sr0,mrp)
+#define MILLI_RET	BE    0(sr0,mrp)
+#else
+#define MILLI_BE(lbl)	B     lbl
+#define MILLI_BEN(lbl)  B,n   lbl
+#define MILLI_BLE(lbl)	BL    lbl,mrp
+#define MILLI_BLEN(lbl)	BL,n  lbl,mrp
+#define MILLIRETN	BV,n  0(mrp)
+#define MILLIRET	BV    0(mrp)
+#define MILLI_RETN	BV,n  0(mrp)
+#define MILLI_RET	BV    0(mrp)
+#endif
+
+#ifdef __STDC__
+#define CAT(a,b)	a##b
+#else
+#define CAT(a,b)	a/**/b
+#endif
+
+#ifdef ELF
+#define SUBSPA_MILLI	 .section .text
+#define SUBSPA_MILLI_DIV .section .text.div,"ax",@progbits! .align 16
+#define SUBSPA_MILLI_MUL .section .text.mul,"ax",@progbits! .align 16
+#define ATTR_MILLI
+#define SUBSPA_DATA	 .section .data
+#define ATTR_DATA
+#define GLOBAL		 $global$
+#define GSYM(sym) 	 !sym:
+#define LSYM(sym)	 !CAT(.L,sym:)
+#define LREF(sym)	 CAT(.L,sym)
+
+#else
+
+#ifdef coff
+/* This used to be .milli but since link32 places different named
+   sections in different segments millicode ends up a long ways away
+   from .text (1meg?).  This way they will be a lot closer.
+
+   The SUBSPA_MILLI_* specify locality sets for certain millicode
+   modules in order to ensure that modules that call one another are
+   placed close together. Without locality sets this is unlikely to
+   happen because of the Dynamite linker library search algorithm. We
+   want these modules close together so that short calls always reach
+   (we don't want to require long calls or use long call stubs).  */
+
+#define SUBSPA_MILLI	 .subspa .text
+#define SUBSPA_MILLI_DIV .subspa .text$dv,align=16
+#define SUBSPA_MILLI_MUL .subspa .text$mu,align=16
+#define ATTR_MILLI	 .attr code,read,execute
+#define SUBSPA_DATA	 .subspa .data
+#define ATTR_DATA	 .attr init_data,read,write
+#define GLOBAL		 _gp
+#else
+#define SUBSPA_MILLI	 .subspa $MILLICODE$,QUAD=0,ALIGN=4,ACCESS=0x2c,SORT=8
+#define SUBSPA_MILLI_DIV SUBSPA_MILLI
+#define SUBSPA_MILLI_MUL SUBSPA_MILLI
+#define ATTR_MILLI
+#define SUBSPA_DATA	 .subspa $BSS$,quad=1,align=8,access=0x1f,sort=80,zero
+#define ATTR_DATA
+#define GLOBAL		 $global$
+#endif
+#define SPACE_DATA	 .space $PRIVATE$,spnum=1,sort=16
+
+#define GSYM(sym)	 !sym
+#define LSYM(sym)	 !CAT(L$,sym)
+#define LREF(sym)	 CAT(L$,sym)
+#endif
+
+#ifdef L_dyncall
+	SUBSPA_MILLI
+	ATTR_DATA
+GSYM($$dyncall)
+	.export $$dyncall,millicode
+	.proc
+	.callinfo	millicode
+	.entry
+	bb,>=,n %r22,30,LREF(1)		; branch if not plabel address
+	depi	0,31,2,%r22		; clear the two least significant bits
+	ldw	4(%r22),%r19		; load new LTP value
+	ldw	0(%r22),%r22		; load address of target
+LSYM(1)
+#ifdef LINUX
+	bv	%r0(%r22)		; branch to the real target
+#else
+	ldsid	(%sr0,%r22),%r1		; get the "space ident" selected by r22
+	mtsp	%r1,%sr0		; move that space identifier into sr0
+	be	0(%sr0,%r22)		; branch to the real target
+#endif
+	stw	%r2,-24(%r30)		; save return address into frame marker
+	.exit
+	.procend
+#endif
+
+#ifdef L_divI
+/* ROUTINES:	$$divI, $$divoI
+
+   Single precision divide for signed binary integers.
+
+   The quotient is truncated towards zero.
+   The sign of the quotient is the XOR of the signs of the dividend and
+   divisor.
+   Divide by zero is trapped.
+   Divide of -2**31 by -1 is trapped for $$divoI but not for $$divI.
+
+   INPUT REGISTERS:
+   .	arg0 ==	dividend
+   .	arg1 ==	divisor
+   .	mrp  == return pc
+   .	sr0  == return space when called externally
+
+   OUTPUT REGISTERS:
+   .	arg0 =	undefined
+   .	arg1 =	undefined
+   .	ret1 =	quotient
+
+   OTHER REGISTERS AFFECTED:
+   .	r1   =	undefined
+
+   SIDE EFFECTS:
+   .	Causes a trap under the following conditions:
+   .		divisor is zero  (traps with ADDIT,=  0,25,0)
+   .		dividend==-2**31  and divisor==-1 and routine is $$divoI
+   .				 (traps with ADDO  26,25,0)
+   .	Changes memory at the following places:
+   .		NONE
+
+   PERMISSIBLE CONTEXT:
+   .	Unwindable.
+   .	Suitable for internal or external millicode.
+   .	Assumes the special millicode register conventions.
+
+   DISCUSSION:
+   .	Branchs to other millicode routines using BE
+   .		$$div_# for # being 2,3,4,5,6,7,8,9,10,12,14,15
+   .
+   .	For selected divisors, calls a divide by constant routine written by
+   .	Karl Pettis.  Eligible divisors are 1..15 excluding 11 and 13.
+   .
+   .	The only overflow case is -2**31 divided by -1.
+   .	Both routines return -2**31 but only $$divoI traps.  */
+
+RDEFINE(temp,r1)
+RDEFINE(retreg,ret1)	/*  r29 */
+RDEFINE(temp1,arg0)
+	SUBSPA_MILLI_DIV
+	ATTR_MILLI
+	.import $$divI_2,millicode
+	.import $$divI_3,millicode
+	.import $$divI_4,millicode
+	.import $$divI_5,millicode
+	.import $$divI_6,millicode
+	.import $$divI_7,millicode
+	.import $$divI_8,millicode
+	.import $$divI_9,millicode
+	.import $$divI_10,millicode
+	.import $$divI_12,millicode
+	.import $$divI_14,millicode
+	.import $$divI_15,millicode
+	.export $$divI,millicode
+	.export	$$divoI,millicode
+	.proc
+	.callinfo	millicode
+	.entry
+GSYM($$divoI)
+	comib,=,n  -1,arg1,LREF(negative1)	/*  when divisor == -1 */
+GSYM($$divI)
+	ldo	-1(arg1),temp		/*  is there at most one bit set ? */
+	and,<>	arg1,temp,r0		/*  if not, don't use power of 2 divide */
+	addi,>	0,arg1,r0		/*  if divisor > 0, use power of 2 divide */
+	b,n	LREF(neg_denom)
+LSYM(pow2)
+	addi,>=	0,arg0,retreg		/*  if numerator is negative, add the */
+	add	arg0,temp,retreg	/*  (denominaotr -1) to correct for shifts */
+	extru,=	arg1,15,16,temp		/*  test denominator with 0xffff0000 */
+	extrs	retreg,15,16,retreg	/*  retreg = retreg >> 16 */
+	or	arg1,temp,arg1		/*  arg1 = arg1 | (arg1 >> 16) */
+	ldi	0xcc,temp1		/*  setup 0xcc in temp1 */
+	extru,= arg1,23,8,temp		/*  test denominator with 0xff00 */
+	extrs	retreg,23,24,retreg	/*  retreg = retreg >> 8 */
+	or	arg1,temp,arg1		/*  arg1 = arg1 | (arg1 >> 8) */
+	ldi	0xaa,temp		/*  setup 0xaa in temp */
+	extru,= arg1,27,4,r0		/*  test denominator with 0xf0 */
+	extrs	retreg,27,28,retreg	/*  retreg = retreg >> 4 */
+	and,=	arg1,temp1,r0		/*  test denominator with 0xcc */
+	extrs	retreg,29,30,retreg	/*  retreg = retreg >> 2 */
+	and,=	arg1,temp,r0		/*  test denominator with 0xaa */
+	extrs	retreg,30,31,retreg	/*  retreg = retreg >> 1 */
+	MILLIRETN
+LSYM(neg_denom)
+	addi,<	0,arg1,r0		/*  if arg1 >= 0, it's not power of 2 */
+	b,n	LREF(regular_seq)
+	sub	r0,arg1,temp		/*  make denominator positive */
+	comb,=,n  arg1,temp,LREF(regular_seq)	/*  test against 0x80000000 and 0 */
+	ldo	-1(temp),retreg		/*  is there at most one bit set ? */
+	and,=	temp,retreg,r0		/*  if so, the denominator is power of 2 */
+	b,n	LREF(regular_seq)
+	sub	r0,arg0,retreg		/*  negate numerator */
+	comb,=,n arg0,retreg,LREF(regular_seq) /*  test against 0x80000000 */
+	copy	retreg,arg0		/*  set up arg0, arg1 and temp	*/
+	copy	temp,arg1		/*  before branching to pow2 */
+	b	LREF(pow2)
+	ldo	-1(arg1),temp
+LSYM(regular_seq)
+	comib,>>=,n 15,arg1,LREF(small_divisor)
+	add,>=	0,arg0,retreg		/*  move dividend, if retreg < 0, */
+LSYM(normal)
+	subi	0,retreg,retreg		/*    make it positive */
+	sub	0,arg1,temp		/*  clear carry,  */
+					/*    negate the divisor */
+	ds	0,temp,0		/*  set V-bit to the comple- */
+					/*    ment of the divisor sign */
+	add	retreg,retreg,retreg	/*  shift msb bit into carry */
+	ds	r0,arg1,temp		/*  1st divide step, if no carry */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  2nd divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  3rd divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  4th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  5th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  6th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  7th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  8th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  9th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  10th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  11th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  12th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  13th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  14th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  15th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  16th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  17th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  18th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  19th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  20th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  21st divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  22nd divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  23rd divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  24th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  25th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  26th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  27th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  28th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  29th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  30th divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  31st divide step */
+	addc	retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds	temp,arg1,temp		/*  32nd divide step, */
+	addc	retreg,retreg,retreg	/*  shift last retreg bit into retreg */
+	xor,>=	arg0,arg1,0		/*  get correct sign of quotient */
+	  sub	0,retreg,retreg		/*    based on operand signs */
+	MILLIRETN
+	nop
+
+LSYM(small_divisor)
+
+#if defined(pa64)
+/*  Clear the upper 32 bits of the arg1 register.  We are working with	*/
+/*  small divisors (and 32-bit integers)   We must not be mislead  */
+/*  by "1" bits left in the upper 32 bits.  */
+	depd %r0,31,32,%r25
+#endif
+	blr,n	arg1,r0
+	nop
+/*  table for divisor == 0,1, ... ,15 */
+	addit,=	0,arg1,r0	/*  trap if divisor == 0 */
+	nop
+	MILLIRET		/*  divisor == 1 */
+	copy	arg0,retreg
+	MILLI_BEN($$divI_2)	/*  divisor == 2 */
+	nop
+	MILLI_BEN($$divI_3)	/*  divisor == 3 */
+	nop
+	MILLI_BEN($$divI_4)	/*  divisor == 4 */
+	nop
+	MILLI_BEN($$divI_5)	/*  divisor == 5 */
+	nop
+	MILLI_BEN($$divI_6)	/*  divisor == 6 */
+	nop
+	MILLI_BEN($$divI_7)	/*  divisor == 7 */
+	nop
+	MILLI_BEN($$divI_8)	/*  divisor == 8 */
+	nop
+	MILLI_BEN($$divI_9)	/*  divisor == 9 */
+	nop
+	MILLI_BEN($$divI_10)	/*  divisor == 10 */
+	nop
+	b	LREF(normal)		/*  divisor == 11 */
+	add,>=	0,arg0,retreg
+	MILLI_BEN($$divI_12)	/*  divisor == 12 */
+	nop
+	b	LREF(normal)		/*  divisor == 13 */
+	add,>=	0,arg0,retreg
+	MILLI_BEN($$divI_14)	/*  divisor == 14 */
+	nop
+	MILLI_BEN($$divI_15)	/*  divisor == 15 */
+	nop
+
+LSYM(negative1)
+	sub	0,arg0,retreg	/*  result is negation of dividend */
+	MILLIRET
+	addo	arg0,arg1,r0	/*  trap iff dividend==0x80000000 && divisor==-1 */
+	.exit
+	.procend
+	.end
+#endif
+
+#ifdef L_divU
+/* ROUTINE:	$$divU
+   .
+   .	Single precision divide for unsigned integers.
+   .
+   .	Quotient is truncated towards zero.
+   .	Traps on divide by zero.
+
+   INPUT REGISTERS:
+   .	arg0 ==	dividend
+   .	arg1 ==	divisor
+   .	mrp  == return pc
+   .	sr0  == return space when called externally
+
+   OUTPUT REGISTERS:
+   .	arg0 =	undefined
+   .	arg1 =	undefined
+   .	ret1 =	quotient
+
+   OTHER REGISTERS AFFECTED:
+   .	r1   =	undefined
+
+   SIDE EFFECTS:
+   .	Causes a trap under the following conditions:
+   .		divisor is zero
+   .	Changes memory at the following places:
+   .		NONE
+
+   PERMISSIBLE CONTEXT:
+   .	Unwindable.
+   .	Does not create a stack frame.
+   .	Suitable for internal or external millicode.
+   .	Assumes the special millicode register conventions.
+
+   DISCUSSION:
+   .	Branchs to other millicode routines using BE:
+   .		$$divU_# for 3,5,6,7,9,10,12,14,15
+   .
+   .	For selected small divisors calls the special divide by constant
+   .	routines written by Karl Pettis.  These are: 3,5,6,7,9,10,12,14,15.  */
+
+RDEFINE(temp,r1)
+RDEFINE(retreg,ret1)	/* r29 */
+RDEFINE(temp1,arg0)
+	SUBSPA_MILLI_DIV
+	ATTR_MILLI
+	.export $$divU,millicode
+	.import $$divU_3,millicode
+	.import $$divU_5,millicode
+	.import $$divU_6,millicode
+	.import $$divU_7,millicode
+	.import $$divU_9,millicode
+	.import $$divU_10,millicode
+	.import $$divU_12,millicode
+	.import $$divU_14,millicode
+	.import $$divU_15,millicode
+	.proc
+	.callinfo	millicode
+	.entry
+GSYM($$divU)
+/* The subtract is not nullified since it does no harm and can be used
+   by the two cases that branch back to "normal".  */
+	ldo	-1(arg1),temp		/* is there at most one bit set ? */
+	and,=	arg1,temp,r0		/* if so, denominator is power of 2 */
+	b	LREF(regular_seq)
+	addit,=	0,arg1,0		/* trap for zero dvr */
+	copy	arg0,retreg
+	extru,= arg1,15,16,temp		/* test denominator with 0xffff0000 */
+	extru	retreg,15,16,retreg	/* retreg = retreg >> 16 */
+	or	arg1,temp,arg1		/* arg1 = arg1 | (arg1 >> 16) */
+	ldi	0xcc,temp1		/* setup 0xcc in temp1 */
+	extru,= arg1,23,8,temp		/* test denominator with 0xff00 */
+	extru	retreg,23,24,retreg	/* retreg = retreg >> 8 */
+	or	arg1,temp,arg1		/* arg1 = arg1 | (arg1 >> 8) */
+	ldi	0xaa,temp		/* setup 0xaa in temp */
+	extru,= arg1,27,4,r0		/* test denominator with 0xf0 */
+	extru	retreg,27,28,retreg	/* retreg = retreg >> 4 */
+	and,=	arg1,temp1,r0		/* test denominator with 0xcc */
+	extru	retreg,29,30,retreg	/* retreg = retreg >> 2 */
+	and,=	arg1,temp,r0		/* test denominator with 0xaa */
+	extru	retreg,30,31,retreg	/* retreg = retreg >> 1 */
+	MILLIRETN
+	nop	
+LSYM(regular_seq)
+	comib,>=  15,arg1,LREF(special_divisor)
+	subi	0,arg1,temp		/* clear carry, negate the divisor */
+	ds	r0,temp,r0		/* set V-bit to 1 */
+LSYM(normal)
+	add	arg0,arg0,retreg	/* shift msb bit into carry */
+	ds	r0,arg1,temp		/* 1st divide step, if no carry */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 2nd divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 3rd divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 4th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 5th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 6th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 7th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 8th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 9th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 10th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 11th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 12th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 13th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 14th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 15th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 16th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 17th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 18th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 19th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 20th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 21st divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 22nd divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 23rd divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 24th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 25th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 26th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 27th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 28th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 29th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 30th divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 31st divide step */
+	addc	retreg,retreg,retreg	/* shift retreg with/into carry */
+	ds	temp,arg1,temp		/* 32nd divide step, */
+	MILLIRET
+	addc	retreg,retreg,retreg	/* shift last retreg bit into retreg */
+
+/* Handle the cases where divisor is a small constant or has high bit on.  */
+LSYM(special_divisor)
+/*	blr	arg1,r0 */
+/*	comib,>,n  0,arg1,LREF(big_divisor) ; nullify previous instruction */
+
+/* Pratap 8/13/90. The 815 Stirling chip set has a bug that prevents us from
+   generating such a blr, comib sequence. A problem in nullification. So I
+   rewrote this code.  */
+
+#if defined(pa64)
+/* Clear the upper 32 bits of the arg1 register.  We are working with
+   small divisors (and 32-bit unsigned integers)   We must not be mislead
+   by "1" bits left in the upper 32 bits.  */
+	depd %r0,31,32,%r25
+#endif
+	comib,>	0,arg1,LREF(big_divisor)
+	nop
+	blr	arg1,r0
+	nop
+
+LSYM(zero_divisor)	/* this label is here to provide external visibility */
+	addit,=	0,arg1,0		/* trap for zero dvr */
+	nop
+	MILLIRET			/* divisor == 1 */
+	copy	arg0,retreg
+	MILLIRET			/* divisor == 2 */
+	extru	arg0,30,31,retreg
+	MILLI_BEN($$divU_3)		/* divisor == 3 */
+	nop
+	MILLIRET			/* divisor == 4 */
+	extru	arg0,29,30,retreg
+	MILLI_BEN($$divU_5)		/* divisor == 5 */
+	nop
+	MILLI_BEN($$divU_6)		/* divisor == 6 */
+	nop
+	MILLI_BEN($$divU_7)		/* divisor == 7 */
+	nop
+	MILLIRET			/* divisor == 8 */
+	extru	arg0,28,29,retreg
+	MILLI_BEN($$divU_9)		/* divisor == 9 */
+	nop
+	MILLI_BEN($$divU_10)		/* divisor == 10 */
+	nop
+	b	LREF(normal)		/* divisor == 11 */
+	ds	r0,temp,r0		/* set V-bit to 1 */
+	MILLI_BEN($$divU_12)		/* divisor == 12 */
+	nop
+	b	LREF(normal)		/* divisor == 13 */
+	ds	r0,temp,r0		/* set V-bit to 1 */
+	MILLI_BEN($$divU_14)		/* divisor == 14 */
+	nop
+	MILLI_BEN($$divU_15)		/* divisor == 15 */
+	nop
+
+/* Handle the case where the high bit is on in the divisor.
+   Compute:	if( dividend>=divisor) quotient=1; else quotient=0;
+   Note:	dividend>==divisor iff dividend-divisor does not borrow
+   and		not borrow iff carry.  */
+LSYM(big_divisor)
+	sub	arg0,arg1,r0
+	MILLIRET
+	addc	r0,r0,retreg
+	.exit
+	.procend
+	.end
+#endif
+
+#ifdef L_remI
+/* ROUTINE:	$$remI
+
+   DESCRIPTION:
+   .	$$remI returns the remainder of the division of two signed 32-bit
+   .	integers.  The sign of the remainder is the same as the sign of
+   .	the dividend.
+
+
+   INPUT REGISTERS:
+   .	arg0 == dividend
+   .	arg1 == divisor
+   .	mrp  == return pc
+   .	sr0  == return space when called externally
+
+   OUTPUT REGISTERS:
+   .	arg0 = destroyed
+   .	arg1 = destroyed
+   .	ret1 = remainder
+
+   OTHER REGISTERS AFFECTED:
+   .	r1   = undefined
+
+   SIDE EFFECTS:
+   .	Causes a trap under the following conditions:  DIVIDE BY ZERO
+   .	Changes memory at the following places:  NONE
+
+   PERMISSIBLE CONTEXT:
+   .	Unwindable
+   .	Does not create a stack frame
+   .	Is usable for internal or external microcode
+
+   DISCUSSION:
+   .	Calls other millicode routines via mrp:  NONE
+   .	Calls other millicode routines:  NONE  */
+
+RDEFINE(tmp,r1)
+RDEFINE(retreg,ret1)
+
+	SUBSPA_MILLI
+	ATTR_MILLI
+	.proc
+	.callinfo millicode
+	.entry
+GSYM($$remI)
+GSYM($$remoI)
+	.export $$remI,MILLICODE
+	.export $$remoI,MILLICODE
+	ldo		-1(arg1),tmp		/*  is there at most one bit set ? */
+	and,<>		arg1,tmp,r0		/*  if not, don't use power of 2 */
+	addi,>		0,arg1,r0		/*  if denominator > 0, use power */
+						/*  of 2 */
+	b,n		LREF(neg_denom)
+LSYM(pow2)
+	comb,>,n	0,arg0,LREF(neg_num)	/*  is numerator < 0 ? */
+	and		arg0,tmp,retreg		/*  get the result */
+	MILLIRETN
+LSYM(neg_num)
+	subi		0,arg0,arg0		/*  negate numerator */
+	and		arg0,tmp,retreg		/*  get the result */
+	subi		0,retreg,retreg		/*  negate result */
+	MILLIRETN
+LSYM(neg_denom)
+	addi,<		0,arg1,r0		/*  if arg1 >= 0, it's not power */
+						/*  of 2 */
+	b,n		LREF(regular_seq)
+	sub		r0,arg1,tmp		/*  make denominator positive */
+	comb,=,n	arg1,tmp,LREF(regular_seq) /*  test against 0x80000000 and 0 */
+	ldo		-1(tmp),retreg		/*  is there at most one bit set ? */
+	and,=		tmp,retreg,r0		/*  if not, go to regular_seq */
+	b,n		LREF(regular_seq)
+	comb,>,n	0,arg0,LREF(neg_num_2)	/*  if arg0 < 0, negate it  */
+	and		arg0,retreg,retreg
+	MILLIRETN
+LSYM(neg_num_2)
+	subi		0,arg0,tmp		/*  test against 0x80000000 */
+	and		tmp,retreg,retreg
+	subi		0,retreg,retreg
+	MILLIRETN
+LSYM(regular_seq)
+	addit,=		0,arg1,0		/*  trap if div by zero */
+	add,>=		0,arg0,retreg		/*  move dividend, if retreg < 0, */
+	sub		0,retreg,retreg		/*    make it positive */
+	sub		0,arg1, tmp		/*  clear carry,  */
+						/*    negate the divisor */
+	ds		0, tmp,0		/*  set V-bit to the comple- */
+						/*    ment of the divisor sign */
+	or		0,0, tmp		/*  clear  tmp */
+	add		retreg,retreg,retreg	/*  shift msb bit into carry */
+	ds		 tmp,arg1, tmp		/*  1st divide step, if no carry */
+						/*    out, msb of quotient = 0 */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+LSYM(t1)
+	ds		 tmp,arg1, tmp		/*  2nd divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  3rd divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  4th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  5th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  6th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  7th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  8th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  9th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  10th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  11th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  12th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  13th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  14th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  15th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  16th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  17th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  18th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  19th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  20th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  21st divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  22nd divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  23rd divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  24th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  25th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  26th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  27th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  28th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  29th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  30th divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  31st divide step */
+	addc		retreg,retreg,retreg	/*  shift retreg with/into carry */
+	ds		 tmp,arg1, tmp		/*  32nd divide step, */
+	addc		retreg,retreg,retreg	/*  shift last bit into retreg */
+	movb,>=,n	 tmp,retreg,LREF(finish) /*  branch if pos.  tmp */
+	add,<		arg1,0,0		/*  if arg1 > 0, add arg1 */
+	add,tr		 tmp,arg1,retreg	/*    for correcting remainder tmp */
+	sub		 tmp,arg1,retreg	/*  else add absolute value arg1 */
+LSYM(finish)
+	add,>=		arg0,0,0		/*  set sign of remainder */
+	sub		0,retreg,retreg		/*    to sign of dividend */
+	MILLIRET
+	nop
+	.exit
+	.procend
+#ifdef milliext
+	.origin 0x00000200
+#endif
+	.end
+#endif
+
+#ifdef L_remU
+/* ROUTINE:	$$remU
+   .	Single precision divide for remainder with unsigned binary integers.
+   .
+   .	The remainder must be dividend-(dividend/divisor)*divisor.
+   .	Divide by zero is trapped.
+
+   INPUT REGISTERS:
+   .	arg0 ==	dividend
+   .	arg1 == divisor
+   .	mrp  == return pc
+   .	sr0  == return space when called externally
+
+   OUTPUT REGISTERS:
+   .	arg0 =	undefined
+   .	arg1 =	undefined
+   .	ret1 =	remainder
+
+   OTHER REGISTERS AFFECTED:
+   .	r1   =	undefined
+
+   SIDE EFFECTS:
+   .	Causes a trap under the following conditions:  DIVIDE BY ZERO
+   .	Changes memory at the following places:  NONE
+
+   PERMISSIBLE CONTEXT:
+   .	Unwindable.
+   .	Does not create a stack frame.
+   .	Suitable for internal or external millicode.
+   .	Assumes the special millicode register conventions.
+
+   DISCUSSION:
+   .	Calls other millicode routines using mrp: NONE
+   .	Calls other millicode routines: NONE  */
+
+
+RDEFINE(temp,r1)
+RDEFINE(rmndr,ret1)	/*  r29 */
+	SUBSPA_MILLI
+	ATTR_MILLI
+	.export $$remU,millicode
+	.proc
+	.callinfo	millicode
+	.entry
+GSYM($$remU)
+	ldo	-1(arg1),temp		/*  is there at most one bit set ? */
+	and,=	arg1,temp,r0		/*  if not, don't use power of 2 */
+	b	LREF(regular_seq)
+	addit,=	0,arg1,r0		/*  trap on div by zero */
+	and	arg0,temp,rmndr		/*  get the result for power of 2 */
+	MILLIRETN
+LSYM(regular_seq)
+	comib,>=,n  0,arg1,LREF(special_case)
+	subi	0,arg1,rmndr		/*  clear carry, negate the divisor */
+	ds	r0,rmndr,r0		/*  set V-bit to 1 */
+	add	arg0,arg0,temp		/*  shift msb bit into carry */
+	ds	r0,arg1,rmndr		/*  1st divide step, if no carry */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  2nd divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  3rd divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  4th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  5th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  6th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  7th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  8th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  9th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  10th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  11th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  12th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  13th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  14th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  15th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  16th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  17th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  18th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  19th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  20th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  21st divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  22nd divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  23rd divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  24th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  25th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  26th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  27th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  28th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  29th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  30th divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  31st divide step */
+	addc	temp,temp,temp		/*  shift temp with/into carry */
+	ds	rmndr,arg1,rmndr		/*  32nd divide step, */
+	comiclr,<= 0,rmndr,r0
+	  add	rmndr,arg1,rmndr	/*  correction */
+	MILLIRETN
+	nop
+
+/* Putting >= on the last DS and deleting COMICLR does not work!  */
+LSYM(special_case)
+	sub,>>=	arg0,arg1,rmndr
+	  copy	arg0,rmndr
+	MILLIRETN
+	nop
+	.exit
+	.procend
+	.end
+#endif
+
+#ifdef L_div_const
+/* ROUTINE:	$$divI_2
+   .		$$divI_3	$$divU_3
+   .		$$divI_4
+   .		$$divI_5	$$divU_5
+   .		$$divI_6	$$divU_6
+   .		$$divI_7	$$divU_7
+   .		$$divI_8
+   .		$$divI_9	$$divU_9
+   .		$$divI_10	$$divU_10
+   .
+   .		$$divI_12	$$divU_12
+   .
+   .		$$divI_14	$$divU_14
+   .		$$divI_15	$$divU_15
+   .		$$divI_16
+   .		$$divI_17	$$divU_17
+   .
+   .	Divide by selected constants for single precision binary integers.
+
+   INPUT REGISTERS:
+   .	arg0 ==	dividend
+   .	mrp  == return pc
+   .	sr0  == return space when called externally
+
+   OUTPUT REGISTERS:
+   .	arg0 =	undefined
+   .	arg1 =	undefined
+   .	ret1 =	quotient
+
+   OTHER REGISTERS AFFECTED:
+   .	r1   =	undefined
+
+   SIDE EFFECTS:
+   .	Causes a trap under the following conditions: NONE
+   .	Changes memory at the following places:  NONE
+
+   PERMISSIBLE CONTEXT:
+   .	Unwindable.
+   .	Does not create a stack frame.
+   .	Suitable for internal or external millicode.
+   .	Assumes the special millicode register conventions.
+
+   DISCUSSION:
+   .	Calls other millicode routines using mrp:  NONE
+   .	Calls other millicode routines:  NONE  */
+
+
+/* TRUNCATED DIVISION BY SMALL INTEGERS
+
+   We are interested in q(x) = floor(x/y), where x >= 0 and y > 0
+   (with y fixed).
+
+   Let a = floor(z/y), for some choice of z.  Note that z will be
+   chosen so that division by z is cheap.
+
+   Let r be the remainder(z/y).  In other words, r = z - ay.
+
+   Now, our method is to choose a value for b such that
+
+   q'(x) = floor((ax+b)/z)
+
+   is equal to q(x) over as large a range of x as possible.  If the
+   two are equal over a sufficiently large range, and if it is easy to
+   form the product (ax), and it is easy to divide by z, then we can
+   perform the division much faster than the general division algorithm.
+
+   So, we want the following to be true:
+
+   .	For x in the following range:
+   .
+   .	    ky <= x < (k+1)y
+   .
+   .	implies that
+   .
+   .	    k <= (ax+b)/z < (k+1)
+
+   We want to determine b such that this is true for all k in the
+   range {0..K} for some maximum K.
+
+   Since (ax+b) is an increasing function of x, we can take each
+   bound separately to determine the "best" value for b.
+
+   (ax+b)/z < (k+1)	       implies
+
+   (a((k+1)y-1)+b < (k+1)z     implies
+
+   b < a + (k+1)(z-ay)	       implies
+
+   b < a + (k+1)r
+
+   This needs to be true for all k in the range {0..K}.  In
+   particular, it is true for k = 0 and this leads to a maximum
+   acceptable value for b.
+
+   b < a+r   or   b <= a+r-1
+
+   Taking the other bound, we have
+
+   k <= (ax+b)/z	       implies
+
+   k <= (aky+b)/z	       implies
+
+   k(z-ay) <= b		       implies
+
+   kr <= b
+
+   Clearly, the largest range for k will be achieved by maximizing b,
+   when r is not zero.	When r is zero, then the simplest choice for b
+   is 0.  When r is not 0, set
+
+   .	b = a+r-1
+
+   Now, by construction, q'(x) = floor((ax+b)/z) = q(x) = floor(x/y)
+   for all x in the range:
+
+   .	0 <= x < (K+1)y
+
+   We need to determine what K is.  Of our two bounds,
+
+   .	b < a+(k+1)r	is satisfied for all k >= 0, by construction.
+
+   The other bound is
+
+   .	kr <= b
+
+   This is always true if r = 0.  If r is not 0 (the usual case), then
+   K = floor((a+r-1)/r), is the maximum value for k.
+
+   Therefore, the formula q'(x) = floor((ax+b)/z) yields the correct
+   answer for q(x) = floor(x/y) when x is in the range
+
+   (0,(K+1)y-1)	       K = floor((a+r-1)/r)
+
+   To be most useful, we want (K+1)y-1 = (max x) >= 2**32-1 so that
+   the formula for q'(x) yields the correct value of q(x) for all x
+   representable by a single word in HPPA.
+
+   We are also constrained in that computing the product (ax), adding
+   b, and dividing by z must all be done quickly, otherwise we will be
+   better off going through the general algorithm using the DS
+   instruction, which uses approximately 70 cycles.
+
+   For each y, there is a choice of z which satisfies the constraints
+   for (K+1)y >= 2**32.  We may not, however, be able to satisfy the
+   timing constraints for arbitrary y.	It seems that z being equal to
+   a power of 2 or a power of 2 minus 1 is as good as we can do, since
+   it minimizes the time to do division by z.  We want the choice of z
+   to also result in a value for (a) that minimizes the computation of
+   the product (ax).  This is best achieved if (a) has a regular bit
+   pattern (so the multiplication can be done with shifts and adds).
+   The value of (a) also needs to be less than 2**32 so the product is
+   always guaranteed to fit in 2 words.
+
+   In actual practice, the following should be done:
+
+   1) For negative x, you should take the absolute value and remember
+   .  the fact so that the result can be negated.  This obviously does
+   .  not apply in the unsigned case.
+   2) For even y, you should factor out the power of 2 that divides y
+   .  and divide x by it.  You can then proceed by dividing by the
+   .  odd factor of y.
+
+   Here is a table of some odd values of y, and corresponding choices
+   for z which are "good".
+
+    y	  z	  r	 a (hex)     max x (hex)
+
+    3	2**32	  1	55555555      100000001
+    5	2**32	  1	33333333      100000003
+    7  2**24-1	  0	  249249     (infinite)
+    9  2**24-1	  0	  1c71c7     (infinite)
+   11  2**20-1	  0	   1745d     (infinite)
+   13  2**24-1	  0	  13b13b     (infinite)
+   15	2**32	  1	11111111      10000000d
+   17	2**32	  1	 f0f0f0f      10000000f
+
+   If r is 1, then b = a+r-1 = a.  This simplifies the computation
+   of (ax+b), since you can compute (x+1)(a) instead.  If r is 0,
+   then b = 0 is ok to use which simplifies (ax+b).
+
+   The bit patterns for 55555555, 33333333, and 11111111 are obviously
+   very regular.  The bit patterns for the other values of a above are:
+
+    y	   (hex)	  (binary)
+
+    7	  249249  001001001001001001001001  << regular >>
+    9	  1c71c7  000111000111000111000111  << regular >>
+   11	   1745d  000000010111010001011101  << irregular >>
+   13	  13b13b  000100111011000100111011  << irregular >>
+
+   The bit patterns for (a) corresponding to (y) of 11 and 13 may be
+   too irregular to warrant using this method.
+
+   When z is a power of 2 minus 1, then the division by z is slightly
+   more complicated, involving an iterative solution.
+
+   The code presented here solves division by 1 through 17, except for
+   11 and 13. There are algorithms for both signed and unsigned
+   quantities given.
+
+   TIMINGS (cycles)
+
+   divisor  positive  negative	unsigned
+
+   .   1	2	   2	     2
+   .   2	4	   4	     2
+   .   3       19	  21	    19
+   .   4	4	   4	     2
+   .   5       18	  22	    19
+   .   6       19	  22	    19
+   .   8	4	   4	     2
+   .  10       18	  19	    17
+   .  12       18	  20	    18
+   .  15       16	  18	    16
+   .  16	4	   4	     2
+   .  17       16	  18	    16
+
+   Now, the algorithm for 7, 9, and 14 is an iterative one.  That is,
+   a loop body is executed until the tentative quotient is 0.  The
+   number of times the loop body is executed varies depending on the
+   dividend, but is never more than two times.	If the dividend is
+   less than the divisor, then the loop body is not executed at all.
+   Each iteration adds 4 cycles to the timings.
+
+   divisor  positive  negative	unsigned
+
+   .   7       19+4n	 20+4n	   20+4n    n = number of iterations
+   .   9       21+4n	 22+4n	   21+4n
+   .  14       21+4n	 22+4n	   20+4n
+
+   To give an idea of how the number of iterations varies, here is a
+   table of dividend versus number of iterations when dividing by 7.
+
+   smallest	 largest       required
+   dividend	dividend      iterations
+
+   .	0	     6		    0
+   .	7	 0x6ffffff	    1
+   0x1000006	0xffffffff	    2
+
+   There is some overlap in the range of numbers requiring 1 and 2
+   iterations.	*/
+
+RDEFINE(t2,r1)
+RDEFINE(x2,arg0)	/*  r26 */
+RDEFINE(t1,arg1)	/*  r25 */
+RDEFINE(x1,ret1)	/*  r29 */
+
+	SUBSPA_MILLI_DIV
+	ATTR_MILLI
+
+	.proc
+	.callinfo	millicode
+	.entry
+/* NONE of these routines require a stack frame
+   ALL of these routines are unwindable from millicode	*/
+
+GSYM($$divide_by_constant)
+	.export $$divide_by_constant,millicode
+/*  Provides a "nice" label for the code covered by the unwind descriptor
+    for things like gprof.  */
+
+/* DIVISION BY 2 (shift by 1) */
+GSYM($$divI_2)
+	.export		$$divI_2,millicode
+	comclr,>=	arg0,0,0
+	addi		1,arg0,arg0
+	MILLIRET
+	extrs		arg0,30,31,ret1
+
+
+/* DIVISION BY 4 (shift by 2) */
+GSYM($$divI_4)
+	.export		$$divI_4,millicode
+	comclr,>=	arg0,0,0
+	addi		3,arg0,arg0
+	MILLIRET
+	extrs		arg0,29,30,ret1
+
+
+/* DIVISION BY 8 (shift by 3) */
+GSYM($$divI_8)
+	.export		$$divI_8,millicode
+	comclr,>=	arg0,0,0
+	addi		7,arg0,arg0
+	MILLIRET
+	extrs		arg0,28,29,ret1
+
+/* DIVISION BY 16 (shift by 4) */
+GSYM($$divI_16)
+	.export		$$divI_16,millicode
+	comclr,>=	arg0,0,0
+	addi		15,arg0,arg0
+	MILLIRET
+	extrs		arg0,27,28,ret1
+
+/****************************************************************************
+*
+*	DIVISION BY DIVISORS OF FFFFFFFF, and powers of 2 times these
+*
+*	includes 3,5,15,17 and also 6,10,12
+*
+****************************************************************************/
+
+/* DIVISION BY 3 (use z = 2**32; a = 55555555) */
+
+GSYM($$divI_3)
+	.export		$$divI_3,millicode
+	comb,<,N	x2,0,LREF(neg3)
+
+	addi		1,x2,x2		/* this cannot overflow	*/
+	extru		x2,1,2,x1	/* multiply by 5 to get started */
+	sh2add		x2,x2,x2
+	b		LREF(pos)
+	addc		x1,0,x1
+
+LSYM(neg3)
+	subi		1,x2,x2		/* this cannot overflow	*/
+	extru		x2,1,2,x1	/* multiply by 5 to get started */
+	sh2add		x2,x2,x2
+	b		LREF(neg)
+	addc		x1,0,x1
+
+GSYM($$divU_3)
+	.export		$$divU_3,millicode
+	addi		1,x2,x2		/* this CAN overflow */
+	addc		0,0,x1
+	shd		x1,x2,30,t1	/* multiply by 5 to get started */
+	sh2add		x2,x2,x2
+	b		LREF(pos)
+	addc		x1,t1,x1
+
+/* DIVISION BY 5 (use z = 2**32; a = 33333333) */
+
+GSYM($$divI_5)
+	.export		$$divI_5,millicode
+	comb,<,N	x2,0,LREF(neg5)
+
+	addi		3,x2,t1		/* this cannot overflow	*/
+	sh1add		x2,t1,x2	/* multiply by 3 to get started */
+	b		LREF(pos)
+	addc		0,0,x1
+
+LSYM(neg5)
+	sub		0,x2,x2		/* negate x2			*/
+	addi		1,x2,x2		/* this cannot overflow	*/
+	shd		0,x2,31,x1	/* get top bit (can be 1)	*/
+	sh1add		x2,x2,x2	/* multiply by 3 to get started */
+	b		LREF(neg)
+	addc		x1,0,x1
+
+GSYM($$divU_5)
+	.export		$$divU_5,millicode
+	addi		1,x2,x2		/* this CAN overflow */
+	addc		0,0,x1
+	shd		x1,x2,31,t1	/* multiply by 3 to get started */
+	sh1add		x2,x2,x2
+	b		LREF(pos)
+	addc		t1,x1,x1
+
+/* DIVISION BY	6 (shift to divide by 2 then divide by 3) */
+GSYM($$divI_6)
+	.export		$$divI_6,millicode
+	comb,<,N	x2,0,LREF(neg6)
+	extru		x2,30,31,x2	/* divide by 2			*/
+	addi		5,x2,t1		/* compute 5*(x2+1) = 5*x2+5	*/
+	sh2add		x2,t1,x2	/* multiply by 5 to get started */
+	b		LREF(pos)
+	addc		0,0,x1
+
+LSYM(neg6)
+	subi		2,x2,x2		/* negate, divide by 2, and add 1 */
+					/* negation and adding 1 are done */
+					/* at the same time by the SUBI   */
+	extru		x2,30,31,x2
+	shd		0,x2,30,x1
+	sh2add		x2,x2,x2	/* multiply by 5 to get started */
+	b		LREF(neg)
+	addc		x1,0,x1
+
+GSYM($$divU_6)
+	.export		$$divU_6,millicode
+	extru		x2,30,31,x2	/* divide by 2 */
+	addi		1,x2,x2		/* cannot carry */
+	shd		0,x2,30,x1	/* multiply by 5 to get started */
+	sh2add		x2,x2,x2
+	b		LREF(pos)
+	addc		x1,0,x1
+
+/* DIVISION BY 10 (shift to divide by 2 then divide by 5) */
+GSYM($$divU_10)
+	.export		$$divU_10,millicode
+	extru		x2,30,31,x2	/* divide by 2 */
+	addi		3,x2,t1		/* compute 3*(x2+1) = (3*x2)+3	*/
+	sh1add		x2,t1,x2	/* multiply by 3 to get started */
+	addc		0,0,x1
+LSYM(pos)
+	shd		x1,x2,28,t1	/* multiply by 0x11 */
+	shd		x2,0,28,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+LSYM(pos_for_17)
+	shd		x1,x2,24,t1	/* multiply by 0x101 */
+	shd		x2,0,24,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+
+	shd		x1,x2,16,t1	/* multiply by 0x10001 */
+	shd		x2,0,16,t2
+	add		x2,t2,x2
+	MILLIRET
+	addc		x1,t1,x1
+
+GSYM($$divI_10)
+	.export		$$divI_10,millicode
+	comb,<		x2,0,LREF(neg10)
+	copy		0,x1
+	extru		x2,30,31,x2	/* divide by 2 */
+	addib,TR	1,x2,LREF(pos)	/* add 1 (cannot overflow)     */
+	sh1add		x2,x2,x2	/* multiply by 3 to get started */
+
+LSYM(neg10)
+	subi		2,x2,x2		/* negate, divide by 2, and add 1 */
+					/* negation and adding 1 are done */
+					/* at the same time by the SUBI   */
+	extru		x2,30,31,x2
+	sh1add		x2,x2,x2	/* multiply by 3 to get started */
+LSYM(neg)
+	shd		x1,x2,28,t1	/* multiply by 0x11 */
+	shd		x2,0,28,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+LSYM(neg_for_17)
+	shd		x1,x2,24,t1	/* multiply by 0x101 */
+	shd		x2,0,24,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+
+	shd		x1,x2,16,t1	/* multiply by 0x10001 */
+	shd		x2,0,16,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+	MILLIRET
+	sub		0,x1,x1
+
+/* DIVISION BY 12 (shift to divide by 4 then divide by 3) */
+GSYM($$divI_12)
+	.export		$$divI_12,millicode
+	comb,<		x2,0,LREF(neg12)
+	copy		0,x1
+	extru		x2,29,30,x2	/* divide by 4			*/
+	addib,tr	1,x2,LREF(pos)	/* compute 5*(x2+1) = 5*x2+5    */
+	sh2add		x2,x2,x2	/* multiply by 5 to get started */
+
+LSYM(neg12)
+	subi		4,x2,x2		/* negate, divide by 4, and add 1 */
+					/* negation and adding 1 are done */
+					/* at the same time by the SUBI   */
+	extru		x2,29,30,x2
+	b		LREF(neg)
+	sh2add		x2,x2,x2	/* multiply by 5 to get started */
+
+GSYM($$divU_12)
+	.export		$$divU_12,millicode
+	extru		x2,29,30,x2	/* divide by 4   */
+	addi		5,x2,t1		/* cannot carry */
+	sh2add		x2,t1,x2	/* multiply by 5 to get started */
+	b		LREF(pos)
+	addc		0,0,x1
+
+/* DIVISION BY 15 (use z = 2**32; a = 11111111) */
+GSYM($$divI_15)
+	.export		$$divI_15,millicode
+	comb,<		x2,0,LREF(neg15)
+	copy		0,x1
+	addib,tr	1,x2,LREF(pos)+4
+	shd		x1,x2,28,t1
+
+LSYM(neg15)
+	b		LREF(neg)
+	subi		1,x2,x2
+
+GSYM($$divU_15)
+	.export		$$divU_15,millicode
+	addi		1,x2,x2		/* this CAN overflow */
+	b		LREF(pos)
+	addc		0,0,x1
+
+/* DIVISION BY 17 (use z = 2**32; a =  f0f0f0f) */
+GSYM($$divI_17)
+	.export		$$divI_17,millicode
+	comb,<,n	x2,0,LREF(neg17)
+	addi		1,x2,x2		/* this cannot overflow */
+	shd		0,x2,28,t1	/* multiply by 0xf to get started */
+	shd		x2,0,28,t2
+	sub		t2,x2,x2
+	b		LREF(pos_for_17)
+	subb		t1,0,x1
+
+LSYM(neg17)
+	subi		1,x2,x2		/* this cannot overflow */
+	shd		0,x2,28,t1	/* multiply by 0xf to get started */
+	shd		x2,0,28,t2
+	sub		t2,x2,x2
+	b		LREF(neg_for_17)
+	subb		t1,0,x1
+
+GSYM($$divU_17)
+	.export		$$divU_17,millicode
+	addi		1,x2,x2		/* this CAN overflow */
+	addc		0,0,x1
+	shd		x1,x2,28,t1	/* multiply by 0xf to get started */
+LSYM(u17)
+	shd		x2,0,28,t2
+	sub		t2,x2,x2
+	b		LREF(pos_for_17)
+	subb		t1,x1,x1
+
+
+/* DIVISION BY DIVISORS OF FFFFFF, and powers of 2 times these
+   includes 7,9 and also 14
+
+
+   z = 2**24-1
+   r = z mod x = 0
+
+   so choose b = 0
+
+   Also, in order to divide by z = 2**24-1, we approximate by dividing
+   by (z+1) = 2**24 (which is easy), and then correcting.
+
+   (ax) = (z+1)q' + r
+   .	= zq' + (q'+r)
+
+   So to compute (ax)/z, compute q' = (ax)/(z+1) and r = (ax) mod (z+1)
+   Then the true remainder of (ax)/z is (q'+r).  Repeat the process
+   with this new remainder, adding the tentative quotients together,
+   until a tentative quotient is 0 (and then we are done).  There is
+   one last correction to be done.  It is possible that (q'+r) = z.
+   If so, then (q'+r)/(z+1) = 0 and it looks like we are done.	But,
+   in fact, we need to add 1 more to the quotient.  Now, it turns
+   out that this happens if and only if the original value x is
+   an exact multiple of y.  So, to avoid a three instruction test at
+   the end, instead use 1 instruction to add 1 to x at the beginning.  */
+
+/* DIVISION BY 7 (use z = 2**24-1; a = 249249) */
+GSYM($$divI_7)
+	.export		$$divI_7,millicode
+	comb,<,n	x2,0,LREF(neg7)
+LSYM(7)
+	addi		1,x2,x2		/* cannot overflow */
+	shd		0,x2,29,x1
+	sh3add		x2,x2,x2
+	addc		x1,0,x1
+LSYM(pos7)
+	shd		x1,x2,26,t1
+	shd		x2,0,26,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+
+	shd		x1,x2,20,t1
+	shd		x2,0,20,t2
+	add		x2,t2,x2
+	addc		x1,t1,t1
+
+	/* computed <t1,x2>.  Now divide it by (2**24 - 1)	*/
+
+	copy		0,x1
+	shd,=		t1,x2,24,t1	/* tentative quotient  */
+LSYM(1)
+	addb,tr		t1,x1,LREF(2)	/* add to previous quotient   */
+	extru		x2,31,24,x2	/* new remainder (unadjusted) */
+
+	MILLIRETN
+
+LSYM(2)
+	addb,tr		t1,x2,LREF(1)	/* adjust remainder */
+	extru,=		x2,7,8,t1	/* new quotient     */
+
+LSYM(neg7)
+	subi		1,x2,x2		/* negate x2 and add 1 */
+LSYM(8)
+	shd		0,x2,29,x1
+	sh3add		x2,x2,x2
+	addc		x1,0,x1
+
+LSYM(neg7_shift)
+	shd		x1,x2,26,t1
+	shd		x2,0,26,t2
+	add		x2,t2,x2
+	addc		x1,t1,x1
+
+	shd		x1,x2,20,t1
+	shd		x2,0,20,t2
+	add		x2,t2,x2
+	addc		x1,t1,t1
+
+	/* computed <t1,x2>.  Now divide it by (2**24 - 1)	*/
+
+	copy		0,x1
+	shd,=		t1,x2,24,t1	/* tentative quotient  */
+LSYM(3)
+	addb,tr		t1,x1,LREF(4)	/* add to previous quotient   */
+	extru		x2,31,24,x2	/* new remainder (unadjusted) */
+
+	MILLIRET
+	sub		0,x1,x1		/* negate result    */
+
+LSYM(4)
+	addb,tr		t1,x2,LREF(3)	/* adjust remainder */
+	extru,=		x2,7,8,t1	/* new quotient     */
+
+GSYM($$divU_7)
+	.export		$$divU_7,millicode
+	addi		1,x2,x2		/* can carry */
+	addc		0,0,x1
+	shd		x1,x2,29,t1
+	sh3add		x2,x2,x2
+	b		LREF(pos7)
+	addc		t1,x1,x1
+
+/* DIVISION BY 9 (use z = 2**24-1; a = 1c71c7) */
+GSYM($$divI_9)
+	.export		$$divI_9,millicode
+	comb,<,n	x2,0,LREF(neg9)
+	addi		1,x2,x2		/* cannot overflow */
+	shd		0,x2,29,t1
+	shd		x2,0,29,t2
+	sub		t2,x2,x2
+	b		LREF(pos7)
+	subb		t1,0,x1
+
+LSYM(neg9)
+	subi		1,x2,x2		/* negate and add 1 */
+	shd		0,x2,29,t1
+	shd		x2,0,29,t2
+	sub		t2,x2,x2
+	b		LREF(neg7_shift)
+	subb		t1,0,x1
+
+GSYM($$divU_9)
+	.export		$$divU_9,millicode
+	addi		1,x2,x2		/* can carry */
+	addc		0,0,x1
+	shd		x1,x2,29,t1
+	shd		x2,0,29,t2
+	sub		t2,x2,x2
+	b		LREF(pos7)
+	subb		t1,x1,x1
+
+/* DIVISION BY 14 (shift to divide by 2 then divide by 7) */
+GSYM($$divI_14)
+	.export		$$divI_14,millicode
+	comb,<,n	x2,0,LREF(neg14)
+GSYM($$divU_14)
+	.export		$$divU_14,millicode
+	b		LREF(7)		/* go to 7 case */
+	extru		x2,30,31,x2	/* divide by 2  */
+
+LSYM(neg14)
+	subi		2,x2,x2		/* negate (and add 2) */
+	b		LREF(8)
+	extru		x2,30,31,x2	/* divide by 2	      */
+	.exit
+	.procend
+	.end
+#endif
+
+#ifdef L_mulI
+/* VERSION "@(#)$$mulI $ Revision: 12.4 $ $ Date: 94/03/17 17:18:51 $" */
+/******************************************************************************
+This routine is used on PA2.0 processors when gcc -mno-fpregs is used
+
+ROUTINE:	$$mulI
+
+
+DESCRIPTION:	
+
+	$$mulI multiplies two single word integers, giving a single 
+	word result.  
+
+
+INPUT REGISTERS:
+
+	arg0 = Operand 1
+	arg1 = Operand 2
+	r31  == return pc
+	sr0  == return space when called externally 
+
+
+OUTPUT REGISTERS:
+
+	arg0 = undefined
+	arg1 = undefined
+	ret1 = result 
+
+OTHER REGISTERS AFFECTED:
+
+	r1   = undefined
+
+SIDE EFFECTS:
+
+	Causes a trap under the following conditions:  NONE
+	Changes memory at the following places:  NONE
+
+PERMISSIBLE CONTEXT:
+
+	Unwindable
+	Does not create a stack frame
+	Is usable for internal or external microcode
+
+DISCUSSION:
+
+	Calls other millicode routines via mrp:  NONE
+	Calls other millicode routines:  NONE
+
+***************************************************************************/
+
+
+#define	a0	%arg0
+#define	a1	%arg1
+#define	t0	%r1
+#define	r	%ret1
+
+#define	a0__128a0	zdep	a0,24,25,a0
+#define	a0__256a0	zdep	a0,23,24,a0
+#define	a1_ne_0_b_l0	comb,<>	a1,0,LREF(l0)
+#define	a1_ne_0_b_l1	comb,<>	a1,0,LREF(l1)
+#define	a1_ne_0_b_l2	comb,<>	a1,0,LREF(l2)
+#define	b_n_ret_t0	b,n	LREF(ret_t0)
+#define	b_e_shift	b	LREF(e_shift)
+#define	b_e_t0ma0	b	LREF(e_t0ma0)
+#define	b_e_t0		b	LREF(e_t0)
+#define	b_e_t0a0	b	LREF(e_t0a0)
+#define	b_e_t02a0	b	LREF(e_t02a0)
+#define	b_e_t04a0	b	LREF(e_t04a0)
+#define	b_e_2t0		b	LREF(e_2t0)
+#define	b_e_2t0a0	b	LREF(e_2t0a0)
+#define	b_e_2t04a0	b	LREF(e2t04a0)
+#define	b_e_3t0		b	LREF(e_3t0)
+#define	b_e_4t0		b	LREF(e_4t0)
+#define	b_e_4t0a0	b	LREF(e_4t0a0)
+#define	b_e_4t08a0	b	LREF(e4t08a0)
+#define	b_e_5t0		b	LREF(e_5t0)
+#define	b_e_8t0		b	LREF(e_8t0)
+#define	b_e_8t0a0	b	LREF(e_8t0a0)
+#define	r__r_a0		add	r,a0,r
+#define	r__r_2a0	sh1add	a0,r,r
+#define	r__r_4a0	sh2add	a0,r,r
+#define	r__r_8a0	sh3add	a0,r,r
+#define	r__r_t0		add	r,t0,r
+#define	r__r_2t0	sh1add	t0,r,r
+#define	r__r_4t0	sh2add	t0,r,r
+#define	r__r_8t0	sh3add	t0,r,r
+#define	t0__3a0		sh1add	a0,a0,t0
+#define	t0__4a0		sh2add	a0,0,t0
+#define	t0__5a0		sh2add	a0,a0,t0
+#define	t0__8a0		sh3add	a0,0,t0
+#define	t0__9a0		sh3add	a0,a0,t0
+#define	t0__16a0	zdep	a0,27,28,t0
+#define	t0__32a0	zdep	a0,26,27,t0
+#define	t0__64a0	zdep	a0,25,26,t0
+#define	t0__128a0	zdep	a0,24,25,t0
+#define	t0__t0ma0	sub	t0,a0,t0
+#define	t0__t0_a0	add	t0,a0,t0
+#define	t0__t0_2a0	sh1add	a0,t0,t0
+#define	t0__t0_4a0	sh2add	a0,t0,t0
+#define	t0__t0_8a0	sh3add	a0,t0,t0
+#define	t0__2t0_a0	sh1add	t0,a0,t0
+#define	t0__3t0		sh1add	t0,t0,t0
+#define	t0__4t0		sh2add	t0,0,t0
+#define	t0__4t0_a0	sh2add	t0,a0,t0
+#define	t0__5t0		sh2add	t0,t0,t0
+#define	t0__8t0		sh3add	t0,0,t0
+#define	t0__8t0_a0	sh3add	t0,a0,t0
+#define	t0__9t0		sh3add	t0,t0,t0
+#define	t0__16t0	zdep	t0,27,28,t0
+#define	t0__32t0	zdep	t0,26,27,t0
+#define	t0__256a0	zdep	a0,23,24,t0
+
+
+	SUBSPA_MILLI
+	ATTR_MILLI
+	.align 16
+	.proc
+	.callinfo millicode
+	.export $$mulI,millicode
+GSYM($$mulI)	
+	combt,<<=	a1,a0,LREF(l4)	/* swap args if unsigned a1>a0 */
+	copy		0,r		/* zero out the result */
+	xor		a0,a1,a0	/* swap a0 & a1 using the */
+	xor		a0,a1,a1	/*  old xor trick */
+	xor		a0,a1,a0
+LSYM(l4)
+	combt,<=	0,a0,LREF(l3)		/* if a0>=0 then proceed like unsigned */
+	zdep		a1,30,8,t0	/* t0 = (a1&0xff)<<1 ********* */
+	sub,>		0,a1,t0		/* otherwise negate both and */
+	combt,<=,n	a0,t0,LREF(l2)	/*  swap back if |a0|<|a1| */
+	sub		0,a0,a1
+	movb,tr,n	t0,a0,LREF(l2)	/* 10th inst.  */
+
+LSYM(l0)	r__r_t0				/* add in this partial product */
+LSYM(l1)	a0__256a0			/* a0 <<= 8 ****************** */
+LSYM(l2)	zdep		a1,30,8,t0	/* t0 = (a1&0xff)<<1 ********* */
+LSYM(l3)	blr		t0,0		/* case on these 8 bits ****** */
+		extru		a1,23,24,a1	/* a1 >>= 8 ****************** */
+
+/*16 insts before this.  */
+/*			  a0 <<= 8 ************************** */
+LSYM(x0)	a1_ne_0_b_l2	! a0__256a0	! MILLIRETN	! nop
+LSYM(x1)	a1_ne_0_b_l1	! r__r_a0	! MILLIRETN	! nop
+LSYM(x2)	a1_ne_0_b_l1	! r__r_2a0	! MILLIRETN	! nop
+LSYM(x3)	a1_ne_0_b_l0	! t0__3a0	! MILLIRET	! r__r_t0
+LSYM(x4)	a1_ne_0_b_l1	! r__r_4a0	! MILLIRETN	! nop
+LSYM(x5)	a1_ne_0_b_l0	! t0__5a0	! MILLIRET	! r__r_t0
+LSYM(x6)	t0__3a0		! a1_ne_0_b_l1	! r__r_2t0	! MILLIRETN
+LSYM(x7)	t0__3a0		! a1_ne_0_b_l0	! r__r_4a0	! b_n_ret_t0
+LSYM(x8)	a1_ne_0_b_l1	! r__r_8a0	! MILLIRETN	! nop
+LSYM(x9)	a1_ne_0_b_l0	! t0__9a0	! MILLIRET	! r__r_t0
+LSYM(x10)	t0__5a0		! a1_ne_0_b_l1	! r__r_2t0	! MILLIRETN
+LSYM(x11)	t0__3a0		! a1_ne_0_b_l0	! r__r_8a0	! b_n_ret_t0
+LSYM(x12)	t0__3a0		! a1_ne_0_b_l1	! r__r_4t0	! MILLIRETN
+LSYM(x13)	t0__5a0		! a1_ne_0_b_l0	! r__r_8a0	! b_n_ret_t0
+LSYM(x14)	t0__3a0		! t0__2t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x15)	t0__5a0		! a1_ne_0_b_l0	! t0__3t0	! b_n_ret_t0
+LSYM(x16)	t0__16a0	! a1_ne_0_b_l1	! r__r_t0	! MILLIRETN
+LSYM(x17)	t0__9a0		! a1_ne_0_b_l0	! t0__t0_8a0	! b_n_ret_t0
+LSYM(x18)	t0__9a0		! a1_ne_0_b_l1	! r__r_2t0	! MILLIRETN
+LSYM(x19)	t0__9a0		! a1_ne_0_b_l0	! t0__2t0_a0	! b_n_ret_t0
+LSYM(x20)	t0__5a0		! a1_ne_0_b_l1	! r__r_4t0	! MILLIRETN
+LSYM(x21)	t0__5a0		! a1_ne_0_b_l0	! t0__4t0_a0	! b_n_ret_t0
+LSYM(x22)	t0__5a0		! t0__2t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x23)	t0__5a0		! t0__2t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x24)	t0__3a0		! a1_ne_0_b_l1	! r__r_8t0	! MILLIRETN
+LSYM(x25)	t0__5a0		! a1_ne_0_b_l0	! t0__5t0	! b_n_ret_t0
+LSYM(x26)	t0__3a0		! t0__4t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x27)	t0__3a0		! a1_ne_0_b_l0	! t0__9t0	! b_n_ret_t0
+LSYM(x28)	t0__3a0		! t0__2t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x29)	t0__3a0		! t0__2t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x30)	t0__5a0		! t0__3t0	! b_e_shift	! r__r_2t0
+LSYM(x31)	t0__32a0	! a1_ne_0_b_l0	! t0__t0ma0	! b_n_ret_t0
+LSYM(x32)	t0__32a0	! a1_ne_0_b_l1	! r__r_t0	! MILLIRETN
+LSYM(x33)	t0__8a0		! a1_ne_0_b_l0	! t0__4t0_a0	! b_n_ret_t0
+LSYM(x34)	t0__16a0	! t0__t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x35)	t0__9a0		! t0__3t0	! b_e_t0	! t0__t0_8a0
+LSYM(x36)	t0__9a0		! a1_ne_0_b_l1	! r__r_4t0	! MILLIRETN
+LSYM(x37)	t0__9a0		! a1_ne_0_b_l0	! t0__4t0_a0	! b_n_ret_t0
+LSYM(x38)	t0__9a0		! t0__2t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x39)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x40)	t0__5a0		! a1_ne_0_b_l1	! r__r_8t0	! MILLIRETN
+LSYM(x41)	t0__5a0		! a1_ne_0_b_l0	! t0__8t0_a0	! b_n_ret_t0
+LSYM(x42)	t0__5a0		! t0__4t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x43)	t0__5a0		! t0__4t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x44)	t0__5a0		! t0__2t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x45)	t0__9a0		! a1_ne_0_b_l0	! t0__5t0	! b_n_ret_t0
+LSYM(x46)	t0__9a0		! t0__5t0	! b_e_t0	! t0__t0_a0
+LSYM(x47)	t0__9a0		! t0__5t0	! b_e_t0	! t0__t0_2a0
+LSYM(x48)	t0__3a0		! a1_ne_0_b_l0	! t0__16t0	! b_n_ret_t0
+LSYM(x49)	t0__9a0		! t0__5t0	! b_e_t0	! t0__t0_4a0
+LSYM(x50)	t0__5a0		! t0__5t0	! b_e_shift	! r__r_2t0
+LSYM(x51)	t0__9a0		! t0__t0_8a0	! b_e_t0	! t0__3t0
+LSYM(x52)	t0__3a0		! t0__4t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x53)	t0__3a0		! t0__4t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x54)	t0__9a0		! t0__3t0	! b_e_shift	! r__r_2t0
+LSYM(x55)	t0__9a0		! t0__3t0	! b_e_t0	! t0__2t0_a0
+LSYM(x56)	t0__3a0		! t0__2t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x57)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__3t0
+LSYM(x58)	t0__3a0		! t0__2t0_a0	! b_e_2t0	! t0__4t0_a0
+LSYM(x59)	t0__9a0		! t0__2t0_a0	! b_e_t02a0	! t0__3t0
+LSYM(x60)	t0__5a0		! t0__3t0	! b_e_shift	! r__r_4t0
+LSYM(x61)	t0__5a0		! t0__3t0	! b_e_t0	! t0__4t0_a0
+LSYM(x62)	t0__32a0	! t0__t0ma0	! b_e_shift	! r__r_2t0
+LSYM(x63)	t0__64a0	! a1_ne_0_b_l0	! t0__t0ma0	! b_n_ret_t0
+LSYM(x64)	t0__64a0	! a1_ne_0_b_l1	! r__r_t0	! MILLIRETN
+LSYM(x65)	t0__8a0		! a1_ne_0_b_l0	! t0__8t0_a0	! b_n_ret_t0
+LSYM(x66)	t0__32a0	! t0__t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x67)	t0__8a0		! t0__4t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x68)	t0__8a0		! t0__2t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x69)	t0__8a0		! t0__2t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x70)	t0__64a0	! t0__t0_4a0	! b_e_t0	! t0__t0_2a0
+LSYM(x71)	t0__9a0		! t0__8t0	! b_e_t0	! t0__t0ma0
+LSYM(x72)	t0__9a0		! a1_ne_0_b_l1	! r__r_8t0	! MILLIRETN
+LSYM(x73)	t0__9a0		! t0__8t0_a0	! b_e_shift	! r__r_t0
+LSYM(x74)	t0__9a0		! t0__4t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x75)	t0__9a0		! t0__4t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x76)	t0__9a0		! t0__2t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x77)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x78)	t0__9a0		! t0__2t0_a0	! b_e_2t0	! t0__2t0_a0
+LSYM(x79)	t0__16a0	! t0__5t0	! b_e_t0	! t0__t0ma0
+LSYM(x80)	t0__16a0	! t0__5t0	! b_e_shift	! r__r_t0
+LSYM(x81)	t0__9a0		! t0__9t0	! b_e_shift	! r__r_t0
+LSYM(x82)	t0__5a0		! t0__8t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x83)	t0__5a0		! t0__8t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x84)	t0__5a0		! t0__4t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x85)	t0__8a0		! t0__2t0_a0	! b_e_t0	! t0__5t0
+LSYM(x86)	t0__5a0		! t0__4t0_a0	! b_e_2t0	! t0__2t0_a0
+LSYM(x87)	t0__9a0		! t0__9t0	! b_e_t02a0	! t0__t0_4a0
+LSYM(x88)	t0__5a0		! t0__2t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x89)	t0__5a0		! t0__2t0_a0	! b_e_t0	! t0__8t0_a0
+LSYM(x90)	t0__9a0		! t0__5t0	! b_e_shift	! r__r_2t0
+LSYM(x91)	t0__9a0		! t0__5t0	! b_e_t0	! t0__2t0_a0
+LSYM(x92)	t0__5a0		! t0__2t0_a0	! b_e_4t0	! t0__2t0_a0
+LSYM(x93)	t0__32a0	! t0__t0ma0	! b_e_t0	! t0__3t0
+LSYM(x94)	t0__9a0		! t0__5t0	! b_e_2t0	! t0__t0_2a0
+LSYM(x95)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__5t0
+LSYM(x96)	t0__8a0		! t0__3t0	! b_e_shift	! r__r_4t0
+LSYM(x97)	t0__8a0		! t0__3t0	! b_e_t0	! t0__4t0_a0
+LSYM(x98)	t0__32a0	! t0__3t0	! b_e_t0	! t0__t0_2a0
+LSYM(x99)	t0__8a0		! t0__4t0_a0	! b_e_t0	! t0__3t0
+LSYM(x100)	t0__5a0		! t0__5t0	! b_e_shift	! r__r_4t0
+LSYM(x101)	t0__5a0		! t0__5t0	! b_e_t0	! t0__4t0_a0
+LSYM(x102)	t0__32a0	! t0__t0_2a0	! b_e_t0	! t0__3t0
+LSYM(x103)	t0__5a0		! t0__5t0	! b_e_t02a0	! t0__4t0_a0
+LSYM(x104)	t0__3a0		! t0__4t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x105)	t0__5a0		! t0__4t0_a0	! b_e_t0	! t0__5t0
+LSYM(x106)	t0__3a0		! t0__4t0_a0	! b_e_2t0	! t0__4t0_a0
+LSYM(x107)	t0__9a0		! t0__t0_4a0	! b_e_t02a0	! t0__8t0_a0
+LSYM(x108)	t0__9a0		! t0__3t0	! b_e_shift	! r__r_4t0
+LSYM(x109)	t0__9a0		! t0__3t0	! b_e_t0	! t0__4t0_a0
+LSYM(x110)	t0__9a0		! t0__3t0	! b_e_2t0	! t0__2t0_a0
+LSYM(x111)	t0__9a0		! t0__4t0_a0	! b_e_t0	! t0__3t0
+LSYM(x112)	t0__3a0		! t0__2t0_a0	! b_e_t0	! t0__16t0
+LSYM(x113)	t0__9a0		! t0__4t0_a0	! b_e_t02a0	! t0__3t0
+LSYM(x114)	t0__9a0		! t0__2t0_a0	! b_e_2t0	! t0__3t0
+LSYM(x115)	t0__9a0		! t0__2t0_a0	! b_e_2t0a0	! t0__3t0
+LSYM(x116)	t0__3a0		! t0__2t0_a0	! b_e_4t0	! t0__4t0_a0
+LSYM(x117)	t0__3a0		! t0__4t0_a0	! b_e_t0	! t0__9t0
+LSYM(x118)	t0__3a0		! t0__4t0_a0	! b_e_t0a0	! t0__9t0
+LSYM(x119)	t0__3a0		! t0__4t0_a0	! b_e_t02a0	! t0__9t0
+LSYM(x120)	t0__5a0		! t0__3t0	! b_e_shift	! r__r_8t0
+LSYM(x121)	t0__5a0		! t0__3t0	! b_e_t0	! t0__8t0_a0
+LSYM(x122)	t0__5a0		! t0__3t0	! b_e_2t0	! t0__4t0_a0
+LSYM(x123)	t0__5a0		! t0__8t0_a0	! b_e_t0	! t0__3t0
+LSYM(x124)	t0__32a0	! t0__t0ma0	! b_e_shift	! r__r_4t0
+LSYM(x125)	t0__5a0		! t0__5t0	! b_e_t0	! t0__5t0
+LSYM(x126)	t0__64a0	! t0__t0ma0	! b_e_shift	! r__r_2t0
+LSYM(x127)	t0__128a0	! a1_ne_0_b_l0	! t0__t0ma0	! b_n_ret_t0
+LSYM(x128)	t0__128a0	! a1_ne_0_b_l1	! r__r_t0	! MILLIRETN
+LSYM(x129)	t0__128a0	! a1_ne_0_b_l0	! t0__t0_a0	! b_n_ret_t0
+LSYM(x130)	t0__64a0	! t0__t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x131)	t0__8a0		! t0__8t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x132)	t0__8a0		! t0__4t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x133)	t0__8a0		! t0__4t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x134)	t0__8a0		! t0__4t0_a0	! b_e_2t0	! t0__2t0_a0
+LSYM(x135)	t0__9a0		! t0__5t0	! b_e_t0	! t0__3t0
+LSYM(x136)	t0__8a0		! t0__2t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x137)	t0__8a0		! t0__2t0_a0	! b_e_t0	! t0__8t0_a0
+LSYM(x138)	t0__8a0		! t0__2t0_a0	! b_e_2t0	! t0__4t0_a0
+LSYM(x139)	t0__8a0		! t0__2t0_a0	! b_e_2t0a0	! t0__4t0_a0
+LSYM(x140)	t0__3a0		! t0__2t0_a0	! b_e_4t0	! t0__5t0
+LSYM(x141)	t0__8a0		! t0__2t0_a0	! b_e_4t0a0	! t0__2t0_a0
+LSYM(x142)	t0__9a0		! t0__8t0	! b_e_2t0	! t0__t0ma0
+LSYM(x143)	t0__16a0	! t0__9t0	! b_e_t0	! t0__t0ma0
+LSYM(x144)	t0__9a0		! t0__8t0	! b_e_shift	! r__r_2t0
+LSYM(x145)	t0__9a0		! t0__8t0	! b_e_t0	! t0__2t0_a0
+LSYM(x146)	t0__9a0		! t0__8t0_a0	! b_e_shift	! r__r_2t0
+LSYM(x147)	t0__9a0		! t0__8t0_a0	! b_e_t0	! t0__2t0_a0
+LSYM(x148)	t0__9a0		! t0__4t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x149)	t0__9a0		! t0__4t0_a0	! b_e_t0	! t0__4t0_a0
+LSYM(x150)	t0__9a0		! t0__4t0_a0	! b_e_2t0	! t0__2t0_a0
+LSYM(x151)	t0__9a0		! t0__4t0_a0	! b_e_2t0a0	! t0__2t0_a0
+LSYM(x152)	t0__9a0		! t0__2t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x153)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__8t0_a0
+LSYM(x154)	t0__9a0		! t0__2t0_a0	! b_e_2t0	! t0__4t0_a0
+LSYM(x155)	t0__32a0	! t0__t0ma0	! b_e_t0	! t0__5t0
+LSYM(x156)	t0__9a0		! t0__2t0_a0	! b_e_4t0	! t0__2t0_a0
+LSYM(x157)	t0__32a0	! t0__t0ma0	! b_e_t02a0	! t0__5t0
+LSYM(x158)	t0__16a0	! t0__5t0	! b_e_2t0	! t0__t0ma0
+LSYM(x159)	t0__32a0	! t0__5t0	! b_e_t0	! t0__t0ma0
+LSYM(x160)	t0__5a0		! t0__4t0	! b_e_shift	! r__r_8t0
+LSYM(x161)	t0__8a0		! t0__5t0	! b_e_t0	! t0__4t0_a0
+LSYM(x162)	t0__9a0		! t0__9t0	! b_e_shift	! r__r_2t0
+LSYM(x163)	t0__9a0		! t0__9t0	! b_e_t0	! t0__2t0_a0
+LSYM(x164)	t0__5a0		! t0__8t0_a0	! b_e_shift	! r__r_4t0
+LSYM(x165)	t0__8a0		! t0__4t0_a0	! b_e_t0	! t0__5t0
+LSYM(x166)	t0__5a0		! t0__8t0_a0	! b_e_2t0	! t0__2t0_a0
+LSYM(x167)	t0__5a0		! t0__8t0_a0	! b_e_2t0a0	! t0__2t0_a0
+LSYM(x168)	t0__5a0		! t0__4t0_a0	! b_e_shift	! r__r_8t0
+LSYM(x169)	t0__5a0		! t0__4t0_a0	! b_e_t0	! t0__8t0_a0
+LSYM(x170)	t0__32a0	! t0__t0_2a0	! b_e_t0	! t0__5t0
+LSYM(x171)	t0__9a0		! t0__2t0_a0	! b_e_t0	! t0__9t0
+LSYM(x172)	t0__5a0		! t0__4t0_a0	! b_e_4t0	! t0__2t0_a0
+LSYM(x173)	t0__9a0		! t0__2t0_a0	! b_e_t02a0	! t0__9t0
+LSYM(x174)	t0__32a0	! t0__t0_2a0	! b_e_t04a0	! t0__5t0
+LSYM(x175)	t0__8a0		! t0__2t0_a0	! b_e_5t0	! t0__2t0_a0
+LSYM(x176)	t0__5a0		! t0__4t0_a0	! b_e_8t0	! t0__t0_a0
+LSYM(x177)	t0__5a0		! t0__4t0_a0	! b_e_8t0a0	! t0__t0_a0
+LSYM(x178)	t0__5a0		! t0__2t0_a0	! b_e_2t0	! t0__8t0_a0
+LSYM(x179)	t0__5a0		! t0__2t0_a0	! b_e_2t0a0	! t0__8t0_a0
+LSYM(x180)	t0__9a0		! t0__5t0	! b_e_shift	! r__r_4t0
+LSYM(x181)	t0__9a0		! t0__5t0	! b_e_t0	! t0__4t0_a0
+LSYM(x182)	t0__9a0		! t0__5t0	! b_e_2t0	! t0__2t0_a0
+LSYM(x183)	t0__9a0		! t0__5t0	! b_e_2t0a0	! t0__2t0_a0
+LSYM(x184)	t0__5a0		! t0__9t0	! b_e_4t0	! t0__t0_a0
+LSYM(x185)	t0__9a0		! t0__4t0_a0	! b_e_t0	! t0__5t0
+LSYM(x186)	t0__32a0	! t0__t0ma0	! b_e_2t0	! t0__3t0
+LSYM(x187)	t0__9a0		! t0__4t0_a0	! b_e_t02a0	! t0__5t0
+LSYM(x188)	t0__9a0		! t0__5t0	! b_e_4t0	! t0__t0_2a0
+LSYM(x189)	t0__5a0		! t0__4t0_a0	! b_e_t0	! t0__9t0
+LSYM(x190)	t0__9a0		! t0__2t0_a0	! b_e_2t0	! t0__5t0
+LSYM(x191)	t0__64a0	! t0__3t0	! b_e_t0	! t0__t0ma0
+LSYM(x192)	t0__8a0		! t0__3t0	! b_e_shift	! r__r_8t0
+LSYM(x193)	t0__8a0		! t0__3t0	! b_e_t0	! t0__8t0_a0
+LSYM(x194)	t0__8a0		! t0__3t0	! b_e_2t0	! t0__4t0_a0
+LSYM(x195)	t0__8a0		! t0__8t0_a0	! b_e_t0	! t0__3t0
+LSYM(x196)	t0__8a0		! t0__3t0	! b_e_4t0	! t0__2t0_a0
+LSYM(x197)	t0__8a0		! t0__3t0	! b_e_4t0a0	! t0__2t0_a0
+LSYM(x198)	t0__64a0	! t0__t0_2a0	! b_e_t0	! t0__3t0
+LSYM(x199)	t0__8a0		! t0__4t0_a0	! b_e_2t0a0	! t0__3t0
+LSYM(x200)	t0__5a0		! t0__5t0	! b_e_shift	! r__r_8t0
+LSYM(x201)	t0__5a0		! t0__5t0	! b_e_t0	! t0__8t0_a0
+LSYM(x202)	t0__5a0		! t0__5t0	! b_e_2t0	! t0__4t0_a0
+LSYM(x203)	t0__5a0		! t0__5t0	! b_e_2t0a0	! t0__4t0_a0
+LSYM(x204)	t0__8a0		! t0__2t0_a0	! b_e_4t0	! t0__3t0
+LSYM(x205)	t0__5a0		! t0__8t0_a0	! b_e_t0	! t0__5t0
+LSYM(x206)	t0__64a0	! t0__t0_4a0	! b_e_t02a0	! t0__3t0
+LSYM(x207)	t0__8a0		! t0__2t0_a0	! b_e_3t0	! t0__4t0_a0
+LSYM(x208)	t0__5a0		! t0__5t0	! b_e_8t0	! t0__t0_a0
+LSYM(x209)	t0__5a0		! t0__5t0	! b_e_8t0a0	! t0__t0_a0
+LSYM(x210)	t0__5a0		! t0__4t0_a0	! b_e_2t0	! t0__5t0
+LSYM(x211)	t0__5a0		! t0__4t0_a0	! b_e_2t0a0	! t0__5t0
+LSYM(x212)	t0__3a0		! t0__4t0_a0	! b_e_4t0	! t0__4t0_a0
+LSYM(x213)	t0__3a0		! t0__4t0_a0	! b_e_4t0a0	! t0__4t0_a0
+LSYM(x214)	t0__9a0		! t0__t0_4a0	! b_e_2t04a0	! t0__8t0_a0
+LSYM(x215)	t0__5a0		! t0__4t0_a0	! b_e_5t0	! t0__2t0_a0
+LSYM(x216)	t0__9a0		! t0__3t0	! b_e_shift	! r__r_8t0
+LSYM(x217)	t0__9a0		! t0__3t0	! b_e_t0	! t0__8t0_a0
+LSYM(x218)	t0__9a0		! t0__3t0	! b_e_2t0	! t0__4t0_a0
+LSYM(x219)	t0__9a0		! t0__8t0_a0	! b_e_t0	! t0__3t0
+LSYM(x220)	t0__3a0		! t0__9t0	! b_e_4t0	! t0__2t0_a0
+LSYM(x221)	t0__3a0		! t0__9t0	! b_e_4t0a0	! t0__2t0_a0
+LSYM(x222)	t0__9a0		! t0__4t0_a0	! b_e_2t0	! t0__3t0
+LSYM(x223)	t0__9a0		! t0__4t0_a0	! b_e_2t0a0	! t0__3t0
+LSYM(x224)	t0__9a0		! t0__3t0	! b_e_8t0	! t0__t0_a0
+LSYM(x225)	t0__9a0		! t0__5t0	! b_e_t0	! t0__5t0
+LSYM(x226)	t0__3a0		! t0__2t0_a0	! b_e_t02a0	! t0__32t0
+LSYM(x227)	t0__9a0		! t0__5t0	! b_e_t02a0	! t0__5t0
+LSYM(x228)	t0__9a0		! t0__2t0_a0	! b_e_4t0	! t0__3t0
+LSYM(x229)	t0__9a0		! t0__2t0_a0	! b_e_4t0a0	! t0__3t0
+LSYM(x230)	t0__9a0		! t0__5t0	! b_e_5t0	! t0__t0_a0
+LSYM(x231)	t0__9a0		! t0__2t0_a0	! b_e_3t0	! t0__4t0_a0
+LSYM(x232)	t0__3a0		! t0__2t0_a0	! b_e_8t0	! t0__4t0_a0
+LSYM(x233)	t0__3a0		! t0__2t0_a0	! b_e_8t0a0	! t0__4t0_a0
+LSYM(x234)	t0__3a0		! t0__4t0_a0	! b_e_2t0	! t0__9t0
+LSYM(x235)	t0__3a0		! t0__4t0_a0	! b_e_2t0a0	! t0__9t0
+LSYM(x236)	t0__9a0		! t0__2t0_a0	! b_e_4t08a0	! t0__3t0
+LSYM(x237)	t0__16a0	! t0__5t0	! b_e_3t0	! t0__t0ma0
+LSYM(x238)	t0__3a0		! t0__4t0_a0	! b_e_2t04a0	! t0__9t0
+LSYM(x239)	t0__16a0	! t0__5t0	! b_e_t0ma0	! t0__3t0
+LSYM(x240)	t0__9a0		! t0__t0_a0	! b_e_8t0	! t0__3t0
+LSYM(x241)	t0__9a0		! t0__t0_a0	! b_e_8t0a0	! t0__3t0
+LSYM(x242)	t0__5a0		! t0__3t0	! b_e_2t0	! t0__8t0_a0
+LSYM(x243)	t0__9a0		! t0__9t0	! b_e_t0	! t0__3t0
+LSYM(x244)	t0__5a0		! t0__3t0	! b_e_4t0	! t0__4t0_a0
+LSYM(x245)	t0__8a0		! t0__3t0	! b_e_5t0	! t0__2t0_a0
+LSYM(x246)	t0__5a0		! t0__8t0_a0	! b_e_2t0	! t0__3t0
+LSYM(x247)	t0__5a0		! t0__8t0_a0	! b_e_2t0a0	! t0__3t0
+LSYM(x248)	t0__32a0	! t0__t0ma0	! b_e_shift	! r__r_8t0
+LSYM(x249)	t0__32a0	! t0__t0ma0	! b_e_t0	! t0__8t0_a0
+LSYM(x250)	t0__5a0		! t0__5t0	! b_e_2t0	! t0__5t0
+LSYM(x251)	t0__5a0		! t0__5t0	! b_e_2t0a0	! t0__5t0
+LSYM(x252)	t0__64a0	! t0__t0ma0	! b_e_shift	! r__r_4t0
+LSYM(x253)	t0__64a0	! t0__t0ma0	! b_e_t0	! t0__4t0_a0
+LSYM(x254)	t0__128a0	! t0__t0ma0	! b_e_shift	! r__r_2t0
+LSYM(x255)	t0__256a0	! a1_ne_0_b_l0	! t0__t0ma0	! b_n_ret_t0
+/*1040 insts before this.  */
+LSYM(ret_t0)	MILLIRET
+LSYM(e_t0)	r__r_t0
+LSYM(e_shift)	a1_ne_0_b_l2
+	a0__256a0	/* a0 <<= 8 *********** */
+	MILLIRETN
+LSYM(e_t0ma0)	a1_ne_0_b_l0
+	t0__t0ma0
+	MILLIRET
+	r__r_t0
+LSYM(e_t0a0)	a1_ne_0_b_l0
+	t0__t0_a0
+	MILLIRET
+	r__r_t0
+LSYM(e_t02a0)	a1_ne_0_b_l0
+	t0__t0_2a0
+	MILLIRET
+	r__r_t0
+LSYM(e_t04a0)	a1_ne_0_b_l0
+	t0__t0_4a0
+	MILLIRET
+	r__r_t0
+LSYM(e_2t0)	a1_ne_0_b_l1
+	r__r_2t0
+	MILLIRETN
+LSYM(e_2t0a0)	a1_ne_0_b_l0
+	t0__2t0_a0
+	MILLIRET
+	r__r_t0
+LSYM(e2t04a0)	t0__t0_2a0
+	a1_ne_0_b_l1
+	r__r_2t0
+	MILLIRETN
+LSYM(e_3t0)	a1_ne_0_b_l0
+	t0__3t0
+	MILLIRET
+	r__r_t0
+LSYM(e_4t0)	a1_ne_0_b_l1
+	r__r_4t0
+	MILLIRETN
+LSYM(e_4t0a0)	a1_ne_0_b_l0
+	t0__4t0_a0
+	MILLIRET
+	r__r_t0
+LSYM(e4t08a0)	t0__t0_2a0
+	a1_ne_0_b_l1
+	r__r_4t0
+	MILLIRETN
+LSYM(e_5t0)	a1_ne_0_b_l0
+	t0__5t0
+	MILLIRET
+	r__r_t0
+LSYM(e_8t0)	a1_ne_0_b_l1
+	r__r_8t0
+	MILLIRETN
+LSYM(e_8t0a0)	a1_ne_0_b_l0
+	t0__8t0_a0
+	MILLIRET
+	r__r_t0
+
+	.procend
+	.end
+#endif
diff --git a/gcc-4.9/libgcc/config/pa/quadlib.c b/gcc-4.9/libgcc/config/pa/quadlib.c
new file mode 100644
index 000000000..eea4b516f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/quadlib.c
@@ -0,0 +1,245 @@
+/* Subroutines for long double support.
+   Copyright (C) 2000-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* HPUX TFmode compare requires a library call to _U_Qfcmp.  It takes
+   a magic number as its third argument which indicates what to do.
+   The return value is an integer to be compared against zero.  The
+   comparison conditions are the same as those listed in Table 8-12
+   of the PA-RISC 2.0 Architecture book for the fcmp instruction.  */
+
+/* Raise FP_INVALID on SNaN as a side effect.  */
+#define QCMP_INV 1
+
+/* Comparison relations.  */
+#define QCMP_UNORD 2
+#define QCMP_EQ 4
+#define QCMP_LT 8
+#define QCMP_GT 16
+
+int _U_Qfcmp (long double a, long double b, int);
+long _U_Qfcnvfxt_quad_to_sgl (long double);
+
+int _U_Qfeq (long double, long double);
+int _U_Qfne (long double, long double);
+int _U_Qfgt (long double, long double);
+int _U_Qfge (long double, long double);
+int _U_Qflt (long double, long double);
+int _U_Qfle (long double, long double);
+int _U_Qfltgt (long double, long double);
+int _U_Qfunle (long double, long double);
+int _U_Qfunlt (long double, long double);
+int _U_Qfunge (long double, long double);
+int _U_Qfungt (long double, long double);
+int _U_Qfuneq (long double, long double);
+int _U_Qfunord (long double, long double);
+int _U_Qford (long double, long double);
+
+int _U_Qfcomp (long double, long double);
+
+long double _U_Qfneg (long double);
+long double _U_Qfcopysign (long double, long double);
+
+#ifdef __LP64__
+int __U_Qfcnvfxt_quad_to_sgl (long double);
+#endif
+unsigned int _U_Qfcnvfxt_quad_to_usgl(long double);
+long double _U_Qfcnvxf_usgl_to_quad (unsigned int);
+unsigned long long _U_Qfcnvfxt_quad_to_udbl(long double);
+long double _U_Qfcnvxf_udbl_to_quad (unsigned long long);
+
+int
+_U_Qfeq (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_EQ) != 0);
+}
+
+int
+_U_Qfne (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_EQ) == 0);
+}
+	
+int
+_U_Qfgt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_GT) != 0);
+}
+
+int
+_U_Qfge (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_EQ | QCMP_GT) != 0);
+}
+
+int
+_U_Qflt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_LT) != 0);
+}
+
+int
+_U_Qfle (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_EQ | QCMP_LT) != 0);
+}
+
+int
+_U_Qfltgt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_LT | QCMP_GT) != 0);
+}
+
+int
+_U_Qfunle (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD | QCMP_EQ | QCMP_LT) != 0);
+}
+
+int
+_U_Qfunlt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD | QCMP_LT) != 0);
+}
+
+int
+_U_Qfunge (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD | QCMP_EQ | QCMP_GT) != 0);
+}
+
+int
+_U_Qfungt (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD | QCMP_GT) != 0);
+}
+
+int
+_U_Qfuneq (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD | QCMP_EQ) != 0);
+}
+
+int
+_U_Qfunord (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_UNORD) != 0);
+}
+
+int
+_U_Qford (long double a, long double b)
+{
+  return (_U_Qfcmp (a, b, QCMP_INV | QCMP_EQ | QCMP_LT | QCMP_GT) != 0);
+}
+
+int
+_U_Qfcomp (long double a, long double b)
+{
+  if (_U_Qfcmp (a, b, QCMP_EQ) == 0)
+    return 0;
+
+  return (_U_Qfcmp (a, b, QCMP_UNORD | QCMP_EQ | QCMP_GT) != 0 ? 1 : -1);
+}
+
+/* Negate long double A.  */
+long double
+_U_Qfneg (long double a)
+{
+  union
+   {
+     long double ld;
+     int i[4];
+   } u;
+
+  u.ld = a;
+  u.i[0] ^= 0x80000000;
+  return u.ld;
+}
+
+/* Return long double A with sign changed to sign of long double B.  */
+long double
+_U_Qfcopysign (long double a, long double b)
+{
+  union
+   {
+     long double ld;
+     int i[4];
+   } ua, ub;
+
+  ua.ld = a;
+  ub.ld = b;
+  ua.i[0] &= 0x7fffffff;
+  ua.i[0] |= (0x80000000 & ub.i[0]);
+  return ua.ld;
+}
+
+#ifdef __LP64__
+/* This routine is only necessary for the PA64 port; for reasons unknown
+   _U_Qfcnvfxt_quad_to_sgl returns the integer in the high 32bits of the
+   return value.  Ugh.  */
+int
+__U_Qfcnvfxt_quad_to_sgl (long double a)
+{
+  return _U_Qfcnvfxt_quad_to_sgl (a) >> 32;
+}
+#endif
+
+/* HP only has signed conversion in the C library, so need to synthesize
+   unsigned versions.  */
+unsigned int
+_U_Qfcnvfxt_quad_to_usgl (long double a)
+{
+  extern long long _U_Qfcnvfxt_quad_to_dbl (long double a);
+  return (unsigned int) _U_Qfcnvfxt_quad_to_dbl (a);
+}
+
+long double
+_U_Qfcnvxf_usgl_to_quad (unsigned int a)
+{
+  extern long double _U_Qfcnvxf_dbl_to_quad (long long);
+  return _U_Qfcnvxf_dbl_to_quad ((long long) a);
+}
+
+typedef union {
+    unsigned long long u[2];
+    long double d[1];
+} quad_type;
+
+unsigned long long
+_U_Qfcnvfxt_quad_to_udbl (long double a)
+{
+  extern quad_type _U_Qfcnvfxt_quad_to_quad (long double a);
+  quad_type u;
+  u = _U_Qfcnvfxt_quad_to_quad(a);
+  return u.u[1];
+}
+
+long double
+_U_Qfcnvxf_udbl_to_quad (unsigned long long a)
+{
+  extern long double _U_Qfcnvxf_quad_to_quad (quad_type a);
+  quad_type u;
+  u.u[0] = 0;
+  u.u[1] = a;
+  return _U_Qfcnvxf_quad_to_quad (u);
+}
diff --git a/gcc-4.9/libgcc/config/pa/stublib.c b/gcc-4.9/libgcc/config/pa/stublib.c
new file mode 100644
index 000000000..31ae61767
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/stublib.c
@@ -0,0 +1,117 @@
+/* Stub functions.
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "tsystem.h"
+
+#ifdef L_register_frame_info
+struct object;
+void  __register_frame_info (const void *, struct object *);
+void
+__register_frame_info (__attribute__((unused)) const void *p,
+		       __attribute__((unused)) struct object *ob)
+{
+}
+#endif
+
+#ifdef L_deregister_frame_info
+void *__deregister_frame_info (const void *);
+void *
+__deregister_frame_info (__attribute__((unused)) const void *p)
+{
+  return (void *)0;
+}
+#endif
+
+#ifdef L_ITM_registerTMCloneTable
+struct object;
+void  _ITM_registerTMCloneTable (const void *, size_t);
+void
+_ITM_registerTMCloneTable (__attribute__((unused)) const void *p,
+			   __attribute__((unused)) size_t s)
+{
+}
+#endif
+
+#ifdef L_ITM_deregisterTMCloneTable
+void _ITM_deregisterTMCloneTable (const void *);
+void
+_ITM_deregisterTMCloneTable (__attribute__((unused)) const void *p)
+{
+}
+#endif
+
+#ifdef L_cxa_finalize
+void __cxa_finalize (void *);
+void
+__cxa_finalize (__attribute__((unused)) void *p)
+{
+}
+#endif
+
+#ifdef L_Jv_RegisterClasses
+void _Jv_RegisterClasses (void *);
+void
+_Jv_RegisterClasses (__attribute__((unused)) void *p)
+{
+}
+#endif
+
+#ifdef L_pthread_default_stacksize_np
+int pthread_default_stacksize_np (unsigned long, unsigned long *);
+int
+pthread_default_stacksize_np (__attribute__((unused)) unsigned long new,
+			      unsigned long *old)
+{
+  if (old)
+    *old = 0;
+  return 0;
+}
+#endif
+
+#ifdef L_pthread_mutex_lock
+int pthread_mutex_lock (void);
+int
+pthread_mutex_lock (void)
+{
+  return 0;
+}
+#endif
+
+#ifdef L_pthread_mutex_unlock
+int pthread_mutex_unlock (void);
+int
+pthread_mutex_unlock (void)
+{
+  return 0;
+}
+#endif
+
+#ifdef L_pthread_once
+int pthread_once (void);
+int
+pthread_once (void)
+{
+  return 0;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/pa/t-hpux b/gcc-4.9/libgcc/config/pa/t-hpux
new file mode 100644
index 000000000..fcf93aba3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-hpux
@@ -0,0 +1,3 @@
+LIB2ADD = $(srcdir)/config/pa/lib2funcs.S $(srcdir)/config/pa/quadlib.c
+
+HOST_LIBGCC2_CFLAGS += -frandom-seed=fixed-seed
diff --git a/gcc-4.9/libgcc/config/pa/t-hpux10 b/gcc-4.9/libgcc/config/pa/t-hpux10
new file mode 100644
index 000000000..5620f314a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-hpux10
@@ -0,0 +1 @@
+HOST_LIBGCC2_CFLAGS += -D_T_HPUX10
diff --git a/gcc-4.9/libgcc/config/pa/t-linux b/gcc-4.9/libgcc/config/pa/t-linux
new file mode 100644
index 000000000..2157de9b0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-linux
@@ -0,0 +1,10 @@
+#Plug millicode routines into libgcc.a  We want these on both native and
+#cross compiles.  We use the "64-bit" routines because the "32-bit" code
+#is broken for certain corner cases.
+LIB1ASMSRC = pa/milli64.S
+LIB1ASMFUNCS = _divI _divU _remI _remU _div_const _mulI _dyncall
+
+HOST_LIBGCC2_CFLAGS += -DELF=1 -DLINUX=1
+
+LIB2ADD = $(srcdir)/config/pa/fptr.c
+LIB2ADD_ST = $(srcdir)/config/pa/linux-atomic.c
diff --git a/gcc-4.9/libgcc/config/pa/t-linux64 b/gcc-4.9/libgcc/config/pa/t-linux64
new file mode 100644
index 000000000..1d0a6ada1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-linux64
@@ -0,0 +1,8 @@
+# Plug millicode routines into libgcc.a  We want these on both native and
+# cross compiles.
+# FIXME: Explain.
+LIB1ASMFUNCS := $(filter-out _dyncall, $(LIB1ASMFUNCS))
+
+LIB2ADD_ST = $(srcdir)/config/pa/linux-atomic.c
+
+HOST_LIBGCC2_CFLAGS += -Dpa64=1 -DELF=1
diff --git a/gcc-4.9/libgcc/config/pa/t-openbsd b/gcc-4.9/libgcc/config/pa/t-openbsd
new file mode 100644
index 000000000..8b99068ce
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-openbsd
@@ -0,0 +1,9 @@
+#Plug millicode routines into libgcc.a  We want these on both native and
+#cross compiles.  We use the "64-bit" routines because the "32-bit" code
+#is broken for certain corner cases.
+LIB1ASMSRC = pa/milli64.S
+LIB1ASMFUNCS = _divI _divU _remI _remU _div_const _mulI _dyncall
+
+HOST_LIBGCC2_CFLAGS += -DELF=1 -DLINUX=1
+
+LIB2ADD = $(srcdir)/config/pa/fptr.c
diff --git a/gcc-4.9/libgcc/config/pa/t-pa64 b/gcc-4.9/libgcc/config/pa/t-pa64
new file mode 100644
index 000000000..98f28edb1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-pa64
@@ -0,0 +1,3 @@
+LIB2ADD = $(srcdir)/config/pa/quadlib.c
+
+HOST_LIBGCC2_CFLAGS += -Dpa64=1 -DELF=1 -mlong-calls
diff --git a/gcc-4.9/libgcc/config/pa/t-slibgcc-dwarf-ver b/gcc-4.9/libgcc/config/pa/t-slibgcc-dwarf-ver
new file mode 100644
index 000000000..fa4688d69
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-slibgcc-dwarf-ver
@@ -0,0 +1,3 @@
+# Set the version number of the shared libgcc library (DWARF2 EH).
+
+SHLIB_SOVERSION = 4
diff --git a/gcc-4.9/libgcc/config/pa/t-slibgcc-hpux b/gcc-4.9/libgcc/config/pa/t-slibgcc-hpux
new file mode 100644
index 000000000..8d6769192
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-slibgcc-hpux
@@ -0,0 +1,24 @@
+# Copyright (C) 2001-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build a shared libgcc library with the HP-UX linker on PA.
+
+SHLIB_EXT = .sl
+SHLIB_SOLINK = @shlib_base_name@$(SHLIB_EXT)
+SHLIB_SONAME = @shlib_base_name@.$(SHLIB_SOVERSION)
+SHLIB_LC =
diff --git a/gcc-4.9/libgcc/config/pa/t-slibgcc-sjlj-ver b/gcc-4.9/libgcc/config/pa/t-slibgcc-sjlj-ver
new file mode 100644
index 000000000..00140cf20
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-slibgcc-sjlj-ver
@@ -0,0 +1,3 @@
+# Set the version number of the shared libgcc library (SJLJ EH).
+
+SHLIB_SOVERSION = 3
diff --git a/gcc-4.9/libgcc/config/pa/t-stublib b/gcc-4.9/libgcc/config/pa/t-stublib
new file mode 100644
index 000000000..8004c1e46
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pa/t-stublib
@@ -0,0 +1,41 @@
+LIBGCCSTUB_OBJS = rfi-stub.o dfi-stub.o ritm-stub.o ditm-stub.o \
+	jvrc-stub.o cxaf-stub.o \
+	pthread_default_stacksize_np-stub.o \
+	pthread_mutex_lock-stub.o \
+	pthread_mutex_unlock-stub.o \
+	pthread_once-stub.o
+
+rfi-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_register_frame_info $<
+
+dfi-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_deregister_frame_info $<
+
+ritm-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_ITM_registerTMCloneTable $<
+
+ditm-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_ITM_deregisterTMCloneTable $<
+
+cxaf-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_cxa_finalize $<
+
+jvrc-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_Jv_RegisterClasses $<
+
+pthread_default_stacksize_np-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_pthread_default_stacksize_np $<
+
+pthread_mutex_lock-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_pthread_mutex_lock $<
+
+pthread_mutex_unlock-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_pthread_mutex_unlock $<
+
+pthread_once-stub.o: $(srcdir)/config/pa/stublib.c
+	$(gcc_compile) -c -O2 -DL_pthread_once $<
+
+libgcc_stub.a: $(LIBGCCSTUB_OBJS)
+	-rm -rf $@
+	$(AR) rc $@ $(LIBGCCSTUB_OBJS)
+	$(RANLIB) $@
diff --git a/gcc-4.9/libgcc/config/pdp11/t-pdp11 b/gcc-4.9/libgcc/config/pdp11/t-pdp11
new file mode 100644
index 000000000..7cadae11a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/pdp11/t-pdp11
@@ -0,0 +1,8 @@
+LIB2ADD = $(srcdir)/udivmod.c \
+	  $(srcdir)/udivmodsi4.c \
+	  $(srcdir)/memcmp.c \
+	  $(srcdir)/memcpy.c \
+	  $(srcdir)/memmove.c \
+	  $(srcdir)/memset.c
+
+HOST_LIBGCC2_CFLAGS += -O2 -mfloat32
diff --git a/gcc-4.9/libgcc/config/picochip/adddi3.S b/gcc-4.9/libgcc/config/picochip/adddi3.S
new file mode 100644
index 000000000..1e79c798a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/adddi3.S
@@ -0,0 +1,194 @@
+// picoChip ASM file
+//
+//   Support for 64-bit addition.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.align 8		
+.global __adddi3
+__adddi3:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &__adddi3 = 12 bytes
+
+        // The first operand of add is completely in registers r[2-5]
+        // The second operand of sub is in stack FP(0-3)
+        // and result need to be written pointed to by the register r0.
+        // All we need to do is to load the appropriate values, add them
+        // appropriately (with add or addc ) and then store the values back.
+
+	ldw (FP)0, r1
+	stl r[7:6], (FP)-1
+	add.0 r2, r1, r6
+	ldw (FP)1, r1
+	addc.0 r3, r1, r7
+	ldl (FP)1, r[3:2]
+	stl r[7:6], (r0)0
+	addc.0 r4, r2, r6
+	addc.0 r5, r3, r7
+	stl r[7:6], (r0)1
+	jr (r12)
+=->	ldl (FP)-1, r[7:6]
+
+_picoMark_FUNCTION_END=
+
+// picoChip Function Epilogue : __adddi3
+	
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0xe	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#61# 16#64# 16#64# 16#63# 16#69# 16#33# 16#0# // Function name `_adddi3'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
diff --git a/gcc-4.9/libgcc/config/picochip/ashlsi3.S b/gcc-4.9/libgcc/config/picochip/ashlsi3.S
new file mode 100644
index 000000000..40f4a28a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/ashlsi3.S
@@ -0,0 +1,193 @@
+// picoChip ASM file
+// picoChip ASM file
+//
+//   Support for 32-bit arithmetic shift left.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.global ___ashlsi3
+___ashlsi3:
+_picoMark_FUNCTION_BEGIN=
+// picoChip Function Prologue : &___ashlsi3 = 0 bytes
+
+	// if (R2 > 15) goto _L2
+	SUB.0 15,R2,r15
+	JMPLT _L2
+=->	SUB.0 16,R2,R5   // R5 := R5 - R4 (HI)
+
+	LSL.0 R1,R2,R1    // R3 := R1 << R2
+	LSL.0 R0,R2,R4    // R2 := R0 << R2
+
+	LSR.0 R0,R5,R5 // R5 := R12 >> R5 NEED TO CHECK - HARI
+	OR.0 R5,R1,R5 // R3 := R5 IOR R0 (HI)
+	SUB.0 R2,0,r15  
+	COPYNE R5,R1
+	JR (R12)	// Return to caller 
+=->	COPY.0 R4,R0
+
+_L2:
+	LSL.0 R0,R2,R1  // R3 := R0 << R2
+	JR (R12)	// Return to caller 
+=->	COPY.0 0,R0	// R2 := 0 (short constant)
+
+_picoMark_FUNCTION_END=
+
+// picoChip Function Epilogue : __ashlsi3
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#61# 16#73# 16#68# 16#6c# 16#73# 16#69# 16#33# 16#0# // Function name `_ashlsi3'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
diff --git a/gcc-4.9/libgcc/config/picochip/ashlsi3.c b/gcc-4.9/libgcc/config/picochip/ashlsi3.c
new file mode 100644
index 000000000..74344cd2a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/ashlsi3.c
@@ -0,0 +1,82 @@
+/*
+
+picoChip GCC support for 32-bit shift left.
+
+Copyright (C) 2003-2014 Free Software Foundation, Inc.
+Contributed by Picochip Ltd.
+Maintained by Daniel Towner (daniel.towner@picochip.com)
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef PICOCHIP
+#error "Intended for compilation for PICOCHIP only."
+#endif
+
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+
+typedef struct USIstruct {
+  UHItype low, high;
+} USIstruct;
+
+typedef union USIunion {
+  USItype l;
+  USIstruct s;
+} USIunion;
+
+USItype __ashlsi3(USIunion value, HItype count) {
+  USIunion result;
+  int temp;
+
+  /* Ignore a zero count until we get into the (count < 16)
+     clause. This is slightly slower when shifting by zero, but faster
+     and smaller in all other cases (due to the better scheduling
+     opportunities available by putting the test near computational
+     instructions. */
+  /* if (count == 0) return value.l; */
+
+  if (count < 16) {
+    /* Shift low and high words by the count. */
+    result.s.low = value.s.low << count;
+    result.s.high = value.s.high << count;
+     
+    /* There is now a hole in the lower `count' bits of the high
+       word. Shift the upper `count' bits of the low word into the
+       high word. This is only required when the count is non-zero. */
+    if (count != 0) {
+      temp = 16 - count;
+      temp = value.s.low >> temp;
+      result.s.high |= temp;
+    }
+  
+  } else {
+    /* Shift the lower word of the source into the upper word of the
+       result, and zero the result's lower word. */
+    count -= 16;
+    result.s.high = value.s.low << count;
+    result.s.low = 0;
+
+  }
+
+  return result.l;
+
+}
+
diff --git a/gcc-4.9/libgcc/config/picochip/ashrsi3.S b/gcc-4.9/libgcc/config/picochip/ashrsi3.S
new file mode 100644
index 000000000..7e4048934
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/ashrsi3.S
@@ -0,0 +1,202 @@
+// picoChip ASM file
+//
+//   Support for 32-bit arithmetic shift right.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.global ___ashrsi3
+___ashrsi3:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &___ashrsi3 = 0 bytes
+
+	// if (R2 > 15) goto _L2
+	SUB.0 15,R2,r15
+	JMPLT _L2
+=->	COPY.0 R1,R3
+
+	LSR.0 R1,R2,R1 // R1 := R1 >> R2
+	// if (R2 == 0) goto _L4
+	SUB.0 R2,0,r15
+	JMPEQ _L4
+=->	LSR.0 R0,R2,R0 // R2 := R0 >> R2
+
+	SUB.0 16,R2,R4 // R4 := R4 - R2 (HI)
+	ASR.0 R3,15,R5	// R5 = R1 >>{arith} 15
+	LSL.0 R5,R4,R5 // R5 := R5 << R4
+	LSL.0 R3,R4,R4 // R4 := R1 << R4
+	OR.0 R5,R1,R1 // R3 := R5 IOR R3 (HI)
+	BRA _L4
+	=->	OR.0 R4,R0,R0 // R2 := R4 IOR R0 (HI)
+_L2:
+	ASR.0 R1,15,R1	// R4 = R1 >>{arith} 15
+	SUB.0 16,R2,R5  // R5 := R5 - R2 (HI)
+	LSR.0 R3,R2,R0 // R2 := R1 >> R2
+	LSL.0 R1,R5,R5 // R5 := R4 << R5
+	OR.0 R5,R0,R5 // R2 := R5 IOR R2 (HI)
+	SUB.0 R2,16,r15  // R5 := R5 - R2 (HI)
+	COPYNE R5,R0
+_L4:
+	JR (R12)	// Return to caller 
+
+_picoMark_FUNCTION_END=
+
+// picoChip Function Epilogue : __ashrsi3
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#61# 16#73# 16#68# 16#72# 16#73# 16#69# 16#33# 16#0# // Function name `_ashrsi3'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/ashrsi3.c b/gcc-4.9/libgcc/config/picochip/ashrsi3.c
new file mode 100644
index 000000000..72987ec18
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/ashrsi3.c
@@ -0,0 +1,113 @@
+/*
+
+picoChip GCC support for 32-bit arithmetic shift right.
+
+Copyright (C) 2003-2014 Free Software Foundation, Inc.
+Contributed by Picochip Ltd.
+Maintained by Daniel Towner (daniel.towner@picochip.com)
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+
+typedef struct USIstruct {
+  UHItype low, high;
+} USIstruct;
+
+typedef union USIunion {
+  USItype l;
+  USIstruct s;
+} USIunion;
+
+USItype __ashrsi3(USIunion value, HItype count) {
+  USIunion result;
+  int temp;
+  int wordOfSignBits;
+
+  /* Ignore a zero count until we get into the (count < 16)
+     clause. This is slightly slower when shifting by zero, but faster
+     and smaller in all other cases (due to the better scheduling
+     opportunities available by putting the test near computational
+     instructions. */
+  /* if (count == 0) return value.l; */
+  
+  if (count < 16) {
+    /* Shift low and high words by the count. The high word must use
+       an arithmetic shift. There is no arithmetic shift-right by
+       variable, so synthesise it. */
+    int signWord;
+    int reverseCount;
+
+    /* Shift low and high parts by the count. The upper word now has
+       invalid signed bits. */
+    result.s.low = value.s.low >> count;
+    result.s.high = value.s.high >> count;
+
+    if (count != 0) {
+
+      reverseCount = 16 - count;
+  
+      /* Given a word of sign bits, shift back left to create the
+	 destination sign bits. */
+      wordOfSignBits = __builtin_asri(value.s.high, 15);
+      signWord = wordOfSignBits << reverseCount;
+      result.s.high |= signWord;
+     
+      /* There is now a hole in the upper `count' bits of the low
+	 word. Shift the lower `count' bits of the upper word into the
+	 low word. */
+      temp = value.s.high << reverseCount;
+      result.s.low |= temp;
+    }
+
+  } else {
+    int signWord;
+
+    /* Shift is greater than one word, so top word will always be set
+       to sign bits, and bottom word will be shifted from top word. */
+    result.s.low = value.s.high >> count;
+    result.s.high = __builtin_asri(value.s.high, 15);
+
+    if (count != 16) {
+
+      /* Shift the upper word of the source into the lower word of the
+	 result. Arithmetically shift the upper word as well, to retain
+	 the sign. This shift must be synthesised, as no such shift
+	 exists in the instruction set. */
+      int signWord;
+ 
+
+      /* Given a complete word of sign-bits, shift this back left to
+	 create the destination sign bits. */
+      signWord = result.s.high << (16 - count);
+      //      signWord = wordOfSignBits << (16 - count);
+
+      /* Insert the sign bits to the result's low word. */
+      result.s.low |= signWord;
+
+    }
+
+  }
+
+  return result.l;
+
+}
diff --git a/gcc-4.9/libgcc/config/picochip/clzsi2.S b/gcc-4.9/libgcc/config/picochip/clzsi2.S
new file mode 100644
index 000000000..c127a02f1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/clzsi2.S
@@ -0,0 +1,189 @@
+// Copyright (C) 2008-2014 Free Software Foundation, Inc.
+//
+// This file is part of GCC.
+//
+// GCC is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 3, or (at your option) any later
+// version.
+//
+// GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+//
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+// picoChip ASM file
+//.file "clzsi2.S"
+
+.section .text
+
+.global __clzsi2
+__clzsi2:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &__clzsi2 = 0 bytes
+
+	// What value should be operated on? If the top word is empty
+	// then count the bits in the bottom word, and add 16. If the
+	// top word is not empty, then count the bits in the top word.
+
+	// R4 stores the constant 0
+
+	sub.0 R1,0,r15 \ copy.1 16,r2
+	copyeq r0,r1
+	copyne 0,r2
+
+	// R1 now stores value to count, and R2 stores current bit offset.
+	sbc r1,r0
+	asr.0 r1,15,r15 \ add.1 r0,1,r0
+	jr (lr) \ copyne 0,r0
+=->	add.0 r0,r2,r0
+
+_picoMark_FUNCTION_END=
+
+// picoChip Function Epilogue : __clzsi2
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5F# 16#63# 16#6C# 16#7A# 16#73# 16#69# 16#32# 16#0# // Function name `_clzsi2'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/cmpsi2.S b/gcc-4.9/libgcc/config/picochip/cmpsi2.S
new file mode 100644
index 000000000..ebec58828
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/cmpsi2.S
@@ -0,0 +1,212 @@
+// picoChip ASM file
+//.file "ucmpsi2.c"
+//
+//   Support for 32-bit signed compare.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+// Compiled from the following, and then hand optimised.
+//
+// int __cmpsi2 (USItype x, USItype y)
+// {
+//
+//   SIunion lx; lx.l = x;
+//   SIunion ly; ly.l = y;
+//
+//   if (lx.s.high < ly.s.high)
+//     return 0;
+//   else if (lx.s.high > ly.s.high)
+//     return 2;
+//   if (lx.s.low < ly.s.low)
+//     return 0;
+//   else if (lx.s.low > ly.s.low)
+//     return 2;
+//   return 1;
+// }
+	
+.section .text
+
+.align 8
+.global ___cmpsi2
+___cmpsi2:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &___cmpsi2 = 0 bytes
+
+	SUB.0 R1,R3,r15
+
+        BLT _L1
+=->     SUB.0 R3,R1,r15 \ COPY.1 0,R5
+
+        BLT _L1
+=->     SUB.0 R0,R2,r15 \ COPY.1 2,R5
+
+        BLO _L1
+=->     SUB.0 R2,R0,r15 \ COPY.1 0,R5
+
+        BLO _L1
+=->	COPY.0 2,R5
+	
+        COPY.0 1,R5
+_L1:
+	JR (R12)
+=->     COPY.0 R5,R0
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __cmpsi2
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#5f# 16#63# 16#6d# 16#70# 16#73# 16#69# 16#32# 16#0# // Function name `__cmpsi2'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/divmod15.S b/gcc-4.9/libgcc/config/picochip/divmod15.S
new file mode 100644
index 000000000..487b1546f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/divmod15.S
@@ -0,0 +1,261 @@
+// picoChip ASM file
+//
+//   Support for 16-bit unsigned division/modulus.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+	
+.section .text
+
+.global __divmod15
+__divmod15:
+_picoMark_FUNCTION_BEGIN=
+	
+// picoChip Function Prologue : &__divmod15 = 0 bytes
+
+	// The picoChip instruction set has a divstep instruction which
+	// is used to perform one iteration of a binary division algorithm.
+	// The instruction allows 16-bit signed division to be implemented.
+	// It does not directly allow 16-bit unsigned division to be
+	// implemented. Thus, this function pulls out the common division
+	// iteration for 15-bits unsigned, and then special wrappers
+	// provide the logic to change this into a 16-bit signed or
+	// unsigned division, as appropriate. This allows the two
+	// versions of division to share a common implementation, reducing
+	// code size when the two are used together. It also reduces
+	// the maintenance overhead.
+
+	// Input:
+	//	r0 - dividend
+	//	r1 - divisor
+	// Output:
+	//	r0 - quotient
+	//	r1 - remainder
+	// R5 is unused
+	
+	// Check for special cases. The emphasis is on detecting these as
+	// quickly as possible, so that the main division can be started. If 
+	// the user requests division by one, division by self, and so on
+	// then they will just have to accept that this won't be particularly
+	// quick (relatively), whereas a real division (e.g., dividing a 
+	// large value by a small value) will run as fast as possible
+	// (i.e., special case detection should not slow down the common case)
+	//
+	// Special cases to consider:
+	//
+	//	Division by zero.
+	//	Division of zero.
+	//	Inputs are equal
+	//	Divisor is bigger than dividend
+	//	Division by power of two (can be shifted instead).
+	//	Division by 1 (special case of power of two division)
+	//
+	// Division/modulus by zero is undefined (ISO C:6.5.5), so
+	// don't bother handling this special case.
+	//
+	// The special cases of division by a power of 2 are ignored, since 
+	// they cause the general case to slow down. Omitting these
+	// special cases also reduces code size considerably.
+
+	// Handle divisor >= dividend separately. Note that this also handles 
+	// the case where the dividend is zero.	Note that the flags must be
+	// preserved, since they are also used at the branch destination.
+	sub.0 r1,r0,r15
+	sbc r0,r2 \ bge divisorGeDividend
+=->	sbc r1,r4
+	
+	// Compute the shift count. The amount by which the divisor
+	// must be shifted left to be aligned with the dividend.	
+	sub.0 r4,r2,r3
+		
+	// Align the divisor to the dividend. Execute a divstep (since at 
+	// least one will always be executed). Skip the remaining loop
+	// if the shift count is zero.
+	lsl.0 r1,r3,r1 \ beq skipLoop
+=->	divstep r0,r1 \ add.1 r3,1,r2
+
+	// Execute the divstep loop until temp is 0. This assumes that the
+	// loop count is at least one.
+	sub.0 r3,1,r4
+divLoop:	
+	divstep r0,r1 \ bne divLoop
+=->	sub.0 r4,1,r4
+
+skipLoop:
+				
+	// The top bits of the result are the remainder. The bottom
+	// bits are the quotient.
+	lsr.0 r0,r2,r1 \ sub.1 16,r2,r4
+	jr (lr ) \ lsl.0 r0,r4,r0
+=->	lsr.0 r0,r4,r0
+
+// Special case.
+
+divisorGeDividend:	
+	// The divisor is greater than or equal to the dividend. The flags
+	// indicate which of these alternatives it is. The COPYNE can be used 
+	// to set the result appropriately, without introducing any more
+	// branches.
+	copy.0 r0,r1 \ copy.1 0,r0
+	jr (lr) \ copyeq r0,r1
+=->	copyeq 1,r0
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __divmod15
+
+	
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#64# 16#69# 16#76# 16#6d# 16#6f# 16#64# 16#31# 16#35# 16#0# // Function name `_divmod15'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/divmodhi4.S b/gcc-4.9/libgcc/config/picochip/divmodhi4.S
new file mode 100644
index 000000000..55dd71b62
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/divmodhi4.S
@@ -0,0 +1,246 @@
+// picoChip ASM file
+//
+//   Support for 16-bit signed division/modulus.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.align 8		
+.global __divmodhi4
+__divmodhi4:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &__divmodhi4 = 4 bytes
+
+	// 16-bit signed division. Most of the special cases are dealt
+	// with by the 15-bit signed division library (e.g., division by
+	// zero, division by 1, and so on). This wrapper simply inverts	
+	// any negative inputs, calls the 15-bit library, and flips any
+	// results as necessary.  The
+	// only special cases to be handled here are where either the 
+	// divisor or the dividend are the maximum negative values.
+
+	// Encode r5 with a bit pattern which indicates whether the
+	// outputs of the division must be negated. The MSB will be set
+	// to the sign of the dividend (which controls the remainder's
+	// sign), while the LSB will store the XOR of the two signs,
+	// which indicates the quotient's sign. R5 is not modified by the
+	// 15-bit divmod routine.
+	sub.0 r1,16#8000#,r15 \ asr.1 r0,15,r4
+	beq divisorIsLargestNegative \ lsr.0 r1,15,r3
+=->	sub.0 r0,16#8000#,r15 \ xor.1 r3,r4,r5
+
+	// Handle least negative dividend with a special case. Note that the
+	// absolute value of the divisor is also computed here.
+	add.0 [asr r1,15],r1,r3	\ beq dividendIsLargestNegative
+=->	xor.0 [asr r1,15],r3,r1 \ stw lr,(fp)-1	
+	
+	// Compute the absolute value of the dividend, and call the main
+	// divide routine.
+	add.0 r4,r0,r2 \ jl (&__divmod15)  // fn_call &__divmod15
+=->	xor.0 r4,r2,r0
+
+handleNegatedResults:	
+	// Speculatively store the negation of the results.
+	sub.0 0,r0,r2 \ sub.1 0,r1,r3
+
+	// Does the quotient need negating? The LSB indicates this.
+	and.0 r5,1,r15 \ ldw (fp)-1,lr
+	copyne r2,r0
+		
+	asr.0 r5,15,r15 \ jr (lr)
+=->	copyne r3,r1
+	
+dividendIsLargestNegative:
+
+	// Divide the constant -32768. Use the Hacker's Delight
+	// algorithm (i.e., ((dividend / 2) / divisor) * 2) gives
+	// approximate answer). This code is a special case, so no
+	// great effort is made to make it fast, only to make it
+	// small.
+
+	lsr.0 r0,1,r0 \ jl (&__divmod15)  // fn_call &__divmod15
+=->	stw r1,(fp)-2
+
+	// Load the original divisor, and compute the new quotient and
+	// remainder.	
+	lsl.0 r0,1,r0 \ ldw (fp)-2,r3
+	lsl.0 r1,1,r1 // Fill stall slot
+
+	// The error in the quotient is 0 or 1. The error can be determined
+	// by comparing the remainder to the original divisor. If the
+	// remainder is bigger, then an error of 1 has been introduced,
+	// which must be fixed.
+	sub.0 r1,r3,r15
+	blo noCompensationForError
+=->	nop	
+	add.0 r0,1,r0 \ sub.1 r1,r3,r1
+noCompensationForError:
+	bra handleNegatedResults
+=->	nop
+
+divisorIsLargestNegative:	
+	// The flags indicate whether the dividend is also the maximum negative
+	copy.0 r0,r1 \ copy.1 0,r0
+	copyeq r0,r1 \ jr (lr)
+=->	copyeq 1,r0
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __divmodhi4
+	
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x4	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#64# 16#69# 16#76# 16#6d# 16#6f# 16#64# 16#68# 16#69# 16#34# 16#0# // Function name `_divmodhi4'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
diff --git a/gcc-4.9/libgcc/config/picochip/divmodsi4.S b/gcc-4.9/libgcc/config/picochip/divmodsi4.S
new file mode 100644
index 000000000..326c3adba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/divmodsi4.S
@@ -0,0 +1,233 @@
+// picoChip ASM file
+//
+//   Support for 32-bit signed division/modulus.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.align 8
+.global __divmodsi4
+__divmodsi4:
+_picoMark_FUNCTION_BEGIN=
+// picoChip Function Prologue : &__divmodsi4 = 8 bytes
+
+	// Note: optimising for size is preferred over optimising for speed.
+
+	// Note: the frame is setup throughout the following instructions,
+	// and is complete at the point the udivmodsi4 function is called. 	
+
+	// Note that R9 is encoded with a pattern which indicates
+	// whether the remainder and quotient should be negated on
+	// completion. The MSB is set to the sign of the dividend
+	// (i.e., the sign of the remainder), while the LSB encodes
+	// the XOR of the two input's signs (i.e., the sign of the
+	// quotient.
+	
+	// If dividend is negative, invert the dividend and flag.
+	ASR.0 r1,15,r4
+	BEQ dividendNotNegative
+=->	STL R[9:8],(FP)-2
+
+	// Dividend is negative - negate dividend.
+        SUB.0 0,R0,R0
+        SUBB.0 0,R1,R1
+
+dividendNotNegative:
+			
+	// If divisor is negative, invert the divisor.
+	AND.0 [lsr r3,15],1,r5
+	SUB.0 R3,0, r15
+	BGE divisorNotNegative
+=->	XOR.0 r4,r5,r9
+
+	// Divisor is negative - negate divisor.
+        SUB.0 0,R2,R2
+        SUBB.0 0,R3,R3
+
+divisorNotNegative:
+	
+        STL R[13:12],(FP)-1 \ JL (&__udivmodsi4)
+=->	SUB.0 FP,8,FP  // udivmodsi expects the frame to be valid still.
+	
+	// The LSB of R9 indicates whether the quotient should be negated.
+	AND.0 r9,1,r15
+	BEQ skipQuotientNegation
+=->	LDL (FP)1,R[13:12]	// Convenient point to restore link/fp
+	
+        SUB.0 0,R4,R4
+        SUBB.0 0,R5,R5	
+
+skipQuotientNegation:		
+
+	// The MSB of R9 indicates whether the remainder should be negated.
+	ASR.0 R9,15,r15
+	BEQ epilogue
+
+        SUB.0 0,R6,R6
+        SUBB.0 0,R7,R7
+
+epilogue:	
+
+	JR (R12)
+=->	LDL (FP)-2,R[9:8]
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __divmodsi4
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x8	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#64# 16#69# 16#76# 16#6d# 16#6f# 16#64# 16#73# 16#69# 16#34# 16#0# // Function name `_divmodsi4'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/lib1funcs.S b/gcc-4.9/libgcc/config/picochip/lib1funcs.S
new file mode 100644
index 000000000..d344170d2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/lib1funcs.S
@@ -0,0 +1,4 @@
+// picoChip ASM file
+// Fake libgcc asm file. This contains nothing, but is used to prevent gcc
+// getting upset about the lack of a lib1funcs.S file when LIB1ASMFUNCS is
+// defined to switch off the compilation of parts of libgcc.
diff --git a/gcc-4.9/libgcc/config/picochip/longjmp.S b/gcc-4.9/libgcc/config/picochip/longjmp.S
new file mode 100644
index 000000000..9370e9422
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/longjmp.S
@@ -0,0 +1,182 @@
+// picoChip ASM file
+//
+//   Support for 32-bit arithmetic shift right.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.global _longjmp
+_longjmp:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &_longjmp = 0 bytes
+
+        LDL (R0)0, R[3:2]
+        LDL (R0)1, R[5:4]
+        LDL (R0)2, R[7:6]
+        LDL (R0)3, R[9:8]
+        LDL (R0)4, R[11:10]
+        LDL (R0)5, R[13:12]
+        LDW (R0)12, R14
+        LDW (R0)13, R1
+        JR (R12)
+=->	COPY.0 1,R0
+        
+// picoChip Function Epilogue : longjmp
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#6c# 16#6f# 16#6e# 16#67# 16#6a# 16#6d# 16#70# 16#0# // Function name `longjmp'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/lshrsi3.S b/gcc-4.9/libgcc/config/picochip/lshrsi3.S
new file mode 100644
index 000000000..ad233d442
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/lshrsi3.S
@@ -0,0 +1,190 @@
+// picoChip ASM file
+//
+//   Support for 32-bit logical shift right.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+.section .text
+
+.global ___lshrsi3
+___lshrsi3:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &___lshrsi3 = 4 bytes
+
+	// if (R2 > 15) goto _L2
+	SUB.0 15,R2,r15
+	JMPLT _L2
+=->	SUB.0 16,R2,R5 // R5 := R5 - R2 (HI)
+
+	LSR.0 R0,R2,R0 // R4 := R0 >> R2
+	LSR.0 R1,R2,R3 // R3 := R1 >> R2
+	// if (R2 == 0) goto _L4
+	LSL.0 R1,R5,R5 // R5 := R1 << R5
+	OR.0 R5,R0,R4 // R2 := R5 IOR R2 (HI)
+	SUB.0 R2,0,r15
+	COPYNE R4,R0		// R0 := R2
+	JR (R12)	// Return to caller 
+=->	COPY.0 R3,R1		// R1 := R3
+
+_L2:
+	LSR.0 R1,R2,R0  // R2 := R1 >> R2
+	JR (R12)	// Return to caller 
+=->	COPY.0 0,R1	// R3 := 0 (short constant)
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __lshrsi3
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x4	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#5f# 16#6c# 16#73# 16#68# 16#72# 16#72# 16#73# 16#69# 16#33# 16#0# // Function name `__lshrsi3'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
diff --git a/gcc-4.9/libgcc/config/picochip/lshrsi3.c b/gcc-4.9/libgcc/config/picochip/lshrsi3.c
new file mode 100644
index 000000000..f100648e5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/lshrsi3.c
@@ -0,0 +1,76 @@
+/*
+
+picoChip GCC support for 32-bit logical shift right.
+
+Copyright (C) 2003-2014 Free Software Foundation, Inc.
+Contributed by Picochip Ltd.
+Maintained by Daniel Towner (daniel.towner@picochip.com)
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+typedef int HItype __attribute__ ((mode (HI)));
+typedef unsigned int UHItype __attribute__ ((mode (HI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+
+typedef struct USIstruct {
+  UHItype low, high;
+} USIstruct;
+
+typedef union USIunion {
+  USItype l;
+  USIstruct s;
+} USIunion;
+
+USItype __lshrsi3(USIunion value, HItype count) {
+  USIunion result;
+  int temp;
+
+  /* Ignore a zero count until we get into the (count < 16)
+     clause. This is slightly slower when shifting by zero, but faster
+     and smaller in all other cases (due to the better scheduling
+     opportunities available by putting the test near computational
+     instructions. */
+
+  if (count < 16) {
+    /* Shift low and high words by the count. */
+    result.s.low = value.s.low >> count;
+    result.s.high = value.s.high >> count;
+     
+    /* There is now a hole in the upper `count' bits of the low
+       word. Shift the lower `count' bits of the upper word into the
+       low word. This only works when count isn't zero. */
+    if (count != 0) {
+      temp = value.s.high << (16 - count);
+      result.s.low |= temp;
+    }
+
+  } else {
+    /* Shift the upper word of the source into the lower word of the
+       result, and zero the result's upper word. Note that we actually
+       ned to shift by (count - 16), but as we are only using the
+       bottom 4 bits, this is equivalent to shifting by count. */
+    result.s.low = value.s.high >> count;
+    result.s.high = 0;
+
+  }
+
+  return result.l;
+
+}
diff --git a/gcc-4.9/libgcc/config/picochip/parityhi2.S b/gcc-4.9/libgcc/config/picochip/parityhi2.S
new file mode 100644
index 000000000..357e33dfe
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/parityhi2.S
@@ -0,0 +1,179 @@
+// picoChip ASM file
+//.file "ucmpsi2.c"
+//
+//   Support for parity checks.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+	
+.section .text
+
+.align 8
+.global ___parityhi2
+___parityhi2:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &___parityhi2 = 0 bytes
+	XOR.0 [LSR R0,8],R0,R0
+        XOR.0 [LSR R0,4],R0,R0
+        XOR.0 [LSR R0,2],R0,R0
+        JR (R12) \ XOR.0 [LSR R0,1],R0,R0
+=->	AND.0 R0,1,R0
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __parityhi2
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#5f# 16#70# 16#61# 16#72# 16#69# 16#74# 16#79# 16#68# 16#69# 16#32# 16#0# // Function name `__parityhi2'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/popcounthi2.S b/gcc-4.9/libgcc/config/picochip/popcounthi2.S
new file mode 100644
index 000000000..e0f582422
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/popcounthi2.S
@@ -0,0 +1,201 @@
+// picoChip ASM file
+//.file "popcounthi2.S"
+//
+//   Support for 16-bit population count.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//   
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+	
+.section .text
+
+// The following code (taken from a newsgroup posting) was compiled, and then
+// hand assembled (a similar version is given in the Hacker's Delight
+// book, chapter 5).
+//
+// int 
+// popcount (int value)
+// {
+//    value = ((value & 0xAAAA) >> 1) + (value & 0x5555);
+//    value = ((value & 0xCCCC) >> 2) + (value & 0x3333);
+//    value = ((value & 0xF0F0) >> 4) + (value & 0x0F0F);
+//    return ((value & 0xFF00) >> 8) + (value & 0x00FF);
+// }	
+//
+// This assembly function is approx. 20x faster than a naive loop
+// implementation of the population count, but about 30% bigger
+// (45 bytes v. 34 bytes).
+
+.align 8
+.global ___popcounthi2
+___popcounthi2:
+
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &___popcounthi2 = 0 bytes
+
+        AND.0 [LSR R0,1],21845,R0 \ AND.1 R0,21845,R5
+        ADD.0 R0,R5,R0
+        AND.0 [LSR R0,2],13107,R0 \ AND.1 R0,13107,R5
+        ADD.0 R0,R5,R0 \ COPY.1 1807,R2
+        AND.0 [LSR R0,4],R2,R0 \ AND.1 R0,3855,R5
+        ADD.0 R0,R5,R0
+        JR (R12) \ AND.0 R0, 255, R5
+=->	ADD.0 [LSR R0,8],R5,R0
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : ___popcounthi2
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#5f# 16#70# 16#6f# 16#70# 16#63# 16#6f# 16#75# 16#6e# 16#74# 16#68# 16#69# 16#32# 16#0# // Function name `__popcounthi2'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/setjmp.S b/gcc-4.9/libgcc/config/picochip/setjmp.S
new file mode 100644
index 000000000..4993f2ecf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/setjmp.S
@@ -0,0 +1,182 @@
+// picoChip ASM file
+//
+//   Support for 32-bit arithmetic shift right.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.global _setjmp
+_setjmp:
+_picoMark_FUNCTION_BEGIN=
+
+// picoChip Function Prologue : &_setjmp = 0 bytes
+
+        STL R[3:2],(R0)0
+        STL R[5:4],(R0)1
+        STL R[7:6],(R0)2
+        STL R[9:8],(R0)3
+        STL R[11:10],(R0)4
+        STL R[13:12],(R0)5
+        STW R14,(R0)12
+        STW R1,(R0)13
+        JR (R12)
+=->	COPY.0 0,R0
+        
+// picoChip Function Epilogue : setjmp
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#73# 16#65# 16#74# 16#6a# 16#6d# 16#70# 16#0# // Function name `setjmp'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/subdi3.S b/gcc-4.9/libgcc/config/picochip/subdi3.S
new file mode 100644
index 000000000..47ed36311
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/subdi3.S
@@ -0,0 +1,191 @@
+// picoChip ASM file
+//
+//   Support for 64-bit subtraction.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Hariharan Sandanagobalane (hariharan@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+
+.section .text
+
+.align 8		
+.global __subdi3
+__subdi3:
+
+_picoMark_FUNCTION_BEGIN=
+// picoChip Function Prologue : &__subdi3 = 4 bytes
+
+	// The first operand of sub is completely in registers r[2-5]
+        // The second operand of sub is in stack FP(0-3)
+        // and result need to be written pointed to by the register r0.
+	// All we need to do is to load the appropriate values, sub them 
+        // appropriately (with sub or subb) and then store the values back.
+	ldw (FP)0, r1
+	stl r[7:6], (FP)-1
+	sub.0 r2, r1, r6
+	ldw (FP)1, r1
+	subb.0 r3, r1, r7
+	ldl (FP)1, r[3:2]
+	stl r[7:6], (r0)0
+	subb.0 r4, r2, r6
+	subb.0 r5, r3, r7
+	stl r[7:6], (r0)1
+	jr (r12)
+=->	ldl (FP)2, r[7:6]
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __subdi3
+	
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x4	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#73# 16#75# 16#62# 16#64# 16#69# 16#33# 16#0# // Function name `_subdi3'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
+
diff --git a/gcc-4.9/libgcc/config/picochip/t-picochip b/gcc-4.9/libgcc/config/picochip/t-picochip
new file mode 100644
index 000000000..4de5dbbdc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/t-picochip
@@ -0,0 +1,39 @@
+# Prevent some of the more complicated libgcc functions from being
+# compiled.  This is because they are generally too big to fit into an
+# AE anyway, so there is no point in having them.  Also, some don't
+# compile properly so we'll ignore them for the moment.
+LIB1ASMSRC = picochip/lib1funcs.S
+LIB1ASMFUNCS = _mulsc3 _divsc3
+
+# Compile the extra library functions.
+LIB2ADD = \
+	$(srcdir)/config/picochip/ashrsi3.S 		\
+	$(srcdir)/config/picochip/ashlsi3.S		\
+	$(srcdir)/config/picochip/divmodhi4.S 		\
+	$(srcdir)/config/picochip/udivmodhi4.S 		\
+	$(srcdir)/config/picochip/divmodsi4.S 		\
+	$(srcdir)/config/picochip/udivmodsi4.S 		\
+	$(srcdir)/config/picochip/divmod15.S 		\
+	$(srcdir)/config/picochip/ucmpsi2.S 		\
+	$(srcdir)/config/picochip/cmpsi2.S 		\
+	$(srcdir)/config/picochip/clzsi2.S			\
+	$(srcdir)/config/picochip/adddi3.S			\
+	$(srcdir)/config/picochip/subdi3.S			\
+	$(srcdir)/config/picochip/lshrsi3.S		\
+	$(srcdir)/config/picochip/parityhi2.S		\
+	$(srcdir)/config/picochip/popcounthi2.S
+
+# Special libgcc setup. Make single/double floating point the same,
+# and use our own include files.
+HOST_LIBGCC2_CFLAGS += -DDF=SF -I../../includes/
+
+# Switch off all debugging for the embedded libraries.
+# (embedded processors need small libraries by default).
+# NOTE: If the debug level is increased, turn off instruction scheduling.
+LIBGCC2_DEBUG_CFLAGS = -g0
+
+# Turn off the building of exception handling libraries.
+LIB2ADDEH =
+
+# Turn off ranlib on target libraries.
+RANLIB_FOR_TARGET = cat
diff --git a/gcc-4.9/libgcc/config/picochip/ucmpsi2.S b/gcc-4.9/libgcc/config/picochip/ucmpsi2.S
new file mode 100644
index 000000000..49cd7e648
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/ucmpsi2.S
@@ -0,0 +1,209 @@
+// picoChip ASM file
+//.file "ucmpsi2.c"
+//	
+//   Support for 32-bit unsigned compare.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+//
+// Compiled from the following, and then hand optimised.
+//
+// int __ucmpsi2 (USItype x, USItype y)
+// {
+//
+//   USIunion lx; lx.l = x;
+//   USIunion ly; ly.l = y;
+//
+//   if (lx.s.high < ly.s.high)
+//     return 0;
+//   else if (lx.s.high > ly.s.high)
+//     return 2;
+//   if (lx.s.low < ly.s.low)
+//     return 0;
+//   else if (lx.s.low > ly.s.low)
+//     return 2;
+//   return 1;
+// }
+	
+.section .text
+
+.align 8
+.global ___ucmpsi2
+___ucmpsi2:
+_picoMark_FUNCTION_BEGIN=
+// picoChip Function Prologue : &___ucmpsi2 = 0 bytes
+        SUB.0 R1,R3,r15
+
+        BLO _L1
+=->     SUB.0 R3,R1,r15 \ COPY.1 0,R5
+	
+        BLO _L1
+=->     SUB.0 R0,R2,r15 \ COPY.1 2,R5
+	
+        BLO _L1
+=->     SUB.0 R2,R0,r15 \ COPY.1 0,R5
+
+        BLO _L1
+=->	COPY.0 2,R5
+	
+        COPY.0 1,R5
+_L1:
+	JR (R12)
+=->	COPY.0 R5,R0            // R0 := R5
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : __ucmpsi2
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#5f# 16#75# 16#63# 16#6d# 16#70# 16#73# 16#69# 16#32# 16#0# // Function name `__ucmpsi2'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/udivmodhi4.S b/gcc-4.9/libgcc/config/picochip/udivmodhi4.S
new file mode 100644
index 000000000..920eb375a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/udivmodhi4.S
@@ -0,0 +1,238 @@
+// picoChip ASM file
+//
+//   Support for 16-bit unsigned division/modulus.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+	
+.section .text
+
+.global __udivmodhi4
+__udivmodhi4:
+_picoMark_FUNCTION_BEGIN=
+	
+// picoChip Function Prologue : &__udivmodhi4 = 6 bytes
+
+	// 16-bit unsigned division. The divstep function is only capable of
+	// handling 15-bit division (plus a sign to give 16-bits). It is not 
+	// capable of handling unsigned division directly. Instead, take 
+	// advantage of the special property that 
+	// ((divisor / 2) / dividend) * 2 will be almost good enough. The 
+	// error in the result is only 0 or 1, and this can be easily
+	// tested and corrected. A full description of the algorithm can
+	// be found in `Hacker's Delight', by Henry Warren, page 146.
+
+	// Input:
+	//	r0 - dividend
+	//	r1 - divisor
+	// Output:
+	//	r0 - quotient
+	//	r1 - remainder
+	
+	// Note that the lr, and original inputs are speculatively saved. They
+	// will only be restored if the 15-bit division function is called.
+	
+	sub.0 r1,0,r15 \ stl r[0:1],(fp)-1
+	bge divisorIs15bit
+=->	sub.0 r0,r1,r2 \ stw lr,(fp)-3
+	
+	// The divisor is >= 2^15.
+	bhs quotientIs1
+
+	// The dividend < divisor. The quotient is thus 0, and the
+	// remainder is the dividend.
+	copy.0 r0,r1 \ jr (lr)
+=->	copy.0 0,r0
+	
+quotientIs1:	
+	// The dividend >= divisor. The quotient is thus 1, and the
+	// remainder can be computed directly by subtraction (i.e., the
+	// result of the comparison already performed to branch here).
+	jr (lr) \ copy.0 r2,r1
+=->	copy.0 1,r0
+	
+divisorIs15bit:
+	// The divisor is < 2^15.
+
+	// Divide the original dividend by 2, and call the 15-bit division.
+	// Note that the original dividend is stored in r5, which is
+	// known to be unused by the called function, so that
+	// a memory stall isn't introduced immediately after the
+	// function returns, to reload this value from memory.
+	
+	jl (&__divmod15) \ copy.0 r0,r5  // fn_call &__divmod15
+=->     lsr.0 r0,1,r0
+	
+	// Compute the new quotient and remainder by multiplying them by 2.
+	// The remainder will be 1 out, if the original dividend was odd.
+	and.0 r5,1,r5 \ ldl (fp)-1,r[2:3]
+	add.0 [lsl r1,1],r5,r1 \ lsl.1 r0,1,r0
+	
+	// The error in the quotient is 0 or 1. The error can be determined
+	// by comparing the remainder to the original divisor. If the 
+	// remainder is bigger, then an error of 1 has been introduced.
+	sub.0 r1,r3,r15 \ ldw (fp)-3,lr
+	blo noCompensation
+=->	nop	
+	add.0 r0,1,r0 \ sub.1 r1,r3,r1
+noCompensation:
+	jr (lr)
+
+_picoMark_FUNCTION_END=
+// picoChip Function Epilogue : udivmodhi4
+
+	
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x6	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#75# 16#64# 16#69# 16#76# 16#6d# 16#6f# 16#64# 16#68# 16#69# 16#34# 16#0# // Function name `_udivmodhi4'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/picochip/udivmodsi4.S b/gcc-4.9/libgcc/config/picochip/udivmodsi4.S
new file mode 100644
index 000000000..c468bc0e3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/picochip/udivmodsi4.S
@@ -0,0 +1,318 @@
+// picoChip ASM file
+//
+//   Support for 32-bit unsigned division/modulus.
+//
+//   Copyright (C) 2003-2014 Free Software Foundation, Inc.
+//   Contributed by Picochip Ltd.
+//   Maintained by Daniel Towner (daniel.towner@picochip.com)
+//
+//   This file is free software; you can redistribute it and/or modify it
+//   under the terms of the GNU General Public License as published by the
+//   Free Software Foundation; either version 3, or (at your option) any
+//   later version.
+//
+//   This file is distributed in the hope that it will be useful, but
+//   WITHOUT ANY WARRANTY; without even the implied warranty of
+//   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+//   General Public License for more details.
+//
+//   Under Section 7 of GPL version 3, you are granted additional
+//   permissions described in the GCC Runtime Library Exception, version
+//   3.1, as published by the Free Software Foundation.
+//
+//   You should have received a copy of the GNU General Public License and
+//   a copy of the GCC Runtime Library Exception along with this program;
+//   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+//   <http://www.gnu.org/licenses/>.
+	
+.section .text
+
+.align 8
+.global __udivmodsi4
+__udivmodsi4:
+_picoMark_FUNCTION_BEGIN=
+// picoChip Function Prologue : &__udivmodsi4 = 24 bytes
+	
+	// Schedule the register saves alongside the special cases, so that
+	// if the special cases fail, the registers will have already
+	// been stored onto the stack.
+	SUB.0 R3,R1,r15 \ STL R[13:12],(FP)-1
+	BHS skipCommonCase \ STL R[9:8],(FP)-4
+=->	SUB.0 R2,1,r15 \ STL R[11:10],(FP)-3
+	
+_L2:
+	// Flags set above, and in _L2 caller.
+	BNE restOfCode
+=->	SUB.0 R3,0,r15
+	BNE restOfCode 
+=->	COPY.0 R0,R4 \ COPY.1 R1,R5
+	JR (R12)	// Return to caller
+=->	COPY.0 0,R6 \ COPY.1 0,R7
+	// Never reach here
+
+skipCommonCase:
+	SUB.0 R3,R1,r15
+	BNE _L3	// (Reversed branch) 
+=->	SUB.0 R2,R0,r15 // Must be set in delay slot, so ready by _L9
+
+_L9:
+	BLO _L2	// (Reversed branch)
+=->	SUB.0 R2,1,r15
+	
+_L3:
+	SUB.0 R2,R0,r15
+	BEQ _L10	// (Reversed branch)
+=->	SUB.0 R1,R3,r15 // Set flags for branch at _L10 
+	
+_L4:
+	// greater than
+	COPY.0 0,R4 \ COPY.1 0,R5 \ JR (R12)	// Return to caller
+=->	COPY.0 R0,R6 \ COPY.1 R1,R7
+	// Doesn't reach here.
+		
+_L10:
+	// Flags set in _L10 call delay slot.
+	BNE _L4 
+=->	COPY.0 1,R4 \ COPY.1 0,R5
+	JR (R12)	// Return to caller
+=->	COPY.0 0,R6 \ COPY.1 0,R7
+
+restOfCode:	
+
+// Prologue
+	
+	// Register saves scheduled alongside special cases above.
+	ADD.0 FP,-20,FP \ STW R14,(FP)-4
+
+	// The following can be scheduled together.
+	// dividend in R[9:8] (from R[1:0])
+	// divisor in R[7:6] (from R[3:2])
+	// R14 := clzsi2 (dividend)	
+	// R0 := clzsi2 (divisor)
+	JL (&__clzsi2) \ COPY.0 R0,R8 \ COPY.1 R1,R9
+=->	COPY.0 R2,R6 \ COPY.1 R3,R7
+	COPY.0 R0,R14 \ JL (&__clzsi2)
+=->	COPY.0 R6,R0 \ COPY.1 R7,R1
+
+	// R14 := R0 - R14
+	SUB.0 R0,R14,R14
+
+	ADD.0 R14,1,R0	// R0 := R14 + 1 (HI)
+	
+	// R[11:10] = R[7,6] << R14
+	SUB.0 15,R14,r15
+	LSL.0 R6,R14,R11 \ BLT setupDivstepLoop
+=->	SUB.0 0,R14,R4 \ COPY.1 0,R10
+
+	// Zero shift is a special case. Shifting by zero within a 16-bit
+	// source object is fine, but don't execute the OR of the right-shift
+	// into the final result.
+	LSL.0 R7,R14,R11 \ BEQ setupDivstepLoop
+=->	LSL.0 R6,R14,R10
+	
+	LSR.0 R6,R4,R4
+	OR.0 R11,R4,R11
+	
+setupDivstepLoop:
+
+	// R[5:4] := R[9:8] (SI)
+	COPY.0 R8,R4 \ COPY.1 R9,R5
+	COPY.0 0,R6 \ COPY.1 R0,R8
+
+	// Store original value of loopCount for use after the loop.
+	// The Subtraction is handled in the tail of the loop iteration
+	// after this point.
+	SUB.0 R4,R10,R0 \ COPY.1 R8,R14
+	
+	// workingResult in R4,5,6
+	// temps in r0,1,2 and r7
+	// alignedDivisor in R10,11
+	// loopCount in r8
+	// r3, r9 scratch, used for renaming.
+	
+loopStart:	
+	// R0 := R4 - zeroExtend (R10) - only need 33-bits (i.e., 48-bits)
+	SUBB.0 R5,R11,R1 \ LSR.1 R0,15,R3
+	SUBB.0 R6,0,R2 \ LSR.1 R1,15,R6
+
+	// if (carry) goto shiftOnly
+	SUB.0 R8,1,R8 \ BNE shiftOnly
+=->	LSR.0 R4,15,R7 \ LSL.1 R1,1,R9
+	
+	OR.0 [LSL R0,1],1,R4 \ BNE loopStart
+=->	SUB.0 R4,R10,R0 \ OR.1 R9,R3,R5
+	
+	BRA loopEnd
+	
+shiftOnly:	
+
+	OR.0 [LSL R5,1],R7,R5 \ BNE loopStart \ LSR.1 R5,15,R6
+=->	SUB.0 [LSL R4,1],R10,R0 \LSL.1 R4,1,R4
+	
+// End of loop
+loopEnd:
+
+	// Schedule the computation of the upper word after shifting
+	// alongside the decision over whether to branch, and the register
+	// restores.
+	// R10 is filled with a useful constant.
+	SUB.0 15,r14,r15 \ LDL (FP)4,R[13:12]
+	SUB.1 0,R14,R1 // Don't set flags!
+	LSL.0 R6,R1,R3 \ LDL (FP)-4,R[9:8]
+
+	BLT remainderHasMoreThan16Bits \ LSR.0 R5,R14,R7 \ COPY.1 -1,R10
+=->	LSL.0 R5,R1,R2 \ OR.1 R7,R3,R3
+
+	LSR.0 R4,R14,R3 \ COPY.1 R3,R7
+	BRA epilogue \ LSR.0 -1,R1,R0 \ COPY.1 0,R5
+=->	OR.0 R3,R2,R6 \ AND.1 R0,R4,R4
+	
+remainderHasMoreThan16Bits:	
+
+	LSL.0 R10,R14,R1 \ COPY.1 R3,R6
+	XOR.0 R10,R1,R1 \ COPY.1 0,R7
+	AND.0 R1,R5,R5
+
+epilogue:
+	
+	JR (R12) \ LDW (FP)-4,R14
+=->	LDL (FP)-3,R[11:10]
+
+_picoMark_FUNCTION_END=
+	
+// picoChip Function Epilogue : udivmodsi4
+
+//============================================================================
+// All DWARF information between this marker, and the END OF DWARF
+// marker should be included in the source file. Search for
+// FUNCTION_STACK_SIZE_GOES_HERE and FUNCTION NAME GOES HERE, and
+// provide the relevant information. Add markers called
+// _picoMark_FUNCTION_BEGIN and _picoMark_FUNCTION_END around the
+// function in question.
+//============================================================================
+
+//============================================================================
+// Frame information. 
+//============================================================================
+
+.section .debug_frame
+_picoMark_DebugFrame=
+
+// Common CIE header.
+.unalignedInitLong _picoMark_CieEnd-_picoMark_CieBegin
+_picoMark_CieBegin=
+.unalignedInitLong 0xffffffff
+.initByte 0x1	// CIE Version
+.ascii 16#0#	// CIE Augmentation
+.uleb128 0x1	// CIE Code Alignment Factor
+.sleb128 2	// CIE Data Alignment Factor
+.initByte 0xc	// CIE RA Column
+.initByte 0xc	// DW_CFA_def_cfa
+.uleb128 0xd
+.uleb128 0x0
+.align 2
+_picoMark_CieEnd=
+
+// FDE 
+_picoMark_LSFDE0I900821033007563=
+.unalignedInitLong _picoMark_FdeEnd-_picoMark_FdeBegin
+_picoMark_FdeBegin=
+.unalignedInitLong _picoMark_DebugFrame	// FDE CIE offset
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// FDE initial location
+.unalignedInitWord _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x18	// <-- FUNCTION_STACK_SIZE_GOES_HERE
+.initByte 0x4	// DW_CFA_advance_loc4
+.unalignedInitLong _picoMark_FUNCTION_END-_picoMark_FUNCTION_BEGIN
+.initByte 0xe	// DW_CFA_def_cfa_offset
+.uleb128 0x0
+.align 2
+_picoMark_FdeEnd=
+
+//============================================================================
+// Abbrevation information.
+//============================================================================
+
+.section .debug_abbrev
+_picoMark_ABBREVIATIONS=
+
+.section .debug_abbrev
+	.uleb128 0x1	// (abbrev code)
+	.uleb128 0x11	// (TAG: DW_TAG_compile_unit)
+	.initByte 0x1	// DW_children_yes
+	.uleb128 0x10	// (DW_AT_stmt_list)
+	.uleb128 0x6	// (DW_FORM_data4)
+	.uleb128 0x12	// (DW_AT_high_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x11	// (DW_AT_low_pc)
+	.uleb128 0x1	// (DW_FORM_addr)
+	.uleb128 0x25	// (DW_AT_producer)
+	.uleb128 0x8	// (DW_FORM_string)
+	.uleb128 0x13	// (DW_AT_language)
+	.uleb128 0x5	// (DW_FORM_data2)
+	.uleb128 0x3	// (DW_AT_name)
+	.uleb128 0x8	// (DW_FORM_string)
+.initByte 0x0
+.initByte 0x0
+
+	.uleb128 0x2	;# (abbrev code)
+	.uleb128 0x2e	;# (TAG: DW_TAG_subprogram)
+.initByte 0x0	;# DW_children_no
+	.uleb128 0x3	;# (DW_AT_name)
+	.uleb128 0x8	;# (DW_FORM_string)
+	.uleb128 0x11	;# (DW_AT_low_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+	.uleb128 0x12	;# (DW_AT_high_pc)
+	.uleb128 0x1	;# (DW_FORM_addr)
+.initByte 0x0
+.initByte 0x0
+
+.initByte 0x0
+
+//============================================================================
+// Line information. DwarfLib requires this to be present, but it can
+// be empty.
+//============================================================================
+
+.section .debug_line
+_picoMark_LINES=
+
+//============================================================================
+// Debug Information
+//============================================================================
+.section .debug_info
+
+//Fixed header.
+.unalignedInitLong _picoMark_DEBUG_INFO_END-_picoMark_DEBUG_INFO_BEGIN
+_picoMark_DEBUG_INFO_BEGIN=
+.unalignedInitWord 0x2
+.unalignedInitLong _picoMark_ABBREVIATIONS
+.initByte 0x2
+
+// Compile unit information.
+.uleb128 0x1	// (DIE 0xb) DW_TAG_compile_unit)
+.unalignedInitLong _picoMark_LINES
+.unalignedInitWord _picoMark_FUNCTION_END
+.unalignedInitWord _picoMark_FUNCTION_BEGIN
+// Producer is `picoChip'
+.ascii 16#70# 16#69# 16#63# 16#6f# 16#43# 16#68# 16#69# 16#70# 16#00#
+.unalignedInitWord 0xcafe // ASM language
+.ascii 16#0# // Name. DwarfLib expects this to be present.
+
+.uleb128 0x2	;# (DIE DW_TAG_subprogram)
+
+// FUNCTION NAME GOES HERE. Use `echo name | od -t x1' to get the hex. Each hex
+// digit is specified using the format 16#XX#
+.ascii 16#5f# 16#75# 16#64# 16#69# 16#76# 16#6d# 16#6f# 16#64# 16#73# 16#69# 16#34# 16#0# // Function name `_udivmodsi4'
+.unalignedInitWord _picoMark_FUNCTION_BEGIN	// DW_AT_low_pc
+.unalignedInitWord _picoMark_FUNCTION_END	// DW_AT_high_pc
+
+.initByte 0x0	// end of compile unit children.
+
+_picoMark_DEBUG_INFO_END=
+
+//============================================================================
+// END OF DWARF
+//============================================================================
+.section .endFile
+// End of picoChip ASM file
diff --git a/gcc-4.9/libgcc/config/rl78/cmpsi2.S b/gcc-4.9/libgcc/config/rl78/cmpsi2.S
new file mode 100644
index 000000000..e87e15dea
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/cmpsi2.S
@@ -0,0 +1,121 @@
+;   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+
+#include "vregs.h"
+
+	.text
+
+	;;   int __cmpsi2 (signed long A, signed long B)
+	;;
+	;; Performs a signed comparison of A and B.
+	;; If A is less than B it returns 0.  If A is greater
+	;; than B it returns 2.  If they are equal it returns 1.
+
+	.global	___cmpsi2
+        .type   ___cmpsi2, @function
+___cmpsi2:
+	;; A is at [sp+4]
+	;; B is at [sp+8]
+	;; Result put in R8
+
+	;; Initialise default return value.
+	onew	bc
+	
+	;;  Compare the high words.
+	movw	ax, [sp + 10]
+	movw	de, ax
+	movw	ax, [sp + 6]
+	cmpw	ax, de
+	skz
+	br	!!.Lconvert_to_signed
+
+.Lcompare_bottom_words:	
+	;; The top words are equal - compare the bottom words.
+	;; Note - code from __ucmpsi2 branches into here.
+	movw   ax, [sp + 8]
+	movw   de, ax
+	movw   ax, [sp + 4]
+	cmpw   ax, de
+	sknz
+	br	!!.Lless_than_or_greater_than
+	;; The words are equal - return 1.
+	;; Note - we could branch to the return code at the end of the
+	;; function but a branch instruction takes 4 bytes, and the
+	;; return sequence itself is only 4 bytes long...
+	movw	ax, bc
+	movw	r8, ax
+	ret
+
+.Lconvert_to_signed:	
+	;; The top words are different.  Unfortunately the comparison
+	;; is always unsigned, so to get a signed result we XOR the CY
+	;; flag with the top bits of AX and DE.
+	xor1	cy, a.7
+	mov	a, d
+	xor1	cy, a.7
+	;; Fall through.
+
+.Lless_than_or_greater_than:
+	;; We now have a signed less than/greater than result in CY.
+	;; Return 0 for less than, 2 for greater than.
+	;; Note - code from __ucmpsi2 branches into here.
+	incw	bc
+	sknc
+	clrw	bc
+
+	;; Get the result value, currently in BC, into r8
+	movw	ax, bc
+	movw	r8, ax
+	ret
+
+	.size	___cmpsi2, . - ___cmpsi2
+	
+	
+	;;   int __ucmpsi2 (unsigned long A, unsigned long B)
+	;;
+	;; Performs an unsigned comparison of A and B.
+	;; If A is less than B it returns 0.  If A is greater
+	;; than B it returns 2.  If they are equal it returns 1.
+
+	.global	___ucmpsi2
+        .type   ___ucmpsi2, @function
+___ucmpsi2:
+	;; A is at [sp+4]
+	;; B is at [sp+8]
+	;; Result put in R8..R9
+
+	;; Initialise default return value.
+	onew	bc
+
+	;;  Compare the high words.
+	movw	ax, [sp + 10]
+	movw	de, ax
+	movw	ax, [sp + 6]
+	cmpw	ax, de
+	skz
+	;; Note: These branches go into the __cmpsi2 code!
+	br	!!.Lless_than_or_greater_than
+	br	!!.Lcompare_bottom_words
+
+	.size	___ucmpsi2, . - ___ucmpsi2
+	
\ No newline at end of file
diff --git a/gcc-4.9/libgcc/config/rl78/divmodhi.S b/gcc-4.9/libgcc/config/rl78/divmodhi.S
new file mode 100644
index 000000000..e08345a32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/divmodhi.S
@@ -0,0 +1,337 @@
+/* HImode div/mod functions for the GCC support library for the Renesas RL78 processors.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef __RL78_G10__
+
+#include "vregs.h"
+
+	.macro make_generic  which,need_result
+
+	.if \need_result
+	quot = r8
+	num = r10
+	den = r12
+	bit = r14
+	.else
+	num = r8
+	quot = r10
+	den = r12
+	bit = r14
+	.endif
+
+	quotB0 = quot
+	quotB1 = quot+1
+	
+	numB0 = num
+	numB1 = num+1
+	
+	denB0 = den
+	denB1 = den+1
+	
+	bitB0 = bit
+	bitB1 = bit+1
+
+#if 1
+#define bit	bc
+#define bitB0	c
+#define bitB1	b
+#endif
+
+num_lt_den\which:
+	.if \need_result
+	movw	r8, #0
+	.else
+	movw	ax, [sp+8]
+	movw	r8, ax
+	.endif
+	ret
+
+	;; These routines leave DE alone - the signed functions use DE
+	;; to store sign information that must remain intact
+
+	.if \need_result
+
+generic_div:
+
+	.else
+
+generic_mod:
+
+	.endif
+
+	;; (quot,rem) = 8[sp] /% 10[sp]
+
+	movw	hl, sp
+	movw	ax, [hl+10] ; denH
+	cmpw	ax, [hl+8] ; numH
+	bh	$num_lt_den\which
+
+	;; (quot,rem) = 16[sp] /% 20[sp]
+
+	;; copy numerator
+	movw	ax, [hl+8]
+	movw	num, ax
+
+	;; copy denomonator
+	movw	ax, [hl+10]
+	movw	den, ax
+
+	movw	ax, den
+	cmpw	ax, #0
+	bnz	$den_not_zero\which
+	movw	num, #0
+	ret
+
+den_not_zero\which:
+	.if \need_result
+	;; zero out quot
+	movw	quot, #0
+	.endif
+
+	;; initialize bit to 1
+	movw	bit, #1
+
+; while (den < num && !(den & (1L << BITS_MINUS_1)))
+
+shift_den_bit\which:	
+	movw	ax, den
+	mov1	cy,a.7
+	bc	$enter_main_loop\which
+	cmpw	ax, num
+	bh	$enter_main_loop\which
+
+	;; den <<= 1
+;	movw	ax, den		; already has it from the cmpw above
+	shlw	ax, 1
+	movw	den, ax
+
+	;; bit <<= 1
+	.if \need_result
+#ifdef bit
+	shlw	bit, 1
+#else
+	movw	ax, bit
+	shlw	ax, 1
+	movw	bit, ax
+#endif
+	.else
+	;; if we don't need to compute the quotent, we don't need an
+	;; actual bit *mask*, we just need to keep track of which bit
+	inc	bitB0
+	.endif
+
+	br	$shift_den_bit\which
+
+main_loop\which:
+
+	;; if (num >= den) (cmp den > num)
+	movw	ax, den
+	cmpw	ax, num
+	bh	$next_loop\which
+
+	;; num -= den
+	movw	ax, num
+	subw	ax, den
+	movw	num, ax
+
+	.if \need_result
+	;; res |= bit
+	mov	a, quotB0
+	or	a, bitB0
+	mov	quotB0, a
+	mov	a, quotB1
+	or	a, bitB1
+	mov	quotB1, a
+	.endif
+
+next_loop\which:	
+
+	;; den >>= 1
+	movw	ax, den
+	shrw	ax, 1
+	movw	den, ax
+
+	.if \need_result
+	;; bit >>= 1
+	movw	ax, bit
+	shrw	ax, 1
+	movw	bit, ax
+	.else
+	dec	bitB0
+	.endif
+
+enter_main_loop\which:
+	.if \need_result
+	movw	ax, bit
+	cmpw	ax, #0
+	.else
+	cmp0	bitB0
+	.endif
+	bnz	$main_loop\which
+
+main_loop_done\which:	
+	ret
+	.endm
+
+	make_generic _d 1
+	make_generic _m 0
+
+;----------------------------------------------------------------------
+
+	.global	___udivhi3
+	.type	___udivhi3,@function
+___udivhi3:
+	;; r8 = 4[sp] / 6[sp]
+	call	$!generic_div
+	ret
+	.size	___udivhi3, . - ___udivhi3
+	
+
+	.global	___umodhi3
+	.type	___umodhi3,@function
+___umodhi3:
+	;; r8 = 4[sp] % 6[sp]
+	call	$!generic_mod
+	ret
+	.size	___umodhi3, . - ___umodhi3
+
+;----------------------------------------------------------------------
+
+	.macro neg_ax
+	movw	hl, ax
+	movw	ax, #0
+	subw	ax, [hl]
+	movw	[hl], ax
+	.endm
+
+	.global	___divhi3
+	.type	___divhi3,@function
+___divhi3:
+	;; r8 = 4[sp] / 6[sp]
+	movw	de, #0
+	mov	a, [sp+5]
+	mov1	cy, a.7
+	bc	$div_signed_num
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bc	$div_signed_den
+	call	$!generic_div
+	ret
+	
+div_signed_num:
+	;; neg [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	d, #1
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bnc	$div_unsigned_den
+div_signed_den:	
+	;; neg [sp+6]
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+	mov	e, #1
+div_unsigned_den:	
+	call	$!generic_div
+
+	mov	a, d
+	cmp0	a
+	bz	$div_skip_restore_num
+	;;  We have to restore the numerator [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	a, d
+div_skip_restore_num:	
+	xor	a, e
+	bz	$div_no_neg
+	movw	ax, #r8
+	neg_ax
+div_no_neg:
+	mov	a, e
+	cmp0	a
+	bz	$div_skip_restore_den
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+div_skip_restore_den:	
+	ret
+	.size	___divhi3, . - ___divhi3
+	
+
+	.global	___modhi3
+	.type	___modhi3,@function
+___modhi3:
+	;; r8 = 4[sp] % 6[sp]
+	movw	de, #0
+	mov	a, [sp+5]
+	mov1	cy, a.7
+	bc	$mod_signed_num
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bc	$mod_signed_den
+	call	$!generic_mod
+	ret
+	
+mod_signed_num:
+	;; neg [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	d, #1
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bnc	$mod_unsigned_den
+mod_signed_den:	
+	;; neg [sp+6]
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+mod_unsigned_den:	
+	call	$!generic_mod
+
+	mov	a, d
+	cmp0	a
+	bz	$mod_no_neg
+	movw	ax, #r8
+	neg_ax
+	;;  Also restore numerator
+	movw 	ax, sp
+	addw	ax, #4
+	neg_ax
+mod_no_neg:
+	mov	a, e
+	cmp0	a
+	bz	$mod_skip_restore_den
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+mod_skip_restore_den:	
+	ret
+	.size	___modhi3, . - ___modhi3
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rl78/divmodqi.S b/gcc-4.9/libgcc/config/rl78/divmodqi.S
new file mode 100644
index 000000000..0d13a2fd6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/divmodqi.S
@@ -0,0 +1,310 @@
+/* QImode div/mod functions for the GCC support library for the Renesas RL78 processors.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef __RL78_G10__
+
+#include "vregs.h"
+
+	.macro make_generic  which,need_result
+
+	.if \need_result
+	quot = r8
+	num = r10
+	den = r12
+	bit = r14
+	.else
+	num = r8
+	quot = r10
+	den = r12
+	bit = r14
+	.endif
+
+#if 1
+#define bit	b
+#define den	c
+#define bitden	bc
+#endif
+
+num_lt_den\which:
+	.if \need_result
+	mov	r8, #0
+	.else
+	mov	a, [hl+4]
+	mov	r8, a
+	.endif
+	ret
+
+num_eq_den\which:
+	.if \need_result
+	mov	r8, #1
+	.else
+	mov	r8, #0
+	.endif
+	ret
+	
+den_is_zero\which:
+	mov	r8, #0xff
+	ret
+
+	;; These routines leave DE alone - the signed functions use DE
+	;; to store sign information that must remain intact
+
+	.if \need_result
+
+generic_div:
+
+	.else
+
+generic_mod:
+
+	.endif
+
+	;; (quot,rem) = 4[hl] /% 6[hl]
+
+	mov	a, [hl+4] ; num
+	cmp	a, [hl+6] ; den
+	bz	$num_eq_den\which
+	bnh	$num_lt_den\which
+	
+	;; copy numerator
+;	mov	a, [hl+4]	; already there from above
+	mov	num, a
+
+	;; copy denomonator
+	mov	a, [hl+6]
+	mov	den, a
+
+	cmp0	den
+	bz	$den_is_zero\which
+
+den_not_zero\which:
+	.if \need_result
+	;; zero out quot
+	mov	quot, #0
+	.endif
+
+	;; initialize bit to 1
+	mov	bit, #1
+
+; while (den < num && !(den & (1L << BITS_MINUS_1)))
+
+shift_den_bit\which:
+	.macro	sdb_one\which
+	mov	a, den
+	mov1	cy,a.7
+	bc	$enter_main_loop\which
+	cmp	a, num
+	bh	$enter_main_loop\which
+
+	;; den <<= 1
+;	mov	a, den		; already has it from the cmpw above
+	shl	a, 1
+	mov	den, a
+
+	;; bit <<= 1
+	shl	bit, 1
+	.endm
+
+	sdb_one\which
+	sdb_one\which
+
+	br	$shift_den_bit\which
+
+main_loop\which:
+
+	;; if (num >= den) (cmp den > num)
+	mov	a, den
+	cmp	a, num
+	bh	$next_loop\which
+
+	;; num -= den
+	mov	a, num
+	sub	a, den
+	mov	num, a
+
+	.if \need_result
+	;; res |= bit
+	mov	a, quot
+	or	a, bit
+	mov	quot, a
+	.endif
+
+next_loop\which:	
+
+	;; den, bit >>= 1
+	movw	ax, bitden
+	shrw	ax, 1
+	movw	bitden, ax
+
+enter_main_loop\which:
+	cmp0	bit
+	bnz	$main_loop\which
+
+main_loop_done\which:	
+	ret
+	.endm
+
+	make_generic _d 1
+	make_generic _m 0
+
+;----------------------------------------------------------------------
+
+	.global	___udivqi3
+	.type	___udivqi3,@function
+___udivqi3:
+	;; r8 = 4[sp] / 6[sp]
+	movw	hl, sp
+	br	$!generic_div
+	.size	___udivqi3, . - ___udivqi3
+	
+
+	.global	___umodqi3
+	.type	___umodqi3,@function
+___umodqi3:
+	;; r8 = 4[sp] % 6[sp]
+	movw	hl, sp
+	br	$!generic_mod
+	.size	___umodqi3, . - ___umodqi3
+
+;----------------------------------------------------------------------
+
+	.macro neg_ax
+	movw	hl, ax
+	mov	a, #0
+	sub	a, [hl]
+	mov	[hl], a
+	.endm
+
+	.global	___divqi3
+	.type	___divqi3,@function
+___divqi3:
+	;; r8 = 4[sp] / 6[sp]
+	movw	hl, sp
+	movw	de, #0
+	mov	a, [sp+4]
+	mov1	cy, a.7
+	bc	$div_signed_num
+	mov	a, [sp+6]
+	mov1	cy, a.7
+	bc	$div_signed_den
+	br	$!generic_div
+	
+div_signed_num:
+	;; neg [sp+4]
+	mov	a, #0
+	sub	a, [hl+4]
+	mov	[hl+4], a
+	mov	d, #1
+	mov	a, [sp+6]
+	mov1	cy, a.6
+	bnc	$div_unsigned_den
+div_signed_den:	
+	;; neg [sp+6]
+	mov	a, #0
+	sub	a, [hl+6]
+	mov	[hl+6], a
+	mov	e, #1
+div_unsigned_den:	
+	call	$!generic_div
+
+	mov	a, d
+	cmp0	a
+	bz	$div_skip_restore_num
+	;;  We have to restore the numerator [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	a, d
+div_skip_restore_num:	
+	xor	a, e
+	bz	$div_no_neg
+	movw	ax, #r8
+	neg_ax
+div_no_neg:
+	mov	a, e
+	cmp0	a
+	bz	$div_skip_restore_den
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+div_skip_restore_den:	
+	ret
+	.size	___divqi3, . - ___divqi3
+	
+
+	.global	___modqi3
+	.type	___modqi3,@function
+___modqi3:
+	;; r8 = 4[sp] % 6[sp]
+	movw	hl, sp
+	movw	de, #0
+	mov	a, [hl+4]
+	mov1	cy, a.7
+	bc	$mod_signed_num
+	mov	a, [hl+6]
+	mov1	cy, a.7
+	bc	$mod_signed_den
+	br	$!generic_mod
+	
+mod_signed_num:
+	;; neg [sp+4]
+	mov	a, #0
+	sub	a, [hl+4]
+	mov	[hl+4], a
+	mov	d, #1
+	mov	a, [hl+6]
+	mov1	cy, a.7
+	bnc	$mod_unsigned_den
+mod_signed_den:	
+	;; neg [sp+6]
+	mov	a, #0
+	sub	a, [hl+6]
+	mov	[hl+6], a
+	mov	e, #1
+mod_unsigned_den:	
+	call	$!generic_mod
+
+	mov	a, d
+	cmp0	a
+	bz	$mod_no_neg
+	mov	a, #0
+	sub	a, r8
+	mov	r8, a
+	;;  Also restore numerator
+	movw 	ax, sp
+	addw	ax, #4
+	neg_ax
+mod_no_neg:
+	mov	a, e
+	cmp0	a
+	bz	$mod_skip_restore_den
+	movw	ax, sp
+	addw	ax, #6
+	neg_ax
+mod_skip_restore_den:	
+	ret
+	.size	___modqi3, . - ___modqi3
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rl78/divmodsi.S b/gcc-4.9/libgcc/config/rl78/divmodsi.S
new file mode 100644
index 000000000..fac0a6090
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/divmodsi.S
@@ -0,0 +1,521 @@
+/* SImode div/mod functions for the GCC support library for the Renesas RL78 processors.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef __RL78_G10__
+
+#include "vregs.h"
+
+	.macro make_generic  which,need_result
+
+	.if \need_result
+	quot = r8
+	num = r12
+	den = r16
+	bit = r20
+	.else
+	num = r8
+	quot = r12
+	den = r16
+	bit = r20
+	.endif
+
+	quotH = quot+2
+	quotL = quot
+	quotB0 = quot
+	quotB1 = quot+1
+	quotB2 = quot+2
+	quotB3 = quot+3
+	
+	numH = num+2
+	numL = num
+	numB0 = num
+	numB1 = num+1
+	numB2 = num+2
+	numB3 = num+3
+	
+#define	denH bc
+	denL = den
+	denB0 = den
+	denB1 = den+1
+#define	denB2 c
+#define	denB3 b
+	
+	bitH = bit+2
+	bitL = bit
+	bitB0 = bit
+	bitB1 = bit+1
+	bitB2 = bit+2
+	bitB3 = bit+3
+
+num_lt_den\which:
+	.if \need_result
+	movw	r8, #0
+	movw	r10, #0
+	.else
+	movw	ax, [sp+8]
+	movw	r8, ax
+	movw	ax, [sp+10]
+	movw	r10, ax
+	.endif
+	ret
+
+shift_den_bit16\which:
+	movw	ax, denL
+	movw	denH, ax
+	movw	denL, #0
+	.if \need_result
+	movw	ax, bitL
+	movw	bitH, ax
+	movw	bitL, #0
+	.else
+	mov	a, bit
+	add	a, #16
+	mov	bit, a
+	.endif
+	br	$shift_den_bit\which
+
+	;; These routines leave DE alone - the signed functions use DE
+	;; to store sign information that must remain intact
+
+	.if \need_result
+
+generic_div:
+
+	.else
+
+generic_mod:
+
+	.endif
+
+	;; (quot,rem) = 8[sp] /% 12[sp]
+
+	movw	hl, sp
+	movw	ax, [hl+14] ; denH
+	cmpw	ax, [hl+10] ; numH
+	movw	ax, [hl+12] ; denL
+	sknz
+	cmpw	ax, [hl+8] ; numL
+	bh	$num_lt_den\which
+
+	sel	rb2
+	push	ax		; denL
+;	push	bc		; denH
+	push	de		; bitL
+	push	hl		; bitH - stored in BC
+	sel	rb0
+
+	;; (quot,rem) = 16[sp] /% 20[sp]
+
+	;; copy numerator
+	movw	ax, [hl+8]
+	movw	numL, ax
+	movw	ax, [hl+10]
+	movw	numH, ax
+
+	;; copy denomonator
+	movw	ax, [hl+12]
+	movw	denL, ax
+	movw	ax, [hl+14]
+	movw	denH, ax
+
+	movw	ax, denL
+	or	a, denB2
+	or	a, denB3	; not x
+	cmpw	ax, #0
+	bnz	$den_not_zero\which
+	movw	numL, #0
+	movw	numH, #0
+	ret
+
+den_not_zero\which:
+	.if \need_result
+	;; zero out quot
+	movw	quotL, #0
+	movw	quotH, #0
+	.endif
+
+	;; initialize bit to 1
+	movw	bitL, #1
+	movw	bitH, #0
+
+; while (den < num && !(den & (1L << BITS_MINUS_1)))
+
+	.if 1
+	;; see if we can short-circuit a bunch of shifts
+	movw	ax, denH
+	cmpw	ax, #0
+	bnz	$shift_den_bit\which
+	movw	ax, denL
+	cmpw	ax, numH
+	bnh	$shift_den_bit16\which
+	.endif
+
+shift_den_bit\which:	
+	movw	ax, denH
+	mov1	cy,a.7
+	bc	$enter_main_loop\which
+	cmpw	ax, numH
+	movw	ax, denL	; we re-use this below
+	sknz
+	cmpw	ax, numL
+	bh	$enter_main_loop\which
+
+	;; den <<= 1
+;	movw	ax, denL	; already has it from the cmpw above
+	shlw	ax, 1
+	movw	denL, ax
+;	movw	ax, denH
+	rolwc	denH, 1
+;	movw	denH, ax
+
+	;; bit <<= 1
+	.if \need_result
+	movw	ax, bitL
+	shlw	ax, 1
+	movw	bitL, ax
+	movw	ax, bitH
+	rolwc	ax, 1
+	movw	bitH, ax
+	.else
+	;; if we don't need to compute the quotent, we don't need an
+	;; actual bit *mask*, we just need to keep track of which bit
+	inc	bitB0
+	.endif
+
+	br	$shift_den_bit\which
+
+	;; while (bit)
+main_loop\which:
+
+	;; if (num >= den) (cmp den > num)
+	movw	ax, numH
+	cmpw	ax, denH
+	movw	ax, numL
+	sknz
+	cmpw	ax, denL
+	skz
+	bnh	$next_loop\which
+
+	;; num -= den
+;	movw	ax, numL	; already has it from the cmpw above
+	subw	ax, denL
+	movw	numL, ax
+	movw	ax, numH
+	sknc
+	decw	ax
+	subw	ax, denH
+	movw	numH, ax
+
+	.if \need_result
+	;; res |= bit
+	mov	a, quotB0
+	or	a, bitB0
+	mov	quotB0, a
+	mov	a, quotB1
+	or	a, bitB1
+	mov	quotB1, a
+	mov	a, quotB2
+	or	a, bitB2
+	mov	quotB2, a
+	mov	a, quotB3
+	or	a, bitB3
+	mov	quotB3, a
+	.endif
+
+next_loop\which:	
+
+	;; den >>= 1
+	movw	ax, denH
+	shrw	ax, 1
+	movw	denH, ax
+	mov	a, denB1
+	rorc	a, 1
+	mov	denB1, a
+	mov	a, denB0
+	rorc	a, 1
+	mov	denB0, a
+
+	;; bit >>= 1
+	.if \need_result
+	movw	ax, bitH
+	shrw	ax, 1
+	movw	bitH, ax
+	mov	a, bitB1
+	rorc	a, 1
+	mov	bitB1, a
+	mov	a, bitB0
+	rorc	a, 1
+	mov	bitB0, a
+	.else
+	dec	bitB0
+	.endif
+
+enter_main_loop\which:
+	.if \need_result
+	movw	ax, bitH
+	cmpw	ax, #0
+	bnz	$main_loop\which
+	.else
+	cmp	bitB0, #15
+	bh	$main_loop\which
+	.endif
+	;; bit is HImode now; check others
+	movw	ax, numH	; numerator
+	cmpw	ax, #0
+	bnz	$bit_high_set\which
+	movw	ax, denH	; denominator
+	cmpw	ax, #0
+	bz	$switch_to_himode\which
+bit_high_set\which:	
+	.if \need_result
+	movw	ax, bitL
+	cmpw	ax, #0
+	.else
+	cmp0	bitB0
+	.endif
+	bnz	$main_loop\which
+
+switch_to_himode\which:
+	.if \need_result
+	movw	ax, bitL
+	cmpw	ax, #0
+	.else
+	cmp0	bitB0
+	.endif
+	bz	$main_loop_done_himode\which
+
+	;; From here on in, r22, r14, and r18 are all zero
+	;; while (bit)
+main_loop_himode\which:
+
+	;; if (num >= den) (cmp den > num)
+	movw	ax, denL
+	cmpw	ax, numL
+	bh	$next_loop_himode\which
+
+	;; num -= den
+	movw	ax, numL
+	subw	ax, denL
+	movw	numL, ax
+	movw	ax, numH
+	sknc
+	decw	ax
+	subw	ax, denH
+	movw	numH, ax
+
+	.if \need_result
+	;; res |= bit
+	mov	a, quotB0
+	or	a, bitB0
+	mov	quotB0, a
+	mov	a, quotB1
+	or	a, bitB1
+	mov	quotB1, a
+	.endif
+
+next_loop_himode\which:	
+
+	;; den >>= 1
+	movw	ax, denL
+	shrw	ax, 1
+	movw	denL, ax
+
+	.if \need_result
+	;; bit >>= 1
+	movw	ax, bitL
+	shrw	ax, 1
+	movw	bitL, ax
+	.else
+	dec	bitB0
+	.endif
+
+	.if \need_result
+	movw	ax, bitL
+	cmpw	ax, #0
+	.else
+	cmp0	bitB0
+	.endif
+	bnz	$main_loop_himode\which
+
+main_loop_done_himode\which:	
+	sel	rb2
+	pop	hl		; bitH - stored in BC
+	pop	de		; bitL
+;	pop	bc		; denH
+	pop	ax		; denL
+	sel	rb0
+
+	ret
+	.endm
+
+	make_generic _d 1
+	make_generic _m 0
+
+;----------------------------------------------------------------------
+
+	.global	___udivsi3
+	.type	___udivsi3,@function
+___udivsi3:
+	;; r8 = 4[sp] / 8[sp]
+	call	$!generic_div
+	ret
+	.size	___udivsi3, . - ___udivsi3
+	
+
+	.global	___umodsi3
+	.type	___umodsi3,@function
+___umodsi3:
+	;; r8 = 4[sp] % 8[sp]
+	call	$!generic_mod
+	ret
+	.size	___umodsi3, . - ___umodsi3
+
+;----------------------------------------------------------------------
+
+	.macro neg_ax
+	movw	hl, ax
+	movw	ax, #0
+	subw	ax, [hl]
+	movw	[hl], ax
+	movw	ax, #0
+	sknc
+	decw	ax
+	subw	ax, [hl+2]
+	movw	[hl+2], ax
+	.endm
+
+	.global	___divsi3
+	.type	___divsi3,@function
+___divsi3:
+	;; r8 = 4[sp] / 8[sp]
+	movw	de, #0
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bc	$div_signed_num
+	mov	a, [sp+11]
+	mov1	cy, a.7
+	bc	$div_signed_den
+	call	$!generic_div
+	ret
+	
+div_signed_num:
+	;; neg [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	d, #1
+	mov	a, [sp+11]
+	mov1	cy, a.7
+	bnc	$div_unsigned_den
+div_signed_den:	
+	;; neg [sp+8]
+	movw	ax, sp
+	addw	ax, #8
+	neg_ax
+	mov	e, #1
+div_unsigned_den:	
+	call	$!generic_div
+
+	mov	a, d
+	cmp0	a
+	bz	$div_skip_restore_num
+	;;  We have to restore the numerator [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	a, d
+div_skip_restore_num:	
+	xor	a, e
+	bz	$div_no_neg
+	movw	ax, #r8
+	neg_ax
+div_no_neg:
+	mov	a, e
+	cmp0	a
+	bz	$div_skip_restore_den
+	;;  We have to restore the denominator [sp+8]
+	movw	ax, sp
+	addw	ax, #8
+	neg_ax
+div_skip_restore_den:
+	ret
+	.size	___divsi3, . - ___divsi3
+	
+
+	.global	___modsi3
+	.type	___modsi3,@function
+___modsi3:
+	;; r8 = 4[sp] % 8[sp]
+	movw	de, #0
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	bc	$mod_signed_num
+	mov	a, [sp+11]
+	mov1	cy, a.7
+	bc	$mod_signed_den
+	call	$!generic_mod
+	ret
+	
+mod_signed_num:
+	;; neg [sp+4]
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+	mov	d, #1
+	mov	a, [sp+11]
+	mov1	cy, a.7
+	bnc	$mod_unsigned_den
+mod_signed_den:	
+	;; neg [sp+8]
+	movw	ax, sp
+	addw	ax, #8
+	neg_ax
+	mov	e, #1
+mod_unsigned_den:	
+	call	$!generic_mod
+
+	mov	a, d
+	cmp0	a
+	bz	$mod_no_neg
+	movw	ax, #r8
+	neg_ax
+	;;  We have to restore [sp+4] as well.
+	movw	ax, sp
+	addw	ax, #4
+	neg_ax
+mod_no_neg:
+ .if 1
+	mov	a, e
+	cmp0	a
+	bz	$mod_skip_restore_den
+	movw	ax, sp
+	addw	ax, #8
+	neg_ax
+mod_skip_restore_den:	
+ .endif	
+	ret
+	.size	___modsi3, . - ___modsi3
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rl78/lib2div.c b/gcc-4.9/libgcc/config/rl78/lib2div.c
new file mode 100644
index 000000000..8fc9cde69
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/lib2div.c
@@ -0,0 +1,84 @@
+/* libgcc routines for RL78
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef          int  sint08_type   __attribute__ ((mode (QI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+typedef int           word_type     __attribute__ ((mode (__word__)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+#ifdef __RL78_G10__
+
+#define UINT_TYPE	uint32_type
+#define SINT_TYPE	sint32_type
+#define BITS_MINUS_1	31
+#define NAME_MODE	si
+
+#include "rl78-divmod.h"
+
+#undef UINT_TYPE
+#undef SINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint16_type
+#define SINT_TYPE	sint16_type
+#define BITS_MINUS_1	15
+#define NAME_MODE	hi
+
+#include "rl78-divmod.h"
+
+#undef UINT_TYPE
+#undef SINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint08_type
+#define SINT_TYPE	sint08_type
+#define BITS_MINUS_1	7
+#define NAME_MODE	qi
+
+#include "rl78-divmod.h"
+
+#endif
+
+/* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
+   m32c.h for why we are creating extra versions of some of the
+   functions defined in libgcc2.c.  */
+
+#define LIBGCC2_UNITS_PER_WORD 2
+
+#define L_clzsi2
+#define L_ctzsi2
+#define L_ffssi2
+#define L_paritysi2
+#define L_popcountsi2
+
+#include "libgcc2.c"
diff --git a/gcc-4.9/libgcc/config/rl78/lib2mul.c b/gcc-4.9/libgcc/config/rl78/lib2mul.c
new file mode 100644
index 000000000..95701880e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/lib2mul.c
@@ -0,0 +1,61 @@
+/* libgcc routines for RL78
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint08_type   __attribute__ ((mode (QI)));
+
+#define C3B(a,b,c) a##b##c
+#define C3(a,b,c) C3B(a,b,c)
+
+#ifdef __RL78_G10__
+
+#define UINT_TYPE	uint32_type
+#define BITS_MINUS_1	31
+#define NAME_MODE	si
+
+#include "rl78-mul.h"
+
+#undef UINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint16_type
+#define BITS_MINUS_1	15
+#define NAME_MODE	hi
+
+#include "rl78-mul.h"
+
+#endif
+
+#undef UINT_TYPE
+#undef BITS_MINUS_1
+#undef NAME_MODE
+
+#define UINT_TYPE	uint08_type
+#define BITS_MINUS_1	7
+#define NAME_MODE	qi
+
+#include "rl78-mul.h"
diff --git a/gcc-4.9/libgcc/config/rl78/lib2shift.c b/gcc-4.9/libgcc/config/rl78/lib2shift.c
new file mode 100644
index 000000000..6b2513d30
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/lib2shift.c
@@ -0,0 +1,113 @@
+/* Shift functions for the GCC support library for the Renesas RL78 processors.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef          int  sint32_type   __attribute__ ((mode (SI)));
+typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
+typedef          int  sint16_type   __attribute__ ((mode (HI)));
+typedef unsigned int  uint16_type   __attribute__ ((mode (HI)));
+
+uint32_type __ashlsi3 (uint32_type in, char bit);
+sint32_type __ashrsi3 (sint32_type in, char bit);
+int __clrsbhi2 (sint16_type x);
+extern int __clrsbsi2 (sint32_type x);
+
+typedef struct
+{
+  union
+  {
+    uint32_type u;
+    uint16_type h[2];
+  } u;
+} dd;
+
+uint32_type
+__ashlsi3 (uint32_type in, char bit)
+{
+  uint16_type h, l;
+  dd d;
+
+  if (bit > 32)
+    return 0;
+  if (bit < 0)
+    return in;
+
+  d.u.u = in;
+  h = d.u.h[1];
+  l = d.u.h[0];
+
+  if (bit > 15)
+    {
+      h = l;
+      l = 0;
+      bit -= 16;
+    }
+
+  while (bit)
+    {
+      h = (h << 1) | (l >> 15);
+      l <<= 1;
+      bit --;
+    }
+
+  d.u.h[1] = h;
+  d.u.h[0] = l;
+  return d.u.u;
+}
+
+sint32_type
+__ashrsi3 (sint32_type in, char bit)
+{
+  sint16_type h;
+  uint16_type l;
+  dd d;
+
+  if (bit > 32)
+    return 0;
+  if (bit < 0)
+    return in;
+
+  d.u.u = in;
+  h = d.u.h[1];
+  l = d.u.h[0];
+
+  while (bit)
+    {
+      l = (h << 15) | (l >> 1);
+      h >>= 1;
+      bit --;
+    }
+
+  d.u.h[1] = h;
+  d.u.h[0] = l;
+  return d.u.u;
+}
+
+int
+__clrsbhi2 (sint16_type x)
+{
+  if (x == 0)
+    return 15;
+  return __clrsbsi2 ((sint32_type) x) - 16;
+}
diff --git a/gcc-4.9/libgcc/config/rl78/lshrsi3.S b/gcc-4.9/libgcc/config/rl78/lshrsi3.S
new file mode 100644
index 000000000..0e7123772
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/lshrsi3.S
@@ -0,0 +1,116 @@
+;   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+#include "vregs.h"
+	
+	.text
+	.global	___lshrsi3
+	.type	___lshrsi3, @function
+___lshrsi3:
+
+	;; input:
+	;; 
+	;; [zero]
+	;; [count]   <= $sp+8
+	;; [in MSB]
+	;; [in]
+	;; [in]
+	;; [in LSB]  <- $sp+4
+
+	;; output:
+	;; 
+	;; [r8..r11] result
+
+	;; registers:
+	;;
+	;; AX - temp for shift/rotate
+	;; B  - count
+
+	mov	a, [sp+8]	; A now contains the count
+
+	cmp	a, #0x20
+	bc	$.Lcount_is_normal
+
+	;; count is out of bounds, just return zero.
+	movw	r8, #0
+	movw	r10, #0
+	ret
+
+.Lcount_is_normal:
+	cmp0	a
+	bnz	$.Lcount_is_nonzero
+
+	;; count is zero, just copy IN to OUT
+	movw	ax, [sp+4]
+	movw	r8, ax
+	movw	ax, [sp+6]
+	movw	r10, ax
+	ret
+
+.Lcount_is_nonzero:
+	mov	b, a		; B now contains the count also
+	bf	a.4, $.Lcount_lt_16
+
+	;; count >= 16, shift 16 at a time.
+	movw	r10, #0
+	movw	ax, [sp+6]
+	movw	r8, ax
+	mov	a, b
+	and	a, #0x0f
+	sknz
+	ret
+
+	mov	b, a		; B now contains the remaining count
+	inc	b
+	br	$.Lloop_top
+
+.Lcount_lt_16:	
+	;; count is nonzero.  Do one 
+	movw	ax, [sp+6]
+	shrw	ax,1
+	movw	r10, ax
+	mov	a, [sp+5]
+	rorc	a,1
+	mov	r9, a
+	mov	a, [sp+4]
+	rorc	a,1
+	mov	r8, a
+
+	;; we did one shift above; do as many more as we need now.
+.Lloop_top:	
+	dec	b
+	sknz
+	ret
+
+	movw	ax, r10
+	shrw	ax,1
+	movw	r10, ax
+	mov	a, r9
+	rorc	a,1
+	mov	r9, a
+	mov	a, r8
+	rorc	a,1
+	mov	r8, a
+
+	br	$.Lloop_top
+
+	.size	___lshrsi3, .-___lshrsi3
diff --git a/gcc-4.9/libgcc/config/rl78/mulsi3.S b/gcc-4.9/libgcc/config/rl78/mulsi3.S
new file mode 100644
index 000000000..89f45b68a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/mulsi3.S
@@ -0,0 +1,202 @@
+;   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+;; 32x32=32 multiply
+
+#include "vregs.h"
+ 
+; the G10 only has one register bank, so cannot use these optimized
+; versions.  Use the C version instead.
+
+#ifndef __RL78_G10__
+
+
+;----------------------------------------------------------------------
+
+; Register use:
+;	RB0	RB1	RB2
+; AX	op2L	res32L	res32H
+; BC	op2H	(resH)	op1
+; DE	count	(resL-tmp)
+; HL	[sp+4]
+
+	.text
+	nop
+	.global	___mulsi3		; (USI a, USI b)
+___mulsi3:
+	;; A is at [sp+4]
+	;; B is at [sp+8]
+	;; result is in R8..R11
+
+	sel	rb2
+	push	ax
+	push	bc
+	sel	rb0
+
+	clrw	ax
+	movw	r8, ax
+	movw	r16, ax
+
+	movw	ax, [sp+14]
+	cmpw	ax, #0
+	bz	$1f
+	cmpw	ax, #0xffff
+	bnz	$2f
+	movw	ax, [sp+8]
+	sel	rb1
+	subw	ax, r_0
+	sel	rb0
+	br	$1f
+2:	
+	movw	bc, ax
+	movw	ax, [sp+8]
+	cmpw	ax, #0
+	skz
+	call	!.Lmul_hi
+1:	
+
+	movw	ax, [sp+10]
+	cmpw	ax, #0
+	bz	$1f
+	cmpw	ax, #0xffff
+	bnz	$2f
+	movw	ax, [sp+12]
+	sel	rb1
+	subw	ax, r_0
+	sel	rb0
+	br	$1f
+2:	
+	movw	bc, ax
+	movw	ax, [sp+12]
+	cmpw	ax, #0
+	skz
+	call	!.Lmul_hi
+1:	
+
+	movw	ax, r8
+	movw	r16, ax
+	clrw	ax
+	movw	r8, ax
+
+	;; now do R16:R8 += op1L * op2L
+
+	;; op1 is in AX.0 (needs to shrw)
+	;; op2 is in BC.2 and BC.1 (bc can shlw/rolcw)
+	;; res is in AX.2 and AX.1 (needs to addw)
+
+	movw	ax, [sp+8]
+	movw	r10, ax		; BC.1
+	movw	ax, [sp+12]
+
+	cmpw	ax, r10
+	bc	$.Lmul_hisi_top
+	movw	bc, r10
+	movw	r10, ax
+	movw	ax, bc
+
+
+.Lmul_hisi_top:
+	movw	bc, #0
+
+.Lmul_hisi_loop:
+	shrw	ax, 1
+	bnc	$.Lmul_hisi_no_add
+	sel	rb1
+	addw	ax, bc
+	sel	rb2
+	sknc
+	incw	ax
+	addw	ax, r_2
+.Lmul_hisi_no_add:	
+	sel	rb1
+	shlw	bc, 1
+	sel	rb0
+	rolwc	bc, 1
+	cmpw	ax, #0
+	bz	$.Lmul_hisi_done
+
+	shrw	ax, 1
+	bnc	$.Lmul_hisi_no_add2
+	sel	rb1
+	addw	ax, bc
+	sel	rb2
+	sknc
+	incw	ax
+	addw	ax, r_2
+.Lmul_hisi_no_add2:
+	sel	rb1
+	shlw	bc, 1
+	sel	rb0
+	rolwc	bc, 1
+	cmpw	ax, #0
+	bnz	$.Lmul_hisi_loop
+
+.Lmul_hisi_done:
+
+	movw	ax, r16
+	movw	r10, ax
+	
+	sel	rb2
+	pop	bc
+	pop	ax
+	sel	rb0
+
+	ret
+
+;----------------------------------------------------------------------
+
+	.global	___mulhi3
+___mulhi3:
+	movw	r8, #0
+	movw	ax, [sp+6]
+	movw	bc, ax
+	movw	ax, [sp+4]
+
+	;; R8 += AX * BC
+.Lmul_hi:
+	cmpw	ax, bc
+	skc
+	xchw	ax, bc
+	br	$.Lmul_hi_loop
+	
+.Lmul_hi_top:
+	sel	rb1
+	addw	ax, r_2
+	sel	rb0
+.Lmul_hi_no_add:	
+	shlw	bc, 1
+.Lmul_hi_loop:
+	shrw	ax, 1
+	bc	$.Lmul_hi_top
+	cmpw	ax, #0
+	bz	$.Lmul_hi_done
+
+	shlw	bc, 1
+	shrw	ax, 1
+	bc	$.Lmul_hi_top
+	cmpw	ax, #0
+	bnz	$.Lmul_hi_no_add
+
+.Lmul_hi_done:
+	ret
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rl78/rl78-divmod.h b/gcc-4.9/libgcc/config/rl78/rl78-divmod.h
new file mode 100644
index 000000000..044934b8f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/rl78-divmod.h
@@ -0,0 +1,117 @@
+/* libgcc routines for RL78
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+UINT_TYPE C3(udivmod,NAME_MODE,4) (UINT_TYPE, UINT_TYPE, word_type);
+SINT_TYPE C3(__div,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
+SINT_TYPE C3(__mod,NAME_MODE,3)   (SINT_TYPE, SINT_TYPE);
+UINT_TYPE C3(__udiv,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
+UINT_TYPE C3(__umod,NAME_MODE,3)  (UINT_TYPE, UINT_TYPE);
+
+UINT_TYPE
+C3(udivmod,NAME_MODE,4) (UINT_TYPE num, UINT_TYPE den, word_type modwanted)
+{
+  UINT_TYPE bit = 1;
+  UINT_TYPE res = 0;
+
+  while (den < num && bit && !(den & (1L << BITS_MINUS_1)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+  if (modwanted)
+    return num;
+  return res;
+}
+
+SINT_TYPE
+C3(__div,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
+{
+  word_type neg = 0;
+  SINT_TYPE res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = C3(udivmod,NAME_MODE,4) (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+SINT_TYPE
+C3(__mod,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b)
+{
+  word_type neg = 0;
+  SINT_TYPE res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = C3(udivmod,NAME_MODE,4) (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+
+UINT_TYPE
+C3(__udiv,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  return C3(udivmod,NAME_MODE,4) (a, b, 0);
+}
+
+UINT_TYPE
+C3(__umod,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  return C3(udivmod,NAME_MODE,4) (a, b, 1);
+}
diff --git a/gcc-4.9/libgcc/config/rl78/rl78-mul.h b/gcc-4.9/libgcc/config/rl78/rl78-mul.h
new file mode 100644
index 000000000..29e72a8a7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/rl78-mul.h
@@ -0,0 +1,42 @@
+/* libgcc routines for RL78
+   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+UINT_TYPE C3(__mul,NAME_MODE,3)   (UINT_TYPE, UINT_TYPE);
+UINT_TYPE
+C3(__mul,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b)
+{
+  UINT_TYPE rv = 0;
+
+  char bit;
+
+  for (bit=0; b && bit<sizeof(UINT_TYPE)*8; bit++)
+    {
+      if (b & 1)
+	rv += a;
+      a <<= 1;
+      b >>= 1;
+    }
+  return rv;
+}
diff --git a/gcc-4.9/libgcc/config/rl78/signbit.S b/gcc-4.9/libgcc/config/rl78/signbit.S
new file mode 100644
index 000000000..55f63a471
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/signbit.S
@@ -0,0 +1,67 @@
+;   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+;   Contributed by Red Hat.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+#include "vregs.h"
+	
+;; int signbitf (float X)
+;; int signbit  (double X)
+;; int signbitl (long double X)
+;;
+;;     `signbit' returns a nonzero value if the value of X has its sign
+;;     bit set.
+;;
+;;     This is not the same as `x < 0.0', because IEEE 754 floating point
+;;     allows zero to be signed.  The comparison `-0.0 < 0.0' is false,
+;;     but `signbit (-0.0)' will return a nonzero value.
+
+;----------------------------------------------------------------------
+
+	.text
+
+	.global	_signbit
+_signbit:
+	.global	_signbitf
+_signbitf:
+	;; X is at [sp+4]
+	;; result is in R8..R9
+
+	movw	r8, #0
+	mov	a, [sp+7]
+	mov1	cy, a.7
+	sknc
+	movw	r8, #1
+	ret
+	.size	_signbit, . - _signbit
+	.size	_signbitf, . - _signbitf
+
+	.global	_signbitl
+_signbitl:
+	;; X is at [sp+4]
+	;; result is in R8..R9
+
+	movw	r8, #0
+	mov	a, [sp+11]
+	mov1	cy, a.7
+	sknc
+	movw	r8, #1
+	ret
+	.size	_signbitl, . - _signbitl
diff --git a/gcc-4.9/libgcc/config/rl78/t-rl78 b/gcc-4.9/libgcc/config/rl78/t-rl78
new file mode 100644
index 000000000..274d20416
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/t-rl78
@@ -0,0 +1,32 @@
+# Makefile fragment for building LIBGCC for the Renesas RL78 target.
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+# Contributed by Red Hat.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB2ADD = \
+	$(srcdir)/config/rl78/trampoline.S \
+	$(srcdir)/config/rl78/lib2div.c \
+	$(srcdir)/config/rl78/lib2mul.c \
+	$(srcdir)/config/rl78/lib2shift.c \
+	$(srcdir)/config/rl78/lshrsi3.S \
+	$(srcdir)/config/rl78/mulsi3.S \
+	$(srcdir)/config/rl78/divmodsi.S \
+	$(srcdir)/config/rl78/divmodhi.S \
+	$(srcdir)/config/rl78/divmodqi.S \
+	$(srcdir)/config/rl78/signbit.S \
+	$(srcdir)/config/rl78/cmpsi2.S
diff --git a/gcc-4.9/libgcc/config/rl78/trampoline.S b/gcc-4.9/libgcc/config/rl78/trampoline.S
new file mode 100644
index 000000000..410a83e6e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/trampoline.S
@@ -0,0 +1,136 @@
+/* libgcc routines for RL78
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* RL78 Trampoline support
+
+  Since the RL78's RAM is not in the first 64k, we cannot "just" use a
+  function pointer to point to a trampoline on the stack.  So, we
+  create N fixed trampolines that read from an array, and allocate
+  them as needed.
+
+*/
+
+#include "vregs.h"
+
+	.data
+	.p2align	1
+trampoline_array:
+
+	.macro stub n
+
+	.text
+trampoline_\n:
+        .type   trampoline_\n, @function
+	movw	ax, !trampoline_chain_\n
+	movw	r14, ax
+	movw	ax, !trampoline_addr_\n
+	br	ax
+	.size	trampoline_\n, .-trampoline_\n
+
+	.data
+trampoline_frame_\n:
+	.short	0
+trampoline_stub_\n:
+	.short	trampoline_\n
+trampoline_chain_\n:
+	.short	0
+trampoline_addr_\n:
+	.short	0
+
+#define TO_FRAME 0
+#define TO_STUB  2
+#define TO_CHAIN 4
+#define TO_ADDR  6
+#define TO_SIZE  8
+
+	.endm
+
+	stub	0
+	stub	1
+	stub	2
+	stub	3
+	stub	4
+	stub	5
+
+trampoline_array_end:
+
+/* Given the function pointer in R8 and the static chain
+   pointer in R10, allocate a trampoline and return its address in
+   R8. */
+
+	.text
+	.global ___trampoline_init
+        .type   ___trampoline_init, @function
+___trampoline_init:
+
+	movw	hl, #trampoline_array
+1:
+	movw	ax, [hl + TO_ADDR]
+	cmpw	ax, #0
+	bz	$2f
+
+	movw	ax, hl
+	addw	ax, #TO_SIZE
+	movw	hl, ax
+	cmpw	ax, #trampoline_array_end
+	bnz	$1b
+	brk			; no more slots?
+
+2:	movw	ax, r8
+	movw	[hl + TO_ADDR], ax
+	movw	ax, r10
+	movw	[hl + TO_CHAIN], ax
+	movw	ax, sp
+	movw	[hl + TO_FRAME], ax
+
+	movw	ax, [hl + TO_STUB]
+	movw	r8, ax
+
+	ret
+	.size	___trampoline_init, . - ___trampoline_init
+
+	.global	___trampoline_uninit
+        .type   ___trampoline_uninit, @function
+___trampoline_uninit:
+	movw	hl, #trampoline_array
+	movw	ax, sp
+	movw	bc, ax
+1:
+	movw	ax, [hl + TO_FRAME]
+	cmpw	ax, bc
+	bc	$2f
+
+	clrw	ax
+	movw	[hl + TO_ADDR], ax
+
+2:
+	movw	ax, hl
+	addw	ax, #TO_SIZE
+	movw	hl, ax
+	cmpw	ax, #trampoline_array_end
+	bnz	$1b
+
+	ret
+	.size	___trampoline_uninit, . - ___trampoline_uninit
diff --git a/gcc-4.9/libgcc/config/rl78/vregs.h b/gcc-4.9/libgcc/config/rl78/vregs.h
new file mode 100644
index 000000000..fa488fabc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rl78/vregs.h
@@ -0,0 +1,56 @@
+
+; real
+; GAS defines r0..r7 as aliases for real registers; we want the saddr
+; forms here.
+r_0	=	0xffef8
+r_1	=	0xffef9
+r_2	=	0xffefa
+r_3	=	0xffefb
+r_4	=	0xffefc
+r_5	=	0xffefd
+r_6	=	0xffefe
+r_7	=	0xffeff
+
+#ifdef __RL78_G10__
+
+; clobberable
+r8	=	0xffec8
+r9	=	0xffec9
+r10	=	0xffeca
+r11	=	0xffecb
+r12	=	0xffecc
+r13	=	0xffecd
+r14	=	0xffece
+r15	=	0xffecf
+; preserved
+r16	=	0xffed0
+r17	=	0xffed1
+r18	=	0xffed2
+r19	=	0xffed3
+r20	=	0xffed4
+r21	=	0xffed5
+r22	=	0xffed6
+r23	=	0xffed7
+
+#else
+
+; clobberable
+r8	=	0xffef0
+r9	=	0xffef1
+r10	=	0xffef2
+r11	=	0xffef3
+r12	=	0xffef4
+r13	=	0xffef5
+r14	=	0xffef6
+r15	=	0xffef7
+; preserved
+r16	=	0xffee8
+r17	=	0xffee9
+r18	=	0xffeea
+r19	=	0xffeeb
+r20	=	0xffeec
+r21	=	0xffeed
+r22	=	0xffeee
+r23	=	0xffeef
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/aix-unwind.h b/gcc-4.9/libgcc/config/rs6000/aix-unwind.h
new file mode 100644
index 000000000..e62194cd7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/aix-unwind.h
@@ -0,0 +1,255 @@
+/* DWARF2 EH unwinding support for AIX.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Useful register numbers.  */
+
+#define LR_REGNO             65
+#define CR2_REGNO            70
+#define XER_REGNO            76
+#define FIRST_ALTIVEC_REGNO  77
+#define VRSAVE_REGNO        109
+#define VSCR_REGNO          110
+
+/* If the current unwind info (FS) does not contain explicit info
+   saving R2, then we have to do a minor amount of code reading to
+   figure out if it was saved.  The big problem here is that the
+   code that does the save/restore is generated by the linker, so
+   we have no good way to determine at compile time what to do.  */
+
+#ifdef __64BIT__
+#define MD_FROB_UPDATE_CONTEXT(CTX, FS)					\
+  do {									\
+    if ((FS)->regs.reg[2].how == REG_UNSAVED)				\
+      {									\
+	unsigned int *insn						\
+	  = (unsigned int *)						\
+	    _Unwind_GetGR ((CTX), LR_REGNO);				\
+	if (*insn == 0xE8410028)					\
+	  _Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 40);			\
+      }									\
+  } while (0)
+#else
+#define MD_FROB_UPDATE_CONTEXT(CTX, FS)					\
+  do {									\
+    if ((FS)->regs.reg[2].how == REG_UNSAVED)				\
+      {									\
+	unsigned int *insn						\
+	  = (unsigned int *)						\
+	    _Unwind_GetGR ((CTX), LR_REGNO);				\
+	if (*insn == 0x80410014)					\
+	  _Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 20);			\
+      }									\
+  } while (0)
+#endif
+
+/* Now on to MD_FALLBACK_FRAME_STATE_FOR.
+   32bit AIX 5.2 and 5.3 only at this stage.  */
+
+#include <stdlib.h>
+#include <stddef.h>
+#include <signal.h>
+#include <sys/machine.h>
+
+#ifdef __64BIT__
+
+/* 64bit fallback not implemented yet, so MD_FALLBACK_FRAME_STATE_FOR not
+   defined.  Arrange just for the code below to compile.  */
+typedef struct __context64 mstate_t;
+
+#else
+
+typedef struct mstsave mstate_t;
+
+#define MD_FALLBACK_FRAME_STATE_FOR ppc_aix_fallback_frame_state
+
+#endif
+
+/* If we are compiling on AIX < 5.3, the VMX related datastructs are not
+   defined and we take measures to obtain proper runtime behavior if the
+   compiled code happens to run on a later version with VMX enabled.  */
+
+#ifndef MSR_VMX
+#define MSR_VMX 0x2000000
+#endif
+
+typedef unsigned int uint;
+typedef struct { uint v[4]; } vreg_t;
+typedef struct {
+  vreg_t regs[32];
+  uint   pad1 [3];
+  uint   vscr;
+  uint   vrsave;
+  uint   pad2 [3];
+} vstate_t;
+
+#define EXT_CONTEXT_MARK 0x45435458
+#define EXT_CONTEXT_SIZE 4096
+#define BUMPER_SIZE (EXT_CONTEXT_SIZE - sizeof(vstate_t) - (5 * sizeof(int)))
+
+typedef struct {
+  uint     pad1 [4];
+  vstate_t vstate;
+  char     bumper [BUMPER_SIZE];
+  int      mark; 
+} extended_context_t;
+
+typedef struct {
+  char bumper [offsetof (ucontext_t, uc_stack) + sizeof (stack_t)];
+  extended_context_t * ectx;
+  int mark;
+} vmx_ucontext_t;
+
+/* Determine whether CONTEXT designates a signal handler, and return the
+   associated ucontext_t address if so.  Return NULL otherwise.  */
+
+static ucontext_t *
+ucontext_for (struct _Unwind_Context *context)
+{
+  const unsigned int * ra = context->ra;
+
+  /* AIX 5.2 and 5.3, threaded or not, share common patterns and feature
+     variants depending on the configured kernel (unix_mp or unix_64).  */
+
+  if (*(ra - 5) == 0x4c00012c     /* isync             */
+      && *(ra - 4) == 0x80ec0000  /* lwz     r7,0(r12) */
+      && *(ra - 3) == 0x804c0004  /* lwz     r2,4(r12) */
+      && *(ra - 2) == 0x7ce903a6  /* mtctr   r7        */
+      && *(ra - 1) == 0x4e800421  /* bctrl             */
+      && *(ra - 0) == 0x7dc37378) /* mr      r3,r14   <-- context->ra */
+    {
+      /* unix_64 */
+      if (*(ra - 6) == 0x7d000164)  /* mtmsrd  r8 */
+	{
+	  switch (*(ra + 18))
+	    {
+	      /* AIX 5.2 */
+	    case 0x835a0520: /* lwz r26,1312(r26) */ 
+	      return (ucontext_t *)(context->cfa + 0x70);
+
+	      /* AIX 5.3 */
+	    case 0x835a0570:  /* lwz r26,1392(r26) */
+	      return (ucontext_t *)(context->cfa + 0x40);
+		
+	    default:
+	      return 0;
+	    }
+	}
+
+      /* unix_mp */
+      if (*(ra - 6) == 0x7d000124)  /* mtmsr  r8 */
+	{
+	  typedef struct {
+	    char pad[56];
+	    ucontext_t ucontext;
+	    siginfo_t siginfo;
+	  } aix52_stack_t;
+
+	  aix52_stack_t * frame = (aix52_stack_t *) context->cfa;
+	  return &frame->ucontext;
+	}
+    }
+
+  return 0;
+}
+
+/* The fallback proper.  */
+
+#ifdef DWARF_ALT_FRAME_RETURN_COLUMN
+#define RETURN_COLUMN DWARF_ALT_FRAME_RETURN_COLUMN
+#else
+#define RETURN_COLUMN ARG_POINTER_REGNUM
+#endif
+
+#define REGISTER_CFA_OFFSET_FOR(FS,REGNO,ADDR,CFA)\
+do { \
+(FS)->regs.reg[REGNO].how = REG_SAVED_OFFSET; \
+(FS)->regs.reg[REGNO].loc.offset = (long) (ADDR) - (CFA); \
+} while (0);
+
+static _Unwind_Reason_Code
+ppc_aix_fallback_frame_state (struct _Unwind_Context *context,
+			      _Unwind_FrameState *fs)
+{
+  ucontext_t * uctx = ucontext_for (context);
+  mstate_t * mctx;
+
+  long new_cfa;
+  int i;
+
+  if (uctx == NULL)
+    return _URC_END_OF_STACK;
+
+  mctx = &uctx->uc_mcontext.jmp_context;
+
+  /* The "kernel" frame cfa is the stack pointer at the signal occurrence
+     point.  */
+  new_cfa = mctx->gpr[STACK_POINTER_REGNUM];
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  /* And we state how to find the various registers it has saved with
+     relative offset rules from there.  */
+
+  for (i = 0; i < 32; i++)
+    if (i != STACK_POINTER_REGNUM)
+      REGISTER_CFA_OFFSET_FOR (fs, i, &mctx->gpr[i], new_cfa);
+
+  REGISTER_CFA_OFFSET_FOR (fs, CR2_REGNO, &mctx->cr, new_cfa);
+  REGISTER_CFA_OFFSET_FOR (fs, XER_REGNO, &mctx->xer, new_cfa);
+  REGISTER_CFA_OFFSET_FOR (fs, LR_REGNO, &mctx->lr, new_cfa);
+
+  fs->retaddr_column = RETURN_COLUMN;
+  REGISTER_CFA_OFFSET_FOR (fs, RETURN_COLUMN, &mctx->iar, new_cfa);
+  fs->signal_frame = 1;
+
+  /* Honor FP Ever Used ...   */
+  if (mctx->fpeu)
+    {
+      for (i = 0; i < 32; i++)
+	REGISTER_CFA_OFFSET_FOR (fs, i+32, &mctx->fpr[i], new_cfa);
+    }
+
+  /* Honor VMX context, if any.  We expect the msr bit never to be set in
+     environments where there is no VMX support, e.g. on AIX < 5.3.  */
+  if (mctx->msr & MSR_VMX)
+    {
+      vmx_ucontext_t * uc = (vmx_ucontext_t *) uctx;
+
+      if (uc->mark == EXT_CONTEXT_MARK && uc->ectx->mark == EXT_CONTEXT_MARK)
+	{
+	  vstate_t * vstate = &uc->ectx->vstate;
+
+	  for (i = 0; i < 32; i++)
+	    REGISTER_CFA_OFFSET_FOR
+	    (fs, i+FIRST_ALTIVEC_REGNO, &vstate->regs[i], new_cfa);
+
+	  REGISTER_CFA_OFFSET_FOR (fs, VSCR_REGNO, &vstate->vscr, new_cfa);
+	  REGISTER_CFA_OFFSET_FOR (fs, VRSAVE_REGNO, &vstate->vrsave, new_cfa);
+	}
+    }
+
+  return _URC_NO_REASON;
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/aixinitfini.c b/gcc-4.9/libgcc/config/rs6000/aixinitfini.c
new file mode 100644
index 000000000..e95575820
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/aixinitfini.c
@@ -0,0 +1,33 @@
+/* FIXME: rename this file */
+
+/*
+   Artificially create _GLOBAL_AIX[ID]_shr_o symbols in libgcc.a.
+
+   This means that libstdc++.a can invoke these symbols and they are resolved
+   regardless of whether libstdc++.a is linked against libgcc_s.a or libgcc.a.
+
+   The symbols are created in libgcc_s.a by collect2 as there are exception
+   frames to register for LIB2_DIVMOD_FUNCS.
+
+   The symbols are NOT created by collect2 for libgcc.a, because libgcc.a is
+   a 'real' archive containing objects and collect2 is not invoked.
+
+   libstdc++.a is linked against libgcc.a when handling the command line
+   options '-static-libgcc -static-libstdc++'.
+*/
+
+void _GLOBAL__AIXI_shr_o (void);
+void _GLOBAL__AIXD_shr_o (void);
+
+void
+_GLOBAL__AIXI_shr_o (void)
+{
+  return;
+}
+
+void
+_GLOBAL__AIXD_shr_o (void)
+{
+  return;
+}
+
diff --git a/gcc-4.9/libgcc/config/rs6000/crtcxa.c b/gcc-4.9/libgcc/config/rs6000/crtcxa.c
new file mode 100644
index 000000000..317d5bae4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtcxa.c
@@ -0,0 +1,42 @@
+/* __dso_handle initialization for AIX.
+   Copyright (C) 2013-2014 Free Software Foundation, Inc.
+   Written by David Edelsohn, IBM.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef SHARED
+void *__dso_handle = &__dso_handle;
+#else
+void *__dso_handle = 0;
+#endif
+
+extern void __cxa_finalize (void *);
+
+/* Add __cxa_finalize call to beginning of destructors list.  */
+void __init_aix_libgcc_cxa_atexit (void) __attribute__ ((destructor (65535)));
+
+void
+__init_aix_libgcc_cxa_atexit (void)
+{
+  __cxa_finalize (__dso_handle);
+}
+
diff --git a/gcc-4.9/libgcc/config/rs6000/crtresfpr.S b/gcc-4.9/libgcc/config/rs6000/crtresfpr.S
new file mode 100644
index 000000000..a5e569133
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtresfpr.S
@@ -0,0 +1,80 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for restoring floating point registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the floating point save area.  */
+
+CFI_STARTPROC
+HIDDEN_FUNC(_restfpr_14)	lfd	14,-144(11)	/* restore fp registers */
+HIDDEN_FUNC(_restfpr_15)	lfd	15,-136(11)
+HIDDEN_FUNC(_restfpr_16)	lfd	16,-128(11)
+HIDDEN_FUNC(_restfpr_17)	lfd	17,-120(11)
+HIDDEN_FUNC(_restfpr_18)	lfd	18,-112(11)
+HIDDEN_FUNC(_restfpr_19)	lfd	19,-104(11)
+HIDDEN_FUNC(_restfpr_20)	lfd	20,-96(11)
+HIDDEN_FUNC(_restfpr_21)	lfd	21,-88(11)
+HIDDEN_FUNC(_restfpr_22)	lfd	22,-80(11)
+HIDDEN_FUNC(_restfpr_23)	lfd	23,-72(11)
+HIDDEN_FUNC(_restfpr_24)	lfd	24,-64(11)
+HIDDEN_FUNC(_restfpr_25)	lfd	25,-56(11)
+HIDDEN_FUNC(_restfpr_26)	lfd	26,-48(11)
+HIDDEN_FUNC(_restfpr_27)	lfd	27,-40(11)
+HIDDEN_FUNC(_restfpr_28)	lfd	28,-32(11)
+HIDDEN_FUNC(_restfpr_29)	lfd	29,-24(11)
+HIDDEN_FUNC(_restfpr_30)	lfd	30,-16(11)
+HIDDEN_FUNC(_restfpr_31)	lfd	31,-8(11)
+			blr
+FUNC_END(_restfpr_31)
+FUNC_END(_restfpr_30)
+FUNC_END(_restfpr_29)
+FUNC_END(_restfpr_28)
+FUNC_END(_restfpr_27)
+FUNC_END(_restfpr_26)
+FUNC_END(_restfpr_25)
+FUNC_END(_restfpr_24)
+FUNC_END(_restfpr_23)
+FUNC_END(_restfpr_22)
+FUNC_END(_restfpr_21)
+FUNC_END(_restfpr_20)
+FUNC_END(_restfpr_19)
+FUNC_END(_restfpr_18)
+FUNC_END(_restfpr_17)
+FUNC_END(_restfpr_16)
+FUNC_END(_restfpr_15)
+FUNC_END(_restfpr_14)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtresgpr.S b/gcc-4.9/libgcc/config/rs6000/crtresgpr.S
new file mode 100644
index 000000000..1a307749f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtresgpr.S
@@ -0,0 +1,80 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for restoring integer registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the integer restore area.  */
+
+CFI_STARTPROC
+HIDDEN_FUNC(_restgpr_14)	lwz	14,-72(11)	/* restore gp registers */
+HIDDEN_FUNC(_restgpr_15)	lwz	15,-68(11)
+HIDDEN_FUNC(_restgpr_16)	lwz	16,-64(11)
+HIDDEN_FUNC(_restgpr_17)	lwz	17,-60(11)
+HIDDEN_FUNC(_restgpr_18)	lwz	18,-56(11)
+HIDDEN_FUNC(_restgpr_19)	lwz	19,-52(11)
+HIDDEN_FUNC(_restgpr_20)	lwz	20,-48(11)
+HIDDEN_FUNC(_restgpr_21)	lwz	21,-44(11)
+HIDDEN_FUNC(_restgpr_22)	lwz	22,-40(11)
+HIDDEN_FUNC(_restgpr_23)	lwz	23,-36(11)
+HIDDEN_FUNC(_restgpr_24)	lwz	24,-32(11)
+HIDDEN_FUNC(_restgpr_25)	lwz	25,-28(11)
+HIDDEN_FUNC(_restgpr_26)	lwz	26,-24(11)
+HIDDEN_FUNC(_restgpr_27)	lwz	27,-20(11)
+HIDDEN_FUNC(_restgpr_28)	lwz	28,-16(11)
+HIDDEN_FUNC(_restgpr_29)	lwz	29,-12(11)
+HIDDEN_FUNC(_restgpr_30)	lwz	30,-8(11)
+HIDDEN_FUNC(_restgpr_31)	lwz	31,-4(11)
+			blr
+FUNC_END(_restgpr_31)
+FUNC_END(_restgpr_30)
+FUNC_END(_restgpr_29)
+FUNC_END(_restgpr_28)
+FUNC_END(_restgpr_27)
+FUNC_END(_restgpr_26)
+FUNC_END(_restgpr_25)
+FUNC_END(_restgpr_24)
+FUNC_END(_restgpr_23)
+FUNC_END(_restgpr_22)
+FUNC_END(_restgpr_21)
+FUNC_END(_restgpr_20)
+FUNC_END(_restgpr_19)
+FUNC_END(_restgpr_18)
+FUNC_END(_restgpr_17)
+FUNC_END(_restgpr_16)
+FUNC_END(_restgpr_15)
+FUNC_END(_restgpr_14)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtrestvr.S b/gcc-4.9/libgcc/config/rs6000/crtrestvr.S
new file mode 100644
index 000000000..445a25d02
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtrestvr.S
@@ -0,0 +1,87 @@
+/* Routines for restoring vector registers.
+
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Written by Alan Modra, IBM
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+#undef __ALTIVEC__
+#define __ALTIVEC__ 1
+	#include "ppc-asm.h"
+
+/* Called with r0 pointing just beyond the end of the vector save area.  */
+
+	.section ".text"
+CFI_STARTPROC
+HIDDEN_FUNC(_restvr_20)
+	li r11,-192
+	lvx v20,r11,r0
+HIDDEN_FUNC(_restvr_21)
+	li r11,-176
+	lvx v21,r11,r0
+HIDDEN_FUNC(_restvr_22)
+	li r11,-160
+	lvx v22,r11,r0
+HIDDEN_FUNC(_restvr_23)
+	li r11,-144
+	lvx v23,r11,r0
+HIDDEN_FUNC(_restvr_24)
+	li r11,-128
+	lvx v24,r11,r0
+HIDDEN_FUNC(_restvr_25)
+	li r11,-112
+	lvx v25,r11,r0
+HIDDEN_FUNC(_restvr_26)
+	li r11,-96
+	lvx v26,r11,r0
+HIDDEN_FUNC(_restvr_27)
+	li r11,-80
+	lvx v27,r11,r0
+HIDDEN_FUNC(_restvr_28)
+	li r11,-64
+	lvx v28,r11,r0
+HIDDEN_FUNC(_restvr_29)
+	li r11,-48
+	lvx v29,r11,r0
+HIDDEN_FUNC(_restvr_30)
+	li r11,-32
+	lvx v30,r11,r0
+HIDDEN_FUNC(_restvr_31)
+	li r11,-16
+	lvx v31,r11,r0
+	blr
+FUNC_END(_restvr_31)
+FUNC_END(_restvr_30)
+FUNC_END(_restvr_29)
+FUNC_END(_restvr_28)
+FUNC_END(_restvr_27)
+FUNC_END(_restvr_26)
+FUNC_END(_restvr_25)
+FUNC_END(_restvr_24)
+FUNC_END(_restvr_23)
+FUNC_END(_restvr_22)
+FUNC_END(_restvr_21)
+FUNC_END(_restvr_20)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtresxfpr.S b/gcc-4.9/libgcc/config/rs6000/crtresxfpr.S
new file mode 100644
index 000000000..3373a53b7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtresxfpr.S
@@ -0,0 +1,125 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for restoring floating point registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the floating point save area.  */
+/* In addition to restoring the fp registers, it will return to the caller's */
+/* caller */
+
+CFI_STARTPROC
+CFI_DEF_CFA_REGISTER (11)
+CFI_OFFSET (65, 4)
+CFI_OFFSET (46, -144)
+CFI_OFFSET (47, -136)
+CFI_OFFSET (48, -128)
+CFI_OFFSET (49, -120)
+CFI_OFFSET (50, -112)
+CFI_OFFSET (51, -104)
+CFI_OFFSET (52, -96)
+CFI_OFFSET (53, -88)
+CFI_OFFSET (54, -80)
+CFI_OFFSET (55, -72)
+CFI_OFFSET (56, -64)
+CFI_OFFSET (57, -56)
+CFI_OFFSET (58, -48)
+CFI_OFFSET (59, -40)
+CFI_OFFSET (60, -32)
+CFI_OFFSET (61, -24)
+CFI_OFFSET (62, -16)
+CFI_OFFSET (63, -8)
+HIDDEN_FUNC(_restfpr_14_x)	lfd	14,-144(11)	/* restore fp registers */
+CFI_RESTORE (46)
+HIDDEN_FUNC(_restfpr_15_x)	lfd	15,-136(11)
+CFI_RESTORE (47)
+HIDDEN_FUNC(_restfpr_16_x)	lfd	16,-128(11)
+CFI_RESTORE (48)
+HIDDEN_FUNC(_restfpr_17_x)	lfd	17,-120(11)
+CFI_RESTORE (49)
+HIDDEN_FUNC(_restfpr_18_x)	lfd	18,-112(11)
+CFI_RESTORE (50)
+HIDDEN_FUNC(_restfpr_19_x)	lfd	19,-104(11)
+CFI_RESTORE (51)
+HIDDEN_FUNC(_restfpr_20_x)	lfd	20,-96(11)
+CFI_RESTORE (52)
+HIDDEN_FUNC(_restfpr_21_x)	lfd	21,-88(11)
+CFI_RESTORE (53)
+HIDDEN_FUNC(_restfpr_22_x)	lfd	22,-80(11)
+CFI_RESTORE (54)
+HIDDEN_FUNC(_restfpr_23_x)	lfd	23,-72(11)
+CFI_RESTORE (55)
+HIDDEN_FUNC(_restfpr_24_x)	lfd	24,-64(11)
+CFI_RESTORE (56)
+HIDDEN_FUNC(_restfpr_25_x)	lfd	25,-56(11)
+CFI_RESTORE (57)
+HIDDEN_FUNC(_restfpr_26_x)	lfd	26,-48(11)
+CFI_RESTORE (58)
+HIDDEN_FUNC(_restfpr_27_x)	lfd	27,-40(11)
+CFI_RESTORE (59)
+HIDDEN_FUNC(_restfpr_28_x)	lfd	28,-32(11)
+CFI_RESTORE (60)
+HIDDEN_FUNC(_restfpr_29_x)	lfd	29,-24(11)
+CFI_RESTORE (61)
+HIDDEN_FUNC(_restfpr_30_x)	lfd	30,-16(11)
+CFI_RESTORE (62)
+HIDDEN_FUNC(_restfpr_31_x)	lwz	0,4(11)
+				lfd	31,-8(11)
+CFI_RESTORE (63)
+				mtlr	0
+CFI_RESTORE (65)
+				mr	1,11
+CFI_DEF_CFA_REGISTER (1)
+				blr
+FUNC_END(_restfpr_31_x)
+FUNC_END(_restfpr_30_x)
+FUNC_END(_restfpr_29_x)
+FUNC_END(_restfpr_28_x)
+FUNC_END(_restfpr_27_x)
+FUNC_END(_restfpr_26_x)
+FUNC_END(_restfpr_25_x)
+FUNC_END(_restfpr_24_x)
+FUNC_END(_restfpr_23_x)
+FUNC_END(_restfpr_22_x)
+FUNC_END(_restfpr_21_x)
+FUNC_END(_restfpr_20_x)
+FUNC_END(_restfpr_19_x)
+FUNC_END(_restfpr_18_x)
+FUNC_END(_restfpr_17_x)
+FUNC_END(_restfpr_16_x)
+FUNC_END(_restfpr_15_x)
+FUNC_END(_restfpr_14_x)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtresxgpr.S b/gcc-4.9/libgcc/config/rs6000/crtresxgpr.S
new file mode 100644
index 000000000..c1bd67917
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtresxgpr.S
@@ -0,0 +1,123 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for restoring integer registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the integer restore area.  */
+
+CFI_STARTPROC
+CFI_DEF_CFA_REGISTER (11)
+CFI_OFFSET (65, 4)
+CFI_OFFSET (14, -72)
+CFI_OFFSET (15, -68)
+CFI_OFFSET (16, -64)
+CFI_OFFSET (17, -60)
+CFI_OFFSET (18, -56)
+CFI_OFFSET (19, -52)
+CFI_OFFSET (20, -48)
+CFI_OFFSET (21, -44)
+CFI_OFFSET (22, -40)
+CFI_OFFSET (23, -36)
+CFI_OFFSET (24, -32)
+CFI_OFFSET (25, -28)
+CFI_OFFSET (26, -24)
+CFI_OFFSET (27, -20)
+CFI_OFFSET (28, -16)
+CFI_OFFSET (29, -12)
+CFI_OFFSET (30, -8)
+CFI_OFFSET (31, -4)
+HIDDEN_FUNC(_restgpr_14_x)	lwz	14,-72(11)	/* restore gp registers */
+CFI_RESTORE (14)
+HIDDEN_FUNC(_restgpr_15_x)	lwz	15,-68(11)
+CFI_RESTORE (15)
+HIDDEN_FUNC(_restgpr_16_x)	lwz	16,-64(11)
+CFI_RESTORE (16)
+HIDDEN_FUNC(_restgpr_17_x)	lwz	17,-60(11)
+CFI_RESTORE (17)
+HIDDEN_FUNC(_restgpr_18_x)	lwz	18,-56(11)
+CFI_RESTORE (18)
+HIDDEN_FUNC(_restgpr_19_x)	lwz	19,-52(11)
+CFI_RESTORE (19)
+HIDDEN_FUNC(_restgpr_20_x)	lwz	20,-48(11)
+CFI_RESTORE (20)
+HIDDEN_FUNC(_restgpr_21_x)	lwz	21,-44(11)
+CFI_RESTORE (21)
+HIDDEN_FUNC(_restgpr_22_x)	lwz	22,-40(11)
+CFI_RESTORE (22)
+HIDDEN_FUNC(_restgpr_23_x)	lwz	23,-36(11)
+CFI_RESTORE (23)
+HIDDEN_FUNC(_restgpr_24_x)	lwz	24,-32(11)
+CFI_RESTORE (24)
+HIDDEN_FUNC(_restgpr_25_x)	lwz	25,-28(11)
+CFI_RESTORE (25)
+HIDDEN_FUNC(_restgpr_26_x)	lwz	26,-24(11)
+CFI_RESTORE (26)
+HIDDEN_FUNC(_restgpr_27_x)	lwz	27,-20(11)
+CFI_RESTORE (27)
+HIDDEN_FUNC(_restgpr_28_x)	lwz	28,-16(11)
+CFI_RESTORE (28)
+HIDDEN_FUNC(_restgpr_29_x)	lwz	29,-12(11)
+CFI_RESTORE (29)
+HIDDEN_FUNC(_restgpr_30_x)	lwz	30,-8(11)
+CFI_RESTORE (30)
+HIDDEN_FUNC(_restgpr_31_x)	lwz	0,4(11)
+				lwz	31,-4(11)
+CFI_RESTORE (31)
+				mtlr	0
+CFI_RESTORE (65)
+				mr	1,11
+CFI_DEF_CFA_REGISTER (1)
+				blr
+FUNC_END(_restgpr_31_x)
+FUNC_END(_restgpr_30_x)
+FUNC_END(_restgpr_29_x)
+FUNC_END(_restgpr_28_x)
+FUNC_END(_restgpr_27_x)
+FUNC_END(_restgpr_26_x)
+FUNC_END(_restgpr_25_x)
+FUNC_END(_restgpr_24_x)
+FUNC_END(_restgpr_23_x)
+FUNC_END(_restgpr_22_x)
+FUNC_END(_restgpr_21_x)
+FUNC_END(_restgpr_20_x)
+FUNC_END(_restgpr_19_x)
+FUNC_END(_restgpr_18_x)
+FUNC_END(_restgpr_17_x)
+FUNC_END(_restgpr_16_x)
+FUNC_END(_restgpr_15_x)
+FUNC_END(_restgpr_14_x)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtsavevr.S b/gcc-4.9/libgcc/config/rs6000/crtsavevr.S
new file mode 100644
index 000000000..802b69cda
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtsavevr.S
@@ -0,0 +1,87 @@
+/* Routines for saving vector registers.
+
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Written by Alan Modra, IBM
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+#undef __ALTIVEC__
+#define __ALTIVEC__ 1
+	#include "ppc-asm.h"
+
+/* Called with r0 pointing just beyond the end of the vector save area.  */
+
+	.section ".text"
+CFI_STARTPROC
+HIDDEN_FUNC(_savevr_20)
+	li r11,-192
+	stvx v20,r11,r0
+HIDDEN_FUNC(_savevr_21)
+	li r11,-176
+	stvx v21,r11,r0
+HIDDEN_FUNC(_savevr_22)
+	li r11,-160
+	stvx v22,r11,r0
+HIDDEN_FUNC(_savevr_23)
+	li r11,-144
+	stvx v23,r11,r0
+HIDDEN_FUNC(_savevr_24)
+	li r11,-128
+	stvx v24,r11,r0
+HIDDEN_FUNC(_savevr_25)
+	li r11,-112
+	stvx v25,r11,r0
+HIDDEN_FUNC(_savevr_26)
+	li r11,-96
+	stvx v26,r11,r0
+HIDDEN_FUNC(_savevr_27)
+	li r11,-80
+	stvx v27,r11,r0
+HIDDEN_FUNC(_savevr_28)
+	li r11,-64
+	stvx v28,r11,r0
+HIDDEN_FUNC(_savevr_29)
+	li r11,-48
+	stvx v29,r11,r0
+HIDDEN_FUNC(_savevr_30)
+	li r11,-32
+	stvx v30,r11,r0
+HIDDEN_FUNC(_savevr_31)
+	li r11,-16
+	stvx v31,r11,r0
+	blr
+FUNC_END(_savevr_31)
+FUNC_END(_savevr_30)
+FUNC_END(_savevr_29)
+FUNC_END(_savevr_28)
+FUNC_END(_savevr_27)
+FUNC_END(_savevr_26)
+FUNC_END(_savevr_25)
+FUNC_END(_savevr_24)
+FUNC_END(_savevr_23)
+FUNC_END(_savevr_22)
+FUNC_END(_savevr_21)
+FUNC_END(_savevr_20)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtsavfpr.S b/gcc-4.9/libgcc/config/rs6000/crtsavfpr.S
new file mode 100644
index 000000000..b7f9b3caa
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtsavfpr.S
@@ -0,0 +1,80 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ * 
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for saving floating point registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the floating point save area.  */
+
+CFI_STARTPROC
+HIDDEN_FUNC(_savefpr_14)	stfd	14,-144(11)	/* save fp registers */
+HIDDEN_FUNC(_savefpr_15)	stfd	15,-136(11)
+HIDDEN_FUNC(_savefpr_16)	stfd	16,-128(11)
+HIDDEN_FUNC(_savefpr_17)	stfd	17,-120(11)
+HIDDEN_FUNC(_savefpr_18)	stfd	18,-112(11)
+HIDDEN_FUNC(_savefpr_19)	stfd	19,-104(11)
+HIDDEN_FUNC(_savefpr_20)	stfd	20,-96(11)
+HIDDEN_FUNC(_savefpr_21)	stfd	21,-88(11)
+HIDDEN_FUNC(_savefpr_22)	stfd	22,-80(11)
+HIDDEN_FUNC(_savefpr_23)	stfd	23,-72(11)
+HIDDEN_FUNC(_savefpr_24)	stfd	24,-64(11)
+HIDDEN_FUNC(_savefpr_25)	stfd	25,-56(11)
+HIDDEN_FUNC(_savefpr_26)	stfd	26,-48(11)
+HIDDEN_FUNC(_savefpr_27)	stfd	27,-40(11)
+HIDDEN_FUNC(_savefpr_28)	stfd	28,-32(11)
+HIDDEN_FUNC(_savefpr_29)	stfd	29,-24(11)
+HIDDEN_FUNC(_savefpr_30)	stfd	30,-16(11)
+HIDDEN_FUNC(_savefpr_31)	stfd	31,-8(11)
+			blr
+FUNC_END(_savefpr_31)
+FUNC_END(_savefpr_30)
+FUNC_END(_savefpr_29)
+FUNC_END(_savefpr_28)
+FUNC_END(_savefpr_27)
+FUNC_END(_savefpr_26)
+FUNC_END(_savefpr_25)
+FUNC_END(_savefpr_24)
+FUNC_END(_savefpr_23)
+FUNC_END(_savefpr_22)
+FUNC_END(_savefpr_21)
+FUNC_END(_savefpr_20)
+FUNC_END(_savefpr_19)
+FUNC_END(_savefpr_18)
+FUNC_END(_savefpr_17)
+FUNC_END(_savefpr_16)
+FUNC_END(_savefpr_15)
+FUNC_END(_savefpr_14)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/crtsavgpr.S b/gcc-4.9/libgcc/config/rs6000/crtsavgpr.S
new file mode 100644
index 000000000..402dca0a6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/crtsavgpr.S
@@ -0,0 +1,80 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ *   64-bit support written by David Edelsohn
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+/* On PowerPC64 Linux, these functions are provided by the linker.  */
+#ifndef __powerpc64__
+
+/* Routines for saving integer registers, called by the compiler.  */
+/* Called with r11 pointing to the stack header word of the caller of the */
+/* function, just beyond the end of the integer save area.  */
+
+CFI_STARTPROC
+HIDDEN_FUNC(_savegpr_14)	stw	14,-72(11)	/* save gp registers */
+HIDDEN_FUNC(_savegpr_15)	stw	15,-68(11)
+HIDDEN_FUNC(_savegpr_16)	stw	16,-64(11)
+HIDDEN_FUNC(_savegpr_17)	stw	17,-60(11)
+HIDDEN_FUNC(_savegpr_18)	stw	18,-56(11)
+HIDDEN_FUNC(_savegpr_19)	stw	19,-52(11)
+HIDDEN_FUNC(_savegpr_20)	stw	20,-48(11)
+HIDDEN_FUNC(_savegpr_21)	stw	21,-44(11)
+HIDDEN_FUNC(_savegpr_22)	stw	22,-40(11)
+HIDDEN_FUNC(_savegpr_23)	stw	23,-36(11)
+HIDDEN_FUNC(_savegpr_24)	stw	24,-32(11)
+HIDDEN_FUNC(_savegpr_25)	stw	25,-28(11)
+HIDDEN_FUNC(_savegpr_26)	stw	26,-24(11)
+HIDDEN_FUNC(_savegpr_27)	stw	27,-20(11)
+HIDDEN_FUNC(_savegpr_28)	stw	28,-16(11)
+HIDDEN_FUNC(_savegpr_29)	stw	29,-12(11)
+HIDDEN_FUNC(_savegpr_30)	stw	30,-8(11)
+HIDDEN_FUNC(_savegpr_31)	stw	31,-4(11)
+			blr
+FUNC_END(_savegpr_31)
+FUNC_END(_savegpr_30)
+FUNC_END(_savegpr_29)
+FUNC_END(_savegpr_28)
+FUNC_END(_savegpr_27)
+FUNC_END(_savegpr_26)
+FUNC_END(_savegpr_25)
+FUNC_END(_savegpr_24)
+FUNC_END(_savegpr_23)
+FUNC_END(_savegpr_22)
+FUNC_END(_savegpr_21)
+FUNC_END(_savegpr_20)
+FUNC_END(_savegpr_19)
+FUNC_END(_savegpr_18)
+FUNC_END(_savegpr_17)
+FUNC_END(_savegpr_16)
+FUNC_END(_savegpr_15)
+FUNC_END(_savegpr_14)
+CFI_ENDPROC
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/cxa_atexit.c b/gcc-4.9/libgcc/config/rs6000/cxa_atexit.c
new file mode 100644
index 000000000..20a4d7c70
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/cxa_atexit.c
@@ -0,0 +1,131 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+
+   NOTE: This source is derived from an old version taken from the GNU C
+   Library (glibc).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <assert.h>
+#include <stdlib.h>
+
+#include "exit.h"
+
+#undef __cxa_atexit
+
+#define atomic_write_barrier() __asm__ ("eieio" ::: "memory")
+
+int
+attribute_hidden
+__internal_atexit (void (*func) (void *), void *arg, void *d,
+		   struct exit_function_list **listp)
+{
+  struct exit_function *new = __new_exitfn (listp);
+
+  if (new == NULL)
+    return -1;
+
+#ifdef PTR_MANGLE
+  PTR_MANGLE (func);
+#endif
+  new->func.cxa.fn = (void (*) (void *, int)) func;
+  new->func.cxa.arg = arg;
+  new->func.cxa.dso_handle = d;
+  atomic_write_barrier ();
+  new->flavor = ef_cxa;
+  return 0;
+}
+
+
+/* Register a function to be called by exit or when a shared library
+   is unloaded.  This function is only called from code generated by
+   the C++ compiler.  */
+int
+__cxa_atexit (void (*func) (void *), void *arg, void *d)
+{
+  return __internal_atexit (func, arg, d, &__exit_funcs);
+}
+INTDEF(__cxa_atexit)
+
+
+static struct exit_function_list initial;
+struct exit_function_list *__exit_funcs = &initial;
+uint64_t __new_exitfn_called;
+
+struct exit_function *
+__new_exitfn (struct exit_function_list **listp)
+{
+  struct exit_function_list *p = NULL;
+  struct exit_function_list *l;
+  struct exit_function *r = NULL;
+  size_t i = 0;
+
+  for (l = *listp; l != NULL; p = l, l = l->next)
+    {
+      for (i = l->idx; i > 0; --i)
+	if (l->fns[i - 1].flavor != ef_free)
+	  break;
+
+      if (i > 0)
+	break;
+
+      /* This block is completely unused.  */
+      l->idx = 0;
+    }
+
+  if (l == NULL || i == sizeof (l->fns) / sizeof (l->fns[0]))
+    {
+      /* The last entry in a block is used.  Use the first entry in
+	 the previous block if it exists.  Otherwise create a new one.  */
+      if (p == NULL)
+	{
+	  assert (l != NULL);
+	  p = (struct exit_function_list *)
+	    calloc (1, sizeof (struct exit_function_list));
+	  if (p != NULL)
+	    {
+	      p->next = *listp;
+	      *listp = p;
+	    }
+	}
+
+      if (p != NULL)
+	{
+	  r = &p->fns[0];
+	  p->idx = 1;
+	}
+    }
+  else
+    {
+      /* There is more room in the block.  */
+      r = &l->fns[i];
+      l->idx = i + 1;
+    }
+
+  /* Mark entry as used, but we don't know the flavor now.  */
+  if (r != NULL)
+    {
+      r->flavor = ef_us;
+      ++__new_exitfn_called;
+    }
+
+  return r;
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/cxa_finalize.c b/gcc-4.9/libgcc/config/rs6000/cxa_finalize.c
new file mode 100644
index 000000000..0f42335a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/cxa_finalize.c
@@ -0,0 +1,85 @@
+/* Copyright (C) 1999-2014 Free Software Foundation, Inc.
+
+   NOTE: This source is derived from an old version taken from the GNU C
+   Library (glibc).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <assert.h>
+#include <stdlib.h>
+#include "exit.h"
+
+
+static boolean_t
+catomic_compare_and_exchange_bool_acq (long *mem, long newval, long oldval)
+{
+  return __atomic_compare_exchange (mem, &oldval, &newval, 0,
+				    __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
+}
+
+/* If D is non-NULL, call all functions registered with `__cxa_atexit'
+   with the same dso handle.  Otherwise, if D is NULL, call all of the
+   registered handlers.  */
+void
+__cxa_finalize (void *d)
+{
+  struct exit_function_list *funcs;
+
+ restart:
+  for (funcs = __exit_funcs; funcs; funcs = funcs->next)
+    {
+      struct exit_function *f;
+
+      for (f = &funcs->fns[funcs->idx - 1]; f >= &funcs->fns[0]; --f)
+	{
+	  void (*cxafn) (void *arg, int status);
+	  void *cxaarg;
+
+	  if ((d == NULL || d == f->func.cxa.dso_handle)
+	      /* We don't want to run this cleanup more than once.  */
+	      && (cxafn = f->func.cxa.fn,
+		  cxaarg = f->func.cxa.arg,
+		  ! catomic_compare_and_exchange_bool_acq (&f->flavor, ef_free,
+							   ef_cxa)))
+	    {
+	      uint64_t check = __new_exitfn_called;
+
+#ifdef PTR_DEMANGLE
+	      PTR_DEMANGLE (cxafn);
+#endif
+	      cxafn (cxaarg, 0);
+
+	      /* It is possible that that last exit function registered
+		 more exit functions.  Start the loop over.  */
+	      if (__builtin_expect (check != __new_exitfn_called, 0))
+		goto restart;
+	    }
+	}
+    }
+
+  /* Remove the registered fork handlers.  We do not have to
+     unregister anything if the program is going to terminate anyway.  */
+#ifdef UNREGISTER_ATFORK
+  if (d != NULL)
+    UNREGISTER_ATFORK (d);
+#endif
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-asm.h b/gcc-4.9/libgcc/config/rs6000/darwin-asm.h
new file mode 100644
index 000000000..eca409514
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-asm.h
@@ -0,0 +1,51 @@
+/*  Macro definitions to used to support 32/64-bit code in Darwin's
+ *  assembly files.
+ *
+ *   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* These are donated from /usr/include/architecture/ppc . */
+
+#if defined(__ppc64__)
+#define MODE_CHOICE(x, y) y
+#else
+#define MODE_CHOICE(x, y) x
+#endif
+
+#define cmpg    MODE_CHOICE(cmpw, cmpd)
+#define lg      MODE_CHOICE(lwz, ld)
+#define stg     MODE_CHOICE(stw, std)
+#define lgx     MODE_CHOICE(lwzx, ldx)
+#define stgx    MODE_CHOICE(stwx, stdx)
+#define lgu     MODE_CHOICE(lwzu, ldu)
+#define stgu    MODE_CHOICE(stwu, stdu)
+#define lgux    MODE_CHOICE(lwzux, ldux)
+#define stgux   MODE_CHOICE(stwux, stdux)
+#define lgwa    MODE_CHOICE(lwz, lwa)
+
+#define g_long  MODE_CHOICE(long, quad)         /* usage is ".g_long" */
+
+#define GPR_BYTES       MODE_CHOICE(4,8)        /* size of a GPR in bytes */
+#define LOG2_GPR_BYTES  MODE_CHOICE(2,3)        /* log2(GPR_BYTES) */
+
+#define SAVED_LR_OFFSET MODE_CHOICE(8,16)	/* position of saved
+						   LR in frame */
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-crt2.c b/gcc-4.9/libgcc/config/rs6000/darwin-crt2.c
new file mode 100644
index 000000000..903a5c6b7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-crt2.c
@@ -0,0 +1,153 @@
+/* KeyMgr backwards-compatibility support for Darwin.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* It is incorrect to include config.h here, because this file is being
+   compiled for the target, and hence definitions concerning only the host
+   do not apply.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+
+/* This file doesn't do anything useful on non-powerpc targets, since they
+   don't have backwards compatibility anyway.  */
+
+#ifdef __ppc__
+
+/* Homemade decls substituting for getsect.h and dyld.h, so cross
+   compilation works.  */
+struct mach_header;
+extern char *getsectdatafromheader (struct mach_header *, const char *,
+				    const char *, unsigned long *);
+extern void _dyld_register_func_for_add_image
+  (void (*) (struct mach_header *, unsigned long));
+extern void _dyld_register_func_for_remove_image
+  (void (*) (struct mach_header *, unsigned long));
+
+extern void __darwin_gcc3_preregister_frame_info (void);
+
+/* These are from "keymgr.h".  */
+extern void _init_keymgr (void);
+extern void *_keymgr_get_and_lock_processwide_ptr (unsigned key);
+extern void _keymgr_set_and_unlock_processwide_ptr (unsigned key, void *ptr);
+
+extern void *__keymgr_global[];
+typedef struct _Sinfo_Node {
+        unsigned int size ;             /*size of this node*/
+        unsigned short major_version ;  /*API major version.*/
+        unsigned short minor_version ;  /*API minor version.*/
+        } _Tinfo_Node ;
+
+/* KeyMgr 3.x is the first one supporting GCC3 stuff natively.  */
+#define KEYMGR_API_MAJOR_GCC3           3       
+/* ... with these keys.  */
+#define KEYMGR_GCC3_LIVE_IMAGE_LIST	301     /* loaded images  */
+#define KEYMGR_GCC3_DW2_OBJ_LIST	302     /* Dwarf2 object list  */   
+
+/* Node of KEYMGR_GCC3_LIVE_IMAGE_LIST.  Info about each resident image.  */
+struct live_images {
+  unsigned long this_size;                      /* sizeof (live_images)  */
+  struct mach_header *mh;                       /* the image info  */
+  unsigned long vm_slide;
+  void (*destructor)(struct live_images *);     /* destructor for this  */
+  struct live_images *next;
+  unsigned int examined_p;
+  void *fde;
+  void *object_info;
+  unsigned long info[2];                        /* Future use.  */
+};
+
+
+/* These routines are used only on Darwin versions before 10.2.
+   Later versions have equivalent code in the system.  
+   Eventually, they might go away, although it might be a long time...  */
+
+static void darwin_unwind_dyld_remove_image_hook 
+  (struct mach_header *m, unsigned long s);
+static void darwin_unwind_dyld_remove_image_hook 
+  (struct mach_header *m, unsigned long s);
+extern void __darwin_gcc3_preregister_frame_info (void);
+     
+static void
+darwin_unwind_dyld_add_image_hook (struct mach_header *mh, unsigned long slide)
+{
+  struct live_images *l = (struct live_images *)calloc (1, sizeof (*l));
+  l->mh = mh;
+  l->vm_slide = slide;
+  l->this_size = sizeof (*l);
+  l->next = (struct live_images *)
+	_keymgr_get_and_lock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST);
+  _keymgr_set_and_unlock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST, l);
+}
+
+static void
+darwin_unwind_dyld_remove_image_hook (struct mach_header *m, unsigned long s)
+{
+  struct live_images *top, **lip, *destroy = NULL;
+
+  /* Look for it in the list of live images and delete it.  */
+
+  top = (struct live_images *)
+	   _keymgr_get_and_lock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST);
+  for (lip = &top; *lip != NULL; lip = &(*lip)->next)
+    {
+      if ((*lip)->mh == m && (*lip)->vm_slide == s)
+        {
+          destroy = *lip;
+          *lip = destroy->next;			/* unlink DESTROY  */
+
+          if (destroy->this_size != sizeof (*destroy))	/* sanity check  */
+            abort ();
+
+          break;
+        }
+    }
+  _keymgr_set_and_unlock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST, top);
+
+  /* Now that we have unlinked this from the image list, toss it.  */
+  if (destroy != NULL)
+    {
+      if (destroy->destructor != NULL)
+	(*destroy->destructor) (destroy);
+      free (destroy);
+    }
+}
+
+void
+__darwin_gcc3_preregister_frame_info (void)
+{
+  const _Tinfo_Node *info;
+  _init_keymgr ();
+  info = (_Tinfo_Node *)__keymgr_global[2];
+  if (info != NULL)
+    {
+      if (info->major_version >= KEYMGR_API_MAJOR_GCC3)
+	return;
+      /* Otherwise, use our own add_image_hooks.  */
+    }
+
+  _dyld_register_func_for_add_image (darwin_unwind_dyld_add_image_hook);
+  _dyld_register_func_for_remove_image (darwin_unwind_dyld_remove_image_hook);
+}
+
+#endif  /* __ppc__ */
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-fallback.c b/gcc-4.9/libgcc/config/rs6000/darwin-fallback.c
new file mode 100644
index 000000000..3f502d09d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-fallback.c
@@ -0,0 +1,488 @@
+/* Fallback frame-state unwinder for Darwin.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef __ppc__
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include "dwarf2.h"
+#include "unwind.h"
+#include "unwind-dw2.h"
+#include <stdint.h>
+#include <stdbool.h>
+#include <sys/types.h>
+#include <signal.h>
+
+#define R_LR		65
+#define R_CTR		66
+#define R_CR2		70
+#define R_XER		76
+#define R_VR0		77
+#define R_VRSAVE	109
+#define R_VSCR		110
+#define R_SPEFSCR	112
+
+typedef unsigned long reg_unit;
+
+/* Place in GPRS the parameters to the first 'sc' instruction that would
+   have been executed if we were returning from this CONTEXT, or
+   return false if an unexpected instruction is encountered.  */
+
+static bool
+interpret_libc (reg_unit gprs[32], struct _Unwind_Context *context)
+{
+  uint32_t *pc = (uint32_t *)_Unwind_GetIP (context);
+  uint32_t cr;
+  reg_unit lr = (reg_unit) pc;
+  reg_unit ctr = 0;
+  uint32_t *invalid_address = NULL;
+
+  int i;
+
+  for (i = 0; i < 13; i++)
+    gprs[i] = 1;
+  gprs[1] = _Unwind_GetCFA (context);
+  for (; i < 32; i++)
+    gprs[i] = _Unwind_GetGR (context, i);
+  cr = _Unwind_GetGR (context, R_CR2);
+
+  /* For each supported Libc, we have to track the code flow
+     all the way back into the kernel.
+  
+     This code is believed to support all released Libc/Libsystem builds since
+     Jaguar 6C115, including all the security updates.  To be precise,
+
+     Libc	Libsystem	Build(s)
+     262~1	60~37		6C115
+     262~1	60.2~4		6D52
+     262~1	61~3		6F21-6F22
+     262~1	63~24		6G30-6G37
+     262~1	63~32		6I34-6I35
+     262~1	63~64		6L29-6L60
+     262.4.1~1	63~84		6L123-6R172
+     
+     320~1	71~101		7B85-7D28
+     320~1	71~266		7F54-7F56
+     320~1	71~288		7F112
+     320~1	71~289		7F113
+     320.1.3~1	71.1.1~29	7H60-7H105
+     320.1.3~1	71.1.1~30	7H110-7H113
+     320.1.3~1	71.1.1~31	7H114
+     
+     That's a big table!  It would be insane to try to keep track of
+     every little detail, so we just read the code itself and do what
+     it would do.
+  */
+
+  for (;;)
+    {
+      uint32_t ins = *pc++;
+      
+      if ((ins & 0xFC000003) == 0x48000000)  /* b instruction */
+	{
+	  pc += ((((int32_t) ins & 0x3FFFFFC) ^ 0x2000000) - 0x2000004) / 4;
+	  continue;
+	}
+      if ((ins & 0xFC600000) == 0x2C000000)  /* cmpwi */
+	{
+	  int32_t val1 = (int16_t) ins;
+	  int32_t val2 = gprs[ins >> 16 & 0x1F];
+	  /* Only beq and bne instructions are supported, so we only
+	     need to set the EQ bit.  */
+	  uint32_t mask = 0xF << ((ins >> 21 & 0x1C) ^ 0x1C);
+	  if (val1 == val2)
+	    cr |= mask;
+	  else
+	    cr &= ~mask;
+	  continue;
+	}
+      if ((ins & 0xFEC38003) == 0x40820000)  /* forwards beq/bne */
+	{
+	  if ((cr >> ((ins >> 16 & 0x1F) ^ 0x1F) & 1) == (ins >> 24 & 1))
+	    pc += (ins & 0x7FFC) / 4 - 1;
+	  continue;
+	}
+      if ((ins & 0xFC0007FF) == 0x7C000378) /* or, including mr */
+	{
+	  gprs [ins >> 16 & 0x1F] = (gprs [ins >> 11 & 0x1F] 
+				     | gprs [ins >> 21 & 0x1F]);
+	  continue;
+	}
+      if (ins >> 26 == 0x0E)  /* addi, including li */
+	{
+	  reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
+	  gprs [ins >> 21 & 0x1F] = src + (int16_t) ins;
+	  continue;
+	}
+      if (ins >> 26 == 0x0F)  /* addis, including lis */
+	{
+	  reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
+	  gprs [ins >> 21 & 0x1F] = src + ((int16_t) ins << 16);
+	  continue;
+	}
+      if (ins >> 26 == 0x20)  /* lwz */
+	{
+	  reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
+	  uint32_t *p = (uint32_t *)(src + (int16_t) ins);
+	  if (p == invalid_address)
+	    return false;
+	  gprs [ins >> 21 & 0x1F] = *p;
+	  continue;
+	}
+      if (ins >> 26 == 0x21)  /* lwzu */
+	{
+	  uint32_t *p = (uint32_t *)(gprs [ins >> 16 & 0x1F] += (int16_t) ins);
+	  if (p == invalid_address)
+	    return false;
+	  gprs [ins >> 21 & 0x1F] = *p;
+	  continue;
+	}
+      if (ins >> 26 == 0x24)  /* stw */
+	/* What we hope this is doing is '--in_sigtramp'.  We don't want
+	   to actually store to memory, so just make a note of the
+	   address and refuse to load from it.  */
+	{
+	  reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
+	  uint32_t *p = (uint32_t *)(src + (int16_t) ins);
+	  if (p == NULL || invalid_address != NULL)
+	    return false;
+	  invalid_address = p;
+	  continue;
+	}
+      if (ins >> 26 == 0x2E) /* lmw */
+	{
+	  reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
+	  uint32_t *p = (uint32_t *)(src + (int16_t) ins);
+	  int i;
+
+	  for (i = (ins >> 21 & 0x1F); i < 32; i++)
+	    {
+	      if (p == invalid_address)
+		return false;
+	      gprs[i] = *p++;
+	    }
+	  continue;
+	}
+      if ((ins & 0xFC1FFFFF) == 0x7c0803a6)  /* mtlr */
+	{
+	  lr = gprs [ins >> 21 & 0x1F];
+	  continue;
+	}
+      if ((ins & 0xFC1FFFFF) == 0x7c0802a6)  /* mflr */
+	{
+	  gprs [ins >> 21 & 0x1F] = lr;
+	  continue;
+	}
+      if ((ins & 0xFC1FFFFF) == 0x7c0903a6)  /* mtctr */
+	{
+	  ctr = gprs [ins >> 21 & 0x1F];
+	  continue;
+	}
+      /* The PowerPC User's Manual says that bit 11 of the mtcrf
+	 instruction is reserved and should be set to zero, but it
+	 looks like the Darwin assembler doesn't do that... */
+      if ((ins & 0xFC000FFF) == 0x7c000120) /* mtcrf */
+	{
+	  int i;
+	  uint32_t mask = 0;
+	  for (i = 0; i < 8; i++)
+	    mask |= ((-(ins >> (12 + i) & 1)) & 0xF) << 4 * i;
+	  cr = (cr & ~mask) | (gprs [ins >> 21 & 0x1F] & mask);
+	  continue;
+	}
+      if (ins == 0x429f0005)  /* bcl- 20,4*cr7+so,.+4, loads pc into LR */
+	{
+	  lr = (reg_unit) pc;
+	  continue;
+	}
+      if (ins == 0x4e800420) /* bctr */
+	{
+	  pc = (uint32_t *) ctr;
+	  continue;
+	}
+      if (ins == 0x44000002) /* sc */
+	return true;
+
+      return false;
+    }
+}
+
+/* We used to include <ucontext.h> and <mach/thread_status.h>,
+   but they change so much between different Darwin system versions
+   that it's much easier to just write the structures involved here
+   directly.  */
+
+/* These defines are from the kernel's bsd/dev/ppc/unix_signal.c.  */
+#define UC_TRAD                 1
+#define UC_TRAD_VEC             6
+#define UC_TRAD64               20
+#define UC_TRAD64_VEC           25
+#define UC_FLAVOR               30
+#define UC_FLAVOR_VEC           35
+#define UC_FLAVOR64             40
+#define UC_FLAVOR64_VEC         45
+#define UC_DUAL                 50
+#define UC_DUAL_VEC             55
+
+struct gcc_ucontext 
+{
+  int onstack;
+  sigset_t sigmask;
+  void * stack_sp;
+  size_t stack_sz;
+  int stack_flags;
+  struct gcc_ucontext *link;
+  size_t mcsize;
+  struct gcc_mcontext32 *mcontext;
+};
+
+struct gcc_float_vector_state 
+{
+  double fpregs[32];
+  uint32_t fpscr_pad;
+  uint32_t fpscr;
+  uint32_t save_vr[32][4];
+  uint32_t save_vscr[4];
+};
+
+struct gcc_mcontext32 {
+  uint32_t dar;
+  uint32_t dsisr;
+  uint32_t exception;
+  uint32_t padding1[5];
+  uint32_t srr0;
+  uint32_t srr1;
+  uint32_t gpr[32];
+  uint32_t cr;
+  uint32_t xer;
+  uint32_t lr;
+  uint32_t ctr;
+  uint32_t mq;
+  uint32_t vrsave;
+  struct gcc_float_vector_state fvs;
+};
+
+/* These are based on /usr/include/ppc/ucontext.h and
+   /usr/include/mach/ppc/thread_status.h, but rewritten to be more
+   convenient, to compile on Jaguar, and to work around Radar 3712064
+   on Panther, which is that the 'es' field of 'struct mcontext64' has
+   the wrong type (doh!).  */
+
+struct gcc_mcontext64 {
+  uint64_t dar;
+  uint32_t dsisr;
+  uint32_t exception;
+  uint32_t padding1[4];
+  uint64_t srr0;
+  uint64_t srr1;
+  uint32_t gpr[32][2];
+  uint32_t cr;
+  uint32_t xer[2];  /* These are arrays because the original structure has them misaligned.  */
+  uint32_t lr[2];
+  uint32_t ctr[2];
+  uint32_t vrsave;
+  struct gcc_float_vector_state fvs;
+};
+
+#define UC_FLAVOR_SIZE \
+  (sizeof (struct gcc_mcontext32) - 33*16)
+
+#define UC_FLAVOR_VEC_SIZE (sizeof (struct gcc_mcontext32))
+
+#define UC_FLAVOR64_SIZE \
+  (sizeof (struct gcc_mcontext64) - 33*16)
+
+#define UC_FLAVOR64_VEC_SIZE (sizeof (struct gcc_mcontext64))
+
+/* Given GPRS as input to a 'sc' instruction, and OLD_CFA, update FS
+   to represent the execution of a signal return; or, if not a signal
+   return, return false.  */
+
+static bool
+handle_syscall (_Unwind_FrameState *fs, const reg_unit gprs[32],
+		_Unwind_Ptr old_cfa)
+{
+  struct gcc_ucontext *uctx;
+  bool is_64, is_vector;
+  struct gcc_float_vector_state * float_vector_state;
+  _Unwind_Ptr new_cfa;
+  int i;
+  static _Unwind_Ptr return_addr;
+  
+  /* Yay!  We're in a Libc that we understand, and it's made a
+     system call.  In Jaguar, this is a direct system call with value 103;
+     in Panther and Tiger it is a SYS_syscall call for system call number 184,
+     and in Leopard it is a direct syscall with number 184.  */
+  
+  if (gprs[0] == 0x67 /* SYS_SIGRETURN */)
+    {
+      uctx = (struct gcc_ucontext *) gprs[3];
+      is_vector = (uctx->mcsize == UC_FLAVOR64_VEC_SIZE
+		   || uctx->mcsize == UC_FLAVOR_VEC_SIZE);
+      is_64 = (uctx->mcsize == UC_FLAVOR64_VEC_SIZE
+	       || uctx->mcsize == UC_FLAVOR64_SIZE);
+    }
+  else if (gprs[0] == 0 /* SYS_syscall */ && gprs[3] == 184)
+    {
+      int ctxstyle = gprs[5];
+      uctx = (struct gcc_ucontext *) gprs[4];
+      is_vector = (ctxstyle == UC_FLAVOR_VEC || ctxstyle == UC_FLAVOR64_VEC
+		   || ctxstyle == UC_TRAD_VEC || ctxstyle == UC_TRAD64_VEC);
+      is_64 = (ctxstyle == UC_FLAVOR64_VEC || ctxstyle == UC_TRAD64_VEC
+	       || ctxstyle == UC_FLAVOR64 || ctxstyle == UC_TRAD64);
+    }
+  else if (gprs[0] == 184 /* SYS_sigreturn */)
+    {
+      int ctxstyle = gprs[4];
+      uctx = (struct gcc_ucontext *) gprs[3];
+      is_vector = (ctxstyle == UC_FLAVOR_VEC || ctxstyle == UC_FLAVOR64_VEC
+		   || ctxstyle == UC_TRAD_VEC || ctxstyle == UC_TRAD64_VEC);
+      is_64 = (ctxstyle == UC_FLAVOR64_VEC || ctxstyle == UC_TRAD64_VEC
+	       || ctxstyle == UC_FLAVOR64 || ctxstyle == UC_TRAD64);
+    }
+  else
+    return false;
+
+#define set_offset(r, addr)					\
+  (fs->regs.reg[r].how = REG_SAVED_OFFSET,			\
+   fs->regs.reg[r].loc.offset = (_Unwind_Ptr)(addr) - new_cfa)
+
+  /* Restore even the registers that are not call-saved, since they
+     might be being used in the prologue to save other registers,
+     for instance GPR0 is sometimes used to save LR.  */
+
+  /* Handle the GPRs, and produce the information needed to do the rest.  */
+  if (is_64)
+    {
+      /* The context is 64-bit, but it doesn't carry any extra information
+	 for us because only the low 32 bits of the registers are
+	 call-saved.  */
+      struct gcc_mcontext64 *m64 = (struct gcc_mcontext64 *)uctx->mcontext;
+      int i;
+
+      float_vector_state = &m64->fvs;
+
+      new_cfa = m64->gpr[1][1];
+      
+      set_offset (R_CR2, &m64->cr);
+      for (i = 0; i < 32; i++)
+	set_offset (i, m64->gpr[i] + 1);
+      set_offset (R_XER, m64->xer + 1);
+      set_offset (R_LR, m64->lr + 1);
+      set_offset (R_CTR, m64->ctr + 1);
+      if (is_vector)
+	set_offset (R_VRSAVE, &m64->vrsave);
+      
+      /* Sometimes, srr0 points to the instruction that caused the exception,
+	 and sometimes to the next instruction to be executed; we want
+	 the latter.  */
+      if (m64->exception == 3 || m64->exception == 4
+	  || m64->exception == 6
+	  || (m64->exception == 7 && !(m64->srr1 & 0x10000)))
+	return_addr = m64->srr0 + 4;
+      else
+	return_addr = m64->srr0;
+    }
+  else
+    {
+      struct gcc_mcontext32 *m = uctx->mcontext;
+      int i;
+
+      float_vector_state = &m->fvs;
+      
+      new_cfa = m->gpr[1];
+
+      set_offset (R_CR2, &m->cr);
+      for (i = 0; i < 32; i++)
+	set_offset (i, m->gpr + i);
+      set_offset (R_XER, &m->xer);
+      set_offset (R_LR, &m->lr);
+      set_offset (R_CTR, &m->ctr);
+
+      if (is_vector)
+	set_offset (R_VRSAVE, &m->vrsave);
+
+      /* Sometimes, srr0 points to the instruction that caused the exception,
+	 and sometimes to the next instruction to be executed; we want
+	 the latter.  */
+      if (m->exception == 3 || m->exception == 4
+	  || m->exception == 6
+	  || (m->exception == 7 && !(m->srr1 & 0x10000)))
+	return_addr = m->srr0 + 4;
+      else
+	return_addr = m->srr0;
+    }
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - old_cfa;;
+  
+  /* The choice of column for the return address is somewhat tricky.
+     Fortunately, the actual choice is private to this file, and
+     the space it's reserved from is the GCC register space, not the
+     DWARF2 numbering.  So any free element of the right size is an OK
+     choice.  Thus: */
+  fs->retaddr_column = ARG_POINTER_REGNUM;
+  /* FIXME: this should really be done using a DWARF2 location expression,
+     not using a static variable.  In fact, this entire file should
+     be implemented in DWARF2 expressions.  */
+  set_offset (ARG_POINTER_REGNUM, &return_addr);
+
+  for (i = 0; i < 32; i++)
+    set_offset (32 + i, float_vector_state->fpregs + i);
+  set_offset (R_SPEFSCR, &float_vector_state->fpscr);
+  
+  if (is_vector)
+    {
+      for (i = 0; i < 32; i++)
+	set_offset (R_VR0 + i, float_vector_state->save_vr + i);
+      set_offset (R_VSCR, float_vector_state->save_vscr);
+    }
+
+  return true;
+}
+
+/* This is also prototyped in rs6000/darwin.h, inside the
+   MD_FALLBACK_FRAME_STATE_FOR macro.  */
+extern bool _Unwind_fallback_frame_state_for (struct _Unwind_Context *context,
+					      _Unwind_FrameState *fs);
+
+/* Implement the MD_FALLBACK_FRAME_STATE_FOR macro,
+   returning true iff the frame was a sigreturn() frame that we
+   can understand.  */
+
+bool
+_Unwind_fallback_frame_state_for (struct _Unwind_Context *context,
+				  _Unwind_FrameState *fs)
+{
+  reg_unit gprs[32];
+
+  if (!interpret_libc (gprs, context))
+    return false;
+  return handle_syscall (fs, gprs, _Unwind_GetCFA (context));
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-fpsave.S b/gcc-4.9/libgcc/config/rs6000/darwin-fpsave.S
new file mode 100644
index 000000000..510a9d650
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-fpsave.S
@@ -0,0 +1,92 @@
+/*  This file contains the floating-point save and restore routines.
+ *
+ *   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* THE SAVE AND RESTORE ROUTINES CAN HAVE ONLY ONE GLOBALLY VISIBLE
+   ENTRY POINT - callers have to jump to "saveFP+60" to save f29..f31,
+   for example.  For FP reg saves/restores, it takes one instruction
+   (4 bytes) to do the operation; for Vector regs, 2 instructions are
+   required (8 bytes.)
+
+   MORAL: DO NOT MESS AROUND WITH THESE FUNCTIONS!  */
+
+#include "darwin-asm.h"
+
+.text
+	.align 2
+
+/* saveFP saves R0 -- assumed to be the callers LR -- to 8/16(R1).  */
+
+.private_extern saveFP
+saveFP:
+	stfd f14,-144(r1)
+	stfd f15,-136(r1)
+	stfd f16,-128(r1)
+	stfd f17,-120(r1)
+	stfd f18,-112(r1)
+	stfd f19,-104(r1)
+	stfd f20,-96(r1)
+	stfd f21,-88(r1)
+	stfd f22,-80(r1)
+	stfd f23,-72(r1)
+	stfd f24,-64(r1)
+	stfd f25,-56(r1)
+	stfd f26,-48(r1)
+	stfd f27,-40(r1)
+	stfd f28,-32(r1)
+	stfd f29,-24(r1)
+	stfd f30,-16(r1)
+	stfd f31,-8(r1)
+	stg  r0,SAVED_LR_OFFSET(r1)
+	blr
+
+/* restFP restores the caller`s LR from 8/16(R1).  Note that the code for
+   this starts at the offset of F30 restoration, so calling this
+   routine in an attempt to restore only F31 WILL NOT WORK (it would
+   be a stupid thing to do, anyway.)  */
+
+.private_extern restFP
+restFP:
+	lfd f14,-144(r1)
+	lfd f15,-136(r1)
+	lfd f16,-128(r1)
+	lfd f17,-120(r1)
+	lfd f18,-112(r1)
+	lfd f19,-104(r1)
+	lfd f20,-96(r1)
+	lfd f21,-88(r1)
+	lfd f22,-80(r1)
+	lfd f23,-72(r1)
+	lfd f24,-64(r1)
+	lfd f25,-56(r1)
+	lfd f26,-48(r1)
+	lfd f27,-40(r1)
+	lfd f28,-32(r1)
+	lfd f29,-24(r1)
+			/* <OFFSET OF F30 RESTORE> restore callers LR  */
+	lg r0,SAVED_LR_OFFSET(r1)
+	lfd f30,-16(r1)
+			/* and prepare for return to caller  */
+	mtlr r0	
+	lfd f31,-8(r1)
+	blr
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-gpsave.S b/gcc-4.9/libgcc/config/rs6000/darwin-gpsave.S
new file mode 100644
index 000000000..a02eccb95
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-gpsave.S
@@ -0,0 +1,118 @@
+/*  This file contains the GPR save and restore routines for Darwin.
+ *
+ *   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+/* Contributed by Iain Sandoe  <iains@gcc.gnu.org> */
+
+/* Like their FP and VEC counterparts, these routines have only one externally
+   visible entry point.  Calls have to be constructed as offsets from this.
+   (I.E. callers have to jump to "saveGPR+((x-13)*4" to save registers x..31).
+
+   Each save/load instruction is 4 bytes long (for both m32 and m64 builds).
+
+   The save/restores here are done w.r.t r11.
+
+   restGPRx restores the link reg from the stack and returns to the saved
+   address.
+
+   */
+
+#include "darwin-asm.h"
+
+	.text
+	.align 2
+
+	.private_extern saveGPR
+saveGPR:
+	stg r13,(-19 * GPR_BYTES)(r11)
+	stg r14,(-18 * GPR_BYTES)(r11)
+	stg r15,(-17 * GPR_BYTES)(r11)
+	stg r16,(-16 * GPR_BYTES)(r11)
+	stg r17,(-15 * GPR_BYTES)(r11)
+	stg r18,(-14 * GPR_BYTES)(r11)
+	stg r19,(-13 * GPR_BYTES)(r11)
+	stg r20,(-12 * GPR_BYTES)(r11)
+	stg r21,(-11 * GPR_BYTES)(r11)
+	stg r22,(-10 * GPR_BYTES)(r11)
+	stg r23,( -9 * GPR_BYTES)(r11)
+	stg r24,( -8 * GPR_BYTES)(r11)
+	stg r25,( -7 * GPR_BYTES)(r11)
+	stg r26,( -6 * GPR_BYTES)(r11)
+	stg r27,( -5 * GPR_BYTES)(r11)
+	stg r28,( -4 * GPR_BYTES)(r11)
+	stg r29,( -3 * GPR_BYTES)(r11)
+	stg r30,( -2 * GPR_BYTES)(r11)
+	stg r31,( -1 * GPR_BYTES)(r11)
+	blr
+
+/* */
+
+	.private_extern restGPR
+restGPR:
+	lg r13,(-19 * GPR_BYTES)(r11)
+	lg r14,(-18 * GPR_BYTES)(r11)
+	lg r15,(-17 * GPR_BYTES)(r11)
+	lg r16,(-16 * GPR_BYTES)(r11)
+	lg r17,(-15 * GPR_BYTES)(r11)
+	lg r18,(-14 * GPR_BYTES)(r11)
+	lg r19,(-13 * GPR_BYTES)(r11)
+	lg r20,(-12 * GPR_BYTES)(r11)
+	lg r21,(-11 * GPR_BYTES)(r11)
+	lg r22,(-10 * GPR_BYTES)(r11)
+	lg r23,( -9 * GPR_BYTES)(r11)
+	lg r24,( -8 * GPR_BYTES)(r11)
+	lg r25,( -7 * GPR_BYTES)(r11)
+	lg r26,( -6 * GPR_BYTES)(r11)
+	lg r27,( -5 * GPR_BYTES)(r11)
+	lg r28,( -4 * GPR_BYTES)(r11)
+	lg r29,( -3 * GPR_BYTES)(r11)
+	lg r30,( -2 * GPR_BYTES)(r11)
+	lg r31,( -1 * GPR_BYTES)(r11)
+	blr
+
+	.private_extern restGPRx
+restGPRx:
+	lg r13,(-19 * GPR_BYTES)(r11)
+	lg r14,(-18 * GPR_BYTES)(r11)
+	lg r15,(-17 * GPR_BYTES)(r11)
+	lg r16,(-16 * GPR_BYTES)(r11)
+	lg r17,(-15 * GPR_BYTES)(r11)
+	lg r18,(-14 * GPR_BYTES)(r11)
+	lg r19,(-13 * GPR_BYTES)(r11)
+	lg r20,(-12 * GPR_BYTES)(r11)
+	lg r21,(-11 * GPR_BYTES)(r11)
+	lg r22,(-10 * GPR_BYTES)(r11)
+	lg r23,( -9 * GPR_BYTES)(r11)
+	lg r24,( -8 * GPR_BYTES)(r11)
+	lg r25,( -7 * GPR_BYTES)(r11)
+	lg r26,( -6 * GPR_BYTES)(r11)
+	lg r27,( -5 * GPR_BYTES)(r11)
+	lg r28,( -4 * GPR_BYTES)(r11)
+	lg r29,( -3 * GPR_BYTES)(r11)
+	/* Like the FP restore, we start from the offset for r30
+	   thus a restore of only r31 is not going to work.  */
+	lg r0,SAVED_LR_OFFSET(r1)
+	lg r30,( -2 * GPR_BYTES)(r11)
+	mtlr r0
+	lg r31,( -1 * GPR_BYTES)(r11)
+	blr
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-tramp.S b/gcc-4.9/libgcc/config/rs6000/darwin-tramp.S
new file mode 100644
index 000000000..9cf1ab070
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-tramp.S
@@ -0,0 +1,125 @@
+/*  Special support for trampolines
+ *
+ *   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+#include "darwin-asm.h"
+
+/* Set up trampolines.  */
+
+.text
+	.align	LOG2_GPR_BYTES
+Ltrampoline_initial:
+	mflr	r0
+	bl	1f
+Lfunc = .-Ltrampoline_initial
+	.g_long	0		/* will be replaced with function address */
+Lchain = .-Ltrampoline_initial
+	.g_long	0		/* will be replaced with static chain */
+1:	mflr	r11
+	lg	r12,0(r11)	/* function address */
+	mtlr	r0
+	mtctr	r12
+	lg	r11,GPR_BYTES(r11)	/* static chain */
+	bctr
+
+trampoline_size = .-Ltrampoline_initial
+
+/* R3 = stack address to store trampoline */
+/* R4 = length of trampoline area */
+/* R5 = function address */
+/* R6 = static chain */
+
+	.globl ___trampoline_setup
+___trampoline_setup:
+	mflr	r0		/* save return address */
+        bcl 20,31,LCF0		/* load up __trampoline_initial into r7 */
+LCF0:
+        mflr	r11
+        addis	r7,r11,ha16(LTRAMP-LCF0)
+	lg	r7,lo16(LTRAMP-LCF0)(r7)
+	subi	r7,r7,4
+	li	r8,trampoline_size	/* verify trampoline big enough */
+	cmpg	cr1,r8,r4
+	srwi	r4,r4,2			/* # words to move (insns always 4-byte) */
+	addi	r9,r3,-4	/* adjust pointer for lgu */
+	mtctr	r4
+	blt	cr1,Labort
+
+	mtlr	r0
+
+	/* Copy the instructions to the stack */
+Lmove:
+	lwzu	r10,4(r7)
+	stwu	r10,4(r9)
+	bdnz	Lmove
+
+	/* Store correct function and static chain */
+	stg	r5,Lfunc(r3)
+	stg	r6,Lchain(r3)
+
+	/* Now flush both caches */
+	mtctr	r4
+Lcache:
+	icbi	0,r3
+	dcbf	0,r3
+	addi	r3,r3,4
+	bdnz	Lcache
+
+	/* Ensure cache-flushing has finished.  */
+	sync
+	isync
+
+	/* Make stack writeable.  */
+	b	___enable_execute_stack
+
+Labort:
+#ifdef __DYNAMIC__
+	bl	L_abort$stub
+.data
+.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
+	.align 2
+L_abort$stub:
+        .indirect_symbol _abort
+        mflr r0
+        bcl 20,31,L0$_abort
+L0$_abort:
+        mflr r11
+        addis r11,r11,ha16(L_abort$lazy_ptr-L0$_abort)
+        mtlr r0
+	lgu r12,lo16(L_abort$lazy_ptr-L0$_abort)(r11)
+        mtctr r12
+        bctr
+.data
+.lazy_symbol_pointer
+L_abort$lazy_ptr:
+        .indirect_symbol _abort
+	.g_long	dyld_stub_binding_helper
+#else
+	bl	_abort
+#endif
+.data
+	.align LOG2_GPR_BYTES
+LTRAMP:
+	.g_long Ltrampoline_initial
+
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-unwind.h b/gcc-4.9/libgcc/config/rs6000/darwin-unwind.h
new file mode 100644
index 000000000..e7f4a4983
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-unwind.h
@@ -0,0 +1,34 @@
+/* DWARF2 EH unwinding support for 32-bit PowerPC Darwin.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef __LP64__
+
+extern bool _Unwind_fallback_frame_state_for
+  (struct _Unwind_Context *context, _Unwind_FrameState *fs);
+
+#define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS)	\
+  (_Unwind_fallback_frame_state_for (CONTEXT, FS)	\
+   ? _URC_NO_REASON : _URC_END_OF_STACK)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-vecsave.S b/gcc-4.9/libgcc/config/rs6000/darwin-vecsave.S
new file mode 100644
index 000000000..24ed0f54e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-vecsave.S
@@ -0,0 +1,155 @@
+/*  This file contains the vector save and restore routines.
+ *
+ *   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Vector save/restore routines for Darwin.  Note that each vector
+   save/restore requires 2 instructions (8 bytes.)
+
+   THE SAVE AND RESTORE ROUTINES CAN HAVE ONLY ONE GLOBALLY VISIBLE
+   ENTRY POINT - callers have to jump to "saveFP+60" to save f29..f31,
+   for example.  For FP reg saves/restores, it takes one instruction
+   (4 bytes) to do the operation; for Vector regs, 2 instructions are
+   required (8 bytes.).   */
+
+	.machine ppc7400
+.text
+	.align 2
+
+.private_extern saveVEC
+saveVEC:
+	li r11,-192
+	stvx v20,r11,r0
+	li r11,-176
+	stvx v21,r11,r0
+	li r11,-160
+	stvx v22,r11,r0
+	li r11,-144
+	stvx v23,r11,r0
+	li r11,-128
+	stvx v24,r11,r0
+	li r11,-112
+	stvx v25,r11,r0
+	li r11,-96
+	stvx v26,r11,r0
+	li r11,-80
+	stvx v27,r11,r0
+	li r11,-64
+	stvx v28,r11,r0
+	li r11,-48
+	stvx v29,r11,r0
+	li r11,-32
+	stvx v30,r11,r0
+	li r11,-16
+	stvx v31,r11,r0
+	blr
+
+.private_extern restVEC
+restVEC:
+	li r11,-192
+	lvx v20,r11,r0
+	li r11,-176
+	lvx v21,r11,r0
+	li r11,-160
+	lvx v22,r11,r0
+	li r11,-144
+	lvx v23,r11,r0
+	li r11,-128
+	lvx v24,r11,r0
+	li r11,-112
+	lvx v25,r11,r0
+	li r11,-96
+	lvx v26,r11,r0
+	li r11,-80
+	lvx v27,r11,r0
+	li r11,-64
+	lvx v28,r11,r0
+	li r11,-48
+	lvx v29,r11,r0
+	li r11,-32
+	lvx v30,r11,r0
+	li r11,-16
+	lvx v31,r11,r0
+	blr
+
+/* saveVEC_vr11 -- as saveVEC but VRsave is returned in R11.  */
+
+.private_extern saveVEC_vr11
+saveVEC_vr11:
+	li r11,-192
+	stvx v20,r11,r0
+	li r11,-176
+	stvx v21,r11,r0
+	li r11,-160
+	stvx v22,r11,r0
+	li r11,-144
+	stvx v23,r11,r0
+	li r11,-128
+	stvx v24,r11,r0
+	li r11,-112
+	stvx v25,r11,r0
+	li r11,-96
+	stvx v26,r11,r0
+	li r11,-80
+	stvx v27,r11,r0
+	li r11,-64
+	stvx v28,r11,r0
+	li r11,-48
+	stvx v29,r11,r0
+	li r11,-32
+	stvx v30,r11,r0
+	li r11,-16
+	stvx v31,r11,r0
+	mfspr r11,VRsave
+	blr
+
+/* As restVec, but the original VRsave value passed in R10.  */
+
+.private_extern restVEC_vr10
+restVEC_vr10:
+	li r11,-192
+	lvx v20,r11,r0
+	li r11,-176
+	lvx v21,r11,r0
+	li r11,-160
+	lvx v22,r11,r0
+	li r11,-144
+	lvx v23,r11,r0
+	li r11,-128
+	lvx v24,r11,r0
+	li r11,-112
+	lvx v25,r11,r0
+	li r11,-96
+	lvx v26,r11,r0
+	li r11,-80
+	lvx v27,r11,r0
+	li r11,-64
+	lvx v28,r11,r0
+	li r11,-48
+	lvx v29,r11,r0
+	li r11,-32
+	lvx v30,r11,r0
+	li r11,-16
+	lvx v31,r11,r0
+				/* restore VRsave from R10.  */
+	mtspr VRsave,r10
+	blr
diff --git a/gcc-4.9/libgcc/config/rs6000/darwin-world.S b/gcc-4.9/libgcc/config/rs6000/darwin-world.S
new file mode 100644
index 000000000..4d7253287
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/darwin-world.S
@@ -0,0 +1,252 @@
+/*  This file contains the exception-handling save_world and
+ *  restore_world routines, which need to do a run-time check to see if
+ *  they should save and restore the vector registers.
+ *
+ *   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+#ifndef __ppc64__
+
+	.machine ppc7400
+.data
+	.align 2
+
+#ifdef __DYNAMIC__
+
+.non_lazy_symbol_pointer
+L_has_vec$non_lazy_ptr:
+	.indirect_symbol __cpu_has_altivec
+	.long	0
+#else
+
+/* For static, "pretend" we have a non-lazy-pointer.  */
+
+L_has_vec$non_lazy_ptr:
+	.long __cpu_has_altivec
+
+#endif
+
+
+.text
+	.align 2
+
+/* save_world and rest_world save/restore F14-F31 and possibly V20-V31
+   (assuming you have a CPU with vector registers; we use a global var
+   provided by the System Framework to determine this.)
+
+   SAVE_WORLD takes R0 (the caller`s caller`s return address) and R11
+   (the stack frame size) as parameters.  It returns the updated VRsave
+   in R0 if we`re on a CPU with vector regs.
+
+   For gcc3 onward, we need to save and restore CR as well, since scheduled
+   prologs can cause comparisons to be moved before calls to save_world.
+
+   USES: R0 R11 R12  */
+
+.private_extern save_world
+save_world:
+	stw r0,8(r1)
+	mflr r0
+	bcl 20,31,Ls$pb
+Ls$pb:	mflr r12
+	addis r12,r12,ha16(L_has_vec$non_lazy_ptr-Ls$pb)
+	lwz r12,lo16(L_has_vec$non_lazy_ptr-Ls$pb)(r12)
+	mtlr r0
+	lwz r12,0(r12)
+				/* grab CR  */
+	mfcr r0	
+				/* test HAS_VEC  */
+	cmpwi r12,0
+	stfd f14,-144(r1)
+	stfd f15,-136(r1)
+	stfd f16,-128(r1)
+	stfd f17,-120(r1)
+	stfd f18,-112(r1)
+	stfd f19,-104(r1)
+	stfd f20,-96(r1)
+	stfd f21,-88(r1)
+	stfd f22,-80(r1)
+	stfd f23,-72(r1)
+	stfd f24,-64(r1)
+	stfd f25,-56(r1)
+	stfd f26,-48(r1)
+	stfd f27,-40(r1)
+	stfd f28,-32(r1)
+	stfd f29,-24(r1)
+	stfd f30,-16(r1)
+	stfd f31,-8(r1)
+	stmw r13,-220(r1)
+				/* stash CR  */
+	stw r0,4(r1)
+				/* set R12 pointing at Vector Reg save area  */
+	addi r12,r1,-224
+				/* allocate stack frame  */
+	stwux r1,r1,r11
+				/* ...but return if HAS_VEC is zero   */
+	bne+ L$saveVMX
+				/* Not forgetting to restore CR.  */
+	mtcr r0
+	blr
+
+L$saveVMX:
+				/* We're saving Vector regs too.  */
+				/* Restore CR from R0.  No More Branches!  */
+	mtcr r0
+
+	/* We should really use VRSAVE to figure out which vector regs
+	   we actually need to save and restore.  Some other time :-/  */
+
+	li r11,-192
+	stvx v20,r11,r12
+	li r11,-176
+	stvx v21,r11,r12
+	li r11,-160
+	stvx v22,r11,r12
+	li r11,-144
+	stvx v23,r11,r12
+	li r11,-128
+	stvx v24,r11,r12
+	li r11,-112
+	stvx v25,r11,r12
+	li r11,-96
+	stvx v26,r11,r12
+	li r11,-80
+	stvx v27,r11,r12
+	li r11,-64
+	stvx v28,r11,r12
+	li r11,-48
+	stvx v29,r11,r12
+	li r11,-32
+	stvx v30,r11,r12
+	mfspr r0,VRsave
+	li r11,-16
+	stvx v31,r11,r12	
+	stw r0,0(r12)		/* VRsave lives at -224(R1).  */
+	ori r0,r0,0xfff		/* We just saved these.  */
+	mtspr VRsave,r0
+	blr
+
+/* rest_world  is jumped to, not called, so no need to worry about LR.
+   clobbers R0, R7, R11 and R12.  This just undoes the work done above.  */
+
+	.private_extern rest_world
+rest_world:
+				
+	lwz r11, 0(r1)		/* Pickup previous SP  */
+	li r7, 0		/* Stack offset is zero, r10 is ignored.  */
+	b Lrest_world_eh_r7
+
+/* eh_rest_world_r10 is jumped to, not called, so no need to worry about LR.
+   R10 is the C++ EH stack adjust parameter, we return to the caller`s caller.
+
+   clobbers: R0, R7, R11 and R12
+   uses    : R10
+   RETURNS : C++ EH Data registers (R3 - R6).  */
+
+	.private_extern eh_rest_world_r10
+eh_rest_world_r10:
+				
+	lwz r11, 0(r1)		/* Pickup previous SP  */
+	mr  r7,r10		/* Stack offset.  */
+	
+	/* pickup the C++ EH data regs (R3 - R6.)  */
+	lwz r6,-420(r11)
+	lwz r5,-424(r11)
+	lwz r4,-428(r11)
+	lwz r3,-432(r11)
+
+	/* Fall through to Lrest_world_eh_r7.  */
+
+/* When we are doing the exception-handling epilog, R7 contains the offset to
+   add to the SP.
+
+   clobbers: R0, R11 and R12
+   uses    : R7.  */
+
+Lrest_world_eh_r7:
+	/* See if we have Altivec.  */
+	bcl 20,31,Lr7$pb
+Lr7$pb: mflr r12
+
+	addis r12,r12,ha16(L_has_vec$non_lazy_ptr-Lr7$pb)
+	lwz r12,lo16(L_has_vec$non_lazy_ptr-Lr7$pb)(r12)
+	lwz r12,0(r12)		/* R12 := HAS_VEC  */
+	cmpwi r12,0
+	lmw r13,-220(r11)
+	beq L.rest_world_fp_eh
+
+	/* We have Altivec, restore VRsave and V20..V31  */
+	lwz r0,-224(r11)
+	li r12,-416
+	mtspr VRsave,r0
+	lvx v20,r11,r12
+	li r12,-400
+	lvx v21,r11,r12
+	li r12,-384
+	lvx v22,r11,r12
+	li r12,-368
+	lvx v23,r11,r12
+	li r12,-352
+	lvx v24,r11,r12
+	li r12,-336
+	lvx v25,r11,r12
+	li r12,-320
+	lvx v26,r11,r12
+	li r12,-304
+	lvx v27,r11,r12
+	li r12,-288
+	lvx v28,r11,r12
+	li r12,-272
+	lvx v29,r11,r12
+	li r12,-256
+	lvx v30,r11,r12
+	li r12,-240
+	lvx v31,r11,r12
+
+L.rest_world_fp_eh:
+	lwz r0,4(r11)		/* recover saved CR  */
+	lfd f14,-144(r11)
+	lfd f15,-136(r11)
+	lfd f16,-128(r11)
+	lfd f17,-120(r11)
+	lfd f18,-112(r11)
+	lfd f19,-104(r11)
+	lfd f20,-96(r11)
+	lfd f21,-88(r11)
+	lfd f22,-80(r11)
+	lfd f23,-72(r11)
+	lfd f24,-64(r11)
+	lfd f25,-56(r11)
+	lfd f26,-48(r11)
+	lfd f27,-40(r11)
+	lfd f28,-32(r11)
+	lfd f29,-24(r11)
+	lfd f30,-16(r11)
+	mtcr r0			/* restore the saved cr.  */
+	lwz r0, 8(r11)		/* Pick up the 'real' return address.  */
+	lfd f31,-8(r11)		
+	mtctr r0		/* exception-handler ret. address  */
+	add r1,r11,r7		/* set SP to original value + R7 offset  */
+	bctr
+#endif
+/* we should never be called on ppc64 for this ... */
+/* Done.  */
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtres32gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtres32gpr.S
new file mode 100644
index 000000000..200177bdc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtres32gpr.S
@@ -0,0 +1,73 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for restoring 32-bit integer registers, called by the compiler.  */
+/* "Bare" versions that simply return to their caller.  */
+
+HIDDEN_FUNC(_rest32gpr_14)	lwz 14,-72(11)
+HIDDEN_FUNC(_rest32gpr_15)	lwz 15,-68(11)
+HIDDEN_FUNC(_rest32gpr_16)	lwz 16,-64(11)
+HIDDEN_FUNC(_rest32gpr_17)	lwz 17,-60(11)
+HIDDEN_FUNC(_rest32gpr_18)	lwz 18,-56(11)
+HIDDEN_FUNC(_rest32gpr_19)	lwz 19,-52(11)
+HIDDEN_FUNC(_rest32gpr_20)	lwz 20,-48(11)
+HIDDEN_FUNC(_rest32gpr_21)	lwz 21,-44(11)
+HIDDEN_FUNC(_rest32gpr_22)	lwz 22,-40(11)
+HIDDEN_FUNC(_rest32gpr_23)	lwz 23,-36(11)
+HIDDEN_FUNC(_rest32gpr_24)	lwz 24,-32(11)
+HIDDEN_FUNC(_rest32gpr_25)	lwz 25,-28(11)
+HIDDEN_FUNC(_rest32gpr_26)	lwz 26,-24(11)
+HIDDEN_FUNC(_rest32gpr_27)	lwz 27,-20(11)
+HIDDEN_FUNC(_rest32gpr_28)	lwz 28,-16(11)
+HIDDEN_FUNC(_rest32gpr_29)	lwz 29,-12(11)
+HIDDEN_FUNC(_rest32gpr_30)	lwz 30,-8(11)
+HIDDEN_FUNC(_rest32gpr_31)	lwz 31,-4(11)
+				blr
+FUNC_END(_rest32gpr_31)
+FUNC_END(_rest32gpr_30)
+FUNC_END(_rest32gpr_29)
+FUNC_END(_rest32gpr_28)
+FUNC_END(_rest32gpr_27)
+FUNC_END(_rest32gpr_26)
+FUNC_END(_rest32gpr_25)
+FUNC_END(_rest32gpr_24)
+FUNC_END(_rest32gpr_23)
+FUNC_END(_rest32gpr_22)
+FUNC_END(_rest32gpr_21)
+FUNC_END(_rest32gpr_20)
+FUNC_END(_rest32gpr_19)
+FUNC_END(_rest32gpr_18)
+FUNC_END(_rest32gpr_17)
+FUNC_END(_rest32gpr_16)
+FUNC_END(_rest32gpr_15)
+FUNC_END(_rest32gpr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtres64gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtres64gpr.S
new file mode 100644
index 000000000..9bd2251a8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtres64gpr.S
@@ -0,0 +1,73 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ * 
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for restoring 64-bit integer registers, called by the compiler.  */
+/* "Bare" versions that return to their caller.  */
+
+HIDDEN_FUNC(_rest64gpr_14)	evldd 14,0(11)
+HIDDEN_FUNC(_rest64gpr_15)	evldd 15,8(11)
+HIDDEN_FUNC(_rest64gpr_16)	evldd 16,16(11)
+HIDDEN_FUNC(_rest64gpr_17)	evldd 17,24(11)
+HIDDEN_FUNC(_rest64gpr_18)	evldd 18,32(11)
+HIDDEN_FUNC(_rest64gpr_19)	evldd 19,40(11)
+HIDDEN_FUNC(_rest64gpr_20)	evldd 20,48(11)
+HIDDEN_FUNC(_rest64gpr_21)	evldd 21,56(11)
+HIDDEN_FUNC(_rest64gpr_22)	evldd 22,64(11)
+HIDDEN_FUNC(_rest64gpr_23)	evldd 23,72(11)
+HIDDEN_FUNC(_rest64gpr_24)	evldd 24,80(11)
+HIDDEN_FUNC(_rest64gpr_25)	evldd 25,88(11)
+HIDDEN_FUNC(_rest64gpr_26)	evldd 26,96(11)
+HIDDEN_FUNC(_rest64gpr_27)	evldd 27,104(11)
+HIDDEN_FUNC(_rest64gpr_28)	evldd 28,112(11)
+HIDDEN_FUNC(_rest64gpr_29)	evldd 29,120(11)
+HIDDEN_FUNC(_rest64gpr_30)	evldd 30,128(11)
+HIDDEN_FUNC(_rest64gpr_31)	evldd 31,136(11)
+				blr
+FUNC_END(_rest64gpr_31)
+FUNC_END(_rest64gpr_30)
+FUNC_END(_rest64gpr_29)
+FUNC_END(_rest64gpr_28)
+FUNC_END(_rest64gpr_27)
+FUNC_END(_rest64gpr_26)
+FUNC_END(_rest64gpr_25)
+FUNC_END(_rest64gpr_24)
+FUNC_END(_rest64gpr_23)
+FUNC_END(_rest64gpr_22)
+FUNC_END(_rest64gpr_21)
+FUNC_END(_rest64gpr_20)
+FUNC_END(_rest64gpr_19)
+FUNC_END(_rest64gpr_18)
+FUNC_END(_rest64gpr_17)
+FUNC_END(_rest64gpr_16)
+FUNC_END(_rest64gpr_15)
+FUNC_END(_rest64gpr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtres64gprctr.S b/gcc-4.9/libgcc/config/rs6000/e500crtres64gprctr.S
new file mode 100644
index 000000000..e41905e52
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtres64gprctr.S
@@ -0,0 +1,90 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for restoring 64-bit integer registers where the number of
+   registers to be restored is passed in CTR, called by the compiler.  */
+
+HIDDEN_FUNC(_rest64gpr_ctr_14)	evldd 14,0(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_15)	evldd 15,8(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_16)	evldd 16,16(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_17)	evldd 17,24(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_18)	evldd 18,32(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_19)	evldd 19,40(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_20)	evldd 20,48(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_21)	evldd 21,56(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_22)	evldd 22,64(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_23)	evldd 23,72(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_24)	evldd 24,80(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_25)	evldd 25,88(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_26)	evldd 26,96(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_27)	evldd 27,104(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_28)	evldd 28,112(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_29)	evldd 29,120(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_30)	evldd 30,128(11)
+				bdz _rest64gpr_ctr_done
+HIDDEN_FUNC(_rest64gpr_ctr_31)	evldd 31,136(11)
+_rest64gpr_ctr_done:		blr
+FUNC_END(_rest64gpr_ctr_31)
+FUNC_END(_rest64gpr_ctr_30)
+FUNC_END(_rest64gpr_ctr_29)
+FUNC_END(_rest64gpr_ctr_28)
+FUNC_END(_rest64gpr_ctr_27)
+FUNC_END(_rest64gpr_ctr_26)
+FUNC_END(_rest64gpr_ctr_25)
+FUNC_END(_rest64gpr_ctr_24)
+FUNC_END(_rest64gpr_ctr_23)
+FUNC_END(_rest64gpr_ctr_22)
+FUNC_END(_rest64gpr_ctr_21)
+FUNC_END(_rest64gpr_ctr_20)
+FUNC_END(_rest64gpr_ctr_19)
+FUNC_END(_rest64gpr_ctr_18)
+FUNC_END(_rest64gpr_ctr_17)
+FUNC_END(_rest64gpr_ctr_16)
+FUNC_END(_rest64gpr_ctr_15)
+FUNC_END(_rest64gpr_ctr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtrest32gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtrest32gpr.S
new file mode 100644
index 000000000..1bedb992a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtrest32gpr.S
@@ -0,0 +1,75 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for restoring 32-bit integer registers, called by the compiler.  */
+/* "Tail" versions that perform a tail call.  */
+
+HIDDEN_FUNC(_rest32gpr_14_t)	lwz 14,-72(11)
+HIDDEN_FUNC(_rest32gpr_15_t)	lwz 15,-68(11)
+HIDDEN_FUNC(_rest32gpr_16_t)	lwz 16,-64(11)
+HIDDEN_FUNC(_rest32gpr_17_t)	lwz 17,-60(11)
+HIDDEN_FUNC(_rest32gpr_18_t)	lwz 18,-56(11)
+HIDDEN_FUNC(_rest32gpr_19_t)	lwz 19,-52(11)
+HIDDEN_FUNC(_rest32gpr_20_t)	lwz 20,-48(11)
+HIDDEN_FUNC(_rest32gpr_21_t)	lwz 21,-44(11)
+HIDDEN_FUNC(_rest32gpr_22_t)	lwz 22,-40(11)
+HIDDEN_FUNC(_rest32gpr_23_t)	lwz 23,-36(11)
+HIDDEN_FUNC(_rest32gpr_24_t)	lwz 24,-32(11)
+HIDDEN_FUNC(_rest32gpr_25_t)	lwz 25,-28(11)
+HIDDEN_FUNC(_rest32gpr_26_t)	lwz 26,-24(11)
+HIDDEN_FUNC(_rest32gpr_27_t)	lwz 27,-20(11)
+HIDDEN_FUNC(_rest32gpr_28_t)	lwz 28,-16(11)
+HIDDEN_FUNC(_rest32gpr_29_t)	lwz 29,-12(11)
+HIDDEN_FUNC(_rest32gpr_30_t)	lwz 30,-8(11)
+HIDDEN_FUNC(_rest32gpr_31_t)	lwz 31,-4(11)
+				lwz 0,4(11)
+				mr 1,11
+				blr
+FUNC_END(_rest32gpr_31_t)
+FUNC_END(_rest32gpr_30_t)
+FUNC_END(_rest32gpr_29_t)
+FUNC_END(_rest32gpr_28_t)
+FUNC_END(_rest32gpr_27_t)
+FUNC_END(_rest32gpr_26_t)
+FUNC_END(_rest32gpr_25_t)
+FUNC_END(_rest32gpr_24_t)
+FUNC_END(_rest32gpr_23_t)
+FUNC_END(_rest32gpr_22_t)
+FUNC_END(_rest32gpr_21_t)
+FUNC_END(_rest32gpr_20_t)
+FUNC_END(_rest32gpr_19_t)
+FUNC_END(_rest32gpr_18_t)
+FUNC_END(_rest32gpr_17_t)
+FUNC_END(_rest32gpr_16_t)
+FUNC_END(_rest32gpr_15_t)
+FUNC_END(_rest32gpr_14_t)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtrest64gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtrest64gpr.S
new file mode 100644
index 000000000..030862fec
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtrest64gpr.S
@@ -0,0 +1,74 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* "Tail" versions that perform a tail call.  */
+
+HIDDEN_FUNC(_rest64gpr_14_t)	evldd 14,0(11)
+HIDDEN_FUNC(_rest64gpr_15_t)	evldd 15,8(11)
+HIDDEN_FUNC(_rest64gpr_16_t)	evldd 16,16(11)
+HIDDEN_FUNC(_rest64gpr_17_t)	evldd 17,24(11)
+HIDDEN_FUNC(_rest64gpr_18_t)	evldd 18,32(11)
+HIDDEN_FUNC(_rest64gpr_19_t)	evldd 19,40(11)
+HIDDEN_FUNC(_rest64gpr_20_t)	evldd 20,48(11)
+HIDDEN_FUNC(_rest64gpr_21_t)	evldd 21,56(11)
+HIDDEN_FUNC(_rest64gpr_22_t)	evldd 22,64(11)
+HIDDEN_FUNC(_rest64gpr_23_t)	evldd 23,72(11)
+HIDDEN_FUNC(_rest64gpr_24_t)	evldd 24,80(11)
+HIDDEN_FUNC(_rest64gpr_25_t)	evldd 25,88(11)
+HIDDEN_FUNC(_rest64gpr_26_t)	evldd 26,96(11)
+HIDDEN_FUNC(_rest64gpr_27_t)	evldd 27,104(11)
+HIDDEN_FUNC(_rest64gpr_28_t)	evldd 28,112(11)
+HIDDEN_FUNC(_rest64gpr_29_t)	evldd 29,120(11)
+HIDDEN_FUNC(_rest64gpr_30_t)	evldd 30,128(11)
+HIDDEN_FUNC(_rest64gpr_31_t)	lwz 0,148(11)
+				evldd 31,136(11)
+				addi 1,11,144
+				blr
+FUNC_END(_rest64gpr_31_t)
+FUNC_END(_rest64gpr_30_t)
+FUNC_END(_rest64gpr_29_t)
+FUNC_END(_rest64gpr_28_t)
+FUNC_END(_rest64gpr_27_t)
+FUNC_END(_rest64gpr_26_t)
+FUNC_END(_rest64gpr_25_t)
+FUNC_END(_rest64gpr_24_t)
+FUNC_END(_rest64gpr_23_t)
+FUNC_END(_rest64gpr_22_t)
+FUNC_END(_rest64gpr_21_t)
+FUNC_END(_rest64gpr_20_t)
+FUNC_END(_rest64gpr_19_t)
+FUNC_END(_rest64gpr_18_t)
+FUNC_END(_rest64gpr_17_t)
+FUNC_END(_rest64gpr_16_t)
+FUNC_END(_rest64gpr_15_t)
+FUNC_END(_rest64gpr_14_t)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtresx32gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtresx32gpr.S
new file mode 100644
index 000000000..7ff490d64
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtresx32gpr.S
@@ -0,0 +1,75 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for restoring 32-bit integer registers, called by the compiler.  */
+/* "Exit" versions that return to the caller's caller.  */
+
+HIDDEN_FUNC(_rest32gpr_14_x)	lwz 14,-72(11)
+HIDDEN_FUNC(_rest32gpr_15_x)	lwz 15,-68(11)
+HIDDEN_FUNC(_rest32gpr_16_x)	lwz 16,-64(11)
+HIDDEN_FUNC(_rest32gpr_17_x)	lwz 17,-60(11)
+HIDDEN_FUNC(_rest32gpr_18_x)	lwz 18,-56(11)
+HIDDEN_FUNC(_rest32gpr_19_x)	lwz 19,-52(11)
+HIDDEN_FUNC(_rest32gpr_20_x)	lwz 20,-48(11)
+HIDDEN_FUNC(_rest32gpr_21_x)	lwz 21,-44(11)
+HIDDEN_FUNC(_rest32gpr_22_x)	lwz 22,-40(11)
+HIDDEN_FUNC(_rest32gpr_23_x)	lwz 23,-36(11)
+HIDDEN_FUNC(_rest32gpr_24_x)	lwz 24,-32(11)
+HIDDEN_FUNC(_rest32gpr_25_x)	lwz 25,-28(11)
+HIDDEN_FUNC(_rest32gpr_26_x)	lwz 26,-24(11)
+HIDDEN_FUNC(_rest32gpr_27_x)	lwz 27,-20(11)
+HIDDEN_FUNC(_rest32gpr_28_x)	lwz 28,-16(11)
+HIDDEN_FUNC(_rest32gpr_29_x)	lwz 29,-12(11)
+HIDDEN_FUNC(_rest32gpr_30_x)	lwz 30,-8(11)
+HIDDEN_FUNC(_rest32gpr_31_x)	lwz 0,4(11)
+				lwz 31,-4(11)
+				mr 1,11
+				mtlr 0
+				blr
+FUNC_END(_rest32gpr_31_x)
+FUNC_END(_rest32gpr_30_x)
+FUNC_END(_rest32gpr_29_x)
+FUNC_END(_rest32gpr_28_x)
+FUNC_END(_rest32gpr_27_x)
+FUNC_END(_rest32gpr_26_x)
+FUNC_END(_rest32gpr_25_x)
+FUNC_END(_rest32gpr_24_x)
+FUNC_END(_rest32gpr_23_x)
+FUNC_END(_rest32gpr_22_x)
+FUNC_END(_rest32gpr_21_x)
+FUNC_END(_rest32gpr_20_x)
+FUNC_END(_rest32gpr_19_x)
+FUNC_END(_rest32gpr_18_x)
+FUNC_END(_rest32gpr_17_x)
+FUNC_END(_rest32gpr_16_x)
+FUNC_END(_rest32gpr_15_x)
+FUNC_END(_rest32gpr_14_x)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtresx64gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtresx64gpr.S
new file mode 100644
index 000000000..1bfa0ba9e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtresx64gpr.S
@@ -0,0 +1,75 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* "Exit" versions that return to their caller's caller.  */
+
+HIDDEN_FUNC(_rest64gpr_14_x)	evldd 14,0(11)
+HIDDEN_FUNC(_rest64gpr_15_x)	evldd 15,8(11)
+HIDDEN_FUNC(_rest64gpr_16_x)	evldd 16,16(11)
+HIDDEN_FUNC(_rest64gpr_17_x)	evldd 17,24(11)
+HIDDEN_FUNC(_rest64gpr_18_x)	evldd 18,32(11)
+HIDDEN_FUNC(_rest64gpr_19_x)	evldd 19,40(11)
+HIDDEN_FUNC(_rest64gpr_20_x)	evldd 20,48(11)
+HIDDEN_FUNC(_rest64gpr_21_x)	evldd 21,56(11)
+HIDDEN_FUNC(_rest64gpr_22_x)	evldd 22,64(11)
+HIDDEN_FUNC(_rest64gpr_23_x)	evldd 23,72(11)
+HIDDEN_FUNC(_rest64gpr_24_x)	evldd 24,80(11)
+HIDDEN_FUNC(_rest64gpr_25_x)	evldd 25,88(11)
+HIDDEN_FUNC(_rest64gpr_26_x)	evldd 26,96(11)
+HIDDEN_FUNC(_rest64gpr_27_x)	evldd 27,104(11)
+HIDDEN_FUNC(_rest64gpr_28_x)	evldd 28,112(11)
+HIDDEN_FUNC(_rest64gpr_29_x)	evldd 29,120(11)
+HIDDEN_FUNC(_rest64gpr_30_x)	evldd 30,128(11)
+HIDDEN_FUNC(_rest64gpr_31_x)	lwz 0,148(11)
+				evldd 31,136(11)
+				addi 1,11,144
+				mtlr 0
+				blr
+FUNC_END(_rest64gpr_31_x)
+FUNC_END(_rest64gpr_30_x)
+FUNC_END(_rest64gpr_29_x)
+FUNC_END(_rest64gpr_28_x)
+FUNC_END(_rest64gpr_27_x)
+FUNC_END(_rest64gpr_26_x)
+FUNC_END(_rest64gpr_25_x)
+FUNC_END(_rest64gpr_24_x)
+FUNC_END(_rest64gpr_23_x)
+FUNC_END(_rest64gpr_22_x)
+FUNC_END(_rest64gpr_21_x)
+FUNC_END(_rest64gpr_20_x)
+FUNC_END(_rest64gpr_19_x)
+FUNC_END(_rest64gpr_18_x)
+FUNC_END(_rest64gpr_17_x)
+FUNC_END(_rest64gpr_16_x)
+FUNC_END(_rest64gpr_15_x)
+FUNC_END(_rest64gpr_14_x)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsav32gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsav32gpr.S
new file mode 100644
index 000000000..050231aba
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsav32gpr.S
@@ -0,0 +1,73 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 32-bit integer registers, called by the compiler.  */
+/* "Bare" versions that simply return to their caller.  */
+
+HIDDEN_FUNC(_save32gpr_14)	stw 14,-72(11)
+HIDDEN_FUNC(_save32gpr_15)	stw 15,-68(11)
+HIDDEN_FUNC(_save32gpr_16)	stw 16,-64(11)
+HIDDEN_FUNC(_save32gpr_17)	stw 17,-60(11)
+HIDDEN_FUNC(_save32gpr_18)	stw 18,-56(11)
+HIDDEN_FUNC(_save32gpr_19)	stw 19,-52(11)
+HIDDEN_FUNC(_save32gpr_20)	stw 20,-48(11)
+HIDDEN_FUNC(_save32gpr_21)	stw 21,-44(11)
+HIDDEN_FUNC(_save32gpr_22)	stw 22,-40(11)
+HIDDEN_FUNC(_save32gpr_23)	stw 23,-36(11)
+HIDDEN_FUNC(_save32gpr_24)	stw 24,-32(11)
+HIDDEN_FUNC(_save32gpr_25)	stw 25,-28(11)
+HIDDEN_FUNC(_save32gpr_26)	stw 26,-24(11)
+HIDDEN_FUNC(_save32gpr_27)	stw 27,-20(11)
+HIDDEN_FUNC(_save32gpr_28)	stw 28,-16(11)
+HIDDEN_FUNC(_save32gpr_29)	stw 29,-12(11)
+HIDDEN_FUNC(_save32gpr_30)	stw 30,-8(11)
+HIDDEN_FUNC(_save32gpr_31)	stw 31,-4(11)
+				blr
+FUNC_END(_save32gpr_31)
+FUNC_END(_save32gpr_30)
+FUNC_END(_save32gpr_29)
+FUNC_END(_save32gpr_28)
+FUNC_END(_save32gpr_27)
+FUNC_END(_save32gpr_26)
+FUNC_END(_save32gpr_25)
+FUNC_END(_save32gpr_24)
+FUNC_END(_save32gpr_23)
+FUNC_END(_save32gpr_22)
+FUNC_END(_save32gpr_21)
+FUNC_END(_save32gpr_20)
+FUNC_END(_save32gpr_19)
+FUNC_END(_save32gpr_18)
+FUNC_END(_save32gpr_17)
+FUNC_END(_save32gpr_16)
+FUNC_END(_save32gpr_15)
+FUNC_END(_save32gpr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsav64gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsav64gpr.S
new file mode 100644
index 000000000..d2bda4baf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsav64gpr.S
@@ -0,0 +1,72 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 64-bit integer registers, called by the compiler.  */
+
+HIDDEN_FUNC(_save64gpr_14)	evstdd 14,0(11)
+HIDDEN_FUNC(_save64gpr_15)	evstdd 15,8(11)
+HIDDEN_FUNC(_save64gpr_16)	evstdd 16,16(11)
+HIDDEN_FUNC(_save64gpr_17)	evstdd 17,24(11)
+HIDDEN_FUNC(_save64gpr_18)	evstdd 18,32(11)
+HIDDEN_FUNC(_save64gpr_19)	evstdd 19,40(11)
+HIDDEN_FUNC(_save64gpr_20)	evstdd 20,48(11)
+HIDDEN_FUNC(_save64gpr_21)	evstdd 21,56(11)
+HIDDEN_FUNC(_save64gpr_22)	evstdd 22,64(11)
+HIDDEN_FUNC(_save64gpr_23)	evstdd 23,72(11)
+HIDDEN_FUNC(_save64gpr_24)	evstdd 24,80(11)
+HIDDEN_FUNC(_save64gpr_25)	evstdd 25,88(11)
+HIDDEN_FUNC(_save64gpr_26)	evstdd 26,96(11)
+HIDDEN_FUNC(_save64gpr_27)	evstdd 27,104(11)
+HIDDEN_FUNC(_save64gpr_28)	evstdd 28,112(11)
+HIDDEN_FUNC(_save64gpr_29)	evstdd 29,120(11)
+HIDDEN_FUNC(_save64gpr_30)	evstdd 30,128(11)
+HIDDEN_FUNC(_save64gpr_31)	evstdd 31,136(11)
+				blr
+FUNC_END(_save64gpr_31)
+FUNC_END(_save64gpr_30)
+FUNC_END(_save64gpr_29)
+FUNC_END(_save64gpr_28)
+FUNC_END(_save64gpr_27)
+FUNC_END(_save64gpr_26)
+FUNC_END(_save64gpr_25)
+FUNC_END(_save64gpr_24)
+FUNC_END(_save64gpr_23)
+FUNC_END(_save64gpr_22)
+FUNC_END(_save64gpr_21)
+FUNC_END(_save64gpr_20)
+FUNC_END(_save64gpr_19)
+FUNC_END(_save64gpr_18)
+FUNC_END(_save64gpr_17)
+FUNC_END(_save64gpr_16)
+FUNC_END(_save64gpr_15)
+FUNC_END(_save64gpr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsav64gprctr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsav64gprctr.S
new file mode 100644
index 000000000..d17e5a99e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsav64gprctr.S
@@ -0,0 +1,91 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 64-bit integer registers where the number of
+   registers to be saved is passed in CTR, called by the compiler.  */
+/* "Bare" versions that return to their caller.  */
+
+HIDDEN_FUNC(_save64gpr_ctr_14)	evstdd 14,0(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_15)	evstdd 15,8(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_16)	evstdd 16,16(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_17)	evstdd 17,24(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_18)	evstdd 18,32(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_19)	evstdd 19,40(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_20)	evstdd 20,48(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_21)	evstdd 21,56(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_22)	evstdd 22,64(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_23)	evstdd 23,72(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_24)	evstdd 24,80(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_25)	evstdd 25,88(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_26)	evstdd 26,96(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_27)	evstdd 27,104(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_28)	evstdd 28,112(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_29)	evstdd 29,120(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_30)	evstdd 30,128(11)
+				bdz _save64gpr_ctr_done
+HIDDEN_FUNC(_save64gpr_ctr_31)	evstdd 31,136(11)
+_save64gpr_ctr_done:		blr
+FUNC_END(_save64gpr_ctr_31)
+FUNC_END(_save64gpr_ctr_30)
+FUNC_END(_save64gpr_ctr_29)
+FUNC_END(_save64gpr_ctr_28)
+FUNC_END(_save64gpr_ctr_27)
+FUNC_END(_save64gpr_ctr_26)
+FUNC_END(_save64gpr_ctr_25)
+FUNC_END(_save64gpr_ctr_24)
+FUNC_END(_save64gpr_ctr_23)
+FUNC_END(_save64gpr_ctr_22)
+FUNC_END(_save64gpr_ctr_21)
+FUNC_END(_save64gpr_ctr_20)
+FUNC_END(_save64gpr_ctr_19)
+FUNC_END(_save64gpr_ctr_18)
+FUNC_END(_save64gpr_ctr_17)
+FUNC_END(_save64gpr_ctr_16)
+FUNC_END(_save64gpr_ctr_15)
+FUNC_END(_save64gpr_ctr_14)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsavg32gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsavg32gpr.S
new file mode 100644
index 000000000..775e9bb6b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsavg32gpr.S
@@ -0,0 +1,73 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 32-bit integer registers, called by the compiler.  */
+/* "GOT" versions that load the address of the GOT into lr before returning.  */
+
+HIDDEN_FUNC(_save32gpr_14_g)	stw 14,-72(11)
+HIDDEN_FUNC(_save32gpr_15_g)	stw 15,-68(11)
+HIDDEN_FUNC(_save32gpr_16_g)	stw 16,-64(11)
+HIDDEN_FUNC(_save32gpr_17_g)	stw 17,-60(11)
+HIDDEN_FUNC(_save32gpr_18_g)	stw 18,-56(11)
+HIDDEN_FUNC(_save32gpr_19_g)	stw 19,-52(11)
+HIDDEN_FUNC(_save32gpr_20_g)	stw 20,-48(11)
+HIDDEN_FUNC(_save32gpr_21_g)	stw 21,-44(11)
+HIDDEN_FUNC(_save32gpr_22_g)	stw 22,-40(11)
+HIDDEN_FUNC(_save32gpr_23_g)	stw 23,-36(11)
+HIDDEN_FUNC(_save32gpr_24_g)	stw 24,-32(11)
+HIDDEN_FUNC(_save32gpr_25_g)	stw 25,-28(11)
+HIDDEN_FUNC(_save32gpr_26_g)	stw 26,-24(11)
+HIDDEN_FUNC(_save32gpr_27_g)	stw 27,-20(11)
+HIDDEN_FUNC(_save32gpr_28_g)	stw 28,-16(11)
+HIDDEN_FUNC(_save32gpr_29_g)	stw 29,-12(11)
+HIDDEN_FUNC(_save32gpr_30_g)	stw 30,-8(11)
+HIDDEN_FUNC(_save32gpr_31_g)	stw 31,-4(11)
+				b _GLOBAL_OFFSET_TABLE_-4
+FUNC_END(_save32gpr_31_g)
+FUNC_END(_save32gpr_30_g)
+FUNC_END(_save32gpr_29_g)
+FUNC_END(_save32gpr_28_g)
+FUNC_END(_save32gpr_27_g)
+FUNC_END(_save32gpr_26_g)
+FUNC_END(_save32gpr_25_g)
+FUNC_END(_save32gpr_24_g)
+FUNC_END(_save32gpr_23_g)
+FUNC_END(_save32gpr_22_g)
+FUNC_END(_save32gpr_21_g)
+FUNC_END(_save32gpr_20_g)
+FUNC_END(_save32gpr_19_g)
+FUNC_END(_save32gpr_18_g)
+FUNC_END(_save32gpr_17_g)
+FUNC_END(_save32gpr_16_g)
+FUNC_END(_save32gpr_15_g)
+FUNC_END(_save32gpr_14_g)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gpr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gpr.S
new file mode 100644
index 000000000..108a6cb98
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gpr.S
@@ -0,0 +1,73 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 64-bit integer registers, called by the compiler.  */
+/* "GOT" versions that load the address of the GOT into lr before returning.  */
+
+HIDDEN_FUNC(_save64gpr_14_g)	evstdd 14,0(11)
+HIDDEN_FUNC(_save64gpr_15_g)	evstdd 15,8(11)
+HIDDEN_FUNC(_save64gpr_16_g)	evstdd 16,16(11)
+HIDDEN_FUNC(_save64gpr_17_g)	evstdd 17,24(11)
+HIDDEN_FUNC(_save64gpr_18_g)	evstdd 18,32(11)
+HIDDEN_FUNC(_save64gpr_19_g)	evstdd 19,40(11)
+HIDDEN_FUNC(_save64gpr_20_g)	evstdd 20,48(11)
+HIDDEN_FUNC(_save64gpr_21_g)	evstdd 21,56(11)
+HIDDEN_FUNC(_save64gpr_22_g)	evstdd 22,64(11)
+HIDDEN_FUNC(_save64gpr_23_g)	evstdd 23,72(11)
+HIDDEN_FUNC(_save64gpr_24_g)	evstdd 24,80(11)
+HIDDEN_FUNC(_save64gpr_25_g)	evstdd 25,88(11)
+HIDDEN_FUNC(_save64gpr_26_g)	evstdd 26,96(11)
+HIDDEN_FUNC(_save64gpr_27_g)	evstdd 27,104(11)
+HIDDEN_FUNC(_save64gpr_28_g)	evstdd 28,112(11)
+HIDDEN_FUNC(_save64gpr_29_g)	evstdd 29,120(11)
+HIDDEN_FUNC(_save64gpr_30_g)	evstdd 30,128(11)
+HIDDEN_FUNC(_save64gpr_31_g)	evstdd 31,136(11)
+				b _GLOBAL_OFFSET_TABLE_-4
+FUNC_END(_save64gpr_31_g)
+FUNC_END(_save64gpr_30_g)
+FUNC_END(_save64gpr_29_g)
+FUNC_END(_save64gpr_28_g)
+FUNC_END(_save64gpr_27_g)
+FUNC_END(_save64gpr_26_g)
+FUNC_END(_save64gpr_25_g)
+FUNC_END(_save64gpr_24_g)
+FUNC_END(_save64gpr_23_g)
+FUNC_END(_save64gpr_22_g)
+FUNC_END(_save64gpr_21_g)
+FUNC_END(_save64gpr_20_g)
+FUNC_END(_save64gpr_19_g)
+FUNC_END(_save64gpr_18_g)
+FUNC_END(_save64gpr_17_g)
+FUNC_END(_save64gpr_16_g)
+FUNC_END(_save64gpr_15_g)
+FUNC_END(_save64gpr_14_g)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gprctr.S b/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gprctr.S
new file mode 100644
index 000000000..6bda9baf4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/e500crtsavg64gprctr.S
@@ -0,0 +1,90 @@
+/*
+ * Special support for e500 eabi and SVR4
+ *
+ *   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ *   Written by Nathan Froyd
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifdef __SPE__
+
+/* Routines for saving 64-bit integer registers, called by the compiler.  */
+/* "GOT" versions that load the address of the GOT into lr before returning.  */
+
+HIDDEN_FUNC(_save64gpr_ctr_14_g)	evstdd 14,0(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_15_g)	evstdd 15,8(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_16_g)	evstdd 16,16(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_17_g)	evstdd 17,24(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_18_g)	evstdd 18,32(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_19_g)	evstdd 19,40(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_20_g)	evstdd 20,48(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_21_g)	evstdd 21,56(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_22_g)	evstdd 22,64(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_23_g)	evstdd 23,72(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_24_g)	evstdd 24,80(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_25_g)	evstdd 25,88(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_26_g)	evstdd 26,96(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_27_g)	evstdd 27,104(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_28_g)	evstdd 28,112(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_29_g)	evstdd 29,120(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_30_g)	evstdd 30,128(11)
+				bdz _save64gpr_ctr_g_done
+HIDDEN_FUNC(_save64gpr_ctr_31_g)	evstdd 31,136(11)
+_save64gpr_ctr_g_done:		b _GLOBAL_OFFSET_TABLE_-4
+FUNC_END(_save64gpr_ctr_31_g)
+FUNC_END(_save64gpr_ctr_30_g)
+FUNC_END(_save64gpr_ctr_29_g)
+FUNC_END(_save64gpr_ctr_28_g)
+FUNC_END(_save64gpr_ctr_27_g)
+FUNC_END(_save64gpr_ctr_26_g)
+FUNC_END(_save64gpr_ctr_25_g)
+FUNC_END(_save64gpr_ctr_24_g)
+FUNC_END(_save64gpr_ctr_23_g)
+FUNC_END(_save64gpr_ctr_22_g)
+FUNC_END(_save64gpr_ctr_21_g)
+FUNC_END(_save64gpr_ctr_20_g)
+FUNC_END(_save64gpr_ctr_19_g)
+FUNC_END(_save64gpr_ctr_18_g)
+FUNC_END(_save64gpr_ctr_17_g)
+FUNC_END(_save64gpr_ctr_16_g)
+FUNC_END(_save64gpr_ctr_15_g)
+FUNC_END(_save64gpr_ctr_14_g)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/eabi-ci.S b/gcc-4.9/libgcc/config/rs6000/eabi-ci.S
new file mode 100644
index 000000000..ad20365c0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/eabi-ci.S
@@ -0,0 +1,113 @@
+/* crti.s for eabi
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   Written By Michael Meissner
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* This file just supplies labeled starting points for the .got* and other
+   special sections.  It is linked in first before other modules.  */
+ 
+	.ident	"GNU C crti.s"
+
+#include <ppc-asm.h>
+
+#ifndef __powerpc64__
+	.section ".got","aw"
+	.globl	__GOT_START__
+	.type	__GOT_START__,@object
+__GOT_START__:
+
+	.section ".got1","aw"
+	.globl	__GOT1_START__
+	.type	__GOT1_START__,@object
+__GOT1_START__:
+
+	.section ".got2","aw"
+	.globl	__GOT2_START__
+	.type	__GOT2_START__,@object
+__GOT2_START__:
+
+	.section ".fixup","aw"
+	.globl	__FIXUP_START__
+	.type	__FIXUP_START__,@object
+__FIXUP_START__:
+
+	.section ".ctors","aw"
+	.globl	__CTOR_LIST__
+	.type	__CTOR_LIST__,@object
+__CTOR_LIST__:
+
+	.section ".dtors","aw"
+	.globl	__DTOR_LIST__
+	.type	__DTOR_LIST__,@object
+__DTOR_LIST__:
+
+	.section ".sdata","aw"
+	.globl	__SDATA_START__
+	.type	__SDATA_START__,@object
+	.weak	_SDA_BASE_
+	.type	_SDA_BASE_,@object
+__SDATA_START__:
+_SDA_BASE_:
+
+	.section ".sbss","aw",@nobits
+	.globl	__SBSS_START__
+	.type	__SBSS_START__,@object
+__SBSS_START__:
+
+	.section ".sdata2","a"
+	.weak	_SDA2_BASE_
+	.type	_SDA2_BASE_,@object
+	.globl	__SDATA2_START__
+	.type	__SDATA2_START__,@object
+__SDATA2_START__:
+_SDA2_BASE_:
+
+	.section ".sbss2","a"
+	.globl	__SBSS2_START__
+	.type	__SBSS2_START__,@object
+__SBSS2_START__:
+
+	.section ".gcc_except_table","aw"
+	.globl	__EXCEPT_START__
+	.type	__EXCEPT_START__,@object
+__EXCEPT_START__:
+
+	.section ".eh_frame","aw"
+	.globl	__EH_FRAME_BEGIN__
+	.type	__EH_FRAME_BEGIN__,@object
+__EH_FRAME_BEGIN__:
+
+/* Head of __init function used for static constructors.  */
+	.section ".init","ax"
+	.align 2
+FUNC_START(__init)
+	stwu 1,-16(1)
+	mflr 0
+	stw 0,20(1)
+
+/* Head of __fini function used for static destructors.  */
+	.section ".fini","ax"
+	.align 2
+FUNC_START(__fini)
+	stwu 1,-16(1)
+	mflr 0
+	stw 0,20(1)
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/eabi-cn.S b/gcc-4.9/libgcc/config/rs6000/eabi-cn.S
new file mode 100644
index 000000000..de4fd2c6c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/eabi-cn.S
@@ -0,0 +1,104 @@
+/* crtn.s for eabi
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+   Written By Michael Meissner
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* This file just supplies labeled ending points for the .got* and other
+   special sections.  It is linked in last after other modules.  */
+ 
+	.ident	"GNU C crtn.s"
+
+#ifndef __powerpc64__
+	.section ".got","aw"
+	.globl	__GOT_END__
+	.type	__GOT_END__,@object
+__GOT_END__:
+
+	.section ".got1","aw"
+	.globl	__GOT1_END__
+	.type	__GOT1_END__,@object
+__GOT1_END__:
+
+	.section ".got2","aw"
+	.globl	__GOT2_END__
+	.type	__GOT2_END__,@object
+__GOT2_END__:
+
+	.section ".fixup","aw"
+	.globl	__FIXUP_END__
+	.type	__FIXUP_END__,@object
+__FIXUP_END__:
+
+	.section ".ctors","aw"
+	.globl	__CTOR_END__
+	.type	__CTOR_END__,@object
+__CTOR_END__:
+
+	.section ".dtors","aw"
+	.weak	__DTOR_END__
+	.type	__DTOR_END__,@object
+__DTOR_END__:
+
+	.section ".sdata","aw"
+	.globl	__SDATA_END__
+	.type	__SDATA_END__,@object
+__SDATA_END__:
+
+	.section ".sbss","aw",@nobits
+	.globl	__SBSS_END__
+	.type	__SBSS_END__,@object
+__SBSS_END__:
+
+	.section ".sdata2","a"
+	.globl	__SDATA2_END__
+	.type	__SDATA2_END__,@object
+__SDATA2_END__:
+
+	.section ".sbss2","a"
+	.globl	__SBSS2_END__
+	.type	__SBSS2_END__,@object
+__SBSS2_END__:
+
+	.section ".gcc_except_table","aw"
+	.globl	__EXCEPT_END__
+	.type	__EXCEPT_END__,@object
+__EXCEPT_END__:
+
+	.section ".eh_frame","aw"
+	.globl	__EH_FRAME_END__
+	.type	__EH_FRAME_END__,@object
+__EH_FRAME_END__:
+        .long   0
+
+/* Tail of __init function used for static constructors.  */
+	.section ".init","ax"
+	lwz 0,20(1)
+	mtlr 0
+	addi 1,1,16
+	blr
+
+/* Tail of __fini function used for static destructors.  */
+	.section ".fini","ax"
+	lwz 0,20(1)
+	mtlr 0
+	addi 1,1,16
+	blr
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/eabi.S b/gcc-4.9/libgcc/config/rs6000/eabi.S
new file mode 100644
index 000000000..3d0125661
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/eabi.S
@@ -0,0 +1,288 @@
+/*
+ * Special support for eabi and SVR4
+ *
+ *   Copyright (C) 1995-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Do any initializations needed for the eabi environment */
+
+	.section ".text"
+	#include "ppc-asm.h"
+
+#ifndef __powerpc64__
+
+	 .section ".got2","aw"
+	.align	2
+.LCTOC1 = . /* +32768 */
+
+/* Table of addresses */
+.Ltable = .-.LCTOC1
+	.long	.LCTOC1				/* address we are really at */
+
+.Lsda = .-.LCTOC1
+	.long	_SDA_BASE_			/* address of the first small data area */
+
+.Lsdas = .-.LCTOC1
+	.long	__SDATA_START__			/* start of .sdata/.sbss section */
+
+.Lsdae = .-.LCTOC1
+	.long	__SBSS_END__			/* end of .sdata/.sbss section */
+
+.Lsda2 = .-.LCTOC1
+	.long	_SDA2_BASE_			/* address of the second small data area */
+
+.Lsda2s = .-.LCTOC1
+	.long	__SDATA2_START__		/* start of .sdata2/.sbss2 section */
+
+.Lsda2e = .-.LCTOC1
+	.long	__SBSS2_END__			/* end of .sdata2/.sbss2 section */
+
+#ifdef _RELOCATABLE
+.Lgots = .-.LCTOC1
+	.long	__GOT_START__			/* Global offset table start */
+
+.Lgotm1 = .-.LCTOC1
+	.long	_GLOBAL_OFFSET_TABLE_-4		/* end of GOT ptrs before BLCL + 3 reserved words */
+
+.Lgotm2 = .-.LCTOC1
+	.long	_GLOBAL_OFFSET_TABLE_+12	/* start of GOT ptrs after BLCL + 3 reserved words */
+
+.Lgote = .-.LCTOC1
+	.long	__GOT_END__			/* Global offset table end */
+
+.Lgot2s = .-.LCTOC1
+	.long	__GOT2_START__			/* -mrelocatable GOT pointers start */
+
+.Lgot2e = .-.LCTOC1
+	.long	__GOT2_END__			/* -mrelocatable GOT pointers end */
+
+.Lfixups = .-.LCTOC1
+	.long	__FIXUP_START__			/* start of .fixup section */
+
+.Lfixupe = .-.LCTOC1
+	.long	__FIXUP_END__			/* end of .fixup section */
+
+.Lctors = .-.LCTOC1
+	.long	__CTOR_LIST__			/* start of .ctor section */
+
+.Lctore = .-.LCTOC1
+	.long	__CTOR_END__			/* end of .ctor section */
+
+.Ldtors = .-.LCTOC1
+	.long	__DTOR_LIST__			/* start of .dtor section */
+
+.Ldtore = .-.LCTOC1
+	.long	__DTOR_END__			/* end of .dtor section */
+
+.Lexcepts = .-.LCTOC1
+	.long	__EXCEPT_START__		/* start of .gcc_except_table section */
+
+.Lexcepte = .-.LCTOC1
+	.long	__EXCEPT_END__			/* end of .gcc_except_table section */
+
+.Linit = .-.LCTOC1
+	.long	.Linit_p			/* address of variable to say we've been called */
+
+	.text
+	.align	2
+.Lptr:
+	.long	.LCTOC1-.Laddr			/* PC relative pointer to .got2 */
+#endif
+
+	.data
+	.align	2
+.Linit_p:
+	.long	0
+
+	.text
+
+FUNC_START(__eabi)
+
+/* Eliminate -mrelocatable code if not -mrelocatable, so that this file can
+   be assembled with other assemblers than GAS.  */
+
+#ifndef _RELOCATABLE
+	addis	10,0,.Linit_p@ha		/* init flag */
+	addis	11,0,.LCTOC1@ha			/* load address of .LCTOC1 */
+	lwz	9,.Linit_p@l(10)		/* init flag */
+	addi	11,11,.LCTOC1@l
+	cmplwi	2,9,0				/* init flag != 0? */
+	bnelr	2				/* return now, if we've been called already */
+	stw	1,.Linit_p@l(10)		/* store a nonzero value in the done flag */
+
+#else /* -mrelocatable */
+	mflr	0
+	bl	.Laddr				/* get current address */
+.Laddr:
+	mflr	12				/* real address of .Laddr */
+	lwz	11,(.Lptr-.Laddr)(12)		/* linker generated address of .LCTOC1 */
+	add	11,11,12			/* correct to real pointer */
+	lwz	12,.Ltable(11)			/* get linker's idea of where .Laddr is */
+	lwz	10,.Linit(11)			/* address of init flag */
+	subf.	12,12,11			/* calculate difference */
+	lwzx	9,10,12				/* done flag */
+	cmplwi	2,9,0				/* init flag != 0? */
+	mtlr	0				/* restore in case branch was taken */
+	bnelr	2				/* return now, if we've been called already */
+	stwx	1,10,12				/* store a nonzero value in the done flag */
+	beq+	0,.Lsdata			/* skip if we don't need to relocate */
+
+/* We need to relocate the .got2 pointers.  */
+
+	lwz	3,.Lgot2s(11)			/* GOT2 pointers start */
+	lwz	4,.Lgot2e(11)			/* GOT2 pointers end */
+	add	3,12,3				/* adjust pointers */
+	add	4,12,4
+	bl	FUNC_NAME(__eabi_convert)	/* convert pointers in .got2 section */
+
+/* Fixup the .ctor section for static constructors */
+
+	lwz	3,.Lctors(11)			/* constructors pointers start */
+	lwz	4,.Lctore(11)			/* constructors pointers end */
+	bl	FUNC_NAME(__eabi_convert)	/* convert constructors */
+
+/* Fixup the .dtor section for static destructors */
+
+	lwz	3,.Ldtors(11)			/* destructors pointers start */
+	lwz	4,.Ldtore(11)			/* destructors pointers end */
+	bl	FUNC_NAME(__eabi_convert)	/* convert destructors */
+
+/* Fixup the .gcc_except_table section for G++ exceptions */
+
+	lwz	3,.Lexcepts(11)			/* exception table pointers start */
+	lwz	4,.Lexcepte(11)			/* exception table pointers end */
+	bl	FUNC_NAME(__eabi_convert)	/* convert exceptions */
+
+/* Fixup the addresses in the GOT below _GLOBAL_OFFSET_TABLE_-4 */
+
+	lwz	3,.Lgots(11)			/* GOT table pointers start */
+	lwz	4,.Lgotm1(11)			/* GOT table pointers below _GLOBAL_OFFSET_TABLE-4 */
+	bl	FUNC_NAME(__eabi_convert)	/* convert lower GOT */
+
+/* Fixup the addresses in the GOT above _GLOBAL_OFFSET_TABLE_+12 */
+
+	lwz	3,.Lgotm2(11)			/* GOT table pointers above _GLOBAL_OFFSET_TABLE+12 */
+	lwz	4,.Lgote(11)			/* GOT table pointers end */
+	bl	FUNC_NAME(__eabi_convert)	/* convert lower GOT */
+
+/* Fixup any user initialized pointers now (the compiler drops pointers to */
+/* each of the relocs that it does in the .fixup section).  */
+
+.Lfix:
+	lwz	3,.Lfixups(11)			/* fixup pointers start */
+	lwz	4,.Lfixupe(11)			/* fixup pointers end */
+	bl	FUNC_NAME(__eabi_uconvert)	/* convert user initialized pointers */
+
+.Lsdata:
+	mtlr	0				/* restore link register */
+#endif /* _RELOCATABLE */
+
+/* Only load up register 13 if there is a .sdata and/or .sbss section */
+	lwz	3,.Lsdas(11)			/* start of .sdata/.sbss section */
+	lwz	4,.Lsdae(11)			/* end of .sdata/.sbss section */
+	cmpw	1,3,4				/* .sdata/.sbss section non-empty? */
+	beq-	1,.Lsda2l			/* skip loading r13 */
+
+	lwz	13,.Lsda(11)			/* load r13 with _SDA_BASE_ address */
+
+/* Only load up register 2 if there is a .sdata2 and/or .sbss2 section */
+
+.Lsda2l:	
+	lwz	3,.Lsda2s(11)			/* start of .sdata/.sbss section */
+	lwz	4,.Lsda2e(11)			/* end of .sdata/.sbss section */
+	cmpw	1,3,4				/* .sdata/.sbss section non-empty? */
+	beq+	1,.Ldone			/* skip loading r2 */
+
+	lwz	2,.Lsda2(11)			/* load r2 with _SDA2_BASE_ address */
+
+/* Done adjusting pointers, return by way of doing the C++ global constructors.  */
+
+.Ldone:
+	b	FUNC_NAME(__init)	/* do any C++ global constructors (which returns to caller) */
+FUNC_END(__eabi)
+
+/* Special subroutine to convert a bunch of pointers directly.
+   r0		has original link register
+   r3		has low pointer to convert
+   r4		has high pointer to convert
+   r5 .. r10	are scratch registers
+   r11		has the address of .LCTOC1 in it.
+   r12		has the value to add to each pointer
+   r13 .. r31	are unchanged */
+#ifdef _RELOCATABLE
+FUNC_START(__eabi_convert)
+        cmplw	1,3,4				/* any pointers to convert? */
+        subf	5,3,4				/* calculate number of words to convert */
+        bclr	4,4				/* return if no pointers */
+
+        srawi	5,5,2
+	addi	3,3,-4				/* start-4 for use with lwzu */
+        mtctr	5
+
+.Lcvt:
+	lwzu	6,4(3)				/* pointer to convert */
+	cmpwi	0,6,0
+	beq-	.Lcvt2				/* if pointer is null, don't convert */
+
+        add	6,6,12				/* convert pointer */
+        stw	6,0(3)
+.Lcvt2:
+        bdnz+	.Lcvt
+        blr
+
+FUNC_END(__eabi_convert)
+
+/* Special subroutine to convert the pointers the user has initialized.  The
+   compiler has placed the address of the initialized pointer into the .fixup
+   section.
+
+   r0		has original link register
+   r3		has low pointer to convert
+   r4		has high pointer to convert
+   r5 .. r10	are scratch registers
+   r11		has the address of .LCTOC1 in it.
+   r12		has the value to add to each pointer
+   r13 .. r31	are unchanged */
+	
+FUNC_START(__eabi_uconvert)
+        cmplw	1,3,4				/* any pointers to convert? */
+        subf	5,3,4				/* calculate number of words to convert */
+        bclr	4,4				/* return if no pointers */
+
+        srawi	5,5,2
+	addi	3,3,-4				/* start-4 for use with lwzu */
+        mtctr	5
+
+.Lucvt:
+	lwzu	6,4(3)				/* next pointer to pointer to convert */
+	add	6,6,12				/* adjust pointer */
+	lwz	7,0(6)				/* get the pointer it points to */
+	stw	6,0(3)				/* store adjusted pointer */
+	add	7,7,12				/* adjust */
+	stw	7,0(6)
+        bdnz+	.Lucvt
+        blr
+
+FUNC_END(__eabi_uconvert)
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/exit.h b/gcc-4.9/libgcc/config/rs6000/exit.h
new file mode 100644
index 000000000..bc00cec8c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/exit.h
@@ -0,0 +1,92 @@
+/* Copyright (C) 1991-2014 Free Software Foundation, Inc.
+
+Derived from exit.h in GNU C Library.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef	_EXIT_H
+#define _EXIT_H 1
+
+#define attribute_hidden
+#define INTDEF(name)
+
+#include <stdbool.h>
+#include <stdint.h>
+
+enum
+{
+  ef_free,	/* `ef_free' MUST be zero!  */
+  ef_us,
+  ef_on,
+  ef_at,
+  ef_cxa
+};
+
+struct exit_function
+  {
+    /* `flavour' should be of type of the `enum' above but since we need
+       this element in an atomic operation we have to use `long int'.  */
+    long int flavor;
+    union
+      {
+	void (*at) (void);
+	struct
+	  {
+	    void (*fn) (int status, void *arg);
+	    void *arg;
+	  } on;
+	struct
+	  {
+	    void (*fn) (void *arg, int status);
+	    void *arg;
+	    void *dso_handle;
+	  } cxa;
+      } func;
+  };
+struct exit_function_list
+  {
+    struct exit_function_list *next;
+    size_t idx;
+    struct exit_function fns[32];
+  };
+extern struct exit_function_list *__exit_funcs attribute_hidden;
+extern struct exit_function_list *__quick_exit_funcs attribute_hidden;
+
+extern struct exit_function *__new_exitfn (struct exit_function_list **listp);
+extern uint64_t __new_exitfn_called attribute_hidden;
+
+extern void __run_exit_handlers (int status, struct exit_function_list **listp,
+				 bool run_list_atexit)
+  attribute_hidden __attribute__ ((__noreturn__));
+
+extern int __internal_atexit (void (*func) (void *), void *arg, void *d,
+			      struct exit_function_list **listp)
+  attribute_hidden;
+extern int __cxa_at_quick_exit (void (*func) (void *), void *d);
+
+extern int __cxa_atexit (void (*func) (void *), void *arg, void *d);
+extern int __cxa_atexit_internal (void (*func) (void *), void *arg, void *d)
+     attribute_hidden;
+
+extern void __cxa_finalize (void *d);
+
+#endif	/* exit.h  */
diff --git a/gcc-4.9/libgcc/config/rs6000/freebsd-unwind.h b/gcc-4.9/libgcc/config/rs6000/freebsd-unwind.h
new file mode 100644
index 000000000..bb8cae0f5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/freebsd-unwind.h
@@ -0,0 +1,69 @@
+/* DWARF2 EH unwinding support for PowerPC64 FreeBSD.
+   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define R_LR		65
+
+#define MD_FROB_UPDATE_CONTEXT frob_update_context
+
+static void
+frob_update_context (struct _Unwind_Context *context,
+		     _Unwind_FrameState *fs ATTRIBUTE_UNUSED)
+{
+  const unsigned int *pc = (const unsigned int *) context->ra;
+
+#ifdef __powerpc64__
+  if (fs->regs.reg[2].how == REG_UNSAVED)
+    {
+      /* If the current unwind info (FS) does not contain explicit info
+	 saving R2, then we have to do a minor amount of code reading to
+	 figure out if it was saved.  The big problem here is that the
+	 code that does the save/restore is generated by the linker, so
+	 we have no good way to determine at compile time what to do.  */
+      if (pc[0] == 0xF8410028
+	  || ((pc[0] & 0xFFFF0000) == 0x3D820000
+	      && pc[1] == 0xF8410028))
+	{
+	  /* We are in a plt call stub or r2 adjusting long branch stub,
+	     before r2 has been saved.  Keep REG_UNSAVED.  */
+	}
+      else
+	{
+	  unsigned int *insn
+	    = (unsigned int *) _Unwind_GetGR (context, R_LR);
+	  if (insn && *insn == 0xE8410028)
+	    _Unwind_SetGRPtr (context, 2, context->cfa + 40);
+	  else if (pc[0] == 0x4E800421
+		   && pc[1] == 0xE8410028)
+	    {
+	      /* We are at the bctrl instruction in a call via function
+		 pointer.  gcc always emits the load of the new R2 just
+		 before the bctrl so this is the first and only place
+		 we need to use the stored R2.  */
+	      _Unwind_Word sp = _Unwind_GetGR (context, 1);
+	      _Unwind_SetGRPtr (context, 2, (void *)(sp + 40));
+	    }
+	}
+    }
+#endif
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/gthr-aix.h b/gcc-4.9/libgcc/config/rs6000/gthr-aix.h
new file mode 100644
index 000000000..9efa23d1d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/gthr-aix.h
@@ -0,0 +1,35 @@
+/* Threads compatibility routines for libgcc2 and libobjc.  */
+/* Compile this one with gcc.  */
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_GTHR_AIX_H
+#define GCC_GTHR_AIX_H
+
+#ifdef _THREAD_SAFE
+#include "gthr-posix.h"
+#else
+#include "gthr-single.h"
+#endif
+
+#endif /* GCC_GTHR_AIX_H */
diff --git a/gcc-4.9/libgcc/config/rs6000/ibm-ldouble-format b/gcc-4.9/libgcc/config/rs6000/ibm-ldouble-format
new file mode 100644
index 000000000..a74a5fc21
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/ibm-ldouble-format
@@ -0,0 +1,91 @@
+Long double format
+==================
+
+  Each long double is made up of two IEEE doubles.  The value of the
+long double is the sum of the values of the two parts (except for
+-0.0).  The most significant part is required to be the value of the
+long double rounded to the nearest double, as specified by IEEE.  For
+Inf values, the least significant part is required to be one of +0.0
+or -0.0.  No other requirements are made; so, for example, 1.0 may be
+represented as (1.0, +0.0) or (1.0, -0.0), and the low part of a NaN
+is don't-care.
+
+Classification
+--------------
+
+A long double can represent any value of the form
+  s * 2^e * sum(k=0...105: f_k * 2^(-k))
+where 's' is +1 or -1, 'e' is between 1022 and -968 inclusive, f_0 is
+1, and f_k for k>0 is 0 or 1.  These are the 'normal' long doubles.
+
+A long double can also represent any value of the form
+  s * 2^-968 * sum(k=0...105: f_k * 2^(-k))
+where 's' is +1 or -1, f_0 is 0, and f_k for k>0 is 0 or 1.  These are
+the 'subnormal' long doubles.
+
+There are four long doubles that represent zero, two that represent
++0.0 and two that represent -0.0.  The sign of the high part is the
+sign of the long double, and the sign of the low part is ignored.
+
+Likewise, there are four long doubles that represent infinities, two
+for +Inf and two for -Inf.
+
+Each NaN, quiet or signalling, that can be represented as a 'double'
+can be represented as a 'long double'.  In fact, there are 2^64
+equivalent representations for each one.
+
+There are certain other valid long doubles where both parts are
+nonzero but the low part represents a value which has a bit set below
+2^(e-105).  These, together with the subnormal long doubles, make up
+the denormal long doubles.
+
+Many possible long double bit patterns are not valid long doubles.
+These do not represent any value.
+
+Limits
+------
+
+The maximum representable long double is 2^1024-2^918.  The smallest
+*normal* positive long double is 2^-968.  The smallest denormalised
+positive long double is 2^-1074 (this is the same as for 'double').
+
+Conversions
+-----------
+
+A double can be converted to a long double by adding a zero low part.
+
+A long double can be converted to a double by removing the low part.
+
+Comparisons
+-----------
+
+Two long doubles can be compared by comparing the high parts, and if
+those compare equal, comparing the low parts.
+
+Arithmetic
+----------
+
+The unary negate operation operates by negating the low and high parts.
+
+An absolute or absolute-negate operation must be done by comparing
+against zero and negating if necessary.
+
+Addition and subtraction are performed using library routines.  They
+are not at present performed perfectly accurately, the result produced
+will be within 1ulp of the range generated by adding or subtracting
+1ulp from the input values, where a 'ulp' is 2^(e-106) given the
+exponent 'e'.  In the presence of cancellation, this may be
+arbitrarily inaccurate.  Subtraction is done by negation and addition.
+
+Multiplication is also performed using a library routine.  Its result
+will be within 2ulp of the correct result.
+
+Division is also performed using a library routine.  Its result will
+be within 3ulp of the correct result.
+
+
+Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+Copying and distribution of this file, with or without modification,
+are permitted in any medium without royalty provided the copyright
+notice and this notice are preserved.
diff --git a/gcc-4.9/libgcc/config/rs6000/ibm-ldouble.c b/gcc-4.9/libgcc/config/rs6000/ibm-ldouble.c
new file mode 100644
index 000000000..abcd3c514
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/ibm-ldouble.c
@@ -0,0 +1,448 @@
+/* 128-bit long double support routines for Darwin.
+   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* Implementations of floating-point long double basic arithmetic
+   functions called by the IBM C compiler when generating code for
+   PowerPC platforms.  In particular, the following functions are
+   implemented: __gcc_qadd, __gcc_qsub, __gcc_qmul, and __gcc_qdiv.
+   Double-double algorithms are based on the paper "Doubled-Precision
+   IEEE Standard 754 Floating-Point Arithmetic" by W. Kahan, February 26,
+   1987.  An alternative published reference is "Software for
+   Doubled-Precision Floating-Point Computations", by Seppo Linnainmaa,
+   ACM TOMS vol 7 no 3, September 1981, pages 272-283.  */
+
+/* Each long double is made up of two IEEE doubles.  The value of the
+   long double is the sum of the values of the two parts.  The most
+   significant part is required to be the value of the long double
+   rounded to the nearest double, as specified by IEEE.  For Inf
+   values, the least significant part is required to be one of +0.0 or
+   -0.0.  No other requirements are made; so, for example, 1.0 may be
+   represented as (1.0, +0.0) or (1.0, -0.0), and the low part of a
+   NaN is don't-care.
+
+   This code currently assumes the most significant double is in
+   the lower numbered register or lower addressed memory.  */
+
+#if defined (__MACH__) || defined (__powerpc__) || defined (_AIX)
+
+#define fabs(x) __builtin_fabs(x)
+#define isless(x, y) __builtin_isless (x, y)
+#define inf() __builtin_inf()
+
+#define unlikely(x) __builtin_expect ((x), 0)
+
+#define nonfinite(a) unlikely (! isless (fabs (a), inf ()))
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
+/* All these routines actually take two long doubles as parameters,
+   but GCC currently generates poor code when a union is used to turn
+   a long double into a pair of doubles.  */
+
+long double __gcc_qadd (double, double, double, double);
+long double __gcc_qsub (double, double, double, double);
+long double __gcc_qmul (double, double, double, double);
+long double __gcc_qdiv (double, double, double, double);
+
+#if defined __ELF__ && defined SHARED \
+    && (defined __powerpc64__ || !(defined __linux__ || defined __gnu_hurd__))
+/* Provide definitions of the old symbol names to satisfy apps and
+   shared libs built against an older libgcc.  To access the _xlq
+   symbols an explicit version reference is needed, so these won't
+   satisfy an unadorned reference like _xlqadd.  If dot symbols are
+   not needed, the assembler will remove the aliases from the symbol
+   table.  */
+__asm__ (".symver __gcc_qadd,_xlqadd@GCC_3.4\n\t"
+	 ".symver __gcc_qsub,_xlqsub@GCC_3.4\n\t"
+	 ".symver __gcc_qmul,_xlqmul@GCC_3.4\n\t"
+	 ".symver __gcc_qdiv,_xlqdiv@GCC_3.4\n\t"
+	 ".symver .__gcc_qadd,._xlqadd@GCC_3.4\n\t"
+	 ".symver .__gcc_qsub,._xlqsub@GCC_3.4\n\t"
+	 ".symver .__gcc_qmul,._xlqmul@GCC_3.4\n\t"
+	 ".symver .__gcc_qdiv,._xlqdiv@GCC_3.4");
+#endif
+
+typedef union
+{
+  long double ldval;
+  double dval[2];
+} longDblUnion;
+
+/* Add two 'long double' values and return the result.	*/
+long double
+__gcc_qadd (double a, double aa, double c, double cc)
+{
+  longDblUnion x;
+  double z, q, zz, xh;
+
+  z = a + c;
+
+  if (nonfinite (z))
+    {
+      if (fabs (z) != inf())
+	return z;
+      z = cc + aa + c + a;
+      if (nonfinite (z))
+	return z;
+      x.dval[0] = z;  /* Will always be DBL_MAX.  */
+      zz = aa + cc;
+      if (fabs(a) > fabs(c))
+	x.dval[1] = a - z + c + zz;
+      else
+	x.dval[1] = c - z + a + zz;
+    }
+  else
+    {
+      q = a - z;
+      zz = q + c + (a - (q + z)) + aa + cc;
+
+      /* Keep -0 result.  */
+      if (zz == 0.0)
+	return z;
+
+      xh = z + zz;
+      if (nonfinite (xh))
+	return xh;
+
+      x.dval[0] = xh;
+      x.dval[1] = z - xh + zz;
+    }
+  return x.ldval;
+}
+
+long double
+__gcc_qsub (double a, double b, double c, double d)
+{
+  return __gcc_qadd (a, b, -c, -d);
+}
+
+#ifdef __NO_FPRS__
+static double fmsub (double, double, double);
+#endif
+
+long double
+__gcc_qmul (double a, double b, double c, double d)
+{
+  longDblUnion z;
+  double t, tau, u, v, w;
+  
+  t = a * c;			/* Highest order double term.  */
+
+  if (unlikely (t == 0)		/* Preserve -0.  */
+      || nonfinite (t))
+    return t;
+
+  /* Sum terms of two highest orders. */
+  
+  /* Use fused multiply-add to get low part of a * c.  */
+#ifndef __NO_FPRS__
+  asm ("fmsub %0,%1,%2,%3" : "=f"(tau) : "f"(a), "f"(c), "f"(t));
+#else
+  tau = fmsub (a, c, t);
+#endif
+  v = a*d;
+  w = b*c;
+  tau += v + w;	    /* Add in other second-order terms.	 */
+  u = t + tau;
+
+  /* Construct long double result.  */
+  if (nonfinite (u))
+    return u;
+  z.dval[0] = u;
+  z.dval[1] = (t - u) + tau;
+  return z.ldval;
+}
+
+long double
+__gcc_qdiv (double a, double b, double c, double d)
+{
+  longDblUnion z;
+  double s, sigma, t, tau, u, v, w;
+  
+  t = a / c;                    /* highest order double term */
+  
+  if (unlikely (t == 0)		/* Preserve -0.  */
+      || nonfinite (t))
+    return t;
+
+  /* Finite nonzero result requires corrections to the highest order
+     term.  These corrections require the low part of c * t to be
+     exactly represented in double.  */
+  if (fabs (a) <= 0x1p-969)
+    {
+      a *= 0x1p106;
+      b *= 0x1p106;
+      c *= 0x1p106;
+      d *= 0x1p106;
+    }
+
+  s = c * t;                    /* (s,sigma) = c*t exactly.  */
+  w = -(-b + d * t);	/* Written to get fnmsub for speed, but not
+			   numerically necessary.  */
+  
+  /* Use fused multiply-add to get low part of c * t.	 */
+#ifndef __NO_FPRS__
+  asm ("fmsub %0,%1,%2,%3" : "=f"(sigma) : "f"(c), "f"(t), "f"(s));
+#else
+  sigma = fmsub (c, t, s);
+#endif
+  v = a - s;
+  
+  tau = ((v-sigma)+w)/c;   /* Correction to t.  */
+  u = t + tau;
+
+  /* Construct long double result.  */
+  if (nonfinite (u))
+    return u;
+  z.dval[0] = u;
+  z.dval[1] = (t - u) + tau;
+  return z.ldval;
+}
+
+#if defined (_SOFT_DOUBLE) && defined (__LONG_DOUBLE_128__)
+
+long double __gcc_qneg (double, double);
+int __gcc_qeq (double, double, double, double);
+int __gcc_qne (double, double, double, double);
+int __gcc_qge (double, double, double, double);
+int __gcc_qle (double, double, double, double);
+long double __gcc_stoq (float);
+long double __gcc_dtoq (double);
+float __gcc_qtos (double, double);
+double __gcc_qtod (double, double);
+int __gcc_qtoi (double, double);
+unsigned int __gcc_qtou (double, double);
+long double __gcc_itoq (int);
+long double __gcc_utoq (unsigned int);
+
+extern int __eqdf2 (double, double);
+extern int __ledf2 (double, double);
+extern int __gedf2 (double, double);
+
+/* Negate 'long double' value and return the result.	*/
+long double
+__gcc_qneg (double a, double aa)
+{
+  longDblUnion x;
+
+  x.dval[0] = -a;
+  x.dval[1] = -aa;
+  return x.ldval;
+}
+
+/* Compare two 'long double' values for equality.  */
+int
+__gcc_qeq (double a, double aa, double c, double cc)
+{
+  if (__eqdf2 (a, c) == 0)
+    return __eqdf2 (aa, cc);
+  return 1;
+}
+
+strong_alias (__gcc_qeq, __gcc_qne);
+
+/* Compare two 'long double' values for less than or equal.  */
+int
+__gcc_qle (double a, double aa, double c, double cc)
+{
+  if (__eqdf2 (a, c) == 0)
+    return __ledf2 (aa, cc);
+  return __ledf2 (a, c);
+}
+
+strong_alias (__gcc_qle, __gcc_qlt);
+
+/* Compare two 'long double' values for greater than or equal.  */
+int
+__gcc_qge (double a, double aa, double c, double cc)
+{
+  if (__eqdf2 (a, c) == 0)
+    return __gedf2 (aa, cc);
+  return __gedf2 (a, c);
+}
+
+strong_alias (__gcc_qge, __gcc_qgt);
+
+/* Convert single to long double.  */
+long double
+__gcc_stoq (float a)
+{
+  longDblUnion x;
+
+  x.dval[0] = (double) a;
+  x.dval[1] = 0.0;
+
+  return x.ldval;
+}
+
+/* Convert double to long double.  */
+long double
+__gcc_dtoq (double a)
+{
+  longDblUnion x;
+
+  x.dval[0] = a;
+  x.dval[1] = 0.0;
+
+  return x.ldval;
+}
+
+/* Convert long double to single.  */
+float
+__gcc_qtos (double a, double aa __attribute__ ((__unused__)))
+{
+  return (float) a;
+}
+
+/* Convert long double to double.  */
+double
+__gcc_qtod (double a, double aa __attribute__ ((__unused__)))
+{
+  return a;
+}
+
+/* Convert long double to int.  */
+int
+__gcc_qtoi (double a, double aa)
+{
+  double z = a + aa;
+  return (int) z;
+}
+
+/* Convert long double to unsigned int.  */
+unsigned int
+__gcc_qtou (double a, double aa)
+{
+  double z = a + aa;
+  return (unsigned int) z;
+}
+
+/* Convert int to long double.  */
+long double
+__gcc_itoq (int a)
+{
+  return __gcc_dtoq ((double) a);
+}
+
+/* Convert unsigned int to long double.  */
+long double
+__gcc_utoq (unsigned int a)
+{
+  return __gcc_dtoq ((double) a);
+}
+
+#endif
+
+#ifdef __NO_FPRS__
+
+int __gcc_qunord (double, double, double, double);
+
+extern int __eqdf2 (double, double);
+extern int __unorddf2 (double, double);
+
+/* Compare two 'long double' values for unordered.  */
+int
+__gcc_qunord (double a, double aa, double c, double cc)
+{
+  if (__eqdf2 (a, c) == 0)
+    return __unorddf2 (aa, cc);
+  return __unorddf2 (a, c);
+}
+
+#include "soft-fp/soft-fp.h"
+#include "soft-fp/double.h"
+#include "soft-fp/quad.h"
+
+/* Compute floating point multiply-subtract with higher (quad) precision.  */
+static double
+fmsub (double a, double b, double c)
+{
+    FP_DECL_EX;
+    FP_DECL_D(A);
+    FP_DECL_D(B);
+    FP_DECL_D(C);
+    FP_DECL_Q(X);
+    FP_DECL_Q(Y);
+    FP_DECL_Q(Z);
+    FP_DECL_Q(U);
+    FP_DECL_Q(V);
+    FP_DECL_D(R);
+    double r;
+    long double u, x, y, z;
+
+    FP_INIT_ROUNDMODE;
+    FP_UNPACK_RAW_D (A, a);
+    FP_UNPACK_RAW_D (B, b);
+    FP_UNPACK_RAW_D (C, c);
+
+    /* Extend double to quad.  */
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+    FP_EXTEND(Q,D,4,2,X,A);
+    FP_EXTEND(Q,D,4,2,Y,B);
+    FP_EXTEND(Q,D,4,2,Z,C);
+#else
+    FP_EXTEND(Q,D,2,1,X,A);
+    FP_EXTEND(Q,D,2,1,Y,B);
+    FP_EXTEND(Q,D,2,1,Z,C);
+#endif
+    FP_PACK_RAW_Q(x,X);
+    FP_PACK_RAW_Q(y,Y);
+    FP_PACK_RAW_Q(z,Z);
+    FP_HANDLE_EXCEPTIONS;
+
+    /* Multiply.  */
+    FP_INIT_ROUNDMODE;
+    FP_UNPACK_Q(X,x);
+    FP_UNPACK_Q(Y,y);
+    FP_MUL_Q(U,X,Y);
+    FP_PACK_Q(u,U);
+    FP_HANDLE_EXCEPTIONS;
+
+    /* Subtract.  */
+    FP_INIT_ROUNDMODE;
+    FP_UNPACK_SEMIRAW_Q(U,u);
+    FP_UNPACK_SEMIRAW_Q(Z,z);
+    FP_SUB_Q(V,U,Z);
+
+    /* Truncate quad to double.  */
+#if (2 * _FP_W_TYPE_SIZE) < _FP_FRACBITS_Q
+    V_f[3] &= 0x0007ffff;
+    FP_TRUNC(D,Q,2,4,R,V);
+#else
+    V_f1 &= 0x0007ffffffffffffL;
+    FP_TRUNC(D,Q,1,2,R,V);
+#endif
+    FP_PACK_SEMIRAW_D(r,R);
+    FP_HANDLE_EXCEPTIONS;
+
+    return r;
+}
+
+#endif
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/libgcc-aix-cxa.ver b/gcc-4.9/libgcc/config/rs6000/libgcc-aix-cxa.ver
new file mode 100644
index 000000000..f89df2312
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/libgcc-aix-cxa.ver
@@ -0,0 +1,9 @@
+GCC_4.8 {
+  __cxa_atexit
+  __cxa_finalize
+}
+
+GCC_4.9 {
+  _GLOBAL__AIXI_shr_o
+  _GLOBAL__AIXD_shr_o
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.4.ver b/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.4.ver
new file mode 100644
index 000000000..830400986
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.4.ver
@@ -0,0 +1,93 @@
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+__Unwind_Backtrace
+__Unwind_DeleteException
+__Unwind_FindEnclosingFunction
+__Unwind_Find_FDE
+__Unwind_ForcedUnwind
+__Unwind_GetCFA
+__Unwind_GetDataRelBase
+__Unwind_GetGR
+__Unwind_GetIP
+__Unwind_GetLanguageSpecificData
+__Unwind_GetRegionStart
+__Unwind_GetTextRelBase
+__Unwind_RaiseException
+__Unwind_Resume
+__Unwind_Resume_or_Rethrow
+__Unwind_SetGR
+__Unwind_SetIP
+___absvdi2
+___absvsi2
+___addvdi3
+___addvsi3
+___ashldi3
+___ashrdi3
+___clear_cache
+___clzdi2
+___clzsi2
+___cmpdi2
+___ctzdi2
+___ctzsi2
+___deregister_frame
+___deregister_frame_info
+___deregister_frame_info_bases
+___divdi3
+___enable_execute_stack
+___ffsdi2
+___fixdfdi
+___fixsfdi
+___fixtfdi
+___fixunsdfdi
+___fixunsdfsi
+___fixunssfdi
+___fixunssfsi
+___fixunstfdi
+___floatdidf
+___floatdisf
+___floatditf
+___gcc_personality_v0
+___gcc_qadd
+___gcc_qdiv
+___gcc_qmul
+___gcc_qsub
+___lshrdi3
+___moddi3
+___muldi3
+___mulvdi3
+___mulvsi3
+___negdi2
+___negvdi2
+___negvsi2
+___paritydi2
+___paritysi2
+___popcountdi2
+___popcountsi2
+___register_frame
+___register_frame_info
+___register_frame_info_bases
+___register_frame_info_table
+___register_frame_info_table_bases
+___register_frame_table
+___subvdi3
+___subvsi3
+___trampoline_setup
+___ucmpdi2
+___udivdi3
+___udivmoddi4
+___umoddi3
diff --git a/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.5.ver b/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.5.ver
new file mode 100644
index 000000000..af14f39fd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/libgcc-darwin.10.5.ver
@@ -0,0 +1,106 @@
+# Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+__Unwind_Backtrace
+__Unwind_DeleteException
+__Unwind_FindEnclosingFunction
+__Unwind_Find_FDE
+__Unwind_ForcedUnwind
+__Unwind_GetCFA
+__Unwind_GetDataRelBase
+__Unwind_GetGR
+__Unwind_GetIP
+__Unwind_GetIPInfo
+__Unwind_GetLanguageSpecificData
+__Unwind_GetRegionStart
+__Unwind_GetTextRelBase
+__Unwind_RaiseException
+__Unwind_Resume
+__Unwind_Resume_or_Rethrow
+__Unwind_SetGR
+__Unwind_SetIP
+___absvdi2
+___absvsi2
+___addvdi3
+___addvsi3
+___ashldi3
+___ashrdi3
+___clear_cache
+___clzdi2
+___clzsi2
+___cmpdi2
+___ctzdi2
+___ctzsi2
+___deregister_frame
+___deregister_frame_info
+___deregister_frame_info_bases
+___divdc3
+___divdi3
+___divsc3
+___divtc3
+___enable_execute_stack
+___ffsdi2
+___fixdfdi
+___fixsfdi
+___fixtfdi
+___fixunsdfdi
+___fixunsdfsi
+___fixunssfdi
+___fixunssfsi
+___fixunstfdi
+___floatdidf
+___floatdisf
+___floatditf
+___floatundidf
+___floatundisf
+___floatunditf
+___gcc_personality_v0
+___gcc_qadd
+___gcc_qdiv
+___gcc_qmul
+___gcc_qsub
+___lshrdi3
+___moddi3
+___muldc3
+___muldi3
+___mulsc3
+___multc3
+___mulvdi3
+___mulvsi3
+___negdi2
+___negvdi2
+___negvsi2
+___paritydi2
+___paritysi2
+___popcountdi2
+___popcountsi2
+___powidf2
+___powisf2
+___powitf2
+___register_frame
+___register_frame_info
+___register_frame_info_bases
+___register_frame_info_table
+___register_frame_info_table_bases
+___register_frame_table
+___subvdi3
+___subvsi3
+___trampoline_setup
+___ucmpdi2
+___udivdi3
+___udivmoddi4
+___umoddi3
diff --git a/gcc-4.9/libgcc/config/rs6000/libgcc-glibc.ver b/gcc-4.9/libgcc/config/rs6000/libgcc-glibc.ver
new file mode 100644
index 000000000..b12213dcd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/libgcc-glibc.ver
@@ -0,0 +1,73 @@
+# Copyright (C) 2006-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+%ifndef _SOFT_FLOAT
+%ifndef __powerpc64__
+%exclude {
+  __multc3
+  __divtc3
+  __powitf2
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+}
+
+GCC_4.1.0 {
+  # long double support
+  __multc3
+  __divtc3
+  __powitf2
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+
+%else
+GCC_3.4.4 {
+%endif
+%else
+GCC_4.2.0 {
+%endif
+
+  # long double support
+  __gcc_qadd
+  __gcc_qsub
+  __gcc_qmul
+  __gcc_qdiv
+
+%ifdef _SOFT_DOUBLE
+  __gcc_qneg
+  __gcc_qeq
+  __gcc_qne
+  __gcc_qgt
+  __gcc_qge
+  __gcc_qlt
+  __gcc_qle
+  __gcc_stoq
+  __gcc_dtoq
+  __gcc_qtos
+  __gcc_qtod
+  __gcc_qtoi
+  __gcc_qtou
+  __gcc_itoq
+  __gcc_utoq
+%endif
+
+%ifdef __NO_FPRS__
+  __gcc_qunord
+%endif
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/libgcc-ibm-ldouble.ver b/gcc-4.9/libgcc/config/rs6000/libgcc-ibm-ldouble.ver
new file mode 100644
index 000000000..b27b4b492
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/libgcc-ibm-ldouble.ver
@@ -0,0 +1,7 @@
+GCC_3.4.4 {
+  # long double support
+  __gcc_qadd
+  __gcc_qsub
+  __gcc_qmul
+  __gcc_qdiv
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/linux-unwind.h b/gcc-4.9/libgcc/config/rs6000/linux-unwind.h
new file mode 100644
index 000000000..c5b006ee9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/linux-unwind.h
@@ -0,0 +1,354 @@
+/* DWARF2 EH unwinding support for PowerPC and PowerPC64 Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#define R_LR		65
+#define R_CR2		70
+#define R_CR3		71
+#define R_CR4		72
+#define R_VR0		77
+#define R_VRSAVE	109
+
+#ifdef __powerpc64__
+#if _CALL_ELF == 2
+#define TOC_SAVE_SLOT	24
+#else
+#define TOC_SAVE_SLOT	40
+#endif
+#endif
+
+struct gcc_vregs
+{
+  __attribute__ ((vector_size (16))) int vr[32];
+#ifdef __powerpc64__
+  unsigned int pad1[3];
+  unsigned int vscr;
+  unsigned int vsave;
+  unsigned int pad2[3];
+#else
+  unsigned int vsave;
+  unsigned int pad[2];
+  unsigned int vscr;
+#endif
+};
+
+struct gcc_regs
+{
+  unsigned long gpr[32];
+  unsigned long nip;
+  unsigned long msr;
+  unsigned long orig_gpr3;
+  unsigned long ctr;
+  unsigned long link;
+  unsigned long xer;
+  unsigned long ccr;
+  unsigned long softe;
+  unsigned long trap;
+  unsigned long dar;
+  unsigned long dsisr;
+  unsigned long result;
+  unsigned long pad1[4];
+  double fpr[32];
+  unsigned int pad2;
+  unsigned int fpscr;
+#ifdef __powerpc64__
+  struct gcc_vregs *vp;
+#else
+  unsigned int pad3[2];
+#endif
+  struct gcc_vregs vregs;
+};
+
+struct gcc_ucontext
+{
+#ifdef __powerpc64__
+  unsigned long pad[28];
+#else
+  unsigned long pad[12];
+#endif
+  struct gcc_regs *regs;
+  struct gcc_regs rsave;
+};
+
+#ifdef __powerpc64__
+
+enum { SIGNAL_FRAMESIZE = 128 };
+
+/* If PC is at a sigreturn trampoline, return a pointer to the
+   regs.  Otherwise return NULL.  */
+
+static struct gcc_regs *
+get_regs (struct _Unwind_Context *context)
+{
+  const unsigned int *pc = context->ra;
+
+  /* addi r1, r1, 128; li r0, 0x0077; sc  (sigreturn) */
+  /* addi r1, r1, 128; li r0, 0x00AC; sc  (rt_sigreturn) */
+  if (pc[0] != 0x38210000 + SIGNAL_FRAMESIZE || pc[2] != 0x44000002)
+    return NULL;
+  if (pc[1] == 0x38000077)
+    {
+      struct sigframe {
+	char gap[SIGNAL_FRAMESIZE];
+	unsigned long pad[7];
+	struct gcc_regs *regs;
+      } *frame = (struct sigframe *) context->cfa;
+      return frame->regs;
+    }
+  else if (pc[1] == 0x380000AC)
+    {
+#if _CALL_ELF != 2
+      /* These old kernel versions never supported ELFv2.  */
+      /* This works for 2.4 kernels, but not for 2.6 kernels with vdso
+	 because pc isn't pointing into the stack.  Can be removed when
+	 no one is running 2.4.19 or 2.4.20, the first two ppc64
+	 kernels released.  */
+      const struct rt_sigframe_24 {
+	int tramp[6];
+	void *pinfo;
+	struct gcc_ucontext *puc;
+      } *frame24 = (const struct rt_sigframe_24 *) context->ra;
+
+      /* Test for magic value in *puc of vdso.  */
+      if ((long) frame24->puc != -21 * 8)
+	return frame24->puc->regs;
+      else
+#endif
+	{
+	  /* This works for 2.4.21 and later kernels.  */
+	  struct rt_sigframe {
+	    char gap[SIGNAL_FRAMESIZE];
+	    struct gcc_ucontext uc;
+	    unsigned long pad[2];
+	    int tramp[6];
+	    void *pinfo;
+	    struct gcc_ucontext *puc;
+	  } *frame = (struct rt_sigframe *) context->cfa;
+	  return frame->uc.regs;
+	}
+    }
+  return NULL;
+}
+
+#else  /* !__powerpc64__ */
+
+enum { SIGNAL_FRAMESIZE = 64 };
+
+static struct gcc_regs *
+get_regs (struct _Unwind_Context *context)
+{
+  const unsigned int *pc = context->ra;
+
+  /* li r0, 0x7777; sc  (sigreturn old)  */
+  /* li r0, 0x0077; sc  (sigreturn new)  */
+  /* li r0, 0x6666; sc  (rt_sigreturn old)  */
+  /* li r0, 0x00AC; sc  (rt_sigreturn new)  */
+  if (pc[1] != 0x44000002)
+    return NULL;
+  if (pc[0] == 0x38007777 || pc[0] == 0x38000077)
+    {
+      struct sigframe {
+	char gap[SIGNAL_FRAMESIZE];
+	unsigned long pad[7];
+	struct gcc_regs *regs;
+      } *frame = (struct sigframe *) context->cfa;
+      return frame->regs;
+    }
+  else if (pc[0] == 0x38006666 || pc[0] == 0x380000AC)
+    {
+      struct rt_sigframe {
+	char gap[SIGNAL_FRAMESIZE + 16];
+	char siginfo[128];
+	struct gcc_ucontext uc;
+      } *frame = (struct rt_sigframe *) context->cfa;
+      return frame->uc.regs;
+    }
+  return NULL;
+}
+#endif
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR ppc_fallback_frame_state
+
+static _Unwind_Reason_Code
+ppc_fallback_frame_state (struct _Unwind_Context *context,
+			  _Unwind_FrameState *fs)
+{
+  struct gcc_regs *regs = get_regs (context);
+  struct gcc_vregs *vregs;
+  long cr_offset;
+  long new_cfa;
+  int i;
+
+  if (regs == NULL)
+    return _URC_END_OF_STACK;
+
+  new_cfa = regs->gpr[STACK_POINTER_REGNUM];
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+#ifdef __powerpc64__
+  fs->regs.reg[2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[2].loc.offset = (long) &regs->gpr[2] - new_cfa;
+#endif
+  for (i = 14; i < 32; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset = (long) &regs->gpr[i] - new_cfa;
+    }
+
+  /* The CR is saved in the low 32 bits of regs->ccr.  */
+  cr_offset = (long) &regs->ccr - new_cfa;
+#ifndef __LITTLE_ENDIAN__
+  cr_offset += sizeof (long) - 4;
+#endif
+  /* In the ELFv1 ABI, CR2 stands in for the whole CR.  */
+  fs->regs.reg[R_CR2].how = REG_SAVED_OFFSET;
+  fs->regs.reg[R_CR2].loc.offset = cr_offset;
+#if _CALL_ELF == 2
+  /* In the ELFv2 ABI, every CR field has a separate CFI entry.  */
+  fs->regs.reg[R_CR3].how = REG_SAVED_OFFSET;
+  fs->regs.reg[R_CR3].loc.offset = cr_offset;
+  fs->regs.reg[R_CR4].how = REG_SAVED_OFFSET;
+  fs->regs.reg[R_CR4].loc.offset = cr_offset;
+#endif
+
+  fs->regs.reg[R_LR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[R_LR].loc.offset = (long) &regs->link - new_cfa;
+
+  fs->regs.reg[ARG_POINTER_REGNUM].how = REG_SAVED_OFFSET;
+  fs->regs.reg[ARG_POINTER_REGNUM].loc.offset = (long) &regs->nip - new_cfa;
+  fs->retaddr_column = ARG_POINTER_REGNUM;
+  fs->signal_frame = 1;
+
+  /* If we have a FPU...  */
+  for (i = 14; i < 32; i++)
+    {
+      fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i + 32].loc.offset = (long) &regs->fpr[i] - new_cfa;
+    }
+
+  /* If we have a VMX unit...  */
+#ifdef __powerpc64__
+  vregs = regs->vp;
+#else
+  vregs = &regs->vregs;
+#endif
+  if (regs->msr & (1 << 25))
+    {
+      for (i = 20; i < 32; i++)
+	{
+	  fs->regs.reg[i + R_VR0].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i + R_VR0].loc.offset = (long) &vregs->vr[i] - new_cfa;
+	}
+    }
+
+  fs->regs.reg[R_VRSAVE].how = REG_SAVED_OFFSET;
+  fs->regs.reg[R_VRSAVE].loc.offset = (long) &vregs->vsave - new_cfa;
+
+  /* If we have SPE register high-parts... we check at compile-time to
+     avoid expanding the code for all other PowerPC.  */
+#ifdef __SPE__
+  for (i = 14; i < 32; i++)
+    {
+      fs->regs.reg[i + FIRST_PSEUDO_REGISTER - 1].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i + FIRST_PSEUDO_REGISTER - 1].loc.offset
+	= (long) &regs->vregs - new_cfa + 4 * i;
+    }
+#endif
+
+  return _URC_NO_REASON;
+}
+
+#define MD_FROB_UPDATE_CONTEXT frob_update_context
+
+static void
+frob_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs ATTRIBUTE_UNUSED)
+{
+  const unsigned int *pc = (const unsigned int *) context->ra;
+
+  /* Fix up for 2.6.12 - 2.6.16 Linux kernels that have vDSO, but don't
+     have S flag in it.  */
+#ifdef __powerpc64__
+  /* addi r1, r1, 128; li r0, 0x0077; sc  (sigreturn) */
+  /* addi r1, r1, 128; li r0, 0x00AC; sc  (rt_sigreturn) */
+  if (pc[0] == 0x38210000 + SIGNAL_FRAMESIZE
+      && (pc[1] == 0x38000077 || pc[1] == 0x380000AC)
+      && pc[2] == 0x44000002)
+    _Unwind_SetSignalFrame (context, 1);
+#else
+  /* li r0, 0x7777; sc  (sigreturn old)  */
+  /* li r0, 0x0077; sc  (sigreturn new)  */
+  /* li r0, 0x6666; sc  (rt_sigreturn old)  */
+  /* li r0, 0x00AC; sc  (rt_sigreturn new)  */
+  if ((pc[0] == 0x38007777 || pc[0] == 0x38000077
+       || pc[0] == 0x38006666 || pc[0] == 0x380000AC)
+      && pc[1] == 0x44000002)
+    _Unwind_SetSignalFrame (context, 1);
+#endif
+
+#ifdef __powerpc64__
+  if (fs->regs.reg[2].how == REG_UNSAVED)
+    {
+      /* If the current unwind info (FS) does not contain explicit info
+	 saving R2, then we have to do a minor amount of code reading to
+	 figure out if it was saved.  The big problem here is that the
+	 code that does the save/restore is generated by the linker, so
+	 we have no good way to determine at compile time what to do.  */
+      if (pc[0] == 0xF8410000 + TOC_SAVE_SLOT
+#if _CALL_ELF != 2
+	  /* The ELFv2 linker never generates the old PLT stub form.  */
+	  || ((pc[0] & 0xFFFF0000) == 0x3D820000
+	      && pc[1] == 0xF8410000 + TOC_SAVE_SLOT)
+#endif
+	  )
+	{
+	  /* We are in a plt call stub or r2 adjusting long branch stub,
+	     before r2 has been saved.  Keep REG_UNSAVED.  */
+	}
+      else
+	{
+	  unsigned int *insn
+	    = (unsigned int *) _Unwind_GetGR (context, R_LR);
+	  if (insn && *insn == 0xE8410000 + TOC_SAVE_SLOT)
+	    _Unwind_SetGRPtr (context, 2, context->cfa + TOC_SAVE_SLOT);
+#if _CALL_ELF != 2
+	  /* ELFv2 does not use this function pointer call sequence.  */
+	  else if (pc[0] == 0x4E800421
+		   && pc[1] == 0xE8410000 + TOC_SAVE_SLOT)
+	    {
+	      /* We are at the bctrl instruction in a call via function
+		 pointer.  gcc always emits the load of the new R2 just
+		 before the bctrl so this is the first and only place
+		 we need to use the stored R2.  */
+	      _Unwind_Word sp = _Unwind_GetGR (context, 1);
+	      _Unwind_SetGRPtr (context, 2, (void *)(sp + TOC_SAVE_SLOT));
+	    }
+#endif
+	}
+    }
+#endif
+}
diff --git a/gcc-4.9/libgcc/config/rs6000/ppc64-fp.c b/gcc-4.9/libgcc/config/rs6000/ppc64-fp.c
new file mode 100644
index 000000000..bd4c55b50
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/ppc64-fp.c
@@ -0,0 +1,237 @@
+/* Functions needed for soft-float on powerpc64-linux, copied from
+   libgcc2.c with macros expanded to force the use of specific types.
+ 
+   Copyright (C) 1989-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#if defined(__powerpc64__) || defined (__64BIT__) || defined(__ppc64__)
+#define TMODES
+#include "fp-bit.h"
+
+extern DItype __fixtfdi (TFtype);
+extern DItype __fixdfdi (DFtype);
+extern DItype __fixsfdi (SFtype);
+extern USItype __fixunsdfsi (DFtype);
+extern USItype __fixunssfsi (SFtype);
+extern TFtype __floatditf (DItype);
+extern TFtype __floatunditf (UDItype);
+extern DFtype __floatdidf (DItype);
+extern DFtype __floatundidf (UDItype);
+extern SFtype __floatdisf (DItype);
+extern SFtype __floatundisf (UDItype);
+extern DItype __fixunstfdi (TFtype);
+
+static DItype local_fixunssfdi (SFtype);
+static DItype local_fixunsdfdi (DFtype);
+
+DItype
+__fixtfdi (TFtype a)
+{
+  if (a < 0)
+    return - __fixunstfdi (-a);
+  return __fixunstfdi (a);
+}
+
+DItype
+__fixdfdi (DFtype a)
+{
+  if (a < 0)
+    return - local_fixunsdfdi (-a);
+  return local_fixunsdfdi (a);
+}
+
+DItype
+__fixsfdi (SFtype a)
+{
+  if (a < 0)
+    return - local_fixunssfdi (-a);
+  return local_fixunssfdi (a);
+}
+
+USItype
+__fixunsdfsi (DFtype a)
+{
+  if (a >= - (DFtype) (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
+    return (SItype) (a + (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
+                       - (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1);
+  return (SItype) a;
+}
+
+USItype
+__fixunssfsi (SFtype a)
+{
+  if (a >= - (SFtype) (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
+    return (SItype) (a + (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1))
+                       - (- ((SItype)(((USItype)1 << ((4 * 8) - 1)) - 1)) - 1);
+  return (SItype) a;
+}
+
+TFtype
+__floatditf (DItype u)
+{
+  DFtype dh, dl;
+
+  dh = (SItype) (u >> (sizeof (SItype) * 8));
+  dh *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return (TFtype) dh + (TFtype) dl;
+}
+
+TFtype
+__floatunditf (UDItype u)
+{
+  DFtype dh, dl;
+
+  dh = (USItype) (u >> (sizeof (SItype) * 8));
+  dh *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  dl = (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return (TFtype) dh + (TFtype) dl;
+}
+
+DFtype
+__floatdidf (DItype u)
+{
+  DFtype d;
+
+  d = (SItype) (u >> (sizeof (SItype) * 8));
+  d *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  d += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return d;
+}
+
+DFtype
+__floatundidf (UDItype u)
+{
+  DFtype d;
+
+  d = (USItype) (u >> (sizeof (SItype) * 8));
+  d *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  d += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return d;
+}
+
+SFtype
+__floatdisf (DItype u)
+{
+  DFtype f;
+
+  if (53 < (sizeof (DItype) * 8)
+      && 53 > ((sizeof (DItype) * 8) - 53 + 24))
+    {
+      if (! (- ((DItype) 1 << 53) < u
+             && u < ((DItype) 1 << 53)))
+        {
+          if ((UDItype) u & (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1))
+            {
+              u &= ~ (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1);
+              u |= ((UDItype) 1 << ((sizeof (DItype) * 8) - 53));
+            }
+        }
+    }
+  f = (SItype) (u >> (sizeof (SItype) * 8));
+  f *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  f += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return (SFtype) f;
+}
+
+SFtype
+__floatundisf (UDItype u)
+{
+  DFtype f;
+
+  if (53 < (sizeof (DItype) * 8)
+      && 53 > ((sizeof (DItype) * 8) - 53 + 24))
+    {
+      if (u >= ((UDItype) 1 << 53))
+        {
+          if ((UDItype) u & (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1))
+            {
+              u &= ~ (((UDItype) 1 << ((sizeof (DItype) * 8) - 53)) - 1);
+              u |= ((UDItype) 1 << ((sizeof (DItype) * 8) - 53));
+            }
+        }
+    }
+  f = (USItype) (u >> (sizeof (SItype) * 8));
+  f *= 2.0 * (((UDItype) 1) << ((sizeof (SItype) * 8) - 1));
+  f += (USItype) (u & ((((UDItype) 1) << (sizeof (SItype) * 8)) - 1));
+
+  return (SFtype) f;
+}
+
+DItype
+__fixunstfdi (TFtype a)
+{
+  if (a < 0)
+    return 0;
+
+  /* Compute high word of result, as a flonum.  */
+  const TFtype b = (a / (((UDItype) 1) << (sizeof (SItype) * 8)));
+  /* Convert that to fixed (but not to DItype!),
+     and shift it into the high word.  */
+  UDItype v = (USItype) b;
+  v <<= (sizeof (SItype) * 8);
+  /* Remove high part from the TFtype, leaving the low part as flonum.  */
+  a -= (TFtype) v;
+  /* Convert that to fixed (but not to DItype!) and add it in.
+     Sometimes A comes out negative.  This is significant, since
+     A has more bits than a long int does.  */
+  if (a < 0)
+    v -= (USItype) (-a);
+  else
+    v += (USItype) a;
+  return v;
+}
+
+/* This version is needed to prevent recursion; fixunsdfdi in libgcc
+   calls fixdfdi, which in turn calls calls fixunsdfdi.  */
+
+static DItype
+local_fixunsdfdi (DFtype a)
+{
+  USItype hi, lo;
+
+  hi = a / (((UDItype) 1) << (sizeof (SItype) * 8));
+  lo = (a - ((DFtype) hi) * (((UDItype) 1) << (sizeof (SItype) * 8)));
+  return ((UDItype) hi << (sizeof (SItype) * 8)) | lo;
+}
+
+/* This version is needed to prevent recursion; fixunssfdi in libgcc
+   calls fixsfdi, which in turn calls calls fixunssfdi.  */
+
+static DItype
+local_fixunssfdi (SFtype original_a)
+{
+  DFtype a = original_a;
+  USItype hi, lo;
+
+  hi = a / (((UDItype) 1) << (sizeof (SItype) * 8));
+  lo = (a - ((DFtype) hi) * (((UDItype) 1) << (sizeof (SItype) * 8)));
+  return ((UDItype) hi << (sizeof (SItype) * 8)) | lo;
+}
+
+#endif /* __powerpc64__ */
diff --git a/gcc-4.9/libgcc/config/rs6000/sfp-machine.h b/gcc-4.9/libgcc/config/rs6000/sfp-machine.h
new file mode 100644
index 000000000..40436337f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/sfp-machine.h
@@ -0,0 +1,71 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __BIG_ENDIAN__ || defined _BIG_ENDIAN
+# if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
+#  error "Both BIG_ENDIAN and LITTLE_ENDIAN defined!"
+# endif
+# define __BYTE_ORDER __BIG_ENDIAN
+#else
+# if defined __LITTLE_ENDIAN__ || defined _LITTLE_ENDIAN
+#  define __BYTE_ORDER __LITTLE_ENDIAN
+# else
+#  error "Cannot determine current byte order"
+# endif
+#endif
+
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
diff --git a/gcc-4.9/libgcc/config/rs6000/sol-ci.S b/gcc-4.9/libgcc/config/rs6000/sol-ci.S
new file mode 100644
index 000000000..e5b5635a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/sol-ci.S
@@ -0,0 +1,94 @@
+# crti.s for sysv4
+
+#   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+#   Written By Michael Meissner
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just supplies labeled starting points for the .got* and other
+# special sections.  It is linked in first before other modules.
+ 
+	.ident	"GNU C scrti.s"
+
+#ifndef __powerpc64__
+# Start of .text
+	.section ".text"
+	.globl	_ex_text0
+_ex_text0:
+
+# Exception range
+	.section ".exception_ranges","aw"
+	.globl	_ex_range0
+_ex_range0:
+
+# List of C++ constructors
+	.section ".ctors","aw"
+	.globl	__CTOR_LIST__
+	.type	__CTOR_LIST__,@object
+__CTOR_LIST__:
+
+# List of C++ destructors
+	.section ".dtors","aw"
+	.globl	__DTOR_LIST__
+	.type	__DTOR_LIST__,@object
+__DTOR_LIST__:
+
+# Head of _init function used for static constructors
+	.section ".init","ax"
+	.align 2
+	.globl _init
+	.type _init,@function
+_init:	stwu	%r1,-16(%r1)
+	mflr	%r0
+	stw	%r31,12(%r1)
+	stw	%r0,16(%r1)
+
+	bl	_GLOBAL_OFFSET_TABLE_-4	# get the GOT address
+	mflr	%r31
+
+#	lwz	%r3,_ex_shared0@got(%r31)
+#	lwz	%r4,-8(%r3)		# _ex_register or 0
+#	cmpi	%cr0,%r4,0
+#	beq	.Lno_reg
+#	mtlr	%r4
+#	blrl
+#.Lno_reg:
+
+# Head of _fini function used for static destructors
+	.section ".fini","ax"
+	.align 2
+	.globl _fini
+	.type _fini,@function
+_fini:	stwu	%r1,-16(%r1)
+	mflr	%r0
+	stw	%r31,12(%r1)
+	stw	%r0,16(%r1)
+
+	bl	_GLOBAL_OFFSET_TABLE_-4	# get the GOT address
+	mflr	%r31
+
+# _environ and its evil twin environ, pointing to the environment
+	.section ".sdata","aw"
+	.align 2
+	.globl _environ
+	.space 4
+	.weak	environ
+	.set	environ,_environ
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/sol-cn.S b/gcc-4.9/libgcc/config/rs6000/sol-cn.S
new file mode 100644
index 000000000..7a5f43cd3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/sol-cn.S
@@ -0,0 +1,72 @@
+# crtn.s for sysv4
+
+# Copyright (C) 1996-2014 Free Software Foundation, Inc.
+#   Written By Michael Meissner
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+# 
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just supplies labeled ending points for the .got* and other
+# special sections.  It is linked in last after other modules.
+ 
+	.ident	"GNU C scrtn.s"
+
+#ifndef __powerpc64__
+# Default versions of exception handling register/deregister
+	.weak	_ex_register
+	.weak	_ex_deregister
+	.set	_ex_register,0
+	.set	_ex_deregister,0
+
+# End list of C++ constructors
+	.section ".ctors","aw"
+	.globl	__CTOR_END__
+	.type	__CTOR_END__,@object
+__CTOR_END__:
+
+# End list of C++ destructors
+	.section ".dtors","aw"
+	.weak	__DTOR_END__
+	.type	__DTOR_END__,@object
+__DTOR_END__:
+
+	.section ".text"
+	.globl	_ex_text1
+_ex_text1:
+
+	.section ".exception_ranges","aw"
+	.globl	_ex_range1
+_ex_range1:
+
+# Tail of _init used for static constructors
+	.section ".init","ax"
+	lwz	%r0,16(%r1)
+	lwz	%r31,12(%r1)
+	mtlr	%r0
+	addi	%r1,%r1,16
+	blr
+
+# Tail of _fini used for static destructors
+	.section ".fini","ax"
+	lwz	%r0,16(%r1)
+	lwz	%r31,12(%r1)
+	mtlr	%r0
+	addi	%r1,%r1,16
+	blr
+#endif
diff --git a/gcc-4.9/libgcc/config/rs6000/t-aix-cxa b/gcc-4.9/libgcc/config/rs6000/t-aix-cxa
new file mode 100644
index 000000000..4755c20c9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-aix-cxa
@@ -0,0 +1,12 @@
+LIB2ADDEH += $(srcdir)/config/rs6000/cxa_atexit.c \
+	$(srcdir)/config/rs6000/cxa_finalize.c
+
+LIB2ADD_ST += $(srcdir)/config/rs6000/aixinitfini.c
+
+SHLIB_MAPFILES += $(srcdir)/config/rs6000/libgcc-aix-cxa.ver
+
+crtcxa.o: $(srcdir)/config/rs6000/crtcxa.c
+	$(crt_compile) -c $<
+
+crtcxa_s.o: $(srcdir)/config/rs6000/crtcxa.c
+	$(crt_compile) -DSHARED -c $<
diff --git a/gcc-4.9/libgcc/config/rs6000/t-crtstuff b/gcc-4.9/libgcc/config/rs6000/t-crtstuff
new file mode 100644
index 000000000..7422d3837
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-crtstuff
@@ -0,0 +1,3 @@
+# If .sdata is enabled __CTOR_{LIST,END}__ go into .sdata instead of
+# .ctors.
+CRTSTUFF_T_CFLAGS = -msdata=none
diff --git a/gcc-4.9/libgcc/config/rs6000/t-darwin b/gcc-4.9/libgcc/config/rs6000/t-darwin
new file mode 100644
index 000000000..abb41fc9b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-darwin
@@ -0,0 +1,23 @@
+DARWIN_EXTRA_CRT_BUILD_CFLAGS = -mlongcall -mmacosx-version-min=10.4
+
+crt2.o: $(srcdir)/config/rs6000/darwin-crt2.c
+	$(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -c $<
+
+LIB2ADD = $(srcdir)/config/rs6000/darwin-tramp.S \
+	  $(srcdir)/config/darwin-64.c \
+	  $(srcdir)/config/rs6000/darwin-fpsave.S  \
+	  $(srcdir)/config/rs6000/darwin-gpsave.S  \
+	  $(srcdir)/config/rs6000/darwin-world.S \
+	  $(srcdir)/config/rs6000/ppc64-fp.c
+
+LIB2ADD_ST = \
+	  $(srcdir)/config/rs6000/darwin-vecsave.S
+
+# The .S files above are designed to run on all processors, even though
+# they use AltiVec instructions.
+# -Wa is used because -force_cpusubtype_ALL doesn't work with -dynamiclib.
+# -mmacosx-version-min=10.4 is used to provide compatibility for code from
+# earlier OSX versions.
+HOST_LIBGCC2_CFLAGS += -Wa,-force_cpusubtype_ALL -mmacosx-version-min=10.4
+
+LIB2ADDEH += $(srcdir)/config/rs6000/darwin-fallback.c
diff --git a/gcc-4.9/libgcc/config/rs6000/t-darwin64 b/gcc-4.9/libgcc/config/rs6000/t-darwin64
new file mode 100644
index 000000000..50f09d6de
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-darwin64
@@ -0,0 +1,7 @@
+LIB2_SIDITI_CONV_FUNCS = yes
+
+LIB2ADD = $(srcdir)/config/rs6000/darwin-tramp.S \
+	  $(srcdir)/config/darwin-64.c \
+	  $(srcdir)/config/rs6000/darwin-fpsave.S \
+	  $(srcdir)/config/rs6000/darwin-gpsave.S \
+	  $(srcdir)/config/rs6000/darwin-world.S
diff --git a/gcc-4.9/libgcc/config/rs6000/t-freebsd b/gcc-4.9/libgcc/config/rs6000/t-freebsd
new file mode 100644
index 000000000..e2d4d2c32
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-freebsd
@@ -0,0 +1,22 @@
+# Overrides for FreeBSD PowerPC 
+#
+# Copyright (C) 2011-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# We do not want to build ibm-ldouble.c.
+LIB2ADD := $(filter-out %ibm-ldouble.c, $(LIB2ADD))
diff --git a/gcc-4.9/libgcc/config/rs6000/t-freebsd64 b/gcc-4.9/libgcc/config/rs6000/t-freebsd64
new file mode 100644
index 000000000..5dc0d4895
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-freebsd64
@@ -0,0 +1,5 @@
+HOST_LIBGCC2_CFLAGS += -mno-minimal-toc
+SHLIB_MAPFILES = libgcc-std.ver
+
+softfp_wrap_start := '\#ifndef __powerpc64__'
+softfp_wrap_end := '\#endif'
diff --git a/gcc-4.9/libgcc/config/rs6000/t-ibm-ldouble b/gcc-4.9/libgcc/config/rs6000/t-ibm-ldouble
new file mode 100644
index 000000000..b13278498
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-ibm-ldouble
@@ -0,0 +1,6 @@
+# GCC 128-bit long double support routines.
+LIB2ADD += $(srcdir)/config/rs6000/ibm-ldouble.c
+
+HOST_LIBGCC2_CFLAGS += -mlong-double-128
+
+SHLIB_MAPFILES += $(srcdir)/config/rs6000/libgcc-ibm-ldouble.ver
diff --git a/gcc-4.9/libgcc/config/rs6000/t-linux b/gcc-4.9/libgcc/config/rs6000/t-linux
new file mode 100644
index 000000000..4f6d4c4a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-linux
@@ -0,0 +1,3 @@
+SHLIB_MAPFILES += $(srcdir)/config/rs6000/libgcc-glibc.ver
+
+HOST_LIBGCC2_CFLAGS += -mlong-double-128 -mno-minimal-toc
diff --git a/gcc-4.9/libgcc/config/rs6000/t-lynx b/gcc-4.9/libgcc/config/rs6000/t-lynx
new file mode 100644
index 000000000..af7f5982b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-lynx
@@ -0,0 +1 @@
+LIB2ADD = $(srcdir)/config/rs6000/tramp.S
diff --git a/gcc-4.9/libgcc/config/rs6000/t-netbsd b/gcc-4.9/libgcc/config/rs6000/t-netbsd
new file mode 100644
index 000000000..7be8e5e67
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-netbsd
@@ -0,0 +1,11 @@
+LIB2ADD = $(srcdir)/config/rs6000/tramp.S
+
+LIB2ADD_ST = \
+	$(srcdir)/config/rs6000/crtsavfpr.S \
+	$(srcdir)/config/rs6000/crtresfpr.S \
+	$(srcdir)/config/rs6000/crtsavgpr.S \
+	$(srcdir)/config/rs6000/crtresgpr.S \
+	$(srcdir)/config/rs6000/crtresxfpr.S \
+	$(srcdir)/config/rs6000/crtresxgpr.S \
+	$(srcdir)/config/rs6000/crtsavevr.S \
+	$(srcdir)/config/rs6000/crtrestvr.S
diff --git a/gcc-4.9/libgcc/config/rs6000/t-ppc64-fp b/gcc-4.9/libgcc/config/rs6000/t-ppc64-fp
new file mode 100644
index 000000000..1fac701fc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-ppc64-fp
@@ -0,0 +1,5 @@
+# Can be used unconditionally, wrapped in __powerpc64__ || __64BIT__ __ppc64__.
+LIB2ADD += $(srcdir)/config/rs6000/ppc64-fp.c
+
+softfp_wrap_start := '\#ifndef __powerpc64__'
+softfp_wrap_end := '\#endif'
diff --git a/gcc-4.9/libgcc/config/rs6000/t-ppccomm b/gcc-4.9/libgcc/config/rs6000/t-ppccomm
new file mode 100644
index 000000000..fb812d380
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-ppccomm
@@ -0,0 +1,22 @@
+LIB2ADD += $(srcdir)/config/rs6000/ibm-ldouble.c \
+	   $(srcdir)/config/rs6000/tramp.S
+
+# This can't end up in shared libgcc
+LIB2ADD_ST += \
+	   $(srcdir)/config/rs6000/eabi.S
+
+# We build {e,n}crti.o and {e,n}crtn.o, which serve to add begin and
+# end labels to all of the special sections used when we link using gcc.
+
+# Assemble startup files.
+ecrti$(objext): $(srcdir)/config/rs6000/eabi-ci.S
+	$(crt_compile) -c $<
+
+ecrtn$(objext): $(srcdir)/config/rs6000/eabi-cn.S
+	$(crt_compile) -c $<
+
+ncrti$(objext): $(srcdir)/config/rs6000/sol-ci.S
+	$(crt_compile) -c $<
+
+ncrtn$(objext): $(srcdir)/config/rs6000/sol-cn.S
+	$(crt_compile) -c $<
diff --git a/gcc-4.9/libgcc/config/rs6000/t-savresfgpr b/gcc-4.9/libgcc/config/rs6000/t-savresfgpr
new file mode 100644
index 000000000..a8455ae1a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-savresfgpr
@@ -0,0 +1,23 @@
+# These can't end up in shared libgcc
+LIB2ADD_ST += \
+	   $(srcdir)/config/rs6000/crtsavfpr.S \
+	   $(srcdir)/config/rs6000/crtresfpr.S \
+	   $(srcdir)/config/rs6000/crtsavgpr.S \
+	   $(srcdir)/config/rs6000/crtresgpr.S \
+	   $(srcdir)/config/rs6000/crtresxfpr.S \
+	   $(srcdir)/config/rs6000/crtresxgpr.S \
+	   $(srcdir)/config/rs6000/crtsavevr.S \
+	   $(srcdir)/config/rs6000/crtrestvr.S \
+	   $(srcdir)/config/rs6000/e500crtres32gpr.S \
+	   $(srcdir)/config/rs6000/e500crtres64gpr.S \
+	   $(srcdir)/config/rs6000/e500crtres64gprctr.S \
+	   $(srcdir)/config/rs6000/e500crtrest32gpr.S \
+	   $(srcdir)/config/rs6000/e500crtrest64gpr.S \
+	   $(srcdir)/config/rs6000/e500crtresx32gpr.S \
+	   $(srcdir)/config/rs6000/e500crtresx64gpr.S \
+	   $(srcdir)/config/rs6000/e500crtsav32gpr.S \
+	   $(srcdir)/config/rs6000/e500crtsav64gpr.S \
+	   $(srcdir)/config/rs6000/e500crtsav64gprctr.S \
+	   $(srcdir)/config/rs6000/e500crtsavg32gpr.S \
+	   $(srcdir)/config/rs6000/e500crtsavg64gpr.S \
+	   $(srcdir)/config/rs6000/e500crtsavg64gprctr.S
diff --git a/gcc-4.9/libgcc/config/rs6000/t-slibgcc-aix b/gcc-4.9/libgcc/config/rs6000/t-slibgcc-aix
new file mode 100644
index 000000000..288c2c9a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/t-slibgcc-aix
@@ -0,0 +1,43 @@
+# Copyright (C) 2002-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build a shared libgcc library.
+SHLIB_EXT = .a
+SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
+	-Wl,-bE:@shlib_map_file@ -o @multilib_dir@/shr.o \
+	@multilib_flags@ @shlib_objs@ -lc \
+	`case @multilib_dir@ in \
+	*pthread*) echo -L$(TARGET_SYSTEM_ROOT)/usr/lib/threads -lpthreads -lc_r $(TARGET_SYSTEM_ROOT)/usr/lib/libc.a ;; \
+	*) echo -lc ;; esac` ; \
+	rm -f @multilib_dir@/tmp-@shlib_base_name@.a ; \
+	$(AR_CREATE_FOR_TARGET) @multilib_dir@/tmp-@shlib_base_name@.a \
+	@multilib_dir@/shr.o ; \
+	mv @multilib_dir@/tmp-@shlib_base_name@.a \
+	   @multilib_dir@/@shlib_base_name@.a ; \
+	rm -f @multilib_dir@/shr.o
+SHLIB_INSTALL = \
+	$(mkinstalldirs) $(DESTDIR)$(slibdir)@shlib_slibdir_qual@; \
+	$(INSTALL_DATA) @multilib_dir@/@shlib_base_name@.a \
+		$(DESTDIR)$(slibdir)@shlib_slibdir_qual@/
+SHLIB_LIBS = -lc `case @multilib_dir@ in *pthread*) echo -lpthread ;; esac`
+SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk
+SHLIB_MAPFILES = libgcc-std.ver
+SHLIB_NM_FLAGS = -Bpg -X32_64
+
+# Either 32-bit and 64-bit objects in archives.
+AR_FLAGS_FOR_TARGET = -X32_64
diff --git a/gcc-4.9/libgcc/config/rs6000/tramp.S b/gcc-4.9/libgcc/config/rs6000/tramp.S
new file mode 100644
index 000000000..6f435b5d8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rs6000/tramp.S
@@ -0,0 +1,185 @@
+/*  Special support for trampolines
+ *
+ *   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+ *   Written By Michael Meissner
+ * 
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */ 
+
+/* Set up trampolines.  */
+
+	.section ".text"
+#include "ppc-asm.h"
+#include "config.h"
+
+#ifndef __powerpc64__
+	.type	trampoline_initial,@object
+	.align	2
+trampoline_initial:
+	mflr	r0
+	bcl	20,31,1f
+.Lfunc = .-trampoline_initial
+	.long	0			/* will be replaced with function address */
+.Lchain = .-trampoline_initial
+	.long	0			/* will be replaced with static chain */
+1:	mflr	r11
+	mtlr	r0
+	lwz	r0,0(r11)		/* function address */
+	lwz	r11,4(r11)		/* static chain */
+	mtctr	r0
+	bctr
+
+trampoline_size = .-trampoline_initial
+	.size	trampoline_initial,trampoline_size
+
+
+/* R3 = stack address to store trampoline */
+/* R4 = length of trampoline area */
+/* R5 = function address */
+/* R6 = static chain */
+
+FUNC_START(__trampoline_setup)
+	mflr	r0		/* save return address */
+        bcl	20,31,.LCF0	/* load up __trampoline_initial into r7 */
+.LCF0:
+        mflr	r11
+        addi	r7,r11,trampoline_initial-4-.LCF0 /* trampoline address -4 */
+
+	li	r8,trampoline_size	/* verify that the trampoline is big enough */
+	cmpw	cr1,r8,r4
+	srwi	r4,r4,2		/* # words to move */
+	addi	r9,r3,-4	/* adjust pointer for lwzu */
+	mtctr	r4
+	blt	cr1,.Labort
+
+	mtlr	r0
+
+	/* Copy the instructions to the stack */
+.Lmove:
+	lwzu	r10,4(r7)
+	stwu	r10,4(r9)
+	bdnz	.Lmove
+
+	/* Store correct function and static chain */
+	stw	r5,.Lfunc(r3)
+	stw	r6,.Lchain(r3)
+
+	/* Now flush both caches */
+	mtctr	r4
+.Lcache:
+	icbi	0,r3
+	dcbf	0,r3
+	addi	r3,r3,4
+	bdnz	.Lcache
+
+	/* Finally synchronize things & return */
+	sync
+	isync
+	blr
+
+.Labort:
+/* Use a longcall sequence in the non PIC case on VxWorks, to prevent
+   possible relocation errors if this is module-loaded very far away from
+   the 'abort' entry point.  */
+#if defined (__VXWORKS__) && ! (defined __PIC__ || defined __pic__)
+        lis   r11,JUMP_TARGET(abort)@ha
+        addic r11,r11,JUMP_TARGET(abort)@l
+        mtlr  r11
+        blrl
+#else
+
+#if (defined __PIC__ || defined __pic__) && defined HAVE_AS_REL16
+	bcl	20,31,1f
+1:	mflr	r30
+	addis	r30,r30,_GLOBAL_OFFSET_TABLE_-1b@ha
+	addi	r30,r30,_GLOBAL_OFFSET_TABLE_-1b@l
+#endif
+	bl	JUMP_TARGET(abort)
+FUNC_END(__trampoline_setup)
+
+#endif
+
+#elif _CALL_ELF == 2
+	.type	trampoline_initial,@object
+	.align	3
+trampoline_initial:
+	ld	r11,.Lchain(r12)
+	ld	r12,.Lfunc(r12)
+	mtctr	r12
+	bctr
+.Lfunc = .-trampoline_initial
+	.quad	0			/* will be replaced with function address */
+.Lchain = .-trampoline_initial
+	.quad	0			/* will be replaced with static chain */
+
+trampoline_size = .-trampoline_initial
+	.size	trampoline_initial,trampoline_size
+
+
+/* R3 = stack address to store trampoline */
+/* R4 = length of trampoline area */
+/* R5 = function address */
+/* R6 = static chain */
+
+	.pushsection ".toc","aw"
+.LC0:
+	.quad	trampoline_initial-8
+	.popsection
+
+FUNC_START(__trampoline_setup)
+	addis 7,2,.LC0@toc@ha
+	ld 7,.LC0@toc@l(7)	/* trampoline address -8 */
+
+	li	r8,trampoline_size	/* verify that the trampoline is big enough */
+	cmpw	cr1,r8,r4
+	srwi	r4,r4,3		/* # doublewords to move */
+	addi	r9,r3,-8	/* adjust pointer for stdu */
+	mtctr	r4
+	blt	cr1,.Labort
+
+	/* Copy the instructions to the stack */
+.Lmove:
+	ldu	r10,8(r7)
+	stdu	r10,8(r9)
+	bdnz	.Lmove
+
+	/* Store correct function and static chain */
+	std	r5,.Lfunc(r3)
+	std	r6,.Lchain(r3)
+
+	/* Now flush both caches */
+	mtctr	r4
+.Lcache:
+	icbi	0,r3
+	dcbf	0,r3
+	addi	r3,r3,8
+	bdnz	.Lcache
+
+	/* Finally synchronize things & return */
+	sync
+	isync
+	blr
+
+.Labort:
+	bl	JUMP_TARGET(abort)
+	nop
+FUNC_END(__trampoline_setup)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/rx/rx-abi-functions.c b/gcc-4.9/libgcc/config/rx/rx-abi-functions.c
new file mode 100644
index 000000000..fa2c17416
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rx/rx-abi-functions.c
@@ -0,0 +1,90 @@
+/* RX C ABI functions
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+
+/* The RX C ABI includes the specification of a set of compiler support
+   functions.  Libgcc2 includes some of them, although the names have to
+   be changed (see rx-abi.h), and the rest are defined here.
+
+   FIXME: Given that FINE_GRAINED_LIBRARIES is defined we ought to consider
+   compiling this file multiple times with one function per iteration being
+   compiled.  */
+
+#ifdef __RX_64BIT_DOUBLES__
+
+int _COM_CMPLTd (double a, double b) { return __ltdf2 (a, b) == -1; }
+int _COM_CMPGTd (double a, double b) { return __gtdf2 (a, b) == 1; }
+int _COM_CMPLEd (double a, double b) { return __ledf2 (a, b) != 1; }
+int _COM_CMPGEd (double a, double b) { return __gedf2 (a, b) != -1; }
+int _COM_CMPEQd (double a, double b) { return __eqdf2 (a, b) == 0; }
+int _COM_CMPNEd (double a, double b) { return __nedf2 (a, b) != 0; }
+
+int _COM_CMPLTf (double, double) __attribute__ ((weak, alias ("_COM_CMPLTd")));
+int _COM_CMPGTf (double, double) __attribute__ ((weak, alias ("_COM_CMPGTd")));
+int _COM_CMPLEf (double, double) __attribute__ ((weak, alias ("_COM_CMPLEd")));
+int _COM_CMPGEf (double, double) __attribute__ ((weak, alias ("_COM_CMPGEd")));
+int _COM_CMPEQf (double, double) __attribute__ ((weak, alias ("_COM_CMPEQd")));
+int _COM_CMPNEf (double, double) __attribute__ ((weak, alias ("_COM_CMPNEd")));
+
+#else /* 32-bit doubles.  */
+
+double _COM_CONVfd (float a) { return a; }
+float  _COM_CONVdf (double a) { return a; }
+
+int _COM_CMPLTd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPLTf")));
+int _COM_CMPGTd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPGTf")));
+int _COM_CMPLEd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPLEf")));
+int _COM_CMPGEd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPGEf")));
+int _COM_CMPEQd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPEQf")));
+int _COM_CMPNEd (double a, double b) __attribute__ ((weak, alias ("_COM_CMPNEf")));
+
+signed long long   _COM_CONVd64s (double a) { return (signed long long) a; }
+unsigned long long _COM_CONVd64u (double a)  { return (unsigned long long) a; }
+
+int _COM_CMPLTf (float a, float b) { return __ltsf2 (a, b) == -1; }
+int _COM_CMPGTf (float a, float b) { return __gtsf2 (a, b) == 1; }
+int _COM_CMPLEf (float a, float b) { return __lesf2 (a, b) != 1; }
+int _COM_CMPGEf (float a, float b) { return __gesf2 (a, b) != -1; }
+int _COM_CMPEQf (float a, float b) { return __eqsf2 (a, b) == 0; }
+int _COM_CMPNEf (float a, float b) { return __nesf2 (a, b) != 0; }
+
+#endif /* 64-bit vs 32-bit doubles.  */
+
+double _COM_CONV64sd (signed long long a)   { return (double) a; }
+double _COM_CONV64ud (unsigned long long a) { return (double) a; }
+
+extern int __cmpdi2 (long long, long long);
+extern int __ucmpdi2 (long long, long long);
+
+int _COM_CMPLT64s (long long a, long long b) { return __cmpdi2 (a, b)  == 0; }
+int _COM_CMPLT64u (long long a, long long b) { return __ucmpdi2 (a, b) == 0; }
+int _COM_CMPGT64s (long long a, long long b) { return __cmpdi2 (a, b)  == 2; }
+int _COM_CMPGT64u (long long a, long long b) { return __ucmpdi2 (a, b) == 2; }
+int _COM_CMPLE64s (long long a, long long b) { return __cmpdi2 (a, b)  != 2; }
+int _COM_CMPLE64u (long long a, long long b) { return __ucmpdi2 (a, b) != 2; }
+int _COM_CMPGE64s (long long a, long long b) { return __cmpdi2 (a, b)  != 0; }
+int _COM_CMPGE64u (long long a, long long b) { return __ucmpdi2 (a, b) != 0; }
+int _COM_CMPEQ64  (long long a, long long b) { return __cmpdi2 (a, b)  == 1; }
+int _COM_CMPNE64  (long long a, long long b) { return __cmpdi2 (a, b)  != 1; }
+
diff --git a/gcc-4.9/libgcc/config/rx/rx-abi.h b/gcc-4.9/libgcc/config/rx/rx-abi.h
new file mode 100644
index 000000000..fda152340
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rx/rx-abi.h
@@ -0,0 +1,233 @@
+/* Header file for RX ABI versions of libgcc functions.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   Contributed by Red Hat.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Make __COM_<RX_NAME> an alias for __<GCC_NAME>.  */
+#define RENAME_LIBRARY(GCC_NAME, RX_NAME)		\
+  __asm__ (".globl\t__COM_" #RX_NAME "\n"		\
+	   ".set\t__COM_" #RX_NAME ", ___" #GCC_NAME "\n");
+
+
+/* The long-long aliases...  */
+
+#ifdef L_muldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, MUL64)
+#endif
+
+#ifdef L_divdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divdi3, DIV64s)
+#endif
+
+#ifdef L_udivdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (udivdi3, DIV64u)
+#endif
+
+#ifdef L_ashldi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashldi3, SHLL64)
+#endif
+
+#ifdef L_lshrdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (lshrdi3, SHLR64)
+#endif
+
+#ifdef L_ashrdi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (ashrdi3, SHAR64)
+#endif
+
+#ifdef L_fixsfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, CONVf64s)
+#endif
+
+#ifdef L_fixunssfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, CONVf64u)
+#endif
+
+#ifdef L_floatdisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, CONV64sf)
+#endif
+
+#ifdef L_floatundisf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatundisf, CONV64uf)
+#endif
+
+#ifdef L_moddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (moddi3, MOD64s)
+#endif
+
+#ifdef L_umoddi3
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (umoddi3, MOD64u)
+#endif
+
+
+
+#ifdef __RX_64BIT_DOUBLES__
+
+/* Float (32-bit) aliases...  */
+
+#ifdef L_sf_to_si
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfsi, CONVf32s)
+#endif
+
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfsi, CONVf32u)
+#endif
+
+#ifdef L_addsub_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (addsf3, ADDf) \
+  RENAME_LIBRARY (subsf3, SUBf)
+#endif
+
+#ifdef L_mul_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (mulsf3, MULf)
+#endif
+
+#ifdef L_div_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divsf3, DIVf)
+#endif
+
+/* Double (64-bit) aliases...  */
+
+#ifdef L_addsub_df
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (adddf3, ADDd) \
+  RENAME_LIBRARY (subdf3, SUBd)
+#endif
+
+#ifdef L_mul_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldf3, MULd)
+#endif
+
+#ifdef L_div_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (divdf3, DIVd)
+#endif
+
+#ifdef L_fixdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, CONVd64s)
+#endif
+
+#ifdef L_fixunsdfdi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, CONVd64u)
+#endif
+
+#ifdef L_floatdidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, CONV64sd)
+#endif
+
+#ifdef L_floatundidf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdisf, CONV64ud)
+#endif
+
+#ifdef L_df_to_si
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfsi, CONVd32s)
+#endif
+
+#ifdef L_fixunsdfsi
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfsi, CONVd32u)
+#endif
+
+#ifdef L_si_to_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatsidf, CONV32sd)
+#endif
+
+#ifdef L_usi_to_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatunsidf, CONV32ud)
+#endif
+
+#ifdef L_sf_to_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (extendsfdf2, CONVfd)
+#endif
+
+#ifdef L_df_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (truncdfsf2, CONVdf)
+#endif
+
+#ifdef L_negate_df
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (negdf2, NEGd)
+#endif
+
+#ifdef L_si_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatsisf, CONV32sf)
+#endif
+
+#ifdef L_usi_to_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatunsisf, CONV32uf)
+#endif
+
+/* The 64-bit comparison functions do not have aliases because libgcc2
+   does not provide them.  Instead they have to be supplied in
+   rx-abi-functions.c.  */
+
+
+#else /* 32-bit doubles.  */
+
+
+#ifdef L_addsub_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (addsf3, ADDd) \
+  RENAME_LIBRARY (subsf3, SUBd) \
+  RENAME_LIBRARY (addsf3, ADDf) \
+  RENAME_LIBRARY (subsf3, SUBf)
+#endif
+
+#ifdef L_mul_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (mulsf3, MULd) \
+  RENAME_LIBRARY (mulsf3, MULf)
+#endif
+
+#ifdef L_div_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (divsf3, DIVd) \
+  RENAME_LIBRARY (divsf3, DIVf)
+#endif
+
+#ifdef L_sf_to_si
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (fixsfsi, CONVd32s) \
+  RENAME_LIBRARY (fixsfsi, CONVf32s)
+#endif
+
+#ifdef L_fixunssfsi
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (fixunssfsi, CONVd32u) \
+  RENAME_LIBRARY (fixunssfsi, CONVf32u)
+#endif
+
+#ifdef L_si_to_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (floatsisf, CONV32sd) \
+  RENAME_LIBRARY (floatsisf, CONV32sf)
+#endif
+
+#ifdef L_usi_to_sf
+#define DECLARE_LIBRARY_RENAMES \
+  RENAME_LIBRARY (floatunsisf, CONV32ud) \
+  RENAME_LIBRARY (floatunsisf, CONV32uf)
+#endif
+
+#ifdef L_negate_sf
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (negsf2, NEGd)
+#endif
+
+#endif /* 64-bit vs 32-bit doubles.  */
diff --git a/gcc-4.9/libgcc/config/rx/rx-lib.h b/gcc-4.9/libgcc/config/rx/rx-lib.h
new file mode 100644
index 000000000..c83516fd6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rx/rx-lib.h
@@ -0,0 +1,5 @@
+#ifndef __RX_64BIT_DOUBLES__
+#define DF SF
+#define FLOAT_ONLY
+#endif
+
diff --git a/gcc-4.9/libgcc/config/rx/t-rx b/gcc-4.9/libgcc/config/rx/t-rx
new file mode 100644
index 000000000..be7741c96
--- /dev/null
+++ b/gcc-4.9/libgcc/config/rx/t-rx
@@ -0,0 +1,34 @@
+# Makefile fragment for building LIBGCC for the Renesas RX target.
+# Copyright (C) 2008-2014 Free Software Foundation, Inc.
+# Contributed by Red Hat.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+
+# Add functions required by the RX ABI which are not part of
+# the normal libgcc sources:
+
+LIB2ADD = $(srcdir)/config/rx/rx-abi-functions.c
+
+
+# We need special handling of the floating point conversion
+# routines, to allow for the varying size of a double:
+
+FPBIT = true
+ifeq ($(double_type_size),64)
+DPBIT = true
+endif
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixdfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixdfdi.c
new file mode 100644
index 000000000..e6dd4d114
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixdfdi.c
@@ -0,0 +1,113 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)
+#define EXPONENT_BIAS	1023
+#define MANTISSA_BITS   52
+#define PRECISION       (MANTISSA_BITS + 1)
+#define SIGNBIT		0x80000000
+#define SIGN(fp)	((fp.l.upper) & SIGNBIT)
+#define MANTD_LL(fp)	((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL)
+#define FRACD_LL(fp)	(fp.ll & (HIDDEND_LL-1))
+#define HIDDEND_LL	((UDItype_x)1 << MANTISSA_BITS)
+#define LLONG_MAX       9223372036854775807LL
+#define LLONG_MIN       (-LLONG_MAX - 1LL)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union double_long {
+    double d;
+    struct {
+      SItype_x upper;
+      USItype_x lower;
+    } l;
+    UDItype_x ll;
+};
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+DItype_x __fixdfdi (double a1);
+
+/* convert double to int */
+DItype_x
+__fixdfdi (double a1)
+{
+    register union double_long dl1;
+    register int exp;
+    register DItype_x l;
+
+    dl1.d = a1;
+
+    /* +/- 0, denormalized */
+    if (!EXPD (dl1))
+      return 0;
+
+    /* The exponent - considered the binary point at the right end of
+       the mantissa.  */
+    exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1 */
+    if (exp <= -PRECISION)
+      return 0;
+
+    /* NaN */
+
+    if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0x8000000000000000ULL;
+      }
+
+    /* Number big number & +/- inf */
+    if (exp >= 11) {
+      /* Don't throw an exception for -1p+63  */
+      if (!SIGN (dl1) || exp > 11 || FRACD_LL (dl1) != 0)
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+      return SIGN (dl1) ? LLONG_MIN : LLONG_MAX;
+    }
+
+    l = MANTD_LL(dl1);
+
+    /* shift down until exp < 12 or l = 0 */
+    if (exp > 0)
+      l <<= exp;
+    else
+      l >>= -exp;
+
+    return (SIGN (dl1) ? -l : l);
+}
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixsfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixsfdi.c
new file mode 100644
index 000000000..99f91a705
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixsfdi.c
@@ -0,0 +1,107 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPONENT_BIAS   127
+#define MANTISSA_BITS   23
+#define EXP(fp)         (((fp.l) >> MANTISSA_BITS) & 0xFF)
+#define PRECISION       (MANTISSA_BITS + 1)
+#define SIGNBIT         0x80000000
+#define SIGN(fp)        ((fp.l) & SIGNBIT)
+#define HIDDEN          (1 << MANTISSA_BITS)
+#define MANT(fp)        (((fp.l) & 0x7FFFFF) | HIDDEN)
+#define FRAC(fp)        ((fp.l) & 0x7FFFFF)
+#define LLONG_MAX       9223372036854775807LL
+#define LLONG_MIN       (-LLONG_MAX - 1LL)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union float_long
+  {
+    float f;
+    USItype_x l;
+  };
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+DItype_x __fixsfdi (float a1);
+
+/* convert double to int */
+DItype_x
+__fixsfdi (float a1)
+{
+    register union float_long fl1;
+    register int exp;
+    register DItype_x l;
+
+    fl1.f = a1;
+
+    /* +/- 0, denormalized */
+    if (!EXP (fl1))
+      return 0;
+
+    exp = EXP (fl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1 */
+    if (exp <= -PRECISION)
+      return 0;
+
+    /* NaN */
+
+    if ((EXP (fl1) == 0xff) && (FRAC (fl1) != 0)) /* NaN */
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0x8000000000000000ULL;
+      }
+
+    /* Number big number & +/- inf */
+    if (exp >= 40) {      
+      /* Don't throw an exception for -1p+63  */
+      if (!SIGN (fl1) || exp > 40 || FRAC (fl1) != 0)
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+      return SIGN (fl1) ? LLONG_MIN : LLONG_MAX;
+    }
+
+    l = MANT (fl1);
+
+    if (exp > 0)
+      l <<= exp;
+    else
+      l >>= -exp;
+
+    return (SIGN (fl1) ? -l : l);
+}
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixtfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixtfdi.c
new file mode 100644
index 000000000..de84972a2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixtfdi.c
@@ -0,0 +1,122 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPD(fp)	   (((fp.l.i[0]) >> 16) & 0x7FFF)
+#define EXPONENT_BIAS	   16383
+#define MANTISSA_BITS      112
+#define PRECISION          (MANTISSA_BITS + 1)
+#define SIGNBIT		   0x80000000
+#define SIGN(fp)	   ((fp.l.i[0]) & SIGNBIT)
+#define MANTD_HIGH_LL(fp)  ((fp.ll[0] & HIGH_LL_FRAC_MASK) | HIGH_LL_UNIT_BIT)
+#define MANTD_LOW_LL(fp)   (fp.ll[1])
+#define FRACD_ZERO_P(fp)   (!fp.ll[1] && !(fp.ll[0] & HIGH_LL_FRAC_MASK))
+#define HIGH_LL_FRAC_BITS  48
+#define HIGH_LL_UNIT_BIT   ((UDItype_x)1 << HIGH_LL_FRAC_BITS)
+#define HIGH_LL_FRAC_MASK  (HIGH_LL_UNIT_BIT - 1)
+#define LLONG_MAX       9223372036854775807LL
+#define LLONG_MIN       (-LLONG_MAX - 1LL)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union double_long {
+  long double d;
+  struct {
+      SItype_x i[4]; /* 32 bit parts: 0 upper ... 3 lowest */
+    } l;
+  UDItype_x ll[2];   /* 64 bit parts: 0 upper, 1 lower */
+};
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+DItype_x __fixtfdi (long double a1);
+
+/* convert double to unsigned int */
+DItype_x
+__fixtfdi (long double a1)
+{
+    register union double_long dl1;
+    register int exp;
+    register UDItype_x l;
+
+    dl1.d = a1;
+
+    /* +/- 0, denormalized */
+    if (!EXPD (dl1))
+      return 0;
+
+    /* The exponent - considered the binary point at the right end of
+       the mantissa.  */
+    exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1: If the mantissa would need to be right-shifted more bits than
+       its size the result would be zero.  */
+    if (exp <= -PRECISION)
+      return 0;
+
+    /* NaN: All exponent bits set and a nonzero fraction.  */
+    if ((EXPD(dl1) == 0x7fff) && !FRACD_ZERO_P (dl1))
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0x8000000000000000ULL;
+      }
+
+    /* One extra bit is needed for the unit bit which is appended by
+       MANTD_HIGH_LL on the left of the matissa.  */
+    exp += HIGH_LL_FRAC_BITS + 1;
+
+    /* If the result would still need a left shift it will be too large
+       to be represented.  Compared to the unsigned variant we have to
+       take care that there is still space for the sign bit to be
+       applied.  So we can only go on if there is a right-shift by one
+       or more.  */
+    if (exp >= 0)
+      {
+	/* Don't throw an exception for -1p+63  */
+	if (!SIGN (dl1)
+	    || exp > 0
+	    || MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
+	    || (dl1.ll[0] & HIGH_LL_FRAC_MASK))
+	  /* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	  fexceptdiv (0.0, 0.0);
+	return SIGN (dl1) ? LLONG_MIN : LLONG_MAX;
+      }
+
+    l = MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
+        | MANTD_HIGH_LL (dl1) << (64 - (HIGH_LL_FRAC_BITS + 1));
+
+    return SIGN (dl1) ? -(l >> -exp) : l >> -exp;
+}
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixunsdfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixunsdfdi.c
new file mode 100644
index 000000000..0a249611a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixunsdfdi.c
@@ -0,0 +1,120 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPD(fp)	(((fp.l.upper) >> 20) & 0x7FF)
+#define EXPONENT_BIAS	1023
+#define MANTISSA_BITS   52
+#define PRECISION       (MANTISSA_BITS + 1)
+#define SIGNBIT		0x80000000
+#define SIGN(fp)	((fp.l.upper) & SIGNBIT)
+#define MANTD_LL(fp)	((fp.ll & (HIDDEND_LL-1)) | HIDDEND_LL)
+#define FRACD_LL(fp)	(fp.ll & (HIDDEND_LL-1))
+#define HIDDEND_LL	((UDItype_x)1 << 52)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union double_long {
+    double d;
+    struct {
+      SItype_x upper;
+      USItype_x lower;
+    } l;
+    UDItype_x ll;
+};
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+UDItype_x __fixunsdfdi (double a1);
+
+/* convert double to unsigned int */
+UDItype_x
+__fixunsdfdi (double a1)
+{
+    register union double_long dl1;
+    register int exp;
+    register UDItype_x l;
+
+    dl1.d = a1;
+
+    /* +/- 0, denormalized  */
+    if (!EXPD (dl1))
+      return 0;
+
+    /* Negative.  */
+    if (SIGN (dl1))
+      { 
+	/* Value is <= -1.0
+	   C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	if (EXPD (dl1) >= EXPONENT_BIAS)
+	  fexceptdiv (0.0, 0.0);
+	return 0;
+      }
+
+    exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1 */
+
+    if (exp < -PRECISION)
+      return 0;
+
+    /* NaN */
+
+    if ((EXPD(dl1) == 0x7ff) && (FRACD_LL(dl1) != 0)) /* NaN */
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0x0ULL;
+      }
+
+    /* Number big number & + inf */
+
+    if (exp >= 12)
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0xFFFFFFFFFFFFFFFFULL;
+      }
+
+    l = MANTD_LL(dl1);
+
+    /* shift down until exp < 12 or l = 0 */
+    if (exp > 0)
+      l <<= exp;
+    else
+      l >>= -exp;
+
+    return l;
+}
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixunssfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixunssfdi.c
new file mode 100644
index 000000000..7aeed28a0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixunssfdi.c
@@ -0,0 +1,114 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPONENT_BIAS   127
+#define MANTISSA_BITS   23
+#define EXP(fp)         (((fp.l) >> MANTISSA_BITS) & 0xFF)
+#define SIGNBIT         0x80000000
+#define SIGN(fp)        ((fp.l) & SIGNBIT)
+#define HIDDEN          (1 << MANTISSA_BITS)
+#define MANT(fp)        (((fp.l) & 0x7FFFFF) | HIDDEN)
+#define FRAC(fp)        ((fp.l) & 0x7FFFFF)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union float_long
+  {
+    float f;
+    USItype_x l;
+  };
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+UDItype_x __fixunssfdi (float a1);
+
+/* convert float to unsigned int */
+UDItype_x
+__fixunssfdi (float a1)
+{
+    register union float_long fl1;
+    register int exp;
+    register UDItype_x l;
+
+    fl1.f = a1;
+
+    /* +/- 0, denormalized  */
+    if (!EXP (fl1))
+      return 0;
+
+    /* Negative.  */
+    if (SIGN (fl1))
+      { 
+	/* Value is <= -1.0
+	   C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	if (EXP (fl1) >= EXPONENT_BIAS)
+	  fexceptdiv (0.0, 0.0);
+	return 0;
+      }
+
+    exp = EXP (fl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1 */
+    if (exp < -24)
+      return 0;
+
+    /* NaN */
+
+    if ((EXP (fl1) == 0xff) && (FRAC (fl1) != 0)) /* NaN */
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);	
+	return 0x0ULL;
+      }
+
+    /* Number big number & + inf */
+
+    if (exp >= 41)
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0xFFFFFFFFFFFFFFFFULL;
+      }
+
+    l = MANT (fl1);
+
+    if (exp > 0)
+      l <<= exp;
+    else
+      l >>= -exp;
+
+    return l;
+}
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/_fixunstfdi.c b/gcc-4.9/libgcc/config/s390/32/_fixunstfdi.c
new file mode 100644
index 000000000..2f90a5f2f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/_fixunstfdi.c
@@ -0,0 +1,125 @@
+/* Definitions of target machine for GNU compiler, for IBM S/390
+   Copyright (C) 1999-2014 Free Software Foundation, Inc.
+   Contributed by Hartmut Penner (hpenner@de.ibm.com) and
+                  Ulrich Weigand (uweigand@de.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __s390x__
+
+#define EXPD(fp)	   (((fp.l.i[0]) >> 16) & 0x7FFF)
+#define EXPONENT_BIAS	   16383
+#define MANTISSA_BITS      112
+#define PRECISION          (MANTISSA_BITS + 1)
+#define SIGNBIT		   0x80000000
+#define SIGND(fp)	   ((fp.l.i[0]) & SIGNBIT)
+#define MANTD_HIGH_LL(fp)  ((fp.ll[0] & HIGH_LL_FRAC_MASK) | HIGH_LL_UNIT_BIT)
+#define MANTD_LOW_LL(fp)   (fp.ll[1])
+#define FRACD_ZERO_P(fp)   (!fp.ll[1] && !(fp.ll[0] & HIGH_LL_FRAC_MASK))
+#define HIGH_LL_FRAC_BITS  48
+#define HIGH_LL_UNIT_BIT   ((UDItype_x)1 << HIGH_LL_FRAC_BITS)
+#define HIGH_LL_FRAC_MASK  (HIGH_LL_UNIT_BIT - 1)
+
+typedef int DItype_x __attribute__ ((mode (DI)));
+typedef unsigned int UDItype_x __attribute__ ((mode (DI)));
+typedef int SItype_x __attribute__ ((mode (SI)));
+typedef unsigned int USItype_x __attribute__ ((mode (SI)));
+
+union double_long {
+  long double d;
+  struct {
+      SItype_x i[4]; /* 32 bit parts: 0 upper ... 3 lowest */
+    } l;
+  UDItype_x ll[2];   /* 64 bit parts: 0 upper, 1 lower */
+};
+
+static __inline__ void
+fexceptdiv (float d, float e)
+{
+  __asm__ __volatile__ ("debr %0,%1" : : "f" (d), "f" (e) );
+}
+
+UDItype_x __fixunstfdi (long double a1);
+
+/* convert double to unsigned int */
+UDItype_x
+__fixunstfdi (long double a1)
+{
+    register union double_long dl1;
+    register int exp;
+    register UDItype_x l;
+
+    dl1.d = a1;
+
+    /* +/- 0, denormalized */
+    if (!EXPD (dl1))
+      return 0;
+
+    /* Negative.  */
+    if (SIGND (dl1))
+      {
+	/* Value is <= -1.0
+	   C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	if (EXPD (dl1) >= EXPONENT_BIAS)
+	  fexceptdiv (0.0, 0.0);
+	return 0;
+      }
+
+    /* The exponent - considered the binary point at the right end of
+       the mantissa.  */
+    exp = EXPD (dl1) - EXPONENT_BIAS - MANTISSA_BITS;
+
+    /* number < 1: If the mantissa would need to be right-shifted more bits than
+       its size (plus the implied one bit on the left) the result would be
+       zero.  */
+    if (exp <= -PRECISION)
+      return 0;
+
+    /* NaN: All exponent bits set and a nonzero fraction.  */
+    if ((EXPD(dl1) == 0x7fff) && !FRACD_ZERO_P (dl1))
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0;
+      }
+
+    /* One extra bit is needed for the unit bit which is appended by
+       MANTD_HIGH_LL on the left of the matissa.  */
+    exp += HIGH_LL_FRAC_BITS + 1;
+
+    /* If the result would still need a left shift it will be too
+       large to be represented.  Infinities have all exponent bits set
+       and will end up here as well.  */
+    if (exp > 0)
+      {
+	/* C99 Annex F.4 requires an "invalid" exception to be thrown.  */
+	fexceptdiv (0.0, 0.0);
+	return 0xFFFFFFFFFFFFFFFFULL;
+      }
+
+    l = MANTD_LOW_LL (dl1) >> (HIGH_LL_FRAC_BITS + 1)
+        | MANTD_HIGH_LL (dl1) << (64 - (HIGH_LL_FRAC_BITS + 1));
+
+    return l >> -exp;
+}
+
+#endif /* !__s390x__ */
diff --git a/gcc-4.9/libgcc/config/s390/32/t-floattodi b/gcc-4.9/libgcc/config/s390/32/t-floattodi
new file mode 100644
index 000000000..4bd87b1f8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/32/t-floattodi
@@ -0,0 +1,5 @@
+floattodi-functions = _fixsfdi _fixdfdi _fixtfdi _fixunssfdi _fixunsdfdi _fixunstfdi
+LIB2FUNCS_EXCLUDE += $(floattodi-functions)
+
+floattodi-src = $(addsuffix .c, $(floattodi-functions))
+LIB2ADD = $(addprefix $(srcdir)/config/s390/32/, $(floattodi-src))
diff --git a/gcc-4.9/libgcc/config/s390/gthr-tpf.h b/gcc-4.9/libgcc/config/s390/gthr-tpf.h
new file mode 100644
index 000000000..95d87db34
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/gthr-tpf.h
@@ -0,0 +1,234 @@
+/* Threads compatibility routines for libgcc2 and libobjc.
+   Compile this one with gcc.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* TPF needs its own version of gthr-*.h because TPF always links to
+   the thread library.  However, for performance reasons we still do not
+   want to issue thread api calls unless a check is made to see that we
+   are running as a thread.  */
+
+#ifndef GCC_GTHR_TPF_H
+#define GCC_GTHR_TPF_H
+
+/* POSIX threads specific definitions.
+   Easy, since the interface is just one-to-one mapping.  */
+
+#define __GTHREADS 1
+
+/* Some implementations of <pthread.h> require this to be defined.  */
+#ifndef _REENTRANT
+#define _REENTRANT 1
+#endif
+
+#include <pthread.h>
+#include <unistd.h>
+
+typedef pthread_key_t __gthread_key_t;
+typedef pthread_once_t __gthread_once_t;
+typedef pthread_mutex_t __gthread_mutex_t;
+typedef pthread_mutex_t __gthread_recursive_mutex_t;
+
+#if defined(PTHREAD_RECURSIVE_MUTEX_INITIALIZER)
+#define __GTHREAD_RECURSIVE_MUTEX_INIT PTHREAD_RECURSIVE_MUTEX_INITIALIZER
+#elif defined(PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP)
+#define __GTHREAD_RECURSIVE_MUTEX_INIT PTHREAD_RECURSIVE_MUTEX_INITIALIZER_NP
+#endif
+
+#define __GTHREAD_MUTEX_INIT PTHREAD_MUTEX_INITIALIZER
+#define __GTHREAD_ONCE_INIT PTHREAD_ONCE_INIT
+#define __GTHREAD_RECURSIVE_MUTEX_INIT_FUNCTION __gthread_recursive_mutex_init_function
+
+#define NOTATHREAD   00
+#define ECBBASEPTR (unsigned long int) *(unsigned int *)0x00000514u
+#define ECBPG2PTR  ECBBASEPTR + 0x1000
+#define CE2THRCPTR *((unsigned char *)(ECBPG2PTR + 16))
+#define __tpf_pthread_active() (CE2THRCPTR != NOTATHREAD)
+
+#if SUPPORTS_WEAK && GTHREAD_USE_WEAK
+# define __gthrw(name) \
+  static __typeof(name) __gthrw_ ## name __attribute__ ((__weakref__(#name)));
+# define __gthrw_(name) __gthrw_ ## name
+#else
+# define __gthrw(name)
+# define __gthrw_(name) name
+#endif
+
+__gthrw(pthread_once)
+__gthrw(pthread_key_create)
+__gthrw(pthread_key_delete)
+__gthrw(pthread_getspecific)
+__gthrw(pthread_setspecific)
+__gthrw(pthread_create)
+
+__gthrw(pthread_mutex_lock)
+__gthrw(pthread_mutex_trylock)
+__gthrw(pthread_mutex_unlock)
+__gthrw(pthread_mutexattr_init)
+__gthrw(pthread_mutexattr_settype)
+__gthrw(pthread_mutexattr_destroy)
+__gthrw(pthread_mutex_init)
+__gthrw(pthread_mutex_destroy)
+
+static inline int
+__gthread_active_p (void)
+{
+  return 1;
+}
+
+static inline int
+__gthread_once (__gthread_once_t *__once, void (*__func) (void))
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_once) (__once, __func);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_key_create (__gthread_key_t *__key, void (*__dtor) (void *))
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_key_create) (__key, __dtor);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_key_delete (__gthread_key_t __key)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_key_delete) (__key);
+  else
+    return -1;
+}
+
+static inline void *
+__gthread_getspecific (__gthread_key_t __key)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_getspecific) (__key);
+  else
+    return NULL;
+}
+
+static inline int
+__gthread_setspecific (__gthread_key_t __key, const void *__ptr)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_setspecific) (__key, __ptr);
+  else
+    return -1;
+}
+
+static inline int
+__gthread_mutex_destroy (__gthread_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_mutex_destroy) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_lock (__gthread_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_mutex_lock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_trylock (__gthread_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_mutex_trylock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_mutex_unlock (__gthread_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthrw_(pthread_mutex_unlock) (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_lock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthread_mutex_lock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_trylock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthread_mutex_trylock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_unlock (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    return __gthread_mutex_unlock (__mutex);
+  else
+    return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_init_function (__gthread_recursive_mutex_t *__mutex)
+{
+  if (__tpf_pthread_active ())
+    {
+      pthread_mutexattr_t __attr;
+      int __r;
+
+      __r = __gthrw_(pthread_mutexattr_init) (&__attr);
+      if (!__r)
+	__r = __gthrw_(pthread_mutexattr_settype) (&__attr,
+						   PTHREAD_MUTEX_RECURSIVE);
+      if (!__r)
+	__r = __gthrw_(pthread_mutex_init) (__mutex, &__attr);
+      if (!__r)
+	__r = __gthrw_(pthread_mutexattr_destroy) (&__attr);
+      return __r;
+    }
+  return 0;
+}
+
+static inline int
+__gthread_recursive_mutex_destroy (__gthread_recursive_mutex_t *__mutex)
+{
+  return __gthread_mutex_destroy (__mutex);
+}
+
+#endif /* ! GCC_GTHR_TPF_H */
diff --git a/gcc-4.9/libgcc/config/s390/libgcc-glibc.ver b/gcc-4.9/libgcc/config/s390/libgcc-glibc.ver
new file mode 100644
index 000000000..a03d2bd69
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/libgcc-glibc.ver
@@ -0,0 +1,116 @@
+# Copyright (C) 2002-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+# Note that we cannot use the default libgcc-glibc.ver file on s390x,
+# because GLIBC_2.0 does not exist on this architecture, as the first
+# ever glibc release on the platform was GLIBC_2.2.
+
+%ifndef __s390x__
+%exclude {
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.0
+GLIBC_2.0 {
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+%endif
+
+%ifdef __s390x__
+%exclude {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.2
+GLIBC_2.2 {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+%endif
+
+# With GCC 4.1.0 long double 128 bit support was introduced. The
+# following symbols coming from libgcc are enabled when -mlong-double-128
+# is specified. These lines make the symbols to get a @@GCC_4.1.0 attached.
+
+%exclude {
+  __divtc3
+  __multc3
+  __powitf2
+  __fixtfti
+  __fixunstfti
+  __floattitf
+
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+}
+
+GCC_4.1.0 {
+  __divtc3
+  __multc3
+  __powitf2
+
+%ifdef __s390x__
+  __fixtfti
+  __fixunstfti
+  __floattitf
+
+%else
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+%endif
+}
diff --git a/gcc-4.9/libgcc/config/s390/linux-unwind.h b/gcc-4.9/libgcc/config/s390/linux-unwind.h
new file mode 100644
index 000000000..d78754f75
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/linux-unwind.h
@@ -0,0 +1,132 @@
+/* DWARF2 EH unwinding support for S/390 Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR s390_fallback_frame_state
+
+static _Unwind_Reason_Code
+s390_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  static const unsigned char dwarf_to_fpr_map[16] =
+    { 0, 2, 4, 6, 1, 3, 5, 7, 8, 10, 12, 14, 9, 11, 13, 15 };
+  unsigned char *pc = context->ra;
+  long new_cfa;
+  int i;
+
+  typedef struct
+  {
+    unsigned long psw_mask;
+    unsigned long psw_addr;
+    unsigned long gprs[16];
+    unsigned int  acrs[16];
+    unsigned int  fpc;
+    unsigned int  __pad;
+    double        fprs[16];
+  } __attribute__ ((__aligned__ (8))) sigregs_;
+
+  sigregs_ *regs;
+  int *signo;
+
+  /* svc $__NR_sigreturn or svc $__NR_rt_sigreturn  */
+  if (pc[0] != 0x0a || (pc[1] != 119 && pc[1] != 173))
+    return _URC_END_OF_STACK;
+
+  /* Legacy frames:
+       old signal mask (8 bytes)
+       pointer to sigregs (8 bytes) - points always to next location
+       sigregs
+       retcode
+     This frame layout was used on kernels < 2.6.9 for non-RT frames,
+     and on kernels < 2.4.13 for RT frames as well.  Note that we need
+     to look at RA to detect this layout -- this means that if you use
+     sa_restorer to install a different signal restorer on a legacy
+     kernel, unwinding from signal frames will not work.  */
+  if (context->ra == context->cfa + 16 + sizeof (sigregs_))
+    {
+      regs = (sigregs_ *)(context->cfa + 16);
+      signo = NULL;
+    }
+
+  /* New-style RT frame:
+     retcode + alignment (8 bytes)
+     siginfo (128 bytes)
+     ucontext (contains sigregs)  */
+  else if (pc[1] == 173 /* __NR_rt_sigreturn */)
+    {
+      struct ucontext_
+      {
+	unsigned long     uc_flags;
+	struct ucontext_ *uc_link;
+	unsigned long     uc_stack[3];
+	sigregs_          uc_mcontext;
+      } *uc = context->cfa + 8 + 128;
+
+      regs = &uc->uc_mcontext;
+      signo = context->cfa + sizeof(long);
+    }
+
+  /* New-style non-RT frame:
+     old signal mask (8 bytes)
+     pointer to sigregs (followed by signal number)  */
+  else
+    {
+      regs = *(sigregs_ **)(context->cfa + 8);
+      signo = (int *)(regs + 1);
+    }
+
+  new_cfa = regs->gprs[15] + 16*sizeof(long) + 32;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 15;
+  fs->regs.cfa_offset =
+    new_cfa - (long) context->cfa + 16*sizeof(long) + 32;
+
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset =
+	(long)&regs->gprs[i] - new_cfa;
+    }
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[16+i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[16+i].loc.offset =
+	(long)&regs->fprs[dwarf_to_fpr_map[i]] - new_cfa;
+    }
+
+  /* Load return addr from PSW into dummy register 32.  */
+
+  fs->regs.reg[32].how = REG_SAVED_OFFSET;
+  fs->regs.reg[32].loc.offset = (long)&regs->psw_addr - new_cfa;
+  fs->retaddr_column = 32;
+  /* SIGILL, SIGFPE and SIGTRAP are delivered with psw_addr
+     after the faulting instruction rather than before it.
+     Don't set FS->signal_frame in that case.  */
+  if (!signo || (*signo != 4 && *signo != 5 && *signo != 8))
+    fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
diff --git a/gcc-4.9/libgcc/config/s390/t-crtstuff b/gcc-4.9/libgcc/config/s390/t-crtstuff
new file mode 100644
index 000000000..d738673fe
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/t-crtstuff
@@ -0,0 +1,5 @@
+# crtend*.o cannot be compiled without -fno-asynchronous-unwind-tables,
+# because then __FRAME_END__ might not be the last thing in .eh_frame
+# section.
+CRTSTUFF_T_CFLAGS += -fno-asynchronous-unwind-tables
+CRTSTUFF_T_CFLAGS_S += -fno-asynchronous-unwind-tables
diff --git a/gcc-4.9/libgcc/config/s390/t-linux b/gcc-4.9/libgcc/config/s390/t-linux
new file mode 100644
index 000000000..b7670828d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/t-linux
@@ -0,0 +1,7 @@
+DFP_ENABLE = true
+
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used.
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/s390/libgcc-glibc.ver
+
+HOST_LIBGCC2_CFLAGS += -mlong-double-128
\ No newline at end of file
diff --git a/gcc-4.9/libgcc/config/s390/tpf-unwind.h b/gcc-4.9/libgcc/config/s390/tpf-unwind.h
new file mode 100644
index 000000000..5fa177b50
--- /dev/null
+++ b/gcc-4.9/libgcc/config/s390/tpf-unwind.h
@@ -0,0 +1,252 @@
+/* DWARF2 EH unwinding support for TPF OS.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+   Contributed by P.J. Darcy (darcypj@us.ibm.com).
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <dlfcn.h>
+
+/* Function Name: __isPATrange
+   Parameters passed into it:  address to check
+   Return Value: A 1 if address is in pat code "range", 0 if not
+   Description: This function simply checks to see if the address
+   passed to it is in the CP pat code range.  */
+
+#define MIN_PATRANGE 0x10000
+#define MAX_PATRANGE 0x800000
+
+static inline unsigned int
+__isPATrange (void *addr)
+{
+  if (addr > (void *)MIN_PATRANGE && addr < (void *)MAX_PATRANGE)
+    return 1;
+  else
+    return 0;
+}
+
+/* TPF return address offset from start of stack frame.  */
+#define TPFRA_OFFSET 168
+
+/* Exceptions macro defined for TPF so that functions without
+   dwarf frame information can be used with exceptions.  */
+#define MD_FALLBACK_FRAME_STATE_FOR s390_fallback_frame_state
+
+static _Unwind_Reason_Code
+s390_fallback_frame_state (struct _Unwind_Context *context,
+			   _Unwind_FrameState *fs)
+{
+  unsigned long int regs;
+  unsigned long int new_cfa;
+  int i;
+
+  regs = *((unsigned long int *)
+        (((unsigned long int) context->cfa) - STACK_POINTER_OFFSET));
+
+  /* Are we going through special linkage code?  */
+  if (__isPATrange (context->ra))
+    {
+
+      /* Our return register isn't zero for end of stack, so
+         check backward stackpointer to see if it is zero.  */
+      if (regs == NULL)
+         return _URC_END_OF_STACK;
+
+      /* No stack frame.  */
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = 15;
+      fs->regs.cfa_offset = STACK_POINTER_OFFSET;
+
+      /* All registers remain unchanged ...  */
+      for (i = 0; i < 32; i++)
+	{
+	  fs->regs.reg[i].how = REG_SAVED_REG;
+	  fs->regs.reg[i].loc.reg = i;
+	}
+
+      /* ... except for %r14, which is stored at CFA-112
+	 and used as return address.  */
+      fs->regs.reg[14].how = REG_SAVED_OFFSET;
+      fs->regs.reg[14].loc.offset = TPFRA_OFFSET - STACK_POINTER_OFFSET;
+      fs->retaddr_column = 14;
+
+      return _URC_NO_REASON;
+    }
+
+  regs = *((unsigned long int *)
+        (((unsigned long int) context->cfa) - STACK_POINTER_OFFSET));
+  new_cfa = regs + STACK_POINTER_OFFSET;
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 15;
+  fs->regs.cfa_offset = new_cfa -
+        (unsigned long int) context->cfa + STACK_POINTER_OFFSET;
+
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset = regs + i*8 - new_cfa;
+    }
+
+  for (i = 0; i < 4; i++)
+    {
+      fs->regs.reg[16 + i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[16 + i].loc.offset = regs + 16*8 + i*8 - new_cfa;
+    }
+
+  fs->retaddr_column = 14;
+
+  return _URC_NO_REASON;
+}
+
+/* Function Name: __tpf_eh_return
+   Parameters passed into it: Destination address to jump to.
+   Return Value: Converted Destination address if a Pat Stub exists.
+   Description: This function swaps the unwinding return address
+      with the cp stub code.  The original target return address is
+      then stored into the tpf return address field.  The cp stub
+      code is searched for by climbing back up the stack and
+      comparing the tpf stored return address object address to
+      that of the targets object address.  */
+
+#define CURRENT_STACK_PTR() \
+  ({ register unsigned long int *stack_ptr asm ("%r15"); stack_ptr; })
+
+#define PREVIOUS_STACK_PTR() \
+  ((unsigned long int *)(*(CURRENT_STACK_PTR())))
+
+#define RA_OFFSET 112
+#define R15_OFFSET 120
+#define TPFAREA_OFFSET 160
+#define TPFAREA_SIZE STACK_POINTER_OFFSET-TPFAREA_OFFSET
+#define INVALID_RETURN 0
+
+void * __tpf_eh_return (void *target);
+
+void *
+__tpf_eh_return (void *target)
+{
+  Dl_info targetcodeInfo, currentcodeInfo;
+  int retval;
+  void *current, *stackptr, *destination_frame;
+  unsigned long int shifter, is_a_stub;
+
+  is_a_stub = 0;
+
+  /* Get code info for target return's address.  */
+  retval = dladdr (target, &targetcodeInfo);
+
+  /* Ensure the code info is valid (for target).  */
+  if (retval != INVALID_RETURN)
+    {
+
+      /* Get the stack pointer of the stack frame to be modified by
+         the exception unwinder.  So that we can begin our climb
+         there.  */
+      stackptr = (void *) *((unsigned long int *) (*(PREVIOUS_STACK_PTR())));
+
+      /* Begin looping through stack frames.  Stop if invalid
+         code information is retrieved or if a match between the
+         current stack frame iteration shared object's address
+         matches that of the target, calculated above.  */
+      do
+        {
+          /* Get return address based on our stackptr iterator.  */
+          current = (void *) *((unsigned long int *)
+                      (stackptr+RA_OFFSET));
+
+          /* Is it a Pat Stub?  */
+          if (__isPATrange (current))
+            {
+              /* Yes it was, get real return address
+                 in TPF stack area.  */
+              current = (void *) *((unsigned long int *)
+                          (stackptr+TPFRA_OFFSET));
+              is_a_stub = 1;
+            }
+
+          /* Get codeinfo on RA so that we can figure out
+             the module address.  */
+          retval = dladdr (current, &currentcodeInfo);
+
+          /* Check that codeinfo for current stack frame is valid.
+             Then compare the module address of current stack frame
+             to target stack frame to determine if we have the pat
+             stub address we want.  Also ensure we are dealing
+             with a module crossing, stub return address. */
+          if (is_a_stub && retval != INVALID_RETURN
+             && targetcodeInfo.dli_fbase == currentcodeInfo.dli_fbase)
+             {
+               /* Yes! They are in the same module.
+                  Force copy of TPF private stack area to
+                  destination stack frame TPF private area. */
+               destination_frame = (void *) *((unsigned long int *)
+                   (*PREVIOUS_STACK_PTR() + R15_OFFSET));
+
+               /* Copy TPF linkage area from current frame to
+                  destination frame.  */
+               memcpy((void *) (destination_frame + TPFAREA_OFFSET),
+                 (void *) (stackptr + TPFAREA_OFFSET), TPFAREA_SIZE);
+
+               /* Now overlay the
+                  real target address into the TPF stack area of
+                  the target frame we are jumping to.  */
+               *((unsigned long int *) (destination_frame +
+                   TPFRA_OFFSET)) = (unsigned long int) target;
+
+               /* Before returning the desired pat stub address to
+                  the exception handling unwinder so that it can
+                  actually do the "leap" shift out the low order
+                  bit designated to determine if we are in 64BIT mode.
+                  This is necessary for CTOA stubs.
+                  Otherwise we leap one byte past where we want to
+                  go to in the TPF pat stub linkage code.  */
+               shifter = *((unsigned long int *)
+                     (stackptr + RA_OFFSET));
+
+               shifter &= ~1ul;
+
+               /* Store Pat Stub Address in destination Stack Frame.  */
+               *((unsigned long int *) (destination_frame +
+                   RA_OFFSET)) = shifter;
+
+               /* Re-adjust pat stub address to go to correct place
+                  in linkage.  */
+               shifter = shifter - 4;
+
+               return (void *) shifter;
+             }
+
+          /* Desired module pat stub not found ...
+             Bump stack frame iterator.  */
+          stackptr = (void *) *(unsigned long int *) stackptr;
+
+          is_a_stub = 0;
+
+        }  while (stackptr && retval != INVALID_RETURN
+                && targetcodeInfo.dli_fbase != currentcodeInfo.dli_fbase);
+    }
+
+  /* No pat stub found, could be a problem?  Simply return unmodified
+     target address.  */
+  return target;
+}
+
diff --git a/gcc-4.9/libgcc/config/score/crti.S b/gcc-4.9/libgcc/config/score/crti.S
new file mode 100644
index 000000000..e007a5e70
--- /dev/null
+++ b/gcc-4.9/libgcc/config/score/crti.S
@@ -0,0 +1,131 @@
+# crti.S for Sunplus S+CORE
+#
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file makes a stack frame for the contents of the .init and
+# .fini sections.
+.extern _stack
+
+#ifndef __pic__
+.section .init, "ax", @progbits
+        .weak   _start
+        .ent    _start
+        .frame  r0, 0, r3, 0
+        .mask   0x00000000, 0
+_start:
+        la      r28, _gp
+        la      r8, __bss_start
+        la      r9, __bss_end__
+        sub!    r9, r8
+        srli!   r9, 2
+        addi    r9, -1
+        mtsr    r9, sr0
+        li      r9, 0
+1:
+        sw      r9, [r8]+, 4
+        bcnz    1b
+        la      r0, _stack
+        jl      _init
+        la      r4, _end
+        jl      _init_argv
+        jl      exit
+        .end    _start
+
+        .weak   _init_argv
+        .ent
+        .frame  r0, 0, r3, 0
+        .mask   0x00000000, 0
+_init_argv:
+        ldiu!   r4, 0
+        ldiu!   r5, 0
+        j       main
+        .end    _init_argv
+
+        .globl  _init
+        .type   _init, %function
+_init:
+        addi    r0, -32
+        sw      r3, [r0, 20]
+
+        .section .fini, "ax", @progbits
+        .globl  _fini
+        .type   _fini, %function
+_fini:
+        addi    r0, -32
+        sw      r3, [r0, 20]
+#else
+.section .init, "ax", @progbits
+        .set    pic
+        .weak   _start
+        .ent    _start
+        .frame  r0, 0, r3, 0
+        .mask   0x00000000, 0
+_start:
+        mv      r29, r3
+        bl      0f
+0:
+        .cpload r3
+        mv      r3, r29
+        la      r8, __bss_start
+        la      r9, __bss_end__
+        sub!    r9, r8
+        srli!   r9, 2
+        addi    r9, -1
+        mtsr    r9, sr0
+        li      r9, 0
+1:
+        sw      r9, [r8]+, 4
+        bcnz    1b
+        la      r0, _stack
+        bl      _init
+        la      r4, _end
+        la      r29, _init_argv
+        brl     r29
+        la      r29, exit
+        brl     r29
+        .end    _start
+
+        .weak   _init_argv
+        .ent _init_argv
+        .frame  r0, 0, r3, 0
+        .mask   0x00000000, 0
+_init_argv:
+        ldiu!   r4, 0
+        ldiu!   r5, 0
+        la      r29, main
+        brl     r29
+        .end    _init_argv
+
+        .globl  _init
+        .type   _init, %function
+_init:
+        addi    r0, -32
+        sw      r3, [r0, 20]
+
+        .section .fini, "ax", @progbits
+        .globl  _fini
+        .type   _fini, %function
+_fini:
+        addi    r0, -32
+        sw      r3, [r0, 20]
+
+#endif
diff --git a/gcc-4.9/libgcc/config/score/crtn.S b/gcc-4.9/libgcc/config/score/crtn.S
new file mode 100644
index 000000000..11a5b05b7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/score/crtn.S
@@ -0,0 +1,50 @@
+# crtn.S for Sunplus S+CORE
+
+#   Copyright (C) 2005-2014 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file makes sure that the .init and .fini sections do in
+# fact return.
+
+#ifndef __pic__
+.section .init, "ax", @progbits
+        lw      r3, [r0, 20]
+        addi    r0, 32
+        br      r3
+
+.section .fini, "ax", @progbits
+        lw      r3, [r0, 20]
+        addi    r0, 32
+        br      r3
+#else
+        .set    pic
+.section .init, "ax", @progbits
+        lw      r3, [r0, 20]
+        addi    r0, 32
+        br      r3
+
+        .set    pic
+.section .fini, "ax", @progbits
+        lw      r3, [r0, 20]
+        addi    r0, 32
+        br      r3
+#endif
+
diff --git a/gcc-4.9/libgcc/config/score/sfp-machine.h b/gcc-4.9/libgcc/config/score/sfp-machine.h
new file mode 100644
index 000000000..6394de30b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/score/sfp-machine.h
@@ -0,0 +1,61 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+/* Not checked.  */
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+# define __BYTE_ORDER __BIG_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
diff --git a/gcc-4.9/libgcc/config/sh/crt1.S b/gcc-4.9/libgcc/config/sh/crt1.S
new file mode 100644
index 000000000..d8b929549
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/crt1.S
@@ -0,0 +1,1368 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file was pretty much copied from newlib.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+#ifdef MMU_SUPPORT
+	/* Section used for exception/timer interrupt stack area */
+	.section .data.vbr.stack,"aw"
+	.align 4
+	.global __ST_VBR
+__ST_VBR:
+	.zero 1024 * 2          /* ; 2k for VBR handlers */
+/* Label at the highest stack address where the stack grows from */
+__timer_stack:
+#endif /* MMU_SUPPORT */
+	
+	/* ;----------------------------------------
+	Normal newlib crt1.S */
+
+#ifdef __SH5__
+	.section .data,"aw"
+	.global ___data
+___data:
+
+	.section .rodata,"a"
+	.global ___rodata
+___rodata:
+
+#define ICCR_BASE  0x01600000
+#define OCCR_BASE  0x01e00000
+#define MMUIR_BASE 0x00000000
+#define MMUDR_BASE 0x00800000
+
+#define PTE_ENABLED     1
+#define PTE_DISABLED    0
+
+#define PTE_SHARED (1 << 1)
+#define PTE_NOT_SHARED  0
+
+#define PTE_CB_UNCACHEABLE  0
+#define PTE_CB_DEVICE       1
+#define PTE_CB_CACHEABLE_WB 2
+#define PTE_CB_CACHEABLE_WT 3
+
+#define PTE_SZ_4KB   (0 << 3)
+#define PTE_SZ_64KB  (1 << 3)
+#define PTE_SZ_1MB   (2 << 3)
+#define PTE_SZ_512MB (3 << 3)
+
+#define PTE_PRR      (1 << 6)
+#define PTE_PRX      (1 << 7)
+#define PTE_PRW      (1 << 8)
+#define PTE_PRU      (1 << 9)
+
+#define SR_MMU_BIT          31
+#define SR_BL_BIT           28
+
+#define ALIGN_4KB  (0xfff)
+#define ALIGN_1MB  (0xfffff)
+#define ALIGN_512MB (0x1fffffff)
+
+#define DYNACON_BASE               0x0f000000
+#define DM_CB_DLINK_BASE           0x0c000000
+#define DM_DB_DLINK_BASE           0x0b000000
+
+#define FEMI_AREA_0                0x00000000
+#define FEMI_AREA_1                0x04000000
+#define FEMI_AREA_2                0x05000000
+#define FEMI_AREA_3                0x06000000
+#define FEMI_AREA_4                0x07000000
+#define FEMI_CB                    0x08000000
+
+#define EMI_BASE                   0X80000000
+
+#define DMA_BASE                   0X0e000000
+
+#define CPU_BASE                   0X0d000000
+
+#define PERIPH_BASE                0X09000000
+#define DMAC_BASE                  0x0e000000
+#define INTC_BASE                  0x0a000000
+#define CPRC_BASE                  0x0a010000
+#define TMU_BASE                   0x0a020000
+#define SCIF_BASE                  0x0a030000
+#define RTC_BASE                   0x0a040000
+
+
+
+#define LOAD_CONST32(val, reg) \
+	movi	((val) >> 16) & 65535, reg; \
+	shori	(val) & 65535, reg
+
+#define LOAD_PTEH_VAL(sym, align, bits, scratch_reg, reg) \
+	LOAD_ADDR (sym, reg); \
+	LOAD_CONST32 ((align), scratch_reg); \
+	andc	reg, scratch_reg, reg; \
+	LOAD_CONST32 ((bits), scratch_reg); \
+	or	reg, scratch_reg, reg
+
+#define LOAD_PTEL_VAL(sym, align, bits, scratch_reg, reg) \
+	LOAD_ADDR (sym, reg); \
+	LOAD_CONST32 ((align), scratch_reg); \
+	andc	reg, scratch_reg, reg; \
+	LOAD_CONST32 ((bits), scratch_reg); \
+	or	reg, scratch_reg, reg
+
+#define SET_PTE(pte_addr_reg, pteh_val_reg, ptel_val_reg) \
+	putcfg  pte_addr_reg, 0, r63; \
+	putcfg  pte_addr_reg, 1, ptel_val_reg; \
+	putcfg  pte_addr_reg, 0, pteh_val_reg
+
+#if __SH5__ == 64
+	.section .text,"ax"
+#define LOAD_ADDR(sym, reg) \
+	movi	(sym >> 48) & 65535, reg; \
+	shori	(sym >> 32) & 65535, reg; \
+	shori	(sym >> 16) & 65535, reg; \
+	shori	sym & 65535, reg
+#else
+	.mode	SHmedia
+	.section .text..SHmedia32,"ax"
+#define LOAD_ADDR(sym, reg) \
+	movi	(sym >> 16) & 65535, reg; \
+	shori	sym & 65535, reg
+#endif
+	.global start
+start:
+	LOAD_ADDR (_stack, r15)
+
+#ifdef MMU_SUPPORT
+	! Set up the VM using the MMU and caches
+
+	! .vm_ep is first instruction to execute
+	! after VM initialization
+	pt/l	.vm_ep, tr1
+	
+	! Configure instruction cache (ICCR)
+	movi	3, r2
+	movi	0, r3
+	LOAD_ADDR (ICCR_BASE, r1)
+	putcfg	r1, 0, r2
+	putcfg	r1, 1, r3
+
+	! movi	7, r2 ! write through
+	! Configure operand cache (OCCR)
+	LOAD_ADDR (OCCR_BASE, r1)
+	putcfg	r1, 0, r2
+	putcfg	r1, 1, r3
+
+	! Disable all PTE translations
+	LOAD_ADDR (MMUIR_BASE, r1)
+	LOAD_ADDR (MMUDR_BASE, r2)
+	movi	64, r3
+	pt/l	.disable_ptes_loop, tr0
+.disable_ptes_loop:
+	putcfg	r1, 0, r63
+	putcfg	r2, 0, r63
+	addi	r1, 16, r1
+	addi	r2, 16, r2
+	addi	r3, -1, r3
+	bgt	r3, r63, tr0
+
+	LOAD_ADDR (MMUIR_BASE, r1)
+
+	! FEMI instruction mappings
+	!   Area 0 - 1Mb cacheable at 0x00000000
+	!   Area 1 - None
+	!   Area 2 - 1Mb cacheable at 0x05000000
+	!          - 1Mb cacheable at 0x05100000
+	!   Area 3 - None
+	!   Area 4 - None
+
+	! Map a 1Mb page for instructions at 0x00000000
+	LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1Mb page for instructions at 0x05000000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1Mb page for instructions at 0x05100000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 512M page for instructions at EMI base
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRX | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for instructions at DM_DB_DLINK_BASE
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRX | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	LOAD_ADDR (MMUDR_BASE, r1)
+
+	! FEMI data mappings
+	!   Area 0 - 1Mb cacheable at 0x00000000
+	!   Area 1 - 1Mb device at 0x04000000
+	!   Area 2 - 1Mb cacheable at 0x05000000
+	!          - 1Mb cacheable at 0x05100000
+	!   Area 3 - None
+	!   Area 4 - None
+	!   CB     - 1Mb device at 0x08000000
+
+	! Map a 1Mb page for data at 0x00000000
+	LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1Mb page for data at 0x04000000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1Mb page for data at 0x05000000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1Mb page for data at 0x05100000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for registers at 0x08000000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (FEMI_CB, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (FEMI_CB, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 512M page for data at EMI
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for DYNACON at DYNACON_BASE
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DYNACON_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DYNACON_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for instructions at DM_DB_DLINK_BASE
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for data at DM_DB_DLINK_BASE+0x1000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_CB_UNCACHEABLE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for stack DM_DB_DLINK_BASE+0x2000
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK 
+	! 0x0c000000 - 0x0c0fffff
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK 
+	! 0x0c100000 - 0x0c1fffff
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK 
+	! 0x0c200000 - 0x0c2fffff
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK 
+	! 0x0c400000 - 0x0c4fffff
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK 
+	! 0x0c800000 - 0x0c8fffff
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map a 4K page for DMA control registers
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DMA_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DMA_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map lots of 4K pages for peripherals
+
+	! /* peripheral */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (PERIPH_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (PERIPH_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* dmac */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (DMAC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (DMAC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* intc */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (INTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (INTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* rtc */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (RTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (RTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* dmac */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (TMU_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (TMU_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* scif */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (SCIF_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (SCIF_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	! /* cprc */
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (CPRC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (CPRC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Map CPU WPC registers 
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL (CPU_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL (CPU_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+	addi	r1, 16, r1
+
+	LOAD_PTEH_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	addi	r1, 16, r1
+	LOAD_PTEH_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2)
+	LOAD_PTEL_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3)
+	SET_PTE (r1, r2, r3)
+
+	! Switch over to virtual addressing and enabled cache
+	getcon	sr, r1
+	movi	1, r2
+	shlli	r2, SR_BL_BIT, r2
+	or	r1, r2, r1
+	putcon	r1, ssr
+	getcon	sr, r1
+	movi	1, r2
+	shlli	r2, SR_MMU_BIT, r2
+	or	r1, r2, r1
+	putcon	r1, ssr
+	gettr	tr1, r1
+	putcon	r1, spc
+	synco
+	rte
+
+	! VM entry point.  From now on, we are in VM mode.
+.vm_ep:
+
+	! Install the trap handler, by seeding vbr with the
+	! correct value, and by assigning sr.bl = 0.
+
+	LOAD_ADDR (vbr_start, r1)
+	putcon	r1, vbr
+	movi	~(1<<28), r1
+	getcon	sr, r2
+	and     r1, r2, r2
+	putcon	r2, sr
+#endif /* MMU_SUPPORT */
+
+	pt/l	.Lzero_bss_loop, tr0
+	pt/l	_init, tr5
+	pt/l	___setup_argv_and_call_main, tr6
+	pt/l	_exit, tr7
+
+	! zero out bss
+	LOAD_ADDR (_edata, r0)
+	LOAD_ADDR (_end, r1)
+.Lzero_bss_loop:
+	stx.q	r0, r63, r63
+	addi	r0, 8, r0
+	bgt/l	r1, r0, tr0
+
+	LOAD_ADDR (___data, r26)
+	LOAD_ADDR (___rodata, r27)
+
+#ifdef __SH_FPU_ANY__
+	getcon	sr, r0
+	! enable the FP unit, by resetting SR.FD
+	! also zero out SR.FR, SR.SZ and SR.PR, as mandated by the ABI
+	movi	0, r1
+	shori	0xf000, r1
+	andc	r0, r1, r0
+	putcon	r0, sr
+#if __SH5__ == 32
+	pt/l ___set_fpscr, tr0
+	movi	0, r4
+	blink	tr0, r18
+#endif
+#endif
+
+	! arrange for exit to call fini
+	pt/l	_atexit, tr1
+	LOAD_ADDR (_fini, r2)
+	blink	tr1, r18
+
+	! call init
+	blink	tr5, r18
+
+	! call the mainline
+	blink	tr6, r18
+
+	! call exit
+	blink	tr7, r18
+	! We should never return from _exit but in case we do we would enter the
+	! the following tight loop. This avoids executing any data that might follow.
+limbo:
+	pt/l limbo, tr0
+	blink tr0, r63
+	
+#ifdef MMU_SUPPORT
+	! All these traps are handled in the same place. 
+	.balign 256
+vbr_start:
+	pt/l handler, tr0	! tr0 trashed.
+	blink tr0, r63
+	.balign 256
+vbr_100:
+	pt/l handler, tr0	! tr0 trashed.
+	blink tr0, r63
+vbr_100_end:
+	.balign 256
+vbr_200:
+	pt/l handler, tr0	! tr0 trashed.
+	blink tr0, r63
+	.balign 256
+vbr_300:
+	pt/l handler, tr0	! tr0 trashed.
+	blink tr0, r63
+	.balign 256	
+vbr_400:	! Should be at vbr+0x400
+handler:
+	/* If the trap handler is there call it */
+	LOAD_ADDR (__superh_trap_handler, r2)
+	pta chandler,tr2
+	beq r2, r63, tr2 /* If zero, ie not present branch around to chandler */
+	/* Now call the trap handler with as much of the context unchanged as possible.
+	   Move trapping address into R18 to make it look like the trap point */
+	getcon spc, r18
+	pt/l __superh_trap_handler, tr0
+	blink tr0, r7
+chandler:	
+	getcon	spc, r62
+	getcon expevt, r2
+	pt/l	_exit, tr0
+	blink	tr0, r63
+
+	/* Simulated trap handler */
+	.section	.text..SHmedia32,"ax"
+gcc2_compiled.:
+	.section	.debug_abbrev
+.Ldebug_abbrev0:
+	.section	.text..SHmedia32
+.Ltext0:
+	.section	.debug_info
+.Ldebug_info0:
+	.section	.debug_line
+.Ldebug_line0:
+	.section	.text..SHmedia32,"ax"
+	.align 5
+	.global	__superh_trap_handler
+	.type	__superh_trap_handler,@function
+__superh_trap_handler:
+.LFB1:
+	ptabs	r18, tr0
+	addi.l	r15, -8, r15
+	st.l	r15, 4, r14
+	addi.l	r15, -8, r15
+	add.l	r15, r63, r14
+	st.l	r14, 0, r2
+	 ptabs r7, tr0 
+	addi.l	r14, 8, r14
+	add.l	r14, r63, r15
+	ld.l	r15, 4, r14
+	addi.l	r15, 8, r15
+	blink	tr0, r63
+.LFE1:
+.Lfe1:
+	.size	__superh_trap_handler,.Lfe1-__superh_trap_handler
+
+	.section	.text..SHmedia32
+.Letext0:
+
+	.section	.debug_info
+	.ualong	0xa7
+	.uaword	0x2
+	.ualong	.Ldebug_abbrev0
+	.byte	0x4
+	.byte	0x1
+	.ualong	.Ldebug_line0
+	.ualong	.Letext0
+	.ualong	.Ltext0
+	.string	"trap_handler.c"
+
+	.string	"xxxxxxxxxxxxxxxxxxxxxxxxxxxx"
+
+	.string	"GNU C 2.97-sh5-010522"
+
+	.byte	0x1
+	.byte	0x2
+	.ualong	0x9a
+	.byte	0x1
+	.string	"_superh_trap_handler"
+
+	.byte	0x1
+	.byte	0x2
+	.byte	0x1
+	.ualong	.LFB1
+	.ualong	.LFE1
+	.byte	0x1
+	.byte	0x5e
+	.byte	0x3
+	.string	"trap_reason"
+
+	.byte	0x1
+	.byte	0x1
+	.ualong	0x9a
+	.byte	0x2
+	.byte	0x91
+	.byte	0x0
+	.byte	0x0
+	.byte	0x4
+	.string	"unsigned int"
+
+	.byte	0x4
+	.byte	0x7
+	.byte	0x0
+
+	.section	.debug_abbrev
+	.byte	0x1
+	.byte	0x11
+	.byte	0x1
+	.byte	0x10
+	.byte	0x6
+	.byte	0x12
+	.byte	0x1
+	.byte	0x11
+	.byte	0x1
+	.byte	0x3
+	.byte	0x8
+	.byte	0x1b
+	.byte	0x8
+	.byte	0x25
+	.byte	0x8
+	.byte	0x13
+	.byte	0xb
+	.byte	0,0
+	.byte	0x2
+	.byte	0x2e
+	.byte	0x1
+	.byte	0x1
+	.byte	0x13
+	.byte	0x3f
+	.byte	0xc
+	.byte	0x3
+	.byte	0x8
+	.byte	0x3a
+	.byte	0xb
+	.byte	0x3b
+	.byte	0xb
+	.byte	0x27
+	.byte	0xc
+	.byte	0x11
+	.byte	0x1
+	.byte	0x12
+	.byte	0x1
+	.byte	0x40
+	.byte	0xa
+	.byte	0,0
+	.byte	0x3
+	.byte	0x5
+	.byte	0x0
+	.byte	0x3
+	.byte	0x8
+	.byte	0x3a
+	.byte	0xb
+	.byte	0x3b
+	.byte	0xb
+	.byte	0x49
+	.byte	0x13
+	.byte	0x2
+	.byte	0xa
+	.byte	0,0
+	.byte	0x4
+	.byte	0x24
+	.byte	0x0
+	.byte	0x3
+	.byte	0x8
+	.byte	0xb
+	.byte	0xb
+	.byte	0x3e
+	.byte	0xb
+	.byte	0,0
+	.byte	0
+
+	.section	.debug_pubnames
+	.ualong	0x27
+	.uaword	0x2
+	.ualong	.Ldebug_info0
+	.ualong	0xab
+	.ualong	0x5b
+	.string	"_superh_trap_handler"
+
+	.ualong	0x0
+
+	.section	.debug_aranges
+	.ualong	0x1c
+	.uaword	0x2
+	.ualong	.Ldebug_info0
+	.byte	0x4
+	.byte	0x0
+	.uaword	0x0,0
+	.ualong	.Ltext0
+	.ualong	.Letext0-.Ltext0
+	.ualong	0x0
+	.ualong	0x0
+	.ident	"GCC: (GNU) 2.97-sh5-010522"
+#endif /* MMU_SUPPORT */
+#else /* ! __SH5__ */
+
+	! make a place to keep any previous value of the vbr register
+	! this will only have a value if it has been set by redboot (for example)
+	.section .bss
+old_vbr:
+	.long 0
+#ifdef PROFILE
+profiling_enabled:
+	.long 0
+#endif
+
+
+	.section .text
+	.global	start
+	.import ___rtos_profiler_start_timer
+	.weak   ___rtos_profiler_start_timer
+start:
+	mov.l	stack_k,r15
+
+#if defined (__SH3__) || (defined (__SH_FPU_ANY__) && ! defined (__SH2E__) && ! defined (__SH2A__)) || defined (__SH4_NOFPU__)
+#define VBR_SETUP
+	! before zeroing the bss ...
+	! if the vbr is already set to vbr_start then the program has been restarted
+	! (i.e. it is not the first time the program has been run since reset)
+	! reset the vbr to its old value before old_vbr (in bss) is wiped
+	! this ensures that the later code does not create a circular vbr chain
+	stc	vbr, r1
+	mov.l	vbr_start_k, r2
+	cmp/eq	r1, r2
+	bf	0f
+	! reset the old vbr value
+	mov.l	old_vbr_k, r1
+	mov.l	@r1, r2
+	ldc	r2, vbr
+0:	
+#endif /* VBR_SETUP */
+	
+	! zero out bss
+	mov.l	edata_k,r0
+	mov.l	end_k,r1
+	mov	#0,r2
+start_l:
+	mov.l	r2,@r0
+	add	#4,r0
+	cmp/ge	r0,r1
+	bt	start_l
+
+#if defined (__SH_FPU_ANY__)
+	mov.l set_fpscr_k, r1
+	mov #4,r4
+	jsr @r1
+	shll16 r4	! Set DN bit (flush denormal inputs to zero)
+	lds r3,fpscr	! Switch to default precision
+#endif /* defined (__SH_FPU_ANY__) */
+
+#ifdef VBR_SETUP
+	! save the existing contents of the vbr
+	! there will only be a prior value when using something like redboot
+	! otherwise it will be zero
+	stc	vbr, r1
+	mov.l	old_vbr_k, r2
+	mov.l	r1, @r2
+	! setup vbr
+	mov.l	vbr_start_k, r1
+	ldc	r1,vbr
+#endif /* VBR_SETUP */
+
+	! if an rtos is exporting a timer start fn,
+	! then pick up an SR which does not enable ints
+	! (the rtos will take care of this)
+	mov.l rtos_start_fn, r0
+	mov.l sr_initial_bare, r1
+	tst	r0, r0
+	bt	set_sr
+
+	mov.l sr_initial_rtos, r1
+
+set_sr:
+	! Set status register (sr)
+	ldc	r1, sr
+
+	! arrange for exit to call fini
+	mov.l	atexit_k,r0
+	mov.l	fini_k,r4
+	jsr	@r0
+	nop
+
+#ifdef PROFILE
+	! arrange for exit to call _mcleanup (via stop_profiling)
+	mova    stop_profiling,r0
+	mov.l   atexit_k,r1
+	jsr     @r1
+	mov	r0, r4
+
+	! Call profiler startup code
+	mov.l monstartup_k, r0
+	mov.l start_k, r4
+	mov.l etext_k, r5
+	jsr @r0
+	nop
+
+	! enable profiling trap
+	! until now any trap 33s will have been ignored
+	! This means that all library functions called before this point
+	! (directly or indirectly) may have the profiling trap at the start.
+	! Therefore, only mcount itself may not have the extra header.
+	mov.l	profiling_enabled_k2, r0
+	mov	#1, r1
+	mov.l	r1, @r0
+#endif /* PROFILE */
+
+	! call init
+	mov.l	init_k,r0
+	jsr	@r0
+	nop
+
+	! call the mainline	
+	mov.l	main_k,r0
+	jsr	@r0
+	nop
+
+	! call exit
+	mov	r0,r4
+	mov.l	exit_k,r0
+	jsr	@r0
+	nop
+	
+		.balign 4
+#ifdef PROFILE
+stop_profiling:
+	# stop mcount counting
+	mov.l	profiling_enabled_k2, r0
+	mov	#0, r1
+	mov.l	r1, @r0
+
+	# call mcleanup
+	mov.l	mcleanup_k, r0
+	jmp	@r0
+	nop
+		
+		.balign 4
+mcleanup_k:
+	.long __mcleanup
+monstartup_k:
+	.long ___monstartup
+profiling_enabled_k2:
+	.long profiling_enabled
+start_k:
+	.long _start
+etext_k:
+	.long __etext
+#endif /* PROFILE */
+
+	.align 2
+#if defined (__SH_FPU_ANY__)
+set_fpscr_k:
+	.long	___set_fpscr
+#endif /*  defined (__SH_FPU_ANY__) */
+
+stack_k:
+	.long	_stack	
+edata_k:
+	.long	_edata
+end_k:
+	.long	_end
+main_k:
+	.long	___setup_argv_and_call_main
+exit_k:
+	.long	_exit
+atexit_k:
+	.long	_atexit
+init_k:
+	.long	_init
+fini_k:
+	.long	_fini
+#ifdef VBR_SETUP
+old_vbr_k:
+	.long	old_vbr
+vbr_start_k:
+	.long	vbr_start
+#endif /* VBR_SETUP */
+	
+sr_initial_rtos:
+	! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
+	! Whether profiling or not, keep interrupts masked,
+	! the RTOS will enable these if required.
+	.long 0x600000f1 
+
+rtos_start_fn:
+	.long ___rtos_profiler_start_timer
+	
+#ifdef PROFILE
+sr_initial_bare:
+	! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
+	! For bare machine, we need to enable interrupts to get profiling working
+	.long 0x60000001
+#else
+
+sr_initial_bare:
+	! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
+	! Keep interrupts disabled - the application will enable as required.
+	.long 0x600000f1
+#endif
+
+	! supplied for backward compatibility only, in case of linking
+	! code whose main() was compiled with an older version of GCC.
+	.global ___main
+___main:
+	rts
+	nop
+#ifdef VBR_SETUP
+! Exception handlers	
+	.section .text.vbr, "ax"
+vbr_start:
+
+	.org 0x100
+vbr_100:
+#ifdef PROFILE
+	! Note on register usage.
+	! we use r0..r3 as scratch in this code. If we are here due to a trapa for profiling
+	! then this is OK as we are just before executing any function code.
+	! The other r4..r7 we save explicityl on the stack
+	! Remaining registers are saved by normal ABI conventions and we assert we do not
+	! use floating point registers.
+	mov.l expevt_k1, r1
+	mov.l @r1, r1
+	mov.l event_mask, r0
+	and r0,r1
+	mov.l trapcode_k, r2
+	cmp/eq r1,r2
+	bt 1f
+	bra handler_100   ! if not a trapa, go to default handler
+	nop
+1:	
+	mov.l trapa_k, r0
+	mov.l @r0, r0
+	shlr2 r0      ! trapa code is shifted by 2.
+	cmp/eq #33, r0
+	bt 2f
+	bra handler_100
+	nop
+2:	
+	
+	! If here then it looks like we have trap #33
+	! Now we need to call mcount with the following convention
+	! Save and restore r4..r7
+	mov.l	r4,@-r15
+	mov.l	r5,@-r15
+	mov.l	r6,@-r15
+	mov.l	r7,@-r15
+	sts.l	pr,@-r15
+
+	! r4 is frompc.
+	! r5 is selfpc
+	! r0 is the branch back address.
+	! The code sequence emitted by gcc for the profiling trap is
+	! .align 2
+	! trapa #33
+	! .align 2
+	! .long lab Where lab is planted by the compiler. This is the address
+	! of a datum that needs to be incremented. 
+	sts pr,  r4     ! frompc
+	stc spc, r5	! selfpc
+	mov #2, r2
+	not r2, r2      ! pattern to align to 4
+	and r2, r5      ! r5 now has aligned address
+!	add #4, r5      ! r5 now has address of address
+	mov r5, r2      ! Remember it.
+!	mov.l @r5, r5   ! r5 has value of lable (lab in above example)
+	add #8, r2
+	ldc r2, spc     ! our return address avoiding address word
+
+	! only call mcount if profiling is enabled
+	mov.l profiling_enabled_k, r0
+	mov.l @r0, r0
+	cmp/eq #0, r0
+	bt 3f
+	! call mcount
+	mov.l mcount_k, r2
+	jsr @r2
+	nop
+3:
+	lds.l @r15+,pr
+	mov.l @r15+,r7
+	mov.l @r15+,r6
+	mov.l @r15+,r5
+	mov.l @r15+,r4
+	rte
+	nop
+	.balign 4
+event_mask:
+	.long 0xfff
+trapcode_k:	
+	.long 0x160
+expevt_k1:
+	.long 0xff000024 ! Address of expevt
+trapa_k:	
+	.long 0xff000020
+mcount_k:
+	.long __call_mcount
+profiling_enabled_k:
+	.long profiling_enabled
+#endif
+	! Non profiling case.
+handler_100:
+	mov.l 2f, r0     ! load the old vbr setting (if any)
+	mov.l @r0, r0
+	cmp/eq #0, r0
+	bf 1f
+	! no previous vbr - jump to own generic handler
+	bra handler
+	nop	
+1:	! there was a previous handler - chain them
+	add #0x7f, r0	 ! 0x7f
+	add #0x7f, r0	 ! 0xfe
+	add #0x2, r0     ! add 0x100 without corrupting another register
+	jmp @r0
+	nop
+	.balign 4
+2:	
+	.long old_vbr
+
+	.org 0x400
+vbr_400:	! Should be at vbr+0x400
+	mov.l 2f, r0     ! load the old vbr setting (if any)
+	mov.l @r0, r0
+	cmp/eq #0, r0
+	! no previous vbr - jump to own generic handler
+	bt handler
+	! there was a previous handler - chain them
+	rotcr r0
+	rotcr r0
+	add #0x7f, r0	 ! 0x1fc
+	add #0x7f, r0	 ! 0x3f8
+	add #0x02, r0	 ! 0x400
+	rotcl r0
+	rotcl r0	 ! Add 0x400 without corrupting another register
+	jmp @r0
+	nop
+	.balign 4
+2:
+	.long old_vbr
+handler:
+	/* If the trap handler is there call it */
+	mov.l	superh_trap_handler_k, r0
+	cmp/eq	#0, r0       ! True if zero.
+	bf 3f
+	bra   chandler
+	nop
+3:	
+	! Here handler available, call it. 
+	/* Now call the trap handler with as much of the context unchanged as possible.
+	   Move trapping address into PR to make it look like the trap point */
+	stc spc, r1
+	lds r1, pr
+	mov.l expevt_k, r4
+	mov.l @r4, r4 ! r4 is value of expevt, first parameter.
+	mov r1, r5   ! Remember trapping pc.
+	mov r1, r6   ! Remember trapping pc.
+	mov.l chandler_k, r1
+	mov.l superh_trap_handler_k, r2
+	! jmp to trap handler to avoid disturbing pr. 
+	jmp @r2
+	nop
+
+	.org 0x600
+vbr_600:
+#ifdef PROFILE	
+	! Should be at vbr+0x600
+	! Now we are in the land of interrupts so need to save more state. 
+	! Save register state
+	mov.l interrupt_stack_k, r15 ! r15 has been saved to sgr.
+	mov.l	r0,@-r15	
+	mov.l	r1,@-r15
+	mov.l	r2,@-r15
+	mov.l	r3,@-r15
+	mov.l	r4,@-r15
+	mov.l	r5,@-r15
+	mov.l	r6,@-r15
+	mov.l	r7,@-r15
+	sts.l	pr,@-r15
+	sts.l	mach,@-r15
+	sts.l	macl,@-r15
+#if defined(__SH_FPU_ANY__)
+	! Save fpul and fpscr, save fr0-fr7 in 64 bit mode
+	! and set the pervading precision for the timer_handler
+	mov	#0,r0
+	sts.l	fpul,@-r15
+	sts.l	fpscr,@-r15
+	lds	r0,fpscr	! Clear fpscr
+	fmov	fr0,@-r15
+	fmov	fr1,@-r15
+	fmov	fr2,@-r15
+	fmov	fr3,@-r15
+	mov.l	pervading_precision_k,r0
+	fmov	fr4,@-r15
+	fmov	fr5,@-r15
+	mov.l	@r0,r0
+	fmov	fr6,@-r15
+	fmov	fr7,@-r15
+	lds	r0,fpscr
+#endif /* __SH_FPU_ANY__ */
+	! Pass interrupted pc to timer_handler as first parameter (r4).
+	stc    spc, r4
+	mov.l timer_handler_k, r0
+	jsr @r0
+	nop
+#if defined(__SH_FPU_ANY__)
+	mov	#0,r0
+	lds	r0,fpscr	! Clear the fpscr
+	fmov	@r15+,fr7
+	fmov	@r15+,fr6
+	fmov	@r15+,fr5
+	fmov	@r15+,fr4
+	fmov	@r15+,fr3
+	fmov	@r15+,fr2
+	fmov	@r15+,fr1
+	fmov	@r15+,fr0
+	lds.l	@r15+,fpscr
+	lds.l	@r15+,fpul
+#endif /* __SH_FPU_ANY__ */
+	lds.l @r15+,macl
+	lds.l @r15+,mach
+	lds.l @r15+,pr
+	mov.l @r15+,r7
+	mov.l @r15+,r6
+	mov.l @r15+,r5
+	mov.l @r15+,r4
+	mov.l @r15+,r3
+	mov.l @r15+,r2
+	mov.l @r15+,r1
+	mov.l @r15+,r0
+	stc sgr, r15    ! Restore r15, destroyed by this sequence. 
+	rte
+	nop
+#if defined(__SH_FPU_ANY__)
+	.balign 4
+pervading_precision_k:
+#define CONCAT1(A,B) A##B
+#define CONCAT(A,B) CONCAT1(A,B)
+	.long CONCAT(__USER_LABEL_PREFIX__,__fpscr_values)+4
+#endif
+#else
+	mov.l 2f, r0     ! Load the old vbr setting (if any).
+	mov.l @r0, r0
+	cmp/eq #0, r0
+	! no previous vbr - jump to own handler
+	bt chandler
+	! there was a previous handler - chain them
+	rotcr r0
+	rotcr r0
+	add #0x7f, r0	 ! 0x1fc
+	add #0x7f, r0	 ! 0x3f8
+	add #0x7f, r0	 ! 0x5f4
+	add #0x03, r0	 ! 0x600
+	rotcl r0
+	rotcl r0	 ! Add 0x600 without corrupting another register
+	jmp @r0
+	nop
+	.balign 4
+2:
+	.long old_vbr
+#endif	 /* PROFILE code */
+chandler:
+	mov.l expevt_k, r4
+	mov.l @r4, r4 ! r4 is value of expevt hence making this the return code
+	mov.l handler_exit_k,r0
+	jsr   @r0
+	nop
+	! We should never return from _exit but in case we do we would enter the
+	! the following tight loop
+limbo:
+	bra limbo
+	nop
+	.balign 4
+#ifdef PROFILE
+interrupt_stack_k:
+	.long __timer_stack	! The high end of the stack
+timer_handler_k:
+	.long __profil_counter
+#endif
+expevt_k:
+	.long 0xff000024 ! Address of expevt
+chandler_k:	
+	.long chandler	
+superh_trap_handler_k:
+	.long	__superh_trap_handler
+handler_exit_k:
+	.long _exit
+	.align 2
+! Simulated compile of trap handler.
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.text
+.Ltext0:
+	.align 5
+	.type	__superh_trap_handler,@function
+__superh_trap_handler:
+.LFB1:
+	mov.l	r14,@-r15
+.LCFI0:
+	add	#-4,r15
+.LCFI1:
+	mov	r15,r14
+.LCFI2:
+	mov.l	r4,@r14
+	lds	r1, pr
+	add	#4,r14
+	mov	r14,r15
+	mov.l	@r15+,r14
+	rts	
+	nop
+.LFE1:
+.Lfe1:
+	.size	__superh_trap_handler,.Lfe1-__superh_trap_handler
+	.section	.debug_frame,"",@progbits
+.Lframe0:
+	.ualong	.LECIE0-.LSCIE0
+.LSCIE0:
+	.ualong	0xffffffff
+	.byte	0x1
+	.string	""
+	.uleb128 0x1
+	.sleb128 -4
+	.byte	0x11
+	.byte	0xc
+	.uleb128 0xf
+	.uleb128 0x0
+	.align 2
+.LECIE0:
+.LSFDE0:
+	.ualong	.LEFDE0-.LASFDE0
+.LASFDE0:
+	.ualong	.Lframe0
+	.ualong	.LFB1
+	.ualong	.LFE1-.LFB1
+	.byte	0x4
+	.ualong	.LCFI0-.LFB1
+	.byte	0xe
+	.uleb128 0x4
+	.byte	0x4
+	.ualong	.LCFI1-.LCFI0
+	.byte	0xe
+	.uleb128 0x8
+	.byte	0x8e
+	.uleb128 0x1
+	.byte	0x4
+	.ualong	.LCFI2-.LCFI1
+	.byte	0xd
+	.uleb128 0xe
+	.align 2
+.LEFDE0:
+	.text
+.Letext0:
+	.section	.debug_info
+	.ualong	0xb3
+	.uaword	0x2
+	.ualong	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.ualong	.Ldebug_line0
+	.ualong	.Letext0
+	.ualong	.Ltext0
+	.string	"trap_handler.c"
+	.string	"xxxxxxxxxxxxxxxxxxxxxxxxxxxx"
+	.string	"GNU C 3.2 20020529 (experimental)"
+	.byte	0x1
+	.uleb128 0x2
+	.ualong	0xa6
+	.byte	0x1
+	.string	"_superh_trap_handler"
+	.byte	0x1
+	.byte	0x2
+	.byte	0x1
+	.ualong	.LFB1
+	.ualong	.LFE1
+	.byte	0x1
+	.byte	0x5e
+	.uleb128 0x3
+	.string	"trap_reason"
+	.byte	0x1
+	.byte	0x1
+	.ualong	0xa6
+	.byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.byte	0x0
+	.uleb128 0x4
+	.string	"unsigned int"
+	.byte	0x4
+	.byte	0x7
+	.byte	0x0
+	.section	.debug_abbrev
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x10
+	.uleb128 0x6
+	.uleb128 0x12
+	.uleb128 0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x1b
+	.uleb128 0x8
+	.uleb128 0x25
+	.uleb128 0x8
+	.uleb128 0x13
+	.uleb128 0xb
+	.byte	0x0
+	.byte	0x0
+	.uleb128 0x2
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0xc
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0xc
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x1
+	.uleb128 0x40
+	.uleb128 0xa
+	.byte	0x0
+	.byte	0x0
+	.uleb128 0x3
+	.uleb128 0x5
+	.byte	0x0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0xa
+	.byte	0x0
+	.byte	0x0
+	.uleb128 0x4
+	.uleb128 0x24
+	.byte	0x0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.byte	0x0
+	.byte	0x0
+	.byte	0x0
+	.section	.debug_pubnames,"",@progbits
+	.ualong	0x27
+	.uaword	0x2
+	.ualong	.Ldebug_info0
+	.ualong	0xb7
+	.ualong	0x67
+	.string	"_superh_trap_handler"
+	.ualong	0x0
+	.section	.debug_aranges,"",@progbits
+	.ualong	0x1c
+	.uaword	0x2
+	.ualong	.Ldebug_info0
+	.byte	0x4
+	.byte	0x0
+	.uaword	0x0
+	.uaword	0x0
+	.ualong	.Ltext0
+	.ualong	.Letext0-.Ltext0
+	.ualong	0x0
+	.ualong	0x0
+#endif /* VBR_SETUP */
+#endif /* ! __SH5__ */
diff --git a/gcc-4.9/libgcc/config/sh/crti.S b/gcc-4.9/libgcc/config/sh/crti.S
new file mode 100644
index 000000000..550f63758
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/crti.S
@@ -0,0 +1,125 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file was adapted from glibc sources.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* The code in sections .init and .fini is supposed to be a single
+   regular function.  The function in .init is called directly from
+   start in crt1.S.  The function in .fini is atexit()ed in crt1.S
+   too.
+
+   crti.S contributes the prologue of a function to these sections,
+   and crtn.S comes up the epilogue.  STARTFILE_SPEC should list
+   crti.o before any other object files that might add code to .init
+   or .fini sections, and ENDFILE_SPEC should list crtn.o after any
+   such object files.  */
+
+	.section .init
+/* The alignment below can't be smaller, otherwise the mova below
+   breaks.  Yes, we might align just the label, but then we'd be
+   exchanging an alignment here for one there, since the code fragment
+   below ensures 4-byte alignment on __ELF__.  */
+#ifdef __ELF__
+	.p2align 2
+#else
+	.p2align 1
+#endif
+	.global	 _init
+_init:
+#if __SHMEDIA__
+	addi	r15, -16, r15
+	st.q	r15, 8, r14
+	st.q	r15, 0, r18
+	add	r15, r63, r14
+#elif __SH5__ && ! __SHMEDIA__
+	mov	r15,r0
+	add	#-8,r15
+	mov.l	r14,@-r0
+	sts.l	pr,@-r0
+	mov	r15,r14
+	nop
+#else
+#ifdef __ELF__
+	mov.l	r12,@-r15
+	mova	0f,r0
+	mov.l	0f,r12
+#endif
+	mov.l	r14,@-r15
+#ifdef __ELF__
+	add	r0,r12
+#endif
+	sts.l	pr,@-r15
+#ifdef __ELF__
+	bra	1f
+#endif
+	mov	r15,r14
+#ifdef __ELF__
+0:	.long	_GLOBAL_OFFSET_TABLE_
+1:
+#endif
+#endif /* __SHMEDIA__ */
+
+	.section .fini
+/* The alignment below can't be smaller, otherwise the mova below
+   breaks.  Yes, we might align just the label, but then we'd be
+   exchanging an alignment here for one there, since the code fragment
+   below ensures 4-byte alignment on __ELF__.  */
+#ifdef __ELF__
+	.p2align 2
+#else
+	.p2align 1
+#endif
+	.global  _fini
+_fini:	
+#if __SHMEDIA__
+	addi	r15, -16, r15
+	st.q	r15, 8, r14
+	st.q	r15, 0, r18
+	add	r15, r63, r14
+#elif __SH5__ && ! __SHMEDIA__
+	mov	r15,r0
+	add	#-8,r15
+	mov.l	r14,@-r0
+	sts.l	pr,@-r0
+	mov	r15,r14
+	nop
+#else
+#ifdef __ELF__
+	mov.l	r12,@-r15
+	mova	0f,r0
+	mov.l	0f,r12
+#endif
+	mov.l	r14,@-r15
+#ifdef __ELF__
+	add	r0,r12
+#endif
+	sts.l	pr,@-r15
+#ifdef __ELF__
+	bra	1f
+#endif
+	mov	r15,r14
+#ifdef __ELF__
+0:	.long	_GLOBAL_OFFSET_TABLE_
+1:
+#endif
+#endif /* __SHMEDIA__ */
diff --git a/gcc-4.9/libgcc/config/sh/crtn.S b/gcc-4.9/libgcc/config/sh/crtn.S
new file mode 100644
index 000000000..9d7c4eb65
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/crtn.S
@@ -0,0 +1,77 @@
+/* Copyright (C) 2000-2014 Free Software Foundation, Inc.
+   This file was adapted from glibc sources.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* See an explanation about .init and .fini in crti.S.  */
+
+	.section .init
+#if __SHMEDIA__
+	add	r14, r63, r15
+	ld.q	r15, 0, r18
+	ptabs	r18, tr0
+	ld.q	r15, 8, r14
+	addi	r15, 16, r15
+	blink	tr0, r63
+#elif __SH5__ && ! __SHMEDIA__
+	mov	r14,r15
+	lds.l	@r14+,pr
+	mov.l	@r14,r14
+	rts
+	add	#8,r15
+#else
+	mov	r14,r15
+	lds.l	@r15+,pr
+	mov.l	@r15+,r14
+	rts
+#ifdef __ELF__
+	mov.l	@r15+,r12
+#else
+	nop
+#endif
+#endif /* __SHMEDIA__ */
+
+	.section .fini
+#if __SHMEDIA__
+	add	r14, r63, r15
+	ld.q	r15, 0, r18
+	ptabs	r18, tr0
+	ld.q	r15, 8, r14
+	addi	r15, 16, r15
+	blink	tr0, r63
+#elif __SH5__ && ! __SHMEDIA__
+	mov	r14,r15
+	lds.l	@r14+,pr
+	mov.l	@r14,r14
+	rts
+	add	#8,r15
+#else
+	mov	r14,r15
+	lds.l	@r15+,pr
+	mov.l	@r15+,r14
+	rts
+#ifdef __ELF__
+	mov.l	@r15+,r12
+#else
+	nop
+#endif
+#endif /* __SHMEDIA__ */
diff --git a/gcc-4.9/libgcc/config/sh/lib1funcs-4-300.S b/gcc-4.9/libgcc/config/sh/lib1funcs-4-300.S
new file mode 100644
index 000000000..5f05b0812
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/lib1funcs-4-300.S
@@ -0,0 +1,936 @@
+/* Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* libgcc routines for the STMicroelectronics ST40-300 CPU.
+   Contributed by J"orn Rennecke joern.rennecke@st.com.  */
+
+#include "lib1funcs.h"
+
+#if !__SHMEDIA__
+#ifdef L_div_table
+#if defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
+/* This code used shld, thus is not suitable for SH1 / SH2.  */
+
+/* Signed / unsigned division without use of FPU, optimized for SH4-300.
+   Uses a lookup table for divisors in the range -128 .. +127, and
+   div1 with case distinction for larger divisors in three more ranges.
+   The code is lumped together with the table to allow the use of mova.  */
+#ifdef __LITTLE_ENDIAN__
+#define L_LSB 0
+#define L_LSWMSB 1
+#define L_MSWLSB 2
+#else
+#define L_LSB 3
+#define L_LSWMSB 2
+#define L_MSWLSB 1
+#endif
+
+	.global	GLOBAL(udivsi3_i4i)
+	.global	GLOBAL(sdivsi3_i4i)
+	FUNC(GLOBAL(udivsi3_i4i))
+	FUNC(GLOBAL(sdivsi3_i4i))
+
+	.balign 4
+LOCAL(div_ge8m): ! 10 cycles up to here
+	rotcr r1 ! signed shift must use original sign from r4
+	div0s r5,r4
+	mov #24,r7
+	shld r7,r6
+	shad r0,r1
+	rotcl r6
+	div1 r5,r1
+	swap.w r5,r0 ! detect -0x80000000 : 0x800000
+	rotcl r6
+	swap.w r4,r7
+	div1 r5,r1
+	swap.b r7,r7
+	rotcl r6
+	or r7,r0
+	div1 r5,r1
+	swap.w r0,r7
+	rotcl r6
+	or r7,r0
+	div1 r5,r1
+	add #-0x80,r0
+	rotcl r6
+	extu.w r0,r0
+	div1 r5,r1
+	neg r0,r0
+	rotcl r6
+	swap.w r0,r0
+	div1 r5,r1
+	mov.l @r15+,r7
+	and r6,r0
+	rotcl r6
+	div1 r5,r1
+	shll2 r0
+	rotcl r6
+	exts.b r0,r0
+	div1 r5,r1
+	swap.w r0,r0
+	exts.w r0,r1
+	exts.b r6,r0
+	mov.l @r15+,r6
+	rotcl r0
+	rts
+	sub r1,r0
+	! 31 cycles up to here
+
+	.balign 4
+LOCAL(udiv_ge64k): ! 3 cycles up to here
+	mov r4,r0
+	shlr8 r0
+	div0u
+	cmp/hi r0,r5
+	bt LOCAL(udiv_r8)
+	mov.l r5,@-r15
+	shll8 r5
+	! 7 cycles up to here
+	.rept 8
+	div1 r5,r0
+	.endr
+	extu.b r4,r1 ! 15 cycles up to here
+	extu.b r0,r6
+	xor r1,r0
+	xor r6,r0
+	swap.b r6,r6
+	.rept 8
+	div1 r5,r0
+	.endr ! 25 cycles up to here
+	extu.b r0,r0
+	mov.l @r15+,r5
+	or r6,r0
+	mov.l @r15+,r6
+	rts
+	rotcl r0 ! 28 cycles up to here
+
+	.balign 4
+LOCAL(udiv_r8): ! 6 cycles up to here
+	mov.l r4,@-r15
+	shll16 r4
+	shll8 r4
+	!
+	shll r4
+	mov r0,r1
+	div1 r5,r1
+	mov r4,r0
+	rotcl r0
+	mov.l @r15+,r4
+	div1 r5,r1
+	! 12 cycles up to here
+	.rept 6
+	rotcl r0; div1 r5,r1
+	.endr
+	mov.l @r15+,r6 ! 24 cycles up to here
+	rts
+	rotcl r0
+
+	.balign 4
+LOCAL(div_ge32k): ! 6 cycles up to here
+	mov.l r7,@-r15
+	swap.w r5,r6
+	exts.b r6,r7
+	exts.w r6,r6
+	cmp/eq r6,r7
+	extu.b r1,r6
+	bf/s LOCAL(div_ge8m)
+	cmp/hi r1,r4 ! copy sign bit of r4 into T
+	rotcr r1 ! signed shift must use original sign from r4
+	div0s r5,r4
+	shad r0,r1
+	shll8 r5
+	div1 r5,r1
+	mov r5,r7 ! detect r4 == 0x80000000 && r5 == 0x8000(00)
+	div1 r5,r1
+	shlr8 r7
+	div1 r5,r1
+	swap.w r4,r0
+	div1 r5,r1
+	swap.b r0,r0
+	div1 r5,r1
+	or r0,r7
+	div1 r5,r1
+	add #-80,r7
+	div1 r5,r1
+	swap.w r7,r0
+	div1 r5,r1
+	or r0,r7
+	extu.b r1,r0
+	xor r6,r1
+	xor r0,r1
+	exts.b r0,r0
+	div1 r5,r1
+	extu.w r7,r7
+	div1 r5,r1
+	neg r7,r7 ! upper 16 bit of r7 == 0 if r4 == 0x80000000 && r5 == 0x8000
+	div1 r5,r1
+	and r0,r7
+	div1 r5,r1
+	swap.w r7,r7 ! 26 cycles up to here.
+	div1 r5,r1
+	shll8 r0
+	div1 r5,r1
+	exts.w r7,r7
+	div1 r5,r1
+	add r0,r0
+	div1 r5,r1
+	sub r7,r0
+	extu.b r1,r1
+	mov.l @r15+,r7
+	rotcl r1
+	mov.l @r15+,r6
+	add r1,r0
+	mov #-8,r1
+	rts
+	shad r1,r5 ! 34 cycles up to here
+
+	.balign 4
+GLOBAL(udivsi3_i4i):
+	mov.l r6,@-r15
+	extu.w r5,r6
+	cmp/eq r5,r6
+	mov #0x7f,r0
+	bf LOCAL(udiv_ge64k)
+	cmp/hi r0,r5
+	bf LOCAL(udiv_le128)
+	mov r4,r1
+	shlr8 r1
+	div0u
+	shlr r1
+	shll16 r6
+	div1 r6,r1
+	extu.b r4,r0 ! 7 cycles up to here
+	.rept 8
+	div1 r6,r1
+	.endr     ! 15 cycles up to here
+	xor r1,r0 ! xor dividend with result lsb
+	.rept 6
+	div1 r6,r1
+	.endr
+	mov.l r7,@-r15 ! 21 cycles up to here
+	div1 r6,r1
+	extu.b r0,r7
+	div1 r6,r1
+	shll8 r7
+	extu.w r1,r0
+	xor r7,r1 ! replace lsb of result with lsb of dividend
+	div1 r6,r1
+	mov #0,r7
+	div1 r6,r1
+	!
+	div1 r6,r1
+	bra LOCAL(div_end)
+	div1 r6,r1 ! 28 cycles up to here
+
+	/* This is link-compatible with a GLOBAL(sdivsi3) call,
+	   but we effectively clobber only r1, macl and mach  */
+        /* Because negative quotients are calculated as one's complements,
+	   -0x80000000 divided by the smallest positive number of a number
+	   range (0x80, 0x8000, 0x800000) causes saturation in the one's
+           complement representation, and we have to suppress the
+	   one's -> two's complement adjustment.  Since positive numbers
+	   don't get such an adjustment, it's OK to also compute one's -> two's
+	   complement adjustment suppression for a dividend of 0.  */
+	.balign 4
+GLOBAL(sdivsi3_i4i):
+	mov.l r6,@-r15
+	exts.b r5,r6
+	cmp/eq r5,r6
+	mov #-1,r1
+	bt/s LOCAL(div_le128)
+	cmp/pz r4
+	addc r4,r1
+	exts.w r5,r6
+	cmp/eq r5,r6
+	mov #-7,r0
+	bf/s LOCAL(div_ge32k)
+	cmp/hi r1,r4 ! copy sign bit of r4 into T
+	rotcr r1
+	shll16 r6  ! 7 cycles up to here
+	shad r0,r1
+	div0s r5,r4
+	div1 r6,r1
+	mov.l r7,@-r15
+	div1 r6,r1
+	mov r4,r0 ! re-compute adjusted dividend
+	div1 r6,r1
+	mov #-31,r7
+	div1 r6,r1
+	shad r7,r0
+	div1 r6,r1
+	add r4,r0 ! adjusted dividend
+	div1 r6,r1
+	mov.l r8,@-r15
+	div1 r6,r1
+	swap.w r4,r8 ! detect special case r4 = 0x80000000, r5 = 0x80
+	div1 r6,r1
+	swap.b r8,r8
+	xor r1,r0 ! xor dividend with result lsb
+	div1 r6,r1
+	div1 r6,r1
+	or r5,r8
+	div1 r6,r1
+	add #-0x80,r8 ! r8 is 0 iff there is a match
+	div1 r6,r1
+	swap.w r8,r7 ! or upper 16 bits...
+	div1 r6,r1
+	or r7,r8 !...into lower 16 bits
+	div1 r6,r1
+	extu.w r8,r8
+	div1 r6,r1
+	extu.b r0,r7
+	div1 r6,r1
+	shll8 r7
+	exts.w r1,r0
+	xor r7,r1 ! replace lsb of result with lsb of dividend
+	div1 r6,r1
+	neg r8,r8 ! upper 16 bits of r8 are now 0xffff iff we want end adjm.
+	div1 r6,r1
+	and r0,r8
+	div1 r6,r1
+	swap.w r8,r7
+	div1 r6,r1
+	mov.l @r15+,r8 ! 58 insns, 29 cycles up to here
+LOCAL(div_end):
+	div1 r6,r1
+	shll8 r0
+	div1 r6,r1
+	exts.w r7,r7
+	div1 r6,r1
+	add r0,r0
+	div1 r6,r1
+	sub r7,r0
+	extu.b r1,r1
+	mov.l @r15+,r7
+	rotcl r1
+	mov.l @r15+,r6
+	rts
+	add r1,r0
+
+	.balign 4
+LOCAL(udiv_le128): ! 4 cycles up to here (or 7 for mispredict)
+	mova LOCAL(div_table_inv),r0
+	shll2 r6
+	mov.l @(r0,r6),r1
+	mova LOCAL(div_table_clz),r0
+	lds r4,mach
+	!
+	!
+	!
+	tst r1,r1
+	!
+	bt 0f
+	dmulu.l r1,r4
+0:	mov.b @(r0,r5),r1
+	clrt
+	!
+	!
+	sts mach,r0
+	addc r4,r0
+	rotcr r0
+	mov.l @r15+,r6
+	rts
+	shld r1,r0
+
+	.balign 4
+LOCAL(div_le128): ! 3 cycles up to here (or 6 for mispredict)
+	mova LOCAL(div_table_inv),r0
+	shll2 r6
+	mov.l @(r0,r6),r1
+	mova LOCAL(div_table_clz),r0
+	neg r4,r6
+	bf 0f
+	mov r4,r6
+0:	lds r6,mach
+	tst r1,r1
+	bt 0f
+	dmulu.l r1,r6
+0:	div0s r4,r5
+	mov.b @(r0,r5),r1
+	bt/s LOCAL(le128_neg)
+	clrt
+	!
+	sts mach,r0
+	addc r6,r0
+	rotcr r0
+	mov.l @r15+,r6
+	rts
+	shld r1,r0
+
+/* Could trap divide by zero for the cost of one cycle more mispredict penalty:
+...
+	dmulu.l r1,r6
+0:	div0s r4,r5
+	bt/s LOCAL(le128_neg)
+	tst r5,r5
+	bt LOCAL(div_by_zero)
+	mov.b @(r0,r5),r1
+	sts mach,r0
+	addc r6,r0
+...
+LOCAL(div_by_zero):
+	trapa #
+	.balign 4
+LOCAL(le128_neg):
+	bt LOCAL(div_by_zero)
+	mov.b @(r0,r5),r1
+	sts mach,r0
+	addc r6,r0
+...  */
+
+	.balign 4
+LOCAL(le128_neg):
+	sts mach,r0
+	addc r6,r0
+	rotcr r0
+	mov.l @r15+,r6
+	shad r1,r0
+	rts
+	neg r0,r0
+	ENDFUNC(GLOBAL(udivsi3_i4i))
+	ENDFUNC(GLOBAL(sdivsi3_i4i))
+
+/* This table has been generated by divtab-sh4.c.  */
+	.balign 4
+	.byte	-7
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-1
+	.byte	-1
+	.byte	0
+LOCAL(div_table_clz):
+	.byte	0
+	.byte	0
+	.byte	-1
+	.byte	-1
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+/* 1/-128 .. 1/127, normalized.  There is an implicit leading 1 in bit 32,
+   or in bit 33 for powers of two.  */
+	.balign 4
+	.long   0x0
+	.long	0x2040811
+	.long	0x4104105
+	.long	0x624DD30
+	.long	0x8421085
+	.long	0xA6810A7
+	.long	0xC9714FC
+	.long	0xECF56BF
+	.long	0x11111112
+	.long	0x135C8114
+	.long	0x15B1E5F8
+	.long	0x18118119
+	.long	0x1A7B9612
+	.long	0x1CF06ADB
+	.long	0x1F7047DD
+	.long	0x21FB7813
+	.long	0x24924925
+	.long	0x27350B89
+	.long	0x29E4129F
+	.long	0x2C9FB4D9
+	.long	0x2F684BDB
+	.long	0x323E34A3
+	.long	0x3521CFB3
+	.long	0x38138139
+	.long	0x3B13B13C
+	.long	0x3E22CBCF
+	.long	0x41414142
+	.long	0x446F8657
+	.long	0x47AE147B
+	.long	0x4AFD6A06
+	.long	0x4E5E0A73
+	.long	0x51D07EAF
+	.long	0x55555556
+	.long	0x58ED2309
+	.long	0x5C9882BA
+	.long	0x60581606
+	.long	0x642C8591
+	.long	0x68168169
+	.long	0x6C16C16D
+	.long	0x702E05C1
+	.long	0x745D1746
+	.long	0x78A4C818
+	.long	0x7D05F418
+	.long	0x81818182
+	.long	0x86186187
+	.long	0x8ACB90F7
+	.long	0x8F9C18FA
+	.long	0x948B0FCE
+	.long	0x9999999A
+	.long	0x9EC8E952
+	.long	0xA41A41A5
+	.long	0xA98EF607
+	.long	0xAF286BCB
+	.long	0xB4E81B4F
+	.long	0xBACF914D
+	.long	0xC0E07039
+	.long	0xC71C71C8
+	.long	0xCD856891
+	.long	0xD41D41D5
+	.long	0xDAE6076C
+	.long	0xE1E1E1E2
+	.long	0xE9131AC0
+	.long	0xF07C1F08
+	.long	0xF81F81F9
+	.long	0x0
+	.long	0x4104105
+	.long	0x8421085
+	.long	0xC9714FC
+	.long	0x11111112
+	.long	0x15B1E5F8
+	.long	0x1A7B9612
+	.long	0x1F7047DD
+	.long	0x24924925
+	.long	0x29E4129F
+	.long	0x2F684BDB
+	.long	0x3521CFB3
+	.long	0x3B13B13C
+	.long	0x41414142
+	.long	0x47AE147B
+	.long	0x4E5E0A73
+	.long	0x55555556
+	.long	0x5C9882BA
+	.long	0x642C8591
+	.long	0x6C16C16D
+	.long	0x745D1746
+	.long	0x7D05F418
+	.long	0x86186187
+	.long	0x8F9C18FA
+	.long	0x9999999A
+	.long	0xA41A41A5
+	.long	0xAF286BCB
+	.long	0xBACF914D
+	.long	0xC71C71C8
+	.long	0xD41D41D5
+	.long	0xE1E1E1E2
+	.long	0xF07C1F08
+	.long	0x0
+	.long	0x8421085
+	.long	0x11111112
+	.long	0x1A7B9612
+	.long	0x24924925
+	.long	0x2F684BDB
+	.long	0x3B13B13C
+	.long	0x47AE147B
+	.long	0x55555556
+	.long	0x642C8591
+	.long	0x745D1746
+	.long	0x86186187
+	.long	0x9999999A
+	.long	0xAF286BCB
+	.long	0xC71C71C8
+	.long	0xE1E1E1E2
+	.long	0x0
+	.long	0x11111112
+	.long	0x24924925
+	.long	0x3B13B13C
+	.long	0x55555556
+	.long	0x745D1746
+	.long	0x9999999A
+	.long	0xC71C71C8
+	.long	0x0
+	.long	0x24924925
+	.long	0x55555556
+	.long	0x9999999A
+	.long	0x0
+	.long	0x55555556
+	.long	0x0
+	.long	0x0
+LOCAL(div_table_inv):
+	.long	0x0
+	.long	0x0
+	.long	0x0
+	.long	0x55555556
+	.long	0x0
+	.long	0x9999999A
+	.long	0x55555556
+	.long	0x24924925
+	.long	0x0
+	.long	0xC71C71C8
+	.long	0x9999999A
+	.long	0x745D1746
+	.long	0x55555556
+	.long	0x3B13B13C
+	.long	0x24924925
+	.long	0x11111112
+	.long	0x0
+	.long	0xE1E1E1E2
+	.long	0xC71C71C8
+	.long	0xAF286BCB
+	.long	0x9999999A
+	.long	0x86186187
+	.long	0x745D1746
+	.long	0x642C8591
+	.long	0x55555556
+	.long	0x47AE147B
+	.long	0x3B13B13C
+	.long	0x2F684BDB
+	.long	0x24924925
+	.long	0x1A7B9612
+	.long	0x11111112
+	.long	0x8421085
+	.long	0x0
+	.long	0xF07C1F08
+	.long	0xE1E1E1E2
+	.long	0xD41D41D5
+	.long	0xC71C71C8
+	.long	0xBACF914D
+	.long	0xAF286BCB
+	.long	0xA41A41A5
+	.long	0x9999999A
+	.long	0x8F9C18FA
+	.long	0x86186187
+	.long	0x7D05F418
+	.long	0x745D1746
+	.long	0x6C16C16D
+	.long	0x642C8591
+	.long	0x5C9882BA
+	.long	0x55555556
+	.long	0x4E5E0A73
+	.long	0x47AE147B
+	.long	0x41414142
+	.long	0x3B13B13C
+	.long	0x3521CFB3
+	.long	0x2F684BDB
+	.long	0x29E4129F
+	.long	0x24924925
+	.long	0x1F7047DD
+	.long	0x1A7B9612
+	.long	0x15B1E5F8
+	.long	0x11111112
+	.long	0xC9714FC
+	.long	0x8421085
+	.long	0x4104105
+	.long	0x0
+	.long	0xF81F81F9
+	.long	0xF07C1F08
+	.long	0xE9131AC0
+	.long	0xE1E1E1E2
+	.long	0xDAE6076C
+	.long	0xD41D41D5
+	.long	0xCD856891
+	.long	0xC71C71C8
+	.long	0xC0E07039
+	.long	0xBACF914D
+	.long	0xB4E81B4F
+	.long	0xAF286BCB
+	.long	0xA98EF607
+	.long	0xA41A41A5
+	.long	0x9EC8E952
+	.long	0x9999999A
+	.long	0x948B0FCE
+	.long	0x8F9C18FA
+	.long	0x8ACB90F7
+	.long	0x86186187
+	.long	0x81818182
+	.long	0x7D05F418
+	.long	0x78A4C818
+	.long	0x745D1746
+	.long	0x702E05C1
+	.long	0x6C16C16D
+	.long	0x68168169
+	.long	0x642C8591
+	.long	0x60581606
+	.long	0x5C9882BA
+	.long	0x58ED2309
+	.long	0x55555556
+	.long	0x51D07EAF
+	.long	0x4E5E0A73
+	.long	0x4AFD6A06
+	.long	0x47AE147B
+	.long	0x446F8657
+	.long	0x41414142
+	.long	0x3E22CBCF
+	.long	0x3B13B13C
+	.long	0x38138139
+	.long	0x3521CFB3
+	.long	0x323E34A3
+	.long	0x2F684BDB
+	.long	0x2C9FB4D9
+	.long	0x29E4129F
+	.long	0x27350B89
+	.long	0x24924925
+	.long	0x21FB7813
+	.long	0x1F7047DD
+	.long	0x1CF06ADB
+	.long	0x1A7B9612
+	.long	0x18118119
+	.long	0x15B1E5F8
+	.long	0x135C8114
+	.long	0x11111112
+	.long	0xECF56BF
+	.long	0xC9714FC
+	.long	0xA6810A7
+	.long	0x8421085
+	.long	0x624DD30
+	.long	0x4104105
+	.long	0x2040811
+	/* maximum error: 0.987342 scaled: 0.921875*/
+
+#endif /* SH3 / SH4 */
+
+#endif /* L_div_table */
+#endif /* !__SHMEDIA__ */
diff --git a/gcc-4.9/libgcc/config/sh/lib1funcs-Os-4-200.S b/gcc-4.9/libgcc/config/sh/lib1funcs-Os-4-200.S
new file mode 100644
index 000000000..f541c81b1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/lib1funcs-Os-4-200.S
@@ -0,0 +1,322 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Moderately Space-optimized libgcc routines for the Renesas SH /
+   STMicroelectronics ST40 CPUs.
+   Contributed by J"orn Rennecke joern.rennecke@st.com.  */
+
+#include "lib1funcs.h"
+
+#if !__SHMEDIA__
+#ifdef L_udivsi3_i4i
+
+/* 88 bytes; sh4-200 cycle counts:
+   divisor  >= 2G: 11 cycles
+   dividend <  2G: 48 cycles
+   dividend >= 2G: divisor != 1: 54 cycles
+   dividend >= 2G, divisor == 1: 22 cycles */
+#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
+!! args in r4 and r5, result in r0, clobber r1
+
+	.global GLOBAL(udivsi3_i4i)
+	FUNC(GLOBAL(udivsi3_i4i))
+GLOBAL(udivsi3_i4i):
+	mova L1,r0
+	cmp/pz r5
+	sts fpscr,r1
+	lds.l @r0+,fpscr
+	sts.l fpul,@-r15
+	bf LOCAL(huge_divisor)
+	mov.l r1,@-r15
+	lds r4,fpul
+	cmp/pz r4
+#ifdef FMOVD_WORKS
+	fmov.d dr0,@-r15
+	float fpul,dr0
+	fmov.d dr2,@-r15
+	bt LOCAL(dividend_adjusted)
+	mov #1,r1
+	fmov.d @r0,dr2
+	cmp/eq r1,r5
+	bt LOCAL(div_by_1)
+	fadd dr2,dr0
+LOCAL(dividend_adjusted):
+	lds r5,fpul
+	float fpul,dr2
+	fdiv dr2,dr0
+LOCAL(div_by_1):
+	fmov.d @r15+,dr2
+	ftrc dr0,fpul
+	fmov.d @r15+,dr0
+#else /* !FMOVD_WORKS */
+	fmov.s DR01,@-r15
+	mov #1,r1
+	fmov.s DR00,@-r15
+	float fpul,dr0
+	fmov.s DR21,@-r15
+	bt/s LOCAL(dividend_adjusted)
+	fmov.s DR20,@-r15
+	cmp/eq r1,r5
+	bt LOCAL(div_by_1)
+	fmov.s @r0+,DR20
+	fmov.s @r0,DR21
+	fadd dr2,dr0
+LOCAL(dividend_adjusted):
+	lds r5,fpul
+	float fpul,dr2
+	fdiv dr2,dr0
+LOCAL(div_by_1):
+	fmov.s @r15+,DR20
+	fmov.s @r15+,DR21
+	ftrc dr0,fpul
+	fmov.s @r15+,DR00
+	fmov.s @r15+,DR01
+#endif /* !FMOVD_WORKS */
+	lds.l @r15+,fpscr
+	sts fpul,r0
+	rts
+	lds.l @r15+,fpul
+
+#ifdef FMOVD_WORKS
+	.p2align 3        ! make double below 8 byte aligned.
+#endif
+LOCAL(huge_divisor):
+	lds r1,fpscr
+	add #4,r15
+	cmp/hs r5,r4
+	rts
+	movt r0
+
+	.p2align 2
+L1:
+#ifndef FMOVD_WORKS
+	.long 0x80000
+#else
+	.long 0x180000
+#endif
+	.double 4294967296
+
+	ENDFUNC(GLOBAL(udivsi3_i4i))
+#elif !defined (__sh1__)  /* !__SH_FPU_DOUBLE__ */
+
+#if 0
+/* With 36 bytes, the following would probably be the most compact
+   implementation, but with 139 cycles on an sh4-200, it is extremely slow.  */
+GLOBAL(udivsi3_i4i):
+	mov.l r2,@-r15
+	mov #0,r1
+	div0u
+	mov r1,r2
+	mov.l r3,@-r15
+	mov r1,r3
+	sett
+	mov r4,r0
+LOCAL(loop):
+	rotcr r2
+	;
+	bt/s LOCAL(end)
+	cmp/gt r2,r3
+	rotcl r0
+	bra LOCAL(loop)
+	div1 r5,r1
+LOCAL(end):
+	rotcl r0
+	mov.l @r15+,r3
+	rts
+	mov.l @r15+,r2
+#endif /* 0 */
+
+/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
+   sh4-200 run times:
+   udiv small divisor: 55 cycles
+   udiv large divisor: 52 cycles
+   sdiv small divisor, positive result: 59 cycles
+   sdiv large divisor, positive result: 56 cycles
+   sdiv small divisor, negative result: 65 cycles (*)
+   sdiv large divisor, negative result: 62 cycles (*)
+   (*): r2 is restored in the rts delay slot and has a lingering latency
+        of two more cycles.  */
+	.balign 4
+	.global	GLOBAL(udivsi3_i4i)
+	FUNC(GLOBAL(udivsi3_i4i))
+	FUNC(GLOBAL(sdivsi3_i4i))
+GLOBAL(udivsi3_i4i):
+	sts pr,r1
+	mov.l r4,@-r15
+	extu.w r5,r0
+	cmp/eq r5,r0
+	swap.w r4,r0
+	shlr16 r4
+	bf/s LOCAL(large_divisor)
+	div0u
+	mov.l r5,@-r15
+	shll16 r5
+LOCAL(sdiv_small_divisor):
+	div1 r5,r4
+	bsr LOCAL(div6)
+	div1 r5,r4
+	div1 r5,r4
+	bsr LOCAL(div6)
+	div1 r5,r4
+	xtrct r4,r0
+	xtrct r0,r4
+	bsr LOCAL(div7)
+	swap.w r4,r4
+	div1 r5,r4
+	bsr LOCAL(div7)
+	div1 r5,r4
+	xtrct r4,r0
+	mov.l @r15+,r5
+	swap.w r0,r0
+	mov.l @r15+,r4
+	jmp @r1
+	rotcl r0
+LOCAL(div7):
+	div1 r5,r4
+LOCAL(div6):
+	            div1 r5,r4; div1 r5,r4; div1 r5,r4
+	div1 r5,r4; div1 r5,r4; rts;        div1 r5,r4
+
+LOCAL(divx3):
+	rotcl r0
+	div1 r5,r4
+	rotcl r0
+	div1 r5,r4
+	rotcl r0
+	rts
+	div1 r5,r4
+
+LOCAL(large_divisor):
+	mov.l r5,@-r15
+LOCAL(sdiv_large_divisor):
+	xor r4,r0
+	.rept 4
+	rotcl r0
+	bsr LOCAL(divx3)
+	div1 r5,r4
+	.endr
+	mov.l @r15+,r5
+	mov.l @r15+,r4
+	jmp @r1
+	rotcl r0
+	ENDFUNC(GLOBAL(udivsi3_i4i))
+
+	.global	GLOBAL(sdivsi3_i4i)
+GLOBAL(sdivsi3_i4i):
+	mov.l r4,@-r15
+	cmp/pz r5
+	mov.l r5,@-r15
+	bt/s LOCAL(pos_divisor)
+	cmp/pz r4
+	neg r5,r5
+	extu.w r5,r0
+	bt/s LOCAL(neg_result)
+	cmp/eq r5,r0
+	neg r4,r4
+LOCAL(pos_result):
+	swap.w r4,r0
+	bra LOCAL(sdiv_check_divisor)
+	sts pr,r1
+LOCAL(pos_divisor):
+	extu.w r5,r0
+	bt/s LOCAL(pos_result)
+	cmp/eq r5,r0
+	neg r4,r4
+LOCAL(neg_result):
+	mova LOCAL(negate_result),r0
+	;
+	mov r0,r1
+	swap.w r4,r0
+	lds r2,macl
+	sts pr,r2
+LOCAL(sdiv_check_divisor):
+	shlr16 r4
+	bf/s LOCAL(sdiv_large_divisor)
+	div0u
+	bra LOCAL(sdiv_small_divisor)
+	shll16 r5
+	.balign 4
+LOCAL(negate_result):
+	neg r0,r0
+	jmp @r2
+	sts macl,r2
+	ENDFUNC(GLOBAL(sdivsi3_i4i))
+#endif /* !__SH_FPU_DOUBLE__ */
+#endif /* L_udivsi3_i4i */
+
+#ifdef L_sdivsi3_i4i
+#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__)
+/* 48 bytes, 45 cycles on sh4-200  */
+!! args in r4 and r5, result in r0, clobber r1
+
+	.global GLOBAL(sdivsi3_i4i)
+	FUNC(GLOBAL(sdivsi3_i4i))
+GLOBAL(sdivsi3_i4i):
+	sts.l fpscr,@-r15
+	sts fpul,r1
+	mova L1,r0
+	lds.l @r0+,fpscr
+	lds r4,fpul
+#ifdef FMOVD_WORKS
+	fmov.d dr0,@-r15
+	float fpul,dr0
+	lds r5,fpul
+	fmov.d dr2,@-r15
+#else
+	fmov.s DR01,@-r15
+	fmov.s DR00,@-r15
+	float fpul,dr0
+	lds r5,fpul
+	fmov.s DR21,@-r15
+	fmov.s DR20,@-r15
+#endif
+	float fpul,dr2
+	fdiv dr2,dr0
+#ifdef FMOVD_WORKS
+	fmov.d @r15+,dr2
+#else
+	fmov.s @r15+,DR20
+	fmov.s @r15+,DR21
+#endif
+	ftrc dr0,fpul
+#ifdef FMOVD_WORKS
+	fmov.d @r15+,dr0
+#else
+	fmov.s @r15+,DR00
+	fmov.s @r15+,DR01
+#endif
+	lds.l @r15+,fpscr
+	sts fpul,r0
+	rts
+	lds r1,fpul
+
+	.p2align 2
+L1:
+#ifndef FMOVD_WORKS
+	.long 0x80000
+#else
+	.long 0x180000
+#endif
+
+	ENDFUNC(GLOBAL(sdivsi3_i4i))
+#endif /* __SH_FPU_DOUBLE__ */
+#endif /* L_sdivsi3_i4i */
+#endif /* !__SHMEDIA__ */
diff --git a/gcc-4.9/libgcc/config/sh/lib1funcs.S b/gcc-4.9/libgcc/config/sh/lib1funcs.S
new file mode 100644
index 000000000..3410cf7c1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/lib1funcs.S
@@ -0,0 +1,4047 @@
+/* Copyright (C) 1994-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+!! libgcc routines for the Renesas / SuperH SH CPUs.
+!! Contributed by Steve Chamberlain.
+!! sac@cygnus.com
+
+!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
+!! recoded in assembly by Toshiyasu Morita
+!! tm@netcom.com
+
+#if defined(__ELF__) && defined(__linux__)
+.section .note.GNU-stack,"",%progbits
+.previous
+#endif
+
+/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
+   ELF local label prefixes by J"orn Rennecke
+   amylaar@cygnus.com  */
+
+#include "lib1funcs.h"
+
+/* t-vxworks needs to build both PIC and non-PIC versions of libgcc,
+   so it is more convenient to define NO_FPSCR_VALUES here than to
+   define it on the command line.  */
+#if defined __vxworks && defined __PIC__
+#define NO_FPSCR_VALUES
+#endif
+	
+#if ! __SH5__
+#ifdef L_ashiftrt
+	.global	GLOBAL(ashiftrt_r4_0)
+	.global	GLOBAL(ashiftrt_r4_1)
+	.global	GLOBAL(ashiftrt_r4_2)
+	.global	GLOBAL(ashiftrt_r4_3)
+	.global	GLOBAL(ashiftrt_r4_4)
+	.global	GLOBAL(ashiftrt_r4_5)
+	.global	GLOBAL(ashiftrt_r4_6)
+	.global	GLOBAL(ashiftrt_r4_7)
+	.global	GLOBAL(ashiftrt_r4_8)
+	.global	GLOBAL(ashiftrt_r4_9)
+	.global	GLOBAL(ashiftrt_r4_10)
+	.global	GLOBAL(ashiftrt_r4_11)
+	.global	GLOBAL(ashiftrt_r4_12)
+	.global	GLOBAL(ashiftrt_r4_13)
+	.global	GLOBAL(ashiftrt_r4_14)
+	.global	GLOBAL(ashiftrt_r4_15)
+	.global	GLOBAL(ashiftrt_r4_16)
+	.global	GLOBAL(ashiftrt_r4_17)
+	.global	GLOBAL(ashiftrt_r4_18)
+	.global	GLOBAL(ashiftrt_r4_19)
+	.global	GLOBAL(ashiftrt_r4_20)
+	.global	GLOBAL(ashiftrt_r4_21)
+	.global	GLOBAL(ashiftrt_r4_22)
+	.global	GLOBAL(ashiftrt_r4_23)
+	.global	GLOBAL(ashiftrt_r4_24)
+	.global	GLOBAL(ashiftrt_r4_25)
+	.global	GLOBAL(ashiftrt_r4_26)
+	.global	GLOBAL(ashiftrt_r4_27)
+	.global	GLOBAL(ashiftrt_r4_28)
+	.global	GLOBAL(ashiftrt_r4_29)
+	.global	GLOBAL(ashiftrt_r4_30)
+	.global	GLOBAL(ashiftrt_r4_31)
+	.global	GLOBAL(ashiftrt_r4_32)
+
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_0))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_1))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_2))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_3))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_4))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_5))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_6))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_7))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_8))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_9))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_10))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_11))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_12))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_13))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_14))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_15))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_16))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_17))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_18))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_19))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_20))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_21))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_22))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_23))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_24))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_25))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_26))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_27))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_28))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_29))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_30))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_31))
+	HIDDEN_FUNC(GLOBAL(ashiftrt_r4_32))
+
+	.align	1
+GLOBAL(ashiftrt_r4_32):
+GLOBAL(ashiftrt_r4_31):
+	rotcl	r4
+	rts
+	subc	r4,r4
+
+GLOBAL(ashiftrt_r4_30):
+	shar	r4
+GLOBAL(ashiftrt_r4_29):
+	shar	r4
+GLOBAL(ashiftrt_r4_28):
+	shar	r4
+GLOBAL(ashiftrt_r4_27):
+	shar	r4
+GLOBAL(ashiftrt_r4_26):
+	shar	r4
+GLOBAL(ashiftrt_r4_25):
+	shar	r4
+GLOBAL(ashiftrt_r4_24):
+	shlr16	r4
+	shlr8	r4
+	rts
+	exts.b	r4,r4
+
+GLOBAL(ashiftrt_r4_23):
+	shar	r4
+GLOBAL(ashiftrt_r4_22):
+	shar	r4
+GLOBAL(ashiftrt_r4_21):
+	shar	r4
+GLOBAL(ashiftrt_r4_20):
+	shar	r4
+GLOBAL(ashiftrt_r4_19):
+	shar	r4
+GLOBAL(ashiftrt_r4_18):
+	shar	r4
+GLOBAL(ashiftrt_r4_17):
+	shar	r4
+GLOBAL(ashiftrt_r4_16):
+	shlr16	r4
+	rts
+	exts.w	r4,r4
+
+GLOBAL(ashiftrt_r4_15):
+	shar	r4
+GLOBAL(ashiftrt_r4_14):
+	shar	r4
+GLOBAL(ashiftrt_r4_13):
+	shar	r4
+GLOBAL(ashiftrt_r4_12):
+	shar	r4
+GLOBAL(ashiftrt_r4_11):
+	shar	r4
+GLOBAL(ashiftrt_r4_10):
+	shar	r4
+GLOBAL(ashiftrt_r4_9):
+	shar	r4
+GLOBAL(ashiftrt_r4_8):
+	shar	r4
+GLOBAL(ashiftrt_r4_7):
+	shar	r4
+GLOBAL(ashiftrt_r4_6):
+	shar	r4
+GLOBAL(ashiftrt_r4_5):
+	shar	r4
+GLOBAL(ashiftrt_r4_4):
+	shar	r4
+GLOBAL(ashiftrt_r4_3):
+	shar	r4
+GLOBAL(ashiftrt_r4_2):
+	shar	r4
+GLOBAL(ashiftrt_r4_1):
+	rts
+	shar	r4
+
+GLOBAL(ashiftrt_r4_0):
+	rts
+	nop
+
+	ENDFUNC(GLOBAL(ashiftrt_r4_0))
+	ENDFUNC(GLOBAL(ashiftrt_r4_1))
+	ENDFUNC(GLOBAL(ashiftrt_r4_2))
+	ENDFUNC(GLOBAL(ashiftrt_r4_3))
+	ENDFUNC(GLOBAL(ashiftrt_r4_4))
+	ENDFUNC(GLOBAL(ashiftrt_r4_5))
+	ENDFUNC(GLOBAL(ashiftrt_r4_6))
+	ENDFUNC(GLOBAL(ashiftrt_r4_7))
+	ENDFUNC(GLOBAL(ashiftrt_r4_8))
+	ENDFUNC(GLOBAL(ashiftrt_r4_9))
+	ENDFUNC(GLOBAL(ashiftrt_r4_10))
+	ENDFUNC(GLOBAL(ashiftrt_r4_11))
+	ENDFUNC(GLOBAL(ashiftrt_r4_12))
+	ENDFUNC(GLOBAL(ashiftrt_r4_13))
+	ENDFUNC(GLOBAL(ashiftrt_r4_14))
+	ENDFUNC(GLOBAL(ashiftrt_r4_15))
+	ENDFUNC(GLOBAL(ashiftrt_r4_16))
+	ENDFUNC(GLOBAL(ashiftrt_r4_17))
+	ENDFUNC(GLOBAL(ashiftrt_r4_18))
+	ENDFUNC(GLOBAL(ashiftrt_r4_19))
+	ENDFUNC(GLOBAL(ashiftrt_r4_20))
+	ENDFUNC(GLOBAL(ashiftrt_r4_21))
+	ENDFUNC(GLOBAL(ashiftrt_r4_22))
+	ENDFUNC(GLOBAL(ashiftrt_r4_23))
+	ENDFUNC(GLOBAL(ashiftrt_r4_24))
+	ENDFUNC(GLOBAL(ashiftrt_r4_25))
+	ENDFUNC(GLOBAL(ashiftrt_r4_26))
+	ENDFUNC(GLOBAL(ashiftrt_r4_27))
+	ENDFUNC(GLOBAL(ashiftrt_r4_28))
+	ENDFUNC(GLOBAL(ashiftrt_r4_29))
+	ENDFUNC(GLOBAL(ashiftrt_r4_30))
+	ENDFUNC(GLOBAL(ashiftrt_r4_31))
+	ENDFUNC(GLOBAL(ashiftrt_r4_32))
+#endif
+
+#ifdef L_ashiftrt_n
+
+!
+! GLOBAL(ashrsi3)
+!
+! Entry:
+!
+! r4: Value to shift
+! r5: Shift count
+!
+! Exit:
+!
+! r0: Result
+!
+! Destroys:
+!
+! T bit, r5
+!
+
+	.global	GLOBAL(ashrsi3)
+	HIDDEN_FUNC(GLOBAL(ashrsi3))
+	.align	2
+GLOBAL(ashrsi3):
+	mov	#31,r0
+	and	r0,r5
+	mova	LOCAL(ashrsi3_table),r0
+	mov.b	@(r0,r5),r5
+#ifdef __sh1__
+	add	r5,r0
+	jmp	@r0
+#else
+	braf	r5
+#endif
+	mov	r4,r0
+
+	.align	2
+LOCAL(ashrsi3_table):
+	.byte		LOCAL(ashrsi3_0)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_1)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_2)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_3)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_4)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_5)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_6)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_7)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_8)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_9)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_10)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_11)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_12)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_13)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_14)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_15)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_16)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_17)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_18)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_19)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_20)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_21)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_22)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_23)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_24)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_25)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_26)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_27)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_28)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_29)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_30)-LOCAL(ashrsi3_table)
+	.byte		LOCAL(ashrsi3_31)-LOCAL(ashrsi3_table)
+
+LOCAL(ashrsi3_31):
+	rotcl	r0
+	rts
+	subc	r0,r0
+
+LOCAL(ashrsi3_30):
+	shar	r0
+LOCAL(ashrsi3_29):
+	shar	r0
+LOCAL(ashrsi3_28):
+	shar	r0
+LOCAL(ashrsi3_27):
+	shar	r0
+LOCAL(ashrsi3_26):
+	shar	r0
+LOCAL(ashrsi3_25):
+	shar	r0
+LOCAL(ashrsi3_24):
+	shlr16	r0
+	shlr8	r0
+	rts
+	exts.b	r0,r0
+
+LOCAL(ashrsi3_23):
+	shar	r0
+LOCAL(ashrsi3_22):
+	shar	r0
+LOCAL(ashrsi3_21):
+	shar	r0
+LOCAL(ashrsi3_20):
+	shar	r0
+LOCAL(ashrsi3_19):
+	shar	r0
+LOCAL(ashrsi3_18):
+	shar	r0
+LOCAL(ashrsi3_17):
+	shar	r0
+LOCAL(ashrsi3_16):
+	shlr16	r0
+	rts
+	exts.w	r0,r0
+
+LOCAL(ashrsi3_15):
+	shar	r0
+LOCAL(ashrsi3_14):
+	shar	r0
+LOCAL(ashrsi3_13):
+	shar	r0
+LOCAL(ashrsi3_12):
+	shar	r0
+LOCAL(ashrsi3_11):
+	shar	r0
+LOCAL(ashrsi3_10):
+	shar	r0
+LOCAL(ashrsi3_9):
+	shar	r0
+LOCAL(ashrsi3_8):
+	shar	r0
+LOCAL(ashrsi3_7):
+	shar	r0
+LOCAL(ashrsi3_6):
+	shar	r0
+LOCAL(ashrsi3_5):
+	shar	r0
+LOCAL(ashrsi3_4):
+	shar	r0
+LOCAL(ashrsi3_3):
+	shar	r0
+LOCAL(ashrsi3_2):
+	shar	r0
+LOCAL(ashrsi3_1):
+	rts
+	shar	r0
+
+LOCAL(ashrsi3_0):
+	rts
+	nop
+
+	ENDFUNC(GLOBAL(ashrsi3))
+#endif
+
+#ifdef L_ashiftlt
+
+!
+! GLOBAL(ashlsi3)
+! (For compatibility with older binaries, not used by compiler)
+!
+! Entry:
+!	r4: Value to shift
+!	r5: Shift count
+!
+! Exit:
+!	r0: Result
+!
+! Destroys:
+!	T bit
+!
+!
+! GLOBAL(ashlsi3_r0)
+!
+! Entry:
+!	r4: Value to shift
+!	r0: Shift count
+!
+! Exit:
+!	r0: Result
+!
+! Destroys:
+!	T bit
+
+	.global	GLOBAL(ashlsi3)
+	.global GLOBAL(ashlsi3_r0)
+	HIDDEN_FUNC(GLOBAL(ashlsi3))
+	HIDDEN_FUNC(GLOBAL(ashlsi3_r0))
+GLOBAL(ashlsi3):
+	mov	r5,r0
+	.align	2
+GLOBAL(ashlsi3_r0):
+
+#ifdef __sh1__
+	and	#31,r0
+	shll2	r0
+	mov.l	r4,@-r15
+	mov	r0,r4
+	mova	LOCAL(ashlsi3_table),r0
+	add	r4,r0
+	mov.l	@r15+,r4
+	jmp	@r0
+	mov	r4,r0
+	.align 2
+#else
+	and	#31,r0
+	shll2	r0
+	braf	r0
+	mov	r4,r0
+#endif
+
+LOCAL(ashlsi3_table):
+	rts				// << 0
+	nop
+LOCAL(ashlsi_1):
+	rts				// << 1
+	shll	r0
+LOCAL(ashlsi_2):			// << 2
+	rts
+	shll2	r0
+	bra	LOCAL(ashlsi_1)		// << 3
+	shll2	r0
+	bra	LOCAL(ashlsi_2)		// << 4
+	shll2	r0
+	bra	LOCAL(ashlsi_5)		// << 5
+	shll	r0
+	bra	LOCAL(ashlsi_6)		// << 6
+	shll2	r0
+	bra	LOCAL(ashlsi_7)		// << 7
+	shll	r0
+LOCAL(ashlsi_8):			// << 8
+	rts
+	shll8	r0
+	bra	LOCAL(ashlsi_8)		// << 9
+	shll	r0
+	bra	LOCAL(ashlsi_8)		// << 10
+	shll2	r0
+	bra	LOCAL(ashlsi_11)	// << 11
+	shll	r0
+	bra	LOCAL(ashlsi_12)	// << 12
+	shll2	r0
+	bra	LOCAL(ashlsi_13)	// << 13
+	shll	r0
+	bra	LOCAL(ashlsi_14)	// << 14
+	shll8	r0
+	bra	LOCAL(ashlsi_15)	// << 15
+	shll8	r0
+LOCAL(ashlsi_16):			// << 16
+	rts
+	shll16	r0
+	bra	LOCAL(ashlsi_16)	// << 17
+	shll	r0
+	bra	LOCAL(ashlsi_16)	// << 18
+	shll2	r0
+	bra	LOCAL(ashlsi_19)	// << 19
+	shll	r0
+	bra	LOCAL(ashlsi_20)	// << 20
+	shll2	r0
+	bra	LOCAL(ashlsi_21)	// << 21
+	shll	r0
+	bra	LOCAL(ashlsi_22)	// << 22
+	shll16	r0
+	bra	LOCAL(ashlsi_23)	// << 23
+	shll16	r0
+	bra	LOCAL(ashlsi_16)	// << 24
+	shll8	r0
+	bra	LOCAL(ashlsi_25)	// << 25
+	shll	r0
+	bra	LOCAL(ashlsi_26)	// << 26
+	shll2	r0
+	bra	LOCAL(ashlsi_27)	// << 27
+	shll	r0
+	bra	LOCAL(ashlsi_28)	// << 28
+	shll2	r0
+	bra	LOCAL(ashlsi_29)	// << 29
+	shll16	r0
+	bra	LOCAL(ashlsi_30)	// << 30
+	shll16	r0
+	and	#1,r0			// << 31
+	rts
+	rotr	r0
+
+LOCAL(ashlsi_7):
+	shll2	r0
+LOCAL(ashlsi_5):
+LOCAL(ashlsi_6):
+	shll2	r0
+	rts
+LOCAL(ashlsi_13):
+	shll2	r0
+LOCAL(ashlsi_12):
+LOCAL(ashlsi_11):
+	shll8	r0
+	rts
+LOCAL(ashlsi_21):
+	shll2	r0
+LOCAL(ashlsi_20):
+LOCAL(ashlsi_19):
+	shll16	r0
+	rts
+LOCAL(ashlsi_28):
+LOCAL(ashlsi_27):
+	shll2	r0
+LOCAL(ashlsi_26):
+LOCAL(ashlsi_25):
+	shll16	r0
+	rts
+	shll8	r0
+
+LOCAL(ashlsi_22):
+LOCAL(ashlsi_14):
+	shlr2	r0
+	rts
+	shll8	r0
+
+LOCAL(ashlsi_23):
+LOCAL(ashlsi_15):
+	shlr	r0
+	rts
+	shll8	r0
+
+LOCAL(ashlsi_29):
+	shlr	r0
+LOCAL(ashlsi_30):
+	shlr2	r0
+	rts
+	shll16	r0	
+
+	ENDFUNC(GLOBAL(ashlsi3))
+	ENDFUNC(GLOBAL(ashlsi3_r0))
+#endif
+
+#ifdef L_lshiftrt
+
+!
+! GLOBAL(lshrsi3)
+! (For compatibility with older binaries, not used by compiler)
+!
+! Entry:
+!	r4: Value to shift
+!	r5: Shift count
+!
+! Exit:
+!	r0: Result
+!
+! Destroys:
+!	T bit
+!
+!
+! GLOBAL(lshrsi3_r0)
+!
+! Entry:
+!	r4: Value to shift
+!	r0: Shift count
+!
+! Exit:
+!	r0: Result
+!
+! Destroys:
+!	T bit
+
+	.global	GLOBAL(lshrsi3)
+	.global	GLOBAL(lshrsi3_r0)
+	HIDDEN_FUNC(GLOBAL(lshrsi3))
+	HIDDEN_FUNC(GLOBAL(lshrsi3_r0))
+GLOBAL(lshrsi3):
+	mov	r5,r0
+	.align	2
+GLOBAL(lshrsi3_r0):
+
+#ifdef __sh1__
+	and	#31,r0
+	shll2	r0
+	mov.l	r4,@-r15
+	mov	r0,r4
+	mova	LOCAL(lshrsi3_table),r0
+	add	r4,r0
+	mov.l	@r15+,r4
+	jmp	@r0
+	mov	r4,r0
+	.align 2
+#else
+	and	#31,r0
+	shll2	r0
+	braf	r0
+	mov	r4,r0
+#endif
+LOCAL(lshrsi3_table):
+	rts				// >> 0
+	nop
+LOCAL(lshrsi_1):			// >> 1
+	rts
+	shlr	r0
+LOCAL(lshrsi_2):			// >> 2
+	rts
+	shlr2	r0
+	bra	LOCAL(lshrsi_1)		// >> 3
+	shlr2	r0
+	bra	LOCAL(lshrsi_2)		// >> 4
+	shlr2	r0
+	bra	LOCAL(lshrsi_5)		// >> 5
+	shlr	r0
+	bra	LOCAL(lshrsi_6)		// >> 6
+	shlr2	r0
+	bra	LOCAL(lshrsi_7)		// >> 7
+	shlr	r0
+LOCAL(lshrsi_8):			// >> 8
+	rts
+	shlr8	r0
+	bra	LOCAL(lshrsi_8)		// >> 9
+	shlr	r0
+	bra	LOCAL(lshrsi_8)		// >> 10
+	shlr2	r0
+	bra	LOCAL(lshrsi_11)	// >> 11
+	shlr	r0
+	bra	LOCAL(lshrsi_12)	// >> 12
+	shlr2	r0
+	bra	LOCAL(lshrsi_13)	// >> 13
+	shlr	r0
+	bra	LOCAL(lshrsi_14)	// >> 14
+	shlr8	r0
+	bra	LOCAL(lshrsi_15)	// >> 15
+	shlr8	r0
+LOCAL(lshrsi_16):			// >> 16
+	rts
+	shlr16	r0
+	bra	LOCAL(lshrsi_16)	// >> 17
+	shlr	r0
+	bra	LOCAL(lshrsi_16)	// >> 18
+	shlr2	r0
+	bra	LOCAL(lshrsi_19)	// >> 19
+	shlr	r0
+	bra	LOCAL(lshrsi_20)	// >> 20
+	shlr2	r0
+	bra	LOCAL(lshrsi_21)	// >> 21
+	shlr	r0
+	bra	LOCAL(lshrsi_22)	// >> 22
+	shlr16	r0
+	bra	LOCAL(lshrsi_23)	// >> 23
+	shlr16	r0
+	bra	LOCAL(lshrsi_16)	// >> 24
+	shlr8	r0
+	bra	LOCAL(lshrsi_25)	// >> 25
+	shlr	r0
+	bra	LOCAL(lshrsi_26)	// >> 26
+	shlr2	r0
+	bra	LOCAL(lshrsi_27)	// >> 27
+	shlr	r0
+	bra	LOCAL(lshrsi_28)	// >> 28
+	shlr2	r0
+	bra	LOCAL(lshrsi_29)	// >> 29
+	shlr16	r0
+	bra	LOCAL(lshrsi_30)	// >> 30
+	shlr16	r0
+	shll	r0			// >> 31
+	rts
+	movt	r0
+
+LOCAL(lshrsi_7):
+	shlr2	r0
+LOCAL(lshrsi_5):
+LOCAL(lshrsi_6):
+	shlr2	r0
+	rts
+LOCAL(lshrsi_13):
+	shlr2	r0
+LOCAL(lshrsi_12):
+LOCAL(lshrsi_11):
+	shlr8	r0
+	rts
+LOCAL(lshrsi_21):
+	shlr2	r0
+LOCAL(lshrsi_20):
+LOCAL(lshrsi_19):
+	shlr16	r0
+	rts
+LOCAL(lshrsi_28):
+LOCAL(lshrsi_27):
+	shlr2	r0
+LOCAL(lshrsi_26):
+LOCAL(lshrsi_25):
+	shlr16	r0
+	rts
+	shlr8	r0
+
+LOCAL(lshrsi_22):
+LOCAL(lshrsi_14):
+	shll2	r0
+	rts
+	shlr8	r0
+
+LOCAL(lshrsi_23):
+LOCAL(lshrsi_15):
+	shll	r0
+	rts
+	shlr8	r0
+
+LOCAL(lshrsi_29):
+	shll	r0
+LOCAL(lshrsi_30):
+	shll2	r0
+	rts
+	shlr16	r0	
+
+	ENDFUNC(GLOBAL(lshrsi3))
+	ENDFUNC(GLOBAL(lshrsi3_r0))
+#endif
+
+#ifdef L_movmem
+	.text
+	.balign	4
+	.global	GLOBAL(movmem)
+	HIDDEN_FUNC(GLOBAL(movmem))
+	HIDDEN_ALIAS(movstr,movmem)
+	/* This would be a lot simpler if r6 contained the byte count
+	   minus 64, and we wouldn't be called here for a byte count of 64.  */
+GLOBAL(movmem):
+	sts.l	pr,@-r15
+	shll2	r6
+	bsr	GLOBAL(movmemSI52+2)
+	mov.l	@(48,r5),r0
+	.balign	4
+LOCAL(movmem_loop): /* Reached with rts */
+	mov.l	@(60,r5),r0
+	add	#-64,r6
+	mov.l	r0,@(60,r4)
+	tst	r6,r6
+	mov.l	@(56,r5),r0
+	bt	LOCAL(movmem_done)
+	mov.l	r0,@(56,r4)
+	cmp/pl	r6
+	mov.l	@(52,r5),r0
+	add	#64,r5
+	mov.l	r0,@(52,r4)
+	add	#64,r4
+	bt	GLOBAL(movmemSI52)
+! done all the large groups, do the remainder
+! jump to movmem+
+	mova	GLOBAL(movmemSI4)+4,r0
+	add	r6,r0
+	jmp	@r0
+LOCAL(movmem_done): ! share slot insn, works out aligned.
+	lds.l	@r15+,pr
+	mov.l	r0,@(56,r4)
+	mov.l	@(52,r5),r0
+	rts
+	mov.l	r0,@(52,r4)
+	.balign	4
+! ??? We need aliases movstr* for movmem* for the older libraries.  These
+! aliases will be removed at the some point in the future.
+	.global	GLOBAL(movmemSI64)
+	HIDDEN_FUNC(GLOBAL(movmemSI64))
+	HIDDEN_ALIAS(movstrSI64,movmemSI64)
+GLOBAL(movmemSI64):
+	mov.l	@(60,r5),r0
+	mov.l	r0,@(60,r4)
+	.global	GLOBAL(movmemSI60)
+	HIDDEN_FUNC(GLOBAL(movmemSI60))
+	HIDDEN_ALIAS(movstrSI60,movmemSI60)
+GLOBAL(movmemSI60):
+	mov.l	@(56,r5),r0
+	mov.l	r0,@(56,r4)
+	.global	GLOBAL(movmemSI56)
+	HIDDEN_FUNC(GLOBAL(movmemSI56))
+	HIDDEN_ALIAS(movstrSI56,movmemSI56)
+GLOBAL(movmemSI56):
+	mov.l	@(52,r5),r0
+	mov.l	r0,@(52,r4)
+	.global	GLOBAL(movmemSI52)
+	HIDDEN_FUNC(GLOBAL(movmemSI52))
+	HIDDEN_ALIAS(movstrSI52,movmemSI52)
+GLOBAL(movmemSI52):
+	mov.l	@(48,r5),r0
+	mov.l	r0,@(48,r4)
+	.global	GLOBAL(movmemSI48)
+	HIDDEN_FUNC(GLOBAL(movmemSI48))
+	HIDDEN_ALIAS(movstrSI48,movmemSI48)
+GLOBAL(movmemSI48):
+	mov.l	@(44,r5),r0
+	mov.l	r0,@(44,r4)
+	.global	GLOBAL(movmemSI44)
+	HIDDEN_FUNC(GLOBAL(movmemSI44))
+	HIDDEN_ALIAS(movstrSI44,movmemSI44)
+GLOBAL(movmemSI44):
+	mov.l	@(40,r5),r0
+	mov.l	r0,@(40,r4)
+	.global	GLOBAL(movmemSI40)
+	HIDDEN_FUNC(GLOBAL(movmemSI40))
+	HIDDEN_ALIAS(movstrSI40,movmemSI40)
+GLOBAL(movmemSI40):
+	mov.l	@(36,r5),r0
+	mov.l	r0,@(36,r4)
+	.global	GLOBAL(movmemSI36)
+	HIDDEN_FUNC(GLOBAL(movmemSI36))
+	HIDDEN_ALIAS(movstrSI36,movmemSI36)
+GLOBAL(movmemSI36):
+	mov.l	@(32,r5),r0
+	mov.l	r0,@(32,r4)
+	.global	GLOBAL(movmemSI32)
+	HIDDEN_FUNC(GLOBAL(movmemSI32))
+	HIDDEN_ALIAS(movstrSI32,movmemSI32)
+GLOBAL(movmemSI32):
+	mov.l	@(28,r5),r0
+	mov.l	r0,@(28,r4)
+	.global	GLOBAL(movmemSI28)
+	HIDDEN_FUNC(GLOBAL(movmemSI28))
+	HIDDEN_ALIAS(movstrSI28,movmemSI28)
+GLOBAL(movmemSI28):
+	mov.l	@(24,r5),r0
+	mov.l	r0,@(24,r4)
+	.global	GLOBAL(movmemSI24)
+	HIDDEN_FUNC(GLOBAL(movmemSI24))
+	HIDDEN_ALIAS(movstrSI24,movmemSI24)
+GLOBAL(movmemSI24):
+	mov.l	@(20,r5),r0
+	mov.l	r0,@(20,r4)
+	.global	GLOBAL(movmemSI20)
+	HIDDEN_FUNC(GLOBAL(movmemSI20))
+	HIDDEN_ALIAS(movstrSI20,movmemSI20)
+GLOBAL(movmemSI20):
+	mov.l	@(16,r5),r0
+	mov.l	r0,@(16,r4)
+	.global	GLOBAL(movmemSI16)
+	HIDDEN_FUNC(GLOBAL(movmemSI16))
+	HIDDEN_ALIAS(movstrSI16,movmemSI16)
+GLOBAL(movmemSI16):
+	mov.l	@(12,r5),r0
+	mov.l	r0,@(12,r4)
+	.global	GLOBAL(movmemSI12)
+	HIDDEN_FUNC(GLOBAL(movmemSI12))
+	HIDDEN_ALIAS(movstrSI12,movmemSI12)
+GLOBAL(movmemSI12):
+	mov.l	@(8,r5),r0
+	mov.l	r0,@(8,r4)
+	.global	GLOBAL(movmemSI8)
+	HIDDEN_FUNC(GLOBAL(movmemSI8))
+	HIDDEN_ALIAS(movstrSI8,movmemSI8)
+GLOBAL(movmemSI8):
+	mov.l	@(4,r5),r0
+	mov.l	r0,@(4,r4)
+	.global	GLOBAL(movmemSI4)
+	HIDDEN_FUNC(GLOBAL(movmemSI4))
+	HIDDEN_ALIAS(movstrSI4,movmemSI4)
+GLOBAL(movmemSI4):
+	mov.l	@(0,r5),r0
+	rts
+	mov.l	r0,@(0,r4)
+
+	ENDFUNC(GLOBAL(movmemSI64))
+	ENDFUNC(GLOBAL(movmemSI60))
+	ENDFUNC(GLOBAL(movmemSI56))
+	ENDFUNC(GLOBAL(movmemSI52))
+	ENDFUNC(GLOBAL(movmemSI48))
+	ENDFUNC(GLOBAL(movmemSI44))
+	ENDFUNC(GLOBAL(movmemSI40))
+	ENDFUNC(GLOBAL(movmemSI36))
+	ENDFUNC(GLOBAL(movmemSI32))
+	ENDFUNC(GLOBAL(movmemSI28))
+	ENDFUNC(GLOBAL(movmemSI24))
+	ENDFUNC(GLOBAL(movmemSI20))
+	ENDFUNC(GLOBAL(movmemSI16))
+	ENDFUNC(GLOBAL(movmemSI12))
+	ENDFUNC(GLOBAL(movmemSI8))
+	ENDFUNC(GLOBAL(movmemSI4))
+	ENDFUNC(GLOBAL(movmem))
+#endif
+
+#ifdef L_movmem_i4
+	.text
+	.global	GLOBAL(movmem_i4_even)
+	.global	GLOBAL(movmem_i4_odd)
+	.global	GLOBAL(movmemSI12_i4)
+
+	HIDDEN_FUNC(GLOBAL(movmem_i4_even))
+	HIDDEN_FUNC(GLOBAL(movmem_i4_odd))
+	HIDDEN_FUNC(GLOBAL(movmemSI12_i4))
+
+	HIDDEN_ALIAS(movstr_i4_even,movmem_i4_even)
+	HIDDEN_ALIAS(movstr_i4_odd,movmem_i4_odd)
+	HIDDEN_ALIAS(movstrSI12_i4,movmemSI12_i4)
+
+	.p2align	5
+L_movmem_2mod4_end:
+	mov.l	r0,@(16,r4)
+	rts
+	mov.l	r1,@(20,r4)
+
+	.p2align	2
+
+GLOBAL(movmem_i4_even):
+	mov.l	@r5+,r0
+	bra	L_movmem_start_even
+	mov.l	@r5+,r1
+
+GLOBAL(movmem_i4_odd):
+	mov.l	@r5+,r1
+	add	#-4,r4
+	mov.l	@r5+,r2
+	mov.l	@r5+,r3
+	mov.l	r1,@(4,r4)
+	mov.l	r2,@(8,r4)
+
+L_movmem_loop:
+	mov.l	r3,@(12,r4)
+	dt	r6
+	mov.l	@r5+,r0
+	bt/s	L_movmem_2mod4_end
+	mov.l	@r5+,r1
+	add	#16,r4
+L_movmem_start_even:
+	mov.l	@r5+,r2
+	mov.l	@r5+,r3
+	mov.l	r0,@r4
+	dt	r6
+	mov.l	r1,@(4,r4)
+	bf/s	L_movmem_loop
+	mov.l	r2,@(8,r4)
+	rts
+	mov.l	r3,@(12,r4)
+
+	ENDFUNC(GLOBAL(movmem_i4_even))
+	ENDFUNC(GLOBAL(movmem_i4_odd))
+
+	.p2align	4
+GLOBAL(movmemSI12_i4):
+	mov.l	@r5,r0
+	mov.l	@(4,r5),r1
+	mov.l	@(8,r5),r2
+	mov.l	r0,@r4
+	mov.l	r1,@(4,r4)
+	rts
+	mov.l	r2,@(8,r4)
+
+	ENDFUNC(GLOBAL(movmemSI12_i4))
+#endif
+
+#ifdef L_mulsi3
+
+
+	.global	GLOBAL(mulsi3)
+	HIDDEN_FUNC(GLOBAL(mulsi3))
+
+! r4 =       aabb
+! r5 =       ccdd
+! r0 = aabb*ccdd  via partial products
+!
+! if aa == 0 and cc = 0
+! r0 = bb*dd
+!
+! else
+! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536)
+!
+
+GLOBAL(mulsi3):
+	mulu.w  r4,r5		! multiply the lsws  macl=bb*dd
+	mov     r5,r3		! r3 = ccdd
+	swap.w  r4,r2		! r2 = bbaa
+	xtrct   r2,r3		! r3 = aacc
+	tst  	r3,r3		! msws zero ?
+	bf      hiset
+	rts			! yes - then we have the answer
+	sts     macl,r0
+
+hiset:	sts	macl,r0		! r0 = bb*dd
+	mulu.w	r2,r5		! brewing macl = aa*dd
+	sts	macl,r1
+	mulu.w	r3,r4		! brewing macl = cc*bb
+	sts	macl,r2
+	add	r1,r2
+	shll16	r2
+	rts
+	add	r2,r0
+
+	ENDFUNC(GLOBAL(mulsi3))
+#endif
+#endif /* ! __SH5__ */
+
+/*------------------------------------------------------------------------------
+  32 bit signed integer division that uses FPU double precision division.  */
+
+#ifdef L_sdivsi3_i4
+	.title "SH DIVIDE"
+
+#if defined (__SH4__) || defined (__SH2A__)
+/* This variant is used when FPSCR.PR = 1 (double precision) is the default
+   setting.
+   Args in r4 and r5, result in fpul, clobber dr0, dr2.  */
+
+	.global	GLOBAL(sdivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(sdivsi3_i4))
+GLOBAL(sdivsi3_i4):
+	lds r4,fpul
+	float fpul,dr0
+	lds r5,fpul
+	float fpul,dr2
+	fdiv dr2,dr0
+	rts
+	ftrc dr0,fpul
+
+	ENDFUNC(GLOBAL(sdivsi3_i4))
+
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__)
+/* This variant is used when FPSCR.PR = 0 (sigle precision) is the default
+   setting.
+   Args in r4 and r5, result in fpul, clobber r2, dr0, dr2.
+   For this to work, we must temporarily switch the FPU do double precision,
+   but we better do not touch FPSCR.FR.  See PR 6526.  */
+
+#if ! __SH5__ || __SH5__ == 32
+#if __SH5__
+	.mode	SHcompact
+#endif
+	.global	GLOBAL(sdivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(sdivsi3_i4))
+GLOBAL(sdivsi3_i4):
+
+#ifndef __SH4A__
+	mov.l	r3,@-r15
+	sts	fpscr,r2
+	mov	#8,r3
+	swap.w	r3,r3		// r3 = 1 << 19 (FPSCR.PR bit)
+	or	r2,r3
+	lds	r3,fpscr	// Set FPSCR.PR = 1.
+	lds	r4,fpul
+	float	fpul,dr0
+	lds	r5,fpul
+	float	fpul,dr2
+	fdiv	dr2,dr0
+	ftrc	dr0,fpul
+	lds	r2,fpscr
+	rts
+	mov.l	@r15+,r3
+#else
+/* On SH4A we can use the fpchg instruction to flip the FPSCR.PR bit.  */
+	fpchg
+	lds	r4,fpul
+	float	fpul,dr0
+	lds	r5,fpul
+	float	fpul,dr2
+	fdiv	dr2,dr0
+	ftrc	dr0,fpul
+	rts
+	fpchg	
+
+#endif /* __SH4A__  */
+
+	ENDFUNC(GLOBAL(sdivsi3_i4))
+#endif /* ! __SH5__ || __SH5__ == 32 */
+#endif /* ! __SH4__ || __SH2A__  */
+#endif /* L_sdivsi3_i4  */
+
+//------------------------------------------------------------------------------
+#ifdef L_sdivsi3
+/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
+   sh2e/sh3e code.  */
+!!
+!! Steve Chamberlain
+!! sac@cygnus.com
+!!
+!!
+
+!! args in r4 and r5, result in r0 clobber r1, r2, r3, and t bit
+
+	.global	GLOBAL(sdivsi3)
+#if __SHMEDIA__
+#if __SH5__ == 32
+	.section	.text..SHmedia32,"ax"
+#else
+	.text
+#endif
+	.align	2
+#if 0
+/* The assembly code that follows is a hand-optimized version of the C
+   code that follows.  Note that the registers that are modified are
+   exactly those listed as clobbered in the patterns divsi3_i1 and
+   divsi3_i1_media.
+	
+int __sdivsi3 (i, j)
+     int i, j;
+{
+  register unsigned long long r18 asm ("r18");
+  register unsigned long long r19 asm ("r19");
+  register unsigned long long r0 asm ("r0") = 0;
+  register unsigned long long r1 asm ("r1") = 1;
+  register int r2 asm ("r2") = i >> 31;
+  register int r3 asm ("r3") = j >> 31;
+
+  r2 = r2 ? r2 : r1;
+  r3 = r3 ? r3 : r1;
+  r18 = i * r2;
+  r19 = j * r3;
+  r2 *= r3;
+  
+  r19 <<= 31;
+  r1 <<= 31;
+  do
+    if (r18 >= r19)
+      r0 |= r1, r18 -= r19;
+  while (r19 >>= 1, r1 >>= 1);
+
+  return r2 * (int)r0;
+}
+*/
+GLOBAL(sdivsi3):
+	pt/l	LOCAL(sdivsi3_dontadd), tr2
+	pt/l	LOCAL(sdivsi3_loop), tr1
+	ptabs/l	r18, tr0
+	movi	0, r0
+	movi	1, r1
+	shari.l	r4, 31, r2
+	shari.l	r5, 31, r3
+	cmveq	r2, r1, r2
+	cmveq	r3, r1, r3
+	muls.l	r4, r2, r18
+	muls.l	r5, r3, r19
+	muls.l	r2, r3, r2
+	shlli	r19, 31, r19
+	shlli	r1, 31, r1
+LOCAL(sdivsi3_loop):
+	bgtu	r19, r18, tr2
+	or	r0, r1, r0
+	sub	r18, r19, r18
+LOCAL(sdivsi3_dontadd):
+	shlri	r1, 1, r1
+	shlri	r19, 1, r19
+	bnei	r1, 0, tr1
+	muls.l	r0, r2, r0
+	add.l	r0, r63, r0
+	blink	tr0, r63
+#elif 0 /* ! 0 */
+ // inputs: r4,r5
+ // clobbered: r1,r2,r3,r18,r19,r20,r21,r25,tr0
+ // result in r0
+GLOBAL(sdivsi3):
+ // can create absolute value without extra latency,
+ // but dependent on proper sign extension of inputs:
+ // shari.l r5,31,r2
+ // xor r5,r2,r20
+ // sub r20,r2,r20 // r20 is now absolute value of r5, zero-extended.
+ shari.l r5,31,r2
+ ori r2,1,r2
+ muls.l r5,r2,r20 // r20 is now absolute value of r5, zero-extended.
+ movi 0xffffffffffffbb0c,r19 // shift count eqiv 76
+ shari.l r4,31,r3
+ nsb r20,r0
+ shlld r20,r0,r25
+ shlri r25,48,r25
+ sub r19,r25,r1
+ mmulfx.w r1,r1,r2
+ mshflo.w r1,r63,r1
+ // If r4 was to be used in-place instead of r21, could use this sequence
+ // to compute absolute:
+ // sub r63,r4,r19 // compute absolute value of r4
+ // shlri r4,32,r3 // into lower 32 bit of r4, keeping
+ // mcmv r19,r3,r4 // the sign in the upper 32 bits intact.
+ ori r3,1,r3
+ mmulfx.w r25,r2,r2
+ sub r19,r0,r0
+ muls.l r4,r3,r21
+ msub.w r1,r2,r2
+ addi r2,-2,r1
+ mulu.l r21,r1,r19
+ mmulfx.w r2,r2,r2
+ shlli r1,15,r1
+ shlrd r19,r0,r19
+ mulu.l r19,r20,r3
+ mmacnfx.wl r25,r2,r1
+ ptabs r18,tr0
+ sub r21,r3,r25
+
+ mulu.l r25,r1,r2
+ addi r0,14,r0
+ xor r4,r5,r18
+ shlrd r2,r0,r2
+ mulu.l r2,r20,r3
+ add r19,r2,r19
+ shari.l r18,31,r18
+ sub r25,r3,r25
+
+ mulu.l r25,r1,r2
+ sub r25,r20,r25
+ add r19,r18,r19
+ shlrd r2,r0,r2
+ mulu.l r2,r20,r3
+ addi r25,1,r25
+ add r19,r2,r19
+
+ cmpgt r25,r3,r25
+ add.l r19,r25,r0
+ xor r0,r18,r0
+ blink tr0,r63
+#else /* ! 0 && ! 0 */
+
+ // inputs: r4,r5
+ // clobbered: r1,r18,r19,r20,r21,r25,tr0
+ // result in r0
+	HIDDEN_FUNC(GLOBAL(sdivsi3_2))
+#ifndef __pic__
+	FUNC(GLOBAL(sdivsi3))
+GLOBAL(sdivsi3): /* this is the shcompact entry point */
+ // The special SHmedia entry point sdivsi3_1 prevents accidental linking
+ // with the SHcompact implementation, which clobbers tr1 / tr2.
+ .global GLOBAL(sdivsi3_1)
+GLOBAL(sdivsi3_1):
+ .global GLOBAL(div_table_internal)
+ movi (GLOBAL(div_table_internal) >> 16) & 65535, r20
+ shori GLOBAL(div_table_internal) & 65535, r20
+#endif
+ .global GLOBAL(sdivsi3_2)
+ // div_table in r20
+ // clobbered: r1,r18,r19,r21,r25,tr0
+GLOBAL(sdivsi3_2):
+ nsb r5, r1
+ shlld r5, r1, r25    // normalize; [-2 ..1, 1..2) in s2.62
+ shari r25, 58, r21   // extract 5(6) bit index (s2.4 with hole -1..1)
+ ldx.ub r20, r21, r19 // u0.8
+ shari r25, 32, r25   // normalize to s2.30
+ shlli r21, 1, r21
+ muls.l r25, r19, r19 // s2.38
+ ldx.w r20, r21, r21  // s2.14
+  ptabs r18, tr0
+ shari r19, 24, r19   // truncate to s2.14
+ sub r21, r19, r19    // some 11 bit inverse in s1.14
+ muls.l r19, r19, r21 // u0.28
+  sub r63, r1, r1
+  addi r1, 92, r1
+ muls.l r25, r21, r18 // s2.58
+ shlli r19, 45, r19   // multiply by two and convert to s2.58
+  /* bubble */
+ sub r19, r18, r18
+ shari r18, 28, r18   // some 22 bit inverse in s1.30
+ muls.l r18, r25, r0  // s2.60
+  muls.l r18, r4, r25 // s32.30
+  /* bubble */
+ shari r0, 16, r19   // s-16.44
+ muls.l r19, r18, r19 // s-16.74
+  shari r25, 63, r0
+  shari r4, 14, r18   // s19.-14
+ shari r19, 30, r19   // s-16.44
+ muls.l r19, r18, r19 // s15.30
+  xor r21, r0, r21    // You could also use the constant 1 << 27.
+  add r21, r25, r21
+ sub r21, r19, r21
+ shard r21, r1, r21
+ sub r21, r0, r0
+ blink tr0, r63
+#ifndef __pic__
+	ENDFUNC(GLOBAL(sdivsi3))
+#endif
+	ENDFUNC(GLOBAL(sdivsi3_2))
+#endif
+#elif defined __SHMEDIA__
+/* m5compact-nofpu */
+ // clobbered: r18,r19,r20,r21,r25,tr0,tr1,tr2
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	FUNC(GLOBAL(sdivsi3))
+GLOBAL(sdivsi3):
+	pt/l LOCAL(sdivsi3_dontsub), tr0
+	pt/l LOCAL(sdivsi3_loop), tr1
+	ptabs/l r18,tr2
+	shari.l r4,31,r18
+	shari.l r5,31,r19
+	xor r4,r18,r20
+	xor r5,r19,r21
+	sub.l r20,r18,r20
+	sub.l r21,r19,r21
+	xor r18,r19,r19
+	shlli r21,32,r25
+	addi r25,-1,r21
+	addz.l r20,r63,r20
+LOCAL(sdivsi3_loop):
+	shlli r20,1,r20
+	bgeu/u r21,r20,tr0
+	sub r20,r21,r20
+LOCAL(sdivsi3_dontsub):
+	addi.l r25,-1,r25
+	bnei r25,-32,tr1
+	xor r20,r19,r20
+	sub.l r20,r19,r0
+	blink tr2,r63
+	ENDFUNC(GLOBAL(sdivsi3))
+#else /* ! __SHMEDIA__ */
+	FUNC(GLOBAL(sdivsi3))
+GLOBAL(sdivsi3):
+	mov	r4,r1
+	mov	r5,r0
+
+	tst	r0,r0
+	bt	div0
+	mov	#0,r2
+	div0s	r2,r1
+	subc	r3,r3
+	subc	r2,r1
+	div0s	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	div1	r0,r3
+	rotcl	r1
+	addc	r2,r1
+	rts
+	mov	r1,r0
+
+
+div0:	rts
+	mov	#0,r0
+
+	ENDFUNC(GLOBAL(sdivsi3))
+#endif /* ! __SHMEDIA__  */
+#endif /* L_sdivsi3  */
+
+/*------------------------------------------------------------------------------
+  32 bit unsigned integer division that uses FPU double precision division.  */
+
+#ifdef L_udivsi3_i4
+	.title "SH DIVIDE"
+
+#if defined (__SH4__) || defined (__SH2A__)
+/* This variant is used when FPSCR.PR = 1 (double precision) is the default
+   setting.
+   Args in r4 and r5, result in fpul,
+   clobber r0, r1, r4, r5, dr0, dr2, dr4, and t bit  */
+
+	.global	GLOBAL(udivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
+GLOBAL(udivsi3_i4):
+	mov	#1,r1
+	cmp/hi	r1,r5
+	bf/s	trivial
+	rotr	r1
+	xor	r1,r4
+	lds	r4,fpul
+	mova	L1,r0
+#ifdef FMOVD_WORKS
+	fmov.d	@r0+,dr4
+#else
+	fmov.s	@r0+,DR40
+	fmov.s	@r0,DR41
+#endif
+	float	fpul,dr0
+	xor	r1,r5
+	lds	r5,fpul
+	float	fpul,dr2
+	fadd	dr4,dr0
+	fadd	dr4,dr2
+	fdiv	dr2,dr0
+	rts
+	ftrc	dr0,fpul
+
+trivial:
+	rts
+	lds	r4,fpul
+
+	.align 2
+#ifdef FMOVD_WORKS
+	.align 3	// Make the double below 8 byte aligned.
+#endif
+L1:
+	.double 2147483648
+
+	ENDFUNC(GLOBAL(udivsi3_i4))
+
+#elif defined (__SH5__) && ! defined (__SH4_NOFPU__) && ! defined (__SH2A_NOFPU__)
+#if ! __SH5__ || __SH5__ == 32
+!! args in r4 and r5, result in fpul, clobber r20, r21, dr0, fr33
+	.mode	SHmedia
+	.global	GLOBAL(udivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
+GLOBAL(udivsi3_i4):
+	addz.l	r4,r63,r20
+	addz.l	r5,r63,r21
+	fmov.qd	r20,dr0
+	fmov.qd	r21,dr32
+	ptabs	r18,tr0
+	float.qd dr0,dr0
+	float.qd dr32,dr32
+	fdiv.d	dr0,dr32,dr0
+	ftrc.dq dr0,dr32
+	fmov.s fr33,fr32
+	blink tr0,r63
+
+	ENDFUNC(GLOBAL(udivsi3_i4))
+#endif /* ! __SH5__ || __SH5__ == 32 */
+
+#elif defined (__SH2A_SINGLE__) || defined (__SH2A_SINGLE_ONLY__) || defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__)
+/* This variant is used when FPSCR.PR = 0 (sigle precision) is the default
+   setting.
+   Args in r4 and r5, result in fpul,
+   clobber r0, r1, r4, r5, dr0, dr2, dr4.
+   For this to work, we must temporarily switch the FPU do double precision,
+   but we better do not touch FPSCR.FR.  See PR 6526.  */
+
+	.global	GLOBAL(udivsi3_i4)
+	HIDDEN_FUNC(GLOBAL(udivsi3_i4))
+GLOBAL(udivsi3_i4):
+
+#ifndef __SH4A__
+	mov	#1,r1
+	cmp/hi	r1,r5
+	bf/s	trivial
+	rotr	r1		// r1 = 1 << 31
+	sts.l	fpscr,@-r15
+	xor	r1,r4
+	mov.l	@(0,r15),r0
+	xor	r1,r5
+	mov.l	L2,r1
+	lds	r4,fpul
+	or	r0,r1
+	mova	L1,r0
+	lds	r1,fpscr
+#ifdef FMOVD_WORKS
+	fmov.d	@r0+,dr4
+#else
+	fmov.s	@r0+,DR40
+	fmov.s	@r0,DR41
+#endif
+	float	fpul,dr0
+	lds	r5,fpul
+	float	fpul,dr2
+	fadd	dr4,dr0
+	fadd	dr4,dr2
+	fdiv	dr2,dr0
+	ftrc	dr0,fpul
+	rts
+	lds.l	@r15+,fpscr
+
+#ifdef FMOVD_WORKS
+	.align 3	// Make the double below 8 byte aligned.
+#endif
+trivial:
+	rts
+	lds	r4,fpul
+
+	.align 2
+L2:
+#ifdef FMOVD_WORKS
+	.long 0x180000	// FPSCR.PR = 1, FPSCR.SZ = 1
+#else
+	.long 0x80000	// FPSCR.PR = 1
+#endif
+L1:
+	.double 2147483648
+
+#else
+/* On SH4A we can use the fpchg instruction to flip the FPSCR.PR bit.
+   Although on SH4A fmovd usually works, it would require either additional
+   two fschg instructions or an FPSCR push + pop.  It's not worth the effort
+   for loading only one double constant.  */
+	mov	#1,r1
+	cmp/hi	r1,r5
+	bf/s	trivial
+	rotr	r1		// r1 = 1 << 31
+	fpchg
+	mova	L1,r0
+	xor	r1,r4
+	fmov.s	@r0+,DR40
+	lds	r4,fpul
+	fmov.s	@r0,DR41
+	xor	r1,r5
+	float	fpul,dr0
+	lds	r5,fpul
+	float	fpul,dr2
+	fadd	dr4,dr0
+	fadd	dr4,dr2
+	fdiv	dr2,dr0
+	ftrc	dr0,fpul
+	rts
+	fpchg
+
+trivial:
+	rts
+	lds	r4,fpul
+
+	.align 2
+L1:
+	.double 2147483648
+
+#endif /* __SH4A__  */
+
+
+	ENDFUNC(GLOBAL(udivsi3_i4))
+#endif /* ! __SH4__ */
+#endif /* L_udivsi3_i4  */
+
+#ifdef L_udivsi3
+/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
+   sh2e/sh3e code.  */
+
+!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
+	.global	GLOBAL(udivsi3)
+	HIDDEN_FUNC(GLOBAL(udivsi3))
+
+#if __SHMEDIA__
+#if __SH5__ == 32
+	.section	.text..SHmedia32,"ax"
+#else
+	.text
+#endif
+	.align	2
+#if 0
+/* The assembly code that follows is a hand-optimized version of the C
+   code that follows.  Note that the registers that are modified are
+   exactly those listed as clobbered in the patterns udivsi3_i1 and
+   udivsi3_i1_media.
+	
+unsigned 
+__udivsi3 (i, j)
+    unsigned i, j; 
+{
+  register unsigned long long r0 asm ("r0") = 0;
+  register unsigned long long r18 asm ("r18") = 1;
+  register unsigned long long r4 asm ("r4") = i;
+  register unsigned long long r19 asm ("r19") = j;
+
+  r19 <<= 31;
+  r18 <<= 31;
+  do
+    if (r4 >= r19)
+      r0 |= r18, r4 -= r19;
+  while (r19 >>= 1, r18 >>= 1);
+
+  return r0;
+}
+*/
+GLOBAL(udivsi3):
+	pt/l	LOCAL(udivsi3_dontadd), tr2
+	pt/l	LOCAL(udivsi3_loop), tr1
+	ptabs/l	r18, tr0
+	movi	0, r0
+	movi	1, r18
+	addz.l	r5, r63, r19
+	addz.l	r4, r63, r4
+	shlli	r19, 31, r19
+	shlli	r18, 31, r18
+LOCAL(udivsi3_loop):
+	bgtu	r19, r4, tr2
+	or	r0, r18, r0
+	sub	r4, r19, r4
+LOCAL(udivsi3_dontadd):
+	shlri	r18, 1, r18
+	shlri	r19, 1, r19
+	bnei	r18, 0, tr1
+	blink	tr0, r63
+#else
+GLOBAL(udivsi3):
+ // inputs: r4,r5
+ // clobbered: r18,r19,r20,r21,r22,r25,tr0
+ // result in r0.
+ addz.l r5,r63,r22
+ nsb r22,r0
+ shlld r22,r0,r25
+ shlri r25,48,r25
+ movi 0xffffffffffffbb0c,r20 // shift count eqiv 76
+ sub r20,r25,r21
+ mmulfx.w r21,r21,r19
+ mshflo.w r21,r63,r21
+ ptabs r18,tr0
+ mmulfx.w r25,r19,r19
+ sub r20,r0,r0
+ /* bubble */
+ msub.w r21,r19,r19
+ addi r19,-2,r21 /* It would be nice for scheduling to do this add to r21
+		    before the msub.w, but we need a different value for
+		    r19 to keep errors under control.  */
+ mulu.l r4,r21,r18
+ mmulfx.w r19,r19,r19
+ shlli r21,15,r21
+ shlrd r18,r0,r18
+ mulu.l r18,r22,r20
+ mmacnfx.wl r25,r19,r21
+ /* bubble */
+ sub r4,r20,r25
+
+ mulu.l r25,r21,r19
+ addi r0,14,r0
+ /* bubble */
+ shlrd r19,r0,r19
+ mulu.l r19,r22,r20
+ add r18,r19,r18
+ /* bubble */
+ sub.l r25,r20,r25
+
+ mulu.l r25,r21,r19
+ addz.l r25,r63,r25
+ sub r25,r22,r25
+ shlrd r19,r0,r19
+ mulu.l r19,r22,r20
+ addi r25,1,r25
+ add r18,r19,r18
+
+ cmpgt r25,r20,r25
+ add.l r18,r25,r0
+ blink tr0,r63
+#endif
+#elif defined (__SHMEDIA__)
+/* m5compact-nofpu - more emphasis on code size than on speed, but don't
+   ignore speed altogether - div1 needs 9 cycles, subc 7 and rotcl 4.
+   So use a short shmedia loop.  */
+ // clobbered: r20,r21,r25,tr0,tr1,tr2
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+GLOBAL(udivsi3):
+ pt/l LOCAL(udivsi3_dontsub), tr0
+ pt/l LOCAL(udivsi3_loop), tr1
+ ptabs/l r18,tr2
+ shlli r5,32,r25
+ addi r25,-1,r21
+ addz.l r4,r63,r20
+LOCAL(udivsi3_loop):
+ shlli r20,1,r20
+ bgeu/u r21,r20,tr0
+ sub r20,r21,r20
+LOCAL(udivsi3_dontsub):
+ addi.l r25,-1,r25
+ bnei r25,-32,tr1
+ add.l r20,r63,r0
+ blink tr2,r63
+#else /* ! defined (__SHMEDIA__) */
+LOCAL(div8):
+ div1 r5,r4
+LOCAL(div7):
+ div1 r5,r4; div1 r5,r4; div1 r5,r4
+ div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
+
+LOCAL(divx4):
+ div1 r5,r4; rotcl r0
+ div1 r5,r4; rotcl r0
+ div1 r5,r4; rotcl r0
+ rts; div1 r5,r4
+
+GLOBAL(udivsi3):
+ sts.l pr,@-r15
+ extu.w r5,r0
+ cmp/eq r5,r0
+#ifdef __sh1__
+ bf LOCAL(large_divisor)
+#else
+ bf/s LOCAL(large_divisor)
+#endif
+ div0u
+ swap.w r4,r0
+ shlr16 r4
+ bsr LOCAL(div8)
+ shll16 r5
+ bsr LOCAL(div7)
+ div1 r5,r4
+ xtrct r4,r0
+ xtrct r0,r4
+ bsr LOCAL(div8)
+ swap.w r4,r4
+ bsr LOCAL(div7)
+ div1 r5,r4
+ lds.l @r15+,pr
+ xtrct r4,r0
+ swap.w r0,r0
+ rotcl r0
+ rts
+ shlr16 r5
+
+LOCAL(large_divisor):
+#ifdef __sh1__
+ div0u
+#endif
+ mov #0,r0
+ xtrct r4,r0
+ xtrct r0,r4
+ bsr LOCAL(divx4)
+ rotcl r0
+ bsr LOCAL(divx4)
+ rotcl r0
+ bsr LOCAL(divx4)
+ rotcl r0
+ bsr LOCAL(divx4)
+ rotcl r0
+ lds.l @r15+,pr
+ rts
+ rotcl r0
+
+	ENDFUNC(GLOBAL(udivsi3))
+#endif /* ! __SHMEDIA__ */
+#endif /* L_udivsi3 */
+
+#ifdef L_udivdi3
+#ifdef __SHMEDIA__
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	.global	GLOBAL(udivdi3)
+	FUNC(GLOBAL(udivdi3))
+GLOBAL(udivdi3):
+	HIDDEN_ALIAS(udivdi3_internal,udivdi3)
+	shlri r3,1,r4
+	nsb r4,r22
+	shlld r3,r22,r6
+	shlri r6,49,r5
+	movi 0xffffffffffffbaf1,r21 /* .l shift count 17.  */
+	sub r21,r5,r1
+	mmulfx.w r1,r1,r4
+	mshflo.w r1,r63,r1
+	sub r63,r22,r20 // r63 == 64 % 64
+	mmulfx.w r5,r4,r4
+	pta LOCAL(large_divisor),tr0
+	addi r20,32,r9
+	msub.w r1,r4,r1
+	madd.w r1,r1,r1
+	mmulfx.w r1,r1,r4
+	shlri r6,32,r7
+	bgt/u r9,r63,tr0 // large_divisor
+	mmulfx.w r5,r4,r4
+	shlri r2,32+14,r19
+	addi r22,-31,r0
+	msub.w r1,r4,r1
+
+	mulu.l r1,r7,r4
+	addi r1,-3,r5
+	mulu.l r5,r19,r5
+	sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+	shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+	                 the case may be, %0000000000000000 000.11111111111, still */
+	muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+	mulu.l r5,r3,r8
+	mshalds.l r1,r21,r1
+	shari r4,26,r4
+	shlld r8,r0,r8
+	add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+	sub r2,r8,r2
+	/* Can do second step of 64 : 32 div now, using r1 and the rest in r2.  */
+
+	shlri r2,22,r21
+	mulu.l r21,r1,r21
+	shlld r5,r0,r8
+	addi r20,30-22,r0
+	shlrd r21,r0,r21
+	mulu.l r21,r3,r5
+	add r8,r21,r8
+	mcmpgt.l r21,r63,r21 // See Note 1
+	addi r20,30,r0
+	mshfhi.l r63,r21,r21
+	sub r2,r5,r2
+	andc r2,r21,r2
+
+	/* small divisor: need a third divide step */
+	mulu.l r2,r1,r7
+	ptabs r18,tr0
+	addi r2,1,r2
+	shlrd r7,r0,r7
+	mulu.l r7,r3,r5
+	add r8,r7,r8
+	sub r2,r3,r2
+	cmpgt r2,r5,r5
+	add r8,r5,r2
+	/* could test r3 here to check for divide by zero.  */
+	blink tr0,r63
+
+LOCAL(large_divisor):
+	mmulfx.w r5,r4,r4
+	shlrd r2,r9,r25
+	shlri r25,32,r8
+	msub.w r1,r4,r1
+
+	mulu.l r1,r7,r4
+	addi r1,-3,r5
+	mulu.l r5,r8,r5
+	sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+	shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+	                 the case may be, %0000000000000000 000.11111111111, still */
+	muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+	shlri r5,14-1,r8
+	mulu.l r8,r7,r5
+	mshalds.l r1,r21,r1
+	shari r4,26,r4
+	add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+	sub r25,r5,r25
+	/* Can do second step of 64 : 32 div now, using r1 and the rest in r25.  */
+
+	shlri r25,22,r21
+	mulu.l r21,r1,r21
+	pta LOCAL(no_lo_adj),tr0
+	addi r22,32,r0
+	shlri r21,40,r21
+	mulu.l r21,r7,r5
+	add r8,r21,r8
+	shlld r2,r0,r2
+	sub r25,r5,r25
+	bgtu/u r7,r25,tr0 // no_lo_adj
+	addi r8,1,r8
+	sub r25,r7,r25
+LOCAL(no_lo_adj):
+	mextr4 r2,r25,r2
+
+	/* large_divisor: only needs a few adjustments.  */
+	mulu.l r8,r6,r5
+	ptabs r18,tr0
+	/* bubble */
+	cmpgtu r5,r2,r5
+	sub r8,r5,r2
+	blink tr0,r63
+	ENDFUNC(GLOBAL(udivdi3))
+/* Note 1: To shift the result of the second divide stage so that the result
+   always fits into 32 bits, yet we still reduce the rest sufficiently
+   would require a lot of instructions to do the shifts just right.  Using
+   the full 64 bit shift result to multiply with the divisor would require
+   four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
+   Fortunately, if the upper 32 bits of the shift result are nonzero, we
+   know that the rest after taking this partial result into account will
+   fit into 32 bits.  So we just clear the upper 32 bits of the rest if the
+   upper 32 bits of the partial result are nonzero.  */
+#endif /* __SHMEDIA__ */
+#endif /* L_udivdi3 */
+
+#ifdef L_divdi3
+#ifdef __SHMEDIA__
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	.global	GLOBAL(divdi3)
+	FUNC(GLOBAL(divdi3))
+GLOBAL(divdi3):
+	pta GLOBAL(udivdi3_internal),tr0
+	shari r2,63,r22
+	shari r3,63,r23
+	xor r2,r22,r2
+	xor r3,r23,r3
+	sub r2,r22,r2
+	sub r3,r23,r3
+	beq/u r22,r23,tr0
+	ptabs r18,tr1
+	blink tr0,r18
+	sub r63,r2,r2
+	blink tr1,r63
+	ENDFUNC(GLOBAL(divdi3))
+#endif /* __SHMEDIA__ */
+#endif /* L_divdi3 */
+
+#ifdef L_umoddi3
+#ifdef __SHMEDIA__
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	.global	GLOBAL(umoddi3)
+	FUNC(GLOBAL(umoddi3))
+GLOBAL(umoddi3):
+	HIDDEN_ALIAS(umoddi3_internal,umoddi3)
+	shlri r3,1,r4
+	nsb r4,r22
+	shlld r3,r22,r6
+	shlri r6,49,r5
+	movi 0xffffffffffffbaf1,r21 /* .l shift count 17.  */
+	sub r21,r5,r1
+	mmulfx.w r1,r1,r4
+	mshflo.w r1,r63,r1
+	sub r63,r22,r20 // r63 == 64 % 64
+	mmulfx.w r5,r4,r4
+	pta LOCAL(large_divisor),tr0
+	addi r20,32,r9
+	msub.w r1,r4,r1
+	madd.w r1,r1,r1
+	mmulfx.w r1,r1,r4
+	shlri r6,32,r7
+	bgt/u r9,r63,tr0 // large_divisor
+	mmulfx.w r5,r4,r4
+	shlri r2,32+14,r19
+	addi r22,-31,r0
+	msub.w r1,r4,r1
+
+	mulu.l r1,r7,r4
+	addi r1,-3,r5
+	mulu.l r5,r19,r5
+	sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+	shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+	                 the case may be, %0000000000000000 000.11111111111, still */
+	muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+	mulu.l r5,r3,r5
+	mshalds.l r1,r21,r1
+	shari r4,26,r4
+	shlld r5,r0,r5
+	add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+	sub r2,r5,r2
+	/* Can do second step of 64 : 32 div now, using r1 and the rest in r2.  */
+
+	shlri r2,22,r21
+	mulu.l r21,r1,r21
+	addi r20,30-22,r0
+	/* bubble */ /* could test r3 here to check for divide by zero.  */
+	shlrd r21,r0,r21
+	mulu.l r21,r3,r5
+	mcmpgt.l r21,r63,r21 // See Note 1
+	addi r20,30,r0
+	mshfhi.l r63,r21,r21
+	sub r2,r5,r2
+	andc r2,r21,r2
+
+	/* small divisor: need a third divide step */
+	mulu.l r2,r1,r7
+	ptabs r18,tr0
+	sub r2,r3,r8 /* re-use r8 here for rest - r3 */
+	shlrd r7,r0,r7
+	mulu.l r7,r3,r5
+	/* bubble */
+	addi r8,1,r7
+	cmpgt r7,r5,r7
+	cmvne r7,r8,r2
+	sub r2,r5,r2
+	blink tr0,r63
+
+LOCAL(large_divisor):
+	mmulfx.w r5,r4,r4
+	shlrd r2,r9,r25
+	shlri r25,32,r8
+	msub.w r1,r4,r1
+
+	mulu.l r1,r7,r4
+	addi r1,-3,r5
+	mulu.l r5,r8,r5
+	sub r63,r4,r4 // Negate to make sure r1 ends up <= 1/r2
+	shlri r4,2,r4 /* chop off leading %0000000000000000 001.00000000000 - or, as
+	                 the case may be, %0000000000000000 000.11111111111, still */
+	muls.l r1,r4,r4 /* leaving at least one sign bit.  */
+	shlri r5,14-1,r8
+	mulu.l r8,r7,r5
+	mshalds.l r1,r21,r1
+	shari r4,26,r4
+	add r1,r4,r1 // 31 bit unsigned reciprocal now in r1 (msb equiv. 0.5)
+	sub r25,r5,r25
+	/* Can do second step of 64 : 32 div now, using r1 and the rest in r25.  */
+
+	shlri r25,22,r21
+	mulu.l r21,r1,r21
+	pta LOCAL(no_lo_adj),tr0
+	addi r22,32,r0
+	shlri r21,40,r21
+	mulu.l r21,r7,r5
+	add r8,r21,r8
+	shlld r2,r0,r2
+	sub r25,r5,r25
+	bgtu/u r7,r25,tr0 // no_lo_adj
+	addi r8,1,r8
+	sub r25,r7,r25
+LOCAL(no_lo_adj):
+	mextr4 r2,r25,r2
+
+	/* large_divisor: only needs a few adjustments.  */
+	mulu.l r8,r6,r5
+	ptabs r18,tr0
+	add r2,r6,r7
+	cmpgtu r5,r2,r8
+	cmvne r8,r7,r2
+	sub r2,r5,r2
+	shlrd r2,r22,r2
+	blink tr0,r63
+	ENDFUNC(GLOBAL(umoddi3))
+/* Note 1: To shift the result of the second divide stage so that the result
+   always fits into 32 bits, yet we still reduce the rest sufficiently
+   would require a lot of instructions to do the shifts just right.  Using
+   the full 64 bit shift result to multiply with the divisor would require
+   four extra instructions for the upper 32 bits (shift / mulu / shift / sub).
+   Fortunately, if the upper 32 bits of the shift result are nonzero, we
+   know that the rest after taking this partial result into account will
+   fit into 32 bits.  So we just clear the upper 32 bits of the rest if the
+   upper 32 bits of the partial result are nonzero.  */
+#endif /* __SHMEDIA__ */
+#endif /* L_umoddi3 */
+
+#ifdef L_moddi3
+#ifdef __SHMEDIA__
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	.global	GLOBAL(moddi3)
+	FUNC(GLOBAL(moddi3))
+GLOBAL(moddi3):
+	pta GLOBAL(umoddi3_internal),tr0
+	shari r2,63,r22
+	shari r3,63,r23
+	xor r2,r22,r2
+	xor r3,r23,r3
+	sub r2,r22,r2
+	sub r3,r23,r3
+	beq/u r22,r63,tr0
+	ptabs r18,tr1
+	blink tr0,r18
+	sub r63,r2,r2
+	blink tr1,r63
+	ENDFUNC(GLOBAL(moddi3))
+#endif /* __SHMEDIA__ */
+#endif /* L_moddi3 */
+
+#ifdef L_set_fpscr
+#if !defined (__SH2A_NOFPU__)
+#if defined (__SH2E__) || defined (__SH2A__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || __SH5__ == 32
+#ifdef __SH5__
+	.mode	SHcompact
+#endif
+	.global GLOBAL(set_fpscr)
+	HIDDEN_FUNC(GLOBAL(set_fpscr))
+GLOBAL(set_fpscr):
+	lds r4,fpscr
+#ifdef __PIC__
+	mov.l	r12,@-r15
+#ifdef __vxworks
+	mov.l	LOCAL(set_fpscr_L0_base),r12
+	mov.l	LOCAL(set_fpscr_L0_index),r0
+	mov.l	@r12,r12
+	mov.l	@(r0,r12),r12
+#else
+	mova	LOCAL(set_fpscr_L0),r0
+	mov.l	LOCAL(set_fpscr_L0),r12
+	add	r0,r12
+#endif
+	mov.l	LOCAL(set_fpscr_L1),r0
+	mov.l	@(r0,r12),r1
+	mov.l	@r15+,r12
+#else
+	mov.l LOCAL(set_fpscr_L1),r1
+#endif
+	swap.w r4,r0
+	or #24,r0
+#ifndef FMOVD_WORKS
+	xor #16,r0
+#endif
+#if defined(__SH4__) || defined (__SH2A_DOUBLE__)
+	swap.w r0,r3
+	mov.l r3,@(4,r1)
+#else /* defined (__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */
+	swap.w r0,r2
+	mov.l r2,@r1
+#endif
+#ifndef FMOVD_WORKS
+	xor #8,r0
+#else
+	xor #24,r0
+#endif
+#if defined(__SH4__) || defined (__SH2A_DOUBLE__)
+	swap.w r0,r2
+	rts
+	mov.l r2,@r1
+#else /* defined(__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE*__) */
+	swap.w r0,r3
+	rts
+	mov.l r3,@(4,r1)
+#endif
+	.align 2
+#ifdef __PIC__
+#ifdef __vxworks
+LOCAL(set_fpscr_L0_base):
+	.long ___GOTT_BASE__
+LOCAL(set_fpscr_L0_index):
+	.long ___GOTT_INDEX__
+#else
+LOCAL(set_fpscr_L0):
+	.long _GLOBAL_OFFSET_TABLE_
+#endif
+LOCAL(set_fpscr_L1):
+	.long GLOBAL(fpscr_values@GOT)
+#else
+LOCAL(set_fpscr_L1):
+	.long GLOBAL(fpscr_values)
+#endif
+
+	ENDFUNC(GLOBAL(set_fpscr))
+#ifndef NO_FPSCR_VALUES
+#ifdef __ELF__
+        .comm   GLOBAL(fpscr_values),8,4
+#else
+        .comm   GLOBAL(fpscr_values),8
+#endif /* ELF */
+#endif /* NO_FPSCR_VALUES */
+#endif /* SH2E / SH3E / SH4 */
+#endif /* __SH2A_NOFPU__ */
+#endif /* L_set_fpscr */
+#ifdef L_ic_invalidate
+#if __SH5__ == 32
+	.mode	SHmedia
+	.section	.text..SHmedia32,"ax"
+	.align	2
+	.global	GLOBAL(init_trampoline)
+	HIDDEN_FUNC(GLOBAL(init_trampoline))
+GLOBAL(init_trampoline):
+	st.l	r0,8,r2
+#ifdef __LITTLE_ENDIAN__
+	movi	9,r20
+	shori	0x402b,r20
+	shori	0xd101,r20
+	shori	0xd002,r20
+#else
+	movi	0xffffffffffffd002,r20
+	shori	0xd101,r20
+	shori	0x402b,r20
+	shori	9,r20
+#endif
+	st.q	r0,0,r20
+	st.l	r0,12,r3
+	ENDFUNC(GLOBAL(init_trampoline))
+	.global	GLOBAL(ic_invalidate)
+	HIDDEN_FUNC(GLOBAL(ic_invalidate))
+GLOBAL(ic_invalidate):
+	ocbwb	r0,0
+	synco
+	icbi	r0, 0
+	ptabs	r18, tr0
+	synci
+	blink	tr0, r63
+	ENDFUNC(GLOBAL(ic_invalidate))
+#elif defined(__SH4A__)
+	.global GLOBAL(ic_invalidate)
+	HIDDEN_FUNC(GLOBAL(ic_invalidate))
+GLOBAL(ic_invalidate):
+	ocbwb	@r4
+	synco
+	icbi	@r4
+	rts
+	  nop
+	ENDFUNC(GLOBAL(ic_invalidate))
+#elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || (defined(__SH4_NOFPU__) && !defined(__SH5__))
+	/* For system code, we use ic_invalidate_line_i, but user code
+	   needs a different mechanism.  A kernel call is generally not
+	   available, and it would also be slow.  Different SH4 variants use
+	   different sizes and associativities of the Icache.  We use a small
+	   bit of dispatch code that can be put hidden in every shared object,
+	   which calls the actual processor-specific invalidation code in a
+	   separate module.
+	   Or if you have operating system support, the OS could mmap the
+	   procesor-specific code from a single page, since it is highly
+	   repetitive.  */
+	.global GLOBAL(ic_invalidate)
+	HIDDEN_FUNC(GLOBAL(ic_invalidate))
+GLOBAL(ic_invalidate):
+#ifdef __pic__
+#ifdef __vxworks
+	mov.l	1f,r1
+	mov.l	2f,r0
+	mov.l	@r1,r1
+	mov.l	0f,r2
+	mov.l	@(r0,r1),r0
+#else
+	mov.l	1f,r1
+	mova	1f,r0
+	mov.l	0f,r2
+	add	r1,r0
+#endif
+	mov.l	@(r0,r2),r1
+#else
+	mov.l	0f,r1
+#endif
+	ocbwb	@r4
+	mov.l	@(8,r1),r0
+	sub	r1,r4
+	and	r4,r0
+	add	r1,r0
+	jmp	@r0
+	mov.l	@(4,r1),r0
+	.align	2
+#ifndef __pic__
+0:	.long   GLOBAL(ic_invalidate_array)
+#else /* __pic__ */
+	.global GLOBAL(ic_invalidate_array)
+0:	.long   GLOBAL(ic_invalidate_array)@GOT
+#ifdef __vxworks
+1:	.long	___GOTT_BASE__
+2:	.long	___GOTT_INDEX__
+#else
+1:	.long   _GLOBAL_OFFSET_TABLE_
+#endif
+	ENDFUNC(GLOBAL(ic_invalidate))
+#endif /* __pic__ */
+#endif /* SH4 */
+#endif /* L_ic_invalidate */
+
+#ifdef L_ic_invalidate_array
+#if defined(__SH4A__) || (defined (__FORCE_SH4A__) && (defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || (defined(__SH4_NOFPU__) && !defined(__SH5__))))
+	.global GLOBAL(ic_invalidate_array)
+	/* This is needed when an SH4 dso with trampolines is used on SH4A.  */
+	.global GLOBAL(ic_invalidate_array)
+	FUNC(GLOBAL(ic_invalidate_array))
+GLOBAL(ic_invalidate_array):
+	add	r1,r4
+	synco
+	icbi	@r4
+	rts
+	  nop
+	.align 2
+	.long	0
+	ENDFUNC(GLOBAL(ic_invalidate_array))
+#elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || (defined(__SH4_NOFPU__) && !defined(__SH5__))
+	.global GLOBAL(ic_invalidate_array)
+	.p2align 5
+	FUNC(GLOBAL(ic_invalidate_array))
+/* This must be aligned to the beginning of a cache line.  */
+GLOBAL(ic_invalidate_array):
+#ifndef WAYS
+#define WAYS 4
+#define WAY_SIZE 0x4000
+#endif
+#if WAYS == 1
+	.rept	WAY_SIZE * WAYS / 32
+	rts
+	nop
+	.rept	7
+	.long	WAY_SIZE - 32
+	.endr
+	.endr
+#elif WAYS <= 6
+	.rept	WAY_SIZE * WAYS / 32
+	braf	r0
+	add	#-8,r0
+	.long	WAY_SIZE + 8
+	.long	WAY_SIZE - 32
+	.rept	WAYS-2
+	braf	r0
+	nop
+	.endr
+	.rept	7 - WAYS
+	rts
+	nop
+	.endr
+	.endr
+#else /* WAYS > 6 */
+	/* This variant needs two different pages for mmap-ing.  */
+ 	.rept	WAYS-1
+	.rept	WAY_SIZE / 32
+	braf	r0
+	nop
+	.long	WAY_SIZE
+	.rept 6
+	.long	WAY_SIZE - 32
+	.endr
+	.endr
+	.endr
+	.rept	WAY_SIZE / 32
+	rts
+	.rept	15
+	nop
+	.endr
+	.endr
+#endif /* WAYS */
+	ENDFUNC(GLOBAL(ic_invalidate_array))
+#endif /* SH4 */
+#endif /* L_ic_invalidate_array */
+
+#if defined (__SH5__) && __SH5__ == 32
+#ifdef L_shcompact_call_trampoline
+	.section	.rodata
+	.align	1
+LOCAL(ct_main_table):
+.word	LOCAL(ct_r2_fp) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r2_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r2_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r3_fp) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r3_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r3_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r4_fp) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r4_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r4_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r5_fp) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r5_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r5_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r6_fph) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r6_fpl) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r6_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r6_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r7_fph) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r7_fpl) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r7_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r7_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r8_fph) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r8_fpl) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r8_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r8_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r9_fph) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r9_fpl) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r9_ld) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r9_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_pop_seq) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_pop_seq) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_r9_pop) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_ret_wide) - datalabel LOCAL(ct_main_label)
+.word	LOCAL(ct_call_func) - datalabel LOCAL(ct_main_label)
+	.mode	SHmedia
+	.section	.text..SHmedia32, "ax"
+	.align	2
+	
+     /* This function loads 64-bit general-purpose registers from the
+	stack, from a memory address contained in them or from an FP
+	register, according to a cookie passed in r1.  Its execution
+	time is linear on the number of registers that actually have
+	to be copied.  See sh.h for details on the actual bit pattern.
+
+	The function to be called is passed in r0.  If a 32-bit return
+	value is expected, the actual function will be tail-called,
+	otherwise the return address will be stored in r10 (that the
+	caller should expect to be clobbered) and the return value
+	will be expanded into r2/r3 upon return.  */
+	
+	.global	GLOBAL(GCC_shcompact_call_trampoline)
+	FUNC(GLOBAL(GCC_shcompact_call_trampoline))
+GLOBAL(GCC_shcompact_call_trampoline):
+	ptabs/l	r0, tr0	/* Prepare to call the actual function.  */
+	movi	((datalabel LOCAL(ct_main_table) - 31 * 2) >> 16) & 65535, r0
+	pt/l	LOCAL(ct_loop), tr1
+	addz.l	r1, r63, r1
+	shori	((datalabel LOCAL(ct_main_table) - 31 * 2)) & 65535, r0
+LOCAL(ct_loop):
+	nsb	r1, r28
+	shlli	r28, 1, r29
+	ldx.w	r0, r29, r30
+LOCAL(ct_main_label):
+	ptrel/l	r30, tr2
+	blink	tr2, r63
+LOCAL(ct_r2_fp):	/* Copy r2 from an FP register.  */
+	/* It must be dr0, so just do it.  */
+	fmov.dq	dr0, r2
+	movi	7, r30
+	shlli	r30, 29, r31
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r3_fp):	/* Copy r3 from an FP register.  */
+	/* It is either dr0 or dr2.  */
+	movi	7, r30
+	shlri	r1, 26, r32
+	shlli	r30, 26, r31
+	andc	r1, r31, r1
+	fmov.dq	dr0, r3
+	beqi/l	r32, 4, tr1
+	fmov.dq	dr2, r3
+	blink	tr1, r63
+LOCAL(ct_r4_fp):	/* Copy r4 from an FP register.  */
+	shlri	r1, 23 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r4_fp_copy) - datalabel LOCAL(ct_r4_fp_base), r32
+LOCAL(ct_r4_fp_base):
+	ptrel/l	r32, tr2
+	movi	7, r30
+	shlli	r30, 23, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r4_fp_copy):
+	fmov.dq	dr0, r4
+	blink	tr1, r63
+	fmov.dq	dr2, r4
+	blink	tr1, r63
+	fmov.dq	dr4, r4
+	blink	tr1, r63
+LOCAL(ct_r5_fp):	/* Copy r5 from an FP register.  */
+	shlri	r1, 20 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r5_fp_copy) - datalabel LOCAL(ct_r5_fp_base), r32
+LOCAL(ct_r5_fp_base):
+	ptrel/l	r32, tr2
+	movi	7, r30
+	shlli	r30, 20, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r5_fp_copy):
+	fmov.dq	dr0, r5
+	blink	tr1, r63
+	fmov.dq	dr2, r5
+	blink	tr1, r63
+	fmov.dq	dr4, r5
+	blink	tr1, r63
+	fmov.dq	dr6, r5
+	blink	tr1, r63
+LOCAL(ct_r6_fph):	/* Copy r6 from a high FP register.  */
+	/* It must be dr8.  */
+	fmov.dq	dr8, r6
+	movi	15, r30
+	shlli	r30, 16, r31
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r6_fpl):	/* Copy r6 from a low FP register.  */
+	shlri	r1, 16 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r6_fp_copy) - datalabel LOCAL(ct_r6_fp_base), r32
+LOCAL(ct_r6_fp_base):
+	ptrel/l	r32, tr2
+	movi	7, r30
+	shlli	r30, 16, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r6_fp_copy):
+	fmov.dq	dr0, r6
+	blink	tr1, r63
+	fmov.dq	dr2, r6
+	blink	tr1, r63
+	fmov.dq	dr4, r6
+	blink	tr1, r63
+	fmov.dq	dr6, r6
+	blink	tr1, r63
+LOCAL(ct_r7_fph):	/* Copy r7 from a high FP register.  */
+	/* It is either dr8 or dr10.  */
+	movi	15 << 12, r31
+	shlri	r1, 12, r32
+	andc	r1, r31, r1
+	fmov.dq	dr8, r7
+	beqi/l	r32, 8, tr1
+	fmov.dq	dr10, r7
+	blink	tr1, r63
+LOCAL(ct_r7_fpl):	/* Copy r7 from a low FP register.  */
+	shlri	r1, 12 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r7_fp_copy) - datalabel LOCAL(ct_r7_fp_base), r32
+LOCAL(ct_r7_fp_base):
+	ptrel/l	r32, tr2
+	movi	7 << 12, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r7_fp_copy):
+	fmov.dq	dr0, r7
+	blink	tr1, r63
+	fmov.dq	dr2, r7
+	blink	tr1, r63
+	fmov.dq	dr4, r7
+	blink	tr1, r63
+	fmov.dq	dr6, r7
+	blink	tr1, r63
+LOCAL(ct_r8_fph):	/* Copy r8 from a high FP register.  */
+	/* It is either dr8 or dr10.  */
+	movi	15 << 8, r31
+	andi	r1, 1 << 8, r32
+	andc	r1, r31, r1
+	fmov.dq	dr8, r8
+	beq/l	r32, r63, tr1
+	fmov.dq	dr10, r8
+	blink	tr1, r63
+LOCAL(ct_r8_fpl):	/* Copy r8 from a low FP register.  */
+	shlri	r1, 8 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r8_fp_copy) - datalabel LOCAL(ct_r8_fp_base), r32
+LOCAL(ct_r8_fp_base):
+	ptrel/l	r32, tr2
+	movi	7 << 8, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r8_fp_copy):
+	fmov.dq	dr0, r8
+	blink	tr1, r63
+	fmov.dq	dr2, r8
+	blink	tr1, r63
+	fmov.dq	dr4, r8
+	blink	tr1, r63
+	fmov.dq	dr6, r8
+	blink	tr1, r63
+LOCAL(ct_r9_fph):	/* Copy r9 from a high FP register.  */
+	/* It is either dr8 or dr10.  */
+	movi	15 << 4, r31
+	andi	r1, 1 << 4, r32
+	andc	r1, r31, r1
+	fmov.dq	dr8, r9
+	beq/l	r32, r63, tr1
+	fmov.dq	dr10, r9
+	blink	tr1, r63
+LOCAL(ct_r9_fpl):	/* Copy r9 from a low FP register.  */
+	shlri	r1, 4 - 3, r34
+	andi	r34, 3 << 3, r33
+	addi	r33, LOCAL(ct_r9_fp_copy) - datalabel LOCAL(ct_r9_fp_base), r32
+LOCAL(ct_r9_fp_base):
+	ptrel/l	r32, tr2
+	movi	7 << 4, r31
+	andc	r1, r31, r1
+	blink	tr2, r63
+LOCAL(ct_r9_fp_copy):
+	fmov.dq	dr0, r9
+	blink	tr1, r63
+	fmov.dq	dr2, r9
+	blink	tr1, r63
+	fmov.dq	dr4, r9
+	blink	tr1, r63
+	fmov.dq	dr6, r9
+	blink	tr1, r63
+LOCAL(ct_r2_ld):	/* Copy r2 from a memory address.  */
+	pt/l	LOCAL(ct_r2_load), tr2
+	movi	3, r30
+	shlli	r30, 29, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r2, 8, r3
+	ldx.q	r2, r63, r2
+	/* Fall through.  */
+LOCAL(ct_r3_ld):	/* Copy r3 from a memory address.  */
+	pt/l	LOCAL(ct_r3_load), tr2
+	movi	3, r30
+	shlli	r30, 26, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r3, 8, r4
+	ldx.q	r3, r63, r3
+LOCAL(ct_r4_ld):	/* Copy r4 from a memory address.  */
+	pt/l	LOCAL(ct_r4_load), tr2
+	movi	3, r30
+	shlli	r30, 23, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r4, 8, r5
+	ldx.q	r4, r63, r4
+LOCAL(ct_r5_ld):	/* Copy r5 from a memory address.  */
+	pt/l	LOCAL(ct_r5_load), tr2
+	movi	3, r30
+	shlli	r30, 20, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r5, 8, r6
+	ldx.q	r5, r63, r5
+LOCAL(ct_r6_ld):	/* Copy r6 from a memory address.  */
+	pt/l	LOCAL(ct_r6_load), tr2
+	movi	3 << 16, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r6, 8, r7
+	ldx.q	r6, r63, r6
+LOCAL(ct_r7_ld):	/* Copy r7 from a memory address.  */
+	pt/l	LOCAL(ct_r7_load), tr2
+	movi	3 << 12, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r7, 8, r8
+	ldx.q	r7, r63, r7
+LOCAL(ct_r8_ld):	/* Copy r8 from a memory address.  */
+	pt/l	LOCAL(ct_r8_load), tr2
+	movi	3 << 8, r31
+	and	r1, r31, r32
+	andc	r1, r31, r1
+	beq/l	r31, r32, tr2
+	addi.l	r8, 8, r9
+	ldx.q	r8, r63, r8
+LOCAL(ct_r9_ld):	/* Copy r9 from a memory address.  */
+	pt/l	LOCAL(ct_check_tramp), tr2
+	ldx.q	r9, r63, r9
+	blink	tr2, r63
+LOCAL(ct_r2_load):
+	ldx.q	r2, r63, r2
+	blink	tr1, r63
+LOCAL(ct_r3_load):
+	ldx.q	r3, r63, r3
+	blink	tr1, r63
+LOCAL(ct_r4_load):
+	ldx.q	r4, r63, r4
+	blink	tr1, r63
+LOCAL(ct_r5_load):
+	ldx.q	r5, r63, r5
+	blink	tr1, r63
+LOCAL(ct_r6_load):
+	ldx.q	r6, r63, r6
+	blink	tr1, r63
+LOCAL(ct_r7_load):
+	ldx.q	r7, r63, r7
+	blink	tr1, r63
+LOCAL(ct_r8_load):
+	ldx.q	r8, r63, r8
+	blink	tr1, r63
+LOCAL(ct_r2_pop):	/* Pop r2 from the stack.  */
+	movi	1, r30
+	ldx.q	r15, r63, r2
+	shlli	r30, 29, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r3_pop):	/* Pop r3 from the stack.  */
+	movi	1, r30
+	ldx.q	r15, r63, r3
+	shlli	r30, 26, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r4_pop):	/* Pop r4 from the stack.  */
+	movi	1, r30
+	ldx.q	r15, r63, r4
+	shlli	r30, 23, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r5_pop):	/* Pop r5 from the stack.  */
+	movi	1, r30
+	ldx.q	r15, r63, r5
+	shlli	r30, 20, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r6_pop):	/* Pop r6 from the stack.  */
+	movi	1, r30
+	ldx.q	r15, r63, r6
+	shlli	r30, 16, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r7_pop):	/* Pop r7 from the stack.  */
+	ldx.q	r15, r63, r7
+	movi	1 << 12, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_r8_pop):	/* Pop r8 from the stack.  */
+	ldx.q	r15, r63, r8
+	movi	1 << 8, r31
+	addi.l	r15, 8, r15
+	andc	r1, r31, r1
+	blink	tr1, r63
+LOCAL(ct_pop_seq):	/* Pop a sequence of registers off the stack.  */
+	andi	r1, 7 << 1, r30
+	movi	(LOCAL(ct_end_of_pop_seq) >> 16) & 65535, r32
+	shlli	r30, 2, r31
+	shori	LOCAL(ct_end_of_pop_seq) & 65535, r32
+	sub.l	r32, r31, r33
+	ptabs/l	r33, tr2
+	blink	tr2, r63
+LOCAL(ct_start_of_pop_seq):	/* Beginning of pop sequence.  */
+	ldx.q	r15, r63, r3
+	addi.l	r15, 8, r15
+	ldx.q	r15, r63, r4
+	addi.l	r15, 8, r15
+	ldx.q	r15, r63, r5
+	addi.l	r15, 8, r15
+	ldx.q	r15, r63, r6
+	addi.l	r15, 8, r15
+	ldx.q	r15, r63, r7
+	addi.l	r15, 8, r15
+	ldx.q	r15, r63, r8
+	addi.l	r15, 8, r15
+LOCAL(ct_r9_pop):	/* Pop r9 from the stack.  */
+	ldx.q	r15, r63, r9
+	addi.l	r15, 8, r15
+LOCAL(ct_end_of_pop_seq): /* Label used to compute first pop instruction.  */
+LOCAL(ct_check_tramp):	/* Check whether we need a trampoline.  */
+	pt/u	LOCAL(ct_ret_wide), tr2
+	andi	r1, 1, r1
+	bne/u	r1, r63, tr2
+LOCAL(ct_call_func):	/* Just branch to the function.  */
+	blink	tr0, r63
+LOCAL(ct_ret_wide):	/* Call the function, so that we can unpack its 
+			   64-bit return value.  */
+	add.l	r18, r63, r10
+	blink	tr0, r18
+	ptabs	r10, tr0
+#if __LITTLE_ENDIAN__
+	shari	r2, 32, r3
+	add.l	r2, r63, r2
+#else
+	add.l	r2, r63, r3
+	shari	r2, 32, r2
+#endif
+	blink	tr0, r63
+
+	ENDFUNC(GLOBAL(GCC_shcompact_call_trampoline))
+#endif /* L_shcompact_call_trampoline */
+
+#ifdef L_shcompact_return_trampoline
+     /* This function does the converse of the code in `ret_wide'
+	above.  It is tail-called by SHcompact functions returning
+	64-bit non-floating-point values, to pack the 32-bit values in
+	r2 and r3 into r2.  */
+
+	.mode	SHmedia
+	.section	.text..SHmedia32, "ax"
+	.align	2
+	.global	GLOBAL(GCC_shcompact_return_trampoline)
+	HIDDEN_FUNC(GLOBAL(GCC_shcompact_return_trampoline))
+GLOBAL(GCC_shcompact_return_trampoline):
+	ptabs/l	r18, tr0
+#if __LITTLE_ENDIAN__
+	addz.l	r2, r63, r2
+	shlli	r3, 32, r3
+#else
+	addz.l	r3, r63, r3
+	shlli	r2, 32, r2
+#endif
+	or	r3, r2, r2
+	blink	tr0, r63
+
+	ENDFUNC(GLOBAL(GCC_shcompact_return_trampoline))
+#endif /* L_shcompact_return_trampoline */
+
+#ifdef L_shcompact_incoming_args
+	.section	.rodata
+	.align	1
+LOCAL(ia_main_table):
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r2_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r2_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r3_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r3_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r4_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r4_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r5_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r5_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r6_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r6_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r7_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r7_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r8_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r8_push) - datalabel LOCAL(ia_main_label)
+.word	1 /* Invalid, just loop */
+.word	1 /* Invalid, just loop */
+.word	LOCAL(ia_r9_ld) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r9_push) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_push_seq) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_push_seq) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_r9_push) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_return) - datalabel LOCAL(ia_main_label)
+.word	LOCAL(ia_return) - datalabel LOCAL(ia_main_label)
+	.mode	SHmedia
+	.section	.text..SHmedia32, "ax"
+	.align	2
+	
+     /* This function stores 64-bit general-purpose registers back in
+	the stack, and loads the address in which each register
+	was stored into itself.  The lower 32 bits of r17 hold the address
+	to begin storing, and the upper 32 bits of r17 hold the cookie.
+	Its execution time is linear on the
+	number of registers that actually have to be copied, and it is
+	optimized for structures larger than 64 bits, as opposed to
+	individual `long long' arguments.  See sh.h for details on the
+	actual bit pattern.  */
+	
+	.global	GLOBAL(GCC_shcompact_incoming_args)
+ 	FUNC(GLOBAL(GCC_shcompact_incoming_args))
+GLOBAL(GCC_shcompact_incoming_args):
+	ptabs/l	r18, tr0	/* Prepare to return.  */
+	shlri	r17, 32, r0	/* Load the cookie.  */
+	movi	((datalabel LOCAL(ia_main_table) - 31 * 2) >> 16) & 65535, r43
+	pt/l	LOCAL(ia_loop), tr1
+	add.l	r17, r63, r17
+	shori	((datalabel LOCAL(ia_main_table) - 31 * 2)) & 65535, r43
+LOCAL(ia_loop):
+	nsb	r0, r36
+	shlli	r36, 1, r37
+	ldx.w	r43, r37, r38
+LOCAL(ia_main_label):
+	ptrel/l	r38, tr2
+	blink	tr2, r63
+LOCAL(ia_r2_ld):	/* Store r2 and load its address.  */
+	movi	3, r38
+	shlli	r38, 29, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r2
+	add.l	r17, r63, r2
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r3_ld):	/* Store r3 and load its address.  */
+	movi	3, r38
+	shlli	r38, 26, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r3
+	add.l	r17, r63, r3
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r4_ld):	/* Store r4 and load its address.  */
+	movi	3, r38
+	shlli	r38, 23, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r4
+	add.l	r17, r63, r4
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r5_ld):	/* Store r5 and load its address.  */
+	movi	3, r38
+	shlli	r38, 20, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r5
+	add.l	r17, r63, r5
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r6_ld):	/* Store r6 and load its address.  */
+	movi	3, r38
+	shlli	r38, 16, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r6
+	add.l	r17, r63, r6
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r7_ld):	/* Store r7 and load its address.  */
+	movi	3 << 12, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r7
+	add.l	r17, r63, r7
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r8_ld):	/* Store r8 and load its address.  */
+	movi	3 << 8, r39
+	and	r0, r39, r40
+	andc	r0, r39, r0
+	stx.q	r17, r63, r8
+	add.l	r17, r63, r8
+	addi.l	r17, 8, r17
+	beq/u	r39, r40, tr1
+LOCAL(ia_r9_ld):	/* Store r9 and load its address.  */
+	stx.q	r17, r63, r9
+	add.l	r17, r63, r9
+	blink	tr0, r63
+LOCAL(ia_r2_push):	/* Push r2 onto the stack.  */
+	movi	1, r38
+	shlli	r38, 29, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r2
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r3_push):	/* Push r3 onto the stack.  */
+	movi	1, r38
+	shlli	r38, 26, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r3
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r4_push):	/* Push r4 onto the stack.  */
+	movi	1, r38
+	shlli	r38, 23, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r4
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r5_push):	/* Push r5 onto the stack.  */
+	movi	1, r38
+	shlli	r38, 20, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r5
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r6_push):	/* Push r6 onto the stack.  */
+	movi	1, r38
+	shlli	r38, 16, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r6
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r7_push):	/* Push r7 onto the stack.  */
+	movi	1 << 12, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r7
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_r8_push):	/* Push r8 onto the stack.  */
+	movi	1 << 8, r39
+	andc	r0, r39, r0
+	stx.q	r17, r63, r8
+	addi.l	r17, 8, r17
+	blink	tr1, r63
+LOCAL(ia_push_seq):	/* Push a sequence of registers onto the stack.  */
+	andi	r0, 7 << 1, r38
+	movi	(LOCAL(ia_end_of_push_seq) >> 16) & 65535, r40
+	shlli	r38, 2, r39
+	shori	LOCAL(ia_end_of_push_seq) & 65535, r40
+	sub.l	r40, r39, r41
+	ptabs/l	r41, tr2
+	blink	tr2, r63
+LOCAL(ia_stack_of_push_seq):	 /* Beginning of push sequence.  */
+	stx.q	r17, r63, r3
+	addi.l	r17, 8, r17
+	stx.q	r17, r63, r4
+	addi.l	r17, 8, r17
+	stx.q	r17, r63, r5
+	addi.l	r17, 8, r17
+	stx.q	r17, r63, r6
+	addi.l	r17, 8, r17
+	stx.q	r17, r63, r7
+	addi.l	r17, 8, r17
+	stx.q	r17, r63, r8
+	addi.l	r17, 8, r17
+LOCAL(ia_r9_push):	/* Push r9 onto the stack.  */
+	stx.q	r17, r63, r9
+LOCAL(ia_return):	/* Return.  */
+	blink	tr0, r63
+LOCAL(ia_end_of_push_seq): /* Label used to compute the first push instruction.  */
+	ENDFUNC(GLOBAL(GCC_shcompact_incoming_args))
+#endif /* L_shcompact_incoming_args */
+#endif
+#if __SH5__
+#ifdef L_nested_trampoline
+#if __SH5__ == 32
+	.section	.text..SHmedia32,"ax"
+#else
+	.text
+#endif
+	.align	3 /* It is copied in units of 8 bytes in SHmedia mode.  */
+	.global	GLOBAL(GCC_nested_trampoline)
+	HIDDEN_FUNC(GLOBAL(GCC_nested_trampoline))
+GLOBAL(GCC_nested_trampoline):
+	.mode	SHmedia
+	ptrel/u	r63, tr0
+	gettr	tr0, r0
+#if __SH5__ == 64
+	ld.q	r0, 24, r1
+#else
+	ld.l	r0, 24, r1
+#endif
+	ptabs/l	r1, tr1
+#if __SH5__ == 64
+	ld.q	r0, 32, r1
+#else
+	ld.l	r0, 28, r1
+#endif
+	blink	tr1, r63
+
+	ENDFUNC(GLOBAL(GCC_nested_trampoline))
+#endif /* L_nested_trampoline */
+#endif /* __SH5__ */
+#if __SH5__ == 32
+#ifdef L_push_pop_shmedia_regs
+	.section	.text..SHmedia32,"ax"
+	.mode	SHmedia
+	.align	2
+#ifndef __SH4_NOFPU__	
+	.global	GLOBAL(GCC_push_shmedia_regs)
+	FUNC(GLOBAL(GCC_push_shmedia_regs))
+GLOBAL(GCC_push_shmedia_regs):
+	addi.l	r15, -14*8, r15
+	fst.d	r15, 13*8, dr62
+	fst.d	r15, 12*8, dr60
+	fst.d	r15, 11*8, dr58
+	fst.d	r15, 10*8, dr56
+	fst.d	r15,  9*8, dr54
+	fst.d	r15,  8*8, dr52
+	fst.d	r15,  7*8, dr50
+	fst.d	r15,  6*8, dr48
+	fst.d	r15,  5*8, dr46
+	fst.d	r15,  4*8, dr44
+	fst.d	r15,  3*8, dr42
+	fst.d	r15,  2*8, dr40
+	fst.d	r15,  1*8, dr38
+	fst.d	r15,  0*8, dr36
+#else /* ! __SH4_NOFPU__ */
+	.global	GLOBAL(GCC_push_shmedia_regs_nofpu)
+	FUNC(GLOBAL(GCC_push_shmedia_regs_nofpu))
+GLOBAL(GCC_push_shmedia_regs_nofpu):
+#endif /* ! __SH4_NOFPU__ */
+	ptabs/l	r18, tr0
+	addi.l	r15, -27*8, r15
+	gettr	tr7, r62
+	gettr	tr6, r61
+	gettr	tr5, r60
+	st.q	r15, 26*8, r62
+	st.q	r15, 25*8, r61
+	st.q	r15, 24*8, r60
+	st.q	r15, 23*8, r59
+	st.q	r15, 22*8, r58
+	st.q	r15, 21*8, r57
+	st.q	r15, 20*8, r56
+	st.q	r15, 19*8, r55
+	st.q	r15, 18*8, r54
+	st.q	r15, 17*8, r53
+	st.q	r15, 16*8, r52
+	st.q	r15, 15*8, r51
+	st.q	r15, 14*8, r50
+	st.q	r15, 13*8, r49
+	st.q	r15, 12*8, r48
+	st.q	r15, 11*8, r47
+	st.q	r15, 10*8, r46
+	st.q	r15,  9*8, r45
+	st.q	r15,  8*8, r44
+	st.q	r15,  7*8, r35
+	st.q	r15,  6*8, r34
+	st.q	r15,  5*8, r33
+	st.q	r15,  4*8, r32
+	st.q	r15,  3*8, r31
+	st.q	r15,  2*8, r30
+	st.q	r15,  1*8, r29
+	st.q	r15,  0*8, r28
+	blink	tr0, r63
+#ifndef __SH4_NOFPU__	
+	ENDFUNC(GLOBAL(GCC_push_shmedia_regs))
+#else
+	ENDFUNC(GLOBAL(GCC_push_shmedia_regs_nofpu))
+#endif
+#ifndef __SH4_NOFPU__	
+	.global	GLOBAL(GCC_pop_shmedia_regs)
+	FUNC(GLOBAL(GCC_pop_shmedia_regs))
+GLOBAL(GCC_pop_shmedia_regs):
+	pt	.L0, tr1
+	movi	41*8, r0
+	fld.d	r15, 40*8, dr62
+	fld.d	r15, 39*8, dr60
+	fld.d	r15, 38*8, dr58
+	fld.d	r15, 37*8, dr56
+	fld.d	r15, 36*8, dr54
+	fld.d	r15, 35*8, dr52
+	fld.d	r15, 34*8, dr50
+	fld.d	r15, 33*8, dr48
+	fld.d	r15, 32*8, dr46
+	fld.d	r15, 31*8, dr44
+	fld.d	r15, 30*8, dr42
+	fld.d	r15, 29*8, dr40
+	fld.d	r15, 28*8, dr38
+	fld.d	r15, 27*8, dr36
+	blink	tr1, r63
+#else /* ! __SH4_NOFPU__	*/
+	.global	GLOBAL(GCC_pop_shmedia_regs_nofpu)
+	FUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu))
+GLOBAL(GCC_pop_shmedia_regs_nofpu):
+#endif /* ! __SH4_NOFPU__	*/
+	movi	27*8, r0
+.L0:
+	ptabs	r18, tr0
+	ld.q	r15, 26*8, r62
+	ld.q	r15, 25*8, r61
+	ld.q	r15, 24*8, r60
+	ptabs	r62, tr7
+	ptabs	r61, tr6
+	ptabs	r60, tr5
+	ld.q	r15, 23*8, r59
+	ld.q	r15, 22*8, r58
+	ld.q	r15, 21*8, r57
+	ld.q	r15, 20*8, r56
+	ld.q	r15, 19*8, r55
+	ld.q	r15, 18*8, r54
+	ld.q	r15, 17*8, r53
+	ld.q	r15, 16*8, r52
+	ld.q	r15, 15*8, r51
+	ld.q	r15, 14*8, r50
+	ld.q	r15, 13*8, r49
+	ld.q	r15, 12*8, r48
+	ld.q	r15, 11*8, r47
+	ld.q	r15, 10*8, r46
+	ld.q	r15,  9*8, r45
+	ld.q	r15,  8*8, r44
+	ld.q	r15,  7*8, r35
+	ld.q	r15,  6*8, r34
+	ld.q	r15,  5*8, r33
+	ld.q	r15,  4*8, r32
+	ld.q	r15,  3*8, r31
+	ld.q	r15,  2*8, r30
+	ld.q	r15,  1*8, r29
+	ld.q	r15,  0*8, r28
+	add.l	r15, r0, r15
+	blink	tr0, r63
+
+#ifndef __SH4_NOFPU__
+	ENDFUNC(GLOBAL(GCC_pop_shmedia_regs))
+#else
+	ENDFUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu))
+#endif
+#endif /* __SH5__ == 32 */
+#endif /* L_push_pop_shmedia_regs */
+
+#ifdef L_div_table
+#if __SH5__
+#if defined(__pic__) && defined(__SHMEDIA__)
+	.global	GLOBAL(sdivsi3)
+	FUNC(GLOBAL(sdivsi3))
+#if __SH5__ == 32
+	.section	.text..SHmedia32,"ax"
+#else
+	.text
+#endif
+#if 0
+/* ??? FIXME: Presumably due to a linker bug, exporting data symbols
+   in a text section does not work (at least for shared libraries):
+   the linker sets the LSB of the address as if this was SHmedia code.  */
+#define TEXT_DATA_BUG
+#endif
+	.align	2
+ // inputs: r4,r5
+ // clobbered: r1,r18,r19,r20,r21,r25,tr0
+ // result in r0
+ .global GLOBAL(sdivsi3)
+GLOBAL(sdivsi3):
+#ifdef TEXT_DATA_BUG
+ ptb datalabel Local_div_table,tr0
+#else
+ ptb GLOBAL(div_table_internal),tr0
+#endif
+ nsb r5, r1
+ shlld r5, r1, r25    // normalize; [-2 ..1, 1..2) in s2.62
+ shari r25, 58, r21   // extract 5(6) bit index (s2.4 with hole -1..1)
+ /* bubble */
+ gettr tr0,r20
+ ldx.ub r20, r21, r19 // u0.8
+ shari r25, 32, r25   // normalize to s2.30
+ shlli r21, 1, r21
+ muls.l r25, r19, r19 // s2.38
+ ldx.w r20, r21, r21  // s2.14
+  ptabs r18, tr0
+ shari r19, 24, r19   // truncate to s2.14
+ sub r21, r19, r19    // some 11 bit inverse in s1.14
+ muls.l r19, r19, r21 // u0.28
+  sub r63, r1, r1
+  addi r1, 92, r1
+ muls.l r25, r21, r18 // s2.58
+ shlli r19, 45, r19   // multiply by two and convert to s2.58
+  /* bubble */
+ sub r19, r18, r18
+ shari r18, 28, r18   // some 22 bit inverse in s1.30
+ muls.l r18, r25, r0  // s2.60
+  muls.l r18, r4, r25 // s32.30
+  /* bubble */
+ shari r0, 16, r19   // s-16.44
+ muls.l r19, r18, r19 // s-16.74
+  shari r25, 63, r0
+  shari r4, 14, r18   // s19.-14
+ shari r19, 30, r19   // s-16.44
+ muls.l r19, r18, r19 // s15.30
+  xor r21, r0, r21    // You could also use the constant 1 << 27.
+  add r21, r25, r21
+ sub r21, r19, r21
+ shard r21, r1, r21
+ sub r21, r0, r0
+ blink tr0, r63
+	ENDFUNC(GLOBAL(sdivsi3))
+/* This table has been generated by divtab.c .
+Defects for bias -330:
+   Max defect: 6.081536e-07 at -1.000000e+00
+   Min defect: 2.849516e-08 at 1.030651e+00
+   Max 2nd step defect: 9.606539e-12 at -1.000000e+00
+   Min 2nd step defect: 0.000000e+00 at 0.000000e+00
+   Defect at 1: 1.238659e-07
+   Defect at -2: 1.061708e-07 */
+#else /* ! __pic__ || ! __SHMEDIA__ */
+	.section	.rodata
+#endif /* __pic__ */
+#if defined(TEXT_DATA_BUG) && defined(__pic__) && defined(__SHMEDIA__)
+	.balign 2
+	.type	Local_div_table,@object
+	.size	Local_div_table,128
+/* negative division constants */
+	.word	-16638
+	.word	-17135
+	.word	-17737
+	.word	-18433
+	.word	-19103
+	.word	-19751
+	.word	-20583
+	.word	-21383
+	.word	-22343
+	.word	-23353
+	.word	-24407
+	.word	-25582
+	.word	-26863
+	.word	-28382
+	.word	-29965
+	.word	-31800
+/* negative division factors */
+	.byte	66
+	.byte	70
+	.byte	75
+	.byte	81
+	.byte	87
+	.byte	93
+	.byte	101
+	.byte	109
+	.byte	119
+	.byte	130
+	.byte	142
+	.byte	156
+	.byte	172
+	.byte	192
+	.byte	214
+	.byte	241
+	.skip 16
+Local_div_table:
+	.skip 16
+/* positive division factors */
+	.byte	241
+	.byte	214
+	.byte	192
+	.byte	172
+	.byte	156
+	.byte	142
+	.byte	130
+	.byte	119
+	.byte	109
+	.byte	101
+	.byte	93
+	.byte	87
+	.byte	81
+	.byte	75
+	.byte	70
+	.byte	66
+/* positive division constants */
+	.word	31801
+	.word	29966
+	.word	28383
+	.word	26864
+	.word	25583
+	.word	24408
+	.word	23354
+	.word	22344
+	.word	21384
+	.word	20584
+	.word	19752
+	.word	19104
+	.word	18434
+	.word	17738
+	.word	17136
+	.word	16639
+	.section	.rodata
+#endif /* TEXT_DATA_BUG */
+	.balign 2
+	.type	GLOBAL(div_table),@object
+	.size	GLOBAL(div_table),128
+/* negative division constants */
+	.word	-16638
+	.word	-17135
+	.word	-17737
+	.word	-18433
+	.word	-19103
+	.word	-19751
+	.word	-20583
+	.word	-21383
+	.word	-22343
+	.word	-23353
+	.word	-24407
+	.word	-25582
+	.word	-26863
+	.word	-28382
+	.word	-29965
+	.word	-31800
+/* negative division factors */
+	.byte	66
+	.byte	70
+	.byte	75
+	.byte	81
+	.byte	87
+	.byte	93
+	.byte	101
+	.byte	109
+	.byte	119
+	.byte	130
+	.byte	142
+	.byte	156
+	.byte	172
+	.byte	192
+	.byte	214
+	.byte	241
+	.skip 16
+	.global	GLOBAL(div_table)
+GLOBAL(div_table):
+	HIDDEN_ALIAS(div_table_internal,div_table)
+	.skip 16
+/* positive division factors */
+	.byte	241
+	.byte	214
+	.byte	192
+	.byte	172
+	.byte	156
+	.byte	142
+	.byte	130
+	.byte	119
+	.byte	109
+	.byte	101
+	.byte	93
+	.byte	87
+	.byte	81
+	.byte	75
+	.byte	70
+	.byte	66
+/* positive division constants */
+	.word	31801
+	.word	29966
+	.word	28383
+	.word	26864
+	.word	25583
+	.word	24408
+	.word	23354
+	.word	22344
+	.word	21384
+	.word	20584
+	.word	19752
+	.word	19104
+	.word	18434
+	.word	17738
+	.word	17136
+	.word	16639
+
+#elif defined (__SH2A__) || defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
+/* This code uses shld, thus is not suitable for SH1 / SH2.  */
+
+/* Signed / unsigned division without use of FPU, optimized for SH4.
+   Uses a lookup table for divisors in the range -128 .. +128, and
+   div1 with case distinction for larger divisors in three more ranges.
+   The code is lumped together with the table to allow the use of mova.  */
+#ifdef __LITTLE_ENDIAN__
+#define L_LSB 0
+#define L_LSWMSB 1
+#define L_MSWLSB 2
+#else
+#define L_LSB 3
+#define L_LSWMSB 2
+#define L_MSWLSB 1
+#endif
+
+	.balign 4
+	.global	GLOBAL(udivsi3_i4i)
+	FUNC(GLOBAL(udivsi3_i4i))
+GLOBAL(udivsi3_i4i):
+	mov.w LOCAL(c128_w), r1
+	div0u
+	mov r4,r0
+	shlr8 r0
+	cmp/hi r1,r5
+	extu.w r5,r1
+	bf LOCAL(udiv_le128)
+	cmp/eq r5,r1
+	bf LOCAL(udiv_ge64k)
+	shlr r0
+	mov r5,r1
+	shll16 r5
+	mov.l r4,@-r15
+	div1 r5,r0
+	mov.l r1,@-r15
+	div1 r5,r0
+	div1 r5,r0
+	bra LOCAL(udiv_25)
+	div1 r5,r0
+
+LOCAL(div_le128):
+	mova LOCAL(div_table_ix),r0
+	bra LOCAL(div_le128_2)
+	mov.b @(r0,r5),r1
+LOCAL(udiv_le128):
+	mov.l r4,@-r15
+	mova LOCAL(div_table_ix),r0
+	mov.b @(r0,r5),r1
+	mov.l r5,@-r15
+LOCAL(div_le128_2):
+	mova LOCAL(div_table_inv),r0
+	mov.l @(r0,r1),r1
+	mov r5,r0
+	tst #0xfe,r0
+	mova LOCAL(div_table_clz),r0
+	dmulu.l r1,r4
+	mov.b @(r0,r5),r1
+	bt/s LOCAL(div_by_1)
+	mov r4,r0
+	mov.l @r15+,r5
+	sts mach,r0
+	/* clrt */
+	addc r4,r0
+	mov.l @r15+,r4
+	rotcr r0
+	rts
+	shld r1,r0
+
+LOCAL(div_by_1_neg):
+	neg r4,r0
+LOCAL(div_by_1):
+	mov.l @r15+,r5
+	rts
+	mov.l @r15+,r4
+
+LOCAL(div_ge64k):
+	bt/s LOCAL(div_r8)
+	div0u
+	shll8 r5
+	bra LOCAL(div_ge64k_2)
+	div1 r5,r0
+LOCAL(udiv_ge64k):
+	cmp/hi r0,r5
+	mov r5,r1
+	bt LOCAL(udiv_r8)
+	shll8 r5
+	mov.l r4,@-r15
+	div1 r5,r0
+	mov.l r1,@-r15
+LOCAL(div_ge64k_2):
+	div1 r5,r0
+	mov.l LOCAL(zero_l),r1
+	.rept 4
+	div1 r5,r0
+	.endr
+	mov.l r1,@-r15
+	div1 r5,r0
+	mov.w LOCAL(m256_w),r1
+	div1 r5,r0
+	mov.b r0,@(L_LSWMSB,r15)
+	xor r4,r0
+	and r1,r0
+	bra LOCAL(div_ge64k_end)
+	xor r4,r0
+	
+LOCAL(div_r8):
+	shll16 r4
+	bra LOCAL(div_r8_2)
+	shll8 r4
+LOCAL(udiv_r8):
+	mov.l r4,@-r15
+	shll16 r4
+	clrt
+	shll8 r4
+	mov.l r5,@-r15
+LOCAL(div_r8_2):
+	rotcl r4
+	mov r0,r1
+	div1 r5,r1
+	mov r4,r0
+	rotcl r0
+	mov r5,r4
+	div1 r5,r1
+	.rept 5
+	rotcl r0; div1 r5,r1
+	.endr
+	rotcl r0
+	mov.l @r15+,r5
+	div1 r4,r1
+	mov.l @r15+,r4
+	rts
+	rotcl r0
+
+	ENDFUNC(GLOBAL(udivsi3_i4i))
+
+	.global	GLOBAL(sdivsi3_i4i)
+	FUNC(GLOBAL(sdivsi3_i4i))
+	/* This is link-compatible with a GLOBAL(sdivsi3) call,
+	   but we effectively clobber only r1.  */
+GLOBAL(sdivsi3_i4i):
+	mov.l r4,@-r15
+	cmp/pz r5
+	mov.w LOCAL(c128_w), r1
+	bt/s LOCAL(pos_divisor)
+	cmp/pz r4
+	mov.l r5,@-r15
+	neg r5,r5
+	bt/s LOCAL(neg_result)
+	cmp/hi r1,r5
+	neg r4,r4
+LOCAL(pos_result):
+	extu.w r5,r0
+	bf LOCAL(div_le128)
+	cmp/eq r5,r0
+	mov r4,r0
+	shlr8 r0
+	bf/s LOCAL(div_ge64k)
+	cmp/hi r0,r5
+	div0u
+	shll16 r5
+	div1 r5,r0
+	div1 r5,r0
+	div1 r5,r0
+LOCAL(udiv_25):
+	mov.l LOCAL(zero_l),r1
+	div1 r5,r0
+	div1 r5,r0
+	mov.l r1,@-r15
+	.rept 3
+	div1 r5,r0
+	.endr
+	mov.b r0,@(L_MSWLSB,r15)
+	xtrct r4,r0
+	swap.w r0,r0
+	.rept 8
+	div1 r5,r0
+	.endr
+	mov.b r0,@(L_LSWMSB,r15)
+LOCAL(div_ge64k_end):
+	.rept 8
+	div1 r5,r0
+	.endr
+	mov.l @r15+,r4 ! zero-extension and swap using LS unit.
+	extu.b r0,r0
+	mov.l @r15+,r5
+	or r4,r0
+	mov.l @r15+,r4
+	rts
+	rotcl r0
+
+LOCAL(div_le128_neg):
+	tst #0xfe,r0
+	mova LOCAL(div_table_ix),r0
+	mov.b @(r0,r5),r1
+	mova LOCAL(div_table_inv),r0
+	bt/s LOCAL(div_by_1_neg)
+	mov.l @(r0,r1),r1
+	mova LOCAL(div_table_clz),r0
+	dmulu.l r1,r4
+	mov.b @(r0,r5),r1
+	mov.l @r15+,r5
+	sts mach,r0
+	/* clrt */
+	addc r4,r0
+	mov.l @r15+,r4
+	rotcr r0
+	shld r1,r0
+	rts
+	neg r0,r0
+
+LOCAL(pos_divisor):
+	mov.l r5,@-r15
+	bt/s LOCAL(pos_result)
+	cmp/hi r1,r5
+	neg r4,r4
+LOCAL(neg_result):
+	extu.w r5,r0
+	bf LOCAL(div_le128_neg)
+	cmp/eq r5,r0
+	mov r4,r0
+	shlr8 r0
+	bf/s LOCAL(div_ge64k_neg)
+	cmp/hi r0,r5
+	div0u
+	mov.l LOCAL(zero_l),r1
+	shll16 r5
+	div1 r5,r0
+	mov.l r1,@-r15
+	.rept 7
+	div1 r5,r0
+	.endr
+	mov.b r0,@(L_MSWLSB,r15)
+	xtrct r4,r0
+	swap.w r0,r0
+	.rept 8
+	div1 r5,r0
+	.endr
+	mov.b r0,@(L_LSWMSB,r15)
+LOCAL(div_ge64k_neg_end):
+	.rept 8
+	div1 r5,r0
+	.endr
+	mov.l @r15+,r4 ! zero-extension and swap using LS unit.
+	extu.b r0,r1
+	mov.l @r15+,r5
+	or r4,r1
+LOCAL(div_r8_neg_end):
+	mov.l @r15+,r4
+	rotcl r1
+	rts
+	neg r1,r0
+
+LOCAL(div_ge64k_neg):
+	bt/s LOCAL(div_r8_neg)
+	div0u
+	shll8 r5
+	mov.l LOCAL(zero_l),r1
+	.rept 6
+	div1 r5,r0
+	.endr
+	mov.l r1,@-r15
+	div1 r5,r0
+	mov.w LOCAL(m256_w),r1
+	div1 r5,r0
+	mov.b r0,@(L_LSWMSB,r15)
+	xor r4,r0
+	and r1,r0
+	bra LOCAL(div_ge64k_neg_end)
+	xor r4,r0
+
+LOCAL(c128_w):
+	.word 128
+
+LOCAL(div_r8_neg):
+	clrt
+	shll16 r4
+	mov r4,r1
+	shll8 r1
+	mov r5,r4
+	.rept 7
+	rotcl r1; div1 r5,r0
+	.endr
+	mov.l @r15+,r5
+	rotcl r1
+	bra LOCAL(div_r8_neg_end)
+	div1 r4,r0
+
+LOCAL(m256_w):
+	.word 0xff00
+/* This table has been generated by divtab-sh4.c.  */
+	.balign 4
+LOCAL(div_table_clz):
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	-1
+	.byte	-1
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-2
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-3
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-4
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-5
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+	.byte	-6
+/* Lookup table translating positive divisor to index into table of
+   normalized inverse.  N.B. the '0' entry is also the last entry of the
+ previous table, and causes an unaligned access for division by zero.  */
+LOCAL(div_table_ix):
+	.byte	-6
+	.byte	-128
+	.byte	-128
+	.byte	0
+	.byte	-128
+	.byte	-64
+	.byte	0
+	.byte	64
+	.byte	-128
+	.byte	-96
+	.byte	-64
+	.byte	-32
+	.byte	0
+	.byte	32
+	.byte	64
+	.byte	96
+	.byte	-128
+	.byte	-112
+	.byte	-96
+	.byte	-80
+	.byte	-64
+	.byte	-48
+	.byte	-32
+	.byte	-16
+	.byte	0
+	.byte	16
+	.byte	32
+	.byte	48
+	.byte	64
+	.byte	80
+	.byte	96
+	.byte	112
+	.byte	-128
+	.byte	-120
+	.byte	-112
+	.byte	-104
+	.byte	-96
+	.byte	-88
+	.byte	-80
+	.byte	-72
+	.byte	-64
+	.byte	-56
+	.byte	-48
+	.byte	-40
+	.byte	-32
+	.byte	-24
+	.byte	-16
+	.byte	-8
+	.byte	0
+	.byte	8
+	.byte	16
+	.byte	24
+	.byte	32
+	.byte	40
+	.byte	48
+	.byte	56
+	.byte	64
+	.byte	72
+	.byte	80
+	.byte	88
+	.byte	96
+	.byte	104
+	.byte	112
+	.byte	120
+	.byte	-128
+	.byte	-124
+	.byte	-120
+	.byte	-116
+	.byte	-112
+	.byte	-108
+	.byte	-104
+	.byte	-100
+	.byte	-96
+	.byte	-92
+	.byte	-88
+	.byte	-84
+	.byte	-80
+	.byte	-76
+	.byte	-72
+	.byte	-68
+	.byte	-64
+	.byte	-60
+	.byte	-56
+	.byte	-52
+	.byte	-48
+	.byte	-44
+	.byte	-40
+	.byte	-36
+	.byte	-32
+	.byte	-28
+	.byte	-24
+	.byte	-20
+	.byte	-16
+	.byte	-12
+	.byte	-8
+	.byte	-4
+	.byte	0
+	.byte	4
+	.byte	8
+	.byte	12
+	.byte	16
+	.byte	20
+	.byte	24
+	.byte	28
+	.byte	32
+	.byte	36
+	.byte	40
+	.byte	44
+	.byte	48
+	.byte	52
+	.byte	56
+	.byte	60
+	.byte	64
+	.byte	68
+	.byte	72
+	.byte	76
+	.byte	80
+	.byte	84
+	.byte	88
+	.byte	92
+	.byte	96
+	.byte	100
+	.byte	104
+	.byte	108
+	.byte	112
+	.byte	116
+	.byte	120
+	.byte	124
+	.byte	-128
+/* 1/64 .. 1/127, normalized.  There is an implicit leading 1 in bit 32.  */
+	.balign 4
+LOCAL(zero_l):
+	.long	0x0
+	.long	0xF81F81F9
+	.long	0xF07C1F08
+	.long	0xE9131AC0
+	.long	0xE1E1E1E2
+	.long	0xDAE6076C
+	.long	0xD41D41D5
+	.long	0xCD856891
+	.long	0xC71C71C8
+	.long	0xC0E07039
+	.long	0xBACF914D
+	.long	0xB4E81B4F
+	.long	0xAF286BCB
+	.long	0xA98EF607
+	.long	0xA41A41A5
+	.long	0x9EC8E952
+	.long	0x9999999A
+	.long	0x948B0FCE
+	.long	0x8F9C18FA
+	.long	0x8ACB90F7
+	.long	0x86186187
+	.long	0x81818182
+	.long	0x7D05F418
+	.long	0x78A4C818
+	.long	0x745D1746
+	.long	0x702E05C1
+	.long	0x6C16C16D
+	.long	0x68168169
+	.long	0x642C8591
+	.long	0x60581606
+	.long	0x5C9882BA
+	.long	0x58ED2309
+LOCAL(div_table_inv):
+	.long	0x55555556
+	.long	0x51D07EAF
+	.long	0x4E5E0A73
+	.long	0x4AFD6A06
+	.long	0x47AE147B
+	.long	0x446F8657
+	.long	0x41414142
+	.long	0x3E22CBCF
+	.long	0x3B13B13C
+	.long	0x38138139
+	.long	0x3521CFB3
+	.long	0x323E34A3
+	.long	0x2F684BDB
+	.long	0x2C9FB4D9
+	.long	0x29E4129F
+	.long	0x27350B89
+	.long	0x24924925
+	.long	0x21FB7813
+	.long	0x1F7047DD
+	.long	0x1CF06ADB
+	.long	0x1A7B9612
+	.long	0x18118119
+	.long	0x15B1E5F8
+	.long	0x135C8114
+	.long	0x11111112
+	.long	0xECF56BF
+	.long	0xC9714FC
+	.long	0xA6810A7
+	.long	0x8421085
+	.long	0x624DD30
+	.long	0x4104105
+	.long	0x2040811
+	/* maximum error: 0.987342 scaled: 0.921875*/
+
+	ENDFUNC(GLOBAL(sdivsi3_i4i))
+#endif /* SH3 / SH4 */
+
+#endif /* L_div_table */
+
+#ifdef L_udiv_qrnnd_16
+#if !__SHMEDIA__
+	HIDDEN_FUNC(GLOBAL(udiv_qrnnd_16))
+	/* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
+	/* n1 < d, but n1 might be larger than d1.  */
+	.global GLOBAL(udiv_qrnnd_16)
+	.balign 8
+GLOBAL(udiv_qrnnd_16):
+	div0u
+	cmp/hi r6,r0
+	bt .Lots
+	.rept 16
+	div1 r6,r0 
+	.endr
+	extu.w r0,r1
+	bt 0f
+	add r6,r0
+0:	rotcl r1
+	mulu.w r1,r5
+	xtrct r4,r0
+	swap.w r0,r0
+	sts macl,r2
+	cmp/hs r2,r0
+	sub r2,r0
+	bt 0f
+	addc r5,r0
+	add #-1,r1
+	bt 0f
+1:	add #-1,r1
+	rts
+	add r5,r0
+	.balign 8
+.Lots:
+	sub r5,r0
+	swap.w r4,r1
+	xtrct r0,r1
+	clrt
+	mov r1,r0
+	addc r5,r0
+	mov #-1,r1
+	SL1(bf, 1b,
+	shlr16 r1)
+0:	rts
+	nop
+	ENDFUNC(GLOBAL(udiv_qrnnd_16))
+#endif /* !__SHMEDIA__ */
+#endif /* L_udiv_qrnnd_16 */
diff --git a/gcc-4.9/libgcc/config/sh/lib1funcs.h b/gcc-4.9/libgcc/config/sh/lib1funcs.h
new file mode 100644
index 000000000..be25dc825
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/lib1funcs.h
@@ -0,0 +1,74 @@
+/* Copyright (C) 1994-2014 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify it
+under the terms of the GNU General Public License as published by the
+Free Software Foundation; either version 3, or (at your option) any
+later version.
+
+This file is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __ELF__
+#define LOCAL(X)	.L_##X
+#define FUNC(X)		.type X,@function
+#define HIDDEN_FUNC(X)	FUNC(X); .hidden X
+#define HIDDEN_ALIAS(X,Y) ALIAS (X,Y); .hidden GLOBAL(X)
+#define ENDFUNC0(X)	.Lfe_##X: .size X,.Lfe_##X-X
+#define ENDFUNC(X)	ENDFUNC0(X)
+#else
+#define LOCAL(X)	L_##X
+#define FUNC(X)
+#define HIDDEN_FUNC(X)
+#define HIDDEN_ALIAS(X,Y) ALIAS (X,Y)
+#define ENDFUNC(X)
+#endif
+
+#define	CONCAT(A,B)	A##B
+#define	GLOBAL0(U,X)	CONCAT(U,__##X)
+#define	GLOBAL(X)	GLOBAL0(__USER_LABEL_PREFIX__,X)
+
+#define ALIAS(X,Y)	.global GLOBAL(X); .set GLOBAL(X),GLOBAL(Y)
+
+#if defined __SH2A__ && defined __FMOVD_ENABLED__
+#undef  FMOVD_WORKS
+#define FMOVD_WORKS
+#endif
+
+#ifdef __LITTLE_ENDIAN__
+#define DR00 fr1
+#define DR01 fr0
+#define DR20 fr3
+#define DR21 fr2
+#define DR40 fr5
+#define DR41 fr4
+#else /* !__LITTLE_ENDIAN__ */
+#define DR00 fr0
+#define DR01 fr1
+#define DR20 fr2
+#define DR21 fr3
+#define DR40 fr4
+#define DR41 fr5
+#endif /* !__LITTLE_ENDIAN__ */
+
+#ifdef __sh1__
+#define SL(branch, dest, in_slot, in_slot_arg2) \
+	in_slot, in_slot_arg2; branch dest
+#define SL1(branch, dest, in_slot) \
+	in_slot; branch dest
+#else /* ! __sh1__ */
+#define SL(branch, dest, in_slot, in_slot_arg2) \
+	branch##.s dest; in_slot, in_slot_arg2
+#define SL1(branch, dest, in_slot) \
+	branch##/s dest; in_slot
+#endif /* !__sh1__ */
diff --git a/gcc-4.9/libgcc/config/sh/libgcc-excl.ver b/gcc-4.9/libgcc/config/sh/libgcc-excl.ver
new file mode 100644
index 000000000..325c74054
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/libgcc-excl.ver
@@ -0,0 +1,8 @@
+# Exclude various symbols which should not be visible in libgcc.so for SH.
+%exclude {
+  __ashlsi3
+  __ashrsi3
+  __lshrsi3
+  __mulsi3 # this is an SH1-only symbol.
+  __udivsi3
+}
diff --git a/gcc-4.9/libgcc/config/sh/libgcc-glibc.ver b/gcc-4.9/libgcc/config/sh/libgcc-glibc.ver
new file mode 100644
index 000000000..17a1d809e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/libgcc-glibc.ver
@@ -0,0 +1,48 @@
+# Copyright (C) 2002-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+# Note that we cannot use the default libgcc-glibc.ver file on sh,
+# because GLIBC_2.0 does not exist on this architecture, as the first 
+# ever glibc release on the platform was GLIBC_2.2.
+
+%exclude {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%inherit GCC_3.0 GLIBC_2.2
+GLIBC_2.2 {
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
diff --git a/gcc-4.9/libgcc/config/sh/linux-atomic.c b/gcc-4.9/libgcc/config/sh/linux-atomic.c
new file mode 100644
index 000000000..1ef02eaa6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/linux-atomic.c
@@ -0,0 +1,81 @@
+/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Atomic built-in C functions for link compatibility with older code that
+   was compiled to emit function calls for atomic built-ins.
+   Notice that if no atomic model has been selected the functions in this
+   file must not be generated, or else they will result in infinite no-op
+   loops.
+   Notice also, that all the generated functions below take three parameters,
+   which is not actually true for some of the built-in functions.  However,
+   on SH this does not matter, since the first four parameters are always
+   passed in call clobbered registers.
+   The return type for the sync_bool_compare_and_swap functions is also
+   actually supposed to be a bool, but this also doesn't matter since any
+   int return type <= 32 bit is returned in R0 on SH.  */
+
+#if !__SH_ATOMIC_MODEL_NONE__
+
+typedef unsigned char uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int uint32_t;
+
+#define uint8_t_sz 1
+#define uint16_t_sz 2
+#define uint32_t_sz 4
+
+#define typesz(x) x##_sz
+
+#define concat(x,y) __ ## x ## _ ## y
+#define eval(x,y) concat (x,y)
+#define genname(f,t) eval(f, typesz (t))
+
+#define func1(name, type) \
+  type __attribute__((visibility("hidden"))) \
+  genname (name, type) (type* x, type y, type z) \
+  { \
+    return __##name (x, y, z); \
+  }
+
+#define genfuncs(name) \
+  func1 (name, uint8_t) \
+  func1 (name, uint16_t) \
+  func1 (name, uint32_t)
+
+genfuncs (sync_lock_test_and_set)
+genfuncs (sync_val_compare_and_swap)
+genfuncs (sync_bool_compare_and_swap)
+genfuncs (sync_fetch_and_add)
+genfuncs (sync_fetch_and_or)
+genfuncs (sync_fetch_and_and)
+genfuncs (sync_fetch_and_xor)
+genfuncs (sync_fetch_and_sub)
+genfuncs (sync_fetch_and_nand)
+genfuncs (sync_add_and_fetch)
+genfuncs (sync_or_and_fetch)
+genfuncs (sync_and_and_fetch)
+genfuncs (sync_xor_and_fetch)
+genfuncs (sync_sub_and_fetch)
+genfuncs (sync_nand_and_fetch)
+
+#endif
diff --git a/gcc-4.9/libgcc/config/sh/linux-unwind.h b/gcc-4.9/libgcc/config/sh/linux-unwind.h
new file mode 100644
index 000000000..4875706d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/linux-unwind.h
@@ -0,0 +1,255 @@
+/* DWARF2 EH unwinding support for SH Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
+
+#include <signal.h>
+#include <sys/ucontext.h>
+#include "insn-constants.h"
+
+# if defined (__SH5__)
+#define SH_DWARF_FRAME_GP0	0
+#define SH_DWARF_FRAME_FP0	77
+#define SH_DWARF_FRAME_BT0	68
+#define SH_DWARF_FRAME_PR_MEDIA	18
+#define SH_DWARF_FRAME_SR	65
+#define SH_DWARF_FRAME_FPSCR	76
+#else
+#define SH_DWARF_FRAME_GP0	0
+#define SH_DWARF_FRAME_FP0	25
+#define SH_DWARF_FRAME_XD0	87
+#define SH_DWARF_FRAME_PR	17
+#define SH_DWARF_FRAME_GBR	18
+#define SH_DWARF_FRAME_MACH	20
+#define SH_DWARF_FRAME_MACL	21
+#define SH_DWARF_FRAME_PC	16
+#define SH_DWARF_FRAME_SR	22
+#define SH_DWARF_FRAME_FPUL	23
+#define SH_DWARF_FRAME_FPSCR	24
+#endif /* defined (__SH5__) */
+
+#if defined (__SH5__)
+
+#define MD_FALLBACK_FRAME_STATE_FOR shmedia_fallback_frame_state
+
+static _Unwind_Reason_Code
+shmedia_fallback_frame_state (struct _Unwind_Context *context,
+			      _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+  int i, r;
+
+  /* movi 0x10,r9; shori 0x77,r9; trapa	r9; nop (sigreturn)  */
+  /* movi 0x10,r9; shori 0xad,r9; trapa	r9; nop (rt_sigreturn)  */
+  if ((*(unsigned long *) (pc-1)  == 0xcc004090)
+      && (*(unsigned long *) (pc+3)  == 0xc801dc90)
+      && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
+      && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
+    sc = context->cfa;
+  else if ((*(unsigned long *) (pc-1)  == 0xcc004090)
+	   && (*(unsigned long *) (pc+3)  == 0xc802b490)
+	   && (*(unsigned long *) (pc+7)  == 0x6c91fff0)
+	   && (*(unsigned long *) (pc+11)  == 0x6ff0fff0))
+    {
+      struct rt_sigframe {
+	siginfo_t *pinfo;
+	void *puc;
+	siginfo_t info;
+	struct ucontext uc;
+      } *rt_ = context->cfa;
+      /* The void * cast is necessary to avoid an aliasing warning.
+         The aliasing warning is correct, but should not be a problem
+         because it does not alias anything.  */
+      sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->sc_regs[15];
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 15;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  for (i = 0; i < 63; i++)
+    {
+      if (i == 15)
+	continue;
+
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= (long)&(sc->sc_regs[i]) - new_cfa;
+    }
+
+  fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
+    = (long)&(sc->sc_sr) - new_cfa;
+
+  r = SH_DWARF_FRAME_BT0;
+  for (i = 0; i < 8; i++)
+    {
+      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[r+i].loc.offset
+	= (long)&(sc->sc_tregs[i]) - new_cfa;
+    }
+
+  r = SH_DWARF_FRAME_FP0;
+  for (i = 0; i < 32; i++)
+    {
+      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[r+i].loc.offset
+	= (long)&(sc->sc_fpregs[i]) - new_cfa;
+    }
+
+  fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
+    = (long)&(sc->sc_fpscr) - new_cfa;
+
+  /* We use the slot for the zero register to save return address.  */
+  fs->regs.reg[63].how = REG_SAVED_OFFSET;
+  fs->regs.reg[63].loc.offset
+    = (long)&(sc->sc_pc) - new_cfa;
+  fs->retaddr_column = 63;
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+
+#else /* defined (__SH5__) */
+
+#define MD_FALLBACK_FRAME_STATE_FOR sh_fallback_frame_state
+
+static _Unwind_Reason_Code
+sh_fallback_frame_state (struct _Unwind_Context *context,
+			 _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+  int i;
+#if defined (__SH3E__) || defined (__SH4__)
+  int r;
+#endif
+
+  /* mov.w 1f,r3; trapa #0x10; 1: .short 0x77  (sigreturn)  */
+  /* mov.w 1f,r3; trapa #0x10; 1: .short 0xad  (rt_sigreturn)  */
+  /* Newer kernel uses pad instructions to avoid an SH-4 core bug.  */
+  /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
+     or r0,r0; 1: .short 0x77  (sigreturn)  */
+  /* mov.w 1f,r3; trapa #0x10; or r0,r0; or r0,r0; or r0,r0; or r0,r0;
+     or r0,r0; 1: .short 0xad  (rt_sigreturn)  */
+  if (((*(unsigned short *) (pc+0)  == 0x9300)
+       && (*(unsigned short *) (pc+2)  == 0xc310)
+       && (*(unsigned short *) (pc+4)  == 0x0077))
+      || (((*(unsigned short *) (pc+0)  == 0x9305)
+	   && (*(unsigned short *) (pc+2)  == 0xc310)
+	   && (*(unsigned short *) (pc+14)  == 0x0077))))
+    sc = context->cfa;
+  else if (((*(unsigned short *) (pc+0) == 0x9300)
+	    && (*(unsigned short *) (pc+2)  == 0xc310)
+	    && (*(unsigned short *) (pc+4)  == 0x00ad))
+	   || (((*(unsigned short *) (pc+0) == 0x9305)
+		&& (*(unsigned short *) (pc+2)  == 0xc310)
+		&& (*(unsigned short *) (pc+14)  == 0x00ad))))
+    {
+      struct rt_sigframe {
+	siginfo_t info;
+	struct ucontext uc;
+      } *rt_ = context->cfa;
+      /* The void * cast is necessary to avoid an aliasing warning.
+         The aliasing warning is correct, but should not be a problem
+         because it does not alias anything.  */
+      sc = (struct sigcontext *) (void *) &rt_->uc.uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  new_cfa = sc->sc_regs[15];
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = 15;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  for (i = 0; i < 15; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= (long)&(sc->sc_regs[i]) - new_cfa;
+    }
+
+  fs->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_PR].loc.offset
+    = (long)&(sc->sc_pr) - new_cfa;
+  fs->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_SR].loc.offset
+    = (long)&(sc->sc_sr) - new_cfa;
+  fs->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_GBR].loc.offset
+    = (long)&(sc->sc_gbr) - new_cfa;
+  fs->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_MACH].loc.offset
+    = (long)&(sc->sc_mach) - new_cfa;
+  fs->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_MACL].loc.offset
+    = (long)&(sc->sc_macl) - new_cfa;
+
+#if defined (__SH3E__) || defined (__SH4__)
+  r = SH_DWARF_FRAME_FP0;
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[r+i].loc.offset
+	= (long)&(sc->sc_fpregs[i]) - new_cfa;
+    }
+
+  r = SH_DWARF_FRAME_XD0;
+  for (i = 0; i < 8; i++)
+    {
+      fs->regs.reg[r+i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[r+i].loc.offset
+	= (long)&(sc->sc_xfpregs[2*i]) - new_cfa;
+    }
+
+  fs->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset
+    = (long)&(sc->sc_fpul) - new_cfa;
+  fs->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset
+    = (long)&(sc->sc_fpscr) - new_cfa;
+#endif
+
+  fs->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET;
+  fs->regs.reg[SH_DWARF_FRAME_PC].loc.offset
+    = (long)&(sc->sc_pc) - new_cfa;
+  fs->retaddr_column = SH_DWARF_FRAME_PC;
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+#endif /* defined (__SH5__) */
+
+#endif /* inhibit_libc */
diff --git a/gcc-4.9/libgcc/config/sh/t-linux b/gcc-4.9/libgcc/config/sh/t-linux
new file mode 100644
index 000000000..d316db937
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/t-linux
@@ -0,0 +1,18 @@
+LIB1ASMFUNCS_CACHE = _ic_invalidate _ic_invalidate_array
+
+LIB2ADD = $(srcdir)/config/sh/linux-atomic.c
+
+HOST_LIBGCC2_CFLAGS += -DNO_FPSCR_VALUES
+
+# Silence atomic built-in related warnings in linux-atomic.c.
+# Unfortunately the conflicting types warning can't be disabled selectively.
+HOST_LIBGCC2_CFLAGS += -w -Wno-sync-nand
+
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used, and hide some lib1func
+# routines which should not be called via PLT.  We have to create
+# the list from scratch.
+SHLIB_MAPFILES = \
+	libgcc-std.ver \
+	$(srcdir)/config/sh/libgcc-excl.ver \
+	$(srcdir)/config/sh/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/sh/t-netbsd b/gcc-4.9/libgcc/config/sh/t-netbsd
new file mode 100644
index 000000000..93fe287e5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/t-netbsd
@@ -0,0 +1,2 @@
+LIB1ASMFUNCS_CACHE = _ic_invalidate
+
diff --git a/gcc-4.9/libgcc/config/sh/t-sh b/gcc-4.9/libgcc/config/sh/t-sh
new file mode 100644
index 000000000..111bbf603
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/t-sh
@@ -0,0 +1,60 @@
+# Copyright (C) 1993-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB1ASMSRC = sh/lib1funcs.S
+LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movmem \
+  _movmem_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
+  _div_table _udiv_qrnnd_16 \
+  $(LIB1ASMFUNCS_CACHE)
+LIB1ASMFUNCS_CACHE = _ic_invalidate _ic_invalidate_array
+
+crt1.o: $(srcdir)/config/sh/crt1.S
+	$(gcc_compile) -c $<
+
+ic_invalidate_array_4-100.o: $(srcdir)/config/sh/lib1funcs.S
+	$(gcc_compile) -c -DL_ic_invalidate_array -DWAYS=1 -DWAY_SIZE=0x2000 $<
+libic_invalidate_array_4-100.a: ic_invalidate_array_4-100.o
+	$(AR_CREATE_FOR_TARGET) $@ $<
+
+ic_invalidate_array_4-200.o: $(srcdir)/config/sh/lib1funcs.S
+	$(gcc_compile) -c -DL_ic_invalidate_array -DWAYS=2 -DWAY_SIZE=0x2000 $<
+libic_invalidate_array_4-200.a: ic_invalidate_array_4-200.o
+	$(AR_CREATE_FOR_TARGET) $@ $<
+
+ic_invalidate_array_4a.o: $(srcdir)/config/sh/lib1funcs.S
+	$(gcc_compile) -c -DL_ic_invalidate_array -D__FORCE_SH4A__ $<
+libic_invalidate_array_4a.a: ic_invalidate_array_4a.o
+	$(AR_CREATE_FOR_TARGET) $@ $<
+
+sdivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.S
+	$(gcc_compile) -c -DL_sdivsi3_i4i $<
+udivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.S
+	$(gcc_compile) -c -DL_udivsi3_i4i $<
+unwind-dw2-Os-4-200.o: $(srcdir)/unwind-dw2.c
+	$(gcc_compile) $(LIBGCC2_CFLAGS) $(vis_hide) -fexceptions -Os -c $<
+
+OBJS_Os_4_200=sdivsi3_i4i-Os-4-200.o udivsi3_i4i-Os-4-200.o unwind-dw2-Os-4-200.o
+libgcc-Os-4-200.a: $(OBJS_Os_4_200)
+	$(AR_CREATE_FOR_TARGET) $@ $(OBJS_Os_4_200)
+
+div_table-4-300.o: $(srcdir)/config/sh/lib1funcs-4-300.S
+	$(gcc_compile) -c -DL_div_table $<
+
+libgcc-4-300.a: div_table-4-300.o
+	$(AR_CREATE_FOR_TARGET) $@ div_table-4-300.o
+
diff --git a/gcc-4.9/libgcc/config/sh/t-sh64 b/gcc-4.9/libgcc/config/sh/t-sh64
new file mode 100644
index 000000000..fa9950e03
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/t-sh64
@@ -0,0 +1,6 @@
+LIB1ASMFUNCS = \
+  _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
+  _shcompact_call_trampoline _shcompact_return_trampoline \
+  _shcompact_incoming_args _ic_invalidate _nested_trampoline \
+  _push_pop_shmedia_regs \
+  _udivdi3 _divdi3 _umoddi3 _moddi3 _div_table
diff --git a/gcc-4.9/libgcc/config/sh/t-superh b/gcc-4.9/libgcc/config/sh/t-superh
new file mode 100644
index 000000000..b87aa5a31
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sh/t-superh
@@ -0,0 +1,11 @@
+# Compile crt1-mmu.o as crt1.o with -DMMU_SUPPORT
+crt1-mmu.o: $(srcdir)/config/sh/crt1.S
+	$(gcc_compile) -c -DMMU_SUPPORT $<
+
+# Compile gcrt1-mmu.o as crt1-mmu.o with -DPROFILE
+gcrt1-mmu.o: $(srcdir)/config/sh/crt1.S
+	$(gcc_compile) -c -DPROFILE -DMMU_SUPPORT $<
+
+# For sh4-400: Compile gcrt1.o as crt1.o with -DPROFILE
+gcrt1.o: $(srcdir)/config/sh/crt1.S
+	$(gcc_compile) -c -DPROFILE $<
diff --git a/gcc-4.9/libgcc/config/sparc/crtfastmath.c b/gcc-4.9/libgcc/config/sparc/crtfastmath.c
new file mode 100644
index 000000000..2bc2fb5b4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/crtfastmath.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2001-2014 Free Software Foundation, Inc.
+ * Contributed by David S. Miller (davem@redhat.com)
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 3, or (at your option) any
+ * later version.
+ * 
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * 
+ * Under Section 7 of GPL version 3, you are granted additional
+ * permissions described in the GCC Runtime Library Exception, version
+ * 3.1, as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License and
+ * a copy of the GCC Runtime Library Exception along with this program;
+ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#define FPRS_NS		(1 << 22)	/* Non-Standard fpu results */
+
+static void __attribute__((constructor))
+set_fast_math (void)
+{
+  unsigned int fsr;
+
+  /* This works for the 64-bit case because, even if 32-bit ld/st of
+     the fsr register modified the upper 32-bit, the only thing up there
+     are the 3 other condition codes which are "do not care" at the time
+     that this runs.  */
+
+  __asm__("st %%fsr, %0"
+	  : "=m" (fsr));
+
+  fsr |= FPRS_NS;
+
+  __asm__("ld %0, %%fsr"
+	  : : "m" (fsr));
+}
diff --git a/gcc-4.9/libgcc/config/sparc/crti.S b/gcc-4.9/libgcc/config/sparc/crti.S
new file mode 100644
index 000000000..e48aefb81
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/crti.S
@@ -0,0 +1,77 @@
+! crti.S for SPARC
+
+!   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+!   Written By David Vinayak Henkel-Wallace, June 1992
+! 
+! This file is free software; you can redistribute it and/or modify it
+! under the terms of the GNU General Public License as published by the
+! Free Software Foundation; either version 3, or (at your option) any
+! later version.
+! 
+! This file is distributed in the hope that it will be useful, but
+! WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! General Public License for more details.
+! 
+! Under Section 7 of GPL version 3, you are granted additional
+! permissions described in the GCC Runtime Library Exception, version
+! 3.1, as published by the Free Software Foundation.
+!
+! You should have received a copy of the GNU General Public License and
+! a copy of the GCC Runtime Library Exception along with this program;
+! see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+! <http://www.gnu.org/licenses/>.
+
+! This file just make a stack frame for the contents of the .fini and
+! .init sections.  Users may put any desired instructions in those
+! sections.
+
+! This file is linked in before the Values-Xx.o files and also before
+! crtbegin, with which perhaps it should be merged.
+ 
+	.section	".init"
+	.proc	022
+	.global	_init
+	.type	_init,#function
+	.align	4
+_init:
+#ifdef _FLAT
+#ifdef __sparcv9
+	stx     %i7, [%sp+2167]
+	add	%sp, -176, %sp
+#else
+	st	%i7, [%sp+60]
+	add	%sp, -96, %sp
+#endif
+	mov	%o7, %i7
+#else
+#ifdef __sparcv9
+	save	%sp, -176, %sp
+#else
+	save	%sp, -96, %sp
+#endif
+#endif
+
+
+	.section	".fini"
+	.proc	022
+	.global	_fini
+	.type	_fini,#function
+	.align	4
+_fini:
+#ifdef _FLAT
+#ifdef __sparcv9
+	stx     %i7, [%sp+2167]
+	add	%sp, -176, %sp
+#else
+	st      %i7, [%sp+60]
+	add	%sp, -96, %sp
+#endif
+	mov	%o7, %i7
+#else
+#ifdef __sparcv9
+	save	%sp, -176, %sp
+#else
+	save	%sp, -96, %sp
+#endif
+#endif
diff --git a/gcc-4.9/libgcc/config/sparc/crtn.S b/gcc-4.9/libgcc/config/sparc/crtn.S
new file mode 100644
index 000000000..5b15f759d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/crtn.S
@@ -0,0 +1,63 @@
+! crtn.S for SPARC
+
+!   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+!   Written By David Vinayak Henkel-Wallace, June 1992
+! 
+! This file is free software; you can redistribute it and/or modify it
+! under the terms of the GNU General Public License as published by the
+! Free Software Foundation; either version 3, or (at your option) any
+! later version.
+! 
+! This file is distributed in the hope that it will be useful, but
+! WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! General Public License for more details.
+! 
+! Under Section 7 of GPL version 3, you are granted additional
+! permissions described in the GCC Runtime Library Exception, version
+! 3.1, as published by the Free Software Foundation.
+!
+! You should have received a copy of the GNU General Public License and
+! a copy of the GCC Runtime Library Exception along with this program;
+! see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+! <http://www.gnu.org/licenses/>.
+
+! This file just makes sure that the .fini and .init sections do in
+! fact return.  Users may put any desired instructions in those sections.
+! This file is the last thing linked into any executable.
+
+	.section	".init"
+	.align		4
+#ifdef _FLAT
+	mov 	%i7, %o7
+#ifdef __sparcv9
+	ldx     [%sp+2343], %i7
+	sub	%sp, -176, %sp
+#else
+	ld	[%sp+156], %i7
+	sub	%sp, -96, %sp
+#endif
+#else
+	restore
+#endif
+	jmp	%o7+8
+	 nop
+
+	.section	".fini"
+	.align		4
+#ifdef _FLAT
+	mov 	%i7, %o7
+#ifdef __sparcv9
+	ldx     [%sp+2343], %i7
+	sub	%sp, -176, %sp
+#else
+	ld      [%sp+156], %i7
+	sub	%sp, -96, %sp
+#endif
+#else
+	restore
+#endif
+	jmp	%o7+8
+	 nop
+
+! Th-th-th-that is all folks!
diff --git a/gcc-4.9/libgcc/config/sparc/lb1spc.S b/gcc-4.9/libgcc/config/sparc/lb1spc.S
new file mode 100644
index 000000000..b60bd5740
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/lb1spc.S
@@ -0,0 +1,784 @@
+/* This is an assembly language implementation of mulsi3, divsi3, and modsi3
+   for the sparc processor.
+
+   These routines are derived from the SPARC Architecture Manual, version 8,
+   slightly edited to match the desired calling convention, and also to
+   optimize them for our purposes.  */
+
+#ifdef L_mulsi3
+.text
+	.align 4
+	.global .umul
+	.proc 4
+.umul:
+	or	%o0, %o1, %o4	! logical or of multiplier and multiplicand
+	mov	%o0, %y		! multiplier to Y register
+	andncc	%o4, 0xfff, %o5	! mask out lower 12 bits
+	be	mul_shortway	! can do it the short way
+	andcc	%g0, %g0, %o4	! zero the partial product and clear NV cc
+	!
+	! long multiply
+	!
+	mulscc	%o4, %o1, %o4	! first iteration of 33
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4	! 32nd iteration
+	mulscc	%o4, %g0, %o4	! last iteration only shifts
+	! the upper 32 bits of product are wrong, but we do not care
+	retl
+	rd	%y, %o0
+	!
+	! short multiply
+	!
+mul_shortway:
+	mulscc	%o4, %o1, %o4	! first iteration of 13
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4
+	mulscc	%o4, %o1, %o4	! 12th iteration
+	mulscc	%o4, %g0, %o4	! last iteration only shifts
+	rd	%y, %o5
+	sll	%o4, 12, %o4	! left shift partial product by 12 bits
+	srl	%o5, 20, %o5	! right shift partial product by 20 bits
+	retl
+	or	%o5, %o4, %o0	! merge for true product
+#endif
+
+#ifdef L_divsi3
+/*
+ * Division and remainder, from Appendix E of the SPARC Version 8
+ * Architecture Manual, with fixes from Gordon Irlam.
+ */
+
+/*
+ * Input: dividend and divisor in %o0 and %o1 respectively.
+ *
+ * m4 parameters:
+ *  .div	name of function to generate
+ *  div		div=div => %o0 / %o1; div=rem => %o0 % %o1
+ *  true		true=true => signed; true=false => unsigned
+ *
+ * Algorithm parameters:
+ *  N		how many bits per iteration we try to get (4)
+ *  WORDSIZE	total number of bits (32)
+ *
+ * Derived constants:
+ *  TOPBITS	number of bits in the top decade of a number
+ *
+ * Important variables:
+ *  Q		the partial quotient under development (initially 0)
+ *  R		the remainder so far, initially the dividend
+ *  ITER	number of main division loop iterations required;
+ *		equal to ceil(log2(quotient) / N).  Note that this
+ *		is the log base (2^N) of the quotient.
+ *  V		the current comparand, initially divisor*2^(ITER*N-1)
+ *
+ * Cost:
+ *  Current estimate for non-large dividend is
+ *	ceil(log2(quotient) / N) * (10 + 7N/2) + C
+ *  A large dividend is one greater than 2^(31-TOPBITS) and takes a
+ *  different path, as the upper bits of the quotient must be developed
+ *  one bit at a time.
+ */
+        .global .udiv
+        .align 4
+        .proc 4
+        .text
+.udiv:
+         b ready_to_divide
+         mov 0, %g3             ! result is always positive
+
+        .global .div
+        .align 4
+        .proc 4
+        .text
+.div:
+	! compute sign of result; if neither is negative, no problem
+	orcc	%o1, %o0, %g0	! either negative?
+	bge	ready_to_divide	! no, go do the divide
+	xor	%o1, %o0, %g3	! compute sign in any case
+	tst	%o1
+	bge	1f
+	tst	%o0
+	! %o1 is definitely negative; %o0 might also be negative
+	bge	ready_to_divide	! if %o0 not negative...
+	sub	%g0, %o1, %o1	! in any case, make %o1 nonneg
+1:	! %o0 is negative, %o1 is nonnegative
+	sub	%g0, %o0, %o0	! make %o0 nonnegative
+
+
+ready_to_divide:
+
+	! Ready to divide.  Compute size of quotient; scale comparand.
+	orcc	%o1, %g0, %o5
+	bne	1f
+	mov	%o0, %o3
+
+	! Divide by zero trap.  If it returns, return 0 (about as
+	! wrong as possible, but that is what SunOS does...).
+	ta	0x2    		! ST_DIV0
+	retl
+	clr	%o0
+
+1:
+	cmp	%o3, %o5		! if %o1 exceeds %o0, done
+	blu	got_result		! (and algorithm fails otherwise)
+	clr	%o2
+	sethi	%hi(1 << (32 - 4 - 1)), %g1
+	cmp	%o3, %g1
+	blu	not_really_big
+	clr	%o4
+
+	! Here the dividend is >= 2**(31-N) or so.  We must be careful here,
+	! as our usual N-at-a-shot divide step will cause overflow and havoc.
+	! The number of bits in the result here is N*ITER+SC, where SC <= N.
+	! Compute ITER in an unorthodox manner: know we need to shift V into
+	! the top decade: so do not even bother to compare to R.
+	1:
+		cmp	%o5, %g1
+		bgeu	3f
+		mov	1, %g2
+		sll	%o5, 4, %o5
+		b	1b
+		add	%o4, 1, %o4
+
+	! Now compute %g2.
+	2:	addcc	%o5, %o5, %o5
+		bcc	not_too_big
+		add	%g2, 1, %g2
+
+		! We get here if the %o1 overflowed while shifting.
+		! This means that %o3 has the high-order bit set.
+		! Restore %o5 and subtract from %o3.
+		sll	%g1, 4, %g1	! high order bit
+		srl	%o5, 1, %o5	! rest of %o5
+		add	%o5, %g1, %o5
+		b	do_single_div
+		sub	%g2, 1, %g2
+
+	not_too_big:
+	3:	cmp	%o5, %o3
+		blu	2b
+		nop
+		be	do_single_div
+		nop
+	/* NB: these are commented out in the V8-SPARC manual as well */
+	/* (I do not understand this) */
+	! %o5 > %o3: went too far: back up 1 step
+	!	srl	%o5, 1, %o5
+	!	dec	%g2
+	! do single-bit divide steps
+	!
+	! We have to be careful here.  We know that %o3 >= %o5, so we can do the
+	! first divide step without thinking.  BUT, the others are conditional,
+	! and are only done if %o3 >= 0.  Because both %o3 and %o5 may have the high-
+	! order bit set in the first step, just falling into the regular
+	! division loop will mess up the first time around.
+	! So we unroll slightly...
+	do_single_div:
+		subcc	%g2, 1, %g2
+		bl	end_regular_divide
+		nop
+		sub	%o3, %o5, %o3
+		mov	1, %o2
+		b	end_single_divloop
+		nop
+	single_divloop:
+		sll	%o2, 1, %o2
+		bl	1f
+		srl	%o5, 1, %o5
+		! %o3 >= 0
+		sub	%o3, %o5, %o3
+		b	2f
+		add	%o2, 1, %o2
+	1:	! %o3 < 0
+		add	%o3, %o5, %o3
+		sub	%o2, 1, %o2
+	2:
+	end_single_divloop:
+		subcc	%g2, 1, %g2
+		bge	single_divloop
+		tst	%o3
+		b,a	end_regular_divide
+
+not_really_big:
+1:
+	sll	%o5, 4, %o5
+	cmp	%o5, %o3
+	bleu	1b
+	addcc	%o4, 1, %o4
+	be	got_result
+	sub	%o4, 1, %o4
+
+	tst	%o3	! set up for initial iteration
+divloop:
+	sll	%o2, 4, %o2
+	! depth 1, accumulated bits 0
+	bl	L1.16
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 2, accumulated bits 1
+	bl	L2.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 3, accumulated bits 3
+	bl	L3.19
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 7
+	bl	L4.23
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (7*2+1), %o2
+	
+L4.23:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (7*2-1), %o2
+	
+	
+L3.19:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 5
+	bl	L4.21
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (5*2+1), %o2
+	
+L4.21:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (5*2-1), %o2
+	
+L2.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 3, accumulated bits 1
+	bl	L3.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 3
+	bl	L4.19
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (3*2+1), %o2
+	
+L4.19:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (3*2-1), %o2
+
+L3.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 1
+	bl	L4.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (1*2+1), %o2
+
+L4.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (1*2-1), %o2
+	
+L1.16:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 2, accumulated bits -1
+	bl	L2.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 3, accumulated bits -1
+	bl	L3.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -1
+	bl	L4.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-1*2+1), %o2
+	
+L4.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-1*2-1), %o2
+	
+L3.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -3
+	bl	L4.13
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-3*2+1), %o2
+	
+L4.13:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-3*2-1), %o2
+	
+L2.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 3, accumulated bits -3
+	bl	L3.13
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -5
+	bl	L4.11
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-5*2+1), %o2
+	
+L4.11:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-5*2-1), %o2
+	
+L3.13:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -7
+	bl	L4.9
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-7*2+1), %o2
+
+L4.9:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-7*2-1), %o2
+	
+	9:
+end_regular_divide:
+	subcc	%o4, 1, %o4
+	bge	divloop
+	tst	%o3
+	bl,a	got_result
+	! non-restoring fixup here (one instruction only!)
+	sub	%o2, 1, %o2
+
+
+got_result:
+	! check to see if answer should be < 0
+	tst	%g3
+	bl,a	1f
+	sub %g0, %o2, %o2
+1:
+	retl
+	mov %o2, %o0
+#endif
+
+#ifdef L_modsi3
+/* This implementation was taken from glibc:
+ *
+ * Input: dividend and divisor in %o0 and %o1 respectively.
+ *
+ * Algorithm parameters:
+ *  N		how many bits per iteration we try to get (4)
+ *  WORDSIZE	total number of bits (32)
+ *
+ * Derived constants:
+ *  TOPBITS	number of bits in the top decade of a number
+ *
+ * Important variables:
+ *  Q		the partial quotient under development (initially 0)
+ *  R		the remainder so far, initially the dividend
+ *  ITER	number of main division loop iterations required;
+ *		equal to ceil(log2(quotient) / N).  Note that this
+ *		is the log base (2^N) of the quotient.
+ *  V		the current comparand, initially divisor*2^(ITER*N-1)
+ *
+ * Cost:
+ *  Current estimate for non-large dividend is
+ *	ceil(log2(quotient) / N) * (10 + 7N/2) + C
+ *  A large dividend is one greater than 2^(31-TOPBITS) and takes a
+ *  different path, as the upper bits of the quotient must be developed
+ *  one bit at a time.
+ */
+.text
+	.align 4
+	.global	.urem
+	.proc 4
+.urem:
+	b	divide
+	mov	0, %g3		! result always positive
+
+        .align 4
+	.global .rem
+	.proc 4
+.rem:
+	! compute sign of result; if neither is negative, no problem
+	orcc	%o1, %o0, %g0	! either negative?
+	bge	2f			! no, go do the divide
+	mov	%o0, %g3		! sign of remainder matches %o0
+	tst	%o1
+	bge	1f
+	tst	%o0
+	! %o1 is definitely negative; %o0 might also be negative
+	bge	2f			! if %o0 not negative...
+	sub	%g0, %o1, %o1	! in any case, make %o1 nonneg
+1:	! %o0 is negative, %o1 is nonnegative
+	sub	%g0, %o0, %o0	! make %o0 nonnegative
+2:
+
+	! Ready to divide.  Compute size of quotient; scale comparand.
+divide:
+	orcc	%o1, %g0, %o5
+	bne	1f
+	mov	%o0, %o3
+
+		! Divide by zero trap.  If it returns, return 0 (about as
+		! wrong as possible, but that is what SunOS does...).
+		ta	0x2   !ST_DIV0
+		retl
+		clr	%o0
+
+1:
+	cmp	%o3, %o5		! if %o1 exceeds %o0, done
+	blu	got_result		! (and algorithm fails otherwise)
+	clr	%o2
+	sethi	%hi(1 << (32 - 4 - 1)), %g1
+	cmp	%o3, %g1
+	blu	not_really_big
+	clr	%o4
+
+	! Here the dividend is >= 2**(31-N) or so.  We must be careful here,
+	! as our usual N-at-a-shot divide step will cause overflow and havoc.
+	! The number of bits in the result here is N*ITER+SC, where SC <= N.
+	! Compute ITER in an unorthodox manner: know we need to shift V into
+	! the top decade: so do not even bother to compare to R.
+	1:
+		cmp	%o5, %g1
+		bgeu	3f
+		mov	1, %g2
+		sll	%o5, 4, %o5
+		b	1b
+		add	%o4, 1, %o4
+
+	! Now compute %g2.
+	2:	addcc	%o5, %o5, %o5
+		bcc	not_too_big
+		add	%g2, 1, %g2
+
+		! We get here if the %o1 overflowed while shifting.
+		! This means that %o3 has the high-order bit set.
+		! Restore %o5 and subtract from %o3.
+		sll	%g1, 4, %g1	! high order bit
+		srl	%o5, 1, %o5		! rest of %o5
+		add	%o5, %g1, %o5
+		b	do_single_div
+		sub	%g2, 1, %g2
+
+	not_too_big:
+	3:	cmp	%o5, %o3
+		blu	2b
+		nop
+		be	do_single_div
+		nop
+	/* NB: these are commented out in the V8-SPARC manual as well */
+	/* (I do not understand this) */
+	! %o5 > %o3: went too far: back up 1 step
+	!	srl	%o5, 1, %o5
+	!	dec	%g2
+	! do single-bit divide steps
+	!
+	! We have to be careful here.  We know that %o3 >= %o5, so we can do the
+	! first divide step without thinking.  BUT, the others are conditional,
+	! and are only done if %o3 >= 0.  Because both %o3 and %o5 may have the high-
+	! order bit set in the first step, just falling into the regular
+	! division loop will mess up the first time around.
+	! So we unroll slightly...
+	do_single_div:
+		subcc	%g2, 1, %g2
+		bl	end_regular_divide
+		nop
+		sub	%o3, %o5, %o3
+		mov	1, %o2
+		b	end_single_divloop
+		nop
+	single_divloop:
+		sll	%o2, 1, %o2
+		bl	1f
+		srl	%o5, 1, %o5
+		! %o3 >= 0
+		sub	%o3, %o5, %o3
+		b	2f
+		add	%o2, 1, %o2
+	1:	! %o3 < 0
+		add	%o3, %o5, %o3
+		sub	%o2, 1, %o2
+	2:
+	end_single_divloop:
+		subcc	%g2, 1, %g2
+		bge	single_divloop
+		tst	%o3
+		b,a	end_regular_divide
+
+not_really_big:
+1:
+	sll	%o5, 4, %o5
+	cmp	%o5, %o3
+	bleu	1b
+	addcc	%o4, 1, %o4
+	be	got_result
+	sub	%o4, 1, %o4
+
+	tst	%o3	! set up for initial iteration
+divloop:
+	sll	%o2, 4, %o2
+		! depth 1, accumulated bits 0
+	bl	L1.16
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 2, accumulated bits 1
+	bl	L2.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 3, accumulated bits 3
+	bl	L3.19
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 7
+	bl	L4.23
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (7*2+1), %o2
+L4.23:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (7*2-1), %o2
+	
+L3.19:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 5
+	bl	L4.21
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (5*2+1), %o2
+	
+L4.21:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (5*2-1), %o2
+	
+L2.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 3, accumulated bits 1
+	bl	L3.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 3
+	bl	L4.19
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (3*2+1), %o2
+	
+L4.19:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (3*2-1), %o2
+	
+L3.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits 1
+	bl	L4.17
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (1*2+1), %o2
+	
+L4.17:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (1*2-1), %o2
+	
+L1.16:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 2, accumulated bits -1
+	bl	L2.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 3, accumulated bits -1
+	bl	L3.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -1
+	bl	L4.15
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-1*2+1), %o2
+	
+L4.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-1*2-1), %o2
+	
+L3.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -3
+	bl	L4.13
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-3*2+1), %o2
+	
+L4.13:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-3*2-1), %o2
+	
+L2.15:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 3, accumulated bits -3
+	bl	L3.13
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -5
+	bl	L4.11
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-5*2+1), %o2
+	
+L4.11:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-5*2-1), %o2
+	
+L3.13:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	! depth 4, accumulated bits -7
+	bl	L4.9
+	srl	%o5,1,%o5
+	! remainder is positive
+	subcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-7*2+1), %o2
+	
+L4.9:
+	! remainder is negative
+	addcc	%o3,%o5,%o3
+	b	9f
+	add	%o2, (-7*2-1), %o2
+	
+	9:
+end_regular_divide:
+	subcc	%o4, 1, %o4
+	bge	divloop
+	tst	%o3
+	bl,a	got_result
+	! non-restoring fixup here (one instruction only!)
+	add	%o3, %o1, %o3
+
+got_result:
+	! check to see if answer should be < 0
+	tst	%g3
+	bl,a	1f
+	sub %g0, %o3, %o3
+1:
+	retl
+	mov %o3, %o0
+
+#endif
+
diff --git a/gcc-4.9/libgcc/config/sparc/libgcc-glibc.ver b/gcc-4.9/libgcc/config/sparc/libgcc-glibc.ver
new file mode 100644
index 000000000..b9447d139
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/libgcc-glibc.ver
@@ -0,0 +1,93 @@
+# Copyright (C) 2002-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# In order to work around the very problems that force us to now generally
+# create a libgcc.so, glibc reexported a number of routines from libgcc.a.
+# By now choosing the same version tags for these specific routines, we
+# maintain enough binary compatibility to allow future versions of glibc
+# to defer implementation of these routines to libgcc.so via DT_AUXILIARY.
+
+%exclude {
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%ifdef __arch64__
+%define GLIBC_VER GLIBC_2.2
+%else
+%define GLIBC_VER GLIBC_2.0
+%endif
+%inherit GCC_3.0 GLIBC_VER
+GLIBC_VER {
+  # Sampling of DImode arithmetic used by (at least) i386 and m68k.
+  __divdi3
+  __moddi3
+  __udivdi3
+  __umoddi3
+
+  # Exception handling support functions used by most everyone.
+  __register_frame
+  __register_frame_table
+  __deregister_frame
+  __register_frame_info
+  __deregister_frame_info
+  __frame_state_for
+  __register_frame_info_table
+}
+
+%if !defined (__arch64__) && defined (__LONG_DOUBLE_128__)
+
+# long double 128 bit support from 32-bit libgcc_s.so.1 is only available
+# when configured with --with-long-double-128.  Make sure all the
+# symbols are available at @@GCC_LDBL_* versions to make it clear
+# there is a configurable symbol set.
+
+%exclude {
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+
+  __divtc3
+  __multc3
+  __powitf2
+}
+
+%inherit GCC_LDBL_3.0 GCC_3.0
+GCC_LDBL_3.0 {
+  __fixtfdi
+  __fixunstfdi
+  __floatditf
+}
+
+%inherit GCC_LDBL_4.0.0 GCC_4.0.0
+GCC_LDBL_4.0.0 {
+  __divtc3
+  __multc3
+  __powitf2
+}
+
+%endif
diff --git a/gcc-4.9/libgcc/config/sparc/linux-unwind.h b/gcc-4.9/libgcc/config/sparc/linux-unwind.h
new file mode 100644
index 000000000..61ba47174
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/linux-unwind.h
@@ -0,0 +1,215 @@
+/* DWARF2 EH unwinding support for SPARC Linux.
+   Copyright (C) 2004-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#if defined(__arch64__)
+
+#undef STACK_BIAS
+#define STACK_BIAS 2047
+
+/* 64-bit SPARC version */
+#define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
+
+static _Unwind_Reason_Code
+sparc64_fallback_frame_state (struct _Unwind_Context *context,
+			      _Unwind_FrameState *fs)
+{
+  unsigned int *pc = context->ra;
+  long this_cfa = (long) context->cfa;
+  long new_cfa, ra_location, shifted_ra_location;
+  long regs_off, fpu_save_off;
+  long fpu_save;
+  int i;
+
+  if (pc[0] != 0x82102065	/* mov NR_rt_sigreturn, %g1 */
+      || pc[1] != 0x91d0206d)	/* ta 0x6d */
+    return _URC_END_OF_STACK;
+
+  regs_off = 192 + 128;
+  fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4);
+
+  new_cfa = *(long *)(this_cfa + regs_off + (14 * 8));
+  /* The frame address is %sp + STACK_BIAS in 64-bit mode.  */
+  new_cfa += STACK_BIAS;
+  fpu_save = *(long *)(this_cfa + fpu_save_off);
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
+  fs->regs.cfa_offset = new_cfa - this_cfa;
+
+  for (i = 1; i < 16; i++)
+    {
+      /* We never restore %sp as everything is purely CFA-based.  */
+      if ((unsigned int) i == __builtin_dwarf_sp_column ())
+	continue;
+
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= this_cfa + regs_off + (i * 8) - new_cfa;
+    }
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i + 16].loc.offset
+	= this_cfa + (i * 8) - new_cfa;
+    }
+  if (fpu_save)
+    {
+      for (i = 0; i < 64; i++)
+	{
+	  if (i > 32 && (i & 0x1))
+	    continue;
+	  fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i + 32].loc.offset
+	    = fpu_save + (i * 4) - new_cfa;
+	}
+    }
+
+  /* State the rules to find the kernel's code "return address", which is
+     the address of the active instruction when the signal was caught.
+     On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
+     need to preventively subtract it from the purported return address.  */
+  ra_location = this_cfa + regs_off + 17 * 8;
+  shifted_ra_location = this_cfa + regs_off + 19 * 8; /* Y register */
+  *(long *)shifted_ra_location = *(long *)ra_location - 8;
+  fs->retaddr_column = 0;
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#define MD_FROB_UPDATE_CONTEXT sparc64_frob_update_context
+
+static void
+sparc64_frob_update_context (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  /* The column of %sp contains the old CFA, not the old value of %sp.
+     The CFA offset already comprises the stack bias so, when %sp is the
+     CFA register, we must avoid counting the stack bias twice.  Do not
+     do that for signal frames as the offset is artificial for them.  */
+  if (fs->regs.cfa_reg == __builtin_dwarf_sp_column ()
+      && fs->regs.cfa_how == CFA_REG_OFFSET
+      && fs->regs.cfa_offset != 0
+      && !fs->signal_frame)
+    {
+      long i;
+
+      context->cfa -= STACK_BIAS;
+
+      for (i = 0; i < DWARF_FRAME_REGISTERS + 1; ++i)
+	if (fs->regs.reg[i].how == REG_SAVED_OFFSET)
+	  _Unwind_SetGRPtr (context, i,
+			    _Unwind_GetGRPtr (context, i) - STACK_BIAS);
+    }
+}
+
+#else
+
+/* 32-bit SPARC version */
+#define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state
+
+static _Unwind_Reason_Code
+sparc_fallback_frame_state (struct _Unwind_Context *context,
+			    _Unwind_FrameState *fs)
+{
+  unsigned int *pc = context->ra;
+  int this_cfa = (int) context->cfa;
+  int new_cfa, ra_location, shifted_ra_location;
+  int regs_off, fpu_save_off;
+  int fpu_save;
+  int old_style, i;
+
+  if (pc[1] != 0x91d02010)	/* ta 0x10 */
+    return _URC_END_OF_STACK;
+
+  if (pc[0] == 0x821020d8)	/* mov NR_sigreturn, %g1 */
+    old_style = 1;
+  else if (pc[0] == 0x82102065)	/* mov NR_rt_sigreturn, %g1 */
+    old_style = 0;
+  else
+    return _URC_END_OF_STACK;
+
+  if (old_style)
+    {
+      regs_off = 96;
+      fpu_save_off = regs_off + (4 * 4) + (16 * 4);
+    }
+  else
+    {
+      regs_off = 96 + 128;
+      fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4);
+    }
+
+  new_cfa = *(int *)(this_cfa + regs_off + (4 * 4) + (14 * 4));
+  fpu_save = *(int *)(this_cfa + fpu_save_off);
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
+  fs->regs.cfa_offset = new_cfa - this_cfa;
+
+  for (i = 1; i < 16; i++)
+    {
+      /* We never restore %sp as everything is purely CFA-based.  */
+      if ((unsigned int) i == __builtin_dwarf_sp_column ())
+	continue;
+
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= this_cfa + regs_off + (4 * 4) + (i * 4) - new_cfa;
+    }
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i + 16].loc.offset
+	= this_cfa + (i * 4) - new_cfa;
+    }
+  if (fpu_save)
+    {
+      for (i = 0; i < 32; i++)
+	{
+	  fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i + 32].loc.offset
+	    = fpu_save + (i * 4) - new_cfa;
+	}
+    }
+
+  /* State the rules to find the kernel's code "return address", which is
+     the address of the active instruction when the signal was caught.
+     On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
+     need to preventively subtract it from the purported return address.  */
+  ra_location = this_cfa + regs_off + 4;
+  shifted_ra_location = this_cfa + regs_off + 3 * 4; /* Y register */
+  *(int *)shifted_ra_location = *(int *)ra_location - 8;
+  fs->retaddr_column = 0;
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#endif
diff --git a/gcc-4.9/libgcc/config/sparc/sol2-c1.S b/gcc-4.9/libgcc/config/sparc/sol2-c1.S
new file mode 100644
index 000000000..674e1b688
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/sol2-c1.S
@@ -0,0 +1,103 @@
+! crt1.s for sparc & sparcv9 (SunOS 5)
+
+!   Copyright (C) 1992-2014 Free Software Foundation, Inc.
+!   Written By David Vinayak Henkel-Wallace, June 1992
+! 
+! This file is free software; you can redistribute it and/or modify it
+! under the terms of the GNU General Public License as published by the
+! Free Software Foundation; either version 3, or (at your option) any
+! later version.
+! 
+! This file is distributed in the hope that it will be useful, but
+! WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+! General Public License for more details.
+! 
+! Under Section 7 of GPL version 3, you are granted additional
+! permissions described in the GCC Runtime Library Exception, version
+! 3.1, as published by the Free Software Foundation.
+!
+! You should have received a copy of the GNU General Public License and
+! a copy of the GCC Runtime Library Exception along with this program;
+! see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+! <http://www.gnu.org/licenses/>.
+
+! This file takes control of the process from the kernel, as specified
+! in section 3 of the SVr4 ABI.
+! This file is the first thing linked into any executable.
+
+#ifdef __sparcv9
+#define	CPTRSIZE	8
+#define	CPTRSHIFT	3
+#define	STACK_BIAS	2047
+#define	ldn		ldx
+#define	stn		stx
+#define setn(s, scratch, dst)	setx s, scratch, dst
+#else
+#define	CPTRSIZE	4
+#define	CPTRSHIFT	2
+#define	STACK_BIAS	0
+#define	ldn		ld
+#define	stn		st
+#define setn(s, scratch, dst)	set s, dst
+#endif
+
+	.section	".text"
+	.proc	022
+	.global	_start
+
+_start:
+	mov	0, %fp		! Mark bottom frame pointer
+	ldn	[%sp + (16 * CPTRSIZE) + STACK_BIAS], %l0	! argc
+	add	%sp, (17 * CPTRSIZE) + STACK_BIAS, %l1		! argv
+
+	! Leave some room for a call.  Sun leaves 32 octets (to sit on
+	! a cache line?) so we do too.
+#ifdef __sparcv9
+	sub	%sp, 48, %sp
+#else
+	sub	%sp, 32, %sp
+#endif
+
+	! %g1 may contain a function to be registered w/atexit
+	orcc	%g0, %g1, %g0
+#ifdef __sparcv9
+	be	%xcc, .nope
+#else
+	be	.nope
+#endif
+	mov	%g1, %o0
+	call	atexit
+	nop   
+.nope:
+	! Now make sure constructors and destructors are handled.
+	setn(_fini, %o1, %o0)
+	call	atexit, 1
+	nop
+	call	_init, 0
+	nop
+
+	! We ignore the auxiliary vector; there is no defined way to
+	! access those data anyway.  Instead, go straight to main:
+	mov	%l0, %o0	! argc
+	mov	%l1, %o1	! argv
+#ifdef GCRT1
+	setn(___Argv, %o4, %o3)
+	stn	%o1, [%o3]      ! *___Argv
+#endif
+	! Skip argc words past argv, to env:
+	sll	%l0, CPTRSHIFT, %o2
+	add	%o2, CPTRSIZE, %o2
+	add	%l1, %o2, %o2	! env
+	setn(_environ, %o4, %o3)
+	stn	%o2, [%o3]	! *_environ
+	call	main, 4
+	nop   
+	call	exit, 0
+	nop   
+	call	_exit, 0
+	nop   
+	! We should never get here.
+
+	.type	_start,#function
+	.size	_start,.-_start
diff --git a/gcc-4.9/libgcc/config/sparc/sol2-unwind.h b/gcc-4.9/libgcc/config/sparc/sol2-unwind.h
new file mode 100644
index 000000000..37807f9a9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/sol2-unwind.h
@@ -0,0 +1,414 @@
+/* DWARF2 EH unwinding support for SPARC Solaris.
+   Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2.c for the structs.  */
+
+#include <ucontext.h>
+#include <sys/frame.h>
+#include <sys/stack.h>
+
+#ifdef __arch64__
+
+#define IS_SIGHANDLER sparc64_is_sighandler
+
+static int
+sparc64_is_sighandler (unsigned int *pc, void *cfa, int *nframes)
+{
+  if (/* Solaris 9 - single-threaded
+	----------------------------
+	The pattern changes slightly in different versions of the
+	operating system, so we skip the comparison against pc[-6] for
+	Solaris 9.
+
+	<sigacthandler+24>:  sra  %i0, 0, %l1
+
+	Solaris 9 5/02:
+	<sigacthandler+28>:  ldx  [ %o2 + 0xf68 ], %g5
+	Solaris 9 9/05:
+	<sigacthandler+28>:  ldx  [ %o2 + 0xe50 ], %g5
+
+	<sigacthandler+32>:  sllx  %l1, 3, %g4
+	<sigacthandler+36>:  mov  %l1, %o0
+	<sigacthandler+40>:  ldx  [ %g4 + %g5 ], %l0
+	<sigacthandler+44>:  call  %l0
+	<sigacthandler+48>:  mov  %i2, %o2
+	<sigacthandler+52>:  cmp  %l1, 8	<--- PC  */
+      (   pc[-7] == 0xa33e2000
+       /* skip pc[-6] */
+       && pc[-5] == 0x892c7003
+       && pc[-4] == 0x90100011
+       && pc[-3] == 0xe0590005
+       && pc[-2] == 0x9fc40000
+       && pc[-1] == 0x9410001a
+       && pc[ 0] == 0x80a46008))
+    {
+      /* We need to move up one frame:
+
+		<signal handler>	<-- context->cfa
+		sigacthandler
+		<kernel>
+      */
+      *nframes = 1;
+      return 1;
+    }
+
+  if (/* Solaris 8+ - multi-threaded
+	----------------------------
+	<__sighndlr>:        save  %sp, -176, %sp
+	<__sighndlr+4>:      mov  %i0, %o0
+	<__sighndlr+8>:      mov  %i1, %o1
+	<__sighndlr+12>:     call  %i3
+	<__sighndlr+16>:     mov  %i2, %o2
+	<__sighndlr+20>:     ret 		<--- PC
+	<__sighndlr+24>:     restore  */
+         pc[-5] == 0x9de3bf50
+      && pc[-4] == 0x90100018
+      && pc[-3] == 0x92100019
+      && pc[-2] == 0x9fc6c000
+      && pc[-1] == 0x9410001a
+      && pc[ 0] == 0x81c7e008
+      && pc[ 1] == 0x81e80000)
+    {
+      /* We have observed different calling frames among different
+	 versions of the operating system, so that we need to
+	 discriminate using the upper frame.  We look for the return
+	 address of the caller frame (there is an offset of 15 double
+	 words between the frame address and the place where this return
+	 address is stored) in order to do some more pattern matching.  */
+      unsigned int cuh_pattern
+	= *(unsigned int *)(*(unsigned long *)(cfa + 15*8) - 4);
+
+      if (cuh_pattern == 0x92100019)
+	/* This matches the call_user_handler pattern for Solaris 11.
+	   This is the same setup as for Solaris 9, see below.  */
+	*nframes = 3;
+
+      else if (cuh_pattern == 0xd25fa7ef)
+	{
+	  /* This matches the call_user_handler pattern for Solaris 10.
+	     There are 2 cases so we look for the return address of the
+	     caller's caller frame in order to do more pattern matching.  */
+	  unsigned long sah_address = *(unsigned long *)(cfa + 176 + 15*8);
+
+          if (sah_address && *(unsigned int *)(sah_address - 4) == 0x92100019)
+	    /* This is the same setup as for Solaris 9, see below.  */
+	    *nframes = 3;
+	  else
+	    /* The sigacthandler frame isn't present in the chain.
+	       We need to move up two frames:
+
+		<signal handler>	<-- context->cfa
+		__sighndlr
+		call_user_handler frame
+		<kernel>
+	    */
+	    *nframes = 2;
+	}
+
+      else if (cuh_pattern == 0x9410001a || cuh_pattern == 0x94100013)
+	/* This matches the call_user_handler pattern for Solaris 9.
+	   We need to move up three frames:
+
+		<signal handler>	<-- context->cfa
+		__sighndlr
+		call_user_handler
+		sigacthandler
+		<kernel>
+	*/
+	*nframes = 3;
+
+      return 1;
+    }
+
+  return 0;
+}
+
+#define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
+
+#define MD_FROB_UPDATE_CONTEXT sparc64_frob_update_context
+
+static void
+sparc64_frob_update_context (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  /* The column of %sp contains the old CFA, not the old value of %sp.
+     The CFA offset already comprises the stack bias so, when %sp is the
+     CFA register, we must avoid counting the stack bias twice.  */
+  if (fs->regs.cfa_reg == __builtin_dwarf_sp_column ()
+      && fs->regs.cfa_how == CFA_REG_OFFSET
+      && fs->regs.cfa_offset != 0)
+    {
+      long i;
+
+      context->cfa -= STACK_BIAS;
+
+      for (i = 0; i < DWARF_FRAME_REGISTERS + 1; ++i)
+	if (fs->regs.reg[i].how == REG_SAVED_OFFSET)
+	  _Unwind_SetGRPtr (context, i,
+			    _Unwind_GetGRPtr (context, i) - STACK_BIAS);
+    }
+}
+
+#else
+
+#define IS_SIGHANDLER sparc_is_sighandler
+
+static int
+sparc_is_sighandler (unsigned int *pc, void *cfa, int *nframes)
+{
+  if (/* Solaris 9 - single-threaded
+        ----------------------------
+	The pattern changes slightly in different versions of the operating
+	system, so we skip the comparison against pc[-6].
+
+	<sigacthandler+16>:  add  %o1, %o7, %o3
+	<sigacthandler+20>:  mov  %i1, %o1
+
+	<sigacthandler+24>:  ld  [ %o3 + <offset> ], %o2
+
+	<sigacthandler+28>:  sll  %i0, 2, %o0
+	<sigacthandler+32>:  ld  [ %o0 + %o2 ], %l0
+	<sigacthandler+36>:  mov  %i0, %o0
+	<sigacthandler+40>:  call  %l0
+	<sigacthandler+44>:  mov  %i2, %o2
+	<sigacthandler+48>:  cmp  %i0, 8	<--- PC  */
+         pc[-8] == 0x9602400f
+      && pc[-7] == 0x92100019
+      /* skip pc[-6] */
+      && pc[-5] == 0x912e2002
+      && pc[-4] == 0xe002000a
+      && pc[-3] == 0x90100018
+      && pc[-2] == 0x9fc40000
+      && pc[-1] == 0x9410001a
+      && pc[ 0] == 0x80a62008)
+    {
+      /* We need to move up one frame:
+
+		<signal handler>	<-- context->cfa
+		sigacthandler
+		<kernel>
+      */
+      *nframes = 1;
+      return 1;
+    }
+
+  if(/* Solaris 8+ - multi-threaded
+       ----------------------------
+       <__sighndlr>:	save  %sp, -96, %sp
+       <__sighndlr+4>:	mov  %i0, %o0
+       <__sighndlr+8>:	mov  %i1, %o1
+       <__sighndlr+12>:	call  %i3
+       <__sighndlr+16>:	mov  %i2, %o2
+       <__sighndlr+20>:	ret 		<--- PC
+       <__sighndlr+24>:	restore  */
+        pc[-5] == 0x9de3bfa0
+     && pc[-4] == 0x90100018
+     && pc[-3] == 0x92100019
+     && pc[-2] == 0x9fc6c000
+     && pc[-1] == 0x9410001a
+     && pc[ 0] == 0x81c7e008
+     && pc[ 1] == 0x81e80000)
+    {
+      /* We have observed different calling frames among different
+	 versions of the operating system, so that we need to
+	 discriminate using the upper frame.  We look for the return
+	 address of the caller frame (there is an offset of 15 words
+	 between the frame address and the place where this return
+	 address is stored) in order to do some more pattern matching.  */
+      unsigned int cuh_pattern
+	= *(unsigned int *)(*(unsigned int *)(cfa + 15*4) - 4);
+
+      if (cuh_pattern == 0x92100019)
+	/* This matches the call_user_handler pattern for Solaris 11.
+	   This is the same setup as for Solaris 9, see below.  */
+	*nframes = 3;
+
+      else if (cuh_pattern == 0xd407a04c)
+	{
+	  /* This matches the call_user_handler pattern for Solaris 10.
+	     There are 2 cases so we look for the return address of the
+	     caller's caller frame in order to do more pattern matching.  */
+	  unsigned int sah_address = *(unsigned int *)(cfa + 96 + 15*4);
+
+          if (sah_address && *(unsigned int *)(sah_address - 4) == 0x92100019)
+	    /* This is the same setup as for Solaris 9, see below.  */
+	    *nframes = 3;
+	  else
+	    /* The sigacthandler frame isn't present in the chain.
+	       We need to move up two frames:
+
+		<signal handler>	<-- context->cfa
+		__sighndlr
+		call_user_handler frame
+		<kernel>
+	    */
+	    *nframes = 2;
+	}
+
+      else if (cuh_pattern == 0x9410001a || cuh_pattern == 0x9410001b)
+	/* This matches the call_user_handler pattern for Solaris 9.
+	   We need to move up three frames:
+
+		<signal handler>	<-- context->cfa
+		__sighndlr
+		call_user_handler
+		sigacthandler
+		<kernel>
+	*/
+	*nframes = 3;
+
+      return 1;
+    }
+
+  return 0;
+}
+
+#define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state
+
+#endif
+
+static _Unwind_Reason_Code
+MD_FALLBACK_FRAME_STATE_FOR (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  void *pc = context->ra;
+  void *this_cfa = context->cfa;
+  int nframes = 0;
+  long new_cfa;
+  void *ra_location, *shifted_ra_location;
+  mcontext_t *mctx;
+  int i;
+
+  /* Deal with frame-less function from which a signal was raised.  */
+  if (_Unwind_IsSignalFrame (context))
+    {
+      /* The CFA is by definition unmodified in this case.  */
+      fs->regs.cfa_how = CFA_REG_OFFSET;
+      fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
+      fs->regs.cfa_offset = 0;
+
+      /* This is the canonical RA column.  */
+      fs->retaddr_column = 15;
+
+      return _URC_NO_REASON;
+    }
+
+  /* Do some pattern matching at the return address.  */
+  if (IS_SIGHANDLER (pc, this_cfa, &nframes))
+    {
+      struct frame *fp = (struct frame *) this_cfa;
+      struct handler_args {
+	struct frame frwin;
+	ucontext_t ucontext;
+      } *handler_args;
+      ucontext_t *ucp;
+
+      /* this_cfa points into the frame after the saved frame pointer and
+         saved pc (struct frame).
+
+         The ucontext_t structure is in the kernel frame after a struct
+         frame.  Since the frame sizes vary even within OS releases, we
+         need to walk the stack to get there.  */
+      for (i = 0; i < nframes; i++)
+	fp = (struct frame *) ((char *)fp->fr_savfp + STACK_BIAS);
+
+      handler_args = (struct handler_args *) fp;
+      ucp = &handler_args->ucontext;
+      mctx = &ucp->uc_mcontext;
+    }
+  else
+    return _URC_END_OF_STACK;
+
+  /* The frame address is %sp + STACK_BIAS in 64-bit mode.  */
+  new_cfa = mctx->gregs[REG_SP] + STACK_BIAS;
+
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
+  fs->regs.cfa_offset = new_cfa - (long) this_cfa + STACK_BIAS;
+
+  /* Restore global and out registers (in this order) from the
+     ucontext_t structure, uc_mcontext.gregs field.  */
+  for (i = 1; i < 16; i++)
+    {
+      /* We never restore %sp as everything is purely CFA-based.  */
+      if ((unsigned int) i == __builtin_dwarf_sp_column ())
+	continue;
+
+      /* First the global registers and then the out registers.  */
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset = (long)&mctx->gregs[REG_Y + i] - new_cfa;
+    }
+
+  /* Just above the stack pointer there are 16 extended words in which
+     the register window (in and local registers) was saved.  */
+  for (i = 0; i < 16; i++)
+    {
+      fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i + 16].loc.offset = i * sizeof(long);
+    }
+
+  /* Check whether we need to restore FPU registers.  */
+  if (mctx->fpregs.fpu_qcnt)
+    {
+      for (i = 0; i < 32; i++)
+	{
+	  fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i + 32].loc.offset
+	    = (long)&mctx->fpregs.fpu_fr.fpu_regs[i] - new_cfa;
+	}
+
+#ifdef __arch64__
+      /* For 64-bit, fpu_fr.fpu_dregs contains 32 instead of 16 doubles.  */
+      for (i = 32; i < 64; i++)
+	{
+	  if (i > 32 && (i & 1))
+	    continue;
+
+	  fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
+	  fs->regs.reg[i + 32].loc.offset
+	    = (long)&mctx->fpregs.fpu_fr.fpu_dregs[i/2] - new_cfa;
+	}
+#endif
+    }
+
+  /* State the rules to find the kernel's code "return address", which is
+     the address of the active instruction when the signal was caught.
+     On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
+     need to preventively subtract it from the purported return address.  */
+  ra_location = &mctx->gregs[REG_PC];
+  shifted_ra_location = &mctx->gregs[REG_Y];
+  *(void **)shifted_ra_location = *(void **)ra_location - 8;
+  fs->retaddr_column = 0;
+  fs->regs.reg[0].how = REG_SAVED_OFFSET;
+  fs->regs.reg[0].loc.offset = (long)shifted_ra_location - new_cfa;
+
+  /* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn
+     rather than before it, so don't set fs->signal_frame in that case.
+     We test whether the cexc field of the FSR is zero.  */
+  if ((mctx->fpregs.fpu_fsr & 0x1f) == 0)
+    fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
diff --git a/gcc-4.9/libgcc/config/sparc/t-linux b/gcc-4.9/libgcc/config/sparc/t-linux
new file mode 100644
index 000000000..474f1755e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/t-linux
@@ -0,0 +1,4 @@
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used.
+# Avoid the t-linux version file.
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/sparc/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/sparc/t-linux64 b/gcc-4.9/libgcc/config/sparc/t-linux64
new file mode 100644
index 000000000..6583fe25a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/t-linux64
@@ -0,0 +1 @@
+CRTSTUFF_T_CFLAGS = -mcmodel=medany
diff --git a/gcc-4.9/libgcc/config/sparc/t-softmul b/gcc-4.9/libgcc/config/sparc/t-softmul
new file mode 100644
index 000000000..714220060
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/t-softmul
@@ -0,0 +1,2 @@
+LIB1ASMSRC = sparc/lb1spc.S
+LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3
diff --git a/gcc-4.9/libgcc/config/sparc/t-sol2 b/gcc-4.9/libgcc/config/sparc/t-sol2
new file mode 100644
index 000000000..ea3fa63a2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/sparc/t-sol2
@@ -0,0 +1,6 @@
+# We need to use -fPIC when we are using gcc to compile the routines in
+# crtstuff.c.  This is only really needed when we are going to use gcc/g++
+# to produce a shared library, but since we don't know ahead of time when
+# we will be doing that, we just always use -fPIC when compiling the
+# routines in crtstuff.c.
+CRTSTUFF_T_CFLAGS = $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/spu/cache.S b/gcc-4.9/libgcc/config/spu/cache.S
new file mode 100644
index 000000000..5506079c7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/cache.S
@@ -0,0 +1,43 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+	.data
+	.p2align 7
+	.global __cache
+__cache:
+	.rept __CACHE_SIZE__ * 8
+	.fill 128
+	.endr
+
+	.p2align 7
+	.global __cache_tag_array
+__cache_tag_array:
+	.rept __CACHE_SIZE__ * 2
+	.long 1, 1, 1, 1
+	.fill 128-16
+	.endr
+__end_cache_tag_array:
+
+	.globl __cache_tag_array_size
+	.set __cache_tag_array_size, __end_cache_tag_array-__cache_tag_array
+
diff --git a/gcc-4.9/libgcc/config/spu/cachemgr.c b/gcc-4.9/libgcc/config/spu/cachemgr.c
new file mode 100644
index 000000000..572718cf3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/cachemgr.c
@@ -0,0 +1,438 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <spu_mfcio.h>
+#include <spu_internals.h>
+#include <spu_intrinsics.h>
+#include <spu_cache.h>
+
+extern unsigned long long __ea_local_store;
+extern char __cache_tag_array_size;
+
+#define LINE_SIZE 128
+#define TAG_MASK (LINE_SIZE - 1)
+
+#define WAYS 4
+#define SET_MASK ((int) &__cache_tag_array_size - LINE_SIZE)
+
+#define CACHE_LINES ((int) &__cache_tag_array_size /		\
+		     sizeof (struct __cache_tag_array) * WAYS)
+
+struct __cache_tag_array
+{
+  unsigned int tag_lo[WAYS];
+  unsigned int tag_hi[WAYS];
+  void *base[WAYS];
+  int reserved[WAYS];
+  vector unsigned short dirty_bits[WAYS];
+};
+
+extern struct __cache_tag_array __cache_tag_array[];
+extern char __cache[];
+
+/* In order to make the code seem a little cleaner, and to avoid having
+   64/32 bit ifdefs all over the place, we use macros.  */
+
+#ifdef __EA64__
+typedef unsigned long long addr;
+
+#define CHECK_TAG(_entry, _way, _tag)			\
+  ((_entry)->tag_lo[(_way)] == ((_tag) & 0xFFFFFFFF)	\
+   && (_entry)->tag_hi[(_way)] == ((_tag) >> 32))
+
+#define GET_TAG(_entry, _way) \
+  ((unsigned long long)(_entry)->tag_hi[(_way)] << 32	\
+   | (unsigned long long)(_entry)->tag_lo[(_way)])
+
+#define SET_TAG(_entry, _way, _tag)			\
+  (_entry)->tag_lo[(_way)] = (_tag) & 0xFFFFFFFF;	\
+  (_entry)->tag_hi[(_way)] = (_tag) >> 32
+
+#else /*__EA32__*/
+typedef unsigned long addr;
+
+#define CHECK_TAG(_entry, _way, _tag)			\
+  ((_entry)->tag_lo[(_way)] == (_tag))
+
+#define GET_TAG(_entry, _way)				\
+  ((_entry)->tag_lo[(_way)])
+
+#define SET_TAG(_entry, _way, _tag)			\
+  (_entry)->tag_lo[(_way)] = (_tag)
+
+#endif
+
+/* In GET_ENTRY, we cast away the high 32 bits,
+   as the tag is only in the low 32.  */
+
+#define GET_ENTRY(_addr)						   \
+  ((struct __cache_tag_array *)						   \
+   si_to_uint (si_a (si_and (si_from_uint ((unsigned int) (addr) (_addr)), \
+			     si_from_uint (SET_MASK)),			   \
+	       si_from_uint ((unsigned int) __cache_tag_array))))
+
+#define GET_CACHE_LINE(_addr, _way) \
+  ((void *) (__cache + ((_addr) & SET_MASK) * WAYS) + ((_way) * LINE_SIZE));
+
+#define CHECK_DIRTY(_vec) (si_to_uint (si_orx ((qword) (_vec))))
+#define SET_EMPTY(_entry, _way) ((_entry)->tag_lo[(_way)] = 1)
+#define CHECK_EMPTY(_entry, _way) ((_entry)->tag_lo[(_way)] == 1)
+
+#define LS_FLAG 0x80000000
+#define SET_IS_LS(_entry, _way) ((_entry)->reserved[(_way)] |= LS_FLAG)
+#define CHECK_IS_LS(_entry, _way) ((_entry)->reserved[(_way)] & LS_FLAG)
+#define GET_LRU(_entry, _way) ((_entry)->reserved[(_way)] & ~LS_FLAG)
+
+static int dma_tag = 32;
+
+static void
+__cache_evict_entry (struct __cache_tag_array *entry, int way)
+{
+  addr tag = GET_TAG (entry, way);
+
+  if (CHECK_DIRTY (entry->dirty_bits[way]) && !CHECK_IS_LS (entry, way))
+    {
+#ifdef NONATOMIC
+      /* Non-atomic writes.  */
+      unsigned int oldmask, mach_stat;
+      char *line = ((void *) 0);
+
+      /* Enter critical section.  */
+      mach_stat = spu_readch (SPU_RdMachStat);
+      spu_idisable ();
+
+      /* Issue DMA request.  */
+      line = GET_CACHE_LINE (entry->tag_lo[way], way);
+      mfc_put (line, tag, LINE_SIZE, dma_tag, 0, 0);
+
+      /* Wait for DMA completion.  */
+      oldmask = mfc_read_tag_mask ();
+      mfc_write_tag_mask (1 << dma_tag);
+      mfc_read_tag_status_all ();
+      mfc_write_tag_mask (oldmask);
+
+      /* Leave critical section.  */
+      if (__builtin_expect (mach_stat & 1, 0))
+	spu_ienable ();
+#else
+      /* Allocate a buffer large enough that we know it has 128 bytes
+         that are 128 byte aligned (for DMA). */
+
+      char buffer[LINE_SIZE + 127];
+      qword *buf_ptr = (qword *) (((unsigned int) (buffer) + 127) & ~127);
+      qword *line = GET_CACHE_LINE (entry->tag_lo[way], way);
+      qword bits;
+      unsigned int mach_stat;
+
+      /* Enter critical section.  */
+      mach_stat = spu_readch (SPU_RdMachStat);
+      spu_idisable ();
+
+      do
+	{
+	  /* We atomically read the current memory into a buffer
+	     modify the dirty bytes in the buffer, and write it
+	     back. If writeback fails, loop and try again.  */
+
+	  mfc_getllar (buf_ptr, tag, 0, 0);
+	  mfc_read_atomic_status ();
+
+	  /* The method we're using to write 16 dirty bytes into
+	     the buffer at a time uses fsmb which in turn uses
+	     the least significant 16 bits of word 0, so we
+	     load the bits and rotate so that the first bit of
+	     the bitmap is in the first bit that fsmb will use.  */
+
+	  bits = (qword) entry->dirty_bits[way];
+	  bits = si_rotqbyi (bits, -2);
+
+	  /* Si_fsmb creates the mask of dirty bytes.
+	     Use selb to nab the appropriate bits.  */
+	  buf_ptr[0] = si_selb (buf_ptr[0], line[0], si_fsmb (bits));
+
+	  /* Rotate to next 16 byte section of cache.  */
+	  bits = si_rotqbyi (bits, 2);
+
+	  buf_ptr[1] = si_selb (buf_ptr[1], line[1], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[2] = si_selb (buf_ptr[2], line[2], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[3] = si_selb (buf_ptr[3], line[3], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[4] = si_selb (buf_ptr[4], line[4], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[5] = si_selb (buf_ptr[5], line[5], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[6] = si_selb (buf_ptr[6], line[6], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+	  buf_ptr[7] = si_selb (buf_ptr[7], line[7], si_fsmb (bits));
+	  bits = si_rotqbyi (bits, 2);
+
+	  mfc_putllc (buf_ptr, tag, 0, 0);
+	}
+      while (mfc_read_atomic_status ());
+
+      /* Leave critical section.  */
+      if (__builtin_expect (mach_stat & 1, 0))
+	spu_ienable ();
+#endif
+    }
+
+  /* In any case, marking the lo tag with 1 which denotes empty.  */
+  SET_EMPTY (entry, way);
+  entry->dirty_bits[way] = (vector unsigned short) si_from_uint (0);
+}
+
+void
+__cache_evict (__ea void *ea)
+{
+  addr tag = (addr) ea & ~TAG_MASK;
+  struct __cache_tag_array *entry = GET_ENTRY (ea);
+  int i = 0;
+
+  /* Cycles through all the possible ways an address could be at
+     and evicts the way if found.  */
+
+  for (i = 0; i < WAYS; i++)
+    if (CHECK_TAG (entry, i, tag))
+      __cache_evict_entry (entry, i);
+}
+
+static void *
+__cache_fill (int way, addr tag)
+{
+  unsigned int oldmask, mach_stat;
+  char *line = ((void *) 0);
+
+  /* Reserve our DMA tag.  */
+  if (dma_tag == 32)
+    dma_tag = mfc_tag_reserve ();
+
+  /* Enter critical section.  */
+  mach_stat = spu_readch (SPU_RdMachStat);
+  spu_idisable ();
+
+  /* Issue DMA request.  */
+  line = GET_CACHE_LINE (tag, way);
+  mfc_get (line, tag, LINE_SIZE, dma_tag, 0, 0);
+
+  /* Wait for DMA completion.  */
+  oldmask = mfc_read_tag_mask ();
+  mfc_write_tag_mask (1 << dma_tag);
+  mfc_read_tag_status_all ();
+  mfc_write_tag_mask (oldmask);
+
+  /* Leave critical section.  */
+  if (__builtin_expect (mach_stat & 1, 0))
+    spu_ienable ();
+
+  return (void *) line;
+}
+
+static void
+__cache_miss (__ea void *ea, struct __cache_tag_array *entry, int way)
+{
+
+  addr tag = (addr) ea & ~TAG_MASK;
+  unsigned int lru = 0;
+  int i = 0;
+  int idx = 0;
+
+  /* If way > 4, then there are no empty slots, so we must evict
+     the least recently used entry. */
+  if (way >= 4)
+    {
+      for (i = 0; i < WAYS; i++)
+	{
+	  if (GET_LRU (entry, i) > lru)
+	    {
+	      lru = GET_LRU (entry, i);
+	      idx = i;
+	    }
+	}
+      __cache_evict_entry (entry, idx);
+      way = idx;
+    }
+
+  /* Set the empty entry's tag and fill it's cache line. */
+
+  SET_TAG (entry, way, tag);
+  entry->reserved[way] = 0;
+
+  /* Check if the address is just an effective address within the
+     SPU's local store. */
+
+  /* Because the LS is not 256k aligned, we can't do a nice and mask
+     here to compare, so we must check the whole range.  */
+
+  if ((addr) ea >= (addr) __ea_local_store
+      && (addr) ea < (addr) (__ea_local_store + 0x40000))
+    {
+      SET_IS_LS (entry, way);
+      entry->base[way] =
+	(void *) ((unsigned int) ((addr) ea -
+				  (addr) __ea_local_store) & ~0x7f);
+    }
+  else
+    {
+      entry->base[way] = __cache_fill (way, tag);
+    }
+}
+
+void *
+__cache_fetch_dirty (__ea void *ea, int n_bytes_dirty)
+{
+#ifdef __EA64__
+  unsigned int tag_hi;
+  qword etag_hi;
+#endif
+  unsigned int tag_lo;
+  struct __cache_tag_array *entry;
+
+  qword etag_lo;
+  qword equal;
+  qword bit_mask;
+  qword way;
+
+  /* This first chunk, we merely fill the pointer and tag.  */
+
+  entry = GET_ENTRY (ea);
+
+#ifndef __EA64__
+  tag_lo =
+    si_to_uint (si_andc
+		(si_shufb
+		 (si_from_uint ((addr) ea), si_from_uint (0),
+		  si_from_uint (0x00010203)), si_from_uint (TAG_MASK)));
+#else
+  tag_lo =
+    si_to_uint (si_andc
+		(si_shufb
+		 (si_from_ullong ((addr) ea), si_from_uint (0),
+		  si_from_uint (0x04050607)), si_from_uint (TAG_MASK)));
+
+  tag_hi =
+    si_to_uint (si_shufb
+		(si_from_ullong ((addr) ea), si_from_uint (0),
+		 si_from_uint (0x00010203)));
+#endif
+
+  /* Increment LRU in reserved bytes.  */
+  si_stqd (si_ai (si_lqd (si_from_ptr (entry), 48), 1),
+	   si_from_ptr (entry), 48);
+
+missreturn:
+  /* Check if the entry's lo_tag is equal to the address' lo_tag.  */
+  etag_lo = si_lqd (si_from_ptr (entry), 0);
+  equal = si_ceq (etag_lo, si_from_uint (tag_lo));
+#ifdef __EA64__
+  /* And the high tag too.  */
+  etag_hi = si_lqd (si_from_ptr (entry), 16);
+  equal = si_and (equal, (si_ceq (etag_hi, si_from_uint (tag_hi))));
+#endif
+
+  if ((si_to_uint (si_orx (equal)) == 0))
+    goto misshandler;
+
+  if (n_bytes_dirty)
+    {
+      /* way = 0x40,0x50,0x60,0x70 for each way, which is also the
+         offset of the appropriate dirty bits.  */
+      way = si_shli (si_clz (si_gbb (equal)), 2);
+
+      /* To create the bit_mask, we set it to all 1s (uint -1), then we
+         shift it over (128 - n_bytes_dirty) times.  */
+
+      bit_mask = si_from_uint (-1);
+
+      bit_mask =
+	si_shlqby (bit_mask, si_from_uint ((LINE_SIZE - n_bytes_dirty) / 8));
+
+      bit_mask =
+	si_shlqbi (bit_mask, si_from_uint ((LINE_SIZE - n_bytes_dirty) % 8));
+
+      /* Rotate it around to the correct offset.  */
+      bit_mask =
+	si_rotqby (bit_mask,
+		   si_from_uint (-1 * ((addr) ea & TAG_MASK) / 8));
+
+      bit_mask =
+	si_rotqbi (bit_mask,
+		   si_from_uint (-1 * ((addr) ea & TAG_MASK) % 8));
+
+      /* Update the dirty bits.  */
+      si_stqx (si_or (si_lqx (si_from_ptr (entry), way), bit_mask),
+	       si_from_ptr (entry), way);
+    };
+
+  /* We've definitely found the right entry, set LRU (reserved) to 0
+     maintaining the LS flag (MSB).  */
+
+  si_stqd (si_andc
+	   (si_lqd (si_from_ptr (entry), 48),
+	    si_and (equal, si_from_uint (~(LS_FLAG)))),
+	   si_from_ptr (entry), 48);
+
+  return (void *)
+    si_to_uint (si_a
+		(si_orx
+		 (si_and (si_lqd (si_from_ptr (entry), 32), equal)),
+		 si_from_uint (((unsigned int) (addr) ea) & TAG_MASK)));
+
+misshandler:
+  equal = si_ceqi (etag_lo, 1);
+  __cache_miss (ea, entry, (si_to_uint (si_clz (si_gbb (equal))) - 16) >> 2);
+  goto missreturn;
+}
+
+void *
+__cache_fetch (__ea void *ea)
+{
+  return __cache_fetch_dirty (ea, 0);
+}
+
+void
+__cache_touch (__ea void *ea __attribute__ ((unused)))
+{
+  /* NO-OP for now.  */
+}
+
+void __cache_flush (void) __attribute__ ((destructor));
+void
+__cache_flush (void)
+{
+  struct __cache_tag_array *entry = __cache_tag_array;
+  unsigned int i;
+  int j;
+
+  /* Cycle through each cache entry and evict all used ways.  */
+
+  for (i = 0; i < CACHE_LINES / WAYS; i++)
+    {
+      for (j = 0; j < WAYS; j++)
+	if (!CHECK_EMPTY (entry, j))
+	  __cache_evict_entry (entry, j);
+
+      entry++;
+    }
+}
diff --git a/gcc-4.9/libgcc/config/spu/divmodti4.c b/gcc-4.9/libgcc/config/spu/divmodti4.c
new file mode 100644
index 000000000..79192a987
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/divmodti4.c
@@ -0,0 +1,188 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ 
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+ 
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+ 
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <spu_intrinsics.h>
+
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+typedef int TItype __attribute__ ((mode (TI)));
+TItype __divti3 (TItype u, TItype v);
+TItype __modti3 (TItype u, TItype v);
+UTItype __udivti3 (UTItype u, UTItype v);
+UTItype __umodti3 (UTItype u, UTItype v);
+UTItype __udivmodti4 (UTItype u, UTItype v, UTItype *w);
+
+union qword_UTItype
+  {
+    qword q;
+    UTItype t;
+  };
+  
+inline static qword
+si_from_UTItype (UTItype t)
+{ 
+  union qword_UTItype u;
+  u.t = t;
+  return u.q;
+}
+
+inline static UTItype
+si_to_UTItype (qword q)
+{ 
+  union qword_UTItype u;
+  u.q = q;
+  return u.t;
+}
+
+inline static unsigned int
+count_leading_zeros (UTItype x)
+{
+  qword c = si_clz (*(qword *) & x);
+  qword cmp0 = si_cgti (c, 31);
+  qword cmp1 = si_and (cmp0, si_shlqbyi (cmp0, 4));
+  qword cmp2 = si_and (cmp1, si_shlqbyi (cmp0, 8));
+  qword s = si_a (c, si_and (cmp0, si_shlqbyi (c, 4)));
+  s = si_a (s, si_and (cmp1, si_shlqbyi (c, 8)));
+  s = si_a (s, si_and (cmp2, si_shlqbyi (c, 12)));
+  return si_to_uint (s);
+}
+
+/* Based on implementation of udivmodsi4, which is essentially
+ * an optimized version of libgcc/udivmodsi4.c
+        clz      %7,%2
+        clz      %4,%1
+        il       %5,1
+        fsmbi    %0,0
+        sf       %7,%4,%7
+        ori      %3,%1,0
+        shl      %5,%5,%7
+        shl      %4,%2,%7
+1:      or       %8,%0,%5
+        rotmi    %5,%5,-1
+        clgt     %6,%4,%3
+        sf       %7,%4,%3
+        rotmi    %4,%4,-1
+        selb     %0,%8,%0,%6
+        selb     %3,%7,%3,%6
+3:      brnz     %5,1b
+ */
+
+UTItype
+__udivmodti4 (UTItype num, UTItype den, UTItype * rp)
+{
+  qword shift =
+    si_from_uint (count_leading_zeros (den) - count_leading_zeros (num));
+  qword n0 = si_from_UTItype (num);
+  qword d0 = si_from_UTItype (den);
+  qword bit = si_andi (si_fsmbi (1), 1);
+  qword r0 = si_il (0);
+  qword m1 = si_fsmbi (0x000f);
+  qword mask, r1, n1;
+
+  d0 = si_shlqbybi (si_shlqbi (d0, shift), shift);
+  bit = si_shlqbybi (si_shlqbi (bit, shift), shift);
+
+  do
+    {
+      r1 = si_or (r0, bit);
+
+      // n1 = n0 - d0 in TImode
+      n1 = si_bg (d0, n0);
+      n1 = si_shlqbyi (n1, 4);
+      n1 = si_sf (m1, n1);
+      n1 = si_bgx (d0, n0, n1);
+      n1 = si_shlqbyi (n1, 4);
+      n1 = si_sf (m1, n1);
+      n1 = si_bgx (d0, n0, n1);
+      n1 = si_shlqbyi (n1, 4);
+      n1 = si_sf (m1, n1);
+      n1 = si_sfx (d0, n0, n1);
+
+      mask = si_fsm (si_cgti (n1, -1));
+      r0 = si_selb (r0, r1, mask);
+      n0 = si_selb (n0, n1, mask);
+      bit = si_rotqmbii (bit, -1);
+      d0 = si_rotqmbii (d0, -1);
+    }
+  while (si_to_uint (si_orx (bit)));
+  if (rp)
+    *rp = si_to_UTItype (n0);
+  return si_to_UTItype (r0);
+}
+
+UTItype
+__udivti3 (UTItype n, UTItype d)
+{
+  return __udivmodti4 (n, d, (UTItype *)0);
+}
+
+UTItype
+__umodti3 (UTItype n, UTItype d)
+{
+  UTItype w;
+  __udivmodti4 (n, d, &w);
+  return w;
+}
+
+TItype
+__divti3 (TItype n, TItype d)
+{
+  int c = 0;
+  TItype w;
+
+  if (n < 0)
+    {
+        c = ~c;
+        n = -n;
+    }
+  if (d < 0)
+    {
+        c = ~c;
+        d = -d;
+    }
+
+  w = __udivmodti4 (n, d, (UTItype *)0);
+  if (c)
+    w = -w;
+  return w;
+}
+
+TItype
+__modti3 (TItype n, TItype d)
+{
+  int c = 0;
+  TItype w;
+
+  if (n < 0)
+    {
+        c = ~c;
+        n = -n;
+    }
+  if (d < 0)
+    {
+        c = ~c;
+        d = -d;
+    }
+
+  __udivmodti4 (n, d, (UTItype *) &w);
+  if (c)
+    w = -w;
+  return w;
+}
diff --git a/gcc-4.9/libgcc/config/spu/divv2df3.c b/gcc-4.9/libgcc/config/spu/divv2df3.c
new file mode 100644
index 000000000..aca64d2a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/divv2df3.c
@@ -0,0 +1,195 @@
+/* Copyright (C) 2009-2014 Free Software Foundation, Inc.
+ 
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+ 
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+ 
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <spu_intrinsics.h>
+
+vector double __divv2df3 (vector double a_in, vector double b_in);
+
+/* __divv2df3 divides the vector dividend a by the vector divisor b and 
+   returns the resulting vector quotient.  Maximum error about 0.5 ulp 
+   over entire double range including denorms, compared to true result
+   in round-to-nearest rounding mode.  Handles Inf or NaN operands and 
+   results correctly.  */
+
+vector double
+__divv2df3 (vector double a_in, vector double b_in)
+{
+  /* Variables */
+  vec_int4    exp, exp_bias;
+  vec_uint4   no_underflow, overflow;
+  vec_float4  mant_bf, inv_bf;
+  vec_ullong2 exp_a, exp_b;
+  vec_ullong2 a_nan, a_zero, a_inf, a_denorm, a_denorm0;
+  vec_ullong2 b_nan, b_zero, b_inf, b_denorm, b_denorm0;
+  vec_ullong2 nan;
+  vec_uint4   a_exp, b_exp;
+  vec_ullong2 a_mant_0, b_mant_0;
+  vec_ullong2 a_exp_1s, b_exp_1s;
+  vec_ullong2 sign_exp_mask;
+
+  vec_double2 a, b;
+  vec_double2 mant_a, mant_b, inv_b, q0, q1, q2, mult;
+
+  /* Constants */
+  vec_uint4   exp_mask_u32 = spu_splats((unsigned int)0x7FF00000);
+  vec_uchar16 splat_hi = (vec_uchar16){0,1,2,3, 0,1,2,3,  8, 9,10,11, 8,9,10,11};
+  vec_uchar16 swap_32 = (vec_uchar16){4,5,6,7, 0,1,2,3, 12,13,14,15, 8,9,10,11};
+  vec_ullong2 exp_mask = spu_splats(0x7FF0000000000000ULL);
+  vec_ullong2 sign_mask = spu_splats(0x8000000000000000ULL);
+  vec_float4  onef = spu_splats(1.0f);
+  vec_double2 one = spu_splats(1.0);
+  vec_double2 exp_53 = (vec_double2)spu_splats(0x0350000000000000ULL);
+
+  sign_exp_mask = spu_or(sign_mask, exp_mask);
+
+  /* Extract the floating point components from each of the operands including
+   * exponent and mantissa.
+   */
+  a_exp = (vec_uint4)spu_and((vec_uint4)a_in, exp_mask_u32);
+  a_exp = spu_shuffle(a_exp, a_exp, splat_hi);
+  b_exp = (vec_uint4)spu_and((vec_uint4)b_in, exp_mask_u32);
+  b_exp = spu_shuffle(b_exp, b_exp, splat_hi);
+
+  a_mant_0 = (vec_ullong2)spu_cmpeq((vec_uint4)spu_andc((vec_ullong2)a_in, sign_exp_mask), 0);
+  a_mant_0 = spu_and(a_mant_0, spu_shuffle(a_mant_0, a_mant_0, swap_32));
+
+  b_mant_0 = (vec_ullong2)spu_cmpeq((vec_uint4)spu_andc((vec_ullong2)b_in, sign_exp_mask), 0);
+  b_mant_0 = spu_and(b_mant_0, spu_shuffle(b_mant_0, b_mant_0, swap_32));
+
+  a_exp_1s = (vec_ullong2)spu_cmpeq(a_exp, exp_mask_u32);
+  b_exp_1s = (vec_ullong2)spu_cmpeq(b_exp, exp_mask_u32);
+
+  /* Identify all possible special values that must be accommodated including:
+   * +-denorm, +-0, +-infinity, and NaNs.
+   */
+  a_denorm0= (vec_ullong2)spu_cmpeq(a_exp, 0);
+  a_nan    = spu_andc(a_exp_1s, a_mant_0);
+  a_zero   = spu_and (a_denorm0, a_mant_0);
+  a_inf    = spu_and (a_exp_1s, a_mant_0);
+  a_denorm = spu_andc(a_denorm0, a_zero);
+
+  b_denorm0= (vec_ullong2)spu_cmpeq(b_exp, 0);
+  b_nan    = spu_andc(b_exp_1s, b_mant_0);
+  b_zero   = spu_and (b_denorm0, b_mant_0);
+  b_inf    = spu_and (b_exp_1s, b_mant_0);
+  b_denorm = spu_andc(b_denorm0, b_zero);
+
+  /* Scale denorm inputs to into normalized numbers by conditionally scaling the 
+   * input parameters.
+   */
+  a = spu_sub(spu_or(a_in, exp_53), spu_sel(exp_53, a_in, sign_mask));
+  a = spu_sel(a_in, a, a_denorm);
+
+  b = spu_sub(spu_or(b_in, exp_53), spu_sel(exp_53, b_in, sign_mask));
+  b = spu_sel(b_in, b, b_denorm);
+
+  /* Extract the divisor and dividend exponent and force parameters into the signed 
+   * range [1.0,2.0) or [-1.0,2.0).
+   */
+  exp_a = spu_and((vec_ullong2)a, exp_mask);
+  exp_b = spu_and((vec_ullong2)b, exp_mask);
+
+  mant_a = spu_sel(a, one, (vec_ullong2)exp_mask);
+  mant_b = spu_sel(b, one, (vec_ullong2)exp_mask);
+  
+  /* Approximate the single reciprocal of b by using
+   * the single precision reciprocal estimate followed by one 
+   * single precision iteration of Newton-Raphson.
+   */
+  mant_bf = spu_roundtf(mant_b);
+  inv_bf = spu_re(mant_bf);
+  inv_bf = spu_madd(spu_nmsub(mant_bf, inv_bf, onef), inv_bf, inv_bf);
+
+  /* Perform 2 more Newton-Raphson iterations in double precision. The
+   * result (q1) is in the range (0.5, 2.0).
+   */
+  inv_b = spu_extend(inv_bf);
+  inv_b = spu_madd(spu_nmsub(mant_b, inv_b, one), inv_b, inv_b);
+  q0 = spu_mul(mant_a, inv_b);
+  q1 = spu_madd(spu_nmsub(mant_b, q0, mant_a), inv_b, q0);
+
+  /* Determine the exponent correction factor that must be applied 
+   * to q1 by taking into account the exponent of the normalized inputs
+   * and the scale factors that were applied to normalize them.
+   */
+  exp = spu_rlmaska(spu_sub((vec_int4)exp_a, (vec_int4)exp_b), -20);
+  exp = spu_add(exp, (vec_int4)spu_add(spu_and((vec_int4)a_denorm, -0x34), spu_and((vec_int4)b_denorm, 0x34)));
+  
+  /* Bias the quotient exponent depending on the sign of the exponent correction
+   * factor so that a single multiplier will ensure the entire double precision
+   * domain (including denorms) can be achieved.
+   *
+   *    exp 	       bias q1     adjust exp
+   *   =====	       ========    ==========
+   *   positive         2^+65         -65
+   *   negative         2^-64         +64
+   */
+  exp_bias = spu_xor(spu_rlmaska(exp, -31), 64);
+  exp = spu_sub(exp, exp_bias);
+
+  q1 = spu_sel(q1, (vec_double2)spu_add((vec_int4)q1, spu_sl(exp_bias, 20)), exp_mask);
+
+  /* Compute a multiplier (mult) to applied to the quotient (q1) to produce the 
+   * expected result. On overflow, clamp the multiplier to the maximum non-infinite
+   * number in case the rounding mode is not round-to-nearest.
+   */
+  exp = spu_add(exp, 0x3FF);
+  no_underflow = spu_cmpgt(exp, 0);
+  overflow = spu_cmpgt(exp, 0x7FE);
+  exp = spu_and(spu_sl(exp, 20), (vec_int4)no_underflow);
+  exp = spu_and(exp, (vec_int4)exp_mask);
+
+  mult = spu_sel((vec_double2)exp, (vec_double2)(spu_add((vec_uint4)exp_mask, -1)), (vec_ullong2)overflow);
+
+  /* Handle special value conditions. These include:
+   *
+   * 1) IF either operand is a NaN OR both operands are 0 or INFINITY THEN a NaN 
+   *    results.
+   * 2) ELSE IF the dividend is an INFINITY OR the divisor is 0 THEN a INFINITY results.
+   * 3) ELSE IF the dividend is 0 OR the divisor is INFINITY THEN a 0 results.
+   */
+  mult = spu_andc(mult, (vec_double2)spu_or(a_zero, b_inf));
+  mult = spu_sel(mult, (vec_double2)exp_mask, spu_or(a_inf, b_zero));
+
+  nan = spu_or(a_nan, b_nan);
+  nan = spu_or(nan, spu_and(a_zero, b_zero));
+  nan = spu_or(nan, spu_and(a_inf, b_inf));
+
+  mult = spu_or(mult, (vec_double2)nan);
+
+  /* Scale the final quotient */
+
+  q2 = spu_mul(q1, mult);
+
+  return (q2);
+}
+
+
+/* We use the same function for vector and scalar division.  Provide the
+   scalar entry point as an alias.  */
+double __divdf3 (double a, double b)
+  __attribute__ ((__alias__ ("__divv2df3")));
+
+/* Some toolchain builds used the __fast_divdf3 name for this helper function.
+   Provide this as another alternate entry point for compatibility.  */
+double __fast_divdf3 (double a, double b)
+  __attribute__ ((__alias__ ("__divv2df3")));
+
diff --git a/gcc-4.9/libgcc/config/spu/float_disf.c b/gcc-4.9/libgcc/config/spu/float_disf.c
new file mode 100644
index 000000000..971ea1c01
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/float_disf.c
@@ -0,0 +1,31 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+  
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+  
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Prototype.  */
+float __floatdisf (long long x);
+
+float __floatdisf (long long x)
+{
+  /* The SPU back-end now generates inline code for this conversion.
+     This file is solely used to provide the __floatdisf functions
+     for objects generated with prior versions of GCC.  */
+  return x;
+}
diff --git a/gcc-4.9/libgcc/config/spu/float_unsdidf.c b/gcc-4.9/libgcc/config/spu/float_unsdidf.c
new file mode 100644
index 000000000..ad760637b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/float_unsdidf.c
@@ -0,0 +1,54 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+  
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+  
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <spu_intrinsics.h>
+const unsigned char __didf_scale[16] __attribute__ ((__aligned__ (16))) = {
+  0x00, 0x00, 0x04, 0x3e,
+  0x00, 0x00, 0x04, 0x1e,
+  0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00
+};
+const unsigned char __didf_pat[16] __attribute__ ((__aligned__ (16))) = {
+  0x02, 0x03, 0x10, 0x11,
+  0x12, 0x13, 0x80, 0x80,
+  0x06, 0x07, 0x14, 0x15,
+  0x16, 0x17, 0x80, 0x80
+};
+
+/* double __float_unsdidf (unsigned long long int) 
+   Construct two exact doubles representing the high and low parts (in
+   parallel), then add them. */
+qword __float_unsdidf (qword DI);
+qword
+__float_unsdidf (qword DI)
+{
+  qword t0, t1, t2, t3, t4, t5, t6, t7, t8;
+  t0 = si_clz (DI);
+  t1 = si_shl (DI, t0);
+  t2 = si_ceqi (t0, 32);
+  t3 = si_sf (t0, *(const qword *) __didf_scale);
+  t4 = si_a (t1, t1);
+  t5 = si_andc (t3, t2);
+  t6 = si_shufb (t5, t4, *(const qword *) __didf_pat);
+  t7 = si_shlqbii (t6, 4);
+  t8 = si_shlqbyi (t7, 8);
+  return si_dfa (t7, t8);
+}
diff --git a/gcc-4.9/libgcc/config/spu/float_unsdisf.c b/gcc-4.9/libgcc/config/spu/float_unsdisf.c
new file mode 100644
index 000000000..ae43eecbc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/float_unsdisf.c
@@ -0,0 +1,31 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+  
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+  
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Prototype.  */
+float __floatundisf (unsigned long long x);
+
+float __floatundisf (unsigned long long x)
+{
+  /* The SPU back-end now generates inline code for this conversion.
+     This file is solely used to provide the __floatundisf function
+     for objects generated with prior versions of GCC.  */
+  return x;
+}
diff --git a/gcc-4.9/libgcc/config/spu/float_unssidf.c b/gcc-4.9/libgcc/config/spu/float_unssidf.c
new file mode 100644
index 000000000..54b8f5874
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/float_unssidf.c
@@ -0,0 +1,45 @@
+/* Copyright (C) 2006-2014 Free Software Foundation, Inc.
+  
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+  
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+  
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <spu_intrinsics.h>
+const unsigned char __sidf_pat[16] __attribute__ ((__aligned__ (16))) = {
+  0x02, 0x03, 0x10, 0x11,
+  0x12, 0x13, 0x80, 0x80,
+  0x06, 0x07, 0x14, 0x15,
+  0x16, 0x17, 0x80, 0x80
+};
+
+/* double __float_unssidf (unsigned int SI) */
+qword __float_unssidf (qword SI);
+qword
+__float_unssidf (qword SI)
+{
+  qword t0, t1, t2, t3, t4, t5, t6, t7;
+  t0 = si_clz (SI);
+  t1 = si_il (1054);
+  t2 = si_shl (SI, t0);
+  t3 = si_ceqi (t0, 32);
+  t4 = si_sf (t0, t1);
+  t5 = si_a (t2, t2);
+  t6 = si_andc (t4, t3);
+  t7 = si_shufb (t6, t5, *(const qword *) __sidf_pat);
+  return si_shlqbii (t7, 4);
+}
diff --git a/gcc-4.9/libgcc/config/spu/mfc_multi_tag_release.c b/gcc-4.9/libgcc/config/spu/mfc_multi_tag_release.c
new file mode 100644
index 000000000..ceddfd8c0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/mfc_multi_tag_release.c
@@ -0,0 +1,72 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <spu_mfcio.h>
+extern vector unsigned int __mfc_tag_table;
+
+/* Release a sequential group of tags from exclusive use. The sequential
+   group of tags is the range starting from <first_tag> through
+   <first_tag>+<number_of_tags>-1. Upon successful release, MFC_DMA_TAG_VALID
+   is returned and the tags become available for future reservation.
+
+   If the specified tags were not previously reserved, no action is
+   taken and MFC_DMA_TAG_INVALID is returned.  */
+
+unsigned int
+__mfc_multi_tag_release (unsigned int first_tag, unsigned int number_of_tags)
+{
+  vector unsigned int table_copy, tmp, tmp1;
+  vector unsigned int one = (vector unsigned int)
+        { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF };
+  vector unsigned int is_invalid;
+  unsigned int last_tag;
+  vector unsigned int has_been_reserved;
+
+  last_tag = first_tag + number_of_tags;
+
+  table_copy = spu_sl (one, number_of_tags);
+  table_copy = spu_rl (table_copy, -last_tag);
+  table_copy = spu_xor (table_copy, -1);
+
+  /* Make sure the tags are in range and valid.  */
+  tmp = spu_cmpgt (spu_promote(last_tag, 0), 32);
+  tmp1 = spu_cmpgt (spu_promote(number_of_tags, 0), 32);
+  is_invalid =  spu_cmpgt (spu_promote(first_tag, 0), 31);
+
+  /* All bits are set to 1 if invalid, 0 if valid.  */
+  is_invalid = spu_or (tmp, is_invalid);
+  is_invalid = spu_or (tmp1, is_invalid);
+
+  /* check whether these tags have been reserved */
+  tmp = spu_rlmask (one, (int)-number_of_tags);
+  tmp1 = spu_sl (__mfc_tag_table, first_tag);
+  has_been_reserved = spu_cmpgt(tmp1, tmp);
+
+  is_invalid = spu_or (has_been_reserved, is_invalid);
+
+  table_copy = spu_sel (__mfc_tag_table, table_copy, table_copy);
+  __mfc_tag_table = spu_sel (table_copy, __mfc_tag_table, is_invalid);
+
+  return spu_extract (is_invalid, 0);
+}
+
diff --git a/gcc-4.9/libgcc/config/spu/mfc_multi_tag_reserve.c b/gcc-4.9/libgcc/config/spu/mfc_multi_tag_reserve.c
new file mode 100644
index 000000000..1ced0afbb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/mfc_multi_tag_reserve.c
@@ -0,0 +1,84 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <spu_mfcio.h>
+extern vector unsigned int __mfc_tag_table;
+
+/* Reserve a sequential group of tags for exclusive use.  The number of
+   tags to be reserved is specified by the <number_of_tags> parameter.
+   This routine returns the first tag ID for a sequential list of
+   available tags and marks them as reserved. The reserved group
+   of tags is in the range starting from the returned tag through
+   the returned tag + <number_of_tags>-1.
+
+   If the number of tags requested exceeds the number of available
+   sequential tags, then MFC_DMA_TAG_INVALID is returned indicating
+   that the request could not be serviced.  */
+
+unsigned int
+__mfc_multi_tag_reserve (unsigned int number_of_tags)
+{
+  vector unsigned int table_copy;
+  vector unsigned int one = (vector unsigned int)
+        { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF };
+  vector unsigned int count_busy, is_valid;
+  vector unsigned int count_total;
+  vector unsigned int count_avail = (vector unsigned int) { 0, 0, 0, 0 };
+  vector unsigned int index = (vector unsigned int) { 0, 0, 0, 0 };
+
+  table_copy = __mfc_tag_table;
+
+
+  /* count_busy: number of consecutive busy tags
+     count_avail: number of consecutive free tags
+     table_copy: temporary copy of the tag table
+     count_total: sum of count_busy and count_avail
+     index: index of the current working tag  */
+  do
+    {
+      table_copy = spu_sl (table_copy, count_avail);
+
+      count_busy = spu_cntlz (table_copy);
+      table_copy = spu_sl (table_copy, count_busy);
+      count_avail = spu_cntlz (spu_xor(table_copy, -1));
+      count_total = spu_add (count_busy, count_avail);
+      index = spu_add (index, count_total);
+    }
+  while (spu_extract (count_avail, 0) < number_of_tags
+	 && spu_extract (table_copy, 0) != 0);
+
+  index = spu_sub (index, count_avail);
+
+  /* is_valid is set to 0xFFFFFFFF if table_copy == 0, 0 otherwise.  */
+  is_valid = spu_cmpeq (table_copy, 0);
+  index = spu_sel (index, is_valid, is_valid);
+
+  /* Now I need to actually mark the tags as used.  */
+  table_copy = spu_sl (one, number_of_tags);
+  table_copy = spu_rl (table_copy, -number_of_tags - spu_extract (index, 0));
+  table_copy = spu_sel (table_copy, __mfc_tag_table, table_copy);
+  __mfc_tag_table = spu_sel (table_copy, __mfc_tag_table, is_valid);
+
+  return spu_extract (index, 0);
+}
+
diff --git a/gcc-4.9/libgcc/config/spu/mfc_tag_release.c b/gcc-4.9/libgcc/config/spu/mfc_tag_release.c
new file mode 100644
index 000000000..b3de2da9c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/mfc_tag_release.c
@@ -0,0 +1,59 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <spu_mfcio.h>
+extern vector unsigned int __mfc_tag_table;
+
+/* Release the specified DMA tag from exclusive use.  Once released, the
+   tag is available for future reservation.  Upon successful release,
+   MFC_DMA_TAG_VALID is returned.  If the specified tag is not in the
+   range 0 to 31, or had not been reserved, no action is taken and
+   MFC_DMA_TAG_INVALID is returned.  */
+
+unsigned int
+__mfc_tag_release (unsigned int tag)
+{
+  vector unsigned int is_invalid;
+  vector unsigned int mask = (vector unsigned int)
+	{ 0x80000000, 0x80000000, 0x80000000, 0x80000000 };
+  vector signed int zero = (vector signed int) { 0, 0, 0, 0 };
+
+  vector signed int has_been_reserved;
+
+  /* Check if the tag is out of range.  */
+  is_invalid = spu_cmpgt (spu_promote (tag, 0), 31);
+
+  /* Check whether the tag has been reserved, set to all 1 if has not
+     been reserved, 0 otherwise.  */
+  has_been_reserved = (vector signed int) spu_rl (__mfc_tag_table, tag);
+  has_been_reserved = (vector signed int) spu_cmpgt (zero, has_been_reserved);
+
+  /* Set invalid.  */
+  is_invalid = spu_or ((vector unsigned int) has_been_reserved, is_invalid);
+
+  mask = spu_rlmask (mask, (int)(-tag));
+  __mfc_tag_table = spu_or (__mfc_tag_table, mask);
+
+  return spu_extract(is_invalid, 0);
+}
+
diff --git a/gcc-4.9/libgcc/config/spu/mfc_tag_reserve.c b/gcc-4.9/libgcc/config/spu/mfc_tag_reserve.c
new file mode 100644
index 000000000..49626d1c4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/mfc_tag_reserve.c
@@ -0,0 +1,51 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include <spu_mfcio.h>
+extern vector unsigned int __mfc_tag_table;
+
+/* Reserves a DMA tag for exclusive use.  This routine returns an available
+   tag id in the range 0 to 31 and marks the tag as reserved.  If no tags
+   are available, MFC_DMA_TAG_INVALID is returned indicating that all tags
+   are already reserved.  */
+
+unsigned int
+__mfc_tag_reserve (void)
+{
+  vector unsigned int mask = (vector unsigned int)
+	{ 0x80000000, 0x80000000, 0x80000000, 0x80000000 };
+  vector unsigned int count_zeros, is_valid;
+  vector signed int count_neg;
+
+  count_zeros = spu_cntlz (__mfc_tag_table);
+  count_neg = spu_sub (0, (vector signed int) count_zeros);
+
+  mask = spu_rlmask (mask, (vector signed int) count_neg);
+  __mfc_tag_table = spu_andc (__mfc_tag_table, mask);
+
+  is_valid = spu_cmpeq (count_zeros, 32);
+  count_zeros = spu_sel (count_zeros, is_valid, is_valid);
+
+  return spu_extract (count_zeros, 0);
+}
+
diff --git a/gcc-4.9/libgcc/config/spu/mfc_tag_table.c b/gcc-4.9/libgcc/config/spu/mfc_tag_table.c
new file mode 100644
index 000000000..92e00d9be
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/mfc_tag_table.c
@@ -0,0 +1,39 @@
+/* Copyright (C) 2007-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* The free tag table used by the MFC tag manager, with tag0
+   reserved for the overlay manager.  */
+__vector unsigned int
+__mfc_tag_table = (__vector unsigned int) { 0x7FFFFFFF, -1, -1, -1 };
+
+/* Arrange to release tag0 if overlays are not present.  */
+static void __mfc_tag_init (void) __attribute__ ((constructor));
+
+static void
+__mfc_tag_init (void)
+{
+  extern void _ovly_table __attribute__ ((weak));
+
+  if (&_ovly_table == 0)
+    __mfc_tag_table = (__vector unsigned int) { -1, -1, -1, -1 };
+}
diff --git a/gcc-4.9/libgcc/config/spu/multi3.c b/gcc-4.9/libgcc/config/spu/multi3.c
new file mode 100644
index 000000000..69097fa0e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/multi3.c
@@ -0,0 +1,119 @@
+/* Copyright (C) 2008-2014 Free Software Foundation, Inc.
+ 
+   This file is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3 of the License, or (at your option)
+   any later version.
+ 
+   This file is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+ 
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <spu_intrinsics.h>
+
+typedef int TItype __attribute__ ((mode (TI)));
+
+union qword_TItype
+  {
+    qword q;
+    TItype t;
+  };
+  
+inline static qword
+si_from_TItype (TItype t)
+{ 
+  union qword_TItype u;
+  u.t = t;
+  return u.q;
+}
+
+inline static TItype
+si_to_TItype (qword q)
+{ 
+  union qword_TItype u;
+  u.q = q;
+  return u.t;
+}
+
+/* A straight forward vectorization and unrolling of
+ *   short l[8], r[8];
+ *   TItype total = 0;
+ *   for (i = 0; i < 8; i++)
+ *     for (j = 0; j < 8; j++)
+ *       total += (TItype)((l[7-i] * r[7-j]) << (16 * (i + j)));
+ */
+TItype
+__multi3 (TItype l, TItype r)
+{
+  qword u = si_from_TItype (l);
+  qword v = si_from_TItype (r);
+  qword splat0 = si_shufb (v, v, si_ilh (0x0001));
+  qword splat1 = si_shufb (v, v, si_ilh (0x0203));
+  qword splat2 = si_shufb (v, v, si_ilh (0x0405));
+  qword splat3 = si_shufb (v, v, si_ilh (0x0607));
+  qword splat4 = si_shufb (v, v, si_ilh (0x0809));
+  qword splat5 = si_shufb (v, v, si_ilh (0x0a0b));
+  qword splat6 = si_shufb (v, v, si_ilh (0x0c0d));
+  qword splat7 = si_shufb (v, v, si_ilh (0x0e0f));
+
+  qword part0l = si_shlqbyi (si_mpyu   (u, splat0), 14);
+  qword part1h = si_shlqbyi (si_mpyhhu (u, splat1), 14);
+  qword part1l = si_shlqbyi (si_mpyu   (u, splat1), 12);
+  qword part2h = si_shlqbyi (si_mpyhhu (u, splat2), 12);
+  qword part2l = si_shlqbyi (si_mpyu   (u, splat2), 10);
+  qword part3h = si_shlqbyi (si_mpyhhu (u, splat3), 10);
+  qword part3l = si_shlqbyi (si_mpyu   (u, splat3), 8);
+  qword part4h = si_shlqbyi (si_mpyhhu (u, splat4), 8);
+  qword part4l = si_shlqbyi (si_mpyu   (u, splat4), 6);
+  qword part5h = si_shlqbyi (si_mpyhhu (u, splat5), 6);
+  qword part5l = si_shlqbyi (si_mpyu   (u, splat5), 4);
+  qword part6h = si_shlqbyi (si_mpyhhu (u, splat6), 4);
+  qword part6l = si_shlqbyi (si_mpyu   (u, splat6), 2);
+  qword part7h = si_shlqbyi (si_mpyhhu (u, splat7), 2);
+  qword part7l = si_mpyu (u, splat7);
+
+  qword carry, total0, total1, total2, total3, total4;
+  qword total5, total6, total7, total8, total9, total10;
+  qword total;
+
+  total0 = si_a (si_a (si_a (part0l, part1h), si_a (part1l, part2h)), part7l);
+  total1 = si_a (part2l, part3h);
+  total2 = si_a (part3l, part4h);
+  total3 = si_a (part4l, part5h);
+  total4 = si_a (part5l, part6h);
+  total5 = si_a (part6l, part7h);
+  total6 = si_a (total0, total1);
+  total7 = si_a (total2, total3);
+  total8 = si_a (total4, total5);
+  total9 = si_a (total6, total7);
+  total10 = si_a (total8, total9);
+
+  carry = si_cg (part2l, part3h);
+  carry = si_a (carry, si_cg (part3l, part4h));
+  carry = si_a (carry, si_cg (part4l, part5h));
+  carry = si_a (carry, si_cg (part5l, part6h));
+  carry = si_a (carry, si_cg (part6l, part7h));
+  carry = si_a (carry, si_cg (total0, total1));
+  carry = si_a (carry, si_cg (total2, total3));
+  carry = si_a (carry, si_cg (total4, total5));
+  carry = si_a (carry, si_cg (total6, total7));
+  carry = si_a (carry, si_cg (total8, total9));
+  carry = si_shlqbyi (carry, 4);
+
+  total = si_cg (total10, carry);
+  total = si_shlqbyi (total, 4);
+  total = si_cgx (total10, carry, total);
+  total = si_shlqbyi (total, 4);
+  total = si_addx (total10, carry, total);
+  return si_to_TItype (total);
+}
diff --git a/gcc-4.9/libgcc/config/spu/t-elf b/gcc-4.9/libgcc/config/spu/t-elf
new file mode 100644
index 000000000..29536e881
--- /dev/null
+++ b/gcc-4.9/libgcc/config/spu/t-elf
@@ -0,0 +1,59 @@
+# Don't let CTOR_LIST end up in sdata section.
+# FIXME: This is the default.
+CRTSTUFF_T_CFLAGS =
+
+# We exclude those because the libgcc2.c default versions do not support
+# the SPU single-precision format (round towards zero).  We provide our
+# own versions below and/or via direct expansion.
+LIB2FUNCS_EXCLUDE = _floatdisf _floatundisf _floattisf _floatunstisf
+
+LIB2ADD_ST = $(srcdir)/config/spu/float_unssidf.c \
+	     $(srcdir)/config/spu/float_unsdidf.c \
+	     $(srcdir)/config/spu/float_unsdisf.c \
+	     $(srcdir)/config/spu/float_disf.c \
+	     $(srcdir)/config/spu/mfc_tag_table.c \
+	     $(srcdir)/config/spu/mfc_tag_reserve.c \
+	     $(srcdir)/config/spu/mfc_tag_release.c \
+	     $(srcdir)/config/spu/mfc_multi_tag_reserve.c \
+	     $(srcdir)/config/spu/mfc_multi_tag_release.c \
+	     $(srcdir)/config/spu/multi3.c \
+	     $(srcdir)/config/spu/divmodti4.c \
+	     $(srcdir)/config/spu/divv2df3.c
+
+# Build TImode conversion routines to support Fortran 128-bit
+# integer data types.
+LIB2_SIDITI_CONV_FUNCS = yes
+
+HOST_LIBGCC2_CFLAGS += -mwarn-reloc -D__IN_LIBGCC2
+
+# Neither gcc or newlib seem to have a standard way to generate multiple
+# crt*.o files.  So we don't use the standard crt0.o name anymore.
+
+cachemgr.o: $(srcdir)/config/spu/cachemgr.c
+	$(gcc_compile) -c $<
+
+# Specialised rule to add a -D flag.
+cachemgr_nonatomic.o: $(srcdir)/config/spu/cachemgr.c
+	$(gcc_compile) -DNONATOMIC -c $<
+
+libgcc_%.a: %.o
+	$(AR_FOR_TARGET) -rcs $@ $<
+
+cache8k.o: $(srcdir)/config/spu/cache.S
+	$(gcc_compile) -D__CACHE_SIZE__=8 -c $<
+
+cache16k.o: $(srcdir)/config/spu/cache.S
+	$(gcc_compile) -D__CACHE_SIZE__=16 -c $<
+
+cache32k.o: $(srcdir)/config/spu/cache.S
+	$(gcc_compile) -D__CACHE_SIZE__=32 -c $<
+
+cache64k.o: $(srcdir)/config/spu/cache.S
+	$(gcc_compile) -D__CACHE_SIZE__=64 -c $<
+
+cache128k.o: $(srcdir)/config/spu/cache.S
+	$(gcc_compile) -D__CACHE_SIZE__=128 -c $<
+
+# We provide our own version of __divdf3 that performs better and has
+# better support for non-default rounding modes.
+DPBIT_FUNCS := $(filter-out _div_df, $(DPBIT_FUNCS))
diff --git a/gcc-4.9/libgcc/config/stormy16/ashlsi3.c b/gcc-4.9/libgcc/config/stormy16/ashlsi3.c
new file mode 100644
index 000000000..0ef42ad66
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/ashlsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_ASHLSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/ashrsi3.c b/gcc-4.9/libgcc/config/stormy16/ashrsi3.c
new file mode 100644
index 000000000..67bcbbbe0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/ashrsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_ASHRSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/clrsbhi2.c b/gcc-4.9/libgcc/config/stormy16/clrsbhi2.c
new file mode 100644
index 000000000..3ce41aca0
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/clrsbhi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_CLRSBHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/clzhi2.c b/gcc-4.9/libgcc/config/stormy16/clzhi2.c
new file mode 100644
index 000000000..350ef41da
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/clzhi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_CLZHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/cmpsi2.c b/gcc-4.9/libgcc/config/stormy16/cmpsi2.c
new file mode 100644
index 000000000..fe32fda95
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/cmpsi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_CMPSI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/ctzhi2.c b/gcc-4.9/libgcc/config/stormy16/ctzhi2.c
new file mode 100644
index 000000000..98ab76dcd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/ctzhi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_CTZHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/divsi3.c b/gcc-4.9/libgcc/config/stormy16/divsi3.c
new file mode 100644
index 000000000..0fa75342f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/divsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_DIVSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/ffshi2.c b/gcc-4.9/libgcc/config/stormy16/ffshi2.c
new file mode 100644
index 000000000..a36dec87e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/ffshi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_FFSHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/lib2funcs.c b/gcc-4.9/libgcc/config/stormy16/lib2funcs.c
new file mode 100644
index 000000000..7705aa167
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/lib2funcs.c
@@ -0,0 +1,374 @@
+/* This file contains 16-bit versions of some of the functions found in
+   libgcc2.c.  Really libgcc ought to be moved out of the gcc directory
+   and into its own top level directory, and then split up into multiple
+   files.  On this glorious day maybe this code can be integrated into
+   it too.  */
+
+/* Copyright (C) 2005-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it under
+   the terms of the GNU General Public License as published by the Free
+   Software Foundation; either version 3, or (at your option) any later
+   version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+   WARRANTY; without even the implied warranty of MERCHANTABILITY or
+   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+   for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+
+#ifdef HAVE_GAS_HIDDEN
+#define ATTRIBUTE_HIDDEN  __attribute__ ((__visibility__ ("hidden")))
+#else
+#define ATTRIBUTE_HIDDEN
+#endif
+
+#ifndef MIN_UNITS_PER_WORD
+#define MIN_UNITS_PER_WORD UNITS_PER_WORD
+#endif
+
+#ifndef LIBGCC2_UNITS_PER_WORD
+# if MIN_UNITS_PER_WORD > 4
+#  define LIBGCC2_UNITS_PER_WORD 8
+# elif (MIN_UNITS_PER_WORD > 2 \
+        || (MIN_UNITS_PER_WORD > 1 && LONG_LONG_TYPE_SIZE > 32))
+#  define LIBGCC2_UNITS_PER_WORD 4
+# else
+#  define LIBGCC2_UNITS_PER_WORD MIN_UNITS_PER_WORD
+# endif
+#endif
+
+#define word_type Wtype
+
+#include "libgcc2.h"
+#undef int
+
+/* These prototypes would normally live in libgcc2.h, but this can
+   only happen once the code below is integrated into libgcc2.c.  */
+
+extern USItype udivmodsi4 (USItype, USItype, word_type);
+extern SItype __divsi3 (SItype, SItype);
+extern SItype __modsi3 (SItype, SItype);
+extern SItype __udivsi3 (SItype, SItype);
+extern SItype __umodsi3 (SItype, SItype);
+extern SItype __ashlsi3 (SItype, SItype);
+extern SItype __ashrsi3 (SItype, SItype);
+extern USItype __lshrsi3 (USItype, USItype);
+extern int __popcounthi2 (UHWtype);
+extern int __parityhi2 (UHWtype);
+extern int __clzhi2 (UHWtype);
+extern int __ctzhi2 (UHWtype);
+
+
+#ifdef XSTORMY16_UDIVMODSI4
+USItype
+udivmodsi4 (USItype num, USItype den, word_type modwanted)
+{
+  USItype bit = 1;
+  USItype res = 0;
+
+  while (den < num && bit && !(den & (1L << 31)))
+    {
+      den <<= 1;
+      bit <<= 1;
+    }
+  while (bit)
+    {
+      if (num >= den)
+	{
+	  num -= den;
+	  res |= bit;
+	}
+      bit >>= 1;
+      den >>= 1;
+    }
+
+  if (modwanted)
+    return num;
+  return res;
+}
+#endif
+
+#ifdef XSTORMY16_DIVSI3
+SItype
+__divsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = !neg;
+    }
+
+  if (b < 0)
+    {
+      b = -b;
+      neg = !neg;
+    }
+
+  res = udivmodsi4 (a, b, 0);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+#endif
+
+#ifdef XSTORMY16_MODSI3
+SItype
+__modsi3 (SItype a, SItype b)
+{
+  word_type neg = 0;
+  SItype res;
+
+  if (a < 0)
+    {
+      a = -a;
+      neg = 1;
+    }
+
+  if (b < 0)
+    b = -b;
+
+  res = udivmodsi4 (a, b, 1);
+
+  if (neg)
+    res = -res;
+
+  return res;
+}
+#endif
+
+#ifdef XSTORMY16_UDIVSI3
+SItype
+__udivsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 0);
+}
+#endif
+
+#ifdef XSTORMY16_UMODSI3
+SItype
+__umodsi3 (SItype a, SItype b)
+{
+  return udivmodsi4 (a, b, 1);
+}
+#endif
+
+#ifdef XSTORMY16_ASHLSI3
+SItype
+__ashlsi3 (SItype a, SItype b)
+{
+  word_type i;
+  
+  if (b & 16)
+    a <<= 16;
+  if (b & 8)
+    a <<= 8;
+  for (i = (b & 0x7); i > 0; --i)
+    a <<= 1;
+  return a;
+}
+#endif
+
+#ifdef XSTORMY16_ASHRSI3
+SItype
+__ashrsi3 (SItype a, SItype b)
+{
+  word_type i;
+  
+  if (b & 16)
+    a >>= 16;
+  if (b & 8)
+    a >>= 8;
+  for (i = (b & 0x7); i > 0; --i)
+    a >>= 1;
+  return a;
+}
+#endif
+
+#ifdef XSTORMY16_LSHRSI3
+USItype
+__lshrsi3 (USItype a, USItype b)
+{
+  word_type i;
+  
+  if (b & 16)
+    a >>= 16;
+  if (b & 8)
+    a >>= 8;
+  for (i = (b & 0x7); i > 0; --i)
+    a >>= 1;
+  return a;
+}
+#endif
+
+#ifdef XSTORMY16_POPCOUNTHI2
+/* Returns the number of set bits in X.
+   FIXME:  The return type really should be "unsigned int"
+   but this is not how the builtin is prototyped.  */
+int
+__popcounthi2 (UHWtype x)
+{
+  int ret;
+
+  ret = __popcount_tab [x & 0xff];
+  ret += __popcount_tab [(x >> 8) & 0xff];
+
+  return ret;
+}
+#endif
+
+#ifdef XSTORMY16_PARITYHI2
+/* Returns the number of set bits in X, modulo 2.
+   FIXME:  The return type really should be "unsigned int"
+   but this is not how the builtin is prototyped.  */
+
+int
+__parityhi2 (UHWtype x)
+{
+  x ^= x >> 8;
+  x ^= x >> 4;
+  x &= 0xf;
+  return (0x6996 >> x) & 1;
+}
+#endif
+
+#ifdef XSTORMY16_CLZHI2
+/* Returns the number of zero-bits from the most significant bit to the
+   first nonzero bit in X.  Returns 16 for X == 0.  Implemented as a
+   simple for loop in order to save space by removing the need for
+   the __clz_tab array.
+   FIXME:  The return type really should be "unsigned int" but this is
+   not how the builtin is prototyped.  */
+#undef unsigned
+int
+__clzhi2 (UHWtype x)
+{
+  unsigned int i;
+  unsigned int c;
+  unsigned int value = x;
+
+  for (c = 0, i = 1 << 15; i; i >>= 1, c++)
+    if (i & value)
+      break;
+  return c;
+}
+#endif
+
+#ifdef XSTORMY16_CTZHI2
+/* Returns the number of trailing zero bits in X.
+   FIXME:  The return type really should be "signed int" since
+   ctz(0) returns -1, but this is not how the builtin is prototyped.  */
+
+int
+__ctzhi2 (UHWtype x)
+{
+  /* This is cunning.  It converts X into a number with only the one bit
+     set, the bit that was the least significant bit in X.  From this we
+     can use the count_leading_zeros to compute the number of trailing
+     bits.  */
+  x &= - x;
+
+  return 15 - __builtin_clz (x);
+}
+#endif
+
+#ifdef XSTORMY16_FFSHI2
+/* Returns one plus the index of the least significant 1-bit of X,
+   or if X is zero, returns zero.  FIXME:  The return type really
+   should be "unsigned int" but this is not how the builtin is
+   prototyped.  */
+
+int
+__ffshi2 (UHWtype u)
+{
+  UHWtype count;
+
+  if (u == 0)
+    return 0;
+
+  return 16 - __builtin_clz (u & - u);
+}
+#endif
+
+#ifdef XSTORMY16_CLRSBHI2
+/* Returns the number of leading redundant sign bits in X.
+   I.e. the number of bits following the most significant bit which are
+   identical to it.  There are no special cases for 0 or other values.  */
+
+int
+__clrsbhi2 (HWtype x)
+{
+  if (x < 0)
+    x = ~x;
+  if (x == 0)
+    return 15;
+  return __builtin_clz (x) - 1;
+}
+#endif
+
+#ifdef XSTORMY16_UCMPSI2
+/* Performs an unsigned comparison of two 32-bit values: A and B.
+   If A is less than B, then 0 is returned.  If A is greater than B,
+   then 2 is returned.  Otherwise A and B are equal and 1 is returned.  */
+
+word_type
+__ucmpsi2 (USItype a, USItype b)
+{
+  word_type hi_a = (a >> 16);
+  word_type hi_b = (b >> 16);
+
+  if (hi_a == hi_b)
+    {
+      word_type low_a = (a & 0xffff);
+      word_type low_b = (b & 0xffff);
+
+      return low_a < low_b ? 0 : (low_a > low_b ? 2 : 1);
+    }
+
+  return hi_a < hi_b ? 0 : 2;
+}
+#endif
+
+#ifdef XSTORMY16_CMPSI2
+/* Performs an signed comparison of two 32-bit values: A and B.
+   If A is less than B, then 0 is returned.  If A is greater than B,
+   then 2 is returned.  Otherwise A and B are equal and 1 is returned.  */
+
+word_type
+__cmpsi2 (SItype a, SItype b)
+{
+  word_type hi_a = (a >> 16);
+  word_type hi_b = (b >> 16);
+
+  if (hi_a == hi_b)
+    {
+      word_type low_a = (a & 0xffff);
+      word_type low_b = (b & 0xffff);
+
+      return low_a < low_b ? 0 : (low_a > low_b ? 2 : 1);
+    }
+
+  return hi_a < hi_b ? 0 : 2;
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/stormy16/lshrsi3.c b/gcc-4.9/libgcc/config/stormy16/lshrsi3.c
new file mode 100644
index 000000000..13903d3d2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/lshrsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_LSHRSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/modsi3.c b/gcc-4.9/libgcc/config/stormy16/modsi3.c
new file mode 100644
index 000000000..c63e89068
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/modsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_MODSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/parityhi2.c b/gcc-4.9/libgcc/config/stormy16/parityhi2.c
new file mode 100644
index 000000000..4be7fbf3e
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/parityhi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_PARITYHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/popcounthi2.c b/gcc-4.9/libgcc/config/stormy16/popcounthi2.c
new file mode 100644
index 000000000..30bf0950d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/popcounthi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_POPCOUNTHI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/t-stormy16 b/gcc-4.9/libgcc/config/stormy16/t-stormy16
new file mode 100644
index 000000000..d409c2b3d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/t-stormy16
@@ -0,0 +1,40 @@
+# -*- makefile -*-
+#
+# Copyright (C) 2001-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# SImode arithmetic and logical routines, HImode bit counting routines.
+LIB2ADD = \
+	$(srcdir)/config/stormy16/udivmodsi4.c \
+	$(srcdir)/config/stormy16/divsi3.c \
+	$(srcdir)/config/stormy16/modsi3.c \
+	$(srcdir)/config/stormy16/udivsi3.c \
+	$(srcdir)/config/stormy16/umodsi3.c \
+	$(srcdir)/config/stormy16/ashlsi3.c \
+	$(srcdir)/config/stormy16/ashrsi3.c \
+	$(srcdir)/config/stormy16/lshrsi3.c \
+	$(srcdir)/config/stormy16/popcounthi2.c \
+	$(srcdir)/config/stormy16/parityhi2.c \
+	$(srcdir)/config/stormy16/clzhi2.c \
+	$(srcdir)/config/stormy16/ctzhi2.c \
+	$(srcdir)/config/stormy16/ffshi2.c \
+	$(srcdir)/config/stormy16/clrsbhi2.c \
+	$(srcdir)/config/stormy16/cmpsi2.c \
+	$(srcdir)/config/stormy16/ucmpsi2.c
+
+HOST_LIBGCC2_CFLAGS += -O2
diff --git a/gcc-4.9/libgcc/config/stormy16/ucmpsi2.c b/gcc-4.9/libgcc/config/stormy16/ucmpsi2.c
new file mode 100644
index 000000000..ee327b1da
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/ucmpsi2.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_UCMPSI2
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/udivmodsi4.c b/gcc-4.9/libgcc/config/stormy16/udivmodsi4.c
new file mode 100644
index 000000000..5fdd0f918
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/udivmodsi4.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_UDIVMODSI4
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/udivsi3.c b/gcc-4.9/libgcc/config/stormy16/udivsi3.c
new file mode 100644
index 000000000..ad12bd86a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/udivsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_UDIVSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/stormy16/umodsi3.c b/gcc-4.9/libgcc/config/stormy16/umodsi3.c
new file mode 100644
index 000000000..eeec67f56
--- /dev/null
+++ b/gcc-4.9/libgcc/config/stormy16/umodsi3.c
@@ -0,0 +1,2 @@
+#define XSTORMY16_UMODSI3
+#include "lib2funcs.c"
diff --git a/gcc-4.9/libgcc/config/t-crtfm b/gcc-4.9/libgcc/config/t-crtfm
new file mode 100644
index 000000000..61e62696b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-crtfm
@@ -0,0 +1,2 @@
+crtfastmath.o: $(srcdir)/config/$(cpu_type)/crtfastmath.c
+	$(gcc_compile) -c $<
diff --git a/gcc-4.9/libgcc/config/t-crtstuff-pic b/gcc-4.9/libgcc/config/t-crtstuff-pic
new file mode 100644
index 000000000..4cda4c9bf
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-crtstuff-pic
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with pic.
+CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/t-darwin b/gcc-4.9/libgcc/config/t-darwin
new file mode 100644
index 000000000..a69169fa6
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-darwin
@@ -0,0 +1,18 @@
+crt3.o: $(srcdir)/config/darwin-crt3.c
+	$(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -c $<
+
+crttms.o: $(srcdir)/config/darwin-crt-tm.c
+	$(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -DSTART -c $<
+
+crttme.o: $(srcdir)/config/darwin-crt-tm.c
+	$(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -DEND -c $<
+
+# -pipe because there's an assembler bug, 4077127, which causes
+# it to not properly process the first # directive, causing temporary
+# file names to appear in stabs, causing the bootstrap to fail.  Using -pipe
+# works around this by not having any temporary file names.
+HOST_LIBGCC2_CFLAGS += -pipe
+
+# Use unwind-dw2-fde-darwin
+LIB2ADDEH = $(srcdir)/unwind-dw2.c $(srcdir)/config/unwind-dw2-fde-darwin.c \
+  $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/t-dfprules b/gcc-4.9/libgcc/config/t-dfprules
new file mode 100644
index 000000000..6bf6246d8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-dfprules
@@ -0,0 +1,10 @@
+# Use DFP_ENABLE to build decimal floating point support routines for
+# all decimal floating point types (32-bit, 64-bit and 128-bit). We
+# use `true' for clarity, but any value will do.
+#
+DFP_ENABLE = true
+
+# DFP_CFLAGS can be used to pass target-specific CFLAGS when compiling
+# dfp-bit.c.  This is useful for overriding the definition of macros.
+#
+# DFP_CFLAGS = -DFOO=bar
diff --git a/gcc-4.9/libgcc/config/t-eh-dw2-dip b/gcc-4.9/libgcc/config/t-eh-dw2-dip
new file mode 100644
index 000000000..88fa103c4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-eh-dw2-dip
@@ -0,0 +1,3 @@
+# Use unwind-dw2-fde-dip.
+LIB2ADDEH = $(srcdir)/unwind-dw2.c $(srcdir)/unwind-dw2-fde-dip.c \
+  $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/t-fdpbit b/gcc-4.9/libgcc/config/t-fdpbit
new file mode 100644
index 000000000..0e7119ade
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-fdpbit
@@ -0,0 +1,2 @@
+FPBIT = true
+DPBIT = true
diff --git a/gcc-4.9/libgcc/config/t-fixedpoint-gnu-prefix b/gcc-4.9/libgcc/config/t-fixedpoint-gnu-prefix
new file mode 100644
index 000000000..f9d663388
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-fixedpoint-gnu-prefix
@@ -0,0 +1 @@
+LIBGCC_VER_FIXEDPOINT_GNU_PREFIX = __gnu_
diff --git a/gcc-4.9/libgcc/config/t-fpbit b/gcc-4.9/libgcc/config/t-fpbit
new file mode 100644
index 000000000..e56e34d91
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-fpbit
@@ -0,0 +1,2 @@
+FPBIT = true
+FPBIT_CFLAGS = -DFLOAT_ONLY -DSMALL_MACHINE
diff --git a/gcc-4.9/libgcc/config/t-freebsd-thread b/gcc-4.9/libgcc/config/t-freebsd-thread
new file mode 100644
index 000000000..2948dc1a4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-freebsd-thread
@@ -0,0 +1,2 @@
+# This is currently needed to compile libgcc2 for threads support
+HOST_LIBGCC2_CFLAGS += -pthread
diff --git a/gcc-4.9/libgcc/config/t-gnu-prefix b/gcc-4.9/libgcc/config/t-gnu-prefix
new file mode 100644
index 000000000..8f3db4087
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-gnu-prefix
@@ -0,0 +1,2 @@
+LIBGCC_VER_GNU_PREFIX = __gnu_
+LIBGCC_VER_FIXEDPOINT_GNU_PREFIX = __gnu_
diff --git a/gcc-4.9/libgcc/config/t-hardfp b/gcc-4.9/libgcc/config/t-hardfp
new file mode 100644
index 000000000..fe02f8e3d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-hardfp
@@ -0,0 +1,81 @@
+# Copyright (C) 2014 Free Software Foundation, Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# For historical reasons, some targets provide a full set of FP routines
+# even if there is native hardware support for some of them.  This file
+# is used to define functions that can be implemented directly in hardware.
+# For example, an __adddf3 defined by this file will use an FPU addition.
+#
+# The following variables should be set up before including this file:
+#
+# hardfp_float_modes: a list of hardware floating-point modes.
+#                     e.g. sf df
+# hardfp_int_modes: a list of integer modes for which to define conversions;
+#		    usually this is "si", since libgcc2.c provides routines
+#		    for wider modes
+# hardfp_extensions: a list of extensions between hardware floating-point modes,
+#                    e.g. sfdf
+# hardfp_truncations: a list of truncations between hardware floating-point
+#                     modes, e.g. dfsf
+
+# Functions parameterized by a floating-point mode M.
+hardfp_func_bases := addM3 subM3 negM2 mulM3 divM3
+hardfp_func_bases += eqM2 neM2 geM2 gtM2 leM2 ltM2 unordM2
+
+# Functions parameterized by both a floating-point mode M and an integer mode N.
+hardfp_int_func_bases := fixMN floatNM floatunNM
+hardfp_func_bases += $(foreach n, $(hardfp_int_modes), \
+			       $(subst N,$(n),$(hardfp_int_func_bases)))
+
+# Get the full list of functions.
+hardfp_func_list := $(foreach m, $(hardfp_float_modes), \
+	      	 	      $(subst M,$(m),$(hardfp_func_bases)))
+hardfp_func_list += $(foreach pair, $(hardfp_extensions), \
+		    	      $(subst M,$(pair),extendM2))
+hardfp_func_list += $(foreach pair, $(hardfp_truncations), \
+		    	      $(subst M,$(pair),truncM2))
+
+# Regexp for matching a floating-point mode.
+hardfp_mode_regexp := $(shell echo $(hardfp_float_modes) | sed 's/ /\\|/g')
+
+# Regexp for matching the end of a function name, after the last
+# floating-point mode.
+hardfp_suffix_regexp := $(shell echo $(hardfp_int_modes) 2 3 | sed 's/ /\\|/g')
+
+# Add -D options to define:
+#   FUNC: the function name (e.g. __addsf3)
+#   OP:   the function name without the leading __ and with the last
+#            floating-point mode removed (e.g. add3)
+#   TYPE: the last floating-point mode (e.g. sf)
+hardfp_defines_for = \
+  $(shell echo $1 | \
+    sed 's/\(.*\)\($(hardfp_mode_regexp)\)\($(hardfp_suffix_regexp)\|\)$$/-DFUNC=__& -DOP_\1\3 -DTYPE=\2/')
+
+hardfp-o = $(patsubst %,%$(objext),$(hardfp_func_list))
+$(hardfp-o): %$(objext): $(srcdir)/config/hardfp.c
+	@echo "Mode = $(hardfp_mode_regexp)"
+	@echo "Suffix = $(hardfp_suffix_regexp)"
+	$(gcc_compile) $(call hardfp_defines_for, $*) -c $< $(vis_hide) -Wno-missing-prototypes
+libgcc-objects += $(hardfp-o)
+
+ifeq ($(enable_shared),yes)
+hardfp-s-o = $(patsubst %,%_s$(objext),$(hardfp_func_list))
+$(hardfp-s-o): %_s$(objext): $(srcdir)/config/hardfp.c
+	$(gcc_s_compile) $(call hardfp_defines_for, $*) -c $< -Wno-missing-prototypes
+libgcc-s-objects += $(hardfp-s-o)
+endif
diff --git a/gcc-4.9/libgcc/config/t-hardfp-sfdf b/gcc-4.9/libgcc/config/t-hardfp-sfdf
new file mode 100644
index 000000000..5d39b7892
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-hardfp-sfdf
@@ -0,0 +1,23 @@
+# Copyright (C) 2014 Free Software Foundation, Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+hardfp_float_modes := sf df
+# di and ti are provided by libgcc2.c where needed.
+hardfp_int_modes := si
+hardfp_extensions := sfdf
+hardfp_truncations := dfsf
diff --git a/gcc-4.9/libgcc/config/t-libgcc-pic b/gcc-4.9/libgcc/config/t-libgcc-pic
new file mode 100644
index 000000000..0eea16ebc
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-libgcc-pic
@@ -0,0 +1,2 @@
+# Compile libgcc2.a with pic.
+HOST_LIBGCC2_CFLAGS += $(PICFLAG)
diff --git a/gcc-4.9/libgcc/config/t-libunwind b/gcc-4.9/libgcc/config/t-libunwind
new file mode 100644
index 000000000..5244928da
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-libunwind
@@ -0,0 +1,12 @@
+# Use the system libunwind library.
+
+HOST_LIBGCC2_CFLAGS += -DUSE_GAS_SYMVER
+
+LIB2ADDEH = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c \
+  $(srcdir)/unwind-compat.c $(srcdir)/unwind-dw2-fde-compat.c
+LIB2ADDEHSTATIC = $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
+
+# Override the default value from t-slibgcc-elf-ver and mention -lunwind
+# so that the resulting libgcc_s.so has the necessary DT_NEEDED entry for
+# libunwind.
+SHLIB_LC = -lunwind -lc
diff --git a/gcc-4.9/libgcc/config/t-libunwind-elf b/gcc-4.9/libgcc/config/t-libunwind-elf
new file mode 100644
index 000000000..beacf0438
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-libunwind-elf
@@ -0,0 +1,51 @@
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build libunwind for ELF with the GNU linker.
+
+SHLIB_SOLINK = @shlib_base_name@.so
+SHLIB_OBJS = @shlib_objs@
+SHLIB_DIR = @multilib_dir@
+SHLIB_SLIBDIR_QUAL = @shlib_slibdir_qual@
+
+# Use unwind-dw2-fde-dip
+LIBUNWIND = $(srcdir)/unwind-dw2.c $(srcdir)/unwind-dw2-fde-dip.c
+
+SHLIBUNWIND_SOVERSION = 7
+SHLIBUNWIND_SONAME = @shlib_base_name@.so.$(SHLIBUNWIND_SOVERSION)
+
+SHLIBUNWIND_LINK = $(CC) $(LIBGCC2_CFLAGS) -shared \
+	-nodefaultlibs -Wl,-h,$(SHLIBUNWIND_SONAME) \
+	-Wl,-z,text -Wl,-z,defs -o $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME).tmp \
+	@multilib_flags@ $(SHLIB_OBJS) -lc && \
+	rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \
+	if [ -f $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME) ]; then \
+	  mv -f $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME) \
+		$(SHLIB_DIR)/$(SHLIBUNWIND_SONAME).backup; \
+	else true; fi && \
+	mv $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME).tmp \
+	   $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME) && \
+	$(LN_S) $(SHLIBUNWIND_SONAME) $(SHLIB_DIR)/$(SHLIB_SOLINK)
+
+SHLIBUNWIND_INSTALL = \
+	$(SHELL) $(srcdir)/mkinstalldirs $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL); \
+	$(INSTALL_DATA) $(SHLIB_DIR)/$(SHLIBUNWIND_SONAME) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIBUNWIND_SONAME); \
+	rm -f $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK); \
+	$(LN_S) $(SHLIBUNWIND_SONAME) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK)
diff --git a/gcc-4.9/libgcc/config/t-linux b/gcc-4.9/libgcc/config/t-linux
new file mode 100644
index 000000000..d1bdac4f3
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-linux
@@ -0,0 +1,3 @@
+# Override t-slibgcc-elf-ver to export some libgcc symbols with
+# the symbol versions that glibc used.
+SHLIB_MAPFILES += $(srcdir)/config/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/t-openbsd-thread b/gcc-4.9/libgcc/config/t-openbsd-thread
new file mode 100644
index 000000000..50b61e586
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-openbsd-thread
@@ -0,0 +1,3 @@
+# This is currently needed to compile libgcc2 for threads support
+HOST_LIBGCC2_CFLAGS += -pthread
+
diff --git a/gcc-4.9/libgcc/config/t-rtems b/gcc-4.9/libgcc/config/t-rtems
new file mode 100644
index 000000000..85f1da90d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-rtems
@@ -0,0 +1,4 @@
+# If we are building next to newlib, this will let us find the RTEMS
+# limits.h when building libgcc2.  Otherwise, newlib must be installed
+# first.
+LIBGCC2_INCLUDES = -I$(srcdir)/../newlib/libc/sys/rtems/include
diff --git a/gcc-4.9/libgcc/config/t-slibgcc b/gcc-4.9/libgcc/config/t-slibgcc
new file mode 100644
index 000000000..1696fe865
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc
@@ -0,0 +1,53 @@
+# Copyright (C) 2001-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build a shared libgcc library.
+
+SHLIB_EXT = .so
+SHLIB_SOLINK = @shlib_base_name@.so
+SHLIB_SOVERSION = 1
+SHLIB_SONAME = @shlib_base_name@.so.$(SHLIB_SOVERSION)
+SHLIB_MAP = @shlib_map_file@
+SHLIB_OBJS = @shlib_objs@
+SHLIB_DIR = @multilib_dir@
+SHLIB_SLIBDIR_QUAL = @shlib_slibdir_qual@
+SHLIB_LC = -lc
+SHLIB_MAKE_SOLINK = $(LN_S) $(SHLIB_SONAME) $(SHLIB_DIR)/$(SHLIB_SOLINK)
+SHLIB_INSTALL_SOLINK = $(LN_S) $(SHLIB_SONAME) \
+	$(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK)
+
+SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
+	$(SHLIB_LDFLAGS) \
+	-o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ \
+	$(SHLIB_OBJS) $(SHLIB_LC) && \
+	rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \
+	if [ -f $(SHLIB_DIR)/$(SHLIB_SONAME) ]; then \
+	  mv -f $(SHLIB_DIR)/$(SHLIB_SONAME) \
+		$(SHLIB_DIR)/$(SHLIB_SONAME).backup; \
+	else true; fi && \
+	mv $(SHLIB_DIR)/$(SHLIB_SONAME).tmp $(SHLIB_DIR)/$(SHLIB_SONAME) && \
+	$(SHLIB_MAKE_SOLINK)
+
+INSTALL_SHLIB = $(INSTALL_DATA)
+
+SHLIB_INSTALL = \
+	$(mkinstalldirs) $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL); \
+	$(INSTALL_SHLIB) $(SHLIB_DIR)/$(SHLIB_SONAME) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SONAME); \
+	rm -f $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK); \
+	$(SHLIB_INSTALL_SOLINK)
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-darwin b/gcc-4.9/libgcc/config/t-slibgcc-darwin
new file mode 100644
index 000000000..9970d0034
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-darwin
@@ -0,0 +1,134 @@
+# Build a shared libgcc library with the darwin linker.
+SHLIB_SOVERSION = 1
+SHLIB_VERSTRING = -compatibility_version $(SHLIB_SOVERSION) -current_version $(SHLIB_SOVERSION).0
+SHLIB_EXT = .dylib
+SHLIB_INSTALL_NAME = @shlib_base_name@.$(SHLIB_SOVERSION)$(SHLIB_EXT)
+SHLIB_SONAME = @shlib_base_name@$(SHLIB_EXT)
+SHLIB_SOLINK = @shlib_base_name@.so
+SHLIB_MAP = @shlib_map_file@
+SHLIB_OBJS = @shlib_objs@
+SHLIB_DIR = @multilib_dir@
+SHLIB_LC = -lc
+
+# Darwin only searches in /usr/lib for shared libraries, not in subdirectories,
+# so the libgcc variants have different names not different locations.
+# Note that this version is used for the loader, not the linker; the linker
+# uses the stub versions named by the versioned members of $(INSTALL_FILES).
+
+SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) -dynamiclib -nodefaultlibs \
+	-install_name @shlib_slibdir@/$(SHLIB_INSTALL_NAME) \
+	-single_module -o $(SHLIB_DIR)/$(SHLIB_SONAME) \
+	-Wl,-exported_symbols_list,$(SHLIB_MAP) \
+	$(SHLIB_VERSTRING) \
+	@multilib_flags@ $(SHLIB_OBJS) $(SHLIB_LC)
+
+SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk
+SHLIB_MKMAP_OPTS = -v leading_underscore=1
+SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/libgcc-libsystem.ver
+SHLIB_VERPFX = $(srcdir)/config/$(cpu_type)/libgcc-darwin
+
+# we're only going to build the stubs if the target slib is /usr/lib
+# there is no other case in which they're useful in a live system.
+ifeq (/usr/lib,$(shlib_slibdir))
+LGCC_STUBS = libgcc_s.10.4.dylib libgcc_s.10.5.dylib
+else
+LGCC_STUBS =
+endif
+
+LGCC_FILES = libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT)
+LGCC_FILES += $(LGCC_STUBS)
+LEXT_STUBS = libgcc_ext.10.4$(SHLIB_EXT) libgcc_ext.10.5$(SHLIB_EXT)
+LGCC_FILES += $(LEXT_STUBS)
+INSTALL_FILES=$(LGCC_FILES)
+
+# we do our own thing
+SHLIB_INSTALL =
+
+# For the toplevel multilib, build a fat archive including all the multilibs.
+ifeq ($(MULTIBUILDTOP),)
+
+ifeq ($(enable_shared),yes)
+all: $(INSTALL_FILES)
+install-leaf: install-darwin-libgcc-stubs
+endif
+
+# In order to support -mmacosx-version-min, you need to have multiple
+# different libgcc_s libraries that actually get linked against, one for
+# each system version supported.  They are 'stub' libraries that
+# contain no code, just a list of exported symbols.
+# The actual use of the libraries is controlled by REAL_LIBGCC_SPEC.
+#
+# This assumes each multilib corresponds to a different architecture.
+libgcc_s.%.dylib : all-multi $(SHLIB_VERPFX).%.ver libgcc_s$(SHLIB_EXT)
+	MLIBS=`$(CC) --print-multi-lib | sed -e 's/;.*$$//'` ; \
+	for mlib in $$MLIBS ; do \
+	  $(STRIP) -o $(@)_T$${mlib} \
+	    -s $(SHLIB_VERPFX).$(*).ver -c -u \
+	    ../$${mlib}/libgcc/$${mlib}/libgcc_s$(SHLIB_EXT)  || exit 1 ; \
+	done
+	$(LIPO) -output $@ -create $(@)_T*
+	rm $(@)_T*
+
+libgcc_ext.%.dylib : all-multi $(SHLIB_VERPFX).%.ver libgcc_s$(SHLIB_EXT) 
+	MLIBS=`$(CC) --print-multi-lib | sed -e 's/;.*$$//'` ; \
+	for mlib in $$MLIBS ; do \
+	  $(STRIP) -o $(@)_T$${mlib} \
+	    -R $(SHLIB_VERPFX).$(*).ver -c -urx \
+	    ../$${mlib}/libgcc/$${mlib}/libgcc_s$(SHLIB_EXT) || exit 1 ; \
+	done
+	$(LIPO) -output $@ -create $(@)_T*
+	rm $(@)_T*
+
+libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT): all-multi libgcc_s$(SHLIB_EXT)
+	MLIBS=`$(CC) --print-multi-lib | sed -e 's/;.*$$//'` ; \
+	for mlib in $$MLIBS ; do \
+	  cp ../$${mlib}/libgcc/$${mlib}/libgcc_s$(SHLIB_EXT)  \
+	    ./libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT)_T_$${mlib} || exit 1 ; \
+	done
+	$(LIPO) -output libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT) \
+	  -create libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT)_T*
+	rm libgcc_s.$(SHLIB_SOVERSION)$(SHLIB_EXT)_T*
+
+install-darwin-libgcc-stubs :
+	$(mkinstalldirs) $(DESTDIR)$(slibdir)
+	for d in $(INSTALL_FILES) ; do \
+	  $(INSTALL_DATA) $$d $(DESTDIR)$(slibdir)/$$d || exit 1 ; \
+	done
+	if [ -f $(DESTDIR)$(slibdir)/libgcc_s_ppc64.1.dylib ]; then \
+	  rm -f $(DESTDIR)$(slibdir)/libgcc_s_ppc64.1.dylib; \
+	else true; fi
+	$(LN_S) libgcc_s.1.dylib \
+		$(DESTDIR)$(slibdir)/libgcc_s_ppc64.1.dylib
+	if [ -f $(DESTDIR)$(slibdir)/libgcc_s_x86_64.1.dylib ]; then \
+	  rm -f $(DESTDIR)$(slibdir)/libgcc_s_x86_64.1.dylib; \
+	else true; fi
+	$(LN_S) libgcc_s.1.dylib \
+		$(DESTDIR)$(slibdir)/libgcc_s_x86_64.1.dylib
+
+else
+
+# Do not install shared libraries for any other multilibs.  Unless
+# we're putting them in the gcc directory during a build, for
+# compatibility with the pre-top-level layout.  In that case we
+# need symlinks.
+
+ifeq ($(enable_shared),yes)
+all: install-darwin-libgcc-links
+endif
+
+install-darwin-libgcc-links:
+	$(mkinstalldirs) $(gcc_objdir)$(MULTISUBDIR)
+	for file in $(INSTALL_FILES); do			\
+	  rm -f $(gcc_objdir)$(MULTISUBDIR)/$$file;		\
+	  $(LN_S) ../$$file $(gcc_objdir)$(MULTISUBDIR)/;	\
+	done
+
+	rm -f $(gcc_objdir)$(MULTISUBDIR)/libgcc_s_x86_64.1.dylib
+	$(LN_S) libgcc_s.1.dylib \
+		$(gcc_objdir)$(MULTISUBDIR)/libgcc_s_x86_64.1.dylib
+
+	rm -f $(gcc_objdir)$(MULTISUBDIR)/libgcc_s_ppc64.1.dylib
+	$(LN_S) libgcc_s.1.dylib \
+		$(gcc_objdir)$(MULTISUBDIR)/libgcc_s_ppc64.1.dylib
+
+endif
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-elf-ver b/gcc-4.9/libgcc/config/t-slibgcc-elf-ver
new file mode 100644
index 000000000..4a00edc96
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-elf-ver
@@ -0,0 +1,4 @@
+# Build a shared libgcc library for ELF with symbol versioning.
+
+SHLIB_MKMAP = $(srcdir)/mkmap-symver.awk
+SHLIB_MAPFILES = libgcc-std.ver
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-gld b/gcc-4.9/libgcc/config/t-slibgcc-gld
new file mode 100644
index 000000000..7e77e0a0b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-gld
@@ -0,0 +1,5 @@
+# Build a shared libgcc library for ELF with symbol versioning
+# with the GNU linker.
+
+SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME) \
+	-Wl,--version-script=$(SHLIB_MAP)
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-gld-nover b/gcc-4.9/libgcc/config/t-slibgcc-gld-nover
new file mode 100644
index 000000000..e9b78ea94
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-gld-nover
@@ -0,0 +1,3 @@
+# Build a shared libgcc library for ELF with the GNU linker.
+
+SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME)
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-hpux b/gcc-4.9/libgcc/config/t-slibgcc-hpux
new file mode 100644
index 000000000..b71e3c35c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-hpux
@@ -0,0 +1,8 @@
+# Build a shared libgcc library with the HP-UX linker.
+
+SHLIB_LDFLAGS = -Wl,+h,$(SHLIB_SONAME)
+
+INSTALL_SHLIB = $(INSTALL_DATA) -m 555
+
+SHLIB_MKMAP = $(srcdir)/mkmap-flat.awk
+SHLIB_MAPFILES = libgcc-std.ver
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-libgcc b/gcc-4.9/libgcc/config/t-slibgcc-libgcc
new file mode 100644
index 000000000..e747ec65f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-libgcc
@@ -0,0 +1,32 @@
+# Copyright (C) 2009-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Instead of creating $(SHLIB_SOLINK) symlink create a GNU ld
+# linker script which sources in both $(SHLIB_SONAME) and libgcc.a.
+# This is needed on targets where libgcc.a contains routines that aren't in
+# $(SHLIB_SONAME) and are needed for shared libraries.
+
+SHLIB_MAKE_SOLINK = \
+	(echo "/* GNU ld script"; \
+	 echo "   Use the shared library, but some functions are only in"; \
+	 echo "   the static library.  */"; \
+	 echo "GROUP ( $(SHLIB_SONAME) -lgcc )" \
+	) > $(SHLIB_DIR)/$(SHLIB_SOLINK)
+SHLIB_INSTALL_SOLINK = \
+	$(INSTALL_DATA) $(SHLIB_DIR)/$(SHLIB_SOLINK) \
+	  $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK)
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-nolc-override b/gcc-4.9/libgcc/config/t-slibgcc-nolc-override
new file mode 100644
index 000000000..959d2cc2a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-nolc-override
@@ -0,0 +1 @@
+SHLIB_LC =
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-sld b/gcc-4.9/libgcc/config/t-slibgcc-sld
new file mode 100644
index 000000000..ec6e5db0a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-sld
@@ -0,0 +1,28 @@
+# Build a shared libgcc library for ELF with symbol versioning
+# with the Solaris linker.
+
+SHLIB_LDFLAGS = -Wl,-h,$(SHLIB_SONAME) -Wl,-z,text -Wl,-z,defs \
+	-Wl,-M,$(SHLIB_MAP)
+
+# Linker mapfile to enforce direct binding to libgcc_s unwinder
+# (PR target/59788).
+libgcc-unwind.map: libgcc-std.ver
+	@(echo "{";				\
+	for f in `grep _Unwind_ $< | sort`; do	\
+	  echo "	$$f = EXTERN DIRECT;";	\
+	done;					\
+	echo "};" ) > $@
+
+# Copy libgcc-unwind.map to the place where gcc will look for it at build-time.
+install-libgcc-unwind-map-forbuild: libgcc-unwind.map
+	dest=$(gcc_objdir)/tmp$$$$-$<; \
+	cp $< $$dest; \
+	chmod a+r $$dest; \
+	sh $(srcdir)/../move-if-change $$dest $(gcc_objdir)/$<
+
+all: install-libgcc-unwind-map-forbuild
+
+install-libgcc-unwind-map: libgcc-unwind.map
+	$(INSTALL_DATA) $< $(DESTDIR)$(slibdir)
+
+install: install-libgcc-unwind-map
diff --git a/gcc-4.9/libgcc/config/t-slibgcc-vms b/gcc-4.9/libgcc/config/t-slibgcc-vms
new file mode 100644
index 000000000..d01c34341
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-slibgcc-vms
@@ -0,0 +1,28 @@
+shlib_version:=$(shell $(CC) --version 2>&1 | \
+	sed -n 's/^.*(GCC).* \([0-9]*\.[0-9.]*\).*$/\1/p' | \
+	sed -e 's/\./,/' -e 's/\.//g')
+SHLIB_EXT = .exe
+SHLIB_OBJS = @shlib_objs@
+SHLIB_NAME = @shlib_base_name@.exe
+SHLIB_MULTILIB =
+SHLIB_INSTALL = $(INSTALL_DATA) $(SHLIB_NAME) $(DESTDIR)$(libsubdir)/$(SHLIB_NAME)
+SHLIB_SYMVEC = \
+  grep -F -e "\$$BSS\$$" -e "\$$DATA\$$" -e " sdata " -e " data.rel " -e " data.rel.ro " -e " sbss " \
+        -e "\$$LINK\$$" -e "\$$READONLY\$$" | \
+  sed -e "s/.*\$$LINK\$$   \(.*\)/SYMBOL_VECTOR=(\1=PROCEDURE)/" \
+      -e "s/.*\$$DATA\$$   \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.* sbss     \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.* sdata    \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.* data.rel \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.* data.rel.ro \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.*\$$BSS\$$    \(.*\)/SYMBOL_VECTOR=(\1=DATA)/" \
+      -e "s/.*\$$READONLY\$$ \(.*\)/SYMBOL_VECTOR=(\1=DATA)/"
+SHLIB_LINK = \
+  echo "case_sensitive=yes" > SYMVEC_$$$$.opt; \
+  objdump --syms $(SHLIB_OBJS) | \
+  $(SHLIB_SYMVEC) >> SYMVEC_$$$$.opt ; \
+  echo "case_sensitive=NO" >> SYMVEC_$$$$.opt; \
+  $(CC) $(LIBGCC2_CFLAGS) -nodefaultlibs \
+  -shared --for-linker=/noinform -o $(SHLIB_NAME) $(SHLIB_OBJS) \
+  --for-linker=SYMVEC_$$$$.opt \
+  --for-linker=gsmatch=equal,$(shlib_version)
diff --git a/gcc-4.9/libgcc/config/t-softfp b/gcc-4.9/libgcc/config/t-softfp
new file mode 100644
index 000000000..456fdce0b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-softfp
@@ -0,0 +1,111 @@
+# Copyright (C) 2006-2014 Free Software Foundation, Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Targets using soft-fp should define the following variables:
+#
+# softfp_float_modes: a list of soft-float floating-point modes,
+#                     e.g. sf df
+# softfp_int_modes: a list of integer modes for which to define conversions,
+#                   e.g. si di
+# softfp_extensions: a list of extensions between floating-point modes,
+#                    e.g. sfdf
+# softfp_truncations: a list of truncations between floating-point modes,
+#                     e.g. dfsf
+#
+# Extensions and truncations should include those where only one mode
+# is a soft-float mode; for example, sftf where sf is hard-float and
+# tf is soft-float.
+#
+# If the libgcc2.c functions should not be replaced, also define:
+#
+# softfp_exclude_libgcc2 := y
+#
+# Avoiding replacing the libgcc2.c functions is a temporary measure
+# for targets with both hard-float and soft-float multilibs, since
+# these variables apply for all multilibs.  With toplevel libgcc,
+# soft-fp can be used conditionally on the multilib instead.
+#
+# If the code should not be compiled at all for some multilibs, define:
+#
+# softfp_wrap_start: text to put at the start of wrapper source files,
+#                    output with echo
+#                    e.g. '#ifndef __powerpc64__'
+# softfp_wrap_end: text to put at the end of wrapper source files,
+#                  e.g. '#endif'
+#
+# This is another temporary measure.
+
+softfp_float_funcs = add$(m)3 div$(m)3 eq$(m)2 ge$(m)2 le$(m)2 mul$(m)3 \
+  neg$(m)2 sub$(m)3 unord$(m)2
+softfp_floatint_funcs = fix$(m)$(i) fixuns$(m)$(i) \
+  float$(i)$(m) floatun$(i)$(m)
+
+softfp_func_list := \
+  $(foreach m,$(softfp_float_modes), \
+              $(softfp_float_funcs) \
+              $(foreach i,$(softfp_int_modes), \
+                          $(softfp_floatint_funcs))) \
+  $(foreach e,$(softfp_extensions),extend$(e)2) \
+  $(foreach t,$(softfp_truncations),trunc$(t)2)
+
+ifeq ($(softfp_exclude_libgcc2),y)
+# This list is taken from mklibgcc.in and doesn't presently allow for
+# 64-bit targets where si should become di and di should become ti.
+softfp_func_list := $(filter-out floatdidf floatdisf fixunsdfsi fixunssfsi \
+  fixunsdfdi fixdfdi fixunssfdi fixsfdi fixxfdi fixunsxfdi \
+  floatdixf fixunsxfsi fixtfdi fixunstfdi floatditf \
+  floatundidf floatundisf floatundixf floatunditf,$(softfp_func_list))
+endif
+
+ifeq ($(softfp_wrap_start),)
+softfp_file_list := \
+  $(addsuffix .c,$(addprefix $(srcdir)/soft-fp/,$(softfp_func_list)))
+else
+softfp_file_list := $(addsuffix .c,$(softfp_func_list))
+
+$(softfp_file_list):
+	echo $(softfp_wrap_start) > $@
+	echo '#include "soft-fp/$@"' >> $@
+	echo $(softfp_wrap_end) >> $@
+endif
+
+# Disable missing prototype and type limit warnings.  The prototypes
+# for the functions in the soft-fp files have not been brought across
+# from glibc.
+
+soft-fp-objects-base = $(basename $(notdir $(softfp_file_list)))
+
+soft-fp-objects = $(addsuffix $(objext), $(soft-fp-objects-base)) \
+  $(addsuffix _s$(objext), $(soft-fp-objects-base))
+
+$(soft-fp-objects) : INTERNAL_CFLAGS += -Wno-missing-prototypes -Wno-type-limits
+
+LIB2ADD += $(softfp_file_list)
+
+ifneq ($(softfp_exclude_libgcc2),y)
+# Functions in libgcc2.c are excluded for each soft-float mode (a
+# target may have both soft-float and hard-float modes), for the fixed
+# list of integer modes (si and di) for which libgcc2.c defines any
+# such functions.  Depending on the target, the si and di symbols may
+# in fact define di and ti functions.
+
+LIB2FUNCS_EXCLUDE += \
+  $(addprefix _,$(foreach m,$(softfp_float_modes), \
+                            $(foreach i,si di, \
+                                        $(softfp_floatint_funcs))))
+endif
diff --git a/gcc-4.9/libgcc/config/t-softfp-excl b/gcc-4.9/libgcc/config/t-softfp-excl
new file mode 100644
index 000000000..9d9786b6a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-softfp-excl
@@ -0,0 +1 @@
+softfp_exclude_libgcc2 := y
diff --git a/gcc-4.9/libgcc/config/t-softfp-sfdf b/gcc-4.9/libgcc/config/t-softfp-sfdf
new file mode 100644
index 000000000..2fbc63dcd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-softfp-sfdf
@@ -0,0 +1,5 @@
+softfp_float_modes := sf df
+softfp_int_modes := si di
+softfp_extensions := sfdf
+softfp_truncations := dfsf
+softfp_exclude_libgcc2 := n
diff --git a/gcc-4.9/libgcc/config/t-softfp-tf b/gcc-4.9/libgcc/config/t-softfp-tf
new file mode 100644
index 000000000..f567629ad
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-softfp-tf
@@ -0,0 +1,5 @@
+softfp_float_modes := tf
+softfp_int_modes := si di ti
+softfp_extensions := sftf dftf xftf
+softfp_truncations := tfsf tfdf tfxf
+softfp_exclude_libgcc2 := n
diff --git a/gcc-4.9/libgcc/config/t-sol2 b/gcc-4.9/libgcc/config/t-sol2
new file mode 100644
index 000000000..4a5174012
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-sol2
@@ -0,0 +1,27 @@
+# Copyright (C) 2004-2014 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# gmon build rule:
+gmon.o:	$(srcdir)/config/gmon-sol2.c
+	$(gcc_compile) -c $<
+
+# Assemble startup files.
+crt1.o: $(srcdir)/config/$(cpu_type)/sol2-c1.S
+	$(crt_compile) -c $<
+gcrt1.o: $(srcdir)/config/$(cpu_type)/sol2-c1.S
+	$(crt_compile) -c -DGCRT1 $<
diff --git a/gcc-4.9/libgcc/config/t-stack b/gcc-4.9/libgcc/config/t-stack
new file mode 100644
index 000000000..cc0366b4c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-stack
@@ -0,0 +1,4 @@
+# Makefile fragment to provide generic support for -fsplit-stack.
+# This should be used in config.host for any host which supports
+# -fsplit-stack.
+LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c
diff --git a/gcc-4.9/libgcc/config/t-tls b/gcc-4.9/libgcc/config/t-tls
new file mode 100644
index 000000000..405128f78
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-tls
@@ -0,0 +1,2 @@
+# Use thread-local storage
+INTERNAL_CFLAGS += -DUSE_TLS
diff --git a/gcc-4.9/libgcc/config/t-vxworks b/gcc-4.9/libgcc/config/t-vxworks
new file mode 100644
index 000000000..3647f75d5
--- /dev/null
+++ b/gcc-4.9/libgcc/config/t-vxworks
@@ -0,0 +1,14 @@
+# Don't build libgcc.a with debug info
+LIBGCC2_DEBUG_CFLAGS =
+
+# Extra libgcc2 modules used by gthr-vxworks.h functions
+LIB2ADD = $(srcdir)/config/vxlib.c $(srcdir)/config/vxlib-tls.c
+
+# This ensures that the correct target headers are used; some
+# VxWorks system headers have names that collide with GCC's
+# internal (host) headers, e.g. regs.h.
+LIBGCC2_INCLUDES = -nostdinc -I \
+  `case "/$$(MULTIDIR)" in \
+     */mrtp*) echo $(WIND_USR)/h ;; \
+     *) echo $(WIND_BASE)/target/h ;; \
+   esac`
diff --git a/gcc-4.9/libgcc/config/tilegx/sfp-machine.h b/gcc-4.9/libgcc/config/tilegx/sfp-machine.h
new file mode 100644
index 000000000..1ce84e109
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/sfp-machine.h
@@ -0,0 +1,5 @@
+#ifdef __tilegx32__
+#include "config/tilegx/sfp-machine32.h"
+#else
+#include "config/tilegx/sfp-machine64.h"
+#endif
diff --git a/gcc-4.9/libgcc/config/tilegx/sfp-machine32.h b/gcc-4.9/libgcc/config/tilegx/sfp-machine32.h
new file mode 100644
index 000000000..9fc281cc8
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/sfp-machine32.h
@@ -0,0 +1,68 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D, 0
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0, 0, 0
+#define _FP_NANSIGN_S		1
+#define _FP_NANSIGN_D		1
+#define _FP_NANSIGN_Q		1
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __BIG_ENDIAN__
+#define __BYTE_ORDER __BIG_ENDIAN
+#else
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
diff --git a/gcc-4.9/libgcc/config/tilegx/sfp-machine64.h b/gcc-4.9/libgcc/config/tilegx/sfp-machine64.h
new file mode 100644
index 000000000..5dbbe60c4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/sfp-machine64.h
@@ -0,0 +1,68 @@
+#define _FP_W_TYPE_SIZE		64
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+typedef int TItype __attribute__ ((mode (TI)));
+typedef unsigned int UTItype __attribute__ ((mode (TI)));
+
+#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_2_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0
+#define _FP_NANSIGN_S		1
+#define _FP_NANSIGN_D		1
+#define _FP_NANSIGN_Q		1
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#if defined __BIG_ENDIAN__
+#define __BYTE_ORDER __BIG_ENDIAN
+#else
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
diff --git a/gcc-4.9/libgcc/config/tilegx/t-crtstuff b/gcc-4.9/libgcc/config/tilegx/t-crtstuff
new file mode 100644
index 000000000..870318ceb
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/t-crtstuff
@@ -0,0 +1,8 @@
+# crtend*.o cannot be compiled without -fno-asynchronous-unwind-tables,
+# because then __FRAME_END__ might not be the last thing in .eh_frame
+# section.
+CRTSTUFF_T_CFLAGS += -fno-asynchronous-unwind-tables
+CRTSTUFF_T_CFLAGS_S += -fno-asynchronous-unwind-tables
+
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
diff --git a/gcc-4.9/libgcc/config/tilegx/t-softfp b/gcc-4.9/libgcc/config/tilegx/t-softfp
new file mode 100644
index 000000000..a1e3513e2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/t-softfp
@@ -0,0 +1 @@
+softfp_int_modes += ti
diff --git a/gcc-4.9/libgcc/config/tilegx/t-tilegx b/gcc-4.9/libgcc/config/tilegx/t-tilegx
new file mode 100644
index 000000000..2fb64454c
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilegx/t-tilegx
@@ -0,0 +1,26 @@
+LIB2ADD += \
+  $(srcdir)/config/tilepro/atomic.c
+
+SOFTDIVIDE_FUNCS := \
+  _tile_udivsi3 \
+  _tile_divsi3 \
+  _tile_udivdi3 \
+  _tile_divdi3 \
+  _tile_umodsi3 \
+  _tile_modsi3 \
+  _tile_umoddi3 \
+  _tile_moddi3
+
+softdivide-o = $(patsubst %,%$(objext),$(SOFTDIVIDE_FUNCS))
+$(softdivide-o): %$(objext): $(srcdir)/config/tilepro/softdivide.c
+	$(gcc_compile) -ffunction-sections -DMAYBE_STATIC= -DL$* -c $< \
+	  $(vis_hide)
+libgcc-objects += $(softdivide-o)
+
+ifeq ($(enable_shared),yes)
+softdivide-s-o = $(patsubst %,%_s$(objext),$(SOFTDIVIDE_FUNCS))
+$(softdivide-s-o): %_s$(objext): $(srcdir)/config/tilepro/softdivide.c
+	$(gcc_s_compile) -ffunction-sections -DMAYBE_STATIC= -DL$* -c $<
+libgcc-s-objects += $(softdivide-s-o)
+libgcc-eh-objects += _tile_divdi3.o _tile_umoddi3.o
+endif
diff --git a/gcc-4.9/libgcc/config/tilepro/atomic.c b/gcc-4.9/libgcc/config/tilepro/atomic.c
new file mode 100644
index 000000000..66ef8fd7d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/atomic.c
@@ -0,0 +1,397 @@
+/* TILE atomics.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Walter Lee (walt@tilera.com)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "tconfig.h"
+#include "coretypes.h"
+#include "atomic.h"
+
+#define bool unsigned char
+
+/* This code should be inlined by the compiler, but for now support
+   it as out-of-line methods in libgcc.  */
+
+static inline void
+pre_atomic_barrier (int model)
+{
+  switch ((enum memmodel) model)
+    {
+    case MEMMODEL_RELEASE:
+    case MEMMODEL_ACQ_REL:
+    case MEMMODEL_SEQ_CST:
+      __atomic_thread_fence (model);
+      break;
+    default:
+      break;
+    }
+  return;
+}
+
+static inline void
+post_atomic_barrier (int model)
+{
+  switch ((enum memmodel) model)
+    {
+    case MEMMODEL_ACQUIRE:
+    case MEMMODEL_ACQ_REL:
+    case MEMMODEL_SEQ_CST:
+      __atomic_thread_fence (model);
+      break;
+    default:
+      break;
+    }
+  return;
+}
+
+#define __unused __attribute__((unused))
+
+#define __fetch_and_do(proto, type, size, opname, top, bottom)	\
+proto								\
+{								\
+  top;								\
+  type rv = arch_atomic_##opname(p, i);				\
+  bottom;							\
+  return rv;							\
+}
+
+#define __atomic_fetch_and_do(type, size, opname)			\
+  __fetch_and_do(type __atomic_fetch_##opname##_##size(type* p, type i, int model), \
+		 type, size, opname,					\
+		 pre_atomic_barrier(model),				\
+		 post_atomic_barrier(model))				\
+
+__atomic_fetch_and_do (int, 4, add)
+__atomic_fetch_and_do (int, 4, sub)
+__atomic_fetch_and_do (int, 4, or)
+__atomic_fetch_and_do (int, 4, and)
+__atomic_fetch_and_do (int, 4, xor)
+__atomic_fetch_and_do (int, 4, nand)
+__atomic_fetch_and_do (long long, 8, add)
+__atomic_fetch_and_do (long long, 8, sub)
+__atomic_fetch_and_do (long long, 8, or)
+__atomic_fetch_and_do (long long, 8, and)
+__atomic_fetch_and_do (long long, 8, xor)
+__atomic_fetch_and_do (long long, 8, nand)
+
+#define __sync_fetch_and_do(type, size, opname)				\
+  __fetch_and_do(type __sync_fetch_and_##opname##_##size(type* p, type i), \
+		 type, size, opname,					\
+		 arch_atomic_write_barrier(),				\
+		 arch_atomic_read_barrier())
+
+__sync_fetch_and_do (int, 4, add)
+__sync_fetch_and_do (int, 4, sub)
+__sync_fetch_and_do (int, 4, or)
+__sync_fetch_and_do (int, 4, and)
+__sync_fetch_and_do (int, 4, xor)
+__sync_fetch_and_do (int, 4, nand)
+__sync_fetch_and_do (long long, 8, add)
+__sync_fetch_and_do (long long, 8, sub)
+__sync_fetch_and_do (long long, 8, or)
+__sync_fetch_and_do (long long, 8, and)
+__sync_fetch_and_do (long long, 8, xor)
+__sync_fetch_and_do (long long, 8, nand)
+
+#define __do_and_fetch(proto, type, size, opname, op, op2, top, bottom)	\
+proto									\
+{									\
+  top;									\
+  type rv = op2 (arch_atomic_##opname(p, i) op i);			\
+  bottom;								\
+  return rv;								\
+}
+
+#define __atomic_do_and_fetch(type, size, opname, op, op2)		\
+  __do_and_fetch(type __atomic_##opname##_fetch_##size(type* p, type i, int model), \
+		 type, size, opname, op, op2,				\
+		 pre_atomic_barrier(model),				\
+		 post_atomic_barrier(model))				\
+
+__atomic_do_and_fetch (int, 4, add, +, )
+__atomic_do_and_fetch (int, 4, sub, -, )
+__atomic_do_and_fetch (int, 4, or, |, )
+__atomic_do_and_fetch (int, 4, and, &, )
+__atomic_do_and_fetch (int, 4, xor, |, )
+__atomic_do_and_fetch (int, 4, nand, &, ~)
+__atomic_do_and_fetch (long long, 8, add, +, )
+__atomic_do_and_fetch (long long, 8, sub, -, )
+__atomic_do_and_fetch (long long, 8, or, |, )
+__atomic_do_and_fetch (long long, 8, and, &, )
+__atomic_do_and_fetch (long long, 8, xor, |, )
+__atomic_do_and_fetch (long long, 8, nand, &, ~)
+
+#define __sync_do_and_fetch(type, size, opname, op, op2)		\
+  __do_and_fetch(type __sync_##opname##_and_fetch_##size(type* p, type i), \
+		 type, size, opname, op, op2,				\
+		 arch_atomic_write_barrier(),				\
+		 arch_atomic_read_barrier())				\
+
+__sync_do_and_fetch (int, 4, add, +, )
+__sync_do_and_fetch (int, 4, sub, -, )
+__sync_do_and_fetch (int, 4, or, |, )
+__sync_do_and_fetch (int, 4, and, &, )
+__sync_do_and_fetch (int, 4, xor, |, )
+__sync_do_and_fetch (int, 4, nand, &, ~)
+__sync_do_and_fetch (long long, 8, add, +, )
+__sync_do_and_fetch (long long, 8, sub, -, )
+__sync_do_and_fetch (long long, 8, or, |, )
+__sync_do_and_fetch (long long, 8, and, &, )
+__sync_do_and_fetch (long long, 8, xor, |, )
+__sync_do_and_fetch (long long, 8, nand, &, ~)
+
+#define __atomic_exchange_methods(type, size)				\
+bool									\
+__atomic_compare_exchange_##size(volatile type* ptr, type* oldvalp,	\
+				 type newval, bool weak __unused,	\
+				 int models, int modelf __unused)	\
+{									\
+  type oldval = *oldvalp;						\
+  pre_atomic_barrier(models);						\
+  type retval = arch_atomic_val_compare_and_exchange(ptr, oldval, newval); \
+  post_atomic_barrier(models);						\
+  bool success = (retval == oldval);					\
+  *oldvalp = retval;							\
+  return success;							\
+}									\
+									\
+type									\
+__atomic_exchange_##size(volatile type* ptr, type val, int model)	\
+{									\
+  pre_atomic_barrier(model);						\
+  type retval = arch_atomic_exchange(ptr, val);				\
+  post_atomic_barrier(model);						\
+  return retval;							\
+}
+
+__atomic_exchange_methods (int, 4)
+__atomic_exchange_methods (long long, 8)
+
+#define __sync_exchange_methods(type, size)				\
+type									\
+__sync_val_compare_and_swap_##size(type* ptr, type oldval, type newval)	\
+{									\
+  arch_atomic_write_barrier();						\
+  type retval = arch_atomic_val_compare_and_exchange(ptr, oldval, newval); \
+  arch_atomic_read_barrier();						\
+  return retval;							\
+}									\
+									\
+bool									\
+__sync_bool_compare_and_swap_##size(type* ptr, type oldval, type newval) \
+{									\
+  arch_atomic_write_barrier();						\
+  bool retval = arch_atomic_bool_compare_and_exchange(ptr, oldval, newval); \
+  arch_atomic_read_barrier();						\
+  return retval;							\
+}									\
+									\
+type									\
+__sync_lock_test_and_set_##size(type* ptr, type val)			\
+{									\
+  type retval = arch_atomic_exchange(ptr, val);				\
+  arch_atomic_acquire_barrier_value(retval);				\
+  return retval;							\
+}
+
+__sync_exchange_methods (int, 4)
+__sync_exchange_methods (long long, 8)
+
+#ifdef __LITTLE_ENDIAN__
+#define BIT_OFFSET(n, type) ((n) * 8)
+#else
+#define BIT_OFFSET(n, type) ((4 - sizeof(type) - (n)) * 8)
+#endif
+
+/* Subword methods require the same approach for both TILEPro and
+   TILE-Gx.  We load the background data for the word, insert the
+   desired subword piece, then compare-and-exchange it into place.  */
+#define u8 unsigned char
+#define u16 unsigned short
+
+#define __subword_cmpxchg_body(type, size, ptr, guess, val)		\
+  ({									\
+    unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL);	\
+    const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type);	\
+    const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1;		\
+    const unsigned int bgmask = ~(valmask << shift);			\
+    unsigned int oldword = *p;						\
+    type oldval = (oldword >> shift) & valmask;				\
+    if (__builtin_expect((oldval == guess), 1)) {			\
+      unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \
+      oldword = arch_atomic_val_compare_and_exchange(p, oldword, word);	\
+      oldval = (oldword >> shift) & valmask;				\
+    }									\
+    oldval;								\
+  })									\
+
+#define __atomic_subword_cmpxchg(type, size)				\
+  									\
+bool									\
+__atomic_compare_exchange_##size(volatile type* ptr, type* guess_ptr,	\
+				 type val, bool weak __unused, int models, \
+				 int modelf __unused)			\
+{									\
+  pre_atomic_barrier(models);						\
+  type guess = *guess_ptr;						\
+  type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val);	\
+  post_atomic_barrier(models);						\
+  bool success = (oldval == guess);					\
+  *guess_ptr = oldval;							\
+  return success;							\
+}
+
+__atomic_subword_cmpxchg (u8, 1)
+__atomic_subword_cmpxchg (u16, 2)
+
+#define __sync_subword_cmpxchg(type, size)				\
+  									\
+type									\
+__sync_val_compare_and_swap_##size(type* ptr, type guess, type val)	\
+{									\
+  arch_atomic_write_barrier();						\
+  type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val);	\
+  arch_atomic_read_barrier();						\
+  return oldval;							\
+}									\
+									\
+bool									\
+__sync_bool_compare_and_swap_##size(type* ptr, type guess, type val)	\
+{									\
+  type oldval = __sync_val_compare_and_swap_##size(ptr, guess, val);	\
+  return oldval == guess;						\
+}
+
+__sync_subword_cmpxchg (u8, 1)
+__sync_subword_cmpxchg (u16, 2)
+
+/* For the atomic-update subword methods, we use the same approach as
+   above, but we retry until we succeed if the compare-and-exchange
+   fails.  */
+#define __subword(type, proto, top, expr, bottom)			\
+proto									\
+{									\
+  top									\
+  unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL);	\
+  const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type);		\
+  const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1;		\
+  const unsigned int bgmask = ~(valmask << shift);			\
+  unsigned int oldword, xword = *p;					\
+  type val, oldval;							\
+  do {									\
+    oldword = xword;							\
+    oldval = (oldword >> shift) & valmask;				\
+    val = expr;								\
+    unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \
+    xword = arch_atomic_val_compare_and_exchange(p, oldword, word);	\
+  } while (__builtin_expect(xword != oldword, 0));			\
+  bottom								\
+}
+
+#define __atomic_subword_fetch(type, funcname, expr, retval)		\
+  __subword(type,							\
+	    type __atomic_ ## funcname(volatile type *ptr, type i, int model), \
+	    pre_atomic_barrier(model);,					\
+	    expr,							\
+	    post_atomic_barrier(model); return retval;)
+
+__atomic_subword_fetch (u8, fetch_add_1, oldval + i, oldval)
+__atomic_subword_fetch (u8, fetch_sub_1, oldval - i, oldval)
+__atomic_subword_fetch (u8, fetch_or_1, oldval | i, oldval)
+__atomic_subword_fetch (u8, fetch_and_1, oldval & i, oldval)
+__atomic_subword_fetch (u8, fetch_xor_1, oldval ^ i, oldval)
+__atomic_subword_fetch (u8, fetch_nand_1, ~(oldval & i), oldval)
+
+__atomic_subword_fetch (u16, fetch_add_2, oldval + i, oldval)
+__atomic_subword_fetch (u16, fetch_sub_2, oldval - i, oldval)
+__atomic_subword_fetch (u16, fetch_or_2, oldval | i, oldval)
+__atomic_subword_fetch (u16, fetch_and_2, oldval & i, oldval)
+__atomic_subword_fetch (u16, fetch_xor_2, oldval ^ i, oldval)
+__atomic_subword_fetch (u16, fetch_nand_2, ~(oldval & i), oldval)
+
+__atomic_subword_fetch (u8, add_fetch_1, oldval + i, val)
+__atomic_subword_fetch (u8, sub_fetch_1, oldval - i, val)
+__atomic_subword_fetch (u8, or_fetch_1, oldval | i, val)
+__atomic_subword_fetch (u8, and_fetch_1, oldval & i, val)
+__atomic_subword_fetch (u8, xor_fetch_1, oldval ^ i, val)
+__atomic_subword_fetch (u8, nand_fetch_1, ~(oldval & i), val)
+
+__atomic_subword_fetch (u16, add_fetch_2, oldval + i, val)
+__atomic_subword_fetch (u16, sub_fetch_2, oldval - i, val)
+__atomic_subword_fetch (u16, or_fetch_2, oldval | i, val)
+__atomic_subword_fetch (u16, and_fetch_2, oldval & i, val)
+__atomic_subword_fetch (u16, xor_fetch_2, oldval ^ i, val)
+__atomic_subword_fetch (u16, nand_fetch_2, ~(oldval & i), val)
+
+#define __sync_subword_fetch(type, funcname, expr, retval)	\
+  __subword(type,						\
+	    type __sync_ ## funcname(type *ptr, type i),	\
+	    arch_atomic_read_barrier();,			\
+	    expr,						\
+	    arch_atomic_write_barrier(); return retval;)
+
+__sync_subword_fetch (u8, fetch_and_add_1, oldval + i, oldval)
+__sync_subword_fetch (u8, fetch_and_sub_1, oldval - i, oldval)
+__sync_subword_fetch (u8, fetch_and_or_1, oldval | i, oldval)
+__sync_subword_fetch (u8, fetch_and_and_1, oldval & i, oldval)
+__sync_subword_fetch (u8, fetch_and_xor_1, oldval ^ i, oldval)
+__sync_subword_fetch (u8, fetch_and_nand_1, ~(oldval & i), oldval)
+
+__sync_subword_fetch (u16, fetch_and_add_2, oldval + i, oldval)
+__sync_subword_fetch (u16, fetch_and_sub_2, oldval - i, oldval)
+__sync_subword_fetch (u16, fetch_and_or_2, oldval | i, oldval)
+__sync_subword_fetch (u16, fetch_and_and_2, oldval & i, oldval)
+__sync_subword_fetch (u16, fetch_and_xor_2, oldval ^ i, oldval)
+__sync_subword_fetch (u16, fetch_and_nand_2, ~(oldval & i), oldval)
+
+__sync_subword_fetch (u8, add_and_fetch_1, oldval + i, val)
+__sync_subword_fetch (u8, sub_and_fetch_1, oldval - i, val)
+__sync_subword_fetch (u8, or_and_fetch_1, oldval | i, val)
+__sync_subword_fetch (u8, and_and_fetch_1, oldval & i, val)
+__sync_subword_fetch (u8, xor_and_fetch_1, oldval ^ i, val)
+__sync_subword_fetch (u8, nand_and_fetch_1, ~(oldval & i), val)
+
+__sync_subword_fetch (u16, add_and_fetch_2, oldval + i, val)
+__sync_subword_fetch (u16, sub_and_fetch_2, oldval - i, val)
+__sync_subword_fetch (u16, or_and_fetch_2, oldval | i, val)
+__sync_subword_fetch (u16, and_and_fetch_2, oldval & i, val)
+__sync_subword_fetch (u16, xor_and_fetch_2, oldval ^ i, val)
+__sync_subword_fetch (u16, nand_and_fetch_2, ~(oldval & i), val)
+
+#define __atomic_subword_lock(type, size)				\
+  __subword(type,							\
+	    type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \
+	    pre_atomic_barrier(model);,					\
+	    nval,							\
+	    post_atomic_barrier(model); return oldval;)
+
+__atomic_subword_lock (u8, 1)
+__atomic_subword_lock (u16, 2)
+
+#define __sync_subword_lock(type, size)					\
+  __subword(type,							\
+	    type __sync_lock_test_and_set_##size(type* ptr, type nval), \
+	    ,								\
+	    nval,							\
+	    arch_atomic_acquire_barrier_value(oldval); return oldval;)
+
+__sync_subword_lock (u8, 1)
+__sync_subword_lock (u16, 2)
diff --git a/gcc-4.9/libgcc/config/tilepro/atomic.h b/gcc-4.9/libgcc/config/tilepro/atomic.h
new file mode 100644
index 000000000..404e15ee2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/atomic.h
@@ -0,0 +1,435 @@
+/* Macros for atomic functionality for tile.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Walter Lee (walt@tilera.com)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+
+/* Provides macros for common atomic functionality.  */
+
+#ifndef _ATOMIC_H_
+#define _ATOMIC_H_
+
+#ifdef __tilegx__
+/* Atomic instruction macros
+
+   The macros provided by atomic.h simplify access to the TILE-Gx
+   architecture's atomic instructions.  The architecture provides a
+   variety of atomic instructions, including "exchange", "compare and
+   exchange", "fetch and ADD", "fetch and AND", "fetch and OR", and
+   "fetch and ADD if greater than or equal to zero".
+
+   No barrier or fence semantics are implied by any of the atomic
+   instructions for manipulating memory; you must specify the barriers
+   that you wish explicitly, using the provided macros.
+
+   Any integral 32- or 64-bit value can be used as the argument
+   to these macros, such as "int", "long long", "unsigned long", etc.
+   The pointers must be aligned to 4 or 8 bytes for 32- or 64-bit data.
+   The "exchange" and "compare and exchange" macros may also take
+   pointer values.  We use the pseudo-type "VAL" in the documentation
+   to indicate the use of an appropriate type.  */
+#else
+/* Atomic instruction macros
+
+   The macros provided by atomic.h simplify access to the Tile
+   architecture's atomic instructions.  Since the architecture
+   supports test-and-set as its only in-silicon atomic operation, many
+   of the operations provided by this header are implemented as
+   fast-path calls to Linux emulation routines.
+
+   Using the kernel for atomic operations allows userspace to take
+   advantage of the kernel's existing atomic-integer support (managed
+   by a distributed array of locks).  The kernel provides proper
+   ordering among simultaneous atomic operations on different cores,
+   and guarantees a process can not be context-switched part way
+   through an atomic operation.  By virtue of sharing the kernel
+   atomic implementation, the userspace atomic operations
+   are compatible with the atomic methods provided by the kernel's
+   futex() syscall API.  Note that these operations never cause Linux
+   kernel scheduling, and are in fact invisible to the kernel; they
+   simply act as regular function calls but with an elevated privilege
+   level.  Note that the kernel's distributed lock array is hashed by
+   using only VA bits from the atomic value's address (to avoid the
+   performance hit of page table locking and multiple page-table
+   lookups to get the PA) and only the VA bits that are below page
+   granularity (to properly lock simultaneous accesses to the same
+   page mapped at different VAs).  As a result, simultaneous atomic
+   operations on values whose addresses are at the same offset on a
+   page will contend in the kernel for the same lock array element.
+
+   No barrier or fence semantics are implied by any of the atomic
+   instructions for manipulating memory; you must specify the barriers
+   that you wish explicitly, using the provided macros.
+
+   Any integral 32- or 64-bit value can be used as the argument
+   to these macros, such as "int", "long long", "unsigned long", etc.
+   The pointers must be aligned to 4 or 8 bytes for 32- or 64-bit data.
+   The "exchange" and "compare and exchange" macros may also take
+   pointer values.  We use the pseudo-type "VAL" in the documentation
+   to indicate the use of an appropriate type.
+
+   The 32-bit routines are implemented using a single kernel fast
+   syscall, as is the 64-bit compare-and-exchange.  The other 64-bit
+   routines are implemented by looping over the 64-bit
+   compare-and-exchange routine, so may be potentially less efficient.  */
+#endif
+
+#ifdef __tilegx__
+#include <arch/spr_def.h>
+#else
+#include <asm/unistd.h>
+#endif
+
+
+/* 32-bit integer compare-and-exchange.  */
+static __inline __attribute__ ((always_inline))
+     int arch_atomic_val_compare_and_exchange_4 (volatile int *mem,
+						 int oldval, int newval)
+{
+#ifdef __tilegx__
+  __insn_mtspr (SPR_CMPEXCH_VALUE, oldval);
+  return __insn_cmpexch4 (mem, newval);
+#else
+  int result;
+  __asm__ __volatile__ ("swint1":"=R00" (result),
+			"=m" (*mem):"R10" (__NR_FAST_cmpxchg), "R00" (mem),
+			"R01" (oldval), "R02" (newval), "m" (*mem):"r20",
+			"r21", "r22", "r23", "r24", "r25", "r26", "r27",
+			"r28", "r29", "memory");
+  return result;
+#endif
+}
+
+/* 64-bit integer compare-and-exchange.  */
+static __inline __attribute__ ((always_inline))
+     long long arch_atomic_val_compare_and_exchange_8 (volatile long long
+						       *mem, long long oldval,
+						       long long newval)
+{
+#ifdef __tilegx__
+  __insn_mtspr (SPR_CMPEXCH_VALUE, oldval);
+  return __insn_cmpexch (mem, newval);
+#else
+  unsigned int result_lo, result_hi;
+  unsigned int oldval_lo = oldval & 0xffffffffu, oldval_hi = oldval >> 32;
+  unsigned int newval_lo = newval & 0xffffffffu, newval_hi = newval >> 32;
+  __asm__ __volatile__ ("swint1":"=R00" (result_lo), "=R01" (result_hi),
+			"=m" (*mem):"R10" (__NR_FAST_cmpxchg64), "R00" (mem),
+			"R02" (oldval_lo), "R03" (oldval_hi),
+			"R04" (newval_lo), "R05" (newval_hi),
+			"m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25",
+			"r26", "r27", "r28", "r29", "memory");
+  return ((long long) result_hi) << 32 | result_lo;
+#endif
+}
+
+/* This non-existent symbol is called for sizes other than "4" and "8",
+   indicating a bug in the caller.  */
+extern int __arch_atomic_error_bad_argument_size (void)
+  __attribute__ ((warning ("sizeof atomic argument not 4 or 8")));
+
+
+#define arch_atomic_val_compare_and_exchange(mem, o, n)                 \
+  __extension__ ({                                                      \
+    (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
+      ((sizeof(*(mem)) == 8) ?                                          \
+       arch_atomic_val_compare_and_exchange_8(                          \
+         (volatile long long*)(mem), (__typeof((o)-(o)))(o),            \
+         (__typeof((n)-(n)))(n)) :                                      \
+       (sizeof(*(mem)) == 4) ?                                          \
+       arch_atomic_val_compare_and_exchange_4(                          \
+         (volatile int*)(mem), (__typeof((o)-(o)))(o),                  \
+         (__typeof((n)-(n)))(n)) :                                      \
+       __arch_atomic_error_bad_argument_size());                        \
+  })
+
+#define arch_atomic_bool_compare_and_exchange(mem, o, n)                \
+  __extension__ ({                                                      \
+    __typeof(o) __o = (o);                                              \
+    __builtin_expect(                                                   \
+      __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \
+  })
+
+
+/* Loop with compare_and_exchange until we guess the correct value.
+   Normally "expr" will be an expression using __old and __value.  */
+#define __arch_atomic_update_cmpxchg(mem, value, expr)                  \
+  __extension__ ({                                                      \
+    __typeof(value) __value = (value);                                  \
+    __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess;           \
+    do {                                                                \
+      __guess = __old;                                                  \
+      __old = arch_atomic_val_compare_and_exchange(__mem, __old, (expr));    \
+    } while (__builtin_expect(__old != __guess, 0));                    \
+    __old;                                                              \
+  })
+
+#ifdef __tilegx__
+
+/* Generic atomic op with 8- or 4-byte variant.
+   The _mask, _addend, and _expr arguments are ignored on tilegx.  */
+#define __arch_atomic_update(mem, value, op, _mask, _addend, _expr)     \
+  __extension__ ({                                                      \
+    ((__typeof(*(mem)))                                                 \
+     ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op(     \
+        (volatile void *)(mem),                                         \
+        (long long)(__typeof((value)-(value)))(value)) :                \
+      (sizeof(*(mem)) == 4) ? (int)__insn_##op##4(                      \
+        (volatile void *)(mem),                                         \
+        (int)(__typeof((value)-(value)))(value)) :                      \
+      __arch_atomic_error_bad_argument_size()));                        \
+  })
+
+#else
+
+/* This uses TILEPro's fast syscall support to atomically compute:
+
+   int old = *ptr;
+   *ptr = (old & mask) + addend;
+   return old;
+
+   This primitive can be used for atomic exchange, add, or, and.
+   Only 32-bit support is provided.  */
+static __inline __attribute__ ((always_inline))
+     int
+     __arch_atomic_update_4 (volatile int *mem, int mask, int addend)
+{
+  int result;
+  __asm__ __volatile__ ("swint1":"=R00" (result),
+			"=m" (*mem):"R10" (__NR_FAST_atomic_update),
+			"R00" (mem), "R01" (mask), "R02" (addend),
+			"m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25",
+			"r26", "r27", "r28", "r29", "memory");
+  return result;
+}
+
+/* Generic atomic op with 8- or 4-byte variant.
+   The _op argument is ignored on tilepro.  */
+#define __arch_atomic_update(mem, value, _op, mask, addend, expr)       \
+  __extension__ ({                                                      \
+    (__typeof(*(mem)))(__typeof(*(mem)-*(mem)))                         \
+      ((sizeof(*(mem)) == 8) ?                                          \
+       __arch_atomic_update_cmpxchg((mem), (value), (expr)) :           \
+       (sizeof(*(mem)) == 4) ?                                          \
+       __arch_atomic_update_4((volatile int*)(mem),                     \
+                              (__typeof((mask)-(mask)))(mask),          \
+                              (__typeof((addend)-(addend)))(addend)) :  \
+       __arch_atomic_error_bad_argument_size());                        \
+  })
+
+#endif /* __tilegx__ */
+
+
+#define arch_atomic_exchange(mem, newvalue) \
+  __arch_atomic_update(mem, newvalue, exch, 0, newvalue, __value)
+
+#define arch_atomic_add(mem, value) \
+  __arch_atomic_update(mem, value, fetchadd, -1, value, __old + __value)
+
+#define arch_atomic_sub(mem, value) arch_atomic_add((mem), -(value))
+
+#define arch_atomic_increment(mem) arch_atomic_add((mem), 1)
+
+#define arch_atomic_decrement(mem) arch_atomic_add((mem), -1)
+
+#define arch_atomic_and(mem, mask) \
+  __arch_atomic_update(mem, mask, fetchand, mask, 0, __old & __value)
+
+#define arch_atomic_or(mem, mask) \
+  __arch_atomic_update(mem, mask, fetchor, ~mask, mask, __old | __value)
+
+#define arch_atomic_xor(mem, mask) \
+  __arch_atomic_update_cmpxchg(mem, mask, __old ^ __value)
+
+#define arch_atomic_nand(mem, mask) \
+  __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value))
+
+#define arch_atomic_bit_set(mem, bit)                                   \
+  __extension__ ({                                                      \
+    __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
+    __mask & arch_atomic_or((mem), __mask);                             \
+  })
+
+#define arch_atomic_bit_clear(mem, bit)                                 \
+  __extension__ ({                                                      \
+    __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit);             \
+    __mask & arch_atomic_and((mem), ~__mask);                           \
+  })
+
+#ifdef __tilegx__
+/* Atomically store a new value to memory.
+   Note that you can freely use types of any size here, unlike the
+   other atomic routines, which require 32- or 64-bit types.
+   This accessor is provided for compatibility with TILEPro, which
+   required an explicit atomic operation for stores that needed
+   to be atomic with respect to other atomic methods in this header.  */
+#define arch_atomic_write(mem, value) ((void) (*(mem) = (value)))
+#else
+#define arch_atomic_write(mem, value)                                   \
+  do {                                                                  \
+    __typeof(mem) __aw_mem = (mem);                                     \
+    __typeof(value) __aw_val = (value);                                 \
+    unsigned int *__aw_mem32, __aw_intval, __aw_val32, __aw_off, __aw_mask; \
+    __aw_intval = (__typeof((value) - (value)))__aw_val;                \
+    switch (sizeof(*__aw_mem)) {                                        \
+    case 8:                                                             \
+      __arch_atomic_update_cmpxchg(__aw_mem, __aw_val, __value);        \
+      break;                                                            \
+    case 4:                                                             \
+      __arch_atomic_update_4((int *)__aw_mem, 0, __aw_intval);          \
+      break;                                                            \
+    case 2:                                                             \
+      __aw_off = 8 * ((long)__aw_mem & 0x2);                            \
+      __aw_mask = 0xffffU << __aw_off;                                  \
+      __aw_mem32 = (unsigned int *)((long)__aw_mem & ~0x2);             \
+      __aw_val32 = (__aw_intval << __aw_off) & __aw_mask;               \
+      __arch_atomic_update_cmpxchg(__aw_mem32, __aw_val32,              \
+                                   (__old & ~__aw_mask) | __value);     \
+      break;                                                            \
+    case 1:                                                             \
+      __aw_off = 8 * ((long)__aw_mem & 0x3);                            \
+      __aw_mask = 0xffU << __aw_off;                                    \
+      __aw_mem32 = (unsigned int *)((long)__aw_mem & ~0x3);             \
+      __aw_val32 = (__aw_intval << __aw_off) & __aw_mask;               \
+      __arch_atomic_update_cmpxchg(__aw_mem32, __aw_val32,              \
+                                   (__old & ~__aw_mask) | __value);     \
+      break;                                                            \
+    }                                                                   \
+  } while (0)
+#endif
+
+/* Compiler barrier.
+
+   This macro prevents loads or stores from being moved by the compiler
+   across the macro.  Any loaded value that was loaded before this
+   macro must then be reloaded by the compiler.  */
+#define arch_atomic_compiler_barrier() __asm__ __volatile__("" ::: "memory")
+
+/* Full memory barrier.
+
+   This macro has the semantics of arch_atomic_compiler_barrer(), but also
+   ensures that previous stores are visible to other cores, and that
+   all previous loaded values have been placed into their target
+   register on this core.  */
+#define arch_atomic_full_barrier() __insn_mf()
+
+/* Read memory barrier.
+
+   Ensure that all reads by this processor that occurred prior to the
+   read memory barrier have completed, and that no reads that occur
+   after the read memory barrier on this processor are initiated
+   before the barrier.
+
+   On current TILE chips a read barrier is implemented as a full barrier,
+   but this may not be true in later versions of the architecture.
+
+   See also arch_atomic_acquire_barrier() for the appropriate idiom to use
+   to ensure no reads are lifted above an atomic lock instruction.  */
+#define arch_atomic_read_barrier() arch_atomic_full_barrier()
+
+/* Write memory barrier.
+
+   Ensure that all writes by this processor that occurred prior to the
+   write memory barrier have completed, and that no writes that occur
+   after the write memory barrier on this processor are initiated
+   before the barrier.
+
+   On current TILE chips a write barrier is implemented as a full barrier,
+   but this may not be true in later versions of the architecture.
+
+   See also arch_atomic_release_barrier() for the appropriate idiom to use
+   to ensure all writes are complete prior to an atomic unlock instruction.  */
+#define arch_atomic_write_barrier() arch_atomic_full_barrier()
+
+/* Lock acquisition barrier.
+
+   Ensure that no load operations that follow this macro in the
+   program can issue prior to the barrier.  Without such a barrier,
+   the compiler can reorder them to issue earlier, or the hardware can
+   issue them speculatively.  The latter is not currently done in the
+   Tile microarchitecture, but using this operation improves
+   portability to future implementations.
+
+   This operation is intended to be used as part of the "acquire"
+   path for locking, that is, when entering a critical section.
+   This should be done after the atomic operation that actually
+   acquires the lock, and in conjunction with a "control dependency"
+   that checks the atomic operation result to see if the lock was
+   in fact acquired.  See the arch_atomic_read_barrier() macro
+   for a heavier-weight barrier to use in certain unusual constructs,
+   or arch_atomic_acquire_barrier_value() if no control dependency exists.  */
+#define arch_atomic_acquire_barrier() arch_atomic_compiler_barrier()
+
+/* Lock release barrier.
+
+   Ensure that no store operations that precede this macro in the
+   program complete subsequent to the barrier.  Without such a
+   barrier, the compiler can reorder stores to issue later, or stores
+   can be still outstanding in the memory network.
+
+   This operation is intended to be used as part of the "release" path
+   for locking, that is, when leaving a critical section.  This should
+   be done before the operation (such as a store of zero) that
+   actually releases the lock.  */
+#define arch_atomic_release_barrier() arch_atomic_write_barrier()
+
+/* Barrier until the read of a particular value is complete.
+
+   This is occasionally useful when constructing certain locking
+   scenarios.  For example, you might write a routine that issues an
+   atomic instruction to enter a critical section, then reads one or
+   more values within the critical section without checking to see if
+   the critical section was in fact acquired, and only later checks
+   the atomic instruction result to see if the lock was acquired.  If
+   so the routine could properly release the lock and know that the
+   values that were read were valid.
+
+   In this scenario, it is required to wait for the result of the
+   atomic instruction, even if the value itself is not checked.  This
+   guarantees that if the atomic instruction succeeded in taking the lock,
+   the lock was held before any reads in the critical section issued.  */
+#define arch_atomic_acquire_barrier_value(val) \
+  __asm__ __volatile__("move %0, %0" :: "r"(val))
+
+/* Access the given variable in memory exactly once.
+
+   In some contexts, an algorithm may need to force access to memory,
+   since otherwise the compiler may think it can optimize away a
+   memory load or store; for example, in a loop when polling memory to
+   see if another cpu has updated it yet.  Generally this is only
+   required for certain very carefully hand-tuned algorithms; using it
+   unnecessarily may result in performance losses.
+
+   A related use of this macro is to ensure that the compiler does not
+   rematerialize the value of "x" by reloading it from memory
+   unexpectedly; the "volatile" marking will prevent the compiler from
+   being able to rematerialize.  This is helpful if an algorithm needs
+   to read a variable without locking, but needs it to have the same
+   value if it ends up being used several times within the algorithm.
+
+   Note that multiple uses of this macro are guaranteed to be ordered,
+   i.e. the compiler will not reorder stores or loads that are wrapped
+   in arch_atomic_access_once().  */
+#define arch_atomic_access_once(x) (*(volatile __typeof(x) *)&(x))
+
+
+
+#endif /* !_ATOMIC_H_ */
diff --git a/gcc-4.9/libgcc/config/tilepro/linux-unwind.h b/gcc-4.9/libgcc/config/tilepro/linux-unwind.h
new file mode 100644
index 000000000..27481cfcd
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/linux-unwind.h
@@ -0,0 +1,99 @@
+/* DWARF2 EH unwinding support for TILEPro.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Walter Lee (walt@tilera.com)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef inhibit_libc
+
+#include <arch/abi.h>
+#include <signal.h>
+#include <sys/ucontext.h>
+#include <linux/unistd.h>
+
+/* Macro to define a copy of the kernel's __rt_sigreturn function
+   (in arch/tile/kernel/entry.S).  If that function is changed,
+   this one needs to be changed to match it.  */
+#define _sigreturn_asm(REG, NR) asm(                    \
+    ".pushsection .text.__rt_sigreturn,\"a\"\n"         \
+    ".global __rt_sigreturn\n"                          \
+    ".type __rt_sigreturn,@function\n"                  \
+    "__rt_sigreturn:\n"                                 \
+    "moveli " #REG ", " #NR "\n"                        \
+    "swint1\n"                                          \
+    ".size __rt_sigreturn, . - __rt_sigreturn\n"        \
+    ".popsection")
+#define sigreturn_asm(REG, NR) _sigreturn_asm(REG, NR)
+sigreturn_asm (TREG_SYSCALL_NR_NAME, __NR_rt_sigreturn);
+#define SIGRETURN_LEN 16
+extern char __rt_sigreturn[];
+
+#define MD_FALLBACK_FRAME_STATE_FOR tile_fallback_frame_state
+
+static _Unwind_Reason_Code
+tile_fallback_frame_state (struct _Unwind_Context *context,
+			      _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+  long new_cfa;
+  int i;
+
+  struct rt_sigframe {
+    unsigned char save_area[C_ABI_SAVE_AREA_SIZE];
+    siginfo_t info;
+    struct ucontext uc;
+  } *rt_;
+
+  /* Return if this is not a signal handler.  */
+  if (memcmp (pc, __rt_sigreturn, SIGRETURN_LEN) != 0)
+    return _URC_END_OF_STACK;
+
+  /* It was a signal handler; update the reported PC to point to our
+     copy, since that will be findable with dladdr() and therefore
+     somewhat easier to help understand what actually happened. */
+  context->ra = __rt_sigreturn;
+
+  rt_ = context->cfa;
+  sc = &rt_->uc.uc_mcontext;
+
+  new_cfa = sc->sp;
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+  for (i = 0; i < 56; ++i)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset
+	= (long)&sc->gregs[i] - new_cfa;
+    }
+
+  fs->regs.reg[56].how = REG_SAVED_OFFSET;
+  fs->regs.reg[56].loc.offset = (long)&sc->pc - new_cfa;
+  fs->retaddr_column = 56;
+  fs->signal_frame = 1;
+
+  return _URC_NO_REASON;
+}
+
+#endif /* ifdef inhibit_libc  */
diff --git a/gcc-4.9/libgcc/config/tilepro/sfp-machine.h b/gcc-4.9/libgcc/config/tilepro/sfp-machine.h
new file mode 100644
index 000000000..6953d8d8d
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/sfp-machine.h
@@ -0,0 +1,59 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+/* The type of the result of a floating point comparison.  This must
+   match `__libgcc_cmp_return__' in GCC for the target.  */
+typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
+#define CMPtype __gcc_CMPtype
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		_FP_QNANBIT_S
+#define _FP_NANFRAC_D		_FP_QNANBIT_D, 0
+#define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0, 0, 0
+#define _FP_NANSIGN_S		1
+#define _FP_NANSIGN_D		1
+#define _FP_NANSIGN_Q		1
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+#define	__LITTLE_ENDIAN	1234
+#define	__BIG_ENDIAN	4321
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
+
+/* Define ALIASNAME as a strong alias for NAME.  */
+# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+# define _strong_alias(name, aliasname) \
+  extern __typeof (name) aliasname __attribute__ ((alias (#name)));
+
diff --git a/gcc-4.9/libgcc/config/tilepro/softdivide.c b/gcc-4.9/libgcc/config/tilepro/softdivide.c
new file mode 100644
index 000000000..8a539f467
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/softdivide.c
@@ -0,0 +1,353 @@
+/* Division and remainder routines for Tile.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Walter Lee (walt@tilera.com)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+typedef int int32_t;
+typedef unsigned uint32_t;
+typedef long long int64_t;
+typedef unsigned long long uint64_t;
+
+/* Raise signal 8 (SIGFPE) with code 1 (FPE_INTDIV).  */
+static inline void
+raise_intdiv (void)
+{
+  asm ("{ raise; moveli zero, 8 + (1 << 6) }");
+}
+
+
+#ifndef __tilegx__
+/*__udivsi3 - 32 bit integer unsigned divide  */
+static inline uint32_t __attribute__ ((always_inline))
+__udivsi3_inline (uint32_t dividend, uint32_t divisor)
+{
+  /* Divide out any power of two factor from dividend and divisor.
+     Note that when dividing by zero the divisor will remain zero,
+     which is all we need to detect that case below.  */
+  const int power_of_two_factor = __insn_ctz (divisor);
+  divisor >>= power_of_two_factor;
+  dividend >>= power_of_two_factor;
+
+  /* Checks for division by power of two or division by zero.  */
+  if (divisor <= 1)
+    {
+      if (divisor == 0)
+	{
+	  raise_intdiv ();
+	  return 0;
+	}
+      return dividend;
+    }
+
+  /* Compute (a / b) by repeatedly finding the largest N
+     such that (b << N) <= a. For each such N, set bit N in the
+     quotient, subtract (b << N) from a, and keep going. Think of this as
+     the reverse of the "shift-and-add" that a multiply does. The values
+     of N are precisely those shift counts.
+
+     Finding N is easy. First, use clz(b) - clz(a) to find the N
+     that lines up the high bit of (b << N) with the high bit of a.
+     Any larger value of N would definitely make (b << N) > a,
+     which is too big.
+
+     Then, if (b << N) > a (because it has larger low bits), decrement
+     N by one.  This adjustment will definitely make (b << N) less
+     than a, because a's high bit is now one higher than b's.  */
+
+  /* Precomputing the max_ values allows us to avoid a subtract
+     in the inner loop and just right shift by clz(remainder).  */
+  const int divisor_clz = __insn_clz (divisor);
+  const uint32_t max_divisor = divisor << divisor_clz;
+  const uint32_t max_qbit = 1 << divisor_clz;
+
+  uint32_t quotient = 0;
+  uint32_t remainder = dividend;
+
+  while (remainder >= divisor)
+    {
+      int shift = __insn_clz (remainder);
+      uint32_t scaled_divisor = max_divisor >> shift;
+      uint32_t quotient_bit = max_qbit >> shift;
+
+      int too_big = (scaled_divisor > remainder);
+      scaled_divisor >>= too_big;
+      quotient_bit >>= too_big;
+      remainder -= scaled_divisor;
+      quotient |= quotient_bit;
+    }
+  return quotient;
+}
+#endif /* !__tilegx__ */
+
+
+/* __udivdi3 - 64 bit integer unsigned divide  */
+static inline uint64_t __attribute__ ((always_inline))
+__udivdi3_inline (uint64_t dividend, uint64_t divisor)
+{
+  /* Divide out any power of two factor from dividend and divisor.
+     Note that when dividing by zero the divisor will remain zero,
+     which is all we need to detect that case below.  */
+  const int power_of_two_factor = __builtin_ctzll (divisor);
+  divisor >>= power_of_two_factor;
+  dividend >>= power_of_two_factor;
+
+  /* Checks for division by power of two or division by zero.  */
+  if (divisor <= 1)
+    {
+      if (divisor == 0)
+	{
+	  raise_intdiv ();
+	  return 0;
+	}
+      return dividend;
+    }
+
+#ifndef __tilegx__
+  if (((uint32_t) (dividend >> 32) | ((uint32_t) (divisor >> 32))) == 0)
+    {
+      /* Operands both fit in 32 bits, so use faster 32 bit algorithm.  */
+      return __udivsi3_inline ((uint32_t) dividend, (uint32_t) divisor);
+    }
+#endif /* !__tilegx__ */
+
+  /* See algorithm description in __udivsi3  */
+
+  const int divisor_clz = __builtin_clzll (divisor);
+  const uint64_t max_divisor = divisor << divisor_clz;
+  const uint64_t max_qbit = 1ULL << divisor_clz;
+
+  uint64_t quotient = 0;
+  uint64_t remainder = dividend;
+
+  while (remainder >= divisor)
+    {
+      int shift = __builtin_clzll (remainder);
+      uint64_t scaled_divisor = max_divisor >> shift;
+      uint64_t quotient_bit = max_qbit >> shift;
+
+      int too_big = (scaled_divisor > remainder);
+      scaled_divisor >>= too_big;
+      quotient_bit >>= too_big;
+      remainder -= scaled_divisor;
+      quotient |= quotient_bit;
+    }
+  return quotient;
+}
+
+
+#ifndef __tilegx__
+/* __umodsi3 - 32 bit integer unsigned modulo  */
+static inline uint32_t __attribute__ ((always_inline))
+__umodsi3_inline (uint32_t dividend, uint32_t divisor)
+{
+  /* Shortcircuit mod by a power of two (and catch mod by zero).  */
+  const uint32_t mask = divisor - 1;
+  if ((divisor & mask) == 0)
+    {
+      if (divisor == 0)
+	{
+	  raise_intdiv ();
+	  return 0;
+	}
+      return dividend & mask;
+    }
+
+  /* We compute the remainder (a % b) by repeatedly subtracting off
+     multiples of b from a until a < b. The key is that subtracting
+     off a multiple of b does not affect the result mod b.
+
+     To make the algorithm run efficiently, we need to subtract
+     off a large multiple of b at each step. We subtract the largest
+     (b << N) that is <= a.
+
+     Finding N is easy. First, use clz(b) - clz(a) to find the N
+     that lines up the high bit of (b << N) with the high bit of a.
+     Any larger value of N would definitely make (b << N) > a,
+     which is too big.
+
+     Then, if (b << N) > a (because it has larger low bits), decrement
+     N by one.  This adjustment will definitely make (b << N) less
+     than a, because a's high bit is now one higher than b's.  */
+  const uint32_t max_divisor = divisor << __insn_clz (divisor);
+
+  uint32_t remainder = dividend;
+  while (remainder >= divisor)
+    {
+      const int shift = __insn_clz (remainder);
+      uint32_t scaled_divisor = max_divisor >> shift;
+      scaled_divisor >>= (scaled_divisor > remainder);
+      remainder -= scaled_divisor;
+    }
+
+  return remainder;
+}
+#endif /* !__tilegx__ */
+
+
+/* __umoddi3 - 64 bit integer unsigned modulo  */
+static inline uint64_t __attribute__ ((always_inline))
+__umoddi3_inline (uint64_t dividend, uint64_t divisor)
+{
+#ifndef __tilegx__
+  if (((uint32_t) (dividend >> 32) | ((uint32_t) (divisor >> 32))) == 0)
+    {
+      /* Operands both fit in 32 bits, so use faster 32 bit algorithm.  */
+      return __umodsi3_inline ((uint32_t) dividend, (uint32_t) divisor);
+    }
+#endif /* !__tilegx__ */
+
+  /* Shortcircuit mod by a power of two (and catch mod by zero).  */
+  const uint64_t mask = divisor - 1;
+  if ((divisor & mask) == 0)
+    {
+      if (divisor == 0)
+	{
+	  raise_intdiv ();
+	  return 0;
+	}
+      return dividend & mask;
+    }
+
+  /* See algorithm description in __umodsi3  */
+  const uint64_t max_divisor = divisor << __builtin_clzll (divisor);
+
+  uint64_t remainder = dividend;
+  while (remainder >= divisor)
+    {
+      const int shift = __builtin_clzll (remainder);
+      uint64_t scaled_divisor = max_divisor >> shift;
+      scaled_divisor >>= (scaled_divisor > remainder);
+      remainder -= scaled_divisor;
+    }
+
+  return remainder;
+}
+
+
+uint32_t __udivsi3 (uint32_t dividend, uint32_t divisor);
+#ifdef L_tile_udivsi3
+uint32_t
+__udivsi3 (uint32_t dividend, uint32_t divisor)
+{
+#ifndef __tilegx__
+  return __udivsi3_inline (dividend, divisor);
+#else /* !__tilegx__ */
+  uint64_t n = __udivdi3_inline (((uint64_t) dividend), ((uint64_t) divisor));
+  return (uint32_t) n;
+#endif /* !__tilegx__ */
+}
+#endif
+
+#define ABS(x) ((x) >= 0 ? (x) : -(x))
+
+int32_t __divsi3 (int32_t dividend, int32_t divisor);
+#ifdef L_tile_divsi3
+/* __divsi3 - 32 bit integer signed divide  */
+int32_t
+__divsi3 (int32_t dividend, int32_t divisor)
+{
+#ifndef __tilegx__
+  uint32_t n = __udivsi3_inline (ABS (dividend), ABS (divisor));
+#else /* !__tilegx__ */
+  uint64_t n =
+    __udivdi3_inline (ABS ((int64_t) dividend), ABS ((int64_t) divisor));
+#endif /* !__tilegx__ */
+  if ((dividend ^ divisor) < 0)
+    n = -n;
+  return (int32_t) n;
+}
+#endif
+
+
+uint64_t __udivdi3 (uint64_t dividend, uint64_t divisor);
+#ifdef L_tile_udivdi3
+uint64_t
+__udivdi3 (uint64_t dividend, uint64_t divisor)
+{
+  return __udivdi3_inline (dividend, divisor);
+}
+#endif
+
+/*__divdi3 - 64 bit integer signed divide  */
+int64_t __divdi3 (int64_t dividend, int64_t divisor);
+#ifdef L_tile_divdi3
+int64_t
+__divdi3 (int64_t dividend, int64_t divisor)
+{
+  uint64_t n = __udivdi3_inline (ABS (dividend), ABS (divisor));
+  if ((dividend ^ divisor) < 0)
+    n = -n;
+  return (int64_t) n;
+}
+#endif
+
+
+uint32_t __umodsi3 (uint32_t dividend, uint32_t divisor);
+#ifdef L_tile_umodsi3
+uint32_t
+__umodsi3 (uint32_t dividend, uint32_t divisor)
+{
+#ifndef __tilegx__
+  return __umodsi3_inline (dividend, divisor);
+#else /* !__tilegx__ */
+  return __umoddi3_inline ((uint64_t) dividend, (uint64_t) divisor);
+#endif /* !__tilegx__ */
+}
+#endif
+
+
+/* __modsi3 - 32 bit integer signed modulo  */
+int32_t __modsi3 (int32_t dividend, int32_t divisor);
+#ifdef L_tile_modsi3
+int32_t
+__modsi3 (int32_t dividend, int32_t divisor)
+{
+#ifndef __tilegx__
+  uint32_t remainder = __umodsi3_inline (ABS (dividend), ABS (divisor));
+#else /* !__tilegx__ */
+  uint64_t remainder =
+    __umoddi3_inline (ABS ((int64_t) dividend), ABS ((int64_t) divisor));
+#endif /* !__tilegx__ */
+  return (int32_t) ((dividend >= 0) ? remainder : -remainder);
+}
+#endif
+
+
+uint64_t __umoddi3 (uint64_t dividend, uint64_t divisor);
+#ifdef L_tile_umoddi3
+uint64_t
+__umoddi3 (uint64_t dividend, uint64_t divisor)
+{
+  return __umoddi3_inline (dividend, divisor);
+}
+#endif
+
+
+/* __moddi3 - 64 bit integer signed modulo  */
+int64_t __moddi3 (int64_t dividend, int64_t divisor);
+#ifdef L_tile_moddi3
+int64_t
+__moddi3 (int64_t dividend, int64_t divisor)
+{
+  uint64_t remainder = __umoddi3_inline (ABS (dividend), ABS (divisor));
+  return (int64_t) ((dividend >= 0) ? remainder : -remainder);
+}
+#endif
diff --git a/gcc-4.9/libgcc/config/tilepro/softmpy.S b/gcc-4.9/libgcc/config/tilepro/softmpy.S
new file mode 100644
index 000000000..4922dc764
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/softmpy.S
@@ -0,0 +1,94 @@
+/* 64-bit multiplication support for TILEPro.
+   Copyright (C) 2011-2014 Free Software Foundation, Inc.
+   Contributed by Walter Lee (walt@tilera.com)
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* 64-bit multiplication support.  */
+
+	.file "softmpy.S"
+
+/* Parameters */
+#define lo0             r9   /* low 32 bits of n0  */
+#define hi0             r1   /* high 32 bits of n0 */
+#define lo1             r2   /* low 32 bits of n1  */
+#define hi1             r3   /* high 32 bits of n1 */
+
+/* temps */
+#define result1_a       r4
+#define result1_b       r5
+
+#define tmp0            r6
+#define tmp0_left_16    r7
+#define tmp1            r8
+
+	.section .text.__muldi3, "ax"
+	.align 8
+	.globl __muldi3
+	.type __muldi3, @function
+__muldi3:
+	{
+	 move	     lo0, r0 /* so we can write "out r0" while "in r0" alive */
+	 mulhl_uu    tmp0, lo1, r0
+	}
+	{
+	 mulll_uu    result1_a, lo1, hi0
+	}
+	{
+	 move        tmp1, tmp0
+	 mulhla_uu   tmp0, lo0, lo1
+	}
+	{
+	 mulhlsa_uu  result1_a, lo1, hi0
+	}
+	{
+	 mulll_uu    result1_b, lo0, hi1
+	 slt_u       tmp1, tmp0, tmp1
+	}
+	{
+	 mulhlsa_uu  result1_a, lo0, hi1
+	 shli        r0, tmp0, 16
+	}
+	{
+	 move        tmp0_left_16, r0
+	 mulhha_uu   result1_b, lo0, lo1
+	}
+	{
+	 mullla_uu   r0, lo1, lo0
+	 shli        tmp1, tmp1, 16
+	}
+	{
+	 mulhlsa_uu  result1_b, hi0, lo1
+	 inthh       tmp1, tmp1, tmp0
+	}
+	{
+	 mulhlsa_uu  result1_a, hi1, lo0
+	 slt_u       tmp0, r0, tmp0_left_16
+	}
+	/* NOTE: this will stall for a cycle here. Oh well. */
+	{
+	 add         r1, tmp0, tmp1
+	 add         result1_a, result1_a, result1_b
+	}
+	{
+	 add         r1, r1, result1_a
+	 jrp         lr
+	}
+	.size __muldi3,.-__muldi3
diff --git a/gcc-4.9/libgcc/config/tilepro/t-crtstuff b/gcc-4.9/libgcc/config/tilepro/t-crtstuff
new file mode 100644
index 000000000..eddc45ce9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/t-crtstuff
@@ -0,0 +1,4 @@
+# crtend*.o cannot be compiled without -fno-asynchronous-unwind-tables,
+# because then __FRAME_END__ might not be the last thing in .eh_frame
+# section.
+CRTSTUFF_T_CFLAGS += -fno-asynchronous-unwind-tables
diff --git a/gcc-4.9/libgcc/config/tilepro/t-tilepro b/gcc-4.9/libgcc/config/tilepro/t-tilepro
new file mode 100644
index 000000000..eb6894ce1
--- /dev/null
+++ b/gcc-4.9/libgcc/config/tilepro/t-tilepro
@@ -0,0 +1,33 @@
+LIB2ADD += \
+  $(srcdir)/config/tilepro/softmpy.S \
+  $(srcdir)/config/tilepro/atomic.c
+
+LIB2FUNCS_EXCLUDE += \
+  _divdi3 \
+  _moddi3 \
+  _muldi3 \
+  _udivdi3 \
+  _umoddi3
+
+SOFTDIVIDE_FUNCS := \
+  _tile_udivsi3 \
+  _tile_divsi3 \
+  _tile_udivdi3 \
+  _tile_divdi3 \
+  _tile_umodsi3 \
+  _tile_modsi3 \
+  _tile_umoddi3 \
+  _tile_moddi3
+
+softdivide-o = $(patsubst %,%$(objext),$(SOFTDIVIDE_FUNCS))
+$(softdivide-o): %$(objext): $(srcdir)/config/tilepro/softdivide.c
+	$(gcc_compile) -ffunction-sections -DMAYBE_STATIC= -DL$* -c $< \
+	  $(vis_hide)
+libgcc-objects += $(softdivide-o)
+
+ifeq ($(enable_shared),yes)
+softdivide-s-o = $(patsubst %,%_s$(objext),$(SOFTDIVIDE_FUNCS))
+$(softdivide-s-o): %_s$(objext): $(srcdir)/config/tilepro/softdivide.c
+	$(gcc_s_compile) -ffunction-sections -DMAYBE_STATIC= -DL$* -c $<
+libgcc-s-objects += $(softdivide-s-o)
+endif
diff --git a/gcc-4.9/libgcc/config/unwind-dw2-fde-darwin.c b/gcc-4.9/libgcc/config/unwind-dw2-fde-darwin.c
new file mode 100644
index 000000000..671309cae
--- /dev/null
+++ b/gcc-4.9/libgcc/config/unwind-dw2-fde-darwin.c
@@ -0,0 +1,288 @@
+/* Copyright (C) 2001-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Locate the FDE entry for a given address, using Darwin's keymgr support.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include <string.h>
+#include <stdlib.h>
+#include "dwarf2.h"
+#include "unwind.h"
+#define NO_BASE_OF_ENCODED_VALUE
+#define DWARF2_OBJECT_END_PTR_EXTENSION
+#include "unwind-pe.h"
+#include "unwind-dw2-fde.h"
+/* Carefully don't include gthr.h.  */
+
+typedef int __gthread_mutex_t;
+#define __gthread_mutex_lock(x)  (void)(x)
+#define __gthread_mutex_unlock(x) (void)(x)
+
+static const fde * _Unwind_Find_registered_FDE (void *pc,
+						struct dwarf_eh_bases *bases);
+
+#define _Unwind_Find_FDE _Unwind_Find_registered_FDE
+#include "unwind-dw2-fde.c"
+#undef _Unwind_Find_FDE
+
+/* KeyMgr stuff.  */
+#define KEYMGR_GCC3_LIVE_IMAGE_LIST     301     /* loaded images  */
+#define KEYMGR_GCC3_DW2_OBJ_LIST        302     /* Dwarf2 object list  */
+
+extern void *_keymgr_get_and_lock_processwide_ptr (int);
+extern void _keymgr_set_and_unlock_processwide_ptr (int, void *);
+extern void _keymgr_unlock_processwide_ptr (int);
+
+struct mach_header;
+struct mach_header_64;
+extern char *getsectdatafromheader (struct mach_header*, const char*,
+				    const char *, unsigned long *);
+extern char *getsectdatafromheader_64 (struct mach_header_64*, const char*,
+				       const char *, unsigned long *);
+
+/* This is referenced from KEYMGR_GCC3_DW2_OBJ_LIST.  */
+struct km_object_info {
+  struct object *seen_objects;
+  struct object *unseen_objects;
+  unsigned spare[2];
+};
+
+/* Node of KEYMGR_GCC3_LIVE_IMAGE_LIST.  Info about each resident image.  */
+struct live_images {
+  unsigned long this_size;                      /* sizeof (live_images)  */
+  struct mach_header *mh;                       /* the image info  */
+  unsigned long vm_slide;
+  void (*destructor)(struct live_images *);     /* destructor for this  */
+  struct live_images *next;
+  unsigned int examined_p;
+  void *fde;
+  void *object_info;
+  unsigned long info[2];                        /* Future use.  */
+};
+
+/* Bits in the examined_p field of struct live_images.  */
+enum {
+  EXAMINED_IMAGE_MASK = 1,	/* We've seen this one.  */
+  ALLOCED_IMAGE_MASK = 2,	/* The FDE entries were allocated by
+				   malloc, and must be freed.  This isn't
+				   used by newer libgcc versions.  */
+  IMAGE_IS_TEXT_MASK = 4,	/* This image is in the TEXT segment.  */
+  DESTRUCTOR_MAY_BE_CALLED_LIVE = 8  /* The destructor may be called on an
+					object that's part of the live
+					image list.  */
+};
+
+/* Delete any data we allocated on a live_images structure.  Either
+   IMAGE has already been removed from the
+   KEYMGR_GCC3_LIVE_IMAGE_LIST and the struct will be deleted
+   after we return, or that list is locked and we're being called
+   because this object might be about to be unloaded.  Called by
+   KeyMgr.  */
+
+static void
+live_image_destructor (struct live_images *image)
+{
+  if (image->object_info)
+    {
+      struct km_object_info *the_obj_info;
+
+      the_obj_info =
+	_keymgr_get_and_lock_processwide_ptr (KEYMGR_GCC3_DW2_OBJ_LIST);
+      if (the_obj_info)
+	{
+	  seen_objects = the_obj_info->seen_objects;
+	  unseen_objects = the_obj_info->unseen_objects;
+
+	  /* Free any sorted arrays.  */
+	  __deregister_frame_info_bases (image->fde);
+
+	  the_obj_info->seen_objects = seen_objects;
+	  the_obj_info->unseen_objects = unseen_objects;
+	}
+      _keymgr_set_and_unlock_processwide_ptr (KEYMGR_GCC3_DW2_OBJ_LIST,
+					      the_obj_info);
+
+      free (image->object_info);
+      image->object_info = NULL;
+      if (image->examined_p & ALLOCED_IMAGE_MASK)
+	free (image->fde);
+      image->fde = NULL;
+    }
+  image->examined_p = 0;
+  image->destructor = NULL;
+}
+
+/* Run through the list of live images.  If we can allocate memory,
+   give each unseen image a new `struct object'.  Even if we can't,
+   check whether the PC is inside the FDE of each unseen image.
+ */
+
+static inline const fde *
+examine_objects (void *pc, struct dwarf_eh_bases *bases, int dont_alloc)
+{
+  const fde *result = NULL;
+  struct live_images *image;
+
+  image = _keymgr_get_and_lock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST);
+
+  for (; image != NULL; image = image->next)
+    if ((image->examined_p & EXAMINED_IMAGE_MASK) == 0)
+      {
+	char *fde = NULL;
+	unsigned long sz;
+
+	/* For ppc only check whether or not we have __DATA eh frames.  */
+#ifdef __ppc__
+	fde = getsectdatafromheader (image->mh, "__DATA", "__eh_frame", &sz);
+#endif
+
+	if (fde == NULL)
+	  {
+#if __LP64__
+	    fde = getsectdatafromheader_64 ((struct mach_header_64 *) image->mh,
+					    "__TEXT", "__eh_frame", &sz);
+#else
+	    fde = getsectdatafromheader (image->mh, "__TEXT",
+					 "__eh_frame", &sz);
+#endif
+	    if (fde != NULL)
+	      image->examined_p |= IMAGE_IS_TEXT_MASK;
+	  }
+
+	/* If .eh_frame is empty, don't register at all.  */
+	if (fde != NULL && sz > 0)
+	  {
+	    char *real_fde = (fde + image->vm_slide);
+	    struct object *ob = NULL;
+	    struct object panicob;
+
+	    if (! dont_alloc)
+	      ob = calloc (1, sizeof (struct object));
+	    dont_alloc |= ob == NULL;
+	    if (dont_alloc)
+	      ob = &panicob;
+
+	    ob->pc_begin = (void *)-1;
+	    ob->tbase = 0;
+	    ob->dbase = 0;
+	    ob->u.single = (struct dwarf_fde *)real_fde;
+	    ob->s.i = 0;
+	    ob->s.b.encoding = DW_EH_PE_omit;
+	    ob->fde_end = real_fde + sz;
+
+	    image->fde = real_fde;
+
+	    result = search_object (ob, pc);
+
+	    if (! dont_alloc)
+	      {
+		struct object **p;
+
+		image->destructor = live_image_destructor;
+		image->object_info = ob;
+
+		image->examined_p |= (EXAMINED_IMAGE_MASK
+				      | DESTRUCTOR_MAY_BE_CALLED_LIVE);
+
+		/* Insert the object into the classified list.  */
+		for (p = &seen_objects; *p ; p = &(*p)->next)
+		  if ((*p)->pc_begin < ob->pc_begin)
+		    break;
+		ob->next = *p;
+		*p = ob;
+	      }
+
+	    if (result)
+	      {
+		int encoding;
+		_Unwind_Ptr func;
+
+		bases->tbase = ob->tbase;
+		bases->dbase = ob->dbase;
+
+		encoding = ob->s.b.encoding;
+		if (ob->s.b.mixed_encoding)
+		  encoding = get_fde_encoding (result);
+		read_encoded_value_with_base (encoding,
+					      base_from_object (encoding, ob),
+					      result->pc_begin, &func);
+		bases->func = (void *) func;
+		break;
+	      }
+	  }
+	else
+	  image->examined_p |= EXAMINED_IMAGE_MASK;
+      }
+
+  _keymgr_unlock_processwide_ptr (KEYMGR_GCC3_LIVE_IMAGE_LIST);
+
+  return result;
+}
+
+const fde *
+_Unwind_Find_FDE (void *pc, struct dwarf_eh_bases *bases)
+{
+  struct km_object_info *the_obj_info;
+  const fde *ret = NULL;
+
+  the_obj_info =
+    _keymgr_get_and_lock_processwide_ptr (KEYMGR_GCC3_DW2_OBJ_LIST);
+  if (! the_obj_info)
+    the_obj_info = calloc (1, sizeof (*the_obj_info));
+
+  if (the_obj_info != NULL)
+    {
+      seen_objects = the_obj_info->seen_objects;
+      unseen_objects = the_obj_info->unseen_objects;
+
+      ret = _Unwind_Find_registered_FDE (pc, bases);
+    }
+
+  /* OK, didn't find it in the list of FDEs we've seen before,
+     so go through and look at the new ones.  */
+  if (ret == NULL)
+    ret = examine_objects (pc, bases, the_obj_info == NULL);
+
+  if (the_obj_info != NULL)
+    {
+      the_obj_info->seen_objects = seen_objects;
+      the_obj_info->unseen_objects = unseen_objects;
+    }
+  _keymgr_set_and_unlock_processwide_ptr (KEYMGR_GCC3_DW2_OBJ_LIST,
+					  the_obj_info);
+  return ret;
+}
+
+void *
+_darwin10_Unwind_FindEnclosingFunction (void *pc ATTRIBUTE_UNUSED)
+{
+#if __MACH__ && (__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1060)
+  struct dwarf_eh_bases bases;
+  const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
+  if (fde)
+    return bases.func;
+#endif
+  return NULL;
+}
+
diff --git a/gcc-4.9/libgcc/config/v850/lib1funcs.S b/gcc-4.9/libgcc/config/v850/lib1funcs.S
new file mode 100644
index 000000000..1ad11738b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/v850/lib1funcs.S
@@ -0,0 +1,2330 @@
+/* libgcc routines for NEC V850.
+   Copyright (C) 1996-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef L_mulsi3
+	.text
+	.globl ___mulsi3
+	.type  ___mulsi3,@function
+___mulsi3:
+#ifdef __v850__	
+/*
+   #define SHIFT 12
+   #define MASK ((1 << SHIFT) - 1)
+    
+   #define STEP(i, j)                               \
+   ({                                               \
+       short a_part = (a >> (i)) & MASK;            \
+       short b_part = (b >> (j)) & MASK;            \
+       int res = (((int) a_part) * ((int) b_part)); \
+       res;                                         \
+   })
+  
+   int
+   __mulsi3 (unsigned a, unsigned b)
+   {
+      return STEP (0, 0) +
+          ((STEP (SHIFT, 0) + STEP (0, SHIFT)) << SHIFT) +
+          ((STEP (0, 2 * SHIFT) + STEP (SHIFT, SHIFT) + STEP (2 * SHIFT, 0))
+           << (2 * SHIFT));
+   }
+*/
+        mov   r6, r14
+        movea lo(32767), r0, r10
+        and   r10, r14
+        mov   r7,  r15
+        and   r10, r15
+        shr   15,  r6
+        mov   r6,  r13
+        and   r10, r13
+        shr   15,  r7
+        mov   r7,  r12
+        and   r10, r12
+        shr   15,  r6
+        shr   15,  r7
+        mov   r14, r10
+        mulh  r15, r10
+        mov   r14, r11
+        mulh  r12, r11
+        mov   r13, r16
+        mulh  r15, r16
+        mulh  r14, r7
+        mulh  r15, r6
+        add   r16, r11
+        mulh  r13, r12
+        shl   15,  r11
+        add   r11, r10
+        add   r12, r7
+        add   r6,  r7
+        shl   30,  r7
+        add   r7,  r10
+        jmp   [r31]
+#endif /* __v850__ */
+#if defined(__v850e__) || defined(__v850ea__) || defined(__v850e2__) || defined(__v850e2v3__) || defined(__v850e3v5__)
+        /* This routine is almost unneccesarry because gcc
+           generates the MUL instruction for the RTX mulsi3.
+           But if someone wants to link his application with
+           previsously compiled v850 objects then they will 
+	   need this function.  */
+ 
+        /* It isn't good to put the inst sequence as below;
+              mul r7, r6,
+              mov r6, r10, r0
+           In this case, there is a RAW hazard between them.
+           MUL inst takes 2 cycle in EX stage, then MOV inst
+           must wait 1cycle.  */
+        mov   r7, r10
+        mul   r6, r10, r0
+        jmp   [r31]
+#endif /* __v850e__ */
+	.size ___mulsi3,.-___mulsi3
+#endif /* L_mulsi3 */
+
+
+#ifdef L_udivsi3
+	.text
+	.global ___udivsi3
+	.type	___udivsi3,@function
+___udivsi3:
+#ifdef __v850__
+	mov 1,r12
+	mov 0,r10
+	cmp r6,r7
+	bnl .L12
+	movhi hi(-2147483648),r0,r13
+	cmp r0,r7
+	blt .L12
+.L4:
+	shl 1,r7
+	shl 1,r12
+	cmp r6,r7
+	bnl .L12
+	cmp r0,r12
+	be .L8
+	mov r7,r19
+	and r13,r19
+	be .L4
+	br .L12
+.L9:
+	cmp r7,r6
+	bl .L10
+	sub r7,r6
+	or r12,r10
+.L10:
+	shr 1,r12
+	shr 1,r7
+.L12:
+	cmp r0,r12
+	bne .L9
+.L8:
+	jmp [r31]
+
+#else /* defined(__v850e__) */
+
+	/* See comments at end of __mulsi3.  */
+	mov   r6, r10	
+	divu  r7, r10, r0
+	jmp   [r31]		
+
+#endif /* __v850e__ */
+
+	.size ___udivsi3,.-___udivsi3
+#endif
+
+#ifdef L_divsi3
+	.text
+	.globl ___divsi3
+	.type  ___divsi3,@function
+___divsi3:
+#ifdef __v850__
+	add -8,sp
+	st.w r31,4[sp]
+	st.w r22,0[sp]
+	mov 1,r22
+	tst r7,r7
+	bp .L3
+	subr r0,r7
+	subr r0,r22
+.L3:
+	tst r6,r6
+	bp .L4
+	subr r0,r6
+	subr r0,r22
+.L4:
+	jarl ___udivsi3,r31
+	cmp r0,r22
+	bp .L7
+	subr r0,r10
+.L7:
+	ld.w 0[sp],r22
+	ld.w 4[sp],r31
+	add 8,sp
+	jmp [r31]
+
+#else /* defined(__v850e__) */
+
+	/* See comments at end of __mulsi3.  */
+	mov   r6, r10
+	div   r7, r10, r0
+	jmp   [r31]
+
+#endif /* __v850e__ */
+
+	.size ___divsi3,.-___divsi3
+#endif
+
+#ifdef  L_umodsi3
+	.text
+	.globl ___umodsi3
+	.type  ___umodsi3,@function
+___umodsi3:
+#ifdef __v850__
+	add -12,sp
+	st.w r31,8[sp]
+	st.w r7,4[sp]
+	st.w r6,0[sp]
+	jarl ___udivsi3,r31
+	ld.w 4[sp],r7
+	mov r10,r6
+	jarl ___mulsi3,r31
+	ld.w 0[sp],r6
+	subr r6,r10
+	ld.w 8[sp],r31
+	add 12,sp
+	jmp [r31]
+
+#else /* defined(__v850e__) */
+
+	/* See comments at end of __mulsi3.  */
+	divu  r7, r6, r10
+	jmp   [r31]
+
+#endif /* __v850e__ */
+
+	.size ___umodsi3,.-___umodsi3
+#endif /* L_umodsi3 */
+
+#ifdef  L_modsi3
+	.text
+	.globl ___modsi3
+	.type  ___modsi3,@function
+___modsi3:
+#ifdef __v850__	
+	add -12,sp
+	st.w r31,8[sp]
+	st.w r7,4[sp]
+	st.w r6,0[sp]
+	jarl ___divsi3,r31
+	ld.w 4[sp],r7
+	mov r10,r6
+	jarl ___mulsi3,r31
+	ld.w 0[sp],r6
+	subr r6,r10
+	ld.w 8[sp],r31
+	add 12,sp
+	jmp [r31]
+
+#else /* defined(__v850e__) */
+
+	/* See comments at end of __mulsi3.  */
+	div  r7, r6, r10
+	jmp [r31]
+
+#endif /* __v850e__ */
+
+	.size ___modsi3,.-___modsi3
+#endif /* L_modsi3 */
+
+#ifdef	L_save_2
+	.text
+	.align	2
+	.globl	__save_r2_r29
+	.type	__save_r2_r29,@function
+	/* Allocate space and save registers 2, 20 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r2_r29,r10.  */
+__save_r2_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-44,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	sst.w	r20,36[ep]
+	sst.w	r2,40[ep]
+	mov	r1,ep
+#else
+	addi	-44,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+	st.w	r20,36[sp]
+	st.w	r2,40[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r2_r29,.-__save_r2_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r2_r29.  */
+	.align	2
+	.globl	__return_r2_r29
+	.type	__return_r2_r29,@function
+__return_r2_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	sld.w	36[ep],r20
+	sld.w	40[ep],r2
+	addi	44,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r21
+	ld.w	36[sp],r20
+	ld.w	40[sp],r2
+	addi	44,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r2_r29,.-__return_r2_r29
+#endif /* L_save_2 */
+
+#ifdef	L_save_20
+	.text
+	.align	2
+	.globl	__save_r20_r29
+	.type	__save_r20_r29,@function
+	/* Allocate space and save registers 20 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r20_r29,r10.  */
+__save_r20_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-40,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	sst.w	r20,36[ep]
+	mov	r1,ep
+#else
+	addi	-40,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+	st.w	r20,36[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r20_r29,.-__save_r20_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r20_r29.  */
+	.align	2
+	.globl	__return_r20_r29
+	.type	__return_r20_r29,@function
+__return_r20_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	sld.w	36[ep],r20
+	addi	40,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r21
+	ld.w	36[sp],r20
+	addi	40,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r20_r29,.-__return_r20_r29
+#endif /* L_save_20 */
+
+#ifdef	L_save_21
+	.text
+	.align	2
+	.globl	__save_r21_r29
+	.type	__save_r21_r29,@function
+	/* Allocate space and save registers 21 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r21_r29,r10.  */
+__save_r21_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-36,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	mov	r1,ep
+#else
+	addi	-36,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r21_r29,.-__save_r21_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r21_r29.  */
+	.align	2
+	.globl	__return_r21_r29
+	.type	__return_r21_r29,@function
+__return_r21_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	addi	36,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r21
+	addi	36,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r21_r29,.-__return_r21_r29
+#endif /* L_save_21 */
+
+#ifdef	L_save_22
+	.text
+	.align	2
+	.globl	__save_r22_r29
+	.type	__save_r22_r29,@function
+	/* Allocate space and save registers 22 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r22_r29,r10.  */
+__save_r22_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-32,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	mov	r1,ep
+#else
+	addi	-32,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r22_r29,.-__save_r22_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r22_r29.  */
+	.align	2
+	.globl	__return_r22_r29
+	.type	__return_r22_r29,@function
+__return_r22_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	addi	32,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	addi	32,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r22_r29,.-__return_r22_r29
+#endif /* L_save_22 */
+
+#ifdef	L_save_23
+	.text
+	.align	2
+	.globl	__save_r23_r29
+	.type	__save_r23_r29,@function
+	/* Allocate space and save registers 23 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r23_r29,r10.  */
+__save_r23_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-28,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	mov	r1,ep
+#else
+	addi	-28,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r23_r29,.-__save_r23_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r23_r29.  */
+	.align	2
+	.globl	__return_r23_r29
+	.type	__return_r23_r29,@function
+__return_r23_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	addi	28,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	addi	28,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r23_r29,.-__return_r23_r29
+#endif /* L_save_23 */
+
+#ifdef	L_save_24
+	.text
+	.align	2
+	.globl	__save_r24_r29
+	.type	__save_r24_r29,@function
+	/* Allocate space and save registers 24 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r24_r29,r10.  */
+__save_r24_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-24,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	mov	r1,ep
+#else
+	addi	-24,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r24_r29,.-__save_r24_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r24_r29.  */
+	.align	2
+	.globl	__return_r24_r29
+	.type	__return_r24_r29,@function
+__return_r24_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	addi	24,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	addi	24,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r24_r29,.-__return_r24_r29
+#endif /* L_save_24 */
+
+#ifdef	L_save_25
+	.text
+	.align	2
+	.globl	__save_r25_r29
+	.type	__save_r25_r29,@function
+	/* Allocate space and save registers 25 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r25_r29,r10.  */
+__save_r25_r29:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-20,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	mov	r1,ep
+#else
+	addi	-20,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r25_r29,.-__save_r25_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r25_r29.  */
+	.align	2
+	.globl	__return_r25_r29
+	.type	__return_r25_r29,@function
+__return_r25_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	addi	20,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[ep],r29
+	ld.w	4[ep],r28
+	ld.w	8[ep],r27
+	ld.w	12[ep],r26
+	ld.w	16[ep],r25
+	addi	20,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r25_r29,.-__return_r25_r29
+#endif /* L_save_25 */
+
+#ifdef	L_save_26
+	.text
+	.align	2
+	.globl	__save_r26_r29
+	.type	__save_r26_r29,@function
+	/* Allocate space and save registers 26 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r26_r29,r10.  */
+__save_r26_r29:
+#ifdef __EP__
+	mov	ep,r1
+	add	-16,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	mov	r1,ep
+#else
+	add	-16,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r26_r29,.-__save_r26_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r26_r29.  */
+	.align	2
+	.globl	__return_r26_r29
+	.type	__return_r26_r29,@function
+__return_r26_r29:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	addi	16,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	addi	16,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r26_r29,.-__return_r26_r29
+#endif /* L_save_26 */
+
+#ifdef	L_save_27
+	.text
+	.align	2
+	.globl	__save_r27_r29
+	.type	__save_r27_r29,@function
+	/* Allocate space and save registers 27 .. 29 on the stack.  */
+	/* Called via:	jalr __save_r27_r29,r10.  */
+__save_r27_r29:
+	add	-12,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	jmp	[r10]
+	.size	__save_r27_r29,.-__save_r27_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r27_r29.  */
+	.align	2
+	.globl	__return_r27_r29
+	.type	__return_r27_r29,@function
+__return_r27_r29:
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	add	12,sp
+	jmp	[r31]
+	.size	__return_r27_r29,.-__return_r27_r29
+#endif /* L_save_27 */
+
+#ifdef	L_save_28
+	.text
+	.align	2
+	.globl	__save_r28_r29
+	.type	__save_r28_r29,@function
+	/* Allocate space and save registers 28,29 on the stack.  */
+	/* Called via:	jalr __save_r28_r29,r10.  */
+__save_r28_r29:
+	add	-8,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	jmp	[r10]
+	.size	__save_r28_r29,.-__save_r28_r29
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r28_r29.  */
+	.align	2
+	.globl	__return_r28_r29
+	.type	__return_r28_r29,@function
+__return_r28_r29:
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	add	8,sp
+	jmp	[r31]
+	.size	__return_r28_r29,.-__return_r28_r29
+#endif /* L_save_28 */
+
+#ifdef	L_save_29
+	.text
+	.align	2
+	.globl	__save_r29
+	.type	__save_r29,@function
+	/* Allocate space and save register 29 on the stack.  */
+	/* Called via:	jalr __save_r29,r10.  */
+__save_r29:
+	add	-4,sp
+	st.w	r29,0[sp]
+	jmp	[r10]
+	.size	__save_r29,.-__save_r29
+
+	/* Restore saved register 29, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r29.  */
+	.align	2
+	.globl	__return_r29
+	.type	__return_r29,@function
+__return_r29:
+	ld.w	0[sp],r29
+	add	4,sp
+	jmp	[r31]
+	.size	__return_r29,.-__return_r29
+#endif /* L_save_28 */
+
+#ifdef	L_save_2c
+	.text
+	.align	2
+	.globl	__save_r2_r31
+	.type	__save_r2_r31,@function
+	/* Allocate space and save registers 20 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r2_r31,r10.  */
+__save_r2_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-48,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	sst.w	r20,36[ep]
+	sst.w	r2,40[ep]
+	sst.w	r31,44[ep]
+	mov	r1,ep
+#else
+	addi	-48,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+	st.w	r20,36[sp]
+	st.w	r2,40[sp]
+	st.w	r31,44[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r2_r31,.-__save_r2_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r20_r31.  */
+	.align	2
+	.globl	__return_r2_r31
+	.type	__return_r2_r31,@function
+__return_r2_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	sld.w	36[ep],r20
+	sld.w	40[ep],r2
+	sld.w	44[ep],r31
+	addi	48,sp,sp
+	mov	r1,ep
+#else
+	ld.w	44[sp],r29
+	ld.w	40[sp],r28
+	ld.w	36[sp],r27
+	ld.w	32[sp],r26
+	ld.w	28[sp],r25
+	ld.w	24[sp],r24
+	ld.w	20[sp],r23
+	ld.w	16[sp],r22
+	ld.w	12[sp],r21
+	ld.w	8[sp],r20
+	ld.w	4[sp],r2
+	ld.w	0[sp],r31
+	addi	48,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r2_r31,.-__return_r2_r31
+#endif /* L_save_2c */
+
+#ifdef	L_save_20c
+	.text
+	.align	2
+	.globl	__save_r20_r31
+	.type	__save_r20_r31,@function
+	/* Allocate space and save registers 20 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r20_r31,r10.  */
+__save_r20_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-44,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	sst.w	r20,36[ep]
+	sst.w	r31,40[ep]
+	mov	r1,ep
+#else
+	addi	-44,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+	st.w	r20,36[sp]
+	st.w	r31,40[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r20_r31,.-__save_r20_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r20_r31.  */
+	.align	2
+	.globl	__return_r20_r31
+	.type	__return_r20_r31,@function
+__return_r20_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	sld.w	36[ep],r20
+	sld.w	40[ep],r31
+	addi	44,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r21
+	ld.w	36[sp],r20
+	ld.w	40[sp],r31
+	addi	44,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r20_r31,.-__return_r20_r31
+#endif /* L_save_20c */
+
+#ifdef	L_save_21c
+	.text
+	.align	2
+	.globl	__save_r21_r31
+	.type	__save_r21_r31,@function
+	/* Allocate space and save registers 21 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r21_r31,r10.  */
+__save_r21_r31:
+#ifdef __EP__	
+	mov	ep,r1
+	addi	-40,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r21,32[ep]
+	sst.w	r31,36[ep]
+	mov	r1,ep
+	jmp	[r10]
+#else	
+	addi	-40,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r21,32[sp]
+	st.w	r31,36[sp]
+	jmp	[r10]
+#endif	
+	.size	__save_r21_r31,.-__save_r21_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r21_r31.  */
+	.align	2
+	.globl	__return_r21_r31
+	.type	__return_r21_r31,@function
+__return_r21_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r21
+	sld.w	36[ep],r31
+	addi	40,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r21
+	ld.w	36[sp],r31
+	addi	40,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r21_r31,.-__return_r21_r31
+#endif /* L_save_21c */
+
+#ifdef	L_save_22c
+	.text
+	.align	2
+	.globl	__save_r22_r31
+	.type	__save_r22_r31,@function
+	/* Allocate space and save registers 22 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r22_r31,r10.  */
+__save_r22_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-36,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r22,28[ep]
+	sst.w	r31,32[ep]
+	mov	r1,ep
+#else
+	addi	-36,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r22,28[sp]
+	st.w	r31,32[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r22_r31,.-__save_r22_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r22_r31.  */
+	.align	2
+	.globl	__return_r22_r31
+	.type	__return_r22_r31,@function
+__return_r22_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r22
+	sld.w	32[ep],r31
+	addi	36,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r22
+	ld.w	32[sp],r31
+	addi	36,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r22_r31,.-__return_r22_r31
+#endif /* L_save_22c */
+
+#ifdef	L_save_23c
+	.text
+	.align	2
+	.globl	__save_r23_r31
+	.type	__save_r23_r31,@function
+	/* Allocate space and save registers 23 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r23_r31,r10.  */
+__save_r23_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-32,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r23,24[ep]
+	sst.w	r31,28[ep]
+	mov	r1,ep
+#else
+	addi	-32,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r23,24[sp]
+	st.w	r31,28[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r23_r31,.-__save_r23_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r23_r31.  */
+	.align	2
+	.globl	__return_r23_r31
+	.type	__return_r23_r31,@function
+__return_r23_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r23
+	sld.w	28[ep],r31
+	addi	32,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r23
+	ld.w	28[sp],r31
+	addi	32,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r23_r31,.-__return_r23_r31
+#endif /* L_save_23c */
+
+#ifdef	L_save_24c
+	.text
+	.align	2
+	.globl	__save_r24_r31
+	.type	__save_r24_r31,@function
+	/* Allocate space and save registers 24 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r24_r31,r10.  */
+__save_r24_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-28,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r24,20[ep]
+	sst.w	r31,24[ep]
+	mov	r1,ep
+#else
+	addi	-28,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r24,20[sp]
+	st.w	r31,24[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r24_r31,.-__save_r24_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r24_r31.  */
+	.align	2
+	.globl	__return_r24_r31
+	.type	__return_r24_r31,@function
+__return_r24_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r24
+	sld.w	24[ep],r31
+	addi	28,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r24
+	ld.w	24[sp],r31
+	addi	28,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r24_r31,.-__return_r24_r31
+#endif /* L_save_24c */
+
+#ifdef	L_save_25c
+	.text
+	.align	2
+	.globl	__save_r25_r31
+	.type	__save_r25_r31,@function
+	/* Allocate space and save registers 25 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r25_r31,r10.  */
+__save_r25_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-24,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r25,16[ep]
+	sst.w	r31,20[ep]
+	mov	r1,ep
+#else
+	addi	-24,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r25,16[sp]
+	st.w	r31,20[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r25_r31,.-__save_r25_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r25_r31.  */
+	.align	2
+	.globl	__return_r25_r31
+	.type	__return_r25_r31,@function
+__return_r25_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r25
+	sld.w	20[ep],r31
+	addi	24,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r25
+	ld.w	20[sp],r31
+	addi	24,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r25_r31,.-__return_r25_r31
+#endif /* L_save_25c */
+
+#ifdef	L_save_26c
+	.text
+	.align	2
+	.globl	__save_r26_r31
+	.type	__save_r26_r31,@function
+	/* Allocate space and save registers 26 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r26_r31,r10.  */
+__save_r26_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-20,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r26,12[ep]
+	sst.w	r31,16[ep]
+	mov	r1,ep
+#else
+	addi	-20,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r26,12[sp]
+	st.w	r31,16[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r26_r31,.-__save_r26_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r26_r31.  */
+	.align	2
+	.globl	__return_r26_r31
+	.type	__return_r26_r31,@function
+__return_r26_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r26
+	sld.w	16[ep],r31
+	addi	20,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r26
+	ld.w	16[sp],r31
+	addi	20,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r26_r31,.-__return_r26_r31
+#endif /* L_save_26c */
+
+#ifdef	L_save_27c
+	.text
+	.align	2
+	.globl	__save_r27_r31
+	.type	__save_r27_r31,@function
+	/* Allocate space and save registers 27 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r27_r31,r10.  */
+__save_r27_r31:
+#ifdef __EP__
+	mov	ep,r1
+	addi	-16,sp,sp
+	mov	sp,ep
+	sst.w	r29,0[ep]
+	sst.w	r28,4[ep]
+	sst.w	r27,8[ep]
+	sst.w	r31,12[ep]
+	mov	r1,ep
+#else
+	addi	-16,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r27,8[sp]
+	st.w	r31,12[sp]
+#endif
+	jmp	[r10]
+	.size	__save_r27_r31,.-__save_r27_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r27_r31.  */
+	.align	2
+	.globl	__return_r27_r31
+	.type	__return_r27_r31,@function
+__return_r27_r31:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	0[ep],r29
+	sld.w	4[ep],r28
+	sld.w	8[ep],r27
+	sld.w	12[ep],r31
+	addi	16,sp,sp
+	mov	r1,ep
+#else
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r27
+	ld.w	12[sp],r31
+	addi	16,sp,sp
+#endif
+	jmp	[r31]
+	.size	__return_r27_r31,.-__return_r27_r31
+#endif /* L_save_27c */
+
+#ifdef	L_save_28c
+	.text
+	.align	2
+	.globl	__save_r28_r31
+	.type	__save_r28_r31,@function
+	/* Allocate space and save registers 28 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r28_r31,r10.  */
+__save_r28_r31:
+	addi	-12,sp,sp
+	st.w	r29,0[sp]
+	st.w	r28,4[sp]
+	st.w	r31,8[sp]
+	jmp	[r10]
+	.size	__save_r28_r31,.-__save_r28_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r28_r31.  */
+	.align	2
+	.globl	__return_r28_r31
+	.type	__return_r28_r31,@function
+__return_r28_r31:
+	ld.w	0[sp],r29
+	ld.w	4[sp],r28
+	ld.w	8[sp],r31
+	addi	12,sp,sp
+	jmp	[r31]
+	.size	__return_r28_r31,.-__return_r28_r31
+#endif /* L_save_28c */
+
+#ifdef	L_save_29c
+	.text
+	.align	2
+	.globl	__save_r29_r31
+	.type	__save_r29_r31,@function
+	/* Allocate space and save registers 29 & 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r29_r31,r10.  */
+__save_r29_r31:
+	addi	-8,sp,sp
+	st.w	r29,0[sp]
+	st.w	r31,4[sp]
+	jmp	[r10]
+	.size	__save_r29_r31,.-__save_r29_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r29_r31.  */
+	.align	2
+	.globl	__return_r29_r31
+	.type	__return_r29_r31,@function
+__return_r29_r31:
+	ld.w	0[sp],r29
+	ld.w	4[sp],r31
+	addi	8,sp,sp
+	jmp	[r31]
+	.size	__return_r29_r31,.-__return_r29_r31
+#endif /* L_save_29c */
+
+#ifdef	L_save_31c
+	.text
+	.align	2
+	.globl	__save_r31
+	.type	__save_r31,@function
+	/* Allocate space and save register 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	jalr __save_r31,r10.  */
+__save_r31:
+	addi	-4,sp,sp
+	st.w	r31,0[sp]
+	jmp	[r10]
+	.size	__save_r31,.-__save_r31
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	jr __return_r31.  */
+	.align	2
+	.globl	__return_r31
+	.type	__return_r31,@function
+__return_r31:
+	ld.w	0[sp],r31
+	addi	4,sp,sp
+	jmp	[r31]
+        .size   __return_r31,.-__return_r31
+#endif /* L_save_31c */
+
+#ifdef	L_save_interrupt
+	.text
+	.align	2
+	.globl	__save_interrupt
+	.type	__save_interrupt,@function
+	/* Save registers r1, r4 on stack and load up with expected values.  */
+	/* Note, 20 bytes of stack have already been allocated.  */
+	/* Called via:	jalr __save_interrupt,r10.  */
+__save_interrupt:
+       /* add -20,sp ; st.w r11,16[sp] ; st.w r10,12[sp] ; */
+	st.w	ep,0[sp]
+	st.w	gp,4[sp]
+	st.w	r1,8[sp]
+	movhi	hi(__ep),r0,ep
+	movea	lo(__ep),ep,ep
+	movhi	hi(__gp),r0,gp
+	movea	lo(__gp),gp,gp
+	jmp	[r10]
+	.size	__save_interrupt,.-__save_interrupt
+
+	/* Restore saved registers, deallocate stack and return from the interrupt.  */
+	/* Called via:	jr __return_interrupt.  */
+	.align	2
+	.globl	__return_interrupt
+	.type	__return_interrupt,@function
+__return_interrupt:
+	ld.w	0[sp],ep
+	ld.w	4[sp],gp
+	ld.w	8[sp],r1
+	ld.w	12[sp],r10
+	ld.w    16[sp],r11
+	addi    20,sp,sp
+	reti
+	.size	__return_interrupt,.-__return_interrupt
+#endif /* L_save_interrupt */
+
+#ifdef L_save_all_interrupt
+	.text
+	.align	2
+	.globl	__save_all_interrupt
+	.type	__save_all_interrupt,@function
+	/* Save all registers except for those saved in __save_interrupt.  */
+	/* Allocate enough stack for all of the registers & 16 bytes of space.  */
+	/* Called via:	jalr __save_all_interrupt,r10.  */
+__save_all_interrupt:
+	addi	-104,sp,sp
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sst.w	r31,100[ep]
+	sst.w	r2,96[ep]
+	sst.w	gp,92[ep]
+	sst.w	r6,88[ep]
+	sst.w	r7,84[ep]
+	sst.w	r8,80[ep]
+	sst.w	r9,76[ep]
+	sst.w	r11,72[ep]
+	sst.w	r12,68[ep]
+	sst.w	r13,64[ep]
+	sst.w	r14,60[ep]
+	sst.w	r15,56[ep]
+	sst.w	r16,52[ep]
+	sst.w	r17,48[ep]
+	sst.w	r18,44[ep]
+	sst.w	r19,40[ep]
+	sst.w	r20,36[ep]
+	sst.w	r21,32[ep]
+	sst.w	r22,28[ep]
+	sst.w	r23,24[ep]
+	sst.w	r24,20[ep]
+	sst.w	r25,16[ep]
+	sst.w	r26,12[ep]
+	sst.w	r27,8[ep]
+	sst.w	r28,4[ep]
+	sst.w	r29,0[ep]
+	mov	r1,ep
+#else
+	st.w	r31,100[sp]
+	st.w	r2,96[sp]
+	st.w	gp,92[sp]
+	st.w	r6,88[sp]
+	st.w	r7,84[sp]
+	st.w	r8,80[sp]
+	st.w	r9,76[sp]
+	st.w	r11,72[sp]
+	st.w	r12,68[sp]
+	st.w	r13,64[sp]
+	st.w	r14,60[sp]
+	st.w	r15,56[sp]
+	st.w	r16,52[sp]
+	st.w	r17,48[sp]
+	st.w	r18,44[sp]
+	st.w	r19,40[sp]
+	st.w	r20,36[sp]
+	st.w	r21,32[sp]
+	st.w	r22,28[sp]
+	st.w	r23,24[sp]
+	st.w	r24,20[sp]
+	st.w	r25,16[sp]
+	st.w	r26,12[sp]
+	st.w	r27,8[sp]
+	st.w	r28,4[sp]
+	st.w	r29,0[sp]
+#endif
+	jmp	[r10]
+	.size	__save_all_interrupt,.-__save_all_interrupt
+
+	.globl	__restore_all_interrupt
+	.type	__restore_all_interrupt,@function
+	/* Restore all registers saved in __save_all_interrupt and
+	   deallocate the stack space.  */
+	/* Called via:	jalr __restore_all_interrupt,r10.  */
+__restore_all_interrupt:
+#ifdef __EP__
+	mov	ep,r1
+	mov	sp,ep
+	sld.w	100[ep],r31
+	sld.w	96[ep],r2
+	sld.w	92[ep],gp
+	sld.w	88[ep],r6
+	sld.w	84[ep],r7
+	sld.w	80[ep],r8
+	sld.w	76[ep],r9
+	sld.w	72[ep],r11
+	sld.w	68[ep],r12
+	sld.w	64[ep],r13
+	sld.w	60[ep],r14
+	sld.w	56[ep],r15
+	sld.w	52[ep],r16
+	sld.w	48[ep],r17
+	sld.w	44[ep],r18
+	sld.w	40[ep],r19
+	sld.w	36[ep],r20
+	sld.w	32[ep],r21
+	sld.w	28[ep],r22
+	sld.w	24[ep],r23
+	sld.w	20[ep],r24
+	sld.w	16[ep],r25
+	sld.w	12[ep],r26
+	sld.w	8[ep],r27
+	sld.w	4[ep],r28
+	sld.w	0[ep],r29
+	mov	r1,ep
+#else
+	ld.w	100[sp],r31
+	ld.w	96[sp],r2
+	ld.w	92[sp],gp
+	ld.w	88[sp],r6
+	ld.w	84[sp],r7
+	ld.w	80[sp],r8
+	ld.w	76[sp],r9
+	ld.w	72[sp],r11
+	ld.w	68[sp],r12
+	ld.w	64[sp],r13
+	ld.w	60[sp],r14
+	ld.w	56[sp],r15
+	ld.w	52[sp],r16
+	ld.w	48[sp],r17
+	ld.w	44[sp],r18
+	ld.w	40[sp],r19
+	ld.w	36[sp],r20
+	ld.w	32[sp],r21
+	ld.w	28[sp],r22
+	ld.w	24[sp],r23
+	ld.w	20[sp],r24
+	ld.w	16[sp],r25
+	ld.w	12[sp],r26
+	ld.w	8[sp],r27
+	ld.w	4[sp],r28
+	ld.w	0[sp],r29
+#endif
+	addi	104,sp,sp	
+	jmp	[r10]
+	.size	__restore_all_interrupt,.-__restore_all_interrupt
+#endif /* L_save_all_interrupt */
+	
+#if defined __V850_CALLT__
+#if defined(__v850e__) || defined(__v850e1__) || defined(__v850e2__) || defined(__v850e2v3__) || defined(__v850e3v5__)
+#ifdef	L_callt_save_r2_r29
+	/* Put these functions into the call table area.  */
+	.call_table_text
+	
+	/* Allocate space and save registers 2, 20 .. 29 on the stack.  */
+	/* Called via:	callt ctoff(__callt_save_r2_r29).  */
+	.align	2
+.L_save_r2_r29:
+	add	-4, sp
+	st.w	r2, 0[sp]
+	prepare {r20 - r29}, 0
+	ctret
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	callt ctoff(__callt_return_r2_r29).  */
+	.align	2
+.L_return_r2_r29:
+	dispose 0, {r20-r29}
+	ld.w    0[sp], r2
+	add	4, sp
+	jmp     [r31]
+
+	/* Place the offsets of the start of these routines into the call table.  */
+	.call_table_data
+
+	.global	__callt_save_r2_r29
+	.type	__callt_save_r2_r29,@function
+__callt_save_r2_r29:	.short ctoff(.L_save_r2_r29)
+	
+	.global	__callt_return_r2_r29
+	.type	__callt_return_r2_r29,@function
+__callt_return_r2_r29:	.short ctoff(.L_return_r2_r29)
+	
+#endif /* L_callt_save_r2_r29.  */
+
+#ifdef	L_callt_save_r2_r31
+	/* Put these functions into the call table area.  */
+	.call_table_text
+	
+	/* Allocate space and save registers 2 and 20 .. 29, 31 on the stack.  */
+	/* Also allocate space for the argument save area.  */
+	/* Called via:	callt ctoff(__callt_save_r2_r31).  */
+	.align	2
+.L_save_r2_r31:
+	add	-4, sp
+	st.w	r2, 0[sp]
+	prepare {r20 - r29, r31}, 0
+	ctret
+
+	/* Restore saved registers, deallocate stack and return to the user.  */
+	/* Called via:	callt ctoff(__callt_return_r2_r31).  */
+	.align	2
+.L_return_r2_r31:
+	dispose 0, {r20 - r29, r31}
+	ld.w    0[sp], r2
+	addi	4, sp, sp
+	jmp     [r31]
+
+	/* Place the offsets of the start of these routines into the call table.  */
+	.call_table_data
+
+	.global	__callt_save_r2_r31
+	.type	__callt_save_r2_r31,@function
+__callt_save_r2_r31:	.short ctoff(.L_save_r2_r31)
+	
+	.global	__callt_return_r2_r31
+	.type	__callt_return_r2_r31,@function
+__callt_return_r2_r31:	.short ctoff(.L_return_r2_r31)
+	
+#endif /* L_callt_save_r2_r31 */
+
+#ifdef	L_callt_save_interrupt
+	/* Put these functions into the call table area.  */
+	.call_table_text
+	
+	/* Save registers r1, ep, gp, r10 on stack and load up with expected values.  */
+	/* Called via:	callt ctoff(__callt_save_interrupt).  */
+	.align	2
+.L_save_interrupt:
+        /* SP has already been moved before callt ctoff(_save_interrupt).  */
+        /* R1,R10,R11,ctpc,ctpsw has alread been saved bofore callt ctoff(_save_interrupt).  */
+        /* addi -28, sp, sp  */
+        /* st.w r1,    24[sp] */
+        /* st.w r10,   12[sp] */
+        /* st.w r11,   16[sp] */
+        /* stsr ctpc,  r10    */
+        /* st.w r10,   20[sp] */
+        /* stsr ctpsw, r10    */
+        /* st.w r10,   24[sp] */
+        st.w    ep,  0[sp]
+        st.w    gp,  4[sp]
+        st.w    r1,  8[sp]
+	mov	hilo(__ep),ep
+	mov	hilo(__gp),gp
+	ctret
+
+        .call_table_text
+	/* Restore saved registers, deallocate stack and return from the interrupt.  */
+        /* Called via:  callt ctoff(__callt_restore_interrupt).  */
+	.align	2
+	.globl	__return_interrupt
+	.type	__return_interrupt,@function
+.L_return_interrupt:
+        ld.w    24[sp], r1
+        ldsr    r1,     ctpsw
+        ld.w    20[sp], r1
+        ldsr    r1,     ctpc
+        ld.w    16[sp], r11
+        ld.w    12[sp], r10
+        ld.w     8[sp], r1
+        ld.w     4[sp], gp
+        ld.w     0[sp], ep
+        addi    28, sp, sp
+        reti
+
+	/* Place the offsets of the start of these routines into the call table.  */
+	.call_table_data
+
+        .global __callt_save_interrupt
+        .type   __callt_save_interrupt,@function
+__callt_save_interrupt:         .short ctoff(.L_save_interrupt)
+
+        .global __callt_return_interrupt
+        .type   __callt_return_interrupt,@function
+__callt_return_interrupt:       .short ctoff(.L_return_interrupt)
+	
+#endif /* L_callt_save_interrupt */
+
+#ifdef L_callt_save_all_interrupt
+	/* Put these functions into the call table area.  */
+	.call_table_text
+	
+	/* Save all registers except for those saved in __save_interrupt.  */
+	/* Allocate enough stack for all of the registers & 16 bytes of space.  */
+	/* Called via:	callt ctoff(__callt_save_all_interrupt).  */
+	.align	2
+.L_save_all_interrupt:
+	addi	-60, sp, sp
+#ifdef __EP__
+	mov	ep,  r1
+	mov	sp,  ep
+	sst.w	r2,  56[ep]
+	sst.w	r5,  52[ep]
+	sst.w	r6,  48[ep]
+	sst.w	r7,  44[ep]
+	sst.w	r8,  40[ep]
+	sst.w	r9,  36[ep]
+	sst.w	r11, 32[ep]
+	sst.w	r12, 28[ep]
+	sst.w	r13, 24[ep]
+	sst.w	r14, 20[ep]
+	sst.w	r15, 16[ep]
+	sst.w	r16, 12[ep]
+	sst.w	r17, 8[ep]
+	sst.w	r18, 4[ep]
+	sst.w	r19, 0[ep]
+	mov	r1,  ep
+#else
+	st.w	r2,  56[sp]
+	st.w	r5,  52[sp]
+	st.w	r6,  48[sp]
+	st.w	r7,  44[sp]
+	st.w	r8,  40[sp]
+	st.w	r9,  36[sp]
+	st.w	r11, 32[sp]
+	st.w	r12, 28[sp]
+	st.w	r13, 24[sp]
+	st.w	r14, 20[sp]
+	st.w	r15, 16[sp]
+	st.w	r16, 12[sp]
+	st.w	r17, 8[sp]
+	st.w	r18, 4[sp]
+	st.w	r19, 0[sp]
+#endif
+	prepare {r20 - r29, r31}, 0
+	ctret	
+
+	/* Restore all registers saved in __save_all_interrupt
+	   deallocate the stack space.  */
+	/* Called via:	callt ctoff(__callt_restore_all_interrupt).  */
+	.align 2
+.L_restore_all_interrupt:
+	dispose 0, {r20 - r29, r31}
+#ifdef __EP__
+	mov	ep, r1
+	mov	sp, ep
+	sld.w	0 [ep], r19
+	sld.w	4 [ep], r18
+	sld.w	8 [ep], r17
+	sld.w	12[ep], r16
+	sld.w	16[ep], r15
+	sld.w	20[ep], r14
+	sld.w	24[ep], r13
+	sld.w	28[ep], r12
+	sld.w	32[ep], r11
+	sld.w	36[ep], r9
+	sld.w	40[ep], r8
+	sld.w	44[ep], r7
+	sld.w	48[ep], r6
+	sld.w	52[ep], r5
+	sld.w	56[ep], r2
+	mov	r1, ep
+#else
+	ld.w	0 [sp], r19
+	ld.w	4 [sp], r18
+	ld.w	8 [sp], r17
+	ld.w	12[sp], r16
+	ld.w	16[sp], r15
+	ld.w	20[sp], r14
+	ld.w	24[sp], r13
+	ld.w	28[sp], r12
+	ld.w	32[sp], r11
+	ld.w	36[sp], r9
+	ld.w	40[sp], r8
+	ld.w	44[sp], r7
+	ld.w	48[sp], r6
+	ld.w	52[sp], r5
+	ld.w	56[sp], r2
+#endif
+	addi	60, sp, sp
+	ctret
+
+	/* Place the offsets of the start of these routines into the call table.  */
+	.call_table_data
+
+	.global	__callt_save_all_interrupt
+	.type	__callt_save_all_interrupt,@function
+__callt_save_all_interrupt:	.short ctoff(.L_save_all_interrupt)
+	
+	.global	__callt_restore_all_interrupt
+	.type	__callt_restore_all_interrupt,@function
+__callt_restore_all_interrupt:	.short ctoff(.L_restore_all_interrupt)
+	
+#endif /* L_callt_save_all_interrupt */
+
+
+#define MAKE_CALLT_FUNCS( START )						\
+	.call_table_text							;\
+	.align	2								;\
+	/* Allocate space and save registers START .. r29 on the stack.  */	;\
+	/* Called via:	callt ctoff(__callt_save_START_r29).  */		;\
+.L_save_##START##_r29:								;\
+	prepare { START - r29 }, 0						;\
+	ctret									;\
+										;\
+	/* Restore saved registers, deallocate stack and return.  */		;\
+	/* Called via:	callt ctoff(__return_START_r29).  */			;\
+	.align	2								;\
+.L_return_##START##_r29:							;\
+	dispose 0, { START - r29 }, r31						;\
+										;\
+	/* Place the offsets of the start of these funcs into the call table.  */;\
+	.call_table_data							;\
+										;\
+	.global	__callt_save_##START##_r29					;\
+	.type	__callt_save_##START##_r29,@function				;\
+__callt_save_##START##_r29:	.short ctoff(.L_save_##START##_r29 )		;\
+										;\
+	.global	__callt_return_##START##_r29					;\
+	.type	__callt_return_##START##_r29,@function				;\
+__callt_return_##START##_r29:	.short ctoff(.L_return_##START##_r29 )	
+
+
+#define MAKE_CALLT_CFUNCS( START )						\
+	.call_table_text							;\
+	.align	2								;\
+	/* Allocate space and save registers START .. r31 on the stack.  */	;\
+	/* Called via:	callt ctoff(__callt_save_START_r31c).  */		;\
+.L_save_##START##_r31c:								;\
+	prepare { START - r29, r31}, 0						;\
+	ctret									;\
+										;\
+	/* Restore saved registers, deallocate stack and return.  */		;\
+	/* Called via:	callt ctoff(__return_START_r31c).  */			;\
+	.align	2								;\
+.L_return_##START##_r31c:							;\
+	dispose 0, { START - r29, r31}, r31					;\
+										;\
+	/* Place the offsets of the start of these funcs into the call table.  */;\
+	.call_table_data							;\
+										;\
+	.global	__callt_save_##START##_r31c					;\
+	.type	__callt_save_##START##_r31c,@function				;\
+__callt_save_##START##_r31c:    .short ctoff(.L_save_##START##_r31c )		;\
+										;\
+	.global	__callt_return_##START##_r31c					;\
+	.type	__callt_return_##START##_r31c,@function				;\
+__callt_return_##START##_r31c:  .short ctoff(.L_return_##START##_r31c )	
+
+	
+#ifdef	L_callt_save_20
+	MAKE_CALLT_FUNCS (r20)
+#endif
+#ifdef	L_callt_save_21
+	MAKE_CALLT_FUNCS (r21)
+#endif
+#ifdef	L_callt_save_22
+	MAKE_CALLT_FUNCS (r22)
+#endif
+#ifdef	L_callt_save_23
+	MAKE_CALLT_FUNCS (r23)
+#endif
+#ifdef	L_callt_save_24
+	MAKE_CALLT_FUNCS (r24)
+#endif
+#ifdef	L_callt_save_25
+	MAKE_CALLT_FUNCS (r25)
+#endif
+#ifdef	L_callt_save_26
+	MAKE_CALLT_FUNCS (r26)
+#endif
+#ifdef	L_callt_save_27
+	MAKE_CALLT_FUNCS (r27)
+#endif
+#ifdef	L_callt_save_28
+	MAKE_CALLT_FUNCS (r28)
+#endif
+#ifdef	L_callt_save_29
+	MAKE_CALLT_FUNCS (r29)
+#endif
+
+#ifdef	L_callt_save_20c
+	MAKE_CALLT_CFUNCS (r20)
+#endif
+#ifdef	L_callt_save_21c
+	MAKE_CALLT_CFUNCS (r21)
+#endif
+#ifdef	L_callt_save_22c
+	MAKE_CALLT_CFUNCS (r22)
+#endif
+#ifdef	L_callt_save_23c
+	MAKE_CALLT_CFUNCS (r23)
+#endif
+#ifdef	L_callt_save_24c
+	MAKE_CALLT_CFUNCS (r24)
+#endif
+#ifdef	L_callt_save_25c
+	MAKE_CALLT_CFUNCS (r25)
+#endif
+#ifdef	L_callt_save_26c
+	MAKE_CALLT_CFUNCS (r26)
+#endif
+#ifdef	L_callt_save_27c
+	MAKE_CALLT_CFUNCS (r27)
+#endif
+#ifdef	L_callt_save_28c
+	MAKE_CALLT_CFUNCS (r28)
+#endif
+#ifdef	L_callt_save_29c
+	MAKE_CALLT_CFUNCS (r29)
+#endif
+
+	
+#ifdef	L_callt_save_31c
+	.call_table_text
+	.align	2
+	/* Allocate space and save register r31 on the stack.  */
+	/* Called via:	callt ctoff(__callt_save_r31c).  */
+.L_callt_save_r31c:
+	prepare {r31}, 0
+	ctret
+
+	/* Restore saved registers, deallocate stack and return.  */
+	/* Called via:	callt ctoff(__return_r31c).  */
+	.align	2
+.L_callt_return_r31c:
+	dispose 0, {r31}, r31
+	
+	/* Place the offsets of the start of these funcs into the call table.  */
+	.call_table_data
+
+	.global	__callt_save_r31c
+	.type	__callt_save_r31c,@function
+__callt_save_r31c:	.short ctoff(.L_callt_save_r31c)
+
+	.global	__callt_return_r31c
+	.type	__callt_return_r31c,@function
+__callt_return_r31c:	.short ctoff(.L_callt_return_r31c)		
+#endif
+
+#endif /* __v850e__ + */
+#endif /* __V850_CALLT__ */
+
+/*  libgcc2 routines for NEC V850.  */
+/*  Double Integer Arithmetical Operation.  */
+
+#ifdef L_negdi2
+	.text
+	.global ___negdi2
+	.type   ___negdi2, @function
+___negdi2:
+	not	r6, r10
+	add	1,  r10
+	setf	l,  r6
+	not	r7, r11
+	add	r6, r11
+	jmp	[lp]
+
+	.size ___negdi2,.-___negdi2
+#endif
+
+#ifdef L_cmpdi2
+	.text
+	.global ___cmpdi2
+	.type	___cmpdi2,@function
+___cmpdi2:
+	# Signed comparison bitween each high word.
+	cmp	r9, r7
+	be	.L_cmpdi_cmp_low
+	setf	ge, r10
+	setf	gt, r6
+	add	r6, r10
+	jmp	[lp]
+.L_cmpdi_cmp_low:
+	# Unsigned comparigon bitween each low word.
+	cmp     r8, r6
+	setf	nl, r10
+	setf	h,  r6
+	add	r6, r10
+	jmp	[lp]	
+	.size ___cmpdi2, . - ___cmpdi2	
+#endif
+
+#ifdef L_ucmpdi2
+	.text
+	.global ___ucmpdi2
+	.type	___ucmpdi2,@function
+___ucmpdi2:
+	cmp	r9, r7  # Check if each high word are same.
+	bne	.L_ucmpdi_check_psw
+	cmp     r8, r6  # Compare the word.
+.L_ucmpdi_check_psw:
+	setf	nl, r10 # 
+	setf	h,  r6  # 
+	add	r6, r10 # Add the result of comparison NL and comparison H.
+	jmp	[lp]	
+	.size ___ucmpdi2, . - ___ucmpdi2
+#endif
+
+#ifdef L_muldi3
+	.text
+	.global ___muldi3
+	.type	___muldi3,@function
+___muldi3:
+#ifdef __v850__
+        jarl  __save_r26_r31, r10
+        addi  16,  sp, sp
+        mov   r6,  r28
+        shr   15,  r28
+        movea lo(32767), r0, r14
+        and   r14, r28
+        mov   r8,  r10
+        shr   15,  r10
+        and   r14, r10
+        mov   r6,  r19
+        shr   30,  r19
+        mov   r7,  r12
+        shl   2,   r12
+        or    r12, r19
+        and   r14, r19
+        mov   r8,  r13
+        shr   30,  r13
+        mov   r9,  r12
+        shl   2,   r12
+        or    r12, r13
+        and   r14, r13
+        mov   r7,  r11
+        shr   13,  r11
+        and   r14, r11
+        mov   r9,  r31
+        shr   13,  r31
+        and   r14, r31
+        mov   r7,  r29
+        shr   28,  r29
+        and   r14, r29
+        mov   r9,  r12
+        shr   28,  r12
+        and   r14, r12
+        and   r14, r6
+        and   r14, r8
+        mov   r6,  r14
+        mulh  r8,  r14
+        mov   r6,  r16
+        mulh  r10, r16
+        mov   r6,  r18
+        mulh  r13, r18
+        mov   r6,  r15
+        mulh  r31, r15
+        mulh  r12, r6
+        mov   r28,  r17
+        mulh  r10, r17
+        add   -16, sp
+        mov   r28,  r12
+        mulh  r8,  r12
+        add   r17, r18
+        mov   r28,  r17
+        mulh  r31, r17
+        add   r12, r16
+        mov   r28,  r12
+        mulh  r13, r12
+        add   r17, r6
+        mov   r19, r17
+        add   r12, r15
+        mov   r19, r12
+        mulh  r8,  r12
+        mulh  r10, r17
+        add   r12, r18
+        mov   r19, r12
+        mulh  r13, r12
+        add   r17, r15
+        mov   r11, r13
+        mulh  r8,  r13
+        add   r12, r6
+        mov   r11, r12
+        mulh  r10, r12
+        add   r13, r15
+        mulh  r29, r8
+        add   r12, r6
+        mov   r16, r13
+        shl   15,  r13
+        add   r14, r13
+        mov   r18, r12
+        shl   30,  r12
+        mov   r13, r26
+        add   r12, r26
+        shr   15,  r14
+        movhi hi(131071), r0,  r12
+        movea lo(131071), r12, r13
+        and   r13, r14
+        mov   r16, r12
+        and   r13, r12
+        add   r12, r14
+        mov   r18, r12
+        shl   15,  r12
+        and   r13, r12
+        add   r12, r14
+        shr   17,  r14
+        shr   17,  r16
+        add   r14, r16
+        shl   13,  r15
+        shr   2,   r18
+        add   r18, r15
+        add   r15, r16
+        mov   r16, r27
+        add   r8,  r6
+        shl   28,  r6
+        add   r6,  r27
+        mov   r26, r10
+        mov   r27, r11
+        jr    __return_r26_r31
+#else /* defined(__v850e__) */
+	/*  (Ahi << 32 + Alo) * (Bhi << 32 + Blo) */
+	/*   r7           r6      r9         r8   */
+	mov  r8, r10
+	mulu r7, r8,  r0		/* Ahi * Blo */
+	mulu r6, r9,  r0		/* Alo * Bhi */
+	mulu r6, r10, r11		/* Alo * Blo */
+	add  r8, r11
+	add  r9, r11
+	jmp  [r31]
+#endif /* defined(__v850e__) */
+	.size ___muldi3, . - ___muldi3
+#endif
diff --git a/gcc-4.9/libgcc/config/v850/t-v850 b/gcc-4.9/libgcc/config/v850/t-v850
new file mode 100644
index 000000000..b61703ace
--- /dev/null
+++ b/gcc-4.9/libgcc/config/v850/t-v850
@@ -0,0 +1,60 @@
+LIB1ASMSRC = v850/lib1funcs.S
+LIB1ASMFUNCS	= _mulsi3 \
+		  _divsi3 \
+		  _udivsi3 \
+		  _modsi3 \
+		  _umodsi3 \
+		  _save_2 \
+		  _save_20 \
+		  _save_21 \
+		  _save_22 \
+		  _save_23 \
+		  _save_24 \
+		  _save_25 \
+		  _save_26 \
+		  _save_27 \
+		  _save_28 \
+		  _save_29 \
+		  _save_2c \
+		  _save_20c \
+		  _save_21c \
+		  _save_22c \
+		  _save_23c \
+		  _save_24c \
+		  _save_25c \
+		  _save_26c \
+		  _save_27c \
+		  _save_28c \
+		  _save_29c \
+		  _save_31c \
+		  _save_interrupt \
+		  _save_all_interrupt \
+                  _callt_save_20 \
+		  _callt_save_21 \
+		  _callt_save_22 \
+		  _callt_save_23 \
+		  _callt_save_24 \
+		  _callt_save_25 \
+		  _callt_save_26 \
+		  _callt_save_27 \
+		  _callt_save_28 \
+		  _callt_save_29 \
+		  _callt_save_20c \
+		  _callt_save_21c \
+		  _callt_save_22c \
+		  _callt_save_23c \
+		  _callt_save_24c \
+		  _callt_save_25c \
+		  _callt_save_26c \
+		  _callt_save_27c \
+		  _callt_save_28c \
+		  _callt_save_29c \
+		  _callt_save_31c \
+		  _callt_save_interrupt \
+		  _callt_save_all_interrupt \
+		  _callt_save_r2_r29 \
+		  _callt_save_r2_r31 \
+		  _negdi2 \
+		  _cmpdi2 \
+		  _ucmpdi2 \
+		  _muldi3
diff --git a/gcc-4.9/libgcc/config/vax/lib1funcs.S b/gcc-4.9/libgcc/config/vax/lib1funcs.S
new file mode 100644
index 000000000..70faf22e7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vax/lib1funcs.S
@@ -0,0 +1,92 @@
+/* Copyright (C) 2009-2014 Free Software Foundation, Inc.
+   This file is part of GCC.
+   Contributed by Maciej W. Rozycki <macro@linux-mips.org>.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef L_udivsi3
+	.text
+	.globl	__udivsi3
+	.type	__udivsi3, @function
+__udivsi3:
+	.word	0
+	movl	8(%ap), %r1
+	blss	0f			/* Check bit #31 of divisor.  */
+	movl	4(%ap), %r2
+	blss	1f			/* Check bit #31 of dividend.  */
+
+	/* Both zero, do a standard division.  */
+
+	divl3	%r1, %r2, %r0
+	ret
+
+	/* MSB of divisor set, only 1 or 0 may result.  */
+0:
+	decl	%r1
+	clrl	%r0
+	cmpl	%r1, 4(%ap)
+	adwc	$0, %r0
+	ret
+
+	/* MSB of dividend set, do an extended division.  */
+1:
+	clrl	%r3
+	ediv	%r1, %r2, %r0, %r3
+	ret
+	.size	__udivsi3, . - __udivsi3
+	.previous
+#endif
+
+#ifdef L_umodsi3
+	.text
+	.globl	__umodsi3
+	.type	__umodsi3, @function
+__umodsi3:
+	.word	0
+	movl	8(%ap), %r1
+	blss	0f			/* Check bit #31 of divisor.  */
+	movl	4(%ap), %r2
+	blss	1f			/* Check bit #31 of dividend.  */
+
+	/* Both zero, do a standard division.  */
+
+	divl3	%r1, %r2, %r0
+	mull2	%r0, %r1
+	subl3	%r1, %r2, %r0
+	ret
+
+	/* MSB of divisor set, subtract the divisor at most once.  */
+0:
+	movl	4(%ap), %r2
+	clrl	%r0
+	cmpl	%r2, %r1
+	sbwc	$0, %r0
+	bicl2	%r0, %r1
+	subl3	%r1, %r2, %r0
+	ret
+
+	/* MSB of dividend set, do an extended division.  */
+1:
+	clrl	%r3
+	ediv	%r1, %r2, %r3, %r0
+	ret
+	.size	__umodsi3, . - __umodsi3
+	.previous
+#endif
diff --git a/gcc-4.9/libgcc/config/vax/t-linux b/gcc-4.9/libgcc/config/vax/t-linux
new file mode 100644
index 000000000..17929c871
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vax/t-linux
@@ -0,0 +1,2 @@
+LIB1ASMSRC = vax/lib1funcs.S
+LIB1ASMFUNCS = _udivsi3 _umodsi3
diff --git a/gcc-4.9/libgcc/config/vms/t-vms b/gcc-4.9/libgcc/config/vms/t-vms
new file mode 100644
index 000000000..21e09ff4a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vms/t-vms
@@ -0,0 +1,3 @@
+# Assemble startup file.
+crt0.o: $(srcdir)/config/vms/vms-ucrt0.c
+	$(gcc_compile) -mpointer-size=64 -c $<
diff --git a/gcc-4.9/libgcc/config/vms/vms-ucrt0.c b/gcc-4.9/libgcc/config/vms/vms-ucrt0.c
new file mode 100644
index 000000000..d427a33f2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vms/vms-ucrt0.c
@@ -0,0 +1,142 @@
+/* VMS crt0 returning Unix style condition codes.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Douglas B. Rupp (rupp@gnat.com).
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <stdlib.h>
+
+/* Sanity check.  */
+#if __INITIAL_POINTER_SIZE != 64
+#error "vms-ucrt0.c must be compiled with -mpointer-size=64"
+#endif
+
+/* Lots of cheat to handle 32bits/64bits pointer conversions.
+   We use 'long long' for 64 bits pointers and 'int' for 32 bits pointers.  */
+
+extern void decc$main (void *, void *, void *, void *, unsigned int,
+		       unsigned int, int *, int *, int *);
+extern int main (int, char **, char **);
+extern int _malloc32 (int);
+
+#ifdef __ia64__
+#define MAIN_ASM_NAME asm ("ELF$TFRADR")
+#else
+#define MAIN_ASM_NAME
+#endif
+
+int __main (void *, void *, void *, void *,
+	    unsigned int, unsigned int) MAIN_ASM_NAME;
+
+/* From errnodef.h, but we need to emulate the globalval.  */
+extern int C$_EXIT1;
+
+/* From stsdef.h  */
+#define STS$V_MSG_NO 0x03
+#define STS$M_INHIB_MSG 0x10000000
+/* Symbol defined while main() is compiled to record the flags used.
+   (Note that the symbol defines the value, ie extract the bits from the
+    address).
+   bit 0 set for 64 bit pointers
+   bit 1 set for posix return value.  */
+extern char __gcc_main_flags;
+
+/* From ssdef.h  */
+#define SS$_NORMAL 1
+#define MAIN_FLAG_64BIT (1 << 0)
+#define MAIN_FLAG_POSIX (1 << 1)
+
+int
+__main (void *progxfer, void *cli_util, void *imghdr, void *image_file_desc,
+	unsigned int linkflag, unsigned int cliflag)
+{
+  int argc;
+  int argv;
+  int envp;
+  int status;
+  char **argv64;
+  char **envp64;
+  unsigned int flags = (unsigned __int64)&__gcc_main_flags;
+
+  /* The argv and envp arrays are 32 bits pointers to 32 bits pointers.  */
+  decc$main (progxfer, cli_util, imghdr, image_file_desc,
+	     linkflag, cliflag, &argc, &argv, &envp);
+
+  if (flags & MAIN_FLAG_64BIT)
+    {
+      int i;
+
+      /* Reallocate argv and envp with 64 bit pointers.  */
+      argv64 = (char **) _malloc32 (sizeof (char *) * (argc + 1));
+
+      for (i = 0; i < argc; i++)
+        argv64[i] = (char *) (__int64)(((int *) (__int64) argv)[i]);
+
+      argv64[argc] = NULL;
+
+      for (i = 0; ((int *) (__int64) envp)[i]; i++)
+        ;
+      envp64 = (char **) _malloc32 (sizeof (char *) * (i + 1));
+
+      for (i = 0; ((int *) (__int64) envp)[i]; i++)
+        envp64[i] = (char *)(__int64)(((int *) (__int64) envp)[i]);
+
+      envp64[i] = NULL;
+    }
+  else
+    {
+      argv64 = (char **)(__int64)argv;
+      envp64 = (char **)(__int64)envp;
+    }
+
+  status = main (argc, argv64, envp64);
+
+  if (flags & MAIN_FLAG_POSIX)
+    {
+      /* Map into a range of 0 - 255.  */
+      status &= 255;
+
+      if (status != 0)
+	{
+	  int save_status = status;
+
+	  status = (__int64) &C$_EXIT1 + ((status - 1) << STS$V_MSG_NO);
+
+	  /* An exit failure status requires a "severe" error.  All
+	     status values are defined in errno with a successful (1)
+	     severity but can be changed to an error (2) severity by
+	     adding 1.  In addition for compatibility with UNIX exit()
+	     routines we inhibit a run-time error message from being
+	     generated on exit(1).  */
+
+	  if (save_status == 1)
+	    {
+	      status++;
+	      status |= STS$M_INHIB_MSG;
+	    }
+	}
+      else
+	status = SS$_NORMAL;
+    }
+
+  return status;
+}
diff --git a/gcc-4.9/libgcc/config/vxlib-tls.c b/gcc-4.9/libgcc/config/vxlib-tls.c
new file mode 100644
index 000000000..e22a88b1a
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vxlib-tls.c
@@ -0,0 +1,370 @@
+/* Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by Zack Weinberg <zack@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Threads compatibility routines for libgcc2 for VxWorks.
+   These are out-of-line routines called from gthr-vxworks.h. 
+
+   This file provides the TLS related support routines, calling specific
+   VxWorks kernel entry points for this purpose.  The base VxWorks 5.x kernels
+   don't feature these entry points, and we provide gthr_supp_vxw_5x.c as an
+   option to fill this gap.  Asking users to rebuild a kernel is not to be
+   taken lightly, still, so we have isolated these routines from the rest of
+   vxlib to ensure that the kernel dependencies are only dragged when really
+   necessary.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "gthr.h"
+
+#if defined(__GTHREADS)
+#include <vxWorks.h>
+#ifndef __RTP__
+#include <vxLib.h>
+#endif
+#include <taskLib.h>
+#ifndef __RTP__
+#include <taskHookLib.h>
+#else
+# include <errno.h>
+#endif
+
+/* Thread-local storage.
+
+   We reserve a field in the TCB to point to a dynamically allocated
+   array which is used to store TLS values.  A TLS key is simply an
+   offset in this array.  The exact location of the TCB field is not
+   known to this code nor to vxlib.c -- all access to it indirects
+   through the routines __gthread_get_tls_data and
+   __gthread_set_tls_data, which are provided by the VxWorks kernel.
+
+   There is also a global array which records which keys are valid and
+   which have destructors.
+
+   A task delete hook is installed to execute key destructors.  The
+   routines __gthread_enter_tls_dtor_context and
+   __gthread_leave_tls_dtor_context, which are also provided by the
+   kernel, ensure that it is safe to call free() on memory allocated
+   by the task being deleted.  (This is a no-op on VxWorks 5, but
+   a major undertaking on AE.)
+
+   The task delete hook is only installed when at least one thread
+   has TLS data.  This is a necessary precaution, to allow this module
+   to be unloaded - a module with a hook can not be removed.
+
+   Since this interface is used to allocate only a small number of
+   keys, the table size is small and static, which simplifies the
+   code quite a bit.  Revisit this if and when it becomes necessary.  */
+
+#define MAX_KEYS 4
+
+/* This is the structure pointed to by the pointer returned
+   by __gthread_get_tls_data.  */
+struct tls_data
+{
+  int *owner;
+  void *values[MAX_KEYS];
+  unsigned int generation[MAX_KEYS];
+};
+
+/* To make sure we only delete TLS data associated with this object,
+   include a pointer to a local variable in the TLS data object.  */
+static int self_owner;
+
+/* Flag to check whether the delete hook is installed.  Once installed
+   it is only removed when unloading this module.  */
+static volatile int delete_hook_installed;
+
+/* kernel provided routines */
+extern void *__gthread_get_tls_data (void);
+extern void __gthread_set_tls_data (void *data);
+
+extern void __gthread_enter_tls_dtor_context (void);
+extern void __gthread_leave_tls_dtor_context (void);
+
+#ifndef __RTP__
+
+extern void *__gthread_get_tsd_data (WIND_TCB *tcb);
+extern void __gthread_set_tsd_data (WIND_TCB *tcb, void *data);
+extern void __gthread_enter_tsd_dtor_context (WIND_TCB *tcb);
+extern void __gthread_leave_tsd_dtor_context (WIND_TCB *tcb);
+
+#endif /* __RTP__ */
+
+/* This is a global structure which records all of the active keys.
+
+   A key is potentially valid (i.e. has been handed out by
+   __gthread_key_create) iff its generation count in this structure is
+   even.  In that case, the matching entry in the dtors array is a
+   routine to be called when a thread terminates with a valid,
+   non-NULL specific value for that key.
+
+   A key is actually valid in a thread T iff the generation count
+   stored in this structure is equal to the generation count stored in
+   T's specific-value structure.  */
+
+typedef void (*tls_dtor) (void *);
+
+struct tls_keys
+{
+  tls_dtor dtor[MAX_KEYS];
+  unsigned int generation[MAX_KEYS];
+};
+
+#define KEY_VALID_P(key) !(tls_keys.generation[key] & 1)
+
+/* Note: if MAX_KEYS is increased, this initializer must be updated
+   to match.  All the generation counts begin at 1, which means no
+   key is valid.  */
+static struct tls_keys tls_keys =
+{
+  { 0, 0, 0, 0 },
+  { 1, 1, 1, 1 }
+};
+
+/* This lock protects the tls_keys structure.  */
+static __gthread_mutex_t tls_lock;
+
+static __gthread_once_t tls_init_guard = __GTHREAD_ONCE_INIT;
+
+/* Internal routines.  */
+
+/* The task TCB has just been deleted.  Call the destructor
+   function for each TLS key that has both a destructor and
+   a non-NULL specific value in this thread.
+
+   This routine does not need to take tls_lock; the generation
+   count protects us from calling a stale destructor.  It does
+   need to read tls_keys.dtor[key] atomically.  */
+
+static void
+tls_delete_hook (void *tcb ATTRIBUTE_UNUSED)
+{
+  struct tls_data *data;
+  __gthread_key_t key;
+
+#ifdef __RTP__
+  data = __gthread_get_tls_data ();
+#else
+  /* In kernel mode, we can be called in the context of the thread
+     doing the killing, so must use the TCB to determine the data of
+     the thread being killed.  */
+  data = __gthread_get_tsd_data (tcb);
+#endif
+  
+  if (data && data->owner == &self_owner)
+    {
+#ifdef __RTP__
+      __gthread_enter_tls_dtor_context ();
+#else
+      __gthread_enter_tsd_dtor_context (tcb);
+#endif
+      for (key = 0; key < MAX_KEYS; key++)
+	{
+	  if (data->generation[key] == tls_keys.generation[key])
+	    {
+	      tls_dtor dtor = tls_keys.dtor[key];
+
+	      if (dtor)
+		dtor (data->values[key]);
+	    }
+	}
+      free (data);
+#ifdef __RTP__
+      __gthread_leave_tls_dtor_context ();
+#else
+      __gthread_leave_tsd_dtor_context (tcb);
+#endif
+
+#ifdef __RTP__
+      __gthread_set_tls_data (0);
+#else
+      __gthread_set_tsd_data (tcb, 0);
+#endif
+    }
+} 
+
+/* Initialize global data used by the TLS system.  */
+static void
+tls_init (void)
+{
+  __GTHREAD_MUTEX_INIT_FUNCTION (&tls_lock);
+}
+
+static void tls_destructor (void) __attribute__ ((destructor));
+static void
+tls_destructor (void)
+{
+#ifdef __RTP__
+  /* All threads but this one should have exited by now.  */
+  tls_delete_hook (NULL);
+#endif
+  /* Unregister the hook.  */
+  if (delete_hook_installed)
+    taskDeleteHookDelete ((FUNCPTR)tls_delete_hook);
+
+  if (tls_init_guard.done && __gthread_mutex_lock (&tls_lock) != ERROR)
+    semDelete (tls_lock);
+}
+
+/* External interface */
+
+/* Store in KEYP a value which can be passed to __gthread_setspecific/
+   __gthread_getspecific to store and retrieve a value which is
+   specific to each calling thread.  If DTOR is not NULL, it will be
+   called when a thread terminates with a non-NULL specific value for
+   this key, with the value as its sole argument.  */
+
+int
+__gthread_key_create (__gthread_key_t *keyp, tls_dtor dtor)
+{
+  __gthread_key_t key;
+
+  __gthread_once (&tls_init_guard, tls_init);
+
+  if (__gthread_mutex_lock (&tls_lock) == ERROR)
+    return errno;
+
+  for (key = 0; key < MAX_KEYS; key++)
+    if (!KEY_VALID_P (key))
+      goto found_slot;
+
+  /* no room */
+  __gthread_mutex_unlock (&tls_lock);
+  return EAGAIN;
+
+ found_slot:
+  tls_keys.generation[key]++;  /* making it even */
+  tls_keys.dtor[key] = dtor;
+  *keyp = key;
+  __gthread_mutex_unlock (&tls_lock);
+  return 0;
+}
+
+/* Invalidate KEY; it can no longer be used as an argument to
+   setspecific/getspecific.  Note that this does NOT call destructor
+   functions for any live values for this key.  */
+int
+__gthread_key_delete (__gthread_key_t key)
+{
+  if (key >= MAX_KEYS)
+    return EINVAL;
+
+  __gthread_once (&tls_init_guard, tls_init);
+
+  if (__gthread_mutex_lock (&tls_lock) == ERROR)
+    return errno;
+
+  if (!KEY_VALID_P (key))
+    {
+      __gthread_mutex_unlock (&tls_lock);
+      return EINVAL;
+    }
+
+  tls_keys.generation[key]++;  /* making it odd */
+  tls_keys.dtor[key] = 0;
+
+  __gthread_mutex_unlock (&tls_lock);
+  return 0;
+}
+
+/* Retrieve the thread-specific value for KEY.  If it has never been
+   set in this thread, or KEY is invalid, returns NULL.
+
+   It does not matter if this function races with key_create or
+   key_delete; the worst that can happen is you get a value other than
+   the one that a serialized implementation would have provided.  */
+
+void *
+__gthread_getspecific (__gthread_key_t key)
+{
+  struct tls_data *data;
+
+  if (key >= MAX_KEYS)
+    return 0;
+
+  data = __gthread_get_tls_data ();
+
+  if (!data)
+    return 0;
+
+  if (data->generation[key] != tls_keys.generation[key])
+    return 0;
+
+  return data->values[key];
+}
+
+/* Set the thread-specific value for KEY.  If KEY is invalid, or
+   memory allocation fails, returns -1, otherwise 0.
+
+   The generation count protects this function against races with
+   key_create/key_delete; the worst thing that can happen is that a
+   value is successfully stored into a dead generation (and then
+   immediately becomes invalid).  However, we do have to make sure
+   to read tls_keys.generation[key] atomically.  */
+
+int
+__gthread_setspecific (__gthread_key_t key, void *value)
+{
+  struct tls_data *data;
+  unsigned int generation;
+
+  if (key >= MAX_KEYS)
+    return EINVAL;
+
+  data = __gthread_get_tls_data ();
+  if (!data)
+    {
+      if (!delete_hook_installed)
+	{
+	  /* Install the delete hook.  */
+	  if (__gthread_mutex_lock (&tls_lock) == ERROR)
+	    return ENOMEM;
+	  if (!delete_hook_installed)
+	    {
+	      taskDeleteHookAdd ((FUNCPTR)tls_delete_hook);
+	      delete_hook_installed = 1;
+	    }
+	  __gthread_mutex_unlock (&tls_lock);
+	}
+
+      data = malloc (sizeof (struct tls_data));
+      if (!data)
+	return ENOMEM;
+
+      memset (data, 0, sizeof (struct tls_data));
+      data->owner = &self_owner;
+      __gthread_set_tls_data (data);
+    }
+
+  generation = tls_keys.generation[key];
+
+  if (generation & 1)
+    return EINVAL;
+
+  data->generation[key] = generation;
+  data->values[key] = value;
+
+  return 0;
+}
+#endif /* __GTHREADS */
diff --git a/gcc-4.9/libgcc/config/vxlib.c b/gcc-4.9/libgcc/config/vxlib.c
new file mode 100644
index 000000000..8fddc9a86
--- /dev/null
+++ b/gcc-4.9/libgcc/config/vxlib.c
@@ -0,0 +1,95 @@
+/* Copyright (C) 2002-2014 Free Software Foundation, Inc.
+   Contributed by Zack Weinberg <zack@codesourcery.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Threads compatibility routines for libgcc2 for VxWorks.
+   These are out-of-line routines called from gthr-vxworks.h.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "gthr.h"
+
+#if defined(__GTHREADS)
+#include <vxWorks.h>
+#ifndef __RTP__
+#include <vxLib.h>
+#endif
+#include <taskLib.h>
+#ifndef __RTP__
+#include <taskHookLib.h>
+#else
+# include <errno.h>
+#endif
+
+/* Init-once operation.
+
+   This would be a clone of the implementation from gthr-solaris.h,
+   except that we have a bootstrap problem - the whole point of this
+   exercise is to prevent double initialization, but if two threads
+   are racing with each other, once->mutex is liable to be initialized
+   by both.  Then each thread will lock its own mutex, and proceed to
+   call the initialization routine.
+
+   So instead we use a bare atomic primitive (vxTas()) to handle
+   mutual exclusion.  Threads losing the race then busy-wait, calling
+   taskDelay() to yield the processor, until the initialization is
+   completed.  Inefficient, but reliable.  */
+
+int
+__gthread_once (__gthread_once_t *guard, void (*func)(void))
+{
+  if (guard->done)
+    return 0;
+
+#ifdef __RTP__
+  __gthread_lock_library ();
+#else
+  while (!vxTas ((void *)&guard->busy))
+    {
+#ifdef __PPC__
+      /* This can happen on powerpc, which is using all 32 bits
+	 of the gthread_once_t structure.  */
+      if (guard->done)
+	return;
+#endif
+      taskDelay (1);
+    }
+#endif
+
+  /* Only one thread at a time gets here.  Check ->done again, then
+     go ahead and call func() if no one has done it yet.  */
+  if (!guard->done)
+    {
+      func ();
+      guard->done = 1;
+    }
+
+#ifdef __RTP__
+  __gthread_unlock_library ();
+#else
+  guard->busy = 0;
+#endif
+  return 0;
+}
+
+#endif /* __GTHREADS */
diff --git a/gcc-4.9/libgcc/config/xtensa/crti.S b/gcc-4.9/libgcc/config/xtensa/crti.S
new file mode 100644
index 000000000..13e5e7ed9
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/crti.S
@@ -0,0 +1,51 @@
+# Start .init and .fini sections.
+# Copyright (C) 2003-2014 Free Software Foundation, Inc.
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+# This file just makes a stack frame for the contents of the .fini and
+# .init sections.  Users may put any desired instructions in those
+# sections.
+
+#include "xtensa-config.h"
+
+	.section .init
+	.globl _init
+	.type _init,@function
+	.align	4
+_init:
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	entry	sp, 64
+#else
+	addi	sp, sp, -32
+	s32i	a0, sp, 0
+#endif
+
+	.section .fini
+	.globl _fini
+	.type _fini,@function
+	.align	4
+_fini:
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	entry	sp, 64
+#else
+	addi	sp, sp, -32
+	s32i	a0, sp, 0
+#endif
diff --git a/gcc-4.9/libgcc/config/xtensa/crtn.S b/gcc-4.9/libgcc/config/xtensa/crtn.S
new file mode 100644
index 000000000..fda453b97
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/crtn.S
@@ -0,0 +1,46 @@
+# End of .init and .fini sections.
+# Copyright (C) 2003-2014 Free Software Foundation, Inc.
+# 
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+# WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+# 
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return.  Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+#include "xtensa-config.h"
+
+	.section .init
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	retw
+#else
+	l32i	a0, sp, 0
+	addi	sp, sp, 32
+	ret
+#endif
+
+	.section .fini
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	retw
+#else
+	l32i	a0, sp, 0
+	addi	sp, sp, 32
+	ret
+#endif
diff --git a/gcc-4.9/libgcc/config/xtensa/ieee754-df.S b/gcc-4.9/libgcc/config/xtensa/ieee754-df.S
new file mode 100644
index 000000000..3582338ac
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/ieee754-df.S
@@ -0,0 +1,2388 @@
+/* IEEE-754 double-precision functions for Xtensa
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef __XTENSA_EB__
+#define xh a2
+#define xl a3
+#define yh a4
+#define yl a5
+#else
+#define xh a3
+#define xl a2
+#define yh a5
+#define yl a4
+#endif
+
+/*  Warning!  The branch displacements for some Xtensa branch instructions
+    are quite small, and this code has been carefully laid out to keep
+    branch targets in range.  If you change anything, be sure to check that
+    the assembler is not relaxing anything to branch over a jump.  */
+
+#ifdef L_negdf2
+
+	.align	4
+	.global	__negdf2
+	.type	__negdf2, @function
+__negdf2:
+	leaf_entry sp, 16
+	movi	a4, 0x80000000
+	xor	xh, xh, a4
+	leaf_return
+
+#endif /* L_negdf2 */
+
+#ifdef L_addsubdf3
+
+	/* Addition */
+__adddf3_aux:
+	
+	/* Handle NaNs and Infinities.  (This code is placed before the
+	   start of the function just to keep it in range of the limited
+	   branch displacements.)  */
+
+.Ladd_xnan_or_inf:
+	/* If y is neither Infinity nor NaN, return x.  */
+	bnall	yh, a6, 1f
+	/* If x is a NaN, return it.  Otherwise, return y.  */
+	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, .Ladd_ynan_or_inf
+1:	leaf_return
+
+.Ladd_ynan_or_inf:
+	/* Return y.  */
+	mov	xh, yh
+	mov	xl, yl
+	leaf_return
+
+.Ladd_opposite_signs:
+	/* Operand signs differ.  Do a subtraction.  */
+	slli	a7, a6, 11
+	xor	yh, yh, a7
+	j	.Lsub_same_sign
+
+	.align	4
+	.global	__adddf3
+	.type	__adddf3, @function
+__adddf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+
+	/* Check if the two operands have the same sign.  */
+	xor	a7, xh, yh
+	bltz	a7, .Ladd_opposite_signs
+
+.Ladd_same_sign:	
+	/* Check if either exponent == 0x7ff (i.e., NaN or Infinity).  */
+	ball	xh, a6, .Ladd_xnan_or_inf
+	ball	yh, a6, .Ladd_ynan_or_inf
+
+	/* Compare the exponents.  The smaller operand will be shifted
+	   right by the exponent difference and added to the larger
+	   one.  */
+	extui	a7, xh, 20, 12
+	extui	a8, yh, 20, 12
+	bltu	a7, a8, .Ladd_shiftx
+
+.Ladd_shifty:
+	/* Check if the smaller (or equal) exponent is zero.  */
+	bnone	yh, a6, .Ladd_yexpzero
+
+	/* Replace yh sign/exponent with 0x001.  */
+	or	yh, yh, a6
+	slli	yh, yh, 11
+	srli	yh, yh, 11
+
+.Ladd_yexpdiff:
+	/* Compute the exponent difference.  Optimize for difference < 32.  */
+	sub	a10, a7, a8
+	bgeui	a10, 32, .Ladd_bigshifty
+	
+	/* Shift yh/yl right by the exponent difference.  Any bits that are
+	   shifted out of yl are saved in a9 for rounding the result.  */
+	ssr	a10
+	movi	a9, 0
+	src	a9, yl, a9
+	src	yl, yh, yl
+	srl	yh, yh
+
+.Ladd_addy:
+	/* Do the 64-bit addition.  */
+	add	xl, xl, yl
+	add	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, 1
+1:
+	/* Check if the add overflowed into the exponent.  */
+	extui	a10, xh, 20, 12
+	beq	a10, a7, .Ladd_round
+	mov	a8, a7
+	j	.Ladd_carry
+
+.Ladd_yexpzero:
+	/* y is a subnormal value.  Replace its sign/exponent with zero,
+	   i.e., no implicit "1.0", and increment the apparent exponent
+	   because subnormals behave as if they had the minimum (nonzero)
+	   exponent.  Test for the case when both exponents are zero.  */
+	slli	yh, yh, 12
+	srli	yh, yh, 12
+	bnone	xh, a6, .Ladd_bothexpzero
+	addi	a8, a8, 1
+	j	.Ladd_yexpdiff
+
+.Ladd_bothexpzero:
+	/* Both exponents are zero.  Handle this as a special case.  There
+	   is no need to shift or round, and the normal code for handling
+	   a carry into the exponent field will not work because it
+	   assumes there is an implicit "1.0" that needs to be added.  */
+	add	xl, xl, yl
+	add	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, 1
+1:	leaf_return
+
+.Ladd_bigshifty:
+	/* Exponent difference > 64 -- just return the bigger value.  */
+	bgeui	a10, 64, 1b
+
+	/* Shift yh/yl right by the exponent difference.  Any bits that are
+	   shifted out are saved in a9 for rounding the result.  */
+	ssr	a10
+	sll	a11, yl		/* lost bits shifted out of yl */
+	src	a9, yh, yl
+	srl	yl, yh
+	movi	yh, 0
+	beqz	a11, .Ladd_addy
+	or	a9, a9, a10	/* any positive, nonzero value will work */
+	j	.Ladd_addy
+
+.Ladd_xexpzero:
+	/* Same as "yexpzero" except skip handling the case when both
+	   exponents are zero.  */
+	slli	xh, xh, 12
+	srli	xh, xh, 12
+	addi	a7, a7, 1
+	j	.Ladd_xexpdiff
+
+.Ladd_shiftx:
+	/* Same thing as the "shifty" code, but with x and y swapped.  Also,
+	   because the exponent difference is always nonzero in this version,
+	   the shift sequence can use SLL and skip loading a constant zero.  */
+	bnone	xh, a6, .Ladd_xexpzero
+
+	or	xh, xh, a6
+	slli	xh, xh, 11
+	srli	xh, xh, 11
+
+.Ladd_xexpdiff:
+	sub	a10, a8, a7
+	bgeui	a10, 32, .Ladd_bigshiftx
+	
+	ssr	a10
+	sll	a9, xl
+	src	xl, xh, xl
+	srl	xh, xh
+
+.Ladd_addx:
+	add	xl, xl, yl
+	add	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, 1
+1:
+	/* Check if the add overflowed into the exponent.  */
+	extui	a10, xh, 20, 12
+	bne	a10, a8, .Ladd_carry
+
+.Ladd_round:
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a9, 1f
+	addi	xl, xl, 1
+	beqz	xl, .Ladd_roundcarry
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a9, a9, 1
+	beqz	a9, .Ladd_exactlyhalf
+1:	leaf_return
+
+.Ladd_bigshiftx:
+	/* Mostly the same thing as "bigshifty"....  */
+	bgeui	a10, 64, .Ladd_returny
+
+	ssr	a10
+	sll	a11, xl
+	src	a9, xh, xl
+	srl	xl, xh
+	movi	xh, 0
+	beqz	a11, .Ladd_addx
+	or	a9, a9, a10
+	j	.Ladd_addx
+
+.Ladd_returny:
+	mov	xh, yh
+	mov	xl, yl
+	leaf_return
+
+.Ladd_carry:	
+	/* The addition has overflowed into the exponent field, so the
+	   value needs to be renormalized.  The mantissa of the result
+	   can be recovered by subtracting the original exponent and
+	   adding 0x100000 (which is the explicit "1.0" for the
+	   mantissa of the non-shifted operand -- the "1.0" for the
+	   shifted operand was already added).  The mantissa can then
+	   be shifted right by one bit.  The explicit "1.0" of the
+	   shifted mantissa then needs to be replaced by the exponent,
+	   incremented by one to account for the normalizing shift.
+	   It is faster to combine these operations: do the shift first
+	   and combine the additions and subtractions.  If x is the
+	   original exponent, the result is:
+	       shifted mantissa - (x << 19) + (1 << 19) + (x << 20)
+	   or:
+	       shifted mantissa + ((x + 1) << 19)
+	   Note that the exponent is incremented here by leaving the
+	   explicit "1.0" of the mantissa in the exponent field.  */
+
+	/* Shift xh/xl right by one bit.  Save the lsb of xl.  */
+	mov	a10, xl
+	ssai	1
+	src	xl, xh, xl
+	srl	xh, xh
+
+	/* See explanation above.  The original exponent is in a8.  */
+	addi	a8, a8, 1
+	slli	a8, a8, 19
+	add	xh, xh, a8
+
+	/* Return an Infinity if the exponent overflowed.  */
+	ball	xh, a6, .Ladd_infinity
+	
+	/* Same thing as the "round" code except the msb of the leftover
+	   fraction is bit 0 of a10, with the rest of the fraction in a9.  */
+	bbci.l	a10, 0, 1f
+	addi	xl, xl, 1
+	beqz	xl, .Ladd_roundcarry
+	beqz	a9, .Ladd_exactlyhalf
+1:	leaf_return
+
+.Ladd_infinity:
+	/* Clear the mantissa.  */
+	movi	xl, 0
+	srli	xh, xh, 20
+	slli	xh, xh, 20
+
+	/* The sign bit may have been lost in a carry-out.  Put it back.  */
+	slli	a8, a8, 1
+	or	xh, xh, a8
+	leaf_return
+
+.Ladd_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	xl, xl, 1
+	slli	xl, xl, 1
+	leaf_return
+
+.Ladd_roundcarry:
+	/* xl is always zero when the rounding increment overflows, so
+	   there's no need to round it to an even value.  */
+	addi	xh, xh, 1
+	/* Overflow to the exponent is OK.  */
+	leaf_return
+
+
+	/* Subtraction */
+__subdf3_aux:
+	
+	/* Handle NaNs and Infinities.  (This code is placed before the
+	   start of the function just to keep it in range of the limited
+	   branch displacements.)  */
+
+.Lsub_xnan_or_inf:
+	/* If y is neither Infinity nor NaN, return x.  */
+	bnall	yh, a6, 1f
+	/* Both x and y are either NaN or Inf, so the result is NaN.  */
+	movi	a4, 0x80000	/* make it a quiet NaN */
+	or	xh, xh, a4
+1:	leaf_return
+
+.Lsub_ynan_or_inf:
+	/* Negate y and return it.  */
+	slli	a7, a6, 11
+	xor	xh, yh, a7
+	mov	xl, yl
+	leaf_return
+
+.Lsub_opposite_signs:
+	/* Operand signs differ.  Do an addition.  */
+	slli	a7, a6, 11
+	xor	yh, yh, a7
+	j	.Ladd_same_sign
+
+	.align	4
+	.global	__subdf3
+	.type	__subdf3, @function
+__subdf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+
+	/* Check if the two operands have the same sign.  */
+	xor	a7, xh, yh
+	bltz	a7, .Lsub_opposite_signs
+
+.Lsub_same_sign:	
+	/* Check if either exponent == 0x7ff (i.e., NaN or Infinity).  */
+	ball	xh, a6, .Lsub_xnan_or_inf
+	ball	yh, a6, .Lsub_ynan_or_inf
+
+	/* Compare the operands.  In contrast to addition, the entire
+	   value matters here.  */
+	extui	a7, xh, 20, 11
+	extui	a8, yh, 20, 11
+	bltu	xh, yh, .Lsub_xsmaller
+	beq	xh, yh, .Lsub_compare_low
+
+.Lsub_ysmaller:
+	/* Check if the smaller (or equal) exponent is zero.  */
+	bnone	yh, a6, .Lsub_yexpzero
+
+	/* Replace yh sign/exponent with 0x001.  */
+	or	yh, yh, a6
+	slli	yh, yh, 11
+	srli	yh, yh, 11
+
+.Lsub_yexpdiff:
+	/* Compute the exponent difference.  Optimize for difference < 32.  */
+	sub	a10, a7, a8
+	bgeui	a10, 32, .Lsub_bigshifty
+	
+	/* Shift yh/yl right by the exponent difference.  Any bits that are
+	   shifted out of yl are saved in a9 for rounding the result.  */
+	ssr	a10
+	movi	a9, 0
+	src	a9, yl, a9
+	src	yl, yh, yl
+	srl	yh, yh
+
+.Lsub_suby:
+	/* Do the 64-bit subtraction.  */
+	sub	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, -1
+1:	sub	xl, xl, yl
+
+	/* Subtract the leftover bits in a9 from zero and propagate any
+	   borrow from xh/xl.  */
+	neg	a9, a9
+	beqz	a9, 1f
+	addi	a5, xh, -1
+	moveqz	xh, a5, xl
+	addi	xl, xl, -1
+1:
+	/* Check if the subtract underflowed into the exponent.  */
+	extui	a10, xh, 20, 11
+	beq	a10, a7, .Lsub_round
+	j	.Lsub_borrow
+
+.Lsub_compare_low:
+	/* The high words are equal.  Compare the low words.  */
+	bltu	xl, yl, .Lsub_xsmaller
+	bltu	yl, xl, .Lsub_ysmaller
+	/* The operands are equal.  Return 0.0.  */
+	movi	xh, 0
+	movi	xl, 0
+1:	leaf_return
+
+.Lsub_yexpzero:
+	/* y is a subnormal value.  Replace its sign/exponent with zero,
+	   i.e., no implicit "1.0".  Unless x is also a subnormal, increment
+	   y's apparent exponent because subnormals behave as if they had
+	   the minimum (nonzero) exponent.  */
+	slli	yh, yh, 12
+	srli	yh, yh, 12
+	bnone	xh, a6, .Lsub_yexpdiff
+	addi	a8, a8, 1
+	j	.Lsub_yexpdiff
+
+.Lsub_bigshifty:
+	/* Exponent difference > 64 -- just return the bigger value.  */
+	bgeui	a10, 64, 1b
+
+	/* Shift yh/yl right by the exponent difference.  Any bits that are
+	   shifted out are saved in a9 for rounding the result.  */
+	ssr	a10
+	sll	a11, yl		/* lost bits shifted out of yl */
+	src	a9, yh, yl
+	srl	yl, yh
+	movi	yh, 0
+	beqz	a11, .Lsub_suby
+	or	a9, a9, a10	/* any positive, nonzero value will work */
+	j	.Lsub_suby
+
+.Lsub_xsmaller:
+	/* Same thing as the "ysmaller" code, but with x and y swapped and
+	   with y negated.  */
+	bnone	xh, a6, .Lsub_xexpzero
+
+	or	xh, xh, a6
+	slli	xh, xh, 11
+	srli	xh, xh, 11
+
+.Lsub_xexpdiff:
+	sub	a10, a8, a7
+	bgeui	a10, 32, .Lsub_bigshiftx
+	
+	ssr	a10
+	movi	a9, 0
+	src	a9, xl, a9
+	src	xl, xh, xl
+	srl	xh, xh
+
+	/* Negate y.  */
+	slli	a11, a6, 11
+	xor	yh, yh, a11
+
+.Lsub_subx:
+	sub	xl, yl, xl
+	sub	xh, yh, xh
+	bgeu	yl, xl, 1f
+	addi	xh, xh, -1
+1:
+	/* Subtract the leftover bits in a9 from zero and propagate any
+	   borrow from xh/xl.  */
+	neg	a9, a9
+	beqz	a9, 1f
+	addi	a5, xh, -1
+	moveqz	xh, a5, xl
+	addi	xl, xl, -1
+1:
+	/* Check if the subtract underflowed into the exponent.  */
+	extui	a10, xh, 20, 11
+	bne	a10, a8, .Lsub_borrow
+
+.Lsub_round:
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a9, 1f
+	addi	xl, xl, 1
+	beqz	xl, .Lsub_roundcarry
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a9, a9, 1
+	beqz	a9, .Lsub_exactlyhalf
+1:	leaf_return
+
+.Lsub_xexpzero:
+	/* Same as "yexpzero".  */
+	slli	xh, xh, 12
+	srli	xh, xh, 12
+	bnone	yh, a6, .Lsub_xexpdiff
+	addi	a7, a7, 1
+	j	.Lsub_xexpdiff
+
+.Lsub_bigshiftx:
+	/* Mostly the same thing as "bigshifty", but with the sign bit of the
+	   shifted value set so that the subsequent subtraction flips the
+	   sign of y.  */
+	bgeui	a10, 64, .Lsub_returny
+
+	ssr	a10
+	sll	a11, xl
+	src	a9, xh, xl
+	srl	xl, xh
+	slli	xh, a6, 11	/* set sign bit of xh */
+	beqz	a11, .Lsub_subx
+	or	a9, a9, a10
+	j	.Lsub_subx
+
+.Lsub_returny:
+	/* Negate and return y.  */
+	slli	a7, a6, 11
+	xor	xh, yh, a7
+	mov	xl, yl
+	leaf_return
+
+.Lsub_borrow:	
+	/* The subtraction has underflowed into the exponent field, so the
+	   value needs to be renormalized.  Shift the mantissa left as
+	   needed to remove any leading zeros and adjust the exponent
+	   accordingly.  If the exponent is not large enough to remove
+	   all the leading zeros, the result will be a subnormal value.  */
+
+	slli	a8, xh, 12
+	beqz	a8, .Lsub_xhzero
+	do_nsau	a6, a8, a7, a11
+	srli	a8, a8, 12
+	bge	a6, a10, .Lsub_subnormal
+	addi	a6, a6, 1
+
+.Lsub_shift_lt32:
+	/* Shift the mantissa (a8/xl/a9) left by a6.  */
+	ssl	a6
+	src	a8, a8, xl
+	src	xl, xl, a9
+	sll	a9, a9
+
+	/* Combine the shifted mantissa with the sign and exponent,
+	   decrementing the exponent by a6.  (The exponent has already
+	   been decremented by one due to the borrow from the subtraction,
+	   but adding the mantissa will increment the exponent by one.)  */
+	srli	xh, xh, 20
+	sub	xh, xh, a6
+	slli	xh, xh, 20
+	add	xh, xh, a8
+	j	.Lsub_round
+
+.Lsub_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	xl, xl, 1
+	slli	xl, xl, 1
+	leaf_return
+
+.Lsub_roundcarry:
+	/* xl is always zero when the rounding increment overflows, so
+	   there's no need to round it to an even value.  */
+	addi	xh, xh, 1
+	/* Overflow to the exponent is OK.  */
+	leaf_return
+
+.Lsub_xhzero:
+	/* When normalizing the result, all the mantissa bits in the high
+	   word are zero.  Shift by "20 + (leading zero count of xl) + 1".  */
+	do_nsau	a6, xl, a7, a11
+	addi	a6, a6, 21
+	blt	a10, a6, .Lsub_subnormal
+
+.Lsub_normalize_shift:
+	bltui	a6, 32, .Lsub_shift_lt32
+
+	ssl	a6
+	src	a8, xl, a9
+	sll	xl, a9
+	movi	a9, 0
+
+	srli	xh, xh, 20
+	sub	xh, xh, a6
+	slli	xh, xh, 20
+	add	xh, xh, a8
+	j	.Lsub_round
+
+.Lsub_subnormal:
+	/* The exponent is too small to shift away all the leading zeros.
+	   Set a6 to the current exponent (which has already been
+	   decremented by the borrow) so that the exponent of the result
+	   will be zero.  Do not add 1 to a6 in this case, because: (1)
+	   adding the mantissa will not increment the exponent, so there is
+	   no need to subtract anything extra from the exponent to
+	   compensate, and (2) the effective exponent of a subnormal is 1
+	   not 0 so the shift amount must be 1 smaller than normal. */
+	mov	a6, a10
+	j	.Lsub_normalize_shift
+
+#endif /* L_addsubdf3 */
+
+#ifdef L_muldf3
+
+	/* Multiplication */
+#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
+#define XCHAL_NO_MUL 1
+#endif
+
+__muldf3_aux:
+
+	/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
+	   (This code is placed before the start of the function just to
+	   keep it in range of the limited branch displacements.)  */
+
+.Lmul_xexpzero:
+	/* Clear the sign bit of x.  */
+	slli	xh, xh, 1
+	srli	xh, xh, 1
+
+	/* If x is zero, return zero.  */
+	or	a10, xh, xl
+	beqz	a10, .Lmul_return_zero
+
+	/* Normalize x.  Adjust the exponent in a8.  */
+	beqz	xh, .Lmul_xh_zero
+	do_nsau	a10, xh, a11, a12
+	addi	a10, a10, -11
+	ssl	a10
+	src	xh, xh, xl
+	sll	xl, xl
+	movi	a8, 1
+	sub	a8, a8, a10
+	j	.Lmul_xnormalized	
+.Lmul_xh_zero:
+	do_nsau	a10, xl, a11, a12
+	addi	a10, a10, -11
+	movi	a8, -31
+	sub	a8, a8, a10
+	ssl	a10
+	bltz	a10, .Lmul_xl_srl
+	sll	xh, xl
+	movi	xl, 0
+	j	.Lmul_xnormalized
+.Lmul_xl_srl:
+	srl	xh, xl
+	sll	xl, xl
+	j	.Lmul_xnormalized
+	
+.Lmul_yexpzero:
+	/* Clear the sign bit of y.  */
+	slli	yh, yh, 1
+	srli	yh, yh, 1
+
+	/* If y is zero, return zero.  */
+	or	a10, yh, yl
+	beqz	a10, .Lmul_return_zero
+
+	/* Normalize y.  Adjust the exponent in a9.  */
+	beqz	yh, .Lmul_yh_zero
+	do_nsau	a10, yh, a11, a12
+	addi	a10, a10, -11
+	ssl	a10
+	src	yh, yh, yl
+	sll	yl, yl
+	movi	a9, 1
+	sub	a9, a9, a10
+	j	.Lmul_ynormalized	
+.Lmul_yh_zero:
+	do_nsau	a10, yl, a11, a12
+	addi	a10, a10, -11
+	movi	a9, -31
+	sub	a9, a9, a10
+	ssl	a10
+	bltz	a10, .Lmul_yl_srl
+	sll	yh, yl
+	movi	yl, 0
+	j	.Lmul_ynormalized
+.Lmul_yl_srl:
+	srl	yh, yl
+	sll	yl, yl
+	j	.Lmul_ynormalized	
+
+.Lmul_return_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	xh, a7, 31
+	slli	xh, xh, 31
+	movi	xl, 0
+	j	.Lmul_done
+
+.Lmul_xnan_or_inf:
+	/* If y is zero, return NaN.  */
+	bnez	yl, 1f
+	slli	a8, yh, 1
+	bnez	a8, 1f
+	movi	a4, 0x80000	/* make it a quiet NaN */
+	or	xh, xh, a4
+	j	.Lmul_done
+1:
+	/* If y is NaN, return y.  */
+	bnall	yh, a6, .Lmul_returnx
+	slli	a8, yh, 12
+	or	a8, a8, yl
+	beqz	a8, .Lmul_returnx
+
+.Lmul_returny:
+	mov	xh, yh
+	mov	xl, yl
+
+.Lmul_returnx:
+	/* Set the sign bit and return.  */
+	extui	a7, a7, 31, 1
+	slli	xh, xh, 1
+	ssai	1
+	src	xh, a7, xh
+	j	.Lmul_done
+
+.Lmul_ynan_or_inf:
+	/* If x is zero, return NaN.  */
+	bnez	xl, .Lmul_returny
+	slli	a8, xh, 1
+	bnez	a8, .Lmul_returny
+	movi	a7, 0x80000	/* make it a quiet NaN */
+	or	xh, yh, a7
+	j	.Lmul_done
+
+	.align	4
+	.global	__muldf3
+	.type	__muldf3, @function
+__muldf3:
+#if __XTENSA_CALL0_ABI__
+	leaf_entry sp, 32
+	addi	sp, sp, -32
+	s32i	a12, sp, 16
+	s32i	a13, sp, 20
+	s32i	a14, sp, 24
+	s32i	a15, sp, 28
+#elif XCHAL_NO_MUL
+	/* This is not really a leaf function; allocate enough stack space
+	   to allow CALL12s to a helper function.  */
+	leaf_entry sp, 64
+#else
+	leaf_entry sp, 32
+#endif
+	movi	a6, 0x7ff00000
+
+	/* Get the sign of the result.  */
+	xor	a7, xh, yh
+
+	/* Check for NaN and infinity.  */
+	ball	xh, a6, .Lmul_xnan_or_inf
+	ball	yh, a6, .Lmul_ynan_or_inf
+
+	/* Extract the exponents.  */
+	extui	a8, xh, 20, 11
+	extui	a9, yh, 20, 11
+
+	beqz	a8, .Lmul_xexpzero
+.Lmul_xnormalized:	
+	beqz	a9, .Lmul_yexpzero
+.Lmul_ynormalized:	
+
+	/* Add the exponents.  */
+	add	a8, a8, a9
+
+	/* Replace sign/exponent fields with explicit "1.0".  */
+	movi	a10, 0x1fffff
+	or	xh, xh, a6
+	and	xh, xh, a10
+	or	yh, yh, a6
+	and	yh, yh, a10
+
+	/* Multiply 64x64 to 128 bits.  The result ends up in xh/xl/a6.
+	   The least-significant word of the result is thrown away except
+	   that if it is nonzero, the lsb of a6 is set to 1.  */
+#if XCHAL_HAVE_MUL32_HIGH
+
+	/* Compute a6 with any carry-outs in a10.  */
+	movi	a10, 0
+	mull	a6, xl, yh
+	mull	a11, xh, yl
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a10, a10, 1
+1:
+	muluh	a11, xl, yl
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a10, a10, 1
+1:	
+	/* If the low word of the result is nonzero, set the lsb of a6.  */
+	mull	a11, xl, yl
+	beqz	a11, 1f
+	movi	a9, 1
+	or	a6, a6, a9
+1:
+	/* Compute xl with any carry-outs in a9.  */
+	movi	a9, 0
+	mull	a11, xh, yh
+	add	a10, a10, a11
+	bgeu	a10, a11, 1f
+	addi	a9, a9, 1
+1:	
+	muluh	a11, xh, yl
+	add	a10, a10, a11
+	bgeu	a10, a11, 1f
+	addi	a9, a9, 1
+1:	
+	muluh	xl, xl, yh
+	add	xl, xl, a10
+	bgeu	xl, a10, 1f
+	addi	a9, a9, 1
+1:
+	/* Compute xh.  */
+	muluh	xh, xh, yh
+	add	xh, xh, a9
+
+#else /* ! XCHAL_HAVE_MUL32_HIGH */
+
+	/* Break the inputs into 16-bit chunks and compute 16 32-bit partial
+	   products.  These partial products are:
+
+		0 xll * yll
+
+		1 xll * ylh
+		2 xlh * yll
+
+		3 xll * yhl
+		4 xlh * ylh
+		5 xhl * yll
+
+		6 xll * yhh
+		7 xlh * yhl
+		8 xhl * ylh
+		9 xhh * yll
+
+		10 xlh * yhh
+		11 xhl * yhl
+		12 xhh * ylh
+
+		13 xhl * yhh
+		14 xhh * yhl
+
+		15 xhh * yhh
+
+	   where the input chunks are (hh, hl, lh, ll).  If using the Mul16
+	   or Mul32 multiplier options, these input chunks must be stored in
+	   separate registers.  For Mac16, the UMUL.AA.* opcodes can specify
+	   that the inputs come from either half of the registers, so there
+	   is no need to shift them out ahead of time.  If there is no
+	   multiply hardware, the 16-bit chunks can be extracted when setting
+	   up the arguments to the separate multiply function.  */
+
+	/* Save a7 since it is needed to hold a temporary value.  */
+	s32i	a7, sp, 4
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	/* Calling a separate multiply function will clobber a0 and requires
+	   use of a8 as a temporary, so save those values now.  (The function
+	   uses a custom ABI so nothing else needs to be saved.)  */
+	s32i	a0, sp, 0
+	s32i	a8, sp, 8
+#endif
+
+#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
+
+#define xlh a12
+#define ylh a13
+#define xhh a14
+#define yhh a15
+
+	/* Get the high halves of the inputs into registers.  */
+	srli	xlh, xl, 16
+	srli	ylh, yl, 16
+	srli	xhh, xh, 16
+	srli	yhh, yh, 16
+
+#define xll xl
+#define yll yl
+#define xhl xh
+#define yhl yh
+
+#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
+	/* Clear the high halves of the inputs.  This does not matter
+	   for MUL16 because the high bits are ignored.  */
+	extui	xl, xl, 0, 16
+	extui	xh, xh, 0, 16
+	extui	yl, yl, 0, 16
+	extui	yh, yh, 0, 16
+#endif
+#endif /* MUL16 || MUL32 */
+
+
+#if XCHAL_HAVE_MUL16
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mul16u	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MUL32
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mull	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MAC16
+
+/* The preprocessor insists on inserting a space when concatenating after
+   a period in the definition of do_mul below.  These macros are a workaround
+   using underscores instead of periods when doing the concatenation.  */
+#define umul_aa_ll umul.aa.ll
+#define umul_aa_lh umul.aa.lh
+#define umul_aa_hl umul.aa.hl
+#define umul_aa_hh umul.aa.hh
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	umul_aa_ ## xhalf ## yhalf	xreg, yreg; \
+	rsr	dst, ACCLO
+
+#else /* no multiply hardware */
+	
+#define set_arg_l(dst, src) \
+	extui	dst, src, 0, 16
+#define set_arg_h(dst, src) \
+	srli	dst, src, 16
+
+#if __XTENSA_CALL0_ABI__
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a13, xreg); \
+	set_arg_ ## yhalf (a14, yreg); \
+	call0	.Lmul_mulsi3; \
+	mov	dst, a12
+#else
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a14, xreg); \
+	set_arg_ ## yhalf (a15, yreg); \
+	call12	.Lmul_mulsi3; \
+	mov	dst, a14
+#endif /* __XTENSA_CALL0_ABI__ */
+
+#endif /* no multiply hardware */
+
+	/* Add pp1 and pp2 into a10 with carry-out in a9.  */
+	do_mul(a10, xl, l, yl, h)	/* pp 1 */
+	do_mul(a11, xl, h, yl, l)	/* pp 2 */
+	movi	a9, 0
+	add	a10, a10, a11
+	bgeu	a10, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Initialize a6 with a9/a10 shifted into position.  Note that
+	   this value can be safely incremented without any carry-outs.  */
+	ssai	16
+	src	a6, a9, a10
+
+	/* Compute the low word into a10.  */
+	do_mul(a11, xl, l, yl, l)	/* pp 0 */
+	sll	a10, a10
+	add	a10, a10, a11
+	bgeu	a10, a11, 1f
+	addi	a6, a6, 1
+1:
+	/* Compute the contributions of pp0-5 to a6, with carry-outs in a9.
+	   This is good enough to determine the low half of a6, so that any
+	   nonzero bits from the low word of the result can be collapsed
+	   into a6, freeing up a register.  */
+	movi	a9, 0
+	do_mul(a11, xl, l, yh, l)	/* pp 3 */
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	do_mul(a11, xl, h, yl, h)	/* pp 4 */
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	do_mul(a11, xh, l, yl, l)	/* pp 5 */
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Collapse any nonzero bits from the low word into a6.  */
+	beqz	a10, 1f
+	movi	a11, 1
+	or	a6, a6, a11
+1:
+	/* Add pp6-9 into a11 with carry-outs in a10.  */
+	do_mul(a7, xl, l, yh, h)	/* pp 6 */
+	do_mul(a11, xh, h, yl, l)	/* pp 9 */
+	movi	a10, 0
+	add	a11, a11, a7
+	bgeu	a11, a7, 1f
+	addi	a10, a10, 1
+1:	
+	do_mul(a7, xl, h, yh, l)	/* pp 7 */
+	add	a11, a11, a7
+	bgeu	a11, a7, 1f
+	addi	a10, a10, 1
+1:	
+	do_mul(a7, xh, l, yl, h)	/* pp 8 */
+	add	a11, a11, a7
+	bgeu	a11, a7, 1f
+	addi	a10, a10, 1
+1:	
+	/* Shift a10/a11 into position, and add low half of a11 to a6.  */
+	src	a10, a10, a11
+	add	a10, a10, a9
+	sll	a11, a11
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a10, a10, 1
+1:
+	/* Add pp10-12 into xl with carry-outs in a9.  */
+	movi	a9, 0
+	do_mul(xl, xl, h, yh, h)	/* pp 10 */
+	add	xl, xl, a10
+	bgeu	xl, a10, 1f
+	addi	a9, a9, 1
+1:
+	do_mul(a10, xh, l, yh, l)	/* pp 11 */
+	add	xl, xl, a10
+	bgeu	xl, a10, 1f
+	addi	a9, a9, 1
+1:
+	do_mul(a10, xh, h, yl, h)	/* pp 12 */
+	add	xl, xl, a10
+	bgeu	xl, a10, 1f
+	addi	a9, a9, 1
+1:
+	/* Add pp13-14 into a11 with carry-outs in a10.  */
+	do_mul(a11, xh, l, yh, h)	/* pp 13 */
+	do_mul(a7, xh, h, yh, l)	/* pp 14 */
+	movi	a10, 0
+	add	a11, a11, a7
+	bgeu	a11, a7, 1f
+	addi	a10, a10, 1
+1:
+	/* Shift a10/a11 into position, and add low half of a11 to a6.  */
+	src	a10, a10, a11
+	add	a10, a10, a9
+	sll	a11, a11
+	add	xl, xl, a11
+	bgeu	xl, a11, 1f
+	addi	a10, a10, 1
+1:
+	/* Compute xh.  */
+	do_mul(xh, xh, h, yh, h)	/* pp 15 */
+	add	xh, xh, a10
+
+	/* Restore values saved on the stack during the multiplication.  */
+	l32i	a7, sp, 4
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	l32i	a0, sp, 0
+	l32i	a8, sp, 8
+#endif
+#endif /* ! XCHAL_HAVE_MUL32_HIGH */
+
+	/* Shift left by 12 bits, unless there was a carry-out from the
+	   multiply, in which case, shift by 11 bits and increment the
+	   exponent.  Note: It is convenient to use the constant 0x3ff
+	   instead of 0x400 when removing the extra exponent bias (so that
+	   it is easy to construct 0x7fe for the overflow check).  Reverse
+	   the logic here to decrement the exponent sum by one unless there
+	   was a carry-out.  */
+	movi	a4, 11
+	srli	a5, xh, 21 - 12
+	bnez	a5, 1f
+	addi	a4, a4, 1
+	addi	a8, a8, -1
+1:	ssl	a4
+	src	xh, xh, xl
+	src	xl, xl, a6
+	sll	a6, a6
+
+	/* Subtract the extra bias from the exponent sum (plus one to account
+	   for the explicit "1.0" of the mantissa that will be added to the
+	   exponent in the final result).  */
+	movi	a4, 0x3ff
+	sub	a8, a8, a4
+	
+	/* Check for over/underflow.  The value in a8 is one less than the
+	   final exponent, so values in the range 0..7fd are OK here.  */
+	slli	a4, a4, 1	/* 0x7fe */
+	bgeu	a8, a4, .Lmul_overflow
+	
+.Lmul_round:
+	/* Round.  */
+	bgez	a6, .Lmul_rounded
+	addi	xl, xl, 1
+	beqz	xl, .Lmul_roundcarry
+	slli	a6, a6, 1
+	beqz	a6, .Lmul_exactlyhalf
+
+.Lmul_rounded:
+	/* Add the exponent to the mantissa.  */
+	slli	a8, a8, 20
+	add	xh, xh, a8
+
+.Lmul_addsign:
+	/* Add the sign bit.  */
+	srli	a7, a7, 31
+	slli	a7, a7, 31
+	or	xh, xh, a7
+
+.Lmul_done:
+#if __XTENSA_CALL0_ABI__
+	l32i	a12, sp, 16
+	l32i	a13, sp, 20
+	l32i	a14, sp, 24
+	l32i	a15, sp, 28
+	addi	sp, sp, 32
+#endif
+	leaf_return
+
+.Lmul_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	xl, xl, 1
+	slli	xl, xl, 1
+	j	.Lmul_rounded
+
+.Lmul_roundcarry:
+	/* xl is always zero when the rounding increment overflows, so
+	   there's no need to round it to an even value.  */
+	addi	xh, xh, 1
+	/* Overflow is OK -- it will be added to the exponent.  */
+	j	.Lmul_rounded
+
+.Lmul_overflow:
+	bltz	a8, .Lmul_underflow
+	/* Return +/- Infinity.  */
+	addi	a8, a4, 1	/* 0x7ff */
+	slli	xh, a8, 20
+	movi	xl, 0
+	j	.Lmul_addsign
+
+.Lmul_underflow:
+	/* Create a subnormal value, where the exponent field contains zero,
+	   but the effective exponent is 1.  The value of a8 is one less than
+	   the actual exponent, so just negate it to get the shift amount.  */
+	neg	a8, a8
+	mov	a9, a6
+	ssr	a8
+	bgeui	a8, 32, .Lmul_bigshift
+	
+	/* Shift xh/xl right.  Any bits that are shifted out of xl are saved
+	   in a6 (combined with the shifted-out bits currently in a6) for
+	   rounding the result.  */
+	sll	a6, xl
+	src	xl, xh, xl
+	srl	xh, xh
+	j	1f
+
+.Lmul_bigshift:
+	bgeui	a8, 64, .Lmul_flush_to_zero
+	sll	a10, xl		/* lost bits shifted out of xl */
+	src	a6, xh, xl
+	srl	xl, xh
+	movi	xh, 0
+	or	a9, a9, a10
+
+	/* Set the exponent to zero.  */
+1:	movi	a8, 0
+
+	/* Pack any nonzero bits shifted out into a6.  */
+	beqz	a9, .Lmul_round
+	movi	a9, 1
+	or	a6, a6, a9
+	j	.Lmul_round
+	
+.Lmul_flush_to_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	xh, a7, 31
+	slli	xh, xh, 31
+	movi	xl, 0
+	j	.Lmul_done
+
+#if XCHAL_NO_MUL
+	
+	/* For Xtensa processors with no multiply hardware, this simplified
+	   version of _mulsi3 is used for multiplying 16-bit chunks of
+	   the floating-point mantissas.  When using CALL0, this function
+	   uses a custom ABI: the inputs are passed in a13 and a14, the
+	   result is returned in a12, and a8 and a15 are clobbered.  */
+	.align	4
+.Lmul_mulsi3:
+	leaf_entry sp, 16
+	.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
+	movi	\dst, 0
+1:	add	\tmp1, \src2, \dst
+	extui	\tmp2, \src1, 0, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx2 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 1, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx4 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 2, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx8 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 3, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	srli	\src1, \src1, 4
+	slli	\src2, \src2, 4
+	bnez	\src1, 1b
+	.endm
+#if __XTENSA_CALL0_ABI__
+	mul_mulsi3_body a12, a13, a14, a15, a8
+#else
+	/* The result will be written into a2, so save that argument in a4.  */
+	mov	a4, a2
+	mul_mulsi3_body a2, a4, a3, a5, a6
+#endif
+	leaf_return
+#endif /* XCHAL_NO_MUL */
+#endif /* L_muldf3 */
+
+#ifdef L_divdf3
+
+	/* Division */
+__divdf3_aux:
+
+	/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
+	   (This code is placed before the start of the function just to
+	   keep it in range of the limited branch displacements.)  */
+
+.Ldiv_yexpzero:
+	/* Clear the sign bit of y.  */
+	slli	yh, yh, 1
+	srli	yh, yh, 1
+
+	/* Check for division by zero.  */
+	or	a10, yh, yl
+	beqz	a10, .Ldiv_yzero
+
+	/* Normalize y.  Adjust the exponent in a9.  */
+	beqz	yh, .Ldiv_yh_zero
+	do_nsau	a10, yh, a11, a9
+	addi	a10, a10, -11
+	ssl	a10
+	src	yh, yh, yl
+	sll	yl, yl
+	movi	a9, 1
+	sub	a9, a9, a10
+	j	.Ldiv_ynormalized	
+.Ldiv_yh_zero:
+	do_nsau	a10, yl, a11, a9
+	addi	a10, a10, -11
+	movi	a9, -31
+	sub	a9, a9, a10
+	ssl	a10
+	bltz	a10, .Ldiv_yl_srl
+	sll	yh, yl
+	movi	yl, 0
+	j	.Ldiv_ynormalized
+.Ldiv_yl_srl:
+	srl	yh, yl
+	sll	yl, yl
+	j	.Ldiv_ynormalized	
+
+.Ldiv_yzero:
+	/* y is zero.  Return NaN if x is also zero; otherwise, infinity.  */
+	slli	xh, xh, 1
+	srli	xh, xh, 1
+	or	xl, xl, xh
+	srli	xh, a7, 31
+	slli	xh, xh, 31
+	or	xh, xh, a6
+	bnez	xl, 1f
+	movi	a4, 0x80000	/* make it a quiet NaN */
+	or	xh, xh, a4
+1:	movi	xl, 0
+	leaf_return
+
+.Ldiv_xexpzero:
+	/* Clear the sign bit of x.  */
+	slli	xh, xh, 1
+	srli	xh, xh, 1
+
+	/* If x is zero, return zero.  */
+	or	a10, xh, xl
+	beqz	a10, .Ldiv_return_zero
+
+	/* Normalize x.  Adjust the exponent in a8.  */
+	beqz	xh, .Ldiv_xh_zero
+	do_nsau	a10, xh, a11, a8
+	addi	a10, a10, -11
+	ssl	a10
+	src	xh, xh, xl
+	sll	xl, xl
+	movi	a8, 1
+	sub	a8, a8, a10
+	j	.Ldiv_xnormalized	
+.Ldiv_xh_zero:
+	do_nsau	a10, xl, a11, a8
+	addi	a10, a10, -11
+	movi	a8, -31
+	sub	a8, a8, a10
+	ssl	a10
+	bltz	a10, .Ldiv_xl_srl
+	sll	xh, xl
+	movi	xl, 0
+	j	.Ldiv_xnormalized
+.Ldiv_xl_srl:
+	srl	xh, xl
+	sll	xl, xl
+	j	.Ldiv_xnormalized
+	
+.Ldiv_return_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	xh, a7, 31
+	slli	xh, xh, 31
+	movi	xl, 0
+	leaf_return
+
+.Ldiv_xnan_or_inf:
+	/* Set the sign bit of the result.  */
+	srli	a7, yh, 31
+	slli	a7, a7, 31
+	xor	xh, xh, a7
+	/* If y is NaN or Inf, return NaN.  */
+	bnall	yh, a6, 1f
+	movi	a4, 0x80000	/* make it a quiet NaN */
+	or	xh, xh, a4
+1:	leaf_return
+
+.Ldiv_ynan_or_inf:
+	/* If y is Infinity, return zero.  */
+	slli	a8, yh, 12
+	or	a8, a8, yl
+	beqz	a8, .Ldiv_return_zero
+	/* y is NaN; return it.  */
+	mov	xh, yh
+	mov	xl, yl
+	leaf_return
+
+.Ldiv_highequal1:
+	bltu	xl, yl, 2f
+	j	3f
+
+	.align	4
+	.global	__divdf3
+	.type	__divdf3, @function
+__divdf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+
+	/* Get the sign of the result.  */
+	xor	a7, xh, yh
+
+	/* Check for NaN and infinity.  */
+	ball	xh, a6, .Ldiv_xnan_or_inf
+	ball	yh, a6, .Ldiv_ynan_or_inf
+
+	/* Extract the exponents.  */
+	extui	a8, xh, 20, 11
+	extui	a9, yh, 20, 11
+
+	beqz	a9, .Ldiv_yexpzero
+.Ldiv_ynormalized:	
+	beqz	a8, .Ldiv_xexpzero
+.Ldiv_xnormalized:	
+
+	/* Subtract the exponents.  */
+	sub	a8, a8, a9
+
+	/* Replace sign/exponent fields with explicit "1.0".  */
+	movi	a10, 0x1fffff
+	or	xh, xh, a6
+	and	xh, xh, a10
+	or	yh, yh, a6
+	and	yh, yh, a10
+
+	/* Set SAR for left shift by one.  */
+	ssai	(32 - 1)
+
+	/* The first digit of the mantissa division must be a one.
+	   Shift x (and adjust the exponent) as needed to make this true.  */
+	bltu	yh, xh, 3f
+	beq	yh, xh, .Ldiv_highequal1
+2:	src	xh, xh, xl
+	sll	xl, xl
+	addi	a8, a8, -1
+3:
+	/* Do the first subtraction and shift.  */
+	sub	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, -1
+1:	sub	xl, xl, yl
+	src	xh, xh, xl
+	sll	xl, xl
+
+	/* Put the quotient into a10/a11.  */
+	movi	a10, 0
+	movi	a11, 1
+
+	/* Divide one bit at a time for 52 bits.  */
+	movi	a9, 52
+#if XCHAL_HAVE_LOOPS
+	loop	a9, .Ldiv_loopend
+#endif
+.Ldiv_loop:
+	/* Shift the quotient << 1.  */
+	src	a10, a10, a11
+	sll	a11, a11
+
+	/* Is this digit a 0 or 1?  */
+	bltu	xh, yh, 3f
+	beq	xh, yh, .Ldiv_highequal2
+
+	/* Output a 1 and subtract.  */
+2:	addi	a11, a11, 1
+	sub	xh, xh, yh
+	bgeu	xl, yl, 1f
+	addi	xh, xh, -1
+1:	sub	xl, xl, yl
+
+	/* Shift the dividend << 1.  */
+3:	src	xh, xh, xl
+	sll	xl, xl
+
+#if !XCHAL_HAVE_LOOPS
+	addi	a9, a9, -1
+	bnez	a9, .Ldiv_loop
+#endif
+.Ldiv_loopend:
+
+	/* Add the exponent bias (less one to account for the explicit "1.0"
+	   of the mantissa that will be added to the exponent in the final
+	   result).  */
+	movi	a9, 0x3fe
+	add	a8, a8, a9
+	
+	/* Check for over/underflow.  The value in a8 is one less than the
+	   final exponent, so values in the range 0..7fd are OK here.  */
+	addmi	a9, a9, 0x400	/* 0x7fe */
+	bgeu	a8, a9, .Ldiv_overflow
+
+.Ldiv_round:
+	/* Round.  The remainder (<< 1) is in xh/xl.  */
+	bltu	xh, yh, .Ldiv_rounded
+	beq	xh, yh, .Ldiv_highequal3
+.Ldiv_roundup:
+	addi	a11, a11, 1
+	beqz	a11, .Ldiv_roundcarry
+
+.Ldiv_rounded:
+	mov	xl, a11
+	/* Add the exponent to the mantissa.  */
+	slli	a8, a8, 20
+	add	xh, a10, a8
+
+.Ldiv_addsign:
+	/* Add the sign bit.  */
+	srli	a7, a7, 31
+	slli	a7, a7, 31
+	or	xh, xh, a7
+	leaf_return
+
+.Ldiv_highequal2:
+	bgeu	xl, yl, 2b
+	j	3b
+
+.Ldiv_highequal3:
+	bltu	xl, yl, .Ldiv_rounded
+	bne	xl, yl, .Ldiv_roundup
+
+	/* Remainder is exactly half the divisor.  Round even.  */
+	addi	a11, a11, 1
+	beqz	a11, .Ldiv_roundcarry
+	srli	a11, a11, 1
+	slli	a11, a11, 1
+	j	.Ldiv_rounded
+
+.Ldiv_overflow:
+	bltz	a8, .Ldiv_underflow
+	/* Return +/- Infinity.  */
+	addi	a8, a9, 1	/* 0x7ff */
+	slli	xh, a8, 20
+	movi	xl, 0
+	j	.Ldiv_addsign
+
+.Ldiv_underflow:
+	/* Create a subnormal value, where the exponent field contains zero,
+	   but the effective exponent is 1.  The value of a8 is one less than
+	   the actual exponent, so just negate it to get the shift amount.  */
+	neg	a8, a8
+	ssr	a8
+	bgeui	a8, 32, .Ldiv_bigshift
+	
+	/* Shift a10/a11 right.  Any bits that are shifted out of a11 are
+	   saved in a6 for rounding the result.  */
+	sll	a6, a11
+	src	a11, a10, a11
+	srl	a10, a10
+	j	1f
+
+.Ldiv_bigshift:
+	bgeui	a8, 64, .Ldiv_flush_to_zero
+	sll	a9, a11		/* lost bits shifted out of a11 */
+	src	a6, a10, a11
+	srl	a11, a10
+	movi	a10, 0
+	or	xl, xl, a9
+
+	/* Set the exponent to zero.  */
+1:	movi	a8, 0
+
+	/* Pack any nonzero remainder (in xh/xl) into a6.  */
+	or	xh, xh, xl
+	beqz	xh, 1f
+	movi	a9, 1
+	or	a6, a6, a9
+	
+	/* Round a10/a11 based on the bits shifted out into a6.  */
+1:	bgez	a6, .Ldiv_rounded
+	addi	a11, a11, 1
+	beqz	a11, .Ldiv_roundcarry
+	slli	a6, a6, 1
+	bnez	a6, .Ldiv_rounded
+	srli	a11, a11, 1
+	slli	a11, a11, 1
+	j	.Ldiv_rounded
+
+.Ldiv_roundcarry:
+	/* a11 is always zero when the rounding increment overflows, so
+	   there's no need to round it to an even value.  */
+	addi	a10, a10, 1
+	/* Overflow to the exponent field is OK.  */
+	j	.Ldiv_rounded
+
+.Ldiv_flush_to_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	xh, a7, 31
+	slli	xh, xh, 31
+	movi	xl, 0
+	leaf_return
+
+#endif /* L_divdf3 */
+
+#ifdef L_cmpdf2
+
+	/* Equal and Not Equal */
+
+	.align	4
+	.global	__eqdf2
+	.global	__nedf2
+	.set	__nedf2, __eqdf2
+	.type	__eqdf2, @function
+__eqdf2:
+	leaf_entry sp, 16
+	bne	xl, yl, 2f
+	bne	xh, yh, 4f
+
+	/* The values are equal but NaN != NaN.  Check the exponent.  */
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 3f
+
+	/* Equal.  */
+	movi	a2, 0
+	leaf_return
+
+	/* Not equal.  */
+2:	movi	a2, 1
+	leaf_return
+
+	/* Check if the mantissas are nonzero.  */
+3:	slli	a7, xh, 12
+	or	a7, a7, xl
+	j	5f
+
+	/* Check if x and y are zero with different signs.  */
+4:	or	a7, xh, yh
+	slli	a7, a7, 1
+	or	a7, a7, xl	/* xl == yl here */
+
+	/* Equal if a7 == 0, where a7 is either abs(x | y) or the mantissa
+	   or x when exponent(x) = 0x7ff and x == y.  */
+5:	movi	a2, 0
+	movi	a3, 1
+	movnez	a2, a3, a7	
+	leaf_return
+
+
+	/* Greater Than */
+
+	.align	4
+	.global	__gtdf2
+	.type	__gtdf2, @function
+__gtdf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 2f
+1:	bnall	yh, a6, .Lle_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, yh, 12
+	or	a7, a7, yl
+	beqz	a7, .Lle_cmp
+	movi	a2, 0
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, 1b
+	movi	a2, 0
+	leaf_return
+
+
+	/* Less Than or Equal */
+
+	.align	4
+	.global	__ledf2
+	.type	__ledf2, @function
+__ledf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 2f
+1:	bnall	yh, a6, .Lle_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, yh, 12
+	or	a7, a7, yl
+	beqz	a7, .Lle_cmp
+	movi	a2, 1
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, 1b
+	movi	a2, 1
+	leaf_return
+
+.Lle_cmp:
+	/* Check if x and y have different signs.  */
+	xor	a7, xh, yh
+	bltz	a7, .Lle_diff_signs
+
+	/* Check if x is negative.  */
+	bltz	xh, .Lle_xneg
+
+	/* Check if x <= y.  */
+	bltu	xh, yh, 4f
+	bne	xh, yh, 5f
+	bltu	yl, xl, 5f
+4:	movi	a2, 0
+	leaf_return
+
+.Lle_xneg:
+	/* Check if y <= x.  */
+	bltu	yh, xh, 4b
+	bne	yh, xh, 5f
+	bgeu	xl, yl, 4b
+5:	movi	a2, 1
+	leaf_return
+
+.Lle_diff_signs:
+	bltz	xh, 4b
+
+	/* Check if both x and y are zero.  */
+	or	a7, xh, yh
+	slli	a7, a7, 1
+	or	a7, a7, xl
+	or	a7, a7, yl
+	movi	a2, 1
+	movi	a3, 0
+	moveqz	a2, a3, a7
+	leaf_return
+
+
+	/* Greater Than or Equal */
+
+	.align	4
+	.global	__gedf2
+	.type	__gedf2, @function
+__gedf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 2f
+1:	bnall	yh, a6, .Llt_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, yh, 12
+	or	a7, a7, yl
+	beqz	a7, .Llt_cmp
+	movi	a2, -1
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, 1b
+	movi	a2, -1
+	leaf_return
+
+
+	/* Less Than */
+
+	.align	4
+	.global	__ltdf2
+	.type	__ltdf2, @function
+__ltdf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 2f
+1:	bnall	yh, a6, .Llt_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, yh, 12
+	or	a7, a7, yl
+	beqz	a7, .Llt_cmp
+	movi	a2, 0
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, 1b
+	movi	a2, 0
+	leaf_return
+
+.Llt_cmp:
+	/* Check if x and y have different signs.  */
+	xor	a7, xh, yh
+	bltz	a7, .Llt_diff_signs
+
+	/* Check if x is negative.  */
+	bltz	xh, .Llt_xneg
+
+	/* Check if x < y.  */
+	bltu	xh, yh, 4f
+	bne	xh, yh, 5f
+	bgeu	xl, yl, 5f
+4:	movi	a2, -1
+	leaf_return
+
+.Llt_xneg:
+	/* Check if y < x.  */
+	bltu	yh, xh, 4b
+	bne	yh, xh, 5f
+	bltu	yl, xl, 4b
+5:	movi	a2, 0
+	leaf_return
+
+.Llt_diff_signs:
+	bgez	xh, 5b
+
+	/* Check if both x and y are nonzero.  */
+	or	a7, xh, yh
+	slli	a7, a7, 1
+	or	a7, a7, xl
+	or	a7, a7, yl
+	movi	a2, 0
+	movi	a3, -1
+	movnez	a2, a3, a7
+	leaf_return
+
+
+	/* Unordered */
+
+	.align	4
+	.global	__unorddf2
+	.type	__unorddf2, @function
+__unorddf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7ff00000
+	ball	xh, a6, 3f
+1:	ball	yh, a6, 4f
+2:	movi	a2, 0
+	leaf_return
+
+3:	slli	a7, xh, 12
+	or	a7, a7, xl
+	beqz	a7, 1b
+	movi	a2, 1
+	leaf_return
+
+4:	slli	a7, yh, 12
+	or	a7, a7, yl
+	beqz	a7, 2b
+	movi	a2, 1
+	leaf_return
+
+#endif /* L_cmpdf2 */
+
+#ifdef L_fixdfsi
+
+	.align	4
+	.global	__fixdfsi
+	.type	__fixdfsi, @function
+__fixdfsi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7ff00000
+	ball	xh, a6, .Lfixdfsi_nan_or_inf
+
+	/* Extract the exponent and check if 0 < (exp - 0x3fe) < 32.  */
+	extui	a4, xh, 20, 11
+	extui	a5, a6, 19, 10	/* 0x3fe */
+	sub	a4, a4, a5
+	bgei	a4, 32, .Lfixdfsi_maxint
+	blti	a4, 1, .Lfixdfsi_zero
+
+	/* Add explicit "1.0" and shift << 11.  */
+	or	a7, xh, a6
+	ssai	(32 - 11)
+	src	a5, a7, xl
+
+	/* Shift back to the right, based on the exponent.  */
+	ssl	a4		/* shift by 32 - a4 */
+	srl	a5, a5
+
+	/* Negate the result if sign != 0.  */
+	neg	a2, a5
+	movgez	a2, a5, a7
+	leaf_return
+
+.Lfixdfsi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, xh, 12
+	or	a4, a4, xl
+	beqz	a4, .Lfixdfsi_maxint
+
+	/* Translate NaN to +maxint.  */
+	movi	xh, 0
+
+.Lfixdfsi_maxint:
+	slli	a4, a6, 11	/* 0x80000000 */
+	addi	a5, a4, -1	/* 0x7fffffff */
+	movgez	a4, a5, xh
+	mov	a2, a4
+	leaf_return
+
+.Lfixdfsi_zero:
+	movi	a2, 0
+	leaf_return
+
+#endif /* L_fixdfsi */
+
+#ifdef L_fixdfdi
+
+	.align	4
+	.global	__fixdfdi
+	.type	__fixdfdi, @function
+__fixdfdi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7ff00000
+	ball	xh, a6, .Lfixdfdi_nan_or_inf
+
+	/* Extract the exponent and check if 0 < (exp - 0x3fe) < 64.  */
+	extui	a4, xh, 20, 11
+	extui	a5, a6, 19, 10	/* 0x3fe */
+	sub	a4, a4, a5
+	bgei	a4, 64, .Lfixdfdi_maxint
+	blti	a4, 1, .Lfixdfdi_zero
+
+	/* Add explicit "1.0" and shift << 11.  */
+	or	a7, xh, a6
+	ssai	(32 - 11)
+	src	xh, a7, xl
+	sll	xl, xl
+
+	/* Shift back to the right, based on the exponent.  */
+	ssl	a4		/* shift by 64 - a4 */
+	bgei	a4, 32, .Lfixdfdi_smallshift
+	srl	xl, xh
+	movi	xh, 0
+
+.Lfixdfdi_shifted:	
+	/* Negate the result if sign != 0.  */
+	bgez	a7, 1f
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, 1f
+	addi	xh, xh, -1
+1:	leaf_return
+
+.Lfixdfdi_smallshift:
+	src	xl, xh, xl
+	srl	xh, xh
+	j	.Lfixdfdi_shifted
+
+.Lfixdfdi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, xh, 12
+	or	a4, a4, xl
+	beqz	a4, .Lfixdfdi_maxint
+
+	/* Translate NaN to +maxint.  */
+	movi	xh, 0
+
+.Lfixdfdi_maxint:
+	slli	a7, a6, 11	/* 0x80000000 */
+	bgez	xh, 1f
+	mov	xh, a7
+	movi	xl, 0
+	leaf_return
+
+1:	addi	xh, a7, -1	/* 0x7fffffff */
+	movi	xl, -1
+	leaf_return
+
+.Lfixdfdi_zero:
+	movi	xh, 0
+	movi	xl, 0
+	leaf_return
+
+#endif /* L_fixdfdi */
+
+#ifdef L_fixunsdfsi
+
+	.align	4
+	.global	__fixunsdfsi
+	.type	__fixunsdfsi, @function
+__fixunsdfsi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7ff00000
+	ball	xh, a6, .Lfixunsdfsi_nan_or_inf
+
+	/* Extract the exponent and check if 0 <= (exp - 0x3ff) < 32.  */
+	extui	a4, xh, 20, 11
+	extui	a5, a6, 20, 10	/* 0x3ff */
+	sub	a4, a4, a5
+	bgei	a4, 32, .Lfixunsdfsi_maxint
+	bltz	a4, .Lfixunsdfsi_zero
+
+	/* Add explicit "1.0" and shift << 11.  */
+	or	a7, xh, a6
+	ssai	(32 - 11)
+	src	a5, a7, xl
+
+	/* Shift back to the right, based on the exponent.  */
+	addi	a4, a4, 1
+	beqi	a4, 32, .Lfixunsdfsi_bigexp
+	ssl	a4		/* shift by 32 - a4 */
+	srl	a5, a5
+
+	/* Negate the result if sign != 0.  */
+	neg	a2, a5
+	movgez	a2, a5, a7
+	leaf_return
+
+.Lfixunsdfsi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, xh, 12
+	or	a4, a4, xl
+	beqz	a4, .Lfixunsdfsi_maxint
+
+	/* Translate NaN to 0xffffffff.  */
+	movi	a2, -1
+	leaf_return
+
+.Lfixunsdfsi_maxint:
+	slli	a4, a6, 11	/* 0x80000000 */
+	movi	a5, -1		/* 0xffffffff */
+	movgez	a4, a5, xh
+	mov	a2, a4
+	leaf_return
+
+.Lfixunsdfsi_zero:
+	movi	a2, 0
+	leaf_return
+
+.Lfixunsdfsi_bigexp:
+	/* Handle unsigned maximum exponent case.  */
+	bltz	xh, 1f
+	mov	a2, a5		/* no shift needed */
+	leaf_return
+
+	/* Return 0x80000000 if negative.  */
+1:	slli	a2, a6, 11
+	leaf_return
+
+#endif /* L_fixunsdfsi */
+
+#ifdef L_fixunsdfdi
+
+	.align	4
+	.global	__fixunsdfdi
+	.type	__fixunsdfdi, @function
+__fixunsdfdi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7ff00000
+	ball	xh, a6, .Lfixunsdfdi_nan_or_inf
+
+	/* Extract the exponent and check if 0 <= (exp - 0x3ff) < 64.  */
+	extui	a4, xh, 20, 11
+	extui	a5, a6, 20, 10	/* 0x3ff */
+	sub	a4, a4, a5
+	bgei	a4, 64, .Lfixunsdfdi_maxint
+	bltz	a4, .Lfixunsdfdi_zero
+
+	/* Add explicit "1.0" and shift << 11.  */
+	or	a7, xh, a6
+	ssai	(32 - 11)
+	src	xh, a7, xl
+	sll	xl, xl
+
+	/* Shift back to the right, based on the exponent.  */
+	addi	a4, a4, 1
+	beqi	a4, 64, .Lfixunsdfdi_bigexp
+	ssl	a4		/* shift by 64 - a4 */
+	bgei	a4, 32, .Lfixunsdfdi_smallshift
+	srl	xl, xh
+	movi	xh, 0
+
+.Lfixunsdfdi_shifted:
+	/* Negate the result if sign != 0.  */
+	bgez	a7, 1f
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, 1f
+	addi	xh, xh, -1
+1:	leaf_return
+
+.Lfixunsdfdi_smallshift:
+	src	xl, xh, xl
+	srl	xh, xh
+	j	.Lfixunsdfdi_shifted
+
+.Lfixunsdfdi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, xh, 12
+	or	a4, a4, xl
+	beqz	a4, .Lfixunsdfdi_maxint
+
+	/* Translate NaN to 0xffffffff.... */
+1:	movi	xh, -1
+	movi	xl, -1
+	leaf_return
+
+.Lfixunsdfdi_maxint:
+	bgez	xh, 1b
+2:	slli	xh, a6, 11	/* 0x80000000 */
+	movi	xl, 0
+	leaf_return
+
+.Lfixunsdfdi_zero:
+	movi	xh, 0
+	movi	xl, 0
+	leaf_return
+
+.Lfixunsdfdi_bigexp:
+	/* Handle unsigned maximum exponent case.  */
+	bltz	a7, 2b
+	leaf_return		/* no shift needed */
+
+#endif /* L_fixunsdfdi */
+
+#ifdef L_floatsidf
+
+	.align	4
+	.global	__floatunsidf
+	.type	__floatunsidf, @function
+__floatunsidf:
+	leaf_entry sp, 16
+	beqz	a2, .Lfloatsidf_return_zero
+
+	/* Set the sign to zero and jump to the floatsidf code.  */
+	movi	a7, 0
+	j	.Lfloatsidf_normalize
+
+	.align	4
+	.global	__floatsidf
+	.type	__floatsidf, @function
+__floatsidf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	beqz	a2, .Lfloatsidf_return_zero
+
+	/* Save the sign.  */
+	extui	a7, a2, 31, 1
+
+	/* Get the absolute value.  */
+#if XCHAL_HAVE_ABS
+	abs	a2, a2
+#else
+	neg	a4, a2
+	movltz	a2, a4, a2
+#endif
+
+.Lfloatsidf_normalize:
+	/* Normalize with the first 1 bit in the msb.  */
+	do_nsau	a4, a2, a5, a6
+	ssl	a4
+	sll	a5, a2
+
+	/* Shift the mantissa into position.  */
+	srli	xh, a5, 11
+	slli	xl, a5, (32 - 11)
+
+	/* Set the exponent.  */
+	movi	a5, 0x41d	/* 0x3fe + 31 */
+	sub	a5, a5, a4
+	slli	a5, a5, 20
+	add	xh, xh, a5
+
+	/* Add the sign and return. */
+	slli	a7, a7, 31
+	or	xh, xh, a7
+	leaf_return
+
+.Lfloatsidf_return_zero:
+	movi	a3, 0
+	leaf_return
+
+#endif /* L_floatsidf */
+
+#ifdef L_floatdidf
+
+	.align	4
+	.global	__floatundidf
+	.type	__floatundidf, @function
+__floatundidf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	or	a4, xh, xl
+	beqz	a4, 2f
+
+	/* Set the sign to zero and jump to the floatdidf code.  */
+	movi	a7, 0
+	j	.Lfloatdidf_normalize
+
+	.align	4
+	.global	__floatdidf
+	.type	__floatdidf, @function
+__floatdidf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	or	a4, xh, xl
+	beqz	a4, 2f
+
+	/* Save the sign.  */
+	extui	a7, xh, 31, 1
+
+	/* Get the absolute value.  */
+	bgez	xh, .Lfloatdidf_normalize
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, .Lfloatdidf_normalize
+	addi	xh, xh, -1
+
+.Lfloatdidf_normalize:
+	/* Normalize with the first 1 bit in the msb of xh.  */
+	beqz	xh, .Lfloatdidf_bigshift
+	do_nsau	a4, xh, a5, a6
+	ssl	a4
+	src	xh, xh, xl
+	sll	xl, xl
+
+.Lfloatdidf_shifted:
+	/* Shift the mantissa into position, with rounding bits in a6.  */
+	ssai	11
+	sll	a6, xl
+	src	xl, xh, xl
+	srl	xh, xh
+
+	/* Set the exponent.  */
+	movi	a5, 0x43d	/* 0x3fe + 63 */
+	sub	a5, a5, a4
+	slli	a5, a5, 20
+	add	xh, xh, a5
+
+	/* Add the sign.  */
+	slli	a7, a7, 31
+	or	xh, xh, a7
+
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a6, 2f
+	addi	xl, xl, 1
+	beqz	xl, .Lfloatdidf_roundcarry
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a6, a6, 1
+	beqz	a6, .Lfloatdidf_exactlyhalf
+2:	leaf_return
+
+.Lfloatdidf_bigshift:
+	/* xh is zero.  Normalize with first 1 bit of xl in the msb of xh.  */
+	do_nsau	a4, xl, a5, a6
+	ssl	a4
+	sll	xh, xl
+	movi	xl, 0
+	addi	a4, a4, 32
+	j	.Lfloatdidf_shifted
+
+.Lfloatdidf_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	xl, xl, 1
+	slli	xl, xl, 1
+	leaf_return
+
+.Lfloatdidf_roundcarry:
+	/* xl is always zero when the rounding increment overflows, so
+	   there's no need to round it to an even value.  */
+	addi	xh, xh, 1
+	/* Overflow to the exponent is OK.  */
+	leaf_return
+
+#endif /* L_floatdidf */
+
+#ifdef L_truncdfsf2
+
+	.align	4
+	.global	__truncdfsf2
+	.type	__truncdfsf2, @function
+__truncdfsf2:
+	leaf_entry sp, 16
+
+	/* Adjust the exponent bias.  */
+	movi	a4, (0x3ff - 0x7f) << 20
+	sub	a5, xh, a4
+
+	/* Check for underflow.  */
+	xor	a6, xh, a5
+	bltz	a6, .Ltrunc_underflow
+	extui	a6, a5, 20, 11
+	beqz	a6, .Ltrunc_underflow
+
+	/* Check for overflow.  */
+	movi	a4, 255
+	bge	a6, a4, .Ltrunc_overflow
+
+	/* Shift a5/xl << 3 into a5/a4.  */
+	ssai	(32 - 3)
+	src	a5, a5, xl
+	sll	a4, xl
+
+.Ltrunc_addsign:
+	/* Add the sign bit.  */
+	extui	a6, xh, 31, 1
+	slli	a6, a6, 31
+	or	a2, a6, a5
+
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a4, 1f
+	addi	a2, a2, 1
+	/* Overflow to the exponent is OK.  The answer will be correct.  */
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a4, a4, 1
+	beqz	a4, .Ltrunc_exactlyhalf
+1:	leaf_return
+
+.Ltrunc_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	leaf_return
+
+.Ltrunc_overflow:
+	/* Check if exponent == 0x7ff.  */
+	movi	a4, 0x7ff00000
+	bnall	xh, a4, 1f
+
+	/* Check if mantissa is nonzero.  */
+	slli	a5, xh, 12
+	or	a5, a5, xl
+	beqz	a5, 1f
+
+	/* Shift a4 to set a bit in the mantissa, making a quiet NaN.  */
+	srli	a4, a4, 1
+
+1:	slli	a4, a4, 4	/* 0xff000000 or 0xff800000 */
+	/* Add the sign bit.  */
+	extui	a6, xh, 31, 1
+	ssai	1
+	src	a2, a6, a4
+	leaf_return
+
+.Ltrunc_underflow:
+	/* Find shift count for a subnormal.  Flush to zero if >= 32.  */
+	extui	a6, xh, 20, 11
+	movi	a5, 0x3ff - 0x7f
+	sub	a6, a5, a6
+	addi	a6, a6, 1
+	bgeui	a6, 32, 1f
+
+	/* Replace the exponent with an explicit "1.0".  */
+	slli	a5, a5, 13	/* 0x700000 */
+	or	a5, a5, xh
+	slli	a5, a5, 11
+	srli	a5, a5, 11
+
+	/* Shift the mantissa left by 3 bits (into a5/a4).  */
+	ssai	(32 - 3)
+	src	a5, a5, xl
+	sll	a4, xl
+
+	/* Shift right by a6.  */
+	ssr	a6
+	sll	a7, a4
+	src	a4, a5, a4
+	srl	a5, a5
+	beqz	a7, .Ltrunc_addsign
+	or	a4, a4, a6	/* any positive, nonzero value will work */
+	j	.Ltrunc_addsign
+
+	/* Return +/- zero.  */
+1:	extui	a2, xh, 31, 1
+	slli	a2, a2, 31
+	leaf_return
+
+#endif /* L_truncdfsf2 */
+
+#ifdef L_extendsfdf2
+
+	.align	4
+	.global	__extendsfdf2
+	.type	__extendsfdf2, @function
+__extendsfdf2:
+	leaf_entry sp, 16
+
+	/* Save the sign bit and then shift it off.  */
+	extui	a5, a2, 31, 1
+	slli	a5, a5, 31
+	slli	a4, a2, 1
+
+	/* Extract and check the exponent.  */
+	extui	a6, a2, 23, 8
+	beqz	a6, .Lextend_expzero
+	addi	a6, a6, 1
+	beqi	a6, 256, .Lextend_nan_or_inf
+
+	/* Shift >> 3 into a4/xl.  */
+	srli	a4, a4, 4
+	slli	xl, a2, (32 - 3)
+
+	/* Adjust the exponent bias.  */
+	movi	a6, (0x3ff - 0x7f) << 20
+	add	a4, a4, a6
+
+	/* Add the sign bit.  */
+	or	xh, a4, a5
+	leaf_return
+
+.Lextend_nan_or_inf:
+	movi	a4, 0x7ff00000
+
+	/* Check for NaN.  */
+	slli	a7, a2, 9
+	beqz	a7, 1f
+
+	slli	a6, a6, 11	/* 0x80000 */
+	or	a4, a4, a6
+
+	/* Add the sign and return.  */
+1:	or	xh, a4, a5
+	movi	xl, 0
+	leaf_return
+
+.Lextend_expzero:
+	beqz	a4, 1b
+
+	/* Normalize it to have 8 zero bits before the first 1 bit.  */
+	do_nsau	a7, a4, a2, a3
+	addi	a7, a7, -8
+	ssl	a7
+	sll	a4, a4
+	
+	/* Shift >> 3 into a4/xl.  */
+	slli	xl, a4, (32 - 3)
+	srli	a4, a4, 3
+
+	/* Set the exponent.  */
+	movi	a6, 0x3fe - 0x7f
+	sub	a6, a6, a7
+	slli	a6, a6, 20
+	add	a4, a4, a6
+
+	/* Add the sign and return.  */
+	or	xh, a4, a5
+	leaf_return
+
+#endif /* L_extendsfdf2 */
+
+
diff --git a/gcc-4.9/libgcc/config/xtensa/ieee754-sf.S b/gcc-4.9/libgcc/config/xtensa/ieee754-sf.S
new file mode 100644
index 000000000..e96785c3f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/ieee754-sf.S
@@ -0,0 +1,1757 @@
+/* IEEE-754 single-precision functions for Xtensa
+   Copyright (C) 2006-2014 Free Software Foundation, Inc.
+   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifdef __XTENSA_EB__
+#define xh a2
+#define xl a3
+#define yh a4
+#define yl a5
+#else
+#define xh a3
+#define xl a2
+#define yh a5
+#define yl a4
+#endif
+
+/*  Warning!  The branch displacements for some Xtensa branch instructions
+    are quite small, and this code has been carefully laid out to keep
+    branch targets in range.  If you change anything, be sure to check that
+    the assembler is not relaxing anything to branch over a jump.  */
+
+#ifdef L_negsf2
+
+	.align	4
+	.global	__negsf2
+	.type	__negsf2, @function
+__negsf2:
+	leaf_entry sp, 16
+	movi	a4, 0x80000000
+	xor	a2, a2, a4
+	leaf_return
+
+#endif /* L_negsf2 */
+
+#ifdef L_addsubsf3
+
+	/* Addition */
+__addsf3_aux:
+
+	/* Handle NaNs and Infinities.  (This code is placed before the
+	   start of the function just to keep it in range of the limited
+	   branch displacements.)  */
+
+.Ladd_xnan_or_inf:
+	/* If y is neither Infinity nor NaN, return x.  */
+	bnall	a3, a6, 1f
+	/* If x is a NaN, return it.  Otherwise, return y.  */
+	slli	a7, a2, 9
+	beqz	a7, .Ladd_ynan_or_inf
+1:	leaf_return
+
+.Ladd_ynan_or_inf:
+	/* Return y.  */
+	mov	a2, a3
+	leaf_return
+
+.Ladd_opposite_signs:
+	/* Operand signs differ.  Do a subtraction.  */
+	slli	a7, a6, 8
+	xor	a3, a3, a7
+	j	.Lsub_same_sign
+
+	.align	4
+	.global	__addsf3
+	.type	__addsf3, @function
+__addsf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+
+	/* Check if the two operands have the same sign.  */
+	xor	a7, a2, a3
+	bltz	a7, .Ladd_opposite_signs
+
+.Ladd_same_sign:	
+	/* Check if either exponent == 0x7f8 (i.e., NaN or Infinity).  */
+	ball	a2, a6, .Ladd_xnan_or_inf
+	ball	a3, a6, .Ladd_ynan_or_inf
+
+	/* Compare the exponents.  The smaller operand will be shifted
+	   right by the exponent difference and added to the larger
+	   one.  */
+	extui	a7, a2, 23, 9
+	extui	a8, a3, 23, 9
+	bltu	a7, a8, .Ladd_shiftx
+
+.Ladd_shifty:
+	/* Check if the smaller (or equal) exponent is zero.  */
+	bnone	a3, a6, .Ladd_yexpzero
+
+	/* Replace y sign/exponent with 0x008.  */
+	or	a3, a3, a6
+	slli	a3, a3, 8
+	srli	a3, a3, 8
+
+.Ladd_yexpdiff:
+	/* Compute the exponent difference.  */
+	sub	a10, a7, a8
+
+	/* Exponent difference > 32 -- just return the bigger value.  */
+	bgeui	a10, 32, 1f
+	
+	/* Shift y right by the exponent difference.  Any bits that are
+	   shifted out of y are saved in a9 for rounding the result.  */
+	ssr	a10
+	movi	a9, 0
+	src	a9, a3, a9
+	srl	a3, a3
+
+	/* Do the addition.  */
+	add	a2, a2, a3
+
+	/* Check if the add overflowed into the exponent.  */
+	extui	a10, a2, 23, 9
+	beq	a10, a7, .Ladd_round
+	mov	a8, a7
+	j	.Ladd_carry
+
+.Ladd_yexpzero:
+	/* y is a subnormal value.  Replace its sign/exponent with zero,
+	   i.e., no implicit "1.0", and increment the apparent exponent
+	   because subnormals behave as if they had the minimum (nonzero)
+	   exponent.  Test for the case when both exponents are zero.  */
+	slli	a3, a3, 9
+	srli	a3, a3, 9
+	bnone	a2, a6, .Ladd_bothexpzero
+	addi	a8, a8, 1
+	j	.Ladd_yexpdiff
+
+.Ladd_bothexpzero:
+	/* Both exponents are zero.  Handle this as a special case.  There
+	   is no need to shift or round, and the normal code for handling
+	   a carry into the exponent field will not work because it
+	   assumes there is an implicit "1.0" that needs to be added.  */
+	add	a2, a2, a3
+1:	leaf_return
+
+.Ladd_xexpzero:
+	/* Same as "yexpzero" except skip handling the case when both
+	   exponents are zero.  */
+	slli	a2, a2, 9
+	srli	a2, a2, 9
+	addi	a7, a7, 1
+	j	.Ladd_xexpdiff
+
+.Ladd_shiftx:
+	/* Same thing as the "shifty" code, but with x and y swapped.  Also,
+	   because the exponent difference is always nonzero in this version,
+	   the shift sequence can use SLL and skip loading a constant zero.  */
+	bnone	a2, a6, .Ladd_xexpzero
+
+	or	a2, a2, a6
+	slli	a2, a2, 8
+	srli	a2, a2, 8
+
+.Ladd_xexpdiff:
+	sub	a10, a8, a7
+	bgeui	a10, 32, .Ladd_returny
+	
+	ssr	a10
+	sll	a9, a2
+	srl	a2, a2
+
+	add	a2, a2, a3
+
+	/* Check if the add overflowed into the exponent.  */
+	extui	a10, a2, 23, 9
+	bne	a10, a8, .Ladd_carry
+
+.Ladd_round:
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a9, 1f
+	addi	a2, a2, 1
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a9, a9, 1
+	beqz	a9, .Ladd_exactlyhalf
+1:	leaf_return
+
+.Ladd_returny:
+	mov	a2, a3
+	leaf_return
+
+.Ladd_carry:	
+	/* The addition has overflowed into the exponent field, so the
+	   value needs to be renormalized.  The mantissa of the result
+	   can be recovered by subtracting the original exponent and
+	   adding 0x800000 (which is the explicit "1.0" for the
+	   mantissa of the non-shifted operand -- the "1.0" for the
+	   shifted operand was already added).  The mantissa can then
+	   be shifted right by one bit.  The explicit "1.0" of the
+	   shifted mantissa then needs to be replaced by the exponent,
+	   incremented by one to account for the normalizing shift.
+	   It is faster to combine these operations: do the shift first
+	   and combine the additions and subtractions.  If x is the
+	   original exponent, the result is:
+	       shifted mantissa - (x << 22) + (1 << 22) + (x << 23)
+	   or:
+	       shifted mantissa + ((x + 1) << 22)
+	   Note that the exponent is incremented here by leaving the
+	   explicit "1.0" of the mantissa in the exponent field.  */
+
+	/* Shift x right by one bit.  Save the lsb.  */
+	mov	a10, a2
+	srli	a2, a2, 1
+
+	/* See explanation above.  The original exponent is in a8.  */
+	addi	a8, a8, 1
+	slli	a8, a8, 22
+	add	a2, a2, a8
+
+	/* Return an Infinity if the exponent overflowed.  */
+	ball	a2, a6, .Ladd_infinity
+	
+	/* Same thing as the "round" code except the msb of the leftover
+	   fraction is bit 0 of a10, with the rest of the fraction in a9.  */
+	bbci.l	a10, 0, 1f
+	addi	a2, a2, 1
+	beqz	a9, .Ladd_exactlyhalf
+1:	leaf_return
+
+.Ladd_infinity:
+	/* Clear the mantissa.  */
+	srli	a2, a2, 23
+	slli	a2, a2, 23
+
+	/* The sign bit may have been lost in a carry-out.  Put it back.  */
+	slli	a8, a8, 1
+	or	a2, a2, a8
+	leaf_return
+
+.Ladd_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	leaf_return
+
+
+	/* Subtraction */
+__subsf3_aux:
+	
+	/* Handle NaNs and Infinities.  (This code is placed before the
+	   start of the function just to keep it in range of the limited
+	   branch displacements.)  */
+
+.Lsub_xnan_or_inf:
+	/* If y is neither Infinity nor NaN, return x.  */
+	bnall	a3, a6, 1f
+	/* Both x and y are either NaN or Inf, so the result is NaN.  */
+	movi	a4, 0x400000	/* make it a quiet NaN */
+	or	a2, a2, a4
+1:	leaf_return
+
+.Lsub_ynan_or_inf:
+	/* Negate y and return it.  */
+	slli	a7, a6, 8
+	xor	a2, a3, a7
+	leaf_return
+
+.Lsub_opposite_signs:
+	/* Operand signs differ.  Do an addition.  */
+	slli	a7, a6, 8
+	xor	a3, a3, a7
+	j	.Ladd_same_sign
+
+	.align	4
+	.global	__subsf3
+	.type	__subsf3, @function
+__subsf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+
+	/* Check if the two operands have the same sign.  */
+	xor	a7, a2, a3
+	bltz	a7, .Lsub_opposite_signs
+
+.Lsub_same_sign:	
+	/* Check if either exponent == 0x7f8 (i.e., NaN or Infinity).  */
+	ball	a2, a6, .Lsub_xnan_or_inf
+	ball	a3, a6, .Lsub_ynan_or_inf
+
+	/* Compare the operands.  In contrast to addition, the entire
+	   value matters here.  */
+	extui	a7, a2, 23, 8
+	extui	a8, a3, 23, 8
+	bltu	a2, a3, .Lsub_xsmaller
+
+.Lsub_ysmaller:
+	/* Check if the smaller (or equal) exponent is zero.  */
+	bnone	a3, a6, .Lsub_yexpzero
+
+	/* Replace y sign/exponent with 0x008.  */
+	or	a3, a3, a6
+	slli	a3, a3, 8
+	srli	a3, a3, 8
+
+.Lsub_yexpdiff:
+	/* Compute the exponent difference.  */
+	sub	a10, a7, a8
+
+	/* Exponent difference > 32 -- just return the bigger value.  */
+	bgeui	a10, 32, 1f
+	
+	/* Shift y right by the exponent difference.  Any bits that are
+	   shifted out of y are saved in a9 for rounding the result.  */
+	ssr	a10
+	movi	a9, 0
+	src	a9, a3, a9
+	srl	a3, a3
+
+	sub	a2, a2, a3
+
+	/* Subtract the leftover bits in a9 from zero and propagate any
+	   borrow from a2.  */
+	neg	a9, a9
+	addi	a10, a2, -1
+	movnez	a2, a10, a9
+
+	/* Check if the subtract underflowed into the exponent.  */
+	extui	a10, a2, 23, 8
+	beq	a10, a7, .Lsub_round
+	j	.Lsub_borrow
+
+.Lsub_yexpzero:
+	/* Return zero if the inputs are equal.  (For the non-subnormal
+	   case, subtracting the "1.0" will cause a borrow from the exponent
+	   and this case can be detected when handling the borrow.)  */
+	beq	a2, a3, .Lsub_return_zero
+
+	/* y is a subnormal value.  Replace its sign/exponent with zero,
+	   i.e., no implicit "1.0".  Unless x is also a subnormal, increment
+	   y's apparent exponent because subnormals behave as if they had
+	   the minimum (nonzero) exponent.  */
+	slli	a3, a3, 9
+	srli	a3, a3, 9
+	bnone	a2, a6, .Lsub_yexpdiff
+	addi	a8, a8, 1
+	j	.Lsub_yexpdiff
+
+.Lsub_returny:
+	/* Negate and return y.  */
+	slli	a7, a6, 8
+	xor	a2, a3, a7
+1:	leaf_return
+
+.Lsub_xsmaller:
+	/* Same thing as the "ysmaller" code, but with x and y swapped and
+	   with y negated.  */
+	bnone	a2, a6, .Lsub_xexpzero
+
+	or	a2, a2, a6
+	slli	a2, a2, 8
+	srli	a2, a2, 8
+
+.Lsub_xexpdiff:
+	sub	a10, a8, a7
+	bgeui	a10, 32, .Lsub_returny
+	
+	ssr	a10
+	movi	a9, 0
+	src	a9, a2, a9
+	srl	a2, a2
+
+	/* Negate y.  */
+	slli	a11, a6, 8
+	xor	a3, a3, a11
+
+	sub	a2, a3, a2
+
+	neg	a9, a9
+	addi	a10, a2, -1
+	movnez	a2, a10, a9
+
+	/* Check if the subtract underflowed into the exponent.  */
+	extui	a10, a2, 23, 8
+	bne	a10, a8, .Lsub_borrow
+
+.Lsub_round:
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a9, 1f
+	addi	a2, a2, 1
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a9, a9, 1
+	beqz	a9, .Lsub_exactlyhalf
+1:	leaf_return
+
+.Lsub_xexpzero:
+	/* Same as "yexpzero".  */
+	beq	a2, a3, .Lsub_return_zero
+	slli	a2, a2, 9
+	srli	a2, a2, 9
+	bnone	a3, a6, .Lsub_xexpdiff
+	addi	a7, a7, 1
+	j	.Lsub_xexpdiff
+
+.Lsub_return_zero:
+	movi	a2, 0
+	leaf_return
+
+.Lsub_borrow:	
+	/* The subtraction has underflowed into the exponent field, so the
+	   value needs to be renormalized.  Shift the mantissa left as
+	   needed to remove any leading zeros and adjust the exponent
+	   accordingly.  If the exponent is not large enough to remove
+	   all the leading zeros, the result will be a subnormal value.  */
+
+	slli	a8, a2, 9
+	beqz	a8, .Lsub_xzero
+	do_nsau	a6, a8, a7, a11
+	srli	a8, a8, 9
+	bge	a6, a10, .Lsub_subnormal
+	addi	a6, a6, 1
+
+.Lsub_normalize_shift:
+	/* Shift the mantissa (a8/a9) left by a6.  */
+	ssl	a6
+	src	a8, a8, a9
+	sll	a9, a9
+
+	/* Combine the shifted mantissa with the sign and exponent,
+	   decrementing the exponent by a6.  (The exponent has already
+	   been decremented by one due to the borrow from the subtraction,
+	   but adding the mantissa will increment the exponent by one.)  */
+	srli	a2, a2, 23
+	sub	a2, a2, a6
+	slli	a2, a2, 23
+	add	a2, a2, a8
+	j	.Lsub_round
+
+.Lsub_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	leaf_return
+
+.Lsub_xzero:
+	/* If there was a borrow from the exponent, and the mantissa and
+	   guard digits are all zero, then the inputs were equal and the
+	   result should be zero.  */
+	beqz	a9, .Lsub_return_zero
+
+	/* Only the guard digit is nonzero.  Shift by min(24, a10).  */
+	addi	a11, a10, -24
+	movi	a6, 24
+	movltz	a6, a10, a11
+	j	.Lsub_normalize_shift
+
+.Lsub_subnormal:
+	/* The exponent is too small to shift away all the leading zeros.
+	   Set a6 to the current exponent (which has already been
+	   decremented by the borrow) so that the exponent of the result
+	   will be zero.  Do not add 1 to a6 in this case, because: (1)
+	   adding the mantissa will not increment the exponent, so there is
+	   no need to subtract anything extra from the exponent to
+	   compensate, and (2) the effective exponent of a subnormal is 1
+	   not 0 so the shift amount must be 1 smaller than normal. */
+	mov	a6, a10
+	j	.Lsub_normalize_shift
+
+#endif /* L_addsubsf3 */
+
+#ifdef L_mulsf3
+
+	/* Multiplication */
+#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
+#define XCHAL_NO_MUL 1
+#endif
+
+__mulsf3_aux:
+
+	/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
+	   (This code is placed before the start of the function just to
+	   keep it in range of the limited branch displacements.)  */
+
+.Lmul_xexpzero:
+	/* Clear the sign bit of x.  */
+	slli	a2, a2, 1
+	srli	a2, a2, 1
+
+	/* If x is zero, return zero.  */
+	beqz	a2, .Lmul_return_zero
+
+	/* Normalize x.  Adjust the exponent in a8.  */
+	do_nsau	a10, a2, a11, a12
+	addi	a10, a10, -8
+	ssl	a10
+	sll	a2, a2 
+	movi	a8, 1
+	sub	a8, a8, a10
+	j	.Lmul_xnormalized	
+	
+.Lmul_yexpzero:
+	/* Clear the sign bit of y.  */
+	slli	a3, a3, 1
+	srli	a3, a3, 1
+
+	/* If y is zero, return zero.  */
+	beqz	a3, .Lmul_return_zero
+
+	/* Normalize y.  Adjust the exponent in a9.  */
+	do_nsau	a10, a3, a11, a12
+	addi	a10, a10, -8
+	ssl	a10
+	sll	a3, a3
+	movi	a9, 1
+	sub	a9, a9, a10
+	j	.Lmul_ynormalized	
+
+.Lmul_return_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	a2, a7, 31
+	slli	a2, a2, 31
+	j	.Lmul_done
+
+.Lmul_xnan_or_inf:
+	/* If y is zero, return NaN.  */
+	slli	a8, a3, 1
+	bnez	a8, 1f
+	movi	a4, 0x400000	/* make it a quiet NaN */
+	or	a2, a2, a4
+	j	.Lmul_done
+1:
+	/* If y is NaN, return y.  */
+	bnall	a3, a6, .Lmul_returnx
+	slli	a8, a3, 9
+	beqz	a8, .Lmul_returnx
+
+.Lmul_returny:
+	mov	a2, a3
+
+.Lmul_returnx:
+	/* Set the sign bit and return.  */
+	extui	a7, a7, 31, 1
+	slli	a2, a2, 1
+	ssai	1
+	src	a2, a7, a2
+	j	.Lmul_done
+
+.Lmul_ynan_or_inf:
+	/* If x is zero, return NaN.  */
+	slli	a8, a2, 1
+	bnez	a8, .Lmul_returny
+	movi	a7, 0x400000	/* make it a quiet NaN */
+	or	a2, a3, a7
+	j	.Lmul_done
+
+	.align	4
+	.global	__mulsf3
+	.type	__mulsf3, @function
+__mulsf3:
+#if __XTENSA_CALL0_ABI__
+	leaf_entry sp, 32
+	addi	sp, sp, -32
+	s32i	a12, sp, 16
+	s32i	a13, sp, 20
+	s32i	a14, sp, 24
+	s32i	a15, sp, 28
+#elif XCHAL_NO_MUL
+	/* This is not really a leaf function; allocate enough stack space
+	   to allow CALL12s to a helper function.  */
+	leaf_entry sp, 64
+#else
+	leaf_entry sp, 32
+#endif
+	movi	a6, 0x7f800000
+
+	/* Get the sign of the result.  */
+	xor	a7, a2, a3
+
+	/* Check for NaN and infinity.  */
+	ball	a2, a6, .Lmul_xnan_or_inf
+	ball	a3, a6, .Lmul_ynan_or_inf
+
+	/* Extract the exponents.  */
+	extui	a8, a2, 23, 8
+	extui	a9, a3, 23, 8
+
+	beqz	a8, .Lmul_xexpzero
+.Lmul_xnormalized:	
+	beqz	a9, .Lmul_yexpzero
+.Lmul_ynormalized:	
+
+	/* Add the exponents.  */
+	add	a8, a8, a9
+
+	/* Replace sign/exponent fields with explicit "1.0".  */
+	movi	a10, 0xffffff
+	or	a2, a2, a6
+	and	a2, a2, a10
+	or	a3, a3, a6
+	and	a3, a3, a10
+
+	/* Multiply 32x32 to 64 bits.  The result ends up in a2/a6.  */
+
+#if XCHAL_HAVE_MUL32_HIGH
+
+	mull	a6, a2, a3
+	muluh	a2, a2, a3
+
+#else
+
+	/* Break the inputs into 16-bit chunks and compute 4 32-bit partial
+	   products.  These partial products are:
+
+		0 xl * yl
+
+		1 xl * yh
+		2 xh * yl
+
+		3 xh * yh
+
+	   If using the Mul16 or Mul32 multiplier options, these input
+	   chunks must be stored in separate registers.  For Mac16, the
+	   UMUL.AA.* opcodes can specify that the inputs come from either
+	   half of the registers, so there is no need to shift them out
+	   ahead of time.  If there is no multiply hardware, the 16-bit
+	   chunks can be extracted when setting up the arguments to the
+	   separate multiply function.  */
+
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	/* Calling a separate multiply function will clobber a0 and requires
+	   use of a8 as a temporary, so save those values now.  (The function
+	   uses a custom ABI so nothing else needs to be saved.)  */
+	s32i	a0, sp, 0
+	s32i	a8, sp, 4
+#endif
+
+#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
+
+#define a2h a4
+#define a3h a5
+
+	/* Get the high halves of the inputs into registers.  */
+	srli	a2h, a2, 16
+	srli	a3h, a3, 16
+
+#define a2l a2
+#define a3l a3
+
+#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
+	/* Clear the high halves of the inputs.  This does not matter
+	   for MUL16 because the high bits are ignored.  */
+	extui	a2, a2, 0, 16
+	extui	a3, a3, 0, 16
+#endif
+#endif /* MUL16 || MUL32 */
+
+
+#if XCHAL_HAVE_MUL16
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mul16u	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MUL32
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mull	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MAC16
+
+/* The preprocessor insists on inserting a space when concatenating after
+   a period in the definition of do_mul below.  These macros are a workaround
+   using underscores instead of periods when doing the concatenation.  */
+#define umul_aa_ll umul.aa.ll
+#define umul_aa_lh umul.aa.lh
+#define umul_aa_hl umul.aa.hl
+#define umul_aa_hh umul.aa.hh
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	umul_aa_ ## xhalf ## yhalf	xreg, yreg; \
+	rsr	dst, ACCLO
+
+#else /* no multiply hardware */
+	
+#define set_arg_l(dst, src) \
+	extui	dst, src, 0, 16
+#define set_arg_h(dst, src) \
+	srli	dst, src, 16
+
+#if __XTENSA_CALL0_ABI__
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a13, xreg); \
+	set_arg_ ## yhalf (a14, yreg); \
+	call0	.Lmul_mulsi3; \
+	mov	dst, a12
+#else
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a14, xreg); \
+	set_arg_ ## yhalf (a15, yreg); \
+	call12	.Lmul_mulsi3; \
+	mov	dst, a14
+#endif /* __XTENSA_CALL0_ABI__ */
+
+#endif /* no multiply hardware */
+
+	/* Add pp1 and pp2 into a6 with carry-out in a9.  */
+	do_mul(a6, a2, l, a3, h)	/* pp 1 */
+	do_mul(a11, a2, h, a3, l)	/* pp 2 */
+	movi	a9, 0
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Shift the high half of a9/a6 into position in a9.  Note that
+	   this value can be safely incremented without any carry-outs.  */
+	ssai	16
+	src	a9, a9, a6
+
+	/* Compute the low word into a6.  */
+	do_mul(a11, a2, l, a3, l)	/* pp 0 */
+	sll	a6, a6
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Compute the high word into a2.  */
+	do_mul(a2, a2, h, a3, h)	/* pp 3 */
+	add	a2, a2, a9
+	
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	/* Restore values saved on the stack during the multiplication.  */
+	l32i	a0, sp, 0
+	l32i	a8, sp, 4
+#endif
+#endif /* ! XCHAL_HAVE_MUL32_HIGH */
+
+	/* Shift left by 9 bits, unless there was a carry-out from the
+	   multiply, in which case, shift by 8 bits and increment the
+	   exponent.  */
+	movi	a4, 9
+	srli	a5, a2, 24 - 9
+	beqz	a5, 1f
+	addi	a4, a4, -1
+	addi	a8, a8, 1
+1:	ssl	a4
+	src	a2, a2, a6
+	sll	a6, a6
+
+	/* Subtract the extra bias from the exponent sum (plus one to account
+	   for the explicit "1.0" of the mantissa that will be added to the
+	   exponent in the final result).  */
+	movi	a4, 0x80
+	sub	a8, a8, a4
+	
+	/* Check for over/underflow.  The value in a8 is one less than the
+	   final exponent, so values in the range 0..fd are OK here.  */
+	movi	a4, 0xfe
+	bgeu	a8, a4, .Lmul_overflow
+	
+.Lmul_round:
+	/* Round.  */
+	bgez	a6, .Lmul_rounded
+	addi	a2, a2, 1
+	slli	a6, a6, 1
+	beqz	a6, .Lmul_exactlyhalf
+
+.Lmul_rounded:
+	/* Add the exponent to the mantissa.  */
+	slli	a8, a8, 23
+	add	a2, a2, a8
+
+.Lmul_addsign:
+	/* Add the sign bit.  */
+	srli	a7, a7, 31
+	slli	a7, a7, 31
+	or	a2, a2, a7
+
+.Lmul_done:
+#if __XTENSA_CALL0_ABI__
+	l32i	a12, sp, 16
+	l32i	a13, sp, 20
+	l32i	a14, sp, 24
+	l32i	a15, sp, 28
+	addi	sp, sp, 32
+#endif
+	leaf_return
+
+.Lmul_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	j	.Lmul_rounded
+
+.Lmul_overflow:
+	bltz	a8, .Lmul_underflow
+	/* Return +/- Infinity.  */
+	movi	a8, 0xff
+	slli	a2, a8, 23
+	j	.Lmul_addsign
+
+.Lmul_underflow:
+	/* Create a subnormal value, where the exponent field contains zero,
+	   but the effective exponent is 1.  The value of a8 is one less than
+	   the actual exponent, so just negate it to get the shift amount.  */
+	neg	a8, a8
+	mov	a9, a6
+	ssr	a8
+	bgeui	a8, 32, .Lmul_flush_to_zero
+	
+	/* Shift a2 right.  Any bits that are shifted out of a2 are saved
+	   in a6 (combined with the shifted-out bits currently in a6) for
+	   rounding the result.  */
+	sll	a6, a2
+	srl	a2, a2
+
+	/* Set the exponent to zero.  */
+	movi	a8, 0
+
+	/* Pack any nonzero bits shifted out into a6.  */
+	beqz	a9, .Lmul_round
+	movi	a9, 1
+	or	a6, a6, a9
+	j	.Lmul_round
+	
+.Lmul_flush_to_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	a2, a7, 31
+	slli	a2, a2, 31
+	j	.Lmul_done
+
+#if XCHAL_NO_MUL
+	
+	/* For Xtensa processors with no multiply hardware, this simplified
+	   version of _mulsi3 is used for multiplying 16-bit chunks of
+	   the floating-point mantissas.  When using CALL0, this function
+	   uses a custom ABI: the inputs are passed in a13 and a14, the
+	   result is returned in a12, and a8 and a15 are clobbered.  */
+	.align	4
+.Lmul_mulsi3:
+	leaf_entry sp, 16
+	.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
+	movi	\dst, 0
+1:	add	\tmp1, \src2, \dst
+	extui	\tmp2, \src1, 0, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx2 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 1, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx4 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 2, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx8 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 3, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	srli	\src1, \src1, 4
+	slli	\src2, \src2, 4
+	bnez	\src1, 1b
+	.endm
+#if __XTENSA_CALL0_ABI__
+	mul_mulsi3_body a12, a13, a14, a15, a8
+#else
+	/* The result will be written into a2, so save that argument in a4.  */
+	mov	a4, a2
+	mul_mulsi3_body a2, a4, a3, a5, a6
+#endif
+	leaf_return
+#endif /* XCHAL_NO_MUL */
+#endif /* L_mulsf3 */
+
+#ifdef L_divsf3
+
+	/* Division */
+__divsf3_aux:
+
+	/* Handle unusual cases (zeros, subnormals, NaNs and Infinities).
+	   (This code is placed before the start of the function just to
+	   keep it in range of the limited branch displacements.)  */
+
+.Ldiv_yexpzero:
+	/* Clear the sign bit of y.  */
+	slli	a3, a3, 1
+	srli	a3, a3, 1
+
+	/* Check for division by zero.  */
+	beqz	a3, .Ldiv_yzero
+
+	/* Normalize y.  Adjust the exponent in a9.  */
+	do_nsau	a10, a3, a4, a5
+	addi	a10, a10, -8
+	ssl	a10
+	sll	a3, a3
+	movi	a9, 1
+	sub	a9, a9, a10
+	j	.Ldiv_ynormalized	
+
+.Ldiv_yzero:
+	/* y is zero.  Return NaN if x is also zero; otherwise, infinity.  */
+	slli	a4, a2, 1
+	srli	a4, a4, 1
+	srli	a2, a7, 31
+	slli	a2, a2, 31
+	or	a2, a2, a6
+	bnez	a4, 1f
+	movi	a4, 0x400000	/* make it a quiet NaN */
+	or	a2, a2, a4
+1:	leaf_return
+
+.Ldiv_xexpzero:
+	/* Clear the sign bit of x.  */
+	slli	a2, a2, 1
+	srli	a2, a2, 1
+
+	/* If x is zero, return zero.  */
+	beqz	a2, .Ldiv_return_zero
+
+	/* Normalize x.  Adjust the exponent in a8.  */
+	do_nsau	a10, a2, a4, a5
+	addi	a10, a10, -8
+	ssl	a10
+	sll	a2, a2
+	movi	a8, 1
+	sub	a8, a8, a10
+	j	.Ldiv_xnormalized	
+	
+.Ldiv_return_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	a2, a7, 31
+	slli	a2, a2, 31
+	leaf_return
+
+.Ldiv_xnan_or_inf:
+	/* Set the sign bit of the result.  */
+	srli	a7, a3, 31
+	slli	a7, a7, 31
+	xor	a2, a2, a7
+	/* If y is NaN or Inf, return NaN.  */
+	bnall	a3, a6, 1f
+	movi	a4, 0x400000	/* make it a quiet NaN */
+	or	a2, a2, a4
+1:	leaf_return
+
+.Ldiv_ynan_or_inf:
+	/* If y is Infinity, return zero.  */
+	slli	a8, a3, 9
+	beqz	a8, .Ldiv_return_zero
+	/* y is NaN; return it.  */
+	mov	a2, a3
+	leaf_return
+
+	.align	4
+	.global	__divsf3
+	.type	__divsf3, @function
+__divsf3:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+
+	/* Get the sign of the result.  */
+	xor	a7, a2, a3
+
+	/* Check for NaN and infinity.  */
+	ball	a2, a6, .Ldiv_xnan_or_inf
+	ball	a3, a6, .Ldiv_ynan_or_inf
+
+	/* Extract the exponents.  */
+	extui	a8, a2, 23, 8
+	extui	a9, a3, 23, 8
+
+	beqz	a9, .Ldiv_yexpzero
+.Ldiv_ynormalized:	
+	beqz	a8, .Ldiv_xexpzero
+.Ldiv_xnormalized:	
+
+	/* Subtract the exponents.  */
+	sub	a8, a8, a9
+
+	/* Replace sign/exponent fields with explicit "1.0".  */
+	movi	a10, 0xffffff
+	or	a2, a2, a6
+	and	a2, a2, a10
+	or	a3, a3, a6
+	and	a3, a3, a10
+
+	/* The first digit of the mantissa division must be a one.
+	   Shift x (and adjust the exponent) as needed to make this true.  */
+	bltu	a3, a2, 1f
+	slli	a2, a2, 1
+	addi	a8, a8, -1
+1:
+	/* Do the first subtraction and shift.  */
+	sub	a2, a2, a3
+	slli	a2, a2, 1
+
+	/* Put the quotient into a10.  */
+	movi	a10, 1
+
+	/* Divide one bit at a time for 23 bits.  */
+	movi	a9, 23
+#if XCHAL_HAVE_LOOPS
+	loop	a9, .Ldiv_loopend
+#endif
+.Ldiv_loop:
+	/* Shift the quotient << 1.  */
+	slli	a10, a10, 1
+
+	/* Is this digit a 0 or 1?  */
+	bltu	a2, a3, 1f
+
+	/* Output a 1 and subtract.  */
+	addi	a10, a10, 1
+	sub	a2, a2, a3
+
+	/* Shift the dividend << 1.  */
+1:	slli	a2, a2, 1
+
+#if !XCHAL_HAVE_LOOPS
+	addi	a9, a9, -1
+	bnez	a9, .Ldiv_loop
+#endif
+.Ldiv_loopend:
+
+	/* Add the exponent bias (less one to account for the explicit "1.0"
+	   of the mantissa that will be added to the exponent in the final
+	   result).  */
+	addi	a8, a8, 0x7e
+	
+	/* Check for over/underflow.  The value in a8 is one less than the
+	   final exponent, so values in the range 0..fd are OK here.  */
+	movi	a4, 0xfe
+	bgeu	a8, a4, .Ldiv_overflow
+	
+.Ldiv_round:
+	/* Round.  The remainder (<< 1) is in a2.  */
+	bltu	a2, a3, .Ldiv_rounded
+	addi	a10, a10, 1
+	beq	a2, a3, .Ldiv_exactlyhalf
+
+.Ldiv_rounded:
+	/* Add the exponent to the mantissa.  */
+	slli	a8, a8, 23
+	add	a2, a10, a8
+
+.Ldiv_addsign:
+	/* Add the sign bit.  */
+	srli	a7, a7, 31
+	slli	a7, a7, 31
+	or	a2, a2, a7
+	leaf_return
+
+.Ldiv_overflow:
+	bltz	a8, .Ldiv_underflow
+	/* Return +/- Infinity.  */
+	addi	a8, a4, 1	/* 0xff */
+	slli	a2, a8, 23
+	j	.Ldiv_addsign
+
+.Ldiv_exactlyhalf:
+	/* Remainder is exactly half the divisor.  Round even.  */
+	srli	a10, a10, 1
+	slli	a10, a10, 1
+	j	.Ldiv_rounded
+
+.Ldiv_underflow:
+	/* Create a subnormal value, where the exponent field contains zero,
+	   but the effective exponent is 1.  The value of a8 is one less than
+	   the actual exponent, so just negate it to get the shift amount.  */
+	neg	a8, a8
+	ssr	a8
+	bgeui	a8, 32, .Ldiv_flush_to_zero
+	
+	/* Shift a10 right.  Any bits that are shifted out of a10 are
+	   saved in a6 for rounding the result.  */
+	sll	a6, a10
+	srl	a10, a10
+
+	/* Set the exponent to zero.  */
+	movi	a8, 0
+
+	/* Pack any nonzero remainder (in a2) into a6.  */
+	beqz	a2, 1f
+	movi	a9, 1
+	or	a6, a6, a9
+	
+	/* Round a10 based on the bits shifted out into a6.  */
+1:	bgez	a6, .Ldiv_rounded
+	addi	a10, a10, 1
+	slli	a6, a6, 1
+	bnez	a6, .Ldiv_rounded
+	srli	a10, a10, 1
+	slli	a10, a10, 1
+	j	.Ldiv_rounded
+
+.Ldiv_flush_to_zero:
+	/* Return zero with the appropriate sign bit.  */
+	srli	a2, a7, 31
+	slli	a2, a2, 31
+	leaf_return
+
+#endif /* L_divsf3 */
+
+#ifdef L_cmpsf2
+
+	/* Equal and Not Equal */
+
+	.align	4
+	.global	__eqsf2
+	.global	__nesf2
+	.set	__nesf2, __eqsf2
+	.type	__eqsf2, @function
+__eqsf2:
+	leaf_entry sp, 16
+	bne	a2, a3, 4f
+
+	/* The values are equal but NaN != NaN.  Check the exponent.  */
+	movi	a6, 0x7f800000
+	ball	a2, a6, 3f
+
+	/* Equal.  */
+	movi	a2, 0
+	leaf_return
+
+	/* Not equal.  */
+2:	movi	a2, 1
+	leaf_return
+
+	/* Check if the mantissas are nonzero.  */
+3:	slli	a7, a2, 9
+	j	5f
+
+	/* Check if x and y are zero with different signs.  */
+4:	or	a7, a2, a3
+	slli	a7, a7, 1
+
+	/* Equal if a7 == 0, where a7 is either abs(x | y) or the mantissa
+	   or x when exponent(x) = 0x7f8 and x == y.  */
+5:	movi	a2, 0
+	movi	a3, 1
+	movnez	a2, a3, a7	
+	leaf_return
+
+
+	/* Greater Than */
+
+	.align	4
+	.global	__gtsf2
+	.type	__gtsf2, @function
+__gtsf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+	ball	a2, a6, 2f
+1:	bnall	a3, a6, .Lle_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, a3, 9
+	beqz	a7, .Lle_cmp
+	movi	a2, 0
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, a2, 9
+	beqz	a7, 1b
+	movi	a2, 0
+	leaf_return
+
+
+	/* Less Than or Equal */
+
+	.align	4
+	.global	__lesf2
+	.type	__lesf2, @function
+__lesf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+	ball	a2, a6, 2f
+1:	bnall	a3, a6, .Lle_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, a3, 9
+	beqz	a7, .Lle_cmp
+	movi	a2, 1
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, a2, 9
+	beqz	a7, 1b
+	movi	a2, 1
+	leaf_return
+
+.Lle_cmp:
+	/* Check if x and y have different signs.  */
+	xor	a7, a2, a3
+	bltz	a7, .Lle_diff_signs
+
+	/* Check if x is negative.  */
+	bltz	a2, .Lle_xneg
+
+	/* Check if x <= y.  */
+	bltu	a3, a2, 5f
+4:	movi	a2, 0
+	leaf_return
+
+.Lle_xneg:
+	/* Check if y <= x.  */
+	bgeu	a2, a3, 4b
+5:	movi	a2, 1
+	leaf_return
+
+.Lle_diff_signs:
+	bltz	a2, 4b
+
+	/* Check if both x and y are zero.  */
+	or	a7, a2, a3
+	slli	a7, a7, 1
+	movi	a2, 1
+	movi	a3, 0
+	moveqz	a2, a3, a7
+	leaf_return
+
+
+	/* Greater Than or Equal */
+
+	.align	4
+	.global	__gesf2
+	.type	__gesf2, @function
+__gesf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+	ball	a2, a6, 2f
+1:	bnall	a3, a6, .Llt_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, a3, 9
+	beqz	a7, .Llt_cmp
+	movi	a2, -1
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, a2, 9
+	beqz	a7, 1b
+	movi	a2, -1
+	leaf_return
+
+
+	/* Less Than */
+
+	.align	4
+	.global	__ltsf2
+	.type	__ltsf2, @function
+__ltsf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+	ball	a2, a6, 2f
+1:	bnall	a3, a6, .Llt_cmp
+
+	/* Check if y is a NaN.  */
+	slli	a7, a3, 9
+	beqz	a7, .Llt_cmp
+	movi	a2, 0
+	leaf_return
+
+	/* Check if x is a NaN.  */
+2:	slli	a7, a2, 9
+	beqz	a7, 1b
+	movi	a2, 0
+	leaf_return
+
+.Llt_cmp:
+	/* Check if x and y have different signs.  */
+	xor	a7, a2, a3
+	bltz	a7, .Llt_diff_signs
+
+	/* Check if x is negative.  */
+	bltz	a2, .Llt_xneg
+
+	/* Check if x < y.  */
+	bgeu	a2, a3, 5f
+4:	movi	a2, -1
+	leaf_return
+
+.Llt_xneg:
+	/* Check if y < x.  */
+	bltu	a3, a2, 4b
+5:	movi	a2, 0
+	leaf_return
+
+.Llt_diff_signs:
+	bgez	a2, 5b
+
+	/* Check if both x and y are nonzero.  */
+	or	a7, a2, a3
+	slli	a7, a7, 1
+	movi	a2, 0
+	movi	a3, -1
+	movnez	a2, a3, a7
+	leaf_return
+
+
+	/* Unordered */
+
+	.align	4
+	.global	__unordsf2
+	.type	__unordsf2, @function
+__unordsf2:
+	leaf_entry sp, 16
+	movi	a6, 0x7f800000
+	ball	a2, a6, 3f
+1:	ball	a3, a6, 4f
+2:	movi	a2, 0
+	leaf_return
+
+3:	slli	a7, a2, 9
+	beqz	a7, 1b
+	movi	a2, 1
+	leaf_return
+
+4:	slli	a7, a3, 9
+	beqz	a7, 2b
+	movi	a2, 1
+	leaf_return
+
+#endif /* L_cmpsf2 */
+
+#ifdef L_fixsfsi
+
+	.align	4
+	.global	__fixsfsi
+	.type	__fixsfsi, @function
+__fixsfsi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7f800000
+	ball	a2, a6, .Lfixsfsi_nan_or_inf
+
+	/* Extract the exponent and check if 0 < (exp - 0x7e) < 32.  */
+	extui	a4, a2, 23, 8
+	addi	a4, a4, -0x7e
+	bgei	a4, 32, .Lfixsfsi_maxint
+	blti	a4, 1, .Lfixsfsi_zero
+
+	/* Add explicit "1.0" and shift << 8.  */
+	or	a7, a2, a6
+	slli	a5, a7, 8
+
+	/* Shift back to the right, based on the exponent.  */
+	ssl	a4		/* shift by 32 - a4 */
+	srl	a5, a5
+
+	/* Negate the result if sign != 0.  */
+	neg	a2, a5
+	movgez	a2, a5, a7
+	leaf_return
+
+.Lfixsfsi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, a2, 9
+	beqz	a4, .Lfixsfsi_maxint
+
+	/* Translate NaN to +maxint.  */
+	movi	a2, 0
+
+.Lfixsfsi_maxint:
+	slli	a4, a6, 8	/* 0x80000000 */
+	addi	a5, a4, -1	/* 0x7fffffff */
+	movgez	a4, a5, a2
+	mov	a2, a4
+	leaf_return
+
+.Lfixsfsi_zero:
+	movi	a2, 0
+	leaf_return
+
+#endif /* L_fixsfsi */
+
+#ifdef L_fixsfdi
+
+	.align	4
+	.global	__fixsfdi
+	.type	__fixsfdi, @function
+__fixsfdi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7f800000
+	ball	a2, a6, .Lfixsfdi_nan_or_inf
+
+	/* Extract the exponent and check if 0 < (exp - 0x7e) < 64.  */
+	extui	a4, a2, 23, 8
+	addi	a4, a4, -0x7e
+	bgei	a4, 64, .Lfixsfdi_maxint
+	blti	a4, 1, .Lfixsfdi_zero
+
+	/* Add explicit "1.0" and shift << 8.  */
+	or	a7, a2, a6
+	slli	xh, a7, 8
+
+	/* Shift back to the right, based on the exponent.  */
+	ssl	a4		/* shift by 64 - a4 */
+	bgei	a4, 32, .Lfixsfdi_smallshift
+	srl	xl, xh
+	movi	xh, 0
+
+.Lfixsfdi_shifted:	
+	/* Negate the result if sign != 0.  */
+	bgez	a7, 1f
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, 1f
+	addi	xh, xh, -1
+1:	leaf_return
+
+.Lfixsfdi_smallshift:
+	movi	xl, 0
+	sll	xl, xh
+	srl	xh, xh
+	j	.Lfixsfdi_shifted
+
+.Lfixsfdi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, a2, 9
+	beqz	a4, .Lfixsfdi_maxint
+
+	/* Translate NaN to +maxint.  */
+	movi	a2, 0
+
+.Lfixsfdi_maxint:
+	slli	a7, a6, 8	/* 0x80000000 */
+	bgez	a2, 1f
+	mov	xh, a7
+	movi	xl, 0
+	leaf_return
+
+1:	addi	xh, a7, -1	/* 0x7fffffff */
+	movi	xl, -1
+	leaf_return
+
+.Lfixsfdi_zero:
+	movi	xh, 0
+	movi	xl, 0
+	leaf_return
+
+#endif /* L_fixsfdi */
+
+#ifdef L_fixunssfsi
+
+	.align	4
+	.global	__fixunssfsi
+	.type	__fixunssfsi, @function
+__fixunssfsi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7f800000
+	ball	a2, a6, .Lfixunssfsi_nan_or_inf
+
+	/* Extract the exponent and check if 0 <= (exp - 0x7f) < 32.  */
+	extui	a4, a2, 23, 8
+	addi	a4, a4, -0x7f
+	bgei	a4, 32, .Lfixunssfsi_maxint
+	bltz	a4, .Lfixunssfsi_zero
+
+	/* Add explicit "1.0" and shift << 8.  */
+	or	a7, a2, a6
+	slli	a5, a7, 8
+
+	/* Shift back to the right, based on the exponent.  */
+	addi	a4, a4, 1
+	beqi	a4, 32, .Lfixunssfsi_bigexp
+	ssl	a4		/* shift by 32 - a4 */
+	srl	a5, a5
+
+	/* Negate the result if sign != 0.  */
+	neg	a2, a5
+	movgez	a2, a5, a7
+	leaf_return
+
+.Lfixunssfsi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, a2, 9
+	beqz	a4, .Lfixunssfsi_maxint
+
+	/* Translate NaN to 0xffffffff.  */
+	movi	a2, -1
+	leaf_return
+
+.Lfixunssfsi_maxint:
+	slli	a4, a6, 8	/* 0x80000000 */
+	movi	a5, -1		/* 0xffffffff */
+	movgez	a4, a5, a2
+	mov	a2, a4
+	leaf_return
+
+.Lfixunssfsi_zero:
+	movi	a2, 0
+	leaf_return
+
+.Lfixunssfsi_bigexp:
+	/* Handle unsigned maximum exponent case.  */
+	bltz	a2, 1f
+	mov	a2, a5		/* no shift needed */
+	leaf_return
+
+	/* Return 0x80000000 if negative.  */
+1:	slli	a2, a6, 8
+	leaf_return
+
+#endif /* L_fixunssfsi */
+
+#ifdef L_fixunssfdi
+
+	.align	4
+	.global	__fixunssfdi
+	.type	__fixunssfdi, @function
+__fixunssfdi:
+	leaf_entry sp, 16
+
+	/* Check for NaN and Infinity.  */
+	movi	a6, 0x7f800000
+	ball	a2, a6, .Lfixunssfdi_nan_or_inf
+
+	/* Extract the exponent and check if 0 <= (exp - 0x7f) < 64.  */
+	extui	a4, a2, 23, 8
+	addi	a4, a4, -0x7f
+	bgei	a4, 64, .Lfixunssfdi_maxint
+	bltz	a4, .Lfixunssfdi_zero
+
+	/* Add explicit "1.0" and shift << 8.  */
+	or	a7, a2, a6
+	slli	xh, a7, 8
+
+	/* Shift back to the right, based on the exponent.  */
+	addi	a4, a4, 1
+	beqi	a4, 64, .Lfixunssfdi_bigexp
+	ssl	a4		/* shift by 64 - a4 */
+	bgei	a4, 32, .Lfixunssfdi_smallshift
+	srl	xl, xh
+	movi	xh, 0
+
+.Lfixunssfdi_shifted:
+	/* Negate the result if sign != 0.  */
+	bgez	a7, 1f
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, 1f
+	addi	xh, xh, -1
+1:	leaf_return
+
+.Lfixunssfdi_smallshift:
+	movi	xl, 0
+	src	xl, xh, xl
+	srl	xh, xh
+	j	.Lfixunssfdi_shifted
+
+.Lfixunssfdi_nan_or_inf:
+	/* Handle Infinity and NaN.  */
+	slli	a4, a2, 9
+	beqz	a4, .Lfixunssfdi_maxint
+
+	/* Translate NaN to 0xffffffff.... */
+1:	movi	xh, -1
+	movi	xl, -1
+	leaf_return
+
+.Lfixunssfdi_maxint:
+	bgez	a2, 1b
+2:	slli	xh, a6, 8	/* 0x80000000 */
+	movi	xl, 0
+	leaf_return
+
+.Lfixunssfdi_zero:
+	movi	xh, 0
+	movi	xl, 0
+	leaf_return
+
+.Lfixunssfdi_bigexp:
+	/* Handle unsigned maximum exponent case.  */
+	bltz	a7, 2b
+	movi	xl, 0
+	leaf_return		/* no shift needed */
+
+#endif /* L_fixunssfdi */
+
+#ifdef L_floatsisf
+
+	.align	4
+	.global	__floatunsisf
+	.type	__floatunsisf, @function
+__floatunsisf:
+	leaf_entry sp, 16
+	beqz	a2, .Lfloatsisf_return
+
+	/* Set the sign to zero and jump to the floatsisf code.  */
+	movi	a7, 0
+	j	.Lfloatsisf_normalize
+
+	.align	4
+	.global	__floatsisf
+	.type	__floatsisf, @function
+__floatsisf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	beqz	a2, .Lfloatsisf_return
+
+	/* Save the sign.  */
+	extui	a7, a2, 31, 1
+
+	/* Get the absolute value.  */
+#if XCHAL_HAVE_ABS
+	abs	a2, a2
+#else
+	neg	a4, a2
+	movltz	a2, a4, a2
+#endif
+
+.Lfloatsisf_normalize:
+	/* Normalize with the first 1 bit in the msb.  */
+	do_nsau	a4, a2, a5, a6
+	ssl	a4
+	sll	a5, a2
+
+	/* Shift the mantissa into position, with rounding bits in a6.  */
+	srli	a2, a5, 8
+	slli	a6, a5, (32 - 8)
+
+	/* Set the exponent.  */
+	movi	a5, 0x9d	/* 0x7e + 31 */
+	sub	a5, a5, a4
+	slli	a5, a5, 23
+	add	a2, a2, a5
+
+	/* Add the sign.  */
+	slli	a7, a7, 31
+	or	a2, a2, a7
+
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a6, .Lfloatsisf_return
+	addi	a2, a2, 1	/* Overflow to the exponent is OK.  */
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a6, a6, 1
+	beqz	a6, .Lfloatsisf_exactlyhalf
+
+.Lfloatsisf_return:
+	leaf_return
+
+.Lfloatsisf_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	leaf_return
+
+#endif /* L_floatsisf */
+
+#ifdef L_floatdisf
+
+	.align	4
+	.global	__floatundisf
+	.type	__floatundisf, @function
+__floatundisf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	or	a4, xh, xl
+	beqz	a4, 2f
+
+	/* Set the sign to zero and jump to the floatdisf code.  */
+	movi	a7, 0
+	j	.Lfloatdisf_normalize
+
+	.align	4
+	.global	__floatdisf
+	.type	__floatdisf, @function
+__floatdisf:
+	leaf_entry sp, 16
+
+	/* Check for zero.  */
+	or	a4, xh, xl
+	beqz	a4, 2f
+
+	/* Save the sign.  */
+	extui	a7, xh, 31, 1
+
+	/* Get the absolute value.  */
+	bgez	xh, .Lfloatdisf_normalize
+	neg	xl, xl
+	neg	xh, xh
+	beqz	xl, .Lfloatdisf_normalize
+	addi	xh, xh, -1
+
+.Lfloatdisf_normalize:
+	/* Normalize with the first 1 bit in the msb of xh.  */
+	beqz	xh, .Lfloatdisf_bigshift
+	do_nsau	a4, xh, a5, a6
+	ssl	a4
+	src	xh, xh, xl
+	sll	xl, xl
+
+.Lfloatdisf_shifted:
+	/* Shift the mantissa into position, with rounding bits in a6.  */
+	ssai	8
+	sll	a5, xl
+	src	a6, xh, xl
+	srl	xh, xh
+	beqz	a5, 1f
+	movi	a5, 1
+	or	a6, a6, a5
+1:
+	/* Set the exponent.  */
+	movi	a5, 0xbd	/* 0x7e + 63 */
+	sub	a5, a5, a4
+	slli	a5, a5, 23
+	add	a2, xh, a5
+
+	/* Add the sign.  */
+	slli	a7, a7, 31
+	or	a2, a2, a7
+
+	/* Round up if the leftover fraction is >= 1/2.  */
+	bgez	a6, 2f
+	addi	a2, a2, 1	/* Overflow to the exponent is OK.  */
+
+	/* Check if the leftover fraction is exactly 1/2.  */
+	slli	a6, a6, 1
+	beqz	a6, .Lfloatdisf_exactlyhalf
+2:	leaf_return
+
+.Lfloatdisf_bigshift:
+	/* xh is zero.  Normalize with first 1 bit of xl in the msb of xh.  */
+	do_nsau	a4, xl, a5, a6
+	ssl	a4
+	sll	xh, xl
+	movi	xl, 0
+	addi	a4, a4, 32
+	j	.Lfloatdisf_shifted
+
+.Lfloatdisf_exactlyhalf:
+	/* Round down to the nearest even value.  */
+	srli	a2, a2, 1
+	slli	a2, a2, 1
+	leaf_return
+
+#endif /* L_floatdisf */
diff --git a/gcc-4.9/libgcc/config/xtensa/lib1funcs.S b/gcc-4.9/libgcc/config/xtensa/lib1funcs.S
new file mode 100644
index 000000000..7c16cc850
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/lib1funcs.S
@@ -0,0 +1,844 @@
+/* Assembly functions for the Xtensa version of libgcc1.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "xtensa-config.h"
+
+/* Define macros for the ABS and ADDX* instructions to handle cases
+   where they are not included in the Xtensa processor configuration.  */
+
+	.macro	do_abs dst, src, tmp
+#if XCHAL_HAVE_ABS
+	abs	\dst, \src
+#else
+	neg	\tmp, \src
+	movgez	\tmp, \src, \src
+	mov	\dst, \tmp
+#endif
+	.endm
+
+	.macro	do_addx2 dst, as, at, tmp
+#if XCHAL_HAVE_ADDX
+	addx2	\dst, \as, \at
+#else
+	slli	\tmp, \as, 1
+	add	\dst, \tmp, \at
+#endif
+	.endm
+
+	.macro	do_addx4 dst, as, at, tmp
+#if XCHAL_HAVE_ADDX
+	addx4	\dst, \as, \at
+#else
+	slli	\tmp, \as, 2
+	add	\dst, \tmp, \at
+#endif
+	.endm
+
+	.macro	do_addx8 dst, as, at, tmp
+#if XCHAL_HAVE_ADDX
+	addx8	\dst, \as, \at
+#else
+	slli	\tmp, \as, 3
+	add	\dst, \tmp, \at
+#endif
+	.endm
+
+/* Define macros for leaf function entry and return, supporting either the
+   standard register windowed ABI or the non-windowed call0 ABI.  These
+   macros do not allocate any extra stack space, so they only work for
+   leaf functions that do not need to spill anything to the stack.  */
+
+	.macro leaf_entry reg, size
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	entry \reg, \size
+#else
+	/* do nothing */
+#endif
+	.endm
+
+	.macro leaf_return
+#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
+	retw
+#else
+	ret
+#endif
+	.endm
+
+
+#ifdef L_mulsi3
+	.align	4
+	.global	__mulsi3
+	.type	__mulsi3, @function
+__mulsi3:
+	leaf_entry sp, 16
+
+#if XCHAL_HAVE_MUL32
+	mull	a2, a2, a3
+
+#elif XCHAL_HAVE_MUL16
+	or	a4, a2, a3
+	srai	a4, a4, 16
+	bnez	a4, .LMUL16
+	mul16u	a2, a2, a3
+	leaf_return
+.LMUL16:
+	srai	a4, a2, 16
+	srai	a5, a3, 16
+	mul16u	a7, a4, a3
+	mul16u	a6, a5, a2
+	mul16u	a4, a2, a3
+	add	a7, a7, a6
+	slli	a7, a7, 16
+	add	a2, a7, a4
+
+#elif XCHAL_HAVE_MAC16
+	mul.aa.hl a2, a3
+	mula.aa.lh a2, a3
+	rsr	a5, ACCLO
+	umul.aa.ll a2, a3
+	rsr	a4, ACCLO
+	slli	a5, a5, 16
+	add	a2, a4, a5
+
+#else /* !MUL32 && !MUL16 && !MAC16 */
+
+	/* Multiply one bit at a time, but unroll the loop 4x to better
+	   exploit the addx instructions and avoid overhead.
+	   Peel the first iteration to save a cycle on init.  */
+
+	/* Avoid negative numbers.  */
+	xor	a5, a2, a3	/* Top bit is 1 if one input is negative.  */
+	do_abs	a3, a3, a6
+	do_abs	a2, a2, a6
+
+	/* Swap so the second argument is smaller.  */
+	sub	a7, a2, a3
+	mov	a4, a3
+	movgez	a4, a2, a7	/* a4 = max (a2, a3) */
+	movltz	a3, a2, a7	/* a3 = min (a2, a3) */
+
+	movi	a2, 0
+	extui	a6, a3, 0, 1
+	movnez	a2, a4, a6
+
+	do_addx2 a7, a4, a2, a7
+	extui	a6, a3, 1, 1
+	movnez	a2, a7, a6
+
+	do_addx4 a7, a4, a2, a7
+	extui	a6, a3, 2, 1
+	movnez	a2, a7, a6
+
+	do_addx8 a7, a4, a2, a7
+	extui	a6, a3, 3, 1
+	movnez	a2, a7, a6
+
+	bgeui	a3, 16, .Lmult_main_loop
+	neg	a3, a2
+	movltz	a2, a3, a5
+	leaf_return
+
+	.align	4
+.Lmult_main_loop:
+	srli	a3, a3, 4
+	slli	a4, a4, 4
+
+	add	a7, a4, a2
+	extui	a6, a3, 0, 1
+	movnez	a2, a7, a6
+
+	do_addx2 a7, a4, a2, a7
+	extui	a6, a3, 1, 1
+	movnez	a2, a7, a6
+
+	do_addx4 a7, a4, a2, a7
+	extui	a6, a3, 2, 1
+	movnez	a2, a7, a6
+
+	do_addx8 a7, a4, a2, a7
+	extui	a6, a3, 3, 1
+	movnez	a2, a7, a6
+
+	bgeui	a3, 16, .Lmult_main_loop
+
+	neg	a3, a2
+	movltz	a2, a3, a5
+
+#endif /* !MUL32 && !MUL16 && !MAC16 */
+
+	leaf_return
+	.size	__mulsi3, . - __mulsi3
+
+#endif /* L_mulsi3 */
+
+
+#ifdef L_umulsidi3
+
+#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16
+#define XCHAL_NO_MUL 1
+#endif
+
+	.align	4
+	.global	__umulsidi3
+	.type	__umulsidi3, @function
+__umulsidi3:
+#if __XTENSA_CALL0_ABI__
+	leaf_entry sp, 32
+	addi	sp, sp, -32
+	s32i	a12, sp, 16
+	s32i	a13, sp, 20
+	s32i	a14, sp, 24
+	s32i	a15, sp, 28
+#elif XCHAL_NO_MUL
+	/* This is not really a leaf function; allocate enough stack space
+	   to allow CALL12s to a helper function.  */
+	leaf_entry sp, 48
+#else
+	leaf_entry sp, 16
+#endif
+
+#ifdef __XTENSA_EB__
+#define wh a2
+#define wl a3
+#else
+#define wh a3
+#define wl a2
+#endif /* __XTENSA_EB__ */
+
+	/* This code is taken from the mulsf3 routine in ieee754-sf.S.
+	   See more comments there.  */
+
+#if XCHAL_HAVE_MUL32_HIGH
+	mull	a6, a2, a3
+	muluh	wh, a2, a3
+	mov	wl, a6
+
+#else /* ! MUL32_HIGH */
+
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	/* a0 and a8 will be clobbered by calling the multiply function
+	   but a8 is not used here and need not be saved.  */
+	s32i	a0, sp, 0
+#endif
+
+#if XCHAL_HAVE_MUL16 || XCHAL_HAVE_MUL32
+
+#define a2h a4
+#define a3h a5
+
+	/* Get the high halves of the inputs into registers.  */
+	srli	a2h, a2, 16
+	srli	a3h, a3, 16
+
+#define a2l a2
+#define a3l a3
+
+#if XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MUL16
+	/* Clear the high halves of the inputs.  This does not matter
+	   for MUL16 because the high bits are ignored.  */
+	extui	a2, a2, 0, 16
+	extui	a3, a3, 0, 16
+#endif
+#endif /* MUL16 || MUL32 */
+
+
+#if XCHAL_HAVE_MUL16
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mul16u	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MUL32
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	mull	dst, xreg ## xhalf, yreg ## yhalf
+
+#elif XCHAL_HAVE_MAC16
+
+/* The preprocessor insists on inserting a space when concatenating after
+   a period in the definition of do_mul below.  These macros are a workaround
+   using underscores instead of periods when doing the concatenation.  */
+#define umul_aa_ll umul.aa.ll
+#define umul_aa_lh umul.aa.lh
+#define umul_aa_hl umul.aa.hl
+#define umul_aa_hh umul.aa.hh
+
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	umul_aa_ ## xhalf ## yhalf	xreg, yreg; \
+	rsr	dst, ACCLO
+
+#else /* no multiply hardware */
+
+#define set_arg_l(dst, src) \
+	extui	dst, src, 0, 16
+#define set_arg_h(dst, src) \
+	srli	dst, src, 16
+
+#if __XTENSA_CALL0_ABI__
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a13, xreg); \
+	set_arg_ ## yhalf (a14, yreg); \
+	call0	.Lmul_mulsi3; \
+	mov	dst, a12
+#else
+#define do_mul(dst, xreg, xhalf, yreg, yhalf) \
+	set_arg_ ## xhalf (a14, xreg); \
+	set_arg_ ## yhalf (a15, yreg); \
+	call12	.Lmul_mulsi3; \
+	mov	dst, a14
+#endif /* __XTENSA_CALL0_ABI__ */
+
+#endif /* no multiply hardware */
+
+	/* Add pp1 and pp2 into a6 with carry-out in a9.  */
+	do_mul(a6, a2, l, a3, h)	/* pp 1 */
+	do_mul(a11, a2, h, a3, l)	/* pp 2 */
+	movi	a9, 0
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Shift the high half of a9/a6 into position in a9.  Note that
+	   this value can be safely incremented without any carry-outs.  */
+	ssai	16
+	src	a9, a9, a6
+
+	/* Compute the low word into a6.  */
+	do_mul(a11, a2, l, a3, l)	/* pp 0 */
+	sll	a6, a6
+	add	a6, a6, a11
+	bgeu	a6, a11, 1f
+	addi	a9, a9, 1
+1:
+	/* Compute the high word into wh.  */
+	do_mul(wh, a2, h, a3, h)	/* pp 3 */
+	add	wh, wh, a9
+	mov	wl, a6
+
+#endif /* !MUL32_HIGH */
+
+#if __XTENSA_CALL0_ABI__ && XCHAL_NO_MUL
+	/* Restore the original return address.  */
+	l32i	a0, sp, 0
+#endif
+#if __XTENSA_CALL0_ABI__
+	l32i	a12, sp, 16
+	l32i	a13, sp, 20
+	l32i	a14, sp, 24
+	l32i	a15, sp, 28
+	addi	sp, sp, 32
+#endif
+	leaf_return
+
+#if XCHAL_NO_MUL
+
+	/* For Xtensa processors with no multiply hardware, this simplified
+	   version of _mulsi3 is used for multiplying 16-bit chunks of
+	   the floating-point mantissas.  When using CALL0, this function
+	   uses a custom ABI: the inputs are passed in a13 and a14, the
+	   result is returned in a12, and a8 and a15 are clobbered.  */
+	.align	4
+.Lmul_mulsi3:
+	leaf_entry sp, 16
+	.macro mul_mulsi3_body dst, src1, src2, tmp1, tmp2
+	movi	\dst, 0
+1:	add	\tmp1, \src2, \dst
+	extui	\tmp2, \src1, 0, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx2 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 1, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx4 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 2, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	do_addx8 \tmp1, \src2, \dst, \tmp1
+	extui	\tmp2, \src1, 3, 1
+	movnez	\dst, \tmp1, \tmp2
+
+	srli	\src1, \src1, 4
+	slli	\src2, \src2, 4
+	bnez	\src1, 1b
+	.endm
+#if __XTENSA_CALL0_ABI__
+	mul_mulsi3_body a12, a13, a14, a15, a8
+#else
+	/* The result will be written into a2, so save that argument in a4.  */
+	mov	a4, a2
+	mul_mulsi3_body a2, a4, a3, a5, a6
+#endif
+	leaf_return
+#endif /* XCHAL_NO_MUL */
+
+	.size	__umulsidi3, . - __umulsidi3
+
+#endif /* L_umulsidi3 */
+
+
+/* Define a macro for the NSAU (unsigned normalize shift amount)
+   instruction, which computes the number of leading zero bits,
+   to handle cases where it is not included in the Xtensa processor
+   configuration.  */
+
+	.macro	do_nsau cnt, val, tmp, a
+#if XCHAL_HAVE_NSA
+	nsau	\cnt, \val
+#else
+	mov	\a, \val
+	movi	\cnt, 0
+	extui	\tmp, \a, 16, 16
+	bnez	\tmp, 0f
+	movi	\cnt, 16
+	slli	\a, \a, 16
+0:
+	extui	\tmp, \a, 24, 8
+	bnez	\tmp, 1f
+	addi	\cnt, \cnt, 8
+	slli	\a, \a, 8
+1:
+	movi	\tmp, __nsau_data
+	extui	\a, \a, 24, 8
+	add	\tmp, \tmp, \a
+	l8ui	\tmp, \tmp, 0
+	add	\cnt, \cnt, \tmp
+#endif /* !XCHAL_HAVE_NSA */
+	.endm
+
+#ifdef L_clz
+	.section .rodata
+	.align	4
+	.global	__nsau_data
+	.type	__nsau_data, @object
+__nsau_data:
+#if !XCHAL_HAVE_NSA
+	.byte	8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
+	.byte	3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
+	.byte	2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
+	.byte	2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
+	.byte	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+	.byte	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+	.byte	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+	.byte	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	.byte	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+#endif /* !XCHAL_HAVE_NSA */
+	.size	__nsau_data, . - __nsau_data
+	.hidden	__nsau_data
+#endif /* L_clz */
+
+
+#ifdef L_clzsi2
+	.align	4
+	.global	__clzsi2
+	.type	__clzsi2, @function
+__clzsi2:
+	leaf_entry sp, 16
+	do_nsau	a2, a2, a3, a4
+	leaf_return
+	.size	__clzsi2, . - __clzsi2
+
+#endif /* L_clzsi2 */
+
+
+#ifdef L_ctzsi2
+	.align	4
+	.global	__ctzsi2
+	.type	__ctzsi2, @function
+__ctzsi2:
+	leaf_entry sp, 16
+	neg	a3, a2
+	and	a3, a3, a2
+	do_nsau	a2, a3, a4, a5
+	neg	a2, a2
+	addi	a2, a2, 31
+	leaf_return
+	.size	__ctzsi2, . - __ctzsi2
+
+#endif /* L_ctzsi2 */
+
+
+#ifdef L_ffssi2
+	.align	4
+	.global	__ffssi2
+	.type	__ffssi2, @function
+__ffssi2:
+	leaf_entry sp, 16
+	neg	a3, a2
+	and	a3, a3, a2
+	do_nsau	a2, a3, a4, a5
+	neg	a2, a2
+	addi	a2, a2, 32
+	leaf_return
+	.size	__ffssi2, . - __ffssi2
+
+#endif /* L_ffssi2 */
+
+
+#ifdef L_udivsi3
+	.align	4
+	.global	__udivsi3
+	.type	__udivsi3, @function
+__udivsi3:
+	leaf_entry sp, 16
+#if XCHAL_HAVE_DIV32
+	quou	a2, a2, a3
+#else
+	bltui	a3, 2, .Lle_one	/* check if the divisor <= 1 */
+
+	mov	a6, a2		/* keep dividend in a6 */
+	do_nsau	a5, a6, a2, a7	/* dividend_shift = nsau (dividend) */
+	do_nsau	a4, a3, a2, a7	/* divisor_shift = nsau (divisor) */
+	bgeu	a5, a4, .Lspecial
+
+	sub	a4, a4, a5	/* count = divisor_shift - dividend_shift */
+	ssl	a4
+	sll	a3, a3		/* divisor <<= count */
+	movi	a2, 0		/* quotient = 0 */
+
+	/* test-subtract-and-shift loop; one quotient bit on each iteration */
+#if XCHAL_HAVE_LOOPS
+	loopnez	a4, .Lloopend
+#endif /* XCHAL_HAVE_LOOPS */
+.Lloop:
+	bltu	a6, a3, .Lzerobit
+	sub	a6, a6, a3
+	addi	a2, a2, 1
+.Lzerobit:
+	slli	a2, a2, 1
+	srli	a3, a3, 1
+#if !XCHAL_HAVE_LOOPS
+	addi	a4, a4, -1
+	bnez	a4, .Lloop
+#endif /* !XCHAL_HAVE_LOOPS */
+.Lloopend:
+
+	bltu	a6, a3, .Lreturn
+	addi	a2, a2, 1	/* increment quotient if dividend >= divisor */
+.Lreturn:
+	leaf_return
+
+.Lle_one:
+	beqz	a3, .Lerror	/* if divisor == 1, return the dividend */
+	leaf_return
+
+.Lspecial:
+	/* return dividend >= divisor */
+	bltu	a6, a3, .Lreturn0
+	movi	a2, 1
+	leaf_return
+
+.Lerror:
+	/* Divide by zero: Use an illegal instruction to force an exception.
+	   The subsequent "DIV0" string can be recognized by the exception
+	   handler to identify the real cause of the exception.  */
+	ill
+	.ascii	"DIV0"
+
+.Lreturn0:
+	movi	a2, 0
+#endif /* XCHAL_HAVE_DIV32 */
+	leaf_return
+	.size	__udivsi3, . - __udivsi3
+
+#endif /* L_udivsi3 */
+
+
+#ifdef L_divsi3
+	.align	4
+	.global	__divsi3
+	.type	__divsi3, @function
+__divsi3:
+	leaf_entry sp, 16
+#if XCHAL_HAVE_DIV32
+	quos	a2, a2, a3
+#else
+	xor	a7, a2, a3	/* sign = dividend ^ divisor */
+	do_abs	a6, a2, a4	/* udividend = abs (dividend) */
+	do_abs	a3, a3, a4	/* udivisor = abs (divisor) */
+	bltui	a3, 2, .Lle_one	/* check if udivisor <= 1 */
+	do_nsau	a5, a6, a2, a8	/* udividend_shift = nsau (udividend) */
+	do_nsau	a4, a3, a2, a8	/* udivisor_shift = nsau (udivisor) */
+	bgeu	a5, a4, .Lspecial
+
+	sub	a4, a4, a5	/* count = udivisor_shift - udividend_shift */
+	ssl	a4
+	sll	a3, a3		/* udivisor <<= count */
+	movi	a2, 0		/* quotient = 0 */
+
+	/* test-subtract-and-shift loop; one quotient bit on each iteration */
+#if XCHAL_HAVE_LOOPS
+	loopnez	a4, .Lloopend
+#endif /* XCHAL_HAVE_LOOPS */
+.Lloop:
+	bltu	a6, a3, .Lzerobit
+	sub	a6, a6, a3
+	addi	a2, a2, 1
+.Lzerobit:
+	slli	a2, a2, 1
+	srli	a3, a3, 1
+#if !XCHAL_HAVE_LOOPS
+	addi	a4, a4, -1
+	bnez	a4, .Lloop
+#endif /* !XCHAL_HAVE_LOOPS */
+.Lloopend:
+
+	bltu	a6, a3, .Lreturn
+	addi	a2, a2, 1	/* increment if udividend >= udivisor */
+.Lreturn:
+	neg	a5, a2
+	movltz	a2, a5, a7	/* return (sign < 0) ? -quotient : quotient */
+	leaf_return
+
+.Lle_one:
+	beqz	a3, .Lerror
+	neg	a2, a6		/* if udivisor == 1, then return... */
+	movgez	a2, a6, a7	/* (sign < 0) ? -udividend : udividend */
+	leaf_return
+
+.Lspecial:
+	bltu	a6, a3, .Lreturn0 /* if dividend < divisor, return 0 */
+	movi	a2, 1
+	movi	a4, -1
+	movltz	a2, a4, a7	/* else return (sign < 0) ? -1 : 1 */
+	leaf_return
+
+.Lerror:
+	/* Divide by zero: Use an illegal instruction to force an exception.
+	   The subsequent "DIV0" string can be recognized by the exception
+	   handler to identify the real cause of the exception.  */
+	ill
+	.ascii	"DIV0"
+
+.Lreturn0:
+	movi	a2, 0
+#endif /* XCHAL_HAVE_DIV32 */
+	leaf_return
+	.size	__divsi3, . - __divsi3
+
+#endif /* L_divsi3 */
+
+
+#ifdef L_umodsi3
+	.align	4
+	.global	__umodsi3
+	.type	__umodsi3, @function
+__umodsi3:
+	leaf_entry sp, 16
+#if XCHAL_HAVE_DIV32
+	remu	a2, a2, a3
+#else
+	bltui	a3, 2, .Lle_one	/* check if the divisor is <= 1 */
+
+	do_nsau	a5, a2, a6, a7	/* dividend_shift = nsau (dividend) */
+	do_nsau	a4, a3, a6, a7	/* divisor_shift = nsau (divisor) */
+	bgeu	a5, a4, .Lspecial
+
+	sub	a4, a4, a5	/* count = divisor_shift - dividend_shift */
+	ssl	a4
+	sll	a3, a3		/* divisor <<= count */
+
+	/* test-subtract-and-shift loop */
+#if XCHAL_HAVE_LOOPS
+	loopnez	a4, .Lloopend
+#endif /* XCHAL_HAVE_LOOPS */
+.Lloop:
+	bltu	a2, a3, .Lzerobit
+	sub	a2, a2, a3
+.Lzerobit:
+	srli	a3, a3, 1
+#if !XCHAL_HAVE_LOOPS
+	addi	a4, a4, -1
+	bnez	a4, .Lloop
+#endif /* !XCHAL_HAVE_LOOPS */
+.Lloopend:
+
+.Lspecial:
+	bltu	a2, a3, .Lreturn
+	sub	a2, a2, a3	/* subtract once more if dividend >= divisor */
+.Lreturn:
+	leaf_return
+
+.Lle_one:
+	bnez	a3, .Lreturn0
+
+	/* Divide by zero: Use an illegal instruction to force an exception.
+	   The subsequent "DIV0" string can be recognized by the exception
+	   handler to identify the real cause of the exception.  */
+	ill
+	.ascii	"DIV0"
+
+.Lreturn0:
+	movi	a2, 0
+#endif /* XCHAL_HAVE_DIV32 */
+	leaf_return
+	.size	__umodsi3, . - __umodsi3
+
+#endif /* L_umodsi3 */
+
+
+#ifdef L_modsi3
+	.align	4
+	.global	__modsi3
+	.type	__modsi3, @function
+__modsi3:
+	leaf_entry sp, 16
+#if XCHAL_HAVE_DIV32
+	rems	a2, a2, a3
+#else
+	mov	a7, a2		/* save original (signed) dividend */
+	do_abs	a2, a2, a4	/* udividend = abs (dividend) */
+	do_abs	a3, a3, a4	/* udivisor = abs (divisor) */
+	bltui	a3, 2, .Lle_one	/* check if udivisor <= 1 */
+	do_nsau	a5, a2, a6, a8	/* udividend_shift = nsau (udividend) */
+	do_nsau	a4, a3, a6, a8	/* udivisor_shift = nsau (udivisor) */
+	bgeu	a5, a4, .Lspecial
+
+	sub	a4, a4, a5	/* count = udivisor_shift - udividend_shift */
+	ssl	a4
+	sll	a3, a3		/* udivisor <<= count */
+
+	/* test-subtract-and-shift loop */
+#if XCHAL_HAVE_LOOPS
+	loopnez	a4, .Lloopend
+#endif /* XCHAL_HAVE_LOOPS */
+.Lloop:
+	bltu	a2, a3, .Lzerobit
+	sub	a2, a2, a3
+.Lzerobit:
+	srli	a3, a3, 1
+#if !XCHAL_HAVE_LOOPS
+	addi	a4, a4, -1
+	bnez	a4, .Lloop
+#endif /* !XCHAL_HAVE_LOOPS */
+.Lloopend:
+
+.Lspecial:
+	bltu	a2, a3, .Lreturn
+	sub	a2, a2, a3	/* subtract again if udividend >= udivisor */
+.Lreturn:
+	bgez	a7, .Lpositive
+	neg	a2, a2		/* if (dividend < 0), return -udividend */
+.Lpositive:
+	leaf_return
+
+.Lle_one:
+	bnez	a3, .Lreturn0
+
+	/* Divide by zero: Use an illegal instruction to force an exception.
+	   The subsequent "DIV0" string can be recognized by the exception
+	   handler to identify the real cause of the exception.  */
+	ill
+	.ascii	"DIV0"
+
+.Lreturn0:
+	movi	a2, 0
+#endif /* XCHAL_HAVE_DIV32 */
+	leaf_return
+	.size	__modsi3, . - __modsi3
+
+#endif /* L_modsi3 */
+
+
+#ifdef __XTENSA_EB__
+#define uh a2
+#define ul a3
+#else
+#define uh a3
+#define ul a2
+#endif /* __XTENSA_EB__ */
+
+
+#ifdef L_ashldi3
+	.align	4
+	.global	__ashldi3
+	.type	__ashldi3, @function
+__ashldi3:
+	leaf_entry sp, 16
+	ssl	a4
+	bgei	a4, 32, .Llow_only
+	src	uh, uh, ul
+	sll	ul, ul
+	leaf_return
+
+.Llow_only:
+	sll	uh, ul
+	movi	ul, 0
+	leaf_return
+	.size	__ashldi3, . - __ashldi3
+
+#endif /* L_ashldi3 */
+
+
+#ifdef L_ashrdi3
+	.align	4
+	.global	__ashrdi3
+	.type	__ashrdi3, @function
+__ashrdi3:
+	leaf_entry sp, 16
+	ssr	a4
+	bgei	a4, 32, .Lhigh_only
+	src	ul, uh, ul
+	sra	uh, uh
+	leaf_return
+
+.Lhigh_only:
+	sra	ul, uh
+	srai	uh, uh, 31
+	leaf_return
+	.size	__ashrdi3, . - __ashrdi3
+
+#endif /* L_ashrdi3 */
+
+
+#ifdef L_lshrdi3
+	.align	4
+	.global	__lshrdi3
+	.type	__lshrdi3, @function
+__lshrdi3:
+	leaf_entry sp, 16
+	ssr	a4
+	bgei	a4, 32, .Lhigh_only1
+	src	ul, uh, ul
+	srl	uh, uh
+	leaf_return
+
+.Lhigh_only1:
+	srl	ul, uh
+	movi	uh, 0
+	leaf_return
+	.size	__lshrdi3, . - __lshrdi3
+
+#endif /* L_lshrdi3 */
+
+
+#include "ieee754-df.S"
+#include "ieee754-sf.S"
diff --git a/gcc-4.9/libgcc/config/xtensa/lib2funcs.S b/gcc-4.9/libgcc/config/xtensa/lib2funcs.S
new file mode 100644
index 000000000..3ac8c1da2
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/lib2funcs.S
@@ -0,0 +1,186 @@
+/* Assembly functions for libgcc2.
+   Copyright (C) 2001-2014 Free Software Foundation, Inc.
+   Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#include "xtensa-config.h"
+
+/* __xtensa_libgcc_window_spill: This function flushes out all but the
+   current register window.  This is used to set up the stack so that
+   arbitrary frames can be accessed.  */
+
+	.align	4
+	.global	__xtensa_libgcc_window_spill
+	.type	__xtensa_libgcc_window_spill,@function
+__xtensa_libgcc_window_spill:
+	entry	sp, 32
+	movi	a2, 0
+	syscall
+	retw
+	.size	__xtensa_libgcc_window_spill, .-__xtensa_libgcc_window_spill
+
+
+/* __xtensa_nonlocal_goto: This code does all the hard work of a
+   nonlocal goto on Xtensa.  It is here in the library to avoid the
+   code size bloat of generating it in-line.  There are two
+   arguments:
+
+	a2 = frame pointer for the procedure containing the label
+	a3 = goto handler address
+
+  This function never returns to its caller but instead goes directly
+  to the address of the specified goto handler.  */
+
+	.align	4
+	.global	__xtensa_nonlocal_goto
+	.type	__xtensa_nonlocal_goto,@function
+__xtensa_nonlocal_goto:
+	entry	sp, 32
+
+	/* Flush registers.  */
+	mov	a5, a2
+	movi	a2, 0
+	syscall
+	mov	a2, a5
+
+	/* Because the save area for a0-a3 is stored one frame below
+	   the one identified by a2, the only way to restore those
+	   registers is to unwind the stack.  If alloca() were never
+	   called, we could just unwind until finding the sp value
+	   matching a2.  However, a2 is a frame pointer, not a stack
+	   pointer, and may not be encountered during the unwinding.
+	   The solution is to unwind until going _past_ the value
+	   given by a2.  This involves keeping three stack pointer
+	   values during the unwinding:
+
+		next = sp of frame N-1
+		cur = sp of frame N
+		prev = sp of frame N+1
+
+	   When next > a2, the desired save area is stored relative
+	   to prev.  At this point, cur will be the same as a2
+	   except in the alloca() case.
+
+	   Besides finding the values to be restored to a0-a3, we also
+	   need to find the current window size for the target
+	   function.  This can be extracted from the high bits of the
+	   return address, initially in a0.  As the unwinding
+	   proceeds, the window size is taken from the value of a0
+	   saved _two_ frames below the current frame.  */
+
+	addi	a5, sp, -16	/* a5 = prev - save area */
+	l32i	a6, a5, 4
+	addi	a6, a6, -16	/* a6 = cur - save area */
+	mov	a8, a0		/* a8 = return address (for window size) */
+	j	.Lfirstframe
+
+.Lnextframe:
+	l32i	a8, a5, 0	/* next return address (for window size) */
+	mov	a5, a6		/* advance prev */
+	addi	a6, a7, -16	/* advance cur */
+.Lfirstframe:
+	l32i	a7, a6, 4	/* a7 = next */
+	bgeu	a2, a7, .Lnextframe
+
+	/* At this point, prev (a5) points to the save area with the saved
+	   values of a0-a3.  Copy those values into the save area at the
+	   current sp so they will be reloaded when the return from this
+	   function underflows.  We don't have to worry about exceptions
+	   while updating the current save area, because the windows have
+	   already been flushed.  */
+
+	addi	a4, sp, -16	/* a4 = save area of this function */
+	l32i	a6, a5, 0
+	l32i	a7, a5, 4
+	s32i	a6, a4, 0
+	s32i	a7, a4, 4
+	l32i	a6, a5, 8
+	l32i	a7, a5, 12
+	s32i	a6, a4, 8
+	s32i	a7, a4, 12
+
+	/* Set return address to goto handler.  Use the window size bits
+	   from the return address two frames below the target.  */
+	extui	a8, a8, 30, 2	/* get window size from return addr. */
+	slli	a3, a3, 2	/* get goto handler addr. << 2 */
+	ssai	2
+	src	a0, a8, a3	/* combine them with a funnel shift */
+
+	retw
+	.size	__xtensa_nonlocal_goto, .-__xtensa_nonlocal_goto
+
+
+/* __xtensa_sync_caches: This function is called after writing a trampoline
+   on the stack to force all the data writes to memory and invalidate the
+   instruction cache. a2 is the address of the new trampoline.
+
+   After the trampoline data is written out, it must be flushed out of
+   the data cache into memory.  We use DHWB in case we have a writeback
+   cache.  At least one DHWB instruction is needed for each data cache
+   line which may be touched by the trampoline.  An ISYNC instruction
+   must follow the DHWBs.
+
+   We have to flush the i-cache to make sure that the new values get used.
+   At least one IHI instruction is needed for each i-cache line which may
+   be touched by the trampoline.  An ISYNC instruction is also needed to
+   make sure that the modified instructions are loaded into the instruction
+   fetch buffer.  */
+
+/* Use the maximum trampoline size.  Flushing a bit extra is OK.  */
+#define TRAMPOLINE_SIZE 60
+
+	.text
+	.align	4
+	.global	__xtensa_sync_caches
+	.type	__xtensa_sync_caches,@function
+__xtensa_sync_caches:
+	entry 	sp, 32
+#if XCHAL_DCACHE_SIZE > 0
+	/* Flush the trampoline from the data cache.  */
+	extui	a4, a2, 0, XCHAL_DCACHE_LINEWIDTH
+	addi	a4, a4, TRAMPOLINE_SIZE
+	addi	a4, a4, (1 << XCHAL_DCACHE_LINEWIDTH) - 1
+	srli	a4, a4, XCHAL_DCACHE_LINEWIDTH
+	mov	a3, a2
+.Ldcache_loop:
+	dhwb	a3, 0
+	addi	a3, a3, (1 << XCHAL_DCACHE_LINEWIDTH)
+	addi	a4, a4, -1
+	bnez	a4, .Ldcache_loop
+	isync
+#endif
+#if XCHAL_ICACHE_SIZE > 0
+	/* Invalidate the corresponding lines in the instruction cache.  */
+	extui	a4, a2, 0, XCHAL_ICACHE_LINEWIDTH
+	addi	a4, a4, TRAMPOLINE_SIZE
+	addi	a4, a4, (1 << XCHAL_ICACHE_LINEWIDTH) - 1
+	srli	a4, a4, XCHAL_ICACHE_LINEWIDTH
+.Licache_loop:
+	ihi	a2, 0
+	addi	a2, a2, (1 << XCHAL_ICACHE_LINEWIDTH)
+	addi	a4, a4, -1
+	bnez	a4, .Licache_loop
+#endif
+	isync
+	retw
+	.size	__xtensa_sync_caches, .-__xtensa_sync_caches
diff --git a/gcc-4.9/libgcc/config/xtensa/libgcc-glibc.ver b/gcc-4.9/libgcc/config/xtensa/libgcc-glibc.ver
new file mode 100644
index 000000000..43e7d4fc7
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/libgcc-glibc.ver
@@ -0,0 +1,3 @@
+GCC_4.3.0 {
+  __umulsidi3
+}
diff --git a/gcc-4.9/libgcc/config/xtensa/linux-unwind.h b/gcc-4.9/libgcc/config/xtensa/linux-unwind.h
new file mode 100644
index 000000000..6832d0b48
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/linux-unwind.h
@@ -0,0 +1,97 @@
+/* DWARF2 EH unwinding support for Xtensa.
+   Copyright (C) 2008-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* Do code reading to identify a signal frame, and set the frame
+   state data appropriately.  See unwind-dw2-xtensa.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
+
+#include <signal.h>
+#include <sys/ucontext.h>
+
+/* Encoded bytes for Xtensa instructions:
+	movi a2, __NR_rt_sigreturn
+	syscall
+	entry (first byte only)
+   Some of the bytes are endian-dependent.  */
+
+#define MOVI_BYTE0 0x22
+#define MOVI_BYTE2 225 /* __NR_rt_sigreturn */
+#define SYSC_BYTE0 0
+#define SYSC_BYTE2 0
+
+#ifdef __XTENSA_EB__
+#define MOVI_BYTE1 0x0a
+#define SYSC_BYTE1 0x05
+#define ENTRY_BYTE 0x6c
+#else
+#define MOVI_BYTE1 0xa0
+#define SYSC_BYTE1 0x50
+#define ENTRY_BYTE 0x36
+#endif
+
+#define MD_FALLBACK_FRAME_STATE_FOR xtensa_fallback_frame_state
+
+static _Unwind_Reason_Code
+xtensa_fallback_frame_state (struct _Unwind_Context *context,
+			     _Unwind_FrameState *fs)
+{
+  unsigned char *pc = context->ra;
+  struct sigcontext *sc;
+
+  struct rt_sigframe {
+    siginfo_t info;
+    struct ucontext uc;
+  } *rt_;
+
+  /* movi a2, __NR_rt_sigreturn; syscall */
+  if (pc[0] != MOVI_BYTE0
+      || pc[1] != MOVI_BYTE1
+      || pc[2] != MOVI_BYTE2
+      || pc[3] != SYSC_BYTE0
+      || pc[4] != SYSC_BYTE1
+      || pc[5] != SYSC_BYTE2)
+    return _URC_END_OF_STACK;
+
+  rt_ = context->sp;
+  sc = &rt_->uc.uc_mcontext;
+  fs->signal_regs = (_Unwind_Word *) sc->sc_a;
+
+  /* If the signal arrived just before an ENTRY instruction, find the return
+     address and pretend the signal arrived before executing the CALL.  */
+  if (*(unsigned char *) sc->sc_pc == ENTRY_BYTE)
+   {
+     unsigned callinc = (sc->sc_ps >> 16) & 3;
+     fs->signal_ra = ((sc->sc_a[callinc << 2] & XTENSA_RA_FIELD_MASK)
+		      | context->ra_high_bits) - 3;
+   }
+  else
+    fs->signal_ra = sc->sc_pc;
+
+  fs->signal_frame = 1;
+  return _URC_NO_REASON;
+}
+
+#endif /* ifdef inhibit_libc  */
diff --git a/gcc-4.9/libgcc/config/xtensa/t-elf b/gcc-4.9/libgcc/config/xtensa/t-elf
new file mode 100644
index 000000000..59d51210b
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/t-elf
@@ -0,0 +1,5 @@
+# Build CRT files and libgcc with the "longcalls" option
+CRTSTUFF_T_CFLAGS += -mlongcalls
+CRTSTUFF_T_CFLAGS_S += -mlongcalls
+
+HOST_LIBGCC2_CFLAGS += -mlongcalls
diff --git a/gcc-4.9/libgcc/config/xtensa/t-linux b/gcc-4.9/libgcc/config/xtensa/t-linux
new file mode 100644
index 000000000..6f4ae8934
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/t-linux
@@ -0,0 +1 @@
+SHLIB_MAPFILES += $(srcdir)/config/xtensa/libgcc-glibc.ver
diff --git a/gcc-4.9/libgcc/config/xtensa/t-xtensa b/gcc-4.9/libgcc/config/xtensa/t-xtensa
new file mode 100644
index 000000000..27399e67f
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/t-xtensa
@@ -0,0 +1,16 @@
+LIB1ASMSRC = xtensa/lib1funcs.S
+LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3 _udivsi3 _umodsi3 \
+	_umulsidi3 _clz _clzsi2 _ctzsi2 _ffssi2 \
+	_ashldi3 _ashrdi3 _lshrdi3 \
+	_negsf2 _addsubsf3 _mulsf3 _divsf3 _cmpsf2 _fixsfsi _fixsfdi \
+	_fixunssfsi _fixunssfdi _floatsisf _floatunsisf \
+	_floatdisf _floatundisf \
+	_negdf2 _addsubdf3 _muldf3 _divdf3 _cmpdf2 _fixdfsi _fixdfdi \
+	_fixunsdfsi _fixunsdfdi _floatsidf _floatunsidf \
+	_floatdidf _floatundidf \
+	_truncdfsf2 _extendsfdf2
+
+LIB2ADD = $(srcdir)/config/xtensa/lib2funcs.S
+
+LIB2ADDEH = $(srcdir)/config/xtensa/unwind-dw2-xtensa.c \
+   $(srcdir)/unwind-dw2-fde.c $(srcdir)/unwind-sjlj.c $(srcdir)/unwind-c.c
diff --git a/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.c b/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.c
new file mode 100644
index 000000000..35f7797d4
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.c
@@ -0,0 +1,543 @@
+/* DWARF2 exception handling and frame unwinding for Xtensa.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "tconfig.h"
+#include "tsystem.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "libgcc_tm.h"
+#include "dwarf2.h"
+#include "unwind.h"
+#ifdef __USING_SJLJ_EXCEPTIONS__
+# define NO_SIZE_OF_ENCODED_VALUE
+#endif
+#include "unwind-pe.h"
+#include "unwind-dw2-fde.h"
+#include "unwind-dw2-xtensa.h"
+
+#ifndef __USING_SJLJ_EXCEPTIONS__
+
+/* The standard CIE and FDE structures work fine for Xtensa but the
+   variable-size register window save areas are not a good fit for the rest
+   of the standard DWARF unwinding mechanism.  Nor is that mechanism
+   necessary, since the register save areas are always in fixed locations
+   in each stack frame.  This file is a stripped down and customized version
+   of the standard DWARF unwinding code.  It needs to be customized to have
+   builtin logic for finding the save areas and also to track the stack
+   pointer value (besides the CFA) while unwinding since the primary save
+   area is located below the stack pointer.  It is stripped down to reduce
+   code size and ease the maintenance burden of tracking changes in the
+   standard version of the code.  */
+
+#ifndef DWARF_REG_TO_UNWIND_COLUMN
+#define DWARF_REG_TO_UNWIND_COLUMN(REGNO) (REGNO)
+#endif
+
+#define XTENSA_RA_FIELD_MASK 0x3FFFFFFF
+
+/* This is the register and unwind state for a particular frame.  This
+   provides the information necessary to unwind up past a frame and return
+   to its caller.  */
+struct _Unwind_Context
+{
+  /* Track register window save areas of 4 registers each, instead of
+     keeping separate addresses for the individual registers.  */
+  _Unwind_Word *reg[4];
+
+  void *cfa;
+  void *sp;
+  void *ra;
+
+  /* Cache the 2 high bits to replace the window size in return addresses.  */
+  _Unwind_Word ra_high_bits;
+
+  void *lsda;
+  struct dwarf_eh_bases bases;
+  /* Signal frame context.  */
+#define SIGNAL_FRAME_BIT ((~(_Unwind_Word) 0 >> 1) + 1)
+  _Unwind_Word flags;
+  /* 0 for now, can be increased when further fields are added to
+     struct _Unwind_Context.  */
+  _Unwind_Word version;
+};
+
+
+/* Read unaligned data from the instruction buffer.  */
+
+union unaligned
+{
+  void *p;
+} __attribute__ ((packed));
+
+static void uw_update_context (struct _Unwind_Context *, _Unwind_FrameState *);
+static _Unwind_Reason_Code uw_frame_state_for (struct _Unwind_Context *,
+					       _Unwind_FrameState *);
+
+static inline void *
+read_pointer (const void *p) { const union unaligned *up = p; return up->p; }
+
+static inline _Unwind_Word
+_Unwind_IsSignalFrame (struct _Unwind_Context *context)
+{
+  return (context->flags & SIGNAL_FRAME_BIT) ? 1 : 0;
+}
+
+static inline void
+_Unwind_SetSignalFrame (struct _Unwind_Context *context, int val)
+{
+  if (val)
+    context->flags |= SIGNAL_FRAME_BIT;
+  else
+    context->flags &= ~SIGNAL_FRAME_BIT;
+}
+
+/* Get the value of register INDEX as saved in CONTEXT.  */
+
+inline _Unwind_Word
+_Unwind_GetGR (struct _Unwind_Context *context, int index)
+{
+  _Unwind_Word *ptr;
+
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  ptr = context->reg[index >> 2] + (index & 3);
+
+  return *ptr;
+}
+
+/* Get the value of the CFA as saved in CONTEXT.  */
+
+_Unwind_Word
+_Unwind_GetCFA (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->cfa;
+}
+
+/* Overwrite the saved value for register INDEX in CONTEXT with VAL.  */
+
+inline void
+_Unwind_SetGR (struct _Unwind_Context *context, int index, _Unwind_Word val)
+{
+  _Unwind_Word *ptr;
+
+  index = DWARF_REG_TO_UNWIND_COLUMN (index);
+  ptr = context->reg[index >> 2] + (index & 3);
+
+  *ptr = val;
+}
+
+/* Retrieve the return address for CONTEXT.  */
+
+inline _Unwind_Ptr
+_Unwind_GetIP (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->ra;
+}
+
+/* Retrieve the return address and flag whether that IP is before
+   or after first not yet fully executed instruction.  */
+
+inline _Unwind_Ptr
+_Unwind_GetIPInfo (struct _Unwind_Context *context, int *ip_before_insn)
+{
+  *ip_before_insn = _Unwind_IsSignalFrame (context);
+  return (_Unwind_Ptr) context->ra;
+}
+
+/* Overwrite the return address for CONTEXT with VAL.  */
+
+inline void
+_Unwind_SetIP (struct _Unwind_Context *context, _Unwind_Ptr val)
+{
+  context->ra = (void *) val;
+}
+
+void *
+_Unwind_GetLanguageSpecificData (struct _Unwind_Context *context)
+{
+  return context->lsda;
+}
+
+_Unwind_Ptr
+_Unwind_GetRegionStart (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.func;
+}
+
+void *
+_Unwind_FindEnclosingFunction (void *pc)
+{
+  struct dwarf_eh_bases bases;
+  const struct dwarf_fde *fde = _Unwind_Find_FDE (pc-1, &bases);
+  if (fde)
+    return bases.func;
+  else
+    return NULL;
+}
+
+_Unwind_Ptr
+_Unwind_GetDataRelBase (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.dbase;
+}
+
+_Unwind_Ptr
+_Unwind_GetTextRelBase (struct _Unwind_Context *context)
+{
+  return (_Unwind_Ptr) context->bases.tbase;
+}
+
+#include "md-unwind-support.h"
+
+/* Extract any interesting information from the CIE for the translation
+   unit F belongs to.  Return a pointer to the byte after the augmentation,
+   or NULL if we encountered an undecipherable augmentation.  */
+
+static const unsigned char *
+extract_cie_info (const struct dwarf_cie *cie, struct _Unwind_Context *context,
+		  _Unwind_FrameState *fs)
+{
+  const unsigned char *aug = cie->augmentation;
+  const unsigned char *p = aug + strlen ((const char *)aug) + 1;
+  const unsigned char *ret = NULL;
+  _uleb128_t utmp;
+  _sleb128_t stmp;
+
+  /* g++ v2 "eh" has pointer immediately following augmentation string,
+     so it must be handled first.  */
+  if (aug[0] == 'e' && aug[1] == 'h')
+    {
+      fs->eh_ptr = read_pointer (p);
+      p += sizeof (void *);
+      aug += 2;
+    }
+
+  /* Immediately following the augmentation are the code and
+     data alignment and return address column.  */
+  p = read_uleb128 (p, &utmp);
+  p = read_sleb128 (p, &stmp);
+  if (cie->version == 1)
+    fs->retaddr_column = *p++;
+  else
+    {
+      p = read_uleb128 (p, &utmp);
+      fs->retaddr_column = (_Unwind_Word)utmp;
+    }
+  fs->lsda_encoding = DW_EH_PE_omit;
+
+  /* If the augmentation starts with 'z', then a uleb128 immediately
+     follows containing the length of the augmentation field following
+     the size.  */
+  if (*aug == 'z')
+    {
+      p = read_uleb128 (p, &utmp);
+      ret = p + utmp;
+
+      fs->saw_z = 1;
+      ++aug;
+    }
+
+  /* Iterate over recognized augmentation subsequences.  */
+  while (*aug != '\0')
+    {
+      /* "L" indicates a byte showing how the LSDA pointer is encoded.  */
+      if (aug[0] == 'L')
+	{
+	  fs->lsda_encoding = *p++;
+	  aug += 1;
+	}
+
+      /* "R" indicates a byte indicating how FDE addresses are encoded.  */
+      else if (aug[0] == 'R')
+	{
+	  fs->fde_encoding = *p++;
+	  aug += 1;
+	}
+
+      /* "P" indicates a personality routine in the CIE augmentation.  */
+      else if (aug[0] == 'P')
+	{
+	  _Unwind_Ptr personality;
+	  
+	  p = read_encoded_value (context, *p, p + 1, &personality);
+	  fs->personality = (_Unwind_Personality_Fn) personality;
+	  aug += 1;
+	}
+
+      /* "S" indicates a signal frame.  */
+      else if (aug[0] == 'S')
+	{
+	  fs->signal_frame = 1;
+	  aug += 1;
+	}
+
+      /* Otherwise we have an unknown augmentation string.
+	 Bail unless we saw a 'z' prefix.  */
+      else
+	return ret;
+    }
+
+  return ret ? ret : p;
+}
+
+/* Given the _Unwind_Context CONTEXT for a stack frame, look up the FDE for
+   its caller and decode it into FS.  This function also sets the
+   lsda member of CONTEXT, as it is really information
+   about the caller's frame.  */
+
+static _Unwind_Reason_Code
+uw_frame_state_for (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  const struct dwarf_fde *fde;
+  const struct dwarf_cie *cie;
+  const unsigned char *aug;
+  int window_size;
+  _Unwind_Word *ra_ptr;
+
+  memset (fs, 0, sizeof (*fs));
+  context->lsda = 0;
+
+  fde = _Unwind_Find_FDE (context->ra + _Unwind_IsSignalFrame (context) - 1,
+			  &context->bases);
+  if (fde == NULL)
+    {
+#ifdef MD_FALLBACK_FRAME_STATE_FOR
+      _Unwind_Reason_Code reason;
+      /* Couldn't find frame unwind info for this function.  Try a
+	 target-specific fallback mechanism.  This will necessarily
+	 not provide a personality routine or LSDA.  */
+      reason = MD_FALLBACK_FRAME_STATE_FOR (context, fs);
+      if (reason != _URC_END_OF_STACK)
+	return reason;
+#endif
+      /* The frame was not recognized and handled by the fallback function,
+	 but it is not really the end of the stack.  Fall through here and
+	 unwind it anyway.  */
+    }
+  else
+    {
+      cie = get_cie (fde);
+      if (extract_cie_info (cie, context, fs) == NULL)
+	/* CIE contained unknown augmentation.  */
+	return _URC_FATAL_PHASE1_ERROR;
+
+      /* Locate augmentation for the fde.  */
+      aug = (const unsigned char *) fde + sizeof (*fde);
+      aug += 2 * size_of_encoded_value (fs->fde_encoding);
+      if (fs->saw_z)
+	{
+	  _uleb128_t i;
+	  aug = read_uleb128 (aug, &i);
+	}
+      if (fs->lsda_encoding != DW_EH_PE_omit)
+	{
+	  _Unwind_Ptr lsda;
+
+	  aug = read_encoded_value (context, fs->lsda_encoding, aug, &lsda);
+	  context->lsda = (void *) lsda;
+	}
+    }
+
+  /* Check for the end of the stack.  This needs to be checked after
+     the MD_FALLBACK_FRAME_STATE_FOR check for signal frames because
+     the contents of context->reg[0] are undefined at a signal frame,
+     and register a0 may appear to be zero.  (The return address in
+     context->ra comes from register a4 or a8).  */
+  ra_ptr = context->reg[0];
+  if (ra_ptr && *ra_ptr == 0)
+    return _URC_END_OF_STACK;
+
+  /* Find the window size from the high bits of the return address.  */
+  if (ra_ptr)
+    window_size = (*ra_ptr >> 30) * 4;
+  else
+    window_size = 8;
+
+  fs->retaddr_column = window_size;
+
+  return _URC_NO_REASON;
+}
+
+static void
+uw_update_context_1 (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  struct _Unwind_Context orig_context = *context;
+  _Unwind_Word *sp, *cfa, *next_cfa;
+  int i;
+
+  if (fs->signal_regs)
+    {
+      cfa = (_Unwind_Word *) fs->signal_regs[1];
+      next_cfa = (_Unwind_Word *) cfa[-3];
+
+      for (i = 0; i < 4; i++)
+	context->reg[i] = fs->signal_regs + (i << 2);
+    }
+  else
+    {
+      int window_size = fs->retaddr_column >> 2;
+
+      sp = (_Unwind_Word *) orig_context.sp;
+      cfa = (_Unwind_Word *) orig_context.cfa;
+      next_cfa = (_Unwind_Word *) cfa[-3];
+
+      /* Registers a0-a3 are in the save area below sp.  */
+      context->reg[0] = sp - 4;
+
+      /* Find the extra save area below next_cfa.  */
+      for (i = 1; i < window_size; i++)
+	context->reg[i] = next_cfa - 4 * (1 + window_size - i);
+
+      /* Remaining registers rotate from previous save areas.  */
+      for (i = window_size; i < 4; i++)
+	context->reg[i] = orig_context.reg[i - window_size];
+    }
+
+  context->sp = cfa;
+  context->cfa = next_cfa;
+
+  _Unwind_SetSignalFrame (context, fs->signal_frame);
+}
+
+/* CONTEXT describes the unwind state for a frame, and FS describes the FDE
+   of its caller.  Update CONTEXT to refer to the caller as well.  Note
+   that the lsda member is not updated here, but later in
+   uw_frame_state_for.  */
+
+static void
+uw_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  uw_update_context_1 (context, fs);
+
+  /* Compute the return address now, since the return address column
+     can change from frame to frame.  */
+  if (fs->signal_ra != 0)
+    context->ra = (void *) fs->signal_ra;
+  else
+    context->ra = (void *) ((_Unwind_GetGR (context, fs->retaddr_column)
+			     & XTENSA_RA_FIELD_MASK) | context->ra_high_bits);
+}
+
+static void
+uw_advance_context (struct _Unwind_Context *context, _Unwind_FrameState *fs)
+{
+  uw_update_context (context, fs);
+}
+
+/* Fill in CONTEXT for top-of-stack.  The only valid registers at this
+   level will be the return address and the CFA.  */
+
+#define uw_init_context(CONTEXT)					   \
+  do									   \
+    {									   \
+      __builtin_unwind_init ();						   \
+      uw_init_context_1 (CONTEXT, __builtin_dwarf_cfa (),		   \
+			 __builtin_return_address (0));			   \
+    }									   \
+  while (0)
+
+static void __attribute__((noinline))
+uw_init_context_1 (struct _Unwind_Context *context, void *outer_cfa,
+		   void *outer_ra)
+{
+  void *ra = __builtin_return_address (0);
+  void *cfa = __builtin_dwarf_cfa ();
+  _Unwind_FrameState fs;
+
+  memset (context, 0, sizeof (struct _Unwind_Context));
+  context->ra = ra;
+
+  memset (&fs, 0, sizeof (fs));
+  fs.retaddr_column = 8;
+  context->sp = cfa;
+  context->cfa = outer_cfa;
+  context->ra_high_bits =
+    ((_Unwind_Word) uw_init_context_1) & ~XTENSA_RA_FIELD_MASK;
+  uw_update_context_1 (context, &fs);
+
+  context->ra = outer_ra;
+}
+
+
+/* Install TARGET into CURRENT so that we can return to it.  This is a
+   macro because __builtin_eh_return must be invoked in the context of
+   our caller.  */
+
+#define uw_install_context(CURRENT, TARGET)				 \
+  do									 \
+    {									 \
+      long offset = uw_install_context_1 ((CURRENT), (TARGET));		 \
+      void *handler = __builtin_frob_return_addr ((TARGET)->ra);	 \
+      __builtin_eh_return (offset, handler);				 \
+    }									 \
+  while (0)
+
+static long
+uw_install_context_1 (struct _Unwind_Context *current,
+		      struct _Unwind_Context *target)
+{
+  long i;
+
+  /* The eh_return insn assumes a window size of 8, so don't bother copying
+     the save areas for registers a8-a15 since they won't be reloaded.  */
+  for (i = 0; i < 2; ++i)
+    {
+      void *c = current->reg[i];
+      void *t = target->reg[i];
+
+      if (t && c && t != c)
+	memcpy (c, t, 4 * sizeof (_Unwind_Word));
+    }
+
+  return 0;
+}
+
+static inline _Unwind_Ptr
+uw_identify_context (struct _Unwind_Context *context)
+{
+  return _Unwind_GetCFA (context);
+}
+
+
+#include "unwind.inc"
+
+#if defined (USE_GAS_SYMVER) && defined (SHARED) && defined (USE_LIBUNWIND_EXCEPTIONS)
+alias (_Unwind_Backtrace);
+alias (_Unwind_DeleteException);
+alias (_Unwind_FindEnclosingFunction);
+alias (_Unwind_ForcedUnwind);
+alias (_Unwind_GetDataRelBase);
+alias (_Unwind_GetTextRelBase);
+alias (_Unwind_GetCFA);
+alias (_Unwind_GetGR);
+alias (_Unwind_GetIP);
+alias (_Unwind_GetLanguageSpecificData);
+alias (_Unwind_GetRegionStart);
+alias (_Unwind_RaiseException);
+alias (_Unwind_Resume);
+alias (_Unwind_Resume_or_Rethrow);
+alias (_Unwind_SetGR);
+alias (_Unwind_SetIP);
+#endif
+
+#endif /* !USING_SJLJ_EXCEPTIONS */
diff --git a/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.h b/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.h
new file mode 100644
index 000000000..c962ebb13
--- /dev/null
+++ b/gcc-4.9/libgcc/config/xtensa/unwind-dw2-xtensa.h
@@ -0,0 +1,49 @@
+/* DWARF2 frame unwind data structure for Xtensa.
+   Copyright (C) 1997-2014 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* A target can override (perhaps for backward compatibility) how
+   many dwarf2 columns are unwound.  */
+#ifndef DWARF_FRAME_REGISTERS
+#define DWARF_FRAME_REGISTERS FIRST_PSEUDO_REGISTER
+#endif
+
+/* Xtensa's variable-size register window save areas can be unwound without
+   any unwind info.  This is a stripped down version of the standard DWARF
+   _Unwind_FrameState.  */
+typedef struct
+{
+  /* The information we care about from the CIE/FDE.  */
+  _Unwind_Personality_Fn personality;
+  _Unwind_Word retaddr_column;
+  unsigned char fde_encoding;
+  unsigned char lsda_encoding;
+  unsigned char saw_z;
+  unsigned char signal_frame;
+  void *eh_ptr;
+
+  /* Saved registers for a signal frame.  */
+  _Unwind_Word *signal_regs;
+  _Unwind_Word signal_ra;
+} _Unwind_FrameState;
+