diff options
Diffstat (limited to 'gcc-4.9/libgcc/config/msp430')
21 files changed, 1331 insertions, 0 deletions
diff --git a/gcc-4.9/libgcc/config/msp430/cmpd.c b/gcc-4.9/libgcc/config/msp430/cmpd.c new file mode 100644 index 000000000..03e690dff --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/cmpd.c @@ -0,0 +1,19 @@ +/* Public domain. */ +int +__mspabi_cmpf (float x, float y) +{ + if (x < y) + return -1; + if (x > y) + return 1; + return 0; +} +int +__mspabi_cmpd (double x, double y) +{ + if (x < y) + return -1; + if (x > y) + return 1; + return 0; +} diff --git a/gcc-4.9/libgcc/config/msp430/cmpsi2.S b/gcc-4.9/libgcc/config/msp430/cmpsi2.S new file mode 100644 index 000000000..7f85c0b9b --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/cmpsi2.S @@ -0,0 +1,98 @@ +; Copyright (C) 2012-2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + +#ifdef __MSP430X_LARGE__ +#define ret_ RETA +#else +#define ret_ RET +#endif + + .text + + ;; int __cmpsi2 (signed long A, signed long B) + ;; + ;; Performs a signed comparison of A and B. + ;; If A is less than B it returns 0. If A is greater + ;; than B it returns 2. If they are equal it returns 1. + + ;; Note - this code is also used by the __ucmpsi2 routine below. + + .global __cmpsi2 + .type __cmpsi2, @function +__cmpsi2: + ;; A is in r12 (low), r13 (high) + ;; B is in r14 (low), r15 (high) + ;; Result put in r12 + + cmp.w r13, r15 + jeq .L_compare_low + jge .L_less_than +.L_greater_than: + mov.w #2, r12 + ret_ +.L_less_than: + mov.w #0, r12 + ret_ + +.L_compare_low: + cmp.w r12, r14 + jl .L_greater_than + jne .L_less_than + mov.w #1, r12 + ret_ + + .size __cmpsi2, . - __cmpsi2 + + + ;; int __ucmpsi2 (unsigned long A, unsigned long B) + ;; + ;; Performs an unsigned comparison of A and B. + ;; If A is less than B it returns 0. If A is greater + ;; than B it returns 2. If they are equal it returns 1. + +;;; Note - this function branches into the __cmpsi2 code above. + + .global __ucmpsi2 + .type __ucmpsi2, @function +__ucmpsi2: + ;; A is in r12 (low), r13 (high) + ;; B is in r14 (low), r15 (high) + ;; Result put in r12 + + tst r13 + jn .L_top_bit_set_in_A + tst r15 +;;; If the top bit of B is set, but A's is clear we know that A < B. + jn .L_less_than +;;; Neither A nor B has their top bit set so we can use the __cmpsi2 routine. +;;; Note we use Jc rather than BR as that saves two bytes. The TST insn always +;;; sets the C bit. + jc __cmpsi2 + +.L_top_bit_set_in_A: + tst r15 +;;; If both A and B have their top bit set we can use the __cmpsi2 routine. + jn __cmpsi2 +;;; Otherwise A has its top bit set and B does not so A > B. + jc .L_greater_than + + .size __ucmpsi2, . - __ucmpsi2 diff --git a/gcc-4.9/libgcc/config/msp430/epilogue.S b/gcc-4.9/libgcc/config/msp430/epilogue.S new file mode 100644 index 000000000..93ad0caf1 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/epilogue.S @@ -0,0 +1,51 @@ +; Copyright (C) 2012-2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + + .text + + .global __mspabi_func_epilog_7 + .global __mspabi_func_epilog_6 + .global __mspabi_func_epilog_5 + .global __mspabi_func_epilog_4 + .global __mspabi_func_epilog_3 + .global __mspabi_func_epilog_2 + .global __mspabi_func_epilog_1 + +__mspabi_func_epilog_7: + POP R4 +__mspabi_func_epilog_6: + POP R5 +__mspabi_func_epilog_5: + POP R6 +__mspabi_func_epilog_4: + POP R7 +__mspabi_func_epilog_3: + POP R8 +__mspabi_func_epilog_2: + POP R9 +__mspabi_func_epilog_1: + POP R10 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif diff --git a/gcc-4.9/libgcc/config/msp430/floathidf.c b/gcc-4.9/libgcc/config/msp430/floathidf.c new file mode 100644 index 000000000..304731d51 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/floathidf.c @@ -0,0 +1,8 @@ +/* Public domain. */ +extern double __floatsidf (long); + +double +__floathidf (int u) +{ + return __floatsidf ((long)u); +} diff --git a/gcc-4.9/libgcc/config/msp430/floathisf.c b/gcc-4.9/libgcc/config/msp430/floathisf.c new file mode 100644 index 000000000..64e5d805d --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/floathisf.c @@ -0,0 +1,11 @@ +/* Public domain. */ +typedef int HItype __attribute__ ((mode (HI))); +typedef float SFtype __attribute__ ((mode (SF))); + +extern SFtype __floatsisf (unsigned long); + +SFtype +__floathisf (HItype u) +{ + return __floatsisf ((unsigned long)u); +} diff --git a/gcc-4.9/libgcc/config/msp430/floatunhidf.c b/gcc-4.9/libgcc/config/msp430/floatunhidf.c new file mode 100644 index 000000000..f13b55076 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/floatunhidf.c @@ -0,0 +1,12 @@ +/* Public domain. */ +typedef int HItype __attribute__ ((mode (HI))); +typedef unsigned int UHItype __attribute__ ((mode (HI))); +typedef float DFtype __attribute__ ((mode (DF))); + +extern DFtype __floatunsidf (unsigned long); + +DFtype +__floatunhidf (UHItype u) +{ + return __floatunsidf ((unsigned long)u); +} diff --git a/gcc-4.9/libgcc/config/msp430/floatunhisf.c b/gcc-4.9/libgcc/config/msp430/floatunhisf.c new file mode 100644 index 000000000..ea920bd85 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/floatunhisf.c @@ -0,0 +1,12 @@ +/* Public domain. */ +typedef int HItype __attribute__ ((mode (HI))); +typedef unsigned int UHItype __attribute__ ((mode (HI))); +typedef float SFtype __attribute__ ((mode (SF))); + +extern SFtype __floatunsisf (unsigned long); + +SFtype +__floatunhisf (UHItype u) +{ + return __floatunsisf ((unsigned long)u); +} diff --git a/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c b/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c new file mode 100644 index 000000000..02c5d58d2 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2bitcountHI.c @@ -0,0 +1,49 @@ +/* libgcc routines for MSP430 + Copyright (C) 2012-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef int sint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef int sint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); +typedef int sint08_type __attribute__ ((mode (QI))); +typedef unsigned int uint08_type __attribute__ ((mode (QI))); +typedef int word_type __attribute__ ((mode (__word__))); + +#define C3B(a,b,c) a##b##c +#define C3(a,b,c) C3B(a,b,c) + +/* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in + msp430.h for why we are creating extra versions of some of the + functions defined in libgcc2.c. */ + +#define LIBGCC2_UNITS_PER_WORD 2 + +#define L_clzsi2 +#define L_ctzsi2 +#define L_ffssi2 +#define L_paritysi2 +#define L_popcountsi2 + +#include "libgcc2.c" diff --git a/gcc-4.9/libgcc/config/msp430/lib2divHI.c b/gcc-4.9/libgcc/config/msp430/lib2divHI.c new file mode 100644 index 000000000..287463e1f --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2divHI.c @@ -0,0 +1,42 @@ +/* HI mode divide routines for libgcc for MSP430 + Copyright (C) 2012-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef int sint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef int sint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); +typedef int sint08_type __attribute__ ((mode (QI))); +typedef unsigned int uint08_type __attribute__ ((mode (QI))); +typedef int word_type __attribute__ ((mode (__word__))); + +#define C3B(a,b,c) a##b##c +#define C3(a,b,c) C3B(a,b,c) + +#define UINT_TYPE uint16_type +#define SINT_TYPE sint16_type +#define BITS_MINUS_1 15 +#define NAME_MODE hi + +#include "msp430-divmod.h" diff --git a/gcc-4.9/libgcc/config/msp430/lib2divQI.c b/gcc-4.9/libgcc/config/msp430/lib2divQI.c new file mode 100644 index 000000000..7e3f4b2d9 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2divQI.c @@ -0,0 +1,43 @@ +/* QI mode divide routines for libgcc for MSP430 + Copyright (C) 2012-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef int sint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef int sint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); +typedef int sint08_type __attribute__ ((mode (QI))); +typedef unsigned int uint08_type __attribute__ ((mode (QI))); +typedef int word_type __attribute__ ((mode (__word__))); + +#define C3B(a,b,c) a##b##c +#define C3(a,b,c) C3B(a,b,c) + +#define UINT_TYPE uint08_type +#define SINT_TYPE sint08_type +#define BITS_MINUS_1 7 +#define NAME_MODE qi + +#include "msp430-divmod.h" + diff --git a/gcc-4.9/libgcc/config/msp430/lib2divSI.c b/gcc-4.9/libgcc/config/msp430/lib2divSI.c new file mode 100644 index 000000000..1bd1822d1 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2divSI.c @@ -0,0 +1,42 @@ +/* SI mode divide routines for libgcc for MSP430 + Copyright (C) 2012-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef int sint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef int sint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); +typedef int sint08_type __attribute__ ((mode (QI))); +typedef unsigned int uint08_type __attribute__ ((mode (QI))); +typedef int word_type __attribute__ ((mode (__word__))); + +#define C3B(a,b,c) a##b##c +#define C3(a,b,c) C3B(a,b,c) + +#define UINT_TYPE uint32_type +#define SINT_TYPE sint32_type +#define BITS_MINUS_1 31 +#define NAME_MODE si + +#include "msp430-divmod.h" diff --git a/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S b/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S new file mode 100644 index 000000000..7c83323ed --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2hw_mul.S @@ -0,0 +1,226 @@ +; Copyright (C) 2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + +.macro start_func name + .pushsection .text.\name,"ax",@progbits + .align 2 + .global \name + .type \name , @function +\name: + PUSH.W sr ; Save current interrupt state + DINT ; Disable interrupts + NOP ; Account for latency +.endm + +.macro end_func name +#ifdef __MSP430X_LARGE__ + POP.W sr + RETA +#else + RETI +#endif + .size \name , . - \name + .popsection +.endm + +.macro mult16 OP1, OP2, RESULT +;* * 16-bit hardware multiply: int16 = int16 * int16 +;* +;* - Operand 1 is in R12 +;* - Operand 2 is in R13 +;* - Result is in R12 +;* +;* To ensure that the multiply is performed atomically, interrupts are +;* disabled upon routine entry. Interrupt state is restored upon exit. +;* +;* Registers used: R12, R13 +;* +;* Macro arguments are the memory locations of the hardware registers. + + MOV.W r12, &\OP1 ; Load operand 1 into multiplier + MOV.W r13, &\OP2 ; Load operand 2 which triggers MPY + MOV.W &\RESULT, r12 ; Move result into return register +.endm + +.macro mult1632 OP1, OP2, RESULT_LO, RESULT_HI +;* * 16-bit hardware multiply with a 32-bit result: +;* int32 = int16 * int16 +;* uint32 = uint16 * uint16 +;* +;* - Operand 1 is in R12 +;* - Operand 2 is in R13 +;* - Result is in R12, R13 +;* +;* To ensure that the multiply is performed atomically, interrupts are +;* disabled upon routine entry. Interrupt state is restored upon exit. +;* +;* Registers used: R12, R13 +;* +;* Macro arguments are the memory locations of the hardware registers. + + MOV.W r12, &\OP1 ; Load operand 1 into multiplier + MOV.W r13, &\OP2 ; Load operand 2 which triggers MPY + MOV.W &\RESULT_LO, r12 ; Move low result into return register + MOV.W &\RESULT_HI, r13 ; Move high result into return register +.endm + +.macro mult32 OP1, OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI +;* * 32-bit hardware multiply with a 32-bit result using 16 multiply and accumulate: +;* int32 = int32 * int32 +;* +;* - Operand 1 is in R12, R13 +;* - Operand 2 is in R14, R15 +;* - Result is in R12, R13 +;* +;* To ensure that the multiply is performed atomically, interrupts are +;* disabled upon routine entry. Interrupt state is restored upon exit. +;* +;* Registers used: R12, R13, R14, R15 +;* +;* Macro arguments are the memory locations of the hardware registers. + + MOV.W r12, &\OP1 ; Load operand 1 Low into multiplier + MOV.W r14, &\OP2 ; Load operand 2 Low which triggers MPY + MOV.W r12, &\MAC_OP1 ; Load operand 1 Low into mac + MOV.W &\RESULT_LO, r12 ; Low 16-bits of result ready for return + MOV.W &\RESULT_HI, &\RESULT_LO; MOV intermediate mpy high into low + MOV.W r15, &\MAC_OP2 ; Load operand 2 High, trigger MAC + MOV.W r13, &\MAC_OP1 ; Load operand 1 High + MOV.W r14, &\MAC_OP2 ; Load operand 2 Lo, trigger MAC + MOV.W &\RESULT_LO, r13 ; Upper 16-bits result ready for return +.endm + + +.macro mult32_hw OP1_LO OP1_HI OP2_LO OP2_HI RESULT_LO RESULT_HI +;* * 32-bit hardware multiply with a 32-bit result +;* int32 = int32 * int32 +;* +;* - Operand 1 is in R12, R13 +;* - Operand 2 is in R14, R15 +;* - Result is in R12, R13 +;* +;* To ensure that the multiply is performed atomically, interrupts are +;* disabled upon routine entry. Interrupt state is restored upon exit. +;* +;* Registers used: R12, R13, R14, R15 +;* +;* Macro arguments are the memory locations of the hardware registers. + + MOV.W r12, &\OP1_LO ; Load operand 1 Low into multiplier + MOV.W r13, &\OP1_HI ; Load operand 1 High into multiplier + MOV.W r14, &\OP2_LO ; Load operand 2 Low into multiplier + MOV.W r15, &\OP2_HI ; Load operand 2 High, trigger MPY + MOV.W &\RESULT_LO, r12 ; Ready low 16-bits for return + MOV.W &\RESULT_HI, r13 ; Ready high 16-bits for return +.endm + +.macro mult3264_hw OP1_LO OP1_HI OP2_LO OP2_HI RES0 RES1 RES2 RES3 +;* * 32-bit hardware multiply with a 64-bit result +;* int64 = int32 * int32 +;* uint64 = uint32 * uint32 +;* +;* - Operand 1 is in R12, R13 +;* - Operand 2 is in R14, R15 +;* - Result is in R12, R13, R14, R15 +;* +;* To ensure that the multiply is performed atomically, interrupts are +;* disabled upon routine entry. Interrupt state is restored upon exit. +;* +;* Registers used: R12, R13, R14, R15 +;* +;* Macro arguments are the memory locations of the hardware registers. + + MOV.W r12, &\OP1_LO ; Load operand 1 Low into multiplier + MOV.W r13, &\OP1_HI ; Load operand 1 High into multiplier + MOV.W r14, &\OP2_LO ; Load operand 2 Low into multiplier + MOV.W r15, &\OP2_HI ; Load operand 2 High, trigger MPY + MOV.W &\RES0, R12 ; Ready low 16-bits for return + MOV.W &\RES1, R13 ; + MOV.W &\RES2, R14 ; + MOV.W &\RES3, R15 ; Ready high 16-bits for return +.endm + + +;; First generation MSP430 hardware multiplies .... + +.set MPY_OP1, 0x0130 +.set MPY_OP1_S, 0x0132 +.set MAC_OP1, 0x0134 +.set MPY_OP2, 0x0138 +.set MAC_OP2, 0x0138 +.set RESULT_LO, 0x013A +.set RESULT_HI, 0x013C + + start_func __mulhi2 + mult16 MPY_OP1, MPY_OP2, RESULT_LO + end_func __mulhi2 + + start_func __mulsihi2 + mult1632 MPY_OP1_S, MPY_OP2, RESULT_LO, RESULT_HI + end_func __mulsihi2 + + start_func __umulsihi2 + mult1632 MPY_OP1, MPY_OP2, RESULT_LO, RESULT_HI + end_func __umulsihi2 + + start_func __mulsi2 + mult32 MPY_OP1, MPY_OP2, MAC_OP1, MAC_OP2, RESULT_LO, RESULT_HI + end_func __mulsi2 + + start_func __mulsi2_hw32 + mult32_hw 0x0140, 0x0142, 0x0150, 0x0152, 0x0154, 0x0156 + end_func __mulsi2_hw32 + + start_func __muldisi2_hw32 + mult3264_hw 0x0144, 0x146, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A + end_func __muldisi2_hw32 + + start_func __umuldisi2_hw32 + mult3264_hw 0x0140, 0x142, 0x0150, 0x0152, 0x0154, 0x0156, 0x0158, 0x015A + end_func __umuldisi2_hw32 + +/* The F5xxx series of MCUs support the same 16-bit hardware + multiply, but it is accessed from different memory registers. */ + + start_func __mulhi2_f5 + mult16 0x04C0, 0x04C8, 0x04CA + end_func __mulhi2_f5 + + start_func __mulsihi2_f5 + mult1632 0x04C2, 0x04C8, 0x04CA, 0x04CC + end_func __mulsihi2_f5 + + start_func __umulsihi2_f5 + mult1632 0x04C0, 0x04C8, 0x04CA, 0x04CC + end_func __umulsihi2_f5 + + start_func __mulsi2_f5 + mult32_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6 + end_func __mulsi2_f5 + + start_func __muldisi2_f5 + mult3264_hw 0x04D4, 0x04D6, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA + end_func __muldisi2_f5 + + start_func __umuldisi2_f5 + mult3264_hw 0x04D0, 0x04D2, 0x04E0, 0x04E2, 0x04E4, 0x04E6, 0x04E8, 0x04EA + end_func __umuldisi2_f5 diff --git a/gcc-4.9/libgcc/config/msp430/lib2mul.c b/gcc-4.9/libgcc/config/msp430/lib2mul.c new file mode 100644 index 000000000..1a36af56b --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2mul.c @@ -0,0 +1,58 @@ +/* libgcc routines for MSP430 + Copyright (C) 2005-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint08_type __attribute__ ((mode (QI))); + +#define C3B(a,b,c) a##b##c +#define C3(a,b,c) C3B(a,b,c) + + +#define UINT_TYPE uint16_type +#define BITS_MINUS_1 15 +#define NAME_MODE hi + +#include "msp430-mul.h" + +#undef UINT_TYPE +#undef BITS_MINUS_1 +#undef NAME_MODE + +#define UINT_TYPE uint08_type +#define BITS_MINUS_1 7 +#define NAME_MODE qi + +#include "msp430-mul.h" + +#undef UINT_TYPE +#undef BITS_MINUS_1 +#undef NAME_MODE + +#define UINT_TYPE uint32_type +#define BITS_MINUS_1 31 +#define NAME_MODE si + +#include "msp430-mul.h" diff --git a/gcc-4.9/libgcc/config/msp430/lib2shift.c b/gcc-4.9/libgcc/config/msp430/lib2shift.c new file mode 100644 index 000000000..472247836 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/lib2shift.c @@ -0,0 +1,113 @@ +/* Shift functions for the GCC support library for the MSP430 + Copyright (C) 2011-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef int sint32_type __attribute__ ((mode (SI))); +typedef unsigned int uint32_type __attribute__ ((mode (SI))); +typedef int sint16_type __attribute__ ((mode (HI))); +typedef unsigned int uint16_type __attribute__ ((mode (HI))); + +uint32_type __ashlsi3 (uint32_type in, char bit); +sint32_type __ashrsi3 (sint32_type in, char bit); +int __clrsbhi2 (sint16_type x); +extern int __clrsbsi2 (sint32_type x); + +typedef struct +{ + union + { + uint32_type u; + uint16_type h[2]; + } u; +} dd; + +uint32_type +__ashlsi3 (uint32_type in, char bit) +{ + uint16_type h, l; + dd d; + + if (bit > 32) + return 0; + if (bit < 0) + return in; + + d.u.u = in; + h = d.u.h[1]; + l = d.u.h[0]; + + if (bit > 15) + { + h = l; + l = 0; + bit -= 16; + } + + while (bit) + { + h = (h << 1) | (l >> 15); + l <<= 1; + bit --; + } + + d.u.h[1] = h; + d.u.h[0] = l; + return d.u.u; +} + +sint32_type +__ashrsi3 (sint32_type in, char bit) +{ + sint16_type h; + uint16_type l; + dd d; + + if (bit > 32) + return 0; + if (bit < 0) + return in; + + d.u.u = in; + h = d.u.h[1]; + l = d.u.h[0]; + + while (bit) + { + l = (h << 15) | (l >> 1); + h >>= 1; + bit --; + } + + d.u.h[1] = h; + d.u.h[0] = l; + return d.u.u; +} + +int +__clrsbhi2 (sint16_type x) +{ + if (x == 0) + return 15; + return __clrsbsi2 ((sint32_type) x) - 16; +} diff --git a/gcc-4.9/libgcc/config/msp430/mpy.c b/gcc-4.9/libgcc/config/msp430/mpy.c new file mode 100644 index 000000000..57cffd0ba --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/mpy.c @@ -0,0 +1,15 @@ +/* Public domain. */ +extern int __mulhi3 (int, int); + +int +__mulhi3 (int x, int y) +{ + volatile int rv = 0; + + while (y > 0) + { + rv += x; + y --; + } + return rv; +} diff --git a/gcc-4.9/libgcc/config/msp430/msp430-divmod.h b/gcc-4.9/libgcc/config/msp430/msp430-divmod.h new file mode 100644 index 000000000..8e482a661 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/msp430-divmod.h @@ -0,0 +1,117 @@ +/* libgcc routines for MSP430 + Copyright (C) 2005-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +UINT_TYPE C3(udivmod,NAME_MODE,4) (UINT_TYPE, UINT_TYPE, word_type); +SINT_TYPE C3(__div,NAME_MODE,3) (SINT_TYPE, SINT_TYPE); +SINT_TYPE C3(__mod,NAME_MODE,3) (SINT_TYPE, SINT_TYPE); +UINT_TYPE C3(__udiv,NAME_MODE,3) (UINT_TYPE, UINT_TYPE); +UINT_TYPE C3(__umod,NAME_MODE,3) (UINT_TYPE, UINT_TYPE); + +UINT_TYPE +C3(udivmod,NAME_MODE,4) (UINT_TYPE num, UINT_TYPE den, word_type modwanted) +{ + UINT_TYPE bit = 1; + UINT_TYPE res = 0; + + while (den < num && bit && !(den & (1L << BITS_MINUS_1))) + { + den <<= 1; + bit <<= 1; + } + while (bit) + { + if (num >= den) + { + num -= den; + res |= bit; + } + bit >>= 1; + den >>= 1; + } + if (modwanted) + return num; + return res; +} + +SINT_TYPE +C3(__div,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b) +{ + word_type neg = 0; + SINT_TYPE res; + + if (a < 0) + { + a = -a; + neg = !neg; + } + + if (b < 0) + { + b = -b; + neg = !neg; + } + + res = C3(udivmod,NAME_MODE,4) (a, b, 0); + + if (neg) + res = -res; + + return res; +} + +SINT_TYPE +C3(__mod,NAME_MODE,3) (SINT_TYPE a, SINT_TYPE b) +{ + word_type neg = 0; + SINT_TYPE res; + + if (a < 0) + { + a = -a; + neg = 1; + } + + if (b < 0) + b = -b; + + res = C3(udivmod,NAME_MODE,4) (a, b, 1); + + if (neg) + res = -res; + + return res; +} + +UINT_TYPE +C3(__udiv,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b) +{ + return C3(udivmod,NAME_MODE,4) (a, b, 0); +} + +UINT_TYPE +C3(__umod,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b) +{ + return C3(udivmod,NAME_MODE,4) (a, b, 1); +} diff --git a/gcc-4.9/libgcc/config/msp430/msp430-mul.h b/gcc-4.9/libgcc/config/msp430/msp430-mul.h new file mode 100644 index 000000000..29e72a8a7 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/msp430-mul.h @@ -0,0 +1,42 @@ +/* libgcc routines for RL78 + Copyright (C) 2005-2014 Free Software Foundation, Inc. + Contributed by Red Hat. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +UINT_TYPE C3(__mul,NAME_MODE,3) (UINT_TYPE, UINT_TYPE); +UINT_TYPE +C3(__mul,NAME_MODE,3) (UINT_TYPE a, UINT_TYPE b) +{ + UINT_TYPE rv = 0; + + char bit; + + for (bit=0; b && bit<sizeof(UINT_TYPE)*8; bit++) + { + if (b & 1) + rv += a; + a <<= 1; + b >>= 1; + } + return rv; +} diff --git a/gcc-4.9/libgcc/config/msp430/slli.S b/gcc-4.9/libgcc/config/msp430/slli.S new file mode 100644 index 000000000..98210fb87 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/slli.S @@ -0,0 +1,108 @@ +; Copyright (C) 2012-2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + + .text + +/* Logical Left Shift - R12 -> R12 */ + + .macro _slli n + .global __mspabi_slli_\n +__mspabi_slli_\n: + ADD.W R12,R12 + .endm + + _slli 15 + _slli 14 + _slli 13 + _slli 12 + _slli 11 + _slli 10 + _slli 9 + _slli 8 + _slli 7 + _slli 6 + _slli 5 + _slli 4 + _slli 3 + _slli 2 + _slli 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R13 + ADD.W R12,R12 + .global __mspabi_slli +__mspabi_slli: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +/* Logical Left Shift - R12:R13 -> R12:R13 */ + + .macro _slll n + .global __mspabi_slll_\n +__mspabi_slll_\n: + ADD.W R12,R12 + ADDC.W R13,R13 + .endm + + _slll 15 + _slll 14 + _slll 13 + _slll 12 + _slll 11 + _slll 10 + _slll 9 + _slll 8 + _slll 7 + _slll 6 + _slll 5 + _slll 4 + _slll 3 + _slll 2 + _slll 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R14 + ADD.W R12,R12 + ADDC.W R13,R13 + .global __mspabi_slll +__mspabi_slll: + CMP #0,R14 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + diff --git a/gcc-4.9/libgcc/config/msp430/srai.S b/gcc-4.9/libgcc/config/msp430/srai.S new file mode 100644 index 000000000..3a7bf52ba --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/srai.S @@ -0,0 +1,106 @@ +; Copyright (C) 2012-2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + + .text + + .macro _srai n + .global __mspabi_srai_\n +__mspabi_srai_\n: + RRA.W R12 + .endm + +/* Logical Right Shift - R12 -> R12 */ + _srai 15 + _srai 14 + _srai 13 + _srai 12 + _srai 11 + _srai 10 + _srai 9 + _srai 8 + _srai 7 + _srai 6 + _srai 5 + _srai 4 + _srai 3 + _srai 2 + _srai 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R13 + RRA.W R12,R12 + .global __mspabi_srai +__mspabi_srai: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +/* Logical Right Shift - R12:R13 -> R12:R13 */ + + .macro _sral n + .global __mspabi_sral_\n +__mspabi_sral_\n: + RRA.W R13 + RRC.W R12 + .endm + + _sral 15 + _sral 14 + _sral 13 + _sral 12 + _sral 11 + _sral 10 + _sral 9 + _sral 8 + _sral 7 + _sral 6 + _sral 5 + _sral 4 + _sral 3 + _sral 2 + _sral 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R14 + RRA.W R13 + RRC.W R12 + .global __mspabi_sral +__mspabi_sral: + CMP #0,R14 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif diff --git a/gcc-4.9/libgcc/config/msp430/srli.S b/gcc-4.9/libgcc/config/msp430/srli.S new file mode 100644 index 000000000..9455f5948 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/srli.S @@ -0,0 +1,110 @@ +; Copyright (C) 2012-2014 Free Software Foundation, Inc. +; Contributed by Red Hat. +; +; This file is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published by the +; Free Software Foundation; either version 3, or (at your option) any +; later version. +; +; This file is distributed in the hope that it will be useful, but +; WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +; General Public License for more details. +; +; Under Section 7 of GPL version 3, you are granted additional +; permissions described in the GCC Runtime Library Exception, version +; 3.1, as published by the Free Software Foundation. +; +; You should have received a copy of the GNU General Public License and +; a copy of the GCC Runtime Library Exception along with this program; +; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +; <http://www.gnu.org/licenses/>. + + .text + + .macro _srli n + .global __mspabi_srli_\n +__mspabi_srli_\n: + CLRC + RRC.W R12 + .endm + +/* Logical Right Shift - R12 -> R12 */ + _srli 15 + _srli 14 + _srli 13 + _srli 12 + _srli 11 + _srli 10 + _srli 9 + _srli 8 + _srli 7 + _srli 6 + _srli 5 + _srli 4 + _srli 3 + _srli 2 + _srli 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R13 + CLRC + RRC.W R12,R12 + .global __mspabi_srli +__mspabi_srli: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +/* Logical Right Shift - R12:R13 -> R12:R13 */ + + .macro _srll n + .global __mspabi_srll_\n +__mspabi_srll_\n: + CLRC + RRC.W R13 + RRC.W R12 + .endm + + _srll 15 + _srll 14 + _srll 13 + _srll 12 + _srll 11 + _srll 10 + _srll 9 + _srll 8 + _srll 7 + _srll 6 + _srll 5 + _srll 4 + _srll 3 + _srll 2 + _srll 1 +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif + +1: ADD.W #-1,R14 + CLRC + RRC.W R13 + RRC.W R12 + .global __mspabi_srll +__mspabi_srll: + CMP #0,R14 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif diff --git a/gcc-4.9/libgcc/config/msp430/t-msp430 b/gcc-4.9/libgcc/config/msp430/t-msp430 new file mode 100644 index 000000000..7a7b68007 --- /dev/null +++ b/gcc-4.9/libgcc/config/msp430/t-msp430 @@ -0,0 +1,49 @@ +# Makefile fragment for building LIBGCC for the TI MSP430 processor. +# Copyright (C) 2011-2014 Free Software Foundation, Inc. +# Contributed by Red Hat. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published +# by the Free Software Foundation; either version 3, or (at your +# option) any later version. +# +# GCC is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See +# the GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public +# License along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# Note - we have separate versions of the lib2div<mode> files +# as the functions are quite large and we do not want to pull +# in unneeded division routines. + +LIB2ADD = \ + $(srcdir)/config/msp430/lib2divQI.c \ + $(srcdir)/config/msp430/lib2divHI.c \ + $(srcdir)/config/msp430/lib2divSI.c \ + $(srcdir)/config/msp430/lib2bitcountHI.c \ + $(srcdir)/config/msp430/lib2mul.c \ + $(srcdir)/config/msp430/lib2shift.c \ + $(srcdir)/config/msp430/epilogue.S \ + $(srcdir)/config/msp430/mpy.c \ + $(srcdir)/config/msp430/slli.S \ + $(srcdir)/config/msp430/srai.S \ + $(srcdir)/config/msp430/srli.S \ + $(srcdir)/config/msp430/cmpsi2.S \ + $(srcdir)/config/msp430/lib2hw_mul.S \ + $(srcdir)/config/msp430/floatunhisf.c \ + $(srcdir)/config/msp430/floatunhidf.c \ + $(srcdir)/config/msp430/floathidf.c \ + $(srcdir)/config/msp430/floathisf.c \ + $(srcdir)/config/msp430/cmpd.c + +HOST_LIBGCC2_CFLAGS += -Os -ffunction-sections -fdata-sections + +# Local Variables: +# mode: Makefile +# End: |