diff options
Diffstat (limited to 'gcc-4.9/gcc/testsuite/lib/target-supports.exp')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/lib/target-supports.exp | 191 |
1 files changed, 154 insertions, 37 deletions
diff --git a/gcc-4.9/gcc/testsuite/lib/target-supports.exp b/gcc-4.9/gcc/testsuite/lib/target-supports.exp index 7d296d902..4f1325bde 100644 --- a/gcc-4.9/gcc/testsuite/lib/target-supports.exp +++ b/gcc-4.9/gcc/testsuite/lib/target-supports.exp @@ -918,6 +918,17 @@ proc check_effective_target_nomips16 { } { }] } +# Return true if the target is a MIPS target that does not produce +# micromips code. + +proc check_effective_target_nomicromips { } { + return [check_no_compiler_messages nomicromips object { + #ifdef __mips_micromips + #error MICROMIPS + #endif + }] +} + # Add the options needed for MIPS16 function attributes. At the moment, # we don't support MIPS16 PIC. @@ -1287,6 +1298,32 @@ proc check_sse_hw_available { } { }] } +# Return 1 if the target supports executing MSA instructions, 0 +# otherwise. Cache the result. + +proc check_msa_hw_available { } { + return [check_cached_effective_target msa_hw_available { + # If this is not the right target then we can skip the test. + if { !([istarget mips*-*-*]) } { + expr 0 + } else { + check_runtime_nocache msa_hw_available { + #if !defined(__mips_msa) + #error "MSA NOT AVAIL" + #else + #include <msa.h> + + int main() + { + v8i16 v = __builtin_msa_ldi_h (0); + return v[0]; + } + #endif + } "-mmsa -mfp64 -mnan=2008 -mips32r2 -mhard-float" + } + }] +} + # Return 1 if the target supports executing SSE2 instructions, 0 # otherwise. Cache the result. @@ -1356,6 +1393,24 @@ proc check_effective_target_sse2_runtime { } { return 0 } +# Return 1 if the target supports running SSE2 executables, 0 otherwise. + +proc check_effective_target_msa_runtime { } { + if { [check_effective_target_mips_msa] + && [check_msa_hw_available] } { + return 1 + } + return 0 +} + +# Return 1 if msa and not mips16 and not micropmips + +proc check_effective_target_mips_msa_nomips16_nomicromips { } { + return [check_effective_target_mips_msa] + && [check_effective_target_nomip16] + && [check_eefective_target_nomicromips] +} + # Return 1 if the target supports running AVX executables, 0 otherwise. proc check_effective_target_avx_runtime { } { @@ -2068,15 +2123,16 @@ proc check_effective_target_vect_int { } { if { [istarget i?86-*-*] || ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) - || [istarget spu-*-*] - || [istarget x86_64-*-*] - || [istarget sparc*-*-*] - || [istarget alpha*-*-*] - || [istarget ia64-*-*] - || [istarget aarch64*-*-*] - || [check_effective_target_arm32] - || ([istarget mips*-*-*] - && [check_effective_target_mips_loongson]) } { + || [istarget spu-*-*] + || [istarget x86_64-*-*] + || [istarget sparc*-*-*] + || [istarget alpha*-*-*] + || [istarget ia64-*-*] + || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mips_loongson])) } { set et_vect_int_saved 1 } } @@ -2100,7 +2156,9 @@ proc check_effective_target_vect_intfloat_cvt { } { && ![istarget powerpc-*-linux*paired*]) || [istarget x86_64-*-*] || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok])} { + && [check_effective_target_arm_neon_ok]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_intfloat_cvt_saved 1 } } @@ -2139,7 +2197,9 @@ proc check_effective_target_vect_uintfloat_cvt { } { || [istarget x86_64-*-*] || [istarget aarch64*-*-*] || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok])} { + && [check_effective_target_arm_neon_ok]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_uintfloat_cvt_saved 1 } } @@ -2164,7 +2224,9 @@ proc check_effective_target_vect_floatint_cvt { } { && ![istarget powerpc-*-linux*paired*]) || [istarget x86_64-*-*] || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok])} { + && [check_effective_target_arm_neon_ok]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_floatint_cvt_saved 1 } } @@ -2186,7 +2248,9 @@ proc check_effective_target_vect_floatuint_cvt { } { if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) || ([istarget arm*-*-*] - && [check_effective_target_arm_neon_ok])} { + && [check_effective_target_arm_neon_ok]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_floatuint_cvt_saved 1 } } @@ -2895,6 +2959,24 @@ proc check_effective_target_mips_loongson { } { }] } +# Return 1 if a msa program can be compiled to object +proc check_effective_target_mips_msa { } { + return [check_no_compiler_messages msa object { + #if !defined(__mips_msa) + #error "MSA NOT AVAIL" + #else + #include <msa.h> + + int main() + { + v8i16 v = __builtin_msa_ldi_h (1); + + return v[0]; + } + #endif + } "-mmsa -mfp64 -mnan=2008 -mips32r2 -mhard-float" ] +} + # Return 1 if this is an ARM target that adheres to the ABI for the ARM # Architecture. @@ -3281,14 +3363,15 @@ proc check_effective_target_vect_shift { } { } else { set et_vect_shift_saved 0 if { ([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) - || [istarget ia64-*-*] - || [istarget i?86-*-*] - || [istarget x86_64-*-*] - || [istarget aarch64*-*-*] - || [check_effective_target_arm32] - || ([istarget mips*-*-*] - && [check_effective_target_mips_loongson]) } { + && ![istarget powerpc-*-linux*paired*]) + || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mips_loongson])) } { set et_vect_shift_saved 1 } } @@ -3307,8 +3390,10 @@ proc check_effective_target_vect_shift_char { } { } else { set et_vect_shift_char_saved 0 if { ([istarget powerpc*-*-*] - && ![istarget powerpc-*-linux*paired*]) - || [check_effective_target_arm32] } { + && ![istarget powerpc-*-linux*paired*]) + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_shift_char_saved 1 } } @@ -3328,7 +3413,9 @@ proc check_effective_target_vect_long { } { && [check_effective_target_ilp32]) || [istarget x86_64-*-*] || [check_effective_target_arm32] - || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } { + || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set answer 1 } else { set answer 0 @@ -3357,6 +3444,8 @@ proc check_effective_target_vect_float { } { || [istarget x86_64-*-*] || [istarget ia64-*-*] || [istarget aarch64*-*-*] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) || [check_effective_target_arm32] } { set et_vect_float_saved 1 } @@ -3391,6 +3480,9 @@ proc check_effective_target_vect_double { } { } } elseif { [istarget spu-*-*] } { set et_vect_double_saved 1 + } elseif { [istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips] } { + set et_vect_dpouble_saved 1 } } @@ -3410,7 +3502,9 @@ proc check_effective_target_vect_long_long { } { } else { set et_vect_long_long_saved 0 if { [istarget i?86-*-*] - || [istarget x86_64-*-*] } { + || [istarget x86_64-*-*] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_long_long_saved 1 } } @@ -3436,7 +3530,8 @@ proc check_effective_target_vect_no_int_max { } { || [istarget spu-*-*] || [istarget alpha*-*-*] || ([istarget mips*-*-*] - && [check_effective_target_mips_loongson]) } { + && (![check_effective_target_mips_msa_nomips16_nomicromips]) + && [check_effective_target_mips_loongson]) } { set et_vect_no_int_max_saved 1 } } @@ -3498,12 +3593,13 @@ proc check_effective_target_vect_perm { } { || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] - || [istarget spu-*-*] + || [istarget spu-*-*] || [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget mips*-*-*] - && [check_effective_target_mpaired_single]) } { - set et_vect_perm_saved 1 + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mpaired_single])) } { + set et_vect_perm_saved 1 } } verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2 @@ -3527,7 +3623,9 @@ proc check_effective_target_vect_perm_byte { } { || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] - || [istarget spu-*-*] } { + || [istarget spu-*-*] + || ([istarget mips-*.*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_perm_byte_saved 1 } } @@ -3552,7 +3650,9 @@ proc check_effective_target_vect_perm_short { } { || ([istarget aarch64*-*-*] && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] - || [istarget spu-*-*] } { + || [istarget spu-*-*] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_perm_short_saved 1 } } @@ -3980,7 +4080,8 @@ proc check_effective_target_vect_no_align { } { || [istarget ia64-*-*] || [check_effective_target_arm_vect_no_misalign] || ([istarget mips*-*-*] - && [check_effective_target_mips_loongson]) } { + && ![check_effective_target_mips_msa] + && [check_effective_target_mips_loongson]) } { set et_vect_no_align_saved 1 } } @@ -4001,7 +4102,8 @@ proc check_effective_target_vect_hw_misalign { } { set et_vect_hw_misalign_saved 0 if { ([istarget x86_64-*-*] || [istarget aarch64*-*-*] - || [istarget i?86-*-*]) } { + || [istarget i?86-*-*]) + || ([istarget mips*-*-*] && [check_effective_target_mips_msa_nomips16_nomicromips]) } { set et_vect_hw_misalign_saved 1 } } @@ -4245,7 +4347,8 @@ proc check_effective_target_vect_short_mult { } { || [istarget aarch64*-*-*] || [check_effective_target_arm32] || ([istarget mips*-*-*] - && [check_effective_target_mips_loongson]) } { + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mips_loongson])) } { set et_vect_short_mult_saved 1 } } @@ -4269,6 +4372,8 @@ proc check_effective_target_vect_int_mult { } { || [istarget x86_64-*-*] || [istarget ia64-*-*] || [istarget aarch64*-*-*] + || ([istarget mips*-*-*] + && [check_effective_target_mips_msa_nomips16_nomicromips]) || [check_effective_target_arm32] } { set et_vect_int_mult_saved 1 } @@ -4295,7 +4400,8 @@ proc check_effective_target_vect_extract_even_odd { } { || [istarget ia64-*-*] || [istarget spu-*-*] || ([istarget mips*-*-*] - && [check_effective_target_mpaired_single]) } { + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mpaired_single])) } { set et_vect_extract_even_odd_saved 1 } } @@ -4321,7 +4427,8 @@ proc check_effective_target_vect_interleave { } { || [istarget ia64-*-*] || [istarget spu-*-*] || ([istarget mips*-*-*] - && [check_effective_target_mpaired_single]) } { + && ([check_effective_target_mips_msa_nomips16_nomicromips] + || [check_effective_target_mpaired_single])) } { set et_vect_interleave_saved 1 } } @@ -5616,6 +5723,16 @@ proc check_vect_support_and_set_flags { } { } else { set dg-do-what-default compile } + } elseif { [istarget mips*-*-*] } { + if { ([check_effective_target_mips_msa_nomips16_nomicromips]) } { + lappend DEFAULT_VECTCFLAGS "-mmsa" "-mfp64" "-mnan=2008" "-mips32r2" "-mhard-float" + + if { [check_effective_target_msa_runtime] } { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } + } } elseif { [istarget mips*-*-*] && ([check_effective_target_mpaired_single] || [check_effective_target_mips_loongson]) @@ -5629,7 +5746,7 @@ proc check_vect_support_and_set_flags { } { if [check_effective_target_ultrasparc_hw] { set dg-do-what-default run } else { - set dg-do-what-default compile + set dg-do-what-default compile } } elseif [istarget alpha*-*-*] { # Alpha's vectorization capabilities are extremely limited. |