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-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/sh/pr54602-3.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/sh/pr54602-3.c b/gcc-4.9/gcc/testsuite/gcc.target/sh/pr54602-3.c
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index 000000000..5d6a75a70
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/sh/pr54602-3.c
@@ -0,0 +1,12 @@
+/* Verify that the rte delay slot is not stuffed with register pop insns
+ which touch the banked registers r0..r7 on SH3* and SH4* targets. */
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m3*" "-m4*" } } */
+/* { dg-final { scan-assembler-times "nop" 1 } } */
+
+int __attribute__ ((interrupt_handler))
+test00 (int a, int b, int c, int d)
+{
+ return a + b;
+}