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-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-6.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-6.c b/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-6.c
new file mode 100644
index 000000000..9534974de
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/mips/umips-lwp-6.c
@@ -0,0 +1,17 @@
+/* { dg-options "-mgp32 -fpeephole2 -mtune=m14k (-mmicromips)" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+void MICROMIPS
+foo (int *r4)
+{
+ int r5 = r4[512];
+ int r6 = r4[513];
+ r4[2] = r6 * r6;
+ {
+ register int r5asm asm ("$5") = r5;
+ register int r6asm asm ("$6") = r6;
+ asm ("#foo" : "=m" (r4[3]) : "d" (r5asm), "d" (r6asm));
+ }
+}
+
+/* { dg-final { scan-assembler-not "\tlwp" } }*/