diff options
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/i386/i386.exp')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/i386/i386.exp | 370 |
1 files changed, 370 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/i386/i386.exp b/gcc-4.9/gcc/testsuite/gcc.target/i386/i386.exp new file mode 100644 index 000000000..080e302b7 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/i386/i386.exp @@ -0,0 +1,370 @@ +# Copyright (C) 1997-2014 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# GCC testsuite that uses the `dg.exp' driver. + +# Exit immediately if this isn't a x86 target. +if { ![istarget i?86*-*-*] && ![istarget x86_64-*-*] } then { + return +} + +# Load support procs. +load_lib gcc-dg.exp + +# Return 1 if attribute ms_hook_prologue is supported. +proc check_effective_target_ms_hook_prologue { } { + if { [check_no_compiler_messages ms_hook_prologue object { + void __attribute__ ((__ms_hook_prologue__)) foo (); + } ""] } { + return 1 + } else { + return 0 + } +} + +# Return 1 if 3dnow instructions can be compiled. +proc check_effective_target_3dnow { } { + return [check_no_compiler_messages 3dnow object { + typedef int __m64 __attribute__ ((__vector_size__ (8))); + typedef float __v2sf __attribute__ ((__vector_size__ (8))); + + __m64 _m_pfadd (__m64 __A, __m64 __B) + { + return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B); + } + } "-O2 -m3dnow" ] +} + +# Return 1 if sse3 instructions can be compiled. +proc check_effective_target_sse3 { } { + return [check_no_compiler_messages sse3 object { + typedef double __m128d __attribute__ ((__vector_size__ (16))); + typedef double __v2df __attribute__ ((__vector_size__ (16))); + + __m128d _mm_addsub_pd (__m128d __X, __m128d __Y) + { + return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y); + } + } "-O2 -msse3" ] +} + +# Return 1 if ssse3 instructions can be compiled. +proc check_effective_target_ssse3 { } { + return [check_no_compiler_messages ssse3 object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef int __v4si __attribute__ ((__vector_size__ (16))); + + __m128i _mm_abs_epi32 (__m128i __X) + { + return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X); + } + } "-O2 -mssse3" ] +} + +# Return 1 if sse4 instructions can be compiled. +proc check_effective_target_sse4 { } { + return [check_no_compiler_messages sse4.1 object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef int __v4si __attribute__ ((__vector_size__ (16))); + + __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y) + { + return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X, + (__v4si)__Y); + } + } "-O2 -msse4.1" ] +} + +# Return 1 if aes instructions can be compiled. +proc check_effective_target_aes { } { + return [check_no_compiler_messages aes object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i _mm_aesimc_si128 (__m128i __X) + { + return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X); + } + } "-O2 -maes" ] +} + +# Return 1 if vaes instructions can be compiled. +proc check_effective_target_vaes { } { + return [check_no_compiler_messages vaes object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i _mm_aesimc_si128 (__m128i __X) + { + return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X); + } + } "-O2 -maes -mavx" ] +} + +# Return 1 if pclmul instructions can be compiled. +proc check_effective_target_pclmul { } { + return [check_no_compiler_messages pclmul object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i pclmulqdq_test (__m128i __X, __m128i __Y) + { + return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X, + (__v2di)__Y, + 1); + } + } "-O2 -mpclmul" ] +} + +# Return 1 if vpclmul instructions can be compiled. +proc check_effective_target_vpclmul { } { + return [check_no_compiler_messages vpclmul object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i pclmulqdq_test (__m128i __X, __m128i __Y) + { + return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X, + (__v2di)__Y, + 1); + } + } "-O2 -mpclmul -mavx" ] +} + +# Return 1 if sse4a instructions can be compiled. +proc check_effective_target_sse4a { } { + return [check_no_compiler_messages sse4a object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef long long __v2di __attribute__ ((__vector_size__ (16))); + + __m128i _mm_insert_si64 (__m128i __X,__m128i __Y) + { + return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y); + } + } "-O2 -msse4a" ] +} + +# Return 1 if fma4 instructions can be compiled. +proc check_effective_target_fma4 { } { + return [check_no_compiler_messages fma4 object { + typedef float __m128 __attribute__ ((__vector_size__ (16))); + typedef float __v4sf __attribute__ ((__vector_size__ (16))); + __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) + { + return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A, + (__v4sf)__B, + (__v4sf)__C); + } + } "-O2 -mfma4" ] +} + +# Return 1 if fma instructions can be compiled. +proc check_effective_target_fma { } { + return [check_no_compiler_messages fma object { + typedef float __m128 __attribute__ ((__vector_size__ (16))); + typedef float __v4sf __attribute__ ((__vector_size__ (16))); + __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) + { + return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A, + (__v4sf)__B, + (__v4sf)__C); + } + } "-O2 -mfma" ] +} + +# Return 1 if xop instructions can be compiled. +proc check_effective_target_xop { } { + return [check_no_compiler_messages xop object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef short __v8hi __attribute__ ((__vector_size__ (16))); + __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C) + { + return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A, + (__v8hi)__B, + (__v8hi)__C); + } + } "-O2 -mxop" ] +} + +# Return 1 if lzcnt instruction can be compiled. +proc check_effective_target_lzcnt { } { + return [check_no_compiler_messages lzcnt object { + unsigned short _lzcnt (unsigned short __X) + { + return __builtin_clzs (__X); + } + } "-mlzcnt" ] +} + +# Return 1 if bmi instructions can be compiled. +proc check_effective_target_bmi { } { + return [check_no_compiler_messages bmi object { + unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y) + { + return __builtin_ia32_bextr_u32 (__X, __Y); + } + } "-mbmi" ] +} + +# Return 1 if bmi2 instructions can be compiled. +proc check_effective_target_bmi2 { } { + return [check_no_compiler_messages bmi2 object { + unsigned int + _bzhi_u32 (unsigned int __X, unsigned int __Y) + { + return __builtin_ia32_bzhi_si (__X, __Y); + } + } "-mbmi2" ] +} + +# Return 1 if ADX instructions can be compiled. +proc check_effective_target_adx { } { + return [check_no_compiler_messages adx object { + unsigned char + _adxcarry_u32 (unsigned char __CF, unsigned int __X, + unsigned int __Y, unsigned int *__P) + { + return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P); + } + } "-madx" ] +} + +# Return 1 if rtm instructions can be compiled. +proc check_effective_target_rtm { } { + return [check_no_compiler_messages rtm object { + void + _rtm_xend (void) + { + return __builtin_ia32_xend (); + } + } "-mrtm" ] +} + +# Return 1 if avx512f instructions can be compiled. +proc check_effective_target_avx512f { } { + return [check_no_compiler_messages avx512f object { + typedef long long __v8di __attribute__ ((__vector_size__ (64))); + __v8di + mm512_and_epi64 (__v8di __X, __v8di __Y) + { + __v8di __W; + return __builtin_ia32_pandq512_mask (__X, __Y, __W, -1); + } + } "-mavx512f" ] +} + +# Return 1 if avx512cd instructions can be compiled. +proc check_effective_target_avx512cd { } { + return [check_no_compiler_messages avx512cd_trans object { + typedef long long __v8di __attribute__ ((__vector_size__ (64))); + __v8di + _mm512_conflict_epi64 (__v8di __W, __v8di __A) + { + return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A, + (__v8di) __W, + -1); + } + } "-Wno-psabi -mavx512cd" ] +} + +# Return 1 if avx512er instructions can be compiled. +proc check_effective_target_avx512er { } { + return [check_no_compiler_messages avx512er_trans object { + typedef float __v16sf __attribute__ ((__vector_size__ (64))); + __v16sf + mm512_exp2a23_ps (__v16sf __X) + { + __v16sf __W; + return __builtin_ia32_exp2ps_mask (__X, __W, -1, 4); + } + } "-Wno-psabi -mavx512er" ] +} + +# Return 1 if sha instructions can be compiled. +proc check_effective_target_sha { } { + return [check_no_compiler_messages sha object { + typedef long long __m128i __attribute__ ((__vector_size__ (16))); + typedef int __v4si __attribute__ ((__vector_size__ (16))); + + __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y) + { + return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X, + (__v4si)__Y); + } + } "-O2 -msha" ] +} + +# If the linker used understands -M <mapfile>, pass it to clear hardware +# capabilities set by the Sun assembler. +# Try mapfile syntax v2 first which is the only way to clear hwcap_2 flags. +set clearcap_ldflags "-Wl,-M,$srcdir/$subdir/clearcapv2.map" + +if ![check_no_compiler_messages mapfilev2 executable { + int main (void) { return 0; } +} $clearcap_ldflags ] { + # If this doesn't work, fall back to the less capable v1 syntax. + set clearcap_ldflags "-Wl,-M,$srcdir/$subdir/clearcap.map" + + if ![check_no_compiler_messages mapfile executable { + int main (void) { return 0; } + } $clearcap_ldflags ] { + unset clearcap_ldflags + } +} + +if [info exists clearcap_ldflags] { + if { [info procs gcc_target_compile] != [list] \ + && [info procs saved_gcc_target_compile] == [list] } { + rename gcc_target_compile saved_gcc_target_compile + + proc gcc_target_compile { source dest type options } { + global clearcap_ldflags + # Always pass -Wl,-M,<mapfile>, but don't let it show up in gcc.sum. + lappend options "additional_flags=$clearcap_ldflags" + + return [saved_gcc_target_compile $source $dest $type $options] + } + } +} + +# If a testcase doesn't have special options, use these. +global DEFAULT_CFLAGS +if ![info exists DEFAULT_CFLAGS] then { + set DEFAULT_CFLAGS " -ansi -pedantic-errors" +} + +# Initialize `dg'. +dg-init + +# Special case compilation of vect-args.c so we don't have to +# replicate it 10 times. +foreach type { "" -mmmx -m3dnow -msse -msse2 } { + foreach level { "" -O } { + set flags "$type $level" + verbose -log "Testing vect-args, $flags" 1 + dg-test $srcdir/$subdir/vect-args.c $flags "" + } +} + +# Everything else. +set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] +set tests [prune $tests $srcdir/$subdir/vect-args.c] + +# Main loop. +dg-runtest $tests "" $DEFAULT_CFLAGS + +# All done. +dg-finish |