1 files changed, 35 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/i386/funcspec-1.c b/gcc-4.9/gcc/testsuite/gcc.target/i386/funcspec-1.c
new file mode 100644
index 000000000..742e3a19e
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/i386/funcspec-1.c
@@ -0,0 +1,35 @@
+/* Test whether using target specific options, we can generate SSE2 code on
+   32-bit, which does not generate SSE2 by default, but still generate 387 code
+   for a function that doesn't use attribute((option)).  */
+/* { dg-do compile } */
+/* { dg-require-effective-target ia32 } */
+/* { dg-options "-O3 -ftree-vectorize -mno-sse" } */
+
+#ifndef SIZE
+#define SIZE 1024
+#endif
+
+float a[SIZE] __attribute__((__aligned__(16)));
+float b[SIZE] __attribute__((__aligned__(16)));
+float c[SIZE] __attribute__((__aligned__(16)));
+
+void sse_addnums (void) __attribute__ ((__target__ ("sse2")));
+
+void
+sse_addnums (void)
+{
+  int i = 0;
+  for (; i < SIZE; ++i)
+    a[i] = b[i] + c[i];
+}
+
+void
+i387_subnums (void)
+{
+  int i = 0;
+  for (; i < SIZE; ++i)
+    a[i] = b[i] - c[i];
+}
+
+/* { dg-final { scan-assembler "addps\[ \t\]" } } */
+/* { dg-final { scan-assembler "fsubs\[ \t\]" } } */