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-rw-r--r--gcc-4.9/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc-4.9/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
new file mode 100644
index 000000000..5ab744fc2
--- /dev/null
+++ b/gcc-4.9/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
@@ -0,0 +1,20 @@
+/* Test the `vld3_lanes16' ARM Neon intrinsic. */
+/* This file was autogenerated by neon-testgen. */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-save-temps -O0" } */
+/* { dg-add-options arm_neon } */
+
+#include "arm_neon.h"
+
+void test_vld3_lanes16 (void)
+{
+ int16x4x3_t out_int16x4x3_t;
+ int16x4x3_t arg1_int16x4x3_t;
+
+ out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
+}
+
+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* { dg-final { cleanup-saved-temps } } */