diff options
Diffstat (limited to 'gcc-4.9/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c')
| -rw-r--r-- | gcc-4.9/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c new file mode 100644 index 000000000..761777f79 --- /dev/null +++ b/gcc-4.9/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -fno-vect-cost-model" } */ + +#include "stdint.h" +#include "vect-ld1r.x" + +DEF (int8_t) +DEF (int16_t) +DEF (int32_t) +DEF (int64_t) + +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8b"} } */ +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.16b"} } */ +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4h"} } */ +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8h"} } */ +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */ +/* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */ +/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */ |