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-rw-r--r--gcc-4.9/gcc/expmed.c32
1 files changed, 10 insertions, 22 deletions
diff --git a/gcc-4.9/gcc/expmed.c b/gcc-4.9/gcc/expmed.c
index 6e9975df3..0124a213b 100644
--- a/gcc-4.9/gcc/expmed.c
+++ b/gcc-4.9/gcc/expmed.c
@@ -463,7 +463,7 @@ strict_volatile_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize,
/* Check for cases where the C++ memory model applies. */
if (bitregion_end != 0
&& (bitnum - bitnum % modesize < bitregion_start
- || bitnum - bitnum % modesize + modesize > bitregion_end))
+ || bitnum - bitnum % modesize + modesize - 1 > bitregion_end))
return false;
return true;
@@ -679,28 +679,13 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
|| (bitsize % BITS_PER_WORD == 0 && bitnum % BITS_PER_WORD == 0)))
{
/* Use the subreg machinery either to narrow OP0 to the required
- words or to cope with mode punning between equal-sized modes.
- In the latter case, use subreg on the rhs side, not lhs. */
- rtx sub;
-
- if (bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
- {
- sub = simplify_gen_subreg (GET_MODE (op0), value, fieldmode, 0);
- if (sub)
- {
- emit_move_insn (op0, sub);
- return true;
- }
- }
- else
- {
- sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
+ words or to cope with mode punning between equal-sized modes. */
+ rtx sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0),
bitnum / BITS_PER_UNIT);
- if (sub)
- {
- emit_move_insn (sub, value);
- return true;
- }
+ if (sub)
+ {
+ emit_move_insn (sub, value);
+ return true;
}
}
@@ -3321,6 +3306,9 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
enum mult_variant variant;
struct algorithm algorithm;
+ if (coeff == 0)
+ return CONST0_RTX (mode);
+
/* Special case powers of two. */
if (EXACT_POWER_OF_2_OR_ZERO_P (coeff))
{