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-rw-r--r--gcc-4.9/gcc/config/sparc/leon.md14
-rw-r--r--gcc-4.9/gcc/config/sparc/linux.h6
-rw-r--r--gcc-4.9/gcc/config/sparc/linux64.h6
-rw-r--r--gcc-4.9/gcc/config/sparc/sparc-opts.h1
-rw-r--r--gcc-4.9/gcc/config/sparc/sparc.c40
-rw-r--r--gcc-4.9/gcc/config/sparc/sparc.h51
-rw-r--r--gcc-4.9/gcc/config/sparc/sparc.md1
-rw-r--r--gcc-4.9/gcc/config/sparc/sparc.opt3
-rw-r--r--gcc-4.9/gcc/config/sparc/t-rtems13
9 files changed, 68 insertions, 67 deletions
diff --git a/gcc-4.9/gcc/config/sparc/leon.md b/gcc-4.9/gcc/config/sparc/leon.md
index 82b6a0d96..ad22e3b59 100644
--- a/gcc-4.9/gcc/config/sparc/leon.md
+++ b/gcc-4.9/gcc/config/sparc/leon.md
@@ -29,11 +29,11 @@
;; Use a double reservation to work around the load pipeline hazard on UT699.
(define_insn_reservation "leon3_load" 1
- (and (eq_attr "cpu" "leon3") (eq_attr "type" "load,sload"))
+ (and (eq_attr "cpu" "leon3,leon3v7") (eq_attr "type" "load,sload"))
"leon_memory*2")
(define_insn_reservation "leon_store" 2
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "store"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "store"))
"leon_memory*2")
;; This describes Gaisler Research's FPU
@@ -44,21 +44,21 @@
(define_cpu_unit "grfpu_ds" "grfpu")
(define_insn_reservation "leon_fp_alu" 4
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fp,fpcmp,fpmul"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fp,fpcmp,fpmul"))
"grfpu_alu, nothing*3")
(define_insn_reservation "leon_fp_divs" 16
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivs"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpdivs"))
"grfpu_ds*14, nothing*2")
(define_insn_reservation "leon_fp_divd" 17
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpdivd"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpdivd"))
"grfpu_ds*15, nothing*2")
(define_insn_reservation "leon_fp_sqrts" 24
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrts"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpsqrts"))
"grfpu_ds*22, nothing*2")
(define_insn_reservation "leon_fp_sqrtd" 25
- (and (eq_attr "cpu" "leon,leon3") (eq_attr "type" "fpsqrtd"))
+ (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpsqrtd"))
"grfpu_ds*23, nothing*2")
diff --git a/gcc-4.9/gcc/config/sparc/linux.h b/gcc-4.9/gcc/config/sparc/linux.h
index c54ba2cb5..c40bb0b78 100644
--- a/gcc-4.9/gcc/config/sparc/linux.h
+++ b/gcc-4.9/gcc/config/sparc/linux.h
@@ -147,12 +147,6 @@ do { \
/* Static stack checking is supported by means of probes. */
#define STACK_CHECK_STATIC_BUILTIN 1
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
- TMO, and TMO in multiprocessor mode. But they reserve the right to
- change their minds. */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
#undef NEED_INDICATE_EXEC_STACK
#define NEED_INDICATE_EXEC_STACK 1
diff --git a/gcc-4.9/gcc/config/sparc/linux64.h b/gcc-4.9/gcc/config/sparc/linux64.h
index f00fb42ff..12bb3780b 100644
--- a/gcc-4.9/gcc/config/sparc/linux64.h
+++ b/gcc-4.9/gcc/config/sparc/linux64.h
@@ -261,12 +261,6 @@ do { \
/* Static stack checking is supported by means of probes. */
#define STACK_CHECK_STATIC_BUILTIN 1
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
- TMO, and TMO in multiprocessor mode. But they reserve the right to
- change their minds. */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
#undef NEED_INDICATE_EXEC_STACK
#define NEED_INDICATE_EXEC_STACK 1
diff --git a/gcc-4.9/gcc/config/sparc/sparc-opts.h b/gcc-4.9/gcc/config/sparc/sparc-opts.h
index 13b375ae1..26017edc0 100644
--- a/gcc-4.9/gcc/config/sparc/sparc-opts.h
+++ b/gcc-4.9/gcc/config/sparc/sparc-opts.h
@@ -31,6 +31,7 @@ enum processor_type {
PROCESSOR_HYPERSPARC,
PROCESSOR_LEON,
PROCESSOR_LEON3,
+ PROCESSOR_LEON3V7,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
diff --git a/gcc-4.9/gcc/config/sparc/sparc.c b/gcc-4.9/gcc/config/sparc/sparc.c
index 5b00cca47..f7fc957b4 100644
--- a/gcc-4.9/gcc/config/sparc/sparc.c
+++ b/gcc-4.9/gcc/config/sparc/sparc.c
@@ -786,9 +786,6 @@ char sparc_hard_reg_printed[8];
#define TARGET_ATTRIBUTE_TABLE sparc_attribute_table
#endif
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING SPARC_RELAXED_ORDERING
-
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE sparc_option_override
@@ -1246,6 +1243,7 @@ sparc_option_override (void)
{ TARGET_CPU_hypersparc, PROCESSOR_HYPERSPARC },
{ TARGET_CPU_leon, PROCESSOR_LEON },
{ TARGET_CPU_leon3, PROCESSOR_LEON3 },
+ { TARGET_CPU_leon3v7, PROCESSOR_LEON3V7 },
{ TARGET_CPU_sparclite, PROCESSOR_F930 },
{ TARGET_CPU_sparclite86x, PROCESSOR_SPARCLITE86X },
{ TARGET_CPU_sparclet, PROCESSOR_TSC701 },
@@ -1274,6 +1272,7 @@ sparc_option_override (void)
{ "hypersparc", MASK_ISA, MASK_V8|MASK_FPU },
{ "leon", MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },
{ "leon3", MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },
+ { "leon3v7", MASK_ISA, MASK_LEON3|MASK_FPU },
{ "sparclite", MASK_ISA, MASK_SPARCLITE },
/* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */
{ "f930", MASK_ISA|MASK_FPU, MASK_SPARCLITE },
@@ -1526,6 +1525,7 @@ sparc_option_override (void)
sparc_costs = &leon_costs;
break;
case PROCESSOR_LEON3:
+ case PROCESSOR_LEON3V7:
sparc_costs = &leon3_costs;
break;
case PROCESSOR_SPARCLET:
@@ -6801,28 +6801,30 @@ function_arg_union_value (int size, enum machine_mode mode, int slotno,
}
/* Used by function_arg and sparc_function_value_1 to implement the conventions
- for passing and returning large (BLKmode) vectors.
+ for passing and returning BLKmode vectors.
Return an expression valid as a return value for the FUNCTION_ARG
and TARGET_FUNCTION_VALUE.
- SIZE is the size in bytes of the vector (at least 8 bytes).
+ SIZE is the size in bytes of the vector.
REGNO is the FP hard register the vector will be passed in. */
static rtx
function_arg_vector_value (int size, int regno)
{
- int i, nregs = size / 8;
- rtx regs;
-
- regs = gen_rtx_PARALLEL (BLKmode, rtvec_alloc (nregs));
+ const int nregs = MAX (1, size / 8);
+ rtx regs = gen_rtx_PARALLEL (BLKmode, rtvec_alloc (nregs));
- for (i = 0; i < nregs; i++)
- {
+ if (size < 8)
+ XVECEXP (regs, 0, 0)
+ = gen_rtx_EXPR_LIST (VOIDmode,
+ gen_rtx_REG (SImode, regno),
+ const0_rtx);
+ else
+ for (int i = 0; i < nregs; i++)
XVECEXP (regs, 0, i)
= gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (DImode, regno + 2*i),
GEN_INT (i*8));
- }
return regs;
}
@@ -6868,10 +6870,9 @@ sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode,
|| (TARGET_ARCH64 && size <= 16));
if (mode == BLKmode)
- return function_arg_vector_value (size,
- SPARC_FP_ARG_FIRST + 2*slotno);
- else
- mclass = MODE_FLOAT;
+ return function_arg_vector_value (size, SPARC_FP_ARG_FIRST + 2*slotno);
+
+ mclass = MODE_FLOAT;
}
if (TARGET_ARCH32)
@@ -7315,10 +7316,9 @@ sparc_function_value_1 (const_tree type, enum machine_mode mode,
|| (TARGET_ARCH64 && size <= 32));
if (mode == BLKmode)
- return function_arg_vector_value (size,
- SPARC_FP_ARG_FIRST);
- else
- mclass = MODE_FLOAT;
+ return function_arg_vector_value (size, SPARC_FP_ARG_FIRST);
+
+ mclass = MODE_FLOAT;
}
if (TARGET_ARCH64 && type)
diff --git a/gcc-4.9/gcc/config/sparc/sparc.h b/gcc-4.9/gcc/config/sparc/sparc.h
index dd2b5ad9c..87f1d82d6 100644
--- a/gcc-4.9/gcc/config/sparc/sparc.h
+++ b/gcc-4.9/gcc/config/sparc/sparc.h
@@ -106,17 +106,6 @@ extern enum cmodel sparc_cmodel;
#define SPARC_DEFAULT_CMODEL CM_32
-/* The SPARC-V9 architecture defines a relaxed memory ordering model (RMO)
- which requires the following macro to be true if enabled. Prior to V9,
- there are no instructions to even talk about memory synchronization.
- Note that the UltraSPARC III processors don't implement RMO, unlike the
- UltraSPARC II processors. Niagara, Niagara-2, and Niagara-3 do not
- implement RMO either.
-
- Default to false; for example, Solaris never enables RMO, only ever uses
- total memory ordering (TMO). */
-#define SPARC_RELAXED_ORDERING false
-
/* Do not use the .note.GNU-stack convention by default. */
#define NEED_INDICATE_EXEC_STACK 0
@@ -137,21 +126,22 @@ extern enum cmodel sparc_cmodel;
#define TARGET_CPU_hypersparc 3
#define TARGET_CPU_leon 4
#define TARGET_CPU_leon3 5
-#define TARGET_CPU_sparclite 6
-#define TARGET_CPU_f930 6 /* alias */
-#define TARGET_CPU_f934 6 /* alias */
-#define TARGET_CPU_sparclite86x 7
-#define TARGET_CPU_sparclet 8
-#define TARGET_CPU_tsc701 8 /* alias */
-#define TARGET_CPU_v9 9 /* generic v9 implementation */
-#define TARGET_CPU_sparcv9 9 /* alias */
-#define TARGET_CPU_sparc64 9 /* alias */
-#define TARGET_CPU_ultrasparc 10
-#define TARGET_CPU_ultrasparc3 11
-#define TARGET_CPU_niagara 12
-#define TARGET_CPU_niagara2 13
-#define TARGET_CPU_niagara3 14
-#define TARGET_CPU_niagara4 15
+#define TARGET_CPU_leon3v7 6
+#define TARGET_CPU_sparclite 7
+#define TARGET_CPU_f930 7 /* alias */
+#define TARGET_CPU_f934 7 /* alias */
+#define TARGET_CPU_sparclite86x 8
+#define TARGET_CPU_sparclet 9
+#define TARGET_CPU_tsc701 9 /* alias */
+#define TARGET_CPU_v9 10 /* generic v9 implementation */
+#define TARGET_CPU_sparcv9 10 /* alias */
+#define TARGET_CPU_sparc64 10 /* alias */
+#define TARGET_CPU_ultrasparc 11
+#define TARGET_CPU_ultrasparc3 12
+#define TARGET_CPU_niagara 13
+#define TARGET_CPU_niagara2 14
+#define TARGET_CPU_niagara3 15
+#define TARGET_CPU_niagara4 16
#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \
|| TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \
@@ -239,6 +229,11 @@ extern enum cmodel sparc_cmodel;
#define ASM_CPU32_DEFAULT_SPEC AS_LEON_FLAG
#endif
+#if TARGET_CPU_DEFAULT == TARGET_CPU_leon3v7
+#define CPP_CPU32_DEFAULT_SPEC "-D__leon__"
+#define ASM_CPU32_DEFAULT_SPEC AS_LEONV7_FLAG
+#endif
+
#endif
#if !defined(CPP_CPU32_DEFAULT_SPEC) || !defined(CPP_CPU64_DEFAULT_SPEC)
@@ -285,6 +280,7 @@ extern enum cmodel sparc_cmodel;
%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \
%{mcpu=leon:-D__leon__ -D__sparc_v8__} \
%{mcpu=leon3:-D__leon__ -D__sparc_v8__} \
+%{mcpu=leon3v7:-D__leon__} \
%{mcpu=v9:-D__sparc_v9__} \
%{mcpu=ultrasparc:-D__sparc_v9__} \
%{mcpu=ultrasparc3:-D__sparc_v9__} \
@@ -334,6 +330,7 @@ extern enum cmodel sparc_cmodel;
%{mcpu=hypersparc:-Av8} \
%{mcpu=leon:" AS_LEON_FLAG "} \
%{mcpu=leon3:" AS_LEON_FLAG "} \
+%{mcpu=leon3v7:" AS_LEONV7_FLAG "} \
%{mv8plus:-Av8plus} \
%{mcpu=v9:-Av9} \
%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \
@@ -1760,8 +1757,10 @@ extern int sparc_indent_opcode;
#ifdef HAVE_AS_LEON
#define AS_LEON_FLAG "-Aleon"
+#define AS_LEONV7_FLAG "-Aleon"
#else
#define AS_LEON_FLAG "-Av8"
+#define AS_LEONV7_FLAG "-Av7"
#endif
/* We use gcc _mcount for profiling. */
diff --git a/gcc-4.9/gcc/config/sparc/sparc.md b/gcc-4.9/gcc/config/sparc/sparc.md
index 76c331597..954c297fd 100644
--- a/gcc-4.9/gcc/config/sparc/sparc.md
+++ b/gcc-4.9/gcc/config/sparc/sparc.md
@@ -221,6 +221,7 @@
hypersparc,
leon,
leon3,
+ leon3v7,
sparclite,
f930,
f934,
diff --git a/gcc-4.9/gcc/config/sparc/sparc.opt b/gcc-4.9/gcc/config/sparc/sparc.opt
index 64e40955a..3cd2b603a 100644
--- a/gcc-4.9/gcc/config/sparc/sparc.opt
+++ b/gcc-4.9/gcc/config/sparc/sparc.opt
@@ -153,6 +153,9 @@ EnumValue
Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
EnumValue
+Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
+
+EnumValue
Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
EnumValue
diff --git a/gcc-4.9/gcc/config/sparc/t-rtems b/gcc-4.9/gcc/config/sparc/t-rtems
index 86a230261..ae7a33ab4 100644
--- a/gcc-4.9/gcc/config/sparc/t-rtems
+++ b/gcc-4.9/gcc/config/sparc/t-rtems
@@ -17,6 +17,15 @@
# <http://www.gnu.org/licenses/>.
#
-MULTILIB_OPTIONS = msoft-float mcpu=v8/mcpu=leon3
-MULTILIB_DIRNAMES = soft v8 leon3
+MULTILIB_OPTIONS = msoft-float mcpu=v8/mcpu=leon3/mcpu=leon3v7 muser-mode
+MULTILIB_DIRNAMES = soft v8 leon3 leon3v7 user-mode
MULTILIB_MATCHES = msoft-float=mno-fpu
+
+MULTILIB_EXCEPTIONS = muser-mode
+MULTILIB_EXCEPTIONS += mcpu=leon3
+MULTILIB_EXCEPTIONS += mcpu=leon3v7
+MULTILIB_EXCEPTIONS += msoft-float/mcpu=leon3
+MULTILIB_EXCEPTIONS += msoft-float/mcpu=leon3v7
+MULTILIB_EXCEPTIONS += msoft-float/muser-mode
+MULTILIB_EXCEPTIONS += msoft-float/mcpu=v8/muser-mode
+MULTILIB_EXCEPTIONS += mcpu=v8/muser-mode
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-28 10:43:51 +0000