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+; Options for the DEC Alpha port of the compiler
+;
+; Copyright (C) 2005-2014 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT
+; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+; License for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+; <http://www.gnu.org/licenses/>.
+
+msoft-float
+Target Report Mask(SOFT_FP)
+Do not use hardware fp
+
+mfp-regs
+Target Report Mask(FPREGS)
+Use fp registers
+
+mgas
+Target Ignore
+Does nothing. Preserved for backward compatibility.
+
+mieee-conformant
+Target RejectNegative Mask(IEEE_CONFORMANT)
+Request IEEE-conformant math library routines (OSF/1)
+
+mieee
+Target Report RejectNegative Mask(IEEE)
+Emit IEEE-conformant code, without inexact exceptions
+
+mieee-with-inexact
+Target Report RejectNegative Mask(IEEE_WITH_INEXACT)
+
+mbuild-constants
+Target Report Mask(BUILD_CONSTANTS)
+Do not emit complex integer constants to read-only memory
+
+mfloat-vax
+Target Report RejectNegative Mask(FLOAT_VAX)
+Use VAX fp
+
+mfloat-ieee
+Target Report RejectNegative InverseMask(FLOAT_VAX)
+Do not use VAX fp
+
+mbwx
+Target Report Mask(BWX)
+Emit code for the byte/word ISA extension
+
+mmax
+Target Report Mask(MAX)
+Emit code for the motion video ISA extension
+
+mfix
+Target Report Mask(FIX)
+Emit code for the fp move and sqrt ISA extension
+
+mcix
+Target Report Mask(CIX)
+Emit code for the counting ISA extension
+
+mexplicit-relocs
+Target Report Mask(EXPLICIT_RELOCS)
+Emit code using explicit relocation directives
+
+msmall-data
+Target Report RejectNegative Mask(SMALL_DATA)
+Emit 16-bit relocations to the small data areas
+
+mlarge-data
+Target Report RejectNegative InverseMask(SMALL_DATA)
+Emit 32-bit relocations to the small data areas
+
+msmall-text
+Target Report RejectNegative Mask(SMALL_TEXT)
+Emit direct branches to local functions
+
+mlarge-text
+Target Report RejectNegative InverseMask(SMALL_TEXT)
+Emit indirect branches to local functions
+
+mtls-kernel
+Target Report Mask(TLS_KERNEL)
+Emit rdval instead of rduniq for thread pointer
+
+mlong-double-128
+Target Report RejectNegative Mask(LONG_DOUBLE_128)
+Use 128-bit long double
+
+mlong-double-64
+Target Report RejectNegative InverseMask(LONG_DOUBLE_128)
+Use 64-bit long double
+
+mcpu=
+Target RejectNegative Joined Var(alpha_cpu_string)
+Use features of and schedule given CPU
+
+mtune=
+Target RejectNegative Joined Var(alpha_tune_string)
+Schedule given CPU
+
+mfp-rounding-mode=
+Target RejectNegative Joined Var(alpha_fprm_string)
+Control the generated fp rounding mode
+
+mfp-trap-mode=
+Target RejectNegative Joined Var(alpha_fptm_string)
+Control the IEEE trap mode
+
+mtrap-precision=
+Target RejectNegative Joined Var(alpha_tp_string)
+Control the precision given to fp exceptions
+
+mmemory-latency=
+Target RejectNegative Joined Var(alpha_mlat_string)
+Tune expected memory latency
+
+mtls-size=
+Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32)
+Specify bit size of immediate TLS offsets