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Diffstat (limited to 'gcc-4.9/gcc/ChangeLog')
| -rw-r--r-- | gcc-4.9/gcc/ChangeLog | 1075 |
1 files changed, 1072 insertions, 3 deletions
diff --git a/gcc-4.9/gcc/ChangeLog b/gcc-4.9/gcc/ChangeLog index 1ccda1cd6..dd6e9ad47 100644 --- a/gcc-4.9/gcc/ChangeLog +++ b/gcc-4.9/gcc/ChangeLog @@ -1,3 +1,1072 @@ +2014-07-11 Rong Xu <xur@google.com> + + Backport r212462 trunk. + + * gcov-tool.c (gcov_output_files): Fix build error introduced in + commit r212448. + +2014-07-10 Rong Xu <xur@google.com> + + Backport r212448 from trunk. + + Add gcov-tool: an offline gcda profile processing tool + Support. + * gcov-io.c (gcov_position): Make avaialble to gcov-tool. + (gcov_is_error): Ditto. + (gcov_read_string): Ditto. + (gcov_read_sync): Ditto. + * gcov-io.h: Move counter defines to gcov-counter.def. + * gcov-dump.c (tag_counters): Use gcov-counter.def. + * coverage.c: Ditto. + * gcov-tool.c: Offline gcda profile processing tool. + (unlink_gcda_file): Remove one gcda file. + (unlink_profile_dir): Remove gcda files from the profile path. + (gcov_output_files): Output gcda files to an output dir. + (profile_merge): Merge two profiles in directory. + (print_merge_usage_message): Print merge usage. + (merge_usage): Print merge usage and exit. + (do_merge): Driver for profile merge sub-command. + (profile_rewrite): Rewrite profile. + (print_rewrite_usage_message): Print rewrite usage. + (rewrite_usage): Print rewrite usage and exit. + (do_rewrite): Driver for profile rewrite sub-command. + (print_usage): Print gcov-info usage and exit. + (print_version): Print gcov-info version. + (process_args): Process arguments. + (main): Main routine for gcov-tool. + * Makefile.in: Build and install gcov-tool. + * gcov-counter.def: New file split from gcov-io.h. + * doc/gcc.texi: Include gcov-tool.texi. + * doc/gcov-tool.texi: Document for gcov-tool. + +2014-07-10 Cary Coutant <ccoutant@google.com> + + Backport from trunk at r212211. + + * dwarf2out.c (remove_addr_table_entry): Remove unnecessary hash table + lookup. + (resolve_addr_in_expr): When replacing the rtx in a location list + entry, get a new address table entry. + (dwarf2out_finish): Call index_location_lists even if there are no + addr_index_table entries yet. + +2014-07-10 Tom G. Christensen <tgc@jupiterrise.com> + + * doc/install.texi: Remove links to defunct package providers for + Solaris. + +2014-07-10 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/53590 + * function.c (allocate_struct_function): Revert r188667 change. + + * gimple-low.c (lower_builtin_setjmp): Use properly-typed constant. + +2014-07-09 Alan Lawrence <alan.lawrence@arm.com> + + Backport r211369 from trunk. + 2014-06-09 Alan Lawrence <alan.lawrence@arm.com> + + PR target/61062 + * config/arm/arm_neon.h (vtrn_s8, vtrn_s16, vtrn_u8, vtrn_u16, vtrn_p8, + vtrn_p16, vtrn_s32, vtrn_f32, vtrn_u32, vtrnq_s8, vtrnq_s16, vtrnq_s32, + vtrnq_f32, vtrnq_u8, vtrnq_u16, vtrnq_u32, vtrnq_p8, vtrnq_p16, vzip_s8, + vzip_s16, vzip_u8, vzip_u16, vzip_p8, vzip_p16, vzip_s32, vzip_f32, + vzip_u32, vzipq_s8, vzipq_s16, vzipq_s32, vzipq_f32, vzipq_u8, + vzipq_u16, vzipq_u32, vzipq_p8, vzipq_p16, vuzp_s8, vuzp_s16, vuzp_s32, + vuzp_f32, vuzp_u8, vuzp_u16, vuzp_u32, vuzp_p8, vuzp_p16, vuzpq_s8, + vuzpq_s16, vuzpq_s32, vuzpq_f32, vuzpq_u8, vuzpq_u16, vuzpq_u32, + vuzpq_p8, vuzpq_p16): Correct mask for bigendian. + + +2014-07-09 Alan Lawrence <alan.lawrence@arm.com> + + Backport r210219 from trunk. + 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm_neon.h: Update comment. + * config/arm/neon-docgen.ml: Delete. + * config/arm/neon-gen.ml: Delete. + * doc/arm-neon-intrinsics.texi: Update comment. + +2014-07-09 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + Backport r211775 from trunk. + 2014-06-18 Terry Guo <terry.guo@arm.com> + + PR target/61544 + * config/arm/arm.c (thumb1_reorg): Move to next basic block if we + reach the head. + +2014-07-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/61673 + * combine.c (simplify_comparison): Test just mode's sign bit + in tmode rather than the sign bit and any bits above it. + +2014-07-08 James Greenhalgh <james.greenhalgh@arm.com> + + Backport r212298 from trunk. + 2014-07-04 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): New. + (move_lo_quad_internal_be_<mode>): Likewise. + (move_lo_quad_<mode>): Convert to define_expand. + (aarch64_simd_move_hi_quad_<mode>): Gate on BYTES_BIG_ENDIAN. + (aarch64_simd_move_hi_quad_be_<mode>): New. + (move_hi_quad_<mode>): Use appropriate insn for BYTES_BIG_ENDIAN. + (aarch64_combinez<mode>): Gate on BYTES_BIG_ENDIAN. + (aarch64_combinez_be<mode>): New. + (aarch64_combine<mode>): Convert to define_expand. + (aarch64_combine_internal<mode>): New. + (aarch64_simd_combine<mode>): Remove bogus RTL description. + +2014-07-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/61680 + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): + Handle properly all read-write dependences with group accesses. + + PR tree-optimization/61681 + * tree-ssa-structalias.c (find_what_var_points_to): Expand + NONLOCAL inside ESCAPED. + +2014-07-08 Alan Lawrence <alan.lawrence@arm.com> + + Backport r211502 from mainline. + 2014-06-10 Alan Lawrence <alan.lawrence@arm.com> + + PR target/59843 + * config/aarch64/aarch64-modes.def: Add V1DFmode. + * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): + Support V1DFmode. + +2014-07-08 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/61725 + * tree-vrp.c (extract_range_basic): Don't assume vr0 is unsigned + range, use range_includes_zerop_p instead of integer_zerop on + vr0->min, only use log2 of max if min is not negative. + +2014-07-06 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/install.texi (Specific, aarch64*-*-*): Fix markup. Reword a bit. + +2014-07-04 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/61654 + * cgraphunit.c (expand_thunk): Call free_dominance_info. + + PR tree-optimization/61684 + * tree-ssa-ifcombine.c (recognize_single_bit_test): Make sure + rhs1 of conversion is a SSA_NAME before using SSA_NAME_DEF_STMT on it. + +2014-06-30 Jakub Jelinek <jakub@redhat.com> + + Backported from mainline + 2014-06-27 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57233 + PR tree-optimization/61299 + * tree-vect-generic.c (get_compute_type, count_type_subparts): New + functions. + (expand_vector_operations_1): Use them. If {L,R}ROTATE_EXPR + would be lowered to scalar shifts, check if corresponding + shifts and vector BIT_IOR_EXPR are supported and don't lower + or lower just to narrower vector type in that case. + * expmed.c (expand_shift_1): Fix up handling of vector + shifts and rotates. + + 2014-06-25 Jakub Jelinek <jakub@redhat.com> + + * langhooks-def.h (LANG_HOOKS_OMP_CLAUSE_LINEAR_CTOR): Define. + (LANG_HOOKS_DECLS): Add it. + * gimplify.c (gimplify_omp_for): Make sure OMP_CLAUSE_LINEAR_STEP + has correct type. + * tree.h (OMP_CLAUSE_LINEAR_ARRAY): Define. + * langhooks.h (struct lang_hooks_for_decls): Add + omp_clause_linear_ctor hook. + * omp-low.c (lower_rec_input_clauses): Set max_vf even if + OMP_CLAUSE_LINEAR_ARRAY is set. Don't fold_convert + OMP_CLAUSE_LINEAR_STEP. For OMP_CLAUSE_LINEAR_ARRAY in + combined simd loop use omp_clause_linear_ctor hook. + + 2014-06-24 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (gimplify_scan_omp_clauses) <case OMP_CLAUSE_MAP, + OMP_CLAUSE_TO, OMP_CLAUSE_FROM): Make sure OMP_CLAUSE_SIZE is + non-NULL. + <case OMP_CLAUSE_ALIGNED>: Gimplify OMP_CLAUSE_ALIGNED_ALIGNMENT. + (gimplify_adjust_omp_clauses_1): Make sure OMP_CLAUSE_SIZE is + non-NULL. + (gimplify_adjust_omp_clauses): Likewise. + * omp-low.c (lower_rec_simd_input_clauses, + lower_rec_input_clauses, expand_omp_simd): Handle non-constant + safelen the same as safelen(1). + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Handle OMP_CLAUSE_ALIGNED. For + OMP_CLAUSE_{MAP,TO,FROM} if not decl use walk_tree. + (convert_nonlocal_reference_stmt, convert_local_reference_stmt): + Fixup handling of GIMPLE_OMP_TARGET. + (convert_tramp_reference_stmt, convert_gimple_call): Handle + GIMPLE_OMP_TARGET. + + 2014-06-18 Jakub Jelinek <jakub@redhat.com> + + * gimplify.c (omp_notice_variable): If n is non-NULL + and no flags change in ORT_TARGET region, don't jump to + do_outer. + (struct gimplify_adjust_omp_clauses_data): New type. + (gimplify_adjust_omp_clauses_1): Adjust for data being + a struct gimplify_adjust_omp_clauses_data pointer instead + of tree *. Pass pre_p as a new argument to + lang_hooks.decls.omp_finish_clause hook. + (gimplify_adjust_omp_clauses): Add pre_p argument, adjust + splay_tree_foreach to pass both list_p and pre_p. + (gimplify_omp_parallel, gimplify_omp_task, gimplify_omp_for, + gimplify_omp_workshare, gimplify_omp_target_update): Adjust + gimplify_adjust_omp_clauses callers. + * langhooks.c (lhd_omp_finish_clause): New function. + * langhooks-def.h (lhd_omp_finish_clause): New prototype. + (LANG_HOOKS_OMP_FINISH_CLAUSE): Define to lhd_omp_finish_clause. + * langhooks.h (struct lang_hooks_for_decls): Add a new + gimple_seq * argument to omp_finish_clause hook. + * omp-low.c (scan_sharing_clauses): Call scan_omp_op on + non-DECL_P OMP_CLAUSE_DECL if ctx->outer. + (scan_omp_parallel, lower_omp_for): When adding + _LOOPTEMP_ clause var, add it to outer ctx's decl_map + as identity. + * tree-core.h (OMP_CLAUSE_MAP_TO_PSET): New map kind. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Handle various OpenMP 4.0 clauses. + * tree-pretty-print.c (dump_omp_clause): Handle + OMP_CLAUSE_MAP_TO_PSET. + + 2014-06-10 Jakub Jelinek <jakub@redhat.com> + + PR fortran/60928 + * omp-low.c (lower_rec_input_clauses) <case OMP_CLAUSE_LASTPRIVATE>: + Set lastprivate_firstprivate even if omp_private_outer_ref + langhook returns true. + <case OMP_CLAUSE_REDUCTION>: When calling omp_clause_default_ctor + langhook, call unshare_expr on new_var and call + build_outer_var_ref to get the last argument. + + 2014-05-11 Jakub Jelinek <jakub@redhat.com> + + * tree.h (OMP_CLAUSE_LINEAR_STMT): Define. + * tree.c (omp_clause_num_ops): Increase OMP_CLAUSE_LINEAR + number of operands to 3. + (walk_tree_1): Walk all operands of OMP_CLAUSE_LINEAR. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Handle OMP_CLAUSE_DEPEND. + * gimplify.c (gimplify_scan_omp_clauses): Handle + OMP_CLAUSE_LINEAR_STMT. + * omp-low.c (lower_rec_input_clauses): Fix typo. + (maybe_add_implicit_barrier_cancel, lower_omp_1): Add + cast between Fortran boolean_type_node and C _Bool if + needed. + +2014-06-30 Jason Merrill <jason@redhat.com> + + PR c++/51253 + PR c++/61382 + * gimplify.c (gimplify_arg): Non-static. + * gimplify.h: Declare it. + +2014-06-30 Marcus Shawcroft <marcus.shawcroft@arm.com> + + Backport from Mainline + 2014-06-30 Marcus Shawcroft <marcus.shawcroft@arm.com> + + PR target/61633 + * config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3): + Add alternative; make early clobber. Adjust both split patterns + to use operand 0 as the working register. + +2014-06-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/iterators.md (VCOND): Handle SI and HI modes. + Update comments. + (VCONQ): Make comment more helpful. + (VCON): Delete. + * config/aarch64/aarch64-simd.md + (aarch64_sqdmulh_lane<mode>): + Use VCOND for operands 2. Update lane checking and flipping logic. + (aarch64_sqrdmulh_lane<mode>): Likewise. + (aarch64_sq<r>dmulh_lane<mode>_internal): Likewise. + (aarch64_sqdmull2<mode>): Remove VCON, use VQ_HSI mode iterator. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, VD_HSI): Change mode + attribute of operand 3 to VCOND. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, SD_HSI): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise. + (aarch64_sqdmull_lane<mode>_internal, VD_HSI): Likewise. + (aarch64_sqdmull_lane<mode>_internal, SD_HSI): Likewise. + (aarch64_sqdmull2_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, VD_HSI: New + define_insn. + (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, SD_HSI): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>_internal): Likewise. + (aarch64_sqdmull_laneq<mode>_internal, VD_HSI): Likewise. + (aarch64_sqdmull_laneq<mode>_internal, SD_HSI): Likewise. + (aarch64_sqdmull2_laneq<mode>_internal): Likewise. + (aarch64_sqdmlal_lane<mode>): Change mode attribute of penultimate + operand to VCOND. Update lane flipping and bounds checking logic. + (aarch64_sqdmlal2_lane<mode>): Likewise. + (aarch64_sqdmlsl_lane<mode>): Likewise. + (aarch64_sqdmull_lane<mode>): Likewise. + (aarch64_sqdmull2_lane<mode>): Likewise. + (aarch64_sqdmlal_laneq<mode>): + Replace VCON usage with VCONQ. + Emit aarch64_sqdmlal_laneq<mode>_internal insn. + (aarch64_sqdmlal2_laneq<mode>): Emit + aarch64_sqdmlal2_laneq<mode>_internal insn. + Replace VCON with VCONQ. + (aarch64_sqdmlsl2_lane<mode>): Replace VCON with VCONQ. + (aarch64_sqdmlsl2_laneq<mode>): Likewise. + (aarch64_sqdmull_laneq<mode>): Emit + aarch64_sqdmull_laneq<mode>_internal insn. + Replace VCON with VCONQ. + (aarch64_sqdmull2_laneq<mode>): Emit + aarch64_sqdmull2_laneq<mode>_internal insn. + (aarch64_sqdmlsl_laneq<mode>): Replace VCON usage with VCONQ. + * config/aarch64/arm_neon.h (vqdmlal_high_lane_s16): Change type + of 3rd argument to int16x4_t. + (vqdmlalh_lane_s16): Likewise. + (vqdmlslh_lane_s16): Likewise. + (vqdmull_high_lane_s16): Likewise. + (vqdmullh_lane_s16): Change type of 2nd argument to int16x4_t. + (vqdmlal_lane_s16): Don't create temporary int16x8_t value. + (vqdmlsl_lane_s16): Likewise. + (vqdmull_lane_s16): Don't create temporary int16x8_t value. + (vqdmlal_high_lane_s32): Change type 3rd argument to int32x2_t. + (vqdmlals_lane_s32): Likewise. + (vqdmlsls_lane_s32): Likewise. + (vqdmull_high_lane_s32): Change type 2nd argument to int32x2_t. + (vqdmulls_lane_s32): Likewise. + (vqdmlal_lane_s32): Don't create temporary int32x4_t value. + (vqdmlsl_lane_s32): Likewise. + (vqdmull_lane_s32): Don't create temporary int32x4_t value. + (vqdmulhh_lane_s16): Change type of second argument to int16x4_t. + (vqrdmulhh_lane_s16): Likewise. + (vqdmlsl_high_lane_s16): Likewise. + (vqdmulhs_lane_s32): Change type of second argument to int32x2_t. + (vqdmlsl_high_lane_s32): Likewise. + (vqrdmulhs_lane_s32): Likewise. + +2014-06-30 Thomas Preud'homme <thomas.preudhomme@arm.com> + + Backport from Mainline + 2014-06-20 Jakub Jelinek <jakub@redhat.com> + 2014-06-11 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR tree-optimization/61306 + * tree-ssa-math-opts.c (struct symbolic_number): Store type of + expression instead of its size. + (do_shift_rotate): Adapt to change in struct symbolic_number. Return + false to prevent optimization when the result is unpredictable due to + arithmetic right shift of signed type with highest byte is set. + (verify_symbolic_number_p): Adapt to change in struct symbolic_number. + (find_bswap_1): Likewise. Return NULL to prevent optimization when the + result is unpredictable due to sign extension. + (find_bswap): Adapt to change in struct symbolic_number. + +2014-06-27 Martin Jambor <mjambor@suse.cz> + + PR ipa/61160 + * cgraphclones.c (duplicate_thunk_for_node): Removed parameter + args_to_skip, use those from node instead. Copy args_to_skip and + combined_args_to_skip from node to the new thunk. + (redirect_edge_duplicating_thunks): Removed parameter args_to_skip. + (cgraph_create_virtual_clone): Moved computation of + combined_args_to_skip... + (cgraph_clone_node): ...here, simplify it to bitmap_ior.. + +2014-06-27 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-06-26 Uros Bizjak <ubizjak@gmail.com> + + PR target/61586 + * config/alpha/alpha.c (alpha_handle_trap_shadows): Handle BARRIER RTX. + +2014-06-26 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/61542 + * config/rs6000/vsx.md (vsx_extract_v4sf): Fix bug with element + extraction other than index 3. + +2014-06-26 Marc Glisse <marc.glisse@inria.fr> + + PR target/61503 + * config/i386/i386.md (x86_64_shrd, x86_shrd, + ix86_rotr<dwi>3_doubleword): Replace ashiftrt with lshiftrt. + +2014-06-26 Martin Jambor <mjambor@suse.cz> + + Backport from mainline + * ipa-prop.c (ipa_impossible_devirt_target): No longer static, + renamed to ipa_impossible_devirt_target. Fix typo. + * ipa-prop.h (ipa_impossible_devirt_target): Declare. + * ipa-cp.c (ipa_get_indirect_edge_target_1): Use + ipa_impossible_devirt_target. + +2014-06-25 Cong Hou <congh@google.com> + + * tree-vectorizer.h: Fixing incorrect number of patterns. + +2014-06-24 Cong Hou <congh@google.com> + + * tree-vect-patterns.c (vect_recog_sad_pattern): New function for SAD + pattern recognition. + (type_conversion_p): PROMOTION is true if it's a type promotion + conversion, and false otherwise. Return true if the given expression + is a type conversion one. + * tree-vectorizer.h: Adjust the number of patterns. + * tree.def: Add SAD_EXPR. + * optabs.def: Add sad_optab. + * cfgexpand.c (expand_debug_expr): Add SAD_EXPR case. + * expr.c (expand_expr_real_2): Likewise. + * gimple-pretty-print.c (dump_ternary_rhs): Likewise. + * gimple.c (get_gimple_rhs_num_ops): Likewise. + * optabs.c (optab_for_tree_code): Likewise. + * tree-cfg.c (estimate_operator_cost): Likewise. + * tree-ssa-operands.c (get_expr_operands): Likewise. + * tree-vect-loop.c (get_initial_def_for_reduction): Likewise. + * config/i386/sse.md: Add SSE2 and AVX2 expand for SAD. + * doc/generic.texi: Add document for SAD_EXPR. + * doc/md.texi: Add document for ssad and usad. + +2014-06-24 Jakub Jelinek <jakub@redhat.com> + + PR target/61570 + * config/i386/driver-i386.c (host_detect_local_cpu): For unknown + model family 6 CPU with has_longmode never use a CPU without + 64-bit support. + + * gimplify.c (gimplify_omp_for): For #pragma omp for simd iterator + not mentioned in clauses use private clause if the iterator is + declared in #pragma omp for simd, and when adding lastprivate + instead, add it to the outer #pragma omp for too. Diagnose + if the variable is private in outer context. For simd collapse > 1 + loops, replace all iterators with temporaries. + * omp-low.c (lower_rec_input_clauses): Handle LINEAR clause the + same even in collapse > 1 loops. + +2014-06-23 Alan Modra <amodra@gmail.com> + + PR bootstrap/61583 + * tree-vrp.c (remove_range_assertions): Do not set is_unreachable + to zero on debug statements. + +2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane<mode>): + New expander. + (aarch64_sqrdmulh_lane<mode>): Likewise. + (aarch64_sq<r>dmulh_lane<mode>): Rename to... + (aarch64_sq<r>dmulh_lane<mode>_interna): ...this. + (aarch64_sqdmulh_laneq<mode>): New expander. + (aarch64_sqrdmulh_laneq<mode>): Likewise. + (aarch64_sq<r>dmulh_laneq<mode>): Rename to... + (aarch64_sq<r>dmulh_laneq<mode>_internal): ...this. + (aarch64_sqdmulh_lane<mode>): New expander. + (aarch64_sqrdmulh_lane<mode>): Likewise. + (aarch64_sq<r>dmulh_lane<mode>): Rename to... + (aarch64_sq<r>dmulh_lane<mode>_internal): ...this. + (aarch64_sqdmlal_lane<mode>): Add lane flip for big-endian. + (aarch64_sqdmlal_laneq<mode>): Likewise. + (aarch64_sqdmlsl_lane<mode>): Likewise. + (aarch64_sqdmlsl_laneq<mode>): Likewise. + (aarch64_sqdmlal2_lane<mode>): Likewise. + (aarch64_sqdmlal2_laneq<mode>): Likewise. + (aarch64_sqdmlsl2_lane<mode>): Likewise. + (aarch64_sqdmlsl2_laneq<mode>): Likewise. + (aarch64_sqdmull_lane<mode>): Likewise. + (aarch64_sqdmull_laneq<mode>): Likewise. + (aarch64_sqdmull2_lane<mode>): Likewise. + (aarch64_sqdmull2_laneq<mode>): Likewise. + +2014-06-20 Martin Jambor <mjambor@suse.cz> + + PR ipa/61540 + * ipa-prop.c (impossible_devirt_target): New function. + (try_make_edge_direct_virtual_call): Use it, also instead of + asserting. + +2014-06-20 Martin Jambor <mjambor@suse.cz> + + PR ipa/61211 + * cgraph.c (clone_of_p): Allow skipped_branch to deal with + expanded clones. + +2014-06-20 Chung-Lin Tang <cltang@codesourcery.com> + + Backport from mainline + + 2014-06-20 Julian Brown <julian@codesourcery.com> + Chung-Lin Tang <cltang@codesourcery.com> + + * config/arm/arm.c (arm_output_mi_thunk): Fix offset for + TARGET_THUMB1_ONLY. Add comments. + +2014-06-18 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-06-16 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (decide_alg): Correctly handle + maximum size of stringop algorithm. + +2014-06-18 Richard Henderson <rth@redhat.com> + + PR target/61545 + * config/aarch64/aarch64.md (tlsdesc_small): Clobber CC_REGNUM. + +2014-06-17 Yufeng Zhang <yufeng.zhang@arm.com> + + PR target/61483 + * config/aarch64/aarch64.c (aarch64_layout_arg): Add new local + variable 'size'; calculate 'size' right in the front; use + 'size' to compute 'nregs' (when 'allocate_ncrn != 0') and + pcum->aapcs_stack_words. + +2014-06-17 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.md (mulhisi3): Add a NOP after the DINT. + (umulhi3, mulsidi3, umulsidi3): Likewise. + +2014-06-17 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-06-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/61423 + * config/i386/i386.md (*floatunssi<mode>2_i387_with_xmm): New + define_insn_and_split pattern, merged from *floatunssi<mode>2_1 + and corresponding splitters. Zero extend general register + or memory input operand to XMM temporary. Enable for + TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only. + (floatunssi<mode>2): Update expander predicate. + +2014-06-16 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/61325 + * lra-constraints.c (valid_address_p): Add forward declaration. + (simplify_operand_subreg): Check address validity before and after + alter_reg of memory subreg. + +2014-06-18 Jakub Jelinek <jakub@redhat.com> + + PR plugins/45078 + * config.gcc (arm*-*-linux-*): Include vxworks-dummy.h in tm_file. + +2014-06-13 Peter Bergner <bergner@vnet.ibm.com> + + Backport from mainline + + 2014-06-13 Peter Bergner <bergner@vnet.ibm.com> + PR target/61415 + * config/rs6000/rs6000-builtin.def (BU_MISC_1): Delete. + (BU_MISC_2): Rename to ... + (BU_LDBL128_2): ... this. + * config/rs6000/rs6000.h (RS6000_BTM_LDBL128): New define. + (RS6000_BTM_COMMON): Add RS6000_BTM_LDBL128. + * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle + RS6000_BTM_LDBL128. + (rs6000_invalid_builtin): Add long double 128-bit builtin support. + (rs6000_builtin_mask_names): Add RS6000_BTM_LDBL128. + * config/rs6000/rs6000.md (unpacktf_0): Remove define)expand. + (unpacktf_1): Likewise. + * doc/extend.texi (__builtin_longdouble_dw0): Remove documentation. + (__builtin_longdouble_dw1): Likewise. + * doc/sourcebuild.texi (longdouble128): Document. + +2014-06-13 Jeff Law <law@redhat.com> + + Backports from mainline: + 2014-06-13 Jeff Law <law@redhat.com> + + PR rtl-optimization/61094 + PR rtl-optimization/61446 + * ree.c (combine_reaching_defs): Get the mode for the copy from + the extension insn rather than the defining insn. + + 2014-06-02 Jeff Law <law@redhat.com> + + PR rtl-optimization/61094 + * ree.c (combine_reaching_defs): Do not reextend an insn if it + was marked as do_no_reextend. If a copy is needed to eliminate + an extension, then mark it as do_not_reextend. + +2014-06-13 Martin Jambor <mjambor@suse.cz> + + PR ipa/61186 + * ipa-devirt.c (possible_polymorphic_call_targets): Store NULL to + cache_token if returning early. + +2014-06-12 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/61486 + * gimplify.c (struct gimplify_omp_ctx): Add distribute field. + (gimplify_adjust_omp_clauses): Don't or in GOVD_LASTPRIVATE + if outer combined construct is distribute. + (gimplify_omp_for): For OMP_DISTRIBUTE set + gimplify_omp_ctxp->distribute. + * omp-low.c (scan_sharing_clauses) <case OMP_CLAUSE_SHARED>: For + GIMPLE_OMP_TEAMS, if decl isn't global in outer context, record + mapping into decl map. + +2014-06-12 Jeff Law <law@redhat.com> + + Backports from mainline: + + 2014-06-12 Jeff Law <law@redhat.com> + + PR tree-optimization/61009 + * tree-ssa-threadedge.c (thread_through_normal_block): Correct return + value when we stop processing a block due to problematic PHIs. + + 2014-06-05 Jeff Law <law@redhat.com> + + PR tree-optimization/61289 + * tree-ssa-threadedge.c (invalidate_equivalences): Remove SRC_MAP and + DST_MAP parameters. Invalidate by walking all the SSA_NAME_VALUES + looking for those which match LHS. All callers changed. + (record_temporary_equivalences_from_phis): Remove SRC_MAP and DST_MAP + parameters and code which manipulated them. All callers changed. + (record_temporary_equivalences_from_stmts_at_dest): Remove SRC_MAP + and DST_MAP parameters. Simplify invalidation code by just calling + invalidate_equivalences. All callers changed. + (thread_across_edge): Simplify now that we don't need to maintain + the map of equivalences to invalidate. + +2014-06-12 Eric Botcazou <ebotcazou@adacore.com> + + * tree-core.h (DECL_NONALIASED): Use proper spelling in comment. + +2014-06-12 Georg-Johann Lay <avr@gjlay.de> + + Backport from 2014-05-14 trunk r210418 + * config/avr/avr.h (REG_CLASS_CONTENTS): Use unsigned suffix for + shifted values to avoid build warning. + +2014-06-12 Georg-Johann Lay <avr@gjlay.de> + + Backport from 2014-05-09 trunk r210272 + + * config/avr/avr-fixed.md (round<mode>3): Use -1U instead of -1 in + unsigned int initializers for regno_in, regno_out. + + Backport from 2014-06-12 trunk r211491 + + PR target/61443 + * config/avr/avr.md (push<mode>1): Avoid (subreg(mem)) when + loading from address spaces. + +2014-06-12 Alan Modra <amodra@gmail.com> + + PR target/61300 + * doc/tm.texi.in (INCOMING_REG_PARM_STACK_SPACE): Document. + * doc/tm.texi: Regenerate. + * function.c (INCOMING_REG_PARM_STACK_SPACE): Provide default. + Use throughout in place of REG_PARM_STACK_SPACE. + * config/rs6000/rs6000.c (rs6000_reg_parm_stack_space): Add + "incoming" param. Pass to rs6000_function_parms_need_stack. + (rs6000_function_parms_need_stack): Add "incoming" param, ignore + prototype_p when incoming. Use function decl when incoming + to handle K&R style functions. + * config/rs6000/rs6000.h (REG_PARM_STACK_SPACE): Adjust. + (INCOMING_REG_PARM_STACK_SPACE): Define. + +2014-06-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/61452 + * tree-ssa-sccvn.c (visit_phi): Remove pointless setting of + expr and has_constants in case we found a leader. + (simplify_binary_expression): Always valueize operands first. + (simplify_unary_expression): Likewise. + +2014-06-11 Richard Biener <rguenther@suse.de> + + PR middle-end/61456 + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): + Do not use the main variant for the type comparison. + +2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are + available. + Simplify description of __crc32d and __crc32cd intrinsics. + * doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32 + availability. + +2014-06-07 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-tail-merge.c (same_succ_hash): Hash the static chain of a + call statement, if any. + (gimple_equal_p) <GIMPLE_CALL>: Compare the static chain of the call + statements, if any. Tidy up. + +2014-06-06 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from trunk + 2014-06-06 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/61431 + * config/rs6000/vsx.md (VSX_LE): Split VSX_D into 2 separate + iterators, VSX_D that handles 64-bit types, and VSX_LE that + handles swapping the two 64-bit double words on little endian + systems. Include V1TImode and optionally TImode in VSX_LE so that + these types are properly swapped. Change all of the insns and + splits that do the 64-bit swaps to use VSX_LE. + (vsx_le_perm_load_<mode>): Likewise. + (vsx_le_perm_store_<mode>): Likewise. + (splitters for little endian memory operations): Likewise. + (vsx_xxpermdi2_le_<mode>): Likewise. + (vsx_lxvd2x2_le_<mode>): Likewise. + (vsx_stxvd2x2_le_<mode>): Likewise. + +2014-06-06 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/61325 + * lra-constraints.c (process_address_1): Check scale equal to one + to prevent transformation: base + scale * index => base + new_reg. + +2014-06-05 Martin Jambor <mjambor@suse.cz> + + PR ipa/61393 + * ipa-cp.c (determine_versionability): Pretend that tm_clones are + not versionable. + +2014-06-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/61383 + * tree-ssa-ifcombine.c (bb_no_side_effects_p): Make sure + stmts can't trap. + +2014-06-02 Jason Merrill <jason@redhat.com> + + PR c++/61020 + * varpool.c (ctor_for_folding): Handle uninitialized vtables. + +2014-06-03 Martin Jambor <mjambor@suse.cz> + + PR ipa/61160 + * ipa-cp.c (cgraph_edge_brings_value_p): Handle edges leading to + thunks. + +2014-06-03 Andrey Belevantsev <abel@ispras.ru> + + Backport from mainline + 2014-05-14 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/60866 + * sel-sched-ir (sel_init_new_insn): New parameter old_seqno. + Default it to -1. Pass it down to init_simplejump_data. + (init_simplejump_data): New parameter old_seqno. Pass it down + to get_seqno_for_a_jump. + (get_seqno_for_a_jump): New parameter old_seqno. Use it for + initializing new jump seqno as a last resort. Add comment. + (sel_redirect_edge_and_branch): Save old seqno of the conditional + jump and pass it down to sel_init_new_insn. + (sel_redirect_edge_and_branch_force): Likewise. + +2014-06-03 Andrey Belevantsev <abel@ispras.ru> + + Backport from mainline + 2014-05-14 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/60901 + * config/i386/i386.c (ix86_dependencies_evaluation_hook): Check that + bb predecessor belongs to the same scheduling region. Adjust comment. + +2014-06-03 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-06-02 Uros Bizjak <ubizjak@gmail.com> + + PR target/61239 + * config/i386/i386.c (ix86_expand_vec_perm) [case V32QImode]: Use + GEN_INT (-128) instead of GEN_INT (128) to set MSB of QImode constant. + +2014-05-29 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/61325 + * lra-constraints.c (process_address): Rename to + process_address_1. + (process_address): New function. + +2014-05-29 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-05-26 Uros Bizjak <ubizjak@gmail.com> + + PR target/61271 + * config/i386/i386.c (ix86_rtx_costs) + <case CONST_INT, case CONST, case LABEL_REF, case SYMBOL_REF>: + Fix condition. + +2014-05-28 Eric Botcazou <ebotcazou@adacore.com> + + Backport from mainline + 2014-05-27 Eric Botcazou <ebotcazou@adacore.com> + + * double-int.c (div_and_round_double) <ROUND_DIV_EXPR>: Use the proper + predicate to detect a negative quotient. + +2014-05-28 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-05-28 Richard Biener <rguenther@suse.de> + + PR middle-end/61045 + * fold-const.c (fold_comparison): When folding + X +- C1 CMP Y +- C2 to X CMP Y +- C2 +- C1 also ensure + the sign of the remaining constant operand stays the same. + + 2014-05-05 Richard Biener <rguenther@suse.de> + + PR middle-end/61010 + * fold-const.c (fold_binary_loc): Consistently avoid + canonicalizing X & CST away from a CST that is the mask + of a mode. + + 2014-04-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60979 + * graphite-scop-detection.c (scopdet_basic_block_info): Reject + SCOPs that end in a block with a successor with abnormal + predecessors. + +2014-05-28 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac ($gcc_cv_ld_clearcap): New test. + * configure: Regenerate. + * config.in: Regenerate. + * config/sol2.opt (mclear-hwcap): New option. + * config/sol2.h (LINK_CLEARCAP_SPEC): Define. + * config/sol2-clearcap.map: Moved here from + testsuite/gcc.target/i386/clearcap.map. + * config/sol2-clearcapv2.map: Move here from + gcc.target/i386/clearcapv2.map. + * config/t-sol2 (install): Depend on install-clearcap-map. + (install-clearcap-map): New target. + * doc/invoke.texi (Option Summary, Solaris 2 Options): Document + -mclear-hwcap. + +2014-05-28 Georg-Johann Lay <avr@gjlay.de> + + PR libgcc/61152 + * config/dbx.h (License): Add Runtime Library Exception. + * config/newlib-stdint.h (License): Same. + * config/rtems.h (License): Same + * config/initfini-array.h (License): Same + * config/v850/v850.h (License): Same. + * config/v850/v850-opts.h (License): Same + * config/v850/rtems.h (License): Same. + +2014-05-28 Georg-Johann Lay <avr@gjlay.de> + + PR target/61044 + * doc/extend.texi (Local Labels): Note that label differences are + not supported for AVR. + +2014-05-27 Georg-Johann Lay <avr@gjlay.de> + + Backport from 2014-05-12 mainline r210322. + Backport from 2014-05-27 mainline r210959, r210969. + + PR libgcc/61152 + * config/arm/arm.h (License): Add GCC Runtime Library Exception. + * config/arm/arm-cores.def (License): Same. + * config/arm/arm-opts.h (License): Same. + * config/arm/aout.h (License): Same. + * config/arm/bpabi.h (License): Same. + * config/arm/elf.h (License): Same. + * config/arm/linux-elf.h (License): Same. + * config/arm/linux-gas.h (License): Same. + * config/arm/netbsd-elf.h (License): Same. + * config/arm/uclinux-eabi.h (License): Same. + * config/arm/uclinux-elf.h (License): Same. + * config/arm/vxworks.h (License): Same. + +2014-05-26 Michael Tautschnig <mt@debian.org> + + PR target/61249 + * doc/extend.texi (X86 Built-in Functions): Fix parameter lists of + __builtin_ia32_vfrczs[sd] and __builtin_ia32_mpsadbw256. + +2014-05-22 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/61215 + * lra-elelimination.c (lra_eliminate_regs_1): Don't use + simplify_gen_subreg until final substitution. + +2014-05-23 Alan Modra <amodra@gmail.com> + + PR target/61231 + * config/rs6000/rs6000.c (mem_operand_gpr): Handle SImode. + * config/rs6000/rs6000.md (extendsidi2_lfiwax, extendsidi2_nocell): + Use "Y" constraint rather than "m". + +2014-05-22 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/60969 + * ira-costs.c (record_reg_classes): Process NO_REGS for matching + constraints. Set up mem cost for NO_REGS case. + +2014-05-22 Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/htm.md (ttest): Use correct shift value to get CR0. + +2014-05-22 Richard Earnshaw <rearnsha@arm.com> + + PR target/61208 + * arm.md (arm_cmpdi_unsigned): Fix length calculation for Thumb2. + +2014-05-22 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.h (ASM_SPEC): Add spaces after inserted options. + +2014-05-22 Jakub Jelinek <jakub@redhat.com> + + * tree-streamer-in.c (unpack_ts_real_cst_value_fields): Make sure + all padding bits in REAL_VALUE_TYPE are cleared. + +2014-05-21 Guozhi Wei <carrot@google.com> + + PR target/61202 + * config/aarch64/arm_neon.h (vqdmulh_n_s16): Change the last operand's + constraint. + (vqdmulhq_n_s16): Likewise. + +2014-05-21 Martin Jambor <mjambor@suse.cz> + + * doc/invoke.texi (Optimize Options): Document parameters + ipa-cp-eval-threshold, ipa-max-agg-items, ipa-cp-loop-hint-bonus and + ipa-cp-array-index-hint-bonus. + +2014-05-21 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/61252 + * omp-low.c (handle_simd_reference): New function. + (lower_rec_input_clauses): Use it. Defer adding reference + initialization even for reduction without placeholder if in simd, + handle it properly later on. + +2014-05-20 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/60984 + * ipa-inline-transform.c (inline_call): Use add CALLEE_REMOVED + parameter. + * ipa-inline.c (inline_to_all_callers): If callee was removed; return. + (ipa_inline): Loop inline_to_all_callers until no more aliases + are removed. + +2014-05-20 Jan Hubicka <hubicka@ucw.cz> + + PR lto/60820 + * varpool.c (varpool_remove_node): Do not alter decls when streaming. + +2014-05-20 DJ Delorie <dj@redhat.com> + + * config/msp430/msp430.md (split): Don't allow subregs when + splitting SImode adds. + (andneghi): Fix subtraction logic. + * config/msp430/predicates.md (msp430_nonsubreg_or_imm_operand): New. + +2014-05-20 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.c (TARGET_GIMPLIFY_VA_ARG_EXPR): Define. + (msp430_gimplify_va_arg_expr): New function. + (msp430_print_operand): Handle (CONST (ZERO_EXTRACT)). + + * config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on + operand 0 in order to prevent confusion about the number of + registers involved. + +2014-05-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arith_shiftsi): Do not predicate for + arm_restrict_it. + +2014-05-19 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (thumb1_reorg): When scanning backwards skip anything + that's not a proper insn. + +2014-05-17 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (symtab_remove_unreachable_nodes): Remove + symbol from comdat group if its body was eliminated. + (comdat_can_be_unshared_p_1): Static symbols can always be privatized. + * symtab.c (symtab_remove_from_same_comdat_group): Break out from ... + (symtab_unregister_node): ... this one. + (verify_symtab_base): More strict checking of comdats. + * cgraph.h (symtab_remove_from_same_comdat_group): Declare. + +2014-05-17 Jan Hubicka <hubicka@ucw.cz> + + * opts.c (common_handle_option): Disable -fipa-reference coorectly + with -fuse-profile. + +2014-05-17 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/60854 + * ipa.c (symtab_remove_unreachable_nodes): Mark targets of + external aliases alive, too. + +2014-05-17 Uros Bizjak <ubizjak@gmail.com> + + * doc/invoke.texi (free): Mention Alpha. Also enabled at -Os. + +2014-05-17 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-04-25 H.J. Lu <hongjiu.lu@intel.com> + + PR target/60969 + * config/i386/i386.md (*movsf_internal): Set MODE to SI for + alternative 12. + +2014-05-16 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/60969 + * ira-costs.c (record_reg_classes): Allow only memory for pseudo. + Calculate costs for this case. + +2014-05-15 Peter Bergner <bergner@vnet.ibm.com> + + PR target/61193 + * config/rs6000/htmxlintrin.h (_HTM_TBEGIN_STARTED): New define. + (__TM_simple_begin): Use it. + (__TM_begin): Likewise. + +2014-05-15 Martin Jambor <mjambor@suse.cz> + + PR ipa/61085 + * ipa-prop.c (update_indirect_edges_after_inlining): Check + type_preserved flag when the indirect edge is polymorphic. + +2014-05-15 Martin Jambor <mjambor@suse.cz> + + PR ipa/60897 + * ipa-prop.c (ipa_modify_formal_parameters): Reset DECL_LANG_SPECIFIC. + +2014-05-15 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/61158 + * fold-const.c (fold_binary_loc): If X is zero-extended and + shiftc >= prec, make sure zerobits is all ones instead of + invoking undefined behavior. + +2014-05-14 Cary Coutant <ccoutant@google.com> + + PR debug/61013 + * opts.c (common_handle_option): Don't special-case "-g". + (set_debug_level): Default to at least level 2 with "-g". + 2014-05-14 Eric Botcazou <ebotcazou@adacore.com> * config/sparc/sparc-protos.h (sparc_absnegfloat_split_legitimate): @@ -1652,10 +2721,10 @@ PR tree-optimization/60577 * tree-core.h (struct tree_base): Document nothrow_flag use - in VAR_DECL_NONALIASED. - * tree.h (VAR_DECL_NONALIASED): New. + in DECL_NONALIASED. + * tree.h (DECL_NONALIASED): New. (may_be_aliased): Adjust. - * coverage.c (build_var): Set VAR_DECL_NONALIASED. + * coverage.c (build_var): Set DECL_NONALIASED. 2014-03-20 Eric Botcazou <ebotcazou@adacore.com> |