diff options
Diffstat (limited to 'gcc-4.9/gcc/ChangeLog-2013')
| -rw-r--r-- | gcc-4.9/gcc/ChangeLog-2013 | 40486 |
1 files changed, 40486 insertions, 0 deletions
diff --git a/gcc-4.9/gcc/ChangeLog-2013 b/gcc-4.9/gcc/ChangeLog-2013 new file mode 100644 index 000000000..7cf3c9977 --- /dev/null +++ b/gcc-4.9/gcc/ChangeLog-2013 @@ -0,0 +1,40486 @@ +2013-12-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59622 + * gimple-fold.c (gimple_fold_call): Don't replace OBJ_TYPE_REF + call fndecl with 0 possible targets with BUILT_IN_UNREACHABLE, + instead only for !inplace add a __builtin_unreachable () call + before the call. + +2013-12-31 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/avx512fintrin.h (_mm_add_round_sd): New. + (_mm_add_round_sd): Ditto. + (_mm_add_round_ss): Ditto. + (_mm_sub_round_sd): Ditto. + (_mm_sub_round_ss): Ditto. + (_mm_rcp14_sd): Ditto. + (_mm_rcp14_ss): Ditto. + (_mm_sqrt_round_sd): Ditto. + (_mm_sqrt_round_ss): Ditto. + (_mm_mul_round_sd): Ditto. + (_mm_mul_round_ss): Ditto. + (_mm_div_round_sd): Ditto. + (_mm_div_round_ss): Ditto. + (_mm_scalef_round_sd): Ditto. + (_mm_scalef_round_ss): Ditto. + (_mm_scalef_round_sd): Ditto. + (_mm_scalef_round_ss): Ditto. + (_mm_cvt_roundsd_ss): Ditto. + (_mm_cvt_roundsd_sd): Ditto. + (_mm_getexp_round_ss): Ditto. + (_mm_getexp_round_sd): Ditto. + (_mm_getmant_round_sd): Ditto. + (_mm_getmant_round_ss): Ditto. + (_mm_roundscale_round_ss): Ditto. + (_mm_roundscale_round_sd): Ditto. + (_mm_max_round_sd): Ditto. + (_mm_max_round_ss): Ditto. + (_mm_min_round_sd): Ditto. + (_mm_min_round_ss): Ditto. + (_mm_fmadd_round_sd): Ditto. + (_mm_fmadd_round_ss): Ditto. + (_mm_fmsub_round_sd): Ditto. + (_mm_fmsub_round_ss): Ditto. + (_mm_fnmadd_round_sd): Ditto. + (_mm_fnmadd_round_ss): Ditto. + (_mm_fnmsub_round_sd): Ditto. + (_mm_fnmsub_round_ss): Ditto. + (_mm_scalef_sd): Ditto. + (_mm_scalef_ss): Ditto. + (_mm_getexp_ss): Ditto. + (_mm_getexp_sd): Ditto. + (_mm_getmant_sd): Ditto. + (_mm_getmant_ss): Ditto. + (_mm_roundscale_ss): Ditto. + (_mm_roundscale_sd): Ditto. + * config/i386/i386-builtin-types.def: New types to support + new built-ins: <V2DF, V2DF, V2DF, INT, INT>, + <V4SF, V4SF, V4SF, INT, INT>, <(V4SF, V4SF, V2DF, INT>, + <V2DF, V2DF, V4SF, INT>, <V4SF, V4SF, V4SF, V4SF, IN>. + * config/i386/i386.c (enum ix86_builtins): Add + IX86_BUILTIN_ADDSD_ROUND, IX86_BUILTIN_ADDSS_ROUND, + IX86_BUILTIN_CVTSD2SS_ROUND, IX86_BUILTIN_CVTSS2SD_ROUND, + IX86_BUILTIN_DIVSD_ROUND, IX86_BUILTIN_GETEXPSD128, + IX86_BUILTIN_DIVSS_ROUND, IX86_BUILTIN_GETEXPSS128, + IX86_BUILTIN_GETMANTSD128, IX86_BUILTIN_GETMANTSS128, + IX86_BUILTIN_MAXSD_ROUND, IX86_BUILTIN_MAXSS_ROUND, + IX86_BUILTIN_MINSD_ROUND, IX86_BUILTIN_MINSS_ROUND, + IX86_BUILTIN_MULSD_ROUND, IX86_BUILTIN_MULSS_ROUND, + IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS, IX86_BUILTIN_RNDSCALESD, + IX86_BUILTIN_RNDSCALESS, IX86_BUILTIN_RSQRT14SD, + IX86_BUILTIN_RSQRT14SS, IX86_BUILTIN_SCALEFSD, + IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SQRTSD_ROUND, + IX86_BUILTIN_SQRTSS_ROUND, IX86_BUILTIN_SUBSD_ROUND, + IX86_BUILTIN_SUBSS_ROUND, IX86_BUILTIN_VFMADDSD3_ROUND, + IX86_BUILTIN_VFMADDSS3_ROUND, IX86_BUILTIN_VFMSUBSD3_MASK3, + IX86_BUILTIN_VFMSUBSS3_MASK3. + (builtin_description bdesc_args[]): Add + __builtin_ia32_rcp14sd, __builtin_ia32_rcp14ss, + __builtin_ia32_rsqrt14pd512_mask, __builtin_ia32_rsqrt14ps512_mask, + __builtin_ia32_rsqrt14sd, __builtin_ia32_rsqrt14ss, + __builtin_ia32_addsd_round, __builtin_ia32_addss_round, + __builtin_ia32_cvtsd2ss_round, __builtin_ia32_cvtss2sd_round, + __builtin_ia32_divsd_round, __builtin_ia32_divss_round, + __builtin_ia32_getexpsd128_round, __builtin_ia32_getexpss128_round, + __builtin_ia32_getmantsd_round, __builtin_ia32_getmantss_round, + __builtin_ia32_maxsd_round, __builtin_ia32_maxss_round, + __builtin_ia32_minsd_round, __builtin_ia32_minss_round, + __builtin_ia32_mulsd_round, __builtin_ia32_mulss_round, + __builtin_ia32_rndscalesd_round, __builtin_ia32_rndscaless_round, + __builtin_ia32_scalefsd_round, __builtin_ia32_scalefss_round, + __builtin_ia32_sqrtsd_round, __builtin_ia32_sqrtss_round, + __builtin_ia32_subsd_round, __builtin_ia32_subss_round, + __builtin_ia32_vfmaddsd3_round, __builtin_ia32_vfmaddss3_round. + (ix86_expand_round_builtin): Expand new FTYPEs. + * config/i386/sse.md (<sse>_vm<plusminus_insn><mode>3): Support + EVEX's embedded rouding. + (<sse>_vm<multdiv_mnemonic><mode>3): Ditto. + (<sse>_vmsqrt<mode>2): Ditto. + (<sse>_vm<code><mode>3): Ditto. + (sse2_cvtsd2ss): Ditto. + (sse2_cvtss2sd): Ditto. + (*avx512f_vmscalef<mode>): Ditto. + (avx512f_sgetexp<mode>): Ditto. + (*avx512f_rndscale<mode>): Ditto. + (avx512f_getmant<mode>): Ditto. + (*srcp14<mode>): Make visible. + (*rsqrt14<mode>): Ditto. + * config/i386/subst.md (mask_mode512bit_condition): Fix + mode calculation. + (sd_mask_mode512bit_condition): Ditto. + (round_mode512bit_condition): Ditto. + (round_modev4sf_condition): Ditto. + (round_mask_scalar_operand3): Remove. + (round_prefix): New. + (round_saeonly_op3): Ditto. + (round_saeonly_prefix): Ditto. + +2013-12-31 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New. + (OPTION_MASK_ISA_SHA_UNSET): Ditto. + (ix86_handle_option): Handle OPT_msha. + * config.gcc (extra_headers): Add shaintrin.h. + * config/i386/cpuid.h (bit_SHA): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA + instructions. + * config/i386/i386-c.c (ix86_target_macros_internal): Handle + OPTION_MASK_ISA_SHA. + * config/i386/i386.c (ix86_target_string): Add -msha. + (ix86_option_override_internal): Add PTA_SHA. + (ix86_valid_target_attribute_inner_p): Handle OPT_msha. + (enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1, + IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4, + IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2, + IX86_BUILTIN_SHA256RNDS2. + (bdesc_args): Add BUILTINS defined above. + (ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1, + __builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte, + __builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1, + __builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2. + (ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add + warning for CODE_FOR_sha1rnds4. + * config/i386/i386.h (TARGET_SHA): New. + (TARGET_SHA_P): Ditto. + * config/i386/i386.opt (-msha): Document it. + * config/i386/immintrin.h: Add shaintrin.h. + * config/i386/shaintrin.h: New. + * config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2, + UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1, + UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2. + (sha1msg1): New. + (sha1msg2): Ditto. + (sha1nexte): Ditto. + (sha1rnds4): Ditto. + (sha256msg1): Ditto. + (sha256msg2): Ditto. + (sha256rnds2): Ditto. + * doc/invoke.texi: Add -msha. + +2013-12-31 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h, + avx512erintrin.h, avx512pfintrin.h. + * config/i386/avx512cdintrin.h: New file. + * config/i386/avx512erintrin.h: New file. + * config/i386/avx512fintrin.h: New file. + * config/i386/avx512pfintrin.h: New file. + * config/i386/i386-builtin-types.def: Add V16UHI, V32SF, V16SF, V8DF, + V8DI, V16SI, V64QI, PV8DF, PV8DI, PV16SI, PV16SF, PCV8DF, PCV16SF, + PCV8DI, PCV16SI, V16QI_FTYPE_V16SI, V8DF_FTYPE_V8SI, V8DF_FTYPE_V8DF, + V8HI_FTYPE_V8DI, V16SF_FTYPE_V16SF, V8SI_FTYPE_V8DI, V8SF_FTYPE_V8DF, + V8SF_FTYPE_V8DF_V8SF_QI, V16HI_FTYPE_V16SI, V16SF_FTYPE_FLOAT, + V16SI_FTYPE_INT, V8DF_FTYPE_DOUBLE, V8DI_FTYPE_INT64, + V16SF_FTYPE_V4SF, V8DF_FTYPE_V4DF, V8DI_FTYPE_V4DI, V16QI_FTYPE_V8DI, + UINT_FTYPE_V4SF, UINT64_FTYPE_V4SF, UINT_FTYPE_V2DF, + UINT64_FTYPE_V2DF, V16SI_FTYPE_V16SI, V16SI_FTYPE_V16SI_V16SI_HI, + V8DI_FTYPE_V8DI, V8DI_FTYPE_V8DI_V8DI_QI, V16SI_FTYPE_PV4SI, + V16SF_FTYPE_PV4SF, V8DI_FTYPE_PV4DI, V8DF_FTYPE_PV4DF, + V8UHI_FTYPE_V8UHI, V8USI_FTYPE_V8USI, V2DF_FTYPE_V2DF_UINT, + V2DF_FTYPE_V2DF_UINT64, V4DF_FTYPE_V8DF_INT, + V4DF_FTYPE_V8DF_INT_V4DF_QI, V8DF_FTYPE_V8DF_V8DI, + V4SF_FTYPE_V4SF_UINT, V4SF_FTYPE_V4SF_UINT64, + INT_FTYPE_V4SF_V4SF_INT_INT, INT_FTYPE_V2DF_V2DF_INT_INT, + V16SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT, + V4SF_FTYPE_V16SF_INT_V4SF_QI, V16SF_FTYPE_V16SF_V16SF, + V16SF_FTYPE_V16SF_V16SI, V8DF_FTYPE_V8DF_V4DF_INT_V8DF_QI, + V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_INT_V8DF_QI, + V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT, V8DF_FTYPE_V8DF_V8DF, + V16SF_FTYPE_V16SF_V16SF_INT, V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI, + V16SF_FTYPE_V16SF_INT_V16SF_HI, V16SI_FTYPE_V16SI_V4SI_INT_V16SI_HI, + V16SF_FTYPE_V16SF_V16SF_V16SI_INT, + V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI, + V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT, + V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI, + V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT, + V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI, + V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT, V16SF_FTYPE_V16SF_V4SF_INT, + V16SF_FTYPE_V16SF_V4SF_INT_V16SF_HI, V16HI_FTYPE_V16SF_INT, + V16HI_FTYPE_V16SF_INT_V16HI_HI, V16HI_FTYPE_V16HI_V16HI_INT_V16HI_HI, + V16SI_FTYPE_V16SI_V4SI, V16SI_FTYPE_V16SI_V4SI_INT, + V4SI_FTYPE_V16SI_INT, V4SI_FTYPE_V16SI_INT_V4SI_QI, + V16SI_FTYPE_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI, + V16SI_FTYPE_V16SI_SI, V16SI_FTYPE_V16SI_INT, + V16SI_FTYPE_V16SI_V4SI_V16SI_HI, V16SI_FTYPE_V16SI_INT_V16SI_HI, + V8DI_FTYPE_V8DI_V8DI, V16SI_FTYPE_V8DF_V8DF, + V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V4DI_INT_V8DI_QI, + V8DI_FTYPE_V8DI_V2DI, V4DI_FTYPE_V8DI_INT, + V4DI_FTYPE_V8DI_INT_V4DI_QI, V8DI_FTYPE_V8DI_V2DI_V8DI_QI, + V8DI_FTYPE_V8DI_INT_V8DI_QI, VOID_FTYPE_PDOUBLE_V8DF, + VOID_FTYPE_PFLOAT_V16SF, VOID_FTYPE_PV8DI_V8DI, HI_FTYPE_HI, + HI_FTYPE_HI_HI, HI_FTYPE_HI_INT, QI_FTYPE_V8DI_V8DI, + QI_FTYPE_V8DI_V8DI_QI, HI_FTYPE_V16SI_V16SI, HI_FTYPE_V16SI_V16SI_HI, + QI_FTYPE_V8DI_V8DI_INT, QI_FTYPE_V8DI_V8DI_INT_QI, + HI_FTYPE_V16SI_V16SI_INT, HI_FTYPE_V16SI_V16SI_INT ,HI, + QI_FTYPE_V8DF_V8DF_INT, QI_FTYPE_V8DF_V8DF_INT_QI, + QI_FTYPE_V8DF_V8DF_INT_QI_INT, HI_FTYPE_V16SF_V16SF_INT, + HI_FTYPE_V16SF_V16SF_INT_HI, HI_FTYPE_V16SF_V16SF_INT_HI_INT, + QI_FTYPE_V2DF_V2DF_INT, QI_FTYPE_V2DF_V2DF_INT_QI, + QI_FTYPE_V2DF_V2DF_INT_QI_INT, QI_FTYPE_V4SF_V4SF_INT, + QI_FTYPE_V4SF_V4SF_INT_QI, QI_FTYPE_V4SF_V4SF_INT_QI_INT, + V16SI_FTYPE_HI, V8DI_FTYPE_QI, V8DF_FTYPE_V8DF_V8DF_V8DF, + V16SF_FTYPE_V16SF_V16SF_V16SF, V8DF_FTYPE_V8DF_V8DF_QI, + V8DF_FTYPE_V8SF_V8DF_QI, V8DF_FTYPE_V8SI_V8DF_QI, + V8DI_FTYPE_V8SI_V8DI_QI, V8DI_FTYPE_V8HI_V8DI_QI, + V8DI_FTYPE_V16QI_V8DI_QI, V8DI_FTYPE_V8DI_V8DI_V8DI_QI, + V8DF_FTYPE_V8DI_V8DF_V8DF, V8DF_FTYPE_V8DI_V8DF_V8DF_QI, + V8DF_FTYPE_V8DF_V8DI_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DF_QI, + V16SI_FTYPE_V16SI_V16SI_V16SI_HI, V2DF_FTYPE_V2DF_V2DF_V2DF_QI, + V2DF_FTYPE_V2DF_V4SF_V2DF_QI, V16SF_FTYPE_V16SF_V16SF_HI, + V16SF_FTYPE_V16SI_V16SF_HI, V16SF_FTYPE_V16SF_V16SF_V16SF_HI, + V16SF_FTYPE_V16SI_V16SF_V16SF, V16SF_FTYPE_V16SI_V16SF_V16SF_HI, + V16SF_FTYPE_V16SF_V16SI_V16SF_HI, V4SF_FTYPE_V4SF_V2DF_V4SF_QI, + V4SF_FTYPE_V4SF_V4SF_V4SF_QI, V16SF_FTYPE_V4SF_V16SF_HI, + V8DF_FTYPE_V4DF_V8DF_QI, V8DF_FTYPE_V2DF_V8DF_QI, + V16SI_FTYPE_V4SI_V16SI_HI, V16SI_FTYPE_SI_V16SI_HI, + V16SI_FTYPE_V16HI_V16SI_HI, V16SI_FTYPE_V16QI_V16SI_HI, + V8SI_FTYPE_V8DF_V8SI_QI, V8DI_FTYPE_V4DI_V8DI_QI, + V8DI_FTYPE_V2DI_V8DI_QI, V8DI_FTYPE_DI_V8DI_QI, + V16SF_FTYPE_PCV16SF_V16SF_HI, V8DF_FTYPE_PCV8DF_V8DF_QI, + V16SI_FTYPE_PCV16SI_V16SI_HI, V8DI_FTYPE_PCV8DI_V8DI_QI, + V2DF_FTYPE_PCDOUBLE_V2DF_QI, V4SF_FTYPE_PCFLOAT_V4SF_QI, + V16QI_FTYPE_V16SI_V16QI_HI, V16HI_FTYPE_V16SI_V16HI_HI, + V8SI_FTYPE_V8DI_V8SI_QI, V8HI_FTYPE_V8DI_V8HI_QI, + V16QI_FTYPE_V8DI_V16QI_QI, VOID_FTYPE_PV8DF_V8DF_QI, + VOID_FTYPE_PV16SF_V16SF_HI, VOID_FTYPE_PV8DI_V8DI_QI, + VOID_FTYPE_PV16SI_V16SI_HI, VOID_FTYPE_PDOUBLE_V2DF_QI, + VOID_FTYPE_PFLOAT_V4SF_QI, V16SI_FTYPE_V16SF_V16SI_HI, + V8DI_FTYPE_V8DI_V8DI_V8DI_INT_QI, + V16SI_FTYPE_V16SI_V16SI_V16SI_INT_HI, V8DI_FTYPE_V8DI_V8DI_V8DI, + V16SI_FTYPE_V16SI_V16SI_V16SI, V8DF_FTYPE_V8DF_V8DI_V8DF, + V16SF_FTYPE_V16SF_V16SI_V16SF, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI, + V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI, V8DI_FTYPE_V16SI_V16SI_V8DI_QI, + UINT64_FTYPE_V2DF_INT, UINT64_FTYPE_V4SF_INT, UINT_FTYPE_V2DF_INT, + UINT_FTYPE_V4SF_INT, INT64_FTYPE_V2DF_INT, INT64_FTYPE_V4SF_INT, + INT_FTYPE_V2DF_INT, INT_FTYPE_V4SF_INT, V2DF_FTYPE_V2DF_UINT64_INT, + V4SF_FTYPE_V4SF_UINT64_INT, V4SF_FTYPE_V4SF_UINT_INT, + V2DF_FTYPE_V2DF_INT64_INT, V4SF_FTYPE_V4SF_INT64_INT, + V4SF_FTYPE_V4SF_INT_INT, V16SI_FTYPE_V16SF_V16SI_HI_INT, + V16SF_FTYPE_V16SI_V16SF_HI_INT, V16SF_FTYPE_V16SF_V16SF_HI_INT, + V16SF_FTYPE_V16HI_V16SF_HI_INT, V8SI_FTYPE_V8DF_V8SI_QI_INT, + V8SF_FTYPE_V8DF_V8SF_QI_INT, V8DF_FTYPE_V8DF_V8DF_QI_INT, + V8DF_FTYPE_V8SF_V8DF_QI_INT, V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT, + V8DF_FTYPE_V8DF_V8DF_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT, + V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT, + V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_INT, + V16SF_FTYPE_V16SF_INT_V16SF_HI_INT, V8DF_FTYPE_V8DF_INT_V8DF_QI_INT, + V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT, + V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT, V8DI_FTYPE_V8DI_SI_V8DI_V8DI, + V16SF_FTYPE_V16SF_PCFLOAT_V16SI_HI_INT, + V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT, + V8DF_FTYPE_V8DF_PCDOUBLE_V8SI_QI_INT, + V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT, + V8SF_FTYPE_V8SF_PCFLOAT_V8DI_QI_INT, + V8DF_FTYPE_V8DF_PCDOUBLE_V8DI_QI_INT, + V16SI_FTYPE_V16SI_PCINT_V16SI_HI_INT, + V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT, + V8DI_FTYPE_V8DI_PCINT64_V8SI_QI_INT, + V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT, + V8SI_FTYPE_V8SI_PCINT_V8DI_QI_INT, + V8DI_FTYPE_V8DI_PCINT64_V8DI_QI_INT, + VOID_FTYPE_PFLOAT_HI_V16SI_V16SF_INT, + VOID_FTYPE_PDOUBLE_QI_V8SI_V8DF_INT, + VOID_FTYPE_PFLOAT_QI_V8DI_V8SF_INT, + VOID_FTYPE_PDOUBLE_QI_V8DI_V8DF_INT, + VOID_FTYPE_PINT_HI_V16SI_V16SI_INT, + VOID_FTYPE_PLONGLONG_QI_V8SI_V8DI_INT, + VOID_FTYPE_PINT_QI_V8DI_V8SI_INT, + VOID_FTYPE_PLONGLONG_QI_V8DI_V8DI_INT, + VOID_FTYPE_HI_V16SI_PCINT_INT_INT, VOID_FTYPE_QI_V8DI_PCINT_INT_INT. + (ALIAS): Add DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND). + * config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDPD512, + IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_MASK, + IX86_BUILTIN_ADDSS_MASK, IX86_BUILTIN_ALIGND512, + IX86_BUILTIN_ALIGNQ512, IX86_BUILTIN_BLENDMD512, + IX86_BUILTIN_BLENDMPD512, IX86_BUILTIN_BLENDMPS512, + IX86_BUILTIN_BLENDMQ512, IX86_BUILTIN_BROADCASTF32X4_512, + IX86_BUILTIN_BROADCASTF64X4_512, IX86_BUILTIN_BROADCASTI32X4_512, + IX86_BUILTIN_BROADCASTI64X4_512, IX86_BUILTIN_BROADCASTSD512, + IX86_BUILTIN_BROADCASTSS512, IX86_BUILTIN_CMPD512, + IX86_BUILTIN_CMPPD512, IX86_BUILTIN_CMPPS512, IX86_BUILTIN_CMPQ512, + IX86_BUILTIN_CMPSD_MASK, IX86_BUILTIN_CMPSS_MASK, IX86_BUILTIN_COMIDF, + IX86_BUILTIN_COMISF, IX86_BUILTIN_COMPRESSPD512, + IX86_BUILTIN_COMPRESSPDSTORE512, IX86_BUILTIN_COMPRESSPS512, + IX86_BUILTIN_COMPRESSPSSTORE512, IX86_BUILTIN_CVTDQ2PD512, + IX86_BUILTIN_CVTDQ2PS512, IX86_BUILTIN_CVTPD2DQ512, + IX86_BUILTIN_CVTPD2PS512, IX86_BUILTIN_CVTPD2UDQ512, + IX86_BUILTIN_CVTPH2PS512, IX86_BUILTIN_CVTPS2DQ512, + IX86_BUILTIN_CVTPS2PD512, IX86_BUILTIN_CVTPS2PH512, + IX86_BUILTIN_CVTPS2UDQ512, IX86_BUILTIN_CVTSD2SS_MASK, + IX86_BUILTIN_CVTSI2SD64, IX86_BUILTIN_CVTSI2SS32, + IX86_BUILTIN_CVTSI2SS64, IX86_BUILTIN_CVTSS2SD_MASK, + IX86_BUILTIN_CVTTPD2DQ512, IX86_BUILTIN_CVTTPD2UDQ512, + IX86_BUILTIN_CVTTPS2DQ512, IX86_BUILTIN_CVTTPS2UDQ512, + IX86_BUILTIN_CVTUDQ2PD512, IX86_BUILTIN_CVTUDQ2PS512, + IX86_BUILTIN_CVTUSI2SD32, IX86_BUILTIN_CVTUSI2SD64, + IX86_BUILTIN_CVTUSI2SS32, IX86_BUILTIN_CVTUSI2SS64, + IX86_BUILTIN_DIVPD512, IX86_BUILTIN_DIVPS512, IX86_BUILTIN_DIVSD_MASK, + IX86_BUILTIN_DIVSS_MASK, IX86_BUILTIN_EXPANDPD512, + IX86_BUILTIN_EXPANDPD512Z, IX86_BUILTIN_EXPANDPDLOAD512, + IX86_BUILTIN_EXPANDPDLOAD512Z, IX86_BUILTIN_EXPANDPS512, + IX86_BUILTIN_EXPANDPS512Z, IX86_BUILTIN_EXPANDPSLOAD512, + IX86_BUILTIN_EXPANDPSLOAD512Z, IX86_BUILTIN_EXTRACTF32X4, + IX86_BUILTIN_EXTRACTF64X4, IX86_BUILTIN_EXTRACTI32X4, + IX86_BUILTIN_EXTRACTI64X4, IX86_BUILTIN_FIXUPIMMPD512_MASK, + IX86_BUILTIN_FIXUPIMMPD512_MASKZ, IX86_BUILTIN_FIXUPIMMPS512_MASK, + IX86_BUILTIN_FIXUPIMMPS512_MASKZ, IX86_BUILTIN_FIXUPIMMSD128_MASK, + IX86_BUILTIN_FIXUPIMMSD128_MASKZ, IX86_BUILTIN_FIXUPIMMSS128_MASK, + IX86_BUILTIN_FIXUPIMMSS128_MASKZ, IX86_BUILTIN_GETEXPPD512, + IX86_BUILTIN_GETEXPPS512, IX86_BUILTIN_GETEXPSD128, + IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTPD512, + IX86_BUILTIN_GETMANTPS512, IX86_BUILTIN_GETMANTSD128, + IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_INSERTF32X4, + IX86_BUILTIN_INSERTF64X4, IX86_BUILTIN_INSERTI32X4, + IX86_BUILTIN_INSERTI64X4, IX86_BUILTIN_LOADAPD512, + IX86_BUILTIN_LOADAPS512, IX86_BUILTIN_LOADDQUDI512, + IX86_BUILTIN_LOADDQUSI512, IX86_BUILTIN_LOADSD, IX86_BUILTIN_LOADSS, + IX86_BUILTIN_LOADUPD512, IX86_BUILTIN_LOADUPS512, + IX86_BUILTIN_MAXPD512, IX86_BUILTIN_MAXPS512, IX86_BUILTIN_MAXSD_MASK, + IX86_BUILTIN_MAXSS_MASK, IX86_BUILTIN_MINPD512, IX86_BUILTIN_MINPS512, + IX86_BUILTIN_MINSD_MASK, IX86_BUILTIN_MINSS_MASK, + IX86_BUILTIN_MOVAPD512, IX86_BUILTIN_MOVAPS512, + IX86_BUILTIN_MOVDDUP512, IX86_BUILTIN_MOVDQA32LOAD512, + IX86_BUILTIN_MOVDQA32STORE512, IX86_BUILTIN_MOVDQA32_512, + IX86_BUILTIN_MOVDQA64LOAD512, IX86_BUILTIN_MOVDQA64STORE512, + IX86_BUILTIN_MOVDQA64_512, IX86_BUILTIN_MOVESD, IX86_BUILTIN_MOVESS, + IX86_BUILTIN_MOVNTDQ512, IX86_BUILTIN_MOVNTPD512, + IX86_BUILTIN_MOVNTPS512, IX86_BUILTIN_MOVSHDUP512, + IX86_BUILTIN_MOVSLDUP512, IX86_BUILTIN_MULPD512, + IX86_BUILTIN_MULPS512, IX86_BUILTIN_MULSD_MASK, + IX86_BUILTIN_MULSS_MASK, IX86_BUILTIN_PABSD512, IX86_BUILTIN_PABSQ512, + IX86_BUILTIN_PADDD512, IX86_BUILTIN_PADDQ512, IX86_BUILTIN_PANDD512, + IX86_BUILTIN_PANDND512, IX86_BUILTIN_PANDNQ512, IX86_BUILTIN_PANDQ512, + IX86_BUILTIN_PBROADCASTD512, IX86_BUILTIN_PBROADCASTD512_GPR, + IX86_BUILTIN_PBROADCASTMB512, IX86_BUILTIN_PBROADCASTMW512, + IX86_BUILTIN_PBROADCASTQ512, IX86_BUILTIN_PBROADCASTQ512_GPR, + IX86_BUILTIN_PBROADCASTQ512_MEM, IX86_BUILTIN_PCMPEQD512_MASK, + IX86_BUILTIN_PCMPEQQ512_MASK, IX86_BUILTIN_PCMPGTD512_MASK, + IX86_BUILTIN_PCMPGTQ512_MASK, IX86_BUILTIN_PCOMPRESSD512, + IX86_BUILTIN_PCOMPRESSDSTORE512, IX86_BUILTIN_PCOMPRESSQ512, + IX86_BUILTIN_PCOMPRESSQSTORE512, IX86_BUILTIN_PEXPANDD512, + IX86_BUILTIN_PEXPANDD512Z, IX86_BUILTIN_PEXPANDDLOAD512, + IX86_BUILTIN_PEXPANDDLOAD512Z, IX86_BUILTIN_PEXPANDQ512, + IX86_BUILTIN_PEXPANDQ512Z, IX86_BUILTIN_PEXPANDQLOAD512, + IX86_BUILTIN_PEXPANDQLOAD512Z, IX86_BUILTIN_PMAXSD512, + IX86_BUILTIN_PMAXSQ512, IX86_BUILTIN_PMAXUD512, + IX86_BUILTIN_PMAXUQ512, IX86_BUILTIN_PMINSD512, + IX86_BUILTIN_PMINSQ512, IX86_BUILTIN_PMINUD512, + IX86_BUILTIN_PMINUQ512, IX86_BUILTIN_PMOVDB512, + IX86_BUILTIN_PMOVDW512, IX86_BUILTIN_PMOVQB512, + IX86_BUILTIN_PMOVQD512, IX86_BUILTIN_PMOVQW512, + IX86_BUILTIN_PMOVSDB512, IX86_BUILTIN_PMOVSDW512, + IX86_BUILTIN_PMOVSQB512, IX86_BUILTIN_PMOVSQD512, + IX86_BUILTIN_PMOVSQW512, IX86_BUILTIN_PMOVSXBD512, + IX86_BUILTIN_PMOVSXBQ512, IX86_BUILTIN_PMOVSXDQ512, + IX86_BUILTIN_PMOVSXWD512, IX86_BUILTIN_PMOVSXWQ512, + IX86_BUILTIN_PMOVUSDB512, IX86_BUILTIN_PMOVUSDW512, + IX86_BUILTIN_PMOVUSQB512, IX86_BUILTIN_PMOVUSQD512, + IX86_BUILTIN_PMOVUSQW512, IX86_BUILTIN_PMOVZXBD512, + IX86_BUILTIN_PMOVZXBQ512, IX86_BUILTIN_PMOVZXDQ512, + IX86_BUILTIN_PMOVZXWD512, IX86_BUILTIN_PMOVZXWQ512, + IX86_BUILTIN_PMULDQ512, IX86_BUILTIN_PMULLD512, + IX86_BUILTIN_PMULUDQ512, IX86_BUILTIN_PORD512, IX86_BUILTIN_PORQ512, + IX86_BUILTIN_PROLD512, IX86_BUILTIN_PROLQ512, IX86_BUILTIN_PROLVD512, + IX86_BUILTIN_PROLVQ512, IX86_BUILTIN_PRORD512, IX86_BUILTIN_PRORQ512, + IX86_BUILTIN_PRORVD512, IX86_BUILTIN_PRORVQ512, + IX86_BUILTIN_PSHUFD512, IX86_BUILTIN_PSLLD512, IX86_BUILTIN_PSLLDI512, + IX86_BUILTIN_PSLLQ512, IX86_BUILTIN_PSLLQI512, + IX86_BUILTIN_PSLLVV16SI, IX86_BUILTIN_PSLLVV8DI, + IX86_BUILTIN_PSRAD512, IX86_BUILTIN_PSRADI512, IX86_BUILTIN_PSRAQ512, + IX86_BUILTIN_PSRAQI512, IX86_BUILTIN_PSRAVV16SI, + IX86_BUILTIN_PSRAVV8DI, IX86_BUILTIN_PSRLD512, IX86_BUILTIN_PSRLDI512, + IX86_BUILTIN_PSRLQ512, IX86_BUILTIN_PSRLQI512, + IX86_BUILTIN_PSRLVV16SI, IX86_BUILTIN_PSRLVV8DI, + IX86_BUILTIN_PSUBD512, IX86_BUILTIN_PSUBQ512, IX86_BUILTIN_PTESTMD512, + IX86_BUILTIN_PTESTMQ512, IX86_BUILTIN_PTESTNMD512, + IX86_BUILTIN_PTESTNMQ512, IX86_BUILTIN_PUNPCKHDQ512, + IX86_BUILTIN_PUNPCKHQDQ512, IX86_BUILTIN_PUNPCKLDQ512, + IX86_BUILTIN_PUNPCKLQDQ512, IX86_BUILTIN_PXORD512, + IX86_BUILTIN_PXORQ512, IX86_BUILTIN_RCP14PD512, + IX86_BUILTIN_RCP14PS512, IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS, + IX86_BUILTIN_RNDSCALEPD, IX86_BUILTIN_RNDSCALEPS, + IX86_BUILTIN_RNDSCALESD, IX86_BUILTIN_RNDSCALESS, + IX86_BUILTIN_RSQRT14PD512, IX86_BUILTIN_RSQRT14PS512, + IX86_BUILTIN_RSQRT14SD, IX86_BUILTIN_RSQRT14SS, + IX86_BUILTIN_SCALEFPD512, IX86_BUILTIN_SCALEFPS512, + IX86_BUILTIN_SCALEFSD, IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SHUFPD512, + IX86_BUILTIN_SHUFPS512, IX86_BUILTIN_SHUF_F32x4, + IX86_BUILTIN_SHUF_F64x2, IX86_BUILTIN_SHUF_I32x4, + IX86_BUILTIN_SHUF_I64x2, + IX86_BUILTIN_SQRTPD512_MASK, IX86_BUILTIN_SQRTPS512_MASK, + IX86_BUILTIN_SQRTSD_MASK, + IX86_BUILTIN_SQRTSS_MASK, IX86_BUILTIN_STOREAPD512, + IX86_BUILTIN_STOREAPS512, IX86_BUILTIN_STOREDQUDI512, + IX86_BUILTIN_STOREDQUSI512, IX86_BUILTIN_STORESD, + IX86_BUILTIN_STORESS, IX86_BUILTIN_STOREUPD512, + IX86_BUILTIN_STOREUPS512, IX86_BUILTIN_SUBPD512, + IX86_BUILTIN_SUBPS512, IX86_BUILTIN_SUBSD_MASK, + IX86_BUILTIN_SUBSS_MASK, IX86_BUILTIN_UCMPD512, IX86_BUILTIN_UCMPQ512, + IX86_BUILTIN_UNPCKHPD512, IX86_BUILTIN_UNPCKHPS512, + IX86_BUILTIN_UNPCKLPD512, IX86_BUILTIN_UNPCKLPS512, + IX86_BUILTIN_VCVTSD2SI32, IX86_BUILTIN_VCVTSD2SI64, + IX86_BUILTIN_VCVTSD2USI32, IX86_BUILTIN_VCVTSD2USI64, + IX86_BUILTIN_VCVTSS2SI32, IX86_BUILTIN_VCVTSS2SI64, + IX86_BUILTIN_VCVTSS2USI32, IX86_BUILTIN_VCVTSS2USI64, + IX86_BUILTIN_VCVTTSD2SI32, IX86_BUILTIN_VCVTTSD2SI64, + IX86_BUILTIN_VCVTTSD2USI32, IX86_BUILTIN_VCVTTSD2USI64, + IX86_BUILTIN_VCVTTSS2SI32, IX86_BUILTIN_VCVTTSS2SI64, + IX86_BUILTIN_VCVTTSS2USI32, IX86_BUILTIN_VCVTTSS2USI64, + IX86_BUILTIN_VFMADDPD512_MASK, IX86_BUILTIN_VFMADDPD512_MASK3, + IX86_BUILTIN_VFMADDPD512_MASKZ, IX86_BUILTIN_VFMADDPS512_MASK, + IX86_BUILTIN_VFMADDPS512_MASK3, IX86_BUILTIN_VFMADDPS512_MASKZ, + IX86_BUILTIN_VFMADDSD3_MASK, IX86_BUILTIN_VFMADDSD3_MASK3, + IX86_BUILTIN_VFMADDSD3_MASKZ, IX86_BUILTIN_VFMADDSS3_MASK, + IX86_BUILTIN_VFMADDSS3_MASK3, IX86_BUILTIN_VFMADDSS3_MASKZ, + IX86_BUILTIN_VFMADDSUBPD512_MASK, IX86_BUILTIN_VFMADDSUBPD512_MASK3, + IX86_BUILTIN_VFMADDSUBPD512_MASKZ, IX86_BUILTIN_VFMADDSUBPS512_MASK, + IX86_BUILTIN_VFMADDSUBPS512_MASK3, IX86_BUILTIN_VFMADDSUBPS512_MASKZ, + IX86_BUILTIN_VFMSUBADDPD512_MASK3, IX86_BUILTIN_VFMSUBADDPS512_MASK3, + IX86_BUILTIN_VFMSUBPD512_MASK3, IX86_BUILTIN_VFMSUBPS512_MASK3, + IX86_BUILTIN_VFMSUBSD3_MASK3, IX86_BUILTIN_VFMSUBSS3_MASK3, + IX86_BUILTIN_VFNMADDPD512_MASK, IX86_BUILTIN_VFNMADDPS512_MASK, + IX86_BUILTIN_VFNMSUBPD512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK3, + IX86_BUILTIN_VFNMSUBPS512_MASK, IX86_BUILTIN_VFNMSUBPS512_MASK3, + IX86_BUILTIN_VPCLZCNTD512, IX86_BUILTIN_VPCLZCNTQ512, + IX86_BUILTIN_VPCONFLICTD512, IX86_BUILTIN_VPCONFLICTQ512, + IX86_BUILTIN_VPERMDF512, IX86_BUILTIN_VPERMDI512, + IX86_BUILTIN_VPERMI2VARD512, IX86_BUILTIN_VPERMI2VARPD512, + IX86_BUILTIN_VPERMI2VARPS512, IX86_BUILTIN_VPERMI2VARQ512, + IX86_BUILTIN_VPERMILPD512, IX86_BUILTIN_VPERMILPS512, + IX86_BUILTIN_VPERMILVARPD512, IX86_BUILTIN_VPERMILVARPS512, + IX86_BUILTIN_VPERMT2VARD512, IX86_BUILTIN_VPERMT2VARD512_MASKZ, + IX86_BUILTIN_VPERMT2VARPD512, IX86_BUILTIN_VPERMT2VARPD512_MASKZ, + IX86_BUILTIN_VPERMT2VARPS512, IX86_BUILTIN_VPERMT2VARPS512_MASKZ, + IX86_BUILTIN_VPERMT2VARQ512, IX86_BUILTIN_VPERMT2VARQ512_MASKZ, + IX86_BUILTIN_VPERMVARDF512, IX86_BUILTIN_VPERMVARDI512, + IX86_BUILTIN_VPERMVARSF512, IX86_BUILTIN_VPERMVARSI512, + IX86_BUILTIN_VTERNLOGD512_MASK, IX86_BUILTIN_VTERNLOGD512_MASKZ, + IX86_BUILTIN_VTERNLOGQ512_MASK, IX86_BUILTIN_VTERNLOGQ512_MASKZ, + IX86_BUILTIN_KAND16, IX86_BUILTIN_KANDN16, IX86_BUILTIN_KNOT16, + IX86_BUILTIN_KOR16, IX86_BUILTIN_KORTESTC16, IX86_BUILTIN_KORTESTZ16, + IX86_BUILTIN_KUNPCKBW, IX86_BUILTIN_KXNOR16, IX86_BUILTIN_KXOR16, + IX86_BUILTIN_GATHER3SIV8DI, + IX86_BUILTIN_SCATTERDIV16SF, IX86_BUILTIN_SCATTERDIV16SI, + IX86_BUILTIN_SCATTERDIV8DF, IX86_BUILTIN_SCATTERDIV8DI, + IX86_BUILTIN_SCATTERSIV16SF, IX86_BUILTIN_SCATTERSIV16SI, + IX86_BUILTIN_SCATTERSIV8DF, IX86_BUILTIN_SCATTERSIV8DI, + IX86_BUILTIN_GATHERPFDPS, IX86_BUILTIN_GATHERPFQPS, + IX86_BUILTIN_SCATTERPFDPS, IX86_BUILTIN_SCATTERPFQPS, + IX86_BUILTIN_EXP2PD_MASK, IX86_BUILTIN_EXP2PS_MASK, + IX86_BUILTIN_RCP28PD, IX86_BUILTIN_RCP28PS, + IX86_BUILTIN_RSQRT28PD, IX86_BUILTIN_RSQRT28PS. + (bdesc_special_args): Add __builtin_ia32_compressstoresf512_mask, + __builtin_ia32_compressstoresi512_mask, + __builtin_ia32_compressstoredf512_mask, + __builtin_ia32_compressstoredi512_mask, + __builtin_ia32_expandloadsf512_mask, + __builtin_ia32_expandloadsf512_maskz, + __builtin_ia32_expandloadsi512_mask, + __builtin_ia32_expandloadsi512_maskz, + __builtin_ia32_expandloaddf512_mask, + __builtin_ia32_expandloaddf512_maskz, + __builtin_ia32_expandloaddi512_mask, + __builtin_ia32_expandloaddi512_maskz, + __builtin_ia32_loaddqusi512_mask, __builtin_ia32_loaddqudi512_mask, + __builtin_ia32_loadsd_mask, __builtin_ia32_loadss_mask, + __builtin_ia32_loadupd512_mask, __builtin_ia32_loadups512_mask, + __builtin_ia32_loadaps512_mask, __builtin_ia32_movdqa32load512_mask, + __builtin_ia32_loadapd512_mask, __builtin_ia32_movdqa64load512_mask, + __builtin_ia32_movntps512, __builtin_ia32_movntpd512, + __builtin_ia32_movntdq512, __builtin_ia32_storedqusi512_mask, + __builtin_ia32_storedqudi512_mask, __builtin_ia32_storesd_mask, + __builtin_ia32_storess_mask, __builtin_ia32_storeupd512_mask, + __builtin_ia32_storeups512_mask, __builtin_ia32_storeaps512_mask, + __builtin_ia32_movdqa32store512_mask, __builtin_ia32_storeapd512_mask, + __builtin_ia32_movdqa64store512_mask, __builtin_ia32_alignd512_mask, + __builtin_ia32_alignq512_mask, __builtin_ia32_blendmd_512_mask, + __builtin_ia32_blendmpd_512_mask, __builtin_ia32_blendmps_512_mask, + __builtin_ia32_blendmq_512_mask, __builtin_ia32_broadcastf32x4_512, + __builtin_ia32_broadcastf64x4_512, __builtin_ia32_broadcasti32x4_512, + __builtin_ia32_broadcasti64x4_512, __builtin_ia32_broadcastsd512, + __builtin_ia32_broadcastss512, __builtin_ia32_cmpd512_mask, + __builtin_ia32_cmpq512_mask, __builtin_ia32_compressdf512_mask, + __builtin_ia32_compresssf512_mask, __builtin_ia32_cvtdq2pd512_mask, + __builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_cvtudq2pd512_mask, + __builtin_ia32_cvtusi2sd32, __builtin_ia32_expanddf512_mask, + __builtin_ia32_expanddf512_maskz, __builtin_ia32_expandsf512_mask, + __builtin_ia32_expandsf512_maskz, __builtin_ia32_extractf32x4_mask, + __builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask, + __builtin_ia32_extracti64x4_mask, __builtin_ia32_insertf32x4_mask, + __builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask, + __builtin_ia32_inserti64x4_mask, __builtin_ia32_movapd512_mask, + __builtin_ia32_movaps512_mask, __builtin_ia32_movddup512_mask, + __builtin_ia32_movdqa32_512_mask, __builtin_ia32_movdqa64_512_mask, + __builtin_ia32_movesd_mask, __builtin_ia32_movess_mask, + __builtin_ia32_movshdup512_mask, __builtin_ia32_movsldup512_mask, + __builtin_ia32_pabsd512_mask, __builtin_ia32_pabsq512_mask, + __builtin_ia32_paddd512_mask, __builtin_ia32_paddq512_mask, + __builtin_ia32_pandd512_mask, __builtin_ia32_pandnd512_mask, + __builtin_ia32_pandnq512_mask, __builtin_ia32_pandq512_mask, + __builtin_ia32_pbroadcastd512, __builtin_ia32_pbroadcastd512_gpr_mask, + __builtin_ia32_broadcastmb512, __builtin_ia32_broadcastmw512, + __builtin_ia32_pbroadcastq512, __builtin_ia32_pbroadcastq512_gpr_mask, + __builtin_ia32_pbroadcastq512_mem_mask, + __builtin_ia32_pcmpeqd512_mask, __builtin_ia32_pcmpeqq512_mask, + __builtin_ia32_pcmpgtd512_mask, __builtin_ia32_pcmpgtq512_mask, + __builtin_ia32_compresssi512_mask, __builtin_ia32_compressdi512_mask, + __builtin_ia32_expandsi512_mask, __builtin_ia32_expandsi512_maskz, + __builtin_ia32_expanddi512_mask, __builtin_ia32_expanddi512_maskz, + __builtin_ia32_pmaxsd512_mask, __builtin_ia32_pmaxsq512_mask, + __builtin_ia32_pmaxud512_mask, __builtin_ia32_pmaxuq512_mask, + __builtin_ia32_pminsd512_mask, __builtin_ia32_pminsq512_mask, + __builtin_ia32_pminud512_mask, __builtin_ia32_pminuq512_mask, + __builtin_ia32_pmovdb512_mask, __builtin_ia32_pmovdw512_mask, + __builtin_ia32_pmovqb512_mask, __builtin_ia32_pmovqd512_mask, + __builtin_ia32_pmovqw512_mask, __builtin_ia32_pmovsdb512_mask, + __builtin_ia32_pmovsdw512_mask, __builtin_ia32_pmovsqb512_mask, + __builtin_ia32_pmovsqd512_mask, __builtin_ia32_pmovsqw512_mask, + __builtin_ia32_pmovsxbd512_mask, __builtin_ia32_pmovsxbq512_mask, + __builtin_ia32_pmovsxdq512_mask, __builtin_ia32_pmovsxwd512_mask, + __builtin_ia32_pmovsxwq512_mask, __builtin_ia32_pmovusdb512_mask, + __builtin_ia32_pmovusdw512_mask, __builtin_ia32_pmovusqb512_mask, + __builtin_ia32_pmovusqd512_mask, __builtin_ia32_pmovusqw512_mask, + __builtin_ia32_pmovzxbd512_mask, __builtin_ia32_pmovzxbq512_mask, + __builtin_ia32_pmovzxdq512_mask, __builtin_ia32_pmovzxwd512_mask, + __builtin_ia32_pmovzxwq512_mask, __builtin_ia32_pmuldq512_mask, + __builtin_ia32_pmulld512_mask, __builtin_ia32_pmuludq512_mask, + __builtin_ia32_pord512_mask, __builtin_ia32_porq512_mask, + __builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask, + __builtin_ia32_prolvd512_mask, __builtin_ia32_prolvq512_mask, + __builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask, + __builtin_ia32_prorvd512_mask, __builtin_ia32_prorvq512_mask, + __builtin_ia32_pshufd512_mask, __builtin_ia32_pslld512_mask, + __builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask, + __builtin_ia32_psllqi512_mask, __builtin_ia32_psllv16si_mask, + __builtin_ia32_psllv8di_mask, __builtin_ia32_psrad512_mask, + __builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask, + __builtin_ia32_psraqi512_mask, __builtin_ia32_psrav16si_mask, + __builtin_ia32_psrav8di_mask, __builtin_ia32_psrld512_mask, + __builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask, + __builtin_ia32_psrlqi512_mask, __builtin_ia32_psrlv16si_mask, + __builtin_ia32_psrlv8di_mask, __builtin_ia32_psubd512_mask, + __builtin_ia32_psubq512_mask, __builtin_ia32_ptestmd512, + __builtin_ia32_ptestmq512, __builtin_ia32_ptestnmd512, + __builtin_ia32_ptestnmq512, __builtin_ia32_punpckhdq512_mask, + __builtin_ia32_punpckhqdq512_mask, __builtin_ia32_punpckldq512_mask, + __builtin_ia32_punpcklqdq512_mask, __builtin_ia32_pxord512_mask, + __builtin_ia32_pxorq512_mask, __builtin_ia32_rcp14pd512_mask, + __builtin_ia32_rcp14ps512_mask, __builtin_ia32_rcp14sd_mask, + __builtin_ia32_rcp14ss_mask, __builtin_ia32_rsqrt14pd512_mask, + __builtin_ia32_rsqrt14ps512_mask, __builtin_ia32_rsqrt14sd_mask, + __builtin_ia32_rsqrt14ss_mask, __builtin_ia32_shufpd512_mask, + __builtin_ia32_shufps512_mask, __builtin_ia32_shuf_f32x4_mask, + __builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask, + __builtin_ia32_shuf_i64x2_mask, __builtin_ia32_ucmpd512_mask, + __builtin_ia32_ucmpq512_mask, __builtin_ia32_unpckhpd512_mask, + __builtin_ia32_unpckhps512_mask, __builtin_ia32_unpcklpd512_mask, + __builtin_ia32_unpcklps512_mask, __builtin_ia32_vplzcntd_512_mask, + __builtin_ia32_vplzcntq_512_mask, + __builtin_ia32_vpconflictsi_512_mask, + __builtin_ia32_vpconflictdi_512_mask, __builtin_ia32_permdf512_mask, + __builtin_ia32_permdi512_mask, __builtin_ia32_vpermi2vard512_mask, + __builtin_ia32_vpermi2varpd512_mask, + __builtin_ia32_vpermi2varps512_mask, + __builtin_ia32_vpermi2varq512_mask, __builtin_ia32_vpermilpd512_mask, + __builtin_ia32_vpermilps512_mask, __builtin_ia32_vpermilvarpd512_mask, + __builtin_ia32_vpermilvarps512_mask, + __builtin_ia32_vpermt2vard512_mask, + __builtin_ia32_vpermt2vard512_maskz, + __builtin_ia32_vpermt2varpd512_mask, + __builtin_ia32_vpermt2varpd512_maskz, + __builtin_ia32_vpermt2varps512_mask, + __builtin_ia32_vpermt2varps512_maskz, + __builtin_ia32_vpermt2varq512_mask, + __builtin_ia32_vpermt2varq512_maskz, __builtin_ia32_permvardf512_mask, + __builtin_ia32_permvardi512_mask, __builtin_ia32_permvarsf512_mask, + __builtin_ia32_permvarsi512_mask, __builtin_ia32_pternlogd512_mask, + __builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask, + __builtin_ia32_pternlogq512_maskz, __builtin_ia32_copysignps512, + __builtin_ia32_copysignpd512, __builtin_ia32_sqrtpd512, + __builtin_ia32_sqrtps512, __builtin_ia32_exp2ps, + __builtin_ia32_roundpd_az_vec_pack_sfix512, + __builtin_ia32_floorpd_vec_pack_sfix512, + __builtin_ia32_ceilpd_vec_pack_sfix512, __builtin_ia32_kandhi, + __builtin_ia32_kandnhi, __builtin_ia32_knothi, __builtin_ia32_korhi, + __builtin_ia32_kortestchi, __builtin_ia32_kortestzhi, + __builtin_ia32_kunpckhi, __builtin_ia32_kxnorhi, + __builtin_ia32_kxorhi, __builtin_ia32_addpd512_mask, + __builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask, + __builtin_ia32_addss_mask, __builtin_ia32_cmppd512_mask, + __builtin_ia32_cmpps512_mask, __builtin_ia32_cmpsd_mask, + __builtin_ia32_cmpss_mask, __builtin_ia32_vcomisd, + __builtin_ia32_vcomiss, __builtin_ia32_cvtdq2ps512_mask, + __builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask, + __builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_vcvtph2ps512_mask, + __builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask, + __builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask, + __builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32, + __builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask, + __builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask, + __builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask, + __builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64, + __builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64, + __builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask, + __builtin_ia32_divsd_mask, __builtin_ia32_divss_mask, + __builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz, + __builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz, + __builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz, + __builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz, + __builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask, + __builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask, + __builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask, + __builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask, + __builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask, + __builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask, + __builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask, + __builtin_ia32_minsd_mask, __builtin_ia32_minss_mask, + __builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask, + __builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask, + __builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask, + __builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask, + __builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask, + __builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask, + __builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask, + __builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask, + __builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask, + __builtin_ia32_subsd_mask, __builtin_ia32_subss_mask, + __builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64, + __builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64, + __builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64, + __builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64, + __builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64, + __builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64, + __builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64, + __builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64, + __builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3, + __builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask, + __builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz, + __builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3, + __builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask, + __builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz, + __builtin_ia32_vfmaddsubpd512_mask, + __builtin_ia32_vfmaddsubpd512_mask3, + __builtin_ia32_vfmaddsubpd512_maskz, + __builtin_ia32_vfmaddsubps512_mask, + __builtin_ia32_vfmaddsubps512_mask3, + __builtin_ia32_vfmaddsubps512_maskz, + __builtin_ia32_vfmsubaddpd512_mask3, + __builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3, + __builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3, + __builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask, + __builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask, + __builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask, + __builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_exp2pd_mask, + __builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask, + __builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask, + __builtin_ia32_rsqrt28ps_mask, __builtin_ia32_gathersiv16sf, + __builtin_ia32_gathersiv8df, __builtin_ia32_gatherdiv16sf, + __builtin_ia32_gatherdiv8df, __builtin_ia32_gathersiv16si, + __builtin_ia32_gathersiv8di, __builtin_ia32_gatherdiv16si, + __builtin_ia32_gatherdiv8di, __builtin_ia32_gatheraltsiv8df , + __builtin_ia32_gatheraltdiv8sf , __builtin_ia32_gatheraltsiv8di , + __builtin_ia32_gatheraltdiv8si , __builtin_ia32_scattersiv16sf, + __builtin_ia32_scattersiv8df, __builtin_ia32_scatterdiv16sf, + __builtin_ia32_scatterdiv8df, __builtin_ia32_scattersiv16si, + __builtin_ia32_scattersiv8di, __builtin_ia32_scatterdiv16si, + __builtin_ia32_scatterdiv8di, __builtin_ia32_gatherpfdps, + __builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps, + __builtin_ia32_scatterpfqps. + (ix86_init_mmx_sse_builtins): Handle builtins with AVX512 embeded + rounding, builtins for AVX512 gathers/scatters. + (ix86_expand_args_builtin): Handle new functions types, add warnings + for masked builtins. + (ix86_erase_embedded_rounding): Handle patterns with embedded rounding. + (ix86_expand_sse_comi_round): Ditto. + (ix86_expand_round_builtin): Ditto. + (ix86_expand_builtin): Handle AVX512's gathers/scatters and kortest{z}. + Call ix86_expand_round_builtin. + * config/i386/immintrin.h: Add avx512fintrin.h, avx512erintrin.h, + avx512pfintrin.h, avx512cdintrin.h. + +2013-12-31 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (MAX_CLASSES): Increase number of classes. + (classify_argument): Extend for 512 bit vectors. + (construct_container): Ditto. + (function_arg_advance_32): Ditto. + (function_arg_advance_64): Ditto. + (function_arg_32): Ditto. + (function_arg_64): Ditto. + (function_value_32): Ditto. + (return_in_memory_32): Ditto. + (ix86_gimplify_va_arg): Ditto. + (standard_sse_constant_p): Ditto. + (standard_sse_constant_opcode): Ditto. + (ix86_expand_vector_convert_uns_vsivsf): Ditto. + (ix86_build_const_vector): Ditto. + (ix86_build_signbit_mask): Ditto. + (ix86_expand_sse_cmp): Extend for AVX512. + (ix86_expand_sse_movcc): Ditto. + (ix86_expand_int_vcond): Ditto. + (ix86_expand_vec_perm): Ditto. + (ix86_expand_sse_unpack): Ditto. + (ix86_builtin_vectorized_function): Ditto. + (ix86_vectorize_builtin_gather): Ditto. + (avx_vpermilp_parallel): Ditto. + (ix86_rtx_costs): Ditto. + (ix86_expand_vector_init_duplicate): Ditto. + (ix86_expand_vector_init_concat): Ditto. + (ix86_expand_vector_init_general): Ditto. + (ix86_expand_vector_extract): Ditto. + (emit_reduc_half): Ditto. + (ix86_vector_mode_supported_p): Ditto. + (ix86_emit_swdivsf): Ditto. + (ix86_emit_swsqrtsf): Ditto. + (expand_vec_perm_1): Ditto. + (ix86_vectorize_vec_perm_const_ok): Ditto. + (ix86_expand_mul_widen_evenodd): Ditto. + (ix86_expand_sse2_mulvxdi3): Ditto. + (ix86_preferred_simd_mode): Ditto. + (ix86_autovectorize_vector_sizes): Ditto. + (ix86_expand_vec_perm_vpermi2): New. + (ix86_vector_duplicate_value): Ditto. + (IX86_BUILTIN_SQRTPD512, IX86_BUILTIN_EXP2PS, + IX86_BUILTIN_SQRTPS_NR512, IX86_BUILTIN_GATHER3ALTDIV16SF, + IX86_BUILTIN_GATHER3ALTDIV16SI, IX86_BUILTIN_GATHER3ALTSIV8DF, + IX86_BUILTIN_GATHER3ALTSIV8DI, IX86_BUILTIN_GATHER3DIV16SF, + IX86_BUILTIN_GATHER3DIV16SI, IX86_BUILTIN_GATHER3DIV8DF, + IX86_BUILTIN_GATHER3DIV8DI, IX86_BUILTIN_GATHER3SIV16SF, + IX86_BUILTIN_GATHER3SIV16SI, IX86_BUILTIN_GATHER3SIV8DF, + IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, IX86_BUILTIN_CPYSGNPS512, + IX86_BUILTIN_CPYSGNPD512, IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512, + IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512): Ditto. + * config/i386/sse.md (*mov<mode>_internal): Disable SSE typeless + stores vectors > 128bit (AVX*). + (<sse>_storeu<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse2_avx_avx512f>_storedqu<mode>): Extend for AVX-512, disable + SSE typeless stores vectors > 128bit (AVX*). + (fixuns_trunc<mode><sseintvecmodelower>2): Extend for AVX-512. + (vec_pack_ufix_trunc_<mode>): Ditto. + (vec_unpacku_float_hi_v16si): New. + * tree-vect-stmts.c (vectorizable_load): Support AVX512's gathers. + * tree-vectorizer.h (MAX_VECTORIZATION_FACTOR): Extend for 512 bit + vectors. + +2013-12-31 Chung-Lin Tang <cltang@codesourcery.com> + Sandra Loosemore <sandra@codesourcery.com> + Based on patches from Altera Corporation + + * config.gcc (nios2-*-*): Add nios2 config targets. + * configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case. + ("$cpu_type"): Add nios2 as new cpu type. + * configure: Regenerate. + * config/nios2/nios2.c: New file. + * config/nios2/nios2.h: New file. + * config/nios2/nios2-opts.h: New file. + * config/nios2/nios2-protos.h: New file. + * config/nios2/elf.h: New file. + * config/nios2/elf.opt: New file. + * config/nios2/linux.h: New file. + * config/nios2/nios2.opt: New file. + * config/nios2/nios2.md: New file. + * config/nios2/predicates.md: New file. + * config/nios2/constraints.md: New file. + * config/nios2/t-nios2: New file. + * common/config/nios2/nios2-common.c: New file. + * doc/invoke.texi (Nios II options): Document Nios II specific options. + * doc/md.texi (Nios II family): Document Nios II specific constraints. + * doc/extend.texi (Function Specific Option Pragmas): Document + Nios II supported target pragma functionality. + +2013-12-30 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59591 + * tree-vect-stmts.c (vectorizable_mask_load_store): Fix up handling + of modifier = NARROW masked gathers. + (permute_vec_elements): Use gimple_get_lhs instead of + gimple_assign_lhs. + +2013-12-30 Nick Clifton <nickc@redhat.com> + Peter Bigot <bigotp@acm.org> + + PR target/59613 + * stor-layout.c (get_mode_bounds): Use GET_MODE_PRECISION instead + of GET_MODE_BITSIZE. + +2013-12-30 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.c (msp430_print_operand): Rename %B to %b + and %A to %Q. Add %A, %B, %C and %D as selectors for 16-bit parts + of a 64-bit operand. + * config/msp430/msp430.md: Replace uses of %B with %b and uses of + %A with %q. + +2013-12-30 Felix Yang <felix.yang@huawei.com> + + * ira-costs.c (cost_classes_hasher::equal): Check equality of + memcmp and 0 if no difference exists for HV1 and HV2. + +2013-12-30 Jakub Jelinek <jakub@redhat.com> + + PR target/59501 + * config/i386/i386.c (ix86_save_reg): Don't return true for drap_reg + if !crtl->stack_realign_needed. + (ix86_finalize_stack_realign_flags): If drap_reg isn't live on entry + and stack_realign_needed will be false, clear drap_reg and need_drap. + Optimize leaf functions that don't need stack frame even if + crtl->need_drap. + +2013-12-30 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59605 + * config/i386/i386.c (ix86_expand_set_or_movmem): Create + jump_around_label only if it doesn't exist. + +2013-12-28 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (output file options): Document -fada-spec-parent. + +2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (avx512f_fixupimm<mode>_maskz): Extend to support + EVEX's RC. + (avx512f_sfixupimm<mode>_maskz): Ditto. + * config/i386/subst.md (round_saeonly_expand_name): New. + (round_saeonly_expand_nimm_predicate): Ditto. + (round_saeonly_expand_operand6): Ditto. + (round_saeonly_expand): Ditto. + +2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (avx512f_fmadd_<mode>_maskz): Extend to support + EVEX's RC. + (avx512f_fmaddsub_<mode>_maskz): Ditto. + * config/i386/subst.md (round_expand_name): New. + (round_expand_nimm_predicate): Ditto. + (round_expand_operand): Ditto. + (round_expand): Ditto. + +2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (<code><mode>3<mask_name>): Extend to support + EVEX's SAE mode. + (*<code><mode>3_finite<mask_name>): Ditto. + (*<code><mode>3<mask_name>): Ditto. + (avx512f_cmp<mode>3<mask_scalar_merge_name>): Ditto. + (avx512f_vmcmp<mode>3): Ditto. + (avx512f_vmcmp<mode>3_mask): Ditto. + (<sse>_comi): Ditto. + (<sse>_ucomi): Ditto. + (sse_cvttss2si): Ditto. + (sse_cvttss2siq): Ditto. + (<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto. + (avx512f_vcvttss2usi): Ditto. + (avx512f_vcvttss2usiq): Ditto. + (avx512f_vcvttsd2usi): Ditto. + (avx512f_vcvttsd2usiq): Ditto. + (sse2_cvttsd2si): Ditto. + (sse2_cvttsd2siq): Ditto. + (<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto. + (<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto. + (avx512f_getexp<mode><mask_name>): Ditto. + (avx512f_fixupimm<mode><sd_maskz_name>): Ditto. + (avx512f_fixupimm<mode>_mask): Ditto. + (avx512f_sfixupimm<mode><sd_maskz_name>): Ditto. + (avx512f_sfixupimm<mode>_mask): Ditto. + (avx512f_rndscale<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto. + (avx512f_getmant<mode><mask_name>): Ditto. + * config/i386/subst.md (round_saeonly_name): New. + (round_saeonly_mask_operand2): Ditto. + (round_saeonly_mask_operand3): Ditto. + (round_saeonly_mask_scalar_operand3): Ditto. + (round_saeonly_mask_scalar_operand4): Ditto. + (round_saeonly_mask_scalar_merge_operand4): Ditto. + (round_saeonly_sd_mask_operand5): Ditto. + (round_saeonly_op2): Ditto. + (round_saeonly_op4): Ditto. + (round_saeonly_op5): Ditto. + (round_saeonly_op6): Ditto. + (round_saeonly_mask_op2): Ditto. + (round_saeonly_mask_op3): Ditto. + (round_saeonly_mask_scalar_op3): Ditto. + (round_saeonly_mask_scalar_op4): Ditto. + (round_saeonly_mask_scalar_merge_op4): Ditto. + (round_saeonly_sd_mask_op5): Ditto. + (round_saeonly_constraint): Ditto. + (round_saeonly_constraint2): Ditto. + (round_saeonly_nimm_predicate): Ditto. + (round_saeonly_mode512bit_condition): Ditto. + (round_saeonly): Ditto. + +2013-12-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (ix86_print_operand): Print EVEX's RC modifiers. + * config/i386/i386.md (define_constants): Define EVEx's RC constants. + * gcc/config/i386/sse.md (<plusminus_insn><mode>3<mask_name>): Extend + to support EVEX's rounding control. + (*<plusminus_insn><mode>3<mask_name>): Ditto. + (mul<mode>3<mask_name>): Ditto. + (*mul<mode>3<mask_name>): Ditto. + (<sse>_div<mode>3<mask_name>): Ditto. + (<sse>_sqrt<mode>2<mask_name>): Ditto. + (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>): Ditto. + (avx512f_fmadd_<mode>_mask): Ditto. + (avx512f_fmadd_<mode>_mask3): Ditto. + (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>): Ditto. + (avx512f_fmsub_<mode>_mask): Ditto. + (avx512f_fmsub_<mode>_mask3): Ditto. + (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>): Ditto. + (avx512f_fnmadd_<mode>_mask): Ditto. + (avx512f_fnmadd_<mode>_mask3): Ditto. + (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>): Ditto. + (avx512f_fnmsub_<mode>_mask): Ditto. + (avx512f_fnmsub_<mode>_mask3): Ditto. + (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name>): Ditto. + (avx512f_fmaddsub_<mode>_mask): Ditto. + (avx512f_fmaddsub_<mode>_mask3): Ditto. + (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name>): Ditto. + (avx512f_fmsubadd_<mode>_mask): Ditto. + (avx512f_fmsubadd_<mode>_mask3): Ditto. + (fmai_vmfmadd_<mode>): Ditto. + (*fmai_fmadd_<mode>): Ditto. + (*fmai_fmsub_<mode>): Ditto. + (*fmai_fnmadd_<mode>): Ditto. + (*fmai_fnmsub_<mode>): Ditto. + (sse_cvtsi2ss): Ditto. + (sse_cvtsi2ssq): Ditto. + (sse_cvtss2si): Ditto. + (sse_cvtss2siq): Ditto. + (cvtusi2<ssescalarmodesuffix>32): Ditto. + (cvtusi2<ssescalarmodesuffix>64): Ditto. + (float<sseintvecmodelower><mode>2<mask_name>): Ditto. + (ufloatv16siv16sf2<mask_name>): Ditto. + (<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name>): Ditto. + (<mask_codefor>avx512f_ufix_notruncv16sfv16si<mask_name>): Ditto. + (sse2_cvtsi2sdq): Ditto. + (avx512f_vcvtss2usi): Ditto. + (avx512f_vcvtss2usiq): Ditto. + (avx512f_vcvtsd2usi): Ditto. + (avx512f_vcvtsd2usiq): Ditto. + (sse2_cvtsd2si): Ditto. + (sse2_cvtsd2siq): Ditto. + (<mask_codefor>avx512f_cvtpd2dq512<mask_name>): Ditto. + (avx512f_ufix_notruncv8dfv8si<mask_name>): Ditto. + (<mask_codefor>avx512f_cvtpd2ps512<mask_name>): Ditto. + (avx512f_scalef<mode><mask_name>): Ditto. + (<code><mode>3<mask_name>): Ditto. + (*avx2_<code><mode>3<mask_name>): Ditto. + (avx512er_exp2<mode><mask_name): Ditto. + (<mask_codefor>avx512er_rcp28<mode><mask_name>): Ditto. + (<mask_codefor>avx512er_rsqrt28<mode><mask_name>): Ditto. + (avx512f_fmadd_<mode>_maskz): New. + * config/i386/subst.md (SUBST_A): New. + (round_name): Ditto. + (round_mask_operand2): Ditto. + (round_mask_operand3): Ditto. + (round_mask_scalar_operand3): Ditto. + (round_sd_mask_operand4): Ditto. + (round_op2): Ditto. + (round_op3): Ditto. + (round_op4): Ditto. + (round_op5): Ditto. + (round_op6): Ditto. + (round_mask_op2): Ditto. + (round_mask_op3): Ditto. + (round_mask_scalar_op3): Ditto. + (round_sd_mask_op4): Ditto. + (round_constraint): Ditto. + (round_constraint2): Ditto. + (round_constraint3): Ditto. + (round_nimm_predicate): Ditto. + (round_mode512bit_condition): Ditto. + (round_modev4sf_condition): Ditto. + (round_codefor): Ditto. + (round_opnum): Ditto. + (round): Ditto. + +2013-12-26 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59588 + * config/i386/i386.c (ix86_option_override_internal): Don't + check generic tuning. Don't change i686 tuning. + +2013-12-26 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59601 + * config/i386/i386.c (get_builtin_code_for_version): Map + PROCESSOR_NEHALEM to "corei7". + +2013-12-26 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c (get_builtin_code_for_version): Rename AMD + CPU names M_AMD_BOBCAT to M_AMD_BTVER1 and M_AMD_JAGUAR + to M_AMD_BTVER2. + (processor_model): Likewise. + (arch_names_table): Likewise. + +2013-12-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/driver-i386.c (decode_caches_intel): Add missing entries. + +2013-12-25 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59587 + * config/i386/i386.c (struct ptt): Add a field for processor name. + (processor_target_table): Sync with processor_type. + Add processor names. + (cpu_names): Removed. + (ix86_option_override_internal): Default x_ix86_tune_string + to processor_target_table[TARGET_CPU_DEFAULT].name. + (ix86_function_specific_print): Assert arch and tune < PROCESSOR_max. + Use processor_target_table to print arch and tune names. + * config/i386/i386.h (TARGET_CPU_DEFAULT): Default to + PROCESSOR_GENERIC. + (target_cpu_default): Removed. + (processor_type): Reordered. + +2013-12-25 Allan Sandfeld Jensen <sandfeld@kde.org> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/59422 + * config/i386/i386.c (get_builtin_code_for_version): Handle + PROCESSOR_HASWELL, PROCESSOR_SILVERMONT, PROCESSOR_BTVER1, + PROCESSOR_BTVER2, PROCESSOR_BDVER3 and PROCESSOR_BDVER4. + Change priority of PROCESSOR_BDVER1 to P_PROC_XOP. + (fold_builtin_cpu): Add "ivybridge", "haswell", "bonnell", + "silvermont", "bobcat" and "jaguar" CPU names. Add "sse4a", + "fma4", "xop" and "fma" ISA names. + +2013-12-24 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (ix86_option_override_internal): Check + opts->x_ix86_arch_string instead of ix86_arch_string. + +2013-12-24 Renlin Li <Renlin.Li@arm.com> + + * config/arm/arm-protos.h (vfp_const_double_for_bits): Declare. + * config/arm/constraints.md (Dp): Define new constraint. + * config/arm/predicates.md (const_double_vcvt_power_of_two): Define + new predicate. + * config/arm/arm.c (arm_print_operand): Add print for new fucntion. + (vfp3_const_double_for_bits): New function. + * config/arm/vfp.md (combine_vcvtf2i): Define new instruction. + +2013-12-23 Hans-Peter Nilsson <hp@axis.com> + + PR target/59203 + * config/cris/cris.c (cris_pic_symbol_type_of): Fix typo, + checking t1 twice instead of t1 and t2 respectively. + + PR middle-end/59584 + * config/cris/predicates.md (cris_nonsp_register_operand): + New define_predicate. + * config/cris/cris.md: Replace register_operand with + cris_nonsp_register_operand for destinations in all + define_splits where a register is set more than once. + +2013-12-23 Jason Merrill <jason@redhat.com> + + * gdbinit.in (input_line, input_filename): Define. + + * cgraph.h (struct cgraph_node): Add calls_comdat_local. + (symtab_comdat_local_p, symtab_in_same_comdat_p): New. + * cif-code.def: Add USES_COMDAT_LOCAL. + * symtab.c (verify_symtab_base): Make sure we don't refer to a + comdat-local symbol from outside its comdat. + * cgraph.c (verify_cgraph_node): Likewise. + * cgraphunit.c (mark_functions_to_output): Don't mark comdat-locals. + * ipa.c (symtab_remove_unreachable_nodes): Likewise. + (function_and_variable_visibility): Handle comdat-local fns. + * ipa-cp.c (determine_versionability): Don't clone comdat-locals. + * ipa-inline-analysis.c (compute_inline_parameters): Update + calls_comdat_local. + * ipa-inline-transform.c (inline_call): Likewise. + (save_inline_function_body): Don't clear DECL_COMDAT_GROUP. + * ipa-inline.c (can_inline_edge_p): Check calls_comdat_local. + * lto-cgraph.c (input_overwrite_node): Read calls_comdat_local. + (lto_output_node): Write it. + * symtab.c (symtab_dissolve_same_comdat_group_list): Clear + DECL_COMDAT_GROUP for comdat-locals. + +2013-12-23 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (processor_target_table): Move Bonnell and + Silvermont entries before generic. + +2013-12-23 Bingfeng Mei <bmei@broadcom.com> + + PR middle-end/59569 + * tree-vect-stmts.c (vectorizable_store): Skip permutation for + consant/external operand, and add a few missing \n. + +2013-12-23 H.J. Lu <hongjiu.lu@intel.com> + Tocar Ilya <ilya.tocar@intel.com> + + * config/i386/core2.md: Replace corei7 with nehalem. + + * config/i386/driver-i386.c (host_detect_local_cpu): Use nehalem, + westmere, sandybridge, ivybridge, haswell, bonnell, silvermont + for cpu names. + + * config/i386/i386-c.c (ix86_target_macros_internal): Replace + PROCESSOR_COREI7, PROCESSOR_COREI7_AVX, PROCESSOR_ATOM, + PROCESSOR_SLM with PROCESSOR_NEHALEM, PROCESSOR_SANDYBRIDGE, + PROCESSOR_BONNELL, PROCESSOR_SILVERMONT. Define + __nehalem/__nehalem__, __sandybridge/__sandybridge__, + __haswell/__haswell__, __tune_nehalem__, __tune_sandybridge__, + __tune_haswell__, __bonnell/__bonnell__, + __silvermont/__silvermont__, __tune_bonnell__, + __tune_silvermont__. + + * config/i386/i386.c (m_COREI7): Renamed to ... + (m_NEHALEM): This. + (m_COREI7_AVX): Renamed to ... + (m_SANDYBRIDGE): This. + (m_ATOM): Renamed to ... + (m_BONNELL): This. + (m_SLM): Renamed to ... + (m_SILVERMONT): This. + (m_CORE_ALL): Updated. + (cpu_names): Add "nehalem", "westmere", "sandybridge", + "ivybridge", "haswell", "broadwell", "bonnell", "silvermont". + (PTA_CORE2): New. + (PTA_NEHALEM): Likewise. + (PTA_WESTMERE): Likewise. + (PTA_SANDYBRIDGE): Likewise. + (PTA_IVYBRIDGE): Likewise. + (PTA_HASWELL): Likewise. + (PTA_BROADWELL): Likewise. + (PTA_BONNELL): Likewise. + (PTA_SILVERMONT): Likewise. + (ix86_option_override_internal): Use new PTA_XXX. Add nehalem, + westmere, sandybridge, ivybridge, haswell, bonnell, silvermont. + (ix86_lea_outperforms): Updated. + (ix86_issue_rate): Likewise. + (ix86_adjust_cost): Likewise. + (ia32_multipass_dfa_lookahead): Likewise. + (do_reorder_for_imul): Likewise. + (swap_top_of_ready_list): Likewise. + (ix86_sched_reorder): Likewise. + (ix86_sched_init_global): Likewise. + (get_builtin_code_for_version): Likewise. + (processor_model): Replace M_INTEL_ATOM, M_INTEL_SLM with + M_INTEL_BONNELL, M_INTEL_SILVERMONT. + (arch_names_table): Updated. + + * config/i386/i386.h (TARGET_COREI7): Removed. + (TARGET_COREI7_AVX): Likewise. + (TARGET_ATOM): Likewise. + (TARGET_SLM): Likewise. + (TARGET_NEHALEM): New. + (TARGET_SANDYBRIDGE): Likewise. + (TARGET_BONNELL): Likewise. + (TARGET_SILVERMONT): Likewise. + (target_cpu_default): Add TARGET_CPU_DEFAULT_core_avx2, + TARGET_CPU_DEFAULT_nehalem, TARGET_CPU_DEFAULT_westmere, + TARGET_CPU_DEFAULT_sandybridge, TARGET_CPU_DEFAULT_ivybridge, + TARGET_CPU_DEFAULT_broadwell, TARGET_CPU_DEFAULT_bonnell, + TARGET_CPU_DEFAULT_silvermont. Move TARGET_CPU_DEFAULT_haswell + before TARGET_CPU_DEFAULT_broadwell. + (processor_type): Replace PROCESSOR_COREI7, PROCESSOR_COREI7_AVX, + PROCESSOR_ATOM, PROCESSOR_SLM with PROCESSOR_NEHALEM, + PROCESSOR_SANDYBRIDGE, PROCESSOR_BONNELL, PROCESSOR_SILVERMONT. + + * config/i386/i386.md (cpu): Replace corei7 with nehalem. + + * config/i386/x86-tune.def: Updated. + + * doc/invoke.texi: Replace corei7, corei7-avx, core-avx-i, + core-avx2, atom, slm with nehalem, sandybridge, ivybridge, + haswell, bonnel, silvermont. Add westmere. + +2013-12-23 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/57422 + * sel-sched.c (fill_vec_av_set): Assert that the fence insn + can always be scheduled in its current form. + +2013-12-23 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/57422 + * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling + add_to_hard_reg_set. + +2013-12-20 Sharad Singhai <singhai@google.com> + + * Makefile.in: Add optinfo.texi. + * doc/invoke.texi: Fix typo. + * doc/optinfo.texi: New documentation for optimization info. + * doc/passes.texi: Add new node. + +2013-12-20 Trevor saunders <tsaunders@mozilla.com> + + * vec.h (stack_vec): Convert to a templaate specialization of + auto_vec. + * config/i386/i386.c, df-scan.c, function.c, genautomata.c, + gimplify.c, graphite-clast-to-gimple.c, graphite-dependences.c, + graphite-scop-detection.c, graphite-sese-to-poly.c, hw-doloop.c, + trans-mem.c, tree-call-cdce.c, tree-data-ref.c, tree-dfa.c, + tree-if-conv.c, tree-inline.c, tree-loop-distribution.c, + tree-parloops.c, tree-predcom.c, tree-ssa-alias.c, + tree-ssa-loop-ivcanon.c, tree-ssa-phiopt.c, tree-ssa-threadedge.c, + tree-ssa-uncprop.c, tree-vect-loop.c, tree-vect-patterns.c, + tree-vect-slp.c, tree-vect-stmts.c, var-tracking.c: Adjust. + +2013-12-20 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_expand_prologue): In a nested APCS frame with + arguments to push onto the stack and no varargs, save ip into the last + stack slot if r3 isn't available on entry. + +2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64. + * config/arm/arm_neon.h: Regenerate. + * config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64. + * doc/arm-neon-intrinsics.texi: Regenerate. + +2013-12-20 Vladimir Makarov <vmakarov@redhat.com> + + * config/arm/arm.h (THUMB_SECONDARY_OUTPUT_RELOAD_CLASS): Return + NO_REGS for LRA. + +2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm_acle.h: Add underscores before variables. + +2013-12-20 Bingfeng Mei <bmei@broadcom.com> + + PR tree-optimization/59544 + * tree-vect-stmts.c (perm_mask_for_reverse): Move before + vectorizable_store. + (vectorizable_store): Handle negative step. + +2013-12-20 Tocar Ilya <ilya.tocar@intel.com> + + * config.gcc: Support march=broadwell. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell. + * config/i386/i386.c (ix86_option_override_internal): Add broadwell. + * doc/invoke.texi: Document march=broadwell. + +2013-12-20 Jakub Jelinek <jakub@redhat.com> + + * ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h. + (ubsan_type_descriptor): Handle BOOLEAN_TYPE and ENUMERAL_TYPE + like INTEGER_TYPE. + (instrument_bool_enum_load): New function. + (ubsan_pass): Call it. + (gate_ubsan): Also enable for SANITIZE_BOOL or SANITIZE_ENUM. + * asan.c (create_cond_insert_point): No longer static. + * asan.h (create_cond_insert_point): Declare. + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE): New + built-in. + * opts.c (common_handle_option): Handle -fsanitize=bool and + -fsanitize=enum. + * builtins.c (fold_builtin_memory_op): When sanitizing bool + and enum loads, don't use enum or bool types for memcpy folding. + * flag-types.h (SANITIZE_BOOL, SANITIZE_ENUM): New. + (SANITIZE_UNDEFINED): Or these in. + +2013-12-20 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.h (NDS32_MODE_TYPE_ALIGN): New macro. + (NDS32_AVAILABLE_REGNUM_FOR_ARG): Use more accurate alignment checking + to determine available register number. + * config/nds32/nds32.c (nds32_needs_double_word_align): Use new + macro NDS32_MODE_TYPE_ALIGN. + (nds32_function_arg): Refine code layout. + +2013-12-19 Jeff Law <law@redhat.com> + + * doc/invoke.texi: (dump-rtl-ree): Fix typo and clarify ree + handles both zero and sign extension. + +2013-12-19 Teresa Johnson <tejohnson@google.com> + + PR gcov-profile/59542 + * bb-reorder.c (duplicate_computed_gotos): Invoke fixup_partitions + if we have made any changes. + +2013-12-19 Jakub Jelinek <jakub@redhat.com> + + PR other/59545 + * genattrtab.c (struct attr_hash): Change hashcode type to unsigned. + (attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter + to unsigned. + (attr_rtx_1): Change hashcode variable to unsigned. + (attr_string): Likewise. Perform first multiplication in + unsigned type. + * ifcvt.c (noce_try_store_flag_constants): Avoid signed integer + overflows. + * double-int.c (neg_double): Likewise. + * stor-layout.c (set_min_and_max_values_for_integral_type): Likewise. + * combine.c (force_to_mode): Likewise. + * postreload.c (move2add_use_add2_insn, move2add_use_add3_insn, + reload_cse_move2add, move2add_note_store): Likewise. + * simplify-rtx.c (simplify_const_unary_operation, + simplify_const_binary_operation): Likewise. + * ipa-split.c (find_split_points): Initialize first.can_split + and first.non_ssa_vars. + * gengtype-state.c (read_state_files_list): Fix up check. + * genautomata.c (reserv_sets_hash_value): Use portable rotation idiom. + +2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/neon-docgen.ml: Add crypto intrinsics documentation. + * doc/arm-neon-intrinsics.texi: Regenerate. + +2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO". + +2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (enum arm_builtins): Add crypto builtins. + (arm_init_neon_builtins): Handle crypto builtins. + (bdesc_2arg): Likewise. + (bdesc_1arg): Likewise. + (bdesc_3arg): New table. + (arm_expand_ternop_builtin): New function. + (arm_expand_unop_builtin): Handle sha1h explicitly. + (arm_expand_builtin): Handle ternary builtins. + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): + Define __ARM_FEATURE_CRYPTO. + * config/arm/arm.md: Include crypto.md. + (is_neon_type): Add crypto types. + * config/arm/arm_neon_builtins.def: Add TImode reinterprets. + * config/arm/crypto.def: New. + * config/arm/crypto.md: Likewise. + * config/arm/iterators.md (CRYPTO_UNARY): New int iterator. + (CRYPTO_BINARY): Likewise. + (CRYPTO_TERNARY): Likewise. + (CRYPTO_SELECTING): Likewise. + (crypto_pattern): New int attribute. + (crypto_size_sfx): Likewise. + (crypto_mode): Likewise. + (crypto_type): Likewise. + * config/arm/neon-gen.ml: Handle poly64_t and poly128_t types. + Handle crypto intrinsics. + * config/arm/neon.ml: Add support for poly64 and polt128 types + and intrinsics. Define crypto intrinsics. + * config/arm/neon.md (neon_vreinterpretti<mode>): New pattern. + (neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator. + (neon_vreinterpretv8hi<mode>): Likewise. + (neon_vreinterpretv4si<mode>): Likewise. + (neon_vreinterpretv4sf<mode>): Likewise. + (neon_vreinterpretv2di<mode>): Likewise. + * config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC) + (UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H) + (UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2) + (UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define. + * config/arm/arm_neon.h: Regenerate. + +2013-12-19 H.J. Lu <hongjiu.lu@intel.com> + + PR driver/59321 + * collect2.c (main): Check -fuse-ld=[bfd|gold] when + DEFAULT_LINKER is defined. + * common.opt (fuse-ld=bfd): Add Driver. + (fuse-ld=gold): Likewise. + * gcc.c (use_ld): New variable. + (driver_handle_option): Set use_ld for OPT_fuse_ld_bfd and + OPT_fuse_ld_gold. + (main): Check -fuse-ld=[bfd|gold] for -print-prog-name=ld. + +2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi. + * config.gcc (extra_headers): Add arm_acle.h. + * config/arm/arm.c (FL_CRC32): Define. + (arm_have_crc): Likewise. + (arm_option_override): Set arm_have_crc. + (arm_builtins): Add CRC32 builtins. + (bdesc_2arg): Likewise. + (arm_init_crc32_builtins): New function. + (arm_init_builtins): Initialise CRC32 builtins. + (arm_file_start): Handle architecture extensions. + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define + __ARM_FEATURE_CRC32. Define __ARM_32BIT_STATE. + (TARGET_CRC32): Define. + * config/arm/arm-arches.def: Add armv8-a+crc. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm.md (type): Add crc. + (<crc_variant>): New insn. + * config/arm/arm_acle.h: New file. + * config/arm/iterators.md (CRC): New int iterator. + (crc_variant, crc_mode): New int attributes. + * confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W, + UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs. + * doc/invoke.texi: Document -march=armv8-a+crc option. + * doc/extend.texi: Document ACLE intrinsics. + +2013-12-19 Charles Baylis <charles.baylis@linaro.org> + + PR target/59142 + * config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb + patterns. + * config/arm/ldmstm.md: Regenerate. + +2013-12-19 Charles Baylis <charles.baylis@linaro.org> + + PR target/59142 + * config/arm/predicates.md (arm_hard_general_register_operand): + New predicate. + (arm_hard_register_operand): Remove. + * config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand + for all patterns. + * config/arm/ldmstm.md: Regenerate. + +2013-12-19 Charles Baylis <charles.baylis@linaro.org> + + PR target/59142 + * config/arm/predicates.md (vfp_hard_register_operand): New predicate. + * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use + vfp_hard_register_operand. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins): + Define builtin types for poly64_t poly128_t. + (TYPES_BINOPP, aarch64_types_binopp_qualifiers): New. + * aarch64/aarch64-simd-builtins.def: Update builtins table. + * config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi, + aarch64_crypto_pmullv2di): New. + * config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for + poly64x2_t mangler. + * config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define. + (vmull_p64, vmull_high_p64): New. + * config/aarch64/iterators.md (UNSPEC_PMULL<2>): New. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Update builtins table. + * config/aarch64/aarch64-simd.md + (aarch64_crypto_sha256h<sha256_op>v4si, aarch64_crypto_sha256su0v4si, + aarch64_crypto_sha256su1v4si): New. + * config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32, + vsha256su0q_u32, vsha256su1q_u32): New. + * config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>): + New. + (CRYPTO_SHA256): New int iterator. + (sha256_op): New int attribute. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Update builtins table. + * config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers, + TYPES_TERNOPU): New. + * config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi, + aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1<sha1_op>v4si, + aarch64_crypto_sha1su0v4si): New. + * config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32, + vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New. + * config/aarch64/iterators.md (UNSPEC_SHA1<CPMH>, UNSPEC_SHA1SU<01>): + New. + (CRYPTO_SHA1): New int iterator. + (sha1_op): New int attribute. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Update builtins table. + * config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers, + TYPES_BINOPU): New. + * config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aes_op>v16qi, + aarch64_crypto_aes<aesmc_op>v16qi): New. + * config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8, + vaesimcq_u8): New. + * config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC, + UNSPEC_AESIMC): New. + (CRYPTO_AES, CRYPTO_AESMC): New int iterators. + (aes_op, aesmc_op): New int attributes. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor, + crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast, + crypto_sha256_slow): New. + +2013-12-19 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64.h (TARGET_CRYPTO): New. + (__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true. + +2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com> + Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New + constant. + (s390_hotpatch_trampoline_halfwords_max): New constant. + (s390_hotpatch_trampoline_halfwords): New static variable. + (get_hotpatch_attribute): New function. + (s390_handle_hotpatch_attribute): New function. + (s390_attribute_table): New target specific attribute table to + implement the hotpatch attribute. + (s390_option_override): Parse hotpatch options. + (s390_function_num_hotpatch_trampoline_halfwords): New function. + (s390_can_inline_p): Implement target hook to + suppress hotpatching for explicitly inlined functions. + (s390_asm_output_function_label): Generate hotpatch prologue. + (TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table. + (TARGET_CAN_INLINE_P): Define to implement target hook. + * config/s390/s390.opt (mhotpatch): New options -mhotpatch, + -mhotpatch=. + * config/s390/s390-protos.h (s390_asm_output_function_label): Add + prototype. + * config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific + function label generation for hotpatching. + (FUNCTION_BOUNDARY): Align functions to eight bytes. + * doc/extend.texi: Document hotpatch attribute. + * doc/invoke.texi: Document -mhotpatch option. + +2013-12-19 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c: Include cfgloop.h. + (ix86_loop_memcount): New function. + (ix86_loop_unroll_adjust): New function. + (TARGET_LOOP_UNROLL_ADJUST): Define. + * config/i386/i386.h + (TARGET_ADJUST_UNROLL): Define. + * config/i386/x86-tune.def + (X86_TUNE_ADJUST_UNROLL): Define. + +2013-12-19 Marek Polacek <polacek@redhat.com> + + * config/i386/i386.c (ix86_parse_stringop_strategy_string): Remove + variable alg. Use index variable i directly. + +2013-12-19 Eric Botcazou <ebotcazou@adacore.com> + + * print-tree.c (print_node) <case tcc_type>: Print no_force_blk_flag + for all types. + +2013-12-19 Monk Chiang <sh.chiang04@gmail.com> + + * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): + Consider TARGET_CPU_DEFAULT settings. + +2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def: Add support for + -mcpu=cortex-a57.cortex-a53. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53. + +2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def: Add new column for SCHEDULER_IDENT. + * config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle SCHEDULER_IDENT. + * config/aarch64/aarch64.c (AARCH64_CORE): Handle SCHEDULER_IDENT. + (aarch64_parse_cpu): mcpu implies a default value for mtune. + * config/aarch64/aarch64.h (AARCH64_CORE): Handle SCHEDULER_IDENT. + +2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> + + * common/config/aarch64/aarch64-common.c + (aarch64_rewrite_selected_cpu): New. + (aarch64_rewrite_mcpu): New. + * config/aarch64/aarch64-protos.h + (aarch64_rewrite_selected_cpu): New. + * config/aarch64/aarch64.h (BIG_LITTLE_SPEC): New. + (BIG_LITTLE_SPEC_FUNCTIONS): Likewise. + (ASM_CPU_SPEC): Likewise. + (EXTRA_SPEC_FUNCTIONS): Likewise. + (EXTRA_SPECS): Likewise. + (ASM_SPEC): Likewise. + * config/aarch64/aarch64.c (aarch64_start_file): Rewrite target + CPU name. + +2013-12-18 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * omp-low.c (simd_clone_clauses_extract): Replaced the string + "cilk simd elemental" with "cilk simd function." + * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen): + Removed a carriage-return from a warning string. + +2013-12-18 Aldy Hernandez <aldyh@redhat.com> + + * passes.c (execute_function_dump): Set graph_dump_initialized + appropriately. + (pass_init_dump_file): Similarly. + (execute_one_pass): Pass new argument to do_per_function. + * tree-pass.h (class opt_pass): New field graph_dump_initialized. + +2013-12-18 Aldy Hernandez <aldyh@redhat.com> + + * doc/tree-ssa.texi (SSA Operands): Remove reference to + SSA_OP_VMAYUSE. + Synchronize SSA_OP* definitions with source. + * ssa-iterators.h: Fix comment for FOR_EACH_IMM_USE_STMT. + Add not to SSA_OP* macro definitions. + +2013-12-18 Jakub Jelinek <jakub@redhat.com> + + PR target/59539 + * config/i386/sse.md + (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>, + <sse2_avx_avx512f>_loaddqu<mode><mask_name>): New expanders, + prefix existing define_insn names with *. + +2013-12-18 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko. + +2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> + Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/t-aprofile: Add cortex-a15.cortex-a7, cortex-a12, + cortex-a57, cortex-a57.cortex-a53. + +2013-12-18 Eric Botcazou <ebotcazou@adacore.com> + + PR debug/59418 + * dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy. + (dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN. + (dwarf2out_frame_debug_expr): Tidy. + +2013-12-18 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (*fma_fmadd_<mode>): Extend to support masking. + (*fma_fmsub_<mode>): Ditto. + (*fma_fnmadd_<mode>): Ditto. + (*fma_fnmsub_<mode>): Ditto. + (*fma_fmaddsub_<mode>): Ditto. + (*fma_fmsubadd_<mode>): Ditto. + (avx512f_vternlog<mode>): Ditto. + (avx512f_fixupimm<mode>): Ditto. + (avx512f_sfixupimm<mode>): Ditto. + (avx512f_vpermi2var<mode>3): Ditto. + (avx512f_vpermt2var<mode>3): Ditto. + (avx512f_fmaddsub_<mode>_maskz): New. + (avx512f_vternlog<mode>_maskz): Ditto. + (avx512f_fixupimm<mode>_maskz): Ditto. + (avx512f_sfixupimm<mode>_maskz): Ditto. + (avx512f_vpermi2var<mode>3_maskz): Ditto. + (avx512f_vpermt2var<mode>3_maskz): Ditto. + (avx512f_expand<mode>_maskz): Ditto. + * config/i386/subst.md (sd_maskz_name): Ditto. + (sd_mask_op4): Ditto. + (sd_mask_op5): Ditto. + (sd_mask_codefor): Ditto. + (sd_mask_mode512bit_condition): Ditto. + (sd): Ditto. + +2013-12-18 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (avx512f_cmp<mode>3): Extend to support masking. + (avx512f_ucmp<mode>3): Ditto. + (avx512f_eq<mode>3): Ditto. + (avx512f_gt<mode>3): Ditto. + (avx512f_testm<mode>3): Ditto. + (avx512f_testnm<mode>3): Ditto. + * config/i386/subst.md (SUBST_S): New. + (mask_scalar_merge_name): Ditto. + (mask_scalar_merge_operand3): Ditto. + (mask_scalar_merge_operand4): Ditto. + (mask_scalar_merge): Ditto. + +2013-12-17 Jan Hubicka <hubicka@ucw.cz> + + PR middle-end/35545 + * gimple-fold.c (fold_gimple_assign): Attempt to devirtualize + OBJ_TYPE_REF. + (gimple_fold_stmt_to_constant_1): Bypass OBJ_TYPE_REF wrappers. + +2013-12-17 Jan Hubicka <hubicka@ucw.cz> + + PR middle-end/35545 + * tree-vrp.c (extract_range_from_unary_expr_1): Handle OBJ_TYPE_REF. + +2013-12-17 Teresa Johnson <tejohnson@google.com> + + PR gcov-profile/59527 + * cfgrtl.c (fixup_reorder_chain): Handle a region-crossing + branch, which can't be eliminated. + +2013-12-18 Martin Liska <marxin.liska@gmail.com> + Jan Hubicka <jh@suse.cz> + + * cgraphunit.c (node_cmp): New function. + (expand_all_functions): Function ordering added. + * common.opt: New profile based function reordering flag introduced. + * lto-partition.c: Support for time profile added. + * lto.c: Likewise. + * predict.c (handle_missing_profiles): Time profile handled in + missing profiles. + +2013-12-17 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59523 + * tree-vectorizer.c (fold_loop_vectorized_call): Call update_stmt + on updated stmts. + +2013-12-17 Aldy Hernandez <aldyh@redhat.com> + + * ipa-inline.c (gate_ipa_inline): Remove. + (const pass_data pass_data_ipa_inline): Unset has_gate. + (class pass_ipa_inline): Remove gate() method. + +2013-12-17 Jan Hubicka <hubicka@ucw.cz> + + * ipa-devirt.c (get_polymorphic_call_info): Fix offset calculatoin + in contains_type_p query. + +2013-12-17 Thomas Schwinge <thomas@codesourcery.com> + + * omp-low.c (tmp_ompfn_id_num): Remove leftover variable definition. + + * tree-pass.h (make_pass_expand_omp_ssa): Remove leftover function + declaration. + + * omp-low.c: Remove leftover comment. + + * omp-low.c (check_combined_parallel): Reflect reality in comment. + + * doc/cfg.texi (Control Flow): Refer to passes.def instead of passes.c. + * doc/passes.texi (Pass manager): Refer to passes.def. + + * doc/gccint.texi (Top): Fix inclusion order. + +2013-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-cores.def (cortex-a12): Use cortexa15 scheduling. + * config/arm/arm.c (arm_issue_rate): Handle cortexa12. + * config/arm/arm.md (generic_vfp): Remove cortexa12. + +2013-12-17 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-cores.def (cortex-a57.cortex-a53): New. + * doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h + (BE8_LINK_SPEC): Handle -mcpu=cortex-a57.cortex-a53. + +2013-12-17 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-cores.def (cortex-a57): New. + * doc/invoke.texi: Document -mcpu=cortex-a57. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h (BE8_LINK_SPEC): Handle -mcpu=cortex-a57. + +2013-12-17 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-cores.def (cortex-a15.cortex-a7): New. + * doc/invoke.texi: Document -mcpu=cortex-a15.cortex-a7. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h + (BE8_LINK_SPEC): Handle -mcpu=cortex-a5.cortex-a7. + +2013-12-17 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-cores.def: Add new column for TUNE_IDENT. + * config/arm/genopt.sh: Improve layout. + * config/arm/arm-tune.md: Regenerate. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-opts.h (ARM_CORE): Modify macro for TUNE_IDENT. + * config/arm/arm.c (ARM_CORE): Modify macro for TUNE_IDENT. + (arm_option_override): When a CPU is chosen, that should also + form the tune target. + * config/arm/arm.h (ARM_CORE): Modify macro for TUNE_IDENT. + +2013-12-17 James Greenhalgh <james.greenhalgh@arm.com> + + * common/config/arm/arm-common.c (arm_rewrite_selected_cpu): New. + (arm_rewrite_mcpu): Likewise. + * config/arm/arm-protos.h (arm_rewrite_selected_cpu): New. + * config/arm/arm.h (BIG_LITTLE_SPEC): New. + (BIG_LITTLE_SPEC_FUNCTIONS): Likewise. + (EXTRA_SPEC_FUNCTIONS): Include BIG_LITTLE_SPEC_FUNCTIONS. + (ASM_CPU_SPEC): Include BIG_LITTLE_SPEC. + * config/arm/arm.c (arm_file_start): Rewrite arm_selecetd_cpu values. + +2013-12-17 Eric Botcazou <ebotcazou@adacore.com> + + * expmed.c (lowpart_bit_field_p): Fix comment. + (store_bit_field_using_insv): Fix formatting. + (store_bit_field): Likewise. + (store_fixed_bit_field): More declaration and remove return. + (store_fixed_bit_field_1): Fix formatting. + (extract_fixed_bit_field): Move declaration. + (extract_fixed_bit_field_1): Simplify. + +2013-12-17 Jan Hubicka <hubicka@ucw.cz> + + * ipa-utils.h (possible_polymorphic_call_targets): Determine + context of the call. + * gimple-fold.c (gimple_fold_call): Use ipa-devirt to devirtualize. + +2013-12-17 Jakub Jelinek <jakub@redhat.com> + + * expr.c (convert_modes): For SUBREG_PROMOTED_VAR_P use SUBREG_REG (x) + instead of x as last gen_lowpart argument. + +2013-12-16 Jakub Jelinek <jakub@redhat.com> + + * predict.h (PROB_LIKELY): Fix the value. + * internal-fn.c (ubsan_expand_si_overflow_mul_check): Add support + for overflow checking for modes without 2xwider supported mode, + if the mode has 2xnarrower mode. + + * internal-fn.c: Include stringpool.h and tree-ssanames.h. + (ubsan_expand_si_overflow_addsub_check): In the generic expansion, + try to improve generated code if one of the arguments is constant + or get_range_info says that one of the argument is always + negative or always non-negative. + * tree-vrp.c (simplify_internal_call_using_ranges): New function. + (simplify_stmt_using_ranges): Call it. + +2013-12-16 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59466 + * emit-rtl.c (change_address_1): Don't validate address for LRA. + * recog.c (general_operand): Accept any memory for LRA. + * lra.c (lra_set_insn_recog_data): Add an assert. + +2013-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/driver-arm.c (arm_cpu_table): Add cortex-a12 entry. + +2013-12-14 Jan Hubicka <jh@suse.cz> + Markus Trippelsdorf <octoploid@yandex.com> + + PR ipa/59265 + * ipa-profile.c (ipa_profile_generate_summary): Do not ICE when + call is already devirtualized. + +2013-12-16 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (version.o): Restore dependencies on + $(REVISION), $(DATESTAMP), $(BASEVER) and $(DEVPHASE). + +2013-12-14 Jan Hubicka <jh@suse.cz> + + PR ipa/59473 + * ipa-devirt.c (get_class_context): Do not ICE when type is found + at wrong offset. + +2013-12-16 Jakub Jelinek <jakub@redhat.com> + + PR libgomp/58756 + * omp-low.c (lower_rec_input_clauses) <case OMP_CLAUSE_REDUCTION>: For + reductions without placeholder if is_simd, but when not using + GOMP_SIMD* internal calls, also perform the reduction operation + on the outer var rather than simple assignment. + +2013-12-16 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58956 + PR middle-end/59470 + * gimple-walk.h (walk_stmt_load_store_addr_fn): New typedef. + (walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Use it + for callback params. + * gimple-walk.c (walk_stmt_load_store_ops): Likewise. + (walk_stmt_load_store_addr_ops): Likewise. Adjust all callback + calls to supply the gimple operand containing the base tree + as an extra argument. + * tree-ssa-ter.c: Include gimple-walk.h. + (find_ssaname, find_ssaname_in_store): New helper functions. + (find_replaceable_in_bb): For calls or GIMPLE_ASM, only set + same_root_var if USE is used somewhere in the stores of the stmt. + * ipa-prop.c (visit_ref_for_mod_analysis): Remove name of the stmt + argument and ATTRIBUTE_UNUSED, add another unnamed tree argument. + * ipa-pure-const.c (check_load, check_store, check_ipa_load, + check_ipa_store): Likewise. + * gimple.c (gimple_ior_addresses_taken_1, check_loadstore): Likewise. + * ipa-split.c (test_nonssa_use, mark_nonssa_use): Likewise. + (verify_non_ssa_vars, visit_bb): Adjust their callers. + * cfgexpand.c (add_scope_conflicts_1): Use + walk_stmt_load_store_addr_fn type for visit variable. + (visit_op, visit_conflict): Remove name of the stmt + argument and ATTRIBUTE_UNUSED, add another unnamed tree argument. + * tree-sra.c (asm_visit_addr): Likewise. Remove name of the data + argument and ATTRIBUTE_UNUSED. + * cgraphbuild.c (mark_address, mark_load, mark_store): Add another + unnamed tree argument. + * gimple-ssa-isolate-paths.c (check_loadstore): Likewise. Remove + ATTRIBUTE_UNUSED from stmt parameter. + +2013-12-16 Chung-Lin Tang <cltang@codesourcery.com> + + * opts-common.c (integral_argument): Add support for + hexadecimal command option integer arguments. Update comments. + +2013-12-14 Jan Hubicka <jh@suse.cz> + + PR ipa/59265 + * ipa-prop.c (ipa_analyze_call_uses): Skip already + devirtualized calls. + +2013-12-14 Jan Hubicka <jh@suse.cz> + + PR middle-end/58477 + * ipa-prop.c (stmt_may_be_vtbl_ptr_store): Skip clobbers. + +2013-12-14 Jan Hubicka <jh@suse.cz> + + PR middle-end/58477 + * cgraphclones.c (cgraph_clone_edge): Do not resolve speculative edges. + +2013-12-14 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59492 + * config/i386/i386.c (ix86_function_specific_restore): Don't + change -fPIC. + +2013-12-14 Eric Botcazou <ebotcazou@adacore.com> + + * var-tracking.c (add_stores): Fix oversight in latest commit. + +2013-12-14 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59503 + * internal-fn.c (ubsan_expand_si_overflow_addsub_check): Call + expand_binop with correct optab depending on code. + +2013-12-14 Tom de Vries <tom@codesourcery.com> + + * calls.c (expand_call): Fix REG_PARM_STACK_SPACE comparison. + +2013-12-13 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78-expand.md (one_cmplqi2): Make constant signed. + + * config/msp430/msp430.md (movqi): replace general_operand with + msp_general_operand and nonimmediate_operand with + msp_nonimmediate_operand to allow volatile operands. + (movhi): Likewise. + (movpsi): Likewise. + (addpsi3): Likewise. + (addhi3): Likewise. + (addhi3_cy): Likewise. + (addchi4_cy): Likewise. + (xor<mode>3): Likewise. + (ome_cmpl<mode>2): Likewise. + (extendqihi2): Likewise. + (zero_extendqihi2): Likewise. + (zero_extendhipsi2): Likewise. + (truncpsihi2): Likewise. + (srai_1): Likewise. + +2013-12-13 Vladimir Makarov <vmakarov@redhat.com> + + * ira.h (struct ira_reg_equiv): Rename to ira_reg_equiv_s. + * ira.c: Ditto. + * lra-int.h (lra_init_equiv): New prototype. + * lra-constraints.c (lra_init_equiv, update_equiv): New functions. + (loc_equivalence_callback): Use the 3rd arg. + (lra_constraints): Update equivalences. Pass curr_insn to + simplify_replace_fn_rtx. + * lra.c (lra): Call lra_init_equiv. + +2013-12-13 Kenneth Zadeck <zadeck@naturalbridge.com> + + * genmodes.c (emit_max_int): Fixed missing parens. + +2013-12-13 Aldy Hernandez <aldyh@redhat.com> + + PR tree-optimization/59149 + * calls.c (flags_from_decl_or_type): Fail on non decl or type. + * trans-mem.c (diagnose_tm_1): Do not call flags_from_decl_or_type + if no type or decl. + +2013-12-13 Kenneth Zadeck <zadeck@naturalbridge.com> + + * config/arc/arc.h (BITS_PER_UNIT): Removed. + * config/bfin/bfin.h (BITS_PER_UNIT): Removed. + * config/lm32/lm32.h (BITS_PER_UNIT): Removed. + * config/m32c/m32c.h (BITS_PER_UNIT): Removed. + * config/microblaze/microblaze.h (BITS_PER_UNIT): Removed. + * config/picochip/picochip.h (BITS_PER_UNIT): Removed. + * config/spu/spu.h (BITS_PER_UNIT): Removed. + * defaults.h (BITS_PER_UNIT): Removed. + * config/i386/i386-modes.def (MAX_BITSIZE_MODE_ANY_INT): New. + * doc/rtl (BITS_PER_UNIT): Moved from tm.texi. + (MAX_BITSIZE_MODE_ANY_INT): Updated. + * doc/tm.texi (BITS_PER_UNIT): Removed. + * doc/tm.texi.in (BITS_PER_UNIT): Removed. + * genmodes.c (bits_per_unit, max_bitsize_mode_any_int): New. + (create_modes): Added code to set bits_per_unit and + max_bitsize_mode_any_int. + (emit_max_int): Changed code generation. + * mkconfig.sh: Added insn-modes.h. + +2013-12-13 Jeff Law <law@redhat.com> + + PR tree-optimization/45685 + * tree-ssa-phiopt.c (neg_replacement): New function. + (tree_ssa_phiopt_worker): Call it. + +2013-12-13 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/i386.c (slm_cost): Fix imul cost for HI. + +2013-12-13 Bin Cheng <bin.cheng@arm.com> + + PR tree-optimization/58296 + PR tree-optimization/41488 + * tree-scalar-evolution.c: Include necessary header files. + (simplify_peeled_chrec): New function. + (analyze_evolution_in_loop): New static variable. + Call simplify_peeled_chrec. + * tree-ssa-loop-ivopts.c (mark_bivs): Don't mark peeled IV as biv. + (add_old_iv_candidates): Don't add candidate for peeled IV. + * tree-affine.h (aff_combination_zero_p): New function. + +2013-12-13 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.c (is_wakeup_func): New function. Returns + true if the current function has the wakeup attribute. + (msp430_start_function): Note if the function has the wakeup + attribute. + (msp430_attribute_table): Add wakeup attribute. + (msp430_expand_epilogue): Add support for wakeup functions. + * config/msp430/msp430.md (disable_interrupts): Emit a NOP after + the DINT instruction. + * doc/extend.texi: Document the wakeup attribute. + +2013-12-13 Kai Tietz <kitetz@redhat.com> + + PR c++/57897 + * config/i386/i386.c (ix86_option_override_internal): Set for + x64 target flag_unwind_tables, if flag_asynchronous_unwind_tables + was explicit set. + +2013-12-12 Jeff Law <law@redhat.com> + + * i386.md (simple LEA peephole2): Add missing mode to zero_extend + for zero-extended MULT simple LEA pattern. + +2013-12-12 Vladimir Makarov <vmakarov@redhat.com> + + PR middle-end/59470 + * lra-coalesce.c (lra_coalesce): Invalidate inheritance pseudo + values if necessary. + +2013-12-12 Jakub Jelinek <jakub@redhat.com> + + PR libgomp/59467 + * gimplify.c (omp_check_private): Add copyprivate argument, if it + is true, don't check omp_privatize_by_reference. + (gimplify_scan_omp_clauses): For OMP_CLAUSE_COPYPRIVATE verify + decl is private in outer context. Adjust omp_check_private caller. + +2013-12-11 Jeff Law <law@redhat.com> + + PR rtl-optimization/59446 + * tree-ssa-threadupdate.c (mark_threaded_blocks): Properly + test for crossing a loop header. + +2013-12-11 Sriraman Tallam <tmsriram@google.com> + + PR target/59390 + * config/i386/i386.c (get_builtin): New function. + (ix86_builtin_vectorized_function): Replace all instances of + ix86_builtins[...] with get_builtin(...). + (ix86_builtin_reciprocal): Ditto. + +2013-12-11 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * langhooks.h (lang_hooks_for_decls): Remove lang_hooks_for_cilkplus. + (lang_hooks_for_cilkplus): Remove. + * langhooks.c (lhd_cilk_detect_spawn): Likewise. + (lhd_install_body_with_frame_cleanup): Likewise. + * langhooks-def.h (LANG_HOOKS_CILKPLUS_FRAME_CLEANUP): Likewise. + (LANG_HOOKS_CILKPLUS_DETECT_SPAWN_AND_UNWRAP): Likewise. + (LANG_HOOKS_CILKPLUS_CILKPLUS_GIMPLIFY_SPAWN): Likewise. + (LANG_HOOKS_CILKPLUS): Likewise. + (LANG_HOOKS_DECLS): Remove LANG_HOOKS_CILKPLUS. + * gimplify.c (gimplify_expr): Removed CILK_SPAWN_STMT case. + (gimplify_modify_expr): Removed handling of _Cilk_spawn in expr. + (gimplify_call_expr): Likewise. + +2013-12-11 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * expr.c (expand_assignment): Remove dependency on + flag_strict_volatile_bitfields. Always set the memory access mode. + (expand_expr_real_1): Likewise. + +2013-12-11 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/59134 + * expmed.c (store_bit_field): Use narrow_bit_field_mem and + store_fixed_bit_field_1 for -fstrict-volatile-bitfields. + (store_fixed_bit_field): Split up. Call store_fixed_bit_field_1 + to do the real work. + (store_fixed_bit_field_1): New function. + (store_split_bit_field): Limit the unit size to the memory mode size, + to prevent recursion. + +2013-12-11 Bernd Edlinger <bernd.edlinger@hotmail.de> + Sandra Loosemore <sandra@codesourcery.com> + + PR middle-end/23623 + PR middle-end/48784 + PR middle-end/56341 + PR middle-end/56997 + * expmed.c (strict_volatile_bitfield_p): Add bitregion_start + and bitregion_end parameters. Test for compliance with C++ + memory model. + (store_bit_field): Adjust call to strict_volatile_bitfield_p. + Add fallback logic for cases where -fstrict-volatile-bitfields + is supposed to apply, but cannot. + (extract_bit_field): Likewise. Use narrow_bit_field_mem and + extract_fixed_bit_field_1 to do the extraction. + (extract_fixed_bit_field): Revert to previous mode selection algorithm. + Call extract_fixed_bit_field_1 to do the real work. + (extract_fixed_bit_field_1): New function. + +2013-12-11 Sandra Loosemore <sandra@codesourcery.com> + + PR middle-end/23623 + PR middle-end/48784 + PR middle-end/56341 + PR middle-end/56997 + * expmed.c (strict_volatile_bitfield_p): New function. + (store_bit_field_1): Don't special-case strict volatile + bitfields here. + (store_bit_field): Handle strict volatile bitfields here instead. + (store_fixed_bit_field): Don't special-case strict volatile + bitfields here. + (extract_bit_field_1): Don't special-case strict volatile + bitfields here. + (extract_bit_field): Handle strict volatile bitfields here instead. + (extract_fixed_bit_field): Don't special-case strict volatile + bitfields here. Simplify surrounding code to resemble that in + store_fixed_bit_field. + * doc/invoke.texi (Code Gen Options): Update + -fstrict-volatile-bitfields description. + +2013-12-11 Kugan Vivekanandarajah <kuganv@linaro.org> + + * configure.ac: Add check for aarch64 assembler -mabi support. + * configure: Regenerate. + * config.in: Regenerate. + * config/aarch64/aarch64-elf.h (ASM_MABI_SPEC): New define. + (ASM_SPEC): Update to substitute -mabi with ASM_MABI_SPEC. + * config/aarch64/aarch64.h (aarch64_override_options): Issue error + if assembler does not support -mabi and option ilp32 is selected. + * doc/install.texi: Added note that building gcc 4.9 and after + with pre 2.24 binutils will not support -mabi=ilp32. + +2013-12-11 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59399 + * expr.c (expand_expr_real_1): Remove assert dealing with + internal calls and turn that into a condition instead. + +2013-12-11 Yvan Roux <yvan.roux@linaro.org> + + * config/arm/arm.opt (mlra): Enable LRA by default. + +2013-12-11 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59417 + * tree-ssa-copy.c (fini_copy_prop): If copy_of[i].value is defined + in a different bb rhan var, only duplicate points-to info and + not alignment info and don't duplicate range info. + * tree-ssa-loop-niter.c (determine_value_range): Instead of + assertion failure handle inconsistencies in range info by only + using var's range info and not PHI result range infos. + + PR tree-optimization/59386 + * tree-inline.c (remap_gimple_stmt): If not id->do_not_unshare, + unshare_expr (id->retval) before passing it to gimple_build_assign. + +2013-12-11 Bin Cheng <bin.cheng@arm.com> + + Reverted: + 2013-12-10 Bin Cheng <bin.cheng@arm.com> + PR tree-optimization/41488 + * tree-ssa-loop-ivopts.c (add_old_iv_candidates): Don't add cand + for PEELED_CHREC kind IV. + * tree-scalar-evolution.c: Include necessary header files. + (peeled_chrec_map, simplify_peeled_chrec): New. + (analyze_evolution_in_loop): New static variable. + Call simplify_peeled_chrec. + (scev_initialize): Initialize peeled_chrec_map. + (scev_reset, scev_finalize): Reset and release peeled_chrec_map. + +2013-12-10 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59458 + * config/i386/i386.md (*movsf_internal): Set mode to SI for + alternative 13. + +2013-12-10 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/58295 + * simplify-rtx.c (simplify_truncation): Restrict the distribution for + WORD_REGISTER_OPERATIONS targets. + +2013-12-10 Richard Sandiford <rdsandiford@googlemail.com> + + * genrecog.c (validate_pattern): Treat all messages except missing + modes as errors. + * config/epiphany/epiphany.md: Remove constraints from + define_peephole2s. + * config/h8300/h8300.md: Remove constraints from define_splits. + * config/msp430/msp430.md: Likewise. + * config/mcore/mcore.md (movdi_i, movsf_i, movdf_k): Use + nonimmediate_operand rather than general_operand for operand 0. + * config/moxie/moxie.md (*movsi, *movqi, *movhi): Likewise. + * config/pdp11/predicates.md (float_operand, float_nonimm_operand): + Use match_operator rather than match_test to invoke general_operand. + * config/v850/v850.md (*movqi_internal, *movhi_internal) + (*movsi_internal_v850e, *movsi_internal, *movsf_internal): Likewise. + +2013-12-10 Richard Sandiford <rdsandiford@googlemail.com> + + * config/tilegx/tilegx.md (insn_ld_add<bitsuffix>): Use + register_operand rather than pointer_operand. Add modes to the + operands. + (insn_ldna_add<bitsuffix>): Likewise. + (insn_ld<I124MODE:n><s>_add<I48MODE:bitsuffix>): Likewise. + (insn_ldnt_add<bitsuffix>): Likewise. + (insn_ldnt<I124MODE:n><s>_add<I48MODE:bitsuffix>): Likewise. + (insn_ld_add_L2<bitsuffix>): Likewise. + (insn_ldna_add_L2<bitsuffix>): Likewise. + (insn_ld<I124MODE:n><s>_add_L2<I48MODE:bitsuffix>): Likewise. + (insn_ldnt_add_L2<bitsuffix>): Likewise. + (insn_ldnt<I124MODE:n><s>_add_L2<I48MODE:bitsuffix>): Likewise. + (insn_ld_add_miss<bitsuffix>): Likewise. + (insn_ldna_add_miss<bitsuffix>): Likewise. + (insn_ld<I124MODE:n><s>_add_miss<I48MODE:bitsuffix>): Likewise. + (insn_ldnt_add_miss<bitsuffix>): Likewise. + (insn_ldnt<I124MODE:n><s>_add_miss<I48MODE:bitsuffix>): Likewise. + (insn_st_add<bitsuffix>): Likewise. + (insn_st<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise. + (*insn_st<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise. + (insn_stnt_add<bitsuffix>): Likewise. + (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise. + (*insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Likewise. + (vec_pack_<pack_optab>_v4hi): Use register_operand rather than + reg_or_0_operand for operand 0. + (insn_v2<pack_insn>): Likewise. + (vec_pack_hipart_v4hi): Likewise. + (insn_v2packh): Likewise. + (vec_pack_ssat_v2si): Likewise. + (insn_v4packsc): Likewise. + +2013-12-10 H.J. Lu <hongjiu.lu@intel.com> + + * basic-block.h (gcov_working_set_t): Put back typedef. + * gcov-io.h (gcov_bucket_type): Likewise. + (gcov_working_set_info, gcov_working_set_t): Likewise. + +2013-12-10 Oleg Endo <olegendo@gcc.gnu.org> + + * cgraph.h (cgraph_node_set_iterator, varpool_node_set_iterator): + Remove typedef. + (cgraph_inline_failed_enum, cgraph_inline_failed_t): Remove typedef and + rename to cgraph_inline_failed_t. + * tree-ssa-alias.h (ao_ref_s, ao_ref): Remove typedef and rename + to ao_ref. + * reload.h (reg_equivs_s, reg_equivs_t): Remove typedef and rename + to reg_equivs_t. + * conditions.h (CC_STATUS): Remove typedef. + * bitmap.h (bitmap_obstack): Remove typedef. + (bitmap_element_def, bitmap_element): Remove typedef and rename to + bitmap_element. + (bitmap_head_def, bitmap_head): Remove typedef and rename to + bitmap_head. + (bitmap_iterator): Remove typedef. + * target.h (cumulative_args_t, print_switch_type, + secondary_reload_info): Remove typedef. + * dwarf2out.h (dw_cfi_oprnd_struct, dw_cfi_oprnd): Remove + dw_cfi_oprnd_struct alias. + (dw_cfi_struct, dw_cfi_node): Remove typedef and rename to dw_cfi_node. + (dw_fde_struct, dw_fde_node): Remove typedef and rename to dw_fde_node. + (cfa_loc, dw_cfa_location): Remove typedef and rename to + dw_cfa_location. + (dw_vec_struct, dw_vec_const): Remove typedef and rename to + dw_vec_const. + (dw_val_struct, dw_val_node): Remove typedef and rename to dw_val_node. + (dw_loc_descr_struct, dw_loc_descr_node): Remove typedef and rename to + dw_loc_descr_node. + * params.h (param_info, compiler_param): Remove typedef. + * opts.h (cl_deferred_param): Remove typedef. + * sreal.h (sreal): Remove typedef. + * ddg.h (dep_type, dep_data_type): Remove typedef. + * graphite-clast-to-gimple.h (cloog_prog_clast, bb_pbb_def): Remove + typedef. + * lto-streamer.h (lto_decl_stream_e_t, lto_encoder_entry, + lto_symtab_encoder_iterator, res_pair): Remove typedef. + * tree-affine.h (affine_tree_combination, aff_tree): Remove typedef + and rename to aff_tree. + * sched-int.h (region): Remove typedef. + * diagnostic.h (diagnostic_info, + diagnostic_classification_change_t): Remove typedef. + * tree-ssa-loop.h (affine_iv_d): Remove typedef and rename to + affine_iv. + * sbitmap.h (sbitmap_iterator): Remove typedef. + * ssa-iterators.h (immediate_use_iterator_d, imm_use_iterator): + Remove typedef and rename to imm_use_iterator. + (ssa_operand_iterator_d, ssa_op_iter): Remove typedef and rename to + ssa_op_iter. + * ggc-internal.h (ggc_statistics): Remove typedef. + * cselib.h (cselib_val_struct, cselib_val): Remove typedef and + rename to cselib_val. + * tree-core.h (alias_pair): Remove typedef. + (constructor_elt_d, constructor_elt): Remove typedef and rename to + constructor_elt. + (ssa_use_operand_d, ssa_use_operand_t): Remove typedef and rename to + ssa_use_operand_t. + * graphite-sese-to-poly.h (base_alias_pair): Remove typedef. + * tree-data-ref.h (conflict_function): Remove typedef. + * tree-inline.h (copy_body_data): Remove typedef. + * ipa-inline.h (condition, size_time_entry, inline_param_summary_t, + edge_growth_cache_entry): Remove typedef. + * regrename.h (operand_rr_info, insn_rr_info): Remove typedef. + * gimple-iterator.h (gimple_stmt_iterator_d, gimple_stmt_iterator): + Remove typedef and rename to gimple_stmt_iterator. + * basic-block.h (ce_if_block, ce_if_block_t): Remove typedef and + rename to ce_if_block. + (edge_iterator): Remove typedef. + * ipa-prop.h (ipa_agg_jf_item, ipa_agg_jf_item_t): Remove typedef + and rename to ipa_agg_jf_item. + (ipa_agg_jump_function_t, ipa_param_descriptor_t, ipa_node_params_t, + ipa_parm_adjustment_t): Remove typedef. + (ipa_jump_func, ipa_jump_func_t): Remove typedef and rename to + ipa_jump_func. + (ipa_edge_args, ipa_edge_args_t): Remove typedef and rename to + ipa_edge_args. + * gcov-io.h (gcov_bucket_type): Remove typedef. + (gcov_working_set_info, gcov_working_set_t): Remove typedef and rename + to gcov_working_set_t. + * ira-int.h (minmax_set_iterator, ira_allocno_iterator, + ira_object_iterator, ira_allocno_object_iterator, ira_pref_iterator, + ira_copy_iterator, ira_object_conflict_iterator): Remove typedef. + * tree-iterator.h (tree_stmt_iterator): Remove typedef. + * rtl.h (addr_diff_vec_flags, mem_attrs, reg_attrs, + replace_label_data): Remove typedef. + (rtunion_def, rtunion): Remove typedef and rename to rtunion. + * hard-reg-set.h (hard_reg_set_iterator): Remove typedef. + * sel-sched-ir.h (_list_iterator, sel_global_bb_info_def, + sel_region_bb_info_def, succ_iterator): Remove typedef. + (deps_where_def, deps_where_t): Remove typedef and rename to + deps_where_t. + * coretypes.h: Adapt forward declarations. + * tree-scalar-evolution.h: Likewise. + * tree-ssa-address.h: Likewise. + * tree-ssa-operands.h: Likewise. + * function.h: Likewise. + * config/frv/frv-protos.h: Likewise. + * targhooks.h: Likewise. + * basic_block.h: Likewise. + * rtl.def: Adapt documentation. + * doc/tm.texi: Likewise. + * ipa-cp.c: Adapt uses. + * bitmap.c: Likewise. + * dwarf2out.c: Likewise. + * target.def: Likewise. + * ipa-inline-analysis.c: Likewise. + * dwarf2cfi.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * lto-cgraph.c: Likewise. + * config/frv/frv.c: Likewise. + * ifcvt.c: Likewise. + * ipa-prop.c: Likewise. + +2013-12-10 Kai Tietz <ktietz@redhat.com> + + PR target/56807 + * config/i386/i386.c (ix86_expand_prologue): Address saved + registers stack-relative, not via frame-pointer. + +2013-12-10 Richard Biener <rguenther@suse.de> + + PR middle-end/38474 + * tree-ssa-structalias.c (solution_set_expand): Expand into + a different possibly cached bitmap and return the result. + (set_union_with_increment): Pass in a shared expanded bitmap + and adjust. + (do_sd_constraint): Likewise. + (do_ds_constraint): Likewise. + (do_complex_constraint): Likewise. + (solve_graph): Manage the shared expanded bitmap. + +2013-12-10 Jakub Jelinek <jakub@redhat.com> + + * tree-vectorizer.h (struct _loop_vec_info): Add scalar_loop field. + (LOOP_VINFO_SCALAR_LOOP): Define. + (slpeel_tree_duplicate_loop_to_edge_cfg): Add scalar_loop argument. + * config/i386/sse.md (maskload<mode>, maskstore<mode>): New expanders. + * tree-data-ref.c (get_references_in_stmt): Handle MASK_LOAD and + MASK_STORE. + * internal-fn.def (LOOP_VECTORIZED, MASK_LOAD, MASK_STORE): New + internal fns. + * tree-if-conv.c: Include expr.h, optabs.h, tree-ssa-loop-ivopts.h and + tree-ssa-address.h. + (release_bb_predicate): New function. + (free_bb_predicate): Use it. + (reset_bb_predicate): Likewise. Don't unallocate bb->aux + just to immediately allocate it again. + (add_to_predicate_list): Add loop argument. If basic blocks that + dominate loop->latch don't insert any predicate. + (add_to_dst_predicate_list): Adjust caller. + (if_convertible_phi_p): Add any_mask_load_store argument, if true, + handle it like flag_tree_loop_if_convert_stores. + (insert_gimplified_predicates): Likewise. + (ifcvt_can_use_mask_load_store): New function. + (if_convertible_gimple_assign_stmt_p): Add any_mask_load_store + argument, check if some conditional loads or stores can't be + converted into MASK_LOAD or MASK_STORE. + (if_convertible_stmt_p): Add any_mask_load_store argument, + pass it down to if_convertible_gimple_assign_stmt_p. + (predicate_bbs): Don't return bool, only check if the last stmt + of a basic block is GIMPLE_COND and handle that. Adjust + add_to_predicate_list caller. + (if_convertible_loop_p_1): Only call predicate_bbs if + flag_tree_loop_if_convert_stores and free_bb_predicate in that case + afterwards, check gimple_code of stmts here. Replace is_predicated + check with dominance check. Add any_mask_load_store argument, + pass it down to if_convertible_stmt_p and if_convertible_phi_p, + call if_convertible_phi_p only after all if_convertible_stmt_p calls. + (if_convertible_loop_p): Add any_mask_load_store argument, + pass it down to if_convertible_loop_p_1. + (predicate_mem_writes): Emit MASK_LOAD and/or MASK_STORE calls. + (combine_blocks): Add any_mask_load_store argument, pass + it down to insert_gimplified_predicates and call predicate_mem_writes + if it is set. Call predicate_bbs. + (version_loop_for_if_conversion): New function. + (tree_if_conversion): Adjust if_convertible_loop_p and combine_blocks + calls. Return todo flags instead of bool, call + version_loop_for_if_conversion if if-conversion should be just + for the vectorized loops and nothing else. + (main_tree_if_conversion): Adjust caller. Don't call + tree_if_conversion for dont_vectorize loops if if-conversion + isn't explicitly enabled. + * tree-vect-data-refs.c (vect_check_gather): Handle + MASK_LOAD/MASK_STORE. + (vect_analyze_data_refs, vect_supportable_dr_alignment): Likewise. + * gimple.h (gimple_expr_type): Handle MASK_STORE. + * internal-fn.c (expand_LOOP_VECTORIZED, expand_MASK_LOAD, + expand_MASK_STORE): New functions. + * tree-vectorizer.c: Include tree-cfg.h and gimple-fold.h. + (vect_loop_vectorized_call, fold_loop_vectorized_call): New functions. + (vectorize_loops): Don't try to vectorize loops with + loop->dont_vectorize set. Set LOOP_VINFO_SCALAR_LOOP for if-converted + loops, fold LOOP_VECTORIZED internal call depending on if loop + has been vectorized or not. + * tree-vect-loop-manip.c (slpeel_duplicate_current_defs_from_edges): + New function. + (slpeel_tree_duplicate_loop_to_edge_cfg): Add scalar_loop argument. + If non-NULL, copy basic blocks from scalar_loop instead of loop, but + still to loop's entry or exit edge. + (slpeel_tree_peel_loop_to_edge): Add scalar_loop argument, pass it + down to slpeel_tree_duplicate_loop_to_edge_cfg. + (vect_do_peeling_for_loop_bound, vect_do_peeling_for_loop_alignment): + Adjust callers. + (vect_loop_versioning): If LOOP_VINFO_SCALAR_LOOP, perform loop + versioning from that loop instead of LOOP_VINFO_LOOP, move it to the + right place in the CFG afterwards. + * tree-vect-loop.c (vect_determine_vectorization_factor): Handle + MASK_STORE. + * cfgloop.h (struct loop): Add dont_vectorize field. + * tree-loop-distribution.c (copy_loop_before): Adjust + slpeel_tree_duplicate_loop_to_edge_cfg caller. + * optabs.def (maskload_optab, maskstore_optab): New optabs. + * passes.def: Add a note that pass_vectorize must immediately follow + pass_if_conversion. + * tree-predcom.c (split_data_refs_to_components): Give up if + DR_STMT is a call. + * tree-vect-stmts.c (vect_mark_relevant): Don't crash if lhs is NULL. + (exist_non_indexing_operands_for_use_p): Handle MASK_LOAD + and MASK_STORE. + (vectorizable_mask_load_store): New function. + (vectorizable_call): Call it for MASK_LOAD or MASK_STORE. + (vect_transform_stmt): Handle MASK_STORE. + * tree-ssa-phiopt.c (cond_if_else_store_replacement): Ignore + DR_STMT where lhs is NULL. + * optabs.h (can_vec_perm_p): Fix up comment typo. + (can_vec_mask_load_store_p): New prototype. + * optabs.c (can_vec_mask_load_store_p): New function. + +2013-12-10 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <normal_inner_ref>: Always return 0 for + the extraction of a bit-field of null size. + +2013-12-10 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59437 + * vtable-verify.c (var_is_used_for_virtual_call_p): Check the + return value of gimple_call_fn. Use is_gimple_call/is_gimple_assign + instead of gimple_code. + +2013-12-10 Maxim Kuvyrkov <maxim@kugelworks.com> + + * config.gcc (mips*-mti-linux*, mips64*-*-linux*): + Add android definitions. + (s390x-*-linux*): Use linux-protos.h. + +2013-12-10 Bin Cheng <bin.cheng@arm.com> + + PR tree-optimization/41488 + * tree-ssa-loop-ivopts.c (add_old_iv_candidates): Don't add cand + for PEELED_CHREC kind IV. + * tree-scalar-evolution.c: Include necessary header files. + (peeled_chrec_map, simplify_peeled_chrec): New. + (analyze_evolution_in_loop): New static variable. + Call simplify_peeled_chrec. + (scev_initialize): Initialize peeled_chrec_map. + (scev_reset, scev_finalize): Reset and release peeled_chrec_map. + +2013-12-09 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/t-aarch64 (MULTILIB_OPTIONS): Fix definition so + that options are conflicting ones. + +2013-12-09 Eric Botcazou <ebotcazou@adacore.com> + + * optabs.c (gen_int_libfunc): Do not compare modes directly. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (FOR_ALL_BB): Eliminate macro. + + * cfg.c (alloc_aux_for_blocks, clear_aux_for_blocks): Replace + uses of FOR_ALL_BB with FOR_ALL_BB_FN, making uses of cfun explicit. + + * cfganal.c (inverted_post_order_compute): Likewise. + * cfgcleanup.c (try_optimize_cfg): Likewise. + * cfgexpand.c (add_scope_conflicts): Likewise. + * cfghooks.c (dump_flow_info, account_profile_record): Likewise. + * cfgrtl.c (relink_block_chain): Likewise. + * dce.c (mark_artificial_uses): Likewise. + * df-core.c (df_set_blocks, df_compute_cfg_image, df_dump): Likewise. + * df-problems.c (df_lr_verify_solution_start, + df_lr_verify_solution_end, df_lr_verify_transfer_functions, + df_live_verify_solution_start, df_live_verify_solution_end, + df_live_set_all_dirty, df_live_verify_transfer_functions, + df_md_local_comput): Likewise. + * df-scan.c (df_scan_free_internal, df_scan_alloc) + df_reorganize_refs_by_insn, df_scan_verify): Likewise. + * dominance.c (compute_dom_fast_query, calculate_dominance_info, + free_dominance_info): Likewise. + * dse.c (dse_step1, dse_step3, dse_step4, dse_step6): Likewise. + * graph.c (draw_cfg_edges): Likewise. + * graphite-scop-detection.c (print_graphite_scop_statistics, + dot_all_scops_1): Likewise. + * graphite.c (print_global_statistics, + print_graphite_scop_statistics): Likewise. + * ira.c (do_reload): Likewise. + * loop-init.c (loop_optimizer_finalize): Likewise. + * lto-streamer-in.c (input_function): Likewise. + * lto-streamer-out.c (output_function): Likewise. + * mcf.c (adjust_cfg_counts): Likewise. + * predict.c (estimate_loops): Likewise. + * sched-rgn.c (haifa_find_rgns): Likewise. + * tree-cfg.c (split_critical_edges): Likewise. + * tree-dfa.c (renumber_gimple_stmt_uids): Likewise. + * tree-loop-distribution.c (tree_loop_distribution): Likewise. + * tree-ssa-pre.c (compute_antic, insert, init_pre): Likewise. + * tree-ssa-propagate.c (ssa_prop_init): Likewise. + * var-tracking.c (vt_initialize, vt_finalize): Likewise. + * vtable-verify.c (vtable_verify_main): Likewise. + * web.c (web_main): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (FOR_EACH_BB_REVERSE): Eliminate macro. + + * cfghooks.c (verify_flow_info): Replace uses of FOR_EACH_BB_REVERSE + with FOR_EACH_BB_REVERSE_FN, making uses of cfun explicit. + * cfgrtl.c (print_rtl_with_bb, rtl_verify_edges, + rtl_verify_bb_insns, rtl_verify_bb_pointers, + rtl_verify_bb_insn_chain, rtl_verify_fallthru): Likewise. + * config/ia64/ia64.c (emit_predicate_relation_info): Likewise. + * config/sh/sh.c (sh_md_init_global): Likewise. + * config/sh/sh_optimize_sett_clrt.cc + (sh_optimize_sett_clrt::execute): Likewise. + * dce.c (reset_unmarked_insns_debug_uses, delete_unmarked_insns): + Likewise. + * dominance.c (calc_dfs_tree): Likewise. + * final.c (final): Likewise. + * function.c (thread_prologue_and_epilogue_insns): Likewise. + * gcse.c (compute_code_hoist_vbeinout): Likewise. + * ira.c (update_equiv_regs, build_insn_chain): Likewise. + * lcm.c (compute_antinout_edge): Likewise. + * mode-switching.c (optimize_mode_switching): Likewise. + * postreload.c (reload_combine): Likewise. + * recog.c (split_all_insns, peephole2_optimize): Likewise. + * tree-ssa-live.c (live_worklist): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (FOR_EACH_BB): Eliminate macro. + + * asan.c (transform_statements, execute_sanopt): Eliminate + use of FOR_EACH_BB in favor of FOR_EACH_BB_FN, to make use of cfun + explicit. + * auto-inc-dec.c (rest_of_handle_auto_inc_dec): Likewise. + * bb-reorder.c (find_rarely_executed_basic_blocks_and_crossing_edges, + set_edge_can_fallthru_flag, fix_up_fall_thru_edges, + fix_crossing_unconditional_branches, add_reg_crossing_jump_notes, + insert_section_boundary_note, rest_of_handle_reorder_blocks, + duplicate_computed_gotos): Likewise. + * cfg.c (clear_edges, compact_blocks, brief_dump_cfg): Likewise. + * cfganal.c (find_unreachable_blocks, add_noreturn_fake_exit_edges, + compute_dominance_frontiers_1, single_pred_before_succ_order): Likewise. + * cfgbuild.c (find_many_sub_basic_blocks): Likewise. + * cfgcleanup.c (try_optimize_cfg, delete_dead_jumptables): Likewise. + * cfgexpand.c (add_scope_conflicts, discover_nonconstant_array_refs): + Likewise. + * cfgloop.c (flow_loops_cfg_dump, get_loop_body, record_loop_exits, + verify_loop_structure): Likewise. + * cfgloopanal.c (mark_loop_exit_edges): Likewise. + * cfgrtl.c (compute_bb_for_insn, find_partition_fixes, + verify_hot_cold_block_grouping, purge_all_dead_edges, + fixup_abnormal_edges, record_effective_endpoints, + outof_cfg_layout_mode, fixup_reorder_chain, force_one_exit_fallthru, + break_superblocks): Likewise. + * cgraphbuild.c (build_cgraph_edges, rebuild_cgraph_edges, + cgraph_rebuild_references): Likewise. + * combine-stack-adj.c (combine_stack_adjustments): Likewise. + * combine.c (delete_noop_moves, create_log_links, + combine_instructions): Likewise. + * config/arm/arm.c (thumb1_reorg, thumb2_reorg): Likewise. + * config/bfin/bfin.c (bfin_gen_bundles, reorder_var_tracking_notes): + Likewise. + * config/c6x/c6x.c (c6x_gen_bundles, conditionalize_after_sched, + c6x_reorg): Likewise. + * config/epiphany/resolve-sw-modes.c (resolve_sw_modes): Likewise. + * config/frv/frv.c (frv_optimize_membar): Likewise. + * config/i386/i386.c (ix86_finalize_stack_realign_flags): Likewise. + * config/ia64/ia64.c (ia64_reorg): Likewise. + * config/mips/mips.c (mips_annotate_pic_calls): Likewise. + * config/picochip/picochip.c (reorder_var_tracking_notes): Likewise. + * config/rs6000/rs6000.c (rs6000_alloc_sdmode_stack_slot): Likewise. + * config/s390/s390.c (s390_regs_ever_clobbered): Likewise. + * config/sh/sh_treg_combine.cc (sh_treg_combine::execute): Likewise. + * config/spu/spu.c (spu_machine_dependent_reorg): Likewise. + * config/tilegx/tilegx.c (tilegx_gen_bundles, + reorder_var_tracking_notes): Likewise. + * config/tilepro/tilepro.c (tilepro_gen_bundles, + reorder_var_tracking_notes): Likewise. + * coverage.c (coverage_compute_cfg_checksum): Likewise. + * cprop.c (compute_hash_table_work, compute_cprop_data, + local_cprop_pass, find_implicit_sets): Likewise. + * cse.c (cse_condition_code_reg): Likewise. + * dce.c (prescan_insns_for_dce): Likewise. + * df-core.c (df_compact_blocks): Likewise. + * df-problems.c (df_word_lr_alloc): Likewise. + * df-scan.c (df_scan_start_dump, df_scan_blocks, df_insn_rescan_all, + df_update_entry_exit_and_calls): Likewise. + * dominance.c (calculate_dominance_info, verify_dominators, + debug_dominance_info): Likewise. + * dse.c (dse_step5_nospill): Likewise. + * except.c (finish_eh_generation): Likewise. + * final.c (compute_alignments): Likewise. + * function.c (thread_prologue_and_epilogue_insns, + rest_of_match_asm_constraints): Likewise. + * gcse.c (compute_hash_table_work, prune_expressions, + compute_pre_data, compute_code_hoist_vbeinout, hoist_code, + calculate_bb_reg_pressure, compute_ld_motion_mems): Likewise. + * gimple-iterator.c (gsi_commit_edge_inserts): Likewise. + * gimple-ssa-isolate-paths.c (find_implicit_erroneous_behaviour, + find_explicit_erroneous_behaviour): Likewise. + * graphite-sese-to-poly.c (rewrite_reductions_out_of_ssa, + rewrite_cross_bb_scalar_deps_out_of_ssa): Likewise. + * haifa-sched.c (haifa_sched_init): Likewise. + * hw-doloop.c (discover_loops, set_bb_indices, reorder_loops): + Likewise. + * ifcvt.c (if_convert): Likewise. + * init-regs.c (initialize_uninitialized_regs): Likewise. + * ipa-prop.c (ipcp_transform_function): Likewise. + * ipa-pure-const.c (analyze_function): Likewise. + * ipa-split.c (find_split_points, execute_split_functions): Likewise. + * ira-build.c (form_loop_tree): Likewise. + * ira-costs.c (find_costs_and_classes): Likewise. + * ira-emit.c (emit_moves, add_ranges_and_copies, ira_emit): Likewise. + * ira.c (decrease_live_ranges_number, compute_regs_asm_clobbered, + mark_elimination, update_equiv_regs, find_moveable_pseudos, + split_live_ranges_for_shrink_wrap, allocate_initial_values): Likewise. + * jump.c (mark_all_labels): Likewise. + * lcm.c (compute_laterin, compute_insert_delete, compute_available, + compute_nearerout, compute_rev_insert_delete): Likewise. + * loop-init.c (fix_loop_structure): Likewise. + * loop-invariant.c (calculate_loop_reg_pressure): Likewise. + * lower-subreg.c (decompose_multiword_subregs, + decompose_multiword_subregs): Likewise. + * lra-assigns.c (assign_by_spills): Likewise. + * lra-coalesce.c (lra_coalesce): Likewise. + * lra-constraints.c (lra_inheritance, remove_inheritance_pseudos): + Likewise. + * lra-eliminations.c (lra_init_elimination): Likewise. + * lra-spills.c (assign_spill_hard_regs, spill_pseudos, + lra_final_code_change): Likewise. + * lra.c (remove_scratches, check_rtl, has_nonexceptional_receiver, + update_inc_notes): Likewise. + * mcf.c (adjust_cfg_counts): Likewise. + * mode-switching.c (optimize_mode_switching): Likewise. + * modulo-sched.c (rest_of_handle_sms): Likewise. + * omp-low.c (optimize_omp_library_calls, expand_omp_taskreg, + expand_omp_target): Likewise. + * postreload-gcse.c (alloc_mem, compute_hash_table): Likewise. + * postreload.c (reload_cse_regs_1): Likewise. + * predict.c (strip_predict_hints, tree_bb_level_predictions, + tree_estimate_probability, expensive_function_p, + estimate_bb_frequencies, compute_function_frequency): Likewise. + * profile.c (is_inconsistent, compute_branch_probabilities, + branch_prob): Likewise. + * ree.c (find_removable_extensions): Likewise. + * reg-stack.c (compensate_edges, convert_regs, reg_to_stack): Likewise. + * regcprop.c (copyprop_hardreg_forward): Likewise. + * reginfo.c (init_subregs_of_mode): Likewise. + * regrename.c (regrename_analyze): Likewise. + * regstat.c (regstat_compute_ri, regstat_compute_calls_crossed): + Likewise. + * reload1.c (has_nonexceptional_receiver, reload, + calculate_elim_costs_all_insns): Likewise. + * resource.c (init_resource_info, free_resource_info): Likewise. + * sched-ebb.c (schedule_ebbs): Likewise. + * sched-rgn.c (is_cfg_nonregular, find_single_block_region, + haifa_find_rgns, sched_rgn_local_init): Likewise. + * sel-sched-dump.c (sel_dump_cfg_2): Likewise. + * sel-sched-ir.c (init_lv_sets, free_lv_sets, + make_regions_from_the_rest): Likewise. + * sese.c (build_sese_loop_nests, sese_build_liveouts): Likewise. + * stack-ptr-mod.c (notice_stack_pointer_modification): Likewise. + * store-motion.c (compute_store_table, build_store_vectors, + one_store_motion_pass): Likewise. + * tracer.c (tail_duplicate): Likewise. + * trans-mem.c (compute_transaction_bits): Likewise. + * tree-call-cdce.c (tree_call_cdce): Likewise. + * tree-cfg.c (replace_loop_annotate, factor_computed_gotos, + fold_cond_expr_cond, make_edges, assign_discriminators, + make_abnormal_goto_edges, cleanup_dead_labels, group_case_labels, + dump_cfg_stats, gimple_verify_flow_info, print_loop, + execute_fixup_cfg): Likewise. + * tree-cfgcleanup.c (cleanup_tree_cfg_1, merge_phi_nodes): Likewise. + * tree-complex.c (init_dont_simulate_again, tree_lower_complex): + Likewise. + * tree-dfa.c (collect_dfa_stats, dump_enumerated_decls): Likewise. + * tree-eh.c (execute_lower_resx, execute_lower_eh_dispatch, + mark_reachable_handlers): Likewise. + * tree-emutls.c (lower_emutls_function_body): Likewise. + * tree-if-conv.c (main_tree_if_conversion): Likewise. + * tree-inline.c (optimize_inline_calls): Likewise. + * tree-into-ssa.c (rewrite_into_ssa, update_ssa): Likewise. + * tree-nrv.c (tree_nrv, execute_return_slot_opt): Likewise. + * tree-object-size.c (compute_object_sizes): Likewise. + * tree-outof-ssa.c (eliminate_useless_phis, rewrite_trees, + insert_backedge_copies, tree_profiling): Likewise. + * tree-scalar-evolution.c (scev_const_prop): Likewise. + * tree-sra.c (scan_function, sra_modify_function_body, + propagate_dereference_distances, ipa_sra_modify_function_body, + convert_callers): Likewise. + * tree-ssa-ccp.c (ccp_initialize, execute_fold_all_builtins): Likewise. + * tree-ssa-coalesce.c (build_ssa_conflict_graph): Likewise. + create_outofssa_var_map, coalesce_partitions): Likewise. + * tree-ssa-copy.c (init_copy_prop): Likewise. + * tree-ssa-copyrename.c (rename_ssa_copies): Likewise. + * tree-ssa-dce.c (find_obviously_necessary_stmts, + eliminate_unnecessary_stmts): Likewise. + * tree-ssa-dom.c (free_all_edge_infos, tree_ssa_dominator_optimize): + Likewise. + * tree-ssa-forwprop.c (ssa_forward_propagate_and_combine): Likewise. + * tree-ssa-live.c (clear_unused_block_pointer, remove_unused_locals, + new_tree_live_info, calculate_live_on_exit, dump_live_info, + analyze_memory_references, fill_always_executed_in, + tree_ssa_lim_finalize): Likewise. + * tree-ssa-loop-manip.c (find_uses_to_rename, verify_loop_closed_ssa): + Likewise. + * tree-ssa-math-opts.c (execute_cse_reciprocals, execute_cse_sincos, + execute_optimize_bswap, execute_optimize_widening_mul): Likewise. + * tree-ssa-propagate.c (substitute_and_fold): Likewise. + * tree-ssa-structalias.c (compute_points_to_sets): Likewise. + * tree-ssa-tail-merge.c (find_same_succ, reset_cluster_vectors): + Likewise. + * tree-ssa-ter.c (find_replaceable_exprs): Likewise. + * tree-ssa-threadupdate.c (thread_through_all_blocks): Likewise. + * tree-ssa-uncprop.c (associate_equivalences_with_edges, + tree_ssa_uncprop): Likewise. + * tree-ssa-uninit.c (warn_uninitialized_vars, + execute_late_warn_uninitialized): Likewise. + * tree-ssa.c (verify_ssa, execute_update_addresses_taken): Likewise. + * tree-stdarg.c (check_all_va_list_escapes, execute_optimize_stdarg): + Likewise. + * tree-switch-conversion.c (do_switchconv): Likewise. + * tree-vect-generic.c (expand_vector_operations): Likewise. + * tree-vectorizer.c (adjust_simduid_builtins, note_simd_array_uses, + execute_vect_slp): Likewise. + * tree-vrp.c (check_all_array_refs, remove_range_assertions, + vrp_initialize, identify_jump_threads, instrument_memory_accesses): + Likewise. + * ubsan.c (ubsan_pass): Likewise. + * value-prof.c (verify_histograms, + gimple_value_profile_transformations, gimple_find_values_to_profile): + Likewise. + * var-tracking.c (vt_find_locations, dump_dataflow_sets, vt_emit_notes, + vt_initialize, delete_debug_insns, vt_finalize): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (last_basic_block): Eliminate macro. + + * asan.c (transform_statements): Eliminate use of last_basic_block + in favor of last_basic_block_for_fn, in order to make use of cfun + explicit. + * bb-reorder.c (copy_bb, reorder_basic_blocks): Likewise. + * bt-load.c (compute_defs_uses_and_gen, compute_kill, compute_out, + link_btr_uses, build_btr_def_use_webs, migrate_btr_defs): Likewise. + * cfg.c (compact_blocks): Likewise. + * cfganal.c (mark_dfs_back_edges, + control_dependences::control_dependences, post_order_compute, + pre_and_rev_post_order_compute_fn, dfs_enumerate_from, compute_idf, + single_pred_before_succ_order): Likewise. + * cfgbuild.c (make_edges): Likewise. + * cfgexpand.c (add_scope_conflicts, gimple_expand_cfg): Likewise. + * cfghooks.c (verify_flow_info): Likewise. + * cfgloop.c (verify_loop_structure): Likewise. + * cfgloopanal.c (just_once_each_iteration_p, + mark_irreducible_loops): Likewise. + * cfgloopmanip.c (fix_bb_placements, remove_path, + update_dominators_in_loop): Likewise. + * cfgrtl.c (create_basic_block_structure, rtl_create_basic_block, + break_superblocks, rtl_flow_call_edges_add): Likewise. + * config/epiphany/resolve-sw-modes.c (resolve_sw_modes): Likewise. + * config/frv/frv.c (frv_optimize_membar): Likewise. + * config/mips/mips.c (r10k_insert_cache_barriers): Likewise. + * config/spu/spu.c (spu_machine_dependent_reorg): Likewise. + * cprop.c (compute_local_properties, find_implicit_sets, + bypass_conditional_jumps, one_cprop_pass): Likewise. + * cse.c (cse_main): Likewise. + * df-core.c (rest_of_handle_df_initialize, df_worklist_dataflow, + df_analyze, df_grow_bb_info, df_compact_blocks): Likewise. + * df-problems.c (df_lr_verify_solution_start, + df_live_verify_solution_start, df_md_local_compute): Likewise. + * dominance.c (init_dom_info, calc_dfs_tree_nonrec, calc_dfs_tree, + calc_idoms): Likewise. + * domwalk.c (dom_walker::walk): Likewise. + * dse.c (dse_step0, dse_step3): Likewise. + * function.c (epilogue_done): Likewise. + * gcse.c (alloc_gcse_mem, compute_local_properties, + prune_insertions_deletions, compute_pre_data, + pre_expr_reaches_here_p, one_pre_gcse_pass, + compute_code_hoist_vbeinout, should_hoist_expr_to_dom, hoist_code, + one_code_hoisting_pass): Likewise. + * graph.c (draw_cfg_nodes_no_loops): Likewise. + * graphite-sese-to-poly.c (build_scop_bbs): Likewise. + * haifa-sched.c (unlink_bb_notes): Likewise. + * ipa-split.c (execute_split_functions): Likewise. + * ira-build.c (create_loop_tree_nodes, remove_unnecessary_regions): + Likewise. + * ira-emit.c (ira_emit): Likewise. + * ira.c (find_moveable_pseudos, ira): Likewise. + * lcm.c (compute_antinout_edge, compute_laterin, + compute_insert_delete, pre_edge_lcm, compute_available, + compute_nearerout, compute_rev_insert_delete, + pre_edge_rev_lcm): Likewise. + * loop-unroll.c (opt_info_start_duplication, apply_opt_in_copies): + Likewise. + * lower-subreg.c (decompose_multiword_subregs): Likewise. + * lra-lives.c (lra_create_live_ranges): Likewise. + * lra.c (lra): Likewise. + * mode-switching.c (optimize_mode_switching): Likewise. + * recog.c (split_all_insns): Likewise. + * regcprop.c (copyprop_hardreg_forward): Likewise. + * regrename.c (regrename_analyze): Likewise. + * reload1.c (reload): Likewise. + * resource.c (init_resource_info): Likewise. + * sched-rgn.c (haifa_find_rgns, extend_rgns, compute_trg_info, + realloc_bb_state_array, schedule_region, extend_regions): Likewise. + * sel-sched-ir.c (sel_extend_global_bb_info, extend_region_bb_info, + recompute_rev_top_order, sel_init_pipelining, + make_regions_from_the_rest): Likewise. + * store-motion.c (remove_reachable_equiv_notes,build_store_vectors) + Likewise. + * tracer.c (tail_duplicate): Likewise. + * trans-mem.c (tm_region_init, get_bb_regions_instrumented): Likewise. + * tree-cfg.c (create_bb, cleanup_dead_labels, gimple_dump_cfg, + gimple_flow_call_edges_add): Likewise. + * tree-cfgcleanup.c (split_bbs_on_noreturn_calls, + cleanup_tree_cfg_1): Likewise. + * tree-complex.c (tree_lower_complex): Likewise. + * tree-inline.c (copy_cfg_body): Likewise. + * tree-into-ssa.c (mark_phi_for_rewrite, rewrite_into_ssa, + prepare_def_site_for, update_ssa): Likewise. + * tree-ssa-dce.c (tree_dce_init, perform_tree_ssa_dce): Likewise. + * tree-ssa-dom.c (record_edge_info): Likewise. + * tree-ssa-live.c (new_tree_live_info, live_worklist): Likewise. + * tree-ssa-loop-im.c (fill_always_executed_in_1): Likewise. + * tree-ssa-loop-manip.c (copy_phi_node_args + gimple_duplicate_loop_to_header_edge): Likewise. + * tree-ssa-pre.c (compute_antic): Likewise. + * tree-ssa-propagate.c (ssa_prop_init): Likewise. + * tree-ssa-reassoc.c (init_reassoc): Likewise. + * tree-ssa-sccvn.c (init_scc_vn): Likewise. + * tree-ssa-tail-merge.c (init_worklist): Likewise. + * tree-ssa-uncprop.c (associate_equivalences_with_edges): Likewise. + * tree-stdarg.c (reachable_at_most_once): Likewise. + * tree-vrp.c (find_assert_locations): Likewise. + * var-tracking.c (vt_find_locations): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (profile_status): Eliminate macro. + + * cfgbuild.c (find_many_sub_basic_blocks): Eliminate use of + profile_status macro in favor of profile_status_for_fn, making + use of cfun explicit. + * cfghooks.c (account_profile_record): Likewise. + * cfgloopanal.c (single_likely_exit): + * cfgrtl.c (rtl_verify_edges, rtl_account_profile_record): Likewise. + * graphite.c (graphite_finalize): + * internal-fn.c (ubsan_expand_si_overflow_addsub_check, + ubsan_expand_si_overflow_neg_check, + ubsan_expand_si_overflow_mul_check): Likewise. + * ipa-split.c (consider_split, execute_split_functions): + * loop-unroll.c (decide_peel_simple): + * optabs.c (emit_cmp_and_jump_insn_1): + * predict.c (maybe_hot_edge_p, probably_never_executed, + predictable_edge_p, probability_reliable_p, gimple_predict_edge, + tree_estimate_probability_driver, estimate_bb_frequencies, + compute_function_frequency, rebuild_frequencies): Likewise. + * profile.c (compute_branch_probabilities): Likewise. + * tree-cfg.c (gimple_account_profile_record): Likewise. + * tree-inline.c (optimize_inline_calls): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (label_to_block_map): Eliminate macro. + + * gimple.c (gimple_set_bb): Replace uses of label_to_block_map with + uses of label_to_block_map_for_fn, making uses of cfun be explicit. + * tree-cfg.c (delete_tree_cfg_annotations): Likewise. + (verify_gimple_label): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (basic_block_info): Eliminate macro. + + * cfgrtl.c (rtl_create_basic_block): Replace uses of basic_block_info + with basic_block_info_for_fn, making uses of cfun be explicit. + * tree-cfg.c (build_gimple_cfg, create_bb): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (BASIC_BLOCK): Eliminate macro. + + * alias.c (init_alias_analysis): Eliminate BASIC_BLOCK macro in + favor of uses of BASIC_BLOCK_FOR_FN, making uses of cfun explicit. + * bt-load.c (compute_defs_uses_and_gen, compute_out, link_btr_uses, + block_at_edge_of_live_range_p, migrate_btr_defs): Likewise. + * caller-save.c (insert_one_insn): Likewise. + * cfg.c (debug_bb, get_bb_original, get_bb_copy): Likewise. + * cfgexpand.c (add_scope_conflicts): Likewise. + * cfghooks.c (verify_flow_info): Likewise. + * cfgloop.c (flow_loops_find): Likewise. + * cfgrtl.c (rtl_flow_call_edges_add): Likewise. + * config/mips/mips.c (r10k_insert_cache_barriers): Likewise. + * config/s390/s390.c (s390_optimize_nonescaping_tx): Likewise. + * config/spu/spu.c (spu_machine_dependent_reorg): Likewise. + * cse.c (cse_main): Likewise. + * dce.c (fast_dce): Likewise. + * df-core.c (df_set_blocks, df_worklist_propagate_forward, + df_worklist_propagate_backward, df_worklist_dataflow_doublequeue, + df_bb_replace, df_dump_region): Likewise. + * df-problems.c (df_rd_bb_local_compute, df_lr_bb_local_compute, + df_live_bb_local_compute, df_chain_remove_problem) + df_chain_create_bb, df_word_lr_bb_local_compute, df_note_bb_compute, + df_md_bb_local_compute, df_md_local_compute, + df_md_transfer_function): Likewise. + * df-scan.c (df_scan_blocks, df_reorganize_refs_by_reg_by_insn, + df_reorganize_refs_by_insn, df_bb_refs_collect, + df_record_entry_block_defs, df_update_entry_block_defs, + df_record_exit_block_uses): Likewise. + * dominance.c (nearest_common_dominator_for_set): Likewise. + * gcse.c (hoist_code): Likewise. + * graph.c (draw_cfg_nodes_no_loops): Likewise. + * ipa-inline-analysis.c (param_change_prob, + estimate_function_body_sizes): Likewise. + * ipa-split.c (dominated_by_forbidden): Likewise. + * loop-unroll.c (apply_opt_in_copies): Likewise. + * lower-subreg.c (decompose_multiword_subregs): Likewise. + * lra-lives.c (lra_create_live_ranges): Likewise. + * predict.c (propagate_freq): Likewise. + * regrename.c (regrename_analyze): Likewise. + * regstat.c (regstat_bb_compute_ri, regstat_bb_compute_calls_crossed): + Likewise. + * resource.c (mark_target_live_regs): Likewise. + * sched-ebb.c (ebb_fix_recovery_cfg): Likewise. + * sched-int.h (EBB_FIRST_BB, EBB_LAST_BB): Likewise. + * sched-rgn.c (debug_region, dump_region_dot, too_large, + haifa_find_rgns, extend_rgns, compute_dom_prob_ps, update_live, + propagate_deps, sched_is_disabled_for_current_region_p): Likewise. + * sched-vis.c (debug_bb_n_slim): Likewise. + * sel-sched-ir.c (sel_finish_global_and_expr, verify_backedges, + purge_empty_blocks, sel_remove_loop_preheader): Likewise. + * sel-sched.c (remove_insns_that_need_bookkeeping) + (current_region_empty_p, sel_region_init, simplify_changed_insns): + Likewise. + * trans-mem.c (execute_tm_mark, execute_tm_edges, + tm_memopt_compute_antic, ipa_tm_scan_irr_function): Likewise. + * tree-cfg.c (make_edges, end_recording_case_labels, + label_to_block_fn, gimple_debug_bb, gimple_flow_call_edges_add, + remove_edge_and_dominated_blocks, remove_edge_and_dominated_blocks, + gimple_purge_all_dead_eh_edges, + gimple_purge_all_dead_abnormal_call_edges): Likewise. + * tree-cfgcleanup.c (fixup_noreturn_call, + split_bbs_on_noreturn_calls, cleanup_tree_cfg_1): Likewise. + * tree-inline.c (copy_cfg_body, fold_marked_statements): Likewise. + * tree-into-ssa.c (set_livein_block, prune_unused_phi_nodes, + insert_phi_nodes_for, insert_updated_phi_nodes_for): Likewise. + * tree-ssa-dom.c (tree_ssa_dominator_optimize): Likewise. + * tree-ssa-live.c (live_worklist): Likewise. + * tree-ssa-loop-manip.c (compute_live_loop_exits, add_exit_phis_var, + find_uses_to_rename, copy_phi_node_args): Likewise. + * tree-ssa-pre.c (compute_antic): Likewise. + * tree-ssa-reassoc.c (update_range_test, optimize_range_tests): + Likewise. + * tree-ssa-sink.c (nearest_common_dominator_of_uses): Likewise. + * tree-ssa-tail-merge.c (same_succ_hash, same_succ_def::equal, + same_succ_flush_bbs, update_worklist, set_cluster, + same_phi_alternatives, find_clusters_1, apply_clusters, + update_debug_stmts): Likewise. + * tree-ssa-threadupdate.c (mark_threaded_blocks, + thread_through_all_blocks): Likewise. + * tree-ssa-uncprop.c (associate_equivalences_with_edges): Likewise. + * tree-vrp.c (find_assert_locations): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (SET_BASIC_BLOCK): Eliminate macro. + + * cfg.c (compact_blocks): Replace uses of SET_BASIC_BLOCK + with SET_BASIC_BLOCK_FOR_FN, making use of cfun explicit. + (expunge_block): Likewise. + * cfgrtl.c (create_basic_block_structure): Likewise. + * df-core.c (df_compact_blocks, df_bb_replace): Likewise. + * sel-sched.c (create_block_for_bookkeeping): Likewise. + * tree-cfg.c (create_bb): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (profile_status_for_function): Rename to... + (profile_status_for_fn): ...this. + + * cfg.c (check_bb_profile): Update for renaming. + * cgraphbuild.c (compute_call_stmt_bb_frequency): Likewise. + * lto-streamer-in.c (input_cfg): Likewise. + * lto-streamer-out.c (output_cfg): Likewise. + * predict.c (maybe_hot_frequency_p, maybe_hot_count_p, + maybe_hot_bb_p, probably_never_executed) + (handle_missing_profiles): Likewise. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + * tree-inline.c (copy_bb, initialize_cfun): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (label_to_block_map_for_function): Rename to... + (label_to_block_map_for_fn): ...this. + + * lto-streamer-in.c (input_cfg): Update for renaming. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (last_basic_block_for_function): Rename to... + (last_basic_block_for_fn): ...this. + + * ipa-utils.c (ipa_merge_profiles): Update for renaming of + last_basic_block_for_function to last_basic_block_for_fn. + * lto-streamer-in.c (input_cfg): Likewise. + * lto-streamer-out.c (output_cfg): Likewise. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + * tree-sra.c (propagate_dereference_distances, ipa_early_sra): + Likewise. + +2013-12-09 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (basic_block_info_for_function): Rename to... + (basic_block_info_for_fn): ...this. + (BASIC_BLOCK_FOR_FUNCTION): Rename to... + (BASIC_BLOCK_FOR_FN): ...this. + (SET_BASIC_BLOCK_FOR_FUNCTION): Rename to... + (SET_BASIC_BLOCK_FOR_FN): ...this. + + * gimple-streamer-in.c (input_phi, input_bb): Update for renaming + of BASIC_BLOCK_FOR_FUNCTION to BASIC_BLOCK_FOR_FN. + * ipa-utils.c (ipa_merge_profiles): Likewise. + * lto-streamer-in.c (make_new_block): Update for renaming of + SET_BASIC_BLOCK_FOR_FUNCTION to SET_BASIC_BLOCK_FOR_FN. + (input_cfg): Update for renamings. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + (dump_function_to_file): Update for renaming of + basic_block_info_for_function to basic_block_info_for_fn. + +2013-12-09 Richard Biener <rguenther@suse.de> + + PR middle-end/38474 + * tree-ssa-structalias.c (set_union_with_increment): Remove + unreachable code. + (do_complex_constraint): Call set_union_with_increment with + the solution delta, not the full solution. + (make_transitive_closure_constraints): Merge the two constraints. + +2013-12-09 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (mem_ok_for_ldrd_strd): Rename first argument as MEM. Do + more address validation checks. + +2013-12-09 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59415 + * vtable-verify.c (verify_bb_vtables): Check the return value + of gimple_call_fn. Use is_gimple_call instead of gimple_code. + +2013-12-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (generic_sched): Add cortexa12. + (generic_vfp): Likewise. + * config/arm/arm.c (cortexa12_extra_costs): New cost table. + (arm_cortex_a12_tune): New tuning struct. + * config/arm/arm-cores.def: Add cortex-a12. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Likewise. + * config/arm/bpabi.h: Add cortex-a12. + * doc/invoke.texi: Document -mcpu=cortex-a12. + +2013-12-09 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + * doc/install.texi (Prerequisites): Explicitly mention C library + and its headers for multilib builds. + +2013-12-08 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/52898 + PR target/51697 + * common/config/sh/sh-common.c (sh_option_optimization_table): Remove + OPT_mcbranchdi entry. + * config/sh/sh.opt (mcbranchdi, mcmpeqdi): Mark as undocumented and + emit a warning. + * config/sh/sh.c (sh_option_override): Initialize TARGET_CBRANCHDI4 + and TARGET_CMPEQDI_T variables. + * doc/invoke.texi (SH options): Undocument -mcbranchdi and -mcmpeqdi. + +2013-12-07 Maxim Kuvyrkov <maxim@kugelworks.com> + + * config/linux.h: Fix typo in a comment. + +2013-12-07 Maxim Kuvyrkov <maxim@kugelworks.com> + + * config.gcc (*linux*): Split libc selection from Android support. + Add libc selection to all *linux* targets. Add Android support to + architectures that support it. + (arm*-*-linux-*, i[34567]86-*-linux*, x86_64-*-linux*,) + (mips*-*-linux*): Add Android support. + +2013-12-07 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuvyrkov <maxim@kugelworks.com> + + * config/bfin/uclinux.h, config/c6x/uclinux-elf.h, + * config/lm32/uclinux-elf.h, config/m68k/uclinux.h, + * config/moxie/uclinux.h (TARGET_LIBC_HAS_FUNCTION): Move definitions + to linux.h. + * config/linux-android.h (TARGET_HAS_IFUNC_P): Move definition + to linux.h. + * config/linux.h (TARGET_LIBC_HAS_FUNCTION, TARGET_HAS_IFUNC_P): + Define appropriately for Linux and uClinux targets. + +2013-12-07 Maxim Kuvyrkov <maxim@kugelworks.com> + + * config/linux.c (linux_has_ifunc_p): Use correct test. + +2013-12-07 Maxim Kuvyrkov <maxim@kugelworks.com> + + * config/linux.c (linux_android_has_ifunc_p): Rename to + linux_has_ifunc_p. + (linux_android_libc_has_function): Rename to linux_libc_has_function. + * config/linux-protos.h (linux_android_has_ifunc_p,) + (linux_android_libc_has_function): Update declarations. + * config/linux.h, config/linux-android.h, config/alpha/linux.h, + * config/rs6000/linux.h, config/rs6000/linux64.h: Update. + +2013-12-07 Maxim Kuvyrkov <maxim@kugelworks.com> + + * linux-android.c: Rename to linux.c. + * t-linux-android: Rename to t-linux. Update references + to linux-android.c + * config.gcc: Update references to t-linux-android and linux-android.o. + +2013-12-07 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.md (bswapdi2_32bit): Remove ?? from r->r + alternative. + +2013-12-07 Ralf Corsépius <ralf.corsepius@rtems.org> + + * config.gcc (microblaze*-*-rtems*): Add TARGET_BIG_ENDIAN_DEFAULT. + +2013-12-06 Vladimir Makarov <vmakarov@redhat.com> + + * config/rs6000/rs600.md (*bswapdi2_64bit): Remove ?? from the + constraint. + +2013-12-06 Caroline Tice <cmtice@google.com> + + Submitting patch from Stephen Checkoway, s@cs.jhu.edu + * vtable-verify.c (verify_bb_vtables): Replace all uses of verified + vtable pointer with the results of the verification call, rather than + only the uses in the next statement. + +2013-12-06 Andrew Pinski <apinski@cavium.com> + + PR target/59092 + * config/aarch64/aarch64.md (trap): New pattern. + +2013-12-06 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59388 + * tree-ssa-reassoc.c (update_range_test): If op == range->exp, + gimplify tem after stmt rather than before it. + + * tree-data-ref.c (struct data_ref_loc_d): Replace pos field with ref. + (get_references_in_stmt): Don't record operand addresses, but + operands themselves. + (find_data_references_in_stmt, graphite_find_data_references_in_stmt): + Adjust for the pos -> ref change. + +2013-12-06 H.J. Lu <hongjiu.lu@intel.com> + + * config.gcc: Change --with-cpu=ia to --with-cpu=intel. + + * config/i386/i386.c (cpu_names): Replace "ia" with "intel". + (processor_alias_table): Likewise. + (ix86_option_override_internal): Likewise. + * config/i386/i386.h (target_cpu_default): Replace + TARGET_CPU_DEFAULT_ia with TARGET_CPU_DEFAULT_intel. + + * doc/invoke.texi: Replace -mtune=ia with -mtune=intel. + +2013-12-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/59405 + * config/i386/i386.c (type_natural_mode): Properly handle + size 8 for !TARGET_64BIT. + +2013-12-06 Trevor Saunders <tsaunders@mozilla.com> + + * tree-ssa-pre.c (compute_antic_aux): Remove redundant call to + vec::release. + +2013-12-06 Ian Bolton <ian.bolton@arm.com> + Mark Mitchell <mark@codesourcery.com> + + PR target/59091 + * config/arm/arm.md (trap): New pattern. + * config/arm/types.md: Added a type for trap. + +2013-12-06 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * expr.c (expand_assignment): Update bitregion_start and bitregion_end. + +2013-12-06 Eric Botcazou <ebotcazou@adacore.com> + + PR target/59316 + * config/sparc/sparc.h (SPARC_LOW_FE_EXCEPT_VALUES): Define. + * config/sparc/sol2.h (SPARC_LOW_FE_EXCEPT_VALUES): Redefine. + * config/sparc/sparc.c (TARGET_INIT_BUILTINS): Move around. + (TARGET_BUILTIN_DECL): Define. + (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): Likewise. + (sparc32_initialize_trampoline): Adjust call to gen_flush. + (enum sparc_builtins): New enumeral type. + (sparc_builtins): New static array. + (sparc_builtins_icode): Likewise. + (def_builtin): Accept a separate icode and save the result. + (def_builtin_const): Likewise. + (sparc_fpu_init_builtins): New function. + (sparc_vis_init_builtins): Pass the builtin code. + (sparc_init_builtins): Call it if TARGET_FPU. + (sparc_builtin_decl): New function. + (sparc_expand_builtin): Deal with SPARC_BUILTIN_{LD,ST}FSR. + (sparc_handle_vis_mul8x16): Use the builtin code. + (sparc_fold_builtin): Likewise. Deal with SPARC_BUILTIN_{LD,ST}FSR + and SPARC_BUILTIN_PDISTN. + (compound_expr): New helper function. + (sparc_atomic_assign_expand_fenv): New function. + * config/sparc/sparc.md (unspecv): Reorder values, add UNSPECV_LDFSR + and UNSPECV_STFSR. + (flush, flushdi): Merge into single pattern. + (ldfsr): New instruction. + (stfsr): Likewise. + +2013-12-06 Oleg Endo <olegendo@gcc.gnu.org> + + * asan.c: Remove struct tags when referring to class varpool_node. + * cgraph.h: Likewise. + * cgraphbuild.c: Likewise. + * cgraphunit.c: Likewise. + * dbxout.c: Likewise. + * dwarf2out.c: Likewise. + * gimple-fold.c: Likewise. + * ipa-devirt.c: Likewise. + * ipa-ref-inline.h: Likewise. + * ipa-ref.h: Likewise. + * ipa-reference.c: Likewise. + * ipa-utils.c: Likewise. + * ipa.c: Likewise. + * lto-cgraph.c: Likewise. + * lto-streamer-out.c: Likewise. + * lto-streamer.h: Likewise. + * passes.c: Likewise. + * toplev.c: Likewise. + * tree-eh.c: Likewise. + * tree-emutls.c: Likewise. + * tree-pass.h: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-vectorizer.c: Likewise. + * tree.c: Likewise. + * varasm.c: Likewise. + * varpool.c: Likewise. + +2013-12-06 Oleg Endo <olegendo@gcc.gnu.org> + + * cgraphunit.c: Remove struct tags when referring to class + ipa_opt_pass_d or class opt_pass. + * function.h: Likewise. + * lto-cgraph.c: Likewise. + * pass_manager.h: Likewise. + * passes.c: Likewise. + * tree-pass.h: Likewise. + +2013-12-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59058 + * tree-vectorizer.h (struct _loop_vec_info): Add num_itersm1 member. + (LOOP_VINFO_NITERSM1): New macro. + * tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): Express + the vector loop entry test in terms of scalar latch executions. + (vect_do_peeling_for_alignment): Update LOOP_VINFO_NITERSM1. + * tree-vect-loop.c (vect_get_loop_niters): Also return the + number of latch executions. + (new_loop_vec_info): Initialize LOOP_VINFO_NITERSM1. + (vect_analyze_loop_form): Likewise. + (vect_generate_tmps_on_preheader): Compute the number of + vectorized iterations differently. + +2013-12-05 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/score/score.c (score_force_temporary): Delete function. + (score_split_symbol): Ditto. + * config/score/score.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add extra + parentheses to silence ambiguity warning and reindent. + +2013-12-05 Marek Polacek <polacek@redhat.com> + + * doc/invoke.texi: Document -fsanitize=signed-integer-overflow. + +2013-12-05 H.J. Lu <hongjiu.lu@intel.com> + + * config.gcc: Support --with-cpu=ia. + + * config/i386/i386.c (cpu_names): Add "ia". + (processor_alias_table): Likewise. + (ix86_option_override_internal): Disallow -march=ia. + * config/i386/i386.h (target_cpu_default): Add TARGET_CPU_DEFAULT_ia. + + * doc/invoke.texi: Document -mtune=ia. + +2013-12-05 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59317 + * lra-constraints.c (in_class_p): Don't ignore insn with constant + as a source. + +2013-12-05 Martin Jambor <mjambor@suse.cz> + + PR ipa/58253 + * ipa-prop.c (ipa_modify_formal_parameters): Create decls of + non-BLKmode in their naturally aligned type. + +2013-12-05 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59333 + PR sanitizer/59397 + * ubsan.c: Include rtl.h and expr.h. + (ubsan_encode_value): Add new parameter. If expanding, assign + a stack slot for DECL_RTL of the temporary and call expand_assignment. + Handle BOOLEAN_TYPE and ENUMERAL_TYPE. + (ubsan_build_overflow_builtin): Adjust ubsan_encode_value call. + * ubsan.h (ubsan_encode_value): Adjust declaration. + * internal-fn.c (ubsan_expand_si_overflow_addsub_check): Move + ubsan_build_overflow_builtin above expand_normal call. Surround + this call with push_temp_slots and pop_temp_slots. + (ubsan_expand_si_overflow_neg_check): Likewise. + (ubsan_expand_si_overflow_mul_check): Likewise. + +2013-12-05 Yufeng Zhang <yufeng.zhang@arm.com> + + * gimple-ssa-strength-reduction.c (find_basis_for_candidate): Guard + the get_alternative_base call with flag_expensive_optimizations. + (alloc_cand_and_find_basis): Likewise. + +2013-12-05 Tejas Belagod <tejas.belagod@arm.com> + + * rtlanal.c (set_noop_p): Return nonzero in case of redundant + vec_select for overlapping register lanes. + +2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/i386.c (ix86_expand_builtin): Generate + reg for readflags built-in when optimizing. + * config/i386/i386.md (*pushfl<mode>): Rename to ... + (pushfl<mode>2): This. Fix iterator. + (*popfl<mode>): Rename to ... + (*popfl<mode>1): This. Fix iterator. + +2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/i386.c (IX86_BUILTIN_READ_FLAGS): New. + (IX86_BUILTIN_WRITE_FLAGS): Ditto. + (ix86_init_mmx_sse_builtins): Define + __builtin_ia32_writeeflags_u32, __builtin_ia32_writeeflags_u64, + __builtin_ia32_readeflags_u32, __builtin_ia32_readeflags_u64. + (ix86_expand_builtin): Expand them. + * config/i386/ia32intrin.h (__readeflags): New. + (__writeeflags): Ditto. + * config/i386/i386.md (*pushfl<mode>): Ditto. + (*popfl<mode>1): Ditto. + +2013-12-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59374 + * tree-vect-data-refs.c (vect_slp_analyze_data_ref_dependence): + Commonize known and unknown dependence case fixing the allowed + read-write dependence case and dropping code that should not matter. + +2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/ia64/ia64.md (prologue_allocate_stack): Block auto- + generation of predicated version. + (epilogue_deallocate_stack): Ditto. + (prologue_allocate_stack_pr): Add explicit predicated version. + (epilogue_deallocate_stack_pr): Ditto. + * config/ia64/ia64.c (ia64_single_set): Use explicit version. + +2013-12-05 Alan Modra <amodra@gmail.com> + + * configure.ac (BUILD_CXXFLAGS) Don't use ALL_CXXFLAGS for + build != host. + <recursive call for build != host>: Clear GMPINC. Don't bother + saving CFLAGS. + +2013-12-04 Jakub Jelinek <jakub@redhat.com> + Marek Polacek <polacek@redhat.com> + + * opts.c (common_handle_option): Handle + -fsanitize=signed-integer-overflow. + * config/i386/i386.md (addv<mode>4, subv<mode>4, mulv<mode>4, + negv<mode>3, negv<mode>3_1): Define expands. + (*addv<mode>4, *subv<mode>4, *mulv<mode>4, *negv<mode>3): Define insns. + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_ADD_OVERFLOW, + BUILT_IN_UBSAN_HANDLE_SUB_OVERFLOW, + BUILT_IN_UBSAN_HANDLE_MUL_OVERFLOW, + BUILT_IN_UBSAN_HANDLE_NEGATE_OVERFLOW): Define. + * ubsan.h (PROB_VERY_UNLIKELY, PROB_EVEN, PROB_VERY_LIKELY, + PROB_ALWAYS): Define. + (ubsan_build_overflow_builtin): Declare. + * gimple-fold.c (gimple_fold_stmt_to_constant_1): Add folding of + internal functions. + * ubsan.c (PROB_VERY_UNLIKELY): Don't define here. + (ubsan_build_overflow_builtin): New function. + (instrument_si_overflow): Likewise. + (ubsan_pass): Add signed integer overflow checking. + (gate_ubsan): Enable the pass also when SANITIZE_SI_OVERFLOW. + * flag-types.h (enum sanitize_code): Add SANITIZE_SI_OVERFLOW. + * internal-fn.c: Include ubsan.h and target.h. + (ubsan_expand_si_overflow_addsub_check): New function. + (ubsan_expand_si_overflow_neg_check): Likewise. + (ubsan_expand_si_overflow_mul_check): Likewise. + (expand_UBSAN_CHECK_ADD): Likewise. + (expand_UBSAN_CHECK_SUB): Likewise. + (expand_UBSAN_CHECK_MUL): Likewise. + * fold-const.c (fold_binary_loc): Don't fold A + (-B) -> A - B and + (-A) + B -> B - A when doing the signed integer overflow checking. + * internal-fn.def (UBSAN_CHECK_ADD, UBSAN_CHECK_SUB, UBSAN_CHECK_MUL): + Define. + * tree-vrp.c (extract_range_basic): Handle internal calls. + * optabs.def (addv4_optab, subv4_optab, mulv4_optab, negv4_optab): New + optabs. + * asan.c: Include predict.h. + (PROB_VERY_UNLIKELY, PROB_ALWAYS): Don't define here. + * predict.c: Move the PROB_* macros... + * predict.h (enum br_predictor): ...here. + (PROB_LIKELY, PROB_UNLIKELY): Define. + * trans-mem.c: Include predict.h. + (PROB_VERY_UNLIKELY, PROB_ALWAYS, PROB_VERY_LIKELY, + PROB_LIKELY, PROB_UNLIKELY): Don't define here. + +2013-12-04 Jeff Law <law@redhat.com> + + * common.opt: Split up -fisolate-erroneous-paths into + -fisolate-erroneous-paths-dereference and + -fisolate-erroneous-paths-attribute. + * invoke.texi: Corresponding changes. + * gimple.c (infer_nonnull_range): Add and use new arguments to control + what kind of statements can be used to infer a non-null range. + * gimple.h (infer_nonnull_range): Update prototype. + * tree-vrp.c (infer_value_range): Corresponding changes. + * opts.c (default_options_table): Update due to option split. + * gimple-ssa-isolate-paths.c: Fix trailing whitespace. + (find_implicit_erroneous_behaviour): Pass additional arguments + to infer_nonnull_range. + (find_explicit_erroneous_behaviour): Similarly. + (gate_isolate_erroneous_paths): Check both of the new options. + +2013-12-04 Jeff Law <law@redhat.com> + + * expr.c (expand_assignment): Update comments. + +2013-12-04 Tobias Burnus <burnus@net-b.de> + + PR debug/37132 + * lto-streamer.h (LTO_tags): Add LTO_namelist_decl_ref. + * tree.def (NAMELIST_DECL): Add. + * tree.h (NAMELIST_DECL_ASSOCIATED_DECL): New macro. + * tree.c (initialize_tree_contains_struct): Add asserts for it. + * dwarf2out.c (gen_namelist_decl): New function. + (gen_decl_die, dwarf2out_decl): Call it. + (dwarf2out_imported_module_or_decl_1): Handle NAMELIST_DECL. + * lto-streamer-in.c (lto_input_tree_ref): Handle NAMELIST_DECL. + (lto_input_tree_ref, lto_input_tree_1): Update lto_tag_check_range + call. + * lto-streamer-out.c (lto_output_tree_ref): Handle NAMELIST_DECL. + +2013-12-03 Xinliang David Li <davidxl@google.com> + + * tree-ssa-structalias.c (constraint_set_union): Change return type + from void to bool. + (merge_node_constraints): Ditto. + (unify_nodes): Update changed set when constraints set changes. + +2013-12-04 H.J. Lu <hongjiu.lu@intel.com> + + * configure.ac: Append gdbasan.in to .gdbinit if CFLAGS contains + -fsanitize=address. + * configure: Regenerated. + + * gdbasan.in: New file. + +2013-12-04 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58726 + * combine.c (force_to_mode): Fix comment typo. Don't destructively + modify x for ROTATE, ROTATERT and IF_THEN_ELSE. + +2013-12-04 Jakub Jelinek <jakub@redhat.com> + Uros Bizjak <ubizjak@gmail.com> + + PR target/59163 + * config/i386/i386.c (ix86_legitimate_combined_insn): If for + !TARGET_AVX there is misaligned MEM operand with vector mode + and get_attr_ssememalign is 0, return false. + (ix86_expand_special_args_builtin): Add get_pointer_alignment + computed alignment and for non-temporal loads/stores also + at least GET_MODE_ALIGNMENT as MEM_ALIGN. + * config/i386/sse.md + (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>, + <sse>_storeu<ssemodesuffix><avxsizesuffix>, + <sse2_avx_avx512f>_loaddqu<mode><mask_name>, + <sse2_avx_avx512f>_storedqu<mode>, <sse3>_lddqu<avxsizesuffix>, + sse_vmrcpv4sf2, sse_vmrsqrtv4sf2, sse2_cvtdq2pd, sse_movhlps, + sse_movlhps, sse_storehps, sse_loadhps, sse_loadlps, + *vec_interleave_highv2df, *vec_interleave_lowv2df, + *vec_extractv2df_1_sse, sse2_movsd, sse4_1_<code>v8qiv8hi2, + sse4_1_<code>v4qiv4si2, sse4_1_<code>v4hiv4si2, + sse4_1_<code>v2qiv2di2, sse4_1_<code>v2hiv2di2, + sse4_1_<code>v2siv2di2, sse4_2_pcmpestr, *sse4_2_pcmpestr_unaligned, + sse4_2_pcmpestri, sse4_2_pcmpestrm, sse4_2_pcmpestr_cconly, + sse4_2_pcmpistr, *sse4_2_pcmpistr_unaligned, sse4_2_pcmpistri, + sse4_2_pcmpistrm, sse4_2_pcmpistr_cconly): Add ssememalign attribute. + * config/i386/i386.md (ssememalign): New define_attr. + +2013-12-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59355 + * ipa-devirt.c (gate_ipa_devirt): Return false if !flag_devirtualize. + * opts.c (common_handle_option): Fix comment spelling. + +2013-12-04 Yufeng Zhang <yufeng.zhang@arm.com> + + * gimple-ssa-strength-reduction.c: Include tree-affine.h. + (name_expansions): New static variable. + (alt_base_map): Ditto. + (get_alternative_base): New function. + (find_basis_for_candidate): For CAND_REF, optionally call + find_basis_for_base_expr with the returned value from + get_alternative_base. + (record_potential_basis): Add new parameter 'base' of type 'tree'; + add an assertion of non-NULL base; use base to set node->base_expr. + (alloc_cand_and_find_basis): Update; call record_potential_basis + for CAND_REF with the returned value from get_alternative_base. + (replace_refs): Dump details on the replacing. + (execute_strength_reduction): Call pointer_map_create for + alt_base_map; call free_affine_expand_cache with &name_expansions. + +2013-12-03 Wei Mi <wmi@google.com> + + PR rtl-optimization/59020 + * sched-deps.c (try_group_insn): Move it from haifa-sched.c to here. + (sched_analyze_insn): Call try_group_insn. + (sched_analyze): Cleanup SCHED_GROUP_P before start the analysis. + * haifa-sched.c (try_group_insn): Moved to sched-deps.c. + (group_insns_for_macro_fusion): Removed. + (sched_init): Remove calling group_insns_for_macro_fusion. + +2013-12-03 Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/htmintrin.h (_TEXASR_INSTRUCTION_FETCH_CONFLICT): Fix + typo in macro name. + (_TEXASRU_INSTRUCTION_FETCH_CONFLICT): Likewise. + +2013-12-03 Vladimir Makarov <vmakarov@redhat.com> + + * config/aarch64/aarch64.c (aarch64_frame_pointer_required): Check + LR_REGNUM. + (aarch64_can_eliminate): Don't check elimination source when + frame_pointer_required is false. + +2013-12-03 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + * config/avr/avr.c (avr_option_override): Warn if asked to generate + position independent code. + * config/avr/avr.h: Modify LINK_SPEC to reject -shared. + +2013-12-03 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59363 + * config/i386/i386.c (emit_memset): Adjust destination address + after gen_strset. + (expand_setmem_epilogue): Likewise. + +2013-12-03 Marek Polacek <polacek@redhat.com> + + PR middle-end/56344 + * calls.c (expand_call): Disallow passing huge arguments by value. + +2013-12-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59362 + * tree-object-size.c (object_sizes): Change into array of + vec<unsigned HOST_WIDE_INT>. + (compute_builtin_object_size): Check computed bitmap for + non-NULL instead of object_sizes. Call safe_grow on object_sizes + vector if new SSA_NAMEs appeared. + (init_object_sizes): Check computed bitmap for non-NULL. + Call safe_grow on object_sizes elements instead of initializing + it with XNEWVEC. + (fini_object_sizes): Call release on object_sizes elements, don't + set it to NULL. + + PR middle-end/59011 + * gimplify.c (nonlocal_vla_vars): New variable. + (gimplify_var_or_parm_decl): Put VAR_DECLs for VLAs into + nonlocal_vla_vars chain. + (gimplify_body): Call declare_vars on nonlocal_vla_vars chain + if outer_bind has DECL_INITIAL (current_function_decl) block. + + PR target/58864 + * dojump.c (save_pending_stack_adjust, restore_pending_stack_adjust): + New functions. + * expr.h (struct saved_pending_stack_adjust): New type. + (save_pending_stack_adjust, restore_pending_stack_adjust): New + prototypes. + * optabs.c (emit_conditional_move): Call save_pending_stack_adjust + and get_last_insn before do_pending_stack_adjust, call + restore_pending_stack_adjust after delete_insns_since. + * expr.c (expand_expr_real_2): Don't call do_pending_stack_adjust + before calling emit_conditional_move. + * expmed.c (expand_sdiv_pow2): Likewise. + * calls.c (expand_call): Use {save,restore}_pending_stack_adjust. + +2013-12-02 Jeff Law <law@redhat.com> + + PR tree-optimization/59322 + * tree-ssa-threadedge.c (create_edge_and_update_destination_phis): + Remove code which copied jump threading paths. + +2013-12-02 Sriraman Tallam <tmsriram@google.com> + + PR target/58944 + * config/i386/i386.opt (ix86_arch_string): Mark this variable + for saving in cl_target_option. + (ix86_tune_string): Ditto. + (ix86_cmodel): Ditto. + (ix86_abi): Ditto. + (ix86_asm_dialect): Ditto. + (ix86_branch_cost): Ditto. + (ix86_dump_tunes): Ditto. + (ix86_force_align_arg_pointer): Ditto. + (ix86_force_drap): Ditto. + (ix86_incoming_stack_boundary_arg): Ditto. + (ix86_pmode): Ditto. + (ix86_preferred_stack_boundary_arg): Ditto. + (ix86_recip_name): Ditto. + (ix86_regparm): Ditto. + (ix86_section_threshold): Ditto. + (ix86_sse2avx): Ditto. + (ix86_stack_protector_guard): Ditto. + (ix86_stringop_alg): Ditto. + (ix86_tls_dialect): Ditto. + (ix86_tune_ctrl_string): Ditto. + (ix86_tune_memcpy_strategy): Ditto. + (ix86_tune_memset_strategy): Ditto. + (ix86_tune_no_default): Ditto. + (ix86_veclibabi_type): Ditto. + * config/i386/i386.c (function_specific_save): Save the above + variables in gcc_options to cl_target_option. + (function_specific_restore): Do the reverse done in + function_specific_save. + (ix86_valid_target_attribute_tree): Change ix86_arch_string + and ix86_tune_string to use the opts structure. + (ix86_option_override_internal):Change + ix86_incoming_stack_boundary_arg to + opts->x_ix86_incoming_stack_boundary_arg + +2013-12-02 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.h: Wrap rtl_opt_pass declarations + in #ifndef IN_LIBGCC2 / #endif. + +2013-12-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59358 + * tree-vrp.c (union_ranges): To check for the partially overlapping + ranges or adjacent ranges, also compare *vr0max with vr1max. + +2013-12-02 Sterling Augustine  <saugustine@google.com> + + * dwarf2out.c (output_pubnames): Use comp_unit_die ()->die_offset + when there isn't a skeleton die. + +2013-12-02 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59353 + * doc/invoke.texi: Document -fsanitize=return. + +2013-12-02 Tobias Burnus <burnus@net-b.de> + Manuel López-Ibáñez <manu@gcc.gnu.org> + + PR middle-end/59257 + * doc/invoke.texi: Add missing @opindex. + (-fsanitize=): Use @gcctabopt instead of @itemize. + +2013-12-02 Bernd Edlinger <bernd.edlinger@hotmail.de> + + Fix C++0x memory model for unaligned fields in packed, aligned(4) + structures with -fno-strict-volatile-bitfields on STRICT_ALIGNMENT + targets like arm-none-eabi. + * expr.c (expand_assignment): Handle normal fields like bit regions. + +2013-12-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59139 + * tree-ssa-loop-niter.c (chain_of_csts_start): Properly match + code in get_val_for. + (get_val_for): Use gcc_checking_asserts. + +2013-12-02 Richard Biener <rguenther@suse.de> + + PR middle-end/59199 + * tree-ssa-operands.c (opf_implicit): Remove. + (opf_address_taken): New flag. + (get_expr_operands): Remove early out, pass down opf_address_taken for + ADDR_EXPRs, add a use operand only for non-opf_address_taken bases. + (get_indirect_ref_operands): Rename to ... + (get_mem_ref_operands): ... this. + (get_asm_expr_operands): Rename to ... + (get_asm_stmt_operands): ... this. + +2013-12-02 Yuri Rumyantsev <ysrumyan@gmail.com> + + * ipa-inline.c (check_callers): Add missed pointer de-reference. + +2013-12-02 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/59356 + * tree-dfa.h (get_addr_base_and_unit_offset_1) <case ARRAY_REF>: Do the + offset computation using the precision of the index type. + +2013-12-02 Yvan Roux <yvan.roux@linaro.org> + + PR target/58785 + * config/arm/arm.c (arm_preferred_reload_class): Only return LO_REGS + when rclass is GENERAL_REGS. + +2013-12-02 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * loop-unroll.c (decide_unroll_constant_iterations): Check macro + TARGET_LOOP_UNROLL_ADJUST while deciding unroll factor. + +2013-12-01 Eric Botcazou <ebotcazou@adacore.com> + + * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an + identifier node. + +2013-12-01 Bernd Edlinger <bernd.edlinger@hotmail.de> + + * expr.c (emit_group_store): Fix off-by-one BITFIELD_END argument. + +2013-11-30 Paulo Matos <pmatos@broadcom.com> + Eric Botcazou <ebotcazou@adacore.com> + + * combine.c (reg_nonzero_bits_for_combine): Apply mask transformation + as applied to nonzero_sign_valid when last_set_mode has less precision + than mode. + +2013-11-30 Tobias Burnus <burnus@net-b.de> + + PR sanitizer/59275 + * doc/invoke.texi (-fsanitize=address,leak): Mention the associated + environment variable and link to a list with flags. + (-fsanitize=thread): Ditto and update link. + +2013-11-29 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59340 + * lra.c (check_rtl): Use recog_memoized instead of insn_invalid_p. + + Revert + 2013-11-20 Robert Suchanek <Robert.Suchanek@imgtec.com> + + * lra.c (lra): Set lra_in_progress before check_rtl call. + * recog.c (insn_invalid_p): Add !lra_in_progress to prevent + adding clobber regs when LRA is running. + +2013-11-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/59289 + * config/arm/arm.c (cortexa15_extra_costs): Adjust costs. + +2013-11-29 Richard Biener <rguenther@suse.de> + + PR middle-end/59208 + * tree-ssa-operands.h (fini_ssa_operands, verify_ssa_operands, + free_stmt_operands, update_stmt_operands): Add struct function + argument. + * tree-ssa-operands.c: Remove uses of cfun, propagate struct + function argument from fini_ssa_operands, verify_ssa_operands, + free_stmt_operands and update_stmt_operands everywhere. + * tree-ssanames.h (release_ssa_name_fn): New. + (release_ssa_name): Inline wrapper around release_ssa_name_fn. + * tree-ssanames.c (release_ssa_name): Rename to ... + (release_ssa_name_fn): ... this and add struct function argument. + * gimple-ssa.h (update_stmt, update_stmt_if_modified): Adjust. + (update_stmt_fn): New function. + * tree-cfg.c (move_block_to_fn): Adjust. + * tree-if-conv.c (free_bb_predicate): Likewise. + * tree-ssa.c (verify_ssa): Likewise. + (delete_tree_ssa): Likewise. + * gimple-pretty-print.c (dump_gimple_mem_ops): Remove guard. + * cgraph.c (cgraph_redirect_edge_call_stmt_to_callee): Call + update_stmt_fn instead of update_stmt. + +2013-11-29 Yvan Roux <yvan.roux@linaro.org> + + * config/arm/arm.h (THUMB_SECONDARY_INPUT_RELOAD_CLASS): Return NO_REGS + for LRA. + +2013-11-29 Yvan Roux <yvan.roux@linaro.org> + + * config/arm/arm.md (store_minmaxsi): Use only when + optimize_function_for_size_p. + +2013-11-29 Jakub Jelinek <jakub@redhat.com> + Yury Gribov <y.gribov@samsung.com> + + PR sanitizer/59063 + * config/gnu-user.h: Removed old code for setting up sanitizer libs. + * gcc.c: Using libsanitizer spec instead of explicit libs. + +2013-11-29 Ilya Enkovich <ilya.enkovich@intel.com> + + Reverted: + 2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com> + * cgraph.h (varpool_node): Add need_bounds_init field. + * lto-cgraph.c (lto_output_varpool_node): Output + need_bounds_init value. + (input_varpool_node): Read need_bounds_init value. + * varpool.c (dump_varpool_node): Dump need_bounds_init field. + + Reverted: + 2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com> + * dbxout.c (dbxout_type): Ignore POINTER_BOUNDS_TYPE. + * dwarf2out.c (gen_subprogram_die): Ignore bound args. + (gen_type_die_with_usage): Skip pointer bounds. + (dwarf2out_global_decl): Likewise. + + Reverted: + 2013-11-18 Ilya Enkovich <ilya.enkovich@intel.com> + * builtin-types.def (BT_FN_PTR_CONST_PTR_VAR): New. + * chkp-builtins.def (BUILT_IN_CHKP_BIND_BOUNDS): New. + * cfgexpand.c (expand_call_stmt): Expand BUILT_IN_CHKP_BIND_BOUNDS. + * gimple.c (gimple_call_get_nobnd_arg_index): Remove. + * gimple.h (gf_mask): Add GF_CALL_WITH_BOUNDS. + (gimple_call_with_bounds_p): New. + (gimple_call_set_with_bounds): New. + (gimple_call_num_nobnd_args): Remove. + (gimple_call_nobnd_arg): Remove. + * tree.h (CALL_WITH_BOUNDS_P): New. + * rtl.h (CALL_EXPR_WITH_BOUNDS_P): New. + + Reverted: + 2013-11-08 Ilya Enkovich <ilya.enkovich@intel.com> + * common.opt (fcheck-pointer-bounds): Move to ... + * c-family/c.opt: ... here. + * langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): Remove. + (LANG_HOOKS_INITIALIZER): Remove LANG_HOOKS_CHKP_SUPPORTED. + * langhooks.h (lang_hooks): Remove chkp_supported field. + * toplev.c (process_options): Remove chkp_supported check. + + Reverted: + 2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + * tree-core.h (tree_index): Add TI_POINTER_BOUNDS_TYPE. + * tree.h (POINTER_BOUNDS_P): New. + (BOUNDED_TYPE_P): New. + (BOUNDED_P): New. + (pointer_bounds_type_node): New. + * tree.c (build_common_tree_nodes): Initialize + pointer_bounds_type_node. + * gimple.h (gimple_call_get_nobnd_arg_index): New. + (gimple_call_num_nobnd_args): New. + (gimple_call_nobnd_arg): New. + (gimple_return_retbnd): New. + (gimple_return_set_retbnd): New + * gimple.c (gimple_build_return): Increase number of ops + for return statement. + (gimple_call_get_nobnd_arg_index): New. + * gimple-pretty-print.c (dump_gimple_return): Print second op. + + Reverted: + 2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + * ipa.c (cgraph_build_static_cdtor_1): Support contructors + with "chkp ctor" and "bnd_legacy" attributes. + * gimplify.c (gimplify_init_constructor): Avoid infinite + loop during gimplification of bounds initializer. + + Reverted: + 2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + * c-family/c-common.c (handle_bnd_variable_size_attribute): New. + (handle_bnd_legacy): New. + (c_common_attribute_table): Add bnd_variable_size and bnd_legacy. + * doc/extend.texi: Document bnd_variable_size and bnd_legacy + attributes. + + Reverted: + 2013-10-29 Ilya Enkovich <ilya.enkovich@intel.com> + * builtin-types.def (BT_FN_VOID_CONST_PTR): New. + (BT_FN_PTR_CONST_PTR): New. + (BT_FN_CONST_PTR_CONST_PTR): New. + (BT_FN_PTR_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR): New. + (BT_FN_VOID_PTRPTR_CONST_PTR): New. + (BT_FN_VOID_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR_SIZE): New. + * chkp-builtins.def: New. + * builtins.def: include chkp-builtins.def. + (DEF_CHKP_BUILTIN): New. + * builtins.c (expand_builtin): Support BUILT_IN_CHKP_INIT_PTR_BOUNDS, + BUILT_IN_CHKP_NULL_PTR_BOUNDS, BUILT_IN_CHKP_COPY_PTR_BOUNDS, + BUILT_IN_CHKP_CHECK_PTR_LBOUNDS, BUILT_IN_CHKP_CHECK_PTR_UBOUNDS, + BUILT_IN_CHKP_CHECK_PTR_BOUNDS, BUILT_IN_CHKP_SET_PTR_BOUNDS, + BUILT_IN_CHKP_NARROW_PTR_BOUNDS, BUILT_IN_CHKP_STORE_PTR_BOUNDS, + BUILT_IN_CHKP_GET_PTR_LBOUND, BUILT_IN_CHKP_GET_PTR_UBOUND, + BUILT_IN_CHKP_BNDMK, BUILT_IN_CHKP_BNDSTX, BUILT_IN_CHKP_BNDCL, + BUILT_IN_CHKP_BNDCU, BUILT_IN_CHKP_BNDLDX, BUILT_IN_CHKP_BNDRET, + BUILT_IN_CHKP_INTERSECT, BUILT_IN_CHKP_ARG_BND, BUILT_IN_CHKP_NARROW, + BUILT_IN_CHKP_EXTRACT_LOWER, BUILT_IN_CHKP_EXTRACT_UPPER. + * common.opt (fcheck-pointer-bounds): New. + * toplev.c (process_options): Check Pointer Bounds Checker is + supported. + * doc/extend.texi: Document Pointer Bounds Checker built-in functions. + + Reverted: + 2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + * target.def (builtin_chkp_function): New. + (chkp_bound_type): New. + (chkp_bound_mode): New. + (fn_abi_va_list_bounds_size): New. + (load_bounds_for_arg): New. + (store_bounds_for_arg): New. + * targhooks.h (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_fn_abi_va_list_bounds_size): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode): New. + (default_builtin_chkp_function): New. + * targhooks.c (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_fn_abi_va_list_bounds_size): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode); New. + (default_builtin_chkp_function): New. + * doc/tm.texi.in (TARGET_FN_ABI_VA_LIST_BOUNDS_SIZE): New. + (TARGET_LOAD_BOUNDS_FOR_ARG): New. + (TARGET_STORE_BOUNDS_FOR_ARG): New. + (TARGET_BUILTIN_CHKP_FUNCTION): New. + (TARGET_CHKP_BOUND_TYPE): New. + (TARGET_CHKP_BOUND_MODE): New. + * doc/tm.texi: Regenerated. + * langhooks.h (lang_hooks): Add chkp_supported field. + * langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): New. + (LANG_HOOKS_INITIALIZER); Add LANG_HOOKS_CHKP_SUPPORTED. + + Reverted: + 2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com> + * config/i386/constraints.md (B): New. + (Ti): New. + (Tb): New. + * config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__. + * config/i386/i386-modes.def (BND32): New. + (BND64): New. + * config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New. + * config/i386/i386.c (isa_opts): Add mmpx. + (regclass_map): Add bound registers. + (dbx_register_map): Likewise. + (dbx64_register_map): Likewise. + (svr4_dbx_register_map): Likewise. + (PTA_MPX): New. + (ix86_option_override_internal): Support MPX ISA. + (ix86_conditional_register_usage): Support bound registers. + (print_reg): Likewise. + (ix86_code_end): Add MPX bnd prefix. + (output_set_got): Likewise. + (ix86_output_call_insn): Likewise. + (ix86_print_operand): Add '!' (MPX bnd) print prefix support. + (ix86_print_operand_punct_valid_p): Likewise. + (ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and + UNSPEC_BNDMK_ADDR. + (ix86_class_likely_spilled_p): Add bound regs support. + (ix86_hard_regno_mode_ok): Likewise. + (x86_order_regs_for_local_alloc): Likewise. + (ix86_bnd_prefixed_insn_p): New. + * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Fix to new value. + (FIXED_REGISTERS): Add bound registers. + (CALL_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (HARD_REGNO_NREGS): Likewise. + (TARGET_MPX): New. + (VALID_BND_REG_MODE): New. + (FIRST_BND_REG): New. + (LAST_BND_REG): New. + (reg_class): Add BND_REGS. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + (BND_REGNO_P): New. + (ANY_BND_REG_P): New. + (BNDmode): New. + (HI_REGISTER_NAMES): Add bound registers. + * config/i386/i386.md (UNSPEC_BNDMK): New. + (UNSPEC_BNDMK_ADDR): New. + (UNSPEC_BNDSTX): New. + (UNSPEC_BNDLDX): New. + (UNSPEC_BNDLDX_ADDR): New. + (UNSPEC_BNDCL): New. + (UNSPEC_BNDCU): New. + (UNSPEC_BNDCN): New. + (UNSPEC_MPX_FENCE): New. + (BND0_REG): New. + (BND1_REG): New. + (type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (length_immediate): Likewise. + (prefix_0f): Likewise. + (memory): Likewise. + (prefix_rep): Check for bnd prefix. + (length_nobnd): New. + (length): Use length_nobnd if specified. + (BND): New. + (bnd_ptr): New. + (BNDCHECK): New. + (bndcheck): New. + (*jcc_1): Add bnd prefix and rename length attr to length_nobnd. + (*jcc_2): Likewise. + (jump): Likewise. + (simple_return_internal): Likewise. + (simple_return_pop_internal): Likewise. + (*indirect_jump): Add MPX bnd prefix. + (*tablejump_1): Likewise. + (simple_return_internal_long): Likewise. + (simple_return_indirect_internal): Likewise. + (<mode>_mk): New. + (*<mode>_mk): New. + (mov<mode>): New. + (*mov<mode>_internal_mpx): New. + (<mode>_<bndcheck>): New. + (*<mode>_<bndcheck>): New. + (<mode>_ldx): New. + (*<mode>_ldx): New. + (<mode>_stx): New. + (*<mode>_stx): New. + * config/i386/predicates.md (lea_address_operand): Rename to... + (address_no_seg_operand): ... this. + (address_mpx_no_base_operand): New. + (address_mpx_no_index_operand): New. + (bnd_mem_operator): New. + * config/i386/i386.opt (mmpx): New. + * doc/invoke.texi: Add documentation for the flags -mmpx, -mno-mpx. + * doc/rtl.texi Add documentation for BND32mode and BND64mode. + + Reverted: + 2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com> + * mode-classes.def (MODE_POINTER_BOUNDS): New. + * tree.def (POINTER_BOUNDS_TYPE): New. + * genmodes.c (complete_mode): Support MODE_POINTER_BOUNDS. + (POINTER_BOUNDS_MODE): New. + (make_pointer_bounds_mode): New. + * machmode.h (POINTER_BOUNDS_MODE_P): New. + * stor-layout.c (int_mode_for_mode): Support MODE_POINTER_BOUNDS. + (layout_type): Support POINTER_BOUNDS_TYPE. + * tree-pretty-print.c (dump_generic_node): Support POINTER_BOUNDS_TYPE. + * tree.c (build_int_cst_wide): Support POINTER_BOUNDS_TYPE. + (type_contains_placeholder_1): Likewise. + * tree.h (POINTER_BOUNDS_TYPE_P): New. + * varasm.c (output_constant): Support POINTER_BOUNDS_TYPE. + * doc/rtl.texi (MODE_POINTER_BOUNDS): New. + +2013-11-29 Richard Biener <rguenther@suse.de> + + PR middle-end/59338 + * tree-cfg.c (verify_expr): Restrict bounds verification of + BIT_FIELD_REF arguments to non-aggregate typed base objects. + +2013-11-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59334 + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Fix bug + in previous commit. + +2013-11-29 Jakub Jelinek <jakub@redhat.com> + Richard Biener <rguenther@suse.de> + + PR lto/59326 + * omp-low.c (simd_clone_create): Return NULL if for definition + !cgraph_function_with_gimple_body_p (old_node). Call cgraph_get_body + before calling cgraph_function_versioning. + (expand_simd_clones): Look for "omp declare simd" attribute first. + Don't check targetm.simd_clone.compute_vecsize_and_simdlen here. + Punt if node->global.inlined_to. + (pass_omp_simd_clone::gate): Also enable if in_lto_p && !flag_wpa. + Disable pass if targetm.simd_clone.compute_vecsize_and_simdlen is NULL. + * lto-streamer-out.c (hash_tree): Handle OMP_CLAUSE. + +2013-11-29 Jakub Jelinek <jakub@redhat.com> + + PR lto/59326 + * tree-core.h (enum omp_clause_schedule_kind): Add + OMP_CLAUSE_SCHEDULE_LAST. + (enum omp_clause_default_kind): Add OMP_CLAUSE_DEFAULT_LAST. + (enum omp_clause_depend_kind): Add OMP_CLAUSE_DEPEND_LAST. + (enum omp_clause_map_kind): Add OMP_CLAUSE_MAP_LAST. + (enum omp_clause_proc_bind_kind): Add OMP_CLAUSE_PROC_BIND_LAST. + * lto-streamer-out.c (lto_is_streamable): Allow streaming OMP_CLAUSE. + (DFS_write_tree_body): Handle OMP_CLAUSE. + * tree-streamer-out.c (pack_ts_omp_clause_value_fields): New function. + (streamer_pack_tree_bitfields): Call it for OMP_CLAUSE. + (write_ts_omp_clause_tree_pointers): New function. + (streamer_write_tree_body): Call it for OMP_CLAUSE. + (streamer_write_tree_header): For OMP_CLAUSE stream OMP_CLAUSE_CODE. + * tree-streamer-in.c (unpack_ts_omp_clause_value_fields): New function. + (unpack_value_fields): Call it for OMP_CLAUSE. + (streamer_alloc_tree): Handle OMP_CLAUSE. + (lto_input_ts_omp_clause_tree_pointers): New function. + (streamer_read_tree_body): Call it for OMP_CLAUSE. + +2013-11-29 Joseph Myers <joseph@codesourcery.com> + + * doc/implement-c.texi: Document C11 implementation-defined + behavior. Refer to -ffp-contract=fast for contraction behavior. + * doc/invoke.texi (-std=c99, std=c11): Update description of + completeness. + (-std=gnu99): Don't mention as future default. + (-std=gnu11): Mention as intended future default. + * doc/standards.texi: Update descriptions of C99 and C11 support. + Limit statement about C99 facilities for freestanding + implementations to some platforms only. + +2013-11-28 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59327 + * cfgexpand.c (expand_used_vars): Avoid warning on 32-bit HWI hosts. + +2013-11-28 Vladimir Makarov <vmakarov@redhat.com> + + PR target/57293 + * ira.h (ira_setup_eliminable_regset): Remove parameter. + * ira.c (ira_setup_eliminable_regset): Ditto. Add + SUPPORTS_STACK_ALIGNMENT for crtl->stack_realign_needed. + Don't call lra_init_elimination. + (ira): Call ira_setup_eliminable_regset without arguments. + * loop-invariant.c (calculate_loop_reg_pressure): Remove argument + from ira_setup_eliminable_regset call. + * gcse.c (calculate_bb_reg_pressure): Ditto. + * haifa-sched.c (sched_init): Ditto. + * lra.h (lra_init_elimination): Remove the prototype. + * lra-int.h (lra_insn_recog_data): New member sp_offset. Move + used_insn_alternative upper. + (lra_eliminate_regs_1): Add one more parameter. + (lra-eliminate): Ditto. + * lra.c (lra_invalidate_insn_data): Set sp_offset. + (setup_sp_offset): New. + (lra_process_new_insns): Call setup_sp_offset. + (lra): Add argument to lra_eliminate calls. + * lra-constraints.c (get_equiv_substitution): Rename to get_equiv. + (get_equiv_with_elimination): New. + (process_addr_reg): Call get_equiv_with_elimination instead of + get_equiv_substitution. + (equiv_address_substitution): Ditto. + (loc_equivalence_change_p): Ditto. + (loc_equivalence_callback, lra_constraints): Ditto. + (curr_insn_transform): Ditto. Print the sp offset + (process_alt_operands): Prevent stack pointer reloads. + (lra_constraints): Remove one argument from lra_eliminate call. + Move it up. Mark used hard regs bfore it. Use + get_equiv_with_elimination instead of get_equiv_substitution. + * lra-eliminations.c (lra_eliminate_regs_1): Add parameter and + assert for param values combination. Use sp offset. Add argument + to lra_eliminate_regs_1 calls. + (lra_eliminate_regs): Add argument to lra_eliminate_regs_1 call. + (curr_sp_change): New static var. + (mark_not_eliminable): Add parameter. Update curr_sp_change. + Don't prevent elimination to sp if we can calculate its change. + Pass the argument to mark_not_eliminable calls. + (eliminate_regs_in_insn): Add a parameter. Use sp offset. Add + argument to lra_eliminate_regs_1 call. + (update_reg_eliminate): Move calculation of hard regs for spill + lower. Switch off lra_in_progress temporarily to generate regs + involved into elimination. + (lra_init_elimination): Rename to init_elimination. Make it + static. Set up insn sp offset, check the offsets at the end of BBs. + (process_insn_for_elimination): Add parameter. Pass its value to + eliminate_regs_in_insn. + (lra_eliminate): : Add parameter. Pass its value to + process_insn_for_elimination. Add assert for param values + combination. Call init_elimination. Don't update offsets in + equivalence substitutions. + * lra-spills.c (assign_mem_slot): Don't call lra_eliminate_regs_1 + for created stack slot. + (remove_pseudos): Call lra_eliminate_regs_1 before changing memory + onto stack slot. + +2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/iterators.md (vrint_conds): New int attribute. + * config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute. + (smax<mode>3): Likewise. + (smin<mode>3): Likewise. + +2013-11-28 Richard Sandiford <rdsandiford@googlemail.com> + + * tree-core.h (tree_base): Document use of static_flag for SSA_NAME. + * tree.h (SSA_NAME_ANTI_RANGE_P, SSA_NAME_RANGE_TYPE): New macros. + * tree-ssanames.h (set_range_info): Add range_type argument. + (duplicate_ssa_name_range_info): Likewise. + * tree-ssanames.c (set_range_info): Take the range type as argument + and store it in SSA_NAME_ANTI_RANGE_P. + (duplicate_ssa_name_range_info): Likewise. + (get_range_info): Use SSA_NAME_ANTI_RANGE_P. + (set_nonzero_bits): Update call to set_range_info. + (duplicate_ssa_name_fn): Update call to duplicate_ssa_name_range_info. + * tree-ssa-copy.c (fini_copy_prop): Likewise. + * tree-vrp.c (remove_range_assertions): Update call to set_range_info. + (vrp_finalize): Likewise, passing anti-ranges directly. + +2013-11-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59330 + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Simplify + and fix delayed marking of free calls not necessary. + +2013-11-28 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa-propagate.c (valid_gimple_call_p): Pass TREE_TYPE to + is_gimple_reg_type. + * ipa-prop.c (determine_known_aggregate_parts): Likewise. + +2013-11-28 Terry Guo <terry.guo@arm.com> + + * config/arm/arm.c (v7m_extra_costs): New table. + (arm_v7m_tune): Use it. + +2013-11-28 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/sol2.h (TIME_LIBRARY): Define. + +2013-11-28 Richard Biener <rguenther@suse.de> + + PR lto/59323 + * lto-streamer-out.c (tree_is_indexable): TYPE_DECLs and + CONST_DECLs in function context are not indexable. + +2013-11-28 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_rtx_costs): Adjust MULT cost if it is + not optimized for size. + +2013-11-28 Jakub Jelinek <jakub@redhat.com> + + * cfgexpand.c (struct stack_vars_data): Add asan_base and asan_alignb + fields. + (expand_stack_vars): For -fsanitize=address, use (and set initially) + data->asan_base as base for vars and update asan_alignb. + (expand_used_vars): Initialize data.asan_base and data.asan_alignb. + Pass them to asan_emit_stack_protection. + * asan.c (asan_detect_stack_use_after_return): New variable. + (asan_emit_stack_protection): Add pbase and alignb arguments. + Implement use after return sanitization. + * asan.h (asan_emit_stack_protection): Adjust prototype. + (ASAN_STACK_MAGIC_USE_AFTER_RET, ASAN_STACK_RETIRED_MAGIC): Define. + +2013-11-28 Sergey Ostanevich <sergos.gnu@gmail.com> + + * common.opt: Introduced a new option -fsimd-cost-model. + * doc/invoke.texi: Introduced a new openmp-simd warning and + a new -fsimd-cost-model option. + * tree-vectorizer.h (unlimited_cost_model): Interface updated + to rely on the particular loop info. + * tree-vect-data-refs.c (vect_peeling_hash_insert): Ditto. + (vect_peeling_hash_choose_best_peeling): Ditto. + (vect_enhance_data_refs_alignment): Ditto. + * tree-vect-slp.c (vect_slp_analyze_bb_1): Ditto. + * tree-vect-loop.c (vect_estimate_min_profitable_iters): Ditto + plus added openmp-simd warining. + +2013-11-27 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/59311 + * dwarf2cfi.c (dwf_regno): Assert reg isn't pseudo register. + * lra-spills.c (spill_pseudos): Handle REG_XXX notes. + +2013-11-27 Eric Botcazou <ebotcazou@adacore.com> + + * var-tracking.c (track_expr_p): Do not track declarations for parts + of tracked parameters. + (add_stores): Do not track values for tracked parameters passed in + multiple locations. + (vt_get_decl_and_offset): Handle PARALLEL. + (vt_add_function_parameter): Handle parameters with incoming PARALLEL. + +2013-11-27 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c (thread_through_all_blocks): Do not + clobber the loop structure thread_block was unsuccessful. If + thread_block was unsuccessful, cleanup appropriately. + +2013-11-27 Chen Liqin <liqin.gcc@gmail.com> + + * config/score/score.h (REG_CLASS_FROM_LETTER): Delete. + (score_char_to_class): Likewise. + +2013-11-27 Kenneth Zadeck <zadeck@naturalbridge.com> + + * fold-const.c (int_const_binop_1): Make INT_MIN % -1 return 0 with + the overflow bit set. + +2013-11-27 Richard Biener <rguenther@suse.de> + + PR middle-end/58723 + * cgraphbuild.c (build_cgraph_edges): Do not build edges + for internal calls. + (rebuild_cgraph_edges): Likewise. + * ipa-inline-analysis.c (estimate_function_body_sizes): + Skip internal calls. + * tree-inline.c (estimate_num_insns): Estimate size of internal + calls as 0. + (gimple_expand_calls_inline): Do not try inline-expanding + internal calls. + * lto-streamer-in.c (input_cfg): Stream loop safelen, + force_vect and simduid. + (input_struct_function_base): Stream has_force_vect_loops + and has_simduid_loops. + (input_function): Adjust. + * lto-streamer-out.c (output_cfg): Stream loop safelen, + force_vect and simduid. + (output_struct_function_base): Stream has_force_vect_loops + and has_simduid_loops. + +2013-11-27 Kai Tietz <ktietz@redhat.com> + + * config/i386/winnt.c (i386_pe_section_type_flags): Use const + pointer cast. + +2013-11-27 Kugan Vivekanandarajah <kuganv@linaro.org> + + * doc/tm.texi.in (TARGET_HAS_NO_HW_DIVIDE): Define. + * doc/tm.texi (TARGET_HAS_NO_HW_DIVIDE): Regenerate. + +2013-11-27 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59306 + * ubsan.c (instrument_null): Use gimple_store_p/gimple_assign_load_p + instead of walk_gimple_op. + (ubsan_pass): Adjust. Call instrument_null only if SANITIZE_NULL. + +2013-11-27 Aldy Hernandez <aldyh@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + * cgraph.h (enum cgraph_simd_clone_arg_type): New. + (struct cgraph_simd_clone_arg, struct cgraph_simd_clone): New. + (struct cgraph_node): Add simdclone and simd_clones fields. + * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen, + ix86_simd_clone_adjust, ix86_simd_clone_usable): New functions. + (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN, + TARGET_SIMD_CLONE_ADJUST, TARGET_SIMD_CLONE_USABLE): Define. + * doc/tm.texi.in (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN, + TARGET_SIMD_CLONE_ADJUST, TARGET_SIMD_CLONE_USABLE): Add. + * doc/tm.texi: Regenerated. + * ggc.h (ggc_alloc_cleared_simd_clone_stat): New function. + * ipa-cp.c (determine_versionability): Fail if "omp declare simd" + attribute is present. + * omp-low.c: Include pretty-print.h, ipa-prop.h and tree-eh.h. + (simd_clone_vector_of_formal_parm_types): New function. + (simd_clone_struct_alloc, simd_clone_struct_copy, + simd_clone_vector_of_formal_parm_types, simd_clone_clauses_extract, + simd_clone_compute_base_data_type, simd_clone_mangle, + simd_clone_create, simd_clone_adjust_return_type, + create_tmp_simd_array, simd_clone_adjust_argument_types, + simd_clone_init_simd_arrays): New functions. + (struct modify_stmt_info): New type. + (ipa_simd_modify_stmt_ops, ipa_simd_modify_function_body, + simd_clone_adjust, expand_simd_clones, ipa_omp_simd_clone): New + functions. + (pass_data_omp_simd_clone): New variable. + (pass_omp_simd_clone): New class. + (make_pass_omp_simd_clone): New function. + * passes.def (pass_omp_simd_clone): New. + * target.def (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN, + TARGET_SIMD_CLONE_ADJUST, TARGET_SIMD_CLONE_USABLE): New target hooks. + * target.h (struct cgraph_node, struct cgraph_simd_node): Declare. + * tree-core.h (OMP_CLAUSE_LINEAR_VARIABLE_STRIDE): Document. + * tree.h (OMP_CLAUSE_LINEAR_VARIABLE_STRIDE): Define. + * tree-pass.h (make_pass_omp_simd_clone): New prototype. + * tree-vect-data-refs.c: Include cgraph.h. + (vect_analyze_data_refs): Inline by hand find_data_references_in_loop + and find_data_references_in_bb, if find_data_references_in_stmt + fails, still allow calls to #pragma omp declare simd functions + in #pragma omp simd loops unless they contain data references among + the call arguments or in lhs. + * tree-vect-loop.c (vect_determine_vectorization_factor): Handle + calls with no lhs. + (vect_transform_loop): Allow NULL STMT_VINFO_VECTYPE for calls + without lhs. + * tree-vectorizer.h (enum stmt_vec_info_type): Add + call_simd_clone_vec_info_type. + (struct _stmt_vec_info): Add simd_clone_fndecl field. + (STMT_VINFO_SIMD_CLONE_FNDECL): Define. + * tree-vect-stmts.c: Include tree-ssa-loop.h, + tree-scalar-evolution.h and cgraph.h. + (vectorizable_call): Handle calls without lhs. Assert + !stmt_can_throw_internal instead of failing for it. Don't update + EH stuff. + (struct simd_call_arg_info): New. + (vectorizable_simd_clone_call): New function. + (vect_transform_stmt): Call it. + (vect_analyze_stmt): Likewise. Allow NULL STMT_VINFO_VECTYPE for + calls without lhs. + * ipa-prop.c (ipa_add_new_function): Only call ipa_analyze_node + if cgraph_function_with_gimple_body_p is true. + +2013-11-27 Tom de Vries <tom@codesourcery.com> + Marc Glisse <marc.glisse@inria.fr> + + PR middle-end/59037 + * fold-const.c (fold_indirect_ref_1): Don't create out-of-bounds + BIT_FIELD_REF. + * gimple-fold.c (gimple_fold_indirect_ref): Same. + * tree-cfg.c (verify_expr): Give error if BIT_FIELD_REF is + out-of-bounds. + +2013-11-27 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/59138 + * expr.c (emit_group_store): Don't write past the end of the structure. + (store_bit_field): Fix formatting. + +2013-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59288 + * tree-vect-loop.c (get_initial_def_for_induction): Do not + re-analyze the PHI but use STMT_VINFO_LOOP_PHI_EVOLUTION_PART. + +2013-11-27 Marek Polacek <polacek@redhat.com> + + * ubsan.c (ubsan_type_descriptor): If varpool_get_node returns NULL + for a decl, recreate that decl. Save into the hash table VAR_DECLs + rather than ADDR_EXPRs. + +2013-11-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * config/ia64/hpux.h (TARGET_LIBC_HAS_FUNCTION): Fix typo. + +2013-11-26 David Malcolm <dmalcolm@redhat.com> + + * gengtype.c (struct seen_tag): New. + (already_seen_tag): New. + (mark_tag_as_seen): New. + (walk_subclasses): Support having multiple subclasses using the + same tag by tracking which tags have already been seen, and using + this to avoid adding duplicate cases to the "switch" statement. + The call to already_seen_tag introduces an O(N^2) when running + gengtype on N, the number of tags, due to the repeated linear + search, but currently max(N) is relatively small (the number of + GSS codes, which is 26). + (walk_type): Pass in a seen_tag for use by the walk_subclasses + recursion. + + * gimple.def (GIMPLE_OMP_ATOMIC_STORE, GIMPLE_OMP_RETURN): Rename + underlying GSS values for these codes (from GSS_OMP_ATOMIC_STORE to + GSS_OMP_ATOMIC_STORE_LAYOUT) to make clear that although + GIMPLE_OMP_RETURN happens to share the data layout of + GIMPLE_OMP_ATOMIC_STORE, they are not otherwise related. + (GIMPLE_OMP_PARALLEL, GIMPLE_OMP_TARGET): Likewise, rename + underlying GSS value from GSS_OMP_PARALLEL to + GSS_OMP_PARALLEL_LAYOUT to make clear that these gimple codes are + not directly related; they merely share in-memory layout. + (GIMPLE_OMP_SINGLE, GIMPLE_OMP_TEAMS): Likewise, rename GSS values + for these two codes from GSS_OMP_SINGLE to GSS_OMP_SINGLE_LAYOUT. + + * gsstruct.def (GSS_OMP_PARALLEL, gimple_statement_omp_parallel): + Rename to... + (GSS_OMP_PARALLEL_LAYOUT, gimple_statement_omp_parallel_layout): + ...these. + (GSS_OMP_SINGLE, gimple_statement_omp_single): Rename to... + (GSS_OMP_SINGLE_LAYOUT, gimple_statement_omp_single_layout): ...these. + (GSS_OMP_ATOMIC_STORE, gimple_statement_omp_atomic_store): Rename to... + (GSS_OMP_ATOMIC_STORE_LAYOUT, gimple_statement_omp_atomic_store): + ...these. + + * gimple.h (gimple_statement_resx): New subclass of + gimple_statement_eh_ctrl, with the invariant that + stmt->code == GIMPLE_RESX. + (gimple_statement_eh_dispatch): New subclass of + gimple_statement_eh_ctrl, with the invariant that + stmt->code == GIMPLE_EH_DISPATH. + + (gimple_statement_omp_parallel): The existing class expressed + a layout (GSS_OMP_PARALLEL), but the codes with that layout + are not all related, so it makes more sense for this class to + express a *code* (GIMPLE_OMP_PARALLEL). GSS_OMP_PARALLEL has + been renamed to GSS_OMP_PARALLEL_LAYOUT to express this, so + rename the existing gimple_statement_omp_parallel class to... + (gimple_statement_omp_parallel_layout): ...this, expressing + a statement of structure layout GSS_OMP_PARALLEL_LAYOUT. + (gimple_statement_omp_taskreg): New subclass of + gimple_statement_omp_parallel_layout, expressing the invariant + that the code is one of GIMPLE_OMP_PARALLEL or GIMPLE_OMP_TASK, + as used by the various gimple_omp_taskreg_ accessors. + (gimple_statement_omp_parallel): Reintroduce this class, this time + as a subclass of gimple_statement_omp_taskreg to express the + invariant stmt->code == GIMPLE_OMP_PARALLEL. + (gimple_statement_omp_target) New class, subclassing + gimple_statement_omp_parallel_layout, to express the invariant + stmt->code == GIMPLE_OMP_TARGET. + (gimple_statement_omp_task): Update to inherit from + gimple_statement_omp_taskreg rather than + gimple_statement_omp_parallel. + + (gimple_statement_omp_single): Rename to... + (gimple_statement_omp_single_layout): ...this, expressing the + invariant that the layout is GSS_OMP_SINGLE_LAYOUT. + (gimple_statement_omp_single): ...and reintroduce this name as + a subclass of gimple_statement_omp_single_layout, expressing + the invariant that code == GIMPLE_OMP_SINGLE. + (gimple_statement_omp_teams): New class, subclassing + gimple_statement_omp_single_layout, for the code GIMPLE_OMP_TEAMS. + + (gimple_statement_omp_atomic_store): Rename to... + (gimple_statement_omp_atomic_store_layout): ...this, expressing + the invariant that the layout is GSS_OMP_ATOMIC_STORE_LAYOUT. + (gimple_statement_omp_atomic_store): ...and reintroduce this + name as a subclass of gimple_statement_omp_atomic_store_layout + with code == GIMPLE_OMP_ATOMIC_STORE. + (gimple_statement_omp_return): New class, subclassing + gimple_statement_omp_atomic_store_layout for the code + GIMPLE_OMP_RETURN. + + (is_a_helper <gimple_statement_eh_ctrl>::test): Delete. + (is_a_helper <gimple_statement_resx>::test): New. + (is_a_helper <gimple_statement_eh_dispatch>::test): New. + (is_a_helper <gimple_statement_omp_atomic_store>::test): Only + check for GIMPLE_OMP_ATOMIC_STORE, not for GIMPLE_OMP_RETURN. + (is_a_helper <gimple_statement_omp_return>::test): New. + (is_a_helper <gimple_statement_omp_taskreg>::test): New. + (is_a_helper <gimple_statement_omp_parallel>::test): Only check + for GIMPLE_OMP_PARALLEL, not for GIMPLE_OMP_TASK or + GIMPLE_OMP_TARGET. + (is_a_helper <gimple_statement_omp_target>::test): New. + (is_a_helper <gimple_statement_omp_single>::test): Only check + for GIMPLE_OMP_SINGLE, not for GIMPLE_OMP_TEAMS. + (is_a_helper <gimple_statement_omp_teams>::test): New. + + (is_a_helper <const gimple_statement_eh_ctrl>::test): Delete. + (is_a_helper <const gimple_statement_resx>::test): New. + (is_a_helper <const gimple_statement_eh_dispatch>::test): New. + (is_a_helper <const gimple_statement_omp_atomic_store>::test): Only + check for GIMPLE_OMP_ATOMIC_STORE, not for GIMPLE_OMP_RETURN. + (is_a_helper <const gimple_statement_omp_return>::test): New. + (is_a_helper <const gimple_statement_omp_taskreg>::test): New. + (is_a_helper <const gimple_statement_omp_parallel>::test): Only + check for GIMPLE_OMP_PARALLEL, not for GIMPLE_OMP_TASK or + GIMPLE_OMP_TARGET. + (is_a_helper <const gimple_statement_omp_target>::test): New. + (is_a_helper <const gimple_statement_omp_single>::test): Only + check for GIMPLE_OMP_SINGLE, not for GIMPLE_OMP_TEAMS. + (is_a_helper <const gimple_statement_omp_teams>::test): New. + + (gimple_omp_return_set_lhs, gimple_omp_return_lhs, + gimple_omp_return_lhs_ptr): Replace bogus downcasts to + gimple_statement_omp_atomic_store with downcasts to + gimple_statement_omp_return, thus requiring that the code be + GIMPLE_OMP_RETURN. + (gimple_resx_region, gimple_resx_set_region): Replace bogus + downcasts to gimple_statement_eh_ctrl with downcasts to + gimple_statement_resx, thus requiring that the code be GIMPLE_RESX. + (gimple_eh_dispatch_region, gimple_eh_dispatch_set_region): + Replace bogus downcasts to const gimple_statement_eh_ctrl with + downcasts to gimple_statement_eh_dispatch, thus requiring that + the code be GIMPLE_EH_DISPATCH. + (gimple_omp_taskreg_clauses, gimple_omp_taskreg_clauses_ptr) + gimple_omp_taskreg_set_clauses, gimple_omp_taskreg_child_fn, + gimple_omp_taskreg_child_fn_ptr, gimple_omp_taskreg_set_child_fn, + gimple_omp_taskreg_data_arg, gimple_omp_taskreg_data_arg_ptr, + gimple_omp_taskreg_set_data_arg): Replace bogus downcasts to + gimple_statement_omp_parallel with downcasts to + gimple_statement_omp_taskreg, thus requiring that the code be + either GIMPLE_OMP_PARALLEL or GIMPLE_OMP_TASK. + (gimple_omp_target_clauses, gimple_omp_target_clauses_ptr + gimple_omp_target_set_clauses, gimple_omp_target_child_fn + gimple_omp_target_child_fn_ptr, gimple_omp_target_set_child_fn + gimple_omp_target_data_arg, gimple_omp_target_data_arg_ptr + gimple_omp_target_set_data_arg): Replace bogus downcasts to + gimple_statement_omp_parallel with downcasts to + gimple_statement_omp_target, thus requiring that the code be + GIMPLE_OMP_TARGET. + (gimple_omp_teams_clauses, gimple_omp_teams_clauses_ptr + gimple_omp_teams_set_clauses): Replace bogus downcasts to + gimple_statement_omp_single with downcasts to + gimple_statement_omp_teams, thus requiring that the code be + GIMPLE_OMP_TEAMS. + + * gimple.c (gimple_build_resx): Fix bogus as_a<> to use + gimple_statement_resx. + (gimple_build_eh_dispatch): Fix bogus as_a<> to use + gimple_statement_eh_dispatch. + +2013-11-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59014 + * tree-vrp.c (register_edge_assert_for_1): Don't look + through conversions from non-integral types or through + narrowing conversions. + + PR target/59229 + * config/i386/i386.c (device_alg): Fix up formatting. + (ix86_expand_set_or_movmem): Handle max_size < epilogue_size_needed + similarly to count && count < epilogue_size_needed. Fix up + comment typo. + * builtins.c (determine_block_size): Fix comment typo. + + PR sanitizer/59258 + * ubsan.c (ubsan_source_location): Don't add any location + to ADDR_EXPR in the ctor. Revert 2013-11-22 change. + (ubsan_create_data): Strip block info from LOC. + + PR middle-end/59273 + * tree-vect-generic.c (optimize_vector_constructor): Don't optimize + if there isn't optab handler for the corresponding vector PLUS_EXPR. + + PR rtl-optimization/59166 + * ira.c (find_moveable_pseudos): Use DF_REF_REAL_LOC instead of + DF_REF_LOC in validate_change call. + (split_live_ranges_for_shrink_wrap): Likewise. + + PR middle-end/59150 + * omp-low.c (lower_rec_input_clause): For reduction with placeholder + of references to constant size types in simd loops, defer emitting + initializer for the new_var, emit it later on only if not using + SIMD arrays for it. + + PR middle-end/59152 + * omp-low.c (expand_omp_for_static_chunk): Don't set loop->latch + for the inner loop if collapse_bb is non-NULL. + (expand_omp_simd): Use cont_bb rather than e->dest as latch. + +2013-11-26 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/arm/arm.c (arm_legitimize_address): Check xop1 is not + a constant immediate before force_reg. + +2013-11-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59245 + * tree-vrp.c (set_value_range): Assert that we don't have + overflowed constants (but our infinities). + (set_value_range_to_value): Drop all overflow flags. + (vrp_visit_phi_node): Likewise. + (vrp_visit_assignment_or_call): Use set_value_range_to_value + to set a constant range. + +2013-11-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/59290 + * config/arm/arm.md (*zextendsidi_negsi): New pattern. + * config/arm/arm.c (arm_new_rtx_costs): Initialise cost correctly + for zero_extend case. + +2013-11-26 H.J. Lu <hongjiu.lu@intel.com> + + PR bootstrap/55552 + * configure.ac (install_gold_as_default): New. Set to yes for + --disable-ld or --enable-gold=default. + (gcc_cv_ld_gold_srcdir): New. + (gcc_cv_ld): Also check in-tree gold if install_gold_as_default is yes. + (ORIGINAL_LD_BFD_FOR_TARGET): New AC_SUBST. + (ORIGINAL_LD_GOLD_FOR_TARGET): Likewise. + * configure: Regenerated. + + * exec-tool.in (ORIGINAL_LD_BFD_FOR_TARGET): New variable. + (ORIGINAL_LD_GOLD_FOR_TARGET): Likewise. + (original) [collect-ld && -fuse-ld=bfd]: Set to + $ORIGINAL_LD_BFD_FOR_TARGET. + (original) [collect-ld && -fuse-ld=gold]: Set to + $ORIGINAL_LD_GOLD_FOR_TARGET. + (dir) [collect-ld && ../gold/ld-new]: Set to gold. + (fast_install) [collect-ld && ../gold/ld-new]: Set to yes. + +2013-11-26 Terry Guo <terry.guo@arm.com> + + * config/arm/arm.c (require_pic_register): Handle high pic base + register for thumb-1. + (arm_load_pic_register): Also initialize high pic base register. + * doc/invoke.texi: Update documentation for option -mpic-register. + +2013-11-26 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/58314 + PR target/50751 + * config/sh/sh.c (max_mov_insn_displacement, disp_addr_displacement): + Prefix function names with 'sh_'. Make them non-static. + * config/sh/sh-protos.h (sh_disp_addr_displacement, + sh_max_mov_insn_displacement): Add declarations. + * config/sh/constraints.md (Q): Reject QImode. + (Sdd): Use match_code "mem". + (Snd): Fix erroneous matching of non-memory operands. + * config/sh/predicates.md (short_displacement_mem_operand): New + predicate. + (general_movsrc_operand): Disallow PC relative QImode loads. + * config/sh/sh.md (*mov<mode>_reg_reg): Remove it. + (*movqi, *movhi): Merge both insns into... + (*mov<mode>): ... this new insn. Replace generic 'm' constraints with + 'Snd' and 'Sdd' constraints. Calculate insn length dynamically based + on the operand types. + +2013-11-26 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_expand_prologue): + Remove unused variable save_config. + (epiphany_compute_frame_size): Avoid signed/unsigned comparison in + assert. + +2013-11-26 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vtbx1_<psu>8): Emulate behaviour + using other intrinsics. + (vtbx3_<psu>8): Likewise. + +2013-11-26 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_types_bsl_p_qualifiers): New. + (aarch64_types_bsl_s_qualifiers): Likewise. + (aarch64_types_bsl_u_qualifiers): Likewise. + (TYPES_BSL_P): Likewise. + (TYPES_BSL_S): Likewise. + (TYPES_BSL_U): Likewise. + (BUILTIN_VALLDIF): Likewise. + (BUILTIN_VDQQH): Likewise. + * config/aarch64/aarch64-simd-builtins.def (simd_bsl): New. + * config/aarch64/aarch64-simd.md + (aarch64_simd_bsl<mode>_internal): Handle more modes. + (aarch64_simd_bsl<mode>): Likewise. + * config/aarch64/arm_neon.h + (vbsl<q>_<fpsu><8,16,32,64): Implement using builtins. + * config/aarch64/iterators.md (VALLDIF): New. + (Vbtype): Handle more modes. + +2013-11-26 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_type_qualifiers): Add qualifier_poly. + (aarch64_build_scalar_type): Also build Poly types. + (aarch64_build_vector_type): Likewise. + (aarch64_build_type): Likewise. + (aarch64_build_signed_type): New. + (aarch64_build_unsigned_type): Likewise. + (aarch64_build_poly_type): Likewise. + (aarch64_init_simd_builtins): Also handle Poly types. + +2013-11-26 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (VAR1): Use new naming scheme for aarch64_builtins. + (aarch64_builtin_vectorized_function): Use new aarch64_builtins names. + +2013-11-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59287 + * tree-ssa-structalias.c (get_constraint_for_component_ref): + Remove no longer necessary special-casing of union accesses. + +2013-11-26 Richard Biener <rguenther@suse.de> + + * pretty-print.c (output_buffer::~output_buffer): Really + free the obstacks. + +2013-11-25 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c (thread_through_all_blocks): Selectively + invalidate loop information. + +2013-11-25 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.md (doloop_end_split): Add missing SI mode. + +2013-11-25 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/53976 + PR target/59243 + * config/sh/sh_optimize_sett_clrt.cc (struct ccreg_value): Update + comments. + (sh_optimize_sett_clrt::find_last_ccreg_values): Check stack of + previously visited basic blocks before recursing instead of only one + basic block. + +2013-11-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (cortexa53_tuning): New struct. + * config/aarch64/aarch64-cores.def (cortex-a53): + Use cortexa53 tuning struct. + +2013-11-25 Andrew Macleod <amacleod@redhat.com> + + PR bootstrap/59260 + * fold-const.c: Include hash-table.h. + +2013-11-25 Marek Polacek <polacek@redhat.com> + + PR sanitizer/59258 + * ubsan.c (ubsan_create_data): Increase the size of the fields array. + +2013-11-25 Richard Biener <rguenther@suse.de> + + * tree-dfa.c: Remove unused convert.h include. + +2013-11-25 Terry Guo <terry.guo@arm.com> + + * doc/invoke.texi (-mslow-flash-data): Document new option. + * config/arm/arm.opt (mslow-flash-data): New option. + * config/arm/arm-protos.h (arm_max_const_double_inline_cost): + Declare it. + * config/arm/arm.h (TARGET_USE_MOVT): Always true when literal pools + are disabled. + (arm_disable_literal_pool): Declare it. + * config/arm/arm.c (arm_disable_literal_pool): New variable. + (arm_option_override): Handle new option. + (thumb2_legitimate_address_p): Don't allow symbol references when + literal pools are disabled. + (arm_max_const_double_inline_cost): New function. + * config/arm/arm.md (types.md): Include it before ... + (use_literal_pool): New attribute. + (enabled): Use new attribute. + (split pattern): Replace symbol+offset with MOVW/MOVT. + +2013-11-24 Steven Bosscher <steven@gcc.gnu.org> + + PR bootstrap/59279 + Revert previous commit. + +2013-11-24 Steven Bosscher <steven@gcc.gnu.org> + + * jump.c (reset_insn_reg_label_operand_notes): New function, + split out from ... + (init_label_info): ... here. Reset LABEL_NUSES in cfglayout mode. + * cfgcleanup.c (delete_dead_jump_tables_between): New function, + split out from ... + (delete_dead_jumptables): ... here. Handle cfglayout mode. + (cleanup_cfg): Delete dead jump tables in cfglayout mode if an + expensive CFG cleanup is called for. + * cfgrtl.c (fixup_reorder_chain): Remove BARRIERs from fallthru paths. + (cfg_layout_finalize): Delete dead jump tables before re-building + the insns chain. + * ira.c (ira): Rebuild jump labels *after* deleting unreachable + basic blocks, not before. + * loop-init.c (rtl_loop_done): Call for an expensive CFG cleanup. + + * modulo-sched.c (sms_schedule): Do not look for BARRIERs in the + insns chain of a scheduling extended basic block, they cannot appear + there in cfglayout mode. + +2013-11-24 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-fsanitize=leak): Add link to the wiki page. + +2013-11-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Correct + for little endian. + +2013-11-24 H.J. Lu <hongjiu.lu@intel.com> + + * graphite-sese-to-poly.c: Don't include extra "expr.h". + +2013-11-23 Eric Botcazou <ebotcazou@adacore.com> + + * cilk-common.c (expand_builtin_cilk_detach): Dereference worker. + +2013-11-23 David Edelson <dje.gcc@gmail.com> + Andrew Dixie <andrewd@gentrack.com> + + PR target/33704 + * config/rs6000/aix.h (COLLECT_SHARED_INIT_FUNC): Define. + (COLLECT_SHARED_FINI_FUNC): Define. + + * collect2.c (aix_shared_initname): Declare. + (aix_shared_fininame): Declare. + (symkind): Add SYM_AIXI and SYM_AIXD. + (scanfilter_masks): Add SCAN_AIXI and SCAN_AIXD. + (struct names special): Add GLOBAL__AIXI_ and GLOBAL__AIXD_. + (aixlazy_flag): Parse. + (extract_init_priority): SYM_AIXI and SYM_AIXD have highest priority. + (scan_prog_file, COFF): Handle SYM_AIXI and SYM_AIXD. + +2013-11-23 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.c (IN_NAMED_SECTION): New macro. + (rs6000_xcoff_select_section): Place decls with stricter alignment + into named sections. + (rs6000_xcoff_unique_section): Allow unique sections for + uninitialized data with strict alignment. + +2013-11-23 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59154 + * tree-ssa-reassoc.c (maybe_optimize_range_tests): When changing + rhs1 of a cast and new_op is invariant, fold_convert it. + * tree-ssa-forwprop.c (ssa_forward_propagate_and_combine): Only call + simplify_conversion_from_bitmask if rhs1 is a SSA_NAME. + +2013-11-23 Uros Bizjak <ubizjak@gmail.com> + + PR target/56788 + * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>: + Declare as MULTI_ARG_1_SF instruction. + <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction. + * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename + from *xop_vmfrcz_<mode>. + * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss + to merge scalar result with __A. + (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar + result with __A. + +2013-11-23 Eric Botcazou <ebotcazou@adacore.com> + + * gimplify.h (recalculate_side_effects): Delete. + * gimplify.c (recalculate_side_effects): Make static and add comment. + +2013-11-23 Richard Sandiford <rdsandiford@googlemail.com> + + * config/sh/sh.md: Use nonimmediate_operand rather than general_operand + for the destination of a define_peephole2. Likewise register_operand + rather than arith_reg_operand. Remove constraints from + define_peephole2s. + +2013-11-23 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mn10300/mn10300-protos.h (mn10300_store_multiple_operation): + Delete. + (mn10300_store_multiple_operation_p): Declare. + * config/mn10300/mn10300.c (mn10300_store_multiple_operation): + Rename to... + (mn10300_store_multiple_operation_p): ...this and remove mode + argument. + * config/mn10300/predicates.md (mn10300_store_multiple_operation): + Define. + +2013-11-23 Richard Sandiford <rdsandiford@googlemail.com> + + * config/bfin/bfin-protos.h (push_multiple_operation): Delete. + (pop_multiple_operation): Delete. + (analyze_push_multiple_operation): Declare. + (analyze_pop_multiple_operation): Declare. + * config/bfin/bfin.c (push_multiple_operation): Rename to... + (analyze_push_multiple_operation): ...this and remove mode argument. + (pop_multiple_operation): Rename to... + (analyze_pop_multiple_operation): ...this and remove mode argument. + * config/bfin/predicates.md (push_multiple_operation): Define. + (pop_multiple_operation): Likewise. + +2013-11-23 Alan Modra <amodra@gmail.com> + + * config/rs6000/vsx.md (fusion peepholes): Disable when !TARGET_VSX. + +2013-11-22 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/59061 + * common.opt (static-liblsan): Add. + * config/gnu-user.h (STATIC_LIBLSAN_LIBS, STATIC_LIBUBSAN_LIBS): + Define. + * flag-types.h (enum sanitize_code): Add SANITIZE_LEAK. Renumber + SANITIZE_SHIFT, SANITIZE_DIVIDE, SANITIZE_UNREACHABLE, SANITIZE_VLA, + SANITIZE_RETURN. + * opts.c (common_handle_option): Handle -fsanitize=leak. + * gcc.c (ADD_STATIC_LIBLSAN_LIBS, LIBLSAN_SPEC): Define. + (LIBUBSAN_SPEC): Don't test LIBUBSAN_EARLY_SPEC. + (LIBUBSAN_EARLY_SPEC): Remove. + (SANITIZER_EARLY_SPEC): Don't do anything for libubsan. + (SANITIZER_SPEC): Add -fsanitize=leak handling. + (sanitize_spec_function): Handle %sanitize(leak). + * doc/invoke.texi (-static-liblsan, -fsanitize=leak): Document. + +2013-11-22 Aldy Hernandez <aldyh@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + * ipa.c (symtab_remove_unreachable_nodes): Fix up comment typos. + * ipa-prop.c (get_vector_of_formal_parm_types): Renamed to ... + (ipa_get_vector_of_formal_parm_types): ... this. No longer static. + (ipa_modify_formal_parameters): Adjust caller. Remove + synth_parm_prefix argument. Use operator enum instead of bit fields. + Add assert for properly handling vector of references. Handle + creating brand new parameters. + (ipa_modify_call_arguments): Use operator enum instead of bit + fields. + (ipa_combine_adjustments): Same. Assert that IPA_PARM_OP_NEW is not + used. + (ipa_modify_expr, get_ssa_base_param, ipa_get_adjustment_candidate): + New functions. + (ipa_dump_param_adjustments): Rename reduction to new_decl. + Use operator enum instead of bit fields. + * ipa-prop.h (enum ipa_parm_op): New. + (struct ipa_parm_adjustment): New field op. Rename reduction + to new_decl, new_arg_prefix to arg_prefix and remove remove_param + and copy_param. + (ipa_modify_formal_parameters): Remove last argument. + (ipa_get_vector_of_formal_parm_types, ipa_modify_expr, + ipa_get_adjustment_candidate): New prototypes. + * tree-sra.c (turn_representatives_into_adjustments): Use operator + enum. Set arg_prefix. + (get_adjustment_for_base): Use operator enum. + (sra_ipa_modify_expr): Rename to ipa_modify_expr and move to + ipa-prop.c. + (sra_ipa_modify_assign): Rename sra_ipa_modify_expr to ipa_modify_expr. + (ipa_sra_modify_function_body): Same. No longer static. + (sra_ipa_reset_debug_stmts): Use operator enum. + (modify_function): Do not pass prefix argument. + +2013-11-22 Jakub Jelinek <jakub@redhat.com> + + * ubsan.c (ubsan_source_location): Don't crash on unknown locations. + (ubsan_pass): Ignore clobber stmts. + + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_MISSING_RETURN): New built-in. + * opts.c (common_handle_option): Add -fsanitize=return. + * flag-types.h (enum sanitize_code): Add SANITIZE_RETURN and + or it into SANITIZE_UNDEFINED. + + * sanitizer.def (BUILT_IN_ASAN_BEFORE_DYNAMIC_INIT, + BUILT_IN_ASAN_AFTER_DYNAMIC_INIT): New. + * asan.c (instrument_derefs): Handle also VAR_DECL loads/stores. + Don't instrument accesses to VAR_DECLs which are known to fit + into their bounds and the vars are known to have shadow bytes + indicating allowed access. + (asan_dynamic_init_call): New function. + (asan_add_global): If vnode->dynamically_initialized, + set __has_dynamic_init to 1 instead of 0. + (initialize_sanitizer_builtins): Add BT_FN_VOID_CONST_PTR var. + * asan.h (asan_dynamic_init_call): New prototype. + * cgraph.h (varpool_node): Add dynamically_initialized bitfield. + +2013-11-22 Martin Jambor <mjambor@suse.cz> + + PR rtl-optimization/10474 + * ira.c (interesting_dest_for_shprep_1): New function. + (interesting_dest_for_shprep): Use interesting_dest_for_shprep_1, + also check parallels. + +2013-11-22 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (record_temporary_equivalence): Handle + NULL for RHS, which we used to invalidate equivalences. + (record_temporary_equivalences_from_phis): New bitmap arguments + and a boolean indicating if we have passed a backedge. If we + have passed a backedge, then set the appropriate bit in the + bitmaps for the SRC & DEST of PHIs creating equivalences. + (invalidate_equivalences, dummy_simplify): New functions. + (cond_arg_set_in_b): Remove. + (record_temporary_equivalences_from_stmts_at_dest): New bitmap + arguments and a boolean indicating if we have passed a backedge. + If we have passed a backedge, then perform invalidations as needed. + (thread_around_empty_blocks): If we have seen a backedge, then + use the dummy simplify routine. + (thread_through_normal_block): Likewise. Pass bitmaps and + backedge status to children. Do not pessimize so much when + traversing backedges in the CFG. + (thread_across_edge): Manage the SRC_MAP/DST_MAP bitmaps. + If we have seen a backedge, then use the dummy simplify routine. + Do not pessimize so much when traversing backedges. + +2013-11-22 Hans-Peter Nilsson <hp@axis.com> + + * config/cris/cris.c (cris_atomic_align_for_mode): New function. + (TARGET_ATOMIC_ALIGN_FOR_MODE): Define. + +2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/i386.c (processor_alias_table): Enable PTA_AES, + PTA_PCLMUL and PTA_RDRND for Silvermont. + * config/i386/driver-i386.c (host_detect_local_cpu): Set up cpu + for Silvermont. + + * doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont. + +2013-11-22 Andrew MacLeod <amacleod@redhat.com> + + * hooks.h (hook_uint_mode_0): Add Prototype. + * hooks.c (hook_uint_mode_0): New default function. + * target.def (atomic_align_for_mode): New target hook. + * tree.c (build_atomic_base): Add alignment override parameter. + (build_common_tree_nodes): Use atomic alignment override. + * doc/tm.texi.in (TARGET_ATOMIC_ALIGN_FOR_MODE): Define. + * doc/tm.texi (TARGET_ATOMIC_ALIGN_FOR_MODE): Add description. + +2013-11-22 Andrew MacLeod <amacleod@redhat.com> + + * gimple.h: Remove all includes. + (recalculate_side_effects): Move prototype to gimplify.h. + * Makefile.in (PLUGIN_HEADERS): Add flattened gimple.h includes. + * gengtype.c (open_base_files): Add gimple.h include list. + * gimplify.h (recalculate_side_effects): Relocate prototype here. + * gimple.c: Adjust include list. + (recalculate_side_effects): Move to gimplify.c. + * gimplify.c: Adjust include list. + (recalculate_side_effects): Relocate from gimple.c. + * alias.c: Add required include files removed from gimple.h. + * asan.c: Likewise. + * builtins.c: Likewise. + * calls.c: Likewise. + * cfgexpand.c: Likewise. + * cfgloop.c: Likewise. + * cfgloopmanip.c: Likewise. + * cgraphbuild.c: Likewise. + * cgraph.c: Likewise. + * cgraphclones.c: Likewise. + * cgraphunit.c: Likewise. + * cilk-common.c: Likewise. + * data-streamer.c: Likewise. + * data-streamer-in.c: Likewise. + * data-streamer-out.c: Likewise. + * dse.c: Likewise. + * dwarf2out.c: Likewise. + * emit-rtl.c: Likewise. + * except.c: Likewise. + * expr.c: Likewise. + * fold-const.c: Likewise. + * function.c: Likewise. + * gimple-builder.c: Likewise. + * gimple-expr.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-iterator.c: Likewise. + * gimple-low.c: Likewise. + * gimple-pretty-print.c: Likewise. + * gimple-ssa-isolate-paths.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple-streamer-in.c: Likewise. + * gimple-streamer-out.c: Likewise. + * gimple-walk.c: Likewise. + * gimplify-me.c: Likewise. + * graphite-blocking.c: Likewise. + * graphite.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-dependences.c: Likewise. + * graphite-interchange.c: Likewise. + * graphite-optimize-isl.c: Likewise. + * graphite-poly.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * internal-fn.c: Likewise. + * ipa.c: Likewise. + * ipa-cp.c: Likewise. + * ipa-devirt.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-inline.c: Likewise. + * ipa-profile.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-pure-const.c: Likewise. + * ipa-reference.c: Likewise. + * ipa-split.c: Likewise. + * ipa-utils.c: Likewise. + * langhooks.c: Likewise. + * lto-cgraph.c: Likewise. + * lto-compress.c: Likewise. + * lto-opts.c: Likewise. + * lto-section-in.c: Likewise. + * lto-section-out.c: Likewise. + * lto-streamer.c: Likewise. + * lto-streamer-in.c: Likewise. + * lto-streamer-out.c: Likewise. + * omp-low.c: Likewise. + * opts-global.c: Likewise. + * passes.c: Likewise. + * predict.c: Likewise. + * profile.c: Likewise. + * sese.c: Likewise. + * stmt.c: Likewise. + * stor-layout.c: Likewise. + * symtab.c: Likewise. + * targhooks.c: Likewise. + * toplev.c: Likewise. + * tracer.c: Likewise. + * trans-mem.c: Likewise. + * tree-affine.c: Likewise. + * tree.c: Likewise. + * tree-call-cdce.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-chrec.c: Likewise. + * tree-complex.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-dfa.c: Likewise. + * tree-eh.c: Likewise. + * tree-emutls.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-into-ssa.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nested.c: Likewise. + * tree-nrv.c: Likewise. + * tree-object-size.c: Likewise. + * tree-outof-ssa.c: Likewise. + * tree-parloops.c: Likewise. + * tree-phinodes.c: Likewise. + * tree-predcom.c: Likewise. + * tree-pretty-print.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-address.c: Likewise. + * tree-ssa-alias.c: Likewise. + * tree-ssa.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-coalesce.c: Likewise. + * tree-ssa-copy.c: Likewise. + * tree-ssa-copyrename.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-dse.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-live.c: Likewise. + * tree-ssa-loop.c: Likewise. + * tree-ssa-loop-ch.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssanames.c: Likewise. + * tree-ssa-operands.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-sink.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-ssa-tail-merge.c: Likewise. + * tree-ssa-ter.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-threadupdate.c: Likewise. + * tree-ssa-uncprop.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-stdarg.c: Likewise. + * tree-streamer.c: Likewise. + * tree-streamer-in.c: Likewise. + * tree-streamer-out.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vectorizer.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-slp.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree-vrp.c: Likewise. + * tsan.c: Likewise. + * ubsan.c: Likewise. + * value-prof.c: Likewise. + * varpool.c: Likewise. + * var-tracking.c: Likewise. + * vtable-verify.c: Likewise. + * config/darwin.c: Likewise. + * config/aarch64/aarch64-builtins.c: Likewise. + * config/aarch64/aarch64.c: Likewise. + * config/alpha/alpha.c: Likewise. + * config/i386/i386.c: Likewise. + * config/i386/winnt.c: Likewise. + * config/ia64/ia64.c: Likewise. + * config/m32c/m32c.c: Likewise. + * config/mep/mep.c: Likewise. + * config/mips/mips.c: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/s390/s390.c: Likewise. + * config/sh/sh.c: Likewise. + * config/sparc/sparc.c: Likewise. + * config/spu/spu.c: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/tilegx/tilegx.c: Likewise. + * config/tilepro/tilepro.c: Likewise. + * config/xtensa/xtensa.c: Likewise. + +2013-11-22 Richard Earnshaw <rearnsha@arm.com> + + PR target/59216 + * arm.md (negdi_extendsidi): Fix invalid split. + +2013-11-22 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vmov_n_f32): Implemented in C. + (vmov_n_f64): Likewise. + (vmov_n_p8): Likewise. + (vmov_n_p16): Likewise. + (vmov_n_s8): Likewise. + (vmov_n_s16): Likewise. + (vmov_n_s32): Likewise. + (vmov_n_s64): Likewise. + (vmov_n_u8): Likewise. + (vmov_n_u16): Likewise. + (vmov_n_u32): Likewise. + (vmov_n_u64): Likewise. + (vmovq_n_f32): Likewise. + (vmovq_n_f64): Likewise. + (vmovq_n_p8): Likewise. + (vmovq_n_p16): Likewise. + (vmovq_n_s8): Likewise. + (vmovq_n_s16): Likewise. + (vmovq_n_s32): Likewise. + (vmovq_n_s64): Likewise. + (vmovq_n_u8): Likewise. + (vmovq_n_u16): Likewise. + (vmovq_n_u32): Likewise. + (vmovq_n_u64): Likewise. + +2013-11-22 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (vec_pack_trunc_<mode>, + vec_pack_trunc_v2df, vec_pack_trunc_df): Swap for big-endian. + (reduc_<sur>plus_<mode>): Factorize V2DI into this. + (reduc_<sur>plus_<mode>): Change this to reduc_splus_<mode> for floats + and also change to float UNSPEC. + (reduc_maxmin_uns>_<mode>): Remove V2DI. + * config/aarch64/arm_neon.h (vaddv<q>_<suf><8,16,32,64>, + vmaxv<q>_<suf><8,16,32,64>, vminv<q>_<suf><8,16,32,64>): Fix up scalar + result access for big-endian. + (__LANE0): New macro used to fix up lane access of 'across-lanes' + intrinsics for big-endian. + * config/aarch64/iterators.md (VDQV): Add V2DI. + (VDQV_S): New. + (vp): New mode attribute. + +2013-11-22 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (vec_pack_trunc_<mode>, + vec_pack_trunc_v2df, vec_pack_trunc_df): Swap source ops for + big-endian. + +2013-11-22 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Adjust + for big-endian element order. + (aarch64_simd_vec_setv2di): Likewise. + (*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>, + *aarch64_get_lane_zero_extendsi<mode>, aarch64_get_lane): Likewise. + (vec_extract): Expand using aarch64_get_lane. + * config/aarch64/aarch64.h (ENDIAN_LANE_N): New. + +2013-11-22 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): Fix loads + and stores to be ABI compliant. + +2013-11-22 David Malcolm <dmalcolm@redhat.com> + + * input.h (input_line): Remove. + (input_filename): Likewise. + (in_system_header): Likewise. + * tree.h (EXPR_LOC_OR_HERE): Remove. + * config/bfin/bfin.c (output_file_start): Remove use of + input_filename macro. + * builtins.c (c_strlen): Remove use of EXPR_LOC_OR_HERE macro. + * gimplify.c (internal_get_tmp_var): Likewise. + EXPR_LOC_OR_HERE macro. + (shortcut_cond_expr): Likewise. + * tree-diagnostic.c (diagnostic_report_current_function): Remove + use of input_filename macro. + * tree.c (get_file_function_name): Likewise. + +2013-11-22 Kenneth Zadeck <zadeck@naturalbridge.com> + + * store-layout.c (place-field): Fix hwi test and accessor mismatch. + +2013-11-22 Jakub Jelinek <jakub@redhat.com> + + * expr.c (store_constructor): Allow CONSTRUCTOR with VECTOR_TYPE + (same sized) elements even if the type of the CONSTRUCTOR has + vector mode and target is a REG. + +2013-11-22 Richard Biener <rguenther@suse.de> + + Revert + 2013-11-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-ch.c (copy_loop_headers): Decrement + nb_iterations_upper_bound by one. + +2013-11-22 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (processor_alias_table): Enable PTA_POPCNT + for Silvermont. + + * doc/invoke.texi: Mention POPCNT for corei7, corei7-avx, + core-avx-i, core-avx2 and slm. + +2013-11-22 Eric Botcazou <ebotcazou@adacore.com> + + * print-rtl.c (print_rtx) <case MEM>: Output a space if no MEM_EXPR. + +2013-11-22 Richard Sandiford <rdsandiford@googlemail.com> + + * config/m32c/cond.md (stzx_16): Use register_operand for operand 0. + (stzx_24_<mode>): Likewise mra_operand. + +2013-11-22 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c: Include tree-cfg.h and tree-pass.h + (thread_block_1): Do not cancel jump threads which go from + inside a loop, through the header, then back inside the loop. + (bb_ends_with_multiway_branch): New function. + (thread_through_all_blocks): Handle threading cases which start + in a loop through the loop header to a point in the loop. + + * tree-ssa-threadedge.c (thread_across_edge): Mark the start of the + jump thread path properly. + +2013-11-22 Trevor Saunders <tsaunders@mozilla.com> + + * vec.h (auto_vec): New class. + * cfganal.c, cfgloop.c, cgraphunit.c, config/i386/i386.c, dwarf2out.c, + function.c, genautomata.c, gimple.c, haifa-sched.c, ipa-inline.c, + ira-build.c, loop-unroll.c, omp-low.c, ree.c, trans-mem.c, + tree-call-cdce.c, tree-eh.c, tree-if-conv.c, tree-into-ssa.c, + tree-loop-distribution.c, tree-predcom.c, tree-sra.c, + tree-sssa-forwprop.c, tree-ssa-loop-manip.c, tree-ssa-pre.c, + tree-ssa-reassoc.c, tree-ssa-sccvn.c, tree-ssa-structalias.c, + tree-vect-loop.c, tree-vect-stmts.c: Use auto_vec and stack_vec as + appropriate instead of vec for local variables. + +2013-11-21 Teresa Johnson <tejohnson@google.com> + + PR target/59233 + * cfgcleanup.c (outgoing_edges_match): Walk up past note instructions + not understood by old_insns_match_p. + +2013-11-21 Bill Schmidt <wschmidt@vnet.ibm.com> + + * config/rs6000/vector.md (vec_pack_trunc_v2df): Revert previous + little endian change. + (vec_pack_sfix_trunc_v2df): Likewise. + (vec_pack_ufix_trunc_v2df): Likewise. + * config/rs6000/rs6000.c (rs6000_expand_interleave): Correct + double checking of endianness. + +2013-11-22 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-generic.c (optimize_vector_constructor): New function. + (expand_vector_operations_1): Call it. + +2013-11-21 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_expand_special_args_builtin): Use + ix86_zero_extend_to_Pmode where appropriate. + (ix86_expand_builtin): Ditto. + +2013-11-21 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (want_pubnames): Don't do pubnames for -g1. + (add_linkage_name): Don't add linkage name for -g1. + (decls_for_scope): Process subblocks for -g1. + (dwarf2out_source_line): Output line tables for -g1. + (dwarf2out_finish): Likewise. + * tree-ssa-live.c (remove_unused_scope_block_p): Don't prune + unused scopes for -g1. + * opts.c (common_handle_option): Handle -g same as -g2. + * doc/invoke.texi: Update description for -g1. + +2013-11-21 Peter Bergner <bergner@vnet.ibm.com> + + * doc/extend.texi: Document htm builtins. + +2013-11-21 Jeff Law <law@redhat.com> + + PR tree-optimization/59221 + * tree-ssa-threadedge.c (thread_across_edge): Properly manage + temporary equivalences when threading through joiner blocks. + +2013-11-21 Joseph Myers <joseph@codesourcery.com> + + PR rtl-optimization/55950 + * real.c (real_sqrt): Remove function. + * real.h (real_sqrt): Remove prototype. + * simplify-rtx.c (simplify_const_unary_operation): Do not fold + SQRT using real_sqrt. + +2013-11-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59058 + * tree-scalar-evolution.h (number_of_exit_cond_executions): Remove. + * tree-scalar-evolution.c (number_of_exit_cond_executions): Likewise. + * tree-vectorizer.h (LOOP_PEELING_FOR_ALIGNMENT): Rename to ... + (LOOP_VINFO_PEELING_FOR_ALIGNMENT): ... this. + (NITERS_KNOWN_P): Fold into ... + (LOOP_VINFO_NITERS_KNOWN_P): ... this. + (LOOP_VINFO_PEELING_FOR_NITER): Add. + * tree-vect-loop-manip.c (vect_gen_niters_for_prolog_loop): + Use LOOP_VINFO_PEELING_FOR_ALIGNMENT. + (vect_do_peeling_for_alignment): Re-use precomputed niter + instead of re-emitting it. + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): + Use LOOP_VINFO_PEELING_FOR_ALIGNMENT. + * tree-vect-loop.c (vect_get_loop_niters): Use + number_of_latch_executions. + (new_loop_vec_info): Initialize LOOP_VINFO_PEELING_FOR_NITER. + (vect_analyze_loop_form): Simplify. + (vect_analyze_loop_operations): Move epilogue peeling code ... + (vect_analyze_loop_2): ... here and adjust it to compute + LOOP_VINFO_PEELING_FOR_NITER. + (vect_estimate_min_profitable_iters): Use + LOOP_VINFO_PEELING_FOR_ALIGNMENT. + (vect_build_loop_niters): Emit on the preheader. + (vect_generate_tmps_on_preheader): Likewise. + (vect_transform_loop): Use LOOP_VINFO_PEELING_FOR_NITER instead + of recomputing it. Adjust. + +2013-11-21 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (LOC, UNKNOWN_LOC, EXPR_LOC, LOC_FILE, + LOC_LINE): Remove wrappers and fix all users. + (struct _loop_vec_info): Remove loop_line_number member. + (LOOP_VINFO_LOC): Remove. + * tree-parloops.c, tree-vect-loop-manip.c, tree-vect-slp.c, + tree-vectorizer.c: Fix users of LOC, UNKNOWN_LOC, EXPR_LOC, LOC_FILE + and LOC_LINE. + +2013-11-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-forwprop.c (simplify_vce): New function. + (ssa_forward_propagate_and_combine): Call it. + +2013-11-21 Richard Biener <rguenther@suse.de> + + * tree-vect-loop-manip.c (vect_build_loop_niters, + vect_generate_tmps_on_preheader): Move ... + * tree-vect-loop.c (vect_build_loop_niters, + vect_generate_tmps_on_preheader): ... here and simplify. + (vect_transform_loop): Call them here and pass down results + to consumers. + * tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound): + Get niter variables from caller. + (vect_do_peeling_for_alignment): Likewise. + * tree-vectorizer.h (vect_generate_tmps_on_preheader): Remove. + (vect_do_peeling_for_loop_bound, vect_do_peeling_for_alignment): + Adjust prototypes. + +2013-11-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-ch.c (copy_loop_headers): Decrement + nb_iterations_upper_bound by one. + +2013-11-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59058 + * tree-loop-distribution.c (struct partition_s): Add plus_one member. + (build_size_arg_loc): Apply niter adjustment here. + (generate_memset_builtin): Adjust. + (generate_memcpy_builtin): Likewise. + (classify_partition): Do not use number_of_exit_cond_executions + but record whether niter needs to be adjusted. + +2013-11-21 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-tail-merge.c (stmt_local_def): Return false if the statement + could throw. + +2013-11-21 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/53976 + * config/sh/sh_optimize_sett_clrt.cc: New SH specific RTL pass. + * config/sh/sh.c (register_sh_passes): Add sh_optimize_sett_clrt pass. + * config/sh/sh/t-sh (sh_optimize_sett_clrt pass.o): New entry. + * config.gcc (sh[123456789lbe]*-*-* | sh-*-*): Add + sh_optimize_sett_clrt pass.o to extra_objs. + +2013-11-20 David Malcolm <dmalcolm@redhat.com> + + * cfg.c (dump_edge_info): Remove redundant comment. + * cfgcleanup.c (outgoing_edges_match): Reword reference to + EXIT_BLOCK_PTR in comment. + (try_optimize_cfg): Likewise. + * cfgrtl.c (last_bb_in_partition): Likewise. + * cgraph.c (cgraph_node_cannot_return): Likewise. + * function.c (thread_prologue_and_epilogue_insns): Likewise. + * graphite-scop-detection.c (scopdet_basic_block_info): Likewise. + * ipa-split.c (consider_split): Likewise. + * profile.c (find_spanning_tree): Likewise. + * sched-int.h (common_sched_info_def.add_block): Likewise. + * dominance.c (calc_dfs_tree_nonrec): Reword references in + comments to now removed ENTRY_BLOCK_PTR and EXIT_BLOCK_PTR macros. + * tree-cfgcleanup.c (cleanup_control_flow_bb): Reword references + in comments to now removed ENTRY_BLOCK_PTR macro. + (tree_forwarder_block_p): Reword reference in comment to + EXIT_BLOCK_PTR. + * tree-inline.c (copy_cfg_body): Reword references in comments to + now removed ENTRY_BLOCK_PTR macro. + * tree-ssa-propagate.c (ssa_prop_init): Likewise. + * tree-scalar-evolution.h ( block_before_loop): Likewise. Add + a comma to the comment to clarify the meaning. + +2013-11-20 Andrew MacLeod <amacleod@redhat.com> + + * gimplify.h (gimplify_hasher:typed_free_remove, struct gimplify_ctx): + Move to gimplify.c. + (free_gimplify_stack): Add prototype. + * gimplify.c (gimplify_hasher:typed_free_remove): Relocate here. + (struct gimplify_ctx): Relocate here. + (gimplify_ctxp): Make static. + (ctx_pool, ctx_alloc, ctx_free, free_gimplify_stack): New. Manage a + list of struct gimplify_ctx. + (push_gimplify_context): Add default parameters and allocate a struct + from the pool. + (pop_gimplify_context): Free a struct back to the pool. + (gimplify_scan_omp_clauses, gimplify_omp_parallel, gimplify_omp_task, + gimplify_omp_workshare, gimplify_transaction, gimplify_body): Don't + use a local 'struct gimplify_ctx'. + * cgraphunit.c (expand_all_functions): call free_gimplify_stack. + * gimplify-me.c (force_gimple_operand_1, gimple_regimplify_operands): + Likewise. + * omp-low.c (lower_omp_sections, lower_omp_single, lower_omp_master, + lower_omp_ordered, lower_omp_critical, lower_omp_for, + create_task_copyfn, lower_omp_taskreg, lower_omp_target, + lower_omp_teams, execute_lower_omp): Likewise. + * gimple-fold.c (gimplify_and_update_call_from_tree): Likewise. + * tree-inline.c (optimize_inline_calls): Likewise. + +2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vsx.md (vsx_set_<mode>): Adjust for little endian. + (vsx_extract_<mode>): Likewise. + (*vsx_extract_<mode>_one_le): New LE variant on + *vsx_extract_<mode>_zero. + (vsx_extract_v4sf): Adjust for little endian. + +2013-11-20 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59133 + * lra.c (expand_reg_data): Add new argument. Set up ALL_REGS for + new pseudos. + (lra_create_new_reg_with_unique_value): Pass new argument value. + (lra_emit_add, lra_emit_move): Ditto. + * lra-constraints.c (in_class_p): Add check for move for a new insn. + (change_class): Rename to lra_change_class. Move to lra-int.h. + (get_reload_reg, narrow_reload_pseudo_class): Adjust calls of + change_class. + (process_addr_reg, process_addr): Ditto. + (curr_insn_transform): Ditto. Add check on old pseudo for + optional reload. + * lra-int.h (lra_get_regno_hard_regno): Move below. + (lra_change_class): Renamed change_class from lra.c. + +2013-11-20 David Malcolm <dmalcolm@redhat.com> + + * gdbhooks.py (VecPrinter.children): Don't attempt to iterate + the children of a NULL pointer. + +2013-11-20 Robert Suchanek <Robert.Suchanek@imgtec.com> + + * lra.c (lra): Set lra_in_progress before check_rtl call. + * recog.c (insn_invalid_p): Add !lra_in_progress to prevent + adding clobber regs when LRA is running. + +2013-11-20 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.h (ISA_HAS_FP4): Remove TARGET_FLOAT64 + restriction for ISA_MIPS32R2. + (ISA_HAS_LXC1_SXC1): New macro. + (ISA_HAS_FP_MADD4_MSUB4): Remove ISA_MIPS32R2 special-casing. + (ISA_HAS_NMADD4_NMSUB4): Likewise. + (ISA_HAS_FP_RECIP_RSQRT): Likewise. + (ISA_HAS_PREFETCHX): Redefine in terms of ISA_HAS_FP4. + * config/mips/mips.md (*<ANYF:loadx>_<P:mode>): Use + ISA_HAS_LXC1_SXC1 rather than ISA_HAS_FP4. + (*<ANYF:storex>_<P:mode>): Likewise. + +2013-11-20 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.h (ISA_HAS_FP_RECIP_RSQRT): New macro. + * config/mips/mips.c (mips_rtx_costs) <DIV>: Check for + ISA_HAS_FP_RECIP_RSQRT rather than ISA_HAS_FP4. + * config/mips/mips.md (recip_condition): Remove mode attribute. + (div<mode>3): Use ISA_HAS_FP_RECIP_RSQRT rather than + <recip_condition>. + (*recip<mode>3, *rsqrt<mode>a, *rsqrt<mode>b): Likewise. + +2013-11-20 Eric Botcazou <ebotcazou@adacore.com> + + PR target/59207 + * config/sparc/sparc.c (sparc_fold_builtin) <case CODE_FOR_pdist_vis>: + Make sure neg2_ovf is set before being used. + +2013-11-20 Basile Starynkevitch <basile@starynkevitch.net> + + * plugin.def: Add comment about register_callback and + invoke_plugin_callbacks_full. + + * plugin.c (register_callback, invoke_plugin_callbacks_full): + Handle PLUGIN_INCLUDE_FILE event. + +2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_cannot_change_mode_class): Do not + allow subregs of TDmode in FPRs of smaller size in little-endian. + (rs6000_split_multireg_move): When splitting an access to TDmode + in FPRs, do not use simplify_gen_subreg. + +2013-11-20 Joseph Myers <joseph@codesourcery.com> + + PR middle-end/21718 + * real.c: Remove comment about decimal string conversion and + rounding errors. + (real_from_string): Use MPFR to convert nonzero decimal constant + to REAL_VALUE_TYPE. + +2013-11-20 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_dwarf_register_span): Take into account the + endianness of the D registers for the legacy encodings. + +2013-11-20 Richard Earnshaw <rearnsha@arm.com> + + PR rtl-optimization/54300 + * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused + outputs in a single-set are killed from the value chains. + +2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com> + + * cgraph.h (varpool_node): Add need_bounds_init field. + * lto-cgraph.c (lto_output_varpool_node): Output + need_bounds_init value. + (input_varpool_node): Read need_bounds_init value. + * varpool.c (dump_varpool_node): Dump need_bounds_init field. + +2013-11-20 Jan Hubicka <jh@suse.cz> + + * opts.c (finish_options): Imply -ffat-lto-objects with + -fno-use-linker-plugin. + * common.opt (fuse-linker-plugin): Add var. + +2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com> + + * dbxout.c (dbxout_type): Ignore POINTER_BOUNDS_TYPE. + * dwarf2out.c (gen_subprogram_die): Ignore bound args. + (gen_type_die_with_usage): Skip pointer bounds. + (dwarf2out_global_decl): Likewise. + +2013-11-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md: Remove "mode" and "mode2" attributes + from all insns. + +2013-11-20 Yuri Rumyantsev <ysrumyan@gmail.com> + + PR target/57756 + * config/i386/i386.c (ix86_option_override_internal): Add missed + argument prefix for 'ix86_fpmath'. + * config/i386/ssemath.h: Add missed definition of + TARGET_FPMATH_DEFAULT_P macros. + +2013-11-20 Kenneth Zadeck <zadeck@naturalbridge.com> + Mike Stump <mikestump@comcast.net> + Richard Sandiford <rdsandiford@googlemail.com> + + * alias.c (ao_ref_from_mem): Use tree_to_shwi and tree_to_uhwi + instead of TREE_INT_CST_LOW, in cases where there is a protecting + tree_fits_shwi_p or tree_fits_uhwi_p. + * builtins.c (fold_builtin_powi): Likewise. + * config/epiphany/epiphany.c (epiphany_special_round_type_align): + Likewise. + * dbxout.c (dbxout_symbol): Likewise. + * expr.c (expand_expr_real_1): Likewise. + * fold-const.c (fold_single_bit_test, fold_plusminus_mult_expr) + (fold_binary_loc): Likewise. + * gimple-fold.c (fold_const_aggregate_ref_1): Likewise. + * gimple-ssa-strength-reduction.c (stmt_cost): Likewise. + * omp-low.c (lower_omp_for_lastprivate): Likewise. + * simplify-rtx.c (delegitimize_mem_from_attrs): Likewise. + * stor-layout.c (compute_record_mode): Likewise. + * tree-cfg.c (verify_expr): Likewise. + * tree-dfa.c (get_ref_base_and_extent): Likewise. + * tree-pretty-print.c (dump_array_domain): Likewise. + * tree-sra.c (build_user_friendly_ref_for_offset): Likewise. + * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Likewise. + * tree-ssa-loop-ivopts.c (get_loop_invariant_expr_id): Likewise. + * tree-ssa-math-opts.c (execute_cse_sincos): Likewise. + * tree-ssa-phiopt.c (hoist_adjacent_loads): Likewise. + * tree-ssa-reassoc.c (acceptable_pow_call): Likewise. + * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Likewise. + (ao_ref_init_from_vn_reference, vn_reference_fold_indirect): Likewise. + (vn_reference_lookup_3, simplify_binary_expression): Likewise. + * tree-ssa-structalias.c (bitpos_of_field): Likewise. + (get_constraint_for_1, push_fields_onto_fieldstack): Likewise. + (create_variable_info_for_1): Likewise. + * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Likewise. + (vect_verify_datarefs_alignment): Likewise. + (vect_analyze_data_ref_accesses): Likewise. + (vect_prune_runtime_alias_test_list): Likewise. + * tree-vectorizer.h (NITERS_KNOWN_P): Likewise. + +2013-11-20 Richard Sandiford <rdsandiford@googlemail.com> + + * tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Avoid signed + overflow. Use tree_to_shwi. + +2013-11-20 Richard Sandiford <rdsandiford@googlemail.com> + + * fold-const.c (fold_binary_loc): Use unsigned rather than signed + HOST_WIDE_INTs when folding (x >> c) << c. + +2013-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + Dominik Vogt <vogt@linux.vnet.ibm.com> + + * config/s390/s390.c (s390_canonicalize_comparison): Don't fold + int comparisons with an out of range condition code. + (s390_optimize_nonescaping_tx): Skip empty BBs. + Generate the new tbegin RTX when removing the FPR clobbers (with + two SETs). + (s390_expand_tbegin): Fix the retry loop counter. Copy CC to the + result before doing the retry calculations. + (s390_init_builtins): Make tbegin "returns_twice" and tabort + "noreturn". + * config/s390/s390.md (UNSPECV_TBEGIN_TDB): New constant used for + the TDB setting part of an tbegin. + ("tbegin_1", "tbegin_nofloat_1"): Add a set for the TDB. + ("tx_assist"): Set unused argument to an immediate zero instead of + loading zero into a GPR and pass it as argument. + * config/s390/htmxlintrin.h (__TM_simple_begin, __TM_begin): + Remove inline and related attributes. + (__TM_nesting_depth, __TM_is_user_abort, __TM_is_named_user_abort) + (__TM_is_illegal, __TM_is_footprint_exceeded) + (__TM_is_nested_too_deep, __TM_is_conflict): Fix format value check. + +2013-11-20 Richard Biener <rguenther@suse.de> + + PR lto/59035 + * lto-opts.c (lto_write_options): Write defaults only if + they were not explicitely specified. Also write + -ffp-contract default. + * lto-wrapper.c (merge_and_complain): Merge -ffp-contract + conservatively. + (run_gcc): Pass through -ffp-contract. + +2013-11-20 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/mips/mips.c (r10k_simplify_address): Eliminate macro usage. + +2013-11-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_simd_itype): Remove. + (aarch64_simd_builtin_datum): Remove itype, add qualifiers pointer. + (VAR1): Use qualifiers. + (aarch64_build_scalar_type): New. + (aarch64_build_vector_type): Likewise. + (aarch64_build_type): Likewise. + (aarch64_init_simd_builtins): Refactor, remove special cases, + consolidate main loop. + (aarch64_simd_expand_args): Likewise. + +2013-11-19 Joshua J Cogliati <jrincayc@yahoo.com> + + PR c/53001 + * doc/invoke.texi: Adding documentation about -Wfloat-conversion. + +2013-11-19 Miro Kropacek <miro.kropacek@gmail.com> + + * config/m68k/m68k.c (m68k_option_overrides): Fix typo. + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + * gdbhooks.py (VecPrinter): New class, for prettyprinting pointers + to "vec<>" instances. + (build_pretty_printer): Register the vec<>* prettyprinter. + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + * gdbhooks.py (GdbSubprinter.__init__): Drop str_type_ field. + (GdbSubprinter.handles_type): New. + (GdbSubprinterTypeList): New subclass of GdbSubprinter. + (GdbSubprinterRegex): New subclass of GdbSubprinter. + (GdbPrettyPrinters.add_printer): Remove in favor of... + (GdbPrettyPrinters.add_printer_for_types): ...this new method and... + (GdbPrettyPrinters.add_printer_for_regex): ...this other new method. + (GdbPrettyPrinters.__call__): Update search for subprinter + to use handles_type method. + (build_pretty_printer): Update registration of subprinters to + use the new API above, supporting multiple spelling of each type, + and allowing for future regex-based subprinters. + +2013-11-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Adjust + V16QI vector splat case for little endian. + +2013-11-19 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_across_edge): After threading + through a joiner, allow threading a normal block requiring duplication. + + * tree-ssa-threadupdate.c (thread_block_1): Improve code to detect + jump threading requests that would muck up the loop structures. + + * tree-ssa-threadupdate.c: Fix trailing whitespace. + * tree-ssa-threadupdate.h: Likewise. + +2013-11-19 Mike Stump <mikestump@comcast.net> + + * gdbinit.in: Add pmz to print out mpz values. + +2013-11-20 Jan Hubicka <jh@suse.cz> + + * common.opt (ffat-lto-objects): Disable by default. + * doc/invoke.texi (fat-lto-objects): Update documentation. + * opts.c: Enable fat-lto-objects on lto plugin disable setups. + +2013-11-19 Martin Jambor <mjambor@suse.cz> + + PR rtl-optimization/59099 + * ira.c (find_moveable_pseudos): Put back various analyses from ira() + here. + (ira): Move init_reg_equiv and call to + split_live_ranges_for_shrink_wrap up, remove analyses around call + to find_moveable_pseudos. + +2013-11-20 Alan Modra <amodra@gmail.com> + + * config/rs6000/sysv4.h (CC1_ENDIAN_LITTLE_SPEC): Define as empty. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Default + to strict alignment on older processors when little-endian. + * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Default to power8 + for ELFv2. + +2013-11-19 Teresa Johnson <tejohnson@google.com> + + * common/config/i386/i386-common.c: Enable + -freorder-blocks-and-partition at -O2 and up for x86. + * doc/invoke.texi: Update -freorder-blocks-and-partition default. + * opts.c (finish_options): Only warn if + -freorder-blocks-and-partition was set on command line. + +2013-11-19 Sriraman Tallam <tmsriram@google.com> + + * final.c (final_scan_insn): Emit a label for the split + cold function part. Label name is formed by suffixing + the original function name with "cold". + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (ENTRY_BLOCK_PTR_FOR_FUNCTION): Rename macro to... + (EXIT_BLOCK_PTR_FOR_FUNCTION): ...this. + (ENTRY_BLOCK_PTR_FOR_FN): Renamed macro to... + (EXIT_BLOCK_PTR_FOR_FN): ...this. + (ENTRY_BLOCK_PTR): Eliminate macro as work towards making uses of + cfun be explicit. + (EXIT_BLOCK_PTR): Likewise. + (FOR_ALL_BB): Rework for now to eliminate use of "ENTRY_BLOCK_PTR". + (FOR_ALL_BB_FN): Update for renaming of + "ENTRY_BLOCK_PTR_FOR_FUNCTION" to "ENTRY_BLOCK_PTR_FOR_FN". + + * cfg.c (init_flow): Likewise. + (check_bb_profile): Likewise. + * cfganal.c (pre_and_rev_post_order_compute_fn): Likewise. + * cfgcleanup.c (walk_to_nondebug_insn): Likewise. + * cfghooks.c (account_profile_record): Likewise. + * cfgloop.c (init_loops_structure): Likewise. + * cgraphbuild.c (record_eh_tables): Likewise. + (compute_call_stmt_bb_frequency): Likewise. + * ipa-inline-analysis.c (compute_bb_predicates): Likewise. + * lto-streamer-in.c (input_cfg): Likewise. + * predict.c (maybe_hot_frequency_p): Likewise. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + * tree-inline.c (initialize_cfun): Likewise. + (copy_cfg_body): Likewise. + (copy_body): Likewise. + (tree_function_versioning): Likewise. + + * bb-reorder.c (add_labels_and_missing_jumps): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (duplicate_computed_gotos): Remove usage of EXIT_BLOCK_PTR macro. + (find_rarely_executed_basic_blocks_and_crossing_edges): Remove uses of + macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (connect_traces): Likewise. + (rest_of_handle_reorder_blocks): Remove usage of EXIT_BLOCK_PTR macro. + (bb_to_key): Remove usage of ENTRY_BLOCK_PTR macro. + (fix_crossing_conditional_branches): Remove usage of EXIT_BLOCK_PTR + macro. + (find_traces_1_round): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (fix_up_fall_thru_edges): Remove usage of EXIT_BLOCK_PTR macro. + (find_traces): Remove usage of ENTRY_BLOCK_PTR macro. + (fix_up_crossing_landing_pad): Remove usage of EXIT_BLOCK_PTR macro. + (rotate_loop): Likewise. + * bt-load.c (migrate_btr_def): Remove usage of ENTRY_BLOCK_PTR macro. + * cfg.c (clear_aux_for_edges): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (alloc_aux_for_edges): Likewise. + (clear_bb_flags): Remove usage of ENTRY_BLOCK_PTR macro. + (cached_make_edge): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (compact_blocks): Likewise. + (clear_edges): Likewise. + * cfganal.c (single_pred_before_succ_order): Remove usage of + ENTRY_BLOCK_PTR macro. + (bitmap_union_of_succs): Remove usage of EXIT_BLOCK_PTR macro. + (bitmap_union_of_preds): Remove usage of ENTRY_BLOCK_PTR macro. + (bitmap_intersection_of_succs): Remove usage of EXIT_BLOCK_PTR macro. + (bitmap_intersection_of_preds): Remove usage of ENTRY_BLOCK_PTR macro. + (inverted_post_order_compute): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (compute_dominance_frontiers_1): Remove usage of ENTRY_BLOCK_PTR macro. + (post_order_compute): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (connect_infinite_loops_to_exit): Remove usage of EXIT_BLOCK_PTR macro. + (remove_fake_edges): Remove usage of ENTRY_BLOCK_PTR macro. + (add_noreturn_fake_exit_edges): Remove usage of EXIT_BLOCK_PTR macro. + (find_pdom): Remove uses of macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (remove_fake_exit_edges): Remove usage of EXIT_BLOCK_PTR macro. + (verify_edge_list): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (print_edge_list): Likewise. + (create_edge_list): Likewise. + (find_unreachable_blocks): Remove usage of ENTRY_BLOCK_PTR macro. + (mark_dfs_back_edges): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + * cfgbuild.c (find_bb_boundaries): Remove usage of ENTRY_BLOCK_PTR + macro. + (find_many_sub_basic_blocks): Remove usage of EXIT_BLOCK_PTR macro. + (make_edges): Remove uses of macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * cfgcleanup.c (delete_unreachable_blocks): Likewise. + (try_optimize_cfg): Likewise. + (try_head_merge_bb): Remove usage of EXIT_BLOCK_PTR macro. + (try_crossjump_to_edge): Remove usage of ENTRY_BLOCK_PTR macro. + (try_crossjump_bb): Remove usage of EXIT_BLOCK_PTR macro. + (merge_blocks_move): Remove usage of ENTRY_BLOCK_PTR macro. + (outgoing_edges_match): Remove usage of EXIT_BLOCK_PTR macro. + (try_forward_edges): Likewise. + (try_simplify_condjump): Likewise. + * cfgexpand.c (gimple_expand_cfg): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (construct_exit_block): Remove usage of EXIT_BLOCK_PTR macro. + (construct_init_block): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (expand_gimple_basic_block): Remove usage of EXIT_BLOCK_PTR macro. + (expand_gimple_tailcall): Likewise. + * cfghooks.c (can_duplicate_block_p): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (tidy_fallthru_edges): Likewise. + (verify_flow_info): Likewise. + * cfgloop.c (flow_bb_inside_loop_p): Likewise. + (num_loop_branches): Remove usage of EXIT_BLOCK_PTR macro. + (disambiguate_multiple_latches): Remove usage of ENTRY_BLOCK_PTR macro. + (get_loop_exit_edges): Remove usage of EXIT_BLOCK_PTR macro. + (bb_loop_header_p): Remove usage of ENTRY_BLOCK_PTR macro. + (get_loop_body_in_bfs_order): Remove usage of EXIT_BLOCK_PTR macro. + (get_loop_body_in_dom_order): Likewise. + (get_loop_body): Likewise. + * cfgloopanal.c (mark_irreducible_loops): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * cfgloopmanip.c (create_preheader): Remove usage of ENTRY_BLOCK_PTR + macro. + (remove_path): Remove usage of EXIT_BLOCK_PTR macro. + (fix_bb_placement): Likewise. + * cfgrtl.c (rtl_block_empty_p): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (rtl_can_remove_branch_p): Remove usage of EXIT_BLOCK_PTR macro. + (cfg_layout_split_edge): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (rtl_flow_call_edges_add): Remove usage of EXIT_BLOCK_PTR macro. + (cfg_layout_can_merge_blocks_p): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (cfg_layout_redirect_edge_and_branch): Remove usage of ENTRY_BLOCK_PTR + macro. + (fixup_fallthru_exit_predecessor): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (fixup_reorder_chain): Likewise. + (relink_block_chain): Likewise. + (cfg_layout_delete_block): Remove usage of EXIT_BLOCK_PTR macro. + (rtl_verify_bb_layout): Remove usage of ENTRY_BLOCK_PTR macro. + (cfg_layout_duplicate_bb): Remove usage of EXIT_BLOCK_PTR macro. + (force_one_exit_fallthru): Likewise. + (rtl_verify_fallthru): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (rtl_verify_edges): Likewise. + (commit_edge_insertions): Likewise. + (commit_one_edge_insertion): Likewise. + (rtl_split_edge): Likewise. + (force_nonfallthru_and_redirect): Likewise. + (outof_cfg_layout_mode): Remove usage of EXIT_BLOCK_PTR macro. + (skip_insns_after_block): Likewise. + (fixup_partition_crossing): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (purge_dead_edges): Remove usage of EXIT_BLOCK_PTR macro. + (rtl_can_merge_blocks): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (contains_no_active_insn_p): Likewise. + (emit_insn_at_entry): Remove usage of ENTRY_BLOCK_PTR macro. + (entry_of_function): Likewise. + (last_bb_in_partition): Remove usage of EXIT_BLOCK_PTR macro. + (fixup_new_cold_bb): Likewise. + (patch_jump_insn): Likewise. + (try_redirect_by_replacing_jump): Likewise. + (block_label): Likewise. + (could_fall_through): Likewise. + (can_fallthru): Likewise. + * cgraphbuild.c (cgraph_rebuild_references): Remove usage of + ENTRY_BLOCK_PTR macro. + (rebuild_cgraph_edges): Likewise. + * cgraphunit.c (init_lowered_empty_function): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (expand_thunk): Remove usage of EXIT_BLOCK_PTR macro. + * combine.c (get_last_value): Remove usage of ENTRY_BLOCK_PTR macro. + (distribute_links): Remove usage of EXIT_BLOCK_PTR macro. + (get_last_value_validate): Remove usage of ENTRY_BLOCK_PTR macro. + (try_combine): Remove usage of EXIT_BLOCK_PTR macro. + (reg_num_sign_bit_copies_for_combine): Remove usage of ENTRY_BLOCK_PTR + macro. + (reg_nonzero_bits_for_combine): Likewise. + (set_nonzero_bits_and_sign_copies): Likewise. + (combine_instructions): Likewise. + * cprop.c (one_cprop_pass): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (bypass_conditional_jumps): Likewise. + (bypass_block): Remove usage of EXIT_BLOCK_PTR macro. + (find_implicit_sets): Likewise. + (cprop_jump): Likewise. + * cse.c (cse_cc_succs): Likewise. + (cse_find_path): Likewise. + * df-problems.c (df_lr_confluence_0): Likewise. + * df-scan.c (df_entry_block_defs_collect): Remove usage of + ENTRY_BLOCK_PTR macro. + (df_exit_block_uses_collect): Remove usage of EXIT_BLOCK_PTR macro. + * dominance.c (iterate_fix_dominators): Remove usage of + ENTRY_BLOCK_PTR macro. + (calc_idoms): Remove uses of macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (determine_dominators_for_sons): Remove usage of ENTRY_BLOCK_PTR macro. + (calc_dfs_tree): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (prune_bbs_to_update_dominators): Remove usage of ENTRY_BLOCK_PTR + macro. + (calc_dfs_tree_nonrec): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + * domwalk.c (cmp_bb_postorder): Likewise. + * dse.c (dse_step1): Remove usage of EXIT_BLOCK_PTR macro. + * except.c (finish_eh_generation): Remove usage of ENTRY_BLOCK_PTR + macro. + (sjlj_emit_function_enter): Likewise. + * final.c (compute_alignments): Likewise. + * function.c (thread_prologue_and_epilogue_insns): Remove uses of + macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (reposition_prologue_and_epilogue_notes): Remove usage of + EXIT_BLOCK_PTR macro. + (convert_jumps_to_returns): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (regno_clobbered_at_setjmp): Remove usage of ENTRY_BLOCK_PTR macro. + (next_block_for_reg): Remove usage of EXIT_BLOCK_PTR macro. + * gcse.c (hoist_code): Remove usage of ENTRY_BLOCK_PTR macro. + (update_bb_reg_pressure): Remove usage of EXIT_BLOCK_PTR macro. + (compute_code_hoist_vbeinout): Likewise. + (should_hoist_expr_to_dom): Remove usage of ENTRY_BLOCK_PTR macro. + (pre_expr_reaches_here_p_work): Likewise. + * gimple-iterator.c (gsi_commit_edge_inserts): Likewise. + (gimple_find_edge_insert_loc): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + * gimple-ssa-strength-reduction.c (slsr_process_phi): Remove usage of + ENTRY_BLOCK_PTR macro. + * graph.c (draw_cfg_nodes_for_loop): Remove usage of EXIT_BLOCK_PTR + macro. + * graphite-clast-to-gimple.c (translate_clast_user): Remove usage of + ENTRY_BLOCK_PTR macro. + * graphite-scop-detection.c (build_scops): Likewise. + (create_sese_edges): Remove usage of EXIT_BLOCK_PTR macro. + (scopdet_basic_block_info): Remove usage of ENTRY_BLOCK_PTR macro. + * haifa-sched.c (restore_bb_notes): Remove usage of EXIT_BLOCK_PTR + macro. + (unlink_bb_notes): Likewise. + (create_check_block_twin): Likewise. + (init_before_recovery): Likewise. + (sched_extend_bb): Likewise. + (priority): Likewise. + * hw-doloop.c (reorder_loops): Likewise. + (discover_loop): Likewise. + * ifcvt.c (dead_or_predicable): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (find_if_case_1): Remove usage of EXIT_BLOCK_PTR macro. + (block_has_only_trap): Likewise. + (cond_exec_find_if_block): Likewise. + (merge_if_block): Likewise. + * ipa-inline-analysis.c (param_change_prob): Remove usage of + ENTRY_BLOCK_PTR macro. + (record_modified): Likewise. + * ipa-pure-const.c (execute_warn_function_noreturn): Remove usage of + EXIT_BLOCK_PTR macro. + (local_pure_const): Likewise. + * ipa-split.c (split_function): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (find_split_points): Likewise. + (consider_split): Likewise. + (find_return_bb): Remove usage of EXIT_BLOCK_PTR macro. + (verify_non_ssa_vars): Remove usage of ENTRY_BLOCK_PTR macro. + * ira-build.c (ira_loop_tree_body_rev_postorder): Likewise. + * ira-color.c (print_loop_title): Remove usage of EXIT_BLOCK_PTR macro. + * ira-emit.c (entered_from_non_parent_p): Remove usage of + ENTRY_BLOCK_PTR macro. + (ira_emit): Remove usage of EXIT_BLOCK_PTR macro. + * ira-int.h (ira_assert): Remove usage of ENTRY_BLOCK_PTR macro. + * ira.c (split_live_ranges_for_shrink_wrap): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * lcm.c (compute_rev_insert_delete): Remove usage of ENTRY_BLOCK_PTR + macro. + (compute_nearerout): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (compute_farthest): Likewise. + (compute_available): Likewise. + (compute_insert_delete): Remove usage of EXIT_BLOCK_PTR macro. + (compute_laterin): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (compute_earliest): Likewise. + (compute_antinout_edge): Likewise. + * loop-iv.c (simplify_using_initial_values): Remove usage of + ENTRY_BLOCK_PTR macro. + * loop-unswitch.c (unswitch_loop): Remove usage of EXIT_BLOCK_PTR + macro. + * lra-assigns.c (find_hard_regno_for): Remove usage of ENTRY_BLOCK_PTR + macro. + * lra-constraints.c (lra_inheritance): Remove usage of EXIT_BLOCK_PTR + macro. + * lra-lives.c (lra_create_live_ranges): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * lra.c (has_nonexceptional_receiver): Remove usage of EXIT_BLOCK_PTR + macro. + * lto-streamer-in.c (input_function): Remove usage of ENTRY_BLOCK_PTR + macro. + * lto-streamer-out.c (output_cfg): Likewise. + * mcf.c (adjust_cfg_counts): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (create_fixup_graph): Remove usage of ENTRY_BLOCK_PTR macro. + * mode-switching.c (optimize_mode_switching): Likewise. + (create_pre_exit): Remove usage of EXIT_BLOCK_PTR macro. + * modulo-sched.c (rest_of_handle_sms): Likewise. + (canon_loop): Likewise. + * omp-low.c (build_omp_regions): Remove usage of ENTRY_BLOCK_PTR macro. + * postreload-gcse.c (eliminate_partially_redundant_loads): Remove uses + of macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * predict.c (rebuild_frequencies): Remove usage of ENTRY_BLOCK_PTR + macro. + (propagate_freq): Remove usage of EXIT_BLOCK_PTR macro. + (estimate_bb_frequencies): Remove usage of ENTRY_BLOCK_PTR macro. + (tree_estimate_probability_bb): Remove usage of EXIT_BLOCK_PTR macro. + (expensive_function_p): Remove usage of ENTRY_BLOCK_PTR macro. + (tree_bb_level_predictions): Remove usage of EXIT_BLOCK_PTR macro. + (counts_to_freqs): Remove usage of ENTRY_BLOCK_PTR macro. + (apply_return_prediction): Remove usage of EXIT_BLOCK_PTR macro. + (estimate_loops): Remove usage of ENTRY_BLOCK_PTR macro. + (gimple_predict_edge): Likewise. + (probably_never_executed): Likewise. + * profile.c (find_spanning_tree): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (branch_prob): Likewise. + (compute_branch_probabilities): Likewise. + (compute_frequency_overlap): Remove usage of ENTRY_BLOCK_PTR macro. + (is_inconsistent): Remove usage of EXIT_BLOCK_PTR macro. + (read_profile_edge_counts): Remove usage of ENTRY_BLOCK_PTR macro. + (set_bb_counts): Likewise. + (correct_negative_edge_counts): Likewise. + (get_exec_counts): Likewise. + (instrument_values): Likewise. + (instrument_edges): Likewise. + * reg-stack.c (convert_regs): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (compensate_edges): Remove usage of ENTRY_BLOCK_PTR macro. + (convert_regs_exit): Remove usage of EXIT_BLOCK_PTR macro. + (convert_regs_entry): Remove usage of ENTRY_BLOCK_PTR macro. + (reg_to_stack): Likewise. + * regs.h (REG_N_SETS): Likewise. + * reload.c (find_dummy_reload): Likewise. + (combine_reloads): Likewise. + (push_reload): Likewise. + * reload1.c (has_nonexceptional_receiver): Remove usage of + EXIT_BLOCK_PTR macro. + * resource.c (mark_target_live_regs): Remove usage of ENTRY_BLOCK_PTR + macro. + (find_basic_block): Likewise. + * sched-ebb.c (ebb_add_block): Remove usage of EXIT_BLOCK_PTR macro. + (schedule_ebbs): Likewise. + * sched-int.h (sel_sched_p): Likewise. + * sched-rgn.c (compute_dom_prob_ps): Remove usage of ENTRY_BLOCK_PTR + macro. + (rgn_add_block): Remove usage of EXIT_BLOCK_PTR macro. + (haifa_find_rgns): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (propagate_deps): Remove usage of EXIT_BLOCK_PTR macro. + (extend_rgns): Likewise. + (find_single_block_region): Likewise. + * sel-sched-ir.c (sel_remove_loop_preheader): Remove usage of + ENTRY_BLOCK_PTR macro. + (setup_nop_and_exit_insns): Remove usage of EXIT_BLOCK_PTR macro. + (sel_create_recovery_block): Likewise. + (bb_ends_ebb_p): Likewise. + (sel_bb_end): Likewise. + (sel_bb_head): Likewise. + (free_lv_sets): Likewise. + (init_lv_sets): Likewise. + (tidy_control_flow): Likewise. + (maybe_tidy_empty_bb): Likewise. + * sel-sched-ir.h (_succ_iter_cond): Likewise. + (_succ_iter_start): Likewise. + (sel_bb_empty_or_nop_p): Likewise. + (get_loop_exit_edges_unique_dests): Likewise. + (inner_loop_header_p): Likewise. + * sel-sched.c (create_block_for_bookkeeping): Likewise. + (find_block_for_bookkeeping): Likewise. + * store-motion.c (remove_reachable_equiv_notes): Likewise. + (insert_store): Likewise. + * trans-mem.c (ipa_tm_transform_clone): Remove usage of + ENTRY_BLOCK_PTR macro. + (tm_memopt_compute_available): Remove usage of EXIT_BLOCK_PTR macro. + (ipa_tm_scan_irr_function): Remove usage of ENTRY_BLOCK_PTR macro. + (gate_tm_init): Likewise. + (tm_region_init): Likewise. + * tree-cfg.c (execute_fixup_cfg): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (execute_warn_function_return): Remove usage of EXIT_BLOCK_PTR macro. + (split_critical_edges): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (print_loops): Remove usage of ENTRY_BLOCK_PTR macro. + (move_sese_region_to_fn): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (gimple_redirect_edge_and_branch): Remove usage of ENTRY_BLOCK_PTR + macro. + (gimple_verify_flow_info): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (remove_edge_and_dominated_blocks): Remove usage of EXIT_BLOCK_PTR + macro. + (make_edges): Remove uses of macros: ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (gimple_flow_call_edges_add): Remove usage of EXIT_BLOCK_PTR macro. + (make_blocks): Remove usage of ENTRY_BLOCK_PTR macro. + (build_gimple_cfg): Likewise. + (gimple_duplicate_bb): Remove usage of EXIT_BLOCK_PTR macro. + (gimple_can_merge_blocks_p): Likewise. + * tree-cfgcleanup.c (tree_forwarder_block_p): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * tree-complex.c (update_parameter_components): Remove usage of + ENTRY_BLOCK_PTR macro. + * tree-if-conv.c (get_loop_body_in_if_conv_order): Remove usage of + EXIT_BLOCK_PTR macro. + * tree-inline.c (tree_function_versioning): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (delete_unreachable_blocks_update_callgraph): Likewise. + (initialize_cfun): Likewise. + (copy_cfg_body): Remove usage of ENTRY_BLOCK_PTR macro. + (copy_edges_for_bb): Remove usage of EXIT_BLOCK_PTR macro. + (remap_ssa_name): Remove usage of ENTRY_BLOCK_PTR macro. + * tree-into-ssa.c (update_ssa): Likewise. + (maybe_register_def): Remove usage of EXIT_BLOCK_PTR macro. + (insert_updated_phi_nodes_for): Remove usage of ENTRY_BLOCK_PTR macro. + (rewrite_into_ssa): Likewise. + (rewrite_debug_stmt_uses): Likewise. + * tree-outof-ssa.c (expand_phi_nodes): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * tree-profile.c (gimple_gen_ic_func_profiler): Remove usage of + ENTRY_BLOCK_PTR macro. + * tree-scalar-evolution.h (block_before_loop): Likewise. + * tree-sra.c (sra_ipa_reset_debug_stmts): Likewise. + (dump_dereferences_table): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (analyze_caller_dereference_legality): Remove usage of ENTRY_BLOCK_PTR + macro. + (propagate_dereference_distances): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (initialize_parameter_reductions): Remove usage of ENTRY_BLOCK_PTR + macro. + * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Likewise. + (optimize_stack_restore): Remove usage of EXIT_BLOCK_PTR macro. + * tree-ssa-coalesce.c (create_outofssa_var_map): Likewise. + * tree-ssa-dce.c (eliminate_unnecessary_stmts): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (remove_dead_stmt): Remove usage of EXIT_BLOCK_PTR macro. + (propagate_necessity): Remove usage of ENTRY_BLOCK_PTR macro. + (mark_control_dependent_edges_necessary): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + * tree-ssa-dom.c (eliminate_degenerate_phis): Remove usage of + ENTRY_BLOCK_PTR macro. + (tree_ssa_dominator_optimize): Remove usage of EXIT_BLOCK_PTR macro. + * tree-ssa-live.c (verify_live_on_entry): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (calculate_live_on_exit): Likewise. + (set_var_live_on_entry): Remove usage of ENTRY_BLOCK_PTR macro. + (loe_visit_block): Likewise. + * tree-ssa-live.h (live_on_exit): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (live_on_entry): Likewise. + * tree-ssa-loop-ivopts.c (find_interesting_uses): Remove usage of + EXIT_BLOCK_PTR macro. + * tree-ssa-loop-manip.c (compute_live_loop_exits): Remove usage of + ENTRY_BLOCK_PTR macro. + * tree-ssa-loop-niter.c (simplify_using_initial_conditions): Likewise. + (bound_difference): Likewise. + * tree-ssa-loop-prefetch.c (may_use_storent_in_loop_p): Remove usage + of EXIT_BLOCK_PTR macro. + * tree-ssa-loop-unswitch.c (simplify_using_entry_checks): Remove usage + of ENTRY_BLOCK_PTR macro. + * tree-ssa-math-opts.c (register_division_in): Likewise. + * tree-ssa-phiprop.c (tree_ssa_phiprop): Likewise. + * tree-ssa-pre.c (compute_avail): Likewise. + (compute_antic): Remove usage of EXIT_BLOCK_PTR macro. + (insert): Remove usage of ENTRY_BLOCK_PTR macro. + * tree-ssa-propagate.c (ssa_prop_init): Likewise. + (simulate_block): Remove usage of EXIT_BLOCK_PTR macro. + (cfg_blocks_add): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + (add_control_edge): Remove usage of EXIT_BLOCK_PTR macro. + * tree-ssa-reassoc.c (do_reassoc): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (build_and_add_sum): Remove usage of ENTRY_BLOCK_PTR macro. + * tree-ssa-sink.c (nearest_common_dominator_of_uses): Likewise. + (execute_sink_code): Remove usage of EXIT_BLOCK_PTR macro. + * tree-ssa-uninit.c (find_dom): Remove usage of ENTRY_BLOCK_PTR macro. + (compute_control_dep_chain): Remove usage of EXIT_BLOCK_PTR macro. + (find_pdom): Likewise. + (warn_uninitialized_vars): Remove usage of ENTRY_BLOCK_PTR macro. + * tree-stdarg.c (reachable_at_most_once): Likewise. + * tree-tailcall.c (tree_optimize_tail_calls_1): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (eliminate_tail_call): Likewise. + * tsan.c (instrument_func_entry): Remove usage of ENTRY_BLOCK_PTR + macro. + (instrument_func_exit): Remove usage of EXIT_BLOCK_PTR macro. + * var-tracking.c (vt_initialize): Remove uses of macros: + ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR. + (vt_add_function_parameter): Remove usage of ENTRY_BLOCK_PTR macro. + (vt_find_locations): Remove usage of EXIT_BLOCK_PTR macro. + (vt_stack_adjustments): Remove uses of macros: ENTRY_BLOCK_PTR, + EXIT_BLOCK_PTR. + * varasm.c (assemble_start_function): Remove usage of ENTRY_BLOCK_PTR + macro. + * config/bfin/bfin.c (hwloop_optimize): Likewise. + * config/nds32/nds32.c (nds32_fp_as_gp_check_available): Remove usage + of EXIT_BLOCK_PTR macro. + * config/arm/arm.c (require_pic_register): Remove usage of + ENTRY_BLOCK_PTR macro. + (arm_r3_live_at_start_p): Likewise. + (any_sibcall_could_use_r3): Remove usage of EXIT_BLOCK_PTR macro. + * config/rs6000/rs6000.c (rs6000_emit_prologue): Likewise. + * config/frv/frv.c (frv_optimize_membar_global): Likewise. + * config/alpha/alpha.c (alpha_gp_save_rtx): Remove usage of + ENTRY_BLOCK_PTR macro. + * config/i386/i386.c (ix86_count_insn): Likewise. + (ix86_seh_fixup_eh_fallthru): Remove usage of EXIT_BLOCK_PTR macro. + (ix86_pad_short_function): Likewise. + (ix86_compute_frame_layout): Remove usage of ENTRY_BLOCK_PTR macro. + (ix86_pad_returns): Remove usage of EXIT_BLOCK_PTR macro. + (ix86_eax_live_at_start_p): Remove usage of ENTRY_BLOCK_PTR macro. + (add_condition_to_bb): Remove usage of EXIT_BLOCK_PTR macro. + (ix86_expand_epilogue): Likewise. + * config/ia64/ia64.c (ia64_asm_unwind_emit): Likewise. + (ia64_expand_prologue): Likewise. + +2013-11-19 Catherine Moore <clm@codesourcery.com> + + * doc/invoke.texi (mfix-rm7000, mno-fix-rm7000): Document. + * config/mips/mips.opt (mfix-rm7000): New option. + * config/mips/mips.h (ASM_SPEC): Handle mfix-rm7000. + * config/mips/mips.c (mips_reorg_process_insns): Disable + noreorder for TARGET_FIX_RM7000. + +2013-11-19 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh-c.c: Fix typo in include of file attribs.h. + +2013-11-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs): + Handle narrow mode add-shifts properly. + * config/arm/arm-common.c (arm_rtx_shift_left_p): Remove static. + * config/arm/arm-common-protos.h (arm_rtx_shift_left_p): + Declare extern. + +2013-11-19 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm.md (zero_extend<mode>di2): Add type attribute. + +2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/vector.md ("mov<mode>"): Do not call + rs6000_emit_le_vsx_move to move into or out of GPRs. + * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Assert + source and destination are not GPR hard regs. + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (n_edges_for_function): Rename macro to... + (n_edges_for_fn): ...this. + (n_edges): Eliminate macro as work towards making uses of + cfun be explicit. + + * cfg.c (init_flow): Update for renaming of "n_edges_for_function" + to "n_edges_for_fn". + + * cfg.c (unchecked_make_edge): Remove usage of n_edges macro. + (clear_edges): Likewise. + (free_edge): Likewise. + * cfghooks.c (dump_flow_info): Likewise. + * cprop.c (is_too_expensive): Likewise. + * df-core.c (df_worklist_dataflow_doublequeue): Likewise. + * gcse.c (is_too_expensive): Likewise. + (prune_insertions_deletions): Likewise. + * mcf.c (create_fixup_graph): Likewise. + * sched-rgn.c (haifa_find_rgns): Likewise. + * tree-cfg.c (gimple_dump_cfg): Likewise. + * var-tracking.c (variable_tracking_main_1): Likewise. + +2013-11-19 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix over + length lines. + +2013-11-19 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.md + (aarch64_movdi_<mode>low, *add_<shift>_si_uxtw): Adjust whitespace. + +2013-11-19 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.h (PROFILE_HOOK): Fix whitespace. + +2013-11-19 Joseph Myers <joseph@codesourcery.com> + + * varasm.c (align_variable): Give error instead of warning for + unsupported alignment. + (assemble_noswitch_variable): Likewise. + +2013-11-19 Basile Starynkevitch <basile@starynkevitch.net> + + * plugin.def (PLUGIN_INCLUDE_FILE): New event, invoked in + cb_file_change. + +2013-11-19 Peter Bergner <bergner@vnet.ibm.com> + + * loop-doloop.c (doloop_optimize_loops): Remove unused + loop iterator argument from FOR_EACH_LOOP. + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + Convert gimple types from a union to C++ inheritance. + * Makefile.in (GIMPLE_H): Add dep on is-a.h. + * coretypes.h (union gimple_statement_d): Remove declaration. + (gimple): Convert from being a "union gimple_statement_d *" + to a "struct gimple_statement_base *". + (const_gimple): Likewise (with "const"). + * ggc.h (ggc_alloc_cleared_gimple_statement_d_stat): Replace with... + (ggc_alloc_cleared_gimple_statement_stat): ...this. + * gimple-pretty-print.c (debug): Change parameter from a + "gimple_statement_d &" to a "gimple_statement_base &". + (debug): Change parameter from a "gimple_statement_d *" to + a "gimple_statement_base *". + * gimple-pretty-print.h (debug): Update declarations as above. + * gimple.c (gimple_alloc_stat): Update for renaming of + ggc_alloc_cleared_gimple_statement_d_stat to + ggc_alloc_cleared_gimple_statement_stat. + * gimple.h: Include "is-a.h" for use by is_a_helper + specializations in followup autogenerated patch. + (struct gimple statement_base): Make this type usable as a base + class by adding "desc", "tag" and "variable_size" to GTY, thus + using opting-in to gengtype's support for simple inheritance. + (gimple_statement_with_ops_base): Convert to a subclass of + gimple_statement_base, dropping initial "gsbase" field. Note that + this type is abstract, with no GSS_ value, and thus no GTY tag value. + (gimple_statement_with_ops): Convert to a subclass of + gimple_statement_with_ops_base, dropping initial "opbase" field. + Add tag value to GTY marking. Update marking of op field to + reflect how num_ops field is accessed via inheritance. + (gimple_statement_with_memory_ops_base): Convert to a subclass of + gimple_statement_with_ops_base, dropping initial "opbase" field. + Add tag value to GTY marking. + (gimple_statement_with_memory_ops): Convert to a subclass of + public gimple_statement_with_memory_ops_base, dropping initial + "membase" field. Add tag value to GTY marking. Update marking + of op field to reflect how num_ops field is accessed via inheritance. + (gimple_statement_call): Analogous changes that also update the + marking of the "u" union. + (gimple_statement_omp): Convert to a subclass of + gimple_statement_base, dropping initial "gsbase" field, adding + tag value to GTY marking. + (gimple_statement_bind): Likewise. + (gimple_statement_catch): Likewise. + (gimple_statement_eh_filter): Likewise. + (gimple_statement_eh_else): Likewise. + (gimple_statement_eh_mnt): Likewise. + (gimple_statement_phi): Likewise. + (gimple_statement_eh_ctrl): Likewise. + (gimple_statement_try): Likewise. + (gimple_statement_wce): Likewise. + (gimple_statement_asm): Convert to a subclass of + gimple_statement_with_memory_ops_base, dropping initial + "membase" field, adding tag value to GTY marking, and updating + marking of op field. + (gimple_statement_omp_critical): Convert to a subclass of + gimple_statement_omp, dropping initial "omp" field, adding tag + value to GTY marking. + (gimple_statement_omp_for): Likewise. + (gimple_statement_omp_parallel): Likewise. + (gimple_statement_omp_task): Convert to a subclass of + gimple_statement_omp_parallel, dropping initial "par" field, + adding tag value to GTY marking. + (gimple_statement_omp_sections): Convert to a subclass of + gimple_statement_omp, dropping initial "omp" field, adding + tag value to GTY marking. + (gimple_statement_omp_continue): Convert to a subclass of + gimple_statement_base, dropping initial "gsbase" field, adding + tag value to GTY marking. + (gimple_statement_omp_single): Convert to a subclass of + gimple_statement_omp, dropping initial "omp" field, adding + tag value to GTY marking. + (gimple_statement_omp_atomic_load): Convert to a subclass of + gimple_statement_base, dropping initial "gsbase" field, adding + tag value to GTY marking. + (gimple_statement_omp_atomic_store): Convert to a subclass of + gimple_statement_base, dropping initial "gsbase" field, adding + tag value to GTY marking. + (gimple_statement_transaction): Convert to a subclass of + gimple_statement_with_memory_ops_base, dropping initial "gsbase" + field, adding tag value to GTY marking. + (union gimple_statement_d): Remove. + * system.h (CONST_CAST_GIMPLE): Update to use + "struct gimple_statement_base *" rather than + "union gimple_statement_d *". + * tree-ssa-ccp.c (gimple_htab): Convert underlying type from + gimple_statement_d to gimple_statement_base. + + * gimple.h (gimple_use_ops): Port from union to usage of dyn_cast. + (gimple_set_use_ops): Port from union to usage of as_a. + (gimple_set_vuse): Likewise. + (gimple_set_vdef): Likewise. + (gimple_call_internal_fn): Port from union to a static_cast, + given that the type has already been asserted. + (gimple_omp_body_ptr): Port from unchecked union usage to + a static_cast. + (gimple_omp_set_body): Likewise. + + * gimple-iterator.c (update_bb_for_stmts): Update for conversion of + gimple types to a true class hierarchy. + (update_call_edge_frequencies): Likewise. + (gsi_insert_seq_nodes_before): Likewise. + (gsi_insert_seq_nodes_after): Likewise. + (gsi_split_seq_after): Likewise. + (gsi_set_stmt): Likewise. + (gsi_split_seq_before): Likewise. + (gsi_remove): Likewise. + * gimple-iterator.h (gsi_one_before_end_p): Likewise. + (gsi_next): Likewise. + (gsi_prev): Likewise. + * gimple-pretty-print.c (dump_gimple_debug): Likewise. + * gimple-ssa.h (gimple_vuse_op): Likewise. + (gimple_vdef_op): Likewise. + * gimple-streamer-in.c (input_gimple_stmt): Likewise. + * gimple-streamer-out.c (output_gimple_stmt): Likewise. + * gimple.c (gimple_set_code): Likewise. + (gimple_alloc_stat): Likewise. + (gimple_set_subcode): Likewise. + (gimple_build_call_internal_1): Likewise. + (gimple_check_failed): Likewise. + (gimple_call_flags): Likewise. + (gimple_set_bb): Likewise. + * gimple.h (is_a_helper <gimple_statement_asm> (gimple)): New. + (is_a_helper <gimple_statement_bind> (gimple)): Likewise. + (is_a_helper <gimple_statement_call> (gimple)): Likewise. + (is_a_helper <gimple_statement_catch> (gimple)): Likewise. + (is_a_helper <gimple_statement_eh_ctrl> (gimple)): Likewise. + (is_a_helper <gimple_statement_eh_else> (gimple)): Likewise. + (is_a_helper <gimple_statement_eh_filter> (gimple)): Likewise. + (is_a_helper <gimple_statement_eh_mnt> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_atomic_load> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_atomic_store> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_continue> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_critical> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_for> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_parallel> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_sections> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_single> (gimple)): Likewise. + (is_a_helper <gimple_statement_omp_task> (gimple)): Likewise. + (is_a_helper <gimple_statement_phi> (gimple)): Likewise. + (is_a_helper <gimple_statement_transaction> (gimple)): Likewise. + (is_a_helper <gimple_statement_try> (gimple)): Likewise. + (is_a_helper <gimple_statement_wce> (gimple)): Likewise. + (is_a_helper <const gimple_statement_asm> (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_bind> (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_call> (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_catch> (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_eh_ctrl> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_eh_filter> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_atomic_load> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_atomic_store> + (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_omp_continue> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_critical> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_for> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_parallel> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_sections> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_single> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_omp_task> (const_gimple)): + Likewise. + (is_a_helper <const gimple_statement_phi> (const_gimple)): Likewise. + (is_a_helper <const gimple_statement_transaction> (const_gimple)): + Likewise. + (gimple_seq_last): Update for conversion of gimple types to a true + class hierarchy. + (gimple_seq_set_last): Likewise. + (gimple_code): Likewise. + (gimple_bb): Likewise. + (gimple_block): Likewise. + (gimple_set_block): Likewise. + (gimple_location): Likewise. + (gimple_location_ptr): Likewise. + (gimple_set_location): Likewise. + (gimple_no_warning_p): Likewise. + (gimple_set_no_warning): Likewise. + (gimple_set_visited): Likewise. + (gimple_visited_p): Likewise. + (gimple_set_plf): Likewise. + (gimple_plf): Likewise. + (gimple_set_uid): Likewise. + (gimple_uid): Likewise. + (gimple_init_singleton): Likewise. + (gimple_modified_p): Likewise. + (gimple_set_modified): Likewise. + (gimple_expr_code): Likewise. + (gimple_has_volatile_ops): Likewise. + (gimple_set_has_volatile_ops): Likewise. + (gimple_omp_subcode): Likewise. + (gimple_omp_set_subcode): Likewise. + (gimple_omp_return_set_nowait): Likewise. + (gimple_omp_section_set_last): Likewise. + (gimple_omp_parallel_set_combined_p): Likewise. + (gimple_omp_atomic_set_need_value): Likewise. + (gimple_omp_atomic_set_seq_cst): Likewise. + (gimple_num_ops): Likewise. + (gimple_set_num_ops): Likewise. + (gimple_assign_nontemporal_move_p): Likewise. + (gimple_assign_set_nontemporal_move): Likewise. + (gimple_assign_rhs_code): Likewise. + (gimple_assign_set_rhs_code): Likewise. + (gimple_call_internal_p): Likewise. + (gimple_call_with_bounds_p): Likewise. + (gimple_call_set_with_bounds): Likewise. + (gimple_call_set_tail): Likewise. + (gimple_call_tail_p): Likewise. + (gimple_call_set_return_slot_opt): Likewise. + (gimple_call_return_slot_opt_p): Likewise. + (gimple_call_set_from_thunk): Likewise. + (gimple_call_from_thunk_p): Likewise. + (gimple_call_set_va_arg_pack): Likewise. + (gimple_call_va_arg_pack_p): Likewise. + (gimple_call_set_nothrow): Likewise. + (gimple_call_set_alloca_for_var): Likewise. + (gimple_call_alloca_for_var_p): Likewise. + (gimple_call_copy_flags): Likewise. + (gimple_cond_code): Likewise. + (gimple_cond_set_code): Likewise. + (gimple_cond_make_false): Likewise. + (gimple_cond_make_true): Likewise. + (gimple_asm_volatile_p): Likewise. + (gimple_asm_set_volatile): Likewise. + (gimple_asm_set_input): Likewise. + (gimple_asm_input_p): Likewise. + (gimple_try_kind): Likewise. + (gimple_try_set_kind): Likewise. + (gimple_try_catch_is_cleanup): Likewise. + (gimple_try_set_catch_is_cleanup): Likewise. + (gimple_wce_cleanup_eh_only): Likewise. + (gimple_wce_set_cleanup_eh_only): Likewise. + (gimple_debug_bind_p): Likewise. + (gimple_debug_source_bind_p): Likewise. + (gimple_omp_for_set_kind): Likewise. + (gimple_omp_for_set_combined_p): Likewise. + (gimple_omp_for_set_combined_into_p): Likewise. + (gimple_omp_target_set_kind): Likewise. + (gimple_transaction_subcode): Likewise. + (gimple_transaction_set_subcode): Likewise. + (gimple_predict_predictor): Likewise. + (gimple_predict_set_predictor): Likewise. + (gimple_predict_outcome): Likewise. + (gimple_predict_set_outcome): Likewise. + (gimple_transaction_set_label): Likewise. + (gimple_transaction_set_body): Likewise. + (gimple_transaction_label_ptr): Likewise. + (gimple_transaction_label): Likewise. + (gimple_transaction_body_ptr): Likewise. + (gimple_omp_continue_set_control_use): Likewise. + (gimple_omp_continue_control_use_ptr): Likewise. + (gimple_omp_continue_control_use): Likewise. + (gimple_omp_continue_set_control_def): Likewise. + (gimple_omp_continue_control_def_ptr): Likewise. + (gimple_omp_continue_control_def): Likewise. + (gimple_omp_atomic_load_rhs_ptr): Likewise. + (gimple_omp_atomic_load_rhs): Likewise. + (gimple_omp_atomic_load_set_rhs): Likewise. + (gimple_omp_atomic_load_lhs_ptr): Likewise. + (gimple_omp_atomic_load_lhs): Likewise. + (gimple_omp_atomic_load_set_lhs): Likewise. + (gimple_omp_atomic_store_val_ptr): Likewise. + (gimple_omp_atomic_store_val): Likewise. + (gimple_omp_atomic_store_set_val): Likewise. + (gimple_omp_for_cond): Likewise. + (gimple_omp_for_set_cond): Likewise. + (gimple_omp_sections_set_control): Likewise. + (gimple_omp_sections_control_ptr): Likewise. + (gimple_omp_sections_control): Likewise. + (gimple_omp_sections_set_clauses): Likewise. + (gimple_omp_sections_clauses_ptr): Likewise. + (gimple_omp_sections_clauses): Likewise. + (gimple_omp_teams_set_clauses): Likewise. + (gimple_omp_teams_clauses_ptr): Likewise. + (gimple_omp_teams_clauses): Likewise. + (gimple_omp_target_set_data_arg): Likewise. + (gimple_omp_target_data_arg_ptr): Likewise. + (gimple_omp_target_data_arg): Likewise. + (gimple_omp_target_set_child_fn): Likewise. + (gimple_omp_target_child_fn_ptr): Likewise. + (gimple_omp_target_child_fn): Likewise. + (gimple_omp_target_set_clauses): Likewise. + (gimple_omp_target_clauses_ptr): Likewise. + (gimple_omp_target_clauses): Likewise. + (gimple_omp_single_set_clauses): Likewise. + (gimple_omp_single_clauses_ptr): Likewise. + (gimple_omp_single_clauses): Likewise. + (gimple_omp_task_set_arg_align): Likewise. + (gimple_omp_task_arg_align_ptr): Likewise. + (gimple_omp_task_arg_align): Likewise. + (gimple_omp_task_set_arg_size): Likewise. + (gimple_omp_task_arg_size_ptr): Likewise. + (gimple_omp_task_arg_size): Likewise. + (gimple_omp_task_set_copy_fn): Likewise. + (gimple_omp_task_copy_fn_ptr): Likewise. + (gimple_omp_task_copy_fn): Likewise. + (gimple_omp_task_set_data_arg): Likewise. + (gimple_omp_task_data_arg_ptr): Likewise. + (gimple_omp_task_data_arg): Likewise. + (gimple_omp_task_set_child_fn): Likewise. + (gimple_omp_task_child_fn_ptr): Likewise. + (gimple_omp_task_child_fn): Likewise. + (gimple_omp_task_set_clauses): Likewise. + (gimple_omp_task_clauses_ptr): Likewise. + (gimple_omp_task_clauses): Likewise. + (gimple_omp_parallel_set_data_arg): Likewise. + (gimple_omp_parallel_data_arg_ptr): Likewise. + (gimple_omp_parallel_data_arg): Likewise. + (gimple_omp_parallel_set_child_fn): Likewise. + (gimple_omp_parallel_child_fn_ptr): Likewise. + (gimple_omp_parallel_child_fn): Likewise. + (gimple_omp_parallel_set_clauses): Likewise. + (gimple_omp_parallel_clauses_ptr): Likewise. + (gimple_omp_parallel_clauses): Likewise. + (gimple_omp_for_set_pre_body): Likewise. + (gimple_omp_for_pre_body_ptr): Likewise. + (gimple_omp_for_set_incr): Likewise. + (gimple_omp_for_incr_ptr): Likewise. + (gimple_omp_for_incr): Likewise. + (gimple_omp_for_set_final): Likewise. + (gimple_omp_for_final_ptr): Likewise. + (gimple_omp_for_final): Likewise. + (gimple_omp_for_set_initial): Likewise. + (gimple_omp_for_initial_ptr): Likewise. + (gimple_omp_for_initial): Likewise. + (gimple_omp_for_set_index): Likewise. + (gimple_omp_for_index_ptr): Likewise. + (gimple_omp_for_index): Likewise. + (gimple_omp_for_collapse): Likewise. + (gimple_omp_for_set_clauses): Likewise. + (gimple_omp_for_clauses_ptr): Likewise. + (gimple_omp_for_clauses): Likewise. + (gimple_omp_critical_set_name): Likewise. + (gimple_omp_critical_name_ptr): Likewise. + (gimple_omp_critical_name): Likewise. + (gimple_eh_dispatch_set_region): Likewise. + (gimple_eh_dispatch_region): Likewise. + (gimple_resx_set_region): Likewise. + (gimple_resx_region): Likewise. + (gimple_phi_set_arg): Likewise. + (gimple_phi_arg): Likewise. + (gimple_phi_set_result): Likewise. + (gimple_phi_result_ptr): Likewise. + (gimple_phi_result): Likewise. + (gimple_phi_num_args): Likewise. + (gimple_phi_capacity): Likewise. + (gimple_wce_set_cleanup): Likewise. + (gimple_wce_cleanup_ptr): Likewise. + (gimple_try_set_cleanup): Likewise. + (gimple_try_set_eval): Likewise. + (gimple_try_cleanup_ptr): Likewise. + (gimple_try_eval_ptr): Likewise. + (gimple_eh_else_set_e_body): Likewise. + (gimple_eh_else_set_n_body): Likewise. + (gimple_eh_else_e_body_ptr): Likewise. + (gimple_eh_else_n_body_ptr): Likewise. + (gimple_eh_must_not_throw_set_fndecl): Likewise. + (gimple_eh_must_not_throw_fndecl): Likewise. + (gimple_eh_filter_set_failure): Likewise. + (gimple_eh_filter_set_types): Likewise. + (gimple_eh_filter_failure_ptr): Likewise. + (gimple_eh_filter_types_ptr): Likewise. + (gimple_eh_filter_types): Likewise. + (gimple_catch_set_handler): Likewise. + (gimple_catch_set_types): Likewise. + (gimple_catch_handler_ptr): Likewise. + (gimple_catch_types_ptr): Likewise. + (gimple_catch_types): Likewise. + (gimple_asm_string): Likewise. + (gimple_asm_set_label_op): Likewise. + (gimple_asm_label_op): Likewise. + (gimple_asm_set_clobber_op): Likewise. + (gimple_asm_clobber_op): Likewise. + (gimple_asm_set_output_op): Likewise. + (gimple_asm_output_op_ptr): Likewise. + (gimple_asm_output_op): Likewise. + (gimple_asm_set_input_op): Likewise. + (gimple_asm_input_op_ptr): Likewise. + (gimple_asm_input_op): Likewise. + (gimple_asm_nlabels): Likewise. + (gimple_asm_nclobbers): Likewise. + (gimple_asm_noutputs): Likewise. + (gimple_asm_ninputs): Likewise. + (gimple_bind_set_block): Likewise. + (gimple_bind_block): Likewise. + (gimple_bind_add_seq): Likewise. + (gimple_bind_add_stmt): Likewise. + (gimple_bind_set_body): Likewise. + (gimple_bind_body_ptr): Likewise. + (gimple_bind_append_vars): Likewise. + (gimple_bind_set_vars): Likewise. + (gimple_bind_vars): Likewise. + (gimple_call_clobber_set): Likewise. + (gimple_call_use_set): Likewise. + (gimple_call_set_internal_fn): Likewise. + (gimple_call_set_fntype): Likewise. + (gimple_call_fntype): Likewise. + (gimple_omp_return_lhs_ptr): Likewise. + (gimple_omp_return_lhs): Likewise. + (gimple_omp_return_set_lhs): Likewise. + (gimple_omp_taskreg_set_data_arg): Likewise. + (gimple_omp_taskreg_data_arg_ptr): Likewise. + (gimple_omp_taskreg_data_arg): Likewise. + (gimple_omp_taskreg_set_child_fn): Likewise. + (gimple_omp_taskreg_child_fn_ptr): Likewise. + (gimple_omp_taskreg_child_fn): Likewise. + (gimple_omp_taskreg_set_clauses): Likewise. + (gimple_omp_taskreg_clauses_ptr): Likewise. + (gimple_omp_taskreg_clauses): Likewise. + (gimple_vuse): Likewise. + (gimple_vdef): Likewise. + (gimple_vuse_ptr): Likewise. + (gimple_vdef_ptr): Likewise. + * tree-inline.c (copy_debug_stmt): Likewise. + * tree-phinodes.c (make_phi_node): Likewise. + + * gimple.h (is_a_helper <const gimple_statement_with_ops>::test): New. + (is_a_helper <gimple_statement_with_ops>::test): New. + (is_a_helper <const gimple_statement_with_memory_ops>::test): New. + (is_a_helper <gimple_statement_with_memory_ops>::test): New. + + * gimple-streamer-in.c (input_gimple_stmt): Port from union + access to use of as_a. + * gimple.c (gimple_build_asm_1): Likewise. + (gimple_build_try): Likewise. Also, return a specific subclass + rather than just gimple. + (gimple_build_resx): Port from union access to use of as_a. + (gimple_build_eh_dispatch): Likewise. + (gimple_build_omp_for): Likewise. Also, convert allocation of iter + now that gengtype no longer provides a typed allocator function. + (gimple_copy): Likewise. + * gimple.h (gimple_build_try): Return a specific subclass rather + than just gimple. + * gimplify.c (gimplify_cleanup_point_expr): Replace union access + with subclass access by making use of new return type of + gimple_build_try. + * tree-phinodes.c: (allocate_phi_node): Return a + "gimple_statement_phi *" rather than just a gimple. + (resize_phi_node): Likewise. + (make_phi_node): Replace union access with subclass access by + making use of new return type of allocate_phi_node. + (reserve_phi_args_for_new_edge): Replace union access with as_a. + (remove_phi_arg_num): Accept a "gimple_statement_phi *" rather + than just a gimple. + (remove_phi_args): Update for change to remove_phi_arg_num. + + * gdbhooks.py (GimplePrinter.to_string): Update lookup of + code field to reflect inheritance, rather than embedding of + the base gimple type. + +2013-11-19 Richard Biener <rguenther@suse.de> + + * cfgloop.h (struct loop_iterator): C++-ify, add constructor + and destructor and make fel_next a member function. + (fel_next): Transform into ... + (loop_iterator::next): ... this. + (fel_init): Transform into ... + (loop_iterator::loop_iterator): ... this. + (loop_iterator::~loop_iterator): New. + (FOR_EACH_LOOP): Remove loop-iterator argument. + (FOR_EACH_LOOP_BREAK): Remove no longer necessary macro. + * cfgloop.c, cfgloopmanip.c, config/mn10300/mn10300.c, + graphite-clast-to-gimple.c, graphite-scop-detection.c, + graphite-sese-to-poly.c, ipa-inline-analysis.c, ipa-pure-const.c, + loop-init.c, loop-invariant.c, loop-unroll.c, loop-unswitch.c, + modulo-sched.c, predict.c, sel-sched-ir.c, tree-cfg.c, tree-data-ref.c, + tree-if-conv.c, tree-loop-distribution.c, tree-parloops.c, + tree-predcom.c, tree-scalar-evolution.c, tree-ssa-dce.c, + tree-ssa-loop-ch.c, tree-ssa-loop-im.c, tree-ssa-loop-ivcanon.c, + tree-ssa-loop-ivopts.c, tree-ssa-loop-manip.c, tree-ssa-loop-niter.c, + tree-ssa-loop-prefetch.c, tree-ssa-loop-unswitch.c, + tree-ssa-threadupdate.c, tree-vectorizer.c, tree-vrp.c: Adjust + uses of FOR_EACH_LOOP and remove loop_iterator variables. Replace + FOR_EACH_LOOP_BREAK with break. + +2013-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59164 + * tree-vect-loop-manip.c (vect_update_ivs_after_vectorizer): + Uncomment assert. + * tree-vect-loop.c (vect_analyze_loop_operations): Adjust check + whether we can create an epilogue loop to reflect thecases where + we create one. + +2013-11-19 Andrew MacLeod <amacleod@redhat.com> + + * graphite-sese-to-poly.c: Include expr.h. + +2013-11-19 Richard Biener <rguenther@suse.de> + + PR middle-end/58956 + * tree-ssa-ter.c (find_replaceable_in_bb): Avoid forwarding + loads into stmts that may clobber it. + +2013-11-19 Bernd Schmidt <bernds@codesourcery.com> + + * cgraphunit.c (symtab_terminator): New variable. + (queued_nodes): Renamed from first. Use symtab_terminator as + initializer. + (analyze_functions): Adjust accordingly. + (cgraph_process_new_functions): Return void. + * cgraph.h (cgraph_process_new_functions): Adjust declaration. + +2013-11-19 Marek Polacek <polacek@redhat.com> + + * opts.c (common_handle_option): Add -fsanitize=null option. + Turn off -fdelete-null-pointer-checks option when doing the + NULL pointer checking. + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_TYPE_MISMATCH): Add. + * tree-pass.h (make_pass_ubsan): Declare. + (make_pass_sanopt): Declare. + * timevar.def (TV_TREE_UBSAN): New timevar. + * passes.def: Add pass_sanopt and pass_ubsan. + * ubsan.h (ubsan_null_ckind): New enum. + (ubsan_mismatch_data): New struct. + (ubsan_expand_null_ifn): Declare. + (ubsan_create_data): Adjust declaration. + (ubsan_type_descriptor): Likewise. + * asan.c: Include "ubsan.h". + (pass_data_sanopt): New pass. + (execute_sanopt): New function. + (gate_sanopt): Likewise. + (make_pass_sanopt): Likewise. + (class pass_sanopt): New class. + * ubsan.c: Include tree-pass.h, gimple-ssa.h, gimple-walk.h, + gimple-iterator.h and cfgloop.h. + (PROB_VERY_UNLIKELY): Define. + (tree_type_map_hash): New function. + (ubsan_type_descriptor): Add new parameter. + Improve type name generation. + (ubsan_create_data): Add new parameter. Add pointer data into + ubsan structure. + (ubsan_expand_null_ifn): New function. + (instrument_member_call): Likewise. + (instrument_mem_ref): Likewise. + (instrument_null): Likewise. + (ubsan_pass): Likewise. + (gate_ubsan): Likewise. + (make_pass_ubsan): Likewise. + (ubsan_instrument_unreachable): Adjust ubsan_create_data call. + (class pass_ubsan): New class. + (pass_data_ubsan): New pass. + * flag-types.h (enum sanitize_code): Add SANITIZE_NULL. + * internal-fn.c (expand_UBSAN_NULL): New function. + * cgraphunit.c (varpool_finalize_decl): Call varpool_assemble_decl + even when !flag_toplevel_reorder. + * internal-fn.def (UBSAN_NULL): New. + +2013-11-19 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_create_indirect_edge): Use + get_polymorphic_call_info. + * cgraph.h (cgraph_indirect_call_info): Add outer_type, + maybe_in_construction and maybe_derived_type. + * ipa-utils.h (ipa_polymorphic_call_context): New structure. + (ipa_dummy_polymorphic_call_context): New global var. + (possible_polymorphic_call_targets): Add context paramter. + (dump_possible_polymorphic_call_targets): Likewise; update wrappers. + (possible_polymorphic_call_target_p): Likewise. + (get_polymorphic_call_info): New function. + * ipa-devirt.c (ipa_dummy_polymorphic_call_context): New function. + (add_type_duplicate): Remove forgotten debug output. + (method_class_type): Add sanity check. + (maybe_record_node): Add FINALP parameter. + (record_binfo): Add OUTER_TYPE and OFFSET; walk the inner + by info by get_binfo_at_offset. + (possible_polymorphic_call_targets_1): Add OUTER_TYPE/OFFSET + parameters; pass them to record-binfo. + (polymorphic_call_target_d): Add context and FINAL. + (polymorphic_call_target_hasher::hash): Hash context. + (polymorphic_call_target_hasher::equal): Compare context. + (free_polymorphic_call_targets_hash): + (get_class_context): New function. + (contains_type_p): New function. + (get_polymorphic_call_info): New function. + (walk_bases): New function. + (possible_polymorphic_call_targets): Add context parameter; honnor it. + (dump_possible_polymorphic_call_targets): Dump context. + (possible_polymorphic_call_target_p): Add context. + (update_type_inheritance_graph): Update comment.s + (ipa_set_jf_known_type): Assert that compoentn type is known. + (ipa_note_param_call): Do not tamper with offsets. + (ipa_analyze_indirect_call_uses): When offset is being changed; clear + outer type. + (update_indirect_edges_after_inlining): Likewise. + (ipa_write_indirect_edge_info): Stream new fields. + (ipa_read_indirect_edge_info): Stream in new fields. + +2013-11-19 Jan Hubicka <jh@suse.cz> + + * tree-pretty-print.c (dump_generic_node): Print class type of + OBJ_TYPE_REF. + +2013-11-19 Joey Ye <joey.ye@arm.com> + + * config/arm/arm.opt (-marm-pic-data-is-text-relative): New option. + * doc/invoke.texi (-marm-pic-data-is-text-relative): Documentation + for new option. + * config/arm/arm.c (arm_option_override): By default disable + -marm-pic-data-is-text-relative. + (legitimize_pic_address): Use arm_pic_data_is_text_relative. + (arm_assemble_integer): Likewise. + * config/arm/arm.h (TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE): + New macro to initialize -marm-pic-data-is-text-relative. + +2013-11-19 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (enum ainc_type): New. + (address_cost_data): New field. + (get_address_cost): Compute auto-increment rtx cost in ainc_costs. + Use ainc_costs for auto-increment rtx patterns. Cleanup TWS. + +2013-11-19 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md: Remove v8type from all insns. + +2013-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57517 + * tree-predcom.c (combinable_refs_p): Verify the combination + is always executed when the refs are. + +2013-11-19 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c: Include ssa-iterators.h + (copy_phi_arg_into_existing_phi): New function. + (any_remaining_duplicated_blocks): Likewise. + (ssa_fix_duplicate_block_edges): Handle multiple duplicated + blocks on a jump threading path. + + * tree-ssa-threadupdate.c (thread_through_loop_header): Do not + thread through a joiner which has the latch edge. + +2013-11-19 Jan Hubicka <jh@suse.cz> + + * md.texi (setmem): Document new parameter. + * optabs.c (maybe_gen_insn): Support 9 operands. + * builtins.c (determine_block_size): Add probable_max_size; + support anti-ranges. + (expand_builtin_memcpy. expand_builtin_memset_args): Pass around + probable_max_size. + * expr.c (emit_block_move_via_movmem, emit_block_move_hints, + emit_block_move, clear_storage_hints, set_storage_via_setmem): + Likewise. + * expr.h (emit_block_move_hints, clear_storage_hints, + set_storage_via_setmem): Update prototype. + * i386.md (setmem, movmem patterns): Add 9th operand. + * i386-protos.h (ix86_expand_set_or_movmem): Update prototype. + * i386.c (ix86_expand_set_or_movmem): Take probable_max_size_exp + argument; pass it to decide_alg. + +2013-11-19 David Malcolm <dmalcolm@redhat.com> + + * basic-block.h (n_basic_blocks_for_function): Rename macro to... + (n_basic_blocks_for_fn): ...this. + + (n_basic_blocks): Eliminate macro as work towards making uses of + cfun be explicit. + + * cfgloop.c (init_loops_structure): Update for renaming of + "n_basic_blocks_for_function" to "n_basic_blocks_for_fn". + * graph.c (draw_cfg_nodes_no_loops): Likewise. + * ipa-utils.c (ipa_merge_profiles): Likewise. + * lto-streamer-in.c (make_new_block): Likewise. + * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise. + (dump_function_to_file): Likewise. + + * alias.c (init_alias_analysis): Replace usage of "n_basic_blocks" + macro with "n_basic_blocks_for_fn (cfun)". + * bb-reorder.c (partition_hot_cold_basic_blocks): Likewise. + (duplicate_computed_gotos): Likewise. + (reorder_basic_blocks): Likewise. + * bt-load.c (augment_live_range): Likewise. + * cfg.c (expunge_block): Likewise. + (compact_blocks): Likewise. + * cfganal.c (single_pred_before_succ_order): Likewise. + (compute_idf): Likewise. + (flow_dfs_compute_reverse_init): Likewise. + (pre_and_rev_post_order_compute): Likewise. + (pre_and_rev_post_order_compute_fn): Likewise. + (inverted_post_order_compute): Likewise. + (post_order_compute): Likewise. + (print_edge_list): Likewise. + (find_unreachable_blocks): Likewise. + (mark_dfs_back_edges): Likewise. + * cfgcleanup.c (try_optimize_cfg): Likewise. + (try_forward_edges): Likewise. + * cfghooks.c (dump_flow_info): Likewise. + * cfgloop.c (verify_loop_structure): Likewise. + (get_loop_body): Likewise. + (flow_loops_find): Likewise. + * cfgloopmanip.c (add_loop): Likewise. + (remove_path): Likewise. + (find_path): Likewise. + * cfgrtl.c (rtl_flow_call_edges_add): Likewise. + (rtl_verify_bb_layout): Likewise. + (entry_of_function): Likewise. + (rtl_create_basic_block): Likewise. + * coverage.c (coverage_compute_cfg_checksum): Likewise. + * cprop.c (one_cprop_pass): Likewise. + (is_too_expensive): Likewise. + * df-core.c (df_compute_cfg_image): Likewise. + (df_compact_blocks): Likewise. + (df_worklist_dataflow_doublequeue): Likewise. + * dominance.c (calculate_dominance_info): Likewise. + (calc_dfs_tree): Likewise. + (calc_dfs_tree_nonrec): Likewise. + (init_dom_info): Likewise. + * domwalk.c (cmp_bb_postorder): Likewise. + * function.c (thread_prologue_and_epilogue_insns): Likewise. + (generate_setjmp_warnings): Likewise. + * fwprop.c (build_single_def_use_links): Likewise. + * gcse.c (is_too_expensive): Likewise. + (one_code_hoisting_pass): Likewise. + (one_pre_gcse_pass): Likewise. + * graphite.c (graphite_initialize): Likewise. + * haifa-sched.c (haifa_sched_init): Likewise. + * ipa-inline-analysis.c (estimate_function_body_sizes): Likewise. + * ira.c (split_live_ranges_for_shrink_wrap): Likewise. + * ira-build.c (ira_build): Likewise. + * lcm.c (compute_nearerout): Likewise. + (compute_available): Likewise. + (compute_laterin): Likewise. + (compute_antinout_edge): Likewise. + * lra-lives.c (lra_create_live_ranges): Likewise. + * lra.c (has_nonexceptional_receiver): Likewise. + * mcf.c (create_fixup_graph): Likewise. + * profile.c (branch_prob): Likewise. + * reg-stack.c (convert_regs_2): Likewise. + * regrename.c (regrename_analyze): Likewise. + * reload1.c (has_nonexceptional_receiver): Likewise. + * reorg.c (dbr_schedule): Likewise. + * sched-deps.c (sched_deps_init): Likewise. + * sched-ebb.c (schedule_ebbs): Likewise. + * sched-rgn.c (extend_regions): Likewise. + (schedule_insns): Likewise. + (sched_rgn_init): Likewise. + (extend_rgns): Likewise. + (haifa_find_rgns): Likewise. + * sel-sched-ir.c (recompute_rev_top_order): Likewise. + (sel_recompute_toporder): Likewise. + * sel-sched.c (run_selective_scheduling): Likewise. + * store-motion.c (one_store_motion_pass): Likewise. + (remove_reachable_equiv_notes): Likewise. + * tracer.c (tracer): Likewise. + (tail_duplicate): Likewise. + * tree-cfg.c (gimple_flow_call_edges_add): Likewise. + (dump_cfg_stats): Likewise. + (gimple_dump_cfg): Likewise. + (create_bb): Likewise. + (build_gimple_cfg): Likewise. + * tree-cfgcleanup.c (merge_phi_nodes): Likewise. + * tree-inline.c (optimize_inline_calls): Likewise. + (fold_marked_statements): Likewise. + * tree-ssa-ifcombine.c (tree_ssa_ifcombine): Likewise. + * tree-ssa-loop-ch.c (copy_loop_headers): Likewise. + * tree-ssa-loop-im.c (analyze_memory_references): Likewise. + * tree-ssa-loop-manip.c (compute_live_loop_exits): Likewise. + * tree-ssa-math-opts.c (execute_cse_reciprocals): Likewise. + * tree-ssa-phiopt.c (tree_ssa_phiopt_worker): Likewise. + * tree-ssa-pre.c (do_pre): Likewise. + (init_pre): Likewise. + (compute_avail): Likewise. + * tree-ssa-reassoc.c (init_reassoc): Likewise. + * tree-ssa-sccvn.c (init_scc_vn): Likewise. + * tree-ssa-tail-merge.c (alloc_cluster_vectors): Likewise. + (init_worklist): Likewise. + * tree-ssa-uncprop.c (associate_equivalences_with_edges): Likewise. + * var-tracking.c (variable_tracking_main_1): Likewise. + (vt_find_locations): Likewise. + (vt_stack_adjustments): Likewise. + * config/s390/s390.c (s390_optimize_nonescaping_tx): Likewise. + * config/spu/spu.c (spu_machine_dependent_reorg): Likewise. + +2013-11-18 Jan Hubicka <jh@suse.cz> + + * profile.c (compute_branch_probabilities): Do not sanity check + run_max. + +2013-11-18 Kenneth Zadeck <zadeck@naturalbridge.com> + + * tree.c (int_fits_type_p): Change GET_MODE_BITSIZE to + GET_MODE_PRECISION. + * fold-const.c (fold_single_bit_test_into_sign_test) + (fold_binary_loc): Change GET_MODE_BITSIZE to GET_MODE_PRECISION. + +2013-11-18 Teresa Johnson <tejohnson@google.com> + + * cfgrtl.c (cfg_layout_initialize): Assert if we try to go into + cfglayout after bb reordering. + * passes.def: Move compgotos before bb reordering since it goes into + cfglayout. + +2013-11-18 Bernd Schmidt <bernds@codesourcery.com> + + * cgraphunit.c (ipa_passes): Don't execute all_lto_gen_passes. + * lto-streamer-out.c (lto_output, produce_asm_for_decls): No longer + static. + (pass_data_ipa_lto_gimple_out, pass_ipa_lto_gimple_out, + make_pass_ipa_lto_gimple_out, pass_data_ipa_lto_finish_out, + pass_ipa_lto_finish_out, make_pass_ipa_lto_finish_out): Remove. + * lto-streamer.h (lto_output, produce_asm_for_decls): Declare. + * pass-manager.h (GCC_PASS_LISTS, class pass_manager): + Remove all_lto_gen_passes. + * passes.c (pass_manager::dump_passes): Remove its use. + (pass_manager::register_pass): Likewise. + (ipa_read_summaries, ipa_read_optimization_summaries): Likewise. + (pass_manager::pass_manager): Don't initialize or use it. + (write_lto): New static function. + (ipa_write_summaries_1, ipa_write_optimization_summaries): Use it + instead of using all_lto_gen_passes. + * passes.def (all_lto_gen_passes, pass_ipa_lto_gimple_out, + pass_ipa_lto_finish_out): Delete. + * tree-pass.h (make_pass_ipa_lto_gimple_out, + make_pass_ipa_lto_finish_out): Don't declare. + +2013-11-18 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c (redirection_data): Record two + duplicated blocks instead of just one. + (local_info): Explain why we don't create a template for the + second duplicated block in a thread path. + (create_block_for_threading): Accept argument indicating array + index into redirection_data to store its result. + (lookup_redirection_data): Initialize both duplicate blocks. + (ssa_create_duplicates): If a jump threading path needs multiple + blocks duplicated, then duplicate them. + (ssa_fix_duplicate_block_edges): Corresponding changes. + (ssa_fixup_template_block, thread_single_edge): Likewise. + +2013-11-18 Marek Polacek <polacek@redhat.com> + + * doc/invoke.texi: Extend -fsanitize=undefined documentation. + +2013-11-18 Andrew Pinski <apinski@cavium.com> + Steve Ellcey <sellcey@mips.com> + + PR target/56552 + * config/mips/mips.md (*mov<GPR:mode>_on_<MOVECC:mode>): Remove + type restriction from equality_operator on conditonal move. + (*mov<SCALARF:mode>_on_<MOVECC:mode>): Ditto. + (*mov<GPR:mode>_on_<GPR2:mode>_ne): New. + +2013-11-18 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c: Fix file block comment. + Fix minor indention issue. + +2013-11-18 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of + ix86_address_subreg_operand. Move subreg checks to + ix86_validate_address_register. Move address override check to + ix86_legitimate_address_p. + (ix86_validate_address_register): New function. + (ix86_legitimate_address_p): Call ix86_validate_address_register + to validate base and index registers. Add address override check + from ix86_decompose_address. + (ix86_decompose_address): Remove. + +2013-11-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59125 + PR tree-optimization/54570 + * tree-ssa-sccvn.c (copy_reference_ops_from_ref): When inlining + is not complete do not treat component-references with offset zero + but different fields as equal. + * tree-object-size.c: Include tree-phinodes.h and ssa-iterators.h. + (compute_object_sizes): Apply TLC. Propagate the constant + results into all uses and fold their stmts. + * passes.def (pass_all_optimizations): Move pass_object_sizes + after the first pass_forwprop and before pass_fre. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * tree.h (tree_to_uhwi): Return an unsigned HOST_WIDE_INT. + * tree.c (tree_to_uhwi): Return an unsigned HOST_WIDE_INT. + (tree_ctz): Remove cast to unsigned type. + * builtins.c (fold_builtin_memory_op): Likewise. + * dwarf2out.c (descr_info_loc): Likewise. + * godump.c (go_output_typedef): Likewise. + * omp-low.c (expand_omp_simd): Likewise. + * stor-layout.c (excess_unit_span): Likewise. + * tree-object-size.c (addr_object_size): Likewise. + * tree-sra.c (analyze_all_variable_accesses): Likewise. + * tree-ssa-forwprop.c (simplify_builtin_call): Likewise. + (simplify_rotate): Likewise. + * tree-ssa-strlen.c (adjust_last_stmt, handle_builtin_memcpy) + (handle_pointer_plus): Likewise. + * tree-switch-conversion.c (check_range): Likewise. + * tree-vect-patterns.c (vect_recog_rotate_pattern): Likewise. + * tsan.c (instrument_builtin_call): Likewise. + * cfgexpand.c (defer_stack_allocation): Add cast to HOST_WIDE_INT. + * trans-mem.c (tm_log_add): Likewise. + * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Likewise. + * config/arm/arm.c (aapcs_vfp_sub_candidate): Likewise. + * config/rs6000/rs6000.c (rs6000_aggregate_candidate): Likewise. + * config/mips/mips.c (r10k_safe_mem_expr_p): Make offset unsigned. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * tree.h (host_integerp, tree_low_cst): Delete. + * tree.c (host_integerp, tree_low_cst): Delete. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * expr.h: Update comments to refer to tree_to_[su]hwi rather + than tree_low_cst. + * fold-const.c (fold_binary_loc): Likewise. + * expr.c (store_constructor): Use tree_to_uhwi rather than + tree_low_cst. + * ipa-utils.h (possible_polymorphic_call_target_p): Likewise. + * stmt.c (emit_case_dispatch_table): Likewise. + * tree-switch-conversion.c (emit_case_bit_tests): Likewise. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * alias.c, asan.c, builtins.c, cfgexpand.c, cgraph.c, + config/aarch64/aarch64.c, config/alpha/predicates.md, + config/arm/arm.c, config/darwin.c, config/epiphany/epiphany.c, + config/i386/i386.c, config/iq2000/iq2000.c, config/m32c/m32c-pragma.c, + config/mep/mep-pragma.c, config/mips/mips.c, + config/picochip/picochip.c, config/rs6000/rs6000.c, cppbuiltin.c, + dbxout.c, dwarf2out.c, emit-rtl.c, except.c, expr.c, fold-const.c, + function.c, gimple-fold.c, godump.c, ipa-cp.c, ipa-prop.c, omp-low.c, + predict.c, sdbout.c, stor-layout.c, trans-mem.c, tree-object-size.c, + tree-sra.c, tree-ssa-ccp.c, tree-ssa-forwprop.c, + tree-ssa-loop-ivcanon.c, tree-ssa-loop-ivopts.c, tree-ssa-loop-niter.c, + tree-ssa-loop-prefetch.c, tree-ssa-strlen.c, tree-stdarg.c, + tree-switch-conversion.c, tree-vect-generic.c, tree-vect-loop.c, + tree-vect-patterns.c, tree-vrp.c, tree.c, tsan.c, ubsan.c, varasm.c: + Replace tree_low_cst (..., 1) with tree_to_uhwi throughout. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * builtins.c, cilk-common.c, config/aarch64/aarch64.c, + config/alpha/alpha.c, config/arm/arm.c, config/c6x/predicates.md, + config/i386/i386.c, config/ia64/predicates.md, config/s390/s390.c, + coverage.c, dbxout.c, dwarf2out.c, except.c, explow.c, expr.c, expr.h, + fold-const.c, gimple-fold.c, godump.c, ipa-prop.c, omp-low.c, + predict.c, rtlanal.c, sdbout.c, stmt.c, stor-layout.c, targhooks.c, + tree-cfg.c, tree-data-ref.c, tree-inline.c, tree-ssa-forwprop.c, + tree-ssa-loop-prefetch.c, tree-ssa-phiopt.c, tree-ssa-sccvn.c, + tree-ssa-strlen.c, tree-stdarg.c, tree-vect-data-refs.c, + tree-vect-patterns.c, tree.c, tree.h, var-tracking.c, varasm.c: + Replace tree_low_cst (..., 0) with tree_to_shwi throughout. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * tree.h (tree_to_shwi, tree_to_uhwi): Declare, with inline expansions. + * tree.c (tree_to_shwi, tree_to_uhwi): New functions. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * expr.h: Update comments to refer to tree_fits_[su]hwi_p rather + than host_integerp. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * builtins.c, config/alpha/alpha.c, config/iq2000/iq2000.c, + config/mips/mips.c, dbxout.c, dwarf2out.c, expr.c, fold-const.c, + gimple-fold.c, godump.c, omp-low.c, predict.c, sdbout.c, stor-layout.c, + tree-dfa.c, tree-sra.c, tree-ssa-forwprop.c, tree-ssa-loop-prefetch.c, + tree-ssa-phiopt.c, tree-ssa-sccvn.c, tree-ssa-strlen.c, + tree-ssa-structalias.c, tree-vect-data-refs.c, tree-vect-patterns.c, + tree.c, varasm.c, alias.c, cfgexpand.c, config/aarch64/aarch64.c, + config/arm/arm.c, config/epiphany/epiphany.c, config/i386/i386.c, + config/m32c/m32c-pragma.c, config/mep/mep-pragma.c, + config/rs6000/rs6000.c, config/sparc/sparc.c, emit-rtl.c, function.c, + gimplify.c, ipa-prop.c, stmt.c, trans-mem.c, tree-cfg.c, + tree-object-size.c, tree-ssa-ccp.c, tree-ssa-loop-ivcanon.c, + tree-stdarg.c, tree-switch-conversion.c, tree-vect-generic.c, + tree-vrp.c, tsan.c, ubsan.c: Replace host_integerp (..., 1) with + tree_fits_uhwi_p throughout. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * builtins.c, config/alpha/alpha.c, config/c6x/predicates.md, + config/ia64/predicates.md, config/iq2000/iq2000.c, config/mips/mips.c, + config/s390/s390.c, dbxout.c, dwarf2out.c, except.c, explow.c, expr.c, + expr.h, fold-const.c, gimple-fold.c, gimple-ssa-strength-reduction.c, + gimple.c, godump.c, graphite-scop-detection.c, graphite-sese-to-poly.c, + omp-low.c, predict.c, rtlanal.c, sdbout.c, simplify-rtx.c, + stor-layout.c, tree-data-ref.c, tree-dfa.c, tree-pretty-print.c, + tree-sra.c, tree-ssa-alias.c, tree-ssa-forwprop.c, + tree-ssa-loop-ivopts.c, tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, + tree-ssa-phiopt.c, tree-ssa-reassoc.c, tree-ssa-sccvn.c, + tree-ssa-strlen.c, tree-ssa-structalias.c, tree-vect-data-refs.c, + tree-vect-patterns.c, tree-vectorizer.h, tree.c, var-tracking.c, + varasm.c: Replace host_integerp (..., 0) with tree_fits_shwi_p + throughout. + +2013-11-18 Richard Sandiford <rdsandiford@googlemail.com> + + * tree.h (tree_fits_shwi_p, tree_fits_uhwi_p): Declare. + * tree.c (tree_fits_shwi_p, tree_fits_uhwi_p): Define. + +2013-11-18 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/ia64/ia64.c (ia64_split_tmode_move): Mark load with `dead' + flag if it kills its address, not its post-increment. + +2013-11-18 Ilya Enkovich <ilya.enkovich@intel.com> + + * builtin-types.def (BT_FN_PTR_CONST_PTR_VAR): New. + * chkp-builtins.def (BUILT_IN_CHKP_BIND_BOUNDS): New. + * cfgexpand.c (expand_call_stmt): Expand BUILT_IN_CHKP_BIND_BOUNDS. + * gimple.c (gimple_call_get_nobnd_arg_index): Remove. + * gimple.h (gf_mask): Add GF_CALL_WITH_BOUNDS. + (gimple_call_with_bounds_p): New. + (gimple_call_set_with_bounds): New. + (gimple_call_num_nobnd_args): Remove. + (gimple_call_nobnd_arg): Remove. + * tree.h (CALL_WITH_BOUNDS_P): New. + * rtl.h (CALL_EXPR_WITH_BOUNDS_P): New. + +2013-11-18 Trevor Saunders <tsaunders@mozilla.com> + + * cgraph.h (symtab_node_asm_name): Rename to symtab_node::asm_name. + (symtab_node_name): Rename to symtab_node::name. + (cgraph_node_asm_name): Remove. + (varpool_node_asm_name): Remove. + * cgraph.c cgraphclones.c cgraphunit.c ipa-cp.c ipa-devirt.c + ipa-inline-analysis.c ipa-inline-transform.c ipa-inline.c + ipa-profile.c ipa-prop.c ipa-pure-const.c ipa-ref.c ipa-reference.c + ipa-utils.c ipa.c symtab.c tree-inline.c tree-sra.c + tree-ssa-structalias.c value-prof.c varpool.c Adjust. + +2013-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/aarch-cost-tables.h (cortexa53_extra_costs): New table. + * config/arm/arm.c (arm_cortex_a53_tune): New. + * config/arm/arm-cores.def (cortex-a53): Use cortex_a53 tuning struct. + +2013-11-12 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config.gcc (i[34567]86-*-linux* | ...): Add bdver4. + (case ${target}): Add bdver4. + * config/i386/bdver3.md: Add bdver4. + * config/i386/driver-i386.c: (host_detect_local_cpu): Let + -march=native recognize bdver4 processors. + * config/i386/i386-c.c (ix86_target_macros_internal): Add + bdver4 def_and_undef + * config/i386/i386.c (struct processor_costs bdver4_cost): New. + (m_BDVER4): New definition. + (m_AMD_MULTIPLE): Includes m_BDVER4. + (processor_target_table): Add bdver4 entry. + (static const char *const cpu_names): Add bdver4 entry. + (software_prefetching_beneficial_p): Add bdver3. + (ix86_option_override_internal): Add bdver4 instruction sets. + (ix86_issue_rate): Add bdver4. + (ix86_adjust_cost): Add bdver4. + (ia32_multipass_dfa_lookahead): Add bdver4. + (enum processor_model): Add M_AMDFAM15H_BDVER4. + (struct _arch_names_table): Add M_AMDFAM15H_BDVER4. + (has_dispatch): Add bdver4. + * config/i386/i386.h (TARGET_BDVER4): New definition. + (enum target_cpu_default): Add TARGET_CPU_DEFAULT_bdver4. + (enum processor_type): Add PROCESSOR_BDVER4. + * config/i386/i386.md (define_attr "cpu"): Add bdver4. + * config/i386/i386.opt (flag_dispatch_scheduler): Add bdver4. + * doc/extend.texi: Add details about bdver4. + * doc/invoke.texi: Add details about bdver4. Add + fma4 and fsgsbase for bdver3. Add fma4 for bdver2. + +2013-11-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_emit_move): Use low word of + sdmode_stack_slot also in little-endian mode. + +2013-11-17 Jan Hubicka <jh@suse.cz> + + * doc/md.texi (setmem, movstr): Update documentation. + * builtins.c (determine_block_size): New function. + (expand_builtin_memcpy): Use it and pass it to emit_block_move_hints. + (expand_builtin_memset_args): Use it and pass it to + set_storage_via_setmem. + * expr.c (emit_block_move_via_movmem): Add min_size/max_size + parameters; update call to expander. + (emit_block_move_hints): Add min_size/max_size parameters. + (clear_storage_hints): Likewise. + (set_storage_via_setmem): Likewise. + (clear_storage): Update. + * expr.h (emit_block_move_hints, clear_storage_hints, + set_storage_via_setmem): Update prototypes. + * i386.c (ix86_expand_set_or_movmem): Add bounds; export. + (ix86_expand_movmem, ix86_expand_setmem): Remove. + (ix86_expand_movmem, ix86_expand_setmem): Remove. + * i386.md (movmem, setmem): Pass parameters. + +2013-11-17 Uros Bizjak <ubizjak@gmail.com> + + PR target/59153 + * config/i386/i386.c (ix86_address_subreg_operand): Do not + reject non-integer subregs. + (ix86_decompose_address): Do not reject invalid CONST_INT RTXes. + Move check for invalid x32 constant addresses ... + (ix86_legitimate_address_p): ... here. + +2011-11-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_frame_related): Add split_reg + parameter and use it in REG_FRAME_RELATED_EXPR note. + (emit_frame_save): Call rs6000_frame_related with extra NULL_RTX + parameter. + (rs6000_emit_prologue): Likewise, but for little endian VSX + stores, pass the source register of the store instead. + +2013-11-17 Andrew MacLeod <amacleod@redhat.com> + + * gimple.h: Reorder prototypes to match .c declaration order, and + remove protyotypes for functions not in gimple.c. + (LABEL): Move to tree-into-ssa.c. + * gimple.c: Remove unused prototypes. + (get_base_address): Move to tree.c. + * tree.c (get_base_address): Relocate from gimple.c. + * builtins.h (validate_gimple_arglist): Add prototype. + * trans-mem.h (compute_transaction_bits, is_tm_ending): Add prototype. + * cfgexpand.h: New File. + (gimple_assign_rhs_to_tree, estimated_stack_frame_size): Add protoype. + * tree.h (build_addr): Move to tree-nested.h. + * tree-nested.h: New File. + (build_addr, lower_nested_functions, insert_field_into_struct): Add + prototypes. + * tree-inline.h (estimated_stack_frame_size): Remove prototype. + * ipa-inline-analysis.c: Include cfgexpand.h. + * cgraphunit.c: Include tree-nested.h. + * omp-low.c: Likewise. + * tree-parloops.c: Likewise. + * gimple-low.h: Likewise. + * tree-profile.h: Likewise. + * expr.c: Include cfgexpand.h. + * tree-affine.c: Likewise. + * tree-ssa.c: Likewise. + * tree-ssa-loop-im.c: Include trans-mem.h. + * tree-ssa-tail-merge.c: Likewise. + * value-prof.c: Include builtins.h and tree-nested.h. + * tree-into-ssa.c (LABEL): Define here. + +2013-11-16 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_predicate_delay_insns): New function. + (pass_data_arc_predicate_delay_insns): New pass_data instance. + (pass_arc_predicate_delay_insns): New subclass of rtl_opt_class. + (make_pass_arc_predicate_delay_insns): New function. + (arc_init): Register pass_arc_predicate_delay_insns if + flag_delayed_branch is active. + +2013-11-16 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/constraints.md (Rcq): Simplify register number test. + +2013-11-15 Aldy Hernandez <aldyh@redhat.com> + + * gimple.h (enum gf_mask): Change the ordering of GF_OMP_* bits. + +2013-11-15 Kaz Kojima <kkojima@gcc.gnu.org> + + * config/sh/sh.c (barrier_align): Return 0 when barrier_or_label + is null. + +2013-11-15 Aldy Hernandez <aldyh@redhat.com> + + * Makefile.in (C_COMMON_OBJS): Depend on c-cilkplus.o. + * gimple-pretty-print.c (dump_omp_for): Add case for + GF_OMP_FOR_KIND_CILKSIMD. + * gimple.h (enum gf_mask): Restructure entries to add + GF_OMP_FOR_KIND_CILKSIMD. + * gimplify.c (is_gimple_stmt): Add case for CILK_SIMD. + (gimplify_omp_for): Handle CILK_SIMD. + (gimplify_expr): Add ccase for CILK_SIMD. + * omp-low.c (extract_omp_for_data): Handle CILK_SIMD. + (build_outer_var_ref): Same. + (check_omp_nesting_restrictions): Same. + (lower_rec_input_clauses): Same. + (lower_lastprivate_clauses): Same. + (expand_omp_for): Same. + (execute_expand_omp): Check flag_enable_cilkplus. + (execute_lower_omp): Same. + (diagnose_sb_0): Handle CILK_SIMD. + (diagnose_omp_structured_block_errors): Check flag_enable_cilkplus. + (setjmp_or_longjmp_p): New. + (scan_omp_1_stmt): Error on setjmp/longjmp in a simd construct. + * tree-pretty-print.c (dump_generic_node): Add case for CILK_SIMD. + * tree.def: Add tree code for CILK_SIMD. + +2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (UNSPEC_VPERM_X, UNSPEC_VPERM_UNS_X): + Remove. + (altivec_vperm_<mode>): Revert earlier little endian change. + (*altivec_vperm_<mode>_internal): Remove. + (altivec_vperm_<mode>_uns): Revert earlier little endian change. + (*altivec_vperm_<mode>_uns_internal): Remove. + * config/rs6000/vector.md (vec_realign_load_<mode>): Revise commentary. + +2013-11-15 Jeff Law <law@redhat.com> + + * basic-block.h (has_abnormal_or_eh_outgoing_edge): Renamed from + has_abnormal_or_outgoing_edge. Check for EH edges as well. + * gimple-ssa-isolate-paths.c + (find_implicit_erroneous_behaviour): Corresponding changes. + Do not check stmt_ends_bb_p or GIMPLE_RETURN anymore. + (find_explicit_erroneous_behaviour): Likewise. + +2013-11-15 Jeff Law <law@redhat.com> + + * ifcvt.c (find_cond_trap): Properly handle case where + trap_bb == else_bb. + +2013-11-15 Andreas Schwab <schwab@linux-m68k.org> + + * configure: Regenerate. + +2013-11-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md: Remove simd_type from all patterns. + * config/aarch64/aarch64.md: Likewise, correct "type" attribute + where it is incorrect or missing. + +2013-11-15 Richard Sandiford <rdsandiford@googlemail.com> + + * dwarf2out.c (gen_enumeration_type_die): Remove unnecessary + host_integerp test. + * tree-vect-patterns.c (vect_recog_divmod_pattern): Likewise. + Use TREE_INT_CST_LOW rather than tree_low_cst when reading the + constant. + * fold-const.c (fold_binary_loc): Replace a host_integerp/tree_low_cst + pair with a TREE_CODE test and TREE_INT_CST_LOW. + * tree-vect-generic.c (expand_vector_divmod): Likewise. + +2013-11-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/50262 + * tree-ssa-alias.h (struct pt_solution): Split + vars_contains_global into vars_contains_nonlocal, + vars_contains_escaped and vars_contains_escaped_heap. + * tree-ssa-structalias.c (label_visit): Expand comment. + (handle_lhs_call): Adjust comment. + (set_uids_in_ptset): Set the new flags appropriately. + (pt_solution_set): Adjust. + (pt_solution_set_var): Likewise. + (pt_solution_ior_into): Likewise. + (pt_solution_includes_global): Likewise. + (pt_solutions_intersect_1): Optimize escaped handling. + (compute_points_to_sets): Remove heap variable globalization. + (ipa_escaped_pt): Adjust initializer. + (pass_data_ipa_pta): Do not run TODO_update_ssa. + * gimple-pretty-print.c (pp_points_to_solution): Print split flags. + * tree-ssa-alias.c (dump_points_to_solution): Likewise. + +2013-11-15 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (tree_loop_distribution): Make sure + to distribute all stores. + +2013-11-15 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * doc/invoke.texi (-mabi=elfv1, -mabi=elfv2): Document. + +2013-11-15 Joseph Myers <joseph@codesourcery.com> + + * acinclude.m4 (GCC_GLIBC_VERSION_GTE_IFELSE): New configure macro. + * configure.ac: Determine target_header_dir earlier. + (--with-glibc-version): New configure option. + Use GCC_GLIBC_VERSION_GTE_IFELSE in enable_gnu_unique_object, + gcc_cv_libc_provides_ssp and gcc_cv_target_ldbl128 tests. + * configure: Regenerate. + * doc/install.texi (--enable-gnu-unique-object): Don't refer to + native toolchains for default. + (--with-glibc-version): Document. + +2013-11-15 Eric Botcazou <ebotcazou@adacore.com> + + * fold-const.c (fold_binary_loc) <comparisons>: Reuse local variable. + +2013-11-15 Uros Bizjak <ubizjak@gmail.com> + + * lto-streamer-in.c (input function): Call cgraph_create_node if + cgraph_get_node failed. + +2013-11-14 Olivier Hainque <hainque@adacore.com> + + * cfgexpand.c (defer_stack_allocation): When optimization is enabled, + defer allocation of DECL_IGNORED_P variables at toplevel unless really + small. Factorize size threshold computation from the existing one. + (expand_used_vars): Refine comment. + +2013-11-14 Cong Hou <congh@google.com> + + * tree-vectorizer.h (struct dr_with_seg_len): Remove the base + address field as it can be obtained from dr. Rename the struct. + * tree-vect-data-refs.c (comp_dr_with_seg_len_pair): Consider + steps of data references during sort. + (vect_prune_runtime_alias_test_list): Adjust with the change to + struct dr_with_seg_len. + * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): + Adjust with the change to struct dr_with_seg_len. + +2013-11-14 Jeff Law <law@redhat.com> + + PR middle-end/59127 + * basic-block.h (has_abnormal_outgoing_edge_p): Moved here from... + * tree-inline.c (has_abnormal_outgoing_edge_p): Remove. + * gimple-ssa-isolate-paths.c: Include tree-cfg.h. + (find_implicit_erroneous_behaviour): If a block has abnormal outgoing + edges, then ignore it. If the statement exhibiting erroneous + behaviour ends basic blocks, with the exception of GIMPLE_RETURNs, + then we can not optimize. + (find_explicit_erroneous_behaviour): Likewise. + +2013-11-14 Andrew MacLeod <amacleod@redhat.com> + + * gimplify-me.h: New file. Add prototypes. + * gimplify.h: Don't include gimple.h. + (struct gimplify_hasher, struct gimplify_ctx, is_gimple_sizepos): + Relocate from gimple.h. + * gimple.h (struct gimplify_hasher, struct gimplify_ctx, + is_gimple_sizepos): Move to gimplify.h. + (gimplify_hasher::hash, gimplify_hasher::equal): Move to gimplify.c. + (enum gsi_iterator_update): Move to gimple-iterator.h. + * gimple-iterator.h (enum gsi_iterator_update): Relocate from gimple.h. + * gimplify-me.c: New File. + (force_gimple_operand_1, force_gimple_operand, + force_gimple_operand_gsi_1, force_gimple_operand_gsi, + gimple_regimplify_operands): Relocate from gimplify.c. + * gimplify.c (force_gimple_operand_1, force_gimple_operand, + force_gimple_operand_gsi_1, force_gimple_operand_gsi, + gimple_regimplify_operands): Move to gimplify-me.c. + (gimplify_hasher::hash, gimplify_hasher::equal): Relocate + from gimple.h. + * Makefile.in (OBJS): Add gimplify-me.o + * asan.c: Include only gimplify.h, gimplify-me.h, and/or gimple.h as + required. + * cfgloopmanip.c: Likewise. + * cgraphunit.c: Likewise. + * cilk-common.c: Likewise. + * fold-const.c: Likewise. + * function.c: Likewise. + * gimple-expr.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-split.c: Likewise. + * ipa.c: Likewise. + * langhooks.c: Likewise. + * omp-low.c: Likewise. + * sese.c: Likewise. + * stor-layout.c: Likewise. + * targhooks.c: Likewise. + * trans-mem.c: Likewise. + * tree-affine.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-complex.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nested.c: Likewise. + * tree-parloops.c: Likewise. + * tree-predcom.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-address.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree.c: Likewise. + * tsan.c: Likewise. + * value-prof.c: Likewise. + * config/aarch64/aarch64.c: Likewise. + * config/alpha/alpha.c: Likewise. + * config/darwin.c: Likewise. + * config/i386/i386.c: Likewise. + * config/ia64/ia64.c: Likewise. + * config/mep/mep.c: Likewise. + * config/mips/mips.c: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/s390/s390.c: Likewise. + * config/sh/sh.c: Likewise. + * config/sparc/sparc.c: Likewise. + * config/spu/spu.c: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/tilegx/tilegx.c: Likewise. + * config/tilepro/tilepro.c: Likewise. + * config/xtensa/xtensa.c: Likewise. + +2013-11-14 Diego Novillo <dnovillo@google.com> + + * Makefile.in (PLUGIN_HEADERS): Add stringpool.h. + +2013-11-14 Diego Novillo <dnovillo@google.com> + + * tree.h: Include fold-const.h. + (aggregate_value_p): Moved to function.h. + (alloca_call_p): Moved to calls.h. + (allocate_struct_function): Moved to function.h. + (apply_tm_attr): Moved to attribs.h. + (array_at_struct_end_p): Moved to expr.h. + (array_ref_element_size): Moved to tree-dfa.h. + (array_ref_low_bound): Moved to tree-dfa.h. + (array_ref_up_bound): Moved to tree.h. + (assemble_alias): Moved to cgraph.h. + (bit_from_pos): Moved to stor-layout.h. + (build_addr): Moved to tree-nested.h. + (build_duplicate_type): Moved to tree-inline.h. + (build_fold_addr_expr): Moved to fold-const.h. + (build_fold_addr_expr_with_type): Moved to fold-const.h. + (build_fold_addr_expr_with_type_loc): Moved to fold-const.h. + (build_fold_indirect_ref): Moved to fold-const.h. + (build_fold_indirect_ref_loc): Moved to fold-const.h. + (build_personality_function): Moved to tree.h. + (build_range_check): Moved to fold-const.h. + (build_simple_mem_ref): Moved to fold-const.h. + (build_simple_mem_ref_loc): Moved to fold-const.h. + (build_tm_abort_call): Moved to trans-mem.h. + (byte_from_pos): Moved to stor-layout.h. + (call_expr_flags): Moved to calls.h. + (can_move_by_pieces): Moved to expr.h. + (categorize_ctor_elements): Moved to expr.h. + (change_decl_assembler_name): Moved to gcc-symtab.h. + (combine_comparisons): Moved to fold-const.h. + (complete_ctor_at_level_p): Moved to tree.h. + (component_ref_field_offset): Moved to tree-dfa.h. + (compute_builtin_object_size): Moved to tree-object-size.h. + (compute_record_mode): Moved to stor-layout.h. + (constant_boolean_node): Moved to fold-const.h. + (constructor_static_from_elts_p): Moved to varasm.h. + (cxx11_attribute_p): Moved to attribs.h. + (debug_body): Moved to print-tree.h. + (debug_find_tree): Moved to tree-inline.h. + (debug_fold_checksum): Moved to fold-const.h. + (debug_head): Moved to print-tree.h. + (debug_head): Moved to print-tree.h. + (debug_raw): Moved to print-tree.h. + (debug_tree): Moved to print-tree.h. + (debug_vec_tree): Moved to print-tree.h. + (debug_verbose): Moved to print-tree.h. + (debug_verbose): Moved to print-tree.h. + (decl_attributes): Moved to attribs.h. + (decl_binds_to_current_def_p): Moved to varasm.h. + (decl_default_tls_model): Moved to varasm.h. + (decl_replaceable_p): Moved to varasm.h. + (div_if_zero_remainder): Moved to fold-const.h. + (double_int mem_ref_offset): Moved to fold-const.h. + (dump_addr): Moved to print-tree.h. + (element_precision): Moved to machmode.h. + (expand_dummy_function_end): Moved to function.h. + (expand_function_end): Moved to function.h. + (expand_function_start): Moved to function.h. + (expand_label): Moved to stmt.h. + (expr_first): Moved to tree-iterator.h. + (expr_last): Moved to tree-iterator.h. + (finalize_size_functions): Moved to stor-layout.h. + (finish_builtin_struct): Moved to stor-layout.h. + (finish_record_layout): Moved to stor-layout.h. + (fixup_signed_type): Moved to stor-layout.h. + (fixup_unsigned_type): Moved to stor-layout.h. + (flags_from_decl_or_type): Moved to calls.h. + (fold): Moved to fold-const.h. + (fold_abs_const): Moved to fold-const.h. + (fold_binary): Moved to fold-const.h. + (fold_binary_loc): Moved to fold-const.h. + (fold_binary_to_constant): Moved to fold-const.h. + (fold_build1): Moved to fold-const.h. + (fold_build1_initializer_loc): Moved to fold-const.h. + (fold_build1_loc): Moved to fold-const.h. + (fold_build1_stat_loc): Moved to fold-const.h. + (fold_build2): Moved to fold-const.h. + (fold_build2_initializer_loc): Moved to fold-const.h. + (fold_build2_loc): Moved to fold-const.h. + (fold_build2_stat_loc): Moved to fold-const.h. + (fold_build3): Moved to fold-const.h. + (fold_build3_loc): Moved to fold-const.h. + (fold_build3_stat_loc): Moved to fold-const.h. + (fold_build_call_array): Moved to fold-const.h. + (fold_build_call_array_initializer): Moved to fold-const.h. + (fold_build_call_array_initializer_loc): Moved to fold-const.h. + (fold_build_call_array_loc): Moved to fold-const.h. + (fold_build_cleanup_point_expr): Moved to fold-const.h. + (fold_convert): Moved to fold-const.h. + (fold_convert_loc): Moved to fold-const.h. + (fold_convertible_p): Moved to fold-const.h. + (fold_defer_overflow_warnings): Moved to fold-const.h. + (fold_deferring_overflow_warnings_p): Moved to fold-const.h. + (fold_fma): Moved to fold-const.h. + (fold_ignored_result): Moved to fold-const.h. + (fold_indirect_ref): Moved to fold-const.h. + (fold_indirect_ref_1): Moved to fold-const.h. + (fold_indirect_ref_loc): Moved to fold-const.h. + (fold_read_from_constant_string): Moved to fold-const.h. + (fold_real_zero_addition_p): Moved to fold-const.h. + (fold_single_bit_test): Moved to fold-const.h. + (fold_strip_sign_ops): Moved to fold-const.h. + (fold_ternary): Moved to fold-const.h. + (fold_ternary_loc): Moved to fold-const.h. + (fold_unary): Moved to tree-data-ref.h. + (fold_unary_ignore_overflow): Moved to fold-const.h. + (fold_unary_ignore_overflow_loc): Moved to fold-const.h. + (fold_unary_loc): Moved to fold-const.h. + (fold_unary_to_constant): Moved to fold-const.h. + (fold_undefer_and_ignore_overflow_warnings): Moved to fold-const.h. + (fold_undefer_overflow_warnings): Moved to fold-const.h. + (folding_initializer): Moved to fold-const.h. + (free_temp_slots): Moved to function.h. + (generate_setjmp_warnings): Moved to function.h. + (get_attribute_name): Moved to attribs.h. + (get_identifier): Moved to stringpool.h. + (get_identifier_with_length): Moved to stringpool.h. + (get_inner_reference): Moved to tree.h. + (gimple_alloca_call_p): Moved to calls.h. + (gimplify_parameters): Moved to function.h. + (highest_pow2_factor): Moved to expr.h. + (indent_to): Moved to print-tree.h. + (init_attributes): Moved to attribs.h. + (init_dummy_function_start): Moved to function.h. + (init_function_start): Moved to function.h. + (init_inline_once): Moved to tree-inline.h. + (init_object_sizes): Moved to tree-object-size.h. + (init_temp_slots): Moved to function.h. + (init_tree_optimization_optabs): Moved to optabs.h. + (initialize_sizetypes): Moved to stor-layout.h. + (initializer_constant_valid_for_bitfield_p): Moved to varasm.h. + (initializer_constant_valid_p): Moved to varasm.h. + (int_const_binop): Moved to fold-const.h. + (internal_reference_types): Moved to stor-layout.h. + (invert_tree_comparison): Moved to fold-const.h. + (invert_truthvalue): Moved to fold-const.h. + (invert_truthvalue_loc): Moved to fold-const.h. + (is_tm_ending_fndecl): Moved to trans-mem.h. + (is_tm_may_cancel_outer): Moved to trans-mem.h. + (is_tm_pure): Moved to trans-mem.h. + (is_tm_safe): Moved to trans-mem.h. + (layout_decl): Moved to stor-layout.h. + (layout_type): Moved to stor-layout.h. + (lookup_attribute_spec): Moved to attribs.h. + (make_accum_type): Moved to stor-layout.h. + (make_decl_one_only): Moved to varasm.h. + (make_decl_rtl): Moved to tree.h. + (make_decl_rtl_for_debug): Moved to varasm.h. + (make_fract_type): Moved to stor-layout.h. + (make_or_reuse_sat_signed_accum_type): Moved to stor-layout.h. + (make_or_reuse_sat_signed_fract_type): Moved to stor-layout.h. + (make_or_reuse_sat_unsigned_accum_type): Moved to stor-layout.h. + (make_or_reuse_sat_unsigned_fract_type): Moved to stor-layout.h. + (make_or_reuse_signed_accum_type): Moved to stor-layout.h. + (make_or_reuse_signed_fract_type): Moved to stor-layout.h. + (make_or_reuse_unsigned_accum_type): Moved to stor-layout.h. + (make_or_reuse_unsigned_fract_type): Moved to stor-layout.h. + (make_range): Moved to fold-const.h. + (make_range_step): Moved to fold-const.h. + (make_sat_signed_accum_type): Moved to stor-layout.h. + (make_sat_signed_fract_type): Moved to stor-layout.h. + (make_sat_unsigned_accum_type): Moved to stor-layout.h. + (make_sat_unsigned_fract_type): Moved to stor-layout.h. + (make_signed_accum_type): Moved to stor-layout.h. + (make_signed_fract_type): Moved to stor-layout.h. + (make_signed_type): Moved to stor-layout.h. + (make_unsigned_accum_type): Moved to stor-layout.h. + (make_unsigned_fract_type): Moved to stor-layout.h. + (make_unsigned_type): Moved to stor-layout.h. + (mark_decl_referenced): Moved to varasm.h. + (mark_referenced): Moved to varasm.h. + (may_negate_without_overflow_p): Moved to fold-const.h. + (maybe_get_identifier): Moved to stringpool.h. + (merge_ranges): Moved to fold-const.h. + (merge_weak): Moved to varasm.h. + (mode_for_size_tree): Moved to stor-layout.h. + (multiple_of_p): Moved to fold-const.h. + (must_pass_in_stack_var_size): Moved to calls.h. + (must_pass_in_stack_var_size_or_pad): Moved to calls.h. + (native_encode_expr): Moved to fold-const.h. + (native_interpret_expr): Moved to fold-const.h. + (non_lvalue): Moved to fold-const.h. + (non_lvalue_loc): Moved to fold-const.h. + (normalize_offset): Moved to stor-layout.h. + (normalize_rli): Moved to stor-layout.h. + (notice_global_symbol): Moved to varasm.h. + (omit_one_operand): Moved to fold-const.h. + (omit_one_operand_loc): Moved to fold-const.h. + (omit_two_operands): Moved to fold-const.h. + (omit_two_operands_loc): Moved to fold-const.h. + (operand_equal_p): Moved to tree-data-ref.h. + (parse_input_constraint): Moved to stmt.h. + (parse_output_constraint): Moved to stmt.h. + (place_field): Moved to stor-layout.h. + (pop_function_context): Moved to function.h. + (pop_temp_slots): Moved to function.h. + (pos_from_bit): Moved to stor-layout.h. + (preserve_temp_slots): Moved to function.h. + (print_node): Moved to print-tree.h. + (print_node_brief): Moved to print-tree.h. + (print_rtl): Moved to rtl.h. + (process_pending_assemble_externals): Moved to varasm.h. + (ptr_difference_const): Moved to fold-const.h. + (push_function_context): Moved to function.h. + (push_struct_function): Moved to function.h. + (push_temp_slots): Moved to function.h. + (record_tm_replacement): Moved to trans-mem.h. + (relayout_decl): Moved to stor-layout.h. + (resolve_asm_operand_names): Moved to stmt.h. + (resolve_unique_section): Moved to varasm.h. + (rli_size_so_far): Moved to stor-layout.h. + (rli_size_unit_so_far): Moved to stor-layout.h. + (round_down): Moved to fold-const.h. + (round_down_loc): Moved to fold-const.h. + (round_up): Moved to fold-const.h. + (round_up_loc): Moved to fold-const.h. + (set_decl_incoming_rtl): Moved to emit-rtl.h. + (set_decl_rtl): Moved to tree.h. + (set_min_and_max_values_for_integral_type): Moved to stor-layout.h. + (set_user_assembler_name): Moved to varasm.h. + (setjmp_call_p): Moved to calls.h. + (size_binop): Moved to fold-const.h. + (size_binop_loc): Moved to fold-const.h. + (size_diffop): Moved to fold-const.h. + (size_diffop_loc): Moved to fold-const.h. + (size_int_kind): Moved to fold-const.h. + (stack_protect_epilogue): Moved to function.h. + (start_record_layout): Moved to stor-layout.h. + (supports_one_only): Moved to varasm.h. + (swap_tree_comparison): Moved to fold-const.h. + (tm_malloc_replacement): Moved to trans-mem.h. + (tree build_fold_addr_expr_loc): Moved to fold-const.h. + (tree build_invariant_address): Moved to fold-const.h. + (tree_binary_nonnegative_warnv_p): Moved to fold-const.h. + (tree_binary_nonzero_warnv_p): Moved to fold-const.h. + (tree_call_nonnegative_warnv_p): Moved to fold-const.h. + (tree_expr_nonnegative_p): Moved to fold-const.h. + (tree_expr_nonnegative_warnv_p): Moved to fold-const.h. + (tree_output_constant_def): Moved to varasm.h. + (tree_overlaps_hard_reg_set): Moved to stmt.h. + (tree_single_nonnegative_warnv_p): Moved to fold-const.h. + (tree_single_nonzero_warnv_p): Moved to fold-const.h. + (tree_swap_operands_p): Moved to fold-const.h. + (tree_unary_nonnegative_warnv_p): Moved to fold-const.h. + (tree_unary_nonzero_warnv_p): Moved to fold-const.h. + (update_alignment_for_field): Moved to stor-layout.h. + (use_register_for_decl): Moved to function.h. + (variable_size): Moved to rtl.h. + (vector_type_mode): Moved to stor-layout.h. + * cgraph.h: Corresponding changes. + * emit-rtl.h: Corresponding changes. + * expr.h: Corresponding changes. + * function.h: Corresponding changes. + * optabs.h: Corresponding changes. + * trans-mem.h: Corresponding changes. + Protect against multiple inclusion. + * tree-inline.h: Corresponding changes. + * tree-iterator.h: Corresponding changes. + * tree-dfa.h: Include expr.h. + * tree-ssanames.h: Include stringpool.h. + * attribs.h: New file. + * calls.h: New file. + * fold-const.h: New file. + * gcc-symtab.h: New file. + * print-rtl.h: New file. + * print-tree.h: New file. + * stmt.h: New file. + * stor-layout.h: New file. + * strinpool.h: New file. + * tree-nested.h: New file + * tree-object-size.h: New file. + * varasm.h: New file. + +2013-11-14 Diego Novillo <dnovillo@google.com> + + * alias.c: Include varasm.h. + Include expr.h. + * asan.c: Include calls.h. + Include stor-layout.h. + Include varasm.h. + * attribs.c: Include stringpool.h. + Include attribs.h. + Include stor-layout.h. + * builtins.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + Include tree-object-size.h. + * calls.c: Include stor-layout.h. + Include varasm.h. + Include stringpool.h. + Include attribs.h. + * cfgexpand.c: Include stringpool.h. + Include varasm.h. + Include stor-layout.h. + Include stmt.h. + Include print-tree.h. + * cgraph.c: Include varasm.h. + Include calls.h. + Include print-tree.h. + * cgraphclones.c: Include stringpool.h. + Include function.h. + Include emit-rtl.h. + Move inclusion of rtl.h earlier in the file. + * cgraphunit.c: Include varasm.h. + Include stor-layout.h. + Include stringpool.h. + * cilk-common.c: Include stringpool.h. + Include stor-layout.h. + * combine.c: Include stor-layout.h. + * config/aarch64/aarch64-builtins.c: Include stor-layout.h. + Include stringpool.h. + Include calls.h. + * config/aarch64/aarch64.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/alpha/alpha.c: Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/arc/arc.c: Include varasm.h. + Include stor-layout.h. + Include stringpool.h. + Include calls.h. + * config/arm/arm.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/avr/avr-c.c: Include stor-layout.h. + * config/avr/avr-log.c: Include print-tree.h. + * config/avr/avr.c: Include print-tree.h. + Include calls.h. + Include stor-layout.h. + Include stringpool.h. + * config/bfin/bfin.c: Include varasm.h. + Include calls.h. + * config/c6x/c6x.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + Include stringpool.h. + * config/cr16/cr16.c: Include stor-layout.h. + Include calls.h. + * config/cris/cris.c: Include varasm.h. + Include stor-layout.h. + Include calls.h. + Include stmt.h. + * config/darwin.c: Include stringpool.h. + Include varasm.h. + Include stor-layout.h. + * config/epiphany/epiphany.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + Include stringpool.h. + * config/fr30/fr30.c: Include stor-layout.h. + Include varasm.h. + * config/frv/frv.c: Include varasm.h. + Include stor-layout.h. + Include stringpool.h. + * config/h8300/h8300.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + Include stringpool.h. + * config/i386/i386.c: Include stringpool.h. + Include attribs.h. + Include calls.h. + Include stor-layout.h. + Include varasm.h. + * config/i386/winnt-cxx.c: Include stringpool.h. + Include attribs.h. + * config/i386/winnt.c: Include stringpool.h. + Include varasm.h. + * config/ia64/ia64-c.c: Include stringpool.h. + * config/ia64/ia64.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/iq2000/iq2000.c: Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/lm32/lm32.c: Include calls.h. + * config/m32c/m32c.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/m32r/m32r.c: Include stor-layout.h. + Include varasm.h. + Include stringpool.h. + Include calls.h. + * config/m68k/m68k.c: Include calls.h. + Include stor-layout.h. + Include varasm.h. + * config/mcore/mcore.c: Include stor-layout.h. + Include varasm.h. + Include stringpool.h. + Include calls.h. + * config/mep/mep.c: Include varasm.h. + Include calls.h. + Include stringpool.h. + Include stor-layout.h. + * config/microblaze/microblaze.c: Include varasm.h. + Include stor-layout.h. + Include calls.h. + * config/mips/mips.c: Include varasm.h. + Include stringpool.h. + Include stor-layout.h. + Include calls.h. + * config/mmix/mmix.c: Include varasm.h. + Include stor-layout.h. + Include calls.h. + * config/mn10300/mn10300.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/moxie/moxie.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/msp430/msp430.c: Include stor-layout.h. + Include calls.h. + * config/nds32/nds32.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/pa/pa.c: Include stor-layout.h. + Include stringpool.h. + Include varasm.h. + Include calls.h. + * config/pdp11/pdp11.c: Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/picochip/picochip.c: Include calls.h. + Include stor-layout.h. + Include stringpool.h. + Include varasm.h. + * config/rl78/rl78.c: Include varasm.h. + Include stor-layout.h. + Include calls.h. + * config/rs6000/rs6000-c.c: Include stor-layout.h. + Include stringpool.h. + * config/rs6000/rs6000.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include print-tree.h. + Include varasm.h. + * config/rx/rx.c: Include varasm.h. + Include stor-layout.h. + Include calls.h. + * config/s390/s390.c: Include print-tree.h. + Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/score/score.c: Include stringpool.h. + Include calls.h. + Include varasm.h. + Include stor-layout.h. + * config/sh/sh-c.c: Include stringpool.h. + Include attribs.h.h. + * config/sh/sh.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/sol2-c.c: Include stringpool.h. + Include attribs.h. + * config/sol2-cxx.c: Include stringpool.h. + * config/sol2.c: Include stringpool.h. + Include varasm.h. + * config/sparc/sparc.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/spu/spu-c.c: Include stringpool.h. + * config/spu/spu.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * config/stormy16/stormy16.c: Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/tilegx/tilegx.c: Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/tilepro/tilepro.c: Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/v850/v850-c.c: Include stringpool.h. + Include attribs.h. + * config/v850/v850.c: Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include calls.h. + * config/vax/vax.c: Include calls.h. + Include varasm.h. + * config/vms/vms.c: Include stringpool.h. + * config/vxworks.c: Include stringpool.h. + * config/xtensa/xtensa.c: Include stringpool.h. + Include stor-layout.h. + Include calls.h. + Include varasm.h. + * convert.c: Include stor-layout.h. + * coverage.c: Include stringpool.h. + Include stor-layout.h. + * dbxout.c: Include varasm.h. + Include stor-layout.h. + * dojump.c: Include stor-layout.h. + * dse.c: Include stor-layout.h. + * dwarf2asm.c: Include stringpool.h. + Include varasm.h. + * dwarf2cfi.c: Include stor-layout.h. + * dwarf2out.c: Include rtl.h. + Include stringpool.h. + Include stor-layout.h. + Include varasm.h. + Include function.h. + Include emit-rtl.h. + Move inclusion of rtl.h earlier in the file. + * emit-rtl.c: Include varasm.h. + * except.c: Include stringpool.h. + Include stor-layout.h. + * explow.c: Include stor-layout.h. + * expmed.c: Include stor-layout.h. + * expr.c: Include stringpool.h. + Include stor-layout.h. + Include attribs.h. + Include varasm.h. + * final.c: Include varasm.h. + * fold-const.c: Include stor-layout.h. + Include calls.h. + Include tree-iterator.h. + * function.c: Include stor-layout.h. + Include varasm.h. + Include stringpool.h. + * genattrtab.c (write_header): Emit includes for varasm.h, + stor-layout.h and calls.h. + * genautomata.c (main): Likewise. + * genemit.c: Likewise. + * genopinit.c: Likewise. + * genoutput.c (output_prologue): Likewise. + * genpeep.c: Likewise. + * genpreds.c (write_insn_preds_c): Likewise. + * gengtype.c (open_base_files): Add stringpool.h. + * gimple-expr.c: Include stringpool.h. + Include stor-layout.h. + * gimple-fold.c: Include stringpool.h. + Include expr.h. + Include stmt.h. + Include stor-layout.h. + * gimple-low.c: Include tree-nested.h. + Include calls.h. + * gimple-pretty-print.c: Include stringpool.h. + * gimple-ssa-strength-reduction.c: Include stor-layout.h. + Include expr.h. + * gimple-walk.c: Include stmt.h. + * gimple.c: Include calls.h. + Include stmt.h. + Include stor-layout.h. + * gimplify.c: Include stringpool.h. + Include calls.h. + Include varasm.h. + Include stor-layout.h. + Include stmt.h. + Include print-tree.h. + Include expr.h. + * gimplify-me.c: Include stmt.h + Include stor-layout.h + * internal-fn.c: Include stor-layout.h. + * ipa-devirt.c: Include print-tree.h. + Include calls.h. + * ipa-inline-analysis.c: Include stor-layout.h. + Include stringpool.h. + Include print-tree.h. + * ipa-inline.c: Include trans-mem.h. + Include calls.h. + * ipa-prop.c: Include expr.h. + Include stor-layout.h. + Include print-tree.h. + * ipa-pure-const.c: Include print-tree.h. + Include calls.h. + * ipa-reference.c: Include calls.h. + * ipa-split.c: Include stringpool.h. + Include expr.h. + Include calls.h. + * ipa.c: Include calls.h. + Include stringpool.h. + * langhooks.c: Include stringpool.h. + Include attribs.h. + * lto-cgraph.c: Include stringpool.h. + * lto-streamer-in.c: Include stringpool.h. + * lto-streamer-out.c: Include stor-layout.h. + Include stringpool.h. + * omp-low.c: Include stringpool.h. + Include stor-layout.h. + Include expr.h. + * optabs.c: Include stor-layout.h. + Include stringpool.h. + Include varasm.h. + * passes.c: Include varasm.h. + * predict.c: Include calls.h. + * print-rtl.c: Include print-tree.h. + * print-tree.c: Include varasm.h. + Include print-rtl.h. + Include stor-layout.h. + * realmpfr.c: Include stor-layout.h. + * reg-stack.c: Include varasm.h. + * sdbout.c: Include varasm.h. + Include stor-layout.h. + * simplify-rtx.c: Include varasm.h. + * stmt.c: Include varasm.h. + Include stor-layout.h. + * stor-layout.c: Include stor-layout.h. + Include stringpool.h. + Include varasm.h. + Include print-tree.h. + * symtab.c: Include rtl.h. + Include print-tree.h. + Include varasm.h. + Include function.h. + Include emit-rtl.h. + * targhooks.c: Include stor-layout.h. + Include varasm.h. + * toplev.c: Include varasm.h. + Include tree-inline.h. + * trans-mem.c: Include calls.h. + Include function.h. + Include rtl.h. + Include emit-rtl.h. + * tree-affine.c: Include expr.h. + * tree-browser.c: Include print-tree.h. + * tree-call-cdce.c: Include stor-layout.h. + * tree-cfg.c: Include trans-mem.h. + Include stor-layout.h. + Include print-tree.h. + * tree-complex.c: Include stor-layout.h. + * tree-data-ref.c: Include expr.h. + * tree-dfa.c: Include stor-layout.h. + * tree-eh.c: Include expr.h. + Include calls.h. + * tree-emutls.c: Include stor-layout.h. + Include varasm.h. + * tree-if-conv.c: Include stor-layout.h. + * tree-inline.c: Include stor-layout.h. + Include calls.h. + * tree-loop-distribution.c: Include stor-layout.h. + * tree-nested.c: Include stringpool.h. + Include stor-layout.h. + * tree-object-size.c: Include tree-object-size.h. + * tree-outof-ssa.c: Include stor-layout.h. + * tree-parloops.c: Include stor-layout.h. + Include tree-nested.h. + * tree-pretty-print.c: Include stor-layout.h. + Include expr.h. + * tree-profile.c: Include varasm.h. + Include tree-nested.h. + * tree-scalar-evolution.c: Include expr.h. + * tree-sra.c: Include stor-layout.h. + * tree-ssa-address.c: Include stor-layout.h. + * tree-ssa-ccp.c: Include stor-layout.h. + * tree-ssa-dce.c: Include calls.h. + * tree-ssa-dom.c: Include stor-layout.h. + * tree-ssa-forwprop.c: Include stor-layout.h. + * tree-ssa-ifcombine.c: Include stor-layout.h. + * tree-ssa-loop-ivopts.c: Include stor-layout.h. + * tree-ssa-loop-niter.c: Include calls.h. + Include expr.h. + * tree-ssa-loop-prefetch.c: Include stor-layout.h. + * tree-ssa-math-opts.c: Include stor-layout.h. + * tree-ssa-operands.c: Include stmt.h. + Include print-tree.h. + * tree-ssa-phiopt.c: Include stor-layout.h. + * tree-ssa-reassoc.c: Include stor-layout.h. + * tree-ssa-sccvn.c: Include stor-layout.h. + * tree-ssa-sink.c: Include stor-layout.h. + * tree-ssa-strlen.c: Include stor-layout.h. + * tree-ssa-structalias.c: Include stor-layout.h. + Include stmt.h. + * tree-ssa-tail-merge.c: Include stor-layout.h. + Include trans-mem.h. + * tree-ssa-uncprop.c: Include stor-layout.h. + * tree-ssa.c: Include stor-layout.h. + * tree-ssanames.c: Include stor-layout.h. + * tree-streamer-in.c: Include stringpool.h. + * tree-streamer-out.c: Include stor-layout.h. + * tree-switch-conversion.c: Include varasm.h. + Include stor-layout.h. + * tree-tailcall.c: Include stor-layout.h. + * tree-vect-data-refs.c: Include stor-layout.h. + * tree-vect-generic.c: Include stor-layout.h. + * tree-vect-loop.c: Include stor-layout.h. + * tree-vect-patterns.c: Include stor-layout.h. + * tree-vect-slp.c: Include stor-layout.h. + * tree-vect-stmts.c: Include stor-layout.h. + * tree-vectorizer.c: Include stor-layout.h. + * tree-vrp.c: Include stor-layout.h. + Include calls.h. + * tree.c: Include stor-layout.h. + Include calls.h. + Include attribs.h. + Include varasm.h. + * tsan.c: Include expr.h. + * ubsan.c: Include stor-layout.h. + Include stringpool.h. + * value-prof.c: Include tree-nested.h. + Include calls.h. + * var-tracking.c: Include varasm.h. + Include stor-layout.h. + * varasm.c: Include stor-layout.h. + Include stringpool.h. + Include gcc-symtab.h. + Include varasm.h. + * varpool.c: Include varasm.h. + * vmsdbgout.c: Include varasm.h. + * xcoffout.c: Include varasm.h. + +2013-11-14 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.md (doloop_begin_i): Remove extra alignment; + use (.&-4) idiom. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/sysv4le.h (LINUX64_DEFAULT_ABI_ELFv2): Define. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2. + (RS6000_SAVE_TOC): Remove. + (RS6000_TOC_SAVE_SLOT): New macro. + * config/rs6000/rs6000.c (rs6000_parm_offset): New function. + (rs6000_parm_start): Use it. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT. + (rs6000_emit_epilogue): Likewise. + (rs6000_call_aix): Likewise. + (rs6000_output_function_prologue): Do not save/restore r11 + around calling _mcount for ABI_ELFv2. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space): + Add prototype. + * config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove. + (REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space. + * config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function. + (rs6000_function_parms_need_stack): Likewise. + (rs6000_reg_parm_stack_space): Likewise. + (rs6000_function_arg): Do not replace BLKmode by Pmode when + returning a register argument. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro. + (ALTIVEC_ARG_MAX_RETURN): Likewise. + (FUNCTION_VALUE_REGNO_P): Use them. + * config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define. + (rs6000_return_in_msb): New function. + (rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates. + Handle aggregates of up to 16 bytes for ELFv2. + (rs6000_function_value): Handle ELFv2 homogeneous aggregates. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define. + * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function. + (rs6000_discover_homogeneous_aggregate): Likewise. + (rs6000_function_arg_boundary): Handle homogeneous aggregates. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_psave_function_arg): Handle BLKmode arguments. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Michael Gschwind <mkg@us.ibm.com> + + * config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define. + * config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function. + (rs6000_discover_homogeneous_aggregate): Likewise. + (rs6000_function_arg_boundary): Handle homogeneous aggregates. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_psave_function_arg): Handle BLKmode arguments. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (machine_function): New member + r2_setup_needed. + (rs6000_emit_prologue): Set r2_setup_needed if necessary. + (rs6000_output_mi_thunk): Set r2_setup_needed. + (rs6000_output_function_prologue): Output global entry point + prologue and local entry point marker if needed for ABI_ELFv2. + Output -mprofile-kernel code here. + (output_function_profiler): Do not output -mprofile-kernel + code here; moved to rs6000_output_function_prologue. + (rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2. + + (rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2. + (rs6000_output_function_entry): Likewise. + (rs6000_assemble_integer): Likewise. + (rs6000_elf_encode_section_info): Likewise. + (rs6000_elf_declare_function_name): Do not create dot symbols + or .opd section for ABI_ELFv2. + + (rs6000_trampoline_size): Update for ABI_ELFv2 trampolines. + (rs6000_trampoline_init): Likewise. + (rs6000_elf_file_end): Call file_end_indicate_exec_stack for ABI_ELFv2. + + (rs6000_call_aix): Handle ELFv2 indirect calls. Do not check + for function descriptors in ABI_ELFv2. + + * config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support + on ABI_AIX only, not ABI_ELFv2. + ("*call_value_indirect_aix<mode>"): Likewise. + ("*call_indirect_elfv2<mode>"): New pattern. + ("*call_value_indirect_elfv2<mode>"): Likewise. + + * config/rs6000/predicates.md ("symbol_ref_operand"): Do not + check for function descriptors in ABI_ELFv2. + ("current_file_function_operand"): Likewise. + + * config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]: + (toc): Undefine. + (FUNC_NAME): Define ELFv2 variant. + (JUMP_TARGET): Likewise. + (FUNC_START): Likewise. + (HIDDEN_FUNC): Likewise. + (FUNC_END): Likeiwse. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1 + and --with-abi=elfv2. + * config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi". + * config/rs6000/rs6000.opt (mabi=elfv1): New option. + (mabi=elfv2): Likewise. + * config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2. + * config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI + if !RS6000_BI_ARCH. + (ELFv2_ABI_CHECK): New macro. + (SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set + rs6000_current_abi to ABI_AIX or ABI_ELFv2. + (GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version. + * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine + _CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2. + (debug_stack_info): Likewise. + (rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX. + (rs6000_legitimize_tls_address): Likewise. + (rs6000_conditional_register_usage): Likewise. + (rs6000_emit_move): Likewise. + (init_cumulative_args): Likewise. + (rs6000_function_arg_advance_1): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + (rs6000_output_function_entry): Likewise. + (rs6000_assemble_integer): Likewise. + (rs6000_savres_strategy): Likewise. + (rs6000_stack_info): Likewise. + (rs6000_function_ok_for_sibcall): Likewise. + (rs6000_emit_load_toc_table): Likewise. + (rs6000_savres_routine_name): Likewise. + (ptr_regno_for_savres): Likewise. + (rs6000_emit_prologue): Likewise. + (rs6000_emit_epilogue): Likewise. + (rs6000_output_function_epilogue): Likewise. + (output_profile_hook): Likewise. + (output_function_profiler): Likewise. + (rs6000_trampoline_size): Likewise. + (rs6000_trampoline_init): Likewise. + (rs6000_elf_output_toc_section_asm_op): Likewise. + (rs6000_elf_encode_section_info): Likewise. + (rs6000_elf_reloc_rw_mask): Likewise. + (rs6000_elf_declare_function_name): Likewise. + (rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX, + except that rs6000_compat_align_parm is always assumed false. + (rs6000_gimplify_va_arg): Likewise. + (rs6000_call_aix): Update comment. + (rs6000_sibcall_aix): Likewise. + * config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"): + Treat ABI_ELFv2 the same as ABI_AIX. + ("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise. + ("load_toc_aix_si"): Likewise. + ("load_toc_aix_di"): Likewise. + ("call"): Likewise. + ("call_value"): Likewise. + ("*call_local_aix<mode>"): Likewise. + ("*call_value_local_aix<mode>"): Likewise. + ("*call_nonlocal_aix<mode>"): Likewise. + ("*call_value_nonlocal_aix<mode>"): Likewise. + ("*call_indirect_aix<mode>"): Likewise. + ("*call_value_indirect_aix<mode>"): Likewise. + ("sibcall"): Likewise. + ("sibcall_value"): Likewise. + ("*sibcall_aix<mode>"): Likewise. + ("*sibcall_value_aix<mode>"): Likewise. + * config/rs6000/predicates.md ("symbol_ref_operand"): Likewise. + ("current_file_function_operand"): Likewise. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_arg_partial_bytes): Simplify logic + by making use of the fact that for vector / floating point arguments + passed both in VRs/FPRs and in the fixed parameter area, the partial + bytes mechanism is in fact not used. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_psave_function_arg): New function. + (rs6000_finish_function_arg): Likewise. + (rs6000_function_arg): Use rs6000_psave_function_arg and + rs6000_finish_function_arg to handle both vector and floating + point arguments that are also passed in GPRs / the stack. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (USE_FP_FOR_ARG_P): Remove TYPE argument. + (USE_ALTIVEC_FOR_ARG_P): Likewise. + (rs6000_darwin64_record_arg_advance_recurse): Update uses. + (rs6000_function_arg_advance_1):Likewise. + (rs6000_darwin64_record_arg_recurse): Likewise. + (rs6000_function_arg): Likewise. + (rs6000_arg_partial_bytes): Likewise. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Replace + "DEFAULT_ABI != ABI_AIX" test by testing for ABI_V4 or ABI_DARWIN. + (rs6000_savres_strategy): Likewise. + (rs6000_return_addr): Likewise. + (rs6000_emit_load_toc_table): Replace "DEFAULT_ABI != ABI_AIX" by + testing for ABI_V4 (since ABI_DARWIN is impossible here). + (rs6000_emit_prologue): Likewise. + (legitimate_lo_sum_address_p): Simplify DEFAULT_ABI test. + (rs6000_elf_declare_function_name): Remove duplicated test. + * config/rs6000/rs6000.md ("load_toc_v4_PIC_1"): Explicitly test + for ABI_V4 (instead of "DEFAULT_ABI != ABI_AIX" test). + ("load_toc_v4_PIC_1_normal"): Likewise. + ("load_toc_v4_PIC_1_476"): Likewise. + ("load_toc_v4_PIC_1b"): Likewise. + ("load_toc_v4_PIC_1b_normal"): Likewise. + ("load_toc_v4_PIC_1b_476"): Likewise. + ("load_toc_v4_PIC_2"): Likewise. + ("load_toc_v4_PIC_3b"): Likewise. + ("load_toc_v4_PIC_3c"): Likewise. + * config/rs6000/rs6000.h (RS6000_REG_SAVE): Simplify DEFAULT_ABI test. + (RS6000_SAVE_AREA): Likewise. + (FP_ARG_MAX_REG): Likewise. + (RETURN_ADDRESS_OFFSET): Likewise. + * config/rs6000/sysv.h (TARGET_TOC): Test for ABI_V4 instead + of ABI_AIX. + (SUBTARGET_OVERRIDE_OPTIONS): Likewise. + (MINIMAL_TOC_SECTION_ASM_OP): Likewise. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_call_indirect_aix): Rename to ... + (rs6000_call_aix): ... this. Handle both direct and indirect calls. + Create call insn directly instead of via various gen_... routines. + Mention special registers used by the call in CALL_INSN_FUNCTION_USAGE. + (rs6000_sibcall_aix): New function. + * config/rs6000/rs6000.md (TOC_SAVE_OFFSET_32BIT): Remove. + (TOC_SAVE_OFFSET_64BIT): Likewise. + (AIX_FUNC_DESC_TOC_32BIT): Likewise. + (AIX_FUNC_DESC_TOC_64BIT): Likewise. + (AIX_FUNC_DESC_SC_32BIT): Likewise. + (AIX_FUNC_DESC_SC_64BIT): Likewise. + ("call" expander): Call rs6000_call_aix. + ("call_value" expander): Likewise. + ("call_indirect_aix<ptrsize>"): Replace this pattern ... + ("call_indirect_aix<ptrsize>_nor11"): ... and this pattern ... + ("*call_indirect_aix<mode>"): ... by this insn pattern. + ("call_value_indirect_aix<ptrsize>"): Replace this pattern ... + ("call_value_indirect_aix<ptrsize>_nor11"): ... and this pattern ... + ("*call_value_indirect_aix<mode>"): ... by this insn pattern. + ("*call_nonlocal_aix32", "*call_nonlocal_aix64"): Replace by ... + ("*call_nonlocal_aix<mode>"): ... this pattern. + ("*call_value_nonlocal_aix32", "*call_value_nonlocal_aix64"): Replace + ("*call_value_nonlocal_aix<mode>"): ... by this pattern. + ("*call_local_aix<mode>"): New insn pattern. + ("*call_value_local_aix<mode>"): Likewise. + ("sibcall" expander): Call rs6000_sibcall_aix. + ("sibcall_value" expander): Likewise. Move earlier in file. + ("*sibcall_nonlocal_aix<mode>"): Replace by ... + ("*sibcall_aix<mode>"): ... this pattern. + ("*sibcall_value_nonlocal_aix<mode>"): Replace by ... + ("*sibcall_value_aix<mode>"): ... this pattern. + * config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): Remove. + (rs6000_call_aix): Add prototype. + (rs6000_sibcall_aix): Likewise. + +2013-11-14 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/59122 + * asan.c (asan_emit_stack_protection): Ensure -fsection-anchors + isn't confused by the artificial decl. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (rs6000_emit_prologue): Do not place a + RTX_FRAME_RELATED_P marker on the UNSPEC_MOVESI_FROM_CR insn. + Instead, add USEs of all modified call-saved CR fields to the + insn storing the result to the stack slot, and provide an + appropriate REG_FRAME_RELATED_EXPR for that insn. + * config/rs6000/rs6000.md ("*crsave"): New insn pattern. + * config/rs6000/predicates.md ("crsave_operation"): New predicate. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + Alan Modra <amodra@gmail.com> + + * function.c (assign_parms): Use all.reg_parm_stack_space instead + of re-evaluating REG_PARM_STACK_SPACE target macro. + (locate_and_pad_parm): New parameter REG_PARM_STACK_SPACE. Use it + instead of evaluating target macro REG_PARM_STACK_SPACE every time. + (assign_parm_find_entry_rtl): Update call. + * calls.c (initialize_argument_information): Update call. + (emit_library_call_value_1): Likewise. + * expr.h (locate_and_pad_parm): Update prototype. + +2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * calls.c (store_unaligned_arguments_into_pseudos): Skip PARALLEL + arguments. + +2013-11-14 DJ Delorie <dj@redhat.com> + + * config/rx/rx.c (rx_mode_dependent_address_p): Allow offsets up + to 16 bits. + +2013-11-14 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_through_normal_block): Only push the + EDGE_START_JUMP_THREAD marker if the jump threading path is empty. + +2013-11-14 James Greenhalgh <james.greenhalgh@arm.com> + + * doc/invoke.texi: Update documentation for AArch64's -mcpu + and -mtune options. + +2013-11-14 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def (example-1): Remove. + (example-2): Likewise. + * config/aarch64/aarch64-tune.md: Regenerate. + * config/aarch64/aarch64.md: Do not include "large.md" or "small.md". + (generic_sched): Remove "large", "small". + * config/aarch64/large.md: Delete. + * config/aarch64/small.md: Delete. + +2013-11-14 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a57): Tune for cortexa15. + * config/aarch64/aarch64-tune.md: Regenerate. + * config/aarch64/aarch64.md: Include cortex-a15 pipeline model. + (generic_sched): "no" if we are tuning for cortexa15. + * config/arm/cortex-a15.md: Include cortex-a15-neon.md by + relative path. + +2013-11-14 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-arches.def (armv8-a): Tune for cortex-a53. + * config/aarch64/aarch64.md: Do not include aarch64-generic.md. + * config/aarch64/aarch64.c (aarch64_tune): Initialize to cortexa53. + (all_cores): Use cortexa53 when tuning for "generic". + (aarch64_override_options): Fix comment. + * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Set to cortexa53. + * config/aarch64/aarch64-generic.md: Delete. + +2013-11-14 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.c (all_architectures): Remove "generic". + +2013-11-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c: Include aarch-cost-tables.h. + (generic_rtx_cost_table): Remove. + (aarch64_rtx_costs): Use fields from cpu_cost_table. + * config/aarch64/aarch64-protos.h (tune_params): Use cpu_cost_table for + insn_extra_cost. + (cpu_rtx_cost_table): Remove. + +2013-11-14 Julian Brown <julian@codesourcery.com> + Joey Ye <joey.ye@arm.com> + + * config/arm/arm.c (arm_cortex_m_branch_cost): New. + (arm_v7m_tune): New. + (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune, arm_9e_tune, + arm_v6t2_tune, arm_cortex_tune, arm_cortex_a15_tune, + arm_cortex_a5_tune, arm_v6m_tune): Add comments for Sched adj cost. + * config/arm/arm-cores.def (cortex-m4, cortex-m3): Use arm_v7m_tune. + +2013-11-14 Kirill Yukhin <kirill.yukhin@intel.com> + + PR target/57491 + * config/ia64/ia64.c (ia64_split_tmode_move): Relax `dead' + flag setting. + +2013-11-14 Jakub Jelinek <jakub@redhat.com> + Uros Bizjak <ubizjak@gmail.com> + + PR target/59101 + * config/i386/i386.md (*anddi_2): Only allow CCZmode if + operands[2] satisfies_constraint_Z that might have bit 31 set. + +2013-11-13 Jeff Law <law@redhat.com> + + PR tree-optimization/59102 + * gimple-ssa-isolate-paths.c + (insert_trap_and_remove_trailing_statments): Ensure STMT is a + gimple assignment before looking at gimple_assign_lhs. + +2013-11-13 Vladimir Makarov <vmakarov@redhat.com> + + * ira.c: Add comment about threads at the top of file. + +2013-11-13 Vladimir Makarov <vmakarov@redhat.com> + + * ira-color.c (coalesce_allocnos): Don't allocate and free + sorted_copies. + +2013-11-14 Tom de Vries <tom@codesourcery.com> + + * tree-ssa-tail-merge.c (gimple_equal_p): Add test for structural + equality for GIMPLE_ASSIGN. + +2013-11-14 Tom de Vries <tom@codesourcery.com> + + * tree-ssa-tail-merge.c (gimple_operand_equal_value_p): Factor new + function out of ... + (gimple_equal_p): ... here. + +2013-11-14 Tom de Vries <tom@codesourcery.com> + + * trans-mem.c (is_tm_ending): New function. + * gimple.h (is_tm_ending): Declare. + * tree-ssa-tail-merge.c (gimple_equal_p): Remove test on + BUILT_IN_TM_COMMIT. + (find_duplicate): Use is_tm_ending instead of is_tm_ending_fndecl. + +2013-11-14 Tom de Vries <tom@codesourcery.com> + + * tree-ssa-tail-merge.c (gimple_equal_p): Remove equal variable. + +2013-11-13 Andrew MacLeod <amacleod@redhat.com> + + * gimple-walk.h: New File. Relocate prototypes from gimple.h. + (struct walk_stmt_info): Relocate here from gimple.h. + * gimple-iterator.h: New File. Relocate prototypes from gimple.h. + (struct gimple_stmt_iterator_d): Relocate here from gimple.h. + (gsi_start_1, gsi_none, gsi_start_bb, gsi_last_1, gsi_last_bb, + gsi_end_p, gsi_one_before_end_p, gsi_next, gsi_prev, gsi_stmt, + gsi_after_labels, gsi_next_nondebug, gsi_prev_nondebug, + gsi_start_nondebug_bb, gsi_start_nondebug_after_labels_bb, + gsi_last_nondebug_bb, gsi_bb, gsi_seq): Relocate here from gimple.h. + * gimple.h (struct gimple_stmt_iterator_d): Move to gimple-iterator.h. + (gsi_start_1, gsi_none, gsi_start_bb, gsi_last_1, gsi_last_bb, + gsi_end_p, gsi_one_before_end_p, gsi_next, gsi_prev, gsi_stmt, + gsi_after_labels, gsi_next_nondebug, gsi_prev_nondebug, + gsi_start_nondebug_bb, gsi_start_nondebug_after_labels_bb, + gsi_last_nondebug_bb, gsi_bb, gsi_seq): Move to gimple-iterator.h. + (struct walk_stmt_info): Move to gimple-walk.h. + (gimple_seq_set_location): Move to gimple.c + * gimple-walk.c: New File. + (walk_gimple_seq_mod, walk_gimple_seq, walk_gimple_asm, walk_gimple_op, + walk_gimple_stmt, get_base_loadstore, walk_stmt_load_store_addr_ops, + walk_stmt_load_store_ops): Relocate here from gimple.c. + * gimple-iterator.c: Include gimple-iterator.h. + * gimple.c (walk_gimple_seq_mod, walk_gimple_seq, walk_gimple_asm, + walk_gimple_op, walk_gimple_stmt, get_base_loadstore, + walk_stmt_load_store_addr_ops, walk_stmt_load_store_ops): Move to + gimple-walk.c. + (gimple_seq_set_location): Relocate from gimple.h. + * tree-phinodes.h (set_phi_nodes): Move to tree-phinodes.c. + * tree-phinodes.c (set_phi_nodes): Relocate from tree-phinodes.h. + * gengtype.c (open_base_files): Add gimple-iterator.h to include list. + * Makefile.in (OBJS): Add gimple-walk.o + * asan.c: Update Include list as required for gimple-iterator.h and + gimple-walk.h. + * cfgexpand.c: Likewise. + * cfgloop.c: Likewise. + * cfgloopmanip.c: Likewise. + * cgraph.c: Likewise. + * cgraphbuild.c: Likewise. + * cgraphunit.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-low.c: Likewise. + * gimple-pretty-print.c: Likewise. + * gimple-ssa-isolate-paths.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple-streamer-in.c: Likewise. + * gimple-streamer-out.c: Likewise. + * gimplify.c: Likewise. + * graphite-blocking.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-dependences.c: Likewise. + * graphite-interchange.c: Likewise. + * graphite-optimize-isl.c: Likewise. + * graphite-poly.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * graphite.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-profile.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-pure-const.c: Likewise. + * ipa-split.c: Likewise. + * lto-streamer-in.c: Likewise. + * lto-streamer-out.c: Likewise. + * omp-low.c: Likewise. + * predict.c: Likewise. + * profile.c: Likewise. + * sese.c: Likewise. + * tracer.c: Likewise. + * trans-mem.c: Likewise. + * tree-call-cdce.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-complex.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-dfa.c: Likewise. + * tree-eh.c: Likewise. + * tree-emutls.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-into-ssa.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nested.c: Likewise. + * tree-nrv.c: Likewise. + * tree-object-size.c: Likewise. + * tree-outof-ssa.c: Likewise. + * tree-parloops.c: Likewise. + * tree-predcom.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-coalesce.c: Likewise. + * tree-ssa-copy.c: Likewise. + * tree-ssa-copyrename.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-dse.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-live.c: Likewise. + * tree-ssa-loop-ch.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sink.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-ssa-tail-merge.c: Likewise. + * tree-ssa-ter.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-threadupdate.c: Likewise. + * tree-ssa-uncprop.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-ssa.c: Likewise. + * tree-stdarg.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-slp.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree-vectorizer.c: Likewise. + * tree-vrp.c: Likewise. + * tree.c: Likewise. + * tsan.c: Likewise. + * value-prof.c: Likewise. + * vtable-verify.c: Likewise. + +2013-11-13 Steven Bosscher <steven@gcc.gnu.org> + + * gimple-ssa-isolate-paths.c (pass_isolate_erroneous_paths): Comment + fix. + +2013-11-13 Jeff Law <law@redhat.com> + + * PR middle-end/59119 + * gimple-ssa-isolate-paths.c (find_implicit_erroneous_behaviour): New + function, extracted from gimple_ssa_isolate_erroneous_paths. + (find_explicit_erroneous_behaviour): Similarly. + (insert_trap_and_remove_trailing_statements): Remove statements + in reverse order. + +2013-11-13 Steven Bosscher <steven@gcc.gnu.org> + + * cfgrtl.c (can_fallthru): Reorder code to move tablejump check up. + Make that check explicit. BB_HEAD cannot be NULL, remove check for it. + * haifa-sched.c (ready_remove_first_dispatch): Check INSN_P before + looking at INSN_CODE. + * reload1.c (delete_dead_insn) Do not expect JUMP_TABLE_DATA to be an + active_insn_p object, respect basic block boundaries. + * reorg.c (follow_jumps): Use invariant that JUMP_TABLE_DATA always + follows immediately after the jump table data label. + * config/nds32/nds32.c (nds32_output_casesi_pc_relative): Likewise. + * config/sh/sh.c (barrier_align): Likewise. Rearrange code such + that JUMP_TABLE_DATA is not expected to be an active_insn_p object. + +2013-11-13 Teresa Johnson <tejohnson@google.com> + + PR ipa/58862 + * predict.c (drop_profile): Error is currently too strict. + (handle_missing_profiles): Pass call_count to drop_profile. + +2013-11-13 Teresa Johnson <tejohnson@google.com> + + PR ipa/58862 + * ipa-inline.c (edge_badness): Fix overflow. + +2013-11-13 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/59036 + * ira-color.c (struct allocno_color_data): Add new members + first_thread_allocno, next_thread_allocno, thread_freq. + (sorted_copies): New static var. + (allocnos_conflict_by_live_ranges_p, copy_freq_compare_func): Move up. + (allocno_thread_conflict_p, merge_threads) + (form_threads_from_copies, form_threads_from_bucket) + (form_threads_from_colorable_allocno, init_allocno_threads): New + functions. + (bucket_allocno_compare_func): Add comparison by thread frequency + and threads. + (add_allocno_to_ordered_bucket): Rename to + add_allocno_to_ordered_colorable_bucket. Remove parameter. + (push_only_colorable): Call form_threads_from_bucket. + (color_pass): Call init_allocno_threads. Use + consideration_allocno_bitmap instead of coloring_allocno_bitmap + for nuillify allocno color data. + (ira_initiate_assign, ira_finish_assign): Allocate/free sorted_copies. + (coalesce_allocnos): Use static sorted copies. + +2013-11-13 Jakub Jelinek <jakub@redhat.com> + + * passes.c (execute_todo): Don't call do_per_function if + flags are zero. + (execute_one_ipa_transform_pass, execute_one_pass): Don't call + execute_function_dump if dump_file is NULL. + +2013-11-13 Martin Jambor <mjambor@suse.cz> + + * cgraph.c (cgraph_get_create_node): Do what + cgraph_get_create_real_symbol_node used to do. + (cgraph_get_create_real_symbol_node): Removed. Changed all users to + call cgraph_get_create_node. + * cgraph.h (cgraph_get_create_real_symbol_node): Removed. + * lto-streamer-in.c (input_function): Call cgraph_get_node instead of + cgraph_get_create_node. Assert we get a node. + +2013-11-13 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (vec_extract): New. + +2013-11-13 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (vec_set<mode>): Add w -> w option to + the constraint. + +2013-11-13 Eric Botcazou <ebotcazou@adacore.com> + + * cfgexpand.c (expand_used_vars): Allocate space for partitions based + on PARM_DECLs or RESULT_DECLs only if they are ignored for debug info + or if optimization is enabled. + * tree-ssa-coalesce.c (coalesce_ssa_name): If optimization is disabled, + require that all the names based on a PARM_DECL or a RESULT_DECL that + isn't ignored for debug info be coalesced. + +2013-11-13 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/c6x/c6x.c: Include "gimple-expr.h". + +2013-11-13 Richard Biener <rguenther@suse.de> + + * gimple-streamer-out.c (output_gimple_stmt): Also wrap + decls in ADDR_EXPR operands inside a MEM_REF and optimize that. + * gimple-streamer-in.c (input_gimple_stmt): Remove now dead code + dealing with type mismatches inside component reference chains. + +2013-11-13 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/59077 + * ipa-pure-const.c (better_state): Update *state. + +2013-11-13 Christophe Lyon <christophe.lyon@linaro.org> + + * config/aarch64/aarch64.h (FRAME_GROWS_DOWNWARD): Define to 1. + * config/aarch64/aarch64.c (aarch64_initial_elimination_offset): + Update offset calculations. + +2013-11-13 Eric Botcazou <ebotcazou@adacore.com> + + PR ada/35998 + * dwarf2out.c (add_byte_size_attribute): Also use int_size_in_bytes + for fields. Do not add the attribute if the size is negative. + +2013-11-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c: Include aarch-cost-tables.h. + (generic_extra_costs): Move from here... + * config/arm/aarch-cost-tables.h: ... To here. New file. + +2013-11-13 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (ix86_print_operand): Support z-masking. + * config/i386/predicate.md (const_0_to_4_operand): New. + (const_0_to_5_operand): Ditto. + * config/i386/sse.md (UNSPEC_COMPRESS): New. + (UNSPEC_COMPRESS_STORE): Ditto. + (UNSPEC_EXPAND): Ditto. + (UNSPEC_EMBEDDED_ROUNDING): Ditto. + (define_mode_attr ssescalarsize): Ditto. + (avx512f_load<mode>_mask): Ditto. + (avx512f_store<mode>_mask): Ditto. + (avx512f_storedqu<mode>_mask): Ditto. + (avx512f_vmcmp<mode>3_mask): Ditto. + (avx512f_fmadd_<mode>_mask): Ditto. + (avx512f_fmadd_<mode>_mask3): Ditto. + (avx512f_fmsub_<mode>_mask): Ditto. + (avx512f_fmsub_<mode>_mask3): Ditto. + (avx512f_fnmadd_<mode>_mask): Ditto. + (avx512f_fnmadd_<mode>_mask3): Ditto. + (avx512f_fnmsub_<mode>_mask): Ditto. + (avx512f_fnmsub_<mode>_mask3): Ditto. + (avx512f_fmaddsub_<mode>_mask): Ditto. + (avx512f_fmaddsub_<mode>_mask3): Ditto. + (avx512f_fmsubadd_<mode>_mask): Ditto. + (avx512f_fmsubadd_<mode>_mask3): Ditto. + (vec_unpacku_float_lo_v16si): Ditto. + (avx512f_vextract<shuffletype>32x4_mask): Ditto. + (avx512f_vextract<shuffletype>32x4_1_maskm): Ditto. + (avx512f_vextract<shuffletype>64x4_mask): Ditto. + (vec_extract_lo_<mode>_maskm): Ditto. + (vec_extract_hi_<mode>_maskm): Ditto. + (avx512f_vternlog<mode>_mask): Ditto. + (avx512f_shufps512_mask): Ditto. + (avx512f_fixupimm<mode>_mask): Ditto. + (avx512f_shufpd512_mask): Ditto. + (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto. + (avx512f_<code>v8div16qi2_mask/trunc): Ditto. + (*avx512f_<code>v8div16qi2_store_mask): Ditto. + (ashr<mode>3<mask_name>): Ditto. + (avx512f_vinsert<shuffletype>32x4_mask): Ditto. + (avx512f_vinsert<shuffletype>64x4_mask): Ditto. + (avx512f_shuf_<shuffletype>64x2_mask): Ditto. + (avx512f_shuf_<shuffletype>32x4_mask): Ditto. + (avx512f_pshufdv3_mask): Ditto. + (avx512f_perm<mode>_mask): Ditto. + (avx512f_vpermi2var<mode>3_mask): Ditto. + (avx512f_vpermt2var<mode>3_mask): Ditto. + (avx512f_compress<mode>_mask): Ditto. + (avx512f_compressstore<mode>_mask): Ditto. + (avx512f_expand<mode>_mask): Ditto. + (<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>): Extend + to support masking. + (avx512f_storeu<ssemodesuffix>512_mask): Ditto. + (<plusminus_insn><mode>3<mask_name>): Ditto. + (*<plusminus_insn><mode>3<mask_name>): Ditto. + (mul<mode>3<mask_name>): Ditto. + (*mul<mode>3<mask_name>): Ditto. + (<sse>_div<mode>3<mask_name>): Ditto. + (<mask_codefor>rcp14<mode><mask_name>): Ditto. + (<sse>_sqrt<mode>2<mask_name>): Ditto. + (<mask_codefor>rsqrt14<mode><mask_name>): Ditto. + (<code><mode>3<mask_name>/smaxmin): Ditto. + (*<code><mode>3_finite<mask_name>/smaxmin): Ditto. + (*<code><mode>3<mask_name>/smaxmin): Ditto. + (float<sseintvecmodelower><mode>2<mask_name>): Ditto. + (ufloatv16siv16sf2<mask_name>): Ditto. + (<mask_codefor>avx512f_fix_notruncv16sfv16si<mask_name>): Ditto. + (<mask_codefor>avx512f_ufix_notruncv16sfv16si<mask_name>): Ditto. + (<fixsuffix>fix_truncv16sfv16si2<mask_name>): Ditto. + (float<si2dfmodelower><mode>2<mask_name>): Ditto. + (ufloatv8siv8df<mask_name>): Ditto. + (<mask_codefor>avx512f_cvtpd2dq512<mask_name>): Ditto. + (avx512f_ufix_notruncv8dfv8si<mask_name>): Ditto. + (<fixsuffix>fix_truncv8dfv8si2<mask_name>): Ditto. + (<mask_codefor>avx512f_cvtpd2ps512<mask_name>): Ditto. + (<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name>): Ditto. + (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto. + (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto. + (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto. + (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto. + (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Ditto. + (vec_extract_lo_<mode><mask_name>): Ditto. + (vec_extract_hi_<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto. + (avx512f_movddup512<mask_name>): Ditto. + (avx512f_unpcklpd512<mask_name>): Ditto. + (*avx512f_unpcklpd512<mask_name>): Ditto. + (*avx512f_vmscalef<mode>): Ditto. + (avx512f_scalef<mode><mask_name>): Ditto. + (avx512f_getexp<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_align<mode><mask_name>): Ditto. + (avx512f_rndscale<mode><mask_name>): Ditto. + (avx512f_shufps512_1<mask_name>): Ditto. + (avx512f_shufpd512_1<mask_name>): Ditto. + (<plusminus_insn><mode>3<mask_name>): Ditto. + (*<plusminus_insn><mode>3<mask_name>): Ditto. + (vec_widen_umult_even_v16si<mask_name>): Ditto. + (*vec_widen_umult_even_v16si<mask_name>): Ditto. + (vec_widen_smult_even_v16si<mask_name>): Ditto. + (*vec_widen_smult_even_v16si<mask_name>): Ditto. + (mul<mode>3<mask_name>): Ditto. + (*<sse4_1_avx2>_mul<mode>3<mask_name>): Ditto. + (<shift_insn><mode>3<mask_name>): Ditto. + (avx512f_<rotate>v<mode><mask_name>/rotate): Ditto. + (avx512f_<rotate><mode><mask_name>): Ditto. + (<code><mode>3<mask_name>/maxmin): Ditto. + (*avx2_<code><mode>3<mask_name>/maxmin): Ditto. + (<sse2_avx2>_andnot<mode>3<mask_name>): Ditto. + (*andnot<mode>3<mask_name>): Ditto. + (<mask_codefor><code><mode>3<mask_name>/any_logic): Ditto. + (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto. + (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto. + (<mask_codefor>avx512f_vinsert<shuffletype>32x4_1<mask_name>): Ditto. + (vec_set_lo_<mode><mask_name>): Ditto. + (vec_set_hi_<mode><mask_name>): Ditto. + (avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ditto. + (avx512f_shuf_<shuffletype>32x4_1<mask_name>): Ditto. + (avx512f_pshufd_1<mask_name>): Ditto. + (<mask_codefor>abs<mode>2<mask_name>): Ditto. + (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto. + (avx512f_<code>v16hiv16si2<mask_name>/any_extend): Ditto. + (avx512f_<code>v8qiv8di2<mask_name>/any_extend): Ditto. + (avx512f_<code>v8hiv8di2<mask_name>/any_extend): Ditto. + (avx512f_<code>v8siv8di2<mask_name>/any_extend): Ditto. + (avx512er_exp2<mode><mask_name>): Ditto. + (<mask_codefor>avx512er_rcp28<mode><mask_name>): Ditto. + (<mask_codefor>avx512er_rsqrt28<mode><mask_name>): Ditto. + (<avx2_avx512f>_permvar<mode><mask_name>): Ditto. + (<avx2_avx512f>_perm<mode>_1<mask_name>): Ditto. + (<mask_codefor>avx512f_vec_dup<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_broadcast<mode><mask_name>/V16FI): Ditto. + (<mask_codefor>avx512f_broadcast<mode><mask_name>/V8FI): Ditto. + (<mask_codefor>avx512f_vec_dup_gpr<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_vec_dup_mem<mode><mask_name>): Ditto. + (<sse2_avx_avx512f>_vpermil<mode><mask_name>/VF2): Ditto. + (<sse2_avx_avx512f>_vpermil<mode><mask_name>/VF1): Ditto. + (*<sse2_avx_avx512f>_vpermilp<mode><mask_name>): Ditto. + (<sse2_avx_avx512f>_vpermilvar<mode>3<mask_name>): Ditto. + (<avx2_avx512f>_ashrv<mode><mask_name>): Ditto. + (<avx2_avx512f>_<shift_insn>v<mode><mask_name>): Ditto. + (<mask_codefor>avx512f_vcvtph2ps512<mask_name>): Ditto. + (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto. + (avx512f_getmant<mode><mask_name>): Ditto. + (clz<mode>2<mask_name>): Ditto. + (<mask_codefor>conflict<mode><mask_name>): Ditto. + (*srcp14<mode>): Remove visibility. + (*rsqrt14<mode>): Ditto. + (*fma_fmsub_<mode>): Ditto. + (*fma_fnmadd_<mode>): Ditto. + (*avx512f_rndscale<mode>): Ditto. + * config/i386/subst.md: New file. + +2013-11-13 Joseph Myers <joseph@codesourcery.com> + + * doc/extend.texi (Statement Exprs, Typeof): Discuss __auto_type. + * ginclude/stdatomic.h (kill_dependency, atomic_store_explicit) + (atomic_load_explicit, atomic_exchange_explicit) + (atomic_compare_exchange_strong_explicit) + (atomic_compare_exchange_weak_explicit): Use __auto_type to + declare variable initialized with PTR argument. + +2013-11-12 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_around_empty_blocks): New argument + backedge_seen_p. Set, use and pass it to children appropriately. + (thread_through_normal_block): Similarly. + (thread_across_edge): Similarly. + + * gimple-ssa-isolate-paths.c (check_loadstore): Mark discovered + memory references as volatile. + (insert_trap_and_remove_trailing_statements): Fix comment. + +2013-11-12 Vladimir Makarov <vmakarov@redhat.com> + + PR other/58712 + * ira-costs.c (record_operand_costs): Check operands number for + the single set. + +2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59054 + * config/rs6000/rs6000.md (movdi_internal32): Eliminate + constraints that would allow DImode into the traditional Altivec + registers, but cause undesirable code generation when loading 0 as + a constant. + (movdi_internal64): Likewise. + (cmp<mode>_fpr): Do not use %x for CR register output. + (extendsfdf2_fpr): Fix constraints when -mallow-upper-df and + -mallow-upper-sf debug switches are used. + +2013-11-12 Andrew MacLeod <amacleod@redhat.com> + + * gimple-expr.h (create_tmp_var_name, create_tmp_var_raw, + create_tmp_var, create_tmp_reg, mark_addressable, is_gimple_reg_rhs): + Relocate prototypes from gimple.h. + * gimplify.h: New File. Relocate some prototypes from gimple.h here. + (gimple_predicate, enum fallback, enum gimplify_status): Relocate + from gimple.h. + * gimple.h: Move some prototypes to gimplify.h. + (gimple_predicate, enum fallback, enum gimplify_status): Move to + gimplify.h. + (gimple_do_not_emit_location_p, gimple_set_do_not_emit_location): + Relocate from gimpify.c. + * gimple-expr.c (remove_suffix, tmp_var_id_num, create_tmp_var_name, + create_tmp_var_raw, create_tmp_var, create_tmp_reg, mark_addressable, + is_gimple_reg_rhs) Relocate from gimplify.c. + * gimplify.c (mark_addressable): Move to gimple-expr.c. + (gimple_seq_add_stmt_without_update): Move to gimple.c. + (remove_suffix, tmp_var_id_num, create_tmp_var_name, + create_tmp_var_raw, create_tmp_var, create_tmp_reg, + is_gimple_reg_rhs): Move to gimple-expr.c. + (should_carry_location_p): Move to gimple.c. + (gimple_do_not_emit_location_p, gimple_set_do_not_emit_location): Move + to gimple.h. + (annotate_one_with_location, annotate_all_with_location_after, + annotate_all_with_location): Move to gimple.c. + (compare_case_labels, sort_case_labels, + preprocess_case_label_vec_for_gimple): Move to gimple.c. + (rhs_predicate_for): Make static. + (gimplify_assign): Relocate from gimple.c. + * gimple.c (gimplify_assign): Move to gimplify.c. + (gimple_seq_add_stmt_without_update, should_carry_location_p, + annotate_one_with_location, annotate_all_with_location_after, + annotate_all_with_location, compare_case_labels, sort_case_labels, + preprocess_case_label_vec_for_gimple): Relocate from gimplify.c. + * tree.h (unshare_expr, unshare_expr_without_location, + mark_addressable): Move prototypes to gimplify.h. + * Makefile.in (GTFILES): gimple-expr.c now has the GTY tag for + tmp_var_id_num + * asan.c: Include gimplify.h rather than gimple.h. + * cfgloopmanip.c: Likewise. + * cgraphunit.c: Likewise. + * cilk-common.c: Likewise. + * dwarf2out.c: Dont include gimple.h. + * fold-const.c: Include gimplify.h rather than gimple.h. + * function.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-split.c: Likewise. + * ipa.c: Likewise. + * langhooks.c: Dont include gimple.h. + * loop-init.c: Include gimplify.h rather than gimple.h. + * omp-low.c: Likewise. + * sese.c: Likewise. + * stor-layout.c: Likewise. + * targhooks.c: Likewise. + * trans-mem.c: Likewise. + * tree-affine.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-complex.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-iterator.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nested.c: Likewise. + * tree-parloops.c: Likewise. + * tree-predcom.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-address.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa.c: Likewise. + * tree-switch-conversio: Likewise.n.c + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tsan.c: Likewise. + * value-prof.c: Likewise. + * config/aarch64/aarch64.c: Include gimplify.h instead of gimple.h. + * config/alpha/alpha.c: Likewise. + * config/darwin.c: Likewise. + * config/i386/i386.c: Likewise. + * config/ia64/ia64.c: Likewise. + * config/mep/mep.c: Likewise. + * config/mips/mips.c: Likewise. + * config/rs6000/rs6000.c: Likewise. + * config/s390/s390.c: Likewise. + * config/sh/sh.c: Likewise. + * config/sparc/sparc.c: Likewise. + * config/spu/spu.c: Likewise. + * config/stormy16/stormy16.c: Likewise. + * config/tilegx/tilegx.c: Likewise. + * config/tilepro/tilepro.c: Likewise. + * config/xtensa/xtensa.c: Likewise. + +2013-11-12 Adam Butcher <adam@jessamine.co.uk> + + * tree.c (grow_tree_vec_stat): New function ... + * tree.h (grow_tree_vec_stat) (grow_tree_vec): ... and its declaration + and macro front-end. + +2013-11-12 Marek Polacek <polacek@redhat.com> + + * final.c (update_alignments): Initialize label to NULL_RTX. + +2013-11-12 Jeff Law <law@redhat.com> + + * gimple-ssa-isolate-paths.c (check_loadstore): New function. + (insert_trap_and_remove_trailing_statements): New argument OP which + is the NULL pointer. Emit the trap after the load/store through + the NULL pointer. Simplify the RHS of a store through a NULL pointer + when trivial to do so. + (isolate_path): Corresponding changes. + (gimple_ssa_isolate_erroneous_path): Likewise. + +2013-11-12 Teresa Johnson <tejohnson@google.com> + Jan Hubicka <jh@suse.cz> + + * predict.c (drop_profile): New function. + (handle_missing_profiles): Ditto. + (counts_to_freqs): Don't overwrite estimated frequencies + when function has no profile counts. + * predict.h (handle_missing_profiles): Declare. + * tree-inline.c (freqs_to_counts): New function. + (copy_cfg_body): Invoke freqs_to_counts as needed. + * tree-profile.c (tree_profiling): Invoke handle_missing_profiles. + +2013-11-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59088 + * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): + Set for m_HASWELL. + (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Set for m_HASWELL. + +2013-11-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59084 + * config/i386/i386.c (ix86_option_override_internal): Check + X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL and + X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL for + MASK_AVX256_SPLIT_UNALIGNED_LOAD and + MASK_AVX256_SPLIT_UNALIGNED_STORE. + + * config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL): + Clear m_COREI7_AVX and update comments. + (X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Likewise. + +2013-11-12 Martin Jambor <mjambor@suse.cz> + + PR rtl-optimization/10474 + * ira.c (interesting_dest_for_shprep): New function. + (split_live_ranges_for_shrink_wrap): Likewise. + (find_moveable_pseudos): Move calculation of dominance info, + df_analysios and the final anlyses to... + (ira): ...here, call split_live_ranges_for_shrink_wrap. + +2013-11-12 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (force_expr_to_var_cost): Refactor the code. + Handle type conversion. + +2013-11-11 Martin Liska <marxin.liska@gmail.com> + Jan Hubicka <jh@suse.cz> + + * cgraph.c (dump_cgraph_node): Profile dump added. + * cgraph.h (struct cgraph_node): New time profile variable added. + * cgraphclones.c (cgraph_clone_node): Time profile is cloned. + * gcov-io.h (gcov_type): New profiler type introduced. + * ipa-profile.c (lto_output_node): Streaming for time profile added. + (input_node): Time profiler is read from LTO stream. + * predict.c (maybe_hot_count_p): Hot prediction changed. + * profile.c (instrument_values): New case for time profiler added. + (compute_value_histograms): Read of time profile. + * tree-pretty-print.c (dump_function_header): Time profiler is dumped. + * tree-profile.c (init_ic_make_global_vars): Time profiler + function added. + (gimple_init_edge_profiler): TP function instrumentation. + (gimple_gen_time_profiler): New. + * value-prof.c (gimple_add_histogram_value): Support for time profiler + added. + (dump_histogram_value): TP type added to dumps. + (visit_hist): More sensitive check that takes TP into account. + (gimple_find_values_to_profile): TP instrumentation. + * value-prof.h (hist_type): New histogram type added. + (struct histogram_value_t): Pointer to struct function added. + * libgcc/Makefile.in: New GCOV merge function for TP added. + * libgcov.c: function_counter variable introduced. + (_gcov_merge_time_profile): New. + (_gcov_time_profiler): New. + +2013-11-11 Marc Glisse <marc.glisse@inria.fr> + Jeff Law <law@redhat.com> + + * tree-ssa-alias.c (stmt_kills_ref_p_1): Use + ao_ref_init_from_ptr_and_size for builtins. + +2013-11-11 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/58853 + * config/i386/x86-tune.def + (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Rename from + TARGET_MISALIGNED_MOVE_STRING_PROLOGUES. + * config/i386/i386.h + (TARGET_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Rename from + TARGET_MISALIGNED_MOVE_STRING_PROLOGUES_EPILOGUES. Update for renamed + X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES. + * config/i386/i386.c (ix86_expand_set_or_movmem): Use + TARGET_MISALIGNED_MOVE_STRING_PRO_EPILOGUES to calculate + misaligned_prologue_used. Check that + desired_aling <= epilogue_size_needed. + +2013-11-11 Cong Hou <congh@google.com> + + PR tree-optimization/59050 + * tree-vect-data-refs.c (comp_dr_addr_with_seg_len_pair): Bug fix. + +2013-11-11 Joern Rennecke <joern.rennecke@embecosm.com> + + PR middle-end/59049 + * expmed.c (emit_store_flag): Fail for const-const comparison. + +2013-11-11 Tristan Gingold <gingold@adacore.com> + Eric Botcazou <ebotcazou@adacore.com> + + * tree.h (CONSTRUCTOR_NO_CLEARING): Define. + * tree-core.h (CONSTRUCTOR_NO_CLEARING): Document it. + * tree.def (CONSTRUCTOR): Likewise. + * doc/generic.texi (CONSTRUCTOR): Likewise. Update description. + * gimplify.c (gimplify_init_constructor): Do not clear the object when + the constructor is incomplete and CONSTRUCTOR_NO_CLEARING is set. + +2013-11-11 Basile Starynkevitch <basile@starynkevitch.net> + + * toplev.c (toplev_main): Move PLUGIN_FINISH invocation before + diagnostic_finish. + +2013-11-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs): Return after handling + comparisons. + +2013-11-11 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define. + +2013-11-08 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c (mark_threaded_blocks): Truncate jump + threading paths first, then perform PHI node checks if applicable. + +2013-11-10 Karlson2k <k2k@narod.ru> + Kai Tietz <ktietz@redhat.com> + + PR plugin/52872 + * configure.ac: Adding for exported symbols check + and for rdynamic-check executable-extension. + * configure: Regenerated. + +2013-11-10 Uros Bizjak <ubizjak@gmail.com> + + * mode-switching.c (optimize_mode_switching): Mark block as + nontransparent, if last_mode at block exit is different from no_mode. + +2013-11-09 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * function.c (NAME__MAIN): Move to... + * cfgexpand.c (NAME__MAIN): ...here. + +2013-11-09 Richard Sandiford <rdsandiford@googlemail.com> + + * target.def (can_use_doloop_p): New hook. + * doc/tm.texi.in (TARGET_CAN_USE_DOLOOP_P): Add. + * doc/tm.texi: Regenerate. + * doc/md.texi (doloop_begin, doloop_end): Update documentation. + * hooks.h (hook_bool_dint_dint_uint_true): Declare. + * hooks.c (hook_bool_dint_dint_uint_true): New function. + * targhooks.h (can_use_doloop_if_innermost): Declare. + * targhooks.c (can_use_doloop_if_innermost): New function. + * target.h: Include double-int.h. + * loop-doloop.c (doloop_optimize): Call targetm.can_use_doloop_p. + Remove iteration count, maximum iteration count, loop depth and + enter-at-top inputs from doloop_begin and doloop_end. + * config/arc/arc.md (doloop_begin, doloop_end): Update for new + interface. + * config/arc/arc.c (arc_can_use_doloop_p): New function. + (TARGET_CAN_USE_DOLOOP_P): Define. + * config/arm/thumb2.md (doloop_end): Update for new interface. + * config/arm/arm.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/bfin/bfin.md (doloop_end): Update for new interface. + * config/bfin/bfin.c (bfin_can_use_doloop_p): New function. + (TARGET_CAN_USE_DOLOOP_P): Define. + * config/c6x/c6x.md (doloop_end): Update for new interface. + * config/ia64/ia64.md (doloop_end): Update for new interface. + * config/ia64/ia64.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/mep/mep.md (doloop_begin, doloop_end): Update for new + interface. + * config/mep/mep.c (mep_emit_doloop): Likewise. + (TARGET_CAN_USE_DOLOOP_P): Define. + * config/rs6000/rs6000.md (doloop_end): Update for new interface. + * config/rs6000/rs6000.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/s390/s390.md (doloop_end): Update for new interface. + * config/sh/sh.md (doloop_end): Likewise. + * config/spu/spu.md (doloop_end): Likewise. + * config/spu/spu.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/tilegx/tilegx.md (doloop_end): Update for new interface. + * config/tilegx/tilegx.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/tilepro/tilepro.md (doloop_end): Update for new interface. + * config/tilepro/tilepro.c (TARGET_CAN_USE_DOLOOP_P): Define. + * config/v850/v850.md (doloop_begin, doloop_end): Update for new + interface. + * config/v850/v850.c (TARGET_CAN_USE_DOLOOP_P): Define. + +2013-11-08 H.J. Lu <hongjiu.lu@intel.com> + + PR other/59055 + * doc/extend.texi: Move Cilk Plus Builtins node before Other + Builtins node. + +2013-11-08 Andrew MacLeod <amacleod@redhat.com> + Joseph Myers <joseph@codesourcery.com> + + * ginclude/stdatomic.h: New file. + * Makefile.in (USER_H): Add stdatomic.h. + +2013-11-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs): Break after handling + comparisons. + +2013-11-08 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.h (delete_thread_path): Declare. + * tree-ssa-threadupdate.c (delete_thread_path): New function. + (ssa_redirect_edges, thread_block_1): Use it. + (thread_through_loop_header, mark_threaded_blocks): Likewise. + (thread_through_all_blocks, register_jump_thread): Likewise. + * tree-ssa-threadedge.c (thread_across_edge): Likewise. + +2013-11-08 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/aarch-common.c + (search_term): New typedef. + (shift_rtx_costs): New array. + (arm_rtx_shift_left_p): New. + (arm_find_sub_rtx_with_search_term): Likewise. + (arm_find_sub_rtx_with_code): Likewise. + (arm_early_load_addr_dep): Add sanity checking. + (arm_no_early_alu_shift_dep): Likewise. + (arm_no_early_alu_shift_value_dep): Likewise. + (arm_no_early_mul_dep): Likewise. + (arm_no_early_store_addr_dep): Likewise. + +2013-11-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59047 + * tree-predcom.c (ref_at_iteration): Handle bitfield accesses properly. + +2013-11-08 Ilya Enkovich <ilya.enkovich@intel.com> + + * common.opt (fcheck-pointer-bounds): Move to ... + * c-family/c.opt: ... here. + * langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): Remove. + (LANG_HOOKS_INITIALIZER): Remove LANG_HOOKS_CHKP_SUPPORTED. + * langhooks.h (lang_hooks): Remove chkp_supported field. + * toplev.c (process_options): Remove chkp_supported check. + +2013-11-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59038 + PR tree-optimization/58955 + * tree-loop-distribution.c (pg_add_dependence_edges): Revert + previous change. Handle known dependences correctly. + +2013-11-08 Tom de Vries <tom@codesourcery.com> + + * config/rs6000/t-xilinx: Remove duplicate contents. + +2013-11-07 Andrew MacLeod <amacleod@redhat.com> + Joseph Myers <joseph@codesourcery.com> + + * tree-core.h (enum cv_qualifier): Add TYPE_QUAL_ATOMIC. + (enum tree_index): Add TI_ATOMICQI_TYPE, TI_ATOMICHI_TYPE, + TI_ATOMICSI_TYPE, TI_ATOMICDI_TYPE and TI_ATOMICTI_TYPE. + (struct tree_base): Add atomic_flag field. + * tree.h (TYPE_ATOMIC): New accessor macro. + (TYPE_QUALS, TYPE_QUALS_NO_ADDR_SPACE): Add TYPE_QUAL_ATOMIC. + (TYPE_QUALS_NO_ADDR_SPACE_NO_ATOMIC): New macro. + (atomicQI_type_node, atomicHI_type_node, atomicSI_type_node) + (atomicDI_type_node, atomicTI_type_node): New macros for type nodes. + * tree.c (set_type_quals): Set TYPE_ATOMIC. + (find_atomic_core_type): New function. + (build_qualified_type): Adjust alignment for qualified types. + (build_atomic_base): New function + (build_common_tree_nodes): Build atomicQI_type_node, + atomicHI_type_node, atomicSI_type_node, atomicDI_type_node and + atomicTI_type_node. + * print-tree.c (print_node): Print atomic qualifier. + * tree-pretty-print.c (dump_generic_node): Print atomic type attribute. + * target.def (atomic_assign_expand_fenv): New hook. + * doc/tm.texi.in (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New @hook. + * doc/tm.texi: Regenerate. + * targhooks.c (default_atomic_assign_expand_fenv): New function. + * targhooks.h (default_atomic_assign_expand_fenv): Declare. + * sync-builtins.def (__atomic_feraiseexcept): New built-in function. + * config/i386/i386-builtin-types.def (VOID_FTYPE_PUSHORT): New + function type. + * config/i386/i386.c (enum ix86_builtins): Add + IX86_BUILTIN_FNSTENV, IX86_BUILTIN_FLDENV, IX86_BUILTIN_FNSTSW and + IX86_BUILTIN_FNCLEX. + (bdesc_special_args): Add __builtin_ia32_fnstenv, + __builtin_ia32_fldenv, __builtin_ia32_fnstsw and __builtin_ia32_fnclex. + (ix86_expand_builtin): Handle the new built-in functions. + (ix86_atomic_assign_expand_fenv): New function. + (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New macro. + * config/i386/i386.md (UNSPECV_FNSTENV, UNSPECV_FLDENV) + (UNSPECV_FNSTSW, UNSPECV_FNCLEX): New unspecs. + (fnstenv, fldenv, fnstsw, fnclex): New insns. + +2013-11-07 Steve Ellcey <sellcey@mips.com> + + * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add fp64 directory. + * config/mips/t-mti-linux (MULTILIB_OPTIONS): Add -mfp64 flag. + (MULTILIB_DIRNAMES): Add fp64 directory. + (MULTILIB_EXCEPTIONS): Add new exclusions. + +2013-11-07 Aldy Hernandez <aldyh@redhat.com> + + * gimplify.c (gimple_regimplify_operands): Do not set + SSA_NAME_DEF_STMT. + * graphite-sese-to-poly.c (remove_simple_copy_phi): Same. + (rewrite_close_phi_out_of_ssa): Same. + (rewrite_phi_out_of_ssa): Same. + (rewrite_degenerate_phi): Same. + (handle_scalar_deps_crossing_scop_limits): Same. + * tree-if-conv.c (predicate_scalar_phi): Same. + * tree-parloops.c (create_loads_for_reductions): Same. + (create_final_loads_for_reduction): Same. + (create_loads_and_stores_for_name): Same. + (transform_to_exit_first_loop): Same. + (create_parallel_loop): Same. + * tree-ssa-loop-im.c + (move_computations_dom_walker::before_dom_children): Same. + * tree-ssa-loop-manip.c (rewrite_phi_with_iv): Same. + * tree-ssa-pre.c (eliminate_dom_walker::before_dom_children): Same. + * tree-ssa-propagate.c (substitute_and_fold): Same. + * tree-vect-loop.c (vect_finalize_reduction): Same. + * tree-vect-stmts.c (vectorizable_call): Same. + +2013-11-07 Mike Stump <mikestump@comcast.net> + + * config/pdp11/pdp11.c: Include dbxout.h. + * config/picochip/picochip.c: Likewise. + +2013-11-07 Cong Hou <congh@google.com> + + PR tree-optimization/56764 + * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): + Combine alias checks if it is possible to amortize the runtime + overhead. Return the number of alias checks after merging. + * tree-vect-data-refs.c (vect_prune_runtime_alias_test_list): + Use the function vect_create_cond_for_alias_checks () to check + the number of alias checks. + +2013-11-07 Jeff Law <law@redhat.com> + + * varpool.c (ctor_for_folding): Fix typo in comment. + +2013-11-07 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_ifcvt): Use commutativity, e.g.: + reg_a := reg_b + reg_a ==> reg_a := reg_a + reg_b + +2013-11-07 Jeff Law <law@redhat.com> + + * doc/invoke.texi (-fisolate-erroneous-paths): Document. + + * gimple-ssa-isolate-paths.c (gate_isolate_erroneous_paths): + No longer check if we have __builtin_trap, assume it's available. + +2013-11-07 Diego Novillo <dnovillo@google.com> + + * attribs.c (lookup_scoped_attribute_spec): Make static. + (get_attribute_namespace): Likewise. + * builtins.c (more_const_call_expr_args_p): Move from tree.h. + (validate_arglist): Move earlier in the file. Make static. + (expand_stack_restore): Move from stmt.c + (expand_stack_save): Move from stmt.c + (rewrite_call_expr_array): Move earlier in the file. + (rewrite_call_expr_valist): Likewise. + * cfgexpand.c: Include hard-reg-set.h before tree.h + Include recog.h. + Include output.h. + (expand_asm_loc): Move from stmt.c. + (n_occurrences): Move from stmt.c. + (check_operand_nalternatives): Move from stmt.c. + (tree_conflicts_with_clobbers_p): Move from stmt.c. + (expand_asm_operands): Move from stmt.c + (expand_asm_stmt): Move from stmt.c + (expand_computed_goto): Move from stmt.c + (expand_goto): Move from stmt.c + (expand_null_return_1): Move from stmt.c + (expand_null_return): Move from stmt.c + (expand_value_return): Move from stmt.c + (expand_return): Move from stmt.c + (expand_main_function): Move from function.c + (stack_protect_prologue): Move from function.c + * cgraphclones.c (build_function_type_skip_args): Move from tree.c. + (build_function_decl_skip_args): Move from tree.c. + * explow.c (tree_expr_size): Move from tree.c. + * expr.c (addr_expr_of_non_mem_decl_p): Remove. + (fields_length): Move from tree.c. + * fold-const.c (size_low_cst): Move from tree.c. + (tree_expr_nonzero_warnv_p): Make static. Move earlier in the file. + (tree_expr_nonzero_p): Make static. Move earlier in the file. + (fold_build3_initializer_loc): Remove. + (tree_invalid_nonnegative_warnv_p): Make static. + * function.c (expand_main_function): Move to cfgexpand.c. + (stack_protect_prologue): Move to cfgexpand.c. + (set_insn_locations): Move earlier in the file. + * gimple-fold.c: Include langhooks.h. + (truth_type_for): Move from tree.c. + * print-tree.c (print_vec_tree): Remove. + * stmt.c (expand_computed_goto): Move to cfgexpand.c. + (expand_goto): Move to cfgexpand.c. + (n_occurrences): Move to cfgexpand.c. + (expand_asm_loc): Move to cfgexpand.c + (tree_conflicts_with_clobbers_p): Move to cfgexpand.c. + (expand_asm_operands): Move to cfgexpand.c. + (expand_asm_stmt): Move to cfgexpand.c. + (check_operand_nalternatives): Move to cfgexpand.c + (expand_null_return): Move to cfgexpand.c. + (expand_value_return): Move to cfgexpand.c. + (expand_null_return_1): Move to cfgexpand.c. + (expand_return): Move to cfgexpand.c. + (expand_stack_save): Move to builtins.c. + (expand_stack_restore): Move to builtins.c + * symtab.c: Include output.h. + (decl_assembler_name_hash): Move from tree.c. + (decl_assembler_name_equal): Move from tree.c. + * trans-mem.c (is_tm_safe_or_pure): Move from tree.h. + * tree-eh.c (in_array_bounds_p): Move from tree.c. + (range_in_array_bounds_p): Move from tree.c. + * tree-object-size.c (fini_object_sizes): Make static. + * tree-ssa-dom.c (iterative_hash_exprs_commutative): Move from tree.h. + * tree-vrp.c (ssa_name_nonnegative_p): Remove. + * tree.c (decl_assembler_name_equal): Move to symtab.c. + (tree_expr_size): Move to explow.c. + (decl_assembler_name_hash): Move to symtab.c. + (real_twop): Remove. + (tree_expr_size): Move to explow.c. + (stabilize_reference_1): Move earlier in the file. Make static. + (omp_remove_redundant_declare_simd_attrs): Remove. + (simple_cst_list_equal): Move earlier in the file. Make static. + (size_low_cst): Move to fold-const.c. + (build_type_no_quals): Remove. + (build_function_type_skip_args): Move to cgraphclones.c. + (build_function_decl_skip_args): Move to cgraphclones.c. + (in_array_bounds_p): Move to tree-eh.c. + (range_in_array_bounds_p): Move to tree-eh.c. + (truth_type_for): Move to gimple-fold.c. + (list_equal_p): Remove. + * tree.h (decl_assembler_name_equal): Remove. + (decl_assembler_name_hash): Remove. + (truth_type_for): Remove. + (build_type_no_quals): Remove. + (build_function_decl_skip_args): Remove. + (in_array_bounds_p): Remove. + (range_in_array_bounds_p): Remove. + (size_low_cst): Remove. + (omp_remove_redundant_declare_simd_attrs): Remove. + (tree_expr_size): Remove. + (fields_length): Remove. + (stabilize_reference_1): Remove. + (expand_goto): Remove. + (expand_stack_save): Remove. + (expand_stack_restore): Remove. + (expand_return): Remove. + (fold_build3_initializer_loc): Remove. + (tree_expr_nonzero_p): Remove. + (tree_invalid_nonnegative_warnv_p): Remove. + (tree_expr_nonzero_warnv_p): Remove. + (fold_builtin_snprintf_chk): Remove. + (validate_arglist): Remove. + (iterative_hash_exprs_commutative): Move to tree-ssa-dom.c. + (simple_cst_list_equal): Remove. + (real_twop): Remove. + (expand_main_function): Remove. + (stack_protect_prologue): Remove. + (print_vec_tree): Remove. + (lookup_scoped_attribute_spec): Remove. + (get_attribute_namespace): Remove. + (expand_computed_goto): Remove. + (expand_asm_stmt): Remove. + (list_equal_p): Remove. + (ssa_name_nonnegative_p): Remove. + (fini_object_sizes): Remove. + (addr_expr_of_non_mem_decl_p): Remove. + (is_tm_safe_or_pure): Move to trans-mem.c. + (more_const_call_expr_args_p): Remove. + (save_vtable_map_decl): Remove. + +2013-11-07 Thomas Schwinge <thomas@codesourcery.com> + + * doc/sourcebuild.texi (Top Level) <lto-plugin>: GNU ld can use + linker plugins, too. + + * config/arc/arc.h (LINK_COMMAND_SPEC): For -ftree-parallelize-loops=*, + link to libgomp and its dependencies. + * config/ia64/hpux.h (LIB_SPEC): Likewise. + * config/pa/pa-hpux11.h (LIB_SPEC): Likewise. + * config/pa/pa64-hpux.h (LIB_SPEC): Likewise. + * gcc.c (GOMP_SELF_SPECS): Update comment about libgomp's dependencies. + +2013-11-07 Jakub Jelinek <jakub@redhat.com> + + * tree-ssa-loop-niter.c: Include tree-ssanames.h. + (determine_value_range): Add loop argument. Use get_range_info to + improve range. + (bound_difference): Adjust caller. + +2013-11-07 Richard Biener <rguenther@suse.de> + Jakub Jelinek <jakub@redhat.com> + + * tree-vrp.c (find_assert_locations): Pre-seed live bitmaps for loop + latches from header PHI arguments from the latch edge. + +2013-11-07 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58176 + * varasm.c (output_constant): Handle NULLPTR_TYPE. + +2013-11-07 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (ix86_expand_set_or_movmem): Don't set + misaligned_prologue_used when it has been set. + +2013-11-07 Yury Gribov <y.gribov@samsung.com> + Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/59029 + * asan.c (get_mem_refs_of_builtin_call): Allow + integer literals as addresses in instrumented builtins. + +2013-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (aarch64_legitimize_reload_address): + Explain why plus_constant is not used. + +2013-11-07 Richard Biener <rguenther@suse.de> + + * tree-ssa-ccp.c (canonicalize_float_value): Rename to ... + (canonicalize_value): ... this. Also handle stripping of + TREE_OVERFLOW. + (get_value, set_lattice_value, get_value_for_expr): Adjust. + * gimple-fold.c (canonicalize_constructor_val): Strip TREE_OVERFLOW. + * tree-ssa-threadedge.c (set_ssa_name_value): Likewise. + +2013-11-07 Richard Biener <rguenther@suse.de> + + * tree-dfa.c (get_ref_base_and_extent): Fix casting. + +2013-11-07 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59034 + * config/i386/i386.md (push peepholer/splitter): Use Pmode + with stack_pointer_rtx. + +2013-11-07 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (get_shiftadd_cost): Check equality + using operand_equal_p. + +2013-11-07 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (alloc_iv): Lower address expressions. + * tree-affine.c (get_inner_reference_aff): Return base. + * tree-affine.h (get_inner_reference_aff): Change prototype. + +2013-11-06 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (Wdate-time): Fix typo. + +2013-11-06 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.md (addsf3, divsf3, divsf3_i, rsqrtsf2, cmpgtdf_t, + cmpeqdf_t, *ieee_ccmpeqdf_t, negdf2, sqrtdf2, absdf2): Use + fp_arith_reg_operand instead of arith_reg_operand. + +2013-11-06 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.md (adddi3): Remove empty constraints. + Remove can_create_pseudo_p and arith_reg_operand check. + (adddi3_compact, subdi3_compact, *negdi2): Remove constraints. + Split before reload. + +2013-11-06 Jeff Law <law@redhat.com> + Tom Tromey <tromey@redhat.com> + + * gdbinit.in: Disable strict type checking. + +2013-11-06 Vladimir Makarov <vmakarov@redhat.com> + + * tree-pass.h (make_pass_live_range_shrinkage): New external. + * timevar.def (TV_LIVE_RANGE_SHRINKAGE): New. + * sched-rgn.c (gate_handle_live_range_shrinkage): New. + (rest_of_handle_live_range_shrinkage): Ditto + (class pass_live_range_shrinkage): Ditto. + (pass_data_live_range_shrinkage): Ditto. + (make_pass_live_range_shrinkage): Ditto. + * sched-int.h (initialize_live_range_shrinkage): New prototype. + (finish_live_range_shrinkage): Ditto. + * sched-deps.c (create_insn_reg_set): Make void return value. + * passes.def: Add pass_live_range_shrinkage. + * ira.c (update_equiv_regs): Don't move if flag_live_range_shrinkage. + * haifa-sched.c (live_range_shrinkage_p): New. + (initialize_live_range_shrinkage, finish_live_range_shrinkage): + New functions. + (rank_for_schedule): Add code for pressure relief through live + range shrinkage. + (schedule_insn): Print more debug info. + (sched_init): Setup SCHED_PRESSURE_WEIGHTED for pressure relief + through live range shrinkage. + * doc/invoke.texi (-flive-range-shrinkage): New. + * common.opt (flive-range-shrinkage): New. + +2013-11-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/59021 + * config/i386/i386.c (ix86_avx_u128_mode_needed): Require + AVX_U128_DIRTY mode for call_insn RTXes that use AVX256 registers. + (ix86_avx_u128_mode_needed): Return AVX_U128_DIRTY mode for call_insn + RTXes that return in AVX256 register. + +2013-11-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58653 + * tree-predcom.c (ref_at_iteration): Rewrite to generate a MEM_REF. + (prepare_initializers_chain): Adjust. + +2013-11-06 Andrew MacLeod <amacleod@redhat.com> + + * gimple.h (block_in_transaction): Move to basic-block.h and rename. + (gimple_in_transaction): Use bb_in_transaction. + * basic-block.h (bb_in_transaction): Relocate here and rename. + * tree-ssa-loop-im.c (execute_sm): Use bb_in_transaction. + +2013-11-06 Richard Biener <rguenther@suse.de> + + * tree.c (drop_tree_overflow): New function. + * tree.h (drop_tree_overflow): Declare. + * gimplify.c (gimplify_expr): Drop TREE_OVERFLOW. + * tree-vrp.c (range_int_cst_singleton_p): Use + is_overflow_infinity instead of testing TREE_OVERFLOW. + (extract_range_from_assert): Likewise. + (zero_nonzero_bits_from_vr): Likewise. + (extract_range_basic): Likewise. + (register_new_assert_for): Use drop_tree_overflow. + (vrp_visit_phi_node): Likewise. + +2013-11-06 Eric Botcazou <ebotcazou@adacore.com> + + * config/i386/i386.c (ix86_expand_prologue): Optimize stack + checking for leaf functions without dynamic stack allocation. + * config/ia64/ia64.c (ia64_emit_probe_stack_range): Adjust. + (ia64_expand_prologue): Likewise. + * config/mips/mips.c (mips_expand_prologue): Likewise. + * config/rs6000/rs6000.c (rs6000_emit_prologue): Likewise. + * config/sparc/sparc.c (sparc_expand_prologue): Likewise. + (sparc_flat_expand_prologue): Likewise. + +2013-11-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (__ST2_LANE_FUNC): Better model data size. + (__ST3_LANE_FUNC): Likewise. + (__ST4_LANE_FUNC): Likewise. + +2013-11-06 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Define the + name returned by msp430_mcu_name. + (LIB_SPEC): If a -T option has not been specified then set a + default, mcu-specific, linker script. + * config/msp430/t-msp430 (MULTILIB_MATCHES): Add more mcu names. + * config/msp430/msp430.c (msp430x_names): Likewise. + Alpha sort the names for ease of comparison. + (msp430_mcu_name): New function: Returns a string suitable for + use as a C preprocessor symbol based upon the name of the MCU + being targeted. + (msp430_option_override): Accept msp430x and msp430xv2 as generic + mcu names. + * config/msp430/msp430-protos.h (msp430_mcu_name): Prototype. + + * gcc.c (do_spec_1): Do not insert a space after a %* substitution + unless it is the last part of a spec substring. + * doc/invoke.texi (Spec Files): Document space insertion + behaviour of %*. + +2013-11-06 Christian Bruel <christian.bruel@st.com> + + * config/sh/sh-mem.cc (sh_expand_cmpnstr, sh_expand_cmpstr): + Factorize probabilities, Use adjust_address instead of + adjust_automodify_address when possible. Enable for optimize. + (sh_expand_strlen): New function. + * config/sh/sh-protos.h (sh_expand_strlen): Declare. + * config/sh/sh.md (strlensi): New pattern. + (UNSPEC_BUILTIN_STRLEN): Define. + +2013-11-06 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58970 + * expr.c (get_bit_range): Handle *offset == NULL_TREE. + (expand_assignment): If *bitpos is negative, set *offset + and adjust *bitpos, so that it is not negative. + +2013-11-06 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/bdver3.md : Added two additional decoder units + to support issue rate of 4 and remodeled vector unit. + * config/i386/i386.c (ix86_issue_rate): Issue rate for BD + architectures is set to 4. + * config/i386/i386.c (ia32_multipass_dfa_lookahead): DFA + lookahead is set to 4 for BD architectures. + +2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): + Remove restriction against use of VSX instructions when generating + code for little endian mode. + +2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (mulv4si3): Ensure we generate vmulouh + for both big and little endian. + (mulv8hi3): Swap input operands for merge high and merge low + instructions for little endian. + +2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (vec_widen_umult_even_v16qi): Change + define_insn to define_expand that uses even patterns for big + endian and odd patterns for little endian. + (vec_widen_smult_even_v16qi): Likewise. + (vec_widen_umult_even_v8hi): Likewise. + (vec_widen_smult_even_v8hi): Likewise. + (vec_widen_umult_odd_v16qi): Likewise. + (vec_widen_smult_odd_v16qi): Likewise. + (vec_widen_umult_odd_v8hi): Likewise. + (vec_widen_smult_odd_v8hi): Likewise. + (altivec_vmuleub): New define_insn. + (altivec_vmuloub): Likewise. + (altivec_vmulesb): Likewise. + (altivec_vmulosb): Likewise. + (altivec_vmuleuh): Likewise. + (altivec_vmulouh): Likewise. + (altivec_vmulesh): Likewise. + (altivec_vmulosh): Likewise. + +2013-11-05 Mike Stump <mikestump@comcast.net> + + * Makefile.in (mostlyclean): Remove c-family objects. + +2013-11-05 Ian Lance Taylor <iant@google.com> + + * config/i386/sync.md (atomic_compare_and_swap<dwi>_doubleword): + If possible, add .cfi directives to record change to bx. + * config/i386/i386.c (ix86_emit_cfi): New function. + * config/i386/i386-protos.h (ix86_emit_cfi): Declare. + +2013-11-05 Steven Bosscher <steven@gcc.gnu.org> + + * rtlanal.c (tablejump_p): Expect a JUMP_TABLE_DATA to always follow + immediately after a label for a tablejump pattern. + + * config/arm/arm.c (is_jump_table): Remove. + (create_fix_barrier): Use tablejump_p instead. + (arm_reorg): Likewise. + (thumb1_output_casesi): Expect JUMP_TABLE_DATA to always be NEXT_INSN. + (thumb2_output_casesi): Likewise. + * config/aarch64/aarch64.c (aarch64_output_casesi): Likewise. + * config/sh/sh.md (casesi_worker_1, casesi_worker_2, + casesi_shift_media, casesi_load_media): Likewise. + * config/iq2000/iq2000.md: Likewise (in anonymous define_insn). + * config/microblaze/microblaze.md: Likewise. + +2013-11-05 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-Wdate-time): Document. + +2013-11-05 Richard Sandiford <rdsandiford@googlemail.com> + + * double-int.c (lshift_double, rshift_double): Remove + SHIFT_COUNT_TRUNCATED handling. + +2013-11-05 Jeff Law <law@redhat.com> + + * Makefile.in (OBJS): Add gimple-ssa-isolate-paths.o + * common.opt (-fisolate-erroneous-paths): Add option and documentation. + * gimple-ssa-isolate-paths.c: New file. + * gimple.c (check_loadstore): New function. + (infer_nonnull_range): Moved into gimple.c from tree-vrp.c + Verify OP is in the argument list and the argument corresponding + to OP is a pointer type. Use operand_equal_p rather than + pointer equality when testing if OP is on the nonnull list. + Use check_loadstore rather than count_ptr_derefs. Handle + GIMPLE_RETURN statements. + * tree-vrp.c (infer_nonnull_range): Remove. + * gimple.h (infer_nonnull_range): Declare. + * opts.c (default_options_table): Add OPT_fisolate_erroneous_paths. + * passes.def: Add pass_isolate_erroneous_paths. + * timevar.def (TV_ISOLATE_ERRONEOUS_PATHS): New timevar. + * tree-pass.h (make_pass_isolate_erroneous_paths): Declare. + * tree-ssa.c (struct count_ptr_d): Remove. + (count_ptr_derefs, count_uses_and_derefs): Remove. + * tree-ssa.h (count_uses_and_derefs): Remove. + +2013-11-05 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58997 + * loop-iv.c (iv_subreg): For IV_UNKNOWN_EXTEND, expect + get_iv_value to be in iv->mode rather than iv->extend_mode. + (iv_extend): Likewise. Otherwise, if iv->extend != extend, + use lowpart_subreg on get_iv_value before calling simplify_gen_unary. + * loop-unswitch.c (may_unswitch_on): Make sure op[i] is in the right + mode. + +2013-11-05 Andrew MacLeod <amacleod@redhat.com> + + * gimple.h: Move some prototypes to gimple-expr.h and add to include + list. + (extract_ops_from_tree, gimple_call_addr_fndecl, is_gimple_reg_type): + Move to gimple-expr.h. + * gimple-expr.h: New file. Relocate some prototypes from gimple.h. + (types_compatible_p, is_gimple_reg_type, is_gimple_variable, + is_gimple_id, virtual_operand_p, is_gimple_addressable, + is_gimple_constant, extract_ops_from_tree, gimple_call_addr_fndecl): + Relocate here. + * gimple.c (extract_ops_from_tree_1, gimple_cond_get_ops_from_tree, + gimple_set_body, gimple_body, gimple_has_body_p, is_gimple_lvalue, + is_gimple_condexpr, is_gimple_addressable, is_gimple_constant, + is_gimple_address, is_gimple_invariant_address, + is_gimple_ip_invariant_address, is_gimple_min_invariant, + is_gimple_ip_invariant, is_gimple_variable, is_gimple_id, + virtual_operand_p, is_gimple_reg, is_gimple_val, is_gimple_asm_val, + is_gimple_min_lval, is_gimple_call_addr, is_gimple_mem_ref_addr, + gimple_decl_printable_name, useless_type_conversion_p, + types_compatible_p, gimple_can_coalesce_p, copy_var_decl): Move to + gimple-expr.[ch]. + * gimple-expr.c: New File. + (useless_type_conversion_p, gimple_set_body, gimple_body, + gimple_has_body_p, gimple_decl_printable_name, copy_var_decl, + gimple_can_coalesce_p, extract_ops_from_tree_1, + gimple_cond_get_ops_from_tree, is_gimple_lvalue, is_gimple_condexpr, + is_gimple_address, is_gimple_invariant_address, + is_gimple_ip_invariant_address, is_gimple_min_invariant, + is_gimple_ip_invariant, is_gimple_reg, is_gimple_val, + is_gimple_asm_val, is_gimple_min_lval, is_gimple_call_addr, + is_gimple_mem_ref_addr): Relocate here. + * Makefile.in (OBJS): Add gimple-expr.o. + +2013-11-05 David Malcolm <dmalcolm@redhat.com> + + * gengtype-parse.c (struct_field_seq): Support empty structs. + +2013-11-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos. + +2013-11-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386-c.c (ix86_target_macros): Define _SOFT_FLOAT + for !TARGET_80387. + * config/i386/rtemself.h (TARGET_OS_CPP_BUILTINS): Do not define + _SOFT_FLOAT here. + (LONG_DOUBLE_TYPE_SIZE): New define. + (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Ditto. + +2013-11-05 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58724 + * doc/extend.texi [visibility ("visibility_type")]: Add example + about visibility attribute on namespace declaration. + +2013-11-05 Richard Biener <rguenther@suse.de> + + PR ipa/58492 + * passes.def (all_passes): Start with pass_fixup_cfg again. + +2013-11-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58955 + * tree-loop-distribution.c (pg_add_dependence_edges): Fix + edge direction. + +2013-11-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (vec_pack_sfix_trunc_v2df): Adjust for + little endian. + (vec_pack_ufix_trunc_v2df): Likewise. + +2013-11-05 H.J. Lu <hongjiu.lu@intel.com> + + PR middle-end/58981 + * doc/md.texi (@code{movmem@var{m}}): Specify Pmode as mode of + pattern, instead of word_mode. + + * expr.c (emit_block_move_via_movmem): Don't use mode wider than + Pmode for size. + (set_storage_via_setmem): Likewise. + +2013-11-05 Andrew MacLeod <amacleod@redhat.com> + + * tree-outof-ssa.c (queue_phi_copy_p): Combine phi_ssa_name_p from + gimple.h and the rest of the condition in eliminate_build. + (eliminate_build): Call new routine. + * gimple.h (phi_ssa_name_p): Delete. + +2013-11-05 Trevor Saunders <tsaunders@mozilla.com> + + * vec.c (vec_prefix::calculate_allocation): Don't try to handle the + case of no prefix and reserving zero slots, because when that's the + case we'll never get here. + * vec.h (va_heap::reserve): Don't try and handle + vec_prefix::calculate_allocation returning zero because that should + never happen. + +2013-11-05 Richard Biener <rguenther@suse.de> + + PR middle-end/58941 + * tree-dfa.c (get_ref_base_and_extent): Merge common code + in MEM_REF and TARGET_MEM_REF handling. Make sure to + process trailing array detection before diving into the + view-converted object (and possibly apply some extra offset). + +2013-11-05 Joseph Myers <joseph@codesourcery.com> + + * config/i386/i386.c (ix86_float_exceptions_rounding_supported_p): + New function. + (TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): Define. + +2013-11-05 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/58958 + * tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Use + get_addr_base_and_unit_offset instead of get_ref_base_and_extent. + +2013-11-05 Marc Glisse <marc.glisse@inria.fr> + + * tree-ssa-alias.h (ranges_overlap_p): Handle negative offsets. + * tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Likewise. + +2013-11-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58984 + * ipa-prop.c (ipa_load_from_parm_agg_1): Add SIZE_P argument, + set *SIZE_P if non-NULL on success. + (ipa_load_from_parm_agg, ipa_analyze_indirect_call_uses): Adjust + callers. + (ipcp_transform_function): Likewise. Punt if size of access + is different from TYPE_SIZE on v->value's type. + +2013-11-05 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-fopenmp-simd): Document new option. + * gimplify.c (gimplify_body): Accept -fopenmp-simd. + * omp-low.c (execute_expand_omp, execute_lower_omp): Ditto. + * tree.c (attribute_value_equal): Ditto. + +2013-11-04 Wei Mi <wmi@google.com> + + * sched-rgn.c (add_branch_dependences): Keep insns in + a SCHED_GROUP at the end of BB to remain their location. + +2013-11-04 Wei Mi <wmi@google.com> + + * config/i386/i386.c (memory_address_length): Extract a part + of code to rip_relative_addr_p. + (rip_relative_addr_p): New Function. + (ix86_macro_fusion_p): Ditto. + (ix86_macro_fusion_pair_p): Ditto. + * config/i386/i386.h: Add new tune features about macro-fusion. + * config/i386/x86-tune.def (DEF_TUNE): Ditto. + * doc/tm.texi: Generated. + * doc/tm.texi.in: Ditto. + * haifa-sched.c (try_group_insn): New Function. + (group_insns_for_macro_fusion): Ditto. + (sched_init): Call group_insns_for_macro_fusion. + * target.def: Add two hooks: macro_fusion_p and + macro_fusion_pair_p. + +2013-11-04 Kostya Serebryany <kcc@google.com> + + Update to match the changed asan API. + * asan.c (asan_function_start): New function. + (asan_emit_stack_protection): Update the string stored in the + stack red zone to match new API. Store the PC of the current + function in the red zone. + (asan_global_struct): Update the __asan_global definition to match + the new API. + (asan_add_global): Ditto. + * asan.h (asan_function_start): New prototype. + * final.c (final_start_function): Call asan_function_start. + * sanitizer.def (BUILT_IN_ASAN_INIT): Rename __asan_init_v1 + to __asan_init_v3. + +2013-11-04 Wei Mi <wmi@google.com> + + * config/i386/i386-c.c (ix86_target_macros_internal): Separate + PROCESSOR_COREI7_AVX out from PROCESSOR_COREI7. + * config/i386/i386.c (ix86_option_override_internal): Ditto. + (ix86_issue_rate): Ditto. + (ix86_adjust_cost): Ditto. + (ia32_multipass_dfa_lookahead): Ditto. + (ix86_sched_init_global): Ditto. + (get_builtin_code_for_version): Ditto. + * config/i386/i386.h (enum target_cpu_default): Ditto. + (enum processor_type): Ditto. + * config/i386/x86-tune.def (DEF_TUNE): Ditto. + +2013-11-04 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/58967 + * config/rs6000/rs6000.c (legitimate_lo_sum_address_p): Remove + !lra_in_progress for mode sizes bigger word. + +2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (vec_widen_umult_hi_v16qi): Swap + arguments to merge instruction for little endian. + (vec_widen_umult_lo_v16qi): Likewise. + (vec_widen_smult_hi_v16qi): Likewise. + (vec_widen_smult_lo_v16qi): Likewise. + (vec_widen_umult_hi_v8hi): Likewise. + (vec_widen_umult_lo_v8hi): Likewise. + (vec_widen_smult_hi_v8hi): Likewise. + (vec_widen_smult_lo_v8hi): Likewise. + +2013-11-04 Ian Lance Taylor <iant@google.com> + + * builtins.def (ATTR_NOTHROWCALL_LEAF_LIST): Define. + * sync-builtins.def: Use ATTR_NOTHROWCALL_LEAF_LIST for all sync + builtins that take pointers. + * lto-opts.c (lto_write_options): Write -fnon-call-exceptions if set. + * lto-wrapper.c (merge_and_complain): Collect OPT_fnon_call_exceptions. + (run_gcc): Pass -fnon-call-exceptions. + +2013-11-04 Jakub Jelinek <jakub@redhat.com> + + * optabs.c (expand_vec_perm): Revert one incorrect line from + 2013-10-31 change. + + PR tree-optimization/58978 + * tree-vrp.c (all_imm_uses_in_stmt_or_feed_cond): Don't modify + use_stmt by single_imm_use directly. Only call single_imm_use + on SSA_NAMEs. + +2013-11-04 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/58968 + * lra-spills.c (return_regno_p): New function. + (lra_final_code_change): Use it. + +2013-11-04 Joseph Myers <joseph@codesourcery.com> + + * doc/cpp.texi (__GCC_IEC_559, __GCC_IEC_559_COMPLEX): Document macros. + * target.def (float_exceptions_rounding_supported_p): New hook. + * targhooks.c (default_float_exceptions_rounding_supported_p): New + function. + * targhooks.h (default_float_exceptions_rounding_supported_p): Declare. + * doc/tm.texi.in (TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): + New @hook. + * doc/tm.texi: Regenerate. + * config.gcc (powerpc*-*-linux*): Set extra_objs. + * config/rs6000/rs6000-linux.c: New file. + * config/rs6000/rs6000-protos.h + (rs6000_linux_float_exceptions_rounding_supported_p): Declare. + * config/rs6000/linux.h + (TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): New macro. + * config/rs6000/linux64.h + (TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): Likewise. + * config/rs6000/t-linux (rs6000-linux.o): New rule. + * config/rs6000/t-linux64 (rs6000-linux.o): Likewise. + +2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vsx.md (*vsx_le_perm_store_<mode> for VSX_D): + Replace the define_insn_and_split with a define_insn and two + define_splits, with the split after reload re-permuting the source + register to its original value. + (*vsx_le_perm_store_<mode> for VSX_W): Likewise. + (*vsx_le_perm_store_v8hi): Likewise. + (*vsx_le_perm_store_v16qi): Likewise. + +2013-11-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (vec_pack_trunc_v2df): Adjust for + little endian. + +2013-11-04 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58946 + * tree-ssa-reassoc.c (maybe_optimize_range_tests): Update all + bbs with bbinfo[idx].op != NULL before all blocks with + bbinfo[idx].op == NULL. + +2013-11-04 Richard Sandiford <rdsandiford@googlemail.com> + + * config/avr/avr-log.c (avr_double_int_pop_digit): Delete. + (avr_dump_double_int_hex): Likewise. + (avr_log_vadump): Remove %D and %X handling. + * config/avr/avr.c (avr_double_int_push_digit): Delete. + (avr_map_op_t): Change map from double_int to unsigned int. + (avr_map_op): Update accordingly. + (avr_map, avr_map_metric, avr_has_nibble_0xf, avr_map_decompose) + (avr_move_bits, avr_out_insert_bits, avr_fold_builtin): Operate on + unsigned ints rather than double_ints. + +2013-11-03 Marek Polacek <polacek@redhat.com> + + Implement -fsanitize=vla-bound. + * opts.c (common_handle_option): Handle vla-bound. + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_VLA_BOUND_NOT_POSITIVE): Define. + * flag-types.h (enum sanitize_code): Add SANITIZE_VLA. + * asan.c (initialize_sanitizer_builtins): Build BT_FN_VOID_PTR_PTR. + +2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for + little endian. + +2013-11-02 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/constraints.md (Ts, Tv): New address constrains. + * config/i386/i386.md (*lea<mode>, *<mode>_<bndcheck>): Use Ts + constraint for address_no_seg_operand. + * config/i386/sse.md (*avx512pf_gatherpf<mode>_mask) + (*avx512pf_gatherpf<mode>, *avx512pf_scatterpf<mode>_mask) + (*avx512pf_scatterpf<mode>, *avx2_gathersi<mode>) + (*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>_2) + (*avx2_gatherdi<mode>_3, *avx2_gatherdi<mode>_4) + (*avx512f_gathersi<mode>, *avx512f_gathersi<mode>_2) + (*avx512f_gatherdi<mode>, *avx512f_gatherdi<mode>_2) + (*avx512f_scattersi<mode> *avx512f_scatterdi<mode>): Use Tv + constraint for vsib_address_operand. + +2013-11-02 Steven Bosscher <steven@gcc.gnu.org> + + * gcse.c (pre_delete): Remove references to regmove from comments. + * recog.c: (validate_replace_rtx_1): Likewise. + * config/rl78/rl78.c: Likewise. + * config/v850/v850.h: Likewise, and remove unused ENABLE_REGMOVE_PASS. + * common/config/m32r/m32r-common.c: Don't manipulate OPT_fregmove. + * common/config/mmix/mmix-common.c: Likewise. + +2013-11-01 Trevor Saunders <tsaunders@mozilla.com> + + * function.c (reorder_blocks): Convert block_stack to a stack_vec. + * gimplify.c (gimplify_compound_lval): Likewise. + * graphite-clast-to-gimple.c (gloog): Likewise. + * graphite-dependences.c (loop_is_parallel_p): Likewise. + * graphite-scop-detection.c (scopdet_basic_block_info): Likewise. + (limit_scop); Likewise. + (build_scops): Likewise. + (dot_scop): Likewise. + * graphite-sese-to-poly.c (sese_dom_walker): Likewise. + (build_scop_drs): Likewise. + (insert_stmts): Likewise. + (insert_out_of_ssa_copy): Likewise. + (remove_phi): Likewise. + (rewrite_commutative_reductions_out_of_ssa_close_phi): Likewise. + * hw-doloop.c (discover_loop): Likewise. + * tree-call-cdce.c (shrink_wrap_one_built_in_call): Likewise. + * tree-dfa.c (dump_enumerated_decls): Likewise. + * tree-if-conv.c (if_convertable_loop_p): Likewise. + * tree-inline.c (tree_function_versioning): Likewise. + * tree-loop-distribution.c (build_rdg): Likewise. + (rdg_flag_vertex_and_dependent): Likewise. + (distribute_loop): Likewise. + * tree-parloops.c (loop_parallel_p): Likewise. + (eliminate_local_variables): Likewise. + (separate_decls_in_region): Likewise. + * tree-predcom.c (tree_predictive_commoning_loop): Likewise. + * tree-ssa-phiopt.c (cond_if_else_store_replacement): Likewise. + * tree-ssa-uncprop.c (uncprop_dom_walker): Likewise. + * tree-vect-loop.c (vect_analyze_scaler_cycles_1): Likewise. + * tree-vect-patterns.c (vect_pattern_recog): Likewise. + * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise. + (vectorizable_condition): Likewise. + +2013-11-01 Uros Bizjak <ubizjak@gmail.com> + + * configure.ac (HAVE_AS_IX86_INTERUNIT_MOVQ): Always define as 0/1. + * configure: Regenerate. + * config/i386/i386.md (*movdi_internal): Change + HAVE_AS_IX86_INTERUNIT_MOVQ to runtime check. + (*movdf_internal): Ditto. + * config/i386/mmx.md (*mov<mode>_internal): Ditto. + * config/i386/sse.md (vec_concatv2di): Output interunit movq + for HAVE_AS_IX86_INTERUNIT_MOVQ targets. + +2013-10-31 Robert Suchanek <Robert.Suchanek@imgtec.com> + + * lra-spills.c (assign_spill_hard_regs): Remove statement terminator + after comment. + +2013-10-31 David Malcolm <dmalcolm@redhat.com> + + Automated part of renaming of symtab_node_base to symtab_node. + + Patch autogenerated by rename_symtab.py from + https://github.com/davidmalcolm/gcc-refactoring-scripts + revision 58bb219cc090b2f4516a9297d868c245495ee622 + with ChangeLog entry fixed up by hand. + + * cgraph.c (x_cgraph_nodes_queue): Rename symtab_node_base to + symtab_node. + (cgraph_node_for_asm): Likewise. + * cgraph.h (symtab_node_base): Likewise. + (cgraph_node): Likewise. + (varpool_node): Likewise. + (is_a_helper <cgraph_node>::test): Likewise. + (is_a_helper <varpool_node>::test): Likewise. + (symtab_nodes): Likewise. + (symtab_register_node): Likewise. + (symtab_unregister_node): Likewise. + (symtab_remove_node): Likewise. + (symtab_get_node): Likewise. + (symtab_node_for_asm): Likewise. + (symtab_node_asm_name): Likewise. + (symtab_node_name): Likewise. + (symtab_insert_node_to_hashtable): Likewise. + (symtab_add_to_same_comdat_group): Likewise. + (symtab_dissolve_same_comdat_group_list): Likewise. + (dump_symtab_node): Likewise. + (debug_symtab_node): Likewise. + (dump_symtab_base): Likewise. + (verify_symtab_node): Likewise. + (verify_symtab_base): Likewise. + (symtab_used_from_object_file_p): Likewise. + (symtab_alias_ultimate_target): Likewise. + (symtab_resolve_alias): Likewise. + (fixup_same_cpp_alias_visibility): Likewise. + (symtab_for_node_and_aliases): Likewise. + (symtab_nonoverwritable_alias): Likewise. + (availability symtab_node_availability): Likewise. + (symtab_semantically_equivalent_p): Likewise. + (fixup_same_cpp_alias_visibility): Likewise. + (symtab_prevail_in_asm_name_hash): Likewise. + (cgraph): Likewise. + (varpool): Likewise. + (varpool_first_variable): Likewise. + (varpool_next_variable): Likewise. + (varpool_first_static_initializer): Likewise. + (varpool_next_static_initializer): Likewise. + (varpool_first_defined_variable): Likewise. + (varpool_next_defined_variable): Likewise. + (cgraph_first_defined_function): Likewise. + (cgraph_next_defined_function): Likewise. + (cgraph_first_function): Likewise. + (cgraph_next_function): Likewise. + (cgraph_first_function_with_gimple_body): Likewise. + (cgraph_next_function_with_gimple_body): Likewise. + (symtab_alias_target): Likewise. + (symtab_real_symbol_p): Likewise. + (symtab_can_be_discarded): Likewise. + * cgraphbuild.c (mark_address): Likewise. + (mark_load): Likewise. + (mark_store): Likewise. + * cgraphunit.c (decide_is_symbol_needed): Likewise. + (first): Likewise. + (enqueue_node): Likewise. + (referred_to_p): Likewise. + (cgraph_process_same_body_aliases): Likewise. + (analyze_functions): Likewise. + (handle_alias_pairs): Likewise. + (output_weakrefs): Likewise. + (compile): Likewise. + * gimple-fold.c (can_refer_decl_in_current_unit_p): Likewise. + * ipa-inline-analysis.c (inline_write_summary): Likewise. + * ipa-prop.c (remove_described_reference): Likewise. + (try_decrement_rdesc_refcount): Likewise. + (ipa_edge_duplication_hook): Likewise. + * ipa-ref.c (ipa_record_reference): Likewise. + (ipa_maybe_record_reference): Likewise. + (ipa_clone_ref): Likewise. + (ipa_clone_references): Likewise. + (ipa_clone_referring): Likewise. + (ipa_find_reference): Likewise. + (ipa_remove_stmt_references): Likewise. + (ipa_clear_stmts_in_references): Likewise. + * ipa-ref.h (symtab_node_base): Likewise. + (ipa_ref): Likewise. + (ipa_record_reference): Likewise. + (ipa_maybe_record_reference): Likewise. + (ipa_clone_references): Likewise. + (ipa_clone_referring): Likewise. + (ipa_clone_ref): Likewise. + (ipa_find_reference): Likewise. + (ipa_remove_stmt_references): Likewise. + (ipa_clear_stmts_in_references): Likewise. + * ipa-reference.c (ipa_reference_write_optimization_summary): + Likewise. + * ipa.c (enqueue_node): Likewise. + (process_references): Likewise. + (walk_polymorphic_call_targets): Likewise. + (symtab_remove_unreachable_nodes): Likewise. + (address_taken_from_non_vtable_p): Likewise. + (comdat_can_be_unshared_p_1): Likewise. + (comdat_can_be_unshared_p): Likewise. + (can_replace_by_local_alias): Likewise. + (function_and_variable_visibility): Likewise. + * is-a.h: Likewise (within example in comment). + * lto-cgraph.c (input_cgraph_opt_summary): Likewise. + (lto_symtab_encoder_encode): Likewise. + (lto_symtab_encoder_delete_node): Likewise. + (lto_symtab_encoder_in_partition_p): Likewise. + (lto_set_symtab_encoder_in_partition): Likewise. + (output_refs): Likewise. + (compute_ltrans_boundary): Likewise. + (output_symtab): Likewise. + (input_node): Likewise. + (input_ref): Likewise. + (input_edge): Likewise. + (input_cgraph_1): Likewise. + (input_refs): Likewise. + (output_cgraph_opt_summary): Likewise. + (input_node_opt_summary): Likewise. + (input_cgraph_opt_section): Likewise. + * lto-section-in.c (lto_free_function_in_decl_state_for_node): + Likewise. + * lto-streamer-out.c (lto_output): Likewise. + (output_symbol_p): Likewise. + (produce_symtab): Likewise. + * lto-streamer.h (lto_encoder_entry): Likewise. + (lto_free_function_in_decl_state_for_node): Likewise. + (lto_symtab_encoder_encode): Likewise. + (lto_symtab_encoder_delete_node): Likewise. + (lto_symtab_encoder_in_partition_p): Likewise. + (lto_set_symtab_encoder_in_partition): Likewise. + (lto_symtab_encoder_lookup): Likewise. + (lsei_node): Likewise. + (lto_symtab_encoder_deref): Likewise. + * symtab.c (symtab_hash): Likewise. + (assembler_name_hash): Likewise. + (symtab_nodes): Likewise. + (hash_node): Likewise. + (eq_node): Likewise. + (hash_node_by_assembler_name): Likewise. + (eq_assembler_name): Likewise. + (insert_to_assembler_name_hash): Likewise. + (unlink_from_assembler_name_hash): Likewise. + (symtab_prevail_in_asm_name_hash): Likewise. + (symtab_register_node): Likewise. + (symtab_insert_node_to_hashtable): Likewise. + (symtab_unregister_node): Likewise. + (symtab_get_node): Likewise. + (symtab_remove_node): Likewise. + (symtab_initialize_asm_name_hash): Likewise. + (symtab_node_for_asm): Likewise. + (symtab_add_to_same_comdat_group): Likewise. + (symtab_dissolve_same_comdat_group_list): Likewise. + (symtab_node_asm_name): Likewise. + (symtab_node_name): Likewise. + (dump_symtab_base): Likewise. + (dump_symtab_node): Likewise. + (dump_symtab): Likewise. + (debug_symtab_node): Likewise. + (verify_symtab_base): Likewise. + (verify_symtab_node): Likewise. + (verify_symtab): Likewise. + (symtab_used_from_object_file_p): Likewise. + (symtab_node_availability): Likewise. + (symtab_alias_ultimate_target): Likewise. + (fixup_same_cpp_alias_visibility): Likewise. + (symtab_resolve_alias): Likewise. + (symtab_for_node_and_aliases): Likewise. + (symtab_for_node_and_aliases): Likewise. + (symtab_nonoverwritable_alias_1): Likewise. + (symtab_nonoverwritable_alias): Likewise. + (symtab_semantically_equivalent_p): Likewise. + * value-prof.c (init_node_map): Likewise. + * varasm.c (find_decl): Likewise. + * varpool.c (varpool_node_for_asm): Likewise. + (varpool_remove_unreferenced_decls): Likewise. + +2013-10-31 David Malcolm <dmalcolm@redhat.com> + + Manual part of renaming of symtab_node_base to symtab_node. + + * ipa-ref.h (symtab_node): Remove typedef to pointer type, as it + clashes with the preferred name for the base class. + (const_symtab_node): Remove redundant typedef. + +2013-10-31 Jakub Jelinek <jakub@redhat.com> + + * optabs.c (expand_vec_perm): Avoid vector mode punning + SUBREGs in SET_DEST. + * expmed.c (store_bit_field_1): Likewise. + * config/i386/sse.md (movdi_to_sse, vec_pack_sfix_trunc_v2df, + vec_pack_sfix_v2df, vec_shl_<mode>, vec_shr_<mode>, + vec_interleave_high<mode>, vec_interleave_low<mode>): Likewise. + * config/i386/i386.c (ix86_expand_vector_move_misalign, + ix86_expand_sse_movcc, ix86_expand_int_vcond, ix86_expand_vec_perm, + ix86_expand_sse_unpack, ix86_expand_args_builtin, + ix86_expand_vector_init_duplicate, ix86_expand_vector_set, + emit_reduc_half, expand_vec_perm_blend, expand_vec_perm_pshufb, + expand_vec_perm_interleave2, expand_vec_perm_pshufb2, + expand_vec_perm_vpshufb2_vpermq, + expand_vec_perm_vpshufb2_vpermq_even_odd, expand_vec_perm_even_odd_1, + expand_vec_perm_broadcast_1, expand_vec_perm_vpshufb4_vpermq2, + ix86_expand_sse2_mulv4si3, ix86_expand_pinsr): Likewise. + (expand_vec_perm_palignr): Likewise. Modify a copy of *d rather + than *d itself. + +2013-10-31 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_expand_sse2_abs): Rename function arguments. + Use gcc_unreachable for unhandled modes. Do not check results of + expand_simple_binop. If not expanded to target, move the result. + +2013-10-31 Chung-Ju Wu <jasonwucj@gmail.com> + Shiva Chen <shiva0217@gmail.com> + + * config.gcc (nds32*-*-*): Add nds32 target. + * config/nds32/nds32.c: New file. + * config/nds32/nds32.h: New file. + * config/nds32/nds32.md: New file. + * config/nds32/constants.md: New file. + * config/nds32/constraints.md: New file. + * config/nds32/iterators.md: New file. + * config/nds32/nds32-doubleword.md: New file. + * config/nds32/nds32-intrinsic.md: New file. + * config/nds32/nds32_intrinsic.h: New file. + * config/nds32/nds32-modes.def: New file. + * config/nds32/nds32-multiple.md: New file. + * config/nds32/nds32.opt: New file. + * config/nds32/nds32-opts.h: New file. + * config/nds32/nds32-protos.h: New file. + * config/nds32/nds32-peephole2.md: New file. + * config/nds32/pipelines.md: New file. + * config/nds32/predicates.md: New file. + * config/nds32/t-mlibs: New file. + * common/config/nds32: New directory and files. + + * doc/invoke.texi (NDS32 options): Document nds32 specific options. + * doc/md.texi (NDS32 family): Document nds32 specific constraints. + * doc/install.texi (Cross-Compiler-Specific Options): Document + --with-nds32-lib for nds32 target. + * doc/extend.texi (Function Attributes, Target Builtins): Document + nds32 specific attributes. + +2013-10-31 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints (process_alt_operands): Use the result + elimination register for operand when matching constraints. + +2013-10-31 Jakub Jelinek <jakub@redhat.com> + + * tree-vrp.c (maybe_set_nonzero_bits): New function. + (remove_range_assertions): Call it. + + * tree.c (tree_ctz): New function. + * tree.h (tree_ctz): New prototype. + * tree-ssanames.h (get_range_info, get_nonzero_bits): Change + first argument from tree to const_tree. + * tree-ssanames.c (get_range_info, get_nonzero_bits): Likewise. + * tree-vectorizer.h (vect_generate_tmps_on_preheader): New prototype. + * tree-vect-loop-manip.c (vect_generate_tmps_on_preheader): No longer + static. + * expr.c (highest_pow2_factor): Reimplemented using tree_ctz. + * tree-vect-loop.c (vect_analyze_loop_operations, + vect_transform_loop): Don't force scalar loop for bound just because + number of iterations is unknown, only do it if it is not known to be + a multiple of vectorization_factor. + * builtins.c (get_object_alignment_2): Use tree_ctz on offset. + + * gimple-pretty-print.c (dump_ssaname_info): Print newline also + in case of VR_VARYING. Print get_nonzero_bits if not all ones. + * tree-ssanames.h (struct range_info_def): Add nonzero_bits field. + (set_nonzero_bits, get_nonzero_bits): New prototypes. + * tree-ssa-ccp.c (get_default_value): Use get_range_info to see if + a default def isn't partially constant. + (ccp_finalize): If after IPA, set_range_info if integral SSA_NAME + is known to be partially zero. + (evaluate_stmt): If we'd return otherwise VARYING, use get_range_info + to see if a default def isn't partially constant. + * tree-ssanames.c (set_range_info): Initialize nonzero_bits upon + creation of a range, if VR_RANGE, try to improve nonzero_bits from + the range. + (set_nonzero_bits, get_nonzero_bits): New functions. + + * tree-cfg.c (assert_unreachable_fallthru_edge_p): New function. + * tree-cfg.h (assert_unreachable_fallthru_edge_p): New prototype. + * tree-vrp.c (all_imm_uses_in_stmt_or_feed_cond): New function. + (remove_range_assertions): If ASSERT_EXPR_VAR has no other immediate + uses but in the condition and ASSERT_EXPR and the other successor of + the predecessor bb is __builtin_unreachable (), set_range_info of the + ASSERT_EXPR_VAR to the range info of the ASSERT_EXPR's lhs. + +2013-10-31 Martin Jambor <mjambor@suse.cz> + + PR rtl-optimization/58934 + Revert: + 2013-10-30 Martin Jambor <mjambor@suse.cz> + PR rtl-optimization/10474 + * ira.c (find_moveable_pseudos): Do not calculate dominance info + nor df analysis. + (interesting_dest_for_shprep): New function. + (split_live_ranges_for_shrink_wrap): Likewise. + (ira): Calculate dominance info and df analysis. Call + split_live_ranges_for_shrink_wrap. + +2013-10-31 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + Yury Gribov <y.gribov@samsung.com> + + PR sanitizer/58543 + * asan.c (asan_clear_shadow): Allocate a new vreg for temporary + shadow pointer to avoid clobbering the main one. + +2013-10-31 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * lower-subreg.c (resolve_simple_move): Copy REG_INC note. + +2013-10-30 Vladimir Makarov <vmakarov@redhat.com> + + PR bootstrap/58933 + * ira-color.c (update_costs_from_copies): Add new parameter. Use + it for calling update_costs_from_allocno. + (assign_hard_reg): Call restore_costs_from_copies only for + !retry_p. Pass new argument to update_costs_from_copies. + (color_pass): Pass new argument to update_costs_from_copies. + (ira_mark_allocation_change): Ditto. + +2013-10-30 Sharad Singhai <singhai@google.com> + + PR middle-end/58134 + * opts.c (common_handle_option): Remove deprecated option + -ftree-vectorizer-verbose. + * doc/invoke.texi (Debugging Options): Ditto. + * opts-global.c (handle_common_deferred_options): Ditto. + (dump_remap_tree_vectorizer_verbose): Delete. + * common.opt: Set -ftree-vectorizer-verbose as an ignored option. + +2013-10-30 DJ Delorie <dj@redhat.com> + + * config/rx/rx.c (ADD_RX_BUILTIN0): New macro, used for builtins + that take no arguments. + +2013-10-30 Joern Rennecke <joern.rennecke@embecosm.com> + + PR other/58545 + * reload1.c (update_eliminables_and_spill): New function, broken + out of reload. + (reload): Use it. Check for frame size change after frame size + alignment, and call update_eliminables_and_spill first if continue-ing. + +2013-10-30 Cong Hou <congh@google.com> + + PR target/58762 + * config/i386/i386-protos.h (ix86_expand_sse2_abs): New function. + * config/i386/i386.c (ix86_expand_sse2_abs): New function. + * config/i386/sse.md: Add SSE2 support to abs (8/16/32-bit-int). + +2013-10-18 Mikael Pettersson <mikpelinux@gmail.com> + + PR rtl-optimization/58369 + * reload1.c (compute_reload_subreg_offset): New function. + (choose_reload_regs): Use it to pass endian-correct + offset to subreg_regno_offset. + +2013-10-30 Tobias Burnus <burnus@net-b.de> + + PR other/33426 + * tree-cfg.c (replace_loop_annotate): Replace warning by + warning_at. + +2013-10-30 Jason Merrill <jason@redhat.com> + + * configure.ac (loose_warn): Add -Wno-format if + --disable-build-format-warnings. + +2013-10-30 David Malcolm <dmalcolm@redhat.com> + + * cgraphunit.c (analyze_functions): Split symtab_node declarations + onto multiple lines to make things easier for rename_symtab.py. + + * symtab.c (symtab_dissolve_same_comdat_group_list): Likewise. + (symtab_semantically_equivalent_p): Likewise. + +2013-10-30 Vladimir Makarov <vmakarov@redhat.com> + + PR target/58784 + * lra.c (check_rtl): Remove address check before LRA work. + +2013-10-30 Marc Glisse <marc.glisse@inria.fr> + + * tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Look for a + POINTER_PLUS_EXPR in the defining statement. + +2013-10-30 Vladimir Makarov <vmakarov@redhat.com> + + * regmove.c: Remove. + * tree-pass.h (make_pass_regmove): Remove. + * timevar.def (TV_REGMOVE): Remove. + * passes.def (pass_regmove): Remove. + * opts.c (default_options_table): Remove entry for regmove. + * doc/passes.texi: Remove regmove pass description. + * doc/invoke.texi (-foptimize-register-move, -fregmove): Remove + options. + (-fdump-rtl-regmove): Ditto. + * common.opt (foptimize-register-move, fregmove): Ignore. + * Makefile.in (OBJS): Remove regmove.o. + * regmove.c: Remove. + * ira-int.h (struct ira_allocno_pref, ira_pref_t): New structure + and type. + (struct ira_allocno) New member allocno_prefs. + (ALLOCNO_PREFS): New macro. + (ira_prefs, ira_prefs_num): New external vars. + (ira_setup_alts, ira_get_dup_out_num, ira_debug_pref): New prototypes. + (ira_debug_prefs, ira_debug_allocno_prefs, ira_create_pref): Ditto. + (ira_add_allocno_pref, ira_remove_pref, ira_remove_allocno_prefs): + Ditto. + (ira_add_allocno_copy_to_list): Remove prototype. + (ira_swap_allocno_copy_ends_if_necessary): Ditto. + (ira_pref_iterator): New type. + (ira_pref_iter_init, ira_pref_iter_cond): New functions. + (FOR_EACH_PREF): New macro. + * ira.c (commutative_constraint_p): Move from ira-conflicts.c. + (ira_get_dup_out_num): Ditto. Rename from get_dup_num. Modify the + code. + (ira_setup_alts): New function. + (decrease_live_ranges_number): New function. + (ira): Call the above function. + * ira-build.c (ira_prefs, ira_prefs_num): New global vars. + (ira_create_allocno): Initialize allocno prefs. + (pref_pool, pref_vec): New static vars. + (initiate_prefs, find_allocno_pref, ira_create_pref): New + functions. + (add_allocno_pref_to_list, ira_add_allocno_pref, print_pref): Ditto. + (ira_debug_pref, print_prefs, ira_debug_prefs): Ditto. + (print_allocno_prefs, ira_debug_allocno_prefs, finish_pref): Ditto. + (ira_remove_pref, ira_remove_allocno_prefs, finish_prefs): Ditto. + (ira_add_allocno_copy_to_list): Make static. Rename to + add_allocno_copy_to_list. + (ira_swap_allocno_copy_ends_if_necessary): Make static. Rename to + swap_allocno_copy_ends_if_necessary. + (remove_unnecessary_allocnos, remove_low_level_allocnos): Call + ira_remove_allocno_prefs. + (ira_flattening): Ditto. + (ira_build): Call initiate_prefs, print_prefs. + (ira_destroy): Call finish_prefs. + * ira-color.c (struct update_cost_record): New. + (struct allocno_color_data): Add new member update_cost_records. + (update_cost_record_pool): New static var. + (init_update_cost_records, get_update_cost_record): New functions. + (free_update_cost_record_list, finish_update_cost_records): Ditto. + (struct update_cost_queue_elem): Add member from. + (initiate_cost_update): Call init_update_cost_records. + (finish_cost_update): Call finish_update_cost_records. + (queue_update_cost, get_next_update_cost): Add new param from. + (Update_allocno_cost, update_costs_from_allocno): New functions. + (update_costs_from_prefs): Ditto. + (update_copy_costs): Rename to update_costs_from_copies. + (restore_costs_from_copies): New function. + (update_conflict_hard_regno_costs): Don't go back. + (assign_hard_reg): Call restore_costs_from_copies. Add printing + more debug info. + (pop_allocnos): Add priniting more debug info. + (color_allocnos): Remove prefs for conflicting hard regs. + Call update_costs_from_prefs. + * ira-conflicts.c (commutative_constraint_p): Move to ira.c + (get_dup_num): Rename, modify, and move to ira.c + (process_regs_for_copy): Add prefs. + (add_insn_allocno_copies): Put src as first arg of + process_regs_for_copy. Remove dead code. Call ira_setup_alts. + * ira-costs.c (record_reg_classes): Modify and move code into + record_operands_costs. + (find_costs_and_classes): Create prefs for the hard reg of small + reg class. + (process_bb_node_for_hard_reg_moves): Add prefs. + +2013-10-30 Richard Biener <rguenther@suse.de> + + PR middle-end/57100 + * basic-block.h (pre_and_rev_post_order_compute_fn): New function. + * cfganal.c (pre_and_rev_post_order_compute_fn): New function + as worker for ... + (pre_and_rev_post_order_compute): ... which now wraps it. + * graph.c (draw_cfg_nodes_no_loops): Use + pre_and_rev_post_order_compute_fn to avoid ICEing and dependence + on cfun. + +2013-10-30 Christian Bruel <christian.bruel@st.com> + + * config/sh/sh-mem.cc (sh_expand_cmpnstr): New function. + (sh_expand_cmpstr): Handle known align and schedule improvements. + * config/sh/sh-protos.h (sh_expand_cmpstrn): Declare. + * config/sh/sh.md (cmpstrnsi): New pattern. + +2013-10-30 Martin Jambor <mjambor@suse.cz> + + PR rtl-optimization/10474 + * ira.c (find_moveable_pseudos): Do not calculate dominance info + nor df analysis. + (interesting_dest_for_shprep): New function. + (split_live_ranges_for_shrink_wrap): Likewise. + (ira): Calculate dominance info and df analysis. Call + split_live_ranges_for_shrink_wrap. + +2013-10-30 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/58854 + * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Emit blockage. + +2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-core.h (tree_index): Add TI_POINTER_BOUNDS_TYPE. + * tree.h (POINTER_BOUNDS_P): New. + (BOUNDED_TYPE_P): New. + (BOUNDED_P): New. + (pointer_bounds_type_node): New. + * tree.c (build_common_tree_nodes): Initialize + pointer_bounds_type_node. + * gimple.h (gimple_call_get_nobnd_arg_index): New. + (gimple_call_num_nobnd_args): New. + (gimple_call_nobnd_arg): New. + (gimple_return_retbnd): New. + (gimple_return_set_retbnd): New + * gimple.c (gimple_build_return): Increase number of ops + for return statement. + (gimple_call_get_nobnd_arg_index): New. + * gimple-pretty-print.c (dump_gimple_return): Print second op. + +2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + + * ipa.c (cgraph_build_static_cdtor_1): Support contructors + with "chkp ctor" and "bnd_legacy" attributes. + * gimplify.c (gimplify_init_constructor): Avoid infinite + loop during gimplification of bounds initializer. + +2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + + * c-family/c-common.c (handle_bnd_variable_size_attribute): New. + (handle_bnd_legacy): New. + (c_common_attribute_table): Add bnd_variable_size and bnd_legacy. + * doc/extend.texi: Document bnd_variable_size and bnd_legacy + attributes. + +2013-10-29 Ilya Enkovich <ilya.enkovich@intel.com> + + * builtin-types.def (BT_FN_VOID_CONST_PTR): New. + (BT_FN_PTR_CONST_PTR): New. + (BT_FN_CONST_PTR_CONST_PTR): New. + (BT_FN_PTR_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR): New. + (BT_FN_VOID_PTRPTR_CONST_PTR): New. + (BT_FN_VOID_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR_SIZE): New. + * chkp-builtins.def: New. + * builtins.def: include chkp-builtins.def. + (DEF_CHKP_BUILTIN): New. + * builtins.c (expand_builtin): Support BUILT_IN_CHKP_INIT_PTR_BOUNDS, + BUILT_IN_CHKP_NULL_PTR_BOUNDS, BUILT_IN_CHKP_COPY_PTR_BOUNDS, + BUILT_IN_CHKP_CHECK_PTR_LBOUNDS, BUILT_IN_CHKP_CHECK_PTR_UBOUNDS, + BUILT_IN_CHKP_CHECK_PTR_BOUNDS, BUILT_IN_CHKP_SET_PTR_BOUNDS, + BUILT_IN_CHKP_NARROW_PTR_BOUNDS, BUILT_IN_CHKP_STORE_PTR_BOUNDS, + BUILT_IN_CHKP_GET_PTR_LBOUND, BUILT_IN_CHKP_GET_PTR_UBOUND, + BUILT_IN_CHKP_BNDMK, BUILT_IN_CHKP_BNDSTX, BUILT_IN_CHKP_BNDCL, + BUILT_IN_CHKP_BNDCU, BUILT_IN_CHKP_BNDLDX, BUILT_IN_CHKP_BNDRET, + BUILT_IN_CHKP_INTERSECT, BUILT_IN_CHKP_ARG_BND, BUILT_IN_CHKP_NARROW, + BUILT_IN_CHKP_EXTRACT_LOWER, BUILT_IN_CHKP_EXTRACT_UPPER. + * common.opt (fcheck-pointer-bounds): New. + * toplev.c (process_options): Check Pointer Bounds Checker is + supported. + * doc/extend.texi: Document Pointer Bounds Checker built-in functions. + +2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com> + + * target.def (builtin_chkp_function): New. + (chkp_bound_type): New. + (chkp_bound_mode): New. + (fn_abi_va_list_bounds_size): New. + (load_bounds_for_arg): New. + (store_bounds_for_arg): New. + * targhooks.h (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_fn_abi_va_list_bounds_size): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode): New. + (default_builtin_chkp_function): New. + * targhooks.c (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_fn_abi_va_list_bounds_size): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode); New. + (default_builtin_chkp_function): New. + * doc/tm.texi.in (TARGET_FN_ABI_VA_LIST_BOUNDS_SIZE): New. + (TARGET_LOAD_BOUNDS_FOR_ARG): New. + (TARGET_STORE_BOUNDS_FOR_ARG): New. + (TARGET_BUILTIN_CHKP_FUNCTION): New. + (TARGET_CHKP_BOUND_TYPE): New. + (TARGET_CHKP_BOUND_MODE): New. + * doc/tm.texi: Regenerated. + * langhooks.h (lang_hooks): Add chkp_supported field. + * langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): New. + (LANG_HOOKS_INITIALIZER); Add LANG_HOOKS_CHKP_SUPPORTED. + +2013-10-29 Andrew Pinski <apinski@cavium.com> + + * tree-ssa-ifcombine.c: Include rtl.h and tm_p.h. + (ifcombine_ifandif): Handle cases where maybe_fold_and_comparisons + fails, combining the branches anyways. + (tree_ssa_ifcombine): Inverse the order of the basic block walk, + increases the number of combinings. + * gimple.h (gsi_start_nondebug_after_labels_bb): New function. + +2013-10-29 Mike Stump <mikestump@comcast.net> + + * machmode.def (PARTIAL_INT_MODE): Add precision and name. + * genmodes.c (PARTIAL_INT_MODE): Add precision and name. + (make_vector_mode): Increase namebuf to 16. + (emit_insn_modes_h): When processing BImode, don't + also match partial int modes. + (emit_class_narrowest_mode): Likewise. + + * config/bfin/bfin-modes.def: Add precision to PDI. + * config/m32c/m32c-modes.def: Add precision to PSI. + * config/msp430/msp430-modes.def: Add precision to PSI. + * config/rs6000/rs6000-modes.def: Add precision to PTI. + * config/sh/sh-modes.def: Add precision to PSI and PDI. + +2013-10-29 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/54236 + * config/sh/sh.md (*addc): Rename existing variations to ... + (*addc_r_r_1, *addc_2r_1, *addc_r_1): ... these. + (*addc_r_lsb, *addc_r_r_lsb, *addc_r_lsb_r, *addc_2r_lsb, *addc_r_msb, + *addc_r_r_msb, *addc_2r_msb): New insn_and_split patterns. + * config/sh/sh.c (addsubcosts): Handle some addc special cases. + +2013-10-29 Teresa Johnson <tejohnson@google.com> + + PR ipa/58862 + * tree-ssa-tail-merge.c (replace_block_by): Tolerate profile + insanities when updating probabilities. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + * gdbhooks.py (CGraphNodePrinter.to_string): Update gdb + prettyprinter for cgraph_node to reflect the conversion of the + symtable types to a C++ class hierarchy: it now *is* a + symtab_node_base, rather than having one (named "symbol"). + +2013-10-29 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * builtins.c (is_builtin_name): Added a check for __cilkrts_detach and + __cilkrts_pop_frame. If matched, then return true for built-in + function name. + (expand_builtin): Added BUILT_IN_CILK_DETACH and + BUILT_IN_CILK_POP_FRAME case. + * langhooks-def.h (lhd_install_body_with_frame_cleanup): New prototype. + (lhs_cilk_detect_spawn): Likewise. + (LANG_HOOKS_DECLS): Added LANG_HOOKS_CILKPLUS. + (LANG_HOOKS_CILKPLUS_DETECT_SPAWN_AND_UNWRAP): New #define. + (LANG_HOOKS_CILKPLUS_FRAME_CLEANUP): Likewise. + (LANG_HOOKS_CILKPLUS_GIMPLIFY_SPAWN): Likewise. + (LANG_HOOKS_CILKPLUS): Likewise. + * tree.h (CILK_SPAWN_FN): Likewise. + * builtin.def (DEF_CILK_BUILTIN_STUB): Likewise. + * Makefile.in (C_COMMON_OBJS): Added c-family/cilk.o. + (OBJS): Added cilk-common.o. + (BUILTINS_DEF): Added cilk-builtins.def. + * langhooks.c (lhd_install_body_with_frame_cleanup): New function. + (lhd_cilk_detect_spawn): Likewise. + * langhooks.h (lang_hooks_for_cilkplus): New struct. + (struct lang_hooks): Added new field called "cilkplus." + * cilk-common.c: New file. + * cilk.h: Likewise. + * cilk-builtins.def: Likewise. + * cppbuiltin.c (define_builtin_macros_for_compilation_flags): Added + "__cilk" macro and set it to 200. + * function.h (struct function::cilk_frame_decl): New field. + (struct function::is_cilk_function): Likewise. + (struct function::calls_cilk_spawn): Likewise. + * gimplify.c (gimplify_call_expr): Added a check if the function call + being gimplified is a spawn detach point. If so, then add pop_frame + and detach function calls. + (gimplify_expr): Added a CILK_SPAWN_STMT and CILK_SYNC_STMT case + for gimplifying _Cilk_spawn and _Cilk_sync statements. + (gimplify_return_expr): Added a check for _Cilk_spawn usage in + function. If so, added a _Cilk_sync and gimplified it. + (gimplify_modify_expr): Added a check for _Cilk_spawn in MODIFY and + INIT_EXPRs. If so, then call gimplify_cilk_spawn. + * ipa-inline-analysis (initialize_inline_failed): Prevent inlining of + spawner function. + (can_inline_edge_p): Prevent inling of spawnee function. + * ira.c (ira_setup_eliminable_regset): Force usage of frame pointer + for functions that use Cilk keywords. + * tree-inline.h (struct copy_body_data::remap_var_for_cilk): New field. + * tree-pretty-print.c (dump_generic_node): Added CILK_SPAWN_STMT and + CILK_SYNC_STMT cases. + * tree.def (DEFTREECODE): Added CILK_SPAWN_STMT and CILK_SYNC_STMT + trees. + * generic.texi (CILK_SPAWN_STMT): Added documentation for _Cilk_spawn. + (CILK_SYNC_STMT): Added documentation for _Cilk_sync. + * passes.texi (Cilk Keywords): New section that describes the compiler + code changes for handling Cilk Keywords. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + Patch autogenerated by refactor_symtab.py from + https://github.com/davidmalcolm/gcc-refactoring-scripts + revision 58bb219cc090b2f4516a9297d868c245495ee622 + + * asan.c (asan_finish_file): Update for conversion of symtab types to + a true class hierarchy. + * cfgexpand.c (estimated_stack_frame_size): Likewise. + * cgraph.c (cgraph_get_body): Likewise. + (cgraph_get_create_real_symbol_node): Likewise. + (verify_cgraph_node): Likewise. + (verify_edge_corresponds_to_fndecl): Likewise. + (verify_edge_count_and_frequency): Likewise. + (cgraph_will_be_removed_from_program_if_no_direct_calls): Likewise. + (cgraph_can_remove_if_no_direct_calls_p): Likewise. + (cgraph_can_remove_if_no_direct_calls_and_refs_p): Likewise. + (cgraph_node_cannot_return): Likewise. + (cgraph_set_pure_flag_1): Likewise. + (cgraph_set_const_flag_1): Likewise. + (cgraph_set_nothrow_flag_1): Likewise. + (cgraph_make_node_local_1): Likewise. + (cgraph_for_node_and_aliases): Likewise. + (cgraph_for_node_thunks_and_aliases): Likewise. + (cgraph_node_can_be_local_p): Likewise. + (cgraph_node_cannot_be_local_p_1): Likewise. + (cgraph_function_body_availability): Likewise. + (dump_cgraph_node): Likewise. + (cgraph_rtl_info): Likewise. + (cgraph_mark_address_taken_node): Likewise. + (cgraph_remove_node): Likewise. + (cgraph_release_function_body): Likewise. + (cgraph_update_edges_for_call_stmt_node): Likewise. + (cgraph_redirect_edge_call_stmt_to_callee): Likewise. + (cgraph_make_edge_direct): Likewise. + (cgraph_resolve_speculation): Likewise. + (cgraph_speculative_call_info): Likewise. + (cgraph_turn_edge_to_speculative): Likewise. + (cgraph_create_edge_1): Likewise. + (cgraph_set_call_stmt): Likewise. + (cgraph_node_for_asm): Likewise. + (cgraph_add_thunk): Likewise. + (cgraph_same_body_alias): Likewise. + (cgraph_create_function_alias): Likewise. + (cgraph_create_node): Likewise. + (cgraph_create_empty_node): Likewise. + (record_function_versions): Likewise. + (used_from_object_file_p): Likewise. + * cgraph.h (symtab_can_be_discarded): Likewise. + (symtab_real_symbol_p): Likewise. + (cgraph_mark_force_output_node): Likewise. + (cgraph_edge_recursive_p): Likewise. + (symtab_alias_target): Likewise. + (varpool_all_refs_explicit_p): Likewise. + (varpool_can_remove_if_no_refs): Likewise. + (cgraph_only_called_directly_or_aliased_p): Likewise. + (cgraph_next_function_with_gimple_body): Likewise. + (cgraph_first_function_with_gimple_body): Likewise. + (cgraph_function_with_gimple_body_p): Likewise. + (cgraph_next_function): Likewise. + (cgraph_first_function): Likewise. + (cgraph_next_defined_function): Likewise. + (cgraph_first_defined_function): Likewise. + (varpool_next_defined_variable): Likewise. + (varpool_first_defined_variable): Likewise. + (varpool_next_static_initializer): Likewise. + (varpool_first_static_initializer): Likewise. + (varpool_next_variable): Likewise. + (varpool_first_variable): Likewise. + (varpool_node_name): Likewise. + (varpool): Likewise. + (cgraph): Likewise. + (is_a_helper <varpool_node>::test): Likewise. + (is_a_helper <cgraph_node>::test): Likewise. + (varpool_variable_node): Likewise. + (cgraph_function_or_thunk_node): Likewise. + (varpool_alias_target): Likewise. + (cgraph_alias_target): Likewise. + (cgraph_node_name): Likewise. + (varpool_node_asm_name): Likewise. + (cgraph_node_asm_name): Likewise. + * cgraphbuild.c (remove_cgraph_callee_edges): Likewise. + (cgraph_rebuild_references): Likewise. + (rebuild_cgraph_edges): Likewise. + (record_eh_tables): Likewise. + (build_cgraph_edges): Likewise. + (mark_store): Likewise. + (mark_load): Likewise. + (mark_address): Likewise. + (record_type_list): Likewise. + (record_reference): Likewise. + * cgraphclones.c (cgraph_materialize_all_clones): Likewise. + (cgraph_materialize_clone): Likewise. + (cgraph_function_versioning): Likewise. + (cgraph_copy_node_for_versioning): Likewise. + (update_call_expr): Likewise. + (cgraph_find_replacement_node): Likewise. + (cgraph_create_virtual_clone): Likewise. + (cgraph_clone_node): Likewise. + * cgraphunit.c (compile): Likewise. + (output_weakrefs): Likewise. + (output_in_order): Likewise. + (expand_function): Likewise. + (assemble_thunks_and_aliases): Likewise. + (expand_thunk): Likewise. + (mark_functions_to_output): Likewise. + (handle_alias_pairs): Likewise. + (analyze_functions): Likewise. + (walk_polymorphic_call_targets): Likewise. + (varpool_finalize_decl): Likewise. + (process_function_and_variable_attributes): Likewise. + (cgraph_process_same_body_aliases): Likewise. + (analyze_function): Likewise. + (cgraph_add_new_function): Likewise. + (cgraph_finalize_function): Likewise. + (referred_to_p): Likewise. + (cgraph_reset_node): Likewise. + (cgraph_process_new_functions): Likewise. + (enqueue_node): Likewise. + (decide_is_symbol_needed): Likewise. + * coverage.c (coverage_compute_profile_id): Likewise. + * dbxout.c (dbxout_expand_expr): Likewise. + * dwarf2out.c (premark_types_used_by_global_vars_helper): Likewise. + (reference_to_unused): Likewise. + * gimple-fold.c (can_refer_decl_in_current_unit_p): Likewise. + * gimplify.c (unvisit_body): Likewise. + (unshare_body): Likewise. + * ipa-cp.c (ipcp_generate_summary): Likewise. + (ipcp_decision_stage): Likewise. + (identify_dead_nodes): Likewise. + (decide_whether_version_node): Likewise. + (decide_about_value): Likewise. + (perhaps_add_new_callers): Likewise. + (create_specialized_node): Likewise. + (update_profiling_info): Likewise. + (ipcp_propagate_stage): Likewise. + (estimate_local_effects): Likewise. + (good_cloning_opportunity_p): Likewise. + (devirtualization_time_bonus): Likewise. + (propagate_constants_accross_call): Likewise. + (initialize_node_lattices): Likewise. + (ipcp_cloning_candidate_p): Likewise. + (determine_versionability): Likewise. + (print_all_lattices): Likewise. + (print_lattice): Likewise. + (ipcp_discover_new_direct_edges): Likewise. + * ipa-devirt.c (ipa_devirt): Likewise. + (likely_target_p): Likewise. + (update_type_inheritance_graph): Likewise. + (possible_polymorphic_call_target_p): Likewise. + (dump_possible_polymorphic_call_targets): Likewise. + (devirt_variable_node_removal_hook): Likewise. + (record_binfo): Likewise. + (maybe_record_node): Likewise. + (build_type_inheritance_graph): Likewise. + * ipa-inline-analysis.c (inline_write_summary): Likewise. + (inline_generate_summary): Likewise. + (inline_analyze_function): Likewise. + (do_estimate_growth): Likewise. + (simple_edge_hints): Likewise. + (estimate_node_size_and_time): Likewise. + (estimate_edge_devirt_benefit): Likewise. + (compute_inline_parameters): Likewise. + (estimate_function_body_sizes): Likewise. + (compute_bb_predicates): Likewise. + (initialize_inline_failed): Likewise. + (dump_inline_summary): Likewise. + (dump_inline_edge_summary): Likewise. + * ipa-inline-transform.c (inline_transform): Likewise. + (preserve_function_body_p): Likewise. + (save_inline_function_body): Likewise. + (inline_call): Likewise. + (clone_inlined_nodes): Likewise. + (can_remove_node_now_p): Likewise. + (can_remove_node_now_p_1): Likewise. + * ipa-inline.c (early_inliner): Likewise. + (early_inline_small_functions): Likewise. + (inline_always_inline_functions): Likewise. + (ipa_inline): Likewise. + (flatten_function): Likewise. + (inline_small_functions): Likewise. + (speculation_useful_p): Likewise. + (recursive_inlining): Likewise. + (update_caller_keys): Likewise. + (reset_edge_caches): Likewise. + (update_edge_key): Likewise. + (edge_badness): Likewise. + (relative_time_benefit): Likewise. + (want_inline_self_recursive_call_p): Likewise. + (want_inline_small_function_p): Likewise. + (want_early_inline_function_p): Likewise. + (num_calls): Likewise. + (can_early_inline_edge_p): Likewise. + (can_inline_edge_p): Likewise. + (report_inline_failed_reason): Likewise. + * ipa-profile.c (ipa_profile): Likewise. + (ipa_propagate_frequency): Likewise. + (ipa_propagate_frequency_1): Likewise. + (ipa_profile_generate_summary): Likewise. + * ipa-prop.c (ipcp_transform_function): Likewise. + (read_replacements_section): Likewise. + (ipa_prop_read_section): Likewise. + (ipa_modify_call_arguments): Likewise. + (ipa_print_node_params): Likewise. + (propagate_controlled_uses): Likewise. + (update_indirect_edges_after_inlining): Likewise. + (remove_described_reference): Likewise. + (ipa_make_edge_direct_to_target): Likewise. + (ipa_analyze_node): Likewise. + (ipa_analyze_params_uses): Likewise. + (ipa_compute_jump_functions): Likewise. + (ipa_get_callee_param_type): Likewise. + (ipa_print_node_jump_functions): Likewise. + (ipa_initialize_node_params): Likewise. + (ipa_populate_param_decls): Likewise. + (ipa_func_spec_opts_forbid_analysis_p): Likewise. + (write_agg_replacement_chain): Likewise. + (ipa_write_node_info): Likewise. + (ipa_edge_duplication_hook): Likewise. + (try_decrement_rdesc_refcount): Likewise. + * ipa-pure-const.c (propagate_nothrow): Likewise. + (propagate_pure_const): Likewise. + (pure_const_read_summary): Likewise. + (pure_const_write_summary): Likewise. + (analyze_function): Likewise. + * ipa-ref-inline.h (ipa_ref_referred_ref_list): Likewise. + (ipa_ref_referring_ref_list): Likewise. + * ipa-ref.c (ipa_clear_stmts_in_references): Likewise. + (ipa_remove_stmt_references): Likewise. + (ipa_find_reference): Likewise. + (ipa_dump_referring): Likewise. + (ipa_dump_references): Likewise. + (ipa_record_reference): Likewise. + * ipa-reference.c (ipa_reference_read_optimization_summary): Likewise. + (ipa_reference_write_optimization_summary): Likewise. + (write_node_summary_p): Likewise. + (propagate): Likewise. + (read_write_all_from_decl): Likewise. + (generate_summary): Likewise. + (analyze_function): Likewise. + (propagate_bits): Likewise. + (ipa_reference_get_not_written_global): Likewise. + (ipa_reference_get_not_read_global): Likewise. + * ipa-split.c (execute_split_functions): Likewise. + (split_function): Likewise. + * ipa-utils.c (ipa_merge_profiles): Likewise. + (dump_cgraph_node_set): Likewise. + (ipa_reverse_postorder): Likewise. + (ipa_edge_within_scc): Likewise. + (ipa_get_nodes_in_cycle): Likewise. + (ipa_free_postorder_info): Likewise. + (ipa_reduced_postorder): Likewise. + (searchc): Likewise. + (recursive_call_p): Likewise. + * ipa.c (ipa_cdtor_merge): Likewise. + (record_cdtor_fn): Likewise. + (function_and_variable_visibility): Likewise. + (varpool_externally_visible_p): Likewise. + (cgraph_externally_visible_p): Likewise. + (comdat_can_be_unshared_p): Likewise. + (comdat_can_be_unshared_p_1): Likewise. + (address_taken_from_non_vtable_p): Likewise. + (ipa_discover_readonly_nonaddressable_vars): Likewise. + (symtab_remove_unreachable_nodes): Likewise. + (walk_polymorphic_call_targets): Likewise. + (process_references): Likewise. + (enqueue_node): Likewise. + (has_addr_references_p): Likewise. + (cgraph_non_local_node_p_1): Likewise. + * is-a.h (varpool_analyze_node): Likewise. + * lto-cgraph.c (input_symtab): Likewise. + (merge_profile_summaries): Likewise. + (input_cgraph_1): Likewise. + (input_edge): Likewise. + (input_varpool_node): Likewise. + (input_node): Likewise. + (input_overwrite_node): Likewise. + (compute_ltrans_boundary): Likewise. + (output_refs): Likewise. + (lto_output_varpool_node): Likewise. + (lto_output_node): Likewise. + (reachable_from_other_partition_p): Likewise. + (referenced_from_other_partition_p): Likewise. + (lto_output_edge): Likewise. + (output_node_opt_summary): Likewise. + (add_node_to): Likewise. + (reachable_from_this_partition_p): Likewise. + (lto_set_symtab_encoder_in_partition): Likewise. + (lto_symtab_encoder_in_partition_p): Likewise. + (lto_set_symtab_encoder_encode_initializer): Likewise. + (lto_symtab_encoder_encode_initializer_p): Likewise. + (lto_set_symtab_encoder_encode_body): Likewise. + (lto_symtab_encoder_encode_body_p): Likewise. + * lto-section-in.c (lto_free_function_in_decl_state_for_node): + Likewise. + * lto-streamer-in.c (lto_read_body): Likewise. + (fixup_call_stmt_edges): Likewise. + (fixup_call_stmt_edges_1): Likewise. + * lto-streamer-out.c (produce_symtab): Likewise. + (output_symbol_p): Likewise. + (write_symbol): Likewise. + (lto_output): Likewise. + (copy_function): Likewise. + (output_function): Likewise. + * passes.c (function_called_by_processed_nodes_p): Likewise. + (ipa_write_optimization_summaries): Likewise. + (ipa_write_summaries): Likewise. + (do_per_function_toporder): Likewise. + (do_per_function): Likewise. + (dump_passes): Likewise. + * symtab.c (symtab_semantically_equivalent_p): Likewise. + (symtab_nonoverwritable_alias): Likewise. + (symtab_nonoverwritable_alias_1): Likewise. + (symtab_for_node_and_aliases): Likewise. + (symtab_resolve_alias): Likewise. + (fixup_same_cpp_alias_visibility): Likewise. + (symtab_alias_ultimate_target): Likewise. + (symtab_used_from_object_file_p): Likewise. + (verify_symtab_base): Likewise. + (dump_symtab_base): Likewise. + (symtab_node_name): Likewise. + (symtab_node_asm_name): Likewise. + (symtab_dissolve_same_comdat_group_list): Likewise. + (symtab_add_to_same_comdat_group): Likewise. + (symtab_unregister_node): Likewise. + (symtab_insert_node_to_hashtable): Likewise. + (symtab_register_node): Likewise. + (unlink_from_assembler_name_hash): Likewise. + (insert_to_assembler_name_hash): Likewise. + (eq_assembler_name): Likewise. + (hash_node_by_assembler_name): Likewise. + (eq_node): Likewise. + (hash_node): Likewise. + * toplev.c (wrapup_global_declaration_2): Likewise. + * trans-mem.c (ipa_tm_execute): Likewise. + (ipa_tm_transform_clone): Likewise. + (ipa_tm_transform_transaction): Likewise. + (ipa_tm_transform_calls_redirect): Likewise. + (ipa_tm_insert_gettmclone_call): Likewise. + (ipa_tm_insert_irr_call): Likewise. + (ipa_tm_create_version): Likewise. + (ipa_tm_create_version_alias): Likewise. + (ipa_tm_mark_forced_by_abi_node): Likewise. + (ipa_tm_mark_force_output_node): Likewise. + (ipa_tm_diagnose_tm_safe): Likewise. + (ipa_tm_mayenterirr_function): Likewise. + (ipa_tm_scan_irr_function): Likewise. + (ipa_tm_note_irrevocable): Likewise. + (ipa_tm_scan_calls_clone): Likewise. + (get_cg_data): Likewise. + * tree-eh.c (tree_could_trap_p): Likewise. + * tree-emutls.c (ipa_lower_emutls): Likewise. + (create_emultls_var): Likewise. + (lower_emutls_function_body): Likewise. + (gen_emutls_addr): Likewise. + (emutls_decl): Likewise. + (new_emutls_decl): Likewise. + * tree-inline.c (tree_function_versioning): Likewise. + (optimize_inline_calls): Likewise. + (expand_call_inline): Likewise. + (estimate_num_insns): Likewise. + (copy_bb): Likewise. + (delete_unreachable_blocks_update_callgraph): Likewise. + * tree-nested.c (gimplify_all_functions): Likewise. + (create_nesting_tree): Likewise. + (check_for_nested_with_variably_modified): Likewise. + * tree-pretty-print.c (dump_function_header): Likewise. + * tree-profile.c (tree_profiling): Likewise. + * tree-sra.c (ipa_sra_preliminary_function_checks): Likewise. + (modify_function): Likewise. + (convert_callers): Likewise. + (convert_callers_for_node): Likewise. + * tree-ssa-structalias.c (ipa_pta_execute): Likewise. + (associate_varinfo_to_alias): Likewise. + (create_variable_info_for): Likewise. + (get_constraint_for_ssa_var): Likewise. + * tree-vectorizer.c (increase_alignment): Likewise. + * tree.c (find_decls_types_in_var): Likewise. + (find_decls_types_in_node): Likewise. + (free_lang_data_in_decl): Likewise. + * value-prof.c (gimple_ic_transform): Likewise. + (gimple_ic): Likewise. + (check_ic_target): Likewise. + (init_node_map): Likewise. + * varasm.c (decl_binds_to_current_def_p): Likewise. + (default_binds_local_p_1): Likewise. + (dump_tm_clone_pairs): Likewise. + (assemble_alias): Likewise. + (find_decl): Likewise. + (mark_decl_referenced): Likewise. + * varpool.c (varpool_for_node_and_aliases): Likewise. + (varpool_extra_name_alias): Likewise. + (varpool_create_variable_alias): Likewise. + (add_new_static_var): Likewise. + (varpool_finalize_named_section_flags): Likewise. + (varpool_remove_unreferenced_decls): Likewise. + (enqueue_node): Likewise. + (varpool_assemble_decl): Likewise. + (assemble_aliases): Likewise. + (varpool_analyze_node): Likewise. + (cgraph_variable_initializer_availability): Likewise. + (varpool_add_new_variable): Likewise. + (ctor_for_folding): Likewise. + (dump_varpool_node): Likewise. + (varpool_remove_initializer): Likewise. + (varpool_remove_node): Likewise. + (varpool_node_for_decl): Likewise. + (varpool_create_empty_node): Likewise. + * config/i386/i386.c (ix86_generate_version_dispatcher_body): Likewise. + (ix86_get_function_versions_dispatcher): Likewise. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + * cgraph.h (symtab_node_base): Convert to a class; + add GTY((desc ("%h.type"), tag ("SYMTAB_SYMBOL"))), and take + chain_next/prev from symtab_node_def. + (cgraph_node): Inherit from symtab_node; add GTY option + tag ("SYMTAB_FUNCTION"). + (varpool_node): Inherit from symtab_node; add GTY option + tag ("SYMTAB_VARIABLE"). + (symtab_node_def): Remove. + (is_a_helper <cgraph_node>::test (symtab_node_def *)): Convert to... + (is_a_helper <cgraph_node>::test (symtab_node_base *)): ...this. + (is_a_helper <varpool_node>::test (symtab_node_def *)): Convert to... + (is_a_helper <varpool_node>::test (symtab_node_base *)): ...this. + + * ipa-ref.h (symtab_node_def): Drop. + (symtab_node): Change underlying type from symtab_node_def to + symtab_node_base. + (const_symtab_node): Likwise. + + * is-a.h: Update examples in comment. + + * symtab.c (symtab_hash): Change symtab_node_def to symtab_node_base. + (assembler_name_hash): Likewise. + +2013-10-29 Martin Liska <marxin.liska@gmail.com> + + * doc/tree-ssa.texi (gimple_phi_result): Document. + (gimple_phi_num_args, gimple_phi_arg): Likewise. + (gimple_phi_arg_edge, gimple_phi_arg_def): Likewise. + (PHI_RESULT, PHI_NUM_ARGS): Remove. + (PHI_ARG_ELT, PHI_ARG_EDGE, PHI_ARG_DEF): Likewise. + +2013-10-29 Andrew MacLeod <amacleod@redhat.com> + + * expr.h: Revert change and include tree-core.h. + * rtl.h: Revert change and don't include tree-core.h. + +2013-10-29 Andrew MacLeod <amacleod@redhat.com> + + * config/darwin.c: Include gimple.h. + * config/i386/winnt.c: Likewise. + +2013-10-29 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/19831 + * tree-ssa-alias.c (stmt_kills_ref_p_1): Handle BUILT_IN_FREE. + +2013-10-29 Andrew MacLeod <amacleod@redhat.com> + + * tree-outof-ssa.h: Remove include files. + * tree-outof-ssa.c: Add required include files from tree-outof-ssa.h. + * expr.c: Likewise. + * tree-ssa-coalesce.c: Likewise. + * cfgexpand.c: Likewise. + * tree-ssa-ter.c: Likewise. + * ipa-prop.h: Remove gimple.h and tree-core.h from include list. + * lto-streamer.h: Likewise. + * cgraphbuild.c: Add gimple.h to include list. + * data-streamer-in.c: Likewise. + * ipa-cp.c: Likewise. + * tree-streamer.c: Likewise. + * lto-compress.c: Likewise. + * ipa-reference.c: Likewise. + * data-streamer-out.c: Likewise. + * lto-cgraph.c: Likewise. + * cgraphclones.c: Likewise. + * ipa-utils.c: Likewise. + * data-streamer.c: Likewise. + * ipa-split.c: Likewise. + * lto-section-in.c: Likewise. + * tree-streamer-out.c: Likewise. + * ipa-prop.c: Likewise. + * tree-streamer-in.c: Likewise. + * symtab.c: Likewise. + * opts-global.c: Likewise. + * lto-opts.c: Likewise. + * lto-section-out.c: Likewise. + * lto-streamer.c: Likewise. + * rtl.h: Add tree-core.h to include list. + * expr.h: Remove tree-core.h from include list. + * gimple.h: Likewise. + * ipa-utils.h: Likewise. + * streamer-hooks.h: Likewise. + * streamer-hooks.c: Include input.h. + +2013-10-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (cortexa7_extra_costs): New table. + (arm_cortex_a7_tune): New. + * config/arm/arm-cores.def: Use cortex_a7 tuning for cortex-a7. + +2013-10-29 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <MEM_EXPR>: Eliminate small redundancy. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + * doc/gty.texi ("Inheritance and GTY"): Make it clear that + to use autogenerated markers for a class-hierarchy, every class + must have a GTY marker. + * gengtype.h (struct type): Add linked list of subclasses to + the "s" member of the union. + (add_subclass): New decl. + * gengtype-state.c (read_state_struct_type): Set up subclass + linked list. + * gengtype.c (get_ultimate_base_class): New. + (add_subclass): New. + (new_structure): Set up subclass linked list. + (set_gc_used_type): Propagate usage information to subclasses. + (output_mangled_typename): Use get_ultimate_base_class. + (walk_subclasses): Use the subclass linked list, avoiding an + O(N^2) when writing out all types. + (walk_type): Issue an error if the base class is missing a tag, + rather than generating bogus C code. Add a gcc_unreachable + default case, in case people omit tags from concrete subclasses, + or get the values wrong. + (write_func_for_structure): Issue an error for subclasses for + which the base doesn't have a "desc", since otherwise the + autogenerated routines for the base would silently fail to visit + any subclass fields. + (write_root): Use get_ultimate_base_class, tweaking constness of + tp to match that function's signature. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + * doc/gty.texi (GTY Options): Add note about inheritance to + description of desc and tag. + (Inheritance and GTY): New. + +2013-10-29 David Malcolm <dmalcolm@redhat.com> + + * gengtype-parse.c (opts_have): Drop "static" so that + we can use this from gengtype.c. + * gengtype.c (set_gc_used_type): Mark any base class as used; + update field traversal to visit inherited fields. + (output_mangled_typename): Convert references to classes within + an inheritance hierarchy to reference the ultimate base class, + since only it will have gt_ functions. + (get_string_option): New. + (walk_subclasses): New. + (walk_type): Treat GTY structs that have a "desc" as being the + root of an inheritance hierarchy. Generate a switch on it + within the marking function which walks all subclasses, adding + cases for them via walk_subclasses. For subclasses, visit all + fields of the type (including inherited ones). + (write_func_for_structure): Don't write fns for subclasses, only + for the ultimate base class within an inheritance hierarchy. + Subclasses-marking will be handled by the base class marking functions. + (write_types): Likewise. + (write_local_func_for_structure): Likewise. + (USED_BY_TYPED_GC_P): Emit allocators for subclasses that have + a "tag" option (and are thus concrete subclasses). + (write_root): Use the marker function for the ultimate base class. + * gengtype.h (FOR_ALL_INHERITED_FIELDS): New. + (opts_have): Add declaration. + +2013-10-28 Vladimir Makarov <vmakarov@redhat.com> + + * lra-spills.c (lra_final_code_change): Remove useless move insns + originated from moves of pseudos. + +2013-10-28 Jeff Law <law@redhat.com> + + * lower-subreg.c (resolve_simple_move): Fix comment typo. + +2013-10-28 Trevor Saunders <tsaunders@mozilla.com> + + * df-scan.c (df_collection_rec): Adjust. + (copy_defs): New constant. + (copy_uses): Likewise. + (copy_eq_uses): Likewise. + (copy_mw): Likewise. + (copy_all): Likewise. + (df_insn_rescan): Adjust. + (df_notes_rescan): Likewise. + (df_swap_refs): Likewise. + (df_sort_and_compress_refs): Likewise. + (df_sort_and_compress_mws): Likewise. + (df_install_refs): Likewise. + (df_install_mws): Likewise. + (df_refs_add_to_chains): Add flags parameter controlling which vectors + are coppied. + (df_bb_refs_record): Adjust. + (df_record_entry_block_defs): Likewise. + (df_record_exit_block_defs): Likewise. + (df_refs_verify): Likewise. + (df_mws_verify): Likewise. + (df_insn_refs_verify): Likewise. + (df_bb_verify): Likewise. + * ipa-pure-const.c (finish_state): Remove. + (propagate): Adjust. + * tree-data-ref.c tree-ssa-alias.c tree-ssa-loop-ivcanon.c + tree-ssa-threadedge.c tree-vect-loop-manip.c tree-vect-slp.c + var-tracking.c: Adjust. + * vec.c (stack_vecs): Remove. + (register_stack_vec): Likewise. + (stack_vec_register_index): Likewise. + (unregister_stack_vec): Likewise. + * vec.h (struct va_stack): Remove. + (struct vec<T, A, vl_ptr>): Specialize as + struct vec<T, va_heap, vl_ptr> instead since va_heap is the only + allocation strategy compatable with the vl_ptr layout. + (struct vec<T, va_gc, vl_ptr>): Remove because it now gets an empty + specialization anyway. + (class stack_vec): New class. + (vec_stack_alloc): Remove. + (vec<T, va_heap, vl_ptr>::using_auto_storage): New method. + +2013-10-28 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.md (prefetch): Allow TARGET_AVX512PF. + (*prefetch_avx512pf_<mode>): New. + * config/i386/sse.md (avx512f_vmcmp<mode>3): Ditto. + (avx512f_maskcmp<mode>3): Ditto. + (vashrv16si3): Ditto. + +2013-10-28 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.md (any_truncate): New. + (trunsuffix): Ditto. + * config/i386/predicates.md (const_8_to_9_operand): New. + (const_10_to_11_operand): Ditto. + (const_12_to_13_operand): Ditto. + (const_14_to_15_operand): Ditto. + (const_16_to_19_operand): Ditto. + (const_20_to_23_operand): Ditto. + (const_24_to_27_operand): Ditto. + (const_28_to_31_operand): Ditto. + * config/i386/sse.md (unspec): Add UNSPEC_UNSIGNED_FIX_NOTRUNC. + (cvtusi2<ssescalarmodesuffix>32): New. + (cvtusi2<ssescalarmodesuffix>64): Ditto. + (ufloatv16siv16sf2): Ditto. + (avx512f_fix_notruncv16sfv16si): Ditto. + (avx512f_ufix_notruncv16sfv16si): Ditto. + (avx512f_vcvtss2usi): Ditto. + (avx512f_vcvtss2usiq): Ditto. + (avx512f_vcvttss2usi): Ditto. + (avx512f_vcvttss2usiq): Ditto. + (avx512f_vcvtsd2usi): Ditto. + (avx512f_vcvtsd2usiq): Ditto. + (avx512f_vcvttsd2usi): Ditto. + (avx512f_vcvttsd2usiq): Ditto. + (ufloatv8siv8df): Ditto. + (avx512f_cvtdq2pd512_2): Ditto. + (avx512f_cvtpd2dq512): Ditto. + (avx512f_ufix_notruncv8dfv8si): Ditto. + (avx512f_cvtpd2ps512): Ditto. + (vec_unpacks_lo_v16sf): Ditto. + (vec_unpacks_hi_v16sf): Ditto. + (vec_unpacks_float_hi_v16si): Ditto. + (vec_unpacks_float_lo_v16si): Ditto. + (avx512f_unpckhps512): Ditto. + (avx512f_unpcklps512): Ditto. + (avx512f_movshdup512): Ditto. + (avx512f_movsldup512): Ditto. + (vec_extract_lo_v32hi): Ditto. + (vec_extract_hi_v32hi): Ditto. + (vec_extract_lo_v64qi): Ditto. + (vec_extract_hi_v64qi): Ditto. + (avx512f_unpckhpd512): Ditto. + (avx512f_movddup512): Ditto. + (avx512f_unpcklpd512): Ditto. + (*avx512f_unpcklpd512): Ditto. + (avx512f_shufps512_1): Ditto. + (avx512f_shufpd512_1): Ditto. + (avx512f_interleave_highv8di): Ditto. + (avx512f_interleave_lowv8di): Ditto. + (PMOV_DST_MODE): Ditto. + (pmov_src_mode): Ditto. + (pmov_src_lower): Ditto. + (pmov_suff): Ditto. + (*avx512f_<code><pmov_src_lower><mode>2): Ditto. + (*avx512f_<code>v8div16qi2): Ditto. + (*avx512f_<code>v8div16qi2_store): Ditto. + (vec_widen_umult_even_v16si): Ditto. + (*vec_widen_umult_even_v16si): Ditto. + (vec_widen_smult_even_v16si): Ditto. + (*vec_widen_smult_even_v16si): Ditto. + (avx512f_interleave_highv16si): Ditto. + (avx512f_interleave_lowv16si): Ditto. + (avx512f_<code>v16qiv16si2): Ditto. + (avx512f_<code>v16hiv16si2): Ditto. + (avx512f_<code>v8qiv8di2): Ditto. + (avx512f_<code>v8hiv8di2): Ditto. + (avx512f_<code>v8siv8di2): Ditto. + (avx512cd_maskb_vec_dupv8di): Ditto. + (avx512cd_maskw_vec_dupv16si): Ditto. + (avx512f_vcvtph2ps512): Ditto. + (avx512f_vcvtps2ph512): Ditto. + (VEC_EXTRACT_MODE): Extened with wider modes. + (VEC_PERM_AVX2): Ditto. + (VEC_PERM_CONST): Ditto. + +2013-10-28 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_ccfsm_post_advance): + Add comment about TYPE_RETURN. + +2013-10-28 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (strip_offset_1): Change parameter type. + Count DECL_FIELD_BIT_OFFSET for COMPONENT_REF. + (strip_offset): Convert offset to unsigned number. + +2013-10-27 Tom de Vries <tom@codesourcery.com> + + * cfgexpand.c (gimple_expand_cfg): Remove test for parm_birth_insn. + Don't commit insertions after NOTE_INSN_FUNCTION_BEG. + +2013-10-27 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.c (MSW, LSW): Move and rename macros to... + * config/sh/sh.h (SH_REG_MSW_OFFSET, SH_REG_LSW_OFFSET): ... here. + (TARGET_BIG_ENDIAN): New macro. + * config/sh/sh.md: Use it instead of !TARGET_LITTLE_ENDIAN. + Use SH_REG_MSW_OFFSET and SH_REG_LSW_OFFSET. + * config/sh/sh.c: Likewise. + * config/sh/sh.h: Likewise. + +2013-10-27 Hans-Peter Nilsson <hp@axis.com> + + * config/cris/cris.c (cris_emit_trap_for_misalignment): Replace the + removed PRED_MUDFLAP with PRED_NORETURN. Correct file-path in comment. + +2013-10-26 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.md (movmemsi): Remove empty constraints and predicates. + Fix formatting. + (cmpstr_t, cmpstrsi): Fix formatting. + +2013-10-26 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/52483 + * config/sh/predicates.md (general_movdst_operand): Allow reg+reg + addressing, do not use general_operand for memory operands. + +2013-10-26 Vladimir Makarov <vmakarov@redhat.com> + + Revert: + 2013-10-25 Vladimir Makarov <vmakarov@redhat.com> + * lra-spills.c (lra_final_code_change): Remove useless move insns. + +2013-10-26 Jeff Law <law@redhat.com> + + * predict.c (PRED_MUDFLAP): Remove. + * targhooks.c (build_va_arg_indirect_ref): Remove mudflap support. + + * Makefile.in (C_COMMON_OBJS): Remove tree-mudflap. + (OBJS): Remove tree-nomudflap.o + (GTFILES): Remove tree-mudflap.c + * builtins.c (expand_builtin_alloc): Remove mudflap support. + * gcc.c (MFWRAP_SPEC, MFLIB_SPEC): Likewise. + (mfwrap_spec, mflib_spec): Likewise. + (cpp_unique_options, cc1_options, static_specs): Likewise. + * gimplify (gimplify_vla_decl, build_va_arg_indirect_ref): Likewise. + * passes.def: Likewise. + * toplev.c (compile_file, process_options): Likewise. + * tree-inline.c (copy_tree_r): Likewise. + * tree-pass.,h (make_pass_mudflap_1, make_pass_mudflap_2): Likewise. + * varasm.c (make_decl_rtl, make_decl_rtl_for_debug): Likewise. + (build_constant_desc, output_constant_def_contents): Likewise. + (categorize_decl_for_section): Likewise. + * tree-mudflap.c: Removed. + * tree-mudflap.h: Removed. + * tree-nomudflap.c: Removed. + * bfin/uclinux.h (MFWRAP_SPEC): Remove. + * moxie/uclinux.h (MFWRAP_SPEC): Likewise. + * rs6000/aix.h (MFWRAP_SPEC, MFLIB_SPEC): Likewise. + * config/sol2.h (MFLIB_SPEC): Likewise. + * doc/install.texi: Remove mudflap references. + * doc/passes.texi: Similarly. + * doc/sourcebuild.texi: Similarly. + * doc/invoke.texi: Remove mudlfap related options. + +2013-10-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/58759 + * lra-constraints.c (lra_constraints): Remove wrong condition to + remove insn setting up an equivalent pseudo. + +2013-10-25 Vladimir Makarov <vmakarov@redhat.com> + + * config/rs6000/rs6000-protos.h + (rs6000_secondary_memory_needed_mode): New prototype. + * config/rs6000/rs6000.c: Include ira.h. + (TARGET_LRA_P): Redefine. + (rs6000_legitimate_offset_address_p): Call + legitimate_constant_pool_address_p in strict mode for LRA. + (rs6000_legitimate_address_p): Ditto. + (legitimate_lo_sum_address_p): Add code for LRA. Use lra_in_progress. + (rs6000_emit_move): Add LRA version of code to generate load/store + of SDmode values. + (rs6000_secondary_memory_needed_mode): New. + (rs6000_alloc_sdmode_stack_slot): Do nothing for LRA. + (rs6000_secondary_reload_class): Return NO_REGS for LRA for + constants, memory, and FP registers. + (rs6000_lra_p): New. + * config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_MODE): New macro. + * config/rs6000/rs6000.opt (mlra): New option. + * lra-spills.c (lra_final_code_change): Remove useless move insns. + +2013-10-25 Yufeng Zhang <yufeng.zhang@arm.com> + + * tree-ssa-math-opts.c (convert_plusminus_to_widen): Call + has_single_use () and not do the conversion if has_single_use () + returns false for the multiplication result. + +2013-10-25 David Malcolm <dmalcolm@redhat.com> + + * tree.h (EXCEPTIONAL_CLASS_P): Rename parameter from "CODE" + to "NODE", since this works on a "tree", not an + "enum tree_code". + (CONSTANT_CLASS_P): Likewise. + (TYPE_P): Likewise. + (DECL_P): Likewise. + (INDIRECT_REF_P): Likewise. + (REFERENCE_CLASS_P): Likewise. + (COMPARISON_CLASS_P): Likewise. + (UNARY_CLASS_P): Likewise. + (BINARY_CLASS_P): Likewise. + (STATEMENT_CLASS_P): Likewise. + (VL_EXP_CLASS_P): Likewise. + (EXPRESSION_CLASS_P): Likewise. + (IS_TYPE_OR_DECL_P): Likewise. + +2013-10-25 Marc Glisse <marc.glisse@inria.fr> + + * tree-ssa-alias.c (ao_ref_init_from_ptr_and_size): Look for an + ADDR_EXPR in the defining statement. + +2013-10-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58626 + * tree-loop-distribution.c (enum rdg_dep_type): Remove + anti_dd, output_dd and input_dd. + (struct rdg_edge): Remove level and relation members. + (RDGE_LEVEL, RDGE_RELATION): Remove. + (dot_rdg_1): Adjust. + (create_rdg_edge_for_ddr): Remove. + (create_rdg_edges_for_scalar): Adjust. + (create_edge_for_control_dependence): Likewise. + (create_rdg_edges): Split into ... + (create_rdg_flow_edges): ... this + (create_rdg_cd_edges): ... and this. + (free_rdg): Adjust. + (build_rdg): Likewise, do not compute data dependences or + add edges for them. + (pg_add_dependence_edges): New function. + (pgcmp): Likewise. + (distribute_loop): First apply all non-dependence based + partition mergings. Then compute dependences between partitions + and merge and order partitions according to them. + +2013-10-25 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/58831 + * alias.c (init_alias_analysis): At the beginning of each iteration, + set the reg_seen[N] bit if static_reg_base_value[N] is non-null. + +2013-10-25 Eric Botcazou <ebotcazou@adacore.com> + + * recog.c (search_ofs): New static variable moved from... + (peep2_find_free_register): ...here. + (peephole2_optimize): Initialize it. + +2013-10-25 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (fopenmp): Change supported OpenMP version to 4.0. + +2013-10-25 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.h (TARGET_MPX): New define. + (TARGET_MPX_P): Ditto. + +2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com> + + * config/i386/constraints.md (B): New. + (Ti): New. + (Tb): New. + * config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__. + * config/i386/i386-modes.def (BND32): New. + (BND64): New. + * config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New. + * config/i386/i386.c (isa_opts): Add mmpx. + (regclass_map): Add bound registers. + (dbx_register_map): Likewise. + (dbx64_register_map): Likewise. + (svr4_dbx_register_map): Likewise. + (PTA_MPX): New. + (ix86_option_override_internal): Support MPX ISA. + (ix86_conditional_register_usage): Support bound registers. + (print_reg): Likewise. + (ix86_code_end): Add MPX bnd prefix. + (output_set_got): Likewise. + (ix86_output_call_insn): Likewise. + (ix86_print_operand): Add '!' (MPX bnd) print prefix support. + (ix86_print_operand_punct_valid_p): Likewise. + (ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and + UNSPEC_BNDMK_ADDR. + (ix86_class_likely_spilled_p): Add bound regs support. + (ix86_hard_regno_mode_ok): Likewise. + (x86_order_regs_for_local_alloc): Likewise. + (ix86_bnd_prefixed_insn_p): New. + * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Fix to new value. + (FIXED_REGISTERS): Add bound registers. + (CALL_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (HARD_REGNO_NREGS): Likewise. + (TARGET_MPX): New. + (VALID_BND_REG_MODE): New. + (FIRST_BND_REG): New. + (LAST_BND_REG): New. + (reg_class): Add BND_REGS. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + (BND_REGNO_P): New. + (ANY_BND_REG_P): New. + (BNDmode): New. + (HI_REGISTER_NAMES): Add bound registers. + * config/i386/i386.md (UNSPEC_BNDMK): New. + (UNSPEC_BNDMK_ADDR): New. + (UNSPEC_BNDSTX): New. + (UNSPEC_BNDLDX): New. + (UNSPEC_BNDLDX_ADDR): New. + (UNSPEC_BNDCL): New. + (UNSPEC_BNDCU): New. + (UNSPEC_BNDCN): New. + (UNSPEC_MPX_FENCE): New. + (BND0_REG): New. + (BND1_REG): New. + (type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (length_immediate): Likewise. + (prefix_0f): Likewise. + (memory): Likewise. + (prefix_rep): Check for bnd prefix. + (length_nobnd): New. + (length): Use length_nobnd if specified. + (BND): New. + (bnd_ptr): New. + (BNDCHECK): New. + (bndcheck): New. + (*jcc_1): Add bnd prefix and rename length attr to length_nobnd. + (*jcc_2): Likewise. + (jump): Likewise. + (simple_return_internal): Likewise. + (simple_return_pop_internal): Likewise. + (*indirect_jump): Add MPX bnd prefix. + (*tablejump_1): Likewise. + (simple_return_internal_long): Likewise. + (simple_return_indirect_internal): Likewise. + (<mode>_mk): New. + (*<mode>_mk): New. + (mov<mode>): New. + (*mov<mode>_internal_mpx): New. + (<mode>_<bndcheck>): New. + (*<mode>_<bndcheck>): New. + (<mode>_ldx): New. + (*<mode>_ldx): New. + (<mode>_stx): New. + (*<mode>_stx): New. + * config/i386/predicates.md (lea_address_operand): Rename to... + (address_no_seg_operand): ... this. + (address_mpx_no_base_operand): New. + (address_mpx_no_index_operand): New. + (bnd_mem_operator): New. + * config/i386/i386.opt (mmpx): New. + * doc/invoke.texi: Add documentation for the flags -mmpx, -mno-mpx. + * doc/rtl.texi Add documentation for BND32mode and BND64mode. + +2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com> + + * mode-classes.def (MODE_POINTER_BOUNDS): New. + * tree.def (POINTER_BOUNDS_TYPE): New. + * genmodes.c (complete_mode): Support MODE_POINTER_BOUNDS. + (POINTER_BOUNDS_MODE): New. + (make_pointer_bounds_mode): New. + * machmode.h (POINTER_BOUNDS_MODE_P): New. + * stor-layout.c (int_mode_for_mode): Support MODE_POINTER_BOUNDS. + (layout_type): Support POINTER_BOUNDS_TYPE. + * tree-pretty-print.c (dump_generic_node): Support POINTER_BOUNDS_TYPE. + * tree.c (build_int_cst_wide): Support POINTER_BOUNDS_TYPE. + (type_contains_placeholder_1): Likewise. + * tree.h (POINTER_BOUNDS_TYPE_P): New. + * varasm.c (output_constant): Support POINTER_BOUNDS_TYPE. + * doc/rtl.texi (MODE_POINTER_BOUNDS): New. + +2013-10-24 Igor Shevlyakov <igor.shevlyakov@gmail.com> + + * expr.c (expand_expr_real_1): Use mode of memory reference rather than + mode of address computation when calling memory_address_addr_space. + +2013-08-24 Richard Henderson <rth@twiddle.net> + + PR rtl/58542 + * optabs.c (maybe_emit_atomic_exchange): Use create_input_operand + instead of create_convert_operand_to. + (maybe_emit_sync_lock_test_and_set): Likewise. + (expand_atomic_compare_and_swap): Likewise. + (maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes. + +2013-08-24 Sriraman Tallam <tmsriram@google.com> + + * cgraph.c (cgraph_fnver_htab): Move GTY((...)) to be before htab_t. + Change param_is to use the struct and not the pointer to the struct. + +2013-10-24 Andrew MacLeod <amacleod@redhat.com> + + * builtins.c (dummy_object, gimplify_va_arg_expr): Move to gimplify.c. + * gimplify.c (build_va_arg_indirect_ref, std_gimplify_va_arg_expr): + Move to targhooks.c. + (dummy_object, gimplify_va_arg_expr): Relocate from builtins.c. + * targhooks.c (build_va_arg_indirect_ref, std_gimplify_va_arg_expr): + Relocate from gimplify.c. + * targhooks.h: Add 2 prototypes. + * tree.h: Delete 2 prototypes. + +2013-10-24 Igor Shevlyakov <igor.shevlyakov@gmail.com> + + * tree-ssa-loop-ivopts.c (multiplier_allowed_in_address_p ): Check both + [reg+mult*reg] and [mult*reg] to determine if multiplier is allowed. + +2013-10-24 Cong Hou <congh@google.com> + + * convert.c (convert_to_real): Guard those unsafe math function + convertions with flag_unsafe_math_optimizations. Handle sqrt() + specially. + +2013-10-24 Markus Trippelsdorf <markus@trippelsdorf.de> + + PR ipa/58712 + * cgraph.c (cgraph_create_edge_1): Add indirect_unknown_callee + as argument. + (cgraph_create_edge): Use the new argument. + (cgraph_create_indirect_edge): Likewise. + +2013-10-24 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_ccfsm_post_advance): Also handle + TYPE_UNCOND_BRANCH. + (arc_ifcvt) <case 1 and 2>: Check that arc_ccfsm_post_advance + changes statep->state. + +2013-10-24 Tobias Burnus <burnus@net-b.de> + + PR other/33426 + * tree-cfg.c (replace_loop_annotate): New function. + (execute_build_cfg): Call it. + * gimplify.c (gimple_boolify, gimplify_expr): Handle ANNOTATE_EXPR. + * internal-fn.c (expand_ANNOTATE): New function. + * internal-fn.def (ANNOTATE): Define as new internal function. + * tree-core.h (tree_node_kind): Add annot_expr_ivdep_kind. + * tree-pretty-print.c (dump_generic_node): Handle ANNOTATE_EXPR. + * tree.def (ANNOTATE_EXPR): New DEFTREECODE. + * doc/extend.texi (Pragmas): Document #pragma ivdep. + * doc/generic.texi (Expressions): Document ANNOTATE_EXPR. + +2013-10-17 Ian Bolton <ian.bolton@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_preferred_reload_class): + Special case reload SP+C into none GENERAL_REGS. + +2013-10-24 Michael Matz <matz@suse.de> + + * gengtype.c (is_file_equal): Check that files will be same length. + +2013-10-25 Christian Bruel <christian.bruel@st.com> + + * config.gcc (sh-*): Add sh-mem.o to extra_obj. + * config/sh/t-sh (sh-mem.o): New rule. + * config/sh/sh-mem.cc (expand_block_move): Moved here. + (sh_expand_cmpstr): New function. + * config/sh/sh.c (force_into, expand_block_move): Move to sh-mem.c. + * config/sh/sh-protos.h (sh_expand_cmpstr): Declare. + * config/sh/sh.md (cmpstrsi, cmpstr_t): New patterns. + (rotlhi3_8): Rename. + +2013-10-24 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * configure.ac (ZW_PROG_COMPILER_DEPENDENCIES): Use CXX instead of CC. + * Makefile.in (CXXDEPMODE): Assign and change users. + (CCDEPMODE): Delete. + * configure: Regenerate. + +2013-10-23 David Malcolm <dmalcolm@redhat.com> + + * gengtype-parse.c (require_without_advance): New. + (type): For GTY-marked types that are not GTY((user)), parse any + base classes, requiring them to be single-inheritance, and not + be templates. For non-GTY-marked types and GTY((user)), + continue to skip over any C++ inheritance specification. + * gengtype-state.c (state_writer::write_state_struct_type): + Write base class of type (if any). + (read_state_struct_type): Read base class of type (if any). + * gengtype.c (new_structure): Add a "base_class" parameter. + (create_optional_field_): Update for new parameter to new_structure. + (adjust_field_rtx_def): Likewise. + (adjust_field_tree_exp): Likewise. + * gengtype.h (struct type): Add "base_class" field to the s + union field. + (new_structure): Add "base" parameter. + +2013-10-23 Sriraman Tallam <tmsriram@google.com> + + PR target/57756 + * config/i386/i386.c (ix86_option_override_internal): + Change TARGET_SSE2 to TARGET_SSE2_P (opts->...) + (ix86_valid_target_attribute_tree): + Change TARGET_64BIT to TARGET_64BIT_P (opts->...) + Change TARGET_SSE to TARGET_SSE_P (opts->...) + +2013-10-23 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa-loop.h: Remove include files. + * gengtype.c (open_base_files): Adjust include list for gtype-desc.c. + * cfgloopmanip.c: Move required includes from tree-ssa-loop.h. + * graphite-clast-to-gimple.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-pure-const.c: Likewise. + * loop-init.c: Likewise. + * passes.c: Likewise. + * predict.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-chrec.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-parloops.c: Likewise. + * tree-predcom.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-ssa-address.c: Likewise. + * tree-ssa.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-loop.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vectorizer.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree-vrp.c: Likewise. + +2013-10-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (mulv8hi3): Adjust for little endian. + +2013-10-23 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58775 + PR tree-optimization/58791 + * tree-ssa-reassoc.c (reassoc_stmt_dominates_stmt_p): New function. + (insert_stmt_after): Rewritten, don't move the stmt, but really + insert it. + (get_stmt_uid_with_default): Remove. + (build_and_add_sum): Use insert_stmt_after and + reassoc_stmt_dominates_stmt_p. Fix up uid if bb contains only labels. + (update_range_test): Set uid on stmts added by + force_gimple_operand_gsi. Don't immediately modify statements + in inter-bb optimization, just update oe->op values. + (optimize_range_tests): Return bool whether any changed have been made. + (update_ops): New function. + (struct inter_bb_range_test_entry): New type. + (maybe_optimize_range_tests): Perform statement changes here. + (not_dominated_by, appears_later_in_bb, get_def_stmt, + ensure_ops_are_available): Remove. + (find_insert_point): Rewritten. + (rewrite_expr_tree): Remove MOVED argument, add CHANGED argument, + return LHS of the (new resp. old) stmt. Don't call + ensure_ops_are_available, don't reuse SSA_NAMEs, recurse first + instead of last, move new stmt at the right place. + (linearize_expr, repropagate_negates): Don't reuse SSA_NAMEs. + (negate_value): Likewise. Set uids. + (break_up_subtract_bb): Initialize uids. + (reassociate_bb): Adjust rewrite_expr_tree caller. + (do_reassoc): Don't call renumber_gimple_stmt_uids. + +2013-10-23 David Edelsohn <dje.gcc@gmail.com> + + PR target/58838 + * config/rs6000/rs6000.md (mulsi3_internal1 and splitter): Add + TARGET_32BIT final condition. + (mulsi3_internal2 and splitter): Same. + +2013-10-23 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_across_edge): Do not allow threading + through joiner blocks with abnormal outgoing edges. + + * tree-ssa-threadupdate.c (thread_block_1): Renamed from thread_block. + Add parameter JOINERS, to allow/disallow threading through joiner + blocks. + (thread_block): New. Call thread_block_1. + (mark_threaded_blocks): Remove code to filter out certain cases + of threading through joiner blocks. + (thread_through_all_blocks): Document how we can have a dangling + edge AUX field and clear it. + +2013-10-23 Ian Lance Taylor <iant@google.com> + + * doc/invoke.texi (Option Summary): Remove -fno-default-inline. + (C++ Dialect Options): Likewise. + (Optimize Options): Likewise. + +2013-10-23 Tom de Vries <tom@codesourcery.com> + + PR tree-optimization/58805 + * tree-ssa-tail-merge.c (stmt_local_def): Add gimple_vdef check. + +2013-10-23 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-patterns.c (vect_recog_divmod_pattern): Optimize + sequence based on get_range_info returned range. + +2013-10-23 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa.h: Remove all #include's + * gengtype.c (open_base_files): Adjust include list for gtype-desc.c. + * alias.c: Move required includes from tree-ssa.h. + * asan.c: Likewise. + * builtins.c: Likewise. + * calls.c: Likewise. + * cfgexpand.c: Likewise. + * cfghooks.c: Likewise. + * cfgloop.c: Likewise. + * cfgloopmanip.c: Likewise. + * cgraph.c: Likewise. + * cgraphbuild.c: Likewise. + * cgraphclones.c: Likewise. + * cgraphunit.c: Likewise. + * dse.c: Likewise. + * except.c: Likewise. + * expr.c: Likewise. + * final.c: Likewise. + * fold-const.c: Likewise. + * ggc-page.c: Likewise. + * gimple-builder.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-iterator.c: Likewise. + * gimple-low.c: Likewise. + * gimple-pretty-print.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple-streamer-in.c: Likewise. + * gimple-streamer-out.c: Likewise. + * gimplify.c: Likewise. + * graphite-blocking.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-dependences.c: Likewise. + * graphite-interchange.c: Likewise. + * graphite-optimize-isl.c: Likewise. + * graphite-poly.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * graphite.c: Likewise. + * ipa-cp.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-inline-transform.c: Likewise. + * ipa-inline.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-pure-const.c: Likewise. + * ipa-reference.c: Likewise. + * ipa-split.c: Likewise. + * ipa-utils.c: Likewise. + * loop-init.c: Likewise. + * lto-cgraph.c: Likewise. + * lto-section-in.c: Likewise. + * lto-section-out.c: Likewise. + * lto-streamer-in.c: Likewise. + * lto-streamer-out.c: Likewise. + * lto-streamer.c: Likewise. + * omp-low.c: Likewise. + * passes.c: Likewise. + * predict.c: Likewise. + * print-tree.c: Likewise. + * profile.c: Likewise. + * sese.c: Likewise. + * targhooks.c: Likewise. + * tracer.c: Likewise. + * trans-mem.c: Likewise. + * tree-call-cdce.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-chrec.c: Likewise. + * tree-complex.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-dfa.c: Likewise. + * tree-eh.c: Likewise. + * tree-emutls.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-into-ssa.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-mudflap.c: Likewise. + * tree-nested.c: Likewise. + * tree-nrv.c: Likewise. + * tree-object-size.c: Likewise. + * tree-outof-ssa.c: Likewise. + * tree-parloops.c: Likewise. + * tree-phinodes.c: Likewise. + * tree-predcom.c: Likewise. + * tree-pretty-print.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-sra.c: Likewise. + * tree-ssa-address.c: Likewise. + * tree-ssa-alias.c: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-coalesce.c: Likewise. + * tree-ssa-copy.c: Likewise. + * tree-ssa-copyrename.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-dse.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-live.c: Likewise. + * tree-ssa-loop-ch.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-loop.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-operands.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-sink.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-ssa-tail-merge.c: Likewise. + * tree-ssa-ter.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-threadupdate.c: Likewise. + * tree-ssa-uncprop.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-ssa.c: Likewise. + * tree-ssanames.c: Likewise. + * tree-stdarg.c: Likewise. + * tree-streamer-in.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-slp.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree-vectorizer.c: Likewise. + * tree-vrp.c: Likewise. + * tree.c: Likewise. + * tsan.c: Likewise. + * value-prof.c: Likewise. + * var-tracking.c: Likewise. + * varpool.c: Likewise. + * vtable-verify.c: Likewise. + +2013-10-23 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/tilegx/tilegx.c: Include "tree.h". + +2013-10-23 Jakub Jelinek <jakub@redhat.com> + + * gimple-pretty-print.c (dump_ssaname_info): Always print "# " before + the info, not after it. + (gump_gimple_phi): Add COMMENT argument, if true, print "# " after + dump_ssaname_info call. + (pp_gimple_stmt_1): Adjust caller. + (dump_phi_nodes): Likewise. Don't print "# " here. + +2013-10-22 Jan Hubicka <jh@suse.cz> + + * i386.h (TARGET_MISALIGNED_MOVE_STRING_PROLOGUES_EPILOGUES): New + tuning flag. + * x86-tune.def (TARGET_MISALIGNED_MOVE_STRING_PROLOGUES): Define it. + * i386.c (expand_small_movmem_or_setmem): New function. + (expand_set_or_movmem_prologue_epilogue_by_misaligned_moves): New + function. + (alg_usable_p): Add support for value ranges; cleanup. + (ix86_expand_set_or_movmem): Add support for misaligned moves. + +2013-10-22 Sterling Augustine <saugustine@google.com> + + * doc/invoke.texi: Document -ggnu-pubnames. + * common.opt: Add new option -ggnu-pubnames and modify -gpubnames + logic. + * dwarf2out.c: Include gdb/gdb-index.h. + (DEBUG_PUBNAMES_SECTION, DEBUG_PUBTYPES_SECTION): Handle + debug_generate_pub_sections. + (is_java, output_pubtables, output_pubname): New functions. + (include_pubname_in_output): Handle debug_generate_pub_sections at + level 2. + (size_of_pubnames): Use new local space_for_flags based on + debug_generate_pub_sections. + (output_pubnames): Unify pubnames and pubtypes output logic. + Genericize comments. Call output_pubname. + (dwarf2out_finish): Move logic to output_pubnames and call it. + +2013-10-22 Uros Bizjak <ubizjak@gmail.com> + + PR target/58779 + * config/i386/i386.c (put_condition_code) <case GTU, case LEU>: + Remove CCCmode handling. + <case LTU>: Return 'c' suffix for CCCmode. + <case GEU>: Return 'nc' suffix for CCCmode. + (ix86_cc_mode) <case GTU, case LEU>: Do not generate overflow checks. + * config/i386/i386.md (*sub<mode>3_cconly_overflow): Remove. + (*sub<mode>3_cc_overflow): Ditto. + (*subsi3_zext_cc_overflow): Ditto. + +2013-10-22 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips.c (mips_rtx_costs): Fix cost estimate for nor + (AND (NOT OP1) (NOT OP2)). + +2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse + meaning of merge-high and merge-low masks for little endian; avoid + use of vector-pack masks for little endian for mismatched modes. + +2013-10-22 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/tilepro/tilepro.c: Include "tree.h". + +2013-10-22 Andreas Schwab <schwab@suse.de> + + * config/m68k/m68k.c (notice_update_cc): Handle register conflict + with PRE_DEC. + +2013-10-22 Paolo Carlini <paolo.carlini@oracle.com> + + * doc/contrib.texi ([Fran@,{c}ois Dumont], [Tim Shen], + [Ed Smith-Rowland]): New entries. + ([Stephen M. Webb]): Update. + +2013-10-22 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa-ter.h: Remove duplicate copy of file contents. + +2013-10-21 Marek Polacek <polacek@redhat.com> + + PR middle-end/58809 + * fold-const.c (fold_range_test): Return 0 if the type is not + an integral type. + +2013-10-21 Richard Sandiford <rdsandiford@googlemail.com> + + * system.h: Move hwint.h include further down. + * hwint.h (sext_hwi, zext_hwi): Define unconditionally. Add + gcc_checking_asserts. + * hwint.c (sext_hwi, zext_hwi): Delete ENABLE_CHECKING versions. + +2013-10-21 Bernd Edlinger <bernd.edlinger@hotmail.de> + + Fix volatile issues in optimize_bit_field_compare. + * fold-const.c (optimize_bit_field_compare): Bail out if + lvolatilep or rvolatilep. + +2013-10-21 Bernd Edlinger <bernd.edlinger@hotmail.de> + + Fix DECL_BIT_FIELD depencency on flag_strict_volatile_bitfields + and get_inner_reference returning different pmode for non-volatile + bit-field members dependent on flag_strict_volatile_bitfields. + * stor-layout.c (layout_decl): Remove special handling of + flag_strict_volatile_bitfields. + * expr.c (get_inner_reference): Don't use DECL_BIT_FIELD + if flag_strict_volatile_bitfields > 0 and TREE_THIS_VOLATILE. + +2013-10-21 Paulo Matos <pmatos@broadcom.com> + + * ipa-inline.c (edge_badness): Cap edge->count at max_count for badness + calculations. + +2013-10-21 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_through_normal_block): New + argument VISITED. Remove VISISTED as a local variable. When we + have a threadable jump, verify the destination of the jump has not + been visised. + (thread_across_edge): Allocate VISITED bitmap once at function + scope and use it throughout. Make sure to set appropriate bits in + VISITED for E (start of jump thread path). + * tree-ssa-threadupdate.c (mark_threaded_blocks): Reject threading + through a joiner if any edge on the path has a recorded jump thread. + +2013-10-21 Ian Lance Taylor <iant@google.com> + + * doc/invoke.texi (Optimize Options): For -fno-toplevel-reorder, + don't imply that attributes can solve all problems. + (Directory Options): Fix typo. + +2013-10-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (cortexa9_extra_costs): Update mult costs for + extend and extend_add. + +2013-10-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58794 + * fold-const.c (operand_equal_p): Compare FIELD_DECL operand + of COMPONENT_REFs with OEP_CONSTANT_ADDRESS_OF left in place. + +2013-10-21 Richard Biener <rguenther@suse.de> + + PR middle-end/58742 + * fold-const.c (fold_binary_loc): Fold ((T) (X /[ex] C)) * C + to (T) X for sign-changing conversions (or no conversion). + +2013-10-20 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (kxnor<mode>): Add FLAGS_REG clobber. + +2013-10-20 Jan Hubicka <jh@suse.cz> + + * config/i386/i386-tune.def: Add comment; organize into categories + +2013-10-21 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> + + * config/i386/i386.c (expand_set_or_movmem_via_loop): Add issetmem + argument. Update function comment. + (expand_set_or_movmem_via_rep): New function combining + expand_movmem_via_rep_mov and expand_setmem_via_rep_stos. + (expand_movmem_via_rep_mov): Remove. + expand_setmem_via_rep_stos): Remove. + (expand_movmem_epilogue): Update calls correspondingly. + (expand_setmem_epilogue_via_loop): Likewise. + (emit_memset): New. + (expand_setmem_epilogue): Add VEC_VALUE argument, refactor. + (expand_set_or_movmem_prologue): New function combining + expand_movmem_prologue and expand_setmem_prologue. + (expand_movmem_prologue): Remove. + (expand_setmem_prologue): Remove. + (expand_set_or_movmem_constant_prologue): New function combining + expand_constant_movmem_prologue and expand_constant_setmem_prologue. + (expand_constant_movmem_prologue): Remove. + (expand_constant_setmem_prologue): Remove. + (promote_duplicated_reg): Allow vector-const0 value. + (ix86_expand_set_or_movmem): New function combining ix86_expand_movmem + and ix86_expand_setmem. + (ix86_expand_movmem): Call ix86_expand_set_or_movmem. + (ix86_expand_setmem): Call ix86_expand_set_or_movmem. + +2013-10-21 Diego Novillo <dnovillo@google.com> + + * asan.c: Include tree.h + * bb-reorder.c: Likewise. + * cfgcleanup.c: Likewise. + * cfgloopmanip.c: Likewise. + * data-streamer-in.c: Likewise. + * data-streamer-out.c: Likewise. + * data-streamer.c: Likewise. + * dwarf2cfi.c: Likewise. + * graphite-blocking.c: Likewise. + * graphite-clast-to-gimple.c: Likewise. + * graphite-dependences.c: Likewise. + * graphite-interchange.c: Likewise. + * graphite-optimize-isl.c: Likewise. + * graphite-poly.c: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * graphite.c: Likewise. + * ipa-devirt.c: Likewise. + * ipa-profile.c: Likewise. + * ipa.c: Likewise. + * ira.c: Likewise. + * loop-init.c: Likewise. + * loop-unroll.c: Likewise. + * lower-subreg.c: Likewise. + * lto/lto-object.c: Likewise. + * recog.c: Likewise. + * reginfo.c: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-parloops.c: Likewise. + * tree-ssa-strlen.c: Likewise. + * tree-streamer.c: Likewise. + * value-prof.c: Likewise. + * target-globals.c: Likewise. + * expr.h: Include tree-core.h instead of tree.h. + * gimple.h: Likewise. + * ipa-prop.h: Likewise. + * ipa-utils.h: Likewise. + * lto-streamer.h: Likewise. + * streamer-hooks.h: Likewise. + * ipa-reference.h: Include cgraph.h instead of tree.h. + * cgraph.h: Include basic-block.h instead of tree.h. + * tree-streamer.h: Do not include tree.h. + * genattrtab.c (write_header): Generate inclusion of tree.h. + * genautomata.c (main): Likewise. + * genemit.c: Likewise. + * genopinit.c: Likewise. + * genoutput.c (output_prologue): Likewise. + * genpeep.c: Likewise. + +2013-10-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Adjust for + little endian. + (vec_unpacku_hi_v8hi): Likewise. + (vec_unpacku_lo_v16qi): Likewise. + (vec_unpacku_lo_v8hi): Likewise. + +2013-10-20 Jan Hubicka <jh@suse.cz> + + * config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM, + X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10. + (X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic. + +2013-10-20 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.h (ISA_HAS_WSBH): Define. + * config/mips/mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): New + constants. + (bswaphi2, bswapsi2, bswapdi2, wsbh, dsbh, dshd): New patterns. + +2013-10-19 John David Anglin <danglin@gcc.gnu.org> + + PR target/58603 + * system.h: Undef m_slot. + +2013-10-19 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (vspltis_constant): Make sure we check + all elements for both endian flavors. + +2013-10-19 Uros Bizjak <ubizjak@gmail.com> + + PR target/58792 + * config/i386/i386.c (ix86_function_value_regno): Add DX_REG, + ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG + and SI_REG for 64bit SYSV ABI targets. + +2013-10-19 Uros Bizjak <ubizjak@gmail.com> + + * mode-switching.c (create_pre_exit): Rename maybe_builtin_apply + to multi_reg_return. Clarify that we are skipping USEs of multiple + return registers. Use bool type where appropriate. + +2013-10-18 Jan Hubicka <jh@suse.cz> + + * config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Disable accumulation + for cold functions. + * x86-tune.def (X86_TUNE_USE_LEAVE): Update comment. + (X86_TUNE_PUSH_MEMORY): Likewise. + (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL, + X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): New. + (X86_TUNE_ACCUMULATE_OUTGOING_ARGS, X86_TUNE_ALWAYS_FANCY_MATH_387): + New. + * i386.c (x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, + x86_avx256_split_unaligned_load, x86_avx256_split_unaligned_store): + Remove. + (ix86_option_override_internal): Update to use tune features instead + of variables. + +2013-10-18 Cong Hou <congh@google.com> + + PR tree-optimization/58508 + * tree-vect-loop-manip.c (vect_loop_versioning): Hoist loop invariant + statement that contains data refs with zero-step. + +2013-10-18 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa.h: Don't include gimple-low.h, tree-ssa-address.h, + sbitmap.h, tree-ssa-threadedge.h, tree-ssa-dom.h and tree-cfgcleanup.h. + * gimple-low.c (gimple_check_call_arg, + gimple_check_call_matching_types): Move to cgraph.c. + * gimple-low.h: Remove prototype. + * cgraph.c: (gimple_check_call_arg, gimple_check_call_matching_types): + Relocate from gimple-low.c. + * cgraph.h: Add prototype. Don't include basic-block.h. + * gimplify.c: Add gimple-low to include list. + * omp-low.c: Add gimple-low and tree-cfgcleanup.h to include list. + * tree-eh.c: Add gimple-low to include list. + * tree-nested.c: Likewise. + * cfgexpand.c: Add tree-ssa-address.h to include list. + * expr.c: Likewise. + * gimple-fold.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * trans-mem.c: Likewise. + * tree-mudflap.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-dom.c: Include tree-ssa-threadedge.h and tree-ssa-dom.h. + (degenerate_phi_result): Move to tree-phinodes.c. + * tree-ssa-loop-ch.c: Include tree-ssa-threadedge.h. + * tree-ssa-threadedge.c: Likewise. + * tree-vrp.c: Likewise. + * tree-phinodes.c (degenerate_phi_result): Relocate here. + * tree-ssa-dom.h (degenerate_phi_result): Remove Prototype. + * tree-phinodes.h (degenerate_phi_result): Add prototype. + * tree-ssa-copy.c: Include tree-ssa-dom.h. + * tree-ssa-forwprop.c: Likewise. + * tree-cfgcleanup.c (execute_cleanup_cfg_post_optimizing, + pass_data_cleanup_cfg_post_optimizing, + make_pass_cleanup_cfg_post_optimizing): Relocate from tree-optimize.c. + * tree-optimize.c: Delete File. + * graphite.c: Include tree-cfgcleanup.h. + * passes.c: Likewise. + * tree-cfg.c: Likewise. + * tree-profile.c: Likewise. + * tree-ssa-dse.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-switch-conversion.c: Don't include tree-ssa-operands.h. + * tree-outof-ssa.c: Include sbitmap.h. + * tree-ssa-live.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-structalias.c: Likewise. + * tree-stdarg.c: Likewise. + * Makefile.in (OBJS): Delete tree-optimize.o. + * basic-block.h (gcov_type, gcov_type_unsigned): Move to coretypes.h. + * coretypes.h (gcov_type, gcov_type_unsigned): Relocate here. + * varasm.c: Include basic-block.h. + * cfgloop.h: Include function.h instead of basic-block.h + (bb_loop_depth): Move to cfgloop.c. + * cfgloop.c (bb_loop_depth): Relocate from cfgloop.h. + +2013-10-18 Teresa Johnson <tejohnson@google.com> + + * predict.c (probably_never_executed): Compare frequency-based + count to number of training runs. + * params.def (UNLIKELY_BB_COUNT_FRACTION): New parameter. + +2013-10-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (cortexa9_extra_costs): New table. + (arm_cortex_a9_tune): Use cortexa9_extra_costs. + +2013-10-18 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c: Do not include "tm.h" or "tm_p.h". + + * tree-ssa-threadupdate.c: Include "dbgcnt.h". + (register_jump_thread): Add "registered_jump_thread" debug + counter support. + * dbgcnt.def (registered_jump_thread): New debug counter. + +2013-10-18 Andrew MacLeod <amacleod@redhat.com> + + * config/rs6000/rs6000.c: Include cgraph.h. + +2013-10-18 Teresa Johnson <tejohnson@google.com> + + * tree-ssa-tail-merge.c (replace_block_by): Update edge + weights during merging. + +2013-10-18 Andrew MacLeod <amacleod@redhat.com> + + * tree-cfg.h: Rename from tree-flow.h. Remove #includes. + * tree-ssa.h: Relocate required #includes from tree-cfg.h. + * tree-ssa-operands.h: Remove prototype. + * tree-ssa-operands.c (virtual_operand_p): Move to gimple.c. + * gimple.c (virtual_operand_p): Relocate from gimple.c. + * gimple.h: Add prototype. + * gimple-ssa.h: Include tree-ssa-operands.h. + * tree-dump.c: Add tree-cfg.h to include list. + * tree-ssa-alias.c: Add ipa-reference.h to include list. + * config/alpha/alpha.c: Include gimple-ssa.h instead of tree-flow.h. + * config/i386/i386.c: Don't include tree-flow.h. + * config/rs6000/rs6000.c: Likewise. + +2013-10-18 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/frv/frv.c (frv_init_cumulative_args): Fix wrong cast. + +2013-10-18 Richard Biener <rguenther@suse.de> + + * stor-layout.c (layout_type): Do not change TYPE_PRECISION + or TYPE_UNSIGNED of integral types. + (set_min_and_max_values_for_integral_type): Leave TYPE_MIN/MAX_VALUE + NULL_TREE for zero-precision integral types. + +2013-10-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vcvt<ds>_n_<fsu><32,64>_<fsu><32,64>): Correct argument types. + +2013-10-17 Sriraman Tallam <tmsriram@google.com> + + PR target/57756 + * opth-gen.awk: Define target_flags_explicit. + +2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new + fields to the reg_addr array that describes the valid addressing + mode for any register, general purpose registers, floating point + registers, and Altivec registers. + (FIRST_RELOAD_REG_CLASS): Likewise. + (LAST_RELOAD_REG_CLASS): Likewise. + (struct reload_reg_map_type): Likewise. + (reload_reg_map_type): Likewise. + (RELOAD_REG_VALID): Likewise. + (RELOAD_REG_MULTIPLE): Likewise. + (RELOAD_REG_INDEXED): Likewise. + (RELOAD_REG_OFFSET): Likewise. + (RELOAD_REG_PRE_INCDEC): Likewise. + (RELOAD_REG_PRE_MODIFY): Likewise. + (reg_addr): Likewise. + (mode_supports_pre_incdec_p): New helper functions to say whether + a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY. + (mode_supports_pre_modify_p): Likewise. + (rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to + print the valid address mode bits for each mode. + (rs6000_debug_print_mode): Likewise. + (rs6000_debug_reg_global): Likewise. + (rs6000_setup_reg_addr_masks): New function to set up the address + mask bits for each type. + (rs6000_init_hard_regno_mode_ok): Use memset to clear arrays. + Call rs6000_setup_reg_addr_masks to set up the address mask bits. + (rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and + mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and + PRE_MODIFY are supported. + (rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec + registers, instead of {src,dest}_av_p. + (rs6000_print_options_internal): Tweak the debug output slightly. + +2013-10-17 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*vec_widen_smult_even_v8si): Remove + isa attribute. + +2013-10-17 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h (struct omp_region): Move to omp-low.c. + Remove omp_ prototypes and variables. + * gimple.h (omp_reduction_init): Move prototype to omp-low.h. + (copy_var_decl): Relocate prototype from tree-flow.h. + * gimple.c (copy_var_decl): Relocate from omp-low.c. + * tree.h: Move prototype to omp-low.h. + * omp-low.h: New File. Relocate prototypes here. + * omp-low.c (struct omp_region): Make local here. + (root_omp_region): Make static. + (copy_var_decl) Move to gimple.c. + (new_omp_region): Make static. + (make_gimple_omp_edges): New. Refactored from tree-cfg.c make_edges. + * tree-cfg.c: Include omp-low.h. + (make_edges): Factor out OMP specific bits to make_gimple_omp_edges. + * gimplify.c: Include omp-low.h. + * tree-parloops.c: Likewise. + +2013-10-17 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_fixup_binary_operands): When both source + operands are in memory, prefer to force non-matched operand 1 to + the register. + +2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/58673 + * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only + restrict TImode addresses to single indirect registers if both + -mquad-memory and -mvsx-timode are used. + (rs6000_output_move_128bit): Use quad_load_store_p to determine if + we should emit load/store quad. Remove using %y for quad memory + addresses. + + * config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add + constraints to allow load/store quad on machines where TImode is + not allowed in VSX registers. Use 'n' instead of 'F' constraint + for TImode to load integer constants. + +2013-10-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): Handle 'c'. + +2013-10-17 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_preferred_reload_class): Adjust + handling of STACK_REG. + +2013-10-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58143 + * tree-ssa-loop-im.c (arith_code_with_undefined_signed_overflow): + New function. + (rewrite_to_defined_overflow): Likewise. + (move_computations_dom_walker::before_dom): Rewrite stmts + with undefined signed overflow that are not always executed + into unsigned arithmetic. + +2013-10-16 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57756 + * config/rs6000/rs6000.opt (rs6000_isa_flags_explicit): Move the + explicit isa flag to be an options variable, instead of using + global_options_set. Remove define from rs6000.h. + * config/rs6000/rs6000.h (rs6000_isa_flags_explicit): Likewise. + + * config/rs6000/rs6000.c (rs6000_option_override_internal): + Initialize rs6000_isa_flags_explicit. + (rs6000_function_specific_save): Add gcc_options* parameter, so + that the powerpc builds after the 2013-10-15 changes. + (rs6000_function_specific_restore): Likewise. + +2013-10-16 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (rl78_alloc_address_registers_macax): Verify + op is a REG before checking REGNO. + (rl78_alloc_physical_registers): Verify pattern is a SET before + checking SET_SRC. + +2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for + endianness. + (vec_unpacks_lo_v4sf): Likewise. + (vec_unpacks_float_hi_v4si): Likewise. + (vec_unpacks_float_lo_v4si): Likewise. + (vec_unpacku_float_hi_v4si): Likewise. + (vec_unpacku_float_lo_v4si): Likewise. + +2013-10-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vsx.md (vsx_concat_<mode>): Adjust output for LE. + (vsx_concat_v2sf): Likewise. + +2013-10-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md + (*mov<mode>_aarch64): Fix output template for DUP (element) Scalar. + +2013-10-16 Andrew MacLeod <amacleod@redhat.com> + + PR tree-optimization/58697 + * cfgloop.c (get_estimated_loop_iterations_int): Rename from + estimated_loop_iterations_int. + (max_stmt_executions_int): Call get_max_loop_iterations_int. + (get_max_loop_iterations_int): New. HWINT version of + get_max_loop_iterations. + * cfgloop.h: Add prototypes. + * loop-iv.c (find_simple_exit): call get_estimated_loop_iterations_int. + * loop-unroll.c (decide_peel_once_rolling): Call + get_estimated_loop_iterations_int. + * tree-ssa-loop-niter.c (estimated_loop_iterations_int): Add back. + * tree-ssa-loop-niter.h: Tweak prototypes. + +2013-10-16 David Malcolm <dmalcolm@redhat.com> + + * gengtype-parse.c (struct_field_seq): Ignore access-control + keywords ("public:" etc). + +2013-10-16 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_regno_regclass): Classify + FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS. + +2013-10-16 Yvan Roux <yvan.roux@linaro.org> + + * config/arm/arm.opt (mlra): New option. + * config/arm/arm.c (arm_lra_p): New function. + (TARGET_LRA_P): Define. + +2013-10-16 Paulo Matos <pmatos@broadcom.com> + + * tree-core.h (tree_code_name): Remove. + * tree.h (get_tree_code_name): New prototype. + * tree.c (tree_code_name): Make static. + (get_tree_code_name): New function. + (dump_tree_statistics, tree_check_failed, tree_not_check_failed, + tree_class_check_failed, tree_range_check_failed, + tree_not_class_check_failed, omp_clause_check_failed, + tree_contains_struct_check_failed, tree_operand_check_failed): Use new + wrapper get_tree_code_name instead of calling tree_code_name directly. + * tree-vrp.c (dump_asserts_for): Likewise. + * tree-dump.c (dequeue_and_dump): Likewise. + * tree-pretty-print.c (do_niy, dump_generic_node): Likewise. + * tree-pretty-print.h (pp_unsupported_tree): Likewise. + * lto-streamer-out.c (lto_write_tree, DFS_write_tree): Likewise. + * tree-ssa-dom.c (print_expr_hash_elt): Likewise. + * gimple-pretty-print.c (dump_unary_rhs, dump_binary_rhs, + dump_ternary_rhs, dump_gimple_assign, dump_gimple_cond, + dump_gimple_omp_for): Likewise. + * tree-vect-data-refs.c (vect_create_data_ref_ptr): Likewise. + * tree-ssa-pre.c (print_pre_expr): Likewise. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Likewise. + * print-tree.c (print_node_brief, print_node): Likewise. + * gimple.c (gimple_check_failed): Likewise. + * lto-streamer.c (lto_tag_name, print_lto_report): Likewise. + * config/frv/frv.c (frv_init_cumulative_args): Likewise. + * config/mep/mep.c (mep_validate_vliw): Likewise. + * config/iq2000/iq2000.c (init_cumulative_args): Likewise. + * config/rs6000/rs6000.c (init_cumulative_args): Likewise. + +2013-10-16 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c (ix86_option_override_internal): Enable FMA4 + for AMD bdver3. + +2013-10-16 Hans-Peter Nilsson <hp@axis.com> + + * config/cris/t-elfmulti (MULTILIB_OPTIONS, MULTILIB_DIRNAMES) + (MULTILIB_MATCHES): Add multilib for -march=v8. + +2013-10-15 Sriraman Tallam <tmsriram@google.com> + + PR target/57756 + * optc-save-gen.awk: Add extra parameter to the save and restore + target calls. + * opth-gen.awk: Generate new TARGET_* macros to accept a parameter. + * tree.c (build_optimization_node): New parameter. Add extra parameter + to call to cl_optimization_save. + (build_target_option_node): New parameter. Add extra parameter + to call to cl_target_option_save. + * tree.h (build_optimization_node): New parameter. + (build_target_option_node): New parameter. + * c-family/c-common.c (handle_optimize_attribute): Fix calls to + build_optimization_node and build_target_option_node. + * c-family/c-pragma.c (handle_pragma_optimize): Ditto. + (handle_pragma_push_options): Ditto. + * toplev.c (process_options): Ditto. + * opts.c (init_options_struct): Check for opts_set non-null. + * target.def (target_option.save): New parameter. + (target_option.restore): New parameter. + * tm.texi: Generate. + * config/i386/i386-c.c (ix86_target_macros_internal): Ditto. + (ix86_pragma_target_parse): Ditto. + * config/i386/i386-protos.h (ix86_valid_target_attribute_tree): New + parameters. + * config/rs6000/rs6000.c (rs6000_option_override_internal): Fix calls + to build_optimization_node and build_target_option_node. + (rs6000_valid_attribute_p): Ditto. + (rs6000_pragma_target_parse): Ditto. + * config/i386/i386.opt (x_ix86_target_flags_explicit): New TargetSave + data. + * config/i386/i386.h: + TARGET_64BIT_P: New Macro + TARGET_MMX_P: New Macro. + TARGET_3DNOW_P: New Macro. + TARGET_3DNOW_A_P: New Macro. + TARGET_SSE_P: New Macro. + TARGET_SSE2_P: New Macro. + TARGET_SSE3_P: New Macro. + TARGET_SSSE3_P: New Macro. + TARGET_SSE4_1_P: New Macro. + TARGET_SSE4_2_P: New Macro. + TARGET_AVX_P: New Macro. + TARGET_AVX2_P: New Macro. + TARGET_AVX512F_P: New Macro. + TARGET_AVX512PF_P: New Macro. + TARGET_AVX512ER_P: New Macro. + TARGET_AVX512CD_P: New Macro. + TARGET_FMA_P: New Macro. + TARGET_SSE4A_P: New Macro. + TARGET_FMA4_P: New Macro. + TARGET_XOP_P: New Macro. + TARGET_LWP_P: New Macro. + TARGET_ABM_P: New Macro. + TARGET_BMI_P: New Macro. + TARGET_BMI2_P: New Macro. + TARGET_LZCNT_P: New Macro. + TARGET_TBM_P: New Macro. + TARGET_POPCNT_P: New Macro. + TARGET_SAHF_P: New Macro. + TARGET_MOVBE_P: New Macro. + TARGET_CRC32_P: New Macro. + TARGET_AES_P: New Macro. + TARGET_PCLMUL_P: New Macro. + TARGET_CMPXCHG16B_P: New Macro. + TARGET_FSGSBASE_P: New Macro. + TARGET_RDRND_P: New Macro. + TARGET_F16C_P: New Macro. + TARGET_RTM_P: New Macro. + TARGET_HLE_P: New Macro. + TARGET_RDSEED_P: New Macro. + TARGET_PRFCHW_P: New Macro. + TARGET_ADX_P: New Macro. + TARGET_FXSR_P: New Macro. + TARGET_XSAVE_P: New Macro. + TARGET_XSAVEOPT_P: New Macro. + TARGET_LP64_P: New Macro. + TARGET_X32_P: New Macro. + TARGET_FPMATH_DEFAULT_P: New Macro. + TARGET_FLOAT_RETURNS_IN_80387_P: New Macro. + * config/i386/i386.c (ix86_option_override_internal): New parameters. + opts and opts_set. + Change ix86_tune_string to access opts->x_ix86_tune_string. + Change ix86_isa_flags to access opts->x_ix86_isa_flags. + Change ix86_arch_string to access opts->x_ix86_arch_string. + Change ix86_stringop_alg to access opts->x_ix86_stringop_alg. + Change ix86_pmode to access opts->x_ix86_pmode. + Change ix86_abi to access opts->x_ix86_abi. + Change ix86_cmodel to access opts->x_ix86_cmodel. + Change ix86_asm_dialect to access opts->x_ix86_asm_dialect. + Change ix86_isa_flags_explicit to access + opts->x_ix86_isa_flags_explicit. + Change ix86_dump_tunes to access opts->x_ix86_dump_tunes. + Change ix86_regparm to access opts->x_ix86_regparm. + Change ix86_branch_cost to access opts->x_ix86_branch_cost. + Change ix86_preferred_stack_boundary_arg to access + opts->x_ix86_preferred_stack_boundary_arg. + Change ix86_force_align_arg_pointer to access + opts->x_ix86_force_align_arg_pointer. + Change ix86_incoming_stack_boundar_arg to access + opts->x_ix86_incoming_stack_boundar_arg. + Change ix86_fpmath to access opts->x_ix86_fpmath. + Change ix86_veclibabi_type to access opts->x_ix86_veclibabi_type. + Change ix86_recip_name to access opts->x_ix86_recip_name. + Change ix86_stack_protector_guard to access + opts->x_ix86_stack_protector_guard. + Change ix86_tune_memcpy_strategy to access + opts->x_ix86_tune_memcpy_strategy. + Change ix86_tune_memset_strategy to access + opts->x_ix86_tune_memset_strategy. + Change global_options to access opts. + Change global_options_set to access opts_set. + Change TARGET_64BIT to TARGET_64BIT_P (opts->...). + Change TARGET_MMX to TARGET_MMX_P (opts->...). + Change TARGET_3DNOW to TARGET_3DNOW_P (opts->...). + Change TARGET_3DNOW_A to TARGET_3DNOW_A_P (opts->...). + Change TARGET_SSE to TARGET_SSE_P (opts->...). + Change TARGET_SSE2 to TARGET_SSE2_P (opts->...). + Change TARGET_SSE3 to TARGET_SSE3_P (opts->...). + Change TARGET_SSSE3 to TARGET_SSSE3_P (opts->...). + Change TARGET_SSE4_1 to TARGET_SSE4_1_P (opts->...). + Change TARGET_SSE4_2 to TARGET_SSE4_2_P (opts->...). + Change TARGET_AVX to TARGET_AVX_P (opts->...). + Change TARGET_AVX2 to TARGET_AVX2_P (opts->...). + Change TARGET_AVX512F to TARGET_AVX512F_P (opts->...). + Change TARGET_AVX512PF to TARGET_AVX512PF_P (opts->...). + Change TARGET_AVX512ER to TARGET_AVX512ER_P (opts->...). + Change TARGET_AVX512CD to TARGET_AVX512CD_P (opts->...). + Change TARGET_FMA to TARGET_FMA_P (opts->...). + Change TARGET_SSE4A to TARGET_SSE4A_P (opts->...). + Change TARGET_FMA4 to TARGET_FMA4_P (opts->...). + Change TARGET_XOP to TARGET_XOP_P (opts->...). + Change TARGET_LWP to TARGET_LWP_P (opts->...). + Change TARGET_ABM to TARGET_ABM_P (opts->...). + Change TARGET_BMI to TARGET_BMI_P (opts->...). + Change TARGET_BMI2 to TARGET_BMI2_P (opts->...). + Change TARGET_LZCNT to TARGET_LZCNT_P (opts->...). + Change TARGET_TBM to TARGET_TBM_P (opts->...). + Change TARGET_POPCNT to TARGET_POPCNT_P (opts->...). + Change TARGET_SAHF to TARGET_SAHF_P (opts->...). + Change TARGET_MOVBE to TARGET_MOVBE_P (opts->...). + Change TARGET_CRC32 to TARGET_CRC32_P (opts->...). + Change TARGET_AES to TARGET_AES_P (opts->...). + Change TARGET_PCLMUL to TARGET_PCLMUL_P (opts->...). + Change TARGET_CMPXCHG16B to TARGET_CMPXCHG16B_P (opts->...). + Change TARGET_FSGSBASE to TARGET_FSGSBASE_P (opts->...). + Change TARGET_RDRND to TARGET_RDRND_P (opts->...). + Change TARGET_F16C to TARGET_F16C_P (opts->...). + Change TARGET_RTM to TARGET_RTM_P (opts->...). + Change TARGET_HLE to TARGET_HLE_P (opts->...). + Change TARGET_RDSEED to TARGET_RDSEED_P (opts->...). + Change TARGET_PRFCHW to TARGET_PRFCHW_P (opts->...). + Change TARGET_ADX to TARGET_ADX_P (opts->...). + Change TARGET_FXSR to TARGET_FXSR_P (opts->...). + Change TARGET_XSAVE to TARGET_XSAVE_P (opts->...). + Change TARGET_XSAVEOPT to TARGET_XSAVEOPT_P (opts->...). + Change TARGET_LP64 to TARGET_LP64_P (opts->...). + Change TARGET_X32 to TARGET_X32_P (opts->...). + Change TARGET_FPMATH_DEFAULT to TARGET_FPMATH_DEFAULT_P (opts->...). + Change TARGET_FLOAT_RETURNS_IN_80387 to + TARGET_FLOAT_RETURNS_IN_80387_P (opts->...). + (ix86_function_specific_save): New parameter. Use opts-> fields + to replace global fields. + (ix86_function_specific_restore): Ditto. + (ix86_valid_target_attribute_inner_p): New parameters. + Fix recursive call. + Fix call to ix86_handle_option and set_option. + (ix86_valid_target_attribute_tree): New parameters. + Change global_options to access opts. + Change global_options_set to access opts_set. + Fix call to ix86_valid_target_attribute_inner_p. + Change ix86_tune_string to access opts->x_ix86_tune_string. + Change ix86_arch_string to access opts->x_ix86_arch_string. + Change ix86_fpmath to access opts->x_ix86_fpmath + Fix call to ix86_option_override_internal. + Fix call to ix86_add_new_builtins. + Fix calls to build_optimization_node and build_target_option_node. + (ix86_valid_target_attribute_p): Remove access to global_options. + Use new gcc_options structure func_options. + Fix call to ix86_valid_target_attribute_tree. + Fix call to build_optimization_node. + (get_builtin_code_for_version): Fix call to + ix86_valid_target_attribute_tree. + +2013-10-15 David Malcolm <dmalcolm@redhat.com> + + * Makefile.in (PICFLAG): New. + (enable_host_shared): New. + (INTERNAL_CFLAGS): Use PICFLAG. + (LIBIBERTY): Use pic build of libiberty.a if configured with + --enable-host-shared. + * configure.ac: Add --enable-host-shared, setting up new + PICFLAG variable. + * configure: Regenerate. + * doc/install.texi (--enable-shared): Add note contrasting it with ... + (--enable-host-shared): New option. + +2013-10-15 Richard Biener <rguenther@suse.de> + + * tree-tailcall.c (find_tail_calls): Don't use tail-call recursion + for built-in functions. + +2013-10-15 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * tree-ssa-reassoc.c: Include rtl.h and tm_p.h. + (optimize_range_tests_1): New function, + extracted from optimize_range_tests. + (optimize_range_tests_xor): Similarly. + (optimize_range_tests_diff): New function. + (optimize_range_tests): Use optimize_range_tests_1. + +2013-10-15 Cong Hou <congh@google.com> + + * tree-vect-loop.c (vect_is_simple_reduction_1): Relax the + requirement of the reduction pattern so that one operand of the + reduction operation can come from outside of the loop. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/neon-schedgen.ml: Remove. + * config/arm/cortex-a9-neon.md: Remove comment regarding + neon-schedgen.ml. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types: Remove old neon types. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a7.md + (cortex_a7_neon_type): New. + (cortex_a7_neon_mul): Update for new types. + (cortex_a7_neon_mla): Likewise. + (cortex_a7_neon): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a15-neon.md + (cortex_a15_neon_type): New, + + (cortex_a15_neon_int_1): Remove. + (cortex_a15_neon_int_2): Likewise. + (cortex_a15_neon_int_3): Likewise. + (cortex_a15_neon_int_4): Likewise. + (cortex_a15_neon_int_5): Likewise. + (cortex_a15_neon_vqneg_vqabs): Likewise. + (cortex_a15_neon_vmov): Likewise. + (cortex_a15_neon_vaba): Likewise. + (cortex_a15_neon_vaba_qqq): Likewise. + (cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a15_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): + Likewise. + (cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a15_neon_mla_qqq_8_16): Likewise. + (cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar): Likewise. + (cortex_a15_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a15_neon_mul_qqd_32_scalar): Likewise. + (cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a15_neon_shift_1): Likewise. + (cortex_a15_neon_shift_2): Likewise. + (cortex_a15_neon_shift_3): Likewise. + (cortex_a15_neon_vshl_ddd): Likewise. + (cortex_a15_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a15_neon_vsra_vrsra): Likewise. + (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a15_neon_bp_3cycle): Likewise. + (cortex_a15_neon_ldm_2): Likewise. + (cortex_a15_neon_stm_2): Likewise. + (cortex_a15_neon_mcr): Likewise. + (cortex_a15_neon_mrc): Likewise. + (cortex_a15_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a15_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a15_neon_fp_vmul_ddd): Likewise. + (cortex_a15_neon_fp_vmul_qqd): Likewise. + (cortex_a15_neon_fp_vmla_ddd): Likewise. + (cortex_a15_neon_fp_vmla_qqq): Likewise. + (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a15_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a15_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a15_neon_bp_simple): Likewise. + (cortex_a15_neon_bp_2cycle): Likewise. + (cortex_a15_neon_bp_3cycle): Likewise. + (cortex_a15_neon_vld1_1_2_regs): Likewise. + (cortex_a15_neon_vld1_3_4_regs): Likewise. + (cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a15_neon_vld2_4_regs): Likewise. + (cortex_a15_neon_vld3_vld4): Likewise. + (cortex_a15_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a15_neon_vst1_3_4_regs): Likewise. + (cortex_a15_neon_vst2_4_regs_vst3_vst4): Rename to... + (cortex_a15_neon_vst2_4_regs_vst3): ...This, update for new attributes. + (cortex_a15_neon_vst3_vst4): Rename to... + (cortex_a15_neon_vst4): This, update for new attributes. + (cortex_a15_neon_vld1_vld2_lane): Update for new attributes. + (cortex_a15_neon_vld3_vld4_lane): Likewise. + (cortex_a15_neon_vst1_vst2_lane): Likewise. + (cortex_a15_neon_vst3_vst4_lane): Likewise. + (cortex_a15_neon_vld3_vld4_all_lanes): Likewise. + (cortex_a15_neon_ldm_2): Likewise. + (cortex_a15_neon_stm_2): Likewise. + (cortex_a15_neon_mcr): Likewise. + (cortex_a15_neon_mcr_2_mcrr): Likewise. + (cortex_a15_neon_mrc): Likewise. + (cortex_a15_neon_mrrc): Likewise. + + (cortex_a15_neon_abd): New. + (cortex_a15_neon_abd_q): Likewise. + (cortex_a15_neon_aba): Likewise. + (cortex_a15_neon_aba_q): Likewise. + (cortex_a15_neon_acc): Likewise. + (cortex_a15_neon_acc_q): Likewise. + (cortex_a15_neon_arith_basic): Likewise. + (cortex_a15_neon_arith_complex): Likewise. + (cortex_a15_neon_multiply): Likewise. + (cortex_a15_neon_multiply_q): Likewise. + (cortex_a15_neon_mla): Likewise. + (cortex_a15_neon_mla_q): Likewise. + (cortex_a15_neon_sat_mla_long): Likewise. + (cortex_a15_neon_shift_acc): Likewise. + (cortex_a15_neon_shift_imm_basic): Likewise. + (cortex_a15_neon_shift_imm_complex): Likewise. + (cortex_a15_neon_shift_reg_basic): Likewise. + (cortex_a15_neon_shift_reg_basic_q): Likewise. + (cortex_a15_neon_shift_reg_complex): Likewise. + (cortex_a15_neon_shift_reg_complex_q): Likewise. + (cortex_a15_neon_fp_negabs): Likewise + (cortex_a15_neon_fp_arith): Likewise + (cortex_a15_neon_fp_arith_q): Likewise + (cortex_a15_neon_fp_cvt_int): Likewise + (cortex_a15_neon_fp_cvt_int_q): Likewise + (cortex_a15_neon_fp_cvt_16): Likewise + (cortex_a15_neon_fp_mul): Likewise + (cortex_a15_neon_fp_mul_q): Likewise + (cortex_a15_neon_fp_mla): Likewise + (cortex_a15_neon_fp_mla_q): Likewise + (cortex_a15_neon_fp_recps_rsqrte): Likewise. + (cortex_a15_neon_fp_recps_rsqrte_q): Likewise. + (cortex_a15_neon_bitops): Likewise. + (cortex_a15_neon_bitops_q): Likewise. + (cortex_a15_neon_from_gp): Likewise. + (cortex_a15_neon_from_gp_q): Likewise. + (cortex_a15_neon_tbl3_tbl4): Likewise. + (cortex_a15_neon_zip_q): Likewise. + (cortex_a15_neon_to_gp): Likewise. + (cortex_a15_neon_load_a): Likewise. + (cortex_a15_neon_load_b): Likewise. + (cortex_a15_neon_load_c): Likewise. + (cortex_a15_neon_load_d): Likewise. + (cortex_a15_neon_load_e): Likewise. + (cortex_a15_neon_load_f): Likewise. + (cortex_a15_neon_store_a): Likewise. + (cortex_a15_neon_store_b): Likewise. + (cortex_a15_neon_store_c): Likewise. + (cortex_a15_neon_store_d): Likewise. + (cortex_a15_neon_store_e): Likewise. + (cortex_a15_neon_store_f): Likewise. + (cortex_a15_neon_store_g): Likewise. + (cortex_a15_neon_store_h): Likewise. + (cortex_a15_vfp_to_from_gp): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a9-neon.md (cortex_a9_neon_type): New. + + (cortex_a9_neon_vshl_ddd): Remove. + (cortex_a9_neon_vst3_vst4): Likewise. + (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. + + (cortex_a9_neon_bit_ops_q): New. + + (cortex_a9_neon_int_1): Use cortex_a8_neon_type. + (cortex_a9_neon_int_2): Likewise. + (cortex_a9_neon_int_3): Likewise. + (cortex_a9_neon_int_4): Likewise. + (cortex_a9_neon_int_5): Likewise. + (cortex_a9_neon_vqneg_vqabs): Likewise. + (cortex_a9_neon_vmov): Likewise. + (cortex_a9_neon_vaba): Likewise. + (cortex_a9_neon_vaba_qqq): Likewise. + (cortex_a9_neon_shift_1): Likewise. + (cortex_a9_neon_shift_2): Likewise. + (cortex_a9_neon_shift_3): Likewise. + (cortex_a9_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a9_neon_vsra_vrsra): Likewise. + (cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a9_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): + Likewise. + (cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a9_neon_mla_qqq_8_16): Likewise. + (cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long): + Likewise. + (cortex_a9_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a9_neon_mul_qqd_32_scalar): Likewise. + (cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a9_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a9_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a9_neon_fp_vsum): Likewise. + (cortex_a9_neon_fp_vmul_ddd): Likewise. + (cortex_a9_neon_fp_vmul_qqd): Likewise. + (cortex_a9_neon_fp_vmla_ddd): Likewise. + (cortex_a9_neon_fp_vmla_qqq): Likewise. + (cortex_a9_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a9_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a9_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a9_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a9_neon_bp_simple): Likewise. + (cortex_a9_neon_bp_2cycle): Likewise. + (cortex_a9_neon_bp_3cycle): Likewise. + (cortex_a9_neon_ldr): Likewise. + (cortex_a9_neon_str): Likewise. + (cortex_a9_neon_vld1_1_2_regs): Likewise. + (cortex_a9_neon_vld1_3_4_regs): Likewise. + (cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a9_neon_vld2_4_regs): Likewise. + (cortex_a9_neon_vld3_vld4): Likewise. + (cortex_a9_neon_vld1_vld2_lane): Likewise. + (cortex_a9_neon_vld3_vld4_lane): Likewise. + (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. + (cortex_a9_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a9_neon_vst1_3_4_regs): Likewise. + (cortex_a9_neon_vst2_4_regs_vst3_vst4): Likewise. + (cortex_a9_neon_vst1_vst2_lane): Likewise. + (cortex_a9_neon_vst3_vst4_lane): Likewise. + (cortex_a9_neon_mcr): Likewise. + (cortex_a9_neon_mcr_2_mcrr): Likewise. + (cortex_a9_neon_mrc): Likewise. + (cortex_a9_neon_mrrc): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/cortex-a8-neon.md (cortex_a8_neon_type): New. + + (cortex_a8_neon_vshl_ddd): Remove. + (cortex_a8_neon_vst3_vst4): Likewise. + (cortex_a8_neon_vld3_vld4_all_lanes): Likewise. + + (cortex_a8_neon_bit_ops_q): New. + + (cortex_a8_neon_int_1): Use cortex_a8_neon_type. + (cortex_a8_neon_int_2): Likewise.. + (cortex_a8_neon_int_3): Likewise. + (cortex_a8_neon_int_5): Likewise. + (cortex_a8_neon_vqneg_vqabs): Likewise. + (cortex_a8_neon_int_4): Likewise. + (cortex_a8_neon_vaba): Likewise. + (cortex_a8_neon_vaba_qqq): Likewise. + (cortex_a8_neon_shift_1): Likewise. + (cortex_a8_neon_shift_2): Likewise. + (cortex_a8_neon_shift_3): Likewise. + (cortex_a8_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a8_neon_vsra_vrsra): Likewise. + (cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a8_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar): + Likewise. + (cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a8_neon_mla_qqq_8_16): Likewise. + (cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long): + Likewise. + (cortex_a8_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a8_neon_mul_qqd_32_scalar): Likewise. + (cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a8_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a8_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a8_neon_fp_vsum): Likewise. + (cortex_a8_neon_fp_vmul_ddd): Likewise. + (cortex_a8_neon_fp_vmul_qqd): Likewise. + (cortex_a8_neon_fp_vmla_ddd): Likewise. + (cortex_a8_neon_fp_vmla_qqq): Likewise. + (cortex_a8_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a8_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a8_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a8_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a8_neon_bp_simple): Likewise. + (cortex_a8_neon_bp_2cycle): Likewise. + (cortex_a8_neon_bp_3cycle): Likewise. + (cortex_a8_neon_ldr): Likewise. + (cortex_a8_neon_str): Likewise. + (cortex_a8_neon_vld1_1_2_regs): Likewise. + (cortex_a8_neon_vld1_3_4_regs): Likewise. + (cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a8_neon_vld2_4_regs): Likewise. + (cortex_a8_neon_vld3_vld4): Likewise. + (cortex_a8_neon_vld1_vld2_lane): Likewise. + (cortex_a8_neon_vld3_vld4_lane): Likewise. + (cortex_a8_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a8_neon_vst1_3_4_regs): Likewise. + (cortex_a8_neon_vst2_4_regs_vst3_vst4): Likewise. + (cortex_a8_neon_vst1_vst2_lane): Likewise. + (cortex_a8_neon_vst3_vst4_lane): Likewise. + (cortex_a8_neon_mcr): Likewise. + (cortex_a8_neon_mcr_2_mcrr): Likewise. + (cortex_a8_neon_mrc): Likewise. + (cortex_a8_neon_mrrc): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/iterators.md (Vetype): Add SF and DF modes. + (fp): New. + * config/aarch64/aarch64-simd.md (neon_type): Remove. + (aarch64_simd_dup<mode>): Add "type" attribute. + (aarch64_dup_lane<mode>): Likewise. + (aarch64_dup_lane_<vswap_width_name><mode>): Likewise. + (*aarch64_simd_mov<mode>): Likewise. + (aarch64_simd_mov_from_<mode>low): Likewise. + (aarch64_simd_mov_from_<mode>high): Likewise. + (orn<mode>3): Likewise. + (bic<mode>3): Likewise. + (add<mode>3): Likewise. + (sub<mode>3): Likewise. + (mul<mode>3): Likewise. + (*aarch64_mul3_elt<mode>): Likewise. + (*aarch64_mul3_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_mul3_elt_to_128df): Likewise. + (*aarch64_mul3_elt_to_64v2df): Likewise. + (neg<mode>2): Likewise. + (abs<mode>2): Likewise. + (abd<mode>_3): Likewise. + (aba<mode>_3): Likewise. + (fabd<mode>_3): Likewise. + (*fabd_scalar<mode>3): Likewise. + (and<mode>3): Likewise. + (ior<mode>3): Likewise. + (xor<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (aarch64_simd_vec_set<mode>): Likewise. + (aarch64_simd_lshr<mode>): Likewise. + (aarch64_simd_ashr<mode>): Likewise. + (aarch64_simd_imm_shl<mode>): Likewise. + (aarch64_simd_reg_sshl<mode): Likewise. + (aarch64_simd_reg_shl<mode>_unsigned): Likewise. + (aarch64_simd_reg_shl<mode>_signed): Likewise. + (aarch64_simd_vec_setv2di): Likewise. + (aarch64_simd_vec_set<mode>): Likewise. + (aarch64_mla<mode>): Likewise. + (*aarch64_mla_elt<mode>): Likewise. + (*aarch64_mla_elt_<vswap_width_name><mode>): Likewise. + (aarch64_mls<mode>): Likewise. + (*aarch64_mls_elt<mode>): Likewise. + (*aarch64_mls_elt_<vswap_width_name><mode>): Likewise. + (<su><maxmin><mode>3): Likewise. + (move_lo_quad_<mode>): Likewise. + (aarch64_simd_move_hi_quad_<mode>): Likewise. + (aarch64_simd_vec_pack_trunc_<mode>): Likewise. + (vec_pack_trunc_<mode>): Likewise. + (aarch64_simd_vec_unpack<su>_lo_<mode>): Likewise. + (aarch64_simd_vec_unpack<su>_hi_<mode>): Likewise. + (*aarch64_<su>mlal_lo<mode>): Likewise. + (*aarch64_<su>mlal_hi<mode>): Likewise. + (*aarch64_<su>mlsl_lo<mode>): Likewise. + (*aarch64_<su>mlsl_hi<mode>): Likewise. + (*aarch64_<su>mlal<mode>): Likewise. + (*aarch64_<su>mlsl<mode>): Likewise. + (aarch64_simd_vec_<su>mult_lo_<mode>): Likewise. + (aarch64_simd_vec_<su>mult_hi_<mode>): Likewise. + (add<mode>3): Likewise. + (sub<mode>3): Likewise. + (mul<mode>3): Likewise. + (div<mode>3): Likewise. + (neg<mode>2): Likewise. + (abs<mode>2): Likewise. + (fma<mode>4): Likewise. + (*aarch64_fma4_elt<mode>): Likewise. + (*aarch64_fma4_elt_<vswap_width_name><mode>): Likewise. + (*aarch64_fma4_elt_to_128df): Likewise. + (*aarch64_fma4_elt_to_64v2df): Likewise. + (fnma<mode>4): Likewise. + (*aarch64_fnma4_elt<mode>): Likewise. + (*aarch64_fnma4_elt_<vswap_width_name><mode> + (*aarch64_fnma4_elt_to_128df): Likewise. + (*aarch64_fnma4_elt_to_64v2df): Likewise. + (<frint_pattern><mode>2): Likewise. + (l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): Likewise. + (<optab><fcvt_target><VDQF:VDQF:mode>2): Likewise. + (vec_unpacks_lo_v4sf): Likewise. + (aarch64_float_extend_lo_v2df): Likewise. + (vec_unpacks_hi_v4sf): Likewise. + (aarch64_float_truncate_lo_v2sf): Likewise. + (aarch64_float_truncate_hi_v4sf): Likewise. + (aarch64_vmls<mode>): Likewise. + (<su><maxmin><mode>3): Likewise. + (<maxmin_uns><mode>3): Likewise. + (reduc_<sur>plus_<mode>): Likewise. + (reduc_<sur>plus_v2di): Likewise. + (reduc_<sur>plus_v2si): Likewise. + (reduc_<sur>plus_<mode>): Likewise. + (aarch64_addpv4sf): Likewise. + (clz<mode>2): Likewise. + (reduc_<maxmin_uns>_<mode>): Likewise. + (reduc_<maxmin_uns>_v2di): Likewise. + (reduc_<maxmin_uns>_v2si): Likewise. + (reduc_<maxmin_uns>_<mode>): Likewise. + (reduc_<maxmin_uns>_v4sf): Likewise. + (aarch64_simd_bsl<mode>_internal): Likewise. + (*aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): Likewise. + (*aarch64_get_lane_zero_extendsi<mode>): Likewise. + (aarch64_get_lane<mode>): Likewise. + (*aarch64_combinez<mode>): Likewise. + (aarch64_combine<mode>): Likewise. + (aarch64_simd_combine<mode>): Likewise. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>_hi_internal): Likewise. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>_lo_internal): Likewise. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>): Likewise. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>): Likewise. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>_internal): Likewise. + (aarch64_<sur>h<addsub><mode>): Likewise. + (aarch64_<sur><addsub>hn<mode>): Likewise. + (aarch64_<sur><addsub>hn2<mode>): Likewise. + (aarch64_pmul<mode>): Likewise. + (aarch64_<su_optab><optab><mode>): Likewise. + (aarch64_<sur>qadd<mode>): Likewise. + (aarch64_sqmovun<mode>): Likewise. + (aarch64_<sur>qmovn<mode>): Likewise. + (aarch64_s<optab><mode>): Likewise. + (aarch64_sq<r>dmulh<mode>): Likewise. + (aarch64_sq<r>dmulh_lane<mode>): Likewise. + (aarch64_sq<r>dmulh_laneq<mode>): Likewise. + (aarch64_sq<r>dmulh_lane<mode>): Likewise. + (aarch64_sqdml<SBINQOPS:as>l<mode>): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l_n<mode>): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise. + (aarch64_sqdml<SBINQOPS:as>l2_n<mode>_internal): Likewise. + (aarch64_sqdmull<mode>): Likewise. + (aarch64_sqdmull_lane<mode>_internal): Likewise. + (aarch64_sqdmull_n<mode>): Likewise. + (aarch64_sqdmull2<mode>_internal): Likewise. + (aarch64_sqdmull2_lane<mode>_internal): Likewise. + (aarch64_sqdmull2_n<mode>_internal): Likewise. + (aarch64_<sur>shl<mode>): Likewise. + (aarch64_<sur>q<r>shl<mode> + (aarch64_<sur>shll_n<mode>): Likewise. + (aarch64_<sur>shll2_n<mode>): Likewise. + (aarch64_<sur>shr_n<mode>): Likewise. + (aarch64_<sur>sra_n<mode>): Likewise. + (aarch64_<sur>s<lr>i_n<mode>): Likewise. + (aarch64_<sur>qshl<u>_n<mode>): Likewise. + (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise. + (aarch64_cm<optab><mode>): Likewise. + (aarch64_cm<optab>di): Likewise. + (aarch64_cm<optab><mode>): Likewise. + (aarch64_cm<optab>di): Likewise. + (aarch64_cmtst<mode>): Likewise. + (aarch64_cmtstdi): Likewise. + (aarch64_cm<optab><mode>): Likewise. + (*aarch64_fac<optab><mode>): Likewise. + (aarch64_addp<mode>): Likewise. + (aarch64_addpdi): Likewise. + (sqrt<mode>2): Likewise. + (vec_load_lanesoi<mode>): Likewise. + (vec_store_lanesoi<mode>): Likewise. + (vec_load_lanesci<mode>): Likewise. + (vec_store_lanesci<mode>): Likewise. + (vec_load_lanesxi<mode>): Likewise. + (vec_store_lanesxi<mode>): Likewise. + (*aarch64_mov<mode>): Likewise. + (aarch64_ld2<mode>_dreg): Likewise. + (aarch64_ld2<mode>_dreg): Likewise. + (aarch64_ld3<mode>_dreg): Likewise. + (aarch64_ld3<mode>_dreg): Likewise. + (aarch64_ld4<mode>_dreg): Likewise. + (aarch64_ld4<mode>_dreg): Likewise. + (aarch64_tbl1<mode>): Likewise. + (aarch64_tbl2v16qi): Likewise. + (aarch64_combinev16qi): Likewise. + (aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Likewise. + (aarch64_st2<mode>_dreg): Likewise. + (aarch64_st2<mode>_dreg): Likewise. + (aarch64_st3<mode>_dreg): Likewise. + (aarch64_st3<mode>_dreg): Likewise. + (aarch64_st4<mode>_dreg): Likewise. + (aarch64_st4<mode>_dreg): Likewise. + (*aarch64_simd_ld1r<mode>): Likewise. + (aarch64_frecpe<mode>): Likewise. + (aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise. + (aarch64_frecps<mode>): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/iterators.md (V_elem_ch): New. + (q): Likewise. + (VQH_type): Likewise. + * config/arm/arm.md (is_neon_type): New. + (conds): Use is_neon_type. + (anddi3_insn): Update type attribute. + (xordi3_insn): Likewise. + (one_cmpldi2): Likewise. + * config/arm/vfp.md (movhf_vfp_neon): Update type attribute. + * config/arm/neon.md (neon_mov): Update type attribute. + (*movmisalign<mode>_neon_store): Likewise. + (*movmisalign<mode>_neon_load): Likewise. + (vec_set<mode>_internal): Likewise. + (vec_set<mode>_internal): Likewise. + (vec_setv2di_internal): Likewise. + (vec_extract<mode>): Likewise. + (vec_extract<mode>): Likewise. + (vec_extractv2di): Likewise. + (*add<mode>3_neon): Likewise. + (adddi3_neon): Likewise. + (*sub<mode>3_neon): Likewise. + (subdi3_neon): Likewise. + (fma<VCVTF:mode>4): Likewise. + (fma<VCVTF:mode>4_intrinsic): Likewise. + (*fmsub<VCVTF:mode>4): Likewise. + (fmsub<VCVTF:mode>4_intrinsic): Likewise. + (neon_vrint<NEON_VRINT:nvrint_variant><VCVTF:mode>): Likewise. + (ior<mode>3): Likewise. + (and<mode>3): Likewise. + (orn<mode>3_neon): Likewise. + (orndi3_neon): Likewise. + (bic<mode>3_neon): Likewise. + (bicdi3_neon): Likewise. + (xor<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (abs<mode>2): Likewise. + (neg<mode>2): Likewise. + (negdi2_neon): Likewise. + (*umin<mode>3_neon): Likewise. + (*umax<mode>3_neon): Likewise. + (*smin<mode>3_neon): Likewise. + (*smax<mode>3_neon): Likewise. + (vashl<mode>3): Likewise. + (vashr<mode>3_imm): Likewise. + (vlshr<mode>3_imm): Likewise. + (ashl<mode>3_signed): Likewise. + (ashl<mode>3_unsigned): Likewise. + (neon_load_count): Likewise. + (ashldi3_neon_noclobber): Likewise. + (ashldi3_neon): Likewise. + (signed_shift_di3_neon): Likewise. + (unsigned_shift_di3_neon): Likewise. + (ashrdi3_neon_imm_noclobber): Likewise. + (lshrdi3_neon_imm_noclobber): Likewise. + (<shift>di3_neon): Likewise. + (widen_ssum<mode>3): Likewise. + (widen_usum<mode>3): Likewise. + (quad_halves_<code>v4si): Likewise. + (quad_halves_<code>v4sf): Likewise. + (quad_halves_<code>v8hi): Likewise. + (quad_halves_<code>v16qi): Likewise. + (reduc_splus_v2di): Likewise. + (neon_vpadd_internal<mode>): Likewise. + (neon_vpsmin<mode>): Likewise. + (neon_vpsmax<mode>): Likewise. + (neon_vpumin<mode>): Likewise. + (neon_vpumax<mode>): Likewise. + (*ss_add<mode>_neon): Likewise. + (*us_add<mode>_neon): Likewise. + (*ss_sub<mode>_neon): Likewise. + (*us_sub<mode>_neon): Likewise. + (neon_vadd<mode>_unspec): Likewise. + (neon_vaddl<mode>): Likewise. + (neon_vaddw<mode>): Likewise. + (neon_vhadd<mode>): Likewise. + (neon_vqadd<mode>): Likewise. + (neon_vaddhn<mode>): Likewise. + (neon_vmul<mode>): Likewise. + (neon_vfms<VCVTF:mode>): Likewise. + (neon_vmlal<mode>): Likewise. + (neon_vmls<mode>): Likewise. + (neon_vmlsl<mode>): Likewise. + (neon_vqdmulh<mode>): Likewise. + (neon_vqdmlal<mode>): Likewise. + (neon_vqdmlsl<mode>): Likewise. + (neon_vmull<mode>): Likewise. + (neon_vqdmull<mode>): Likewise. + (neon_vsub<mode>_unspec): Likewise. + (neon_vsubl<mode>): Likewise. + (neon_vsubw<mode>): Likewise. + (neon_vqsub<mode>): Likewise. + (neon_vhsub<mode>): Likewise. + (neon_vsubhn<mode>): Likewise. + (neon_vceq<mode>): Likewise. + (neon_vcge<mode>): Likewise. + (neon_vcgeu<mode>): Likewise. + (neon_vcgt<mode>): Likewise. + (neon_vcgtu<mode>): Likewise. + (neon_vcle<mode>): Likewise. + (neon_vclt<mode>): Likewise. + (neon_vcage<mode>): Likewise. + (neon_vcagt<mode>): Likewise. + (neon_vtst<mode>): Likewise. + (neon_vabd<mode>): Likewise. + (neon_vabdl<mode>): Likewise. + (neon_vaba<mode>): Likewise. + (neon_vabal<mode>): Likewise. + (neon_vmax<mode>): Likewise. + (neon_vmin<mode>): Likewise. + (neon_vpaddl<mode>): Likewise. + (neon_vpadal<mode>): Likewise. + (neon_vpmax<mode>): Likewise. + (neon_vpmin<mode>): Likewise. + (neon_vrecps<mode>): Likewise. + (neon_vrsqrts<mode>): Likewise. + (neon_vqabs<mode>): Likewise. + (neon_vqneg<mode>): Likewise. + (neon_vcls<mode>): Likewise. + (clz<mode>2): Likewise. + (popcount<mode>2): Likewise. + (neon_vrecpe<mode>): Likewise. + (neon_vrsqrte<mode>): Likewise. + (neon_vget_lane<mode>_sext_internal): Likewise. + (neon_vget_lane<mode>_zext_internal): Likewise. + (neon_vdup_n<mode>): Likewise. + (neon_vdup_n<mode>): Likewise. + (neon_vdup_nv2di): Likewise. + (neon_vdup_lane<mode>_interal): Likewise. + (*neon_vswp<mode>): Likewise. + (neon_vcombine<mode>): Likewise. + (float<mode><V_cvtto>2): Likewise. + (floatuns<mode><V_cvtto>2): Likewise. + (fix_trunc<mode><V_cvtto>2): Likewise. + (fixuns_trunc<mode><V_cvtto>2 + (neon_vcvt<mode>): Likewise. + (neon_vcvt<mode>): Likewise. + (neon_vcvtv4sfv4hf): Likewise. + (neon_vcvtv4hfv4sf): Likewise. + (neon_vcvt_n<mode>): Likewise. + (neon_vcvt_n<mode>): Likewise. + (neon_vmovn<mode>): Likewise. + (neon_vqmovn<mode>): Likewise. + (neon_vqmovun<mode>): Likewise. + (neon_vmovl<mode>): Likewise. + (neon_vmul_lane<mode>): Likewise. + (neon_vmul_lane<mode>): Likewise. + (neon_vmull_lane<mode>): Likewise. + (neon_vqdmull_lane<mode>): Likewise. + (neon_vqdmulh_lane<mode>): Likewise. + (neon_vqdmulh_lane<mode>): Likewise. + (neon_vmla_lane<mode>): Likewise. + (neon_vmla_lane<mode>): Likewise. + (neon_vmlal_lane<mode>): Likewise. + (neon_vqdmlal_lane<mode>): Likewise. + (neon_vmls_lane<mode>): Likewise. + (neon_vmls_lane<mode>): Likewise. + (neon_vmlsl_lane<mode>): Likewise. + (neon_vqdmlsl_lane<mode>): Likewise. + (neon_vext<mode>): Likewise. + (neon_vrev64<mode>): Likewise. + (neon_vrev32<mode>): Likewise. + (neon_vrev16<mode>): Likewise. + (neon_vbsl<mode>_internal): Likewise. + (neon_vshl<mode>): Likewise. + (neon_vqshl<mode>): Likewise. + (neon_vshr_n<mode>): Likewise. + (neon_vshrn_n<mode>): Likewise. + (neon_vqshrn_n<mode>): Likewise. + (neon_vqshrun_n<mode>): Likewise. + (neon_vshl_n<mode>): Likewise. + (neon_vqshl_n<mode>): Likewise. + (neon_vqshlu_n<mode>): Likewise. + (neon_vshll_n<mode>): Likewise. + (neon_vsra_n<mode>): Likewise. + (neon_vsri_n<mode>): Likewise. + (neon_vsli_n<mode>): Likewise. + (neon_vtbl1v8qi): Likewise. + (neon_vtbl2v8qi): Likewise. + (neon_vtbl3v8qi): Likewise. + (neon_vtbl4v8qi): Likewise. + (neon_vtbl1v16qi): Likewise. + (neon_vtbl2v16qi): Likewise. + (neon_vcombinev16qi): Likewise. + (neon_vtbx1v8qi): Likewise. + (neon_vtbx2v8qi): Likewise. + (neon_vtbx3v8qi): Likewise. + (neon_vtbx4v8qi): Likewise. + (*neon_vtrn<mode>_insn): Likewise. + (*neon_vzip<mode>_insn): Likewise. + (*neon_vuzp<mode>_insn): Likewise. + (neon_vld1<mode>): Likewise. + (neon_vld1_lane<mode>): Likewise. + (neon_vld1_lane<mode>): Likewise. + (neon_vld1_dup<mode>): Likewise. + (neon_vld1_dup<mode>): Likewise. + (neon_vld1_dupv2di): Likewise. + (neon_vst1<mode>): Likewise. + (neon_vst1_lane<mode>): Likewise. + (neon_vst1_lane<mode>): Likewise. + (neon_vld2<mode>): Likewise. + (neon_vld2<mode>): Likewise. + (neon_vld2_lane<mode>): Likewise. + (neon_vld2_lane<mode>): Likewise. + (neon_vld2_dup<mode>): Likewise. + (neon_vst2<mode>): Likewise. + (neon_vst2<mode>): Likewise. + (neon_vst2_lane<mode>): Likewise. + (neon_vst2_lane<mode>): Likewise. + (neon_vld3<mode>): Likewise. + (neon_vld3qa<mode>): Likewise. + (neon_vld3qb<mode>): Likewise. + (neon_vld3_lane<mode>): Likewise. + (neon_vld3_lane<mode>): Likewise. + (neon_vld3_dup<mode>): Likewise. + (neon_vst3<mode>): Likewise. + (neon_vst3qa<mode>): Likewise. + (neon_vst3qb<mode>): Likewise. + (neon_vst3_lane<mode>): Likewise. + (neon_vst3_lane<mode>): Likewise. + (neon_vld4<mode>): Likewise. + (neon_vld4qa<mode>): Likewise. + (neon_vld4qb<mode>): Likewise. + (neon_vld4_lane<mode>): Likewise. + (neon_vld4_lane<mode>): Likewise. + (neon_vld4_dup<mode>): Likewise. + (neon_vst4<mode>): Likewise. + (neon_vst4qa<mode>): Likewise. + (neon_vst4qb<mode>): Likewise. + (neon_vst4_lane<mode>): Likewise. + (neon_vst4_lane<mode>): Likewise. + (neon_vec_unpack<US>_lo_<mode>): Likewise. + (neon_vec_unpack<US>_hi_<mode>): Likewise. + (neon_vec_<US>mult_lo_<mode>): Likewise. + (neon_vec_<US>mult_hi_<mode>): Likewise. + (neon_vec_<US>shiftl_<mode>): Likewise. + (neon_unpack<US>_<mode>): Likewise. + (neon_vec_<US>mult_<mode>): Likewise. + (vec_pack_trunc_<mode>): Likewise. + (neon_vec_pack_trunc_<mode>): Likewise. + (neon_vabd<mode>_2): Likewise. + (neon_vabd<mode>_3): Likewise. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md (movtf_aarch64): Update type attribute. + (load_pair): Update type attribute. + (store_pair): Update type attribute. + * config/aarch64/iterators.md (q): New. + +2013-10-15 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md: Add new types for Neon insns. + +2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (unspec): Add UNSPEC_RCP14, UNSPEC_RSQRT14, + UNSPEC_FIXUPIMM, UNSPEC_SCALEF, UNSPEC_GETEXP, UNSPEC_GETMANT, + UNSPEC_EXP2, UNSPEC_RCP28, UNSPEC_RSQRT28. + (rcp14<mode>): New. + (srcp14<mode>): Ditto. + (rsqrt14<mode>): Ditto. + (rsqrt14<mode>): Ditto. + (avx512f_vmscalef<mode>): Ditto. + (avx512f_scalef<mode>): Ditto. + (avx512f_getexp<mode>): Ditto. + (avx512f_sgetexp<mode>): Ditto. + (avx512f_fixupimm<mode>): Ditto. + (avx512f_sfixupimm<mode>): Ditto. + (avx512f_rndscale<mode>): Ditto. + (*avx512er_exp2<mode>): Ditto. + (*avx512er_rcp28<mode>): Ditto. + (avx512er_rsqrt28<mode>): Ditto. + (avx512f_getmant<mode>): Ditto. + (avx512f_getmant<mode>): Ditto. + (avx512f_rndscale<mode>): Fix formatting. + +2013-10-15 Martin Jambor <mjambor@suse.cz> + + * ipa-utils.h (ipa_edge_within_scc): Declare. + * ipa-cp.c (edge_within_scc): Moved... + * ipa-utils.c (ipa_edge_within_scc): ...here. Updated all callers. + +2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/predicates.md (const_8_to_15_operand): New. + (const_16_to_31_operand): Ditto. + * config/i386/sse.md (V8FI): New. + (V16FI): Ditto. + (reduc_splus_v8df): Ditto. + (reduc_splus_v16sf): Ditto. + (avx512f_vextract<shuffletype>32x4_1): Ditto. + (vec_extract_hi_<mode>): Ditto. + (avx512f_vinsert<shuffletype>32x4_1): Ditto. + (vec_set_lo_<mode>): Ditto. + (vec_set_hi_<mode>): Ditto. + (avx512f_shuf_<shuffletype>64x2_1): Ditto. + (avx512f_shuf_<shuffletype>32x4_1): Ditto. + (avx512f_pshufd_1): Ditto. + (avx512f_broadcast<mode>): Ditto. + (avx512f_broadcast<mode>): Ditto. + (define_split): Split vec_extract_lo into move. + (ssequartermode): Ditto. + (ssedoublemode): Extened with wider modes. + (vec_extract_lo_<mode>): Ditto. + +2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/predicates.md (register_or_constm1_operand): New. + * config/i386/sse.md (unspec): Add UNSPEC_UNSIGNED_PCMP, UNSPEC_TESTM, + UNSPEC_TESTNM, UNSPEC_VTERNLOG, UNSPEC_ALIGN, UNSPEC_CONFLICT, + UNSPEC_MASKED_EQ, UNSPEC_MASKED_GT, UNSPEC_GATHER_PREFETCH, + UNSPEC_SCATTER_PREFETCH + (VI48_512): New. + (avx512f_ucmp<mode>3): Ditto. + (avx512f_vternlog<mode>): Ditto. + (avx512f_align<mode>): Ditto. + (<shift_insn><mode>3): Ditto. + (avx512f_<rotate>v<mode>): Ditto. + (avx512f_<rotate><mode>): Ditto. + (avx512f_eq<mode>3): Ditto. + (avx512f_eq<mode>3_1): Ditto. + (avx512f_gt<mode>3): Ditto. + (avx512f_testm<mode>3): Ditto. + (avx512f_testnm<mode>3): Ditto. + (avx512pf_gatherpf<mode>): Ditto. + (*avx512pf_gatherpf<mode>_mask): Ditto. + (*avx512pf_gatherpf<mode>): Ditto. + (avx512pf_scatterpf<mode>): Ditto. + (*avx512pf_scatterpf<mode>_mask): Ditto. + (*avx512pf_scatterpf<mode>): Ditto. + (avx512f_vec_dup_gpr<mode>): Ditto. + (clz<mode>2): Ditto. + (conflict<mode>): Ditto. + (REDUC_SMINMAX_MODE): Extened with wider modes. + (reduc_<code>_<mode>): Ditto. + (vlshr<mode>3): Ditto. + (vashl<mode>3): Ditto. + +2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (unspec): Added UNSPEC_VPERMI2, UNSPEC_VPERMT2, + UNSPEC_SCATTER. + (VI48F_512): New. + (avx512fmaskmode): Ditto. + (bcstscalarsuff): Ditto. + (avx512f_blendm<mode>): Ditto. + (cmp_imm_predicate): Ditto. + (avx512f_cmp<mode>3): Ditto. + (avx512f_vec_dup<mode>): Ditto. + (avx512f_vec_dup_mem<mode>): Ditto. + (avx512f_vpermi2var<mode>3): Ditto. + (avx512f_vpermt2var<mode>3): Ditto. + (vec_init<mode>): Ditto. + (avx512f_gathersi<mode>): Ditto. + (*avx512f_gathersi<mode>): Ditto. + (*avx512f_gathersi<mode>_2): Ditto. + (avx512f_gatherdi<mode>): Ditto. + (*avx512f_gatherdi<mode>): Ditto. + (*avx512f_gatherdi<mode>_2): Ditto. + (avx512f_scattersi<mode>): Ditto. + (*avx512f_scattersi<mode>): Ditto. + (avx512f_scatterdi<mode>): Ditto. + (*avx512f_scatterdi<mode>): Ditto. + (sseintprefix): Extened with wider modes. + (VEC_GATHER_IDXSI): Ditto. + (VEC_GATHER_IDXDI): Ditto. + (VEC_GATHER_SRCDI): Ditto. + +2013-10-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/t-aprofile: New file. + * config.gcc: Handle --with-multilib-list option. + +2013-10-15 Bernd Schmidt <bernds@codesourcery.com> + + * reload1.c (reloads_unique_chain_p): Ensure that r1 is + the input for r2. + +2013-10-15 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (build_empty_rdg): Inline into + single user. + (rdg_flag_vertex): Inline into single user. + (rdg_flag_vertex_and_dependent): Likewise. + (build_rdg_partition_for_vertex): Remove processed bitmap. + (rdg_build_partitions): Simplify. + +2013-10-15 Richard Biener <rguenther@suse.de> + + * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): + Restructure forwarding through conversions and copies to + avoid performing copy-propagation the wrong way. Adjust + recursion invocations. + (forward_propagate_addr_expr): Add argument stating if we + are recursing from a single-use. + (ssa_forward_propagate_and_combine): Adjust. + +2013-10-14 David Malcolm <dmalcolm@redhat.com> + + * dumpfile.h (gcc::dump_manager): New class, to hold state + relating to dumpfile management. + (get_dump_file_name): Remove in favor of method of dump_manager. + (dump_initialized_p): Likewise. + (dump_start): Likewise. + (dump_finish): Likewise. + (dump_switch_p): Likewise. + (dump_register): Likewise. + (get_dump_file_info): Likewise. + * context.c (gcc::context::context): Construct the dump_manager + instance. + * context.h (gcc::context::get_dumps): New. + (gcc::context::m_dumps): New. + * coverage.c (coverage_init): Port to dump_manager API. + * dumpfile.c (extra_dump_files): Convert to field of gcc::dump_manager. + (extra_dump_files_in_use): Likewise. + (extra_dump_files_alloced): Likewise. + (gcc::dump_manager::dump_manager): New. + (dump_register): Convert to... + (gcc::dump_manager::dump_register): ...method, replacing + function-static next_dump with m_next_dump field. + (get_dump_file_info): Convert to... + (gcc::dump_manager::get_dump_file_info): ...method. + (get_dump_file_name): Convert to... + (gcc::dump_manager::get_dump_file_name): ...method. + (dump_start): Convert to... + (gcc::dump_manager::dump_start): ...method. + (dump_finish): Convert to... + (gcc::dump_manager::dump_finish): ...method. + (dump_begin): Replace body with... + (gcc::dump_manager::dump_begin): ...new method. + (dump_phase_enabled_p): Convert to... + (gcc::dump_manager::dump_phase_enabled_p): ...method. + (dump_phase_enabled_p): Convert to... + (gcc::dump_manager::dump_phase_enabled_p): ...method. + (dump_initialized_p): Convert to... + (gcc::dump_manager::dump_initialized_p): ...method. + (dump_flag_name): Replace body with... + (gcc::dump_manager::dump_flag_name): ...new method. + (dump_enable_all): Convert to... + (gcc::dump_manager::dump_enable_all): ...new method. + (opt_info_enable_passes): Convert to... + (gcc::dump_manager::opt_info_enable_passes): ...new method. + (dump_switch_p_1): Convert to... + (gcc::dump_manager::dump_switch_p_1): ...new method. + (dump_switch_p): Convert to... + (gcc::dump_manager::dump_switch_p): ...new method. + (opt_info_switch_p): Port to dump_manager API. + (enable_rtl_dump_file): Likewise. + * opts-global.c (handle_common_deferred_options): Port to new + dump_manager API. + * passes.c (pass_manager::finish_optimization_passes): Likewise. + (pass_manager::register_one_dump_file): Likewise. + (pass_manager::register_pass): Likewise. + (pass_init_dump_file): Likewise. + (pass_fini_dump_file): Likewise. + * statistics.c (statistics_early_init): Likewise. + +2013-10-14 Richard Biener <rguenther@suse.de> + + * gimple.c (gimple_canonical_types, canonical_type_hash_cache, + iterative_hash_canonical_type, gimple_canonical_type_hash, + gimple_canonical_types_compatible_p, gimple_canonical_type_eq, + gimple_register_canonical_type, print_gimple_types_stats, + free_gimple_type_tables): Move to lto/lto.c + (gt-gimple.h): Do not include. + * gimple.h (gimple_register_canonical_type, + print_gimple_types_stats, free_gimple_type_tables): Remove. + * Makefile.in (GTFILES): Remove gimple.c. + +2013-10-14 Travis Snoozy <quandary@remstate.com> + + PR target/58716 + * config/msp430/msp430.c (msp430_option_override): Correct thinko + scanning for msp430x targets. + +2013-10-14 Eric Botcazou <ebotcazou@adacore.com> + + PR bootstrap/58509 + * config/sparc/sparc-protos.h (widen_mem_for_ldd_peep): Declare. + (registers_ok_for_ldd_peep): Move around. + * config/sparc/sparc.c (widen_mem_for_ldd_peep): New. + * config/sparc/sparc.md (widening peepholes): Use it. + +2013-10-14 Richard Biener <rguenther@suse.de> + + PR middle-end/58712 + PR middle-end/55358 + * gimple.c (iterative_hash_canonical_type): Make sure to + record the hash into the correct hashtable slot. + +2013-10-13 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/58662 + * combine.c (try_combine): Take into account death nodes on I2 when + splitting a PARALLEL of two independent SETs. Fix dump message. + +2013-10-12 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/51244 + * config/sh/sh_treg_combine.cc: New SH specific RTL pass. + * config.gcc (sh[123456789lbe]*-*-* | sh-*-*): Add sh_treg_combine.o to + extra_objs. + * config/sh/t-sh (sh_treg_combine.o): New entry. + * config/sh/sh.c (sh_fixed_condition_code_regs): New function that + implements the target hook TARGET_FIXED_CONDITION_CODE_REGS. + (register_sh_passes): New function. Register sh_treg_combine pass. + (sh_option_override): Invoke it. + (sh_canonicalize_comparison): Handle op0_preserve_value. + * sh.md (*cbranch_t"): Do not try to optimize missed test and branch + opportunities. Canonicalize branch condition. + (nott): Allow only if pseudos can be created for non-SH2A. + +2013-10-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/58690 + * config/i386/i386.c (ix86_copy_addr_to_reg): New function. + (ix86_expand_movmem): Replace copy_addr_to_reg with + ix86_copy_addr_to_reg. + (ix86_expand_setmem): Likewise. + +2013-10-12 Alexander Monakov <amonakov@ispras.ru> + + * config/i386/i386.c (ix86_expand_sse_compare_and_jump): Use mode + provided by ix86_fp_compare_mode instead of CCFPUmode. + +2013-10-12 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vtbx<1,3>_<psu>8): Fix register constriants. + +2013-10-11 Jeff Law <law@redhat.com> + + PR tree-optimization/58640 + * tree-ssa-threadupdate.c (mark_threaded_blocks): Truncate jump + threading paths that cross over two loop entry points. + +2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): Generalize to + handle vector float as well. + (*vsx_le_perm_load_v4si): Likewise. + (*vsx_le_perm_store_v2di): Likewise. + (*vsx_le_perm_store_v4si): Likewise. + +2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (vec_realign_load<mode>): Generate vperm + directly to circumvent subtract from splat{31} workaround. + * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_le): New + prototype. + * config/rs6000/rs6000.c (altivec_expand_vec_perm_le): New. + * config/rs6000/altivec.md (define_c_enum "unspec"): Add + UNSPEC_VPERM_X and UNSPEC_VPERM_UNS_X. + (altivec_vperm_<mode>): Convert to define_insn_and_split to + separate big and little endian logic. + (*altivec_vperm_<mode>_internal): New define_insn. + (altivec_vperm_<mode>_uns): Convert to define_insn_and_split to + separate big and little endian logic. + (*altivec_vperm_<mode>_uns_internal): New define_insn. + (vec_permv16qi): Add little endian logic. + +2013-10-11 Marc Glisse <marc.glisse@inria.fr> + + * doc/extend.texi (returns_nonnull): Remove arguments. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI48F_256_512): New. + (avx2_permvar<mode>): Change to ... + (<avx2_avx512f>_permvar<mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (bdesc_args): Change corresponding pattern for + __builtin_ia32_cvtps2dq, __builtin_ia32_cvtps2dq256. + * config/i386/sse.md (VI4_AVX): New. + (sf2simodelower): Ditto. + (sse2_cvtps2dq): Change to ... + (<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (V_512): New. + (VI_512): Ditto. + (vcond<V_512:mode><VF_512:mode>): Ditto. + (vcond<V_512:mode><VI_512:mode>): Ditto. + (vcondu<V_512:mode><VI_512:mode>): Ditto. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (ix86_rtx_costs): Enable fma for TARGET_AVX512F. + * config/i386/sse.md (FMAMODEM): Changed modes and conditions. + (FMAMODE): Ditto. + (fma<mode>4): Removed condition. + (fms<mode>4): Ditto. + (fnma<mode>4): Ditto. + (fnms<mode>4): Ditto. + (fma4i_fmadd_<mode>): Ditto. + (*fma_fmadd_<mode>): Ditto. + (*fma_fmsub_<mode>): Ditto. + (*fma_fnmadd_<mode>): Ditto. + (*fma_fnmsub_<mode>): Ditto. + (fmaddsub_<mode>): Allow for TARGET_AVX512F. + (*fma_fmaddsub_<mode>): Ditto. + (*fma_fmsubadd_<mode>): Ditto. + (*fmai_fmadd_<mode>): Ditto. + (*fmai_fmsub_<mode>): Ditto. + (*fmai_fnmadd_<mode>): Ditto. + (*fmai_fnmsub_<mode>): Ditto. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI248_AVX2_8_AVX512F): New. + (VI124_256): Changed to ... + (VI124_256_48_512): This. + (ssepackmode): Extended with wider modes. + (<code><mode>3): Changed iterator. + (*avx2_<code><mode>3): Ditto. + (vec_pack_trunc_<mode>): Ditto. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI124_AVX2_48_AVX512F): New. + (VI8F_256_512): Ditto. + (abs<mode>2): Changed iterator. + (avx2_perm<mode>): Changed to ... + (<avx2_avx512f>_perm<mode>): This. + (avx2_perm<mode>_1): Changed to ... + (<avx2_avx512f>_perm<mode>_1): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI48_AVX512F): New. + (VI48_AVX2): Changed to ... + (VI48_AVX2_48_AVX512F): This. + (avx2_ashrv<mode>): Changed to ... + (<avx2_avx512f>_ashrv<mode>): This. + (avx2_<shift_insn>v<mode>): Changed to ... + (<avx2_avx512f>_<shift_insn>v<mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI4_AVX512F): New. + (VI8_AVX2_AVX512F): Ditto. + (mul<mode>3): Extended with wider modes. + (*<sse4_1_avx2>_mul<mode>3): Ditto. + (mul<mode>3): Ditto. + (vec_widen_<s>mult_odd_<mode>): Ditto. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (VI2_AVX512F): New. + (VI124_AVX512F): Ditto. + (sseunpackmode): Extended with wider modes. + (sseunpackfltmode): Ditto. + (vec_unpacks_float_hi_<mode>): Ditto. + (vec_unpacks_float_lo_<mode>): Ditto. + (vec_unpacku_float_hi_<mode>): Ditto. + (vec_unpacku_float_lo_<mode>): Ditto. + (vec_unpacks_lo_<mode>): Ditto. + (vec_unpacks_hi_<mode>): Ditto. + (vec_unpacku_lo_<mode>): Ditto. + (vec_unpacku_hi_<mode>): Ditto. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.md (multdiv): New. + (multdiv_mnemonic): Ditto. + * config/i386/sse.md (<sse>_vmmul<mode>3): Changed to... + (<sse>_vm<multdiv_mnemonic><mode>3): This. + (<sse>_vmdiv<mode>3): Removed. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (V): Extended with wider modes. + (VF2): Ditto. + (ssehalfvecmode): Ditto. + (i128): Ditto. + (ssepackfltmode): Ditto. + (avx_vec_concat<mode>): Ditto. + (V_256_512): New iterator. + (VF2_512_256): Ditto. + (si2dfmode): New attribute. + (si2dfmodelower): Ditto. + (sf2dfmode): Ditto. + (concat_tg_mode): Ditto. + (floatv4siv4df2): Changed to ... + (float<si2dfmodelower><mode>2): This. + (avx_cvtps2pd256): Changed to ... + (<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix>): This. + (vec_pack_trunc_v4df): Changed to ... + (vec_pack_trunc_<mode>): This. + (avx_vpermil<mode>): Changed to ... + (<sse2_avx_avx512f>_vpermil<mode>): This. + (<fixsuffix>fix_truncv8dfv8si2): New. + (vec_pack_sfix_trunc_v8df): Ditto. + (avx512f_rndscale<mode>): Ditto. + (avx512f_roundpd512): Ditto. + (vec_pack_ufix_trunc_<mode>): Updated iterator. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.md (any_fix): New iterator. + (fixsuffix): New attribute. + * config/i386/sse.md (VF1): Extened with wider modes. + (VI): Ditto. + (VI_AVX2): Ditto. + (VI8): Ditto. + (sseintvecmodelower): Ditto. + (ssescalarmode): Ditto. + (ssescalarnum): Ditto. + (VF1_128_256): New. + (ssexmmmode): Ditto. + (<fixsuffix>fix_truncv16sfv16si2): Ditto. + (<sse>_rcp<mode>2): Change iterator. + (rsqrt<mode>2): Ditto. + (<sse>_rsqrt<mode>2): Ditto. + (avx2_vec_dup<mode>): Ditto. + (<sse4_1>_round<ssemodesuffix>_sfix<avxsizesuffix>): Ditto. + (round<mode>2_sfix): Ditto. + (avx2_pbroadcast<mode>): Ditto. + (*andnot<mode>3): Handle XI mode. + (*<code><mode>3): Ditto. + (AVXTOSSEMODE): Removed. + (avx_vpermil<mode>): Changed to ... + (<sse2_avx_avx512f>_vpermil<mode>): This. + +2013-10-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/sse.md (<sse2>_movnt<mode>): Update constraint to "v". + (<sse>_comi): Ditto. + (<sse>_ucomi): Ditto. + (sse_cvtss2siq_2): Ditto. + (sse2_cvtsd2si): Ditto. + (sse2_cvtsd2siq): Ditto. + (sse2_cvttsd2si): Ditto. + (sse2_cvttsd2siq): Ditto. + (<shift_insn><mode>3): Ditto. + (sse2_cvtsi2sdq): Update constraint and prefix. + (sse_cvtsi2ss): Update prefix. + (sse_cvtsi2ssq): Ditto. + +2013-10-11 Jakub Jelinek <jakub@redhat.com> + + * tree-vrp.c (infer_nonnull_range): Use is_gimple_call, + ignore internal calls. + +2013-10-11 Richard Biener <rguenther@suse.de> + + * tree-pretty-print.c (dump_generic_node): Allow to dump both (D) + and (ab) for SSA_NAMEs. Mark INTEGER_CSTs with (OVF) if + TREE_OVERFLOW is set. + +2013-10-11 Thomas Schwinge <thomas@codesourcery.com> + + * tree.h (OMP_CLAUSE_CODE): Remove duplicate definition. + + * gimple.c: GIMPLE statements have subcodes, not sub-codes. + * gimple.h: Likewise. + + * doc/generic.texi (OpenMP): OMP_CLAUSE_* are subcodes, not sub-codes. + + * doc/generic.texi (Adding new DECL node types): Explain *_CHECK + macros. + + * doc/gimple.texi (is_gimple_omp): Move into the correct section. + + * acinclude.m4 (gcc_GAS_FLAGS): Add more gcc_cv_as_flags overrides. + * configure: Regenerate. + +2013-10-11 Jakub Jelinek <jakub@redhat.com> + + * tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE__LOOPTEMP_ + and new OpenMP 4.0 clauses, handle UDR OMP_CLAUSE_REDUCTION, + formatting fixes, use pp_colon instead of pp_character (..., ':'), + similarly pp_right_paren. + (dump_generic_node): Handle OMP_DISTRIBUTE, OMP_TEAMS, + OMP_TARGET_DATA, OMP_TARGET, OMP_TARGET_UPDATE, OMP_TASKGROUP, + allow OMP_FOR_INIT to be NULL, handle OMP_ATOMIC_SEQ_CST. + * tree.c (omp_clause_num_ops, omp_clause_code_name): Add OpenMP 4.0 + clauses. + (omp_declare_simd_clauses_equal, + omp_remove_redundant_declare_simd_attrs): New functions. + (attribute_value_equal): Use omp_declare_simd_clauses_equal. + (walk_tree_1): Handle new OpenMP 4.0 clauses. + * tree.h (OMP_LOOP_CHECK): Define. + (OMP_FOR_BODY, OMP_FOR_CLAUSES, OMP_FOR_INIT, OMP_FOR_COND, + OMP_FOR_INCR, OMP_FOR_PRE_BODY): Use it. + (OMP_TASKGROUP_BODY, OMP_TEAMS_BODY, OMP_TEAMS_CLAUSES, + OMP_TARGET_DATA_BODY, OMP_TARGET_DATA_CLAUSES, OMP_TARGET_BODY, + OMP_TARGET_CLAUSES, OMP_TARGET_UPDATE_CLAUSES, OMP_CLAUSE_SIZE, + OMP_ATOMIC_SEQ_CST, OMP_CLAUSE_DEPEND_KIND, OMP_CLAUSE_MAP_KIND, + OMP_CLAUSE_MAP_ZERO_BIAS_ARRAY_SECTION, OMP_CLAUSE_PROC_BIND_KIND, + OMP_CLAUSE_REDUCTION_OMP_ORIG_REF, OMP_CLAUSE_ALIGNED_ALIGNMENT, + OMP_CLAUSE_NUM_TEAMS_EXPR, OMP_CLAUSE_THREAD_LIMIT_EXPR, + OMP_CLAUSE_DEVICE_ID, OMP_CLAUSE_DIST_SCHEDULE_CHUNK_EXPR, + OMP_CLAUSE_SIMDLEN_EXPR): Define. + (OMP_CLAUSE_DECL): Change range up to OMP_CLAUSE__LOOPTEMP_. + (omp_remove_redundant_declare_simd_attrs): New prototype. + * gimple.def (GIMPLE_OMP_TASKGROUP, GIMPLE_OMP_TARGET, + GIMPLE_OMP_TEAMS): New codes. + (GIMPLE_OMP_RETURN): Use GSS_OMP_ATOMIC_STORE instead of GSS_BASE. + * omp-low.c (struct omp_context): Add cancel_label and cancellable + fields. + (target_nesting_level): New variable. + (extract_omp_for_data): Handle GF_OMP_FOR_KIND_DISTRIBUTE and + OMP_CLAUSE_DIST_SCHEDULE. Don't fallback to library implementation + for collapse > 1 static schedule unless ordered. + (get_ws_args_for): Add par_stmt argument. Handle combined loops. + (determine_parallel_type): Adjust get_ws_args_for caller. + (install_var_field): Handle mask & 4 for double indirection. + (scan_sharing_clauses): Ignore shared clause on teams construct. + Handle OMP_CLAUSE__LOOPTEMP_ and new OpenMP 4.0 clauses. + (create_omp_child_function): If inside target or declare target + constructs, set "omp declare target" attribute on the child function. + (find_combined_for): New function. + (scan_omp_parallel): Handle combined loops. + (scan_omp_target, scan_omp_teams): New functions. + (check_omp_nesting_restrictions): Check new OpenMP 4.0 nesting + restrictions and set ctx->cancellable for cancellable constructs. + (scan_omp_1_stmt): Call check_omp_nesting_restrictions also on + selected builtin calls. Handle GIMPLE_OMP_TASKGROUP, + GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS. + (build_omp_barrier): Add lhs argument, return gimple rather than tree. + (omp_clause_aligned_alignment): New function. + (lower_rec_simd_input_clauses): Only call SET_DECL_VALUE_EXPR on decls. + (lower_rec_input_clauses): Add FD argument. Ignore shared clauses + on teams constructs. Handle user defined reductions and new + OpenMP 4.0 clauses. + (lower_reduction_clauses): Don't set placeholder to address of ref + if it has already the right type. + (lower_send_clauses): Handle OMP_CLAUSE__LOOPTEMP_. + (expand_parallel_call): Use the new non-_start suffixed builtins, + handle OMP_CLAUSE_PROC_BIND, don't call the outlined function + and GOMP_parallel_end after the call. + (expand_task_call): Handle OMP_CLAUSE_DEPEND. + (expand_omp_for_init_counts): Handle combined loops. + (expand_omp_for_init_vars): Add inner_stmt argument, handle combined + loops. + (expand_omp_for_generic): Likewise. Use GOMP_loop_end_cancel at the + end of cancellable loops. + (expand_omp_for_static_nochunk, expand_omp_for_static_chunk): + Likewise. Handle collapse > 1 loops. + (expand_omp_simd): Handle combined loops. + (expand_omp_for): Add inner_stmt argument, adjust callers of + expand_omp_for* functions, use expand_omp_for_static*chunk even + for collapse > 1 unless ordered. + (expand_omp_sections): Use GOMP_sections_end_cancel at the end + of cancellable sections. + (expand_omp_single): Remove need_barrier variable, just rely on + gimple_omp_return_nowait_p. Adjust build_omp_barrier caller. + (expand_omp_synch): Allow GIMPLE_OMP_TASKGROUP and GIMPLE_OMP_TEAMS. + (expand_omp_atomic_load, expand_omp_atomic_store, + expand_omp_atomic_fetch_op): Handle gimple_omp_atomic_seq_cst_p. + (expand_omp_target): New function. + (expand_omp): Handle combined loops. Handle GIMPLE_OMP_TASKGROUP, + GIMPLE_OMP_TEAMS, GIMPLE_OMP_TARGET. + (build_omp_regions_1): Immediately close region for + GF_OMP_TARGET_KIND_UPDATE. + (maybe_add_implicit_barrier_cancel): New function. + (lower_omp_sections): Adjust lower_rec_input_clauses caller. Handle + cancellation. + (lower_omp_single): Likewise. Add clobber after the barrier. + (lower_omp_taskgroup): New function. + (lower_omp_for): Handle combined loops. Adjust + lower_rec_input_clauses caller. Handle cancellation. + (lower_depend_clauses): New function. + (lower_omp_taskreg): Lower depend clauses. Adjust + lower_rec_input_clauses caller. Add clobber after the call. Handle + cancellation. + (lower_omp_target, lower_omp_teams): New functions. + (lower_omp_1): Handle cancellation. Handle GIMPLE_OMP_TASKGROUP, + GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS and GOMP_barrier, GOMP_cancel + and GOMP_cancellation_point calls. + (lower_omp): Fold stmts inside of target region. + (diagnose_sb_1, diagnose_sb_2): Handle GIMPLE_OMP_TASKGROUP, + GIMPLE_OMP_TARGET and GIMPLE_OMP_TEAMS. + * builtin-types.def (DEF_FUNCTION_TYPE_8): Document. + (BT_FN_VOID_OMPFN_PTR_UINT, + BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG, + BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_LONG, + BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT): Remove. + (BT_FN_VOID_OMPFN_PTR_UINT_UINT_UINT, + BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_UINT, + BT_FN_VOID_OMPFN_PTR_UINT_LONG_LONG_LONG_LONG_UINT, + BT_FN_BOOL_INT, BT_FN_BOOL_INT_BOOL, BT_FN_VOID_UINT_UINT, + BT_FN_VOID_INT_PTR_SIZE_PTR_PTR_PTR, + BT_FN_VOID_INT_OMPFN_PTR_SIZE_PTR_PTR_PTR, + BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR): New. + * tree-ssa-alias.c (ref_maybe_used_by_call_p_1, + call_may_clobber_ref_p_1): Handle BUILT_IN_GOMP_BARRIER_CANCEL, + BUILT_IN_GOMP_TASKGROUP_END, BUILT_IN_GOMP_LOOP_END_CANCEL, + BUILT_IN_GOMP_SECTIONS_END_CANCEL. Don't handle + BUILT_IN_GOMP_PARALLEL_END. + * gimple-low.c (lower_stmt): Handle GIMPLE_OMP_TASKGROUP, + GIMPLE_OMP_TARGET and GIMPLE_OMP_TEAMS. + * gimple-pretty-print.c (dump_gimple_omp_for): Handle + GF_OMP_FOR_KIND_DISTRIBUTE. + (dump_gimple_omp_target, dump_gimple_omp_teams): New functions. + (dump_gimple_omp_block): Handle GIMPLE_OMP_TASKGROUP. + (dump_gimple_omp_return): Print lhs if it has any. + (dump_gimple_omp_atomic_load, dump_gimple_omp_atomic_store): Handle + gimple_omp_atomic_seq_cst_p. + (pp_gimple_stmt_1): Handle GIMPLE_OMP_TASKGROUP, GIMPLE_OMP_TARGET + and GIMPLE_OMP_TEAMS. + * langhooks.c (lhd_omp_mappable_type): New function. + * tree-vectorizer.c (struct simd_array_to_simduid): Fix up comment. + * langhooks.h (struct lang_hooks_for_types): Add omp_mappable_type + hook. + * gimplify.c (enum gimplify_omp_var_data): Add GOVD_MAP, + GOVD_ALIGNED and GOVD_MAP_TO_ONLY. + (enum omp_region_type): Add ORT_TEAMS, ORT_TARGET_DATA and ORT_TARGET. + (struct gimplify_omp_ctx): Add combined_loop field. + (gimplify_call_expr, gimplify_modify_expr): Don't call fold_stmt + on stmts inside of target region. + (is_gimple_stmt): Return true for OMP_DISTRIBUTE and OMP_TASKGROUP. + (omp_firstprivatize_variable): Handle GOVD_MAP, GOVD_ALIGNED, + ORT_TARGET and ORT_TARGET_DATA. + (omp_add_variable): Avoid checks on readding var for GOVD_ALIGNED. + Handle GOVD_MAP. + (omp_notice_threadprivate_variable): Complain about threadprivate + variables in target region. + (omp_notice_variable): Complain about vars with non-mappable type + in target region. Handle ORT_TEAMS, ORT_TARGET and ORT_TARGET_DATA. + (omp_check_private): Ignore ORT_TARGET* regions. + (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses_1, + gimplify_adjust_omp_clauses): Handle new OpenMP 4.0 clauses. + (find_combined_omp_for): New function. + (gimplify_omp_for): Handle gimplification of combined loops. + (gimplify_omp_workshare): Gimplify also OMP_TARGET, OMP_TARGET_DATA, + OMP_TEAMS. + (gimplify_omp_target_update): New function. + (gimplify_omp_atomic): Handle OMP_ATOMIC_SEQ_CST. + (gimplify_expr): Handle OMP_DISTRIBUTE, OMP_TARGET, OMP_TARGET_DATA, + OMP_TARGET_UPDATE, OMP_TEAMS, OMP_TASKGROUP. + (gimplify_body): If fndecl has "omp declare target" attribute, add + implicit ORT_TARGET context around it. + * tree.def (OMP_DISTRIBUTE, OMP_TEAMS, OMP_TARGET_DATA, OMP_TARGET, + OMP_TASKGROUP, OMP_TARGET_UPDATE): New tree codes. + * tree-nested.c (convert_nonlocal_reference_stmt, + convert_local_reference_stmt, convert_gimple_call): Handle + GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS and GIMPLE_OMP_TASKGROUP. + * omp-builtins.def (BUILT_IN_GOMP_TASK): Use + BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR + instead of BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT. + (BUILT_IN_GOMP_TARGET, BUILT_IN_GOMP_TARGET_DATA, + BUILT_IN_GOMP_TARGET_END_DATA, BUILT_IN_GOMP_TARGET_UPDATE, + BUILT_IN_GOMP_TEAMS, BUILT_IN_BARRIER_CANCEL, + BUILT_IN_GOMP_LOOP_END_CANCEL, + BUILT_IN_GOMP_SECTIONS_END_CANCEL, BUILT_IN_OMP_GET_TEAM_NUM, + BUILT_IN_OMP_GET_NUM_TEAMS, BUILT_IN_GOMP_TASKGROUP_START, + BUILT_IN_GOMP_TASKGROUP_END, BUILT_IN_GOMP_PARALLEL_LOOP_STATIC, + BUILT_IN_GOMP_PARALLEL_LOOP_DYNAMIC, + BUILT_IN_GOMP_PARALLEL_LOOP_GUIDED, + BUILT_IN_GOMP_PARALLEL_LOOP_RUNTIME, BUILT_IN_GOMP_PARALLEL, + BUILT_IN_GOMP_PARALLEL_SECTIONS, BUILT_IN_GOMP_CANCEL, + BUILT_IN_GOMP_CANCELLATION_POINT): New built-ins. + (BUILT_IN_GOMP_PARALLEL_LOOP_STATIC_START, + BUILT_IN_GOMP_PARALLEL_LOOP_DYNAMIC_START, + BUILT_IN_GOMP_PARALLEL_LOOP_GUIDED_START, + BUILT_IN_GOMP_PARALLEL_LOOP_RUNTIME_START, + BUILT_IN_GOMP_PARALLEL_START, BUILT_IN_GOMP_PARALLEL_END, + BUILT_IN_GOMP_PARALLEL_SECTIONS_START): Remove. + * tree-inline.c (remap_gimple_stmt, estimate_num_insns): + Handle GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS and GIMPLE_OMP_TASKGROUP. + * gimple.c (gimple_build_omp_taskgroup, gimple_build_omp_target, + gimple_build_omp_teams): New functions. + (walk_gimple_op): Handle GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS and + GIMPLE_OMP_TASKGROUP. Walk optional lhs on GIMPLE_OMP_RETURN. + (walk_gimple_stmt, gimple_copy): Handle GIMPLE_OMP_TARGET, + GIMPLE_OMP_TEAMS and GIMPLE_OMP_TASKGROUP. + * gimple.h (enum gf_mask): GF_OMP_FOR_KIND_DISTRIBUTE, + GF_OMP_FOR_COMBINED, GF_OMP_FOR_COMBINED_INTO, + GF_OMP_TARGET_KIND_MASK, GF_OMP_TARGET_KIND_REGION, + GF_OMP_TARGET_KIND_DATA, GF_OMP_TARGET_KIND_UPDATE, + GF_OMP_ATOMIC_SEQ_CST): New. + (gimple_build_omp_taskgroup, gimple_build_omp_target, + gimple_build_omp_teams): New prototypes. + (gimple_has_substatements): Handle GIMPLE_OMP_TARGET, + GIMPLE_OMP_TEAMS and GIMPLE_OMP_TASKGROUP. + (gimple_omp_subcode): Use GIMPLE_OMP_TEAMS instead of + GIMPLE_OMP_SINGLE as end of range. + (gimple_omp_return_set_lhs, gimple_omp_return_lhs, + gimple_omp_return_lhs_ptr, gimple_omp_atomic_seq_cst_p, + gimple_omp_atomic_set_seq_cst, gimple_omp_for_combined_p, + gimple_omp_for_set_combined_p, gimple_omp_for_combined_into_p, + gimple_omp_for_set_combined_into_p, gimple_omp_target_clauses, + gimple_omp_target_clauses_ptr, gimple_omp_target_set_clauses, + gimple_omp_target_kind, gimple_omp_target_set_kind, + gimple_omp_target_child_fn, gimple_omp_target_child_fn_ptr, + gimple_omp_target_set_child_fn, gimple_omp_target_data_arg, + gimple_omp_target_data_arg_ptr, gimple_omp_target_set_data_arg, + gimple_omp_teams_clauses, gimple_omp_teams_clauses_ptr, + gimple_omp_teams_set_clauses): New inlines. + (CASE_GIMPLE_OMP): Add GIMPLE_OMP_TARGET, GIMPLE_OMP_TEAMS + and GIMPLE_OMP_TASKGROUP. + * tree-core.h (enum omp_clause_code): Add new OpenMP 4.0 clause codes. + (enum omp_clause_depend_kind, enum omp_clause_map_kind, + enum omp_clause_proc_bind_kind): New. + (union omp_clause_subcode): Add depend_kind, map_kind and + proc_bind_kind fields. + * tree-cfg.c (make_edges): Handle GIMPLE_OMP_TARGET, + GIMPLE_OMP_TEAMS and GIMPLE_OMP_TASKGROUP. + * langhooks-def.h (lhd_omp_mappable_type): New prototype. + (LANG_HOOKS_OMP_MAPPABLE_TYPE): Define. + (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add it. + +2013-10-10 Teresa Johnson <tejohnson@google.com> + + * predict.c (tree_estimate_probability): Add new parameter + for estimate_bb_frequencies. + (estimate_bb_frequencies): Add new parameter to force estimation. + (rebuild_frequencies): When max frequency in function is small, + recompute counts from frequencies. + * predict.h (estimate_bb_frequencies): New parameter. + +2013-10-10 David Malcolm <dmalcolm@redhat.com> + + * ipa-inline.c (ipa_inline): Fix leak of "order" when + optimizations are disabled. + +2013-10-10 David Malcolm <dmalcolm@redhat.com> + + * coverage.c (coverage_finish): Fix leak of da_file_name. + +2013-10-10 Jan Hubicka <jh@suse.cz> + + * config/i386/x86-tune.def: Enable X86_TUNE_SSE_TYPELESS_STORES + for generic, enable X86_TUNE_SSE_LOAD0_BY_PXOR for Bulldozer, + Bobcat and generic. + +2013-10-10 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58670 + * stmt.c (expand_asm_operands): Add FALLTHRU_BB argument, + if any labels are in FALLTHRU_BB, use a special label emitted + immediately after the asm goto insn rather than label_rtx + of the LABEL_DECL. + (expand_asm_stmt): Adjust caller. + * cfgrtl.c (commit_one_edge_insertion): Force splitting of + edge if the last insn in predecessor is a jump with single successor, + but it isn't simplejump_p. + +2013-10-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58656 + * tree-ssa-pre.c (phi_translate): Do not cache failed translations. + +2013-10-10 Andrew MacLeod <amacleod@redhat.com> + + * gimplify.c: Include expr.h and tm_p.h for targets with special + va-arg padding requirements. + +2013-10-10 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Move some prototypes to gimple.h. + (gimple_fold_indirect_ref): Move prototype to gimple-fold.h. + * gimple.h: Relocate some prototypes from tree-flow.h + * builtins.c (std_gimplify_va_arg_expr, build_va_arg_indirect_ref): + Move to gimplify.c. + * gimplify.c (gimple_fold_indirect_ref): Move to gimple-fold.c. + (build_va_arg_indirect_ref): Relocate and make static. + (std_gimplify_va_arg_expr): Relocate here. + * gimple-fold.c (gimple_fold_indirect_ref): Relocate here. + * gimple-fold.h (gimple_fold_indirect_ref): Add prototype. + +2013-10-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * doc/md.texi: Document the mnemonic attribute. + +2013-10-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/57377 + * gensupport.c (gen_mnemonic_attr): Handle (set (attr x) y) and + (set_attr_alternative x ...) when searching for user defined + mnemonic attribute. + +2013-10-10 Andrew MacLeod <amacleod@redhat.com> + + * config/alpha/alpha.c: Add gimple-ssa.h to include list. + +2013-10-09 Easwaran Raman <eraman@google.com> + + * params.def (PARAM_MIN_SIZE_FOR_STACK_SHARING): New param... + * cfgexpand.c (defer_stack_allocation): ...use here + * doc/invoke.texi: Add documentation for min-size-for-stack-sharing. + +2013-10-09 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * tree-ssa-phiopts.c (rhs_is_fed_for_value_replacement): New function. + (operand_equal_for_value_replacement): New function, extracted from + value_replacement and enhanced to catch more cases. + (value_replacement): Use operand_equal_for_value_replacement. + +2013-10-09 Andrew MacLeod <amacleod@redhat.com> + + * loop-doloop.c (doloop_modify, doloop_optimize): Use + get_max_loop_iterations. + +2013-10-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/aarch-common.c (arm_early_load_addr_dep): + Place comment above function. + +2013-10-09 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Remove all remaining prototypes, enums and structs that + are not related to tree-cfg.c. + * tree-ssa-address.h: New file. Relocate prototypes. + * tree-ssa-address.c: (struct mem_address): Relocate from tree-flow.h. + (addr_for_mem_ref): New. Combine call to get_address_description and + return addr_for_mem_ref. + * expr.c (expand_expr_real_1): Use new addr_for_mem_ref routine. + * tree-ssa-live.h: Adjust prototypes. + * passes.c: Include tree-ssa-live.h. + * gimple-pretty-print.h (gimple_dump_bb): Add prototype. + * graphite.c (graphite_transform_loops): Make static. + (graphite_transforms, gate_graphite_transforms, pass_data_graphite, + make_pass_graphite, pass_data_graphite_transforms, + make_pass_graphite_transforms): Relocate here from tree-ssa-loop.c. + * ipa-pure-const.c (warn_function_noreturn): Make static. + (execute_warn_function_noreturn, gate_warn_function_noreturn, + class pass_warn_function_noreturn, make_pass_warn_function_noreturn): + Relocate from tree-cfg.c + * tree-cfg.c (tree_node_can_be_shared, gimple_empty_block_p): Make + static. + (execute_warn_function_noreturn, gate_warn_function_noreturn, + class pass_warn_function_noreturn, make_pass_warn_function_noreturn): + Move to ipa-pure-const.c. + (execute_fixup_cfg, class pass_fixup_cfg, make_pass_fixup_cfg): + Relocate from tree-optimize.c. + * tree-optimize.c (execute_fixup_cfg, class pass_fixup_cfg, + make_pass_fixup_cfg): Move to tree-cfg.c. + * tree-chrec.h: (enum ev_direction): Relocate here from tree-flow.h. + Relocate some prototypes. + * tree-data-ref.h (tree_check_data_deps) Add prototype. + * tree-dump.c (dump_function_to_file): Remove prototype. + Add tree-flow.h to the include file. + * tree-dump.h: Remove prototype. + * tree-parloops.h: New File. Add prototypes. + * tree-parloops.c (gate_tree_parallelize_loops, tree_parallelize_loops, + pass_data_parallelize_loops, make_pass_parallelize_loops): Relocate + from tree-ssa-loop.c. + * tree-predcom.c (run_tree_predictive_commoning, + gate_tree_predictive_commoning, pass_data_predcom, make_pass_predcom): + Relocate here from tree-ssa-loop.c. + * tree-ssa-dom.c (tree_ssa_dominator_optimize) Don't call + ssa_name_values.release (). + * tree-ssa-threadedge.h: New File. Relocate prototypes here. + (ssa_name_values): Relocate from tree-flow.h. + * tree-ssa.h: Include tree-ssa-threadedge.h and tree-ssa-address.h. + * tree-ssa-loop.c (run_tree_predictive_commoning, + gate_tree_predictive_commoning, pass_data_predcom, make_pass_predcom, + graphite_transforms, gate_graphite_transforms, pass_data_graphite, + make_pass_graphite, pass_data_graphite_transforms, + make_pass_graphite_transforms, gate_tree_parallelize_loops, + tree_parallelize_loops, pass_data_parallelize_loops, + make_pass_parallelize_loops): Move to other files. + * tree-vectorizer.h (lpeel_tree_duplicate_loop_to_edge_cfg): Prototype + moved here. + * tree.h: Remove prototypes from tree-address.c. + +2013-10-09 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h (tm_restart_node, gimple_df): Move to gimple-ssa.h. + (struct int_tree_map): Move to tree-hasher.h + (SCALE, LABEL, PERCENT): Move to gimple.h + * tree-flow-inline.h: Delete. Move functions to other files. + (unmodifiable_var_p, ref_contains_array_ref): Unused, so delete. + * gimple-ssa.h (tm_restart_node, gimple_df): Relocate from tree-flow.h. + (gimple_in_ssa_p, gimple_vop): Relocate from tree-flow-inline.h + * gimple.h (imple_stmt_max_uid, set_gimple_stmt_max_uid, + inc_gimple_stmt_max_uid, get_lineno): Relocate from tree-flow-inline.h. + (SCALE, LABEL, PERCENT): Relocate from tree-flow.h + * tree-hasher.h: Don't include tree-flow.h. + (struct int_tree_map): Relocate from tree-flow.h. + * tree-sra.c (contains_view_convert_expr_p): Relocate from + tree-flow-inline.h and make static. + * tree-ssa-alias.h (ranges_overlap_p): Relocate from + tree-flow-inline.h. + * tree-ssa-operands.c (gimple_ssa_operands): Relocate from + tree-flow-inline.h and make static. + * tree.h (is_global_var, may_be_aliased): Relocate from + tree-flow-inline.h. + * Makefile.in (GTFILES): Remove tree-flow.h and add gimple-ssa.h. + * value-prof.c: No longer include tree-flow-inline.h. + * tree-switch-conversion.c: No longer include tree-flow-inline.h. + +2013-10-09 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Move some protoypes. Include new tree-ssa-loop.h. + (struct affine_iv, struct tree_niter_desc): Move to tree-ssa-loop.h. + (enum move_pos): Move to tree-ssa-loop-im.h + * cfgloop.h: Move some prototypes. + (gcov_type_to_double_int): relocate from tree-ssa-loop.niter.c. + * tree-flow-inline.h (loop_containing_stmt): Move to tree-ssa-loop.h. + * tree-ssa-loop.h: New File. Include other tree-ssa-loop-*.h files. + (struct affine_iv, struct tree_niter_desc): Relocate from tree-flow.h. + (loop_containing_stmt): Relocate from tree-flow-inline.h. + * tree-ssa-loop-ch.c: (do_while_loop_p): Make static. + * tree-ssa-loop-im.c (for_each_index): Move to tree-ssa-loop.c. + (enum move_pos): Relocate here. + (lsm_tmp_name_add, gen_lsm_tmp_name, get_lsm_tmp_name): Move to + tree-ssa-loop.c. + (execute_sm_if_changed_flag_set): Change get_lsm_tmp_name call. + (tree_ssa_loop_im, gate_tree_ssa_loop_im, pass_data_lim, + make_pass_lim): Relocate here from tree-ssa-loop.c. + * tree-ssa-loop-ivcanon.c (tree_num_loop_insns): Move to + tree-ssa-loop.c. + (loop_edge_to_cancel, unloop_loops): Make static. + (tree_ssa_loop_ivcanon, gate_tree_ssa_loop_ivcanon, pass_data_iv_canon, + make_pass_iv_canon): Relocate from tree-ssa-loop.c. + (tree_complete_unroll, gate_tree_complete_unroll, + pass_data_complete_unroll, make_pass_complete_unroll): Relocate here. + (tree_complete_unroll_inner, gate_tree_complete_unroll_inner, + pass_data_complete_unrolli, make_pass_complete_unrolli): Relocate here. + * tree-ssa-loop-ivopts.c: Remove local prototypes. + (stmt_invariant_in_loop_p): Remove unused function. + * tree-ssa-loop-ivopts.h: New file. Add prototypes. + * tree-ssa-loop-manip.h: New file. Add prototypes. + * tree-ssa-loop-niter.c (record_niter_bound): Move to cfgloop.c. + (gcov_type_to_double_int): Move to cfgloop.h. + (double_int_cmp, bound_index, + estimate_numbers_of_iterations_loop): Make static. + (estimated_loop_iterations): Factor out get_estimated_loop_iterations. + (max_loop_iterations): Factor out get_max_loop_iterations. + (estimated_loop_iterations_int, max_stmt_executions_int): Move to + cfgloop.c. + * tree-ssa-loop-niter.h: New file. Add prototypes. + * tree-ssa-loop-prefetch.c (tree_ssa_loop_prefetch, + gate_tree_ssa_loop_prefetch, pass_data_loop_prefetch, + make_pass_loop_prefetch): Relocate from tree-ssa-loop.c. + * tree-ssa-loop-unswitch.c (tree_ssa_loop_unswitch, + gate_tree_ssa_loop_unswitch, pass_data_tree_unswitch, + make_pass_tree_unswitch): Relocate from tree-ssa-loop.c. + * tree-ssa-loop.c (tree_ssa_loop_im, gate_tree_ssa_loop_im, + pass_data_lim, make_pass_lim): Move to tree-ssa-loop-im.c. + (tree_ssa_loop_unswitch, gate_tree_ssa_loop_unswitch, + pass_data_tree_unswitch, make_pass_tree_unswitch): Move. + (tree_ssa_loop_ivcanon, gate_tree_ssa_loop_ivcanon, pass_data_iv_canon, + make_pass_iv_canon, tree_complete_unroll, gate_tree_complete_unroll, + pass_data_complete_unroll, make_pass_complete_unroll, + tree_complete_unroll_inner, gate_tree_complete_unroll_inner, + pass_data_complete_unrolli, make_pass_complete_unrolli): Move to + tree-ssa-loop-ivcanon.c. + (tree_ssa_loop_prefetch, gate_tree_ssa_loop_prefetch, + pass_data_loop_prefetch, make_pass_loop_prefetch): Move to + tree-ssa-loop-prefetch.c. + (for_each_index, lsm_tmp_name_add, gen_lsm_tmp_name): Relocate from + tree-ssa-loop-im.c. + (get_lsm_tmp_name): Relocate and add suffix parameter. + (tree_num_loop_insns): Relocate from tree-ssa-ivcanon.c. + * tree-scalar-evolution.h (simple_iv): Don't use affive_iv typedef. + * cfgloop.c (record_niter_bound, estimated_loop_iterations_int, + max_stmt_executions_int): Move from tree-ssa-loop-niter.c. + (get_estimated_loop_iterations): Factor out accessor from + estimated_loop_iterations in tree-ssa-loop-niter.c. + (get_max_loop_iterations): Factor out accessor from + _max_loop_iterations in tree-ssa-niter.c. + * loop-unroll.c (decide_unroll_constant_iterations, + decide_unroll_runtime_iterations, decide_peel_simple, + decide_unroll_stupid): Use new get_* accessors. + +2013-10-09 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/20318 + * doc/extend.texi (returns_nonnull): New function attribute. + * fold-const.c (tree_expr_nonzero_warnv_p): Look for returns_nonnull + attribute. + * tree-vrp.c (gimple_stmt_nonzero_warnv_p): Likewise. + (stmt_interesting_for_vrp): Accept all GIMPLE_CALL. + +2013-10-09 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/58570 + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): Return + false if both components are bitfields. + +2013-10-09 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vclz_s8, vclz_s16, vclz_s32) + (vclzq_s8, vclzq_s16, vclzq_s32, vclz_u8, vclz_u16, vclz_u32) + (vclzq_u8, vclzq_u16, vclzq_u32): Replace ASM with C. + * config/aarch64/aarch64.h + (CLZ_DEFINED_VALUE_AT_ZERO): Macro fixed for clz. + * config/aarch64/aarch64-simd-builtins.def + (VAR1 (UNOP, clz, 0, v4si)): Replaced with iterator. + +2013-10-09 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vadd_f64, vsub_f64): Implementation added. + +2013-10-09 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vdiv_f64): Added. + +2013-10-09 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/arm_neon.h (vneg_f32): Asm replaced with C. + (vneg_f64): New intrinsic. + (vneg_s8): Asm replaced with C. + (vneg_s16): Likewise. + (vneg_s32): Likewise. + (vneg_s64): New intrinsic. + (vnegq_f32): Asm replaced with C. + (vnegq_f64): Likewise. + (vnegq_s8): Likewise. + (vnegq_s16): Likewise. + (vnegq_s32): Likewise. + (vnegq_s64): Likewise. + +2013-10-09 Renlin Li <Renlin.Li@arm.com> + + * config/arm/arm.c (arm_output_mi_thunk): Use plus_constant. + +2013-10-09 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_register_info_stdarg_fpr): Remove + packed stack special handling. + (s390_frame_info, s390_emit_prologue, s390_emit_epilogue): Switch + back to fixed stack slots for FPRs saved due to stdarg. + +2013-10-09 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_frame_info): Restructure function. + +2013-10-09 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (struct s390_frame_layout): New field + gpr_save_slots. + (cfun_save_arg_fprs_p, cfun_gpr_save_slot): New macros. + (s390_reg_clobbered_rtx, s390_regs_ever_clobbered): Change type of + regs_ever_clobbered to char*. + (s390_regs_ever_clobbered): Check crtl->saves_all_registers instead + of cfun->has_nonlocal_label. Ignore frame related restore INSNs. + (s390_register_info): Enable FPR save slots. Move/Copy some + functionality into ... + (s390_register_info_gprtofpr, s390_register_info_stdarg_fpr) + (s390_register_info_stdarg_gpr, s390_optimize_register_info): New + function. + (s390_frame_info): Do gpr slot allocation here now. stdarg does + not imply a stack frame. + (s390_init_frame_layout): Remove variable clobbered_regs. + (s390_update_register_info): Remove function. + (s390_hard_regno_rename_ok): Call-saved regs without a save slot + cannot be used for register renaming. + (s390_hard_regno_scratch_ok): New function. + (TARGET_HARD_REGNO_SCRATCH_OK): Define target hook. + (s390_initial_elimination_offset): Change offset calculation of + the return address pointer. + (save_gprs): Deal with only r6 being saved from the call-saved regs. + (restore_gprs): Set frame related flag. + (s390_save_gprs_to_fprs, s390_restore_gprs_from_fprs): New functions. + (s390_emit_prologue): Call s390_register_info instead of + s390_update_frame_layout. Call s390_save_gprs_to_fprs. + (s390_emit_epilogue): Call s390_restore_gprs_from_fprs. + (s390_optimize_prologue): Call s390_optimize_register_info. + Try to remove also FPR slot save/restore INSNs. Remove frame + related flags from restore INSNs. + +2013-10-08 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78-expand.md (movqi): use operands[] not operandN. + (movhi): Likewise. + + * config/rl78/rl78.c (rl78_print_operand_1): Change %c to %C to + avoid conflict with the MI use of %c. + * config/rl78/rl78-real.md: change %c to %C throughout. + * config/rl78/rl78-virt.md: Likewise. + +2013-10-08 Jan Hubicka <jh@suse.cz> + + * config/i386/i386.c (ix86_option_override_internal): Switch + to SSE math for -ffast-math when target ISA supports SSE2. + +2013-10-08 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Remove some prototypes. + * tree.h: Remove some protypes, add a couple. + * tree.c (using_eh_for_cleanups_flag, using_eh_for_cleanups, + using_eh_for_cleanups_p): Add interface routines for front ends. + * tree-eh.h: New file. Add protoptyes. + * tree-eh.c (using_eh_for_cleanups_p, using_eh_for_cleanups): Delete. + (add_stmt_to_eh_lp_fn): Make static. + (lower_try_finally): Use new using_eh_for_cleanups_p. + * emit-rtl.c: Include tree-eh.h. + * gimple.h: Include tree-eh.h. + +2013-10-08 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/58480 + * tree-vrp.c (infer_nonnull_range): New function. + (infer_value_range): Call infer_nonnull_range. + +2013-10-08 Dehao Chen <dehao@google.com> + + PR tree-optimization/58619 + * tree-inline.c (copy_phis_for_bb): Combine location data + only if non-null. + +2013-10-08 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + PR target/58423 + * config/arm/arm.c (arm_emit_ldrd_pop): Attach + RTX_FRAME_RELATED_P on INSN. + +2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const_le): New. + (altivec_expand_vec_perm_const): Call it. + +2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/vector.md (mov<mode>): Emit permuted move + sequences for LE VSX loads and stores at expand time. + * config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New + prototype. + * config/rs6000/rs6000.c (rs6000_const_vec): New. + (rs6000_gen_le_vsx_permute): New. + (rs6000_gen_le_vsx_load): New. + (rs6000_gen_le_vsx_store): New. + (rs6000_gen_le_vsx_move): New. + * config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New. + (*vsx_le_perm_load_v4si): New. + (*vsx_le_perm_load_v8hi): New. + (*vsx_le_perm_load_v16qi): New. + (*vsx_le_perm_store_v2di): New. + (*vsx_le_perm_store_v4si): New. + (*vsx_le_perm_store_v8hi): New. + (*vsx_le_perm_store_v16qi): New. + (*vsx_xxpermdi2_le_<mode>): New. + (*vsx_xxpermdi4_le_<mode>): New. + (*vsx_xxpermdi8_le_V8HI): New. + (*vsx_xxpermdi16_le_V16QI): New. + (*vsx_lxvd2x2_le_<mode>): New. + (*vsx_lxvd2x4_le_<mode>): New. + (*vsx_lxvd2x8_le_V8HI): New. + (*vsx_lxvd2x16_le_V16QI): New. + (*vsx_stxvd2x2_le_<mode>): New. + (*vsx_stxvd2x4_le_<mode>): New. + (*vsx_stxvd2x8_le_V8HI): New. + (*vsx_stxvd2x16_le_V16QI): New. + +2013-10-07 Renlin Li <Renlin.Li@arm.com> + + * config/arm/arm-cores.def (cortex-a53): Use cortex tuning. + +2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_register_info): Make the call-saved FPR + loop to work also for 31bit ABI. + Save the stack pointer for frame_size > 0. + +2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md ("tbegin", "tbegin_nofloat", "tbegin_retry") + ("tbegin_retry_nofloat", "tend", "tabort", "tx_assist"): Remove + constraint letters from expanders. + ("tbegin_retry", "tbegin_retry_nofloat"): Change predicate of the + retry count to general_operand. + ("tabort"): Give operand 0 a mode. + ("tabort_1"): Add mode and constraint letter for operand 0. + * doc/extend.texi: Fix protoype of __builtin_non_tx_store. + +2013-10-04 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c: Fix some trailing whitespace problems. + + * tree-ssa-threadedge.c (thread_through_normal_block): Broken + out of ... + (thread_across_edge): Here. Call it. + +2013-10-04 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (dw_sra_loc_expr): Release addr_table entries when + discarding a location list expression (or a piece of one). + +2013-10-03 Jan Hubicka <jh@suse.cz> + + * config/i386/i386.c (ix86_issue_rate): Pentium4, Nocona has issue + rate of 2. Core2, Corei7 and Haswell has issue rate of 4. + (ix86_adjust_cost): Remove Atom case; fix core2/corei7/Haswell case. + +2013-10-03 Jan Hubicka <jh@suse.cz> + + * config/i386/i386.c (ix86_option_override_internal): Do not enable + accumulate-outgoing-args when producing unwind info. + +2013-10-03 Wei Mi <wmi@google.com> + + * lra-constraints.c (insert_move_for_subreg): New function + extracted from simplify_operand_subreg. + (simplify_operand_subreg): Add reload for paradoxical subreg. + +2013-10-03 Rong Xu <xur@google.com> + + * ipa-inline-analysis.c (find_foldable_builtin_expect): Find + the candidate of builtin_expect such that we should fix the + size/time estimation. + (estimate_function_body_sizes): Do the acutally size/time fix-up + for builtin_expect. + +2013-10-03 Rong Xu <xur@google.com> + + * predict.c (tree_predict_by_opcode): Get the probability + for builtin_expect from param builtin_expect_probability. + * params.def (BUILTIN_EXPECT_PROBABILITY): New parameter. + * predict.def (PRED_BUILTIN_EXPECT_RELAXED): Fix comments. + * doc/invoke.texi: Add documentation for builtin-expect-probability. + +2013-10-03 Marc Glisse <marc.glisse@inria.fr> + + PR c++/19476 + * common.opt (fcheck-new): Moved from c.opt. Make it 'Common'. + * calls.c (alloca_call_p): Use get_callee_fndecl. + * fold-const.c (tree_expr_nonzero_warnv_p): Handle operator new. + * tree-vrp.c (gimple_stmt_nonzero_warnv_p, stmt_interesting_for_vrp): + Likewise. + (vrp_visit_stmt): Remove duplicated code. + +2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000-builtin.def (XSRDPIM): Use floatdf2, + ceildf2, btruncdf2, instead of vsx_* name. + + * config/rs6000/vsx.md (vsx_add<mode>3): Change arithmetic + iterators to only do V2DF and V4SF here. Move the DF code to + rs6000.md where it is combined with SF mode. Replace <VSv> with + just 'v' since only vector operations are handled with these insns + after moving the DF support to rs6000.md. + (vsx_sub<mode>3): Likewise. + (vsx_mul<mode>3): Likewise. + (vsx_div<mode>3): Likewise. + (vsx_fre<mode>2): Likewise. + (vsx_neg<mode>2): Likewise. + (vsx_abs<mode>2): Likewise. + (vsx_nabs<mode>2): Likewise. + (vsx_smax<mode>3): Likewise. + (vsx_smin<mode>3): Likewise. + (vsx_sqrt<mode>2): Likewise. + (vsx_rsqrte<mode>2): Likewise. + (vsx_fms<mode>4): Likewise. + (vsx_nfma<mode>4): Likewise. + (vsx_copysign<mode>3): Likewise. + (vsx_btrunc<mode>2): Likewise. + (vsx_floor<mode>2): Likewise. + (vsx_ceil<mode>2): Likewise. + (vsx_smaxsf3): Delete scalar ops that were moved to rs6000.md. + (vsx_sminsf3): Likewise. + (vsx_fmadf4): Likewise. + (vsx_fmsdf4): Likewise. + (vsx_nfmadf4): Likewise. + (vsx_nfmsdf4): Likewise. + (vsx_cmpdf_internal1): Likewise. + + * config/rs6000/rs6000.h (TARGET_SF_SPE): Define macros to make it + simpler to select whether a target has SPE or traditional floating + point support in iterators. + (TARGET_DF_SPE): Likewise. + (TARGET_SF_FPR): Likewise. + (TARGET_DF_FPR): Likewise. + (TARGET_SF_INSN): Macros to say whether floating point support + exists for a given operation for expanders. + (TARGET_DF_INSN): Likewise. + + * config/rs6000/rs6000.c (Ftrad): New mode attributes to allow + combining of SF/DF mode operations, using both traditional and VSX + registers. + (Fvsx): Likewise. + (Ff): Likewise. + (Fv): Likewise. + (Fs): Likewise. + (Ffre): Likewise. + (FFRE): Likewise. + (abs<mode>2): Combine SF/DF modes using traditional floating point + instructions. Add support for using the upper DF registers with + VSX support, and SF registers with power8-vector support. Update + expanders for operations supported by both the SPE and traditional + floating point units. + (abs<mode>2_fpr): Likewise. + (nabs<mode>2): Likewise. + (nabs<mode>2_fpr): Likewise. + (neg<mode>2): Likewise. + (neg<mode>2_fpr): Likewise. + (add<mode>3): Likewise. + (add<mode>3_fpr): Likewise. + (sub<mode>3): Likewise. + (sub<mode>3_fpr): Likewise. + (mul<mode>3): Likewise. + (mul<mode>3_fpr): Likewise. + (div<mode>3): Likewise. + (div<mode>3_fpr): Likewise. + (sqrt<mode>3): Likewise. + (sqrt<mode>3_fpr): Likewise. + (fre<Fs>): Likewise. + (rsqrt<mode>2): Likewise. + (cmp<mode>_fpr): Likewise. + (smax<mode>3): Likewise. + (smin<mode>3): Likewise. + (smax<mode>3_vsx): Likewise. + (smin<mode>3_vsx): Likewise. + (negsf2): Delete SF operations that are merged with DF. + (abssf2): Likewise. + (addsf3): Likewise. + (subsf3): Likewise. + (mulsf3): Likewise. + (divsf3): Likewise. + (fres): Likewise. + (fmasf4_fpr): Likewise. + (fmssf4_fpr): Likewise. + (nfmasf4_fpr): Likewise. + (nfmssf4_fpr): Likewise. + (sqrtsf2): Likewise. + (rsqrtsf_internal1): Likewise. + (smaxsf3): Likewise. + (sminsf3): Likewise. + (cmpsf_internal1): Likewise. + (copysign<mode>3_fcpsgn): Add VSX/power8-vector support. + (negdf2): Delete DF operations that are merged with SF. + (absdf2): Likewise. + (nabsdf2): Likewise. + (adddf3): Likewise. + (subdf3): Likewise. + (muldf3): Likewise. + (divdf3): Likewise. + (fred): Likewise. + (rsqrtdf_internal1): Likewise. + (fmadf4_fpr): Likewise. + (fmsdf4_fpr): Likewise. + (nfmadf4_fpr): Likewise. + (nfmsdf4_fpr): Likewise. + (sqrtdf2): Likewise. + (smaxdf3): Likewise. + (smindf3): Likewise. + (cmpdf_internal1): Likewise. + (lrint<mode>di2): Use TARGET_<MODE>_FPR macro. + (btrunc<mode>2): Delete separate expander, and combine with the + insn and add VSX instruction support. Use TARGET_<MODE>_FPR. + (btrunc<mode>2_fpr): Likewise. + (ceil<mode>2): Likewise. + (ceil<mode>2_fpr): Likewise. + (floor<mode>2): Likewise. + (floor<mode>2_fpr): Likewise. + (fma<mode>4_fpr): Combine SF and DF fused multiply/add support. + Add support for using the upper registers with VSX and + power8-vector. Move insns to be closer to the define_expands. On + VSX systems, prefer the traditional form of FMA over the VSX + version, since the traditional form allows the target not to + overlap with the inputs. + (fms<mode>4_fpr): Likewise. + (nfma<mode>4_fpr): Likewise. + (nfms<mode>4_fpr): Likewise. + +2013-10-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + Richard Earnshaw <richard.earnshaw@arm.com> + + * config/arm/aarch-common-protos.h (struct alu_cost_table): New. + (struct mult_cost_table): Likewise. + (struct mem_cost_table): Likewise. + (struct fp_cost_table): Likewise. + (struct vector_cost_table): Likewise. + (cpu_cost_table): Likewise. + * config/arm/arm.opt (mold-rts-costs): New option. + (mnew-generic-costs): Likewise. + * config/arm/arm.c (generic_extra_costs): New table. + (cortexa15_extra_costs): Likewise. + (arm_slowmul_tune): Use NULL as new costs. + (arm_fastmul_tune): Likewise. + (arm_strongarm_tune): Likewise. + (arm_xscale_tune): Likewise. + (arm_9e_tune): Likewise. + (arm_v6t2_tune): Likewise. + (arm_cortex_a5_tune): Likewise. + (arm_cortex_a9_tune): Likewise. + (arm_v6m_tune): Likewise. + (arm_fa726te_tune): Likewise. + (arm_cortex_a15_tune): Use cortex15_extra_costs. + (arm_cortex_tune): Use generict_extra_costs. + (shifter_op_p): New function. + (arm_unspec_cost): Likewise. + (LIBCALL_COST): Define. + (arm_new_rtx_costs): New function. + (arm_rtx_costs): Use arm_new_rtx_costs when core-specific + table is available. Use old costs otherwise unless mnew-generic-costs + is specified. + * config/arm/arm-protos.h (tune_params): Add insn_extra_cost field. + (cpu_cost_table): Declare. + +2013-10-03 Marcus Shawcroft <marcus.shawcroft@arm.com> + + PR target/58460 + * config/aarch64/aarch64.md (*adds_mul_imm_<mode>) + (*subs_mul_imm_<mode>) + (*add_<shift>_<mode>, *add_<shift>_si_uxtw,*add_mul_imm_<mode>) + (*sub_<shift>_<mode>) + (*sub_<shift>_si_uxtw,*sub_mul_imm_<mode>, *sub_mul_imm_si_uxtw): + Remove k constraint. + +2013-10-03 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_secondary_reload): Remove legacy + code. + * config/aarch64/aarch64.md (reload_sp_immediate): Likewise. + +2013-10-02 Teresa Johnson <tejohnson@google.com> + + * predict.c (probably_never_executed): New function. + (probably_never_executed_bb_p): Invoke probably_never_executed. + (probably_never_executed_edge_p): Ditto. + * bb-reorder.c (find_rarely_executed_basic_blocks_and_crossing_edges): + Treat profile insanities conservatively. + +2013-10-02 John David Anglin <danglin@gcc.gnu.org> + + * config.gcc (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file. + +2013-10-02 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (process_alt_operand): Calculate scratch_p and + use it. Use smaller increase for scratch. Don't increase reject + for early clobber scratch. + * lra-eliminations.c (eliminate_regs_in_insn): Remove all insns + setting eliminated regs except setting fp from hfp. + (lra_eliminate): Check lra_insn_recog_data on NULL. + +2013-10-02 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/58587 + * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Turn off + setting -mvsx-timode by default until the underlying problem is fixed. + (RS6000_CPU, power7 defaults): Likewise. + +2013-10-02 Uros Bizjak <ubizjak@gmail.com> + + * config/x-linux (host-linux.o): Remove header dependencies. + Use $(COMPILE) and $(POSTCOMPILE). + * config/t-linux-android (linux-android.o): Ditto. + +2013-10-02 Uros Bizjak <ubizjak@gmail.com> + + * Makefile.in (expmed.o-warn): Remove. + +2013-10-02 Andrew MacLeod <amacleod@redhat.com> + + * graphite-scop-detection.c: Include tree-ssa-propagate,h. + * graphite-sese-to-poly.c: Include tree-ssa-propagate.h. + +2013-10-02 Teresa Johnson <tejohnson@google.com> + + * dojump.c (do_jump_1): Divide probability between + both conditions of a TRUTH_ANDIF_EXPR/TRUTH_ORIF_EXPR. + +2013-10-02 Tom Tromey <tromey@redhat.com> + + * Makefile.in (DRIVER_DEFINES): Use $(if), not $(and). + +2013-10-02 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Remove some prototypes. + * tree-ssa-dce.c (mark_virtual_operand_for_renaming, + mark_virtual_phi_result_for_renaming): Move to tree-into-ssa.c. + * tree-into-ssa.c (mark_virtual_operand_for_renaming, + mark_virtual_phi_result_for_renaming): Relocate here. + * tree-into-ssa.h: Add prototypes. + * tree-ssa-phiopt.c: (tree_ssa_phiopt_worker) Use + single_pred_before_succ_order. + (blocks_in_phiopt_order): Rename and move to cfganal.c. + (nonfreeing_call_p) Move to gimple.c. + * cfganal.c (single_pred_before_succ_order): Move and renamed from + tree-ssa-phiopt.c. + * basic-block.h (single_pred_before_succ_order): Add prototype. + * gimple.c (nonfreeing_call_p): Relocate here. + * gimple.h: Add prototype. + * tree-ssa-ifcombine.c: Include tree-ssa-phiopt.h. + * tree-ssa-dom.h: New file. Relocate prototypes here. + * tree-ssa.h: Include tree-ssa-dom.h. + +2013-10-02 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/x-i386 (driver-i386.o): Remove header dependencies. + Use $(COMPILE) and $(POSTCOMPILE). + + * config/alpha/x-alpha (driver-alpha.o): Ditto. + +2013-10-02 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Remove some prototypes. + * gimple-fold.h: Add prototypes from gimple.h and tree-flow.h. + * tree-ssa-propagate.h: Relocate prototypes from tree-flow.h. + * tree-ssa-copy.c (may_propagate*, propagate_value, replace_exp, + propagate_tree_value*): Move from here to... + * tree-ssa-propagate.c (may_propagate*, propagate_value, replace_exp, + propagate_tree_value*): Relocate here. + * tree-ssa-propagate.h: Relocate prototypes from tree-flow.h. + * gimple.h: Include gimple-fold.h, move prototypes into gimple-fold.h. + * gimple-fold.c: Remove gimple-fold.h from include list. + * tree-vrp.c: Remove gimple-fold.h from include list. + * tree-ssa-sccvn.c: Remove gimple-fold.h from include list. + * tree-ssa-ccp.c: Remove gimple-fold.h from include list. + * tree-scalar-evolution.c: Add tree-ssa-propagate.h to include list. + * tree-ssa-pre.c: Add tree-ssa-propagate.h to include list. + * sese.c: Add tree-ssa-propagate.h to include list. + +2013-10-02 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c: Include tree-vectorizer.h for + find_loop_location. + (enum partition_kind): Remove PKIND_REDUCTION. + (struct partition_s): Remove has_writes member, add reduction_p member. + (partition_alloc): Adjust. + (partition_builtin_p): Likewise. + (partition_has_writes): Remove. + (partition_reduction_p): New function. + (partition_merge_into): Likewise. + (generate_code_for_partition): Commonize builtin partition + handling tail. + (rdg_cannot_recompute_vertex_p): Remove. + (already_processed_vertex_p): Likewise. + (rdg_flag_vertex): Do not set has_writes. + (classify_partition): Adjust. + (rdg_build_partitions): Do not set has_writes, treat all + partitions as useful. + (distribute_loop): Record number of library calls generated. Adjust. + (tree_loop_distribution): Report number of loops and library + calls generated as opt-info. + +2013-10-02 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h: Include new .h files. Move prototypes. + * tree-cfgcleanup.h: New file. Add prototypes from tree-flow.h. + * tree-dfa.h: New File. Add prototypes from tree-flow.h. + (get_addr_base_and_unit_offset_1) Move from tree-flow-inline.h. + * tree-pretty-print.h: Add prototypes from tree-flow.h. + * tree-into-ssa.h: New File. Add prototypes from tree-flow.h. + ({debug|dump}*): Move debugging prototypes out of tree-into-ssa.c. + * tree-into-ssa.c ({debug|dump}*): Move prototypes to header file. + * tree.h (get_ref_base_and_extent): Move prototype out. + * tree-flow-inline.h (get_addr_base_and_unit_offset_1): Move to + tree-dfa.h. + * gimple-low.h: New File. Add prototypes from tree-flow.h. + * gimple-low.c (try_catch_may_fallthru, block_may_fallthru): Move to... + * tree.c (try_catch_may_fallthru, block_may_fallthru): Here. + * tree-scalar-evolution.c: Include tree.h. + * sese.c: Include tree.h. + * dumpfile.c: Move gimple-pretty-print.h include after tree.h. + * dwarf2out.c: Include tree-dfa.h. + * tree-chrec.c: Include tree.h. + * tree-data-ref.c: Include tree.h. + +2013-10-02 Yufeng Zhang <yufeng.zhang@arm.com> + + * gimple-ssa-strength-reduction.c (backtrace_base_for_ref): + Fix whitespace. + +2013-10-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/t-sol2 (sol2-c.o): Remove header dependencies. + Use $(COMPILE) and $(POSTCOMPILE). + (sol2-cxx.o): Likewise. + (sol2-stubs.o): Likewise. + (sol2.o): Likewise. + * config/x-solaris (host-solaris.o): Likewise. + + * config/sparc/t-sparc (sparc.o): Remove. + (sparc-c.o): Remove header dependencies. + Use $(COMPILE) and $(POSTCOMPILE). + * config/sparc/x-sparc: Likewise. + +2013-10-02 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc-opts.h: Add 2013 to Copyright years. + * config/arc/arc700.md: Likewise. + * config/arc/arc-modes.def: Likewise. + * config/arc/arc-simd.h: Likewise. + * config/arc/t-arc-uClibc: Likewise. + * config/arc/t-arc-newlib: Likewise. + +2013-10-02 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_prologue): Use + plus_constant. + (aarch64_expand_epilogue): Likewise. + +2013-10-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + Yufeng Zhang <yufeng.zhang@arm.com> + + * gimple-ssa-strength-reduction.c (legal_cast_p_1): Forward + declaration. + (backtrace_base_for_ref): Call get_unwidened with 'base_in' if + 'base_in' represent a conversion and legal_cast_p_1 holds; set + 'base_in' with the returned value from get_unwidened. + +2013-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_legitimize_reload_address): Explain why + plus_constant is not used. + +2013-10-01 Wei Mi <wmi@google.com> + + * config/i386/x86-tune.def (DEF_TUNE): Remove m_CORE_ALL. + * config/i386/i386.md: Add define_peephole2 to + break partial reg stall for cvtss2sd/cvtsd2ss. + +2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (pass_arc_ifcvt::clone): + Update for ctxt_ -> m_ctxt change. + +2013-10-01 Jeff Law <law@redhat.com> + + * tree-ssa-threadupdate.c (struct redirection_data): Delete + outgoing_edge and intermediate_edge fields. Instead store the path. + (redirection_data::hash): Hash on the last edge's destination index. + (redirection_data::equal): Check the entire thread path. + (lookup_redirectio_data): Corresponding changes. + (create_edge_and_update_destination_phis): Likewise. + (thread_single_edge): Likewise. + +2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com> + Diego Novillo <dnovillo@google.com> + + * config/arc/simdext.md (UNSPEC_ARC_SIMD_VLD32WH): Delete. + (UNSPEC_ARC_SIMD_VLD32WL): Likewise. + (vld32wh_insn, vld32wl_insn): Delete commented-out old + versions of these patterns. + + * doc/extend.texi (long_call/medium_call/short_call): Typo fix. + (__builtin_arc_aligned): Likewise. + + * config/arc/arc.md: Expand adc_0 comment stating the intended + purpose and why it isn't ready. + Replace commented out call_value_via_label_mixed with a + plain comment about bl_s. + + * config/arc/arc.c (stdio.h): Don't include directly. + (arc_expand_epilogue): Remove [0]: Remove fp_restored_p. + Remove if (1) condition. + (arc_encode_section_info): Fix comment. + +2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arc/arc.c (arc_conditional_register_usage): + Use ARC_FIRST_SIMD_VR_REG / ARC_LAST_SIMD_VR_REG. + Also set reg_alloc_order for DMA config regs. + +2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com> + Jeremy Bennett <jeremy.bennett@embecosm.com> + + * doc/install.texi (--with-cpu): Mention ARC. + (arc-*-elf32): New paragraph. + (arc-linux-uclibc): Likewise. + * doc/md.texi (Machine Constraints): Add ARC part. + * doc/invoke.texi: (menu): Add ARC Options. + (Machine Dependent Options) <ARC Options>: Add synopsis. + (node ARC Options): Add. + * doc/extend.texi (long_call / short_call attribute): Add ARC. + (ARC Built-in Functions): New section defining + generic ARC built-in functions. + (ARC SIMD Built-in Functions): New section defining SIMD specific + built-in functions. + (Declaring Attributes of Functions): Extended + description of short_call and long_call attributes for ARC and + added index entries. + +2013-10-01 Saurabh Verma <saurabh.verma@codito.com> + Ramana Radhakrishnan <ramana.radhakrishnan@codito.com> + Joern Rennecke <joern.rennecke@embecosm.com> + Muhammad Khurram Riaz <khurram.riaz@arc.com> + Brendan Kehoe <brendan@zen.org> + Michael Eager <eager@eagercon.com> + Simon Cook <simon.cook@embecosm.com> + Jeremy Bennett <jeremy.bennett@embecosm.com> + + * config/arc, common/config/arc: New directories. + +2013-10-01 Joern Rennecke <joern.rennecke@embecosm.com> + Brendan Kehoe <brendan@zen.org> + Simon Cook <simon.cook@embecosm.com> + + * config.gcc (arc*-*-elf*, arc*-*-linux-uclibc*): New configurations. + +2013-10-01 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa-live.h (coalesce_ssa_name): Move Prototype to... + * tree-ssa-coalesce.h: New. Move prototype to here. + * tree-outof-ssa.h: Include tree-ssa-coalesce.h. + * tree-ssa-coalesce.c: Include tree-outof-ssa.h. + (gimple_can_coalesce_p): Move to... + * gimple.c (gimple_can_coalesce_p): Here. + +2013-10-01 Andrew MacLeod <amacleod@redhat.com> + + * tree-into-ssa.c (enum need_phi_state): Relocate from tree-flow.h. + (dump_decl_set): Move to gimple.c. + * gimple.h: Don't include tree-ssa-operands.h. + (dump_decl_set): Add prototype. + (gimple_vuse_op, gimple_vdef_op, update_stmt, update_stmt_if_modified): + Move to gimple-ssa.h. + (phi_ssa_name_p, phi_nodes, phi_nodes_ptr, gimple_phi_arg_def, + gimple_phi_arg_def_ptr, gimple_phi_arg_edge, gimple_phi_arg_location, + gimple_phi_arg_location_from_edge, gimple_phi_arg_set_location, + gimple_phi_arg_has_location): Relocate from tree-flow-inline.h + * gimple.c (walk_stmt_load_store_ops): Use gimple_phi_arg_def rather + than PHI_ARG_DEF. + (dump_decl_set): Relocate here. + * gimple-ssa.h: New file. + (gimple_vuse_op, gimple_vdef_op, update_stmt, update_stmt_if_modified): + Relocate from gimple.h. + * tree-cfg.c (has_zero_uses_1, single_imm_use_1): Move to... + * tree-ssa-operands.c (swap_ssa_operands): Rename from + swap_tree_operands and remove non-ssa path. + (has_zero_uses_1, single_imm_use_1): Relocate from tree-cfg.c. + * tree-ssa-reassoc.c (linearize_expr_tree, repropagate_negates): Use + swap_ssa_operands. + * tree-vect-loop.c (destroy_loop_vec_info, vect_is_slp_reduction, + vect_is_simple_reduction_1): Use swap_ssa_operands. + * tree-flow.h: Move various prototypes to tree-phinodes.h. + (enum need_phi_state): Move to tree-into-ssa.c. + (struct immediate_use_iterator_d, FOR_EACH_IMM_*, + BREAK_FROM_IMM_USE_STMT): Move to ssa-iterators.h. + (swap_tree_operands): Rename and move prototype to tree-ssa-operands.h. + * tree-flow-inline.h (delink_imm_use, link_imm_use_to_list, + link_imm_use, set_ssa_use_from_ptr, link_imm_use_stmt, relink_imm_use, + relink_imm_use_stmt, end_readonly_imm_use_p, first_readonly_imm_use, + next_readonly_imm_use, has_zero_uses, has_single_use, single_imm_use, + num_imm_uses): Move to ssa-iterators.h. + (get_use_from_ptr, get_def_from_ptr): Move to tree-ssa-operands.h + (gimple_phi_arg_imm_use_ptr, phi_arg_index_from_use): Move to + tree-phinodes.h. + (op_iter_done, op_iter_next_def, op_iter_next_tree, + clear_and_done_ssa_iter, op_iter_init, op_iter_init_use, + op_iter_init_def, op_iter_init_tree, single_ssa_tree_operand, + single_ssa_use_operand, single_ssa_def_operand, zero_ssa_operands, + num_ssa_operands, delink_stmt_imm_use, single_phi_def, + op_iter_init_phiuse, op_iter_init_phidef, end_imm_use_stmt_p, + end_imm_use_stmt_traverse, move_use_after_head, link_use_stmts_after, + first_imm_use_stmt, next_imm_use_stmt, first_imm_use_on_stmt, + end_imm_use_on_stmt_p, next_imm_use_on_stmt): Move to ssa-iterators.h. + (gimple_phi_arg_def, gimple_phi_arg_def_ptr, gimple_phi_arg_edge, + gimple_phi_arg_location, gimple_phi_arg_location_from_edge, + gimple_phi_arg_set_location, gimple_phi_arg_has_location, phi_nodes, + phi_nodes_ptr, phi_ssa_name_p): Move to gimple.h. + (set_phi_nodes): Move to tree-phinodes.h. + * tree-ssa-operands.h (enum ssa_op_iter_type, + struct ssa_operand_iterator_d, SSA_OP*, FOR_EACH_SSA*, SINGLE_SSA*, + ZERO_SSA_OPERANDS, NUM_SSA_OPERANDS): Move to ssa-iterators.h. + (dump_decl_set): Remove prototype. + (get_use_from_ptr, get_def_from_ptr): Relocate from tree-flow.h. + * tree-phinodes.h: New file. Move some prototypes from tree-flow.h. + (set_phi_nodes): Relocate from tree-flow-inline.h. + (gimple_phi_arg_imm_use_ptr, phi_arg_index_from_use): Relocate from + tree-flow-inline.h + * tree-ssa.h: Add tree-phinodes.h, gimple-ssa.h, ssa-iterators.h to + include list. Temporarily add gimple.h to include list. + * ssa-iterators.h: New file. + (struct immediate_use_iterator_d, FOR_EACH_IMM_*, + BREAK_FROM_IMM_USE_STMT): Relocate from tree-flow.h. + (enum ssa_op_iter_type, struct ssa_operand_iterator_d, SSA_OP*, + FOR_EACH_SSA*, SINGLE_SSA*, ZERO_SSA_OPERANDS, NUM_SSA_OPERANDS): + Relocate from tree-ssa-operands.h. + (delink_imm_use, link_imm_use_to_list, link_imm_use, + set_ssa_use_from_ptr, link_imm_use_stmt, relink_imm_use, + relink_imm_use_stmt, end_readonly_imm_use_p, first_readonly_imm_use, + next_readonly_imm_use, has_zero_uses, has_single_use, single_imm_use, + num_imm_uses, get_use_from_ptr, get_def_from_ptr, + phi_arg_index_from_use, op_iter_done, op_iter_next_def, + op_iter_next_tree, clear_and_done_ssa_iter, op_iter_init, + op_iter_init_use, op_iter_init_def, op_iter_init_tree, + single_ssa_tree_operand, single_ssa_use_operand, single_ssa_def_operand, + zero_ssa_operands, num_ssa_operands, delink_stmt_imm_use, + single_phi_def, op_iter_init_phiuse, op_iter_init_phidef, + end_imm_use_stmt_p, end_imm_use_stmt_traverse, move_use_after_head, + link_use_stmts_after, first_imm_use_stmt, next_imm_use_stmt, + first_imm_use_on_stmt, end_imm_use_on_stmt_p, next_imm_use_on_stmt): + Relocate from tree-flow-inline.h. + * tree-outof-ssa.h: Change _SSAEXPAND_H macro to GCC_TREE_OUTOF_SSA_H. + +2013-10-01 Vidya Praveen <vidyapraveen@arm.com> + + * aarch64-simd.md + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l2<mode>_internal): Rename to ... + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>_hi_internal): ... this; + Insert '\t' to output template. + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>_lo_internal): New. + (aarch64_saddl2<mode>, aarch64_uaddl2<mode>): Modify to call + gen_aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>_hi_internal() instead. + (aarch64_ssubl2<mode>, aarch64_usubl2<mode>): Ditto. + +2013-10-01 Uros Bizjak <ubizjak@gmail.com> + + * doc/install.texi (Host/target specific installation notes for GCC): + Put @anchor before @heading. + * doc/gcc.texi (titlepage): Use @uref and http:// prefix for website. + Use @email for email addresses. + +2013-10-01 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_across_edge): Make path a pointer to + a vec. Only delete the path if we create one without successfully + registering a jump thread. + * tree-ssa-threadupdate.h (register_jump_thread): Pass in path vector + as a pointer. + * tree-ssa-threadupdate.c (threaded_edges): Remove. No longer used + (paths): New vector of jump threading paths. + (THREAD_TARGET, THREAD_TARGET2): Remove accessor macros. + (THREAD_PATH): New accessor macro for the entire thread path. + (lookup_redirection_data): Get intermediate and final outgoing edge + from the thread path. + (create_edge_and_update_destination_phis): Copy the threading path. + (ssa_fix_duplicate_block_edges): Get edges and block types from the + jump threading path. + (ssa_redirect_edges): Get edges and block types from the jump threading + path. Free the path vector. + (thread_block): Get edges from the jump threading path. Look at the + entire path to see if we thread to a loop exit. If we cancel a jump + thread request, then free the path vector. + (thread_single_edge): Get edges and block types from the jump threading + path. Free the path vector. + (thread_through_loop_header): Get edges and block types from the jump + threading path. Free the path vector. + (mark_threaded_blocks): Iterate over the vector of paths and store + the path on the appropriate edge. Get edges and block types from the + jump threading path. + (mark_threaded_blocks): Get edges and block types from the jump + threading path. Free the path vector. + (thread_through_all_blocks): Use the vector of paths rather than + a vector of 3-edge sets. + (register_jump_thread): Accept pointer to a path vector rather + than the path vector itself. Store the path vector for later use. + Simplify. + +2013-10-01 Jakub Jelinek <jakub@redhat.com> + Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/58574 + * config/s390/s390.c (s390_split_branches): Modify check for table + jump insns. + (s390_chunkify_start): Rearrange table jump insn check in order to + deal with compare and branch insns correctly. + +2013-10-01 Kugan Vivekanandarajah <kuganv@linaro.org> + + PR target/58578 + Revert + 2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + * config/arm/arm.md (arm_ashldi3_1bit): define_insn into + define_insn_and_split. + (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. + (shiftsi3_compare): New pattern. + (rrx): New pattern. + * config/arm/unspecs.md (UNSPEC_RRX): New. + +2013-10-01 Alan Modra <amodra@gmail.com> + + * stmt.c (expand_asm_operands): Revert part of 2013-09-24 special + casing inout operands. + +2013-10-01 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58553 + * tree-loop-distribution.c (struct partition_s): Add niter member. + (classify_partition): Populate niter member for the partition + and properly identify whether the relevant store happens before + or after the loop exit. + (generate_memset_builtin): Use niter member from the partition. + (generate_memcpy_builtin): Likewise. + +2013-09-30 Richard Sandiford <rdsandiford@googlemail.com> + + * vec.h (vec_prefix, vec): Prefix member names with "m_". + * vec.c (vec_prefix::calculate_allocation): Update accordingly. + +2013-09-30 Richard Sandiford <rdsandiford@googlemail.com> + + * basic-block.h (edge_list): Prefix member names with "m_". + * context.h (context): Likewise. + * domwalk.h (dom_walker): Likewise. + * gengtype-state.c (s_expr_writer, state_writer): Likewise. + * graphite-sese-to-poly.c (sese_dom_walker): Likewise. + * hash-table.h (hash_table): Likewise. + * machmode.h (bit_field_mode_iterator): Likewise. + * pass_manager.h (pass_list): Likewise. + * tree-into-ssa.c (mark_def_dom_walker): Likewise. + * tree-pass.h (pass_data): Likewise. + * tree-ssa-dom.c (dom_opt_dom_walker): Likewise. + * tree-ssa-phiopt.c (nontrapping_dom_walker): Likewise, + * tree-ssa-uncprop.c (uncprop_dom_walker): Likewise. + * asan.c (pass_data_asan): Update accordingly. + * cfganal.c (control_dependences::find_control_dependence): Likewise. + (control_dependences::control_dependences): Likewise. + (control_dependences::~control_dependences): Likewise. + (control_dependences::~control_dependences): Likewise. + (control_dependences::get_edges_dependent_on): Likewise. + * cgraphbuild.c (pass_data_rebuild_cgraph_edges::clone): Likewise. + (pass_data_remove_cgraph_callee_edges::clone): Likewise. + * context.c (gcc::context::context): Likewise. + * cprop.c (pass_rtl_cprop::clone): Likewise. + * domwalk.c (dom_walker::walk): Likewise. + * ipa-inline-analysis.c (pass_inline_parameters::clone): Likewise. + * ipa-pure-const.c (pass_local_pure_const::clone): Likewise. + * mode-switching.c (pass_mode_switching::clone): Likewise. + * passes.c (opt_pass::opt_pass): Likewise. + (pass_manager::pass_manager): Likewise. + * predict.c (pass_strip_predict_hints::clone): Likewise. + * recog.c (pass_data pass_data_peephole2::clone): Likewise. + (pass_split_all_insns::clone): Likewise. + * stor-layout.c (bit_field_mode_iterator::bit_field_mode_iterator): + Likewise. + (bit_field_mode_iterator::next_mode): Likewise. + (bit_field_mode_iterator::prefer_smaller_modes): Likewise. + * tree-cfg.c (pass_split_crit_edges::clone): Likewise. + * tree-cfgcleanup.c (pass_merge_phi::clone): Likewise. + * tree-complex.c (pass_lower_complex::clone): Likewise. + * tree-eh.c (pass_cleanup_eh::clone): Likewise. + * tree-object-size.c (pass_object_sizes::clone): Likewise. + * tree-optimize.c (pass_fixup_cfg::clone): Likewise. + * tree-ssa-ccp.c (pass_data_ccp::clone): Likewise. + (pass_fold_builtins::clone): Likewise. + * tree-ssa-copy.c (pass_data_copy_prop::clone): Likewise. + * tree-ssa-copyrename.c (pass_rename_ssa_copies::clone): Likewise. + * tree-ssa-dce.c (pass_dce::clone, pass_dce_loop::clone): Likewise. + (pass_cd_dce::clone): Likewise. + * tree-ssa-dom.c (pass_dominator::clone): Likewise. + (pass_phi_only_cprop::clone): Likewise. + * tree-ssa-dse.c (pass_dse::clone): Likewise. + * tree-ssa-forwprop.c (pass_forwprop::clone): Likewise. + * tree-ssa-loop.c (pass_lim::clone): Likewise. + * tree-ssa-phiopt.c (pass_phiopt::clone): Likewise. + * tree-ssa-pre.c (pass_fre::clone): Likewise. + * tree-ssa-reassoc.c (pass_reassoc::clone): Likewise. + * tree-ssa-uninit.c (pass_late_warn_uninitialized::clone): Likewise. + * tree-tailcall.c (pass_tail_recursion::clone): Likewise. + * tree-vect-generic.c (pass_lower_vector_ssa::clone): Likewise. + * tree-vrp.c (pass_vrp::clone): Likewise. + * tsan.c (pass_tsan::clone): Likewise. + +2013-09-30 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58564 + * fold-const.c (tree_unary_nonnegative_warnv_p): Use + INTEGRAL_TYPE_P (t) instead of TREE_CODE (t) == INTEGER_TYPE. + + PR middle-end/58564 + * fold-const.c (fold_ternary_loc): For A < 0 : <sign bit of A> : 0 + optimization, punt if sign_bit_p looked through any zero extension. + +2013-09-30 Teresa Johnson <tejohnson@google.com> + + * tree-ssa-threadupdate.c (ssa_fix_duplicate_block_edges): + Update redirected out edge count in joiner case. + (ssa_redirect_edges): Common the joiner and non-joiner cases + so that joiner case gets profile updates. + +2013-09-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58554 + * tree-loop-distribution.c (classify_partition): Require + unconditionally executed stores for memcpy and memset recognition. + (tree_loop_distribution): Calculate dominance info. + +2013-09-30 Venkataramanan Kumar <venkataramanan.kumar@linaro.org> + + * config/aarch64/aarch64.h (MCOUNT_NAME): Define. + (NO_PROFILE_COUNTERS): Likewise. + (PROFILE_HOOK): Likewise. + (FUNCTION_PROFILER): Likewise. + * config/aarch64/aarch64.c (aarch64_function_profiler): Remove. + +2013-09-30 Iain Sandoe <iain@codesourcery.com> + + * config/rs6000/darwin.md (load_macho_picbase_si): Wrap machopic + calls and defines in TARGET_MACHO conditional. + (load_macho_picbase_di): Likewise. + (reload_macho_picbase): Likewise. + (reload_macho_picbase_si): Likewise. + (reload_macho_picbase_di): Likewise. + (nonlocal_goto_receiver): Likewise. + +2013-09-30 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.c (msp430x_names): New array. Lists MCUs + that use the MSP430X ISA. + (msp430_option_override): Scan -mmcu command line option for any + MCU name that supports the MSP430X ISA. + * config/msp430/t-msp430 (MULTILIB_MATCHES): Add matches for known + -mmcu options which enable the MSP430X ISA. + +2013-09-30 Richard Biener <rguenther@suse.de> + + PR middle-end/58532 + * tree-cfg.c (make_abnormal_goto_edges): Skip debug statements + before looking for setjmp-like calls. + +2013-09-29 Iain Sandoe <iain@codesourcery.com> + + PR target/10901 + * config/darwin-protos.h (machopic_get_function_picbase): New. + * config/darwin.c (machopic_get_function_picbase): New. + * config/rs6000/darwin.md (load_macho_picbase_si): Update picbase + label for a new func. (load_macho_picbase_di): Likewise. + (reload_macho_picbase): New expand. + (reload_macho_picbase_si): New insn. + (reload_macho_picbase_di): New insn. + (nonlocal_goto_receiver): New define and split. + * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_RELD_MPIC. + (unspecv enum): Add UNSPECV_NLGR. + +2013-09-29 Iain Sandoe <iain@codesourcery.com> + + * config/rs6000/rs6000.c (rs6000_init_dwarf_reg_sizes_extra): Ensure + that altivec registers are correctly sized on Darwin. + +2013-09-29 Iain Sandoe <iain@codesourcery.com> + + * config/t-darwin (darwin.o, darwin-c.o, darwin-f.o, + darwin-driver.o): Use COMPILE and POSTCOMPILE. + * config/x-darwin (host-darwin.o): Likewise. + * config/i386/x-darwin (host-i386-darwin.o): Likewise. + * config/rs6000/x-darwin (host-ppc-darwin.o): Likewise. + * config/rs6000/x-darwin64 (host-ppc64-darwin.o): Likewise. + +2013-09-29 Uros Bizjak <ubizjak@gmail.com> + + * doc/invoke.texi: Fix usage of @tie{} command. + +2013-09-29 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sync.md: Add peephole for consecutive memory barriers. + +2013-09-28 Jan Hubicka <jh@suse.cz> + + * config/i386/x86-tune.def: Add documentation for each of the options; + add whitespace. + +2013-09-28 Jan Hubicka <jh@suse.cz> + + * x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Enable for + generic. + (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Likewise. + (X86_TUNE_FOUR_JUMP_LIMIT): Drop for generic and buldozer. + (X86_TUNE_PAD_RETURNS): Drop for buldozer chips. + (X86_TUNE_AVOID_VECTOR_DECODE): Drop for generic. + (X86_TUNE_REASSOC_FP_TO_PARALLEL): Enable for generic. + +2013-09-28 Richard Sandiford <rdsandiford@googlemail.com> + + * alloc-pool.c, asan.c, auto-inc-dec.c, basic-block.h, bb-reorder.c, + bitmap.c, bitmap.h, bt-load.c, builtins.c, calls.c, cfgcleanup.c, + cfgexpand.c, cfghooks.c, cfgloop.c, cfgloopmanip.c, cfgrtl.c, cgraph.c, + cgraph.h, cgraphbuild.c, cgraphclones.c, cgraphunit.c, collect2.c, + combine-stack-adj.c, combine.c, compare-elim.c, context.c, context.h, + cprop.c, cse.c, cselib.c, dbxout.c, dce.c, defaults.h, df-core.c, + df-problems.c, df-scan.c, df.h, diagnostic.c, double-int.c, dse.c, + dumpfile.c, dwarf2asm.c, dwarf2cfi.c, dwarf2out.c, emit-rtl.c, + errors.c, except.c, expmed.c, expr.c, file-find.c, final.c, + fixed-value.c, fold-const.c, function.c, fwprop.c, gcc-ar.c, gcc.c, + gcov-io.c, gcov-io.h, gcov.c, gcse.c, genattr-common.c, genattr.c, + genattrtab.c, genautomata.c, genconfig.c, genemit.c, genextract.c, + genflags.c, gengenrtl.c, gengtype-state.c, gengtype.c, genmodes.c, + genopinit.c, genoutput.c, genpeep.c, genpreds.c, genrecog.c, + gensupport.c, ggc-common.c, ggc-page.c, gimple-fold.c, gimple-low.c, + gimple-pretty-print.c, gimple-ssa-strength-reduction.c, gimple.c, + gimple.h, godump.c, graphite-clast-to-gimple.c, + graphite-optimize-isl.c, graphite-poly.h, graphite-sese-to-poly.c, + graphite.c, haifa-sched.c, hash-table.c, hash-table.h, hwint.c, + hwint.h, ifcvt.c, incpath.c, init-regs.c, input.h, intl.c, intl.h, + ipa-cp.c, ipa-devirt.c, ipa-inline-analysis.c, ipa-inline.c, + ipa-profile.c, ipa-pure-const.c, ipa-reference.c, ipa-split.c, + ipa-utils.c, ipa.c, ira-build.c, ira.c, jump.c, loop-doloop.c, + loop-init.c, loop-invariant.c, loop-iv.c, lower-subreg.c, lto-cgraph.c, + lto-streamer-in.c, lto-streamer-out.c, lto-wrapper.c, mcf.c, + mode-switching.c, modulo-sched.c, omp-low.c, optabs.c, opts.c, + pass_manager.h, passes.c, plugin.c, postreload-gcse.c, postreload.c, + predict.c, prefix.c, pretty-print.c, print-rtl.c, print-tree.c, + profile.c, read-md.c, real.c, real.h, recog.c, ree.c, reg-stack.c, + regcprop.c, reginfo.c, regmove.c, regrename.c, regs.h, regstat.c, + reload1.c, reorg.c, rtl.c, rtl.h, rtlanal.c, sbitmap.c, sched-rgn.c, + sdbout.c, sel-sched-ir.c, sel-sched.c, sparseset.c, stack-ptr-mod.c, + statistics.c, stmt.c, stor-layout.c, store-motion.c, streamer-hooks.h, + system.h, target-hooks-macros.h, targhooks.c, targhooks.h, toplev.c, + tracer.c, trans-mem.c, tree-browser.c, tree-call-cdce.c, tree-cfg.c, + tree-cfgcleanup.c, tree-complex.c, tree-data-ref.c, tree-data-ref.h, + tree-eh.c, tree-emutls.c, tree-flow.h, tree-if-conv.c, tree-into-ssa.c, + tree-iterator.c, tree-loop-distribution.c, tree-mudflap.c, + tree-nested.c, tree-nomudflap.c, tree-nrv.c, tree-object-size.c, + tree-optimize.c, tree-pass.h, tree-pretty-print.c, tree-profile.c, + tree-scalar-evolution.c, tree-sra.c, tree-ssa-ccp.c, + tree-ssa-coalesce.c, tree-ssa-copy.c, tree-ssa-copyrename.c, + tree-ssa-dce.c, tree-ssa-dom.c, tree-ssa-dse.c, tree-ssa-forwprop.c, + tree-ssa-ifcombine.c, tree-ssa-live.c, tree-ssa-loop-ch.c, + tree-ssa-loop-im.c, tree-ssa-loop-ivopts.c, tree-ssa-loop-prefetch.c, + tree-ssa-loop.c, tree-ssa-math-opts.c, tree-ssa-operands.c, + tree-ssa-phiopt.c, tree-ssa-phiprop.c, tree-ssa-pre.c, + tree-ssa-reassoc.c, tree-ssa-sink.c, tree-ssa-strlen.c, + tree-ssa-structalias.c, tree-ssa-threadedge.c, tree-ssa-threadupdate.c, + tree-ssa-uncprop.c, tree-ssa-uninit.c, tree-ssa.c, tree-ssanames.c, + tree-stdarg.c, tree-switch-conversion.c, tree-tailcall.c, + tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop-manip.c, + tree-vect-stmts.c, tree-vectorizer.c, tree-vectorizer.h, tree-vrp.c, + tree.c, tree.h, tsan.c, tsystem.h, value-prof.c, var-tracking.c, + varasm.c, vec.h, vmsdbgout.c, vtable-verify.c, web.c: Add missing + whitespace before "(". + +2013-09-28 Sandra Loosemore <sandra@codesourcery.com> + + * expr.h (extract_bit_field): Remove packedp parameter. + * expmed.c (extract_fixed_bit_field): Remove packedp parameter + from forward declaration. + (store_split_bit_field): Remove packedp arg from calls to + extract_fixed_bit_field. + (extract_bit_field_1): Remove packedp parameter and packedp + argument from recursive calls and calls to extract_fixed_bit_field. + (extract_bit_field): Remove packedp parameter and corresponding + arg to extract_bit_field_1. + (extract_fixed_bit_field): Remove packedp parameter. Remove code + to issue warnings. + (extract_split_bit_field): Remove packedp arg from call to + extract_fixed_bit_field. + * expr.c (emit_group_load_1): Adjust calls to extract_bit_field. + (copy_blkmode_from_reg): Likewise. + (copy_blkmode_to_reg): Likewise. + (read_complex_part): Likewise. + (store_field): Likewise. + (expand_expr_real_1): Likewise. + * calls.c (store_unaligned_arguments_into_pseudos): Adjust call + to extract_bit_field. + * config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust + call to extract_bit_field. + * config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust + call to extract_bit_field. + * doc/invoke.texi (Code Gen Options): Remove mention of warnings + and special packedp behavior from -fstrict-volatile-bitfields + documentation. + +2013-09-27 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * lra-eliminations.c (init_elim_table): Guard value_p. + +2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow + DFmode, DImode, and SFmode in the upper VSX registers based on the + -mupper-regs-{df,sf} flags. Fix wu constraint to be ALTIVEC_REGS + if -mpower8-vector. Combine -mvsx-timode handling with the rest + of the VSX register handling. + + * config/rs6000/rs6000.md (f32_lv): Use %x0 for VSX regsters. + (f32_sv): Likewise. + (zero_extendsidi2_lfiwzx): Add support for loading into the + Altivec registers with -mpower8-vector. Use wu/wv constraints to + only do VSX memory options on Altivec registers. + (extendsidi2_lfiwax): Likewise. + (extendsfdf2_fpr): Likewise. + (mov<mode>_hardfloat, SF/SD modes): Likewise. + (mov<mode>_hardfloat32, DF/DD modes): Likewise. + (mov<mode>_hardfloat64, DF/DD modes): Likewise. + (movdi_internal64): Likewise. + +2013-09-27 Xinliang David Li <davidxl@google.com> + + * opts.c (finish_options): Adjust parameters + according to vect cost model. + (common_handle_option): Set dynamic vect cost + model for FDO. + targhooks.c (default_add_stmt_cost): Compute stmt cost + unconditionally. + * tree-vect-loop.c (vect_estimate_min_profitable_iters): + Use helper function. + * tree-vectorizer.h (unlimited_cost_model): New function. + * tree-vect-slp.c (vect_slp_analyze_bb_1): Use helper function. + * tree-vect-data-refs.c (vect_peeling_hash_insert): Use helper + function. + (vect_enhance_data_refs_alignment): Ditto. + * flag-types.h: New enum. + * common/config/i386/i386-common.c (ix86_option_init_struct): + No need to initialize vect_cost_model flag. + * config/i386/i386.c (ix86_add_stmt_cost): Compute stmt cost + unconditionally. + +2013-09-27 Diego Novillo <dnovillo@google.com> + + * gimple.h (enum ssa_mode): Remove. + +2013-09-27 Paulo Matos <pmatos@broadcom.com> + + * cfgloop.h (number_of_loops): Fix typo in check for null. + +2013-09-27 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58551 + * tree-cfg.c (move_sese_region_to_fn): Also move loops that + are children of outermost saved_cfun's loop, and set it up to + be moved to dest_cfun's outermost loop. Fix up num_nodes adjustments + if loop != loop0 and SESE region contains bbs that belong to loop0. + +2013-09-27 Richard Sandiford <rdsandiford@googlemail.com> + + * rtlanal.c (must_be_base_p, must_be_index_p): Delete. + (binary_scale_code_p, get_base_term, get_index_term): New functions. + (set_address_segment, set_address_base, set_address_index) + (set_address_disp): Accept the argument unconditionally. + (baseness): Remove must_be_base_p and must_be_index_p checks. + (decompose_normal_address): Classify as much as possible in the + main loop. + +2013-09-27 Richard Sandiford <rdsandiford@googlemail.com> + + * cse.c (count_reg_usage): Handle INT_LIST. + * lra-eliminations.c (lra_eliminate_regs_1): Likewise. + * reginfo.c (reg_scan_mark_refs): Likewise. + * reload1.c (eliminate_regs_1): Likewise. + +2013-09-27 Iain Sandoe <iain@codesourcery.com> + + PR middle-end/58547 + * rtlanal.c (lsb_bitfield_op_p): Make both parts of the comparison + signed. + +2013-09-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58459 + * tree-ssa-forwprop.c (forward_propagate_addr_expr): Remove + restriction not propagating into loops. + +2013-09-26 Florian Weimer <fw@deneb.enyo.de> + + * tree-ssa.h (walk_use_def_chains_fn, walk_use_def_chains): Delete. + * tree-ssa.c (walk_use_def_chains_1, walk_use_def_chains): Delete. + * doc/tree-ssa.texi (Walking use-def chains): Delete. + +2013-09-26 Richard Biener <rguenther@suse.de> + + * tree-into-ssa.c (rewrite_into_ssa): Make more SSA names to anonymous. + +2013-09-26 Richard Biener <rguenther@suse.de> + + * alias.h (component_uses_parent_alias_set): Rename to ... + (component_uses_parent_alias_set_from): ... this. + * alias.c (component_uses_parent_alias_set): Rename to ... + (component_uses_parent_alias_set_from): ... this and return + the desired parent. + (reference_alias_ptr_type_1): Use the result from + component_uses_parent_alias_set_from instead of stripping + components one at a time. + * emit-rtl.c (set_mem_attributes_minus_bitpos): Adjust. + +2013-09-26 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa-live.h (find_replaceable_exprs, dump_replaceable_exprs): + Move prototypes to... + * tree-ssa-ter.h: New File. Move prototypes here. + * tree-flow.h (stmt_is_replaceable_p): Remove prototype. + * tree-outof-ssa.h: New. Rename ssaexpand.h, include tree-ssa-ter.h. + * tree-outof-ssa.c (ssa_is_replaceable_p): New. Refactor common bits + from is_replaceable_p. + * tree-ssa-ter.c (is_replaceable_p, stmt_is_replaceable_p): Delete. + (ter_is_replaceable_p): New. Use new refactored ssa_is_replaceable_p. + (process_replaceable): Use ter_is_replaceable_p. + (find_replaceable_in_bb): Use ter_is_replaceable_p. + * expr.c (stmt_is_replaceable_p): Relocate from tree-ssa-ter.c. Use + newly refactored ssa_is_replaceable_p. + * cfgexpand.c: Include tree-outof-ssa.h. + * ssaexpand.h: Delete. + +2013-09-26 Andrew MacLeod <amacleod@redhat.com> + + * gimple.c (gimple_replace_lhs): Move to tree-ssa.c and rename. + (struct count_ptr_d, count_ptr_derefs, count_uses_and_derefs): Move to + tree-ssa.c + (create_gimple_tmp): Delete. + (get_expr_type, build_assign, build_type_cast): Move to... + * gimple-builder.c: New File. + (get_expr_type): Relocate from gimple.c. + (build_assign, build_type_cast): Change to only create ssanames. + * gimple.h: Move prototypes to... + * gimple-builder.h: New File. Here. + * tree-ssa.h: And here. + * tree-ssa.c (struct count_ptr_d, count_ptr_derefs, + count_uses_and_derefs): Relocate from gimple.c. + (gimple_replace_ssa_lhs): Renamed gimple_replace_ssa from gimple.c + * tree-ssa-reassoc.c (repropagate_negates): Use gimple_replace_ssa_lhs. + * tree-ssa-math-opts (execute_cse_reciprocals): Use + gimple_replace_ssa_lhs. + * asan.c: Include gimple-builder.h. + * Makefile.in: Add gimple-builder.o. + +2013-09-26 Richard Biener <rguenther@suse.de> + + * tree-ssa-live.c (var_map_base_init): Handle SSA names with + DECL_IGNORED_P base VAR_DECLs like anonymous SSA names. + (loe_visit_block): Use gcc_checking_assert. + * tree-ssa-coalesce.c (create_outofssa_var_map): Use + gimple_assign_ssa_name_copy_p. + (gimple_can_coalesce_p): Adjust according to the var_map_base_init + change. + +2013-09-26 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/t-rs6000 (rs6000.o): Remove. + (rs6000-c.o): Use COMPILE and POSTCOMPILE. + +2013-09-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58539 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Honor + the fact that debug statements are not taking part in loop-closed + SSA construction. + +2013-09-26 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.c (msp430_expand_epilogue): Fix compile + time warning message. + (msp430_print_operand_raw): Delete unused letter parameter. + (TARGET_PRINT_OPERAND_ADDRESS): Define. + (msp430_print_operand_address): New function. + (msp430_print_operand): Move address printing code from here to + new function. + * config/msp430/msp430.md (movsipsi2): Add comment in generated + assembler. + (zero_extendpsisi2): Likewise. + (extendpsisi2): New pattern. + (andneghi3): New pattern. + +2013-09-26 Yvan Roux <yvan.roux@linaro.org> + + * config/aarch64/aarch64.opt (mlra): New option. + * config/aarch64/aarch64.c (aarch64_lra_p): New function. + (TARGET_LRA_P): Define. + +2013-09-26 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_assignment): Remove obsolete comment. + +2013-09-25 Jeff Law <law@redhat.com> + + * tree-flow.h (thread_through_all_blocks): Prototype moved into + tree-ssa-threadupdate.h. + (register_jump_thread): Similarly. + * tree-ssa-threadupdate.h: New header file. + * tree-ssa-dom.c: Include tree-ssa-threadupdate.h. + * tree-vrp.c: Likewise. + * tree-ssa-threadedge.c: Include tree-ssa-threadupdate.h. + (thread_around_empty_blocks): Change type of path vector argument to + an edge,type pair from just an edge. Initialize both elements when + appending to a jump threading path. Tweak references to elements + appropriately. + (thread_across_edge): Similarly. Release memory for the elements + as needed. + * tree-ssa-threadupdate.c: Include tree-ssa-threadupdate.h. + (dump_jump_thread_path): New function broken out from + register_jump_thread. + (register_jump_thread): Use dump_jump_thread_path. Change type of + path vector entries. Search the path for NULL edges and dump + the path if one is found. Tweak the conversion of path to 3-edge + form to use the block copy type information embedded in the path. + +2013-09-25 Yvan Roux <yvan.roux@linaro.org> + + * lra.c (update_inc_notes): Remove all REG_DEAD and REG_UNUSED notes. + +2013-09-25 Yvan Roux <yvan.roux@linaro.org> + Vladimir Makarov <vmakarov@redhat.com> + + * rtlanal.c (lsb_bitfield_op_p): New predicate for bitfield operations + from the least significant bit. + (strip_address_mutations): Add bitfield operations handling. + (must_be_index_p): Add shifting and rotate operations handling. + (set_address_base): Use must_be_base_p predicate. + (set_address_index): Use must_be_index_p predicate. + +2013-09-25 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/i386.c (ix86_avx256_split_vector_move_misalign): + Use new names. + (ix86_expand_vector_move_misalign): Support new unaligned load and + stores and use new names. + (CODE_FOR_sse2_storedqu): Rename to ... + (CODE_FOR_sse2_storedquv16qi): ... this. + (CODE_FOR_sse2_loaddqu): Rename to ... + (CODE_FOR_sse2_loaddquv16qi): ... this. + (CODE_FOR_avx_loaddqu256): Rename to ... + (CODE_FOR_avx_loaddquv32qi): ... this. + (CODE_FOR_avx_storedqu256): Rename to ... + (CODE_FOR_avx_storedquv32qi): ... this. + * config/i386/i386.md (fpint_logic): New. + * config/i386/sse.md (VMOVE): Extend for AVX512. + (VF): Ditto. + (VF_128_256): New. + (VF_512): Ditto. + (VI_UNALIGNED_LOADSTORE): Ditto. + (sse2_avx_avx512f): Ditto. + (sse2_avx2): Extend for AVX512. + (sse4_1_avx2): Ditto. + (avx2_avx512f): New. + (sse): Extend for AVX512. + (sse2): Ditto. + (sse4_1): Ditto. + (avxsizesuffix): Ditto. + (sseintvecmode): Ditto. + (ssePSmode): Ditto. + (<sse>_loadu<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse>_storeu<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse2>_loaddqu<avxsizesuffix>): Extend for AVX512 and rename to ... + (<sse2_avx_avx512f>_loaddqu<mode>): ... this. + (<sse2>_storedqu<avxsizesuffix>): Extend for AVX512 and rename to ... + (<sse2_avx_avx512f>_storedqu<mode): ... this. + (<sse>_movnt<mode>): Replace constraint "x" with "v". + (STORENT_MODE): Extend for AVX512. + (*absneg<mode>2): Replace constraint "x" with "v". + (*mul<mode>3): Ditto. + (*ieee_smin<mode>3): Ditto. + (*ieee_smax<mode>3): Ditto. + (avx_cmp<mode>3): Replace VF with VF_128_256. + (*<sse>_maskcmp<mode>3_comm): Ditto. + (<sse>_maskcmp<mode>3): Ditto. + (<sse>_andnot<mode>3): Extend for AVX512. + (<code><mode>3, anylogic): Replace VF with VF_128_256. + (<code><mode>3, fpint_logic): New. + (*<code><mode>3): Extend for AVX512. + (avx512flogicsuff): New. + (avx512f_<logic><mode>): Ditto. + (<sse>_movmsk<ssemodesuffix><avxsizesuffix>): Replace VF with + VF_128_256. + (<sse4_1>_blend<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Ditto. + (avx_vtest<ssemodesuffix><avxsizesuffix>): Ditto. + (<sse4_1>_round<ssemodesuffix><avxsizesuffix>): Ditto. + (xop_vpermil2<mode>3): Ditto. + (*avx_vpermilp<mode>): Extend for AVX512 and rename to ... + (*<sse2_avx_avx512f>_vpermilp<mode>): ... this. + (avx_vpermilvar<mode>3): Extend for AVX512 and rename to ... + (<sse2_avx_avx512f>_vpermilvar<mode>3): ... this. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (PARTITION_H, LTO_SYMTAB_H, COMMON_TARGET_DEF_H) + (RTL_ERROR_H, TRANS_MEM_H, COVERAGE_H, DEMANGLE_H, ALIAS_H) + (SCHED_INT_H, SEL_SCHED_IR_H, SEL_SCHED_DUMP_H, VALTRACK_H, DDG_H) + (GGC_INTERNAL_H, DECNUM_H, BACKTRACE_H, MKDEPS_H, TREE_HASHER_H) + (TREE_SSA_LIVE_H, SSAEXPAND_H, DWARF2OUT_H, SCEV_H, OMEGA_H) + (TREE_DATA_REF_H, IRA_INT_H, LRA_INT_H, DBGCNT_H, DATA_STREAMER_H) + (GIMPLE_STREAMER_H, TREE_STREAMER_H, STREAMER_HOOKS_H) + (TREE_VECTORIZER_H, IPA_INLINE_H, GSTAB_H, LIBFUNCS_H) + (GRAPHITE_HTAB_H): Remove. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * config/mcore/t-mcore (CROSS_FLOAT_H): Remove. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * config/t-glibc (glibc-c.o): Use COMPILE and POSTCOMPILE. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * config/i386/t-i386 (i386.o): Remove. + (i386-c.o): Use COMPILE and POSTCOMPILE. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in ($(out_object_file)): Use COMPILE and POSTCOMPILE. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (graph.o, sbitmap.o, sparseset.o, gcc-ar.o) + (gcc-ranlib.o, gcc-nm.o, collect2.o, collect2-aix.o, tlink.o) + (lto-wrapper.o, default-c.o, attribs.o, incpath.o, prefix.o) + (gcc.o, options.o, options-save.o, version.o, gtype-desc.o) + (trans-mem.o, ggc-common.o, ggc-page.o, ggc-none.o, stringpool.o) + (convert.o, double-int.o, lto-compress.o, data-streamer-in.o) + (data-streamer-out.o, data-streamer.o, gimple-streamer-in.o) + (gimple-streamer-out.o, tree-streamer.o, tree-streamer-in.o) + (tree-streamer-out.o, streamer-hooks.o, lto-cgraph.o) + (lto-streamer-in.o, lto-streamer-out.o, lto-section-in.o) + (lto-section-out.o, lto-opts.o, lto-streamer.o, langhooks.o) + (test-dump.o, tree.o, tree-dump.o, tree-inline.o, print-tree.o) + (stor-layout.o, asan.o, tsan.o, ubsan.o, tree-ssa-tail-merge.o) + (tree-ssa-structalias.o, tree-ssa-uninit.o, tree-ssa.o) + (tree-into-ssa.o, tree-ssa-ter.o, tree-ssa-coalesce.o) + (tree-outof-ssa.o, tree-ssa-dse.o, tree-ssa-forwprop.o) + (tree-ssa-phiprop.o, tree-ssa-ifcombine.o, tree-ssa-phiopt.o) + (tree-nrv.o, tree-ssa-copy.o, tree-ssa-propagate.o) + (tree-ssa-dom.o, tree-ssa-uncprop.o, tree-ssa-threadedge.o) + (tree-ssa-threadupdate.o, tree-ssanames.o, tree-phinodes.o) + (domwalk.o, tree-ssa-live.o, tree-ssa-copyrename.o) + (tree-ssa-pre.o, tree-ssa-sccvn.o) + (gimple-ssa-strength-reduction.o, tree-vrp.o, tree-cfg.o) + (tree-cfgcleanup.o, tree-tailcall.o, tree-ssa-sink.o) + (tree-nested.o, tree-if-conv.o, tree-iterator.o, tree-dfa.o) + (tree-ssa-operands.o, tree-eh.o, tree-ssa-loop.o) + (tree-ssa-loop-unswitch.o, tree-ssa-address.o) + (tree-ssa-loop-niter.o, tree-ssa-loop-ivcanon.o) + (tree-ssa-loop-ch.o, tree-ssa-loop-prefetch.o, tree-predcom.o) + (tree-ssa-loop-ivopts.o, tree-affine.o, tree-ssa-loop-manip.o) + (tree-ssa-loop-im.o, tree-ssa-math-opts.o, tree-ssa-alias.o) + (tree-ssa-reassoc.o, tree-optimize.o, gimplify.o) + (gimple-iterator.o, gimple-fold.o, gimple-low.o, omp-low.o) + (tree-browser.o, omega.o, tree-chrec.o, tree-scalar-evolution.o) + (tree-data-ref.o, sese.o, graphite.o, graphite-blocking.o) + (graphite-clast-to-gimple.o, graphite-dependences.o) + (graphite-interchange.o, graphite-poly.o) + (graphite-scop-detection.o, graphite-sese-to-poly.o) + (graphite-optimize-isl.o, tree-vect-loop.o) + (tree-vect-loop-manip.o, tree-vect-patterns.o, tree-vect-slp.o) + (tree-vect-stmts.o, tree-vect-data-refs.o, tree-vectorizer.o) + (vtable-verify.o, tree-loop-distribution.o, tree-parloops.o) + (tree-stdarg.o, tree-object-size.o, internal-fn.o, gimple.o) + (gimple-pretty-print.o, tree-mudflap.o, tree-nomudflap.o) + (tree-pretty-print.o, tree-diagnostic.o, fold-const.o) + (diagnostic.o, diagnostic-color.o, opts.o, opts-global.o) + (opts-common.o, targhooks.o, common/common-targhooks.o, input.o) + (toplev.o, hwint.o, passes.o, plugin.o, main.o, host-default.o) + (rtl-error.o, rtl.o, print-rtl.o, rtlanal.o, varasm.o, function.o) + (statistics.o, stmt.o, except.o, expr.o, dojump.o, builtins.o) + (calls.o, expmed.o, explow.o, optabs.o, dbxout.o, debug.o) + (sdbout.o, dwarf2out.o, dwarf2cfi.o, dwarf2asm.o, vmsdbgout.o) + (xcoffout.o, godump.o, emit-rtl.o, real.o, realmpfr.o, dfp.o) + (fixed-value.o, jump.o, simplify-rtx.o, symtab.o, cgraph.o) + (cgraphunit.o, cgraphclones.o, cgraphbuild.o, varpool.o, ipa.o) + (ipa-profile.o, ipa-devirt.o, ipa-prop.o, ipa-ref.o, ipa-cp.o) + (ipa-split.o, ipa-inline.o, ipa-inline-analysis.o) + (ipa-inline-transform.o, ipa-utils.o, ipa-reference.o) + (ipa-pure-const.o, coverage.o, cselib.o, cse.o, dce.o, dumpfile.o) + (dse.o, fwprop.o, web.o, ree.o, cprop.o, gcse.o, store-motion.o) + (resource.o, lcm.o, mode-switching.o, tree-ssa-dce.o) + (tree-call-cdce.o, tree-ssa-ccp.o, tree-ssa-strlen.o, tree-sra.o) + (tree-switch-conversion.o, tree-complex.o, tree-emutls.o) + (tree-vect-generic.o, df-core.o, df-problems.o, df-scan.o) + (regstat.o, valtrack.o, var-tracking.o, profile.o, mcf.o) + (tree-profile.o, value-prof.o, loop-doloop.o, alloc-pool.o) + (auto-inc-dec.o, cfg.o, cfghooks.o, cfgexpand.o, cfgrtl.o) + (cfganal.o, cfgbuild.o, cfgcleanup.o, cfgloop.o, cfgloopanal.o) + (graphds.o, loop-iv.o, loop-invariant.o, cfgloopmanip.o) + (loop-init.o, loop-unswitch.o, loop-unroll.o, dominance.o) + (et-forest.o, combine.o, reginfo.o, bitmap.o, vec.o, hash-table.o) + (reload.o, reload1.o, rtlhooks.o, postreload.o, postreload-gcse.o) + (caller-save.o, bt-load.o, reorg.o, alias.o, stack-ptr-mod.o) + (init-regs.o, ira-build.o, ira-costs.o, ira-conflicts.o) + (ira-color.o, ira-emit.o, ira-lives.o, ira.o, lra.o) + (lra-assigns.o, lra-coalesce.o, lra-constraints.o) + (lra-eliminations.o, lra-lives.o, lra-spills.o, regmove.o) + (combine-stack-adj.o, compare-elim.o, ddg.o, modulo-sched.o) + (haifa-sched.o, sched-deps.o, sched-rgn.o, sched-ebb.o) + (sched-vis.o, sel-sched.o, sel-sched-dump.o, sel-sched-ir.o) + (final.o, recog.o, reg-stack.o, sreal.o, predict.o, lists.o) + (bb-reorder.o, tracer.o, timevar.o, regcprop.o, regrename.o) + (ifcvt.o, params.o, pointer-set.o, hooks.o, pretty-print.o) + (errors.o, dbgcnt.o, lower-subreg.o, target-globals.o) + (hw-doloop.o, file-find.o, context.o, $(common_out_object_file)) + (insn-attrtab.o, insn-automata.o, insn-dfatab.o, insn-emit.o) + (insn-enums.o, insn-extract.o, insn-latencytab.o, insn-modes.o) + (insn-opinit.o, insn-output.o, insn-peep.o, insn-preds.o) + (insn-recog.o, intl.o, cppbuiltin.o, cppdefault.o, gcov.o) + (gcov-dump.o): Remove. + (default-c.o): Use COMPILE and POSTCOMPILE. + (CFLAGS-gcc.o): New variable. + ($(common_out_object_file)): Use COMPILE and POSTCOMPILE. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (c-family/cppspec.o, c-family/c-common.o) + (c-family/c-cppbuiltin.o, c-family/c-dump.o, c-family/c-format.o) + (c-family/c-gimplify.o, c-family/c-lex.o, c-family/c-omp.o) + (c-family/c-opts.o, c-family/c-pch.o, c-family/c-ppoutput.o) + (c-family/c-pragma.o, c-family/c-pretty-print.o) + (c-family/c-semantics.o, c-family/c-ada-spec.o) + (c-family/array-notation-common.o, c-family/stub-objc.o) + (c-family/c-ubsan.o): Remove. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (C_TREE_H): Reference c/c-tree.h. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (DRIVER_DEFINES): Use $(and), not shell code, + to add -DENABLE_SHARED_LIBGCC. + (gcc.o): Don't use subshell. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (OUTPUT_OPTION): Define as "-o $@". + * configure.ac: Don't invoke AM_PROG_CC_C_O. + (NO_MINUS_C_MINUS_O, OUTPUT_OPTION): Don't subst. + * configure, config.in: Rebuild. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (CCDEPMODE, DEPDIR, depcomp, COMPILE.base) + (COMPILE, POSTCOMPILE): New variables. + (.cc.o .c.o): Use COMPILE, POSTCOMPILE. + (DEPFILES): New variable. + Include ".Po" files. + * configure.ac: Add checks for dependency checking. + * configure, aclocal.m4: Regenerate. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (ALL_HOST_BACKEND_OBJS): Add lto-wrapper.o. + ($(ALL_HOST_OBJS)): Move order-only dependency to end of file. + +2013-09-25 Tom Tromey <tromey@redhat.com> + + * Makefile.in (generated_files): Add options.h, + target-hooks-def.h, insn-opinit.h, + common/common-target-hooks-def.h, pass-instances.def, + c-family/c-target-hooks-def.h. + +2013-09-25 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_across_edge): Use foo.last () rather + than foo[foo.length () - 1] to access last member in a vec. + * tree-ssa-threadupdate.c (register_jump_thread): Similarly. + +2013-09-25 Richard Biener <rguenther@suse.de> + + PR middle-end/58521 + * tree.c (iterative_hash_expr): Remove MEM_REF special handling. + +2013-09-25 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_resolve_speculation): Use semantical equivalency + test. + +2013-09-25 Marek Polacek <polacek@redhat.com> + + PR sanitizer/58420 + * ubsan.c (ubsan_type_descriptor): Handle IDENTIFIER_NODEs + when determining the type name. + +2013-09-24 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.md: Fix formatting. + +2013-09-24 Xinliang David Li <davidxl@google.com> + + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Check + max peel iterations parameter. + * param.def: New parameter. + * doc/invoke.texi: Document New parameter. + +2013-09-24 Christophe Lyon <christophe.lyon@linaro.org> + + * gimple-pretty-print.c: Various whitespace tweaks. + * tree-core.h: Likewise. + * tree-pretty-print.c: Likewise. + * tree-ssa-alias.c: Likewise. + * tree-ssa-copy.c: Likewise. + * tree-ssanames.c: Likewise. + * tree-ssanames.h: Likewise. + * tree-vrp.c: Likewise. + +2013-09-24 Alan Modra <amodra@gmail.com> + + PR middle-end/57134 + PR middle-end/57586 + * stmt.c (expand_asm_operands): Call expand_expr with EXPAND_MEMORY + for output operands that disallow regs. Don't use EXPAND_WRITE on + inout operands. + +2013-09-24 Richard Biener <rguenther@suse.de> + + PR middle-end/58513 + * tree.c (reference_alias_ptr_type): Move ... + * alias.c (reference_alias_ptr_type): ... here and implement + in terms of the new reference_alias_ptr_type_1. + (ref_all_alias_ptr_type_p): New helper. + (get_deref_alias_set_1): Drop flag_strict_aliasing here, + use ref_all_alias_ptr_type_p. + (get_deref_alias_set): Add flag_strict_aliasing check here. + (reference_alias_ptr_type_1): New function, split out from ... + (get_alias_set): ... here. + (alias_ptr_types_compatible_p): New function. + * alias.h (reference_alias_ptr_type): Declare. + (alias_ptr_types_compatible_p): Likewise. + * tree.h (reference_alias_ptr_type): Remove. + * fold-const.c (operand_equal_p): Use alias_ptr_types_compatible_p + to compare MEM_REF alias types. + +2013-09-24 Richard Biener <rguenther@suse.de> + + * tree-vrp.c (vrp_finalize): Check for SSA name presence. + +2013-09-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_vector_reload): Delete, combine + reload helper function arrays into a single array reg_addr. + (reload_fpr_gpr): Likewise. + (reload_gpr_vsx): Likewise. + (reload_vsx_gpr): Likewise. + (struct rs6000_reg_addr): Likewise. + (reg_addr): Likewise. + (rs6000_debug_reg_global): Change rs6000_vector_reload, + reload_fpr_gpr, reload_gpr_vsx, reload_vsx_gpr uses to reg_addr. + (rs6000_init_hard_regno_mode_ok): Likewise. + (rs6000_secondary_reload_direct_move): Likewise. + (rs6000_secondary_reload): Likewise. + + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add new + constraints: wu, ww, and wy. Repurpose wv constraint added during + power8 changes. Put wg constraint in alphabetical order. + + * config/rs6000/rs6000.opt (-mvsx-scalar-float): New debug switch + for future work to add ISA 2.07 VSX single precision support. + (-mvsx-scalar-double): Change default from -1 to 1, update + documentation comment. + (-mvsx-scalar-memory): Rename debug switch to -mupper-regs-df. + (-mupper-regs-df): New debug switch to control whether DF values + can go in the traditional Altivec registers. + (-mupper-regs-sf): New debug switch to control whether SF values + can go in the traditional Altivec registers. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print wu, ww, + and wy constraints. + (rs6000_init_hard_regno_mode_ok): Use ssize_t instead of int for + loop variables. Rename -mvsx-scalar-memory to -mupper-regs-df. + Add new constraints, wu/ww/wy. Repurpose wv constraint. + (rs6000_debug_legitimate_address_p): Print if we are running + before, during, or after reload. + (rs6000_secondary_reload): Add a comment. + (rs6000_opt_masks): Add -mupper-regs-df, -mupper-regs-sf. + + * config/rs6000/constraints.md (wa constraint): Sort w<x> + constraints. Update documentation string. + (wd constraint): Likewise. + (wf constraint): Likewise. + (wg constraint): Likewise. + (wn constraint): Likewise. + (ws constraint): Likewise. + (wt constraint): Likewise. + (wx constraint): Likewise. + (wz constraint): Likewise. + (wu constraint): New constraint for ISA 2.07 SFmode scalar + instructions. + (ww constraint): Likewise. + (wy constraint): Likewise. + (wv constraint): Repurpose ISA 2.07 constraint that we did not use + in the previous submissions. + * doc/md.texi (PowerPC and IBM RS6000): Likewise. + +2013-09-23 Richard Sandiford <rdsandiford@googlemail.com> + + * doc/rtl.texi (REG_NOTES): Say that int_list can also be used. + (REG_BR_PROB): Say that the probability is stored in an int_list. + * reg-notes.def: Update commentary to mention INT_LIST. + * rtl.def (EXPR_LIST, INSN_LIST): Capitalize comments. + (INT_LIST): New rtx. + * rtl.h (add_int_reg_note, add_shallow_copy_of_reg_note): Declare. + * rtlanal.c (int_reg_note_p): New function. + (alloc_reg_note): Assert that the note does not have an int argument. + (add_int_reg_note, add_shallow_copy_of_reg_note): New functions. + * combine.c (distribute_notes): Use add_shallow_copy_of_rtx. + * cse.c (cse_process_notes_1): Expect REG_EQUAL to be an EXPR_LIST + rather than an INSN_LIST. Handle INT_LIST. + * ifcvt.c (cond_exec_process_insns): Take the probability as an int + rather than an rtx. Use gen_rtx_INT_LIST to create a REG_BR_PROB note. + (cond_exec_process_if_block): Use XINT to extract REG_BR_PROB values. + Manipulate them as ints rather than rtxes. + * reg-stack.c (subst_asm_stack_regs): Only handle EXPR_LIST notes. + * regmove.c (copy_src_to_dest): Likewise. + * sched-vis.c (print_insn_with_notes): Handle INT_LIST. + + * config/i386/winnt.c (i386_pe_seh_unwind_emit): Sink pat assignment + into the cases that need it. + * config/arm/arm.c (arm_unwind_emit): Likewise. + + * asan.c (asan_clear_shadow): Use add_int_reg_note for REG_BR_PROB. + * emit-rtl.c (try_split, emit_copy_of_insn_after): Likewise. + * loop-doloop.c (add_test, doloop_modify): Likewise. + * loop-unswitch.c (compare_and_jump_seq): Likewise. + * optabs.c (emit_cmp_and_jump_insn_1): Likewise. + * predict.c (combine_predictions_for_insn): Likewise. + * print-rtl.c (print_rtx): Handle INT_LIST. + * config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): Likewise. + * config/alpha/alpha.c (emit_unlikely_jump): Likewise. + * config/arm/arm.c (emit_unlikely_jump): Likewise. + * config/i386/i386.c (ix86_expand_split_stack_prologue): Likewise. + (ix86_split_fp_branch, predict_jump): Likewise. + * config/rs6000/rs6000.c (emit_unlikely_jump): Likewise. + * config/sh/sh.c (expand_cbranchsi4): Likewise. + * config/spu/spu.c (ea_load_store_inline): Likewise. + + * cfgbuild.c (compute_outgoing_frequencies): Use XINT to access the + value of a REG_BR_PROB note. + * cfgrtl.c (force_nonfallthru_and_redirect): Likewise. + (update_br_prob_note, rtl_verify_edges, purge_dead_edges): Likewise. + * emit-rtl.c (try_split): Likewise. + * predict.c (br_prob_note_reliable_p): Likewise. + (invert_br_probabilities, combine_predictions_for_insn): Likewise. + * reorg.c (mostly_true_jump): Likewise. + * config/bfin/bfin.c (cbranch_predicted_taken_p): Likewise. + * config/frv/frv.c (frv_print_operand_jump_hint): Likewise. + * config/i386/i386.c (ix86_print_operand): Likewise. + * config/ia64/ia64.c (ia64_print_operand): Likewise. + * config/mmix/mmix.c (mmix_print_operand): Likewise. + * config/rs6000/rs6000.c (output_cbranch): Likewise. + * config/s390/s390.c (s390_expand_tbegin): Likewise. + * config/sh/sh.c (sh_print_operand, sh_adjust_cost): Likewise. + * config/sparc/sparc.c (output_cbranch): Likewise. + * config/spu/spu.c (get_branch_target): Likewise. + * config/tilegx/tilegx.c (cbranch_predicted_p): Likewise. + * config/tilepro/tilepro.c (cbranch_predicted_p): Likewise. + +2013-09-23 Jan Hubicka <jh@suse.cz> + + * ipa-cp.c (ipa_get_indirect_edge_target_1): Add sanity check + for ipa-devirt. + * ipa-utils.h (possible_polymorphic_call_target_p): New function. + * ipa-devirt.c (possible_polymorphic_call_target_p): Be tolerant + of external calls + * gimple-fold.c: Include ipa-utils.h and gimple-pretty-print.h + (gimple_fold_call): Dump inconsistent devirtualizations; add + sanity check for type based devirtualizations. + * ipa-prop.c: Include ipa-utils.h + (ipa_intraprocedural_devirtualization): Add sanity check. + (try_make_edge_direct_virtual_call): Likewise. + +2013-09-23 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Recurse on copy + assignment statements. + +2013-09-23 Kugan Vivekanandarajah <kuganv@linaro.org> + + * gimple-pretty-print.c (dump_ssaname_info): New function. + (dump_gimple_phi): Call it. + (pp_gimple_stmt_1): Likewise. + * tree-core.h (tree_ssa_name): New union ssa_name_info_type field. + (range_info_def): Declare. + * tree-pretty-print.c (pp_double_int): New function. + (dump_generic_node): Call it. + * tree-pretty-print.h (pp_double_int): Declare. + * tree-ssa-alias.c (dump_alias_info): Check pointer type. + * tree-ssanames.h (range_info_def): New structure. + (value_range_type): Move definition here. + (set_range_info, value_range_type, duplicate_ssa_name_range_info): + Declare. + * tree-ssanames.c (make_ssa_name_fn): Check pointer type at + initialization. + (set_range_info): New function. + (get_range_info): Likewise. + (duplicate_ssa_name_range_info): Likewise. + (duplicate_ssa_name_fn): Check pointer type and call + duplicate_ssa_name_range_info. + * tree-ssa-copy.c (fini_copy_prop): Likewise. + * tree-vrp.c (value_range_type): Remove definition, now in + tree-ssanames.h. + (vrp_finalize): Call set_range_info to update value range of SSA_NAMEs. + * tree.h (SSA_NAME_PTR_INFO): Macro changed to access via union. + (SSA_NAME_RANGE_INFO): New macro. + +2013-09-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58464 + * tree-ssa-pre.c (phi_trans_lookup): Remove. + (phi_trans_add): Change to add conditionally on being not present. + (phi_translate_1): Remove recursion detection here. + (phi_translate): Pre-seed the cache with NULL to catch + recursion here in a more generic way. + (bitmap_find_leader): Adjust comment. + (get_representative_for): Dump value-numbers. + (create_expression_by_pieces): Likewise. + (insert_into_preds_of_block): Likewise. + +2013-09-23 Christian Bruel <christian.bruel@st.com> + + PR target/58475 + * config/sh/sh.md (movsf_ie): Allow fpul_operand. + * config/sh/predicate.md (arith_reg_operand): Disallow FPUL_REG. + +2013-09-23 James Greenhalgh <james.greenhalgh@arm.com> + + Revert r202780: + 2013-09-20 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_prologue): Use + plus_constant. + (aarch64_expand_epilogue): Likewise. + (aarch64_legitimize_reload_address): Likewise. + +2013-09-22 Eric Botcazou <ebotcazou@adacore.com> + + * gimplify.c (gimplify_asm_expr): Reset the TREE_CHAIN of clobbers to + NULL_TREE before pushing them onto the vector. Likewise for labels. + +2013-09-21 Eric Botcazou <ebotcazou@adacore.com> + + * config/ia64/predicates.md (ia64_cbranch_operator): Accept unordered + comparison operators when -fno-trapping-math is in effect. + * config/ia64/ia64.c (ia64_expand_compare): Add support for unordered + comparison operators in TFmode and assert that unsupported operators + cannot reach here. + (ia64_print_operand): Likewise. + +2013-09-21 Jan Hubicka <jh@suse.cz> + + * x86-tune.def (partial_reg_stall): Disable for CoreI7 and newer. + (sse_typeless_stores): Enable for core + (sse_load0_by_pxor): Likewise. + (four_jump_limit): Disable for core. + (pad_returns): Likewise. + (avoid_vector_decode): Likewise. + (fuse_cmp_and_branch): Enable for cores. + * i386.c (x86_accumulate_outgoing_args): Disable for cores. + +2013-09-20 John David Anglin <danglin@gcc.gnu.org> + + PR middle-end/56791 + * config/pa/pa.c (pa_option_override): Disable auto increment and + decrement instructions until reload is completed. + + * config/pa/pa-linux.h (TARGET_OS_CPP_BUILTINS): Define + __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1, __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2, + and __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4. + +2013-09-20 DJ Delorie <dj@redhat.com> + Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78.c: Various whitespace and comment tweaks. + (need_to_save): Save bank 0 on interrupts. + (characterize_address): Strip far address wrappers. + (rl78_as_legitimate_address): Likewise. + (transcode_memory_rtx): Likewise. + (rl78_peep_movhi_p): Disable this peephole after devirt. + (rl78_propogate_register_origins): Forget all origins when a + CLOBBER is seen. + * config/rl78/rl78-virt.md: Various whitespace tweaks. + * config/rl78/rl78-real.md: Various whitespace tweaks. Additional + peephole2's. + * config/rl78/rl78.md (sel_rb): Disable for G10 just in case. + * config/rl78/rl78-expand.md (movqi): Check for subregs of consts. + * config/rl78/rl78.h (LINK_SPEC): Pass -gc-sections unless + relocating. + * config/rl78/constraints.md: Various whitespace and paren tweaks. + +2013-09-20 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.md: In "scc" insn patterns, change output template to + handle const0_rtx in reg_or_0_operand operands. + +2013-09-20 Martin Husemann <martin@NetBSD.org> + + PR target/56875 + * config/vax/vax.c (vax_output_int_move): Use D format specifier. + * config/vax/vax.md (ashldi3, <unnamed>): Ditto. + +2013-09-20 Richard Biener <rguenther@suse.de> + + PR middle-end/58484 + * tree-scalar-evolution.c (struct scev_info_str): Shrink by + remembering SSA name version and block index. + (new_scev_info_str): Adjust. + (hash_scev_info): Likewise. Also hash the block index. + (eq_scev_info): Adjust. + (find_var_scev_info): Likewise. + (struct instantiate_cache_entry): Remove. + (struct instantiate_cache_type): Use a htab to map name, block + to chrec. + (instantiate_cache_type::~instantiate_cache_type): Adjust. + (get_instantiated_value_entry): Likewise. + (hash_idx_scev_info, eq_idx_scev_info): New functions. + (instantiate_scev_name): Adjust. + +2013-09-20 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (record_temporary_equivalences): Add comment. + +2013-09-20 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): + Call aarch64_simd_expand_args to update op[argc]. + +2013-09-20 Basile Starynkevitch <basile@starynkevitch.net> + + * plugin.c (parse_plugin_arg_opt): Accept equal sign inside + plugin argument. + +2013-09-20 Basile Starynkevitch <basile@starynkevitch.net> + + * gengtype.c (file_rules): Added rule for *.cc files. + (get_output_file_with_visibility): Give fatal message when no + rules found. + +2013-09-20 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant. + (aarch64_expand_epilogue): Likewise. + (aarch64_legitimize_reload_address): Likewise. + +2013-09-20 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR middle-end/57748 + * expr.c (expand_assignment): Remove misalignp code path. + +2013-09-20 Marek Polacek <polacek@redhat.com> + + PR sanitizer/58413 + * ubsan.c (get_ubsan_type_info_for_type): Use TYPE_SIZE instead of + TYPE_PRECISION. Add asserts. + +2013-09-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58453 + * tree-loop-distribution.c (distribute_loop): Apply the cost + model for -ftree-loop-distribute-patterns, too. + +2013-09-20 Richard Biener <rguenther@suse.de> + + PR middle-end/58473 + * tree-chrec.h (build_polynomial_chrec): Use gcc_checking_assert, + make type comparison less strict. + +2013-09-20 Alan Modra <amodra@gmail.com> + + * configure: Regenerate. + * aclocal.m4: Regenerate. + +2013-09-20 Marek Polacek <polacek@redhat.com> + + PR other/58467 + * doc/extend.texi: Document that attribute used is meant to be used + on variables with static storage duration. + +2013-09-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58472 + * tree-vect-stmts.c (vectorizable_store, vectorizable_load): For + simd_lane_access set inv_p = false. + * omp-low.c (lower_rec_input_clauses): Set TREE_NO_WARNING on + the simduid magic VAR_DECL. + +2013-09-19 Jan Hubicka <jh@suse.cz> + + * i386.c (generic_memcpy, generic_memset): Fix 32bit template. + +2013-09-17 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (record_temporary_equivalences): New function + split out of dom_opt_dom_walker::after_dom_children. + (dom_opt_dom_walker::thread_across_edge): Move common code + in here from dom_opt_dom_walker::after_dom_children. + (dom_opt_dom_walker::after_dom_children): Corresponding simplifictions. + +2013-09-19 Jan Hubicka <jh@suse.cz> + + * i386.h (TARGET_GENERIC32, TARGET_GENERIC64): Remove. + (TARGET_GENERIC): Use PROCESOR_GENERIC + (enum processor_type): Unify generic32 and 64. + * i386.md (cpu): Likewise. + * x86-tune.def (use_leave): Enable for generic32. + (avoid_vector_decode, slow_imul_imm32_mem, slow_imul_imm8): Likewise. + * athlon.md: Change generic64 to generic in all occurences. + * i386-c.c (ix86_target_macros_internal): Unify generic64 and 32. + (ix86_target_macros_internal): Likewise. + * driver-i386.c (host_detect_local_cpu): Likewise. + * i386.c (generic64_memcpy, generic64_memset, generic64_cost): Rename + to .. + (generic_memcpy, generic_memset, generic_cost): This one. + (generic32_memcpy, generic32_memset, generic32_cost): Remove. + (m_GENERIC32, m_GENERIC64): Remove. + (m_GENERIC): Turn into one flag. + (processor_target): Unify generic tunnings. + (ix86_option_override_internal): Replace generic32/64 by generic. + (ix86_issue_rate): Likewise. + (ix86_adjust_cost): Likewise. + +2013-09-19 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_create_edge_1): Avoid uninitialized read + of speculative flag. + +2013-09-19 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (expand_omp_sections): Always pass len - 1 to + GOMP_sections_start, even if !exit_reachable. + +2013-09-18 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (need_for_all_save_p): Use macro + HARD_REGNO_CALL_PART_CLOBBERED. + * lra-lives.c (check_pseudos_live_through_calls): Use the macro to + set up pseudo conflict hard regs. + +2013-09-18 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/58452 + * config/rs6000/paired.md (movmisalignv2sf): Fix to allow memory + operands. + +2013-09-18 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/58438 + * lra.c (lra): Clear lra_optional_reload_pseudos in upper loop. + * lra-constraints.c (undo_optional_reloads): Keep optional reloads + from previous subpasses. + +2013-09-18 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (arm_get_frame_offsets): Validate architecture supports + LDRD/STRD before accepting the tuning preference. + (arm_expand_prologue): Likewise. + (arm_expand_epilogue): Likewise. + +2013-09-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58417 + * tree-chrec.c (chrec_fold_plus_1): Assert that we do not + have chrecs with symbols defined in the loop as operands. + (chrec_fold_multiply): Likewise. + * tree-scalar-evolution.c (interpret_rhs_expr): Instantiate + parameters before folding binary operations. + (struct instantiate_cache_entry_hasher): Remove. + (struct instantiate_cache_type): Use a pointer-map. + (instantiate_cache_type::instantiate_cache_type): New function. + (instantiate_cache_type::get): Likewise. + (instantiate_cache_type::set): Likewise. + (instantiate_cache_type::~instantiate_cache_type): Adjust. + (get_instantiated_value_entry): Likewise. + (global_cache): New global. + (instantiate_scev_r, instantiate_scev_poly, instantiate_scev_binary, + instantiate_array_ref, instantiate_scev_convert, instantiate_scev_3, + instantiate_scev_2, instantiate_scev_1): Do not pass along cache. + (instantiate_scev_name): Adjust. + (instantiate_scev): Construct global instead of local cache. + (resolve_mixers): Likewise. + +2013-09-18 Daniel Morris <danielm@ecoscentric.com> + Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58458 + * doc/implement-cxx.texi: Fix references to the C++ standards. + +2013-09-18 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (copy_var_decl): Copy DECL_ATTRIBUTES. + * tree-vect-data-refs.c (vect_analyze_data_refs): For + simd_lane_access drs, update also DR_ALIGNED_TO. + +2013-09-18 Marek Polacek <polacek@redhat.com> + + PR sanitizer/58411 + * doc/extend.texi: Document no_sanitize_undefined attribute. + * builtins.c (fold_builtin_0): Don't sanitize function if it has the + no_sanitize_undefined attribute. + +2013-09-18 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430.h (ASM_SPEC): Pass -md on to the assembler. + (ASM_DECLARE_FUNCTION_NAME): Define. + +2013-09-17 Trevor Saunders <tsaunders@mozilla.com> + + * compare-elim.c (find_comparison_dom_walker): New class + (find_comparisons_in_bb): Rename to + find_comparison_dom_walker::before_dom_children + (find_comparisons): Adjust + * domwalk.c (walk_dominator_tree): Rename to dom_walker::walk, and + adjust. + (init_walk_dominator_tree, fini_walk_dominator_tree): Remove + * domwalk.h (dom_walk_data): Convert it To a class dom_walker. + (init_walk_dominator_tree): Remove declaration. + (fini_walk_dominator_tree): Remove declaration. + * fwprop.c (single_def_use_dom_walker): New class + (single_def_use_enter_block): Convert to + single_def_use_dom_walker::before_dom_children. + (single_def_use_leave_block): Convert to + single_def_use_dom_walker::after_dom_children. + (build_single_def_use_links): Adjust. + * gimple-ssa-strength-reduction.c (find_candidates_dom_walker): New + class. + (find_candidates_in_block): Convert to + find_candidates_dom_walker::before_dom_children. + (execute_strength_reduction): Adjust. + * graphite-sese-to-poly.c (struct bsc, build_sese_conditions): Remove. + (sese_dom_walker): New class. + (sese_dom_walker::sese_dom_walker): New constructor. + (sese_dom_walker::~sese_dom_walker): New destructor. + (build_sese_conditions_before): Convert to + sese_dom_walker::before_dom_children. + (build_sese_conditions_after): Convert to + sese_dom_walker::after_dom_children. + (build_poly_scop): Adjust + * tree-into-ssa.c (rewrite_dom_walker): New class + (rewrite_enter_block): Convert to + rewrite_dom_walker::before_dom_children. + (rewrite_leave_block): Convert to + rewrite_dom_walker::after_dom_children. + (rewrite_update_dom_walker): New class. + (rewrite_update_enter_block): Convert to + rewrite_update_dom_walker::before_dom_children. + (rewrite_update_leave_block): Convert to + rewrite_update_dom_walker::after_dom_children. + (rewrite_blocks, rewrite_into_ssa): Adjust. + (mark_def_dom_walker): New class. + (mark_def_dom_walker::mark_def_dom_walker): New constructor. + (mark_def_dom_walker::~mark_def_dom_walker): New destructor. + (mark_def_sites_blocks): Convert to + mark_def_dom_walker::before_dom_children. + (mark_def_site_blocks): Remove. + * tree-ssa-dom.c (dom_opt_dom_walker): New class. + (tree_ssa_dominator_optimize): Adjust. + (dom_thread_across_edge): Convert to method + dom_opt_dom_walker::thread_across_edge. + (dom_opt_enter_block): Convert to member function + dom_opt_dom_walker::before_dom_children. + (dom_opt_leave_block): Convert to member function + dom_opt_dom_walker::after_dom_children. + * tree-ssa-dse.c (dse_dom_walker): New class. + (dse_enter_block): Convert to member function + dse_dom_walker::before_dom_children. + (tree_ssa_dse): Adjust. + * tree-ssa-loop-im.c (invariantness_dom_walker): New class. + (determine_invariantness_stmt): Convert to method + invariantness_dom_walker::before_dom_children. + (determine_invariantness): Remove + (move_computations_dom_walker): New class. + (move_computations_stmt): Convert to method + move_computations_dom_walker::before_dom_children. + (move_computations, tree_ssa_lim): Adjust. + * tree-ssa-phiopt.c (nontrapping_dom_walker): New class. + (nt_init_block): Convert to method + notrappping_dom_walker::before_dom_children. + (nt_fini_block): Convert to method + method nontrapping_dom_walker::after_dom_children. + (get_non_trapping): Adjust. + * tree-ssa-pre.c (eliminate_dom_walker): New class. + (eliminate_bb): Convert to method + eliminate_dom_walker::before_dom_children. + (eliminate_leave_block): Convert to method + eliminate_dom_walker::after_dom_children. + (eliminate): Adjust. + * tree-ssa-strlen.c (strlen_dom_walker): New class. + (strlen_enter_block): Convert to method + strlen_dom_walker::before_dom_children. + (strlen_leave_block): Convert to method + method strlen_dom_walker::after_dom_children. + (tree_ssa_strlen): Adjust. + * tree-ssa-uncprop.c (uncprop_dom_walker): New class. + (tree_ssa_uncprop): Adjust. + (uncprop_leave_block): Convert to method + uncprop_dom_walker::after_dom_children. + (uncprop_leave_block): Convert to method + uncprop_dom_walker::before_dom_children. + +2013-09-18 Bin Cheng <bin.cheng@arm.com> + + * config/arm/arm.c (thumb1_reorg): Search for flag setting insn before + branch in same basic block. Check both src and dest of the move insn. + +2013-09-17 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78-real.md (bf): New pattern. + (bt): New pattern. + * config/rl78/rl78.c (rl78_print_operand_1): Handle %B. + (rl78_print_operand): Do not put a # before a %B. + * config/rl78/rl78.opt: Tweak doc strings. + +2013-09-17 DJ Delorie <dj@redhat.com> + + * config/rl78/constraints.md (Wcv): Allow up to $r31. + * config/rl78/rl78.c (rl78_asm_file_start: Likewise. + (rl78_option_override): Likewise, if -mallregs. + (is_virtual_register): Likewise. + * config/rl78/rl78.h (reg_class): Extend VREGS to $r31. + (REGNO_OK_FOR_BASE_P): Likewise. + * config/rl78/rl78.opt (-mallregs): New. + +2013-09-17 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78.c (need_to_save): Change return type to bool. + For interrupt functions: save all call clobbered registers if the + interrupt handler is not a leaf function. + (rl78_expand_prologue): Always recompute the frame information. + For interrupt functions: only select bank 0 if one of the bank 0 + registers is going to be psuhed. + +2013-09-17 DJ Delorie <dj@redhat.com> + + * config/rl78/constraints.md: For each W* constraint, rename to C* + and create a W* constraint that checks for an optional ES: prefix + pattern also. + * config/rl78/rl78.md (UNS_ES_ADDR): New. + (es_addr): New. Used to wrap far addresses. + * config/rl78/rl78-protos.h (rl78_es_addr): New. + (rl78_es_base): New. + * config/rl78/rl78.c (rl78_as_legitimate_address): Accept "unspec" + wrapped far addresses. + (rl78_print_operand_1): Unwrap far addresses before processing. + (rl78_lo16): Wrap far addresses in unspecs. + (rl78_es_addr): New. + (rl78_es_base): New. + (insn_ok_now): Check for not-yet-wrapped far addresses. + (transcode_memory_rtx): Properly re-wrap far addresses. + +2013-09-17 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * config/sparc/t-rtems: Add leon3 multilibs. + +2013-09-17 Cong Hou <congh@google.com> + + * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Fix a bug + when checking the dot production pattern. The type of rhs operand + of multiply is now checked correctly. + +2013-09-17 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (cprop_into_successor_phis): Also propagate + edge implied equivalences into successor phis. + * tree-ssa-threadupdate.c (phi_args_equal_on_edges): Moved into + here from tree-ssa-threadedge.c. + (mark_threaded_blocks): When threading through a joiner, if both + successors of the joiner's clone reach the same block, verify the + PHI arguments are equal. If not, cancel the jump threading request. + * tree-ssa-threadedge.c (phi_args_equal_on_edges): Moved into + tree-ssa-threadupdate.c + (thread_across_edge): Don't check PHI argument equality when + threading through joiner block here. + +2013-09-17 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h (ssa_undefined_value_p): Remove prototype. + * tree-ssa.c (ssa_undefined_value_p): Move pass independent parts here. + (warn_uninit, warn_uninitialized_vars, + execute_early_warn_uninitialized, make_pass_early_warn_uninitialized): + Move to tree-ssa-uninit.c. + * tree-ssa-uninit.c (ssa_undefined_value_p): Move to tree-ssa.c. + (has_undefined_value_p): New. Pass dependant parts of + ssa_undefined_value_p. + (uninit_undefined_value_p): Use has_undefined_value_p. + (warn_uninit, warn_uninitialized_vars, + execute_early_warn_uninitialized, make_pass_early_warn_uninitialized): + Move from tree-ssa.c. + * tree-ssa.h: Adjust prototypes. + +2013-09-17 Jan Hubicka <jh@suse.cz> + + PR middle-end/58332 + * cif-code.def (FUNCTION_NOT_OPTIMIZED): New CIF code. + * ipa-inline.c (can_inline_edge_p): Do not downgrade + FUNCTION_NOT_OPTIMIZED. + * ipa-inline-analysis.c (compute_inline_parameters): Function + not optimized is not inlinable unless it is alwaysinline. + (inline_analyze_function): Force calls in not optimized + function not inlinable. + +2013-09-17 Jan Hubicka <jh@suse.cz> + + PR middle-end/58329 + * ipa-devirt.c (ipa_devirt): Be ready for symtab_nonoverwritable_alias + to return NULL. + * ipa.c (function_and_variable_visibility): Likewise. + * ipa-profile.c (ipa_profile): Likewise. + +2013-09-17 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR ipa/58398 + * cgraph.c (cgraph_function_body_availability): Check for ifunc + attribute, and don't inline the resolver in this case. + +2013-09-17 Teresa Johnson <tejohnson@google.com> + + * coverage.c (get_coverage_counts): Add missing newline. + +2013-09-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR tree-optimization/58088 + * fold-const.c (mask_with_trailing_zeros): New function. + (fold_binary_loc): Make sure we don't recurse infinitely + when the X in (X & C1) | C2 is a tree of the form (Y * K1) & K2. + Use mask_with_trailing_zeros where appropriate. + +2013-09-17 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/i386.c (distance_agu_use_in_bb) : Proper initialization + of 'prev' var to get better distance estimation. + +2013-09-17 Eric Botcazou <ebotcazou@adacore.com> + + * tree-inline.h (struct copy_body_data): Add transform_parameter. + * tree-inline.c (is_parameter_of): New predicate. + (remap_gimple_op_r): Do not propagate TREE_THIS_NOTRAP on MEM_REF if + a parameter has been remapped. + (copy_tree_body_r): Likewise on INDIRECT_REF and MEM_REF. + (optimize_inline_calls): Initialize transform_parameter. + (copy_gimple_seq_and_replace_locals): Likewise. + (tree_function_versioning): Likewise. + (maybe_inline_call_in_expr): Likewise. + +2013-09-17 Nick Clifton <nickc@redhat.com> + + * config/msp430/msp430-protos.h: Add prototypes for new functions. + * config/msp430/msp430.c (msp430_preserve_reg_p): Add support for + interrupt handlers. + (is_attr_func): New function. + (msp430_is_interrupt_func): New function. + (is_naked_func): New function. + (is_reentrant_func): New function. + (is_critical_func): New function. + (msp430_start_function): Add annotations for function attributes. + (msp430_attr): New function. + (msp430_attribute_table): New. + (msp430_function_section): New function. + (TARGET_ASM_FUNCTION_SECTION): Define. + (msp430_builtin): New enum. + (msp430_init_builtins): New function. + (msp430_builtin_devl): New function. + (msp430_expand_builtin): New function. + (TARGET_INIT_BUILTINS): Define. + (TARGET_EXPAND_BUILTINS): Define. + (TARGET_BUILTIN_DECL): Define. + (msp430_expand_prologue): Add support for naked, interrupt, + critical and reentrant functions. + (msp430_expand_epilogue): Likewise. + (msp430_print_operand): Handle 'O' character. + * config/msp430/msp430.h (TARGET_CPU_CPP_BUILTINS): Define + NO_TRAMPOLINES. + * config/msp430/msp430.md (unspec): Add UNS_DINT, UNS_EINT, + UNS_PUSH_INTR, UNS_POP_INTR, UNS_BIC_SR, UNS_BIS_SR. + (pushm): Use a 'n' rather than an 'i' constraint. + (msp_return): Add generation of the interrupt return instruction. + (disable_interrupts): New pattern. + (enable_interrupts): New pattern. + (push_intr_state): New pattern. + (pop_intr_state): New pattern. + (bic_SR): New pattern. + (bis_SR): New pattern. + * doc/extend.texi: Document MSP430 function attributes and builtin + functions. + +2013-09-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58432 + * tree-loop-distribution.c (tree_loop_distribution): Also + scan PHIs for outside loop uses and seed a partition from them. + +2013-09-17 Bin Cheng <bin.cheng@arm.com> + + * gimple-ssa-strength-reduction.c (backtrace_base_for_ref): New. + (restructure_reference): Call backtrace_base_for_ref. + +2013-09-17 Alan Modra <amodra@gmail.com> + + PR target/57589 + * config/rs6000/driver-rs6000.c (elf_platform): Revert 2013-06-11 + patch. + +2013-09-16 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (rl78_asm_file_start): Specify alternate + vregs location for RL78/G10. + (rl78_expand_prologue): Avoid SEL on G10. + (rl78_expand_epilogue): Likewise. + (rl78_peep_movhi_p): Can't move a constant to memory in HImode. + * config/rl78/rl78.h (TARGET_CPU_CPP_BUILTINS): Define + __RL78_G10__ when appropriate. + (ASM_SPEC): Pass -mg10 along to the assembler. + * config/rl78/rl78.md (sel_rb): Disable for G10. + * config/rl78/rl78.opt: Add -mg10 option. + * config/rl78/t-rl78: Add -mg10 multilib. + +2013-09-16 Xinliang David Li <davidxl@google.com> + + * tree-if-conv.c (main_tree_if_conversion): Check new flag. + * omp-low.c (omp_max_vf): Ditto. + (expand_omp_simd): Ditto. + * tree-vectorizer.c (vectorize_loops): Ditto. + (gate_vect_slp): Ditto. + (gate_increase_alignment): Ditto. + * tree-ssa-pre.c (inhibit_phi_insertion): Ditto. + * tree-ssa-loop.c (gate_tree_vectorize): Ditto. + (gate_tree_vectorize): Name change. + (tree_vectorize): Ditto. + (pass_vectorize::gate): Call new function. + (pass_vectorize::execute): Ditto. + * opts.c: O3 default setting change. + (finish_options): Check new flag. + * doc/invoke.texi: Document new flags. + * common.opt: New flags. + +2013-09-16 Andreas Schwab <schwab@linux-m68k.org> + + * doc/tm.texi.in (Cond Exec Macros): Remove node. + (Condition Code): Don't reference it. + * doc/tm.texi: Regenerate. + +2013-09-16 Vladimir Makarov <vmakarov@redhat.com> + + PR middle-end/58418 + * lra-constraints.c (undo_optional_reloads): Consider all optional + reload even if it did not get a hard reg. + +2013-09-16 Teresa Johnson <tejohnson@google.com> + + * dumpfile.c (dump_loc): Remove newline emission. + * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Add newline + emission to dump_printf_loc calls where missing. + (vect_mark_for_runtime_alias_test): Ditto. + (vect_analyze_data_ref_dependence): Ditto. + (vect_analyze_data_ref_dependences): Ditto. + (vect_slp_analyze_data_ref_dependence): Ditto. + (vect_slp_analyze_data_ref_dependences): Ditto. + (vect_compute_data_ref_alignment): Ditto. + (vect_update_misalignment_for_peel): Ditto. + (vect_verify_datarefs_alignment): Ditto. + (vector_alignment_reachable_p): Ditto. + (vect_get_data_access_cost): Ditto. + (vect_enhance_data_refs_alignment): Ditto. + (vect_find_same_alignment_drs): Ditto. + (vect_analyze_data_refs_alignment): Ditto. + (vect_analyze_group_access): Ditto. + (vect_analyze_data_ref_access): Ditto. + (vect_analyze_data_ref_accesses): Ditto. + (vect_prune_runtime_alias_test_list): Ditto. + (vect_analyze_data_refs): Ditto. + (vect_create_addr_base_for_vector_ref): Ditto. + (vect_create_data_ref_ptr): Ditto. + (vect_grouped_store_supported): Ditto. + (vect_grouped_load_supported): Ditto. + * value-prof.c (check_counter): Ditto. + (check_ic_target): Ditto. + * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Ditto. + (vect_recog_widen_mult_pattern): Ditto. + (vect_recog_widen_sum_pattern): Ditto. + (vect_recog_over_widening_pattern): Ditto. + (vect_recog_widen_shift_pattern): Ditto. + (vect_recog_rotate_pattern): Ditto. + (vect_recog_vector_vector_shift_pattern): Ditto. + (vect_recog_divmod_pattern): Ditto. + (vect_recog_mixed_size_cond_pattern): Ditto. + (vect_recog_bool_pattern): Ditto. + (vect_pattern_recog_1): Ditto. + (vect_pattern_recog): Ditto. + * tree-vect-loop.c (vect_determine_vectorization_factor): Ditto. + (vect_is_simple_iv_evolution): Ditto. + (vect_analyze_scalar_cycles_1): Ditto. + (vect_get_loop_niters): Ditto. + (vect_analyze_loop_1): Ditto. + (vect_analyze_loop_form): Ditto. + (vect_analyze_loop_operations): Ditto. + (vect_analyze_loop_2): Ditto. + (vect_analyze_loop): Ditto. + (report_vect_op): Ditto. + (vect_is_slp_reduction): Ditto. + (vect_is_simple_reduction_1): Ditto. + (vect_get_known_peeling_cost): Ditto. + (vect_estimate_min_profitable_iters): Ditto. + (vect_model_reduction_cost): Ditto. + (vect_model_induction_cost): Ditto. + (get_initial_def_for_induction): Ditto. + (vect_create_epilog_for_reduction): Ditto. + (vectorizable_reduction): Ditto. + (vectorizable_induction): Ditto. + (vectorizable_live_operation): Ditto. + (vect_loop_kill_debug_uses): Ditto. + (vect_transform_loop): Ditto. + * tree-vect-stmts.c (vect_mark_relevant): Ditto. + (vect_stmt_relevant_p): Ditto. + (process_use): Ditto. + (vect_mark_stmts_to_be_vectorized): Ditto. + (vect_model_simple_cost): Ditto. + (vect_model_promotion_demotion_cost): Ditto. + (vect_model_store_cost): Ditto. + (vect_get_store_cost): Ditto. + (vect_model_load_cost): Ditto. + (vect_get_load_cost): Ditto. + (vect_init_vector_1): Ditto. + (vect_get_vec_def_for_operand): Ditto. + (vect_finish_stmt_generation): Ditto. + (vectorizable_call): Ditto. + (vectorizable_conversion): Ditto. + (vectorizable_assignment): Ditto. + (vectorizable_shift): Ditto. + (vectorizable_operation): Ditto. + (vectorizable_store): Ditto. + (vectorizable_load): Ditto. + (vectorizable_condition): Ditto. + (vect_analyze_stmt): Ditto. + (vect_transform_stmt): Ditto. + (vect_is_simple_use): Ditto. + * tree-vect-loop-manip.c (slpeel_make_loop_iterate_ntimes): Ditto. + (vect_can_advance_ivs_p): Ditto. + (vect_update_ivs_after_vectorizer): Ditto. + (vect_do_peeling_for_loop_bound): Ditto. + (vect_gen_niters_for_prolog_loop): Ditto. + (vect_update_inits_of_drs): Ditto. + (vect_create_cond_for_alias_checks): Ditto. + * tree-vect-slp.c (vect_get_and_check_slp_defs): Ditto. + (vect_build_slp_tree_1): Ditto. + (vect_supported_load_permutation_p): Ditto. + (vect_analyze_slp_instance): Ditto. + (vect_analyze_slp): Ditto. + (vect_make_slp_decision): Ditto. + (vect_detect_hybrid_slp): Ditto. + (vect_bb_vectorization_profitable_p): Ditto. + (vect_slp_analyze_bb_1): Ditto. + (vect_update_slp_costs_according_to_vf): Ditto. + (vect_get_mask_element): Ditto. + (vect_transform_slp_perm_load): Ditto. + (vect_schedule_slp_instance): Ditto. + (vect_schedule_slp): Ditto. + (vect_slp_transform_bb): Ditto. + * profile.c (read_profile_edge_counts): Ditto. + (compute_branch_probabilities): Ditto. + * coverage.c (get_coverage_counts): Ditto. + +2013-09-16 Diego Novillo <dnovillo@google.com> + + * tree-core.h: Add missing comment lines from refactoring of tree.h. + +2013-09-16 Jan Hubicka <jh@suse.cz> + + * gimple-fold.c (can_refer_decl_in_current_unit_p): Do not accept + abstract functions; for static functions check the presence of body. + +2013-09-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (fma): New. + * config/aarch64/aarch64-simd.md + (aarch64_mla_elt<mode>): New. + (aarch64_mla_elt_<vswap_width_name><mode>): Likewise. + (aarch64_mls_elt<mode>): Likewise. + (aarch64_mls_elt_<vswap_width_name><mode>): Likewise. + (aarch64_fma4_elt<mode>): Likewise. + (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise. + (aarch64_fma4_elt_to_128v2df): Likewise. + (aarch64_fma4_elt_to_64df): Likewise. + (fnma<mode>4): Likewise. + (aarch64_fnma4_elt<mode>): Likewise. + (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise. + (aarch64_fnma4_elt_to_128v2df): Likewise. + (aarch64_fnma4_elt_to_64df): Likewise. + * config/aarch64/iterators.md (VDQSF): New. + * config/aarch64/arm_neon.h + (vfm<as><sdq>_lane<q>_f<32, 64>): Convert to C implementation. + (vml<sa><q>_lane<q>_<fsu><16, 32, 64>): Likewise. + +2013-09-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_mul3_elt<mode>): New. + (aarch64_mul3_elt_<vswap_width_name><mode>): Likewise. + (aarch64_mul3_elt_to_128df): Likewise. + (aarch64_mul3_elt_to_64v2df): Likewise. + * config/aarch64/iterators.md (VEL): Also handle DFmode. + (VMUL): New. + (VMUL_CHANGE_NLANES) Likewise. + (h_con): Likewise. + (f): Likewise. + * config/aarch64/arm_neon.h + (vmul<q>_lane<q>_<suf><16,32,64>): Convert to C implementation. + +2013-09-16 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vcvtx_high_f32_f64): Fix parameters. + +2013-09-16 Jan-Benedict Glaw <jbglaw@lug-owl.de> + Uros Bizjak <ubizjak@gmail.com> + + * config/alpha.c: Include tree-ssanames.h. + +2013-09-16 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (enum rdg_dep_type): Add control_dd. + (dot_rdg_1): Handle control_dd. + (create_edge_for_control_dependence): New function. + (create_rdg_edges): Add control dependences if asked for. + (build_rdg): Likewise. + (generate_loops_for_partition): If there are not necessary + control stmts remove all their dependencies. + (collect_condition_stmts, rdg_flag_loop_exits): Remove. + (distribute_loop): Pass on control dependences. + (tree_loop_distribution): Compute control dependences and remove + restriction on number of loop nodes. + +2013-09-16 Jakub Jelinek <jakub@redhat.com> + + * ipa-prop.c (ipa_compute_jump_functions_for_edge): Return early + for internal calls. + +2013-09-16 Richard Sandiford <rdsandiford@googlemail.com> + + * cse.c (try_const_anchors): Punt on CC modes. + +2013-09-15 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/vax/constraints.md (T): Add missing CONSTANT_P check. + +2013-09-14 John David Anglin <danglin@gcc.gnu.org> + + PR target/58382 + * config/pa/pa.c (pa_expand_prologue): Change mode in gen_rtx_POST_INC + calls to word_mode. + +2013-09-14 Iain Sandoe <iain@codesourcery.com> + + PR target/48094 + * config/darwin.c (darwin_objc2_section): Note if ObjC Metadata is + seen. + (darwin_objc1_section): Likewise. + (darwin_file_end): Emit Image Info section when required. + +2013-09-14 Jan Hubicka <jh@suse.cz> + + * tree-into-ssa.c (gate_into_ssa): New. + (pass_data_build_ssa): Use it. + * cgraph.h (expand_thunk): Update prototype. + * cgraphunit.c (analyze_function): Expand thunks early. + (expand_thunk): Fix DECL_CONTEXT of reust_decl; + build proper cgraph; set in_ssa_p; clear bogus TREE_ASM_WRITTEN; + set lowered flag; do not add new function. + (assemble_thunks_and_aliases): Update. + * tree-ssa.c (gate_init_datastructures): New gate. + (pass_data_init_datastructures): Use it. + +2013-09-14 Iain Sandoe <iain@codesourcery.com> + + PR target/58269 + * config/i386/i386.c (ix86_function_arg_regno_p): Make Darwin use the + xmm register set described in the psABI. + +2013-09-13 Evgeny Gavrin <e.gavrin@samsung.com> + + * dwarf2out.c (should_emit_struct_debug): Add check + for type_decl variable is not NULL. + +2013-09-13 Jacek Caban <jacek@codeweavers.com> + + * config.gcc: Use new winnt-c.c target hooks + * config/t-winnt: New file + * config/winnt-c.c: New file + * doc/tm.texi.in: Document new hook + * doc/tm.texi: Regenerated + +2013-09-13 Jan Hubicka <jh@suse.cz> + + PR middle-end/58094 + * ipa-inline.c (check_callers): New function. + (check_caller_edge): Remove. + (want_inline_function_to_all_callers_p): Also permit alises that are + called dirrectly. + (inline_to_all_callers): Terminate the walk when devirtualization + introduce new calls. + +2013-09-13 Jan Hubicka <jh@suse.cz> + + * ipa-inline-analysis.c (struct growth_data): Add node. + (do_estimate_growth_1): Fix detection of recursion. + +2013-09-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58392 + * tree-cfg.c (move_sese_region_to_fn): Rename loop variable + to avoid shadowing of outer loop variable. If + saved_cfun->has_simduid_loops or saved_cfun->has_force_vect_loops, + replace_by_duplicate_decl simduid of loops that have it set and + set dest_cfun->has_simduid_loops and/or + dest_cfun->has_force_vect_loops. + * omp-low.c (build_outer_var_ref): Call maybe_lookup_decl_in_outer_ctx + instead of maybe_lookup_decl. + * tree-inline.c (copy_loops): Change blocks_to_copy argument to id. + Use id->blocks_to_copy instead of blocks_to_copy. Adjust recursive + call. Copy over force_vect and copy and remap simduid. Set + cfun->has_simduid_loops and/or cfun->has_force_vect_loops. + (copy_cfg_body): Remove blocks_to_copy argument. Use + id->blocks_to_copy instead of blocks_to_copy. Adjust copy_loops + caller. Don't set cfun->has_simduid_loops and/or + cfun->has_force_vect_loops here. + (copy_body): Remove blocks_to_copy argument. Adjust copy_cfg_body + caller. + (expand_call_inline, tree_function_versioning): Adjust copy_body + callers. + +2013-09-13 Martin Jambor <mjambor@suse.cz> + + PR bootstrap/58388 + * ipa-prop.c (try_make_edge_direct_simple_call): Be less strict in + the assert if the edge was a speculative one. + +2013-09-13 Richard Biener <rguenther@suse.de> + + * tree-data-ref.h (known_dependences_p): Move here ... + * tree-loop-distribution.c (known_dependences_p): ... from here. + (dump_rdg_component, debug_rdg_component): Remove. + (dump_rdg): Adjust. + (generate_loops_for_partition): Use gimple_uid instead of + relying on matching stmt visit order. + (rdg_build_partitions): Take starting stmt vector. + (ldist_gen): Merge into ... + (distribute_loop): ... this function. Do not compute starting + vertices vector. + * tree-cfg.c (gimple_duplicate_bb): Copy UID for PHIs. + +2013-09-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_cmpsi_insn): Split rI alternative. + Set type attribute correctly. Set predicable_short_it attribute. + (cmpsi_shiftsi): Remove %? from output template. + +2013-09-13 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (struct rdg_component, + rdg_defs_used_in_other_loops_p, free_rdg_components, + rdg_build_components): Remove. + (stmts_from_loop): Do not record virtual PHIs. + (generate_loops_for_partition): Skip virtual PHIs. + (build_rdg_partition_for_component): Rename to ... + (build_rdg_partition_for_vertex): ... this and adjust. + (rdg_build_partitions): Take a vector of starting vertices + instead of components. Remove unnecessary leftover handling. + (ldist_gen): Do not build components or record other stores. + (distribute_loop): Do not distribute loops containing stmts + with side-effects. + +2013-09-13 Christian Bruel <christian.bruel@st.com> + + PR target/58314 + * config/sh/sh.md (mov<mode>_reg_reg): Allow memory reloads. + +2013-09-13 Kai Tietz <ktietz@redhat.com> + + * config.gcc: Separate cases for mingw and cygwin targets, + and add 64-bit cygwin target case. + + * config/i386/winnt-cxx.c (i386_pe_type_dllexport_p): Don't + dll-export inline-functions. + * config/i386/winnt.c (i386_pe_determine_dllexport_p): Likewise. + +2013-09-13 Jeff Law <law@redhat.com> + + PR middle-end/58387 + Revert: + 2013-09-06 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (cprop_into_successor_phis): Also propagate + edge implied equivalences into successor phis. + +2013-09-12 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78-virt.md: Change from | to \; for asm line + separators. + +2013-09-12 Brooks Moses <bmoses@google.com> + + PR driver/42955 + * Makefile.in: Do not install driver binaries in $(target)/bin. + +2013-09-12 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.opt (mrelax): New. + * config/rl78/rl78.h (ASM_SPEC): New, pass on -mrelax to gas. + * config/rl78/rl78.h (LINK_SPEC): New, pass on -mrelax to ld. + + * config/rl78/rl78.c (rl78_expand_prologue): Use AX to copy + between SP and FP. + (rl78_expand_epilogue): Likewise. + +2013-09-12 Vladimir Makarov <vmakarov@redhat.com> + + PR middle-end/58335 + * lra-eliminations.c (remove_reg_equal_offset_note): New. + (eliminate_regs_in_insn): Rewrite frame pointer to hard frame + pointer elimination with using remove_reg_equal_offset_note. + +2013-09-12 DJ Delorie <dj@redhat.com> + + * config/msp430/: New port. + * config.gcc (msp430): Added. + * doc/invoke.texi: Document MSP430 options. + * doc/install.texi: Document msp430-elf + * doc/md.texi: Document msp430-elf + * doc/contrib.texi: Document msp430-elf + + * cfgexpand.c (expand_debug_expr): Avoid sign-extending SImode to + PSImode. + +2013-09-12 Martin Jambor <mjambor@suse.cz> + + PR ipa/58389 + * ipa-prop.c (remove_described_reference): Give up if the edge in the + reference descriptor is NULL. + (ipa_edge_removal_hook): If owning a reference descriptor, set its + edge to NULL. + +2013-09-12 Andrew MacLeod <amacleod@redhat.com> + + * tree-flow.h (FREE_SSANAMES): Move to tree-ssanames.c + (SSANAMES, MODIFIED_NORETURN_CALLS, DEFAULT_DEFS, ptr_info_def, + num_ssa_names, ssa_name): Move to tree-ssanames.h + prototypes. + * tree-flow-inline.h (make_ssa_name, copy_ssa_name, duplicate_ssa_name, + make_temp_ssa_name): move to tree-ssanames.h + * tree-ssa-alias.h: Move prototype. + * tree-ssa.h: Include tree-ssanames.h. + * tree-ssanames.c (FREE_SSANAMES): Move to here. + * tree-ssanames.h: New. Move items from tree-flow*.h + * Makefile.in (tree-ssanames.h): Add to tree-ssanames.o and GTFILES. + +2013-09-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58404 + * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Also + propagate non-invariant addresses into dereferences wrapped + in component references. + +2013-09-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58402 + * passes.def: Move pass_late_warn_uninitialized later. + +2013-09-12 Andrew MacLeod <amacleod@redhat.com> + + * tree-ssa.h: New. Move content from tree-flow.h and + tree-flow-inline.h. + * tree-flow.h (_edge_var_map, edge_var_map_vector): Move to tree-ssa.h. + Move prototypes belonging to tree-ssa.c. + * tree-flow-inline.h (redirect_edge_var_map_def, + redirect_edge_var_map_result, redirect_edge_var_map_location): Move to + tree-ssa.h. + * gimple.h: Adjust prototypes. + * tree-ssa.c (useless_type_conversion_p, types_compatible_p): Move + to... + * gimple.c (useless_type_conversion_p, types_compatible_p): Here. + * tree.h: Move prototype to tree-ssa.h. + * gengtype.c (open_base_files): Replace tree-flow.h with tree-ssa.h. + * Makefile.in: (TREE_SSA_H, TREE_FLOW_H): Adjust dependencies. + * alias.c, asan.c, builtins.c, calls.c, cfgexpand.c, cfghooks.c, + cfgloop.c, cfgloopmanip.c, cgraph.c, cgraphbuild.c, cgraphclones.c, + cgraphunit.c, dse.c, except.c, expr.c, final.c, fold-const.c, + ggc-page.c, gimple-fold.c, gimple-iterator.c, gimple-low.c, + gimple-pretty-print.c, gimple-ssa-strength-reduction.c, + gimple-streamer-in.c, gimple-streamer-out.c, gimple.c, gimplify.c, + graphite-blocking.c, graphite-clast-to-gimple.c, + graphite-dependences.c, graphite-interchange.c, + graphite-optimize-isl.c, graphite-poly.c, graphite-scop-detection.c, + graphite-sese-to-poly.c, graphite.c, ipa-cp.c, ipa-inline-analysis.c, + ipa-inline-transform.c, ipa-inline.c, ipa-prop.c, ipa-pure-const.c, + ipa-reference.c, ipa-split.c, ipa-utils.c, + loop-init.c, lto-cgraph.c, lto-section-in.c, lto-section-out.c, + lto-streamer-in.c, lto-streamer-out.c, lto-streamer.c, omp-low.c, + passes.c, predict.c, print-tree.c, profile.c, sese.c, targhooks.c, + tracer.c, trans-mem.c, tree-call-cdce.c, tree-cfg.c, tree-cfgcleanup.c, + tree-chrec.c, tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-eh.c, + tree-emutls.c, tree-if-conv.c, tree-inline.c, tree-into-ssa.c, + tree-loop-distribution.c, tree-mudflap.c, tree-nested.c, tree-nrv.c, + tree-object-size.c, tree-optimize.c, tree-outof-ssa.c, tree-parloops.c, + tree-phinodes.c, tree-predcom.c, tree-pretty-print.c, tree-profile.c, + tree-scalar-evolution.c, tree-sra.c, tree-ssa*.c, tree-stdarg.c, + tree-streamer-in.c, tree-switch-conversion.c, tree-tailcall.c, + tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop-manip.c, + tree-vect-loop.c, tree-vect-patterns.c, tree-vect-slp.c, + tree-vect-stmts.c, tree-vectorizer.c, tree-vrp.c, tsan.c, + value-prof.c, var-tracking.c, + varpool.c, vtable-verify.c: Replace tree-flow.h with tree-ssa.h + +2013-09-12 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58396 + * tree-loop-distribution.c (create_rdg_edges): Free unused DDRs. + (build_rdg): Take a loop-nest parameter, fix memleaks. + (distribute_loop): Compute loop-nest here and pass it to build_rdg. + +2013-09-12 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/x86-tune.def: Turn on X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE + for SLM. + +2013-09-12 Cameron McInally <cameron.mcinally@nyu.edu> + + * doc/extend.texi: Fix errors in x86 FMA builtin naming. + The FMA instruction names should have a 'v' prefix. + +2013-09-12 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.c (dot_rdg_1): Make graph prettier. + (dot_rdg): Use popen instead of system in optional code. + (remaining_stmts, upstream_mem_writes): Remove global bitmaps. + (already_processed_vertex_p): Adjust. + (has_anti_or_output_dependence, predecessor_has_mem_write, + mark_nodes_having_upstream_mem_writes, has_upstream_mem_writes, + rdg_flag_uses): Remove. + (rdg_flag_vertex): Simplify. + (rdg_flag_vertex_and_dependent): Rely on a correct RDG and + remove recursion. + (build_rdg_partition_for_component): Process the first vertex + of a component only. + (ldist_gen): Do not compute remaining_stmts or upstream_mem_writes. + +2013-09-12 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (toc_relative_expr_p): Use add_cint_operand. + +2013-09-11 DJ Delorie <dj@redhat.com> + Nick Clifton <nickc@redhat.com> + + * config/rl78/predicates.md (rl78_cmp_operator_signed): New. + (rl78_stack_based_mem): New. + * config/rl78/constraints.md (Iv08): New. + (Iv16): New. + (Iv24): New. + (Is09): New. + (Is17): New. + (Is25): New. + (ISsi): New. + (IShi): New. + (ISqi): New. + * config/rl78/rl78-expand.md (movqi): Reject more SUBREG operands. + (movhi): Likewise. + (movsi): Change from expand to insn-and-split. + (ashrsi3): Clobber AX. + (lshrsi3): New. + (ashlsi3): New. + (cbranchsi4): New. + * config/rl78/rl78.md (CC_REG): Fix. + (addsi3): Allow memory and immediate operands. + (addsi3_internal): Split into... + (addsi3_internal_virt): ...new, and ... + (addsi3_internal_real): ...new. + (subsi): New. + (subsi3_internal_virt): New. + (subsi3_internal_real): New. + (mulsi3): Add memory operand. + (mulsi3_rl78): Likewise. + (mulsi3_g13): Likewise. + * config/rl78/rl78-real.md (cbranchqi4_real_signed): New. + (cbranchqi4_real): Add more constraint options. + (cbranchhi4_real): Expand pattern. + (cbranchhi4_real_signed): New. + (cbranchhi4_real_inverted): New. + (cbranchsi4_real_lt): New. + (cbranchsi4_real_ge): New. + (cbranchsi4_real_signed): New. + (cbranchsi4_real): New. + (peephole2): New. + * config/rl78/rl78-virt.md (ashrsi3_virt): Add custom cases for + constant shifts. + (lshrsi3_virt): Likewise. + (ashlsi3_virt): Likewise. + (cbranchqi4_virt_signed): New. + (cbranchhi4_virt_signed): New. + (cbranchsi4_virt): New. + * config/rl78/rl78.c: Whitespace fixes throughout. + (move_elim_pass): New. + (pass_data_rl78_move_elim): New. + (pass_rl78_move_elim): New. + (make_pass_rl78_move_elim): New. + (rl78_devirt_info): Run devirt earlier. + (rl78_move_elim_info): New. + (rl78_asm_file_start): Register it. + (rl78_split_movsi): New. + (rl78_as_legitimate_address): Allow virtual base registers when + appropriate. + (rl78_addr_space_convert): Remove spurious debug stuff. + (rl78_print_operand_1): Add z,s,S,r,E modifiers. + (rl78_print_operand): More cases for not printing '#'. + (rl78_expand_compare): Remove most of the logic. + (content_memory): New. + (clear_content_memory): New. + (get_content_index): New. + (get_content_name): New. + (display_content_memory): New. + (update_content): New. + (record_content): New. + (already_contains): New. + (insn_ok_now): Re-recog insns with virtual registers. + (add_postponed_content_update): New. + (process_postponed_content_update): New. + (gen_and_emit_move): New. + (transcode_memory_rtx): Record new location content. + Use gen_and_emit_move. + (force_into_acc): New. + (move_to_acc): Use gen_and_emit_move. + (move_from_acc): Likewise. + (move_acc_to_reg): Likewise. + (move_to_x): Likewise. + (move_to_hl): Likewise. + (move_to_de): Likewise. + (rl78_alloc_physical_registers_op1): Record location content. + (has_constraint): New. + (rl78_alloc_physical_registers_op2): Record location content. + Optimize use of HL. + (rl78_alloc_physical_registers_ro1): Likewise. + (rl78_alloc_physical_registers_cmp): Likewise. + (rl78_alloc_physical_registers_umul): Likewise. + (rl78_alloc_address_registers_macax): New. + (rl78_alloc_physical_registers): Initialize and set location + content memory as needed. + (rl78_reorg): Make sure split2 is called. + (rl78_rtx_costs): New. + +2013-09-11 Richard Sandiford <rdsandiford@googlemail.com> + + * simplify-rtx.c (simplify_unary_operation_1): Use simplify_gen_binary + for (not (neg ...)) and (neg (not ...)) cases. + +2013-09-11 Richard Biener <rguenther@suse.de> + + PR middle-end/58377 + * passes.def: Split critical edges before late uninit warning passes. + * tree-cfg.c (pass_split_crit_edges): Implement clone method. + +2013-09-11 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58385 + * fold-const.c (build_range_check): If both low and high are NULL, + use omit_one_operand_loc to preserve exp side-effects. + +2013-09-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_shiftsi3): New alternative l/l/M. + +2013-09-11 Richard Biener <rguenther@suse.de> + + * tree-data-ref.c (dump_rdg_vertex, debug_rdg_vertex, + dump_rdg_component, debug_rdg_component, dump_rdg, debug_rdg, + dot_rdg_1, dot_rdg, rdg_vertex_for_stmt, create_rdg_edge_for_ddr, + create_rdg_edges_for_scalar, create_rdg_edges, create_rdg_vertices, + stmts_from_loop, known_dependences_p, build_empty_rdg, + build_rdg, free_rdg, rdg_defs_used_in_other_loops_p): Move ... + * tree-loop-distribution.c: ... here. + * tree-data-ref.h (struct rdg_vertex, RDGV_STMT, RDGV_DATAREFS, + RDGV_HAS_MEM_WRITE, RDGV_HAS_MEM_READS, RDG_STMT, RDG_DATAREFS, + RDG_MEM_WRITE_STMT, RDG_MEM_READS_STMT, enum rdg_dep_type, + struct rdg_edge, RDGE_TYPE, RDGE_LEVEL, RDGE_RELATION): Move ... + * tree-loop-distribution.c: ... here. + * tree-loop-distribution.c: Include gimple-pretty-print.h. + (struct partition_s): Add loops member. + (partition_alloc, partition_free, rdg_flag_uses, rdg_flag_vertex, + rdg_flag_vertex_and_dependent, rdg_flag_loop_exits, + build_rdg_partition_for_component, rdg_build_partitions): Adjust. + +2013-09-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * config/i386/constraints.md (k): New. + (Yk): Ditto. + * config/i386/i386.c (const regclass_map): Add new mask registers. + (dbx_register_map): Ditto. + (dbx64_register_map): Ditto. + (svr4_dbx_register_map): Ditto. + (ix86_conditional_register_usage): Squash mask registers if AVX512F is + disabled. + (ix86_preferred_reload_class): Disable constants for mask registers. + (ix86_secondary_reload): Do spill of mask register using 32-bit insn. + (ix86_hard_regno_mode_ok): Support new mask registers. + (x86_order_regs_for_local_alloc): Ditto. + * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Update. + (FIXED_REGISTERS): Add new mask registers. + (CALL_USED_REGISTERS): Ditto. + (REG_ALLOC_ORDER): Ditto. + (VALID_MASK_REG_MODE): New. + (FIRST_MASK_REG): Ditto. + (LAST_MASK_REG): Ditto. + (reg_class): Add MASK_EVEX_REGS, MASK_REGS. + (MAYBE_MASK_CLASS_P): New. + (REG_CLASS_NAMES): Add MASK_EVEX_REGS, MASK_REGS. + (REG_CLASS_CONTENTS): Ditto. + (MASK_REGNO_P): New. + (ANY_MASK_REG_P): Ditto. + (HI_REGISTER_NAMES): Add new mask registers. + * config/i386/i386.md (MASK0_REG, MASK1_REG, MASK2_REG, MASK3_REG, + MASK4_REG, MASK5_REG, MASK6_REG, MASK7_REG): Constants for new + mask registers. + (attribute "type"): Add mskmov, msklog. + (attribute "length_immediate"): Support them. + (attribute "memory"): Ditto. + (attribute "prefix_0f"): Ditto. + (*movhi_internal): Support new mask registers. + (*movqi_internal): Ditto. + (define_split): Split out clobber pattern is a logic + insn on mask registers. + (*k<logic><mode>): New. + (*andhi_1): Extend to support mask regs. + (*andqi_1): Extend to support mask regs. + (kandn<mode>): New. + (define_split): Split and-not to and and not if operands + are not mask regs. + (*<code><mode>_1): Separate HI mode to new pattern... + (*<code>hi_1): This. + (*<code>qi_1): Extend to support mask regs. + (kxnor<mode>): New. + (kortestzhi): Ditto. + (kortestchi): Ditto. + (kunpckhi): Ditto. + (*one_cmpl<mode>2_1): Remove HImode and handle it... + (*one_cmplhi2_1): ...Here, now with mask registers support. + (*one_cmplqi2_1): Support new mask registers. + (HI/QImode arithmetics splitter): Don't split if mask registers + are used. + (HI/QImode not splitter): Ditto. + * config/i386/predicated.md (mask_reg_operand): New. + (general_reg_operand): Ditto. + +2013-09-11 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * doc/invoke.texi: Document fxsr, xsave and xsaveopt options. + * doc/extend.texi: Document fxsr, xsave and xsaveopt builtins. + +2013-09-10 Jeff Law <law@redhat.com> + + PR tree-optimization/58380 + * tree-ssa-threadupdate.c (thread_block): Recognize another case + of threading through a buried loop header. + + * tree-ssa-threadedge.c (thread_around_empty_blocks): Correct + return value for single successor case. + +2013-09-10 Jan Hubicka <jh@suse.cz> + + * ipa-devirt.c (ipa_devirt): Enable with LTO. + +2013-09-10 Richard Earnshaw <rearnsha@arm.com> + + PR target/58361 + * arm/vfp.md (combine_vcvt_f32_<FCVTI32typename>): Fix pattern to + support conditional execution. + (combine_vcvt_f64_<FCVTI32typename>): Likewise. + +2013-09-10 Vladimir Makarov <vmakarov@redhat.com> + + * lra.c (lra): Clear lra_optional_reload_pseudos before every + constraint pass. + * lra-constraints.c (curr_insn_transform): Switch on optional reloads. + Check destination too to check move insn. + (undo_optional_reloads): Add check that the original peudo did not + changed its allocation and the optional reload was inherited on last + inheritance pass. Break loop after deciding to keep optional reload. + (lra_undo_inheritance): Add check that inherited pseudo still in + memory. + +2013-09-10 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md (generic_sched): New. + * config/aarch64/aarch64-generic.md (load): Make conditional + on generic_sched attribute. + (nonload): Likewise. + +2013-09-10 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c: Include ipa-utils.h. + (compute_ltrans_boundary): Also add possible targets into the boundary. + +2013-09-10 Jan Hubicka <jh@suse.cz> + + * gimple-fold.c (gimple_get_virt_method_for_binfo): Pass real + VAR_DECL of vtable rather than full expression. + +2013-09-10 Jan Hubicka <jh@suse.cz> + Paolo Carlini <paolo.carlini@oracle.com> + + * cgraphunit.c (analyze_functions): Save input_location, set it + to UNKNOWN_LOCATION and restore it at the end. + +2013-09-10 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (propagate_constants_topo): Do not ignore SCC + represented by a thunk. + +2013-09-10 Jeff Law <law@redhat.com> + + PR tree-optimization/58343 + * tree-ssa-threadupdate.c (thread_block): Identify and disable + jump threading requests through loop headers buried in the middle + of a jump threading path. + + * tree-ssa-threadedge.c (thread_around_empty_blocks): Fix thinko + in return value/type. + +2013-09-10 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58365 + * cfgcleanup.c (merge_memattrs): Also clear MEM_READONLY_P + resp. MEM_NOTRAP_P if they differ, or set MEM_VOLATILE_P if + it differs. + +2013-09-10 Richard Biener <rguenther@suse.de> + + * tree-data-ref.h (build_rdg): Drop all parameters but loop. + * tree-data-ref.c (create_rdg_vertices): Collect all data + references, signal failure to the caller, use data-ref API. + (build_rdg): Compute data references only once. Maintain lifetime + of data references and data dependences from within RDG. + (free_rdg): Free dependence relations. + * tree-loop-distribution.c (rdg_flag_uses): Drop weird code + inventing extra dependences. + (distribute_loop): Update for RDG API changes. + +2013-09-10 Kai Tietz <ktietz@redhat.com> + + * doc/invoke.texi (fms-extensions): Document changed + behavior for ms-abi targets. + * config/i386/i386.c (ix86_option_override_internal): + Set default value of option -fms-extension for ms-abi targets. + +2013-09-10 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> + + * config/i386/i386.c (ix86_expand_movmem): Fix epilogue generation. + +2013-09-10 Alan Modra <amodra@gmail.com> + + PR target/58330 + * config/rs6000/rs6000.md (bswapdi2_64bit): Disable for volatile mems. + +2013-09-10 Alan Modra <amodra@gmail.com> + + * config/rs6000/predicates.md (add_cint_operand): New. + (reg_or_add_cint_operand, small_toc_ref): Use add_cint_operand. + * config/rs6000/rs6000.md (largetoc_high_plus): Restrict offset + using add_cint_operand. + (largetoc_high_plus_aix): Likewise. + +2013-09-09 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58364 + * tree-ssa-reassoc.c (init_range_entry): For BIT_NOT_EXPR on + BOOLEAN_TYPE, only invert in_p and continue with arg0 if + the current range can't be an unconditional true or false. + +2013-09-09 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vrsqrte_f64): Fix parameter type. + +2013-09-09 Uros Bizjak <ubizjak@gmail.com> + + * ipa-prop.c (ipa_modify_call_arguments): Initialize deref_align. + +2013-09-09 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/43452 + * doc/invoke.texi (-Wdelete-incomplete): Document it. + +2013-09-09 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_preferred_reload_class): Return + NO_REGS for immediate that can't be moved directly into FP_REGS. + +2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for + comparison with negated operand. + * config/aarch64/aarch64.md (compare_neg<mode>): Match canonical + RTL form. + +2013-09-09 Richard Biener <rguenther@suse.de> + + PR middle-end/58326 + * cfgloopmanip.c (fix_bb_placements): When fixing the placement + of a subloop record all its block as affecting loop-closed SSA form. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * expmed.c (lshift_value): Take an unsigned HOST_WIDE_INT instead + of an rtx/bitpos pair. + (store_fixed_bit_field): Update accordingly. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * asan.c (asan_emit_stack_protection): Use gen_int_mode instead of + GEN_INT. + * builtins.c (expand_errno_check): Likewise. + * dwarf2cfi.c (init_return_column_size): Likewise. + * except.c (sjlj_mark_call_sites): Likewise. + * expr.c (move_by_pieces_1, store_by_pieces_2): Likewise. + * lra-constraints.c (emit_inc): Likewise. + * ree.c (combine_set_extension): Likewise. + * regmove.c (fixup_match_2): Likewise. + * reload1.c (inc_for_reload): Likewise. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * combine.c (simplify_set, expand_field_assignment, extract_left_shift) + (force_to_mode, simplify_shift_const_1, simplify_comparison): + Use gen_int_mode with the mode of the associated simplify_* call. + * explow.c (probe_stack_range, anti_adjust_stack_and_probe): Likewise. + * expmed.c (expand_shift_1): Likewise. + * function.c (instantiate_virtual_regs_in_insn): Likewise. + * loop-iv.c (iv_number_of_iterations): Likewise. + * loop-unroll.c (unroll_loop_runtime_iterations): Likewise. + * simplify-rtx.c (simplify_binary_operation_1): Likewise. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * asan.c (asan_clear_shadow): Use gen_int_mode with the mode + of the associated expand_* call. + (asan_emit_stack_protection): Likewise. + * builtins.c (round_trampoline_addr): Likewise. + * explow.c (allocate_dynamic_stack_space, probe_stack_range): Likewise. + * expmed.c (expand_smod_pow2, expand_sdiv_pow2, expand_divmod) + (emit_store_flag): Likewise. + * expr.c (emit_move_resolve_push, push_block, emit_single_push_insn_1) + (emit_push_insn, optimize_bitfield_assignment_op, expand_expr_real_1): + Likewise. + * function.c (instantiate_virtual_regs_in_insn): Likewise. + * ifcvt.c (noce_try_store_flag_constants): Likewise. + * loop-unroll.c (unroll_loop_runtime_iterations): Likewise. + * modulo-sched.c (generate_prolog_epilog): Likewise. + * optabs.c (expand_binop, widen_leading, expand_doubleword_clz) + (expand_ctz, expand_ffs, expand_unop): Likewise. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * alias.c (addr_side_effect_eval): Use gen_int_mode with the mode + of the associated gen_rtx_* call. + * caller-save.c (init_caller_save): Likewise. + * combine.c (find_split_point, make_extraction): Likewise. + (make_compound_operation): Likewise. + * dwarf2out.c (mem_loc_descriptor): Likewise. + * explow.c (plus_constant, probe_stack_range): Likewise. + * expmed.c (expand_mult_const): Likewise. + * expr.c (emit_single_push_insn_1, do_tablejump): Likewise. + * reload1.c (init_reload): Likewise. + * valtrack.c (cleanup_auto_inc_dec): Likewise. + * var-tracking.c (adjust_mems): Likewise. + * modulo-sched.c (sms_schedule): Likewise, but use gen_rtx_GT + rather than gen_rtx_fmt_ee. + +2013-09-09 Jan Hubicka <jh@suse.cz> + + PR middle-end/58294 + * value-prof.c (gimple_ic): Copy also abnormal edges. + +2013-09-09 Richard Sandiford <rdsandiford@googlemail.com> + + * asan.c (asan_shadow_cst): Use gen_int_mode. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * ipa-profile.c: Add toplevel comment. + (ipa_propagate_frequency_1): Be more conservative when profile is read. + (contains_hot_call_p): New function. + (ipa_propagate_frequency): Set frequencies based on counts when + profile is read. + * predict.c (compute_function_frequency): Use PROFILE_READ gueard for + profile; do not tamper with profile after inlining if it is read. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * ipa-prop.c (try_make_edge_direct_simple_call): Do not special case + speculative edges. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * ipa.c (walk_polymorphic_call_targets): Fix redirection before IPA + summary generation. + +2013-09-08 Jeff Law <law@redhat.com> + + PR bootstrap/58340 + * tree-ssa-threadedge.c (thread_across_edge): Fix initialization + of 'found'. + +2013-09-08 Andi Kleen <ak@linux.intel.com> + + * tree-inline.c (estimate_num_insns): Limit asm cost to 1000. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * ipa.c (walk_polymorphic_call_targets): Fix inliner summary update. + +2013-09-08 Richard Sandiford <rdsandiford@googlemail.com> + + * ira.c (update_equiv_regs): Only call set_paradoxical_subreg + for non-debug insns. + * lra.c (new_insn_reg): Take the containing insn as a parameter. + Only modify lra_reg_info[].biggest_mode if it's non-debug insn. + (collect_non_operand_hard_regs, add_regs_to_insn_regno_info): Update + accordingly. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * cgraphunit.c (walk_polymorphic_call_targets): Permit 0 possible + targets and devirtualize to BUILT_IN_UNREACHABLE. + * timevar.def (TV_IPA_UNREACHABLE): New timevar. + * ipa.c (walk_polymorphic_call_targets): New function. + (symtab_remove_unreachable_nodes): Use it; do not keep all virtual + functions; use the new timevar. + * ipa-devirt.c (maybe_record_node): Do not insert static nodes that + was removed from the program. + (record_binfo): If BINFO corresponds to an anonymous namespace, we may + not consider it in the walk when its vtable is dead. + (possible_polymorphic_call_targets_1): Pass anonymous flag to + record_binfo. + (devirt_variable_node_removal_hook): New function. + (possible_polymorphic_call_targets): Also register + devirt_variable_node_removal_hook. + (ipa_devirt): Do not do non-speculative devirtualization. + (gate_ipa_devirt): One execute if devirtualizing speculatively. + +2013-09-08 Jan Hubicka <jh@suse.cz> + + * cgraph.h (varpool_node_hook, varpool_node_hook_list, + varpool_add_node_removal_hook, varpool_add_variable_insertion_hook, + varpool_remove_variable_insertion_hook): Declare. + * varpool.c (varpool_node_hook_list): New structure. + (first_varpool_node_removal_hook, + first_varpool_variable_insertion_hook): New variables. + (varpool_add_node_removal_hook, varpool_remove_node_removal_hook, + varpool_call_node_removal_hooks, varpool_add_variable_insertion_hook, + varpool_remove_variable_insertion_hook, + varpool_call_variable_insertion_hooks): New functions. + (varpool_remove_node): Use it. + +2013-09-08 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/54941 + * diagnostic.c (diagnostic_build_prefix): When s.file is + "<built-in>" don't output line and column numbers. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + * cgraphunit.c (expand_thunk): Get body before touching arguments. + * lto-streamer-out.c: Stream thunks, too. + * lto-streamer-in.c (input_function): Pop cfun here + (lto_read_body): Instead of here. + +2013-09-06 Caroline Tice <cmtice@google.com> + + * doc/install.texi: Add documentation for the --enable-vtable-verify + and the --disable-libvtv configure options. + +2013-09-06 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (cprop_into_successor_phis): Also propagate + edge implied equivalences into successor phis. + +2013-09-06 Joern Rennecke <joern.rennecke@embecosm.com> + + * resource.c (mark_referenced_resources): Handle COND_EXEC. + +2013-09-06 Claudiu Zissulescu <claziss@synopsys.com> + + * resource.c (mark_target_live_regs): Compute resources taking + into account if a call is predicated or not. + +2013-09-06 Eric Botcazou <ebotcazou@adacore.com> + + * toplev.c (output_stack_usage): Be prepared for suffixes created by + the compiler in the function names. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + PR middle-end/58094 + * ipa-inline.c (has_caller_p): New function. + (want_inline_function_to_all_callers_p): Use it. + (sum_callers, inline_to_all_callers): Break out from ... + (ipa_inline): ... here. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + * config/i386/i386.c (ix86_hard_regno_mode_ok): AVX modes are valid + only when AVX is enabled. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md + (*movtf_aarch64): Use neon_<ls>dm_2 as type where v8type + is fpsimd_<load/store>2. + (load_pair<mode>): Likewise. + (store_pair<mode>): Likewise. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md (type): Add "mrs" type. + * config/aarch64/aarch64.md + (aarch64_load_tp_hard): Make type "mrs". + * config/arm/arm.md + (load_tp_hard): Make type "mrs". + * config/arm/cortex-a15.md: Update with new attributes. + * config/arm/cortex-a5.md: Update with new attributes. + * config/arm/cortex-a53.md: Update with new attributes. + * config/arm/cortex-a7.md: Update with new attributes. + * config/arm/cortex-a8.md: Update with new attributes. + * config/arm/cortex-a9.md: Update with new attributes. + * config/arm/cortex-m4.md: Update with new attributes. + * config/arm/cortex-r4.md: Update with new attributes. + * config/arm/fa526.md: Update with new attributes. + * config/arm/fa606te.md: Update with new attributes. + * config/arm/fa626te.md: Update with new attributes. + * config/arm/fa726te.md: Update with new attributes. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md + (*movti_aarch64): Use "multiple" for type where v8type is "move2". + (*movtf_aarch64): Likewise. + * config/arm/arm.md + (thumb1_movdi_insn): Use "multiple" for type where more than one + instruction is used for a move. + (*arm32_movhf): Likewise. + (*thumb_movdf_insn): Likewise. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md (type): Rename fcpys to fmov. + * config/arm/vfp.md + (*arm_movsi_vfp): Rename type fcpys as fmov. + (*thumb2_movsi_vfp): Likewise + (*movhf_vfp_neon): Likewise + (*movhf_vfp): Likewise + (*movsf_vfp): Likewise + (*thumb2_movsf_vfp): Likewise + (*movsfcc_vfp): Likewise + (*thumb2_movsfcc_vfp): Likewise + * config/aarch64/aarch64-simd.md + (move_lo_quad_<mode>): Replace type mov_reg with fmovs. + * config/aarch64/aarch64.md + (*movsi_aarch64): Replace type mov_reg with fmovs. + (*movdi_aarch64): Likewise + (*movsf_aarch64): Likewise + (*movdf_aarch64): Likewise + * config/arm/arm.c + (cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV. + * config/arm/iwmmxt.md + (*iwmmxt_movsi_insn): Rename type fcpys as fmov. + * config/arm/arm1020e.md: Update with new attributes. + * config/arm/cortex-a15-neon.md: Update with new attributes. + * config/arm/cortex-a5.md: Update with new attributes. + * config/arm/cortex-a53.md: Update with new attributes. + * config/arm/cortex-a7.md: Update with new attributes. + * config/arm/cortex-a8-neon.md: Update with new attributes. + * config/arm/cortex-a9.md: Update with new attributes. + * config/arm/cortex-m4-fpu.md: Update with new attributes. + * config/arm/cortex-r4f.md: Update with new attributes. + * config/arm/marvell-pj4.md: Update with new attributes. + * config/arm/vfp11.md: Update with new attributes. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md + (*madd<mode>): Fix type attribute. + (*maddsi_uxtw): Likewise. + (*msub<mode>): Likewise. + (*msubsi_uxtw): Likewise. + (<su_optab>maddsidi4): Likewise. + (<su_optab>msubsidi4): Likewise. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md: Split fdiv<sd> as fsqrt<sd>, fdiv<sd>. + * config/arm/arm.md (core_cycles): Remove fdiv. + * config/arm/vfp.md: + (*sqrtsf2_vfp): Update for attribute changes. + (*sqrtdf2_vfp): Likewise. + * config/aarch64/aarch64.md: + (sqrt<mode>2): Update for attribute changes. + * config/arm/arm1020e.md: Update with new attributes. + * config/arm/cortex-a15-neon.md: Update with new attributes. + * config/arm/cortex-a5.md: Update with new attributes. + * config/arm/cortex-a53.md: Update with new attributes. + * config/arm/cortex-a7.md: Update with new attributes. + * config/arm/cortex-a8-neon.md: Update with new attributes. + * config/arm/cortex-a9.md: Update with new attributes. + * config/arm/cortex-m4-fpu.md: Update with new attributes. + * config/arm/cortex-r4f.md: Update with new attributes. + * config/arm/marvell-pj4.md: Update with new attributes. + * config/arm/vfp11.md: Update with new attributes. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md + (type): Split f_cvt as f_cvt, f_cvtf2i, f_cvti2f. + * config/aarch64/aarch64.md + (l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Update with + new attributes. + (fix_trunc<GPF:mode><GPI:mode>2): Likewise. + (fixuns_trunc<GPF:mode><GPI:mode>2): Likewise. + (float<GPI:mode><GPF:mode>2): Likewise. + * config/arm/vfp.md + (*truncsisf2_vfp): Update with new attributes. + (*truncsidf2_vfp): Likewise. + (fixuns_truncsfsi2): Likewise. + (fixuns_truncdfsi2): Likewise. + (*floatsisf2_vfp): Likewise. + (*floatsidf2_vfp): Likewise. + (floatunssisf2): Likewise. + (floatunssidf2): Likewise. + (*combine_vcvt_f32_<FCVTI32typename>): Likewise. + (*combine_vcvt_f64_<FCVTI32typename>): Likewise. + * config/arm/arm1020e.md: Update with new attributes. + * config/arm/cortex-a15-neon.md: Update with new attributes. + * config/arm/cortex-a5.md: Update with new attributes. + * config/arm/cortex-a53.md: Update with new attributes. + * config/arm/cortex-a7.md: Update with new attributes. + * config/arm/cortex-a8-neon.md: Update with new attributes. + * config/arm/cortex-a9.md: Update with new attributes. + * config/arm/cortex-m4-fpu.md: Update with new attributes. + * config/arm/cortex-r4f.md: Update with new attributes. + * config/arm/marvell-pj4.md: Update with new attributes. + * config/arm/vfp11.md: Update with new attributes. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vqtbl<1,2,3,4><q>_s8): Fix control vector parameter type. + (vqtbx<1,2,3,4><q>_s8): Likewise. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/types.md: Add "no_insn", "multiple" and "untyped" types. + * config/arm/arm-fixed.md: Add type attribute to all insn patterns. + (add<mode>3): Add type attribute. + (add<mode>3): Likewise. + (usadd<mode>3): Likewise. + (ssadd<mode>3): Likewise. + (sub<mode>3): Likewise. + (sub<mode>3): Likewise. + (ussub<mode>3): Likewise. + (sssub<mode>3): Likewise. + (ssmulsa3): Likewise. + (usmulusa3): Likewise. + (arm_usatsihi): Likewise. + * config/arm/vfp.md + (*movdi_vfp): Add types for all instructions. + (*movdi_vfp_cortexa8): Likewise. + (*movhf_vfp_neon): Likewise. + (*movhf_vfp): Likewise. + (*movdf_vfp): Likewise. + (*thumb2_movdf_vfp): Likewise. + (*thumb2_movdfcc_vfp): Likewise. + * config/arm/arm.md: Add type attribute to all insn patterns. + (*thumb1_adddi3): Add type attribute. + (*arm_adddi3): Likewise. + (*adddi_sesidi_di): Likewise. + (*adddi_zesidi_di): Likewise. + (*thumb1_addsi3): Likewise. + (addsi3_compare0): Likewise. + (*addsi3_compare0_scratch): Likewise. + (*compare_negsi_si): Likewise. + (cmpsi2_addneg): Likewise. + (*addsi3_carryin_<optab>): Likewise. + (*addsi3_carryin_alt2_<optab>): Likewise. + (*addsi3_carryin_clobercc_<optab>): Likewise. + (*subsi3_carryin): Likewise. + (*subsi3_carryin_const): Likewise. + (*subsi3_carryin_compare): Likewise. + (*subsi3_carryin_compare_const): Likewise. + (*arm_subdi3): Likewise. + (*thumb_subdi3): Likewise. + (*subdi_di_zesidi): Likewise. + (*subdi_di_sesidi): Likewise. + (*subdi_zesidi_di): Likewise. + (*subdi_sesidi_di): Likewise. + (*subdi_zesidi_ze): Likewise. + (thumb1_subsi3_insn): Likewise. + (*arm_subsi3_insn): Likewise. + (*anddi3_insn): Likewise. + (*anddi_zesidi_di): Likewise. + (*anddi_sesdi_di): Likewise. + (*ne_zeroextracts): Likewise. + (*ne_zeroextracts): Likewise. + (*ite_ne_zeroextr): Likewise. + (*ite_ne_zeroextr): Likewise. + (*anddi_notdi_di): Likewise. + (*anddi_notzesidi): Likewise. + (*anddi_notsesidi): Likewise. + (andsi_notsi_si): Likewise. + (thumb1_bicsi3): Likewise. + (*iordi3_insn): Likewise. + (*iordi_zesidi_di): Likewise. + (*iordi_sesidi_di): Likewise. + (*thumb1_iorsi3_insn): Likewise. + (*xordi3_insn): Likewise. + (*xordi_zesidi_di): Likewise. + (*xordi_sesidi_di): Likewise. + (*arm_xorsi3): Likewise. + (*andsi_iorsi3_no): Likewise. + (*smax_0): Likewise. + (*smax_m1): Likewise. + (*arm_smax_insn): Likewise. + (*smin_0): Likewise. + (*arm_smin_insn): Likewise. + (*arm_umaxsi3): Likewise. + (*arm_uminsi3): Likewise. + (*minmax_arithsi): Likewise. + (*minmax_arithsi_): Likewise. + (*satsi_<SAT:code>): Likewise. + (arm_ashldi3_1bit): Likewise. + (arm_ashrdi3_1bit): Likewise. + (arm_lshrdi3_1bit): Likewise. + (*arm_negdi2): Likewise. + (*thumb1_negdi2): Likewise. + (*arm_negsi2): Likewise. + (*thumb1_negsi2): Likewise. + (*negdi_extendsid): Likewise. + (*negdi_zero_extend): Likewise. + (*arm_abssi2): Likewise. + (*thumb1_abssi2): Likewise. + (*arm_neg_abssi2): Likewise. + (*thumb1_neg_abss): Likewise. + (one_cmpldi2): Likewise. + (extend<mode>di2): Likewise. + (*compareqi_eq0): Likewise. + (*arm_extendhisi2addsi): Likewise. + (*arm_movdi): Likewise. + (*thumb1_movdi_insn): Likewise. + (*arm_movt): Likewise. + (*thumb1_movsi_insn): Likewise. + (pic_add_dot_plus_four): Likewise. + (pic_add_dot_plus_eight): Likewise. + (tls_load_dot_plus_eight): Likewise. + (*thumb1_movhi_insn): Likewise. + (*thumb1_movsf_insn): Likewise. + (*movdf_soft_insn): Likewise. + (*thumb_movdf_insn): Likewise. + (cbranchsi4_insn): Likewise. + (cbranchsi4_scratch): Likewise. + (*negated_cbranchsi4): Likewise. + (*tbit_cbranch): Likewise. + (*tlobits_cbranch): Likewise. + (*tstsi3_cbranch): Likewise. + (*cbranchne_decr1): Likewise. + (*addsi3_cbranch): Likewise. + (*addsi3_cbranch_scratch): Likewise. + (*arm_cmpdi_insn): Likewise. + (*arm_cmpdi_unsig): Likewise. + (*arm_cmpdi_zero): Likewise. + (*thumb_cmpdi_zero): Likewise. + (*deleted_compare): Likewise. + (*mov_scc): Likewise. + (*mov_negscc): Likewise. + (*mov_notscc): Likewise. + (*cstoresi_eq0_thumb1_insn): Likewise. + (cstoresi_nltu_thumb1): Likewise. + (cstoresi_ltu_thu): Likewise. + (thumb1_addsi3_addgeu): Likewise. + (*arm_jump): Likewise. + (*thumb_jump): Likewise. + (*check_arch2): Likewise. + (arm_casesi_internal): Likewise. + (thumb1_casesi_dispatch): Likewise. + (*arm_indirect_jump): Likewise. + (*thumb1_indirect_jump): Likewise. + (nop): Likewise. + (*and_scc): Likewise. + (*ior_scc): Likewise. + (*compare_scc): Likewise. + (*cond_move): Likewise. + (*cond_arith): Likewise. + (*cond_sub): Likewise. + (*cmp_ite0): Likewise. + (*cmp_ite1): Likewise. + (*cmp_and): Likewise. + (*cmp_ior): Likewise. + (*ior_scc_scc): Likewise. + (*ior_scc_scc_cmp): Likewise. + (*and_scc_scc): Likewise. + (*and_scc_scc_cmp): Likewise. + (*and_scc_scc_nod): Likewise. + (*negscc): Likewise. + (movcond_addsi): Likewise. + (movcond): Likewise. + (*ifcompare_plus_move): Likewise. + (*if_plus_move): Likewise. + (*ifcompare_move_plus): Likewise. + (*if_move_plus): Likewise. + (*ifcompare_arith_arith): Likewise. + (*if_arith_arith): Likewise. + (*ifcompare_arith_move): Likewise. + (*if_arith_move): Likewise. + (*ifcompare_move_arith): Likewise. + (*if_move_arith): Likewise. + (*ifcompare_move_not): Likewise. + (*if_move_not): Likewise. + (*ifcompare_not_move): Likewise. + (*if_not_move): Likewise. + (*ifcompare_shift_move): Likewise. + (*if_shift_move): Likewise. + (*ifcompare_move_shift): Likewise. + (*if_move_shift): Likewise. + (*ifcompare_shift_shift): Likewise. + (*ifcompare_not_arith): Likewise. + (*ifcompare_arith_not): Likewise. + (*if_arith_not): Likewise. + (*ifcompare_neg_move): Likewise. + (*if_neg_move): Likewise. + (*ifcompare_move_neg): Likewise. + (*if_move_neg): Likewise. + (prologue_thumb1_interwork): Likewise. + (*cond_move_not): Likewise. + (*sign_extract_onebit): Likewise. + (*not_signextract_onebit): Likewise. + (stack_tie): Likewise. + (align_4): Likewise. + (align_8): Likewise. + (consttable_end): Likewise. + (consttable_1): Likewise. + (consttable_2): Likewise. + (consttable_4): Likewise. + (consttable_8): Likewise. + (consttable_16): Likewise. + (*thumb1_tablejump): Likewise. + (prefetch): Likewise. + (force_register_use): Likewise. + (thumb_eh_return): Likewise. + (load_tp_hard): Likewise. + (load_tp_soft): Likewise. + (tlscall): Likewise. + (*arm_movtas_ze): Likewise. + (*arm_rev): Likewise. + (*arm_revsh): Likewise. + (*arm_rev16): Likewise. + * config/arm/thumb2.md + (*thumb2_smaxsi3): Likewise. + (*thumb2_sminsi3): Likewise. + (*thumb32_umaxsi3): Likewise. + (*thumb2_uminsi3): Likewise. + (*thumb2_negdi2): Likewise. + (*thumb2_abssi2): Likewise. + (*thumb2_neg_abss): Likewise. + (*thumb2_movsi_insn): Likewise. + (tls_load_dot_plus_four): Likewise. + (*thumb2_movhi_insn): Likewise. + (*thumb2_mov_scc): Likewise. + (*thumb2_mov_negs): Likewise. + (*thumb2_mov_negs): Likewise. + (*thumb2_mov_nots): Likewise. + (*thumb2_mov_nots): Likewise. + (*thumb2_movsicc_): Likewise. + (*thumb2_movsfcc_soft_insn): Likewise. + (*thumb2_indirect_jump): Likewise. + (*thumb2_and_scc): Likewise. + (*thumb2_ior_scc): Likewise. + (*thumb2_ior_scc_strict_it): Likewise. + (*thumb2_cond_move): Likewise. + (*thumb2_cond_arith): Likewise. + (*thumb2_cond_ari): Likewise. + (*thumb2_cond_sub): Likewise. + (*thumb2_negscc): Likewise. + (*thumb2_movcond): Likewise. + (thumb2_casesi_internal): Likewise. + (thumb2_casesi_internal_pic): Likewise. + (*thumb2_alusi3_short): Likewise. + (*thumb2_mov<mode>_shortim): Likewise. + (*thumb2_addsi_short): Likewise. + (*thumb2_subsi_short): Likewise. + (thumb2_addsi3_compare0): Likewise. + (*thumb2_cbz): Likewise. + (*thumb2_cbnz): Likewise. + (*thumb2_one_cmplsi2_short): Likewise. + (*thumb2_negsi2_short): Likewise. + (*orsi_notsi_si): Likewise. + * config/arm/arm1020e.md: Update with new attributes. + * config/arm/arm1026ejs.md: Update with new attributes. + * config/arm/arm1136jfs.md: Update with new attributes. + * config/arm/arm926ejs.md: Update with new attributes. + * config/arm/cortex-a15.md: Update with new attributes. + * config/arm/cortex-a5.md: Update with new attributes. + * config/arm/cortex-a53.md: Update with new attributes. + * config/arm/cortex-a7.md: Update with new attributes. + * config/arm/cortex-a8.md: Update with new attributes. + * config/arm/cortex-a9.md: Update with new attributes. + * config/arm/cortex-m4.md: Update with new attributes. + * config/arm/cortex-r4.md: Update with new attributes. + * config/arm/fa526.md: Update with new attributes. + * config/arm/fa606te.md: Update with new attributes. + * config/arm/fa626te.md: Update with new attributes. + * config/arm/fa726te.md: Update with new attributes. + +2013-09-06 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_sqdml<SBINQOPS:as>l_n<mode>_internal): Use + <vwx> iterator to ensure correct register choice. + (aarch64_sqdml<SBINQOPS:as>l2_n<mode>_internal): Likewise. + (aarch64_sqdmull_n<mode>): Likewise. + (aarch64_sqdmull2_n<mode>_internal): Likewise. + * config/aarch64/arm_neon.h + (vml<as><q>_lane<q>_<su>16): Use 'x' constraint for element vector. + (vml<as><q>_n_<su>16): Likewise. + (vml<as>l_high_lane<q>_<su>16): Likewise. + (vml<as>l_high_n_<su>16): Likewise. + (vml<as>l_lane<q>_<su>16): Likewise. + (vml<as>l_n_<su>16): Likewise. + (vmul<q>_lane<q>_<su>16): Likewise. + (vmul<q>_n_<su>16): Likewise. + (vmull_lane<q>_<su>16): Likewise. + (vmull_n_<su>16): Likewise. + (vmull_high_lane<q>_<su>16): Likewise. + (vmull_high_n_<su>16): Likewise. + (vqrdmulh<q>_n_s16): Likewise. + +2013-09-06 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/arm_neon.h: Fix all vdup<bhsd_lane<q> intrinsics to + have the correct lane parameter. + +2013-09-06 Richard Biener <rguenther@suse.de> + + * cfganal.c (control_dependences::~control_dependences): + Properly free all of the vector. + +2013-09-06 Kirill Yukhin <kirill.yukhin@intel.com> + + PR target/58269 + * config/i386/i386.c (ix86_conditional_register_usage): + Proper initialize extended SSE registers. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/58311 + * ipa-devirt.c (gate_ipa_devirt): Only execute when optimizing. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + * Makefile.in (tree-sra.o): Update dependencies. + * tree-sra.c: Include ipa-utils.h + (scan_function): Use recursive_call_p. + (has_caller_p): New function. + (cgraph_for_node_and_aliases): Count also callers of aliases. + +2013-09-06 Jan Hubicka <jh@suse.cz> + + PR middle-end/58094 + * cgraph.h (symtab_semantically_equivalent_p): Declare. + * tree-tailcall.c: Include ipa-utils.h. + (find_tail_calls): Use it. + * ipa-pure-const.c (check_call): Likewise. + * ipa-utils.c (recursive_call_p): New function. + * ipa-utils.h (recursive_call_p): Dclare. + * symtab.c (symtab_nonoverwritable_alias): Fix formatting. + (symtab_semantically_equivalent_p): New function. + * Makefile.in (tree-tailcall.o): Update dependencies. + +2013-09-06 Eric Botcazou <ebotcazou@adacore.com> + + * ipa-split.c (split_function): Set DECL_NO_INLINE_WARNING_P on the + non-inlinable part. + +2013-09-06 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (lto_global_var_decls): Remove. + * Makefile.in (OBJS): Remove lto-symtab.o. + (lto-symtab.o): Remove. + (GTFILES): Remove lto-symtab.c + * lto-symtab.c: Move to lto/ + +2013-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md (UNSPEC_FPINT_FLOOR, UNSPEC_FPINT_BTRUNC) + (UNSPEC_FPINT_ROUND, UNSPEC_FPINT_CEIL, UNSPEC_FPINT_NEARBYINT) + (UNSPEC_FPINT_RINT): New constant definitions. + (FPINT, fpint_name, fpint_roundingmode): New integer iterator + definition with 2 attributes. + ("<FPINT:fpint_name><BFP:mode>2", "rint<BFP:mode>2") + ("<FPINT:fpint_name><DFP:mode>2", "rint<DFP:mode>2"): New pattern + definitions. + +2013-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md: Add "bcr_flush" value to mnemonic attribute. + ("mem_thread_fence_1"): Use bcr 14,0 for z196 and later. + Set the mnemonic attribute to "bcr_flush". Set the "z196prop" + attribute to "z196_alone". + * config/s390/2827.md: Add "bcr_flush" to "ooo_groupalone" and + "zEC12_simple". + +2013-09-06 Richard Biener <rguenther@suse.de> + + * basic-block.h (class control_dependences): New. + * tree-ssa-dce.c (control_dependence_map): Remove. + (cd): New global. + (EXECUTE_IF_CONTROL_DEPENDENT): Remove. + (set_control_dependence_map_bit, clear_control_dependence_bitmap, + find_pdom, find_control_dependence, find_all_control_dependences): + Move to cfganal.c. + (mark_control_dependent_edges_necessary, + find_obviously_necessary_stmts, propagate_necessity, tree_dce_init, + tree_dce_done, perform_tree_ssa_dce): Adjust. + * cfganal.c (set_control_dependence_map_bit, + clear_control_dependence_bitmap, find_pdom, find_control_dependence, + find_all_control_dependences): Move from tree-ssa-dce.c and + implement as methods of control_dependences class. + (control_dependences::control_dependences): New. + (control_dependences::~control_dependences): Likewise. + (control_dependences::get_edges_dependent_on): Likewise. + (control_dependences::get_edge): Likewise. + +2013-09-04 Jan Hubicka <jh@suse.cz> + + * tree.c (types_same_for_odr): Drop overactive check. + * ipa-devirt.c (hash_type_name): Likewise. + +2013-09-04 Jan Hubicka <jh@suse.cz> + + * cgraphunit.c (walk_polymorphic_call_targets): Break out from ... + (analyze_functions): ... here. + +2013-09-04 Jan Hubicka <jh@suse.cz> + + PR middle-end/58201 + * cgraphunit.c (analyze_functions): Clear AUX fields + after processing; initialize assembler name has. + +2013-09-05 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_around_empty_blocks): Renamed + from thread_around_empty_block. Record threading path into PATH. + Recurse if threading through the initial block is successful. + (thread_across_edge): Corresponding changes to slightly simplify. + +2013-09-05 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md + (type): Remove frecpe, frecps, frecpx. + (aarch64_frecp<FRECP:frecp_suffix><mode>): Move to aarch64-simd.md, + fix to be a TARGET_SIMD instruction. + (aarch64_frecps): Remove. + * config/aarch64/aarch64-simd.md + (aarch64_frecp<FRECP:frecp_suffix><mode>): New, moved from aarch64.md + (aarch64_frecps<mode>): Handle all float/vector of float modes. + +2013-09-05 James Greenhalgh <james.greenhalgh@arm.com> + Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/types.md (define_attr "type"): Expand "arlo_imm" + into "adr", "alu_imm", "alus_imm", "logic_imm", "logics_imm". + Expand "arlo_reg" into "adc_reg", "adc_imm", "adcs_reg", "adcs_imm", + "alu_ext", "alu_reg", "alus_ext", "alus_reg", "bfm", "csel", + "logic_reg", "logics_reg", "rev". Expand "arlo_shift" into + "alu_shift_imm", "alus_shift_imm", "logic_shift_imm", + "logics_shift_imm". Expand "arlo_shift_reg" into "alu_shift_reg", + "alus_shift_reg", "logic_shift_reg", "logics_shift_reg". Expand "clz" + into "clz, "rbit". Rename "shift" to "shift_imm". + * config/arm/arm.md (define_attr "core_cycles"): Update for attribute + changes. Update for attribute changes all occurrences of arlo_* and + shift* types. + * config/arm/arm-fixed.md: Update for attribute changes + all occurrences of arlo_* types. + * config/arm/thumb2.md: Update for attribute changes all occurrences + of arlo_* types. + * config/arm/arm.c (xscale_sched_adjust_cost): (rtx insn, rtx + (cortexa7_older_only): Likewise. + (cortexa7_younger): Likewise. + * config/arm/arm1020e.md (1020alu_op): Update for attribute changes. + (1020alu_shift_op): Likewise. + (1020alu_shift_reg_op): Likewise. + * config/arm/arm1026ejs.md (alu_op): Update for attribute changes. + (alu_shift_op): Likewise. + (alu_shift_reg_op): Likewise. + * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes. + (11_alu_shift_op): Likewise. + (11_alu_shift_reg_op): Likewise. + * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes. + (9_alu_shift_reg_op): Likewise. + * config/arm/cortex-a15.md (cortex_a15_alu): Update for + attribute changes. + (cortex_a15_alu_shift): Likewise. + (cortex_a15_alu_shift_reg): Likewise. + * config/arm/cortex-a5.md (cortex_a5_alu): Update for + attribute changes. + (cortex_a5_alu_shift): Likewise. + * config/arm/cortex-a53.md (cortex_a53_alu): Update for + attribute changes. + (cortex_a53_alu_shift): Likewise. + * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for + attribute changes. + (cortex_a7_alu_reg): Likewise. + (cortex_a7_alu_shift): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Update for + attribute changes. + (cortex_a8_alu_shift): Likewise. + (cortex_a8_alu_shift_reg): Likewise. + * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes. + (cortex_a9_dp_shift): Likewise. + * config/arm/cortex-m4.md (cortex_m4_alu): Update for + attribute changes. + * config/arm/cortex-r4.md + (cortex_r4_alu): Update for attribute changes. + (cortex_r4_mov): Likewise. + (cortex_r4_alu_shift_reg): Likewise. + * config/arm/fa526.md (526_alu_op): Update for attribute changes. + (526_alu_shift_op): Likewise. + * config/arm/fa606te.md (606te_alu_op): Update for attribute changes. + * config/arm/fa626te.md (626te_alu_op): Update for attribute changes. + (626te_alu_shift_op): Likewise. + * config/arm/fa726te.md (726te_alu_op): Update for attribute changes. + (726te_alu_shift_op): Likewise. + (726te_alu_shift_reg_op): Likewise. + * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes. + (mp626_alu_shift_op): Likewise. + * config/arm/marvell-pj4.md (pj4_alu): Update for attribute changes. + (pj4_alu_conds): Likewise. + (pj4_shift): Likewise. + (pj4_shift_conds): Likewise. + (pj4_alu_shift): Likewise. + (pj4_alu_shift_conds): Likewise. + * config/aarch64/aarch64.md: Update for attribute change + all occurrences of arlo_* and shift* types. + +2013-09-05 Mike Stump <mikestump@comcast.net> + + * tree.h: Move documentation for tree_function_decl to tree-core.h + with the declaration. + +2013-09-05 Peter Bergner <bergner@vnet.ibm.com> + + PR target/58139 + * reginfo.c (choose_hard_reg_mode): Scan through all mode classes + looking for widest mode. + +2013-09-05 Eric Botcazou <ebotcazou@adacore.com> + + * config.gcc (*-*-vxworks*): Do not override an existing extra_objs. + +2013-09-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58137 + * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): + Do not create vectors of pointers. + * tree-vect-loop.c (get_initial_def_for_induction): Use proper + types for the components of the vector initializer. + * tree-cfg.c (verify_gimple_assign_binary): Remove special-casing + allowing pointer vectors with PLUS_EXPR/MINUS_EXPR. + +2013-09-05 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.c (remove_described_reference): Accept missing references, + return false if that hppens, otherwise return true. + (cgraph_node_for_jfunc): New function. + (try_decrement_rdesc_refcount): Likewise. + (try_make_edge_direct_simple_call): Use them. + (ipa_edge_removal_hook): Remove references from rdescs. + (ipa_edge_duplication_hook): Clone rdescs and their references + when the new edge has the same caller as the old one. + * cgraph.c (cgraph_resolve_speculation): Remove speculative + reference before removing any edges. + +2013-09-05 Richard Earnshaw <rearnsha@arm.com> + + * arm.c (thumb2_emit_strd_push): Rewrite to use pre-decrement on + initial store. + * thumb2.md (thumb2_storewb_parisi): New pattern. + +2013-09-05 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64-option-extensions.def: Add + AARCH64_OPT_EXTENSION of 'crc'. + * config/aarch64/aarch64.h (AARCH64_FL_CRC): New define. + (AARCH64_ISA_CRC): Ditto. + * doc/invoke.texi (-march and -mcpu feature modifiers): Add + description of the CRC extension. + +2013-09-05 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * config/rs6000/linux64.h: Define OPTION_BIONIC and OPTION_UCLIBC. + * config/rs6000/linux.h: Ditto. + * alpha/linux.h: Ditto. + * config/bfin/uclinux.h: Define TARGET_LIBC_HAS_FUNCTION as + no_c99_libc_has_function. + * config/c6x/uclinux-elf.h: Ditto. + * config/lm32/uclinux-elf.h: Ditto. + * config/m68k/uclinux.h: Ditto. + * config/moxie/uclinux.h: Ditto. + * config.gcc (bfin*-linux-uclibc*): Add t-linux-android to tmake_file. + (crisv32-*-linux*, cris-*-linux*): Ditto. + * config/bfin/bfin.c: Include "tm_p.h". + +2013-09-05 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_operations): Properly + check for a definition without a basic-block. + +2013-09-05 James Greenhalgh <james.greenhalgh@arm.com> + Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md + (*movti_aarch64): Rename r_2_f and f_2_r. + (*movsf_aarch64): Likewise. + (*movdf_aarch64): Likewise. + (*movtf_aarch64): Likewise. + (aarch64_movdi_<mode>low): Likewise. + (aarch64_movdi_<mode>high): Likewise. + (aarch64_mov<mode>high_di): Likewise. + (aarch64_mov<mode>low_di): Likewise. + (aarch64_movtilow_tilow): Likewise. + * config/arm/arm.md (attribute "neon_type"): Delete. Move attribute + values to config/arm/types.md + (attribute "conds"): Update for attribute change. + (anddi3_insn): Likewise. + (iordi3_insn): Likewise. + (xordi3_insn): Likewise. + (one_cmpldi2): Likewise. + * config/arm/types.md (type): Add Neon types. + * config/arm/neon.md (neon_mov<mode>): Remove "neon_type" attribute, + use "type" attribute. + (movmisalign<mode>_neon_store): Likewise. + (movmisalign<mode>_neon_load): Likewise. + (vec_set<mode>_internal): Likewise. + (vec_setv2di_internal): Likewise. + (vec_extract<mode>): Likewise. + (vec_extractv2di): Likewise. + (add<mode>3_neon): Likewise. + (adddi3_neon): Likewise. + (sub<mode>3_neon): Likewise. + (subdi3_neon): Likewise. + (mul<mode>3_neon): Likewise. + (mul<mode>3add<mode>_neon): Likewise. + (mul<mode>3neg<mode>add<mode>_neon): Likewise. + (fma<VCVTF:mode>4)): Likewise. + (fma<VCVTF:mode>4_intrinsic): Likewise. + (fmsub<VCVTF:mode>4)): Likewise. + (fmsub<VCVTF:mode>4_intrinsic): Likewise. + (neon_vrint<NEON_VRINT:nvrint_variant><VCVTF:mode>): Likewise. + (ior<mode>3): Likewise. + (and<mode>3): Likewise. + (anddi3_neon): Likewise. + (orn<mode>3_neon): Likewise. + (orndi3_neon): Likewise. + (bic<mode>3_neon): Likewise. + (bicdi3_neon): Likewise. + (xor<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (abs<mode>2): Likewise. + (neg<mode>2): Likewise. + (umin<mode>3_neon): Likewise. + (umax<mode>3_neon): Likewise. + (smin<mode>3_neon): Likewise. + (smax<mode>3_neon): Likewise. + (vashl<mode>3): Likewise. + (vashr<mode>3_imm): Likewise. + (vlshr<mode>3_imm): Likewise. + (ashl<mode>3_signed): Likewise. + (ashl<mode>3_unsigned): Likewise. + (neon_load_count): Likewise. + (ashldi3_neon_noclobber): Likewise. + (signed_shift_di3_neon): Likewise. + (unsigned_shift_di3_neon): Likewise. + (ashrdi3_neon_imm_noclobber): Likewise. + (lshrdi3_neon_imm_noclobber): Likewise. + (widen_ssum<mode>3): Likewise. + (widen_usum<mode>3): Likewise. + (quad_halves_<code>v4si): Likewise. + (quad_halves_<code>v4sf): Likewise. + (quad_halves_<code>v8hi): Likewise. + (quad_halves_<code>v16qi): Likewise. + (reduc_splus_v2di): Likewise. + (neon_vpadd_internal<mode>): Likewise. + (neon_vpsmin<mode>): Likewise. + (neon_vpsmax<mode>): Likewise. + (neon_vpumin<mode>): Likewise. + (neon_vpumax<mode>): Likewise. + (ss_add<mode>_neon): Likewise. + (us_add<mode>_neon): Likewise. + (ss_sub<mode>_neon): Likewise. + (us_sub<mode>_neon): Likewise. + (neon_vadd<mode>_unspec): Likewise. + (neon_vaddl<mode>): Likewise. + (neon_vaddw<mode>): Likewise. + (neon_vhadd<mode>): Likewise. + (neon_vqadd<mode>): Likewise. + (neon_vaddhn<mode>): Likewise. + (neon_vmul<mode>): Likewise. + (neon_vmla<mode>): Likewise. + (neon_vmlal<mode>): Likewise. + (neon_vmls<mode>): Likewise. + (neon_vmlsl<mode>): Likewise. + (neon_vqdmulh<mode>): Likewise. + (neon_vqdmlal<mode>): Likewise. + (neon_vqdmlsl<mode>): Likewise. + (neon_vmull<mode>): Likewise. + (neon_vqdmull<mode>): Likewise. + (neon_vsub<mode>_unspec): Likewise. + (neon_vsubl<mode>): Likewise. + (neon_vsubw<mode>): Likewise. + (neon_vqsub<mode>): Likewise. + (neon_vhsub<mode>): Likewise. + (neon_vsubhn<mode>): Likewise. + (neon_vceq<mode>): Likewise. + (neon_vcge<mode>): Likewise. + (neon_vcgeu<mode>): Likewise. + (neon_vcgt<mode>): Likewise. + (neon_vcgtu<mode>): Likewise. + (neon_vcle<mode>): Likewise. + (neon_vclt<mode>): Likewise. + (neon_vcage<mode>): Likewise. + (neon_vcagt<mode>): Likewise. + (neon_vtst<mode>): Likewise. + (neon_vabd<mode>): Likewise. + (neon_vabdl<mode>): Likewise. + (neon_vaba<mode>): Likewise. + (neon_vabal<mode>): Likewise. + (neon_vmax<mode>): Likewise. + (neon_vmin<mode>): Likewise. + (neon_vpaddl<mode>): Likewise. + (neon_vpadal<mode>): Likewise. + (neon_vpmax<mode>): Likewise. + (neon_vpmin<mode>): Likewise. + (neon_vrecps<mode>): Likewise. + (neon_vrsqrts<mode>): Likewise. + (neon_vqabs<mode>): Likewise. + (neon_vqneg<mode>): Likewise. + (neon_vcls<mode>): Likewise. + (clz<mode>2): Likewise. + (popcount<mode>2): Likewise. + (neon_vrecpe): Likewise. + (neon_vrsqrte): Likewise. + (neon_vget_lane<mode>_sext_internal): Likewise. + (neon_vget_lane<mode>_zext_internal): Likewise. + (neon_vdup_n<mode>): Likewise. + (neon_vdup_nv2di): Likewise. + (neon_vdpu_lane<mode>_internal): Likewise. + (neon_vswp<mode>): Likewise. + (float<mode><V_cvtto>2): Likewise. + (floatuns<mode><V_cvtto>2): Likewise. + (fix_trunc<mode><V_cvtto>)2): Likewise + (fixuns_trunc<mode><V_cvtto)2): Likewise. + (neon_vcvt<mode>): Likewise. + (neon_vcvtv4sfv4hf): Likewise. + (neon_vcvtv4hfv4sf): Likewise. + (neon_vcvt_n<mode>): Likewise. + (neon_vmovn<mode>): Likewise. + (neon_vqmovn<mode>): Likewise. + (neon_vqmovun<mode>): Likewise. + (neon_vmovl<mode>): Likewise. + (neon_vmul_lane<mode>): Likewise. + (neon_vmull_lane<mode>): Likewise. + (neon_vqdmull_lane<mode>): Likewise. + (neon_vqdmulh_lane<mode>): Likewise. + (neon_vmla_lane<mode>): Likewise. + (neon_vmlal_lane<mode>): Likewise. + (neon_vqdmlal_lane<mode>): Likewise. + (neon_vmls_lane<mode>): Likewise. + (neon_vmlsl_lane<mode>): Likewise. + (neon_vqdmlsl_lane<mode>): Likewise. + (neon_vext<mode>): Likewise. + (neon_vrev64<mode>): Likewise. + (neon_vrev32<mode>): Likewise. + (neon_vrev16<mode>): Likewise. + (neon_vbsl<mode>_internal): Likewise. + (neon_vshl<mode>): Likewise. + (neon_vqshl<mode>): Likewise. + (neon_vshr_n<mode>): Likewise. + (neon_vshrn_n<mode>): Likewise. + (neon_vqshrn_n<mode>): Likewise. + (neon_vqshrun_n<mode>): Likewise. + (neon_vshl_n<mode>): Likewise. + (neon_vqshl_n<mode>): Likewise. + (neon_vqshlu_n<mode>): Likewise. + (neon_vshll_n<mode>): Likewise. + (neon_vsra_n<mode>): Likewise. + (neon_vsri_n<mode>): Likewise. + (neon_vsli_n<mode>): Likewise. + (neon_vtbl1v8qi): Likewise. + (neon_vtbl2v8qi): Likewise. + (neon_vtbl3v8qi): Likewise. + (neon_vtbl4v8qi): Likewise. + (neon_vtbx1v8qi): Likewise. + (neon_vtbx2v8qi): Likewise. + (neon_vtbx3v8qi): Likewise. + (neon_vtbx4v8qi): Likewise. + (neon_vtrn<mode>_internal): Likewise. + (neon_vzip<mode>_internal): Likewise. + (neon_vuzp<mode>_internal): Likewise. + (neon_vld1<mode>): Likewise. + (neon_vld1_lane<mode>): Likewise. + (neon_vld1_dup<mode>): Likewise. + (neon_vld1_dupv2di): Likewise. + (neon_vst1<mode>): Likewise. + (neon_vst1_lane<mode>): Likewise. + (neon_vld2<mode>): Likewise. + (neon_vld2_lane<mode>): Likewise. + (neon_vld2_dup<mode>): Likewise. + (neon_vst2<mode>): Likewise. + (neon_vst2_lane<mode>): Likewise. + (neon_vld3<mode>): Likewise. + (neon_vld3qa<mode>): Likewise. + (neon_vld3qb<mode>): Likewise. + (neon_vld3_lane<mode>): Likewise. + (neon_vld3_dup<mode>): Likewise. + (neon_vst3<mode>): Likewise. + (neon_vst3qa<mode>): Likewise. + (neon_vst3qb<mode>): Likewise. + (neon_vst3_lane<mode>): Likewise. + (neon_vld4<mode>): Likewise. + (neon_vld4qa<mode>): Likewise. + (neon_vld4qb<mode>): Likewise. + (neon_vld4_lane<mode>): Likewise. + (neon_vld4_dup<mode>): Likewise. + (neon_vst4<mode>): Likewise. + (neon_vst4qa<mode>): Likewise. + (neon_vst4qb<mode>): Likewise. + (neon_vst4_lane<mode>): Likewise. + (neon_vec_unpack<US>_lo_<mode>): Likewise. + (neon_vec_unpack<US>_hi_<mode>): Likewise. + (neon_vec_<US>mult_lo_<mode>): Likewise. + (neon_vec_<US>mult_hi_<mode>): Likewise. + (neon_vec_<US>shiftl_<mode>): Likewise. + (neon_unpack<US>_<mode>): Likewise. + (neon_vec_<US>mult_<mode>): Likewise. + (vec_pack_trunc_<mode>): Likewise. + (neon_vec_pack_trunk_<mode>): Likewise. + (neon_vabd<mode>_2): Likewise. + (neon_vabd<mode>_3): Likewise. + * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes. + (thumb2_movsi_vfp): Likewise. + (movdi_vfp): Likewise. + (movdi_vfp_cortexa8): Likewise. + (movhf_vfp_neon): Likewise. + (movhf_vfp): Likewiwse. + (movsf_vfp): Likewiwse. + (thumb2_movsf_vfp): Likewiwse. + (movdf_vfp): Likewise. + (thumb2_movdf_vfp): Likewise. + (movsfcc_vfp): Likewise. + (thumb2_movsfcc_vfp): Likewise. + (movdfcc_vfp): Likewise. + (thumb2_movdfcc_vfp): Likewise. + * config/arm/arm.c (cortexa7_older_only): Update for attribute change. + * config/arm/arm1020e.md (v10_c2v): Update for attribute change. + (v10_v2c): Likewise. + * config/arm/cortex-a15-neon.md (cortex_a15_neon_int_1): Update for + attribute change. + (cortex_a15_neon_int_2): Likewise. + (cortex_a15_neon_int_3): Likewise. + (cortex_a15_neon_int_4): Likewise. + (cortex_a15_neon_int_5): Likewise. + (cortex_a15_neon_vqneg_vqabs): Likewise. + (cortex_a15_neon_vmov): Likewise. + (cortex_a15_neon_vaba): Likewise. + (cortex_a15_neon_vaba_qqq): Likewise. + (cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a15_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_\ + scalar_64_32_long_scalar): Likewise. + (cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a15_neon_mla_qqq_8_16): Likewise. + (cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ + lotype_qdd_64_32_long): Likewise. + (cortex_a15_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a15_neon_mul_qqd_32_scalar): Likewise. + (cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a15_neon_shift_1): Likewise. + (cortex_a15_neon_shift_2): Likewise. + (cortex_a15_neon_shift_3): Likewise. + (cortex_a15_neon_vshl_ddd): Likewise. + (cortex_a15_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a15_neon_vsra_vrsra): Likewise. + (cortex_a15_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a15_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a15_neon_fp_vmul_ddd): Likewise. + (cortex_a15_neon_fp_vmul_qqd): Likewise. + (cortex_a15_neon_fp_vmla_ddd): Likewise. + (cortex_a15_neon_fp_vmla_qqq): Likewise. + (cortex_a15_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a15_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a15_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a15_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a15_neon_bp_simple): Likewise. + (cortex_a15_neon_bp_2cycle): Likewise. + (cortex_a15_neon_bp_3cycle): Likewise. + (cortex_a15_neon_vld1_1_2_regs): Likewise. + (cortex_a15_neon_vld1_3_4_regs): Likewise. + (cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a15_neon_vld2_4_regs): Likewise. + (cortex_a15_neon_vld3_vld4): Likewise. + (cortex_a15_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a15_neon_vst1_3_4_regs): Likewise. + (cortex_a15_neon_vst2_4_regs_vst3_vst4): Likewise. + (cortex_a15_neon_vst3_vst4): Likewise. + (cortex_a15_neon_vld1_vld2_lane): Likewise. + (cortex_a15_neon_vld3_vld4_lane" 10 + (cortex_a15_neon_vst1_vst2_lane): Likewise. + (cortex_a15_neon_vst3_vst4_lane): Likewise. + (cortex_a15_neon_vld3_vld4_all_lanes): Likewise. + (cortex_a15_neon_ldm_2): Likewise.0 + (cortex_a15_neon_stm_2): Likewise. + (cortex_a15_neon_mcr): Likewise. + (cortex_a15_neon_mcr_2_mcrr): Likewise. + (cortex_a15_neon_mrc): Likewise. + (cortex_a15_neon_mrrc): Likewise. + * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute + change. + (cortex_a15_alu_shift): Likewise. + (cortex_a15_alu_shift_reg): Likewise. + (cortex_a15_mult32): Likewise. + (cortex_a15_mult64): Likewise. + (cortex_a15_block): Likewise. + (cortex_a15_branch): Likewise. + (cortex_a15_load1): Likewise. + (cortex_a15_load3): Likewise. + (cortex_a15_store1): Likewise. + (cortex_a15_store3): Likewise. + (cortex_a15_call): Likewise. + * config/arm/cortex-a5.md (cortex_a5_r2f): Update for attribute change. + (cortex_a5_f2r): Likewise. + * config/arm/cortex-a53.md (cortex_a53_r2f): Update for attribute + change. + (cortex_a53_f2r): Likewise. + * config/arm/cortex-a7.md + (cortex_a7_branch): Update for attribute change. + (cortex_a7_call): Likewise. + (cortex_a7_alu_imm): Likewise. + (cortex_a7_alu_reg): Likewise. + (cortex_a7_alu_shift): Likewise. + (cortex_a7_mul): Likewise. + (cortex_a7_load1): Likewise. + (cortex_a7_store1): Likewise. + (cortex_a7_load2): Likewise. + (cortex_a7_store2): Likewise. + (cortex_a7_load3): Likewise. + (cortex_a7_store3): Likewise. + (cortex_a7_load4): Likewise. + (cortex_a7_store4): Likewise. + (cortex_a7_fpalu): Likewise. + (cortex_a7_fconst): Likewise. + (cortex_a7_fpmuls): Likewise. + (cortex_a7_neon_mul): Likewise. + (cortex_a7_fpmacs): Likewise. + (cortex_a7_neon_mla: Likewise. + (cortex_a7_fpmuld: Likewise. + (cortex_a7_fpmacd: Likewise. + (cortex_a7_fpfmad: Likewise. + (cortex_a7_fdivs: Likewise. + (cortex_a7_fdivd: Likewise. + (cortex_a7_r2f: Likewise. + (cortex_a7_f2r: Likewise. + (cortex_a7_f_flags: Likewise. + (cortex_a7_f_loads: Likewise. + (cortex_a7_f_loadd: Likewise. + (cortex_a7_f_stores: Likewise. + (cortex_a7_f_stored: Likewise. + (cortex_a7_neon): Likewise. + * config/arm/cortex-a8-neon.md + (cortex_a8_neon_mrc): Update for attribute change. + (cortex_a8_neon_mrrc): Likewise. + (cortex_a8_neon_int_1): Likewise. + (cortex_a8_neon_int_2): Likewise. + (cortex_a8_neon_int_3): Likewise. + (cortex_a8_neon_int_4): Likewise. + (cortex_a8_neon_int_5): Likewise. + (cortex_a8_neon_vqneg_vqabs): Likewise. + (cortex_a8_neon_vmov): Likewise. + (cortex_a8_neon_vaba): Likewise. + (cortex_a8_neon_vaba_qqq): Likewise. + (cortex_a8_neon_vsma): Likewise. + (cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a8_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_\ + long_scalar): Likewise. + (cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a8_neon_mla_qqq_8_16): Likewise. + (cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ + long_scalar_qdd_64_32_long): Likewise. + (cortex_a8_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a8_neon_mul_qqd_32_scalar): Likewise. + (cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a8_neon_shift_1): Likewise. + (cortex_a8_neon_shift_2): Likewise. + (cortex_a8_neon_shift_3): Likewise. + (cortex_a8_neon_vshl_ddd): Likewise. + (cortex_a8_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a8_neon_vsra_vrsra): Likewise. + (cortex_a8_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a8_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a8_neon_fp_vsum): Likewise. + (cortex_a8_neon_fp_vmul_ddd): Likewise. + (cortex_a8_neon_fp_vmul_qqd): Likewise. + (cortex_a8_neon_fp_vmla_ddd): Likewise. + (cortex_a8_neon_fp_vmla_qqq): Likewise. + (cortex_a8_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a8_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a8_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a8_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a8_neon_bp_simple): Likewise. + (cortex_a8_neon_bp_2cycle): Likewise. + (cortex_a8_neon_bp_3cycle): Likewise. + (cortex_a8_neon_ldr): Likewise. + (cortex_a8_neon_str): Likewise. + (cortex_a8_neon_vld1_1_2_regs): Likewise. + (cortex_a8_neon_vld1_3_4_regs): Likewise. + (cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a8_neon_vld2_4_regs): Likewise. + (cortex_a8_neon_vld3_vld4): Likewise. + (cortex_a8_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a8_neon_vst1_3_4_regs): Likewise. + (cortex_a8_neon_vst2_4_regs_vst3_vst4): Likewise. + (cortex_a8_neon_vst3_vst4): Likewise. + (cortex_a8_neon_vld1_vld2_lane): Likewise. + (cortex_a8_neon_vld3_vld4_lane): Likewise. + (cortex_a8_neon_vst1_vst2_lane): Likewise. + (cortex_a8_neon_vst3_vst4_lane): Likewise. + (cortex_a8_neon_vld3_vld4_all_lanes): Likewise. + (cortex_a8_neon_mcr): Likewise. + (cortex_a8_neon_mcr_2_mcrr): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change. + * config/arm/cortex-a9-neon.md (ca9_neon_mrc): Update for attribute + change. + (ca9_neon_mrrc): Likewise. + (cortex_a9_neon_int_1): Likewise. + (cortex_a9_neon_int_2): Likewise. + (cortex_a9_neon_int_3): Likewise. + (cortex_a9_neon_int_4): Likewise. + (cortex_a9_neon_int_5): Likewise. + (cortex_a9_neon_vqneg_vqabs): Likewise. + (cortex_a9_neon_vmov): Likewise. + (cortex_a9_neon_vaba): Likewise. + (cortex_a9_neon_vaba_qqq): Likewise. + (cortex_a9_neon_vsma): Likewise. + (cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a9_neon_mul_qqq_8_16_32_ddd_32): Likewise. + (cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_\ + long_scalar): Likewise. + (cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long): Likewise. + (cortex_a9_neon_mla_qqq_8_16): Likewise. + (cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_\ + long_scalar_qdd_64_32_long): Likewise. + (cortex_a9_neon_mla_qqq_32_qqd_32_scalar): Likewise. + (cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar): Likewise. + (cortex_a9_neon_mul_qqd_32_scalar): Likewise. + (cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar): Likewise. + (cortex_a9_neon_shift_1): Likewise. + (cortex_a9_neon_shift_2): Likewise. + (cortex_a9_neon_shift_3): Likewise. + (cortex_a9_neon_vshl_ddd): Likewise. + (cortex_a9_neon_vqshl_vrshl_vqrshl_qqq): Likewise. + (cortex_a9_neon_vsra_vrsra): Likewise. + (cortex_a9_neon_fp_vadd_ddd_vabs_dd): Likewise. + (cortex_a9_neon_fp_vadd_qqq_vabs_qq): Likewise. + (cortex_a9_neon_fp_vsum): Likewise. + (cortex_a9_neon_fp_vmul_ddd): Likewise. + (cortex_a9_neon_fp_vmul_qqd): Likewise. + (cortex_a9_neon_fp_vmla_ddd): Likewise. + (cortex_a9_neon_fp_vmla_qqq): Likewise. + (cortex_a9_neon_fp_vmla_ddd_scalar): Likewise. + (cortex_a9_neon_fp_vmla_qqq_scalar): Likewise. + (cortex_a9_neon_fp_vrecps_vrsqrts_ddd): Likewise. + (cortex_a9_neon_fp_vrecps_vrsqrts_qqq): Likewise. + (cortex_a9_neon_bp_simple): Likewise. + (cortex_a9_neon_bp_2cycle): Likewise. + (cortex_a9_neon_bp_3cycle): Likewise. + (cortex_a9_neon_ldr): Likewise. + (cortex_a9_neon_str): Likewise. + (cortex_a9_neon_vld1_1_2_regs): Likewise. + (cortex_a9_neon_vld1_3_4_regs): Likewise. + (cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes): Likewise. + (cortex_a9_neon_vld2_4_regs): Likewise. + (cortex_a9_neon_vld3_vld4): Likewise. + (cortex_a9_neon_vst1_1_2_regs_vst2_2_regs): Likewise. + (cortex_a9_neon_vst1_3_4_regs): Likewise. + (cortex_a9_neon_vst2_4_regs_vst3_vst4): Likewise. + (cortex_a9_neon_vst3_vst4): Likewise. + (cortex_a9_neon_vld1_vld2_lane): Likewise. + (cortex_a9_neon_vld3_vld4_lane): Likewise. + (cortex_a9_neon_vst1_vst2_lane): Likewise. + (cortex_a9_neon_vst3_vst4_lane): Likewise. + (cortex_a9_neon_vld3_vld4_all_lanes): Likewise. + (cortex_a9_neon_mcr): Likewise. + (cortex_a9_neon_mcr_2_mcrr): Likewise. + * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change. + (cortex_a9_fps): Likewise. + * config/arm/cortex-m4-fpu.md (cortex_m4_vmov_2): Update for attribute + change. + (cortex_m4_fmuls): Likewise. + * config/arm/cortex-r4f.md (cortex_r4_mcr): Update for attribute + change. + (cortex_r4_mrc): Likewise. + * config/arm/iterators.md: Update comment referring to neon_type. + * config/arm/iwmmxt.md (iwmmxt_arm_movdi): Update for attribute change. + (iwmmxt_movsi_insn): Likewise. + * config/arm/marvell-pj4.md (pj4_vfp_to_core): Update for + attribute change. + (pj4_core_to_vfp): Likewise. + * config/arm/neon-schedgen.ml (emit_insn_reservations): Update for + attribute change. + * config/arm/vfp11.md (vfp_fload): Update for attribute change. + (vfp_fstore): Likewise. + * doc/md.texi: Change references to neon_type to refer to type. + +2013-09-04 Dodji Seketeli <dodji@redhat.com> + + * tree.h (DECL_BUILT_IN): Fix typo in comment. + +2013-09-04 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Only emit + lglobl if not weak. + +2013-09-04 Easwaran Raman <eraman@google.com> + + PR middle-end/57370 + * tree-ssa-reassoc.c (get_stmt_uid_with_default): New function, + (build_and_add_sum): Use it. + (appears_later_in_bb): Simplify code. + +2013-09-04 Teresa Johnson <tejohnson@google.com> + + * dumpfile.c (dump_finish): Don't close stderr/stdout. + +2013-09-04 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vaddvq_<su>64): Fix return types. + +2013-09-04 Jan Hubicka <jh@suse.cz> + + * Makefile.in (ipa-devirt.o): Add dependency on diagnostic.h + * ipa-devirt.c: Include diganostic.h + (odr_type_d): Add types and types_set. + (hash_type_name): Work for types with vtables during LTO. + (odr_hasher::remove): Fix comment; destroy types_set. + (add_type_duplicate): New function, + (get_odr_type): Use it. + (dump_type_inheritance_graph): Dump type duplicates. + * ipa.c (symtab_remove_unreachable_nodes): Build type inheritance + graph. + * tree.c (types_same_for_odr): Give exact answers on types with + virtual tables. + +2013-09-04 Dodji Seketeli <dodji@redhat.com> + + * tree.h (DECL_BUILT_IN, DECL_IS_BUILTIN): Add more comments + explaining their differences. + +2013-09-04 Sandeep Kumar Singh<Sandeep.Singh2@kpitcummins.com> + + * config/rx/rx.h: Add option -mcpu for target variants RX100 and RX200. + +2013-09-03 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_across_edge): Record entire path + when not threading through a joiner block. Pass joiner/no joiner + state to register_jump_thread. + * tree-ssa-threadupdate.c (register_jump_thread): Get joiner/no joiner + state from argument rather than implying on path length. + Dump the entire jump thread path into debugging dump. + * tree-flow.h (register_jump_thread): Update prototype. + +2013-08-29 Xinliang David Li <davidxl@google.com> + + * tree-vect-data-refs.c (vect_compute_data_ref_alignment): + Remove a trivial gcc_assert. + +2013-08-29 Xinliang David Li <davidxl@google.com> + + * tree-vect-slp.c (destroy_bb_vec_info): Data ref cleanup. + * tree-vect-loop.c (destroy_bb_vec_info): Ditto. + * tree-vect-data-refs.c (vect_compute_data_ref_alignment): + Delay base decl alignment adjustment. + * tree-vectorizer.c (vect_destroy_datarefs): New function. + * tree-vectorizer.h: New data structure. + (set_dr_misalignment): New function. + (dr_misalignment): Ditto. + * tree-vect-stmts.c (vectorizable_store): Ensure alignment. + (vectorizable_load): Ditto. + (ensure_base_align): New function. + (vectorize_loops): Add dbg_cnt support. + (execute_vect_slp): Ditto. + * dbgcnt.def: New debug counter. + * Makefile: New dependency. + +2013-09-03 Meador Inge <meadori@codesourcery.com> + + Revert: + + 2013-08-30 Meador Inge <meadori@codesourcery.com> + + * tree-vrp.c (check_array_ref): Bail out on zero-length arrays. + +2013-09-03 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Emit lglobl for + function descriptor. + +2013-09-03 Richard Biener <rguenther@suse.de> + + * tree-affine.c (add_elt_to_tree): Fix association issue, + avoid useless converts and make sure to always return a + properly typed result. + +2013-09-03 Richard Biener <rguenther@suse.de> + + PR middle-end/57656 + * fold-const.c (negate_expr_p): Fix division case. + (negate_expr): Likewise. + +2013-09-03 Richard Biener <rguenther@suse.de> + + PR lto/58285 + * tree-streamer-out.c: Include tm.h. + * Makefile.in (tree-streamer-out.o): Depend on $(TM_H). + +2013-09-03 Jan Hubicka <jh@suse.cz> + + * tree-profile.c (tree_profiling): Cleanup CFG when done. + +2013-09-03 Alan Modra <amodra@gmail.com> + + * config.gcc (powerpc*-*-linux*): Add support for little-endian + multilibs to big-endian target and vice versa. + * config/rs6000/t-linux64: Use := assignment on all vars. + (MULTILIB_EXTRA_OPTS): Remove fPIC. + (MULTILIB_OSDIRNAMES): Specify using mapping from multilib_options. + * config/rs6000/t-linux64le: New file. + * config/rs6000/t-linux64bele: New file. + * config/rs6000/t-linux64lebe: New file. + +2013-09-02 Jan Hubicka <jh@suse.cz> + + * ipa-inline-transform.c (inline_transform): Do not + optimize_inline_calls when not optimizing. + +2013-09-02 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_symtab_merge_symbols): Add comments; merge + duplicated nodes for assembler names. + * symtab.c (symtab_unregister_node): Do not attempt to unlink + hard registers from assembler name hash. + +2013-09-02 Jan Hubicka <jh@suse.cz> + + * ipa-split.c (execute_split_functions): Split externally visible + functions called once. + +2013-09-02 Martin Jambor <mjambor@suse.cz> + + PR ipa/58106 + * ipa-prop.c (ipa_edge_duplication_hook): Always put new rdesc to the + linked list. When finding the correct duplicate, also consider also + the caller in additon to its inlined_to node. + +2013-09-02 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def + (dup_lane_scalar): Remove. + * config/aarch64/aarch64-simd.md + (aarch64_simd_dup): Add 'w->w' alternative. + (aarch64_dup_lane<mode>): Allow for VALL. + (aarch64_dup_lane_scalar<mode>): Remove. + (aarch64_dup_lane_<vswap_width_name><mode>): New. + (aarch64_get_lane_signed<mode>): Add w->w altenative. + (aarch64_get_lane_unsigned<mode>): Likewise. + (aarch64_get_lane<mode>): Likewise. + * config/aarch64/aarch64.c (aarch64_evpc_dup): New. + (aarch64_expand_vec_perm_const_1): Use aarch64_evpc_dup. + * config/aarch64/iterators.md (VSWAP_WIDTH): New. + (VCON): Change container of V2SF. + (vswap_width_name): Likewise. + * config/aarch64/arm_neon.h + (__aarch64_vdup_lane_any): New. + (__aarch64_vdup<q>_lane<q>_<fpsu><8,16,32,64>): Likewise. + (vdup<q>_n_<psuf><8,16,32,64>): Convert to C implementation. + (vdup<q>_lane<q>_<fpsu><8,16,32,64>): Likewise. + +2013-09-02 Eric Botcazou <ebotcazou@adacore.com> + + PR middle-end/56382 + * expr.c (emit_move_complex): Do not move complex FP values as parts if + the source or the destination is a single hard register. + +2013-09-02 Richard Biener <rguenther@suse.de> + + PR middle-end/57511 + * tree-scalar-evolution.c (instantiate_scev_name): Allow + non-linear SCEVs. + +2013-09-02 Richard Biener <rguenther@suse.de> + + * tree-affine.c (add_elt_to_tree): Avoid converting all pointer + arithmetic to sizetype. + +2013-09-02 Bin Cheng <bin.cheng@arm.com> + + * tree-ssa-loop-ivopts.c (set_autoinc_for_original_candidates): + Find auto-increment use both before and after candidate. + +2013-09-02 Marek Polacek <polacek@redhat.com> + + * Makefile.in (ubsan.o): Add $(TM_P_H) dependency. + +2013-09-01 Jan Hubicka <jh@suse.cz> + + * Makefile.in: Add ipa-profile.o + (ipa.o, ipa-devrit.o, ipa-inline-analysis.o): Adjust dependencies. + * cgraph.c (struct cgraph_propagate_frequency_data, + cgraph_propagate_frequency_1, cgraph_propagate_frequency): Move to + ipa-profile.c; replace cgraph_ by ipa_ prefix. + * cgraph.h (cgraph_propagate_frequency): Remove. + * ipa-inline-analysis.c: Include ipa-utils.h; + drop duplicated cfgloop.h. + (inline_update_callee_summaries): Update. + * ipa-profile.c: New file. + * ipa-utils.h (ipa_propagate_frequency): Declare. + * ipa.c: Do not include pointer-set.h, hash-table.h, lto-streamer.h, + data-streamer.h, value-prof.h. + (symtab_remove_unreachable_nodes): Update profile. + (struct histogram_entry, histogram, histogram_pool, histogram_hash, + account_time_size, cmp_counts, dump_histogram, + ipa_profile_generate_summary, ipa_profile_write_summary, + ipa_profile_read_summary, ipa_profile, gate_ipa_profile, + pass_data_ipa_profile, pass_ipa_profile, make_pass_ipa_profile): + Move to ipa-profile.c. + +2013-09-01 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.md: Allow "const 0" operand 1 in "scc" insns. + +2013-09-01 Jan Hubicka <jh@suse.cz> + + * common.opt (fdevirtualize-speculatively): New function. + * invoke.texi (fdevirtualize-speculatively): Document. + * ipa-devirt.c: Include ipa-inline.h + (likely_target_p): New function. + (ipa_devirt): New function. + (gate_ipa_devirt): New function. + (pass_data_ipa_devirt): New static var. + (pass_ipa_devirt): Likewise. + (make_pass_ipa_devirt): New function. + * opts.c (default_options): Add OPT_fdevirtualize_speculatively. + (common_handle_option): Disable devirtualization when + value range profiling is available. + * passes.def (pass_ipa_devirt): Add. + * timever.def (TV_IPA_DEVIRT): New timevar. + * tree-pass.h (make_pass_ipa_devirt): + +2013-09-01 Iain Sandoe <iain@codesourcery.com> + + * config/darwin.h (LINK_COMMAND_SPEC_A): Revise sanitizer specs to + include sanitize(undefined). + +2013-08-31 Diego Novillo <dnovillo@google.com> + + * Makefile.in (TREE_CORE_H): Define. + (TREE_H): Use. + (GTFILES): Add tree-core.h. + * builtins.c (built_in_class_names): Use BUILT_IN_LAST to + size the array. + * tree-core.h: New file. + Move all data structures, enum, typedefs, global + declarations and constants from ... + * tree.h: ... here. + +2013-08-31 Jan Hubicka <jh@suse.cz> + + * bulitins.c (expand_builtin): Do not early exit for gcov + instrumented functions. + +2013-08-31 Marek Polacek <polacek@redhat.com> + + * ubsan.c: Include tm_p.h. + +2013-08-31 Jan Hubicka <jh@suse.cz> + + * gimple-streamer-in.c (input_gimple_stmt): Silence parameter unused + warning. + + * cgraph.c (cgraph_get_body): Update call of lto_input_function_body. + * gimple-streamer-in.c (input_gimple_stmt): Move sanity check to ... + * tree-cfg.c (verify_gimple_label): ... here. + * ipa-utils.c: Include lto-streamer.h, ipa-inline.h + (ipa_merge_profiles): New function. + * lto-streamer-in.c (lto_read_body): Take node instead of fn_decl. + (lto_input_function_body): Likewise. + * ipa-utils.h (ipa_merge_profiles): Declare. + * lto-streamer.h (lto_input_function_body): Update prototype. + (emit_label_in_global_context_p): Remove. + * lto-symtab.c: Include ipa-utils.h + (lto_cgraph_replace_node): Use ipa_merge_profiles. + +2013-08-31 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_speculative_call_info): Fix ref lookup + +2013-08-31 Jan Hubicka <jh@suse.cz> + + * basic-block.h (apply_scale): Make scale parmeter gcov_type. + +2013-08-31 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_emit_conditional_move): Update + "cmp" RTX before signed_comparison_operator check to account + for "code" changes. + +2013-08-30 Jan Hubicka <jh@suse.cz> + + * ipa-prop.c (ipa_set_jf_known_type): Check that we add only records. + (detect_type_change_1): Rename to ... + (detect_type_change): ... this one; early return on non-polymorphic + types. + (detect_type_change_ssa): Add comp_type parameter; update + use of detect_type_change. + (compute_complex_assign_jump_func): Add param_type parameter; + update use of detect_type_change_ssa. + (compute_complex_ancestor_jump_func): Likewise. + (ipa_get_callee_param_type): New function. + (ipa_compute_jump_functions_for_edge): Compute parameter type; + update calls to the jump function computation functions. + +2013-08-30 Teresa Johnson <tejohnson@google.com> + Steven Bosscher <steven@gcc.gnu.org> + + * cfgrtl.c (fixup_new_cold_bb): New routine. + (commit_edge_insertions): Invoke fixup_partitions. + (find_partition_fixes): New routine. + (fixup_partitions): Ditto. + (verify_hot_cold_block_grouping): Update comments. + (rtl_verify_edges): Invoke find_partition_fixes. + (rtl_verify_bb_pointers): Update comments. + (rtl_verify_bb_layout): Ditto. + * basic-block.h (probably_never_executed_edge_p): Declare. + (fixup_partitions): Ditto. + * cfgcleanup.c (try_optimize_cfg): Invoke fixup_partitions. + * bb-reorder.c (sanitize_hot_paths): New function. + (find_rarely_executed_basic_blocks_and_crossing_edges): Invoke + sanitize_hot_paths. + * predict.c (probably_never_executed_edge_p): New routine. + * cfg.c (check_bb_profile): Add partition insanity warnings. + +2013-08-30 Meador Inge <meadori@codesourcery.com> + + * tree-vrp.c (check_array_ref): Bail out on zero-length arrays. + +2013-08-30 Marek Polacek <polacek@redhat.com> + + * Makefile.in (ubsan.o): Add. + (c-family/c-ubsan.o): Add. + (builtins.o): Add ubsan.h dependency. + * ubsan.h: New file. + * ubsan.c: New file. + * common.opt: Add -fsanitize=undefined option. + (flag_sanitize): Add variable. + (fsanitize=): Add option. Add Driver. + (fsanitize=thread): Remove option. + (fsanitize=address): Likewise. + (static-libubsan): New option. + * doc/invoke.texi: Document the new flag and -static-libubsan. + * sanitizer.def (DEF_SANITIZER_BUILTIN): Define. + (BUILT_IN_UBSAN_HANDLE_BUILTIN_UNREACHABLE): Define. + * builtin-attrs.def (ATTR_COLD): Define. + (ATTR_COLD_NOTHROW_LEAF_LIST): Define. + * builtins.def (BUILT_IN_UBSAN_HANDLE_DIVREM_OVERFLOW, + BUILT_IN_UBSAN_HANDLE_SHIFT_OUT_OF_BOUNDS): Define. + * flag-types.h (sanitize_code): New enum. + * opts.c (common_handle_option): Parse command line arguments + of -fsanitize=. Add -fsanitize=unreachable option. + * varasm.c (get_variable_section): Adjust. + (assemble_noswitch_variable): Likewise. + (assemble_variable): Likewise. + (output_constant_def_contents): Likewise. + (categorize_decl_for_section): Likewise. + (place_block_symbol): Likewise. + (output_object_block): Likewise. + * builtins.def: Likewise. + * toplev.c (compile_file): Likewise. + (process_options): Likewise. + * cppbuiltin.c: Likewise. + * tsan.c (tsan_pass): Likewise. + (tsan_gate): Likewise. + (tsan_gate_O0): Likewise. + * cfgexpand.c (partition_stack_vars): Likewise. + (expand_stack_vars): Likewise. + (defer_stack_allocation): Likewise. + (expand_used_vars): Likewise. + * cfgcleanup.c (old_insns_match_p): Likewise. + * asan.c (asan_finish_file): Likewise. + (asan_instrument): Likewise. + (gate_asan): Likewise. + (initialize_sanitizer_builtins): Build BT_FN_VOID_PTR_PTR_PTR. + (ATTR_COLD_NOTHROW_LEAF_LIST): Define. + (asan_global_struct): Use pointer_sized_int_node instead + calling build_nonstandard_integer_type. + (initialize_sanitizer_builtins): Likewise. + (asan_finish_file): Likewise. + * gcc.c: Document %{%:function(args):X}. + (static_spec_functions): Add sanitize. + (handle_spec_function): Add retval_nonnull argument and if non-NULL, + store funcval != NULL there. + (do_spec_1): Adjust handle_spec_function caller. + (handle_braces): Allow %:function(args) as condition. + (sanitize_spec_function): New function. + (ADD_STATIC_LIBUBSAN_LIBS): Define. + (LIBUBSAN_SPEC): Likewise. + (LIBUBSAN_EARLY_SPEC): Likewise. + (SANITIZER_SPEC): Handle libubsan. + (SANITIZER_EARLY_SPEC): Likewise. + * config/darwin.h (LINK_COMMAND_SPEC_A): Use %:sanitize(address) + instead of fsanitize=address. + * config/arm/linux-eabi.h (ASAN_CC1_SPEC): Use %:sanitize(address) + instead of fsanitize=address*. + * builtins.c: Include ubsan.h. + (fold_builtin_0): Instrument __builtin_unreachable. + * config/rs6000/rs6000.h (FRAME_GROWS_DOWNWARD): Use flag_sanitize + instead of flag_asan. + * tree.h (enum tree_index): Add TI_POINTER_SIZED_TYPE. + (pointer_sized_int_node): Define. + * tree.c (build_common_tree_nodes): Initialize pointer_sized_int_node. + +2013-08-30 Mike Stump <mikestump@comcast.net> + + * doc/install.texi (Prerequisites): Note regression in Tcl 8.6 + with RE patterns. + +2013-08-29 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_function_body_availability): Handle weakref + correctly. + * passes.def: Remove pass_fixup_cfg. + * ipa-inline.c (ipa_inline): When not optimizing, do not inline; + track when we need to remove functions. + (gate_ipa_inline): Execute inlining always; add comment why. + (pass_data_ipa_inline): Remove TODO_remove_functions. + * ipa-inline-analysis.c (inline_generate_summary): When not optimizing + do not produce summaries. + * symtab.c (change_decl_assembler_name): Handle renaming of weakrefs. + (symtab_nonoverwritable_alias): Assert we are not called on weakref. + * varpool.c (cgraph_variable_initializer_availability): Fix weakrefs, + constant pool and vtable. + +2013-08-30 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/arm_neon.h (__AARCH64_UINT64_C, __AARCH64_INT64_C): + New arm_neon.h's internal macros to specify 64-bit constants. + Avoid using stdint.h's macros. + +2013-08-30 Joern Rennecke <joern.rennecke@embecosm.com> + + * recog.c (verify_changes): Verify that changes[i].old is non-zero + before applying REG_P. + +2013-08-30 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58277 + * tree-ssa-strlen.c (strlen_enter_block): If do_invalidate gave up + after seeing too many stmts with vdef in between dombb and current + bb, invalidate everything. + +2013-08-30 Richard Biener <rguenther@suse.de> + + * fold-const.c (fold_single_bit_test): Fix overflow test. + +2013-08-30 Eric Botcazou <ebotcazou@adacore.com> + + * function.c (assign_parm_setup_reg): For a parameter passed by pointer + and which can live in a register, always retrieve the value on entry. + * var-tracking.c (add_stores): Treat the copy on entry for a parameter + passed by invisible reference specially. + (emit_notes_in_bb) <MO_VAL_USE>: Emit notes before the instruction. + (vt_add_function_parameter): Correctly deal with a parameter passed by + invisible reference. + +2013-08-30 Jan Hubicka <jh@suse.cz> + + * tree.c (set_call_expr_flags): Fix handling of TM_PURE. + +2013-08-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58228 + * tree-vect-data-refs.c (vect_analyze_data_ref_access): Do not + allow invariant loads in nested loop vectorization. + +2013-08-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58223 + * tree-loop-distribution.c (has_anti_dependence): Rename to ... + (has_anti_or_output_dependence): ... this and adjust to also + look for output dependences. + (mark_nodes_having_upstream_mem_writes): Adjust. + (rdg_flag_uses): Likewise. + +2013-08-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58010 + * tree-vect-loop.c (vect_create_epilog_for_reduction): Remove + assert that we have a loop-closed PHI. + +2013-08-29 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_cgraph_replace_node): Free decl_in_state. + * cgraph.c (cgraph_release_function_body): Free decl_in_state. + * lto-section-in.c (lto_free_function_in_decl_state): New function. + (lto_free_function_in_decl_state_for_node): New function. + +2013-08-29 Xinliang David Li <davidxl@google.com> + + * loop-unroll.c (report_unroll_peel): Minor message change. + * tree-vect-loop-manip.c (vect_do_peeling_for_alignment): + Emit alignment peeling message with default -fopt-info. + (vect_loop_versioning): Emit loop version info message. + * tree-vectorizer.c (vectorize_loops): Minor message change. + (execute_vect_slp): Ditto. + +2013-08-29 Eric Botcazou <ebotcazou@adacore.com> + + * cgraphclones.c (cgraph_create_virtual_clone): Compute the DECL_NAME + of the clone from the DECL_NAME of the original function. + +2013-08-29 Oleg Endo <olegendo@gcc.gnu.org> + + * passes.c (register_pass): Add overload. + * tree-pass.h (register_pass): Forward declare it. Add comment. + +2013-08-29 Jan Hubicka <jh@suse.cz> + + * lto-streamer-out.c (hash_tree): Stream DECL_FINAL_P, + DECL_CXX_CONSTRUCTOR_P, DECL_CXX_DESTRUCTOR_P and TYPE_FINAL_P. + * lto-streamer-in.c (unpack_ts_decl_with_vis_value_fields): Stream + DECL_FINAL_P, DECL_CXX_CONSTRUCTOR_P and DECL_CXX_DESTRUCTOR_P. + (unpack_ts_type_common_value_fields): Stream TYPE_FINAL_P. + * tree-streamer-out.c (pack_ts_decl_with_vis_value_fields): + Add DECL_FINAL_P, DECL_CXX_CONSTRUCTOR_P and DECL_CXX_DESTRUCTOR_P. + (pack_ts_type_common_value_fields): Add TYPE_FINAL_P. + +2013-08-29 Teresa Johnson <tejohnson@google.com> + + * dumpfile.c (dump_loc): Output column number. + * dumpfile.h (OPTGROUP_OTHER): Add and enable under OPTGROUP_ALL. + * doc/invoke.texi: Document optall -fopt-info flag. + * profile.c (read_profile_edge_counts): Use new dump framework. + (compute_branch_probabilities): Ditto. + * passes.c (pass_manager::register_one_dump_file): Use OPTGROUP_OTHER + when pass not in any opt group. + * pass_manager.h (pass_manager::get_pass_profile): New method. + * value-prof.c (check_counter): Use new dump framework. + (check_ic_target): Ditto. + * coverage.c (get_coverage_counts): Ditto. + (coverage_init): Setup new dump framework. + +2013-08-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58246 + * tree-ssa-dce.c (mark_aliased_reaching_defs_necessary_1): Properly + handle the dominance check inside a basic-block. + +2013-08-29 Richard Biener <rguenther@suse.de> + + PR middle-end/57287 + * tree-ssa-copy.c (may_propagate_copy): Allow propagating + of default defs that appear in abnormal PHI nodes. + +2013-08-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57685 + * tree-vrp.c (register_edge_assert_for_1): Recurse only for + single-use operands to avoid exponential complexity. + +2013-08-28 Dehao Chen <dehao@google.com> + + * ipa-inline.c (edge_badness): Fix integer underflow. + +2013-08-28 Uros Bizjak <ubizjak@gmail.com> + + * gtm-builtins.def (_ITM_free): Declare leaf. + +2013-08-28 Jakub Jelinek <jakub@redhat.com> + + PR target/58067 + * config/i386/i386.md (*tls_global_dynamic_64_largepic): New insn. + (*tls_local_dynamic_base_64_largepic): Likewise. + (tls_global_dynamic_64_<mode>, tls_local_dynamic_base_64_<mode>): + Remove predicate from call operand. + * config/i386/i386.c (ix86_tls_get_addr): For -mcmodel=large -fpic + return sum of pic_offset_table_rtx and UNSPEC_PLTOFF of the symbol. + +2013-08-28 Jeff Law <law@redhat.com> + + * tree-ssa-threadedge.c (thread_around_empty_block): Remove + checks for the number of predecessors and successors allowed. + * tree-ssa-threadupdate.c (mark_threaded_blocks): Ignore requests + which require copying a joiner block if there is a request which + is a subpath that requires no joiner block copying. + +2013-08-28 Jan Hubicka <jh@suse.cz> + + * lto-streamer-out.c (DFS_write_tree_body): Drop + BINFO_INHERITANCE_CHAIN, BINFO_SUBVTT_INDEX and BINFO_VPTR_INDEX. + (hash_tree): Do not hash DECL_DEFER_OUTPUT, BINFO_INHERITANCE_CHAIN, + BINFO_SUBVTT_INDEX, BINFO_VPTR_INDEX, DECL_IN_TEXT_SECTION. + * tree-streamer-in.c (unpack_ts_decl_common_value_fields): + Do not read DECL_ERROR_ISSUED. + (unpack_ts_decl_with_vis_value_fields): Do not read + DECL_DEFER_OUTPUT. + (lto_input_ts_binfo_tree_pointers): Do not read + BINFO_INHERITANCE_CHAIN, BINFO_SUBVTT_INDEX, BINFO_VPTR_INDEX + * tree-streamer-out.c (pack_ts_decl_common_value_fields): Do not + write DECL_ERROR_ISSUED.. + (pack_ts_decl_with_vis_value_fields): Do not write + DECL_DEFER_OUTPUT. + (write_ts_binfo_tree_pointers): Do not read BINFO_INHERITANCE_CHAIN, + BINFO_SUBVTT_INDEX, BINFO_VPTR_INDEX. + * print-tree.c (print_node): Do not print DECL_ERROR_ISSUED. + * tree.h (tree_decl_common): Update comment. + (DECL_ERROR_ISSUED): Remove. + +2013-08-28 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58257 + * omp-low.c (copy_var_decl): Copy over TREE_NO_WARNING flag. + +2013-08-28 Jan Hubicka <jh@suse.cz> + + * builtins.def (free): Declare leaf. + +2013-08-27 David Malcolm <dmalcolm@redhat.com> + + * gdbhooks.py: New. + * configure.ac (gdbinit.in): Add import of gcc/gdbhooks.py. + * configure: Regenerate. + +2013-08-27 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.h (ipa_pass_through_data): New field type_preserved. + (ipa_ancestor_jf_data): Likewise. + (ipa_get_jf_pass_through_agg_preserved): Fix comment typo. + (ipa_get_jf_pass_through_type_preserved): New function. + (ipa_get_jf_ancestor_agg_preserved): Fix comment typo. + (ipa_get_jf_ancestor_type_preserved): New function. + * ipa-cp.c (ipa_get_jf_pass_through_result): Honor type_preserved flag. + (ipa_get_jf_ancestor_result): Likewise. + (propagate_vals_accross_pass_through): Use + ipa_get_jf_pass_through_result to do all the value mappings. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Dump the + type_preserved flag. + (ipa_set_jf_cst_copy): New function. + (ipa_set_jf_simple_pass_through): Set the type_preserved flag. + (ipa_set_jf_arith_pass_through): Likewise. + (ipa_set_ancestor_jf): Likewise. + (compute_complex_assign_jump_func): Set type_preserved instead of + punting. + (ipa_compute_jump_functions_for_edge): Likewise. + (combine_known_type_and_ancestor_jfs): Honor type_preserved. + (update_jump_functions_after_inlining): Update type_preserved. + Explicitely create jump functions when combining one with pass_through. + (ipa_write_jump_function): Stream the type_preserved flags. + (ipa_read_jump_function): Likewise. + +2013-08-27 Jakub Jelinek <jakub@redhat.com> + Aldy Hernandez <aldyh@redhat.com> + + * Makefile.in (omp-low.o): Depend on $(TARGET_H). + * cfgloop.h (struct loop): Add safelen, force_vect, simduid. + * function.h (struct function): Add has_force_vect_loops and + has_simduid_loops. + * gimple-pretty-print.c (dump_gimple_omp_for): Handle GF_OMP_FOR_KIND*. + * gimple.c (gimple_build_omp_critical): Add KIND argument and + handle it. + * gimple.def: Update CLAUSES comments. + * gimple.h (enum gf_mask): Add GF_OMP_FOR_KIND_{FOR,SIMD}. + (gimple_build_omp_for): Add argument to prototype. + (gimple_omp_for_kind): New. + (gimple_omp_for_set_kind): New. + * gimplify.c (enum gimplify_omp_var_data): Add GOVD_LINEAR to + GOVD_DATA_SHARE_CLASS. + (enum omp_region_type): Add ORT_SIMD. + (gimple_add_tmp_var): Handle ORT_SIMD. + (gimplify_var_or_parm_decl): Same. + (is_gimple_stmt): Same. + (omp_firstprivatize_variable): Same. + (omp_add_variable): Only use splay_tree_insert if lookup failed. + (omp_notice_variable): Handle ORT_SIMD. + (omp_is_private): Add SIMD argument and handle it as well as ORT_SIMD. + (omp_check_private): Handle ORT_SIMD. + (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_LINEAR and + OMP_CLAUSE_SAFELEN. + (gimplify_adjust_omp_clauses_1): Handle GOVD_LINEAR. + Handle OMP_CLAUSE_LASTPRIVATE. + (gimplify_adjust_omp_clauses): Handle OMP_CLAUSE_LINEAR and + OMP_CLAUSE_SAFELEN. + (gimplify_omp_for): Handle OMP_SIMD and OMP_CLAUSE_LINEAR. + (gimplify_expr): Handle OMP_SIMD. + * internal-fn.c (expand_GOMP_SIMD_LANE): New. + (expand_GOMP_SIMD_VF): New. + (expand_GOMP_SIMD_LAST_LANE): New. + * internal-fn.def (GOMP_SIMD_LANE): New. + (GOMP_SIMD_VF): New. + (GOMP_SIMD_LAST_LANE): New. + * omp-low.c: Include target.h. + (extract_omp_for_data): Handle OMP_SIMD, OMP_CLAUSE_LINEAR, + OMP_CLAUSE_SAFELEN. + (check_omp_nesting_restrictions): Same. + (omp_max_vf): New. + (lower_rec_simd_input_clauses): New. + (lower_rec_input_clauses): Handle OMP_SIMD, GF_OMP_FOR_KIND_SIMD, + OMP_CLAUSE_LINEAR. + (lower_lastprivate_clauses): Handle OMP_CLAUSE_LINEAR, + GF_OMP_FOR_KIND_SIMD, OMP_SIMD. + (expand_omp_build_assign): New. + (expand_omp_for_init_counts): New. + (expand_omp_for_init_vars): New. + (extract_omp_for_update_vars): New. + (expand_omp_for_generic): Use expand_omp_for_{init,update}_vars + and rewrite accordingly. + (expand_omp_simd): New. + (expand_omp_for): Use expand_omp_simd. + (lower_omp_for_lastprivate): Unshare vinit when appropriate. + (lower_omp_for): Do not lower the body. + * tree-data-ref (get_references_in_stmt): Allow IFN_GOMP_SIMD_LANE + in their own loops. + * tree-flow.h (find_omp_clause): Remove prototype. + * tree-if-conv.c (main_tree_if_conversion): Run if doing if conversion, + forcing vectorization of the loop, or if flag_tree_vectorize. + (gate_tree_if_conversion): Similarly. + * tree-inline.c (remap_gimple_stmt): Pass for kind argument to + gimple_build_omp_for. + (copy_cfg_body): set has_force_vect_loops and has_simduid_loops. + * tree-parloops (create_parallel_loop): Pass kind argument to + gimple_build_omp_for. + * tree-pretty-print.c (dump_omp_clause): Add cases for + OMP_CLAUSE_UNIFORM, OMP_CLAUSE_LINEAR, OMP_CLAUSE_SAFELEN, + OMP_CLAUSE__SIMDUID_. + (dump_generic_node): Handle OMP_SIMD. + * tree-ssa-ccp.c (likely_value): Handle IFN_GOMP_SIMD*. + * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely_1): Do not + unroll OMP_SIMD loops here. + * tree-ssa-loop.c (gate_tree_vectorize): Run if has_force_vect_loops. + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Handle + loop->safelen. + (vect_analyze_data_refs): Handle simd loops. + * tree-vect-loop.c (vectorizable_live_operation): Handle + IFN_GOMP_SIMD*. + * tree-vect-stmts.c (vectorizable_call): Handle IFN_GOMP_SIMD_LANE. + (vectorizable_store): Handle STMT_VINFO_SIMD_LANE_ACCESS_P. + (vectorizable_load): Same. + * tree-vectorizer.c: Include hash-table.h and tree-ssa-propagate.h. + (struct simduid_to_vf): New. + (simduid_to_vf::hash): New. + (simduid_to-vf::equal): New. + (struct simd_array_to_simduid): New. + (simd_array_to_simduid::hash): New. + (simd_array_to_simduid::equal): New. + (adjust_simduid_builtins): New. + (struct note_simd_array_uses_struct): New. + (note_simd_array_uses_cb): New. + (note_simd_array_uses): New. + (vectorize_loops): Handle simd hints and adjust simd builtins + accordingly. + * tree-vectorizer.h (struct _stmt_vec_info): Add + simd_lane_access_p field. + (STMT_VINFO_SIMD_LANE_ACCESS_P): New macro. + * tree.c (omp_clause_num_ops): Add entries for OMP_CLAUSE_LINEAR, + OMP_CLAUSE_SAFELEN, OMP_CLAUSE__SIMDUID_, OMP_CLAUSE_UNIFORM. + (omp_clause_code_name): Same. + (walk_tree_1): Handle OMP_CLAUSE_UNIFORM, OMP_CLAUSE_SAFELEN, + OMP_CLAUSE__SIMDUID_, OMP_CLAUSE_LINEAR. + * tree.def (OMP_SIMD): New entry. + * tree.h (enum omp_clause_code): Add entries for OMP_CLAUSE_LINEAR, + OMP_CLAUSE_UNIFORM, OMP_CLAUSE_SAFELEN, OMP_CLAUSE__SIMDUID_. + (OMP_CLAUSE_DECL): Adjust range for new clauses. + (OMP_CLAUSE_LINEAR_NO_COPYIN): New. + (OMP_CLAUSE_LINEAR_NO_COPYOUT): New. + (OMP_CLAUSE_LINEAR_STEP): New. + (OMP_CLAUSE_SAFELEN_EXPR): New. + (OMP_CLAUSE__SIMDUID__DECL): New. + (find_omp_clause): New prototype. + +2013-08-27 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/driver-i386.c (host_detect_local_cpu): Update + Haswell processor detection. + +2013-08-27 Christian Widmer <shadow@umbrox.de> + + PR target/57927 + * config/i386/driver-i386.c (host_detect_local_cpu): Add detection + of Ivy Bridge and Haswell processors. Assume core-avx2 for unknown + AVX2 capable processors. + +2013-08-27 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/arm_neon.h: Replace all inline asm implementations + of vget_low_* with implementations in terms of other intrinsics. + +2013-08-27 Marc Glisse <marc.glisse@inria.fr> + + PR middle-end/57219 + * doc/extend.texi (__builtin_isinf_sign): Restrict the return + values to -1, 0 and 1. + +2013-08-27 Vidya Praveen <vidyapraveen@arm.com> + + * config/aarch64/aarch64.md (unspec): Add UNSPEC_SISD_SSHL, + UNSPEC_SISD_USHL, UNSPEC_USHL_2S, UNSPEC_SSHL_2S, UNSPEC_SISD_NEG. + (<optab><mode>3_insn): Remove. + (aarch64_ashl_sisd_or_int_<mode>3): New Pattern. + (aarch64_lshr_sisd_or_int_<mode>3): Likewise. + (aarch64_ashr_sisd_or_int_<mode>3): Likewise. + (define_split for aarch64_lshr_sisd_or_int_di3): Likewise. + (define_split for aarch64_lshr_sisd_or_int_si3): Likewise. + (define_split for aarch64_ashr_sisd_or_int_di3): Likewise. + (define_split for aarch64_ashr_sisd_or_int_si3): Likewise. + (aarch64_sisd_ushl, aarch64_sisd_sshl): Likewise. + (aarch64_ushl_2s, aarch64_sshl_2s, aarch64_sisd_neg_qi): Likewise. + (ror<mode>3_insn): Likewise. + * config/aarch64/predicates.md (aarch64_simd_register): New. + +2013-08-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57521 + * tree-if-conv.c (if_convertible_bb_p): Verify that at least + one edge is non-critical. + (find_phi_replacement_condition): Make sure to use a non-critical + edge. Cleanup and remove old bug workarounds. + (bb_postdominates_preds): Remove. + (if_convertible_loop_p_1): Do not compute post-dominators. + (combine_blocks): Do not free post-dominators. + (main_tree_if_conversion): Likewise. + (pass_data_if_conversion): Add TODO_verify_ssa. + +2013-08-27 DJ Delorie <dj@redhat.com> + + * config/i386/djgpp.h (ASM_DECLARE_FUNCTION_NAME): New. + +2013-08-27 Yufeng Zhang <yufeng.zhang@arm.com> + + * function.c (assign_parm_find_data_types): Set passed_mode and + nominal_mode to the TYPE_MODE of nominal_type for the built + pointer type in case of the struct-pass-by-reference. + +2013-08-26 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/avr/avr-stdint.h (INT16_TYPE): Change default to "int". + (UINT16_TYPE): Change default to "unsigned int". + + * config/avr/avr.opt (mfract-convert-truncate): New option. + * config/avr/avr.c (avr_out_fract): Unless TARGET_FRACT_CONV_TRUNC + is set, round negative fractional integers according to n1169 + when converting to integer types. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_propagate_frequency): Do not assume that virtual + methods can not be called indirectly when their address is not taken. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * gimple-fold.c (gimple_get_virt_method_for_binfo): Use + ctor_for_folding. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * ipa.c (comdat_can_be_unshared_p_1): C++ constructors and destructors + can be unshared. + +2013-08-26 Joern Rennecke <joern.rennecke@embecosm.com> + + * reload.c (find_valid_class): Allow classes that do not include + FIRST_PSEUDO_REGISTER - 1. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_redirect_edge_call_stmt_to_callee): Fix formatting; + fix edge count/frequency when speculation failed; fix type check + for the direct call. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * ipa-prop.c (ipa_print_node_params): Do not ICE during WPA. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * ipa-inline-transform.c (inline_transform): Be ready for basic block + to be changed by edge redirection. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_speculative_call_info): Fix parameter order and + formating; add sanity check. + (cgraph_resolve_speculation): Add FIXME about scaling profiles. + (cgraph_redirect_edge_call_stmt_to_callee): Fix ICE in debug dump. + * ipa-inline.c (heap_edge_removal_hook): Reset node growth cache. + (resolve_noninline_speculation): Update callee keys, too. + +2013-08-26 Jan Hubicka <jh@suse.cz> + + * tree.h (tree_decl_with_vis): Add cxx_constructor, cxx_destructor. + (DECL_CXX_CONSTRUCTOR_P, DECL_CXX_DESTRUCTOR_P): New macros. + +2013-08-26 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/i386/i386.c (x86_64_elf_select_section): Put ATTRIBUTE_UNUSED + into proper place. + +2013-08-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_debug_options): Remove prototype. + (x86_64_elf_select_section): Ditto. + (ix86_handle_tm_regparm_attribute): Remove ATTRIBUTE_UNUSED on used + arguments. + (ix86_pass_by_reference): Ditto. + (output_set_got): Ditto. + (ix86_unary_operator_ok): Ditto. + (ix86_expand_builtin): Ditto. + +2013-08-23 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_turn_edge_to_speculative): Fix debug output. + +2013-08-23 Jan Hubicka <jh@suse.cz> + + * tree.h (TYPE_FINAL_P, DECL_FINAL_P): New macros. + (tree_decl_with_vis): Add FINAL field. + +2013-08-23 Jeff Law <law@redhat.com> + + * tree-ssa-pre.c (do_regular_insertion): Include the expression in + the debugging dump when the expression is fully redundant. + +2013-08-23 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * diagnostic.c (diagnostic_set_caret_max_width): Use pp_buffer. + * gimple-pretty-print.c (gimple_dump_bb_buff): Likewise. + * pretty-print.c (pp_formatted_text_data): Likewise. + (pp_write_text_to_stream): Likewise. + (pp_write_text_as_dot_label_to_stream): Likewise. + (pp_append_r): Likewise. + (pp_format): Likewise. + (pp_flush): Likewise. + (pp_clear_output_area): Likewise. + (pp_append_text): Likewise. + (pp_formatted_text): Likewise. + (pp_remaining_character_count_for_line): Likewise. + (pp_newline): Likewise. + (pp_character): Likewise. + (output_buffer::~output_buffer): Define. + (pretty_printer::~pretty_printer): Destruct output buffer. + * pretty-print.h (output_buffer::~output_buffer): Declare. + (pretty_printer::~pretty_printer): Declare virtual. + +2013-08-24 Marc Glisse <marc.glisse@inria.fr> + + PR other/57324 + * hwint.h (HOST_WIDE_INT_UC, HOST_WIDE_INT_1U, HOST_WIDE_INT_M1, + HOST_WIDE_INT_M1U): New macros. + * fold-const.c (sign_bit_p, build_range_check, fold_unary_loc, + fold_binary_loc, fold_ternary_loc): Use the new macros. Use an + unsigned -1 for lshift. + * cse.c (cse_insn): Likewise. + * double-int.c (rshift_double, lshift_double): Likewise. + * builtins.c (fold_builtin_bitop): Likewise. + * combine.c (force_to_mode): Likewise. + * tree.c (integer_pow2p, tree_log2, tree_floor_log2): Likewise. + * simplify-rtx.c (simplify_const_unary_operation, + simplify_const_binary_operation): Likewise. + * tree-stdarg.c (va_list_counter_bump, va_list_ptr_read, + check_va_list_escapes): Likewise. + * rtlanal.c (nonzero_bits1): Likewise. + * expmed.c (expand_smod_pow2): Likewise. + * tree-ssa-structalias.c (UNKNOWN_OFFSET): Use HOST_WIDE_INT_MIN. + +2013-08-23 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_turn_edge_to_speculative): Mark target node + as having address taken. + +2013-08-23 Jan Hubicka <jh@suse.cz> + + * ipa-utils.h (method_class_type): Declare. + * ipa-devirt.c (method_class_type): Export. + + * cgraphunit.c (analyze_functions): Do basic devirtualization; + do not walk base classes of anonymous types. + +2013-08-23 Kaz Kojima <kkojima@gcc.gnu.org> + + PR rtl-optimization/58220 + PR regression/58221 + * final.c (reemit_insn_block_notes): Use NEXT_INSN to + handle SEQUENCE insns properly. + +2013-08-23 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * pretty-print.h (pp_newline_and_flush): Declare. Remove macro + definition. + (pp_newline_and_indent): Likewise. + (pp_separate_with): Likewise. + * pretty-print.c (pp_newline_and_flush): Define. + (pp_newline_and_indent): Likewise. + (pp_separate_with): Likewise. + +2013-08-23 Jakub Jelinek <jakub@redhat.com> + + PR target/58218 + * config/i386/x86-64.h (TARGET_SECTION_TYPE_FLAGS): Define. + * config/i386/i386.c (x86_64_elf_section_type_flags): New function. + +2013-08-23 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/predicates.md (ext_sse_reg_operand): New. + * config/i386/i386.md (*movti_internal): Use + predicate to determine if EVEX is needed. + (*movsi_internal): Ditto. + (*movdf_internal): Ditto. + (*movsf_internal): Ditto. + * config/i386/mmx.md (*mov<mode>_internal): Ditto. + +2013-08-23 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58209 + * tree-tailcall.c (process_assignment): Handle POINTER_PLUS_EXPR. + (find_tail_calls): Give up for pointer result types if m is non-NULL. + (adjust_return_value_with_ops): For PLUS_EXPR and pointer result type + emit POINTER_PLUS_EXPR. + (create_tailcall_accumulator): For pointer result type accumulate in + sizetype type. + +2013-08-22 Paolo Carlini <paolo.carlini@oracle.com> + + * configure.ac: Add backslashes missing from the last change. + * configure: Regenerate. + +2013-08-22 Jan Hubicka <jh@susue.cz> + + * ipa.c (function_and_variable_visibility): First remember function + was global and then make it local. + +2013-08-22 Julian Brown <julian@codesourcery.com> + + * configure.ac: Add aarch64 to list of arches which use "nop" in + debug_line test. + * configure: Regenerate. + +2013-08-22 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/linux.h (TARGET_LIBC_HAS_FUNCTION): Define as + gnu_libc_has_function. + * config/s390/tpf.h: Likewise. + +2013-08-22 Jan Hubicka <jh@susue.cz> + + * timevar.c (validate_phases): Add cast. + +2013-08-22 Jan Hubicka <jh@susue.cz> + + * timevar.c (validate_phases): Use size_t for memory. + * timevar.h (struct timevar_time_def): Use size_t for ggc_mem. + +2013-08-22 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * pretty-print.h (output_buffer::output_buffer): Declare. + (pretty_printer::pretty_printer): Likewise. + (pp_construct): Remove. + * pretty-print.c (output_buffer::output_buffer): Define. + (pretty_printer::pretty_printer): Rename from pp_construct. Simplify. + * gimple-pretty-print.c (print_gimple_stmt): Do not call pp_construct. + (print_gimple_expr): Likewise. + (print_gimple_seq): Likewise. + (gimple_dump_bb): Likewise. + * sched-vis.c (dump_value_slim): Likewise. + (dump_insn_slim): Likewise. + (dump_rtl_slim): Likewise. + (str_pattern_slim): Likewise. + * tree-mudflap.c (mf_varname_tree): Likewise. + * graph.c (print_graph_cfg): Likewise. + (start_graph_dump): Likewise. + * tree-pretty-print.c (maybe_init_pretty_print): Likewise. Use + placement-new. + * diagnostic.c (diagnostic_initialize): Simplify early diagnostic + pretty printer initialization. + * coretypes.h (diagnostic_context): Remove superflous type alias + declaration. + (pretty_printer): Likewise. Declare directly as a class. + (pretty_print_info): Remove declaration as class. + * asan.c (asan_emit_stack_protection): Remove call to pp_construct + and pp_clear_output_area. + (asan_add_global): Likewise. + +2013-08-22 Jan Hubicka <jh@suse.cz> + + * cgraphunit.c (analyze_functions) Use update_type_inheritance_graph. + * ipa-utils.h (update_type_inheritance_graph): Declare. + (possible_polymorphic_call_target_p): Declare. + (possible_polymorphic_call_target_p): New. + * ipa-devirt.c: Update toplevel comments. + (cached_polymorphic_call_targets): Move up. + (odr_type_d): Move ID down. + (polymorphic_type_binfo_p): Update comment. + (odr_hasher::remove): Likewise; + (get_odr_type): Set anonymous_namespace. + (dump_odr_type): Dump it. + (dump_type_inheritance_graph): Do not ICE when there are no ODR types. + (maybe_record_node): Record node in cached_polymorphic_call_targets. + (record_binfo): Add comment. + (free_polymorphic_call_targets_hash): Do not ICE when cache is not + built. + (devirt_node_removal_hook): Do not iCE when cache is freed. + (possible_polymorphic_call_target_p): New predicate. + (update_type_inheritance_graph): New function. + +2013-08-22 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Sergey Lega <sergey.s.lega@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New. + (OPTION_MASK_ISA_AVX512CD_SET): Ditto. + (OPTION_MASK_ISA_AVX512PF_SET): Ditto. + (OPTION_MASK_ISA_AVX512ER_SET): Ditto. + (OPTION_MASK_ISA_AVX2_UNSET): Update. + (OPTION_MASK_ISA_AVX512F_UNSET): New. + (OPTION_MASK_ISA_AVX512CD_UNSET): Ditto. + (OPTION_MASK_ISA_AVX512PF_UNSET): Ditto. + (OPTION_MASK_ISA_AVX512ER_UNSET): Ditto. + (ix86_handle_option): Handle OPT_mavx512f, OPT_mavx512cd, + OPT_mavx512pf, OPT_mavx512er cases. + * config/i386/constraints.md (v): New constraint. + (Yi, Yj): Replace SSE_REGS with ALL_SSE_REGS. + * config/i386/cpuid.h (bit_AVX512F, bit_AVX512PF, bit_AVX512ER) + (bit_AVX512CD): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect + AVX512F, AVX512ER, AVX512PF, AVX512CD features. + * config/i386/i386-c.c (ix86_target_macros_internal): + Conditionally define __AVX512F__, __AVX512ER__, __AVX512CD__, + __AVX512PF__. + * config/i386/i386-modes.def (VECTOR_MODES (INT, 128)) + (VECTOR_MODES (FLOAT, 128), INT_MODE (XI, 64)): New modes. + * config/i386/i386.c (regclass_map, dbx_register_map) + (dbx64_register_map, svr4_dbx_register_map): Add new SSE registers. + (gate_insert_vzeroupper): Disable vzeroupper for TARGET_AVX512F. + (ix86_target_string): Define -mavx512f, -mavx512er, -mavx512cd, + -mavx512pf options. + (ix86_option_override_internal): Define PTA_AVX512F, PTA_AVX512ER, + PTA_AVX512PF, PTA_AVX512CD. Handle -mavx512f, -mavx512er, -mavx512cd, + -mavx512pf options. Fix formatting. + (ix86_conditional_register_usage): Squash EXT_REX_SSE_REGs for 32-bit + targets. Squash EVEX_SSE_REGS if AVX512F is disabled. + (ix86_valid_target_attribute_inner_p): Handle -mavx512f, -mavx512er, + -mavx512cd, -mavx512pf options. + (standard_sse_constant_opcode): Add vpternlogd for 512-bit modes. + (print_reg, ix86_print_operand): Handle 'g' to output 512-bit operands. + (ix86_preferred_output_reload_class): Replace SSE_REGS with + ALL_SSE_REGS. + (ix86_hard_regno_mode_ok): Support 512-bit registers. + (ix86_set_reg_reg_cost): Ditto. + (x86_order_regs_for_local_alloc): Ditto. + (MAX_VECT_LEN): Extend to 64-byte. + (ix86_spill_class): Replace SSE_REGS with ALL_SSE_REGS. + * config/i386/i386.h (TARGET_AVX512F, TARGET_AVX512PF) + (TARGET_AVX512ER, TARGET_AVX512CD): New. + (BIGGEST_ALIGNMENT): Extend to 512-bits. + (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS): Add new registers. + (CALL_USED_REGISTERS, REG_ALLOC_ORDER): Likewise. + (VALID_AVX512F_SCALAR_MODE, VALID_AVX512F_REG_MODE): New. + (SSE_REG_MODE_P): Support new modes. + (FIRST_MMX_REG, FIRST_REX_INT_REG, FIRST_REX_SSE_REG): Add comments. + (FIRST_EXT_REX_SSE_REG, LAST_EXT_REX_SSE_REG): New. + (reg_class, REG_CLASS_NAMES): Add EVEX_SSE_REGS, ALL_SSE_REGS. + (SSE_CLASS_P, MAYBE_SSE_CLASS_P): Replace SSE_REGS with ALL_SSE_REGS. + (REG_CLASS_CONTENTS): Add new registers. + (SSE_REGNO_P, SSE_REGNO, HARD_REGNO_RENAME_OK): Support new registers. + (EXT_REX_SSE_REGNO_P): New. + (HI_REGISTER_NAMES): Add new registers. + * config/i386/i386.md: Define constants for new registers. + (mode): Add new 512-bit modes. + (prefix): Support evex prefix. + (isa): Support avx512f, noavx512f, fma_avx512f. + (ssemodesuffix): Add new 512-bit modes. + (movxi): New. + (*movxi_internal_avx512f): Ditto. + (*movdi_internal): Replace constraint "x" with the new constraint "v". + Support MODE_XI. + (*movsi_internal): Likewise. + (*movdf_internal): Likewise. + (*movsf_internal): Likewise. + (*fop_<mode>_comm_sse): Replace constraint "x" with new constraint "v". + (<code><mode>3): Likewise. + * config/i386/i386.opt (mavx512f, mavx512pf, mavx512er, mavx512cd): + New. + * config/i386/mmx.md (*mov<mode>_internal): Replace constraint "x" + with the new constraint "v". + * config/i386/sse.md (*mov<mode>_internal): Support new registers and + modes. + (<sse>_loadu<ssemodesuffix><avxsizesuffix>): Replace constraint "x" + with the new constraint "v". + (<sse2>_loaddqu<avxsizesuffix>): Likewise. + (<sse2>_storedqu<avxsizesuffix>): Likewise. + (*<plusminus_insn><mode>3): Likewise. + (<sse>_vm<plusminus_insn><mode>3): Likewise. + (*mul<mode>3): Likewise. + (<sse>_vmmul<mode>3): Likewise. + (<sse>_div<mode>3): Likewise. + (<sse>_vmdiv<mode>3): Likewise. + (<sse>_sqrt<mode>2): Likewise. + (<sse>_vmsqrt<mode>2): Likewise. + (*<code><mode>3_finite): Likewise. + (*<code><mode>3) <smaxmin>: Likewise. + (<sse>_vm<code><mode>3): Likewise. + (*<code><mode>3) <any_logic>: Likewise. + (*fma_fmadd_<mode>): Likewise. + (*fma_fmsub_<mode>): Likewise. + (*fma_fnmadd_<mode>): Likewise. + (*fma_fnmsub_<mode>): Likewise. + (*fma_fmaddsub_<mode>): Likewise. + (*fma_fmsubadd_<mode>): Likewise. + (*fmai_fmadd_<mode>): Likewise. + (*fmai_fmsub_<mode>): Likewise. + (*fmai_fnmadd_<mode>): Likewise. + (*fmai_fnmsub_<mode>): Likewise. + (sse_cvtsi2ss): Likewise. + (sse_cvtsi2ssq): Likewise. + (sse_cvtss2si): Likewise. + (sse_cvtss2si_2): Likewise. + (sse_cvtss2siq): Likewise. + (sse_cvtss2siq_2): Likewise. + (sse_cvttss2si): Likewise. + (sse_cvtss2siq_2): Likewise. + (float<sseintvecmodelower><mode>2): Likewise. + (sse2_cvtsd2si_2): Likewise. + (sse2_cvtsd2siq_2): Likewise. + (*<plusminus_insn><mode>3): Likewise. + (*<sse2_avx2>_<plusminus_insn><mode>3): Likewise. + (*<sse4_1_avx2>_mul<mode>3): Likewise. + (ashr<mode>3): Likewise. + (<shift_insn><mode>3): Likewise. + (avx2_<code><mode>3): Likewise. + (*avx2_<code><mode>3): Likewise. + (*andnot<mode>3): Likewise. + (*<code><mode>3) <any_logic>: Likewise. + (abs<mode>2): Likewise. + (avx2_permvar<mode>): Likewise. + (avx2_perm<mode>_1): Likewise. + (*avx_vpermilp<mode>): Likewise. + (avx_vpermilvar<mode>3): Likewise. + (avx2_ashrv<mode>): Likewise. + (avx2_<shift_insn>v<mode>): Likewise. + * doc/invoke.texi: Document -mavx512f, -mavx512pf, -mavx512er, + -mavx512cd. + * doc/rtl.texi: Document XImode. + +2013-08-21 Jeff Law <law@redhat.com> + + * tree-flow.h (register_jump_thread): Pass vector of edges + instead of each important edge. + * tree-ssa-threadedge.c (thread_across_edge): Build the jump + thread path into a vector and pass that to register_jump_thread. + * tree-ssa-threadupdate.c (register_jump_thread): Conver the + passed in edge vector to the current 3-edge form. + + Revert: + 2013-08-20 Alexey Makhalov <makhaloff@gmail.com> + + * dce.c (fini_dce): Call df_analyze again just in case + delete_unmarked_insns removed anything. + +2013-08-21 Joern Rennecke <joern.rennecke@embecosm.com> + + * reload.h (struct reg_equivs): Rename to .. + (struct reg_equivs_s): .. this. + +2013-08-20 Martin Liska <marxin.liska@gmail.com> + + * ipa.c (ipa_profile_read_summary): Fix buffer overflow. + +2013-08-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config/sol2-10.h (TARGET_LIBC_HAS_FUNCTION): Don't nest comment. + +2013-08-21 Jeff Law <law@redhat.com> + + * tree-vrp.c (simplify_stmt_for_jump_threading): Try to + simplify assignments too. If the RHS collapses to a singleton + range, then return the value for the range. + +2013-08-21 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/sse.md (V16): Rename to... + (VMOVE): this. + (mov<mode>): Update iterator name. + (*mov<mode>_internal): Ditto. + (push<mode>1): Ditto. + (movmisalign<mode>): Ditto. + +2013-08-20 Jan Hubicka <jh@suse.cz> + + PR bootstrap/58186 + * cgraph.c (cgraph_add_edge_to_call_site_hash): Overwrite hash + entry for direct edges. + (cgraph_turn_edge_to_speculative): Fix setting of can_throw_external. + +2013-08-20 David Malcolm <dmalcolm@redhat.com> + + Revert my last two changes, r201865 and r201864: + + Revert r201865: + 2013-08-20 David Malcolm <dmalcolm@redhat.com> + + Make opt_pass and gcc::pass_manager be GC-managed, so that pass + instances can own GC refs. + + * Makefile.in (GTFILES): Add pass_manager.h and tree-pass.h. + * context.c (gcc::context::gt_ggc_mx): Traverse passes_. + (gcc::context::gt_pch_nx): Likewise. + (gcc::context::gt_pch_nx): Likewise. + * ggc.h (gt_ggc_mx <T>): New. + (gt_pch_nx_with_op <T>): New. + (gt_pch_nx <T>): New. + * passes.c (opt_pass::gt_ggc_mx): New. + (opt_pass::gt_pch_nx): New. + (opt_pass::gt_pch_nx_with_op): New. + (pass_manager::gt_ggc_mx): New. + (pass_manager::gt_pch_nx): New. + (pass_manager::gt_pch_nx_with_op): New. + (pass_manager::operator new): Use + ggc_internal_cleared_alloc_stat rather than xcalloc. + * pass_manager.h (class pass_manager): Add GTY((user)) marking. + (pass_manager::gt_ggc_mx): New. + (pass_manager::gt_pch_nx): New. + (pass_manager::gt_pch_nx_with_op): New. + * tree-pass.h (class opt_pass): Add GTY((user)) marking. + (opt_pass::operator new): New. + (opt_pass::gt_ggc_mx): New. + (opt_pass::gt_pch_nx): New. + (opt_pass::gt_pch_nx_with_op): New. + + Revert r201864: + 2013-08-20 David Malcolm <dmalcolm@redhat.com> + + * Makefile.in (GTFILES): Add context.h. + * context.c (gcc::context::operator new): New. + (gcc::context::gt_ggc_mx): New. + (gcc::context::gt_pch_nx): New. + (gcc::context::gt_pch_nx): New. + * context.h (gcc::context): Add GTY((user)) marking. + (gcc::context::operator new): New. + (gcc::context::gt_ggc_mx): New. + (gcc::context::gt_pch_nx): New. + (gcc::context::gt_pch_nx): New. + (g): Add GTY marking. + (gt_ggc_mx (gcc::context *)): New. + (gt_pch_nx (gcc::context *)): New. + (gt_pch_nx (gcc::context *ctxt, gt_pointer_operator op, + void *cookie)): New. + * gengtype.c (open_base_files) <ifiles>: Add context.h. + +2013-08-20 Alexey Makhalov <makhaloff@gmail.com> + + * dce.c (fini_dce): Call df_analyze again just in case + delete_unmarked_insns removed anything. + +2013-08-20 Teresa Johnson <tejohnson@google.com> + + PR rtl-optimizations/57451 + * final.c (reemit_insn_block_notes): Prevent lexical blocks + from crossing split section boundaries. + +2013-08-20 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> + + * config/arm/linux-elf.h (MULTILIB_DEFAULTS): Remove definition. + * config/arm/t-linux-eabi (MULTILIB_OPTIONS): Document association + with MULTLIB_DEFAULTS. + +2013-08-20 Nick Clifton <nickc@redhat.com> + + * target.def (narrow_volatile_bitfield): Note that the default + value is false, not !TARGET_STRICT_ALIGN. + * doc/tm.texi: Regenerate. + +2013-08-20 Pavel Chupin <pavel.v.chupin@intel.com> + + Fix LIB_SPEC for systems without libpthread. + + * config/gnu-user.h: Introduce GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC. + * config/arm/linux-eabi.h: Use GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC + for Android. + * config/i386/linux-common.h: Likewise. + * config/mips/linux-common.h: Likewise. + +2013-08-20 Zhouyi Zhou <yizhouzhou@ict.ac.cn> + + * tree-ssa-ccp.c (get_default_value): Remove redundant condition + checks. + +2013-08-20 David Malcolm <dmalcolm@redhat.com> + + Make opt_pass and gcc::pass_manager be GC-managed, so that pass + instances can own GC refs. + + * Makefile.in (GTFILES): Add pass_manager.h and tree-pass.h. + * context.c (gcc::context::gt_ggc_mx): Traverse passes_. + (gcc::context::gt_pch_nx): Likewise. + (gcc::context::gt_pch_nx): Likewise. + * ggc.h (gt_ggc_mx <T>): New. + (gt_pch_nx_with_op <T>): New. + (gt_pch_nx <T>): New. + * passes.c (opt_pass::gt_ggc_mx): New. + (opt_pass::gt_pch_nx): New. + (opt_pass::gt_pch_nx_with_op): New. + (pass_manager::gt_ggc_mx): New. + (pass_manager::gt_pch_nx): New. + (pass_manager::gt_pch_nx_with_op): New. + (pass_manager::operator new): Use + ggc_internal_cleared_alloc_stat rather than xcalloc. + * pass_manager.h (class pass_manager): Add GTY((user)) marking. + (pass_manager::gt_ggc_mx): New. + (pass_manager::gt_pch_nx): New. + (pass_manager::gt_pch_nx_with_op): New. + * tree-pass.h (class opt_pass): Add GTY((user)) marking. + (opt_pass::operator new): New. + (opt_pass::gt_ggc_mx): New. + (opt_pass::gt_pch_nx): New. + (opt_pass::gt_pch_nx_with_op): New. + +2013-08-20 David Malcolm <dmalcolm@redhat.com> + + * Makefile.in (GTFILES): Add context.h. + * context.c (gcc::context::operator new): New. + (gcc::context::gt_ggc_mx): New. + (gcc::context::gt_pch_nx): New. + (gcc::context::gt_pch_nx): New. + * context.h (gcc::context): Add GTY((user)) marking. + (gcc::context::operator new): New. + (gcc::context::gt_ggc_mx): New. + (gcc::context::gt_pch_nx): New. + (gcc::context::gt_pch_nx): New. + (g): Add GTY marking. + (gt_ggc_mx (gcc::context *)): New. + (gt_pch_nx (gcc::context *)): New. + (gt_pch_nx (gcc::context *ctxt, gt_pointer_operator op, + void *cookie)): New. + * gengtype.c (open_base_files) <ifiles>: Add context.h. + +2013-08-20 Alan Modra <amodra@gmail.com> + + PR target/57865 + * config/rs6000/rs6000.c (rs6000_emit_prologue): Correct ool_adjust. + (rs6000_emit_epilogue): Likewise. + +2013-08-19 Dehao Chen <dehao@google.com> + + * value-prof.c (gimple_ic): Fix the bug of adding EH edge. + +2013-08-19 Peter Bergner <bergner@vnet.ibm.com> + Jakub Jelinek <jakub@redhat.com> + + * builtins.def (BUILT_IN_FABSD32): New DFP ABS builtin. + (BUILT_IN_FABSD64): Likewise. + (BUILT_IN_FABSD128): Likewise. + * builtins.c (expand_builtin): Add support for new DFP ABS builtins. + (fold_builtin_1): Likewise. + * config/rs6000/dfp.md (*negtd2_fpr): Handle non-overlapping + destination and source operands. + (*abstd2_fpr): Likewise. + (*nabstd2_fpr): Likewise. + +2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.c (mips_adjust_insn_length): Add checks for + JUMP_P and INSN_P. + +2013-08-19 Aldy Hernandez <aldyh@redhat.com> + + * doc/invoke.texi (-fcilkplus): Clarify that implementation is + incomplete. + +2013-08-19 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * target.def (TARGET_LIBC_HAS_FUNCTION): New target hook. + * builtins.c (default_libc_has_function): New. + (gnu_libc_has_function): Ditto. + (no_c99_libc_has_function): Ditto. + (expand_builtin_cexpi): Using new target hook TARGET_LIBC_HAS_FUNCTION + instead of TARGET_HAS_SINCOS and TARGET_C99_FUNCTIONS. + (fold_builtin_sincos): Likewise. + (fold_builtin_cexp): Likewise. + * builtins.def (DEF_C94_BUILTIN): Likewise. + (DEF_C99_BUILTIN): Likewise. + (DEF_C99_C90RES_BUILTIN): Likewise. + (DEF_C99_COMPL_BUILTIN): New define. Change all complex c99 builtin + definitions to using this define. + * config/darwin-protos.h (darwin_libc_has_function): New. + * config/darwin.c (darwin_libc_has_function): Ditto. + * config/alpha/linux.h: Remove TARGET_C99_FUNCTIONS and + TARGET_HAS_SINCOS. Redefine TARGET_LIBC_HAS_FUNCTION. + * config/darwin.h: Ditto. + * config/elfos.h: Ditto. + * config/freebsd.h: Ditto. + * config/i386/cygming.h: Ditto. + * config/i386/djgpp.h: Ditto. + * config/i386/i386-interix.h: Ditto. + * config/microblaze/microblaze.h: Ditto. + * config/mmix/mmix.h: Ditto. + * config/gnu-user.h: Ditto. + * config/ia64/hpux.h: Ditto. + * config/pa/pa-hpux.h: Ditto. + * config/pdp11/pdp11.h: Ditto. + * config/picochip/picochip.h: Ditto. + * config/linux.h: Ditto. + * config/netbsd.h: Ditto. + * config/openbsd.h: Ditto. + * config/rs6000/aix43.h: Ditto. + * config/rs6000/aix51.h: Ditto. + * config/rs6000/aix52.h: Ditto. + * config/rs6000/aix53.h: Ditto. + * config/rs6000/aix61.h: Ditto. + * config/rs6000/darwin.h: Ditto. + * config/rs6000/linux.h: Ditto. + * config/rs6000/linux64.h: Ditto. + * config/s390/tpf.h: Ditto. + * config/sol2-10.h: Ditto. + * config/sol2.h: Ditto. + * config/vms/vms.h: Ditto. + * config/vxworks.h: Ditto. + * config/linux-android.c (linux_android_libc_has_function): + New linux-specific implementation of TARGET_LIBC_HAS_FUNCTION. + * config/linux-protos.h (linux_android_libc_has_function): + New declaration. + * config/i386/i386.c (ix86_libc_has_function): New. + * config/i386/i386-protos.h + (ix86_libc_has_function): New declaration. + * config/i386/i386.md + ("isinfxf2"): Change condition for TARGET_LIBC_HAS_FUNCTION. + ("isinf<mode>2): Likewise. + * convert.c (convert_to_integer): Using new target hook + TARGET_LIBC_HAS_FUNCTION istead of TARGET_HAS_SINCOS and + TARGET_C99_FUNCTIONS. + * fortran/f95-lang.c (gfc_init_builtin_functions): Ditto. + * tree-ssa-math-opts.c (execute_cse_sincos): Ditto. + * coretypes.h (function_class): New enum for different + classes of functions. + * defaults.h: Remove TARGET_C99_FUNCTIONS and TARGET_HAS_SINCOS. + * doc/tm.texi.in (TARGET_C99_FUNCTIONS): Remove documentation. + (TARGET_HAS_SINCOS): Likewise. + (TARGET_LIBC_HAS_FUNCTION): New. + * doc/tm.texi: Regenerated. + * targhooks.h (default_libc_has_function): New declaration. + (no_c99_libc_has_function): Ditto. + (gnu_libc_has_function): Ditto. + * system.h: Add the poisoning of TARGET_C99_FUNCTIONS + and TARGET_HAS_SINCOS. + +2013-08-18 Jan Hubicka <jh@suse.cz> + + * Makeifle-in (ipa-devirt.o): New. + (GTFILES): Add ipa-utils.h and ipa-devirt.c + * cgraphunit.c (decide_is_symbol_needed): Do not care about virtuals. + (analyze_functions): Look into possible targets of polymorphic call. + * dumpfile.c (dump_files): Add type-inheritance dump. + * dumpfile.h (TDI_inheritance): New. + * ipa-devirt.c: New file. + * ipa-utils.h (odr_type_d): Forward declare. + (odr_type): New type. + (build_type_inheritance_graph): Declare. + (possible_polymorphic_call_targets): Declare and introduce inline + variant when only edge is pased. + (dump_possible_polymorphic_call_targets): Likewise. + * timevar.def (TV_IPA_INHERITANCE, TV_IPA_VIRTUAL_CALL): New. + * tree.c (type_in_anonymous_namespace_p): Break out from ... + (types_same_for_odr): ... here. + * tree.h (type_in_anonymous_namespace_p): Declare. + +2013-08-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58006 + * tree-parloops.c (take_address_of): Don't ICE if get_name + returns NULL. + (eliminate_local_variables_stmt): Remove clobber stmts. + +2013-08-18 Eric Botcazou <ebotcazou@adacore.com> + + * cgraphunit.c (handle_alias_pairs): Reset the alias flag after the + error message is issued for an alias to undefined symbol. + +2013-08-18 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_create_indirect_edge): Discover + polymorphic calls and record basic info into indirect_info. + * gimple-fold.c (gimple_fold_call): When doing BINFO based + devirtualization, ignore objc function calls. + * ipa-cp.c (initialize_node_lattices): Be ready for polymorphic + call with no parm index info. + * ipa-prop.c (ipa_analyze_call_uses): Likewise. + * tree.c (virtual_method_call_p): New function. + * tree.h (virtual_method_call_p): Declare. + +2013-08-16 Jan Hubicka <jh@suse.cz> + + PR middle-end/58179 + * tree.c (obj_type_ref_class): Do not ICE on non-method calls. + +2013-08-16 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.md (rs6000_get_timebase_ppc32): Add length + attribute. + +2013-08-16 David Malcolm <dmalcolm@redhat.com> + + * gengtype.c (type_for_name): Add special-case support for + locating types within the "gcc::" namespace. + (open_base_files): Emit a "using namespace gcc" directive. + +2013-08-16 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/58160 + * config/rs6000/predicates.md (fusion_gpr_mem_load): Allow the + memory rtx to contain ZERO_EXTEND and SIGN_EXTEND. + + * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Pass operands + array instead of each individual operand as a separate argument. + (emit_fusion_gpr_load): Likewise. + (expand_fusion_gpr_load): Add new function declaration. + + * config/rs6000/rs6000.c (fusion_gpr_load_p): Change the calling + signature to have the operands passed as an array, instead of as + separate arguments. Allow ZERO_EXTEND to be in the memory + address, and also SIGN_EXTEND if -mpower8-fusion-sign. Do not + depend on the register live/dead flags when peepholes are run. + (expand_fusion_gpr_load): New function to be called from the + peephole2 pass, to change the register that addis sets to be the + target register. + (emit_fusion_gpr_load): Change the calling signature to have the + operands passed as an array, instead of as separate arguments. + Allow ZERO_EXTEND to be in the memory address, and also + SIGN_EXTEND if -mpower8-fusion-sign. + + * config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): Delete unused + unspec enumeration. + (power8 fusion peephole/peephole2): Rework the fusion peepholes to + adjust the register addis loads up in the peephole2 pass. Do not + depend on the register live/dead state when the peephole pass is done. + +2013-08-16 David Malcolm <dmalcolm@redhat.com> + + * gengtype.c (create_user_defined_type): Ensure that the kind + is set to TYPE_USER_STRUCT, fixing a bug seen when an incomplete + declaration is seen before the GTY((user)) marking. + +2013-08-16 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR target/58105 + * config/i386/i386.c (make_resolver_func): Set DECL_UNINLINABLE. + +2013-08-16 Jan Hubicka <jh@suse.cz> + + * gimple-fold.c (gimple_extract_devirt_binfo_from_cst): Add new + arugment expected_type. + (gimple_fold_call): Use it. + * gimple.h (gimple_extract_devirt_binfo_from_cst): Update prototype. + * ipa-cp.c (ipa_get_indirect_edge_target_1): Update. + * ipa-prop.c (ipa_analyze_virtual_call_uses): Use obj_type_ref_class. + (try_make_edge_direct_virtual_call): Likewise. + * tree.c (obj_type_ref_class): New. + * tree.h (obj_type_ref_class): Use it. + +2013-08-16 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * sched-vis.c (rtl_slim_pp_initialized): Remove. + (rtl_slim_pp): Likewise. + (init_rtl_slim_pretty_print): Likewise. + (dump_value_slim): Don't call it. Use local pretty printer. + (dump_insn_slim): Likewise. + (dump_rtl_slim): Likewise. + (str_pattern_slim): Likewise. + * tree-mudflap.c (mf_varname_tree): Use local pretty printer. + Simplify. + +2013-08-16 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58164 + * gimple.c (walk_stmt_load_store_addr_ops): For visit_addr + walk gimple_goto_dest of GIMPLE_GOTO. + + PR tree-optimization/58165 + * tree-call-cdce.c (shrink_wrap_one_built_in_call): If + bi_call must be the last stmt in a bb, don't split_block, instead + use fallthru edge from it and give up if there is none. + Release conds vector when returning early. + +2013-08-14 Xinliang David Li <davidxl@google.com> + + * config/i386/i386.c (ix86_option_override_internal): + Remove unused variable and field. + +2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/57949 + * doc/invoke.texi: Add documentation of mcompat-align-parm option. + * config/rs6000/rs6000.opt: Add mcompat-align-parm option. + * config/rs6000/rs6000.c (rs6000_function_arg_boundary): For AIX + and Linux, correct BLKmode alignment when 128-bit alignment is + required and compatibility flag is not set. + (rs6000_gimplify_va_arg): For AIX and Linux, honor specified alignment + for zero-size arguments when compatibility flag is not set. + +2013-08-14 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58145 + * tree-sra.c (build_ref_for_offset): If prev_base has + TREE_THIS_VOLATILE or TREE_SIDE_EFFECTS, propagate it to MEM_REF. + +2013-08-14 Xinliang David Li <davidxl@google.com> + + * config/i386/i386.c (ix86_option_override_internal): + Fix uninitialized variable error. + +2013-08-14 Xinliang David Li <davidxl@google.com> + + * config/i386/i386.opt: Define two new options. + * config/i386/x86-tune.def: Add arch selector field in macros. + * config/i386/i386.h: Adjust macro definition. + * config/i386/i386.c (ix86_option_override_internal): + Refactor the code. + (parse_mtune_ctrl_str): New function. + (set_ix86_tune_features): New function. + (ix86_function_specific_restore): Call the new helper function. + +2013-08-14 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/57662 + * sel-sched.c (code_motion_process_successors): When the current insn + is removed after the recursive traversal, break from the loop. + Add comments and debug printouts. + +2013-08-14 Jakub Jelinek <jakub@redhat.com> + Alexandre Oliva <aoliva@redhat.com> + + PR target/58067 + * config/i386/i386.c (ix86_delegitimize_address): For CM_MEDIUM_PIC + and CM_LARGE_PIC ix86_cmodel fall thru into the -m32 code, handle + there also UNSPEC_PLTOFF. + +2013-08-14 Marek Polacek <polacek@redhat.com> + + * ipa-inline-analysis.c (add_clause): Avoid shifting integer + NUM_CONDITIONS bit positions. + +2013-08-13 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (CHECKSUM_BLOCK): New macro. + (attr_checksum): Hash vector contents instead of pointer. + (attr_checksum_ordered): Likewise. + +2013-08-13 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*sse2_maskmovdqu): Emit addr32 prefix + when Pmode != word_mode. Add length_address attribute. + (sse3_monitor_<mode>): Merge from sse3_monitor and + sse3_monitor64_<mode> insn patterns. Emit addr32 prefix when + Pmode != word_mode. Update insn length attribute. + * config/i386/i386.c (ix86_option_override_internal): Update + ix86_gen_monitor selection for merged sse3_monitor insn. + +2013-08-13 Julian Brown <julian@codesourcery.com> + + * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Don't + perform invalid legitimization on greater-than-word-size modes for + TARGET_E500_DOUBLE. + +2013-08-13 Vladimir Makarov <vmakarov@redhat.com> + + * ira.c (setup_class_translate_array): Use aclass instead of cl + for classes not fully covered by allocno classes. + +2013-08-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57661 + * tree-inline.h (struct copy_body_data): Add blocks_to_copy field. + * tree-inline.c (tree_function_versioning): Initialize it. + (remap_gimple_stmt): Return GIMPLE_NOP for MEM_REF lhs clobber stmts + if id->blocks_to_copy and MEM_REF's SSA_NAME is defined in a block + that is not being copied. + + PR sanitizer/56417 + * asan.c (instrument_strlen_call): Fix typo in comment. + Use char * type even for the lhs of POINTER_PLUS_EXPR. + +2013-08-13 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips.md (prefetch): Use lw instead of ld on + loongson in 32bit mode. + +2013-08-13 Nick Clifton <nickc@redhat.com> + + * config.gcc: (avr-linux): Allow for tmake_file not being empty. + +2013-08-13 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_turn_edge_to_speculative): Return newly + introduced edge; fix typo in sanity check. + (cgraph_resolve_speculation): Export; improve diagnostic. + (cgraph_redirect_edge_call_stmt_to_callee): Better diagnostic; cancel + speculation at type mismatch. + * cgraph.h (cgraph_turn_edge_to_speculative): Update. + (cgraph_resolve_speculation): Declare. + (symtab_can_be_discarded): New function. + * value-prof.c (gimple_ic_transform): Remove actual transform code. + * ipa-inline-transform.c (speculation_removed): New global var. + (clone_inlined_nodes): See if speculation can be removed. + (inline_call): If speculations was removed, we growths may not match. + * ipa-inline.c (can_inline_edge_p): Add DISREGARD_LIMITS parameter. + (speculation_useful_p): New function. + (resolve_noninline_speculation): New function. + (inline_small_functions): Resolve useless speculations. + * ipa-inline.h (speculation_useful_p): Declare + * ipa.c (can_replace_by_local_alias): Simplify. + (ipa_profile): Produce speculative calls in non-lto, too; + add simple cost model; produce local aliases. + +2013-08-13 David Malcolm <dmalcolm@redhat.com> + + * config/i386/t-i386 (i386.o): Rename stray PIPELINE_H to + PASS_MANAGER_H. + +2013-08-12 Paolo Carlini <paolo.carlini@oracle.com> + + * config/i386/i386.c (ix86_function_versions): Use error + inform. + +2013-08-12 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (floatunssi<mode>2 expand): Use MODEF mode + iterator instead of X87MODEF. + +2013-08-12 Perez Read <netfirewall@gmail.com> + + PR target/58132 + * config/i386/i386.md (*movabs<mode>_1): Add <ptrsize> PTR before + operand 0 for intel asm alternative. + (*movabs<mode>_2): Ditto for operand 1. + +2013-08-12 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_none.h + (vdup<bhsd>_lane_<su><8,16,32,64>): Fix macro call. + +2013-08-12 Nick Clifton <nickc@redhat.com> + + * config.gcc (m32r-linux): Allow for tmake_file not being empty. + +2013-08-12 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/i386.md (floatunssi<mode>2 expand): Add new + expand for QI/HImode operand to produce more effictive code for + unsigned char(short) --> float(double) conversion. + +2013-08-12 Alexander Monakov <amonakov@ispras.ru> + + * doc/invoke.texi: Mention that -ftls-model does not force the final + model. + +2013-08-12 Marek Polacek <polacek@redhat.com> + Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/57980 + * tree-tailcall.c (process_assignment): Call build_minus_one_cst + when creating -1 constant. + +2013-08-10 Jan Hubicka <jh@suse.cz> + + Workaround binutils PR14342. + * tree-profile.c (init_ic_make_global_vars): Add LTO path. + (gimple_init_edge_profiler): Likewise. + (gimple_gen_ic_func_profiler): Likewise. + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_create_edge_1): Clear speculative flag. + +2013-08-09 Xinliang David Li <davidxl@google.com> + + * config/i386/stringop.def: New file. + * config/i386/stringop.opt: New file. + * config/i386/i386-opts.h: Include stringopt.def. + * config/i386/i386.opt: Include stringopt.opt. + * config/i386/i386.c (ix86_option_override_internal): + Override default size based stringop inline strategies with options. + * config/i386/i386.c (ix86_parse_stringop_strategy_string): + New function. + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * ipa-ref.c (ipa_clear_stmts_in_references): Clear lto_stmt_uid, too. + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_resolve_speculation): Cut frequency to + CGRAPH_FREQ_MAX. + (dump_cgraph_node): Dump profile-id. + * cgraph.h (cgraph_indirect_call_info): Add common_target_id + and common_target_probability. + * lto-cgraph.c (lto_output_edge): Stream common targets. + (lto_output_node): Stream profile ids. + (input_node): Stream profile ids. + (input_edge): Stream common targets. + * lto-streamer-in.c (fixup_call_stmt_edges_1): Fix formatting. + * ipa.c: Include value-prof.h + (ipa_profile_generate_summary): Turn indirect call statement histograms + into common targets. + (ipa_profile): Turn common targets into speculative edges. + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * cgraph.h (cgraph_node): Add profile_id. + * value-prof.c (cgraph_node_map): Turn into pointer_map. + (init_node_map): Rewrite to handle hashes increas of incremental IDs. + (del_node_map): Update. + (find_func_by_funcdef_no): Replace by ... + (find_func_by_profile_id): ... this one. + (gimple_ic_transform): Do not remove useful histograms when + speculation is not done; dump info when indirect call removal + can happen at LTO. + * value-prof.h (find_func_by_profile_id, gimple_ic): Declare. + * gcov-io.h (__gcov_indirect_call_profiler): Replace by ... + (__gcov_indirect_call_profiler_v2): .. this one. + * profile.h (init_node_map): Update. + * coverage.c (coverage_compute_profile_id): New function. + * coverage.h (coverage_compute_profile_id): Declare. + * tree-profile.c (init_ic_make_global_vars): Make + __gcov_indirect_call_callee and __gcov_indirect_call_counters global. + (gimple_init_edge_profiler): Update prototype of + __gcov_indirect_call_profiler. + (gimple_gen_ic_func_profiler): Simplify. + (tree_profiling): Use init_node_map + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * cgraphbuild.c (cgraph_rebuild_references): Rebuild only + non-speculative refs. + * cgraph.c (cgraph_update_edge_in_call_site_hash): New function. + (cgraph_add_edge_to_call_site_hash): Deal with speculative calls. + (cgraph_set_call_stmt): Likewise. + (cgraph_create_edge_1): Fix release checking compilatoin; + clear lto_stmt_uid. + (cgraph_free_edge): Free indirect info. + (cgraph_turn_edge_to_speculative): New function. + (cgraph_speculative_call_info): New function. + (cgraph_make_edge_direct): Return direct edge; handle speculation. + (cgraph_redirect_edge_call_stmt_to_callee): Expand speculative edges. + (dump_cgraph_node): Dump speculation. + (verify_edge_count_and_frequency): Accept speculative edges. + (verify_edge_corresponds_to_fndecl): Handle partitioned cgraph. + (verify_cgraph_node): Handle speculation. + * cgraph.h (cgraph_edge): Add SPECULATIVE flag. + (cgraph_set_call_stmt): Update prototype. + (cgraph_make_edge_direct): Update prototype. + (cgraph_speculative_call_info): Declare. + * ipa-cp.c (ipcp_discover_new_direct_edges): Be ready for edge + to change; update call of ipa_find_references. + * ipa-ref.c (ipa_record_reference): Fix return value; clear + lto_stmt_uid and speculative flags. + (ipa_dump_references): Dump speculation. + (ipa_clone_references): Clone speculative flag. + (ipa_clone_referring): Likewise. + (ipa_clone_ref): New function. + (ipa_find_reference): Look into lto_stmt_uids + (ipa_clear_stmts_in_references): Do not clear speculative calls. + * ipa-ref.h (ipa_ref): Add lto_stmt_uid and speculative flags. + (ipa_find_reference): Update declaration. + (ipa_clone_ref): Declare. + * lto-cgraph.c (lto_output_edge): Make lto_stmt_uids start from 0; + stream speculative flag. + (lto_output_ref): Stream statements uids and speculation. + (input_ref): Likewise. + (input_edge): Stream speuclation. + * cgraphclones.c (cgraph_clone_edge): Clone speculation. + (cgraph_set_call_stmt_including_clones): Handle speculation. + * ipa-inline.c (heap_edge_removal_hook): New function. + (inline_small_functions): Register it. + * lto-streamer-in.c (fixup_call_stmt_edges_1): Bounds checking; + also initialize refs. + * ipa-prop.c (ipa_make_edge_direct_to_target): Be ready for + edge to change. + (try_make_edge_direct_simple_call): Likewise. + (try_make_edge_direct_simple_call): Likewise. + (update_indirect_edges_after_inlining): Likewise. + (remove_described_reference): Look proper lto_stmt_uid. + (propagate_controlled_uses): Likewise. + (propagate_controlled_uses): Liekwise. + * tree-inline.c (copy_bb): Copy speculative edges. + (redirect_all_calls): New function. + (copy_cfg_body): Do redirection after loop info is updated. + (delete_unreachable_blocks_update_callgraph): Updadte speculation. + +2013-08-09 Jan Hubicka <jh@suse.cz> + + * lto-streamer-out.c (output_function): Renumber PHIs. + * lto-streamer-in.c (input_function): Likewise. + +2013-08-09 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (get_lane_signed): Remove. + (get_lane_unsigned): Likewise. + (dup_lane_scalar): Likewise. + (get_lane): enable for VALL. + * config/aarch64/aarch64-simd.md + (aarch64_dup_lane_scalar<mode>): Remove. + (aarch64_get_lane_signed<mode>): Likewise. + (aarch64_get_lane_unsigned<mode>): Likewise. + (aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): New. + (aarch64_get_lane_zero_extendsi<mode>): Likewise. + (aarch64_get_lane<mode>): Enable for all vector modes. + (aarch64_get_lanedi): Remove misleading constraints. + * config/aarch64/arm_neon.h + (__aarch64_vget_lane_any): Define. + (__aarch64_vget<q>_lane_<fpsu><8,16,32,64>): Likewise. + (vget<q>_lane_<fpsu><8,16,32,64>): Use __aarch64_vget_lane macros. + (vdup<bhsd>_lane_<su><8,16,32,64>): Likewise. + * config/aarch64/iterators.md (VDQQH): New. + (VDQQHS): Likewise. + (vwcore): Likewise. + +2013-08-09 Eric Botcazou <ebotcazou@adacore.com> + + * configure.ac: Add GAS check for LEON instructions on SPARC. + * configure: Regenerate. + * config.in: Likewise. + * config.gcc (with_cpu): Remove sparc-leon*-* and deal with LEON in the + sparc*-*-* block. + * config/sparc/sparc.opt (LEON, LEON3): New masks. + * config/sparc/sparc.h (ASM_CPU32_DEFAULT_SPEC): Set to AS_LEON_FLAG + for LEON or LEON3. + (ASM_CPU_SPEC): Pass AS_LEON_FLAG if -mcpu=leon or -mcpu=leon3. + (AS_LEON_FLAG): New macro. + * config/sparc/sparc.c (sparc_option_override): Set MASK_LEON for leon + and MASK_LEON3 for leon3 and unset them if HAVE_AS_LEON is not defined. + Deal with LEON and LEON3 for the memory model. + * config/sparc/sync.md (atomic_compare_and_swap<mode>): Enable if LEON3 + (atomic_compare_and_swap<mode>_1): Likewise. + (*atomic_compare_and_swap<mode>_1): Likewise. + +2013-08-09 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/arm/neon.md (vcond): Fix floating-point vector + comparisons against 0. + +2013-08-08 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (emit_spill_move): Remove assert. + (process_alt_operands): Add more debugging + output. Increase reject for spilling into memory. Decrease + reject for reloading scratch. + (split_reg): Use HARD_REGNO_CALLER_SAVE_MODE. + +2013-08-08 Steve Ellcey <sellcey@mips.com> + + * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add nan2008. + * config/mips/t-mti-elf (MULTILIB_OPTIONS): Make mips16 and + micromips incompatible. Add nan2008. + (MULTILIB_DIRNAMES): Add nan2008. + (MULTILIB_EXCEPTIONS): Remove mips16/micromips entry. + * config/mips/t-mti-linux (MULTILIB_OPTIONS): Make mips16 + and micromips incompatible. Add nan2008. + (MULTILIB_DIRNAMES): Add nan2008. + (MULTILIB_EXCEPTIONS): Remove mips16/micromips entry. + +2013-08-08 Richard Sandiford <rdsandiford@googlemail.com> + + PR rtl-optimization/58079 + * combine.c (combine_simplify_rtx): Avoid using SUBST if + simplify_comparison has widened a comparison with an integer. + +2013-08-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/neon.md (movmisalign<mode>): Disable when we + don't allow unaligned accesses. + (*movmisalign<mode>_neon_store): Likewise. + (*movmisalign<mode>_neon_load): Likewise. + (*movmisalign<mode>_neon_store): Likewise. + (*movmisalign<mode>_neon_load): Likewise. + +2013-08-08 Jan Hubicka <jh@suse.cz> + + * cgraphbuild.c (build_cgraph_edges): Do not walk into debugs. + (make_pass_rebuild_cgraph_edges): Also clear references. + * cgraph.c (verify_cgraph_node): Add basic ipa-ref verifier. + * ipa-inline-transform.c (inline_transform): Remove all references + after inlining. + * cgraphunit.c (expand_function): Remove all references after + expansion. + * ipa-ref.c (ipa_ref_has_aliases_p): Fix formatting. + (ipa_find_reference): Rewrite to iterator. + (remove_stmt_references): Likewise. + (ipa_clear_stmts_in_references): New function. + * ipa-ref.h (ipa_clear_stmts_in_references): Declare. + * cgraphclones.c (cgraph_materialize_all_clones): Remove or + clear references. + * ipa-split.c (split_function): Remove references in split function. + +2013-08-08 Richard Earnshaw <rearnsha@arm.com> + + PR target/57431 + * config/arm/arm/neon.md (neon_vld1_dupdi): New expand pattern. + (neon_vld1_dup<mode> VD iterator): Iterate over VD not VDX. + +2013-08-08 Richard Earnshaw <rearnsha@arm.com> + + PR target/56979 + * config/arm/arm.c (aapcs_vfp_allocate): Decompose the argument if the + suggested mode for the assignment isn't compatible with the + registers required. + +2013-08-08 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR target/58065 + * config/arm/arm.h (MALLOC_ABI_ALIGNMENT): Define. + +2013-08-07 Xinliang David Li <davidxl@google.com> + + * config/i386/i386.opt: New option -mtune-ctrl=. + * config/i386/x86-tune.def: New file. + * config/i386/i386.h: include x86-tune.def. + * config/i386/i386.c (ix86_option_override_internal): + Parsing -mtune-ctrl= option and set tune features. + +2013-08-07 Oleg Endo <olegendo@gcc.gnu.org> + + PR other/12081 + * config/rs6000/rs6000.c (gen_2arg_fn_t): Remove typedef. + (rs6000_emit_swdiv, rs6000_emit_swrsqrt): Don't cast result of GEN_FCN + to gen_2arg_fn_t. + +2013-08-07 Eric Botcazou <ebotcazou@adacore.com> + + * rtl.h (update_alignments): Declare. + * final.c (grow_label_align): New function extracted from... + (shorten_branches): ...here. Call it. + (update_alignments): New function. + * reorg.c (sibling_labels): New variable. + (get_label_before): Add SIBLING parameter. If it is non-zero, push + the new label along with it onto the sibling_labels vector. + (fill_simple_delay_slots): Adjust call to get_label_before. + (fill_slots_from_thread): Likewise. + (relax_delay_slots): Likewise. + (make_return_insns): Likewise. + (dbr_schedule): Invoke update_alignment on the sibling_labels vector. + +2013-08-07 Eric Botcazou <ebotcazou@adacore.com> + + * diagnostic.c (diagnostic_classify_diagnostic): Accept zero index and + document its semantics. + (diagnostic_report_diagnostic): Adjust accordingly. + +2013-08-07 David Malcolm <dmalcolm@redhat.com> + + * config/sparc/sparc.c (insert_pass_work_around_errata): Move into... + (sparc_option_override): ...and port to new C++ pass API. + * config/sparc/t-sparc (sparc.o): Add dep on CONTEXT_H + +2013-08-07 Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/rs6000.c (htm_expand_builtin) <case 0>: Remove. + +2013-08-06 Caroline Tice <cmtice@google.com> + + * gcc.c (VTABLE_VERIFICATION_SPEC): New definition. + (LINK_COMMAND_SPEC): Add VTABLE_VERIFICATION_SPEC. + * tree-pass.h: Add pass_vtable_verify. + * varasm.c (assemble_variable): Add code to properly set the comdat + section and name for the .vtable_map_vars section. + (assemble_vtyv_preinit_initializer): New function. + (default_sectin_type_flags): Make sure .vtable_map_vars section has + LINK_ONCE flag. + * output.h: Add function decl for assemble_vtv_preinit_initializer. + * vtable-verify.c: New file. + * vtable-verify.h: New file. + * flag-types.h (enum vtv_priority): Defintions for flag_vtable_verify + initialiation levels. + * timevar.def (TV_VTABLE_VERIFICATION): New definition. + * passes.def: Insert pass_vtable_verify. + * aclocal.m4: Reorder includes. + * doc/invoke.texi: Document the -fvtable-verify=, -fvtv-debug, and + -fvtv-counts options. + * config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Add vtv_start*.o, + as appropriate, if -fvtable-verify=... is used. + (GNU_USER_TARGET_ENDFILE_SPEC): Add vtv_end*.o as appropriate, if + -fvtable-verify=... is used. + * Makefile.in (OBJS): Add vtable-verify.o to list. + (vtable-verify.o): Add new build rule. + (GTFILES): Add vtable-verify.c to list. + * common.opt (fvtable-verify=): New flag. + (vtv_priority): Values for fvtable-verify= flag. + (fvtv-counts): New flag. + (fvtv-debug): New flag. + * tree.h (save_vtable_map_decl): New extern function decl. + +2013-08-07 David Malcolm <dmalcolm@redhat.com> + + * config/rl78/rl78.c (rl78_devirt_pass): Convert from a struct to... + (pass_rl78_devirt): ...new subclass of rtl_opt_pass along with... + (pass_data_rl78_devirt): ...new pass_data instance and... + (make_pass_rl78_devirt): ...new function. + (rl78_asm_file_start): Port pass registration to new C++ API. + +2013-08-07 David Malcolm <dmalcolm@redhat.com> + + * coretypes.h (rtl_opt_pass): Add. + (gcc::context): Add. + * config/epiphany/epiphany.c (pass_mode_switch_use): New. + (epiphany_init): Port to new C++ pass API. + (epiphany_optimize_mode_switching): Likewise. + * pass_manager.h (pass_manager::get_pass_split_all_insns): New. + (pass_manager::get_pass_mode_switching): New. + (pass_manager::get_pass_peephole2): New. + * mode-switching.c (pass_mode_switching): Add clone method. + * recog.c (pass_peephole2): Add clone method. + (pass_split_all_insns): Add clone method. + +2013-08-06 David Malcolm <dmalcolm@redhat.com> + + * config/mips/mips.c (insert_pass_mips_machine_reorg2): Move into... + (mips_option_override): ...here, porting to new C++ API for passes. + +2013-08-06 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_get_body): New function based on lto.c + implementation. + * cgraph.h (cgraph_get_body): Declare. + * cgraphclones.c (cgraph_create_virtual_clone): Commonize WPA and + LTO paths. + * cgraphunit.c (expand_function): Get body prior expanding. + * ipa.c (function_and_variable_visibility): Use gimple_has_body_p test. + * lto-cgraph.c (lto_output_node): Do not stream bodies we don't + really need. + * passes.c (do_per_function_toporder): Get body. + * tree-inline.c (expand_call_inline): Get body prior inlining it. + * tree-ssa-structalias.c (ipa_pta_execute): Get body; skip clones. + +2013-08-06 Martin Jambor <mjambor@suse.cz> + + PR fortran/57987 + * cgraphunit.c (cgraph_finalize_function): Assert that nested function + is not re-finalized. Rename second parameter to no_collect. + +2013-08-06 Martin Jambor <mjambor@suse.cz> + + PR middle-end/58041 + * gimple-ssa-strength-reduction.c (replace_ref): Make sure built + MEM_REF has proper alignment information. + +2013-08-05 Oleg Endo <olegendo@gcc.gnu.org> + + PR other/12081 + * recog.h (rtx (*insn_gen_fn) (rtx, ...)): Replace typedef with new + class insn_gen_fn. + * expr.c (move_by_pieces_1, store_by_pieces_2): Replace argument + rtx (*) (rtx, ...) with insn_gen_fn. + * genoutput.c (output_insn_data): Cast gen_? function pointers to + insn_gen_fn::stored_funcptr. Add initializer braces. + +2013-08-05 David Malcolm <dmalcolm@redhat.com> + + Rewrite how instances of passes are cloned to remove assumptions + about their sizes (thus allowing pass subclasses to have + additional data fields, albeit non-GC-managed ones at this point). + + * passes.c (make_pass_instance): Now that passes have clone + methods, rewrite this function to eliminate XNEW and memcpy + calls that used hardcoded sizes. Since this function no longer + creates pass instances, rename it to... + (add_pass_instance): ...this. Document the old way that passes were + numbered and flagged, and rework this function to continue using it. + (next_pass_1): Add an initial_pass argument for use by + add_pass_instance. + (position_pass): When adding multiple instances of a pass, use + the pass's clone method, rather than relying on the XNEW/memcpy + within the former make_pass_instance (now add_pass_instance). + (pass_manager::pass_manager): When invoking next_pass_1, also supply + the initial instance of the current pass within the pass manager. + +2013-08-05 David Malcolm <dmalcolm@redhat.com> + + This is the automated part of the conversion of passes from C + structs to C++ classes. + + Patch autogenerated by refactor_passes.py from + https://github.com/davidmalcolm/gcc-refactoring-scripts + revision 03fe39476a4c4ea450b49e087cfa817b5f92021e + + * asan.c (pass_asan): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_asan): ...new pass_data instance and... + (make_pass_asan): ...new function. + (pass_asan_O0): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_asan_O0): ...new pass_data instance and... + (make_pass_asan_O0): ...new function. + * auto-inc-dec.c (pass_inc_dec): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_inc_dec): ...new pass_data instance and... + (make_pass_inc_dec): ...new function. + * bb-reorder.c (pass_reorder_blocks): Convert from a global struct to + a subclass of rtl_opt_pass along with... + (pass_data_reorder_blocks): ...new pass_data instance and... + (make_pass_reorder_blocks): ...new function. + (pass_duplicate_computed_gotos): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_duplicate_computed_gotos): ...new pass_data instance and... + (make_pass_duplicate_computed_gotos): ...new function. + (pass_partition_blocks): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_partition_blocks): ...new pass_data instance and... + (make_pass_partition_blocks): ...new function. + * bt-load.c (pass_branch_target_load_optimize1): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_branch_target_load_optimize1): ...new pass_data instance + and... + (make_pass_branch_target_load_optimize1): ...new function. + (pass_branch_target_load_optimize2): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_branch_target_load_optimize2): ...new pass_data instance + and... + (make_pass_branch_target_load_optimize2): ...new function. + * cfgcleanup.c (pass_jump): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_jump): ...new pass_data instance and... + (make_pass_jump): ...new function. + (pass_jump2): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_jump2): ...new pass_data instance and... + (make_pass_jump2): ...new function. + * cfgexpand.c (pass_expand): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_expand): ...new pass_data instance and... + (make_pass_expand): ...new function. + * cfgrtl.c (pass_free_cfg): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_free_cfg): ...new pass_data instance and... + (make_pass_free_cfg): ...new function. + (pass_into_cfg_layout_mode): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_into_cfg_layout_mode): ...new pass_data instance and... + (make_pass_into_cfg_layout_mode): ...new function. + (pass_outof_cfg_layout_mode): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_outof_cfg_layout_mode): ...new pass_data instance and... + (make_pass_outof_cfg_layout_mode): ...new function. + * cgraphbuild.c (pass_build_cgraph_edges): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_build_cgraph_edges): ...new pass_data instance and... + (make_pass_build_cgraph_edges): ...new function. + (pass_rebuild_cgraph_edges): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_rebuild_cgraph_edges): ...new pass_data instance and... + (make_pass_rebuild_cgraph_edges): ...new function. + (pass_remove_cgraph_callee_edges): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_remove_cgraph_callee_edges): ...new pass_data instance + and... + (make_pass_remove_cgraph_callee_edges): ...new function. + * combine-stack-adj.c (pass_stack_adjustments): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_stack_adjustments): ...new pass_data instance and... + (make_pass_stack_adjustments): ...new function. + * combine.c (pass_combine): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_combine): ...new pass_data instance and... + (make_pass_combine): ...new function. + * compare-elim.c (pass_compare_elim_after_reload): Convert from a + global struct to a subclass of rtl_opt_pass along with... + (pass_data_compare_elim_after_reload): ...new pass_data instance + and... + (make_pass_compare_elim_after_reload): ...new function. + * cprop.c (pass_rtl_cprop): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_rtl_cprop): ...new pass_data instance and... + (make_pass_rtl_cprop): ...new function. + * cse.c (pass_cse): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_cse): ...new pass_data instance and... + (make_pass_cse): ...new function. + (pass_cse2): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_cse2): ...new pass_data instance and... + (make_pass_cse2): ...new function. + (pass_cse_after_global_opts): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_cse_after_global_opts): ...new pass_data instance and... + (make_pass_cse_after_global_opts): ...new function. + * dce.c (pass_ud_rtl_dce): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_ud_rtl_dce): ...new pass_data instance and... + (make_pass_ud_rtl_dce): ...new function. + (pass_fast_rtl_dce): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_fast_rtl_dce): ...new pass_data instance and... + (make_pass_fast_rtl_dce): ...new function. + * df-core.c (pass_df_initialize_opt): Convert from a global struct to + a subclass of rtl_opt_pass along with... + (pass_data_df_initialize_opt): ...new pass_data instance and... + (make_pass_df_initialize_opt): ...new function. + (pass_df_initialize_no_opt): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_df_initialize_no_opt): ...new pass_data instance and... + (make_pass_df_initialize_no_opt): ...new function. + (pass_df_finish): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_df_finish): ...new pass_data instance and... + (make_pass_df_finish): ...new function. + * dse.c (pass_rtl_dse1): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_dse1): ...new pass_data instance and... + (make_pass_rtl_dse1): ...new function. + (pass_rtl_dse2): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_dse2): ...new pass_data instance and... + (make_pass_rtl_dse2): ...new function. + * dwarf2cfi.c (pass_dwarf2_frame): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_dwarf2_frame): ...new pass_data instance and... + (make_pass_dwarf2_frame): ...new function. + * except.c (pass_set_nothrow_function_flags): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_set_nothrow_function_flags): ...new pass_data instance + and... + (make_pass_set_nothrow_function_flags): ...new function. + (pass_convert_to_eh_region_ranges): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_convert_to_eh_region_ranges): ...new pass_data instance + and... + (make_pass_convert_to_eh_region_ranges): ...new function. + * final.c (pass_compute_alignments): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_compute_alignments): ...new pass_data instance and... + (make_pass_compute_alignments): ...new function. + (pass_final): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_final): ...new pass_data instance and... + (make_pass_final): ...new function. + (pass_shorten_branches): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_shorten_branches): ...new pass_data instance and... + (make_pass_shorten_branches): ...new function. + (pass_clean_state): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_clean_state): ...new pass_data instance and... + (make_pass_clean_state): ...new function. + * function.c (pass_instantiate_virtual_regs): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_instantiate_virtual_regs): ...new pass_data instance and... + (make_pass_instantiate_virtual_regs): ...new function. + (pass_leaf_regs): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_leaf_regs): ...new pass_data instance and... + (make_pass_leaf_regs): ...new function. + (pass_thread_prologue_and_epilogue): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_thread_prologue_and_epilogue): ...new pass_data instance + and... + (make_pass_thread_prologue_and_epilogue): ...new function. + (pass_match_asm_constraints): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_match_asm_constraints): ...new pass_data instance and... + (make_pass_match_asm_constraints): ...new function. + * fwprop.c (pass_rtl_fwprop): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_rtl_fwprop): ...new pass_data instance and... + (make_pass_rtl_fwprop): ...new function. + (pass_rtl_fwprop_addr): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_fwprop_addr): ...new pass_data instance and... + (make_pass_rtl_fwprop_addr): ...new function. + * gcse.c (pass_rtl_pre): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_pre): ...new pass_data instance and... + (make_pass_rtl_pre): ...new function. + (pass_rtl_hoist): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_hoist): ...new pass_data instance and... + (make_pass_rtl_hoist): ...new function. + * gimple-low.c (pass_lower_cf): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_lower_cf): ...new pass_data instance and... + (make_pass_lower_cf): ...new function. + * gimple-ssa-strength-reduction.c (pass_strength_reduction): Convert + from a global struct to a subclass of gimple_opt_pass along with... + (pass_data_strength_reduction): ...new pass_data instance and... + (make_pass_strength_reduction): ...new function. + * ifcvt.c (pass_rtl_ifcvt): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_rtl_ifcvt): ...new pass_data instance and... + (make_pass_rtl_ifcvt): ...new function. + (pass_if_after_combine): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_if_after_combine): ...new pass_data instance and... + (make_pass_if_after_combine): ...new function. + (pass_if_after_reload): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_if_after_reload): ...new pass_data instance and... + (make_pass_if_after_reload): ...new function. + * init-regs.c (pass_initialize_regs): Convert from a global struct to + a subclass of rtl_opt_pass along with... + (pass_data_initialize_regs): ...new pass_data instance and... + (make_pass_initialize_regs): ...new function. + * ipa-cp.c (pass_ipa_cp): Convert from a global struct to a subclass + of ipa_opt_pass_d along with... + (pass_data_ipa_cp): ...new pass_data instance and... + (make_pass_ipa_cp): ...new function. + * ipa-inline-analysis.c (pass_inline_parameters): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_inline_parameters): ...new pass_data instance and... + (make_pass_inline_parameters): ...new function. + * ipa-inline.c (pass_early_inline): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_early_inline): ...new pass_data instance and... + (make_pass_early_inline): ...new function. + (pass_ipa_inline): Convert from a global struct to a subclass of + ipa_opt_pass_d along with... + (pass_data_ipa_inline): ...new pass_data instance and... + (make_pass_ipa_inline): ...new function. + * ipa-pure-const.c (pass_local_pure_const): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_local_pure_const): ...new pass_data instance and... + (make_pass_local_pure_const): ...new function. + (pass_ipa_pure_const): Convert from a global struct to a subclass of + ipa_opt_pass_d along with... + (pass_data_ipa_pure_const): ...new pass_data instance and... + (make_pass_ipa_pure_const): ...new function. + * ipa-reference.c (pass_ipa_reference): Convert from a global struct + to a subclass of ipa_opt_pass_d along with... + (pass_data_ipa_reference): ...new pass_data instance and... + (make_pass_ipa_reference): ...new function. + * ipa-split.c (pass_split_functions): Convert from a global struct to + a subclass of gimple_opt_pass along with... + (pass_data_split_functions): ...new pass_data instance and... + (make_pass_split_functions): ...new function. + (pass_feedback_split_functions): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_feedback_split_functions): ...new pass_data instance and... + (make_pass_feedback_split_functions): ...new function. + * ipa.c (pass_ipa_function_and_variable_visibility): Convert from a + global struct to a subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_function_and_variable_visibility): ...new pass_data + instance and... + (make_pass_ipa_function_and_variable_visibility): ...new function. + (pass_ipa_free_inline_summary): Convert from a global struct to a + subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_free_inline_summary): ...new pass_data instance and... + (make_pass_ipa_free_inline_summary): ...new function. + (pass_ipa_whole_program_visibility): Convert from a global struct to a + subclass of ipa_opt_pass_d along with... + (pass_data_ipa_whole_program_visibility): ...new pass_data instance + and... + (make_pass_ipa_whole_program_visibility): ...new function. + (pass_ipa_profile): Convert from a global struct to a subclass of + ipa_opt_pass_d along with... + (pass_data_ipa_profile): ...new pass_data instance and... + (make_pass_ipa_profile): ...new function. + (pass_ipa_cdtor_merge): Convert from a global struct to a subclass of + ipa_opt_pass_d along with... + (pass_data_ipa_cdtor_merge): ...new pass_data instance and... + (make_pass_ipa_cdtor_merge): ...new function. + * ira.c (pass_ira): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_ira): ...new pass_data instance and... + (make_pass_ira): ...new function. + (pass_reload): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_reload): ...new pass_data instance and... + (make_pass_reload): ...new function. + * jump.c (pass_cleanup_barriers): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_cleanup_barriers): ...new pass_data instance and... + (make_pass_cleanup_barriers): ...new function. + * loop-init.c (pass_loop2): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_loop2): ...new pass_data instance and... + (make_pass_loop2): ...new function. + (pass_rtl_loop_init): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_loop_init): ...new pass_data instance and... + (make_pass_rtl_loop_init): ...new function. + (pass_rtl_loop_done): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_loop_done): ...new pass_data instance and... + (make_pass_rtl_loop_done): ...new function. + (pass_rtl_move_loop_invariants): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_rtl_move_loop_invariants): ...new pass_data instance and... + (make_pass_rtl_move_loop_invariants): ...new function. + (pass_rtl_unswitch): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_unswitch): ...new pass_data instance and... + (make_pass_rtl_unswitch): ...new function. + (pass_rtl_unroll_and_peel_loops): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_rtl_unroll_and_peel_loops): ...new pass_data instance + and... + (make_pass_rtl_unroll_and_peel_loops): ...new function. + (pass_rtl_doloop): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_rtl_doloop): ...new pass_data instance and... + (make_pass_rtl_doloop): ...new function. + * lower-subreg.c (pass_lower_subreg): Convert from a global struct to + a subclass of rtl_opt_pass along with... + (pass_data_lower_subreg): ...new pass_data instance and... + (make_pass_lower_subreg): ...new function. + (pass_lower_subreg2): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_lower_subreg2): ...new pass_data instance and... + (make_pass_lower_subreg2): ...new function. + * lto-streamer-out.c (pass_ipa_lto_gimple_out): Convert from a global + struct to a subclass of ipa_opt_pass_d along with... + (pass_data_ipa_lto_gimple_out): ...new pass_data instance and... + (make_pass_ipa_lto_gimple_out): ...new function. + (pass_ipa_lto_finish_out): Convert from a global struct to a subclass + of ipa_opt_pass_d along with... + (pass_data_ipa_lto_finish_out): ...new pass_data instance and... + (make_pass_ipa_lto_finish_out): ...new function. + * mode-switching.c (pass_mode_switching): Convert from a global struct + to a subclass of rtl_opt_pass along with... + (pass_data_mode_switching): ...new pass_data instance and... + (make_pass_mode_switching): ...new function. + * modulo-sched.c (pass_sms): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_sms): ...new pass_data instance and... + (make_pass_sms): ...new function. + * omp-low.c (pass_expand_omp): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_expand_omp): ...new pass_data instance and... + (make_pass_expand_omp): ...new function. + (pass_lower_omp): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lower_omp): ...new pass_data instance and... + (make_pass_lower_omp): ...new function. + (pass_diagnose_omp_blocks): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_diagnose_omp_blocks): ...new pass_data instance and... + (make_pass_diagnose_omp_blocks): ...new function. + * passes.c (pass_early_local_passes): Convert from a global struct to + a subclass of simple_ipa_opt_pass along with... + (pass_data_early_local_passes): ...new pass_data instance and... + (make_pass_early_local_passes): ...new function. + (pass_all_early_optimizations): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_all_early_optimizations): ...new pass_data instance and... + (make_pass_all_early_optimizations): ...new function. + (pass_all_optimizations): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_all_optimizations): ...new pass_data instance and... + (make_pass_all_optimizations): ...new function. + (pass_all_optimizations_g): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_all_optimizations_g): ...new pass_data instance and... + (make_pass_all_optimizations_g): ...new function. + (pass_rest_of_compilation): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_rest_of_compilation): ...new pass_data instance and... + (make_pass_rest_of_compilation): ...new function. + (pass_postreload): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_postreload): ...new pass_data instance and... + (make_pass_postreload): ...new function. + * postreload-gcse.c (pass_gcse2): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_gcse2): ...new pass_data instance and... + (make_pass_gcse2): ...new function. + * postreload.c (pass_postreload_cse): Convert from a global struct to + a subclass of rtl_opt_pass along with... + (pass_data_postreload_cse): ...new pass_data instance and... + (make_pass_postreload_cse): ...new function. + * predict.c (pass_profile): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_profile): ...new pass_data instance and... + (make_pass_profile): ...new function. + (pass_strip_predict_hints): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_strip_predict_hints): ...new pass_data instance and... + (make_pass_strip_predict_hints): ...new function. + * recog.c (pass_peephole2): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_peephole2): ...new pass_data instance and... + (make_pass_peephole2): ...new function. + (pass_split_all_insns): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_split_all_insns): ...new pass_data instance and... + (make_pass_split_all_insns): ...new function. + (pass_split_after_reload): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_split_after_reload): ...new pass_data instance and... + (make_pass_split_after_reload): ...new function. + (pass_split_before_regstack): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_split_before_regstack): ...new pass_data instance and... + (make_pass_split_before_regstack): ...new function. + (pass_split_before_sched2): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_split_before_sched2): ...new pass_data instance and... + (make_pass_split_before_sched2): ...new function. + (pass_split_for_shorten_branches): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_split_for_shorten_branches): ...new pass_data instance + and... + (make_pass_split_for_shorten_branches): ...new function. + * ree.c (pass_ree): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_ree): ...new pass_data instance and... + (make_pass_ree): ...new function. + * reg-stack.c (pass_stack_regs): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_stack_regs): ...new pass_data instance and... + (make_pass_stack_regs): ...new function. + (pass_stack_regs_run): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_stack_regs_run): ...new pass_data instance and... + (make_pass_stack_regs_run): ...new function. + * regcprop.c (pass_cprop_hardreg): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_cprop_hardreg): ...new pass_data instance and... + (make_pass_cprop_hardreg): ...new function. + * reginfo.c (pass_reginfo_init): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_reginfo_init): ...new pass_data instance and... + (make_pass_reginfo_init): ...new function. + * regmove.c (pass_regmove): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_regmove): ...new pass_data instance and... + (make_pass_regmove): ...new function. + * regrename.c (pass_regrename): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_regrename): ...new pass_data instance and... + (make_pass_regrename): ...new function. + * reorg.c (pass_delay_slots): Convert from a global struct to a + subclass of rtl_opt_pass along with... + (pass_data_delay_slots): ...new pass_data instance and... + (make_pass_delay_slots): ...new function. + (pass_machine_reorg): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_machine_reorg): ...new pass_data instance and... + (make_pass_machine_reorg): ...new function. + * sched-rgn.c (pass_sched): Convert from a global struct to a subclass + of rtl_opt_pass along with... + (pass_data_sched): ...new pass_data instance and... + (make_pass_sched): ...new function. + (pass_sched2): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_sched2): ...new pass_data instance and... + (make_pass_sched2): ...new function. + * stack-ptr-mod.c (pass_stack_ptr_mod): Convert from a global struct + to a subclass of rtl_opt_pass along with... + (pass_data_stack_ptr_mod): ...new pass_data instance and... + (make_pass_stack_ptr_mod): ...new function. + * store-motion.c (pass_rtl_store_motion): Convert from a global struct + to a subclass of rtl_opt_pass along with... + (pass_data_rtl_store_motion): ...new pass_data instance and... + (make_pass_rtl_store_motion): ...new function. + * tracer.c (pass_tracer): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_tracer): ...new pass_data instance and... + (make_pass_tracer): ...new function. + * trans-mem.c (pass_diagnose_tm_blocks): Convert from a global struct + to a subclass of gimple_opt_pass along with... + (pass_data_diagnose_tm_blocks): ...new pass_data instance and... + (make_pass_diagnose_tm_blocks): ...new function. + (pass_lower_tm): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lower_tm): ...new pass_data instance and... + (make_pass_lower_tm): ...new function. + (pass_tm_init): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tm_init): ...new pass_data instance and... + (make_pass_tm_init): ...new function. + (pass_tm_mark): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tm_mark): ...new pass_data instance and... + (make_pass_tm_mark): ...new function. + (pass_tm_edges): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tm_edges): ...new pass_data instance and... + (make_pass_tm_edges): ...new function. + (pass_tm_memopt): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tm_memopt): ...new pass_data instance and... + (make_pass_tm_memopt): ...new function. + (pass_ipa_tm): Convert from a global struct to a subclass of + simple_ipa_opt_pass along with... + (pass_data_ipa_tm): ...new pass_data instance and... + (make_pass_ipa_tm): ...new function. + * tree-call-cdce.c (pass_call_cdce): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_call_cdce): ...new pass_data instance and... + (make_pass_call_cdce): ...new function. + * tree-cfg.c (pass_build_cfg): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_build_cfg): ...new pass_data instance and... + (make_pass_build_cfg): ...new function. + (pass_split_crit_edges): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_split_crit_edges): ...new pass_data instance and... + (make_pass_split_crit_edges): ...new function. + (pass_warn_function_return): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_warn_function_return): ...new pass_data instance and... + (make_pass_warn_function_return): ...new function. + (pass_warn_function_noreturn): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_warn_function_noreturn): ...new pass_data instance and... + (make_pass_warn_function_noreturn): ...new function. + (pass_warn_unused_result): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_warn_unused_result): ...new pass_data instance and... + (make_pass_warn_unused_result): ...new function. + * tree-cfgcleanup.c (pass_merge_phi): Convert from a global struct to + a subclass of gimple_opt_pass along with... + (pass_data_merge_phi): ...new pass_data instance and... + (make_pass_merge_phi): ...new function. + * tree-complex.c (pass_lower_complex): Convert from a global struct to + a subclass of gimple_opt_pass along with... + (pass_data_lower_complex): ...new pass_data instance and... + (make_pass_lower_complex): ...new function. + (pass_lower_complex_O0): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lower_complex_O0): ...new pass_data instance and... + (make_pass_lower_complex_O0): ...new function. + * tree-eh.c (pass_lower_eh): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_lower_eh): ...new pass_data instance and... + (make_pass_lower_eh): ...new function. + (pass_refactor_eh): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_refactor_eh): ...new pass_data instance and... + (make_pass_refactor_eh): ...new function. + (pass_lower_resx): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lower_resx): ...new pass_data instance and... + (make_pass_lower_resx): ...new function. + (pass_lower_eh_dispatch): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_lower_eh_dispatch): ...new pass_data instance and... + (make_pass_lower_eh_dispatch): ...new function. + (pass_cleanup_eh): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_cleanup_eh): ...new pass_data instance and... + (make_pass_cleanup_eh): ...new function. + * tree-emutls.c (pass_ipa_lower_emutls): Convert from a global struct + to a subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_lower_emutls): ...new pass_data instance and... + (make_pass_ipa_lower_emutls): ...new function. + * tree-if-conv.c (pass_if_conversion): Convert from a global struct to + a subclass of gimple_opt_pass along with... + (pass_data_if_conversion): ...new pass_data instance and... + (make_pass_if_conversion): ...new function. + * tree-into-ssa.c (pass_build_ssa): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_build_ssa): ...new pass_data instance and... + (make_pass_build_ssa): ...new function. + * tree-loop-distribution.c (pass_loop_distribution): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_loop_distribution): ...new pass_data instance and... + (make_pass_loop_distribution): ...new function. + * tree-mudflap.c (pass_mudflap_1): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_mudflap_1): ...new pass_data instance and... + (make_pass_mudflap_1): ...new function. + (pass_mudflap_2): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_mudflap_2): ...new pass_data instance and... + (make_pass_mudflap_2): ...new function. + * tree-nomudflap.c (pass_mudflap_1): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_mudflap_1): ...new pass_data instance and... + (make_pass_mudflap_1): ...new function. + (pass_mudflap_2): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_mudflap_2): ...new pass_data instance and... + (make_pass_mudflap_2): ...new function. + * tree-nrv.c (pass_nrv): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_nrv): ...new pass_data instance and... + (make_pass_nrv): ...new function. + (pass_return_slot): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_return_slot): ...new pass_data instance and... + (make_pass_return_slot): ...new function. + * tree-object-size.c (pass_object_sizes): Convert from a global struct + to a subclass of gimple_opt_pass along with... + (pass_data_object_sizes): ...new pass_data instance and... + (make_pass_object_sizes): ...new function. + * tree-optimize.c (pass_cleanup_cfg_post_optimizing): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_cleanup_cfg_post_optimizing): ...new pass_data instance + and... + (make_pass_cleanup_cfg_post_optimizing): ...new function. + (pass_fixup_cfg): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_fixup_cfg): ...new pass_data instance and... + (make_pass_fixup_cfg): ...new function. + * tree-pass.h (pass_mudflap_1): Replace declaration with that of... + (make_pass_mudflap_1): ...new function. + (pass_mudflap_2): Replace declaration with that of... + (make_pass_mudflap_2): ...new function. + (pass_asan): Replace declaration with that of... + (make_pass_asan): ...new function. + (pass_asan_O0): Replace declaration with that of... + (make_pass_asan_O0): ...new function. + (pass_tsan): Replace declaration with that of... + (make_pass_tsan): ...new function. + (pass_tsan_O0): Replace declaration with that of... + (make_pass_tsan_O0): ...new function. + (pass_lower_cf): Replace declaration with that of... + (make_pass_lower_cf): ...new function. + (pass_refactor_eh): Replace declaration with that of... + (make_pass_refactor_eh): ...new function. + (pass_lower_eh): Replace declaration with that of... + (make_pass_lower_eh): ...new function. + (pass_lower_eh_dispatch): Replace declaration with that of... + (make_pass_lower_eh_dispatch): ...new function. + (pass_lower_resx): Replace declaration with that of... + (make_pass_lower_resx): ...new function. + (pass_build_cfg): Replace declaration with that of... + (make_pass_build_cfg): ...new function. + (pass_early_tree_profile): Replace declaration with that of... + (make_pass_early_tree_profile): ...new function. + (pass_cleanup_eh): Replace declaration with that of... + (make_pass_cleanup_eh): ...new function. + (pass_sra): Replace declaration with that of... + (make_pass_sra): ...new function. + (pass_sra_early): Replace declaration with that of... + (make_pass_sra_early): ...new function. + (pass_early_ipa_sra): Replace declaration with that of... + (make_pass_early_ipa_sra): ...new function. + (pass_tail_recursion): Replace declaration with that of... + (make_pass_tail_recursion): ...new function. + (pass_tail_calls): Replace declaration with that of... + (make_pass_tail_calls): ...new function. + (pass_tree_loop): Replace declaration with that of... + (make_pass_tree_loop): ...new function. + (pass_tree_loop_init): Replace declaration with that of... + (make_pass_tree_loop_init): ...new function. + (pass_lim): Replace declaration with that of... + (make_pass_lim): ...new function. + (pass_tree_unswitch): Replace declaration with that of... + (make_pass_tree_unswitch): ...new function. + (pass_predcom): Replace declaration with that of... + (make_pass_predcom): ...new function. + (pass_iv_canon): Replace declaration with that of... + (make_pass_iv_canon): ...new function. + (pass_scev_cprop): Replace declaration with that of... + (make_pass_scev_cprop): ...new function. + (pass_empty_loop): Replace declaration with that of... + (make_pass_empty_loop): ...new function. + (pass_record_bounds): Replace declaration with that of... + (make_pass_record_bounds): ...new function. + (pass_graphite): Replace declaration with that of... + (make_pass_graphite): ...new function. + (pass_graphite_transforms): Replace declaration with that of... + (make_pass_graphite_transforms): ...new function. + (pass_if_conversion): Replace declaration with that of... + (make_pass_if_conversion): ...new function. + (pass_loop_distribution): Replace declaration with that of... + (make_pass_loop_distribution): ...new function. + (pass_vectorize): Replace declaration with that of... + (make_pass_vectorize): ...new function. + (pass_slp_vectorize): Replace declaration with that of... + (make_pass_slp_vectorize): ...new function. + (pass_complete_unroll): Replace declaration with that of... + (make_pass_complete_unroll): ...new function. + (pass_complete_unrolli): Replace declaration with that of... + (make_pass_complete_unrolli): ...new function. + (pass_parallelize_loops): Replace declaration with that of... + (make_pass_parallelize_loops): ...new function. + (pass_loop_prefetch): Replace declaration with that of... + (make_pass_loop_prefetch): ...new function. + (pass_iv_optimize): Replace declaration with that of... + (make_pass_iv_optimize): ...new function. + (pass_tree_loop_done): Replace declaration with that of... + (make_pass_tree_loop_done): ...new function. + (pass_ch): Replace declaration with that of... + (make_pass_ch): ...new function. + (pass_ccp): Replace declaration with that of... + (make_pass_ccp): ...new function. + (pass_phi_only_cprop): Replace declaration with that of... + (make_pass_phi_only_cprop): ...new function. + (pass_build_ssa): Replace declaration with that of... + (make_pass_build_ssa): ...new function. + (pass_build_alias): Replace declaration with that of... + (make_pass_build_alias): ...new function. + (pass_build_ealias): Replace declaration with that of... + (make_pass_build_ealias): ...new function. + (pass_dominator): Replace declaration with that of... + (make_pass_dominator): ...new function. + (pass_dce): Replace declaration with that of... + (make_pass_dce): ...new function. + (pass_dce_loop): Replace declaration with that of... + (make_pass_dce_loop): ...new function. + (pass_cd_dce): Replace declaration with that of... + (make_pass_cd_dce): ...new function. + (pass_call_cdce): Replace declaration with that of... + (make_pass_call_cdce): ...new function. + (pass_merge_phi): Replace declaration with that of... + (make_pass_merge_phi): ...new function. + (pass_split_crit_edges): Replace declaration with that of... + (make_pass_split_crit_edges): ...new function. + (pass_pre): Replace declaration with that of... + (make_pass_pre): ...new function. + (pass_profile): Replace declaration with that of... + (make_pass_profile): ...new function. + (pass_strip_predict_hints): Replace declaration with that of... + (make_pass_strip_predict_hints): ...new function. + (pass_lower_complex_O0): Replace declaration with that of... + (make_pass_lower_complex_O0): ...new function. + (pass_lower_complex): Replace declaration with that of... + (make_pass_lower_complex): ...new function. + (pass_lower_vector): Replace declaration with that of... + (make_pass_lower_vector): ...new function. + (pass_lower_vector_ssa): Replace declaration with that of... + (make_pass_lower_vector_ssa): ...new function. + (pass_lower_omp): Replace declaration with that of... + (make_pass_lower_omp): ...new function. + (pass_diagnose_omp_blocks): Replace declaration with that of... + (make_pass_diagnose_omp_blocks): ...new function. + (pass_expand_omp): Replace declaration with that of... + (make_pass_expand_omp): ...new function. + (pass_expand_omp_ssa): Replace declaration with that of... + (make_pass_expand_omp_ssa): ...new function. + (pass_object_sizes): Replace declaration with that of... + (make_pass_object_sizes): ...new function. + (pass_strlen): Replace declaration with that of... + (make_pass_strlen): ...new function. + (pass_fold_builtins): Replace declaration with that of... + (make_pass_fold_builtins): ...new function. + (pass_stdarg): Replace declaration with that of... + (make_pass_stdarg): ...new function. + (pass_early_warn_uninitialized): Replace declaration with that of... + (make_pass_early_warn_uninitialized): ...new function. + (pass_late_warn_uninitialized): Replace declaration with that of... + (make_pass_late_warn_uninitialized): ...new function. + (pass_cse_reciprocals): Replace declaration with that of... + (make_pass_cse_reciprocals): ...new function. + (pass_cse_sincos): Replace declaration with that of... + (make_pass_cse_sincos): ...new function. + (pass_optimize_bswap): Replace declaration with that of... + (make_pass_optimize_bswap): ...new function. + (pass_optimize_widening_mul): Replace declaration with that of... + (make_pass_optimize_widening_mul): ...new function. + (pass_warn_function_return): Replace declaration with that of... + (make_pass_warn_function_return): ...new function. + (pass_warn_function_noreturn): Replace declaration with that of... + (make_pass_warn_function_noreturn): ...new function. + (pass_cselim): Replace declaration with that of... + (make_pass_cselim): ...new function. + (pass_phiopt): Replace declaration with that of... + (make_pass_phiopt): ...new function. + (pass_forwprop): Replace declaration with that of... + (make_pass_forwprop): ...new function. + (pass_phiprop): Replace declaration with that of... + (make_pass_phiprop): ...new function. + (pass_tree_ifcombine): Replace declaration with that of... + (make_pass_tree_ifcombine): ...new function. + (pass_dse): Replace declaration with that of... + (make_pass_dse): ...new function. + (pass_nrv): Replace declaration with that of... + (make_pass_nrv): ...new function. + (pass_rename_ssa_copies): Replace declaration with that of... + (make_pass_rename_ssa_copies): ...new function. + (pass_sink_code): Replace declaration with that of... + (make_pass_sink_code): ...new function. + (pass_fre): Replace declaration with that of... + (make_pass_fre): ...new function. + (pass_check_data_deps): Replace declaration with that of... + (make_pass_check_data_deps): ...new function. + (pass_copy_prop): Replace declaration with that of... + (make_pass_copy_prop): ...new function. + (pass_vrp): Replace declaration with that of... + (make_pass_vrp): ...new function. + (pass_uncprop): Replace declaration with that of... + (make_pass_uncprop): ...new function. + (pass_return_slot): Replace declaration with that of... + (make_pass_return_slot): ...new function. + (pass_reassoc): Replace declaration with that of... + (make_pass_reassoc): ...new function. + (pass_rebuild_cgraph_edges): Replace declaration with that of... + (make_pass_rebuild_cgraph_edges): ...new function. + (pass_remove_cgraph_callee_edges): Replace declaration with that of... + (make_pass_remove_cgraph_callee_edges): ...new function. + (pass_build_cgraph_edges): Replace declaration with that of... + (make_pass_build_cgraph_edges): ...new function. + (pass_local_pure_const): Replace declaration with that of... + (make_pass_local_pure_const): ...new function. + (pass_tracer): Replace declaration with that of... + (make_pass_tracer): ...new function. + (pass_warn_unused_result): Replace declaration with that of... + (make_pass_warn_unused_result): ...new function. + (pass_diagnose_tm_blocks): Replace declaration with that of... + (make_pass_diagnose_tm_blocks): ...new function. + (pass_lower_tm): Replace declaration with that of... + (make_pass_lower_tm): ...new function. + (pass_tm_init): Replace declaration with that of... + (make_pass_tm_init): ...new function. + (pass_tm_mark): Replace declaration with that of... + (make_pass_tm_mark): ...new function. + (pass_tm_memopt): Replace declaration with that of... + (make_pass_tm_memopt): ...new function. + (pass_tm_edges): Replace declaration with that of... + (make_pass_tm_edges): ...new function. + (pass_split_functions): Replace declaration with that of... + (make_pass_split_functions): ...new function. + (pass_feedback_split_functions): Replace declaration with that of... + (make_pass_feedback_split_functions): ...new function. + (pass_strength_reduction): Replace declaration with that of... + (make_pass_strength_reduction): ...new function. + (pass_ipa_lower_emutls): Replace declaration with that of... + (make_pass_ipa_lower_emutls): ...new function. + (pass_ipa_function_and_variable_visibility): Replace declaration with + that of... + (make_pass_ipa_function_and_variable_visibility): ...new function. + (pass_ipa_tree_profile): Replace declaration with that of... + (make_pass_ipa_tree_profile): ...new function. + (pass_early_local_passes): Replace declaration with that of... + (make_pass_early_local_passes): ...new function. + (pass_ipa_whole_program_visibility): Replace declaration with that + of... + (make_pass_ipa_whole_program_visibility): ...new function. + (pass_ipa_lto_gimple_out): Replace declaration with that of... + (make_pass_ipa_lto_gimple_out): ...new function. + (pass_ipa_increase_alignment): Replace declaration with that of... + (make_pass_ipa_increase_alignment): ...new function. + (pass_ipa_inline): Replace declaration with that of... + (make_pass_ipa_inline): ...new function. + (pass_ipa_free_lang_data): Replace declaration with that of... + (make_pass_ipa_free_lang_data): ...new function. + (pass_ipa_free_inline_summary): Replace declaration with that of... + (make_pass_ipa_free_inline_summary): ...new function. + (pass_ipa_cp): Replace declaration with that of... + (make_pass_ipa_cp): ...new function. + (pass_ipa_reference): Replace declaration with that of... + (make_pass_ipa_reference): ...new function. + (pass_ipa_pure_const): Replace declaration with that of... + (make_pass_ipa_pure_const): ...new function. + (pass_ipa_pta): Replace declaration with that of... + (make_pass_ipa_pta): ...new function. + (pass_ipa_lto_finish_out): Replace declaration with that of... + (make_pass_ipa_lto_finish_out): ...new function. + (pass_ipa_tm): Replace declaration with that of... + (make_pass_ipa_tm): ...new function. + (pass_ipa_profile): Replace declaration with that of... + (make_pass_ipa_profile): ...new function. + (pass_ipa_cdtor_merge): Replace declaration with that of... + (make_pass_ipa_cdtor_merge): ...new function. + (pass_cleanup_cfg_post_optimizing): Replace declaration with that + of... + (make_pass_cleanup_cfg_post_optimizing): ...new function. + (pass_init_datastructures): Replace declaration with that of... + (make_pass_init_datastructures): ...new function. + (pass_fixup_cfg): Replace declaration with that of... + (make_pass_fixup_cfg): ...new function. + (pass_expand): Replace declaration with that of... + (make_pass_expand): ...new function. + (pass_instantiate_virtual_regs): Replace declaration with that of... + (make_pass_instantiate_virtual_regs): ...new function. + (pass_rtl_fwprop): Replace declaration with that of... + (make_pass_rtl_fwprop): ...new function. + (pass_rtl_fwprop_addr): Replace declaration with that of... + (make_pass_rtl_fwprop_addr): ...new function. + (pass_jump): Replace declaration with that of... + (make_pass_jump): ...new function. + (pass_jump2): Replace declaration with that of... + (make_pass_jump2): ...new function. + (pass_lower_subreg): Replace declaration with that of... + (make_pass_lower_subreg): ...new function. + (pass_cse): Replace declaration with that of... + (make_pass_cse): ...new function. + (pass_fast_rtl_dce): Replace declaration with that of... + (make_pass_fast_rtl_dce): ...new function. + (pass_ud_rtl_dce): Replace declaration with that of... + (make_pass_ud_rtl_dce): ...new function. + (pass_rtl_dce): Replace declaration with that of... + (make_pass_rtl_dce): ...new function. + (pass_rtl_dse1): Replace declaration with that of... + (make_pass_rtl_dse1): ...new function. + (pass_rtl_dse2): Replace declaration with that of... + (make_pass_rtl_dse2): ...new function. + (pass_rtl_dse3): Replace declaration with that of... + (make_pass_rtl_dse3): ...new function. + (pass_rtl_cprop): Replace declaration with that of... + (make_pass_rtl_cprop): ...new function. + (pass_rtl_pre): Replace declaration with that of... + (make_pass_rtl_pre): ...new function. + (pass_rtl_hoist): Replace declaration with that of... + (make_pass_rtl_hoist): ...new function. + (pass_rtl_store_motion): Replace declaration with that of... + (make_pass_rtl_store_motion): ...new function. + (pass_cse_after_global_opts): Replace declaration with that of... + (make_pass_cse_after_global_opts): ...new function. + (pass_rtl_ifcvt): Replace declaration with that of... + (make_pass_rtl_ifcvt): ...new function. + (pass_into_cfg_layout_mode): Replace declaration with that of... + (make_pass_into_cfg_layout_mode): ...new function. + (pass_outof_cfg_layout_mode): Replace declaration with that of... + (make_pass_outof_cfg_layout_mode): ...new function. + (pass_loop2): Replace declaration with that of... + (make_pass_loop2): ...new function. + (pass_rtl_loop_init): Replace declaration with that of... + (make_pass_rtl_loop_init): ...new function. + (pass_rtl_move_loop_invariants): Replace declaration with that of... + (make_pass_rtl_move_loop_invariants): ...new function. + (pass_rtl_unswitch): Replace declaration with that of... + (make_pass_rtl_unswitch): ...new function. + (pass_rtl_unroll_and_peel_loops): Replace declaration with that of... + (make_pass_rtl_unroll_and_peel_loops): ...new function. + (pass_rtl_doloop): Replace declaration with that of... + (make_pass_rtl_doloop): ...new function. + (pass_rtl_loop_done): Replace declaration with that of... + (make_pass_rtl_loop_done): ...new function. + (pass_web): Replace declaration with that of... + (make_pass_web): ...new function. + (pass_cse2): Replace declaration with that of... + (make_pass_cse2): ...new function. + (pass_df_initialize_opt): Replace declaration with that of... + (make_pass_df_initialize_opt): ...new function. + (pass_df_initialize_no_opt): Replace declaration with that of... + (make_pass_df_initialize_no_opt): ...new function. + (pass_reginfo_init): Replace declaration with that of... + (make_pass_reginfo_init): ...new function. + (pass_inc_dec): Replace declaration with that of... + (make_pass_inc_dec): ...new function. + (pass_stack_ptr_mod): Replace declaration with that of... + (make_pass_stack_ptr_mod): ...new function. + (pass_initialize_regs): Replace declaration with that of... + (make_pass_initialize_regs): ...new function. + (pass_combine): Replace declaration with that of... + (make_pass_combine): ...new function. + (pass_if_after_combine): Replace declaration with that of... + (make_pass_if_after_combine): ...new function. + (pass_ree): Replace declaration with that of... + (make_pass_ree): ...new function. + (pass_partition_blocks): Replace declaration with that of... + (make_pass_partition_blocks): ...new function. + (pass_match_asm_constraints): Replace declaration with that of... + (make_pass_match_asm_constraints): ...new function. + (pass_regmove): Replace declaration with that of... + (make_pass_regmove): ...new function. + (pass_split_all_insns): Replace declaration with that of... + (make_pass_split_all_insns): ...new function. + (pass_fast_rtl_byte_dce): Replace declaration with that of... + (make_pass_fast_rtl_byte_dce): ...new function. + (pass_lower_subreg2): Replace declaration with that of... + (make_pass_lower_subreg2): ...new function. + (pass_mode_switching): Replace declaration with that of... + (make_pass_mode_switching): ...new function. + (pass_sms): Replace declaration with that of... + (make_pass_sms): ...new function. + (pass_sched): Replace declaration with that of... + (make_pass_sched): ...new function. + (pass_ira): Replace declaration with that of... + (make_pass_ira): ...new function. + (pass_reload): Replace declaration with that of... + (make_pass_reload): ...new function. + (pass_clean_state): Replace declaration with that of... + (make_pass_clean_state): ...new function. + (pass_branch_prob): Replace declaration with that of... + (make_pass_branch_prob): ...new function. + (pass_value_profile_transformations): Replace declaration with that + of... + (make_pass_value_profile_transformations): ...new function. + (pass_postreload_cse): Replace declaration with that of... + (make_pass_postreload_cse): ...new function. + (pass_gcse2): Replace declaration with that of... + (make_pass_gcse2): ...new function. + (pass_split_after_reload): Replace declaration with that of... + (make_pass_split_after_reload): ...new function. + (pass_branch_target_load_optimize1): Replace declaration with that + of... + (make_pass_branch_target_load_optimize1): ...new function. + (pass_thread_prologue_and_epilogue): Replace declaration with that + of... + (make_pass_thread_prologue_and_epilogue): ...new function. + (pass_stack_adjustments): Replace declaration with that of... + (make_pass_stack_adjustments): ...new function. + (pass_peephole2): Replace declaration with that of... + (make_pass_peephole2): ...new function. + (pass_if_after_reload): Replace declaration with that of... + (make_pass_if_after_reload): ...new function. + (pass_regrename): Replace declaration with that of... + (make_pass_regrename): ...new function. + (pass_cprop_hardreg): Replace declaration with that of... + (make_pass_cprop_hardreg): ...new function. + (pass_reorder_blocks): Replace declaration with that of... + (make_pass_reorder_blocks): ...new function. + (pass_branch_target_load_optimize2): Replace declaration with that + of... + (make_pass_branch_target_load_optimize2): ...new function. + (pass_leaf_regs): Replace declaration with that of... + (make_pass_leaf_regs): ...new function. + (pass_split_before_sched2): Replace declaration with that of... + (make_pass_split_before_sched2): ...new function. + (pass_compare_elim_after_reload): Replace declaration with that of... + (make_pass_compare_elim_after_reload): ...new function. + (pass_sched2): Replace declaration with that of... + (make_pass_sched2): ...new function. + (pass_stack_regs): Replace declaration with that of... + (make_pass_stack_regs): ...new function. + (pass_stack_regs_run): Replace declaration with that of... + (make_pass_stack_regs_run): ...new function. + (pass_df_finish): Replace declaration with that of... + (make_pass_df_finish): ...new function. + (pass_compute_alignments): Replace declaration with that of... + (make_pass_compute_alignments): ...new function. + (pass_duplicate_computed_gotos): Replace declaration with that of... + (make_pass_duplicate_computed_gotos): ...new function. + (pass_variable_tracking): Replace declaration with that of... + (make_pass_variable_tracking): ...new function. + (pass_free_cfg): Replace declaration with that of... + (make_pass_free_cfg): ...new function. + (pass_machine_reorg): Replace declaration with that of... + (make_pass_machine_reorg): ...new function. + (pass_cleanup_barriers): Replace declaration with that of... + (make_pass_cleanup_barriers): ...new function. + (pass_delay_slots): Replace declaration with that of... + (make_pass_delay_slots): ...new function. + (pass_split_for_shorten_branches): Replace declaration with that of... + (make_pass_split_for_shorten_branches): ...new function. + (pass_split_before_regstack): Replace declaration with that of... + (make_pass_split_before_regstack): ...new function. + (pass_convert_to_eh_region_ranges): Replace declaration with that + of... + (make_pass_convert_to_eh_region_ranges): ...new function. + (pass_shorten_branches): Replace declaration with that of... + (make_pass_shorten_branches): ...new function. + (pass_set_nothrow_function_flags): Replace declaration with that of... + (make_pass_set_nothrow_function_flags): ...new function. + (pass_dwarf2_frame): Replace declaration with that of... + (make_pass_dwarf2_frame): ...new function. + (pass_final): Replace declaration with that of... + (make_pass_final): ...new function. + (pass_rtl_seqabstr): Replace declaration with that of... + (make_pass_rtl_seqabstr): ...new function. + (pass_release_ssa_names): Replace declaration with that of... + (make_pass_release_ssa_names): ...new function. + (pass_early_inline): Replace declaration with that of... + (make_pass_early_inline): ...new function. + (pass_inline_parameters): Replace declaration with that of... + (make_pass_inline_parameters): ...new function. + (pass_update_address_taken): Replace declaration with that of... + (make_pass_update_address_taken): ...new function. + (pass_convert_switch): Replace declaration with that of... + (make_pass_convert_switch): ...new function. + * tree-profile.c (pass_ipa_tree_profile): Convert from a global struct + to a subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_tree_profile): ...new pass_data instance and... + (make_pass_ipa_tree_profile): ...new function. + * tree-sra.c (pass_sra_early): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_sra_early): ...new pass_data instance and... + (make_pass_sra_early): ...new function. + (pass_sra): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_sra): ...new pass_data instance and... + (make_pass_sra): ...new function. + (pass_early_ipa_sra): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_early_ipa_sra): ...new pass_data instance and... + (make_pass_early_ipa_sra): ...new function. + * tree-ssa-ccp.c (pass_ccp): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_ccp): ...new pass_data instance and... + (make_pass_ccp): ...new function. + (pass_fold_builtins): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_fold_builtins): ...new pass_data instance and... + (make_pass_fold_builtins): ...new function. + * tree-ssa-copy.c (pass_copy_prop): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_copy_prop): ...new pass_data instance and... + (make_pass_copy_prop): ...new function. + * tree-ssa-copyrename.c (pass_rename_ssa_copies): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_rename_ssa_copies): ...new pass_data instance and... + (make_pass_rename_ssa_copies): ...new function. + * tree-ssa-dce.c (pass_dce): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_dce): ...new pass_data instance and... + (make_pass_dce): ...new function. + (pass_dce_loop): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_dce_loop): ...new pass_data instance and... + (make_pass_dce_loop): ...new function. + (pass_cd_dce): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_cd_dce): ...new pass_data instance and... + (make_pass_cd_dce): ...new function. + * tree-ssa-dom.c (pass_dominator): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_dominator): ...new pass_data instance and... + (make_pass_dominator): ...new function. + (pass_phi_only_cprop): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_phi_only_cprop): ...new pass_data instance and... + (make_pass_phi_only_cprop): ...new function. + * tree-ssa-dse.c (pass_dse): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_dse): ...new pass_data instance and... + (make_pass_dse): ...new function. + * tree-ssa-forwprop.c (pass_forwprop): Convert from a global struct to + a subclass of gimple_opt_pass along with... + (pass_data_forwprop): ...new pass_data instance and... + (make_pass_forwprop): ...new function. + * tree-ssa-ifcombine.c (pass_tree_ifcombine): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_tree_ifcombine): ...new pass_data instance and... + (make_pass_tree_ifcombine): ...new function. + * tree-ssa-loop-ch.c (pass_ch): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_ch): ...new pass_data instance and... + (make_pass_ch): ...new function. + * tree-ssa-loop.c (pass_tree_loop): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_tree_loop): ...new pass_data instance and... + (make_pass_tree_loop): ...new function. + (pass_tree_loop_init): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tree_loop_init): ...new pass_data instance and... + (make_pass_tree_loop_init): ...new function. + (pass_lim): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lim): ...new pass_data instance and... + (make_pass_lim): ...new function. + (pass_tree_unswitch): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tree_unswitch): ...new pass_data instance and... + (make_pass_tree_unswitch): ...new function. + (pass_predcom): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_predcom): ...new pass_data instance and... + (make_pass_predcom): ...new function. + (pass_vectorize): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_vectorize): ...new pass_data instance and... + (make_pass_vectorize): ...new function. + (pass_graphite): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_graphite): ...new pass_data instance and... + (make_pass_graphite): ...new function. + (pass_graphite_transforms): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_graphite_transforms): ...new pass_data instance and... + (make_pass_graphite_transforms): ...new function. + (pass_check_data_deps): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_check_data_deps): ...new pass_data instance and... + (make_pass_check_data_deps): ...new function. + (pass_iv_canon): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_iv_canon): ...new pass_data instance and... + (make_pass_iv_canon): ...new function. + (pass_scev_cprop): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_scev_cprop): ...new pass_data instance and... + (make_pass_scev_cprop): ...new function. + (pass_record_bounds): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_record_bounds): ...new pass_data instance and... + (make_pass_record_bounds): ...new function. + (pass_complete_unroll): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_complete_unroll): ...new pass_data instance and... + (make_pass_complete_unroll): ...new function. + (pass_complete_unrolli): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_complete_unrolli): ...new pass_data instance and... + (make_pass_complete_unrolli): ...new function. + (pass_parallelize_loops): Convert from a global struct to a subclass + of gimple_opt_pass along with... + (pass_data_parallelize_loops): ...new pass_data instance and... + (make_pass_parallelize_loops): ...new function. + (pass_loop_prefetch): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_loop_prefetch): ...new pass_data instance and... + (make_pass_loop_prefetch): ...new function. + (pass_iv_optimize): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_iv_optimize): ...new pass_data instance and... + (make_pass_iv_optimize): ...new function. + (pass_tree_loop_done): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tree_loop_done): ...new pass_data instance and... + (make_pass_tree_loop_done): ...new function. + * tree-ssa-math-opts.c (pass_cse_reciprocals): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_cse_reciprocals): ...new pass_data instance and... + (make_pass_cse_reciprocals): ...new function. + (pass_cse_sincos): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_cse_sincos): ...new pass_data instance and... + (make_pass_cse_sincos): ...new function. + (pass_optimize_bswap): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_optimize_bswap): ...new pass_data instance and... + (make_pass_optimize_bswap): ...new function. + (pass_optimize_widening_mul): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_optimize_widening_mul): ...new pass_data instance and... + (make_pass_optimize_widening_mul): ...new function. + * tree-ssa-phiopt.c (pass_phiopt): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_phiopt): ...new pass_data instance and... + (make_pass_phiopt): ...new function. + (pass_cselim): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_cselim): ...new pass_data instance and... + (make_pass_cselim): ...new function. + * tree-ssa-phiprop.c (pass_phiprop): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_phiprop): ...new pass_data instance and... + (make_pass_phiprop): ...new function. + * tree-ssa-pre.c (pass_pre): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_pre): ...new pass_data instance and... + (make_pass_pre): ...new function. + (pass_fre): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_fre): ...new pass_data instance and... + (make_pass_fre): ...new function. + * tree-ssa-reassoc.c (pass_reassoc): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_reassoc): ...new pass_data instance and... + (make_pass_reassoc): ...new function. + * tree-ssa-sink.c (pass_sink_code): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_sink_code): ...new pass_data instance and... + (make_pass_sink_code): ...new function. + * tree-ssa-strlen.c (pass_strlen): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_strlen): ...new pass_data instance and... + (make_pass_strlen): ...new function. + * tree-ssa-structalias.c (pass_build_alias): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_build_alias): ...new pass_data instance and... + (make_pass_build_alias): ...new function. + (pass_build_ealias): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_build_ealias): ...new pass_data instance and... + (make_pass_build_ealias): ...new function. + (pass_ipa_pta): Convert from a global struct to a subclass of + simple_ipa_opt_pass along with... + (pass_data_ipa_pta): ...new pass_data instance and... + (make_pass_ipa_pta): ...new function. + * tree-ssa-uncprop.c (pass_uncprop): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_uncprop): ...new pass_data instance and... + (make_pass_uncprop): ...new function. + * tree-ssa-uninit.c (pass_late_warn_uninitialized): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_late_warn_uninitialized): ...new pass_data instance and... + (make_pass_late_warn_uninitialized): ...new function. + * tree-ssa.c (pass_init_datastructures): Convert from a global struct + to a subclass of gimple_opt_pass along with... + (pass_data_init_datastructures): ...new pass_data instance and... + (make_pass_init_datastructures): ...new function. + (pass_early_warn_uninitialized): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_early_warn_uninitialized): ...new pass_data instance and... + (make_pass_early_warn_uninitialized): ...new function. + (pass_update_address_taken): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_update_address_taken): ...new pass_data instance and... + (make_pass_update_address_taken): ...new function. + * tree-ssanames.c (pass_release_ssa_names): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_release_ssa_names): ...new pass_data instance and... + (make_pass_release_ssa_names): ...new function. + * tree-stdarg.c (pass_stdarg): Convert from a global struct to a + subclass of gimple_opt_pass along with... + (pass_data_stdarg): ...new pass_data instance and... + (make_pass_stdarg): ...new function. + * tree-switch-conversion.c (pass_convert_switch): Convert from a + global struct to a subclass of gimple_opt_pass along with... + (pass_data_convert_switch): ...new pass_data instance and... + (make_pass_convert_switch): ...new function. + * tree-tailcall.c (pass_tail_recursion): Convert from a global struct + to a subclass of gimple_opt_pass along with... + (pass_data_tail_recursion): ...new pass_data instance and... + (make_pass_tail_recursion): ...new function. + (pass_tail_calls): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tail_calls): ...new pass_data instance and... + (make_pass_tail_calls): ...new function. + * tree-vect-generic.c (pass_lower_vector): Convert from a global + struct to a subclass of gimple_opt_pass along with... + (pass_data_lower_vector): ...new pass_data instance and... + (make_pass_lower_vector): ...new function. + (pass_lower_vector_ssa): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_lower_vector_ssa): ...new pass_data instance and... + (make_pass_lower_vector_ssa): ...new function. + * tree-vectorizer.c (pass_slp_vectorize): Convert from a global struct + to a subclass of gimple_opt_pass along with... + (pass_data_slp_vectorize): ...new pass_data instance and... + (make_pass_slp_vectorize): ...new function. + (pass_ipa_increase_alignment): Convert from a global struct to a + subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_increase_alignment): ...new pass_data instance and... + (make_pass_ipa_increase_alignment): ...new function. + * tree-vrp.c (pass_vrp): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_vrp): ...new pass_data instance and... + (make_pass_vrp): ...new function. + * tree.c (pass_ipa_free_lang_data): Convert from a global struct to a + subclass of simple_ipa_opt_pass along with... + (pass_data_ipa_free_lang_data): ...new pass_data instance and... + (make_pass_ipa_free_lang_data): ...new function. + * tsan.c (pass_tsan): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tsan): ...new pass_data instance and... + (make_pass_tsan): ...new function. + (pass_tsan_O0): Convert from a global struct to a subclass of + gimple_opt_pass along with... + (pass_data_tsan_O0): ...new pass_data instance and... + (make_pass_tsan_O0): ...new function. + * var-tracking.c (pass_variable_tracking): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_variable_tracking): ...new pass_data instance and... + (make_pass_variable_tracking): ...new function. + * web.c (pass_web): Convert from a global struct to a subclass of + rtl_opt_pass along with... + (pass_data_web): ...new pass_data instance and... + (make_pass_web): ...new function. + * config/epiphany/epiphany.h (pass_mode_switch_use): Replace + declaration with that of... + (make_pass_mode_switch_use): ...new function. + (pass_resolve_sw_modes): Replace declaration with that of... + (make_pass_resolve_sw_modes): ...new function. + * config/epiphany/mode-switch-use.c (pass_mode_switch_use): Convert + from a global struct to a subclass of rtl_opt_pass along with... + (pass_data_mode_switch_use): ...new pass_data instance and... + (make_pass_mode_switch_use): ...new function. + * config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes): Convert + from a global struct to a subclass of rtl_opt_pass along with... + (pass_data_resolve_sw_modes): ...new pass_data instance and... + (make_pass_resolve_sw_modes): ...new function. + * config/i386/i386.c (pass_insert_vzeroupper): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_insert_vzeroupper): ...new pass_data instance and... + (make_pass_insert_vzeroupper): ...new function. + * config/sparc/sparc.c (pass_work_around_errata): Convert from a + global struct to a subclass of rtl_opt_pass along with... + (pass_data_work_around_errata): ...new pass_data instance and... + (make_pass_work_around_errata): ...new function. + * config/mips/mips.c (pass_mips_machine_reorg2): Convert from a global + struct to a subclass of rtl_opt_pass along with... + (pass_data_mips_machine_reorg2): ...new pass_data instance and... + (make_pass_mips_machine_reorg2): ...new function. + +2013-08-05 David Malcolm <dmalcolm@redhat.com> + + * passes.c (pass_manager::operator new): New. + +2013-08-05 David Malcolm <dmalcolm@redhat.com> + + Handwritten part of conversion of passes to C++ classes. + + * Makefile.in (PASS_MANAGER_H): Add dep on pass-instances.def. + (toplev.o): Add dep on PASS_MANAGER_H. + * cgraphunit.c (cgraph_process_new_functions): Rework invocation + of early local pases to reflect this moving from a global to a + member of gcc::pass_manager. + (cgraph_add_new_function): Likewise. + * lto-cgraph.c (lto_output_node): Update for conversion of + struct ipa_opt_pass_d to a C++ subclass of opt_pass. + * passes.c (opt_pass::clone): New. + (opt_pass::gate): New. + (opt_pass::execute): New. + (opt_pass::opt_pass): New. + (pass_manager::execute_early_local_passes): New. + (pass_manager::execute_pass_mode_switching): new. + (finish_optimization_passes): Convert to... + (pass_manager::finish_optimization_passes): ...this. + (finish_optimization_passes): Update for conversion of passes to + C++ classes. + (register_dump_files_1): Use has_gate since we cannot portably + check a vtable entry against NULL. + (dump_one_pass): Likewise. + (ipa_write_summaries_2): Likewise. + (ipa_write_optimization_summaries_1): Likewise. + (ipa_read_summaries_1): Likewise. + (ipa_read_optimization_summaries_1): Likewise. + (execute_ipa_stmt_fixups): Likewise. + (pass_manager::pass_manager): Rewrite pass-creation, invoking + pass-creation functions rather than wiring up globals, and + storing the results in fields of pass_manager generated using + pass-instances.def. + (pass_manager::dump_profile_report): Update for conversion of + passes to C++ classes. + (pass_manager::execute_ipa_summary_passes): Likewise. + (execute_one_ipa_transform_pass): Likewise. + (execute_one_pass): Use has_gate and has_execute since we cannot + portably check a vtable entry against NULL. + * pass_manager.h (pass_manager::finish_optimization_passes): New. + (pass_manager): Use pass-instances.def to add fields for the + various pass instances. + * toplev.c (finalize): Update for move of + finish_optimization_passes to a method of gcc::pass_manager. + * toplev.h (finish_optimization_passes): Move to method of class + pass_manager. + * tree-pass.h (struct pass_data): New. + (opt_pass): Convert to C++ class, make it a subclass of pass_data. + (opt_pass::gate): Convert to virtual function. + (opt_pass::~opt_pass): New. + (opt_pass::clone): New. + (opt_pass::execute): Convert to virtual function. + (opt_pass::opt_pass): New. + (opt_pass::ctxt_): new. + (gimple_opt_pass): Convert to subclass of opt_pass. + (gimple_opt_pass::gimple_opt_pass): New. + (rtl_opt_pass): Convert to subclass of opt_pass. + (rtl_opt_pass::rtl_opt_pass): New. + (ipa_opt_pass_d): Convert to subclass of opt_pass. + (ipa_opt_pass_d::ipa_opt_pass_d): New. + (simple_ipa_opt_pass): Convert to subclass of opt_pass. + (simple_ipa_opt_pass::simple_ipa_opt_pass): New. + * config/i386/i386.c (rest_of_handle_insert_vzeroupper): Rework + invocation of pass_mode_switching to reflect this moving from a + global to a member of gcc::pass_manager. + (ix86_option_override): Rework how pass_insert_vzeroupper is + added to the pass_manager to reflect autogenerated changes. + * config/i386/t-i386 (i386.o) Add deps on CONTEXT_H and PASS_MANAGER_H. + +2013-08-05 Richard Earnshaw <rearnsha@arm.com> + + PR rtl-optimization/57708 + * recog.c (peep2_find_free_register): Validate all regs in a + multi-reg mode. + +2013-08-05 Jan Hubicka <jh@suse.cz> + + PR lto/57602 + * cgraph.c (verify_cgraph_node): Accept local flags from other + partitions. + * ipa.c (symtab_remove_unreachable_nodes): Do not clear local flag. + (function_and_variable_visibility): Likewise. + * trans-mem.c (ipa_tm_create_version): TM versions are not local. + +2013-08-05 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * graph.c (init_graph_slim_pretty_print): Remove. + (print_graph_cfg): Do not call it. Use local pretty printer. + (start_graph_dump): Likewise. + +2013-08-05 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * gimple-pretty-print.c (buffer): Remove. + (initialized): Likewise. + (maybe_init_pretty_print): Likewise. + (print_gimple_stmt): Do not call it. Use non-static local + pretty_printer variable. + (print_gimple_expr): Likewise. + (print_gimple_seq): Likewise. + (gimple_dump_bb): Likewise. + +2013-08-05 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * asan.c (asan_pp): Remove. + (asan_pp_initialized): Likewise. + (asan_pp_initialize): Likewise. + (asan_pp_string): Take a pretty_printer parameter. Adjust callers. + (asan_emit_stack_protection): Tidy. Use local pretty printer. + (asan_add_global): Likewise. + +2013-08-04 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * pretty-print.h (pp_base): Remove. Adjust dependent macros. + * diagnostic.h (diagnostic_flush_buffer): Adjust. + * pretty-print.c (pp_formatted_text_data): Likewise. + (pp_indent): Rename from pp_base_indent. + (pp_format): Rename from pp_base_format. + (pp_output_formatted_text): Rename from pp_base_output_formatted_text. + (pp_format_verbatim): Rename from pp_base_format_verbatim. + (pp_flush): Rename from pp_base_flush. + (pp_set_line_maximum_length): Rename from + pp_base_set_line_maximum_length. + (pp_clear_output_area): Rename from pp_base_clear_output_area. + (pp_set_prefix): Rename from pp_base_set_prefix. + (pp_destroy_prefix): Rename from pp_base_destroy_prefix. + (pp_emit_prefix): Rename from pp_base_emit_prefix. + (pp_append_text): Rename from pp_base_append_text. + (pp_formatted_text): Rename from pp_base_formatted_text. + (pp_last_position_in_text): Rename from pp_base_last_position_in_text. + (pp_remaining_character_count_for_line): Rename from + pp_base_remaining_character_count_for_line. + (pp_newline): Rename from pp_base_newline. + (pp_character): Rename from pp_base_character. + (pp_string): Rename from pp_base_string. + (pp_maybe_space): Rename from pp_base_maybe_space. + * asan.c (asan_pp_string): Adjust. + (asan_emit_stack_protection): Likewise. + (asan_add_global): Likewise. + * sched-vis.c (str_pattern_slim): Adjust pretty printer function call. + * tree-mudflap.c (mf_varname_tree): Likewise. + * tree-pretty-print.c (pp_tree_identifier): Rename from + pp_base_tree_identifier. + * tree-pretty-print.h (pp_tree_identifier): Remove macro definition. + Declare as function. + +2013-08-03 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * pretty-print.h (pp_bar_bar): New. + (pp_ampersand_ampersand): Likewise. + (pp_less_equal): Likewise. + (pp_greater_equal): Likewise. + * gimple-pretty-print.c (dump_ternary_rhs): Use specialized pretty + printer functions instead of pp_string or operators and punctuators. + (dump_gimple_call): Likewise. + (dump_gimple_omp_for): Likewise. + (dump_gimple_transaction): Likewise. + (dump_gimple_phi): Likewise. + (pp_gimple_stmt_1): Likewise. + * sched-vis.c (print_insn): Likewise. + * tree-mudflap.c (mf_varname_tree): Likewise. + * tree-pretty-print.c (dump_block_node): Likewise. + (dump_generic_node): Likewise. + +2013-08-02 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c (compute_ltrans_boundary): Add abstract origins into + boundaries. + * lto-streamer-out.c (tree_is_indexable): Results decls and + parm decls are not indexable. + (DFS_write_tree_body): Do not follow args and results. + (hash_tree): Likewise. + (output_functions): Rearrange so struct function is needed + only when real body is output; be able to also ouptut abstract + functions; output DECL_ARGUMENTS and DECL_RESULT. + (lto_output): When not in WPA, ale store abstract functions. + (write_symbol): Do not care about RESULT_DECL. + (output_symbol_p): Handle correctly sbtract decls. + * lto-streamer-in.c (input_function): Rearrange so struct + function can be NULL at entry; allow streaming of + functions w/o body; store DECL_ARGUMENTS and DECL_RESULT. + * ipa.c (symtab_remove_unreachable_nodes): Silence confused + sanity check during LTO. + * tree-streamer-out.c (write_ts_decl_non_common_tree_pointers): Skip + RESULT_DECl and DECL_ARGUMENTS. + * tree-streamer-in.c (lto_input_ts_decl_non_common_tree_pointers): + Likewise. + +2013-08-03 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * pretty-print.h (pp_underscore): New. + (pp_comma): Tidy. + * gimple-pretty-print.c (dump_unary_rhs): Use specialized pretty + printer functions instead of pp_character. + (dump_binary_rhs): Likewise. + (dump_ternary_rhs): Likewise. + (dump_gimple_call_args): Likewise. + (pp_points_to_solution): Likewise. + (dump_gimple_call): Likewise. + (dump_gimple_switch): Likewise. + (dump_gimple_cond): Likewise. + (dump_gimple_bind): Likewise. + (dump_gimple_try): Likewise. + (dump_gimple_omp_for): Likewise. + (dump_gimple_omp_continue): Likewise. + (dump_gimple_omp_single): Likewise. + (dump_gimple_omp_sections): Likewise. + (dump_gimple_omp_block): Likewise. + (dump_gimple_omp_critical): Likewise. + (dump_gimple_transaction): Likewise. + (dump_gimple_asm): Likewise. + (dump_gimple_phi): Likewise. + (dump_gimple_omp_parallel): Likewise. + (dump_gimple_omp_task): Likewise. + (dump_gimple_omp_atomic_load): Likewise. + (dump_gimple_omp_atomic_store): Likewise. + (dump_gimple_mem_ops): Likewise. + (pp_gimple_stmt_1): Likewise. + (pp_cfg_jump): Likewise. + (dump_implicit_edges): Likewise. + (gimple_dump_bb_for_graph): Likewise. + * graph.c (draw_cfg_node): Likewise. + * langhooks.c (lhd_print_error_function): Likewise. + * sched-vis.c (print_exp): Likewise. + (print_value): Likewise. + (print_pattern): Likewise. + (print_insn): Likewise. + (rtl_dump_bb_for_graph): Likewise. + * tree-pretty-print.c (dump_function_declaration): Likewise. + (dump_array_domain): Likewise. + (dump_omp_clause): Likewise. + (dump_location): Likewise. + (dump_generic_node): Likewise. + (print_struct_decl): Likewise. + * diagnostic.c (diagnostic_show_locus): Use pp_space. + +2013-08-03 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + * gimple-ssa-strength-reduction.c (replace_mult_candidate): Update + candidate table when replacing a candidate statement. + (replace_rhs_if_not_dup): Likewise. + (replace_one_candidate): Likewise. + +2013-08-02 Jan Hubicka <jh@suse.cz> + Martin Liska <marxin.liska@gmail.com> + + * cgraphunit.c (add_new_function): Fix logic when adding from + late IPA pass. + (assemble_thunk): Rename to ... + (expand_thunk); .. this one; export; get it working with + general functions; make produced gimple valid. + * cgraph.h (expand_thunk): Declare. + +2013-08-02 Jan Hubicka <jh@suse.cz> + + * ipa-cp.c (gather_context_independent_values): Use + ipa_get_param_move_cost. + (get_replacement_map): Remove PARAM; move parameter folding + into tree-inline.c + (create_specialized_node): Update. + * ipa-prop.c (ipa_populate_param_decls): Do not look for origins; + assert that we have gimple body; update move_cost. + (count_formal_params): Assert that we have gimple body. + (ipa_dump_param): New function. + (ipa_alloc_node_params): Break out from ... + (ipa_initialize_node_params): ... here. + (ipa_get_vector_of_formal_parms): ICE when used in WPA. + (ipa_write_node_info): Stream move costs. + (ipa_read_node_info): Read move costs. + (ipa_update_after_lto_read): Do not recompute node params. + * ipa-prop.h (ipa_param_descriptor): Add move_cost. + (ipa_get_param): Check we are not in WPA. + (ipa_get_param_move_cost): New. + * tree-inline.c (tree_function_versioning): Fold replacement as needed. + * ipa-inline-analysis.c (inline_node_duplication_hook): Expect only + parm numbers to be present. + +2013-08-02 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/58048 + * lra-constraints.c (process_alt_operands): Don't check asm + operand on register. + +2013-08-02 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (sparc_emit_membar_for_model) <SMM_TSO>: Add + the implied StoreLoad barrier for atomic operations if before. + +2013-08-02 Jan Hubicka <jh@suse.cz> + Martin Liska <marxin.liska@gmail.com> + + * cgraph.c (cgraph_function_body_availability): Do not check + cgraph flags. + * cgraph.h (symtab_for_node_and_aliases, symtab_nonoverwritable_alias, + symtab_node_availability): Declare. + * ipa.c (can_replace_by_local_alias): New. + (function_and_variable_visibility): Use it. + * symtab.c (symtab_for_node_and_aliases, + symtab_nonoverwritable_alias_1, symtab_nonoverwritable_alias): New. + +2013-08-02 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57963 + * lra-constraints.c (reverse_equiv_p, contains_reloaded_insn_p): New. + (lra_constraints): Use them. + +2013-08-02 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/types.md (define_attr "type"): Add "load_acq" + and "store_rel". + * config/arm/cortex-a53.md (cortex_a53_load1): Update for attribute + changes. + (cortex_a53_store1): Likewise. + +2013-08-01 Jan Hubicka <jh@suse.cz> + + * ipa.c (symtab_remove_unreachable_nodes): Nodes in other + partitions are not needed. + +2013-08-01 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.h (MAYBE_NON_Q_CLASS_P): New. + * config/i386/i386.c (ix86_secondary_reload): Use INTEGER_CLASS_P and + MAYBE_NON_Q_CLASS_P where appropriate. + +2013-08-01 Jan Hubicka <jh@suse.cz> + + * cgraph.h (release_function_body): Declare. + * tree.c (free_lang_data_in_decl): Free, parameters and return values + of unused delcarations. + +2013-08-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (minmax_arithsi_non_canon): Emit canonical + RTL form when subtracting a constant. + +2013-08-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (peepholes for eq (reg1) (reg2/imm)): + Generate canonical plus rtx with negated immediate instead of minus + where appropriate. + * config/arm/arm.c (thumb2_reorg): Handle ADCS <Rd>, <Rn> case. + +2013-08-01 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_release_function_body): Use used_as_abstract_origin. + (cgraph_release_function_body): Likewise. + (cgraph_can_remove_if_no_direct_calls_p): Likewise. + * cgraph.h (cgrpah_node): Rename abstract_and_needed + to used_as_abstract_origin. + * tree-inline-transfrom.c (can_remove_node_now_p_1): Do not remove + symbols used as abstract origins. + * cgraphunit.c (analyze_functions): Update. + * ipa.c (symtab_remove_unreachable_nodes): Recompute + used_as_abstract_origin. + * tree-inline.c (tree_function_versioning): Update + used_as_abstract_origin; be ready for DECL_RESULT and + DECL_ARGUMENTS to be NULL. + + * lto-symtab.c (lto_symtab_merge_symbols): Merge duplicated nodes + for abstract functions. + * cgraph.h (symtab_real_symbol_p): Abstract declarations are not + real symbols. + +2013-08-01 Jan Hubicka <jh@suse.cz> + + * profile.c (compute_value_histograms): Fix thinko. + +2013-08-01 Sofiane Naci <sofiane.naci@arm.com> + + * config.gcc (aarch64*-*-*): Add aarch-common.o to extra_objs. Add + aarch-common-protos.h to extra_headers. + (aarch64*-*-*): Add arm/aarch-common-protos.h to tm_p_file. + * config/aarch64/aarch64.md: Include "../arm/cortex-a53.md". + * config/aarch64/t-aarch64 (aarch-common.o): Define. + +2013-08-01 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md (define_attr "type"): Delete. + Include "../arm/types.md". Define "type" attribute for all patterns. + * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>): Update for + attribute changes. + +2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/predicates.md (fusion_gpr_addis): New predicates + to support power8 load fusion. + (fusion_gpr_mem_load): Likewise. + + * config/rs6000/rs6000-modes.def (PTImode): Update a comment. + + * config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New + declarations for power8 load fusion. + (emit_fusion_gpr_load): Likewise. + + * config/rs6000/rs6000.c (rs6000_option_override_internal): If + tuning for power8, turn on fusion mode by default. Turn on sign + extending fusion mode if normal fusion mode is on, and we are at + -O2 or -O3. + (fusion_gpr_load_p): New function, return true if we can fuse an + addis instruction with a dependent load to a GPR. + (emit_fusion_gpr_load): Emit the instructions for power8 load + fusion to GPRs. + + * config/rs6000/vsx.md (VSX_M2): New iterator for fusion peepholes. + (VSX load fusion peepholes): New peepholes to fuse together an + addi instruction with a VSX load instruction. + + * config/rs6000/rs6000.md (GPR load fusion peepholes): New + peepholes to fuse an addis instruction with a load to a GPR base + register. If we are supporting sign extending fusions, convert + sign extending loads to zero extending loads and add an explicit + sign extension. + +2013-07-31 Sofiane Naci <sofiane.naci@arm.com> + + * config.gcc (arm*-*-*): Add aarch-common.o to extra_objs. Add + aarch-common-protos.h to extra_headers. + (arm*-*-*): Add arm/aarch-common-protos.h to tm_p_file. + * config/arm/arm.c (arm_early_load_addr_dep): Move from here to ... + (arm_early_store_addr_dep): Likewise. + (arm_no_early_alu_shift_dep): Likewise. + (arm_no_early_alu_shift_value_dep): Likewise. + (arm_no_early_mul_dep): Likewise. + (arm_no_early_store_addr_dep): Likewise. + (arm_mac_accumulator_is_mul_result): Likewise. + (arm_mac_accumulator_is_result): Likewise. + * config/arm/aarch-common.c: ... here. New file. + * config/arm/arm-protos.h (arm_early_load_addr_dep): Move from + here to ... + (arm_early_store_addr_dep): Likewise. + (arm_no_early_alu_shift_dep): Likewise. + (arm_no_early_alu_shift_value_dep): Likewise. + (arm_no_early_mul_dep): Likewise. + (arm_no_early_store_addr_dep): Likewise. + (arm_mac_accumulator_is_mul_result): Likewise. + (arm_mac_accumulator_is_result): Likewise. + * config/arm/aarch-common-protos.h: ... here. New file. + * config/arm/t-arm (aarch-common.o): Define. + +2013-07-31 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/arm.md: Include new file "types.md". + (define_attr "type"): Move from here to ... + (define_attr "mul32"): Likewise. + (define_attr "mul64"): Likewise. + * config/arm/types.md: ... here. New file. + +2013-07-31 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * config.gcc (*-*-rtems*): Use __cxa_atexit by default. + * config/rs6000/rtems.h (TARGET_LIBGCC_SDATA_SECTION): Define. + +2013-07-31 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * gen-pass-instances.awk: Fix offset of substr(). + +2013-07-31 David Malcolm <dmalcolm@redhat.com> + + * Makefile.in (pass-instances.def): New. + (passes.o): Replace dependency on passes.def with one on + pass-instances.def + + * gen-pass-instances.awk: New. + + * passes.c (pass_manager::pass_manager): Use pass-instances.def + rather than passes.def, updating local definition of NEXT_PASS + macro to add an extra NUM parameter (currently unused). + +2013-07-30 David Malcolm <dmalcolm@redhat.com> + + * Makefile.in (PASS_MANAGER_H): New. + (lto-cgraph.o): Depend on CONTEXT_H and PASS_MANAGER_H. + (passes.o): Likewise. + (statistics.o): Likewise. + (cgraphunit.o): Likewise. + (context.o): Depend on PASS_MANAGER_H. + + * pass_manager.h: New. + + * cgraphunit.c (cgraph_add_new_function): Update for moves + of globals to fields of pass_manager. + (analyze_function): Likewise. + (expand_function): Likewise. + (ipa_passes): Likewise. + (compile): Likewise. + + * context.c (context::context): New. + * context.h (context::context): New. + (context::get_passes): New. + (context::passes_): New. + + * lto-cgraph.c (input_node): Update for moves of globals to + fields of pass_manager. + + * passes.c (all_passes): Remove, in favor of a field of the + same name within the new class pass_manager. + (all_small_ipa_passes): Likewise. + (all_lowering_passes): Likewise. + (all_regular_ipa_passes): Likewise. + (all_late_ipa_passes): Likewise. + (all_lto_gen_passes): Likewise. + (passes_by_id): Likewise. + (passes_by_id_size): Likewise. + (gcc_pass_lists): Remove, in favor of "pass_lists" field within + the new class pass_manager. + (set_pass_for_id): Convert to... + (pass_manager::set_pass_for_id): ...method. + (get_pass_for_id): Convert to... + (pass_manager::get_pass_for_id): ...method. + (register_one_dump_file): Move body of implementation into... + (pass_manager::register_one_dump_file): ...here. + (register_dump_files_1): Convert to... + (pass_manager::register_dump_files_1): ...method. + (register_dump_files): Convert to... + (pass_manager::register_dump_files): ...method. + (create_pass_tab): Update for moves of globals to fields of + pass_manager. + (dump_passes): Move body of implementation into... + (pass_manager::dump_passes): ...here. + (register_pass): Move body of implementation into... + (pass_manager::register_pass): ...here. + (init_optimization_passes): Convert into... + (pass_manager::pass_manager): ...constructor for new + pass_manager class, and initialize the pass_lists array. + (check_profile_consistency): Update for moves of globals to + fields of pass_manager. + (dump_profile_report): Move body of implementation into... + (pass_manager::dump_profile_report): ...here. + (ipa_write_summaries_1): Update for moves of pass lists from + being globals to fields of pass_manager. + (ipa_write_optimization_summaries): Likewise. + (ipa_read_summaries): Likewise. + (ipa_read_optimization_summaries): Likewise. + (execute_all_ipa_stmt_fixups): Likewise. + + * statistics.c (statistics_fini): Update for moves of globals to + fields of pass_manager. + + * toplev.c (general_init): Replace call to + init_optimization_passes with construction of the pass_manager + instance. + + * tree-pass.h (all_passes): Remove, in favor of a field of the + same name within the new class pass_manager. + (all_small_ipa_passes): Likewise. + (all_lowering_passes): Likewise. + (all_regular_ipa_passes): Likewise. + (all_lto_gen_passes): Likewise. + (all_late_ipa_passes): Likewise. + (passes_by_id): Likewise. + (passes_by_id_size): Likewise. + (gcc_pass_lists): Remove, in favor of "pass_lists" field within + the new class pass_manager. + (get_pass_for_id): Remove. + +2013-07-30 Richard Earnshaw <rearnsha@arm.com> + + * config.gcc (arm): Require 64-bit host-wide-int for all ARM target + configs. + +2013-07-30 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (mulhi3): New expand pattern. + +2013-07-30 Jan Hubicka <jh@suse.cz> + Martin Liska <marxin.liska@gmail.com> + + * profile.c (compute_value_histograms): Do not ICE when + there is mismatch only on some counters. + +2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + PR rtl-optimization/57637 + * function.c (move_insn_for_shrink_wrap): Also check the + GEN set of the LIVE problem for the liveness analysis + if it exists, otherwise give up. + +2013-07-29 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + PR tree-optimization/57993 + * gimple-ssa-strength-reduction.c (replace_mult_candidate): Record + replaced statement in the candidate table. + (phi_add_costs): Return infinite cost when the hidden basis does + not dominate all phis on which the candidate is dependent. + (replace_one_candidate): Record replaced statement in the + candidate table. + +2013-07-29 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.md (*isub_i+2): New peephole. + (ashlv2si3): New expander. + (*ashlv2si3_i): New define_insn_and_split. + * predicates.md (float_operation): Allow patterns with three + basic sub-patterns. + + PR rtl-optimization/58021 + * mode-switching.c (create_pre_exit): Always split off preceding + insns if we are not at the basic block head. + +2013-07-29 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/linux.h (GLIBC_DYNAMIC_LINKER): Handle `-mnan=2008'. + (UCLIBC_DYNAMIC_LINKER): New macro. + * config/mips/linux64.h (GLIBC_DYNAMIC_LINKER32): Handle + `-mnan=2008'. + (GLIBC_DYNAMIC_LINKER64, GLIBC_DYNAMIC_LINKERN32): Likewise. + (UCLIBC_DYNAMIC_LINKER32): Undefine macro first. Handle + `-mnan=2008'. + (UCLIBC_DYNAMIC_LINKER64): Redefine macro. + (UCLIBC_DYNAMIC_LINKERN32): Likewise. + * config/mips/mips-modes.def: Remove RESET_FLOAT_FORMAT calls + for SF and DF modes. Use ieee_quad_format for TF mode. + * config/mips/mips-opts.h (mips_ieee_754_setting): New enum. + * config/mips/mips.c (mips_file_start): Output a `.nan' directive. + (mips_option_override): Handle `-mnan=legacy'. + * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Handle + `-mabs=2008' and `-mnan=2008'. + (OPTION_DEFAULT_SPECS): Add "nan" default. + (ASM_SPEC): Handle `-mnan='. + [!HAVE_AS_NAN] (HAVE_AS_NAN): New macro. + * config/mips/mips.md (abs<mode>2): Handle `-mabs=2008', update + comment accordingly. + (neg<mode>2): Likewise. + * config/mips/mips.opt (mabs, mnan): New options. + * doc/install.texi (Configuration): Document `--with-nan=' option. + * doc/invoke.texi (Option Summary): List MIPS `-mabs=' and + `-mnan=' options. + (MIPS Options): Document them. + * config.gcc <mips*-*-*>: Handle `--with-nan='. + * configure.ac <mips*-*-*>: Check for GAS `-mnan=2008' support. + * configure: Regenerate. + * config.in: Regenerate. + +2013-07-29 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (float post-reload splitters): Do not check + for subregs of SSE registers. + +2013-07-29 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/57954 + PR target/57988 + * config/i386/i386.md (post-reload splitter + to avoid partial SSE reg dependency stalls): New pattern. + +2013-07-29 Dominik Vogt <vogt@linux.vnet.ibm.com> + + * config/s390/s390.md ("movcc"): Swap load and store instructions. + +2013-07-27 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_compute_frame_size): + Also reserve space for saving UNKNOWN_REGNUM for leaf functions. + +2013-07-26 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (die_checksum_ordered): Don't include template + instantiations in signature. + (is_template_parameter): New function. + (is_template_instantiation): New function. + (generate_skeleton_bottom_up): Don't include template instantiations + in type unit DIE. + (generate_skeleton): Likewise. + (break_out_comdat_types): Move recursive call to break out nested + types earlier. + (prune_unused_types_mark_generic_parms_dies): Call + is_template_parameter. + +2013-07-26 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (neg<mode>2): Offer alternative that + uses vector registers. + * config/aarch64/iterators.md: Add attributes rtn and vas. + +2013-07-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + Richard Earnshaw <richard.earnshaw@arm.com> + + * combine.c (simplify_comparison): Re-canonicalize operands + where appropriate. + * config/arm/arm.md (movcond_addsi): New splitter. + +2013-07-25 Sterling Augustine <saugustine@google.com> + + * dwarf2out.c (size_of_pubnames): Move code to... + (include_pubname_in_output): ...here. New. + (want_pubnames): Rearrange. + (output_pubnames): Call include_pubname_in_output. Move assertion. + +2013-07-25 Cameron McInally <cameron.mcinally@nyu.edu> + + * doc/extend.texi: Fix return types for __builtin_ia32_cmp*s builtins. + +2013-07-25 Cameron McInally <cameron.mcinally@nyu.edu> + + PR target/38836 + * doc/extend.texi: Remove obsolete builtins. Fix + typo for __builtin_ia32_loadss and __builtin_ia32_cmpnltss. + +2013-07-25 Jan Hubicka <jh@suse.cz> + + * cgraph.c (release_function_body): Break out from ... + (cgraph_release_function_body): ... this one; also release DECL_RESULT + and DECL_ARGUMENTS. + * ipa-cp.c (get_replacement_map): Add parm_num argument; do not set + old_tree in the map. + (create_specialized_node): Update. + * lto-cgraph.c (output_node_opt_summary): Do not translate old_tree + into index. + * cgraphclones.c (cgraph_create_virtual_clone): Do not copy + DECL_ARGUMENTS, DECL_INITIAL and DECL_RESULT. + * ipa-prop.c (ipa_populate_param_decls): Look for origin of clones. + * tree-inline.c (initialize_cfun): Initialize DECL_ARGUMENTS and + DECL_RESULT. + +2013-07-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_addsi3, addsi3_carryin_<optab>, + addsi3_carryin_alt2_<optab>): Correct output template. + +2013-07-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-fixed.md (ssmulsa3, usmulusa3): + Adjust for arm_restrict_it. + Remove trailing whitespace. + +2013-07-25  Mark Kettenis  <kettenis@openbsd.org> + + * config/pa/pa.c (pa_trampoline_init): Emit __enable_execute_stack + libcall if HAVE_ENABLE_EXECUTE_STACK is defined. + + * config.gcc (hppa-*-openbsd*): Don't set tmake_file. + +2013-07-25 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57960 + * lra-constraints.c (process_alt_operands): Use the right mode + when checking strict_low. + +2013-07-25 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_cgraph_replace_node): Release function body. + * cgraph.c (cgraph_remove_node): Do not release function body + when in cgraph streaming. + * ipa.c (process_references, symtab_remove_unreachable_nodes): Objects + in other partitions are not considered reachable; fix handling of + clones. + +2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm.md (*sibcall_insn): Remove unnecessary space. + +2013-07-25 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + PR target/57731 + PR target/57837 + * config/arm/arm.md ("*sibcall_insn): Replace use of + Ss with US. Adjust output for v5 and v4t. + (*sibcall_value_insn): Likewise and loosen predicate on operand0. + + * config/arm/constraints.md ("Ss"): Rename to US. + +2013-07-25 Terry Guo <terry.guo@arm.com> + + * config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for + shift_add/shift_sub0/shift_sub1 RTXs. + +2013-07-24 Bill Schmidt <wschmidt@linux.ibm.com> + Anton Blanchard <anton@au1.ibm.com> + + * config/rs6000/altivec.md (altivec_vpkpx): Handle little endian. + (altivec_vpks<VI_char>ss): Likewise. + (altivec_vpks<VI_char>us): Likewise. + (altivec_vpku<VI_char>us): Likewise. + (altivec_vpku<VI_char>um): Likewise. + +2013-07-24 David Malcolm <dmalcolm@redhat.com> + + Introduce context class. + + * Makefile.in (CONTEXT_H): New. + (OBJS): Add context.o. + (toplev.o): Add CONTEXT_H to dependencies. + (context.o): New. + + * toplev.c (general_init): Create the singleton gcc::context instance. + + * context.c: New. + + * context.h: New. + +2013-07-24 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57968 + * mode-switching.c (create_pre_exit): Allow instructions that + don't set a return register to need a non-exit mode. + +2013-07-24 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + Anton Blanchard <anton@au1.ibm.com> + + * config/rs6000/vector.md (vec_realign_load_<mode>): Reorder input + operands to vperm for little endian. + * config/rs6000/rs6000.c (rs6000_expand_builtin): Use lvsr instead + of lvsl to create the control mask for a vperm for little endian. + +2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + Anton Blanchard <anton@au1.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse + two operands for little-endian. + +2013-07-23 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips.c (mips_case_values_threshold): New. + (TARGET_CASE_VALUES_THRESHOLD): Define. + +2013-07-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + Anton Blanchard <anton@au1.ibm.com> + + * config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct + selection of field for vector splat in little endian mode. + +2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean + expanders to rs6000.md. + (ior<mode>3): Likewise. + (and<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (nor<mode>3): Likewise. + (andc<mode>3): Likewise. + (eqv<mode>3): Likewise. + (nand<mode>3): Likewise. + (orc<mode>3): Likewise. + + * config/rs6000/rs6000-protos.h (rs6000_split_logical): New + declaration. + + * config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support + to split multi-word logical operations. + (rs6000_split_logical_di): Likewise. + (rs6000_split_logical): Likewise. + + * config/rs6000/vsx.md (VSX_L2): Delete, no longer used. + (vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md, + and allow TImode operations in 32-bit. + (vsx_and<mode>3_64bit): Likewise. + (vsx_ior<mode>3_32bit): Likewise. + (vsx_ior<mode>3_64bit): Likewise. + (vsx_xor<mode>3_32bit): Likewise. + (vsx_xor<mode>3_64bit): Likewise. + (vsx_one_cmpl<mode>2_32bit): Likewise. + (vsx_one_cmpl<mode>2_64bit): Likewise. + (vsx_nor<mode>3_32bit): Likewise. + (vsx_nor<mode>3_64bit): Likewise. + (vsx_andc<mode>3_32bit): Likewise. + (vsx_andc<mode>3_64bit): Likewise. + (vsx_eqv<mode>3_32bit): Likewise. + (vsx_eqv<mode>3_64bit): Likewise. + (vsx_nand<mode>3_32bit): Likewise. + (vsx_nand<mode>3_64bit): Likewise. + (vsx_orc<mode>3_32bit): Likewise. + (vsx_orc<mode>3_64bit): Likewise. + + * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector + logical types in GPRs. + + * config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit + logical insns to rs6000.md, and allow TImode operations in + 32-bit. + (altivec_ior<mode>3): Likewise. + (altivec_xor<mode>3): Likewise. + (altivec_one_cmpl<mode>2): Likewise. + (altivec_nor<mode>3): Likewise. + (altivec_andc<mode>3): Likewise. + + * config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode + attributes for moving the 128-bit logical operations into + rs6000.md. + (BOOL_REGS_OUTPUT): Likewise. + (BOOL_REGS_OP1): Likewise. + (BOOL_REGS_OP2): Likewise. + (BOOL_REGS_UNARY): Likewise. + (BOOL_REGS_AND_CR0): Likewise. + (one_cmpl<mode>2): Add support for DI logical operations on + 32-bit, splitting the operations to 32-bit. + (anddi3): Likewise. + (iordi3): Likewise. + (xordi3): Likewise. + (and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator + changes to combine the 32/64-bit code, allow logical operations on + TI mode in 32-bit, and to use similar match_operator patterns like + scalar mode uses. Combine the Altivec and VSX code for logical + operations, and move it here. + (ior<mode>3, 128-bit types): Likewise. + (xor<mode>3, 128-bit types): Likewise. + (one_cmpl<mode>3, 128-bit types): Likewise. + (nor<mode>3, 128-bit types): Likewise. + (andc<mode>3, 128-bit types): Likewise. + (eqv<mode>3, 128-bit types): Likewise. + (nand<mode>3, 128-bit types): Likewise. + (orc<mode>3, 128-bit types): Likewise. + (and<mode>3_internal): Likewise. + (bool<mode>3_internal): Likewise. + (boolc<mode>3_internal1): Likewise. + (boolc<mode>3_internal2): Likewise. + (boolcc<mode>3_internal1): Likewise. + (boolcc<mode>3_internal2): Likewise. + (eqv<mode>3_internal1): Likewise. + (eqv<mode>3_internal2): Likewise. + (one_cmpl1<mode>3_internal): Likewise. + +2013-07-23 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.c (microblaze_expand_prologue): + Rename flag_stack_usage to flag_stack_usage_info. + +2013-07-23 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/sync.md: New file. + * config/microblaze/microblaze.md: Include sync.md + * config/microblaze/microblaze.c: Add print_operand 'y'. + * config/microblaze/constraints.md: Add memory_contraint + 'Q' which is a single register. + +2013-07-23 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (SPARC Options): Document new leon3 processor value. + +2013-07-22 Po-Chun Chang <pchang9@cs.wisc.edu> + + * reload.c (find_reloads): Exit loop once we find this operand + cannot be reloaded somehow for this alternative. + + * reload.c (find_reloads): Exit loop once we find a hard register. + + * rtlanal.c (computed_jump_p): Exit loop once we find label + reference is used. + + * i386.c (ix86_pad_returns): Exit loop after setting replace. + + * cfgloopmanip.c (remove_path): Exit loop after setting + irred_invalidated. + + * gensupport.c (subst_dup): Avoid loop if code is not + MATCH_DUP nor MATCH_OP_DUP. + +2013-07-23 Nicklas Bo Jensen <nbjensen@gmail.com> + + * doc/md.texi (Machine-Specific Peephole Optimizers): Fix a typo. + +2013-07-23 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Also return + true for SP_REGNUM if mode == ptr_mode. + * config/aarch64/aarch64.h (ADDITIONAL_REGISTER_NAMES): Add "wsp" + with value R0_REGNUM + 31. + +2013-07-23 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (aarch64_pad_arg_upward): In big-endian, + pad pointer-typed argument downward. + +2013-07-23 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define _ILP32 + and __ILP32__ when the ILP32 model is in use. + +2013-07-23 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (POINTER_BYTES): New define. + (aarch64_load_symref_appropriately): In the case of + SYMBOL_SMALL_ABSOLUTE, use the mode of 'dest' instead of Pmode + to generate new rtx; likewise to the case of SYMBOL_SMALL_GOT. + (aarch64_expand_mov_immediate): In the case of SYMBOL_FORCE_TO_MEM, + change to pass 'ptr_mode' to force_const_mem and zero-extend 'mem' + if 'mode' doesn't equal to 'ptr_mode'. + (aarch64_output_mi_thunk): Add an assertion on the alignment of + 'vcall_offset'; change to call aarch64_emit_move differently depending + on whether 'Pmode' equals to 'ptr_mode' or not; use 'POINTER_BYTES' + to calculate the upper bound of 'vcall_offset'. + (aarch64_cannot_force_const_mem): Change to also return true if + mode != ptr_mode. + (aarch64_legitimize_reload_address): In the case of large + displacements, add new local variable 'xmode' and an assertion + based on it; change to use 'xmode' to generate the new rtx and + reload. + (aarch64_asm_trampoline_template): Change to generate the template + differently depending on TARGET_ILP32 or not; change to use + 'POINTER_BYTES' in the argument passed to assemble_aligned_integer. + (aarch64_trampoline_size): Removed. + (aarch64_trampoline_init): Add new local constant 'tramp_code_sz' + and replace immediate literals with it. Change to use 'ptr_mode' + instead of 'DImode' and call convert_memory_address if the mode + of 'fnaddr' doesn't equal to 'ptr_mode'. + (aarch64_elf_asm_constructor): Change to use assemble_aligned_integer + to output symbol. + (aarch64_elf_asm_destructor): Likewise. + * config/aarch64/aarch64.h (TRAMPOLINE_SIZE): Change to be dependent + on TARGET_ILP32 instead of aarch64_trampoline_size. + * config/aarch64/aarch64.md (movsi_aarch64): Add new alternatives + of 'mov' between WSP and W registers as well as 'adr' and 'adrp'. + (loadwb_pair<GPI:mode>_<PTR:mode>): Rename to ... + (loadwb_pair<GPI:mode>_<P:mode>): ... this. Replace PTR with P. + (storewb_pair<GPI:mode>_<PTR:mode>): Likewise; rename to ... + (storewb_pair<GPI:mode>_<P:mode>): ... this. + (add_losym): Change to 'define_expand' and call gen_add_losym_<mode> + depending on the value of 'mode'. + (add_losym_<mode>): New. + (ldr_got_small_<mode>): New, based on ldr_got_small. + (ldr_got_small): Remove. + (ldr_got_small_sidi): New. + * config/aarch64/iterators.md (P): New. + (PTR): Change to 'ptr_mode' in the condition. + +2013-07-23 Yufeng Zhang <yufeng.zhang@arm.com> + + * config.gcc (aarch64*-*-*): Support --with-abi. + (aarch64*-*-elf): Support --with-multilib-list. + (aarch64*-*-linux*): Likewise. + (supported_defaults): Add abi to aarch64*-*-*. + * configure.ac: Mention AArch64 for --with-multilib-list. + * configure: Re-generated. + * config/aarch64/biarchilp32.h: New file. + * config/aarch64/biarchlp64.h: New file. + * config/aarch64/aarch64-elf.h (ENDIAN_SPEC): New define. + (ABI_SPEC): Ditto. + (MULTILIB_DEFAULTS): Ditto. + (DRIVER_SELF_SPECS): Ditto. + (ASM_SPEC): Update to also substitute -mabi. + * config/aarch64/aarch64-elf-raw.h (LINK_SPEC): Add linker script + file whose name depends on -mabi= and -mbig-endian. + * config/aarch64/aarch64.h (LONG_TYPE_SIZE): Change to depend on + TARGET_ILP32. + (POINTER_SIZE): New define. + (POINTERS_EXTEND_UNSIGNED): Ditto. + (enum aarch64_abi_type): New enumeration tag. + (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators. + (AARCH64_ABI_DEFAULT): Define to AARCH64_ABI_LP64 if undefined. + (TARGET_ILP32): New define. + * config/aarch64/aarch64.opt (mabi): New. + (aarch64_abi): New. + (ilp32, lp64): New values for -mabi. + * config/aarch64/t-aarch64 (comma): New define. + (MULTILIB_OPTIONS): Ditto. + (MULTILIB_DIRNAMES): Ditto. + * config/aarch64/t-aarch64-linux (MULTIARCH_DIRNAME): New define. + * doc/invoke.texi: Document -mabi for AArch64. + +2013-07-23 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.md: Explain asm print modifier 'r' for REG. + +2013-07-22 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + Anton Blanchard <anton@au1.ibm.com> + + * config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix + endianness when selecting field to splat. + +2013-07-22 Eric Christopher <echristo@gmail.com> + + * dwarf2out.c (die_odr_checksum): New function to use + CHECKSUM_ macros and ULEB128 for DIE tag. + (generate_type_signature): Use. + +2013-07-22 Eric Botcazou <ebotcazou@adacore.com> + + * config.gcc (sparc*-*-*): Accept leon3 processor. + (sparc-leon*-*): Merge with sparc*-*-* and add leon3 support. + * doc/invoke.texi (SPARC Options): Adjust -mfix-ut699 entry. + * config/sparc/sparc-opts.h (enum processor_type): Add PROCESSOR_LEON3. + * config/sparc/sparc.opt (enum processor_type): Add leon3. + (mfix-ut699): Adjust comment. + * config/sparc/sparc.h (TARGET_CPU_leon3): New define. + (CPP_CPU32_DEFAULT_SPEC): Add leon3 support. + (CPP_CPU_SPEC): Likewise. + (ASM_CPU_SPEC): Likewise. + * config/sparc/sparc.c (leon3_cost): New constant. + (sparc_option_override): Add leon3 support. + (mem_ref): New function. + (sparc_gate_work_around_errata): Return true if -mfix-ut699 is enabled. + (sparc_do_work_around_errata): Look into the instruction in the delay + slot and adjust accordingly. Add fix for the data cache nullify issues + of the UT699. Change insertion position for the NOP. + * config/sparc/leon.md (leon_fpalu, leon_fpmds, write_buf): Delete. + (leon3_load): New reservation. + (leon_store): Bump latency to 2. + (grfpu): New automaton. + (grfpu_alu): New unit. + (grfpu_ds): Likewise. + (leon_fp_alu): Adjust. + (leon_fp_mult): Delete. + (leon_fp_div): Split into leon_fp_divs and leon_fp_divd. + (leon_fp_sqrt): Split into leon_fp_sqrts and leon_fp_sqrtd. + * config/sparc/sparc.md (cpu): Add leon3. + * config/sparc/sync.md (atomic_exchangesi): Disable if -mfix-ut699. + (swapsi): Likewise. + (atomic_test_and_set): Likewise. + (ldstub): Likewise. + +2013-07-22 Jürgen Urban <JuergenUrban@gmx.de> + + * config.gcc (mips*-*-*): Add --with-fpu support. Make single the + default for R5900 targets. + * config/mips/mips.h (OPTION_DEFAULT_SPECS): Handle --with-fpu. + (ISA_HAS_LDC1_SDC1): Set to false for TARGET_MIPS5900. + * config/mips/mips.c (mips_option_override): Report an error for + -march=r5900 -mhard-float -mdouble-float. Use spu_single_format + for -march=r5900 -mhard-float. + +2013-07-22 Po-Chun Chang <pchang9@cs.wisc.edu> + + * df-problems.c (can_move_insns_across): Exit loop once we + find a non-fixed, non-global register. + + * ipa-pure-const.c (propagate_nothrow): Exit loop after + setting can_throw. + + * omega.c (omega_eliminate_red): Break after setting red_found. + (omega_problem_has_red_equations): Similarly after setting found. + (omega_query_variable): Similarly after setting coupled. + +2013-07-22 Marek Polacek <polacek@redhat.com> + + * gimplify.c: Don't include gimple.h twice. + +2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/constraints.md (Pd): Allow TARGET_THUMB + instead of TARGET_THUMB1. + (Pz): New constraint. + * config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit + encodings. + (compare_negsi_si): Likewise. + (compare_addsi2_op0): Likewise. + (compare_addsi2_op1): Likewise. + (addsi3_carryin_<optab>): Likewise. + (addsi3_carryin_alt2_<optab>): Likewise. + (addsi3_carryin_shift_<optab>): Disable cond_exec variant + for arm_restrict_it. + (subsi3_carryin): Likewise. + (arm_subsi3_insn): Add alternatives for 16-bit encoding. + (minmax_arithsi): Disable for arm_restrict_it. + (minmax_arithsi_non_canon): Adjust for arm_restrict_it. + (satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it. + (satsi_<SAT:code>_shift): Likewise. + (arm_shiftsi3): Add alternative for 16-bit encoding. + (arm32_movhf): Disable for arm_restrict_it. + (arm_cmpdi_unsigned): Add alternatives for 16-bit encoding. + (arm_movtas_ze): Disable cond_exec variant for arm_restrict_it. + +2013-07-22 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/arm.md (attribute "insn"): Delete. + (attribute "type"): Add "mov_imm", "mov_reg", "mov_shift", + "mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg". + (not_shiftsi): Update for attribute change. + (not_shiftsi_compare0): Likewise. + (not_shiftsi_compare0_scratch): Likewise. + (arm_one_cmplsi2): Likewise. + (thumb1_one_cmplsi2): Likewise. + (notsi_compare0): Likewise. + (notsi_compare0_scratch): Likewise. + (thumb1_movdi_insn): Likewise. + (arm_movsi_insn): Likewise. + (movhi_insn_arch4): Likewise. + (movhi_bytes): Likewise. + (arm_movqi_insn): Likewise. + (thumb1_movqi_insn): Likewise. + (arm32_movhf): Likewise. + (thumb1_movhf): Likewise. + (arm_movsf_soft_insn): Likewise. + (thumb1_movsf_insn): Likewise. + (thumb_movdf_insn): Likewise. + (movsicc_insn): Likewise. + (movsfcc_soft_insn): Likewise. + (and_scc): Likewise. + (cond_move): Likewise. + (if_move_not): Likewise. + (if_not_move): Likewise. + (if_shift_move): Likewise. + (if_move_shift): Likewise. + (if_shift_shift): Likewise. + (if_not_arith): Likewise. + (if_arith_not): Likewise. + (cond_move_not): Likewise. + * config/arm/neon.md (neon_mov<mode>): Update for attribute change. + (neon_mov<mode>): Likewise. + * config/arm/vfp.md (arm_movsi_vfp): Update for attribute change. + (thumb2_movsi_vfp): Likewise. + (movsf_vfp): Likewise. + (thumb2_movsf_vfp): Likewise. + * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute + change. + (cortexa7_older_only): Likewise. + (cortexa7_younger): Likewise. + * config/arm/arm1020e.md (1020alu_op): Update for attribute change. + (1020alu_shift_op): Likewise. + (1020alu_shift_reg_op): Likewise. + * config/arm/arm1026ejs.md (alu_op): Update for attribute change. + (alu_shift_op): Likewise. + (alu_shift_reg_op): Likewise. + * config/arm/arm1136jfs.md (11_alu_op): Update for attribute change. + (11_alu_shift_op): Likewise. + (11_alu_shift_reg_op): Likewise. + * config/arm/arm926ejs.md (9_alu_op): Update for attribute change. + (9_alu_shift_reg_op): Likewise. + * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute + change. + (cortex_a15_alu_shift): Likewise. + (cortex_a15_alu_shift_reg): Likewise. + * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change. + (cortex_a5_alu_shift): Likewise. + * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute + change. + (cortex_a53_alu_shift): Likewise. + * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute + change. + (cortex_a7_alu_reg): Likewise. + (cortex_a7_alu_shift): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change. + (cortex_a8_alu_shift): Likewise. + (cortex_a8_alu_shift_reg): Likewise. + (cortex_a8_mov): Likewise. + * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change. + (cortex_a9_dp_shift): Likewise. + * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change. + * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change. + (cortex_r4_mov): Likewise. + (cortex_r4_alu_shift): Likewise. + (cortex_r4_alu_shift_reg): Likewise. + * config/arm/fa526.md (526_alu_op): Update for attribute change. + (526_alu_shift_op): Likewise. + * config/arm/fa606te.md (606te_alu_op): Update for attribute change. + * config/arm/fa626te.md (626te_alu_op): Update for attribute change. + (626te_alu_shift_op): Likewise. + * config/arm/fa726te.md (726te_shift_op): Update for attribute change. + (726te_alu_op): Likewise. + (726te_alu_shift_op): Likewise. + (726te_alu_shift_reg_op): Likewise. + * config/arm/fmp626.md (mp626_alu_op): Update for attribute change. + (mp626_alu_shift_op): Likewise. + * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change. + (pj4_alu_e1_conds): Likewise. + (pj4_alu): Likewise. + (pj4_alu_conds): Likewise. + (pj4_shift): Likewise. + (pj4_shift_conds): Likewise. + (pj4_alu_shift): Likewise. + (pj4_alu_shift_conds): Likewise. + +2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/predicates.md (shiftable_operator_strict_it): + New predicate. + * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): + Disable cond_exec version for arm_restrict_it. + (thumb2_smaxsi3): Convert to generate cond_exec. + (thumb2_sminsi3): Likewise. + (thumb32_umaxsi3): Likewise. + (thumb2_uminsi3): Likewise. + (thumb2_abssi2): Adjust constraints for arm_restrict_it. + (thumb2_neg_abssi2): Likewise. + (thumb2_mov_scc): Add alternative for 16-bit encoding. + (thumb2_movsicc_insn): Adjust alternatives. + (thumb2_mov_negscc): Disable for arm_restrict_it. + (thumb2_mov_negscc_strict_it): New pattern. + (thumb2_mov_notscc_strict_it): New pattern. + (thumb2_mov_notscc): Disable for arm_restrict_it. + (thumb2_ior_scc): Likewise. + (thumb2_ior_scc_strict_it): New pattern. + (thumb2_cond_move): Adjust for arm_restrict_it. + (thumb2_cond_arith): Disable for arm_restrict_it. + (thumb2_cond_arith_strict_it): New pattern. + (thumb2_cond_sub): Adjust for arm_restrict_it. + (thumb2_movcond): Likewise. + (thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it. + (thumb2_zero_extendhisi2_v6): Likewise. + (thumb2_zero_extendqisi2_v6): Likewise. + (orsi_notsi_si): Likewise. + (orsi_not_shiftsi_si): Likewise. + +2013-07-22 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.c (avr_out_xload): No SBIS around LPM so that + instruction sequence is 1 byte shorter. + +2013-07-22 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (nonlocal_goto_receiver): Delete insn if + it is not needed after split. + +2013-07-20 Iain Sandoe <iain@codesourcery.com> + + PR target/51784 + * config/i386/i386.c (output_set_got) [TARGET_MACHO]: Adjust to emit a + second label for nonlocal goto receivers. Don't output pic base labels + unless we're producing PIC; mark that action unreachable(). + (ix86_save_reg): If the function contains a nonlocal label, save the + PIC base reg. + * config/darwin-protos.h (machopic_should_output_picbase_label): New. + * config/darwin.c (emitted_pic_label_num): New GTY. + (update_pic_label_number_if_needed): New. + (machopic_output_function_base_name): Adjust for nonlocal receiver + case. + (machopic_should_output_picbase_label): New. + * config/i386/i386.md (enum unspecv): UNSPECV_NLGR: New. + (nonlocal_goto_receiver): New insn and split. + +2013-07-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_fold_builtin): Fold abs in all modes. + * config/aarch64/aarch64-simd-builtins.def + (abs): Enable for all modes. + * config/aarch64/arm_neon.h + (vabs<q>_s<8,16,32,64): Rewrite using builtins. + (vabs_f64): Add missing intrinsic. + +2013-07-19 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/arm_neon.h (vabs_s64): New function + +2013-07-19 Georg-Johann Lay <avr@gjlay.de> + + PR target/57516 + * config/avr/avr-fixed.md (round<mode>3_const): Turn expander to insn. + * config/avr/avr.md (adjust_len): Add `round'. + * config/avr/avr-protos.h (avr_out_round): New prototype. + (avr_out_plus): Add `out_label' argument. + * config/avr/avr.c (avr_out_plus_1): Add `out_label' argument. + (avr_out_plus): Pass down `out_label' to avr_out_plus_1. + Handle the case where `insn' is just a pattern. + (avr_out_bitop): Handle the case where `insn' is just a pattern. + (avr_out_round): New function. + (avr_adjust_insn_length): Handle ADJUST_LEN_ROUND. + +2013-07-18 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.c (microblaze_expand_prologue): + Add check for flag_stack_usage to handle -fstack-usage support + +2013-07-18 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Adjust flag + interaction for new Power8 flags and VSX. + +2013-07-18 Sriraman Tallam <tmsriram@google.com> + + PR middle-end/57698 + * tree-inline.c (expand_call_inline): Emit errors during + early_inlining only if optimization is not turned on. + +2013-07-18 David Malcolm <dmalcolm@redhat.com> + + * passes.def: New. + + * passes.c (init_optimization_passes): Move the construction of + the pass hierarchy into a new passes.def file. + + * Makefile.in (passes.o): Add dependency on passes.def. + +2013-07-18 David Malcolm <dmalcolm@redhat.com> + + * passes.c (init_optimization_passes): Introduce macros for + constructing the tree of passes (INSERT_PASSES_AFTER, + PUSH_INSERT_PASSES_WITHIN, POP_INSERT_PASSES, + TERMINATE_PASS_LIST). + +2013-07-18 Vladimir Makarov <vmakarov@redhat.com> + Wei Mi <wmi@google.com> + + PR rtl-optimization/57878 + * lra-assigns.c (assign_by_spills): Move non_reload_pseudos to the + top. + (reload_pseudo_compare_func): Check nregs first for reload + pseudos. + +2013-07-18 David Malcolm <dmalcolm@redhat.com> + + * tree-pass.h (pass_ipa_lto_wpa_fixup): Remove redundant decl. + +2013-07-18 Po-Chun Chang <pchang9@cs.wisc.edu> + + * read-rtl.c (validate_const_int): Once an invalid character is + seen, quit the loop. + + * gengtype.c (write_roots): Similarly once we find the "deletable" + or "if_marked" option. + +2013-07-18 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/arm.md (attribute "insn"): Delete values "mrs", "msr", + "xtab" and "sat". Move value "clz" from here to ... + (attriubte "type"): ... here. + (satsi_<SAT:code>): Delete "insn" attribute. + (satsi_<SAT:code>_shift): Likewise. + (arm_zero_extendqisi2addsi): Likewise. + (arm_extendqisi2addsi): Likewise. + (clzsi2): Update for attribute changes. + (rbitsi2): Likewise. + * config/arm/arm-fixed.md (arm_ssatsihi_shift): Delete "insn" + attribute. + (arm_usatsihi): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change. + +2013-07-18 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/arm.md (attribute "type"): Rename "simple_alu_imm" to + "arlo_imm". Rename "alu_reg" to "arlo_reg". Rename "simple_alu_shift" + to "extend". Split "alu_shift" into "shift" and "arlo_shift". Split + "alu_shift_reg" into "shift_reg" and "arlo_shift_reg". List types + in alphabetical order. + (attribute "core_cycles"): Update for attribute changes. + (arm_addsi3): Likewise. + (addsi3_compare0): Likewise. + (addsi3_compare0_scratch): Likewise. + (addsi3_compare_op1): Likewise. + (addsi3_compare_op2): Likewise. + (compare_addsi2_op0): Likewise. + (compare_addsi2_op1): Likewise. + (addsi3_carryin_shift_<optab>): Likewise. + (subsi3_carryin_shift): Likewise. + (rsbsi3_carryin_shift): Likewise. + (arm_subsi3_insn): Likewise. + (subsi3_compare0): Likewise. + (subsi3_compare): Likewise. + (arm_andsi3_insn): Likewise. + (thumb1_andsi3_insn): Likewise. + (andsi3_compare0): Likewise. + (andsi3_compare0_scratch): Likewise. + (zeroextractsi_compare0_scratch + (andsi_not_shiftsi_si): Likewise. + (iorsi3_insn): Likewise. + (iorsi3_compare0): Likewise. + (iorsi3_compare0_scratch): Likewise. + (arm_xorsi3): Likewise. + (thumb1_xorsi3_insn): Likewise. + (xorsi3_compare0): Likewise. + (xorsi3_compare0_scratch): Likewise. + (satsi_<SAT:code>_shift): Likewise. + (rrx): Likewise. + (arm_shiftsi3): Likewise. + (shiftsi3_compare0): Likewise. + (not_shiftsi): Likewise. + (not_shiftsi_compare0): Likewise. + (not_shiftsi_compare0_scratch): Likewise. + (arm_one_cmplsi2): Likewise. + (thumb_one_complsi2): Likewise. + (notsi_compare0): Likewise. + (notsi_compare0_scratch): Likewise. + (thumb1_zero_extendhisi2): Likewise. + (arm_zero_extendhisi2): Likewise. + (arm_zero_extendhisi2_v6): Likewise. + (arm_zero_extendhisi2addsi): Likewise. + (thumb1_zero_extendqisi2): Likewise. + (thumb1_zero_extendqisi2_v6): Likewise. + (arm_zero_extendqisi2): Likewise. + (arm_zero_extendqisi2_v6): Likewise. + (arm_zero_extendqisi2addsi): Likewise. + (thumb1_extendhisi2): Likewise. + (arm_extendhisi2): Likewise. + (arm_extendhisi2_v6): Likewise. + (arm_extendqisi): Likewise. + (arm_extendqisi_v6): Likewise. + (arm_extendqisi2addsi): Likewise. + (thumb1_extendqisi2): Likewise. + (thumb1_movdi_insn): Likewise. + (arm_movsi_insn): Likewise. + (movsi_compare0): Likewise. + (movhi_insn_arch4): Likewise. + (movhi_bytes): Likewise. + (arm_movqi_insn): Likewise. + (thumb1_movqi_insn): Likewise. + (arm32_movhf): Likewise. + (thumb1_movhf): Likewise. + (arm_movsf_soft_insn): Likewise. + (thumb1_movsf_insn): Likewise. + (movdf_soft_insn): Likewise. + (thumb_movdf_insn): Likewise. + (arm_cmpsi_insn): Likewise. + (cmpsi_shiftsi): Likewise. + (cmpsi_shiftsi_swp): Likewise. + (arm_cmpsi_negshiftsi_si): Likewise. + (movsicc_insn): Likewise. + (movsfcc_soft_insn): Likewise. + (arith_shiftsi): Likewise. + (arith_shiftsi_compare0 + (arith_shiftsi_compare0_scratch + (sub_shiftsi): Likewise. + (sub_shiftsi_compare0 + (sub_shiftsi_compare0_scratch + (and_scc): Likewise. + (cond_move): Likewise. + (if_plus_move): Likewise. + (if_move_plus): Likewise. + (if_move_not): Likewise. + (if_not_move): Likewise. + (if_shift_move): Likewise. + (if_move_shift): Likewise. + (if_shift_shift): Likewise. + (if_not_arith): Likewise. + (if_arith_not): Likewise. + (cond_move_not): Likewise. + (thumb1_ashlsi3): Set type attribute. + (thumb1_ashrsi3): Likewise. + (thumb1_lshrsi3): Likewise. + (thumb1_rotrsi3): Likewise. + (shiftsi3_compare0_scratch): Likewise. + * config/arm/neon.md (neon_mov<mode>): Update for attribute changes. + (neon_mov<mode>): Likewise. + * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Update for + attribute changes. + (thumb2_movsi_insn): Likewise. + (thumb2_cmpsi_neg_shiftsi): Likewise. + (thumb2_extendqisi_v6): Likewise. + (thumb2_zero_extendhisi2_v6): Likewise. + (thumb2_zero_extendqisi2_v6): Likewise. + (thumb2_shiftsi3_short): Likewise. + (thumb2_addsi3_compare0_scratch): Likewise. + (orsi_not_shiftsi_si): Likewise. + * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes. + * config/arm/arm-fixed.md (arm_ssatsihi_shift): Update for attribute + changes. + * config/arm/arm1020e.md (1020alu_op): Update for attribute changes. + (1020alu_shift_op): Likewise. + (1020alu_shift_reg_op): Likewise. + * config/arm/arm1026ejs.md (alu_op): Update for attribute changes. + (alu_shift_op): Likewise. + (alu_shift_reg_op): Likewise. + * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes. + (11_alu_shift_op): Likewise. + (11_alu_shift_reg_op): Likewise. + * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes. + (9_alu_shift_reg_op): Likewise. + * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute + changes. + (cortex_a15_alu_shift): Likewise. + (cortex_a15_alu_shift_reg): Likewise. + * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute + changes. + (cortex_a5_alu_shift): Likewise. + * config/arm/cortex-a53.md (cortex_a53_alu) : Update for attribute + changes. + (cortex_a53_alu_shift): Likewise. + * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute + changes. + (cortex_a7_alu_reg): Likewise. + (cortex_a7_alu_shift): Likewise. + * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute + changes. + (cortex_a8_alu_shift): Likewise. + (cortex_a8_alu_shift_reg): Likewise. + (cortex_a8_mov): Likewise. + * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes. + (cortex_a9_dp_shift): Likewise. + * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute + changes. + * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute + changes. + (cortex_r4_mov): Likewise. + (cortex_r4_alu_shift): Likewise. + (cortex_r4_alu_shift_reg): Likewise. + * config/arm/fa526.md (526_alu_op): Update for attribute changes. + (526_alu_shift_op): Likewise. + * config/arm/fa606te.md (606te_alu_op): Update for attribute changes. + * config/arm/fa626te.md (626te_alu_op): Update for attribute changes. + (626te_alu_shift_op): Likewise. + * config/arm/fa726te.md (726te_shift_op): Update for attribute changes. + (726te_alu_op): Likewise. + (726te_alu_shift_op): Likewise. + (726te_alu_shift_reg_op): Likewise. + * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes. + (mp626_alu_shift_op): Likewise. + * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute changes. + (pj4_alu_e1_conds): Likewise. + (pj4_alu): Likewise. + (pj4_alu_conds): Likewise. + (pj4_shift): Likewise. + (pj4_shift_conds): Likewise. + (pj4_alu_shift): Likewise. + (pj4_alu_shift_conds): Likewise. + * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute + changes. + (cortexa7_older_only): Likewise. + (cortexa7_younger): Likewise. + +2013-07-18 David Malcolm <dmalcolm@redhat.com> + + * ipa-pure-const.c (generate_summary): Rename to... + (pure_const_generate_summary): ... this. + +2013-07-17 Iain Sandoe <iain@codesourcery.com> + + * config/rs6000/darwin.h (REGISTER_NAMES): Add HTM registers. + +2013-07-17 Yvan Roux <yvan.roux@linaro.org> + + PR target/57909 + * config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store + usage in HI mode. + +2013-07-17 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c: (s390_expand_builtin): Allow -mhtm to be + enabled without -march=zEC12. + * config/s390/s390.h (TARGET_HTM): Do not require EC12 machine + flags to be set. + +2013-07-16 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.h (ISA_HAS_FP4): Correct formatting. + (ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2. + (ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in + terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2. + (ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument. + * config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for + ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than + ISA_HAS_FP4. + <MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4 + and ISA_HAS_NMADD3_NMSUB3. + * config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise. + (nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise. + (nmsub4<mode>, nmsub3<mode>): Likewise. + (nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise. + +2013-07-16 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.h (ISA_HAS_NMADD4_NMSUB4): Remove + TARGET_MIPS5400 checking. + +2013-07-16 Jakub Jelinek <jakub@redhat.com> + Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM + registers in the comment. + (DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers. + (DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS + rather than FIRST_PSEUDO_REGISTERS. + +2013-07-16 Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not + enable extra ISA flags with TARGET_HTM. + +2013-07-16 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.h (ISA_HAS_MULS, ISA_HAS_MSAC, ISA_HAS_MACC): + Fix comment typos. + +2013-07-15 Cong Hou <congh@google.com> + + * tree-vect-data-refs.c (dr_group_sort_cmp): Do not use hash function + in compare function for sorting. + +2013-07-15 Peter Bergner <bergner@vnet.ibm.com> + + * config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md. + * config/rs6000/rs6000.opt: Add -mhtm option. + * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_HTM. + (ISA_2_7_MASKS_SERVER): Add OPTION_MASK_HTM. + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define + __HTM__ if the HTM instructions are available. + * config/rs6000/predicates.md (u3bit_cint_operand, u10bit_cint_operand, + htm_spr_reg_operand): New define_predicates. + * config/rs6000/rs6000.md (define_attr "type"): Add htm. + (TFHAR_REGNO, TFIAR_REGNO, TEXASR_REGNO): New define_constants. + Include htm.md. + * config/rs6000/rs6000-builtin.def (BU_HTM_0, BU_HTM_1, BU_HTM_2, + BU_HTM_3, BU_HTM_SPR0, BU_HTM_SPR1): Add support macros for defining + HTM builtin functions. + * config/rs6000/rs6000.c (RS6000_BUILTIN_H): New macro. + (rs6000_reg_names, alt_reg_names): Add HTM SPR register names. + (rs6000_init_hard_regno_mode_ok): Add support for HTM instructions. + (rs6000_builtin_mask_calculate): Likewise. + (rs6000_option_override_internal): Likewise. + (bdesc_htm): Add new HTM builtin support. + (htm_spr_num): New function. + (htm_spr_regno): Likewise. + (rs6000_htm_spr_icode): Likewise. + (htm_expand_builtin): Likewise. + (htm_init_builtins): Likewise. + (rs6000_expand_builtin): Add support for HTM builtin functions. + (rs6000_init_builtins): Likewise. + (rs6000_invalid_builtin, rs6000_opt_mask): Add support for -mhtm + option. + * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mhtm. + (TARGET_HTM, MASK_HTM): Define macros. + (FIRST_PSEUDO_REGISTER): Adjust for new HTM SPR registers. + (FIXED_REGISTERS): Likewise. + (CALL_USED_REGISTERS): Likewise. + (CALL_REALLY_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (enum reg_class): Likewise. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + (REGISTER_NAMES): Likewise. + (ADDITIONAL_REGISTER_NAMES): Likewise. + (RS6000_BTC_SPR, RS6000_BTC_VOID, RS6000_BTC_32BIT, RS6000_BTC_64BIT, + RS6000_BTC_MISC_MASK, RS6000_BTM_HTM): New macros. + (RS6000_BTM_COMMON): Add RS6000_BTM_HTM. + * config/rs6000/htm.md: New file. + * config/rs6000/htmintrin.h: New file. + * config/rs6000/htmxlintrin.h: New file. + +2013-07-15 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_symbol_type): + Define SYMBOL_TINY_GOT, update comment. + * config/aarch64/aarch64.c + (aarch64_load_symref_appropriately): Handle SYMBOL_TINY_GOT. + (aarch64_expand_mov_immediate): Likewise. + (aarch64_print_operand): Likewise. + (aarch64_classify_symbol): Likewise. + * config/aarch64/aarch64.md (UNSPEC_GOTTINYPIC): Define. + (ldr_got_tiny): Define. + +2013-07-13 Tobias Grosser <tobias@grosser.es> + + PR tree-optimization/54094 + * graphite-clast-to-gimple.c (translate_clast_for_loop): Derive the + scheduling dimension for the parallelism check from the polyhedral + information in the AST. + * graphite-dependences.c (carries_deps): Do not assume the schedule is + in 2D + 1 form. + +2013-07-13 Jason Merrill <jason@redhat.com> + + * print-tree.c (debug_vec_tree): Use debug_raw. + (debug_raw (vec<tree, va_gc> &)): New. + (debug_raw (vec<tree, va_gc> *)): New. + * tree.h: Declare them. + +2013-07-13 Bin Cheng <bin.cheng@arm.com> + + * ifcvt.c (ifcvt_after_combine): New static variable. + (cheap_bb_rtx_cost_p): Set scale to REG_BR_PROB_BASE when optimizing + for size. + (if_convert): New parameter after_combine. Set ifcvt_after_combine. + (rest_of_handle_if_conversion, rest_of_handle_if_after_combine, + rest_of_handle_if_after_reload): Pass new argument for if_convert. + +2013-07-12 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.c (mips_expand_call): Remove empty statement. + +2013-07-12 Michael Matz <matz@suse.de> + + PR middle-end/55771 + * convert.c (convert_to_real): Reject non-float inner types. + +2013-07-12 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-protos.h + (aarch64_simd_immediate_valid_for_move): Remove. + * config/aarch64/aarch64.c (simd_immediate_info): New member. + (aarch64_simd_valid_immediate): Recognize idioms for shifting ones + cases. + (aarch64_output_simd_mov_immediate): Print the correct shift specifier. + +2013-07-11 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips.c (mips_conditional_register_usage): Do not + use t[0-7] registers in MIPS16 mode when optimizing for size. + +2013-07-11 Sriraman Tallam <tmsriram@google.com> + + * config/i386/i386.c (dispatch_function_versions): Fix array + indexing of function_version_info to match actual_versions. + +2013-07-11 Teresa Johnson <tejohnson@google.com> + + * vec.h (struct va_gc): Move release out-of-line. + (va_gc::release): Call ggc_free on released vec. + +2013-07-11 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.md (""*tls_gd_low<TLSmode:tls_abi_suffix>"): + Require GOT register as additional operand in UNSPEC. + ("*tls_ld_low<TLSmode:tls_abi_suffix>"): Likewise. + ("*tls_got_dtprel_low<TLSmode:tls_abi_suffix>"): Likewise. + ("*tls_got_tprel_low<TLSmode:tls_abi_suffix>"): Likewise. + ("*tls_gd<TLSmode:tls_abi_suffix>"): Update splitter. + ("*tls_ld<TLSmode:tls_abi_suffix>"): Likewise. + ("tls_got_dtprel_<TLSmode:tls_abi_suffix>"): Likewise. + ("tls_got_tprel_<TLSmode:tls_abi_suffix>"): Likewise. + +2013-07-11 Georg-Johann Lay <avr@gjlay.de> + + PR target/57631 + * config/avr/avr.c (avr_set_current_function): Sanity-check signal + name seen by assembler/linker rather if available. + +2013-07-11 Andreas Schwab <schwab@suse.de> + + * config/aarch64/aarch64-linux.h (CPP_SPEC): Define. + +2013-07-10 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (curr_insn_transform): Switch off optional reloads. + +2013-07-10 Joseph Myers <joseph@codesourcery.com> + + * doc/tm.texi.in: Move hook documentation to .... + * target.def: ... here. + + * doc/tm.texi.in (TARGET_CANONICALIZE_COMPARISON): Remove stray + text on @hook line. + * doc/tm.texi: Regenerate. + +2013-07-10 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/57869 + * doc/invoke.texi: Document -Wconditionally-supported. + +2013-07-10 Georg-Johann Lay <avr@gjlay.de> + + PR target/57844 + * config/avr/avr.c (avr_prologue_setup_frame): Trunk -size to mode + of my_fp. + +2013-07-10 Georg-Johann Lay <avr@gjlay.de> + + PR target/57506 + * config/avr/avr-mcus.def (atmega16hva, atmega16hva2, atmega16hvb) + (atmega16m1, atmega16u4, atmega32a, atmega32c1, atmega32hvb) + (atmega32m1, atmega32u4, atmega32u6, atmega64c1, atmega64m1): + Remove duplicate devices. + * config/avr/gen-avr-mmcu-texi.c (print_mcus): Fail on duplicate MCUs. + * config/avr/t-multilib: Regenerate. + * config/avr/avr-tables.opt: Regenerate. + * doc/avr-mmcu.texi: Regenerate. + +2013-07-10 Georg-Johann Lay <avr@gjlay.de> + + PR target/56987 + * config/avr/avr.opt (Waddr-space-convert): Fix typo. + +2013-07-10 Graham Stott <graham.stott@btinternet.com> + + * config/mips/mips.c (mips_rtx_costs): Very slightly increase + the cost of MULT when optimizing for size. + +2013-07-10 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/cr16/cr16-protos.h: Don't include target.h. + +2013-07-09 Joseph Myers <joseph@codesourcery.com> + + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Only + adjust register size for TDmode and TFmode for VSX registers. + +2013-07-08 Kai Tietz <ktietz@redhat.com> + + PR target/56892 + * config/i386/i386.c (TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P): Define as + hook_bool_const_tree_true. + +2013-07-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c: Replace F*_REGNUM with FPR*_REGNUM. + * config/s390/s390.h: Remove F*_REGNUM macro definitions. + * config/s390/s390.md: Define FPR*_REGNUM constants. + Fix FPR2_REGNUM constant (18 -> 17). + ("*trunc<BFP:mode><DFP_ALL:mode>2") + ("*trunc<DFP_ALL:mode><BFP:mode>2") + ("trunc<BFP:mode><DFP_ALL:mode>2") + ("trunc<DFP_ALL:mode><BFP:mode>2") + ("*extend<BFP:mode><DFP_ALL:mode>2") + ("*extend<DFP_ALL:mode><BFP:mode>2") + ("extend<BFP:mode><DFP_ALL:mode>2") + ("extend<DFP_ALL:mode><BFP:mode>2"): Replace FPR2_REGNUM with + FPR4_REGNUM. + +2013-07-08 Graham Stott <graham.stott@btinternet.com> + + * Makefile.in: (c-family-warn): Define to $(STRICT_WARN) + +2013-07-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c: Rename cfun_set_fpr_bit to cfun_set_fpr_save + and cfun_fpr_bit_p to cfun_fpr_save_p. + (s390_frame_area, s390_register_info, s390_frame_info) + (s390_emit_prologue, s390_emit_epilogue) + (s390_conditional_register_usage): Use the *_REGNUM macros for FPR + register numbers. + * config/s390/s390.h: Define *_REGNUM macros for floating point + register numbers. + +2013-07-08 Eric Botcazou <ebotcazou@adacore.com> + + * Makefile.in (tree-ssa-reassoc.o): Add dependency on $(PARAMS_H). + +2013-07-08 Po-Chun Chang <pchang9@cs.wisc.edu> + + PR rtl-optimization/57786 + * combine.c (distribute_notes) <case REG_DEAD>: Change all_used to bool + and break out of the loop when it is set to false. + +2013-07-08 Jakub Jelinek <jakub@redhat.com> + + PR target/57819 + * simplify-rtx.c (simplify_unary_operation_1) <case ZERO_EXTEND>: + Simplify (zero_extend:SI (subreg:QI (and:SI (reg:SI) + (const_int 63)) 0)). + * combine.c (make_extraction): Create ZERO_EXTEND or SIGN_EXTEND + using simplify_gen_unary instead of gen_rtx_*_EXTEND. + * config/i386/i386.md (*jcc_bt<mode>_1): New define_insn_and_split. + + PR rtl-optimization/57829 + * simplify-rtx.c (simplify_binary_operation_1) <case IOR>: Ensure that + mask bits outside of mode are just sign-extension from mode to HWI. + +2013-07-08 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> + + * config/i386/i386-opts.h (enum stringop_alg): Add vector_loop. + * config/i386/i386.c (expand_set_or_movmem_via_loop): Use + adjust_address instead of change_address to keep info about alignment. + (emit_strmov): Remove. + (emit_memmov): New function. + (expand_movmem_epilogue): Refactor to properly handle bigger sizes. + (expand_movmem_epilogue): Likewise and return updated rtx for + destination. + (expand_constant_movmem_prologue): Likewise and return updated rtx for + destination and source. + (decide_alignment): Refactor, handle vector_loop. + (ix86_expand_movmem): Likewise. + (ix86_expand_setmem): Likewise. + * config/i386/i386.opt (Enum): Add vector_loop to option stringop_alg. + +2013-07-07 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/driver-i386.c (host_detect_local_cpu): Do not check + signature_TM2_ebx, it interferes with signature_INTEL_ebx. + +2013-07-06 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (sse_movlhps): Change alternative 3 + of operand 2 to "m". + +2013-07-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/57807 + * config/i386/sse.md (iptr): New mode attribute. + (sse2_movq128): Add pointer size overrides for Intel asm dialect. + (<sse>_vm<plusminus_insn><mode>3): Ditto. + (<sse>_vmmul<mode>3): Ditto. + (<sse>_vmdiv<mode>3): Ditto. + (sse_vmrcpv4sf2): Ditto. + (<sse>_vmsqrt<mode>2): Ditto. + (sse_vmrsqrtv4sf2): Ditto. + (<sse>_vm<code><mode>3): Ditto. + (avx_vmcmp<mode>3): Ditto. + (<sse>_vmmaskcmp<mode>3): Ditto. + (<sse>_comi): Ditto. + (<sse>_ucomi): Ditto. + (*xop_vmfrcz_<mode>): Ditto. + (*fmai_fmadd_<mode>): Ditto. + (*fmai_fmsub_<mode>): Ditto. + (*fmai_fnmadd_<mode>): Ditto. + (*fmai_fnmsub_<mode>): Ditto. + (*fma4i_vmfmadd_<mode>): Ditto. + (*fma4i_vmfmsub_<mode>): Ditto. + (*fma4i_vmfnmadd_<mode>): Ditto. + (*fma4i_vmfnmsub_<mode>): Ditto. + (*xop_vmfrcz_<mode>): Ditto. + (sse_cvtps2pi): Ditto. + (sse_cvttps2pi): Ditto. + (sse_cvtss2si): Ditto. + (sse_cvtss2si_2): Ditto. + (sse_cvtss2siq_2): Ditto. + (sse_cvttss2si): Ditto. + (sse_cvttss2siq): Ditto. + (sse_cvtsd2si): Ditto. + (sse_cvtsd2si_2): Ditto. + (sse_cvtsd2siq_2): Ditto. + (sse_cvttsd2si): Ditto. + (sse_cvttsd2siq): Ditto. + (sse_cvtsd2ss): Ditto. + (sse_cvtss2sd): Ditto. + (avx2_pbroadcast<mode>): Ditto. + (avx2_pbroadcast<mode>_1): Ditto. + (*avx_vperm_broadcast_v4sf): Ditto. + + (sse_movhlps): Ditto for movlp[sd]/movhp[sd] alternatives. + (sse_movlhps): Ditto. + (sse_storehps): Ditto. + (sse_loadhps): Ditto. + (sse_storelps): Ditto. + (sse_loadlps): Ditto. + (*vec_concatv4sf): Ditto. + (*vec_interleave_highv2df): Ditto. + (*vec_interleave_lowv2df): Ditto. + (*vec_extractv2df_1_sse): Ditto. + (*vec_extractv2df_0_sse): Ditto. + (sse2_storelpd): Ditto. + (sse2_loadlpd): Ditto. + (sse2_movsd): Ditto. + (*vec_concatv4si): Ditto. + (vec_concatv2di): Ditto. + + * config/i386/mmx.md (mmx_punpcklbw): Add pointer size overrides + for Intel asm dialect. + (mmx_punpcklwd): Ditto. + (mmx_punpckldq): Ditto. + + * config/i386/i386.c (ix86_print_operand) ['H']: Output 'qword ptr' + for intel assembler dialect. + +2013-07-06 Jakub Jelinek <jakub@redhat.com> + + PR target/29776 + * fold-const.c (tree_call_nonnegative_warnv_p): Return true + for BUILT_IN_C{LZ,LRSB}*. + * tree.h (CASE_INT_FN): Add FN##IMAX case. + * tree-vrp.c (extract_range_basic): Handle + BUILT_IN_{FFS,PARITY,POPCOUNT,C{LZ,TZ,LRSB}}*. For + BUILT_IN_CONSTANT_P if argument isn't (D) of PARM_DECL, + fall thru to code calling set_value*. + * builtins.c (expand_builtin): Remove *IMAX cases. + (fold_builtin_bitop): For BUILT_IN_CLRSB* return NULL_TREE + if width is bigger than 2*HWI. + +2013-07-05 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/55342 + * lra-int.h (lra_subreg_reload_pseudos): New. + * lra.c: Add undoing optional reloads to the block diagram. + (lra_subreg_reload_pseudos): New. + (lra_optional_reload_pseudos): Change comments. + (lra): Init and clear lra_subreg_reload_pseudos. Clear + lra_optional_reload_pseudos after undo transformations. + * lra-assigns.c (pseudo_prefix_title): New. + (lra_setup_reg_renumber): Use it. + (spill_for): Ditto. Check subreg reload pseudos too. + (assign_by_spills): Consider subreg reload pseudos too. + * lra-constraints.c (simplify_operand_subreg): Use + lra_subreg_reload_pseudos instead of lra_optional_reload_pseudos. + (curr_insn_transform): Recognize and do optional reloads. + (undo_optional_reloads): New. + (lra_undo_inheritance): Call undo_optional_reloads. + +2013-07-05 Thomas Quinot <quinot@adacore.com> + + * tree-complex.c (expand_complex_operations_1): Fix typo. + +2013-07-04 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-protos.h (cpu_vector_cost): New. + (tune_params): New member 'const vec_costs'. + * config/aarch64/aarch64.c (generic_vector_cost): New. + (generic_tunings): New member 'generic_vector_cost'. + (aarch64_builtin_vectorization_cost): New. + (aarch64_add_stmt_cost): New. + (TARGET_VECTORIZE_ADD_STMT_COST): New. + (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New. + +2013-07-03 Jakub Jelinek <jakub@redhat.com> + + PR target/57777 + * config/i386/predicates.md (vsib_address_operand): Disallow + SYMBOL_REF or LABEL_REF in parts.disp if TARGET_64BIT && flag_pic. + +2013-07-03 Hans-Peter Nilsson <hp@bitrange.com> + + PR middle-end/55030 + * stmt.c (expand_nl_goto_receiver): Remove almost-copy of + expand_builtin_setjmp_receiver. + (expand_label): Adjust, call expand_builtin_setjmp_receiver + with NULL for the label parameter. + * builtins.c (expand_builtin_setjmp_receiver): Don't clobber + the frame-pointer. Adjust comments. + [HAVE_builtin_setjmp_receiver]: Emit builtin_setjmp_receiver + only if LABEL is non-NULL. + +2013-07-03 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.h (enum arm_abi_type): Remove. + (ARM_ABI_AAPCS64): Ditto. + (arm_abi): Ditto. + (ARM_DEFAULT_ABI): Ditto. + +2013-07-03 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_simd_expand_builtin): Handle AARCH64_SIMD_STORE1. + * config/aarch64/aarch64-simd-builtins.def (ld1): New. + (st1): Likewise. + * config/aarch64/aarch64-simd.md + (aarch64_ld1<VALL:mode>): New. + (aarch64_st1<VALL:mode>): Likewise. + * config/aarch64/arm_neon.h + (vld1<q>_<fpsu><8, 16, 32, 64>): Convert to RTL builtins. + +2013-07-02 Sriraman Tallam <tmsriram@google.com> + + * config/i386/i386.c (gate_insert_vzeroupper): Check if + target ISA is AVX. + (ix86_option_override_internal):Turn on all -mavx target flags by + default as they are dependent on AVX anyway. + +2013-07-02 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (loc_checksum): Call hash_loc_operands for a + deterministic hash. + (loc_checksum_ordered): Likewise. + (hash_loc_operands): Remove inline keyword. + +2013-07-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57741 + * tree-vect-loop.c (vect_is_simple_iv_evolution): Disallow + non-INTEGRAL_TYPE_P non-SCALAR_FLOAT_TYPE_P SSA_NAME step_exprs, + or SCALAR_FLOAT_TYPE_P SSA_NAMEs if !flag_associative_math. + Allow REAL_CST step_exprs if flag_associative_math. + (get_initial_def_for_induction): Handle SCALAR_FLOAT_TYPE_P step_expr. + +2013-07-02 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64-simd.md (absdi2): Support abs for DI mode. + +2013-07-02 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*extr_insv_reg<mode>): New pattern. + +2013-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit + encoding. + (iorsi3_insn): Likewise. + (arm_xorsi3): Likewise. + +2013-07-01 Sofiane Naci <sofiane.naci@arm.com> + + * arm.md (attribute "wtype"): Delete. Move attribute values from here + to ... + (attribute "type"): ... here, and prefix with "wmmx_". + (attribute "core_cycles"): Update for attribute changes. + * iwmmxt.md (tbcstv8qi): Update for attribute changes. + (tbcstv4hi): Likewise. + (tbcstv2si): Likewise. + (iwmmxt_iordi3): Likewise. + (iwmmxt_xordi3): Likewise. + (iwmmxt_anddi3): Likewise. + (iwmmxt_nanddi3): Likewise. + (iwmmxt_arm_movdi): Likewise. + (iwmmxt_movsi_insn): Likewise. + (mov<mode>_internal): Likewise. + (and<mode>3_iwmmxt): Likewise. + (ior<mode>3_iwmmxt): Likewise. + (xor<mode>3_iwmmxt): Likewise. + (add<mode>3_iwmmxt): Likewise. + (ssaddv8qi3): Likewise. + (ssaddv4hi3): Likewise. + (ssaddv2si3): Likewise. + (usaddv8qi3): Likewise. + (usaddv4hi3): Likewise. + (usaddv2si3): Likewise. + (sub<mode>3_iwmmxt): Likewise. + (sssubv8qi3): Likewise. + (sssubv4hi3): Likewise. + (sssubv2si3): Likewise. + (ussubv8qi3): Likewise. + (ussubv4hi3): Likewise. + (ussubv2si3): Likewise. + (mulv4hi3_iwmmxt): Likewise. + (smulv4hi3_highpart): Likewise. + (umulv4hi3_highpart): Likewise. + (iwmmxt_wmacs): Likewise. + (iwmmxt_wmacsz): Likewise. + (iwmmxt_wmacu): Likewise. + (iwmmxt_wmacuz): Likewise. + (iwmmxt_clrdi): Likewise. + (iwmmxt_clrv8qi): Likewise. + (iwmmxt_clr4hi): Likewise. + (iwmmxt_clr2si): Likewise. + (iwmmxt_uavgrndv8qi3): Likewise. + (iwmmxt_uavgrndv4hi3): Likewise. + (iwmmxt_uavgv8qi3): Likewise. + (iwmmxt_uavgv4hi3): Likewise. + (iwmmxt_tinsrb): Likewise. + (iwmmxt_tinsrh): Likewise. + (iwmmxt_tinsrw): Likewise. + (iwmmxt_textrmub): Likewise. + (iwmmxt_textrmsb): Likewise. + (iwmmxt_textrmuh): Likewise. + (iwmmxt_textrmsh): Likewise. + (iwmmxt_textrmw): Likewise. + (iwmxxt_wshufh): Likewise. + (eqv8qi3): Likewise. + (eqv4hi3): Likewise. + (eqv2si3): Likewise. + (gtuv8qi3): Likewise. + (gtuv4hi3): Likewise. + (gtuv2si3): Likewise. + (gtv8qi3): Likewise. + (gtv4hi3): Likewise. + (gtv2si3): Likewise. + (smax<mode>3_iwmmxt): Likewise. + (umax<mode>3_iwmmxt): Likewise. + (smin<mode>3_iwmmxt): Likewise. + (umin<mode>3_iwmmxt): Likewise. + (iwmmxt_wpackhss): Likewise. + (iwmmxt_wpackwss): Likewise. + (iwmmxt_wpackdss): Likewise. + (iwmmxt_wpackhus): Likewise. + (iwmmxt_wpackwus): Likewise. + (iwmmxt_wpackdus): Likewise. + (iwmmxt_wunpckihb): Likewise. + (iwmmxt_wunpckihh): Likewise. + (iwmmxt_wunpckihw): Likewise. + (iwmmxt_wunpckilb): Likewise. + (iwmmxt_wunpckilh): Likewise. + (iwmmxt_wunpckilw): Likewise. + (iwmmxt_wunpckehub): Likewise. + (iwmmxt_wunpckehuh): Likewise. + (iwmmxt_wunpckehuw): Likewise. + (iwmmxt_wunpckehsb): Likewise. + (iwmmxt_wunpckehsh): Likewise. + (iwmmxt_wunpckehsw): Likewise. + (iwmmxt_wunpckelub): Likewise. + (iwmmxt_wunpckeluh): Likewise. + (iwmmxt_wunpckeluw): Likewise. + (iwmmxt_wunpckelsb): Likewise. + (iwmmxt_wunpckelsh): Likewise. + (iwmmxt_wunpckelsw): Likewise. + (ror<mode>3): Likewise. + (ashr<mode>3_iwmmxt): Likewise. + (lshr<mode>3_iwmmxt): Likewise. + (ashl<mode>3_iwmmxt): Likewise. + (ror<mode>3_di): Likewise. + (ashr<mode>3_di): Likewise. + (lshr<mode>3_di): Likewise. + (ashl<mode>3_di): Likewise. + (iwmmxt_wmadds): Likewise. + (iwmmxt_wmaddu): Likewise. + (iwmmxt_tmia): Likewise. + (iwmmxt_tmiaph): Likewise. + (iwmmxt_tmiabb): Likewise. + (iwmmxt_tmiatb): Likewise. + (iwmmxt_tmiabt): Likewise. + (iwmmxt_tmiatt): Likewise. + (iwmmxt_tmovmskb): Likewise. + (iwmmxt_tmovmskh): Likewise. + (iwmmxt_tmovmskw): Likewise. + (iwmmxt_waccb): Likewise. + (iwmmxt_wacch): Likewise. + (iwmmxt_waccw): Likewise. + (iwmmxt_waligni): Likewise. + (iwmmxt_walignr): Likewise. + (iwmmxt_walignr0): Likewise. + (iwmmxt_walignr1): Likewise. + (iwmmxt_walignr2): Likewise. + (iwmmxt_walignr3): Likewise. + (iwmmxt_wsadb): Likewise. + (iwmmxt_wsadh): Likewise. + (iwmmxt_wsadbz): Likewise. + (iwmmxt_wsadhz): Likewise. + * iwmmxt2.md (iwmmxt_wabs<mode>3): Update for attribute changes. + (iwmmxt_wabsdiffb): Likewise. + (iwmmxt_wabsdiffh): Likewise. + (iwmmxt_wabsdiffw): Likewise. + (iwmmxt_waddsubhx): Likewise + (iwmmxt_wsubaddhx): Likewise. + (addc<mode>3): Likewise. + (iwmmxt_avg4): Likewise. + (iwmmxt_avg4r): Likewise. + (iwmmxt_wmaddsx): Likewise. + (iwmmxt_wmaddux): Likewise. + (iwmmxt_wmaddsn): Likewise. + (iwmmxt_wmaddun): Likewise. + (iwmmxt_wmulwsm): Likewise. + (iwmmxt_wmulwum): Likewise. + (iwmmxt_wmulsmr): Likewise. + (iwmmxt_wmulumr): Likewise. + (iwmmxt_wmulwsmr): Likewise. + (iwmmxt_wmulwumr): Likewise. + (iwmmxt_wmulwl): Likewise. + (iwmmxt_wqmulm): Likewise. + (iwmmxt_wqmulwm): Likewise. + (iwmmxt_wqmulmr): Likewise. + (iwmmxt_wqmulwmr): Likewise. + (iwmmxt_waddbhusm): Likewise. + (iwmmxt_waddbhusl): Likewise. + (iwmmxt_wqmiabb): Likewise. + (iwmmxt_wqmiabt): Likewise. + (iwmmxt_wqmiatb): Likewise. + (iwmmxt_wqmiatt): Likewise. + (iwmmxt_wqmiabbn): Likewise. + (iwmmxt_wqmiabtn): Likewise. + (iwmmxt_wqmiatbn): Likewise. + (iwmmxt_wqmiattn): Likewise. + (iwmmxt_wmiabb): Likewise. + (iwmmxt_wmiabt): Likewise. + (iwmmxt_wmiatb): Likewise. + (iwmmxt_wmiatt): Likewise. + (iwmmxt_wmiabbn): Likewise. + (iwmmxt_wmiabtn): Likewise. + (iwmmxt_wmiatbn): Likewise. + (iwmmxt_wmiattn): Likewise. + (iwmmxt_wmiawbb): Likewise. + (iwmmxt_wmiawbt): Likewise. + (iwmmxt_wmiawtb): Likewise. + (iwmmxt_wmiawtt): Likewise. + (iwmmxt_wmiawbbn): Likewise. + (iwmmxt_wmiawbtn): Likewise. + (iwmmxt_wmiawtbn): Likewise. + (iwmmxt_wmiawttn): Likewise. + (iwmmxt_wmerge): Likewise. + (iwmmxt_tandc<mode>3): Likewise. + (iwmmxt_torc<mode>3): Likewise. + (iwmmxt_torvsc<mode>3): Likewise. + (iwmmxt_textrc<mode>3): Likewise. + * marvell-f-iwmmxt.md (wmmxt_shift): Update for attribute changes. + (wmmxt_pack): Likewise. + (wmmxt_mult_c1): Likewise. + (wmmxt_mult_c2): Likewise. + (wmmxt_alu_c1): Likewise. + (wmmxt_alu_c2): Likewise. + (wmmxt_alu_c3): Likewise. + (wmmxt_transfer_c1): Likewise. + (wmmxt_transfer_c2): Likewise. + (wmmxt_transfer_c3): Likewise. + (marvell_f_iwmmxt_wstr): Likewise. + (marvell_f_iwmmxt_wldr): Likewise. + +2013-06-29 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c: Remove junk from the beginning of the file. + +2013-06-28 Vladimir Makarov <vmakarov@redhat.com> + + Revert: + 2013-06-28 Vladimir Makarov <vmakarov@redhat.com> + * lra-constraints.c (need_for_split_p): Check call used hard regs + living through calls. + + * lra-constraints.c (inherit_in_ebb): Reset live_hard_regs for + call used regs for call insn. + +2013-06-28 Jakub Jelinek <jakub@redhat.com> + + PR target/57736 + * config/i386/i386.c (ix86_expand_builtin): If target == NULL and + mode is VOIDmode, don't create a VOIDmode pseudo to copy result into. + +2013-06-28 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * builtins.def: Fixed the function type of CILKPLUS_BUILTIN. + +2013-06-28 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (need_for_split_p): Check call used hard regs + living through calls. + +2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57744 + * config/rs6000/rs6000.h (MODES_TIEABLE_P): Do not allow PTImode + to tie with any other modes. Eliminate Altivec vector mode tests, + since these are a subset of ALTIVEC or VSX vector modes. Simplify + code, to return 0 if testing MODE2 for a condition, if we've + already tested MODE1 for the same condition. + +2013-06-28 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_cannot_force_const_mem): Adjust + layout. + +2013-06-28 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_symbol_type): + Update comment w.r.t SYMBOL_TINY_ABSOLUTE. + +2013-06-28 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_classify_symbol_expression): + Define. + (aarch64_symbolic_constant_p): Remove. + * config/aarch64/aarch64.c (aarch64_classify_symbol_expression): Remove + static. Fix line length and white space. + (aarch64_symbolic_constant_p): Remove. + * config/aarch64/predicates.md (aarch64_valid_symref): + Use aarch64_classify_symbol_expression. + +2013-06-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/constraints.md (Ts): New constraint. + * config/arm/arm.md (arm_movqi_insn): Add alternatives for + 16-bit encodings. + (compare_scc): Use "Ts" constraint for operand 0. + (ior_scc_scc): Likewise. + (and_scc_scc): Likewise. + (and_scc_scc_nodom): Likewise. + (ior_scc_scc_cmp): Likewise for operand 7. + (and_scc_scc_cmp): Likewise. + * config/arm/thumb2.md (thumb2_movsi_insn): + Add alternatives for 16-bit encodings. + (thumb2_movhi_insn): Likewise. + (thumb2_movsicc_insn): Likewise. + (thumb2_and_scc): Take 'and' outside cond_exec. Use "Ts" constraint. + (thumb2_negscc): Use "Ts" constraint. + Move mvn instruction outside cond_exec block. + * config/arm/vfp.md (thumb2_movsi_vfp): Add alternatives + for 16-bit encodings. + +2013-06-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (arm_mulsi3_v6): Add alternative for 16-bit + encoding. + (mulsi3addsi_v6): Disable predicable variant for arm_restrict_it. + (mulsi3subsi): Likewise. + (mulsidi3adddi): Likewise. + (mulsidi3_v6): Likewise. + (umulsidi3_v6): Likewise. + (umulsidi3adddi_v6): Likewise. + (smulsi3_highpart_v6): Likewise. + (umulsi3_highpart_v6): Likewise. + (mulhisi3tb): Likewise. + (mulhisi3bt): Likewise. + (mulhisi3tt): Likewise. + (maddhisi4): Likewise. + (maddhisi4tb): Likewise. + (maddhisi4tt): Likewise. + (maddhidi4): Likewise. + (maddhidi4tb): Likewise. + (maddhidi4tt): Likewise. + (zeroextractsi_compare0_scratch): Likewise. + (insv_zero): Likewise. + (insv_t2): Likewise. + (anddi_notzesidi_di): Likewise. + (anddi_notsesidi_di): Likewise. + (andsi_notsi_si): Likewise. + (iordi_zesidi_di): Likewise. + (xordi_zesidi_di): Likewise. + (andsi_iorsi3_notsi): Likewise. + (smax_0): Likewise. + (smax_m1): Likewise. + (smin_0): Likewise. + (not_shiftsi): Likewise. + (unaligned_loadsi): Likewise. + (unaligned_loadhis): Likewise. + (unaligned_loadhiu): Likewise. + (unaligned_storesi): Likewise. + (unaligned_storehi): Likewise. + (extv_reg): Likewise. + (extzv_t2): Likewise. + (divsi3): Likewise. + (udivsi3): Likewise. + (arm_zero_extendhisi2addsi): Likewise. + (arm_zero_extendqisi2addsi): Likewise. + (compareqi_eq0): Likewise. + (arm_extendhisi2_v6): Likewise. + (arm_extendqisi2addsi): Likewise. + (arm_movt): Likewise. + (thumb2_ldrd): Likewise. + (thumb2_ldrd_base): Likewise. + (thumb2_ldrd_base_neg): Likewise. + (thumb2_strd): Likewise. + (thumb2_strd_base): Likewise. + (thumb2_strd_base_neg): Likewise. + (arm_negsi2): Add alternative for 16-bit encoding. + (arm_one_cmplsi2): Likewise. + +2013-06-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/predicates.md (arm_cond_move_operator): New predicate. + * config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate. + (movdfcc): Likewise. + * config/arm/vfp.md (*thumb2_movsf_vfp): + Disable predication for arm_restrict_it. + (*thumb2_movsfcc_vfp): Disable for arm_restrict_it. + (*thumb2_movdfcc_vfp): Likewise. + (*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp, + *adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp, + *mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp, + *mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp, + *muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp, + *mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma<SDF:mode>4, + *fmsub<SDF:mode>4, *fnmsub<SDF:mode>4, *fnmadd<SDF:mode>4, + *extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2, + *truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2, + *floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2, + *sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp, + *cmpdf_trap_vfp, <vrint_pattern><SDF:mode>2): + Disable predication for arm_restrict_it. + +2013-06-28 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/bmiintrin.h (_bextr_u32): New. + (_bextr_u64): Ditto. + +2013-06-27 Richard Sandiford <rdsandiford@googlemail.com> + + * config.gcc (mips*-mti-elf*, mips*-sde-elf*, mips64r5900-*-elf*) + (mips64r5900el-*-elf*): Include mips/n32-elf.h. + * config/mips/sde.h (LOCAL_LABEL_PREFIX, NO_DOLLAR_IN_LABEL) + (LONG_DOUBLE_TYPE_SIZE, LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Move to... + * config/mips/n32-elf.h: ...this new file. + +2013-06-27 Marc Glisse <marc.glisse@inria.fr> + + PR target/57224 + * config/i386/i386.c (enum ix86_builtins, bdesc_args): Remove + IX86_BUILTIN_CMPNGTSS and IX86_BUILTIN_CMPNGESS. + +2013-06-27 Catherine Moore <clm@codesourcery.com> + + * config/mips/mips-tables.opt: Regenerate. + * config/mips/mips-cpus.def: Add m14ke and m14kec. + * config/mips/mips.h (BASE_DRIVER_SELF_SPECS): m14ke* implies -mdspr2. + * doc/invoke.texi: Add -m14kc. + +2013-06-27 Jakub Jelinek <jakub@redhat.com> + + PR target/57623 + * config/i386/i386.md (bmi_bextr_<mode>): Swap predicates and + constraints of operand 1 and 2. + + PR target/57623 + * config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments + to match RTL canonicalization. Swap predicates and + constraints of operand 1 and 2. + +2013-06-27 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (inherit_in_ebb): Process static hard regs too. + Process OP_INOUT regs for splitting too. + +2013-06-27 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-stmts.c (vectorizable_store): Move ptr_incr var + decl before the loop, initialize to NULL. + (vectorizable_load): Initialize ptr_incr to NULL. + +2013-06-27 Martin Jambor <mjambor@suse.cz> + + PR lto/57208 + * ipa-ref.h (ipa_maybe_record_reference): Declare. + * ipa-ref.c (ipa_maybe_record_reference): New function. + * cgraphclones.c (cgraph_create_virtual_clone): Use it. + * ipa-cp.c (create_specialized_node): Record potential references from + aggvals. + * Makefile.in (ipa-ref.o): Add IPA_REF_H to dependencies. + +2013-06-27 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra + parameter 'mode' of type 'enum machine_mode mode'; change to pass + 'mode' to force_reg. + (aarch64_add_offset): Update calls to aarch64_force_temporary. + (aarch64_expand_mov_immediate): Likewise. + +2013-06-27 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass + 'mode' to aarch64_plus_immediate and gen_rtx_PLUS. + +2013-06-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to + UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. + (struct machine_function): Add tbegin_p. + (s390_canonicalize_comparison): Fold CC mode compares to + conditional jump if possible. + (s390_emit_jump): Return the emitted jump. + (s390_branch_condition_mask, s390_branch_condition_mnemonic): + Handle CCRAWmode compares. + (s390_option_override): Default to -mhtm if available. + (s390_reg_clobbered_rtx): Handle floating point regs as well. + (s390_regs_ever_clobbered): Use s390_regs_ever_clobbered also for + FPRs instead of df_regs_ever_live_p. + (s390_optimize_nonescaping_tx): New function. + (s390_init_frame_layout): Extend clobbered_regs array to cover + FPRs as well. + (s390_emit_prologue): Call s390_optimize_nonescaping_tx. + (s390_expand_tbegin): New function. + (enum s390_builtin): New enum definition. + (code_for_builtin): New array definition. + (s390_init_builtins): New function. + (s390_expand_builtin): New function. + (TARGET_INIT_BUILTINS): Define. + (TARGET_EXPAND_BUILTIN): Define. + * common/config/s390/s390-common.c (processor_flags_table): Add PF_TX. + * config/s390/predicates.md (s390_comparison): Handle CCRAWmode. + (s390_alc_comparison): Likewise. + * config/s390/s390-modes.def: Add CCRAWmode. + * config/s390/s390.h (processor_flags): Add PF_TX. + (TARGET_CPU_HTM): Define macro. + (TARGET_HTM): Define macro. + (TARGET_CPU_CPP_BUILTINS): Define __HTM__ for htm. + * config/s390/s390.md: Rename UNSPEC_CCU_TO_INT to + UNSPEC_STRCMPCC_TO_INT and UNSPEC_CCZ_TO_INT to UNSPEC_CC_TO_INT. + (UNSPECV_TBEGIN, UNSPECV_TBEGINC, UNSPECV_TEND, UNSPECV_TABORT) + (UNSPECV_ETND, UNSPECV_NTSTG, UNSPECV_PPA): New unspecv enum values. + (TBEGIN_MASK, TBEGINC_MASK): New constants. + ("*cc_to_int"): Move up. + ("*mov<mode>cc", "*cjump_64", "*cjump_31"): Accept integer + constants other than 0. + ("*ccraw_to_int"): New insn and splitter definition. + ("tbegin", "tbegin_nofloat", "tbegin_retry") + ("tbegin_retry_nofloat", "tbeginc", "tend", "tabort") + ("tx_assist"): New expander. + ("tbegin_1", "tbegin_nofloat_1", "*tbeginc_1", "*tend_1") + ("*tabort_1", "etnd", "ntstg", "*ppa"): New insn definition. + * config/s390/s390.opt: Add -mhtm option. + * config/s390/s390-protos.h (s390_emit_jump): Add return type. + * config/s390/htmxlintrin.h: New file. + * config/s390/htmintrin.h: New file. + * config/s390/s390intrin.h: New file. + * doc/extend.texi: Document htm builtins. + * config.gcc: Add the new header files to extra_headers. + +2013-06-26 Thomas Schwinge <thomas@codesourcery.com> + + * config/i386/gnu.h [TARGET_LIBC_PROVIDES_SSP] + (TARGET_CAN_SPLIT_STACK, TARGET_THREAD_SPLIT_STACK_OFFSET): Undefine. + +2013-06-26 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/power8.md: New. + * config/rs6000/rs6000-cpus.def (RS6000_CPU table): Adjust processor + setting for power8 entry. + * config/rs6000/t-rs6000 (MD_INCLUDES): Add power8.md. + * config/rs6000/rs6000.c (is_microcoded_insn, is_cracked_insn): Adjust + test for Power4/Power5 only. + (insn_must_be_first_in_group, insn_must_be_last_in_group): Add Power8 + support. + (force_new_group): Adjust comment. + * config/rs6000/rs6000.md: Include power8.md. + +2013-06-26 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro. + * config/arm/arm-protos.h (arm_max_conditional_execute): New + declaration. + (tune_params): Update comment. + * config/arm/arm.c (arm_cortex_a15_tune): Set max_cond_insns to 2. + (arm_max_conditional_execute): New function. + (thumb2_final_prescan_insn): Use max_insn_skipped and + MAX_INSN_PER_IT_BLOCK to compute maximum instructions in a block. + +2013-06-25 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57705 + * tree-vect-loop.c (vect_is_simple_iv_evolution): Allow + SSA_NAME step, provided that it is not defined inside the loop. + (vect_analyze_scalar_cycles_1): Disallow SSA_NAME step in nested loop. + (get_initial_def_for_induction): Handle SSA_NAME IV step. + +2013-06-25 Martin Jambor <mjambor@suse.cz> + + PR middle-end/57670 + * cgraph.h (cgraph_indirect_call_info): New flag member_ptr. + * ipa-prop.c (ipa_print_node_jump_functions): Mark member pointer + calls in the dump. + (ipa_note_param_call): Initialize member_ptr flag. + (ipa_analyze_indirect_call_uses): Set member_ptr flag. + (ipa_make_edge_direct_to_target): Bail out if member_ptr is set. + (ipa_write_indirect_edge_info): Stream member_ptr flag. + (ipa_read_indirect_edge_info): Likewise. + +2013-06-25 Richard Biener <rguenther@suse.de> + + PR middle-end/56977 + * passes.c (init_optimization_passes): Move pass_fold_builtins + and pass_dce earlier with -Og. + +2013-06-25 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <ARRAY_REF>: Fix formatting glitches. + <BIT_FIELD_REF>: Remove trailing TAB. + * varasm.c (output_constructor_bitfield): Fix formatting glitch and + remove blank line. + +2013-06-24 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/57358 + * ipa-prop.c (ipa_func_spec_opts_forbid_analysis_p): New function. + (ipa_compute_jump_functions_for_edge): Bail out if it returns true. + (ipa_analyze_params_uses): Generate pessimistic info when true. + +2013-06-24 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/57539 + * cgraphclones.c (cgraph_clone_node): Add parameter new_inlined_to, set + global.inlined_to of the new node to it. All callers changed. + * ipa-inline-transform.c (clone_inlined_nodes): New variable + inlining_into, pass it to cgraph_clone_node. + * ipa-prop.c (ipa_propagate_indirect_call_infos): Do not call + ipa_free_edge_args_substructures. + (ipa_edge_duplication_hook): Only add edges from inlined nodes to + rdesc linked list. Do not assert rdesc edges have inlined caller. + Assert we have found an rdesc in the rdesc list. + +2013-06-24 Richard Biener <rguenther@suse.de> + + * pointer-set.h (struct pointer_set_t): Move here from pointer-set.c. + (pointer_set_lookup): Declare. + (class pointer_map): New template class implementing a + generic pointer to T map. + (pointer_map<T>::pointer_map, pointer_map<T>::~pointer_map, + pointer_map<T>::contains, pointer_map<T>::insert, + pointer_map<T>::traverse): New functions. + * pointer-set.c (struct pointer_set_t): Moved to pointer-set.h. + (pointer_set_lookup): New function. + (pointer_set_contains): Use pointer_set_lookup. + (pointer_set_insert): Likewise. + (insert_aux): Remove. + (struct pointer_map_t): Embed a pointer_set_t. + (pointer_map_create): Adjust. + (pointer_map_destroy): Likewise. + (pointer_map_contains): Likewise. + (pointer_map_insert): Likewise. + (pointer_map_traverse): Likewise. + * tree-streamer.h (struct streamer_tree_cache_d): Use a + pointer_map<unsigned> instead of a pointer_map_t. + * tree-streamer.c (streamer_tree_cache_insert_1): Adjust. + (streamer_tree_cache_lookup): Likewise. + (streamer_tree_cache_create): Likewise. + (streamer_tree_cache_delete): Likewise. + * lto-streamer.h (struct lto_tree_ref_encoder): Use a + pointer_map<unsigned> instead of a pointer_map_t. + (lto_init_tree_ref_encoder): Adjust. + (lto_destroy_tree_ref_encoder): Likewise. + * lto-section-out.c (lto_output_decl_index): Likewise. + (lto_record_function_out_decl_state): Likewise. + * dominance.c (iterate_fix_dominators): Use pointer_map<int>. + +2013-06-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57488 + * tree-ssa-pre.c (insert): Clear NEW sets before each iteration. + +2013-06-24 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (vspltis_constant): Correct for little-endian. + (gen_easy_altivec_constant): Likewise. + * config/rs6000/predicates.md (easy_vector_constant_add_self, + easy_vector_constant_msb): Likewise. + +2013-06-23 Jakub Jelinek <jakub@redhat.com> + + PR target/57688 + * common/config/i386/i386-common.c (ix86_handle_option): For OPT_mlzcnt + add missing return true. + +2013-06-23 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/52483 + * config/sh/predicates.md (general_extend_operand): Invoke + general_movsrc_operand for memory operands. + (general_movsrc_operand): Allow reg+reg addressing, do not use + general_operand for memory operands. + +2013-06-23 Sriraman Tallam <tmsriram@google.com> + + * config/i386/i386.c (ix86_pragma_target_parse): Restore target + when current target options does not apply. + * config/i386/i386-protos.h (ix86_reset_previous_fndecl): New function. + * config/i386/i386.c (ix86_reset_previous_fndecl): Ditto. + * config/i386/bmiintrin.h: Pass appropriate target + attributes to header. + * config/i386/mmintrin.h: Ditto. + * config/i386/nmmintrin.h: Ditto. + * config/i386/avx2intrin.h: Ditto. + * config/i386/fxsrintrin.h: Ditto. + * config/i386/tbmintrin.h: Ditto. + * config/i386/xsaveintrin.h: Ditto. + * config/i386/f16cintrin.h: Ditto. + * config/i386/xtestintrin.h: Ditto. + * config/i386/xsaveoptintrin.h: Ditto. + * config/i386/bmi2intrin.h: Ditto. + * config/i386/lzcntintrin.h: Ditto. + * config/i386/smmintrin.h: Ditto. + * config/i386/wmmintrin.h: Ditto. + * config/i386/x86intrin.h: Remove all header include guards. + * config/i386/prfchwintrin.h: Ditto. + * config/i386/pmmintrin.h: Ditto. + * config/i386/tmmintrin.h: Ditto. + * config/i386/xmmintrin.h: Ditto. + * config/i386/popcntintrin.h: Ditto. + * config/i386/rdseedintrin.h: Ditto. + * config/i386/ammintrin.h: Ditto. + * config/i386/emmintrin.h: Ditto. + * config/i386/immintrin.h: Remove all header include guards. + * config/i386/fma4intrin.h: Ditto. + * config/i386/lwpintrin.h: Ditto. + * config/i386/xopintrin.h: Ditto. + * config/i386/ia32intrin.h: Ditto. + * config/i386/avxintrin.h: Ditto. + * config/i386/rtmintrin.h: Ditto. + * config/i386/fmaintrin.h: Ditto. + * config/i386/mm3dnow.h: Ditto. + +2013-06-22 Sriraman Tallam <tmsriram@google.com> + + * common/config/i386/i386-common.c: Handle LZCNT. + +2013-06-22 Andi Kleen <ak@linux.intel.com> + + * doc/extend.texi: Use __atomic_store_n instead of + __atomic_store in HLE example. + +2013-06-22 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/sh.c: Remove <cstdlib> workaround. + +2013-06-21 Andi Kleen <ak@linux.intel.com> + + * doc/extend.texi: Dont use __atomic_clear in HLE example. Fix typo. + +2013-06-21 Andi Kleen <ak@linux.intel.com> + + * doc/extend.texi: Document that __atomic_clear and + __atomic_test_and_set should only be used with bool. + +2013-06-20 Jan Hubicka <jh@suse.cz> + + * gimple-fold.c (gimple_extract_devirt_binfo_from_cst): Use + types_same_for_odr. + * tree.c (decls_same_for_odr): New function. + (same_for_edr): New function. + (types_same_for_odr): New function. + (get_binfo_at_offset): Use it. + * tree.h (types_same_for_odr): Declare. + +2013-06-20 Oleg Endo <olegendo@gcc.gnu.org> + Jason Merrill <jason@redhat.com> + + * system.h: Include <cstdlib> as well as <stdlib.h>. + +2013-06-20 Uros Bizjak <ubizjak@gmail.com> + + PR target/57655 + * config/i386/i386.c (construct_container): Report error if + long double is used with disabled x87 float returns. + +2013-06-20 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c (input_symtab): Do not set cgraph state. + +2013-06-20 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57425 + PR rtl-optimization/57569 + * alias.c (write_dependence_p): Remove parameters mem_mode and + canon_mem_addr. Add parameters x_mode, x_addr and x_canonicalized. + Changed all callers. + (canon_anti_dependence): Get comments and semantics in sync. + Add parameter mem_canonicalized. Changed all callers. + * rtl.h (canon_anti_dependence): Update prototype. + +2013-06-20 Richard Biener <rguenther@suse.de> + + * data-streamer-in.c (streamer_read_uhwi): Optimize single + byte case, inline streamer_read_uchar and defer section + overrun check. + +2013-06-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57584 + * tree-ssa-loop-niter.c (expand_simple_operations): Avoid including + SSA names into the expanded expression that take part in + abnormal coalescing. + +2013-06-19 Sharad Singhai <singhai@google.com> + + * gcov.c (print_usage): Handle new option. + (process_args): Ditto. + (get_gcov_intermediate_filename): New function. + (output_intermediate_file): New function. + (output_gcov_file): New function + (generate_results): Handle new option. + (release_function): Relase demangled name. + (read_graph_file): Handle demangled name. + (output_lines): Ditto. + * doc/gcov.texi: Document gcov intermediate format. + +2013-06-19 Vladimir Makarov <vmakarov@redhat.com> + + PR bootstrap/57604 + * lra.c (emit_add3_insn, emit_add2_insn): New functions. + (lra_emit_add): Use the functions. Add comment about Y as an + address segment. + +2013-06-19 David Edelsohn <dje.gcc@gmail.com> + + PR driver/57652 + * collect2.c (collect_atexit): New. + (collect_exit): Delete. + (main): Register collect_atexit with atexit. + (collect_wait): Change collect_exit to exit. + (do_wait): Same. + * collect2.h (collect_exit): Delete. + * tlink.c (do_tlink): Rename exit to ret. Change collect_exit to exit. + +2013-06-19 Wei Mi <wmi@google.com> + + PR rtl-optimization/57518 + * ira.c (set_paradoxical_subreg): Set pdx_subregs[regno] + if regno is used in paradoxical subreg. + (update_equiv_regs): Check pdx_subregs[regno] before + set a reg to be equivalent with a mem. + +2013-06-19 Matthias Klose <doko@ubuntu.com> + + PR driver/57651 + * file-find.h (find_a_file): Add a mode parameter. + * file-find.c (find_a_file): Likewise. + * gcc-ar.c (main): Call find_a_file with R_OK for the plugin, + with X_OK for the executables. + * collect2.c (main): Call find_a_file with X_OK. + +2013-06-19 Steve Ellcey <sellcey@mips.com> + + PR target/56942 + * config/mips/mips.md (casesi_internal_mips16_<mode>): + Use NEXT_INSN instead of next_real_insn. + +2013-06-19 Jan Hubicka <jh@suse.cz> + + * cgraph.h (const_value_known_p): Replace by ... + (ctor_for_folding): .. this one. + * cgraphunit.c (process_function_and_variable_attributes): Use it. + * lto-cgraph.c (compute_ltrans_boundary): Use ctor_for_folding. + * expr.c (expand_expr_real_1): Likewise. + (string_constant): Likewise. + * tree-ssa-loop-ivcanon.c (constant_after_peeling): Likewise. + * ipa.c (process_references): Likewise. + (symtab_remove_unreachable_nodes): Likewise. + * ipa-inline-analysis.c (param_change_prob): Likewise. + * gimple-fold.c (canonicalize_constructor_val): Likewise. + (get_base_constructor): Likwise. + * varpool.c (varpool_remove_node): Likewise. + (varpool_remove_initializer): LIkewise. + (dump_varpool_node): LIkwise. + (const_value_known_p): Rewrite to ... + (ctor_for_folding): ... this one. + +2013-06-19 Jakub Jelinek <jakub@redhat.com> + + PR driver/57651 + * gcc-ar.c (main): If not CROSS_DIRECTORY_STRUCTURE, look for + PERSONALITY in $PATH derived prefixes. + +2013-06-19 Jeff Law <law@redhat.com> + + * tree-ssa-forwprop.c (simplify_bitwise_binary_boolean): Fix typo + in comment. + + * tree-ssa-forwprop.c (simplify_bitwise_binary_boolean): New function. + (simplify_bitwise_binary): Use it to simpify certain binary ops on + booleans. + +2013-06-19 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/vfp.md: Move VFP instruction classification documentation + to ... + * config/arm/arm.md: ... here. Update instruction classification + documentation. + +2013-06-19 Richard Earnshaw <rearnsha@arm.com> + + arm.md (split for eq(reg, 0)): Add variants for ARMv5 and Thumb2. + (peepholes for eq(reg, not-0)): Ensure condition register is dead after + pattern. Use more efficient sequences on ARMv5 and Thumb2. + +2013-06-19 Steven Bosscher <steven@gcc.gnu.org> + + PR target/57609 + * config/s390/s390.c (s390_chunkify_start): Replace next_real_insn + with NEXT_INSN. Use tablejump_p to check for jump table data + insns. + +2013-06-19 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/56544 + * doc/cpp.texi [Standard Predefined Macros, __cplusplus]: Document + that now in C++ the value is correct per the C++ standards. + +2013-06-19 Richard Biener <rguenther@suse.de> + + * expr.c (expand_expr_real_1): Use SCOPE_FILE_SCOPE_P to check + for global context. + +2013-06-19 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + Revert: + 2013-06-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/57609 + * config/s390/s390.c (s390_chunkify_start): Replace next_real_insn + with next_active_insn. + +2013-06-18 Sriraman Tallam <tmsriram@google.com> + + * ipa-inline.c (inline_always_inline_functions): Pretend always_inline + functions are inlined during failures to flag an error. + * tree-inline.c (expand_call_inline): Allow the error to be flagged + in early inline pass. + +2013-06-18 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (initial_ix86_tune_features): Fix a typo + in comments. + +2013-06-18 Julian Brown <julian@codesourcery.com> + + * config/arm/arm.c (neon_vector_mem_operand): Add strict argument. + Permit virtual register pre-reload if !strict. + (coproc_secondary_reload_class): Adjust for neon_vector_mem_operand + change. + * config/arm/arm-protos.h (neon_vector_mem_operand): Adjust + prototype. + * config/arm/neon.md (movmisalign<mode>): Use + neon_perm_struct_or_reg_operand instead of + neon_struct_or_register_operand. + (*movmisalign<mode>_neon_load, *movmisalign<mode>_neon_store): Use + neon_permissive_struct_operand instead of neon_struct_operand. + * config/arm/constraints.md (Un, Um, Us): Adjust calls to + neon_vector_mem_operand. + * config/arm/predicates.md (neon_struct_operand): Adjust call to + neon_vector_mem_operand. + (neon_permissive_struct_operand): New. + (neon_struct_or_register_operand): Rename to... + (neon_perm_struct_or_reg_operand): This. Adjust call to + neon_vector_mem_operand. + +2013-06-18 Richard Biener <rguenther@suse.de> + + * Makefile.in (LTO_STREAMER_H): Add pointer-set.h dependency. + * lto-streamer.h: Include pointer-set.h. + (struct lto_decl_slot): Remove. + (struct lto_tree_ref_encoder): Make tree_hash_table a pointer-map. + Remove next_index entry. + (lto_hash_decl_slot_node, lto_eq_decl_slot_node, + lto_hash_type_slot_node, lto_eq_type_slot_node): Remove. + (lto_init_tree_ref_encoder): Adjust. + (lto_destroy_tree_ref_encoder): Likewise. + * lto-section-out.c (lto_hash_decl_slot_node, lto_eq_decl_slot_node, + lto_hash_type_slot_node, lto_eq_type_slot_node): Remove. + (lto_output_decl_index): Adjust. + (lto_new_out_decl_state): Likewise. + (lto_record_function_out_decl_state): Likewise. + * lto-streamer-out.c (copy_function): Likewise. + +2013-06-18 Richard Biener <rguenther@suse.de> + + * Makefile.in (cgraphunit.o): Add $(CFGLOOP_H) dependency. + * cgraphunit.c: Include cfgloop.h. + (init_lowered_empty_function): Initialize the loop tree. + (assemble_thunk): Insert new BBs into loops. + +2013-06-18 Richard Biener <rguenther@suse.de> + + * tree-streamer.h (streamer_tree_cache_create): Adjust prototype. + * tree-streamer.c (streamer_tree_cache_create): Make maintaining + the map from cache entry to cache index optional. + (streamer_tree_cache_replace_tree): Adjust accordingly. + (streamer_tree_cache_append): Likewise. + (streamer_tree_cache_delete): Likewise. + * lto-streamer-in.c (lto_data_in_create): Do not maintain the + streamer cache map from cache entry to cache index. + * lto-streamer-out.c (create_output_block): Adjust. + +2013-06-18 Sofiane Naci <sofiane.naci@arm.com> + + * config/arm/arm.md (attribute "insn"): Move multiplication and + division attributes to... + (attribute "type"): ... here. Remove mult. + (attribute "mul32"): New attribute. + (attribute "mul64"): Add umaal. + (*arm_mulsi3): Update attributes. + (*arm_mulsi3_v6): Likewise. + (*thumb_mulsi3): Likewise. + (*thumb_mulsi3_v6): Likewise. + (*mulsi3_compare0): Likewise. + (*mulsi3_compare0_v6): Likewise. + (*mulsi_compare0_scratch): Likewise. + (*mulsi_compare0_scratch_v6): Likewise. + (*mulsi3addsi): Likewise. + (*mulsi3addsi_v6): Likewise. + (*mulsi3addsi_compare0): Likewise. + (*mulsi3addsi_compare0_v6): Likewise. + (*mulsi3addsi_compare0_scratch): Likewise. + (*mulsi3addsi_compare0_scratch_v6): Likewise. + (*mulsi3subsi): Likewise. + (*mulsidi3adddi): Likewise. + (*mulsi3addsi_v6): Likewise. + (*mulsidi3adddi_v6): Likewise. + (*mulsidi3_nov6): Likewise. + (*mulsidi3_v6): Likewise. + (*umulsidi3_nov6): Likewise. + (*umulsidi3_v6): Likewise. + (*umulsidi3adddi): Likewise. + (*umulsidi3adddi_v6): Likewise. + (*smulsi3_highpart_nov6): Likewise. + (*smulsi3_highpart_v6): Likewise. + (*umulsi3_highpart_nov6): Likewise. + (*umulsi3_highpart_v6): Likewise. + (mulhisi3): Likewise. + (*mulhisi3tb): Likewise. + (*mulhisi3bt): Likewise. + (*mulhisi3tt): Likewise. + (maddhisi4): Likewise. + (*maddhisi4tb): Likewise. + (*maddhisi4tt): Likewise. + (maddhidi4): Likewise. + (*maddhidi4tb): Likewise. + (*maddhidi4tt): Likewise. + (divsi3): Likewise. + (udivsi3): Likewise. + * config/arm/thumb2.md (thumb2_mulsi_short): Update attributes. + (thumb2_mulsi_short_compare0): Likewise. + (thumb2_mulsi_short_compare0_scratch): Likewise. + * config/arm/arm1020e.md (1020mult1): Update attribute change. + (1020mult2): Likewise. + (1020mult3): Likewise. + (1020mult4): Likewise. + (1020mult5): Likewise. + (1020mult6): Likewise. + * config/arm/cortex-a15.md (cortex_a15_mult32): Update attribute + change. + (cortex_a15_mult64): Likewise. + (cortex_a15_sdiv): Likewise. + (cortex_a15_udiv): Likewise. + * config/arm/arm1026ejs.md (mult1): Update attribute change. + (mult2): Likewise. + (mult3): Likewise. + (mult4): Likewise. + (mult5): Likewise. + (mult6): Likewise. + * config/arm/marvell-pj4.md (pj4_ir_mul): Update attribute change. + (pj4_ir_div): Likewise. + * config/arm/arm1136jfs.md (11_mult1): Update attribute change. + (11_mult2): Likewise. + (11_mult3): Likewise. + (11_mult4): Likewise. + (11_mult5): Likewise. + (11_mult6): Likewise. + (11_mult7): Likewise. + * config/arm/cortex-a8.md (cortex_a8_mul): Update attribute change. + (cortex_a8_mla): Likewise. + (cortex_a8_mull): Likewise. + (cortex_a8_smulwy): Likewise. + (cortex_a8_smlald): Likewise. + * config/arm/cortex-m4.md (cortex_m4_alu): Update attribute change. + * config/arm/cortex-r4.md (cortex_r4_mul_4): Update attribute change. + (cortex_r4_mul_3): Likewise. + (cortex_r4_mla_4): Likewise. + (cortex_r4_mla_3): Likewise. + (cortex_r4_smlald): Likewise. + (cortex_r4_mull): Likewise. + (cortex_r4_sdiv): Likewise. + (cortex_r4_udiv): Likewise. + * config/arm/cortex-a7.md (cortex_a7_mul): Update attribute change. + (cortex_a7_idiv): Likewise. + * config/arm/arm926ejs.md (9_mult1): Update attribute change. + (9_mult2): Likewise. + (9_mult3): Likewise. + (9_mult4): Likewise. + (9_mult5): Likewise. + (9_mult6): Likewise. + * config/arm/cortex-a53.md (cortex_a53_mul): Update attribute change. + (cortex_a53_sdiv): Likewise. + (cortex_a53_udiv): Likewise. + * config/arm/fa726te.md (726te_mult_op): Update attribute change. + * config/arm/fmp626.md (mp626_mult1): Update attribute change. + (mp626_mult2): Likewise. + (mp626_mult3): Likewise. + (mp626_mult4): Likewise. + * config/arm/fa526.md (526_mult1): Update attribute change. + (526_mult2): Likewise. + * config/arm/arm-generic.md (mult): Update attribute change. + (mult_ldsched_strongarm): Likewise. + (mult_ldsched): Likewise. + (multi_cycle): Likewise. + * config/arm/cortex-a5.md (cortex_a5_mul): Update attribute change. + * config/arm/fa606te.md (606te_mult1): Update attribute change. + (606te_mult2): Likewise. + (606te_mult3): Likewise. + (606te_mult4): Likewise. + * config/arm/cortex-a9.md (cortex_a9_mult16): Update attribute change. + (cortex_a9_mac16): Likewise. + (cortex_a9_multiply): Likewise. + (cortex_a9_mac): Likewise. + (cortex_a9_multiply_long): Likewise. + * config/arm/fa626te.md (626te_mult1): Update attribute change. + (626te_mult2): Likewise. + (626te_mult3): Likewise. + (626te_mult4): Likewise. + +2013-06-18 Richard Biener <rguenther@suse.de> + + PR lto/57334 + * lto-symtab.c (lto_symtab_merge_decls): Process nodes properly. + +2013-06-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/57609 + * config/s390/s390.c (s390_chunkify_start): Replace next_real_insn + with next_active_insn. + +2013-06-18 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h (enum data_align): New. + (LOCAL_ALIGNMENT, DATA_ALIGNMENT): Use rs6000_data_alignment. + (DATA_ABI_ALIGNMENT): Define. + (CONSTANT_ALIGNMENT): Correct comment. + * config/rs6000/rs6000-protos.h (rs6000_data_alignment): Declare. + * config/rs6000/rs6000.c (rs6000_data_alignment): New function. + +2013-06-17 David Malcolm <dmalcolm@redhat.com> + + * ggc-page.c (ggc_pch_write_object) <d>: Remove erroneous + ATTRIBUTE_UNUSED marking. + +2013-06-17 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_dup_lane<mode>): Add r<-w + alternative and update. + (aarch64_dup_lanedi): Delete. + * config/aarch64/arm_neon.h (vdup<bhsd>_lane_*): Update. + * config/aarch64/aarch64-simd-builtins.def: Update. + +2013-06-17 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (enum LTO_tags): Add LTO_tree_scc. + (lto_input_scc): Declare. + (lto_input_tree_1): Likewise. + (struct lto_stats_d): Add num_tree_bodies_output and + num_pickle_refs_output. + * lto-streamer-in.c (lto_read_body): Use streamer_tree_cache_get_tree. + (lto_read_tree_1): Split out from ... + (lto_read_tree): ... this. + (lto_input_scc): New function. + (lto_input_tree_1): Split out from ... + (lto_input_tree): ... this. Handle LTO_tree_scc. + (lto_data_in_create): Create the streamer cache without hashes. + * lto-streamer-out.c (create_output_block): Create the streamer + cache with hashes when not doing WPA. + (lto_write_tree_1): Split out from ... + (lto_write_tree): ... this. + (get_symbol_initial_value): New function. + (lto_output_tree_1): Split out from ... + (lto_output_tree): ... this. Write trees as series of SCCs + using a DFS walk via DFS_write_tree. + (struct sccs, struct scc_entry): New types. + (next_dfs_num, sccstack, sccstate, sccstate_obstack): New globals. + (DFS_write_tree_body): New function. + (DFS_write_tree): Likewise. + (hash_tree): Likewise. + (scc_entry_compare): Likewise. + (hash_scc): Likewise. + (tree_is_indexable): DEBUG_EXPR_DECLs are local entities. + * tree-streamer-in.c (lto_input_ts_list_tree_pointers): Stream + TREE_CHAIN as regular reference. + (streamer_read_integer_cst): Remove. + (streamer_get_pickled_tree): Adjust. + * tree-streamer-out.c (streamer_write_chain): Disable streaming + of DECL_EXTERNALs in BLOCK_VARS for now. + (write_ts_list_tree_pointers): Stream TREE_CHAIN as regular + reference. + * tree-streamer.c (streamer_tree_cache_add_to_node_array): + Add hash value argument and record that if hashes are recorded + in the cache. + (streamer_tree_cache_insert_1): Adjust. + (streamer_tree_cache_insert): Likewise. + (streamer_tree_cache_insert_at): Rename to ... + (streamer_tree_cache_replace_tree): ... this and adjust. + (streamer_tree_cache_append): Adjust. + (record_common_node): Likewise. + (streamer_tree_cache_create): Add argument whether to + record hash values together with trees. + (streamer_tree_cache_delete): Adjust. + * tree-streamer.h (struct streamer_tree_cache_d): Add + vector of hashes. + (streamer_read_integer_cst): Remove. + (streamer_tree_cache_insert): Adjust. + (streamer_tree_cache_append): Likewise. + (streamer_tree_cache_insert_at): Rename to ... + (streamer_tree_cache_replace_tree): ... this and adjust. + (streamer_tree_cache_create): Add argument whether to record hashes. + (streamer_tree_cache_get): Rename to ... + (streamer_tree_cache_get_tree): ... this. + (streamer_tree_cache_get_hash): New function. + * tree.c (cache_integer_cst): New function. + * tree.h (cache_integer_cst): Declare. + (ANON_AGGRNAME_FORMAT, ANON_AGGRNAME_P): Move here from cp/cp-tree.h. + * lto-symtab.c (lto_varpool_replace_node): Only release + DECL_INITIAL of non-prevailing decls. + * varpool.c (varpool_remove_initializer): Do not release + DECL_INITIAL when we are still in CGRAPH_LTO_STREAMING. + +2013-06-16 Jürgen Urban <JuergenUrban@gmx.de> + + * config/mips/mips.h (ISA_HAS_MUL3): Include TARGET_MIPS5900. + (ISA_HAS_MULT, ISA_HAS_DMULT, ISA_HAS_DIV, ISA_HAS_DDIV): New macros. + * config/mips/mips.md (mul<mode>3, mul<mode>3_internal) + (mul<mode>3_r4000): Require ISA_HAS_<D>MULT. + (mul<mode>3_mul3): Handle TARGET_MIPS5900. + (mulsidi3_64bit_dmul): Remove redundant TARGET_64BIT test. + (<su>muldi3_highpart, <su>muldi3_highpart_internal, <u>mulditi3) + (<u>mulditi3_internal, <u>mulditi3_r4000): Require ISA_HAS_DMULT + instead of TARGET_64BIT. + (divmod<mode>4, udivmod<mode>4, <u>divmod<GPR:mode>4_hilo_<HILO:mode>): + Require ISA_HAS_<D>DIV. + +2013-06-16 Richard Sandiford <rdsandiford@googlemail.com> + + * config.gcc (mips*-mti-linux*, mips64*-*-linux*, mipsisa64*-*-linux*) + (mips*-*-linux*): Move default with_llsc setting to where other + defaults are set. + (mips*-*-vxworks*): Move with_arch default from with_cpu block to + with_arch block. + (mips64r5900-*-*, mips64r5900el-*-*, mipsr5900-*-*, mipsr5900el-*-*): + Likewise. Remove default with_tune setting. Move default float + setting to its own block. Handle with_llsc in the same block as above. + +2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57425 + PR rtl-optimization/57569 + * alias.c (write_dependence_p): Add new parameters mem_mode, + canon_mem_addr and mem_canonicalized. Change type of writep to bool. + Changed all callers. + (canon_anti_dependence): New function. + * cse.c (check_dependence): Use canon_anti_dependence. + * cselib.c (cselib_invalidate_mem): Likewise. + * rtl.h (canon_anti_dependence): Declare. + +2013-06-16 Jürgen Urban <JuergenUrban@gmx.de> + + * config/mips/mips.h (ISA_HAS_LL_SC): Exclude TARGET_MIPS5900. + * config/mips/mips.c (mips_start_ll_sc_sync_block): Output + ".set mips3" for 64-bit targets. + +2013-06-15 Dehao Chen <dehao@google.com> + + * tree-flow.h (gimple_check_call_matching_types): Add new argument. + * gimple-low.c (gimple_check_call_matching_types): Likewise. + (gimple_check_call_args): Likewise. + * value-prof.c (check_ic_target): Likewise. + * ipa-inline.c (early_inliner): Likewise. + * ipa-prop.c (update_indirect_edges_after_inlining): Likewise. + * cgraph.c (cgraph_create_edge_1): Likewise. + (cgraph_make_edge_direct): Likewise. + +2013-06-14 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57615 + * config/rs6000/rs6000.md (mov<mode>_ppc64): Call + rs6000_output_move_128bit to handle emitting quad memory + operations. Set attribute length to 8 bytes. + +2013-06-14 Vidya Praveen <vidyapraveen@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_lo<mode>): + New pattern. + (aarch64_<su>mlal_hi<mode>, aarch64_<su>mlsl_lo<mode>): Likewise. + (aarch64_<su>mlsl_hi<mode>, aarch64_<su>mlal<mode>): Likewise. + (aarch64_<su>mlsl<mode>): Likewise. + +2013-06-14 Mike Stump <mikestump@comcast.net> + + * Makefile.in (TARGET_H): Add insn-codes.h. + +2013-06-14 Alan Modra <amodra@gmail.com> + + PR middle-end/57134 + PR middle-end/57586 + * expr.c (expand_expr_real_1 <normal_inner_ref>): Pass + EXPAND_MEMORY and EXPAND_WRITE to recursive call. Don't use + bitfield expansion when EXPAND_MEMORY. + (expand_expr_real_1 <VIEW_CONVERT_EXPR>): Pass modifier likewise. + +2013-06-13 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Move + test for clearing quad memory on 32-bit later. + +2013-06-13 Marc Glisse <marc.glisse@inria.fr> + + * fold-const.c (negate_expr_p): Handle VECTOR_CST. + (fold_negate_expr): Likewise. + (fold_real_zero_addition_p): Handle vectors. + (fold_binary_loc) <PLUS_EXPR, MINUS_EXPR>: Likewise. + +2013-06-14 Alan Modra <amodra@gmail.com> + + * varasm.c (force_const_mem): Revert 2013-06-07 change. + +2013-06-13 Jan Hubicka <jh@suse.cz> + + * ipa.c (cgraph_externally_visible_p, varpool_externally_visible_p): + Local comdats are not externally visible. + * symtab.c (dump_symtab_base): Dump externally visible. + (verify_symtab_base): Verify back links in the symtab hash. + +2013-06-13 Bin Cheng <bin.cheng@arm.com> + + * fold-const.c (operand_equal_p): Consider NOP_EXPR and + CONVERT_EXPR as equal nodes. + +2013-06-13 Bin Cheng <bin.cheng@arm.com> + + * rtlanal.c (noop_move_p): Check the code to be executed for COND_EXEC. + +2013-06-13 Marc Glisse <marc.glisse@inria.fr> + + * tree-ssa-forwprop.c (simplify_bitwise_binary, associate_plusminus): + Generalize to complex and vector. + * tree.c (build_all_ones_cst): New function. + * tree.h (build_all_ones_cst): Declare it. + +2013-06-13 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.h (LONG_DOUBLE_LARGE_FIRST): Define. + * config/rs6000/rs6000.md (signbittf2): New insn. + (extenddftf2_internal): Use LONG_DOUBLE_LARGE_FIRST. + (abstf2_internal, cmptf_internal2): Likewise. + * config/rs6000/spe.md (spe_abstf2_cmp, spe_abstf2_tst): Likewise. + +2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/rs6000.c (emit_load_locked): Add support for + power8 byte, half-word, and quad-word atomic instructions. + (emit_store_conditional): Likewise. + (rs6000_expand_atomic_compare_and_swap): Likewise. + (rs6000_expand_atomic_op): Likewise. + + * config/rs6000/sync.md (larx): Add new modes for power8. + (stcx): Likewise. + (AINT): New mode iterator to include TImode as well as normal + integer modes on power8. + (fetchop_pred): Use int_reg_operand instead of gpc_reg_operand so + that VSX registers are not considered. Use AINT mode iterator + instead of INT1 to allow inclusion of quad word atomic operations + on power8. + (load_locked<mode>): Likewise. + (store_conditional<mode>): Likewise. + (atomic_compare_and_swap<mode>): Likewise. + (atomic_exchange<mode>): Likewise. + (atomic_nand<mode>): Likewise. + (atomic_fetch_<fetchop_name><mode>): Likewise. + (atomic_nand_fetch<mode>): Likewise. + (mem_thread_fence): Use gen_loadsync_<mode> instead of enumerating + each type. + (ATOMIC): On power8, add QImode, HImode modes. + (load_locked<QHI:mode>_si): Varients of load_locked for QI/HI + modes that promote to SImode. + (load_lockedti): Convert TImode arguments to PTImode, so that we + get a guaranteed even/odd register pair. + (load_lockedpti): Likewise. + (store_conditionalti): Likewise. + (store_conditionalpti): Likewise. + + * config/rs6000/rs6000.md (QHI): New mode iterator for power8 + atomic load/store instructions. + (HSI): Likewise. + +2013-06-12 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.md (extended_mips16): Include GOT and constant-pool + loads. + (insn_count): New attribute, with most cases extracted from... + (length): ...here. Redefine most cases in terms of insn_count. + (single_insn): Delete. + (can_delay): Use insn_count to check for single instructions. + (*mul<mode>3_r4300, mul<mode>3_r4000, *mul_acc_si, *mul_acc_si_r3900) + (*msac_using_macc, *mul_sub_si, <u>mulsidi3_32bit_r4000) + (<u>mulsidi3_64bit_r4000, <su>muldi3_highpart_internal) + (<su>mulsi3_highpart_split, <su>muldi3_highpart_internal) + (<u>mulditi3_r4000, *div<mode>3, *recip<mode>3, divmod<mode>4) + (udivmod<mode>4, sqrt<mode>2, *rsqrt<mode>a, *rsqrt<mode>b) + (fix_truncdfsi2_macro, fix_truncsfsi2_macro, *lea_high64) + (*lea64, cprestore_<mode>, clear_hazard_<mode>, <unnamed insn>) + (casesi_internal_mips16_<mode>, *tls_get_tp_<mode>_split) + (tls_get_tp_mips16, *tls_get_tp_mips16_call_<mode>): Use "insn_count" + rather than "length". + (tls_get_tp_<mode>): Likewise. Remove redundant "no_delay" attribute. + * config/mips/mips-ps-3d.md (mips_c_cond_4s, mips_cabs_cond_4s): + Use "insn_count" rather than "length". + * config/mips/mips-dsp.md + (mips_l<SHORT:size><u>x_ext<GPR:mode>_<P:mode>) + (mips_l<GPR:size>x_<P:mode>, *mips_lw<u>x_<P:mode>_ext): Remove + length attributes. + +2013-06-12 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/57361 + * tree-ssa-dse.c (dse_possible_dead_store_p): Handle self-assignment. + +2013-06-12 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Convert + to split. + (aarch64_simd_combine<mode>): New instruction expansion. + * config/aarch64/aarch64-protos.h (aarch64_split_simd_combine): New + function prototype. + * config/aarch64/aarch64.c (aarch64_split_combine): New function. + * config/aarch64/iterators.md (Vdbl): Add entry for DF. + +2013-06-12 Jan Hubicka <jh@suse.cz> + + * cgraph.c (verify_edge_corresponds_to_fndecl): Be lax about + decl has when in streaming stage. + * lto-symtab.c (lto_symtab_merge_symbols): Likewise. + * cgraph.h (cgraph_state): Add CGRAPH_LTO_STREAMING. + +2013-06-12 Roland Stigge <stigge@antcom.de> + + PR target/57578 + * config/rs6000/t-linux (MULTIARCH_DIRNAME): Fix SPE version detection. + +2013-06-12 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57537 + * tree-vect-patterns.c (vect_recog_widen_mult_pattern): If + vect_handle_widen_op_by_const, convert oprnd1 to half_type1. + +2013-06-12 Richard Biener <rguenther@suse.de> + + * data-streamer.h (streamer_write_char_stream): CSE + obs->current_pointer. + * data-streamer-out.c (streamer_write_uhwi_stream): Inline + streamer_write_char_stream manually and optimize the resulting loop. + (streamer_write_hwi_stream): Likewise. + +2013-06-12 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_symtab_merge_symbols): Populate symtab hashtable. + * cgraph.h (varpool_create_empty_node): Declare. + * lto-cgraph.c (input_node, input_varpool_node): Forcingly create + duplicated nodes. + * symtab.c (symtab_unregister_node): Be lax about missin entries + in node hash. + (symtab_get_node): Update comment. + * varpool.c (varpool_create_empty_node): Break out from ... + (varpool_node_for_decl): ... here. + * lto-streamer.h (lto_file_decl_data): Add RESOLUTION_MAP. + +2013-06-12 Eric Botcazou <ebotcazou@adacore.com> + + * expr.c (expand_expr_real_1) <TARGET_MEM_REF>: Use straight-line flow. + <MEM_REF>: Use 'type' instead of TREE_TYPE (exp) and tidy up the first + part. Use straight-line flow at the end. + <COMPONENT_REF>: Remove superfluous else. + <VIEW_CONVERT_EXPR>: Use 'type' instead of TREE_TYPE (exp). + +2013-06-12 Jakub Jelinek <jakub@redhat.com> + + PR target/56564 + * varasm.c (decl_binds_to_current_def_p): Call binds_local_p + target hook even for !TREE_PUBLIC decls. If no resolution info + is available, return false for common and external decls. + +2013-06-12 Kaushik Phatak <kaushik.phatak@kpitcummins.com> + + * config/rl78/constraints.md (U): New constraint. + * config/rl78/rl78.md (*mulqi3_rl78,*mulhi3_rl78,*mulhi3_g13): Add + valloc attribute. + +2013-06-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57589 + * config/rs6000/driver-rs6000.c (elf_platform): Make buffer static + to allow returning address to AT_PLATFORM name. + +2013-06-11 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_create_function_alias): Set weakref flag. + * cgraph.h (symtab_node_base): Add weakref flag. + * cgraphunit.c (cgraph_reset_node): Clear weakref flag. + (handle_alias_pairs): Set weakref flag, do not set DECL_EXTERNAL. + (output_weakrefs): Use weakref flag. + * fold-const.c (simple_operand_p): Handle WEAK. + * gimple-fold.c (can_refer_decl_in_current_unit_p): Drop weakref. + * ipa.c (varpool_externally_visible_p): Drop weakref. + (function_and_variable_visibility): Update comment; fix weakref + sanity checks; do not clear DECL_WEAK on them. + * lto-cgraph.c (lto_output_node): update. + (lto_output_varpool_node): Update. + (input_overwrite_node): Update. + (input_node): Update. + (input_varpool_node): Update. + * lto-symtab.c (lto_symtab_symbol_p): Do not special case weakrefs. + (lto_symtab_merge_symbols): Add sanity check. + (lto_symtab_prevailing_decl): Do not special case weakrefs. + * passes.c (rest_of_decl_compilation): Set static flag, too. + * symtab.c (dump_symtab_base): Dump weakref. + (verify_symtab_base): Sanity check weakrefs. + (symtab_make_decl_local): Remove duplicated code. + (symtab_alias_ultimate_target): Simplify. + * varpool.c (varpool_create_variable_alias): Set weakref flag. + +2013-06-11 Tom de Vries <tom@codesourcery.com> + + * genautomata.c (gen_regexp_sequence): Handle els_num == -1. Handle + sequence_vect == NULL. + +2013-06-11 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (TARGET_UNWIND_WORD_MODE): Define. + (rl78_unwind_word_mode): New. + +2013-06-11 David Malcolm <dmalcolm@redhat.com> + + * final.c (debug_prefix_maps): Make static. + +2013-06-11 David Malcolm <dmalcolm@redhat.com> + + * function.c (initial_trampoline): Remove stray copy. + +2013-06-11 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>): Update. + +2013-06-11 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (ipa_get_indirect_edge_target_1): Check that param_index is + within bounds at the beginning of the function. + +2013-06-11 Alan Modra <amodra@gmail.com> + + * varasm.c (get_section): Don't die on !DECL_P decl. Tidy error + reporting. + (get_named_section): Don't NULL !DECL_P decl. + +2013-06-11 Igor Zamyatin <igor.zamyatin@intel.com> + + * doc/invoke.texi (core-avx2): Document. + (slm): Likewise. + (atom): Updated with MOVBE. + +2013-06-11 Richard Biener <rguenther@suse.de> + + * collect2.c (main): Do not redirect ld stdout/stderr when debugging. + +2013-06-11 Anton Blanchard <anton@samba.org> + + * config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Calculate + correct shift value in little-endian mode. + +2013-06-11 Jakub Jelinek <jakub@redhat.com> + + PR target/56564 + * varasm.c (get_variable_align): Move #endif to the right place. + +2013-06-10 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (hash_external_ref): Use die_symbol or signature + for hash so that hash table traversal order is deterministic. + +2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/vector.md (GPR move splitter): Do not split moves + of vectors in GPRS if they are direct moves or quad word load or + store moves. + + * config/rs6000/rs6000-protos.h (rs6000_output_move_128bit): Add + declaration. + (direct_move_p): Likewise. + (quad_load_store_p): Likewise. + + * config/rs6000/rs6000.c (enum rs6000_reg_type): Simplify register + classes into bins based on the physical register type. + (reg_class_to_reg_type): Likewise. + (IS_STD_REG_TYPE): Likewise. + (IS_FP_VECT_REG_TYPE): Likewise. + (reload_fpr_gpr): Arrays to determine what insn to use if we can + use direct move instructions. + (reload_gpr_vsx): Likewise. + (reload_vsx_gpr): Likewise. + (rs6000_init_hard_regno_mode_ok): Precalculate the register type + information that is a simplification of register classes. Also + precalculate direct move reload helpers. + (direct_move_p): New function to return true if the operation can + be done as a direct move instruciton. + (quad_load_store_p): New function to return true if the operation + is a quad memory operation. + (rs6000_legitimize_address): If quad memory, only allow register + indirect for TImode addresses. + (rs6000_legitimate_address_p): Likewise. + (enum reload_reg_type): Delete, replace with rs6000_reg_type. + (rs6000_reload_register_type): Likewise. + (register_to_reg_type): Return register type. + (rs6000_secondary_reload_simple_move): New helper function for + secondary reload and secondary memory needed to identify anything + that is a simple move, and does not need reloading. + (rs6000_secondary_reload_direct_move): New helper function for + secondary reload to identify cases that can be done with several + instructions via the direct move instructions. + (rs6000_secondary_reload_move): New helper function for secondary + reload to identify moves between register types that can be done. + (rs6000_secondary_reload): Add support for quad memory operations + and for direct move. + (rs6000_secondary_memory_needed): Likewise. + (rs6000_debug_secondary_memory_needed): Change argument names. + (rs6000_output_move_128bit): New function to return the move to + use for 128-bit moves, including knowing about the various + limitations of quad memory operations. + + * config/rs6000/vsx.md (vsx_mov<mode>): Add support for quad + memory operations. call rs6000_output_move_128bit for the actual + instruciton(s) to generate. + (vsx_movti_64bit): Likewise. + + * config/rs6000/rs6000.md (UNSPEC_P8V_FMRGOW): New unspec values. + (UNSPEC_P8V_MTVSRWZ): Likewise. + (UNSPEC_P8V_RELOAD_FROM_GPR): Likewise. + (UNSPEC_P8V_MTVSRD): Likewise. + (UNSPEC_P8V_XXPERMDI): Likewise. + (UNSPEC_P8V_RELOAD_FROM_VSX): Likewise. + (UNSPEC_FUSION_GPR): Likewise. + (FMOVE128_GPR): New iterator for direct move. + (f32_lv): New mode attribute for load/store of SFmode/SDmode values. + (f32_sv): Likewise. + (f32_dm): Likewise. + (zero_extend<mode>di2_internal1): Add support for power8 32-bit + loads and direct move instructions. + (zero_extendsidi2_lfiwzx): Likewise. + (extendsidi2_lfiwax): Likewise. + (extendsidi2_nocell): Likewise. + (floatsi<mode>2_lfiwax): Likewise. + (lfiwax): Likewise. + (floatunssi<mode>2_lfiwzx): Likewise. + (lfiwzx): Likewise. + (fix_trunc<mode>_stfiwx): Likewise. + (fixuns_trunc<mode>_stfiwx): Likewise. + (mov<mode>_hardfloat, 32-bit floating point): Likewise. + (mov<move>_hardfloat64, 64-bit floating point): Likewise. + (parity<mode>2_cmpb): Set length/type attr. + (unnamed shift right patterns, mov<mode>_internal2): Change type attr + for 'mr.' to fast_compare. + (bpermd_<mode>): Change type attr to popcnt. + (p8_fmrgow_<mode>): New insns for power8 direct move support. + (p8_mtvsrwz_1): Likewise. + (p8_mtvsrwz_2): Likewise. + (reload_fpr_from_gpr<mode>): Likewise. + (p8_mtvsrd_1): Likewise. + (p8_mtvsrd_2): Likewise. + (p8_xxpermdi_<mode>): Likewise. + (reload_vsx_from_gpr<mode>): Likewise. + (reload_vsx_from_gprsf): Likewise. + (p8_mfvsrd_3_<mode>): LIkewise. + (reload_gpr_from_vsx<mode>): Likewise. + (reload_gpr_from_vsxsf): Likewise. + (p8_mfvsrd_4_disf): Likewise. + (multi-word GPR splits): Do not split direct moves or quad memory + operations. + +2013-06-10 David Malcolm <dmalcolm@redhat.com> + + * tree-into-ssa.c (interesting_blocks): Make static. + +2013-06-10 Jakub Jelinek <jakub@redhat.com> + + PR target/56564 + * varasm.c (align_variable): Don't use DATA_ALIGNMENT or + CONSTANT_ALIGNMENT if !decl_binds_to_current_def_p (decl). + Use DATA_ABI_ALIGNMENT for that case instead if defined. + (get_variable_align): New function. + (get_variable_section, emit_bss, emit_common, + assemble_variable_contents, place_block_symbol): Use + get_variable_align instead of DECL_ALIGN. + (assemble_noswitch_variable): Add align argument, use it + instead of DECL_ALIGN. + (assemble_variable): Adjust caller. Use get_variable_align + instead of DECL_ALIGN. + * config/i386/i386.h (DATA_ALIGNMENT): Adjust x86_data_alignment + caller. + (DATA_ABI_ALIGNMENT): Define. + * config/i386/i386-protos.h (x86_data_alignment): Adjust prototype. + * config/i386/i386.c (x86_data_alignment): Add opt argument. If + opt is false, only return the psABI mandated alignment increase. + * config/c6x/c6x.h (DATA_ALIGNMENT): Renamed to... + (DATA_ABI_ALIGNMENT): ... this. + * config/mmix/mmix.h (DATA_ALIGNMENT): Renamed to... + (DATA_ABI_ALIGNMENT): ... this. + * config/mmix/mmix.c (mmix_data_alignment): Adjust function comment. + * config/s390/s390.h (DATA_ALIGNMENT): Renamed to... + (DATA_ABI_ALIGNMENT): ... this. + * doc/tm.texi.in (DATA_ABI_ALIGNMENT): Document. + * doc/tm.texi: Regenerated. + +2013-06-10 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use + cmp_code to construct REG_EQUAL note. + +2013-06-09 Jakub Jelinek <jakub@redhat.com> + + PR target/57568 + * config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure + that operands[2] doesn't overlap with operands[0]. + +2013-06-09 David Edelsohn <dje.gcc@gmail.com> + Jan Hubicka <jh@suse.cz> + + * config/rs6000/rs6000.c (print_operand, 'z'): Remove historical + hack to mark symbols as used. + +2013-06-08 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57559 + * lra-constraints.c (process_alt_operands): Don't discourage + memory with known offset for offsetable memory constraint. + * lra.c (lra_emit_add): Exchange y and z for 2-op add insn. + +2013-06-08 Eric Botcazou <ebotcazou@adacore.com> + + * varasm.c (struct oc_local_state): Reorder fields. + (output_constructor_bitfield): Replace OUTER parameter with BIT_OFFSET + and adjust accordingly. + (output_constructor): Reorder initialization code and adjust call to + output_constructor_bitfield. + +2013-06-07 Jan Hubicka <jh@suse.cz> + + * symtab.c (symtab_resolve_alias): Do not remove alias attribute. + +2013-06-07 David Malcolm <dmalcolm@redhat.com> + + * tree-object-size.c (unknown): Make const. + +2013-06-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.md (cpu_facility): Add cpu_zarch. + ("*movmem_short", "*clrmem_short", "*cmpmem_short): Use cpu_zarch + for last alternative in the cpu_facility attribute. + +2013-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/56315 + * config/arm/arm.md (*xordi3_insn): Change to insn_and_split. + (xordi3): Change operand 2 constraint to arm_xordi_operand. + * config/arm/arm.c (const_ok_for_dimode_op): Handle XOR. + * config/arm/constraints.md (Dg): New constraint. + * config/arm/neon.md (xordi3_neon): Remove. + (neon_veor<mode>): Generate xordi3 instead of xordi3_neon. + * config/arm/predicates.md (arm_xordi_operand): New predicate. + +2013-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (anddi3_insn): Remove duplicate alternatives. + Clean up alternatives. + +2013-06-07 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (setup_incoming_varargs): Round up + va_list_gpr_size. + +2013-06-07 Alan Modra <amodra@gmail.com> + + * varasm.c (force_const_mem): Assert mode is not VOID or BLK. + +2013-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/constraints.md (Df): New constraint. + * config/arm/arm.md (iordi3_insn): Use Df constraint instead of De. + Correct length attribute for last two alternatives. + +2013-06-07 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't + override user -mfp-in-toc. + (offsettable_ok_by_alignment): Consider just the current access + rather than the whole object, unless BLKmode. Handle + CONSTANT_POOL_ADDRESS_P constants that lack a decl too. + (use_toc_relative_ref): Allow CONSTANT_POOL_ADDRESS_P constants + for -mcmodel=medium. + * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't + override user -mfp-in-toc or -msum-in-toc. Default to + -mno-fp-in-toc for -mcmodel=medium. + +2013-06-06 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.c (rl78_valid_pointer_mode): New, implements + TARGET_VALID_POINTER_MODE. + +2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): + Document new power8 builtins. + + * config/rs6000/vector.md (and<mode>3): Add a clobber/scratch of a + condition code register, to allow 128-bit logical operations to be + done in the VSX or GPR registers. + (nor<mode>3): Use the canonical form for nor. + (eqv<mode>3): Add expanders for power8 xxleqv, xxlnand, xxlorc, + vclz*, and vpopcnt* vector instructions. + (nand<mode>3): Likewise. + (orc<mode>3): Likewise. + (clz<mode>2): LIkewise. + (popcount<mode>2): Likewise. + + * config/rs6000/predicates.md (int_reg_operand): Rework tests so + that only the GPRs are recognized. + + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add + support for new power8 builtins. + + * config/rs6000/rs6000-builtin.def (xscvspdpn): Add new power8 + builtin functions. + (xscvdpspn): Likewise. + (vclz): Likewise. + (vclzb): Likewise. + (vclzh): Likewise. + (vclzw): Likewise. + (vclzd): Likewise. + (vpopcnt): Likewise. + (vpopcntb): Likewise. + (vpopcnth): Likewise. + (vpopcntw): Likewise. + (vpopcntd): Likewise. + (vgbbd): Likewise. + (vmrgew): Likewise. + (vmrgow): Likewise. + (eqv): Likewise. + (eqv_v16qi3): Likewise. + (eqv_v8hi3): Likewise. + (eqv_v4si3): Likewise. + (eqv_v2di3): Likewise. + (eqv_v4sf3): Likewise. + (eqv_v2df3): Likewise. + (nand): Likewise. + (nand_v16qi3): Likewise. + (nand_v8hi3): Likewise. + (nand_v4si3): Likewise. + (nand_v2di3): Likewise. + (nand_v4sf3): Likewise. + (nand_v2df3): Likewise. + (orc): Likewise. + (orc_v16qi3): Likewise. + (orc_v8hi3): Likewise. + (orc_v4si3): Likewise. + (orc_v2di3): Likewise. + (orc_v4sf3): Likewise. + (orc_v2df3): Likewise. + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Only + allow power8 quad mode in 64-bit. + (rs6000_builtin_vectorized_function): Add support to vectorize + ISA 2.07 count leading zeros, population count builtins. + (rs6000_expand_vector_init): On ISA 2.07 use xscvdpspn to form + V4SF vectors instead of xscvdpsp to avoid IEEE related traps. + (builtin_function_type): Add vgbbd builtin function which takes an + unsigned argument. + (altivec_expand_vec_perm_const): Add support for new power8 merge + instructions. + + * config/rs6000/vsx.md (VSX_L2): New iterator for 128-bit types, + that does not include TImdoe for use with 32-bit. + (UNSPEC_VSX_CVSPDPN): Support for power8 xscvdpspn and xscvspdpn + instructions. + (UNSPEC_VSX_CVDPSPN): Likewise. + (vsx_xscvdpspn): Likewise. + (vsx_xscvspdpn): Likewise. + (vsx_xscvdpspn_scalar): Likewise. + (vsx_xscvspdpn_directmove): Likewise. + (vsx_and<mode>3): Split logical operations into 32-bit and + 64-bit. Add support to do logical operations on TImode as well as + VSX vector types. Allow logical operations to be done in either + VSX registers or in general purpose registers in 64-bit mode. Add + splitters if GPRs were used. For AND, add clobber of CCmode to + allow use of ANDI on GPRs. Rewrite nor to use the canonical RTL + encoding. + (vsx_and<mode>3_32bit): Likewise. + (vsx_and<mode>3_64bit): Likewise. + (vsx_ior<mode>3): Likewise. + (vsx_ior<mode>3_32bit): Likewise. + (vsx_ior<mode>3_64bit): Likewise. + (vsx_xor<mode>3): Likewise. + (vsx_xor<mode>3_32bit): Likewise. + (vsx_xor<mode>3_64bit): Likewise. + (vsx_one_cmpl<mode>2): Likewise. + (vsx_one_cmpl<mode>2_32bit): Likewise. + (vsx_one_cmpl<mode>2_64bit): Likewise. + (vsx_nor<mode>3): Likewise. + (vsx_nor<mode>3_32bit): Likewise. + (vsx_nor<mode>3_64bit): Likewise. + (vsx_andc<mode>3): Likewise. + (vsx_andc<mode>3_32bit): Likewise. + (vsx_andc<mode>3_64bit): Likewise. + (vsx_eqv<mode>3_32bit): Add support for power8 xxleqv, xxlnand, + and xxlorc instructions. + (vsx_eqv<mode>3_64bit): Likewise. + (vsx_nand<mode>3_32bit): Likewise. + (vsx_nand<mode>3_64bit): Likewise. + (vsx_orc<mode>3_32bit): Likewise. + (vsx_orc<mode>3_64bit): Likewise. + + * config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Update comment. + + * config/rs6000/altivec.md (UNSPEC_VGBBD): Add power8 vgbbd + instruction. + (p8_vmrgew): Add power8 vmrgew and vmrgow instructions. + (p8_vmrgow): Likewise. + (altivec_and<mode>3): Add clobber of CCmode to allow AND using + GPRs to be split under VSX. + (p8v_clz<mode>2): Add power8 count leading zero support. + (p8v_popcount<mode>2): Add power8 population count support. + (p8v_vgbbd): Add power8 gather bits by bytes by doubleword + support. + + * config/rs6000/rs6000.md (eqv<mode>3): Add support for powerp eqv + instruction. + + * config/rs6000/altivec.h (vec_eqv): Add defines to export power8 + builtin functions. + (vec_nand): Likewise. + (vec_vclz): Likewise. + (vec_vclzb): Likewise. + (vec_vclzd): Likewise. + (vec_vclzh): Likewise. + (vec_vclzw): Likewise. + (vec_vgbbd): Likewise. + (vec_vmrgew): Likewise. + (vec_vmrgow): Likewise. + (vec_vpopcnt): Likewise. + (vec_vpopcntb): Likewise. + (vec_vpopcntd): Likewise. + (vec_vpopcnth): Likewise. + (vec_vpopcntw): Likewise. + +2013-06-06 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57468 + * config/i386/i386.c (inline_secondary_memory_needed): Ignore + spilled pseudos. + +2013-06-06 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/57459 + * lra-constraints.c (update_ebb_live_info): Fix typo for operand + type when setting live regs. + +2013-06-06 Vladimir Makarov <vmakarov@redhat.com> + + * config/s390/s390.opt (mlra): New option. + * config/s390/s390.c (s390_decompose_address): Check displacement + for all registers for LRA. + (s390_secondary_reload): Don't used secondary reloads for LRA. + (s390_lra_p): New function. + (TARGET_LRA_P): Define. + * config/s390/s390.md (*movmem_short, *clrmem_short): Change value + of attribute cpu_facility to zarch for the last alternative. + (*cmpmem_short): Ditto. + +2013-06-06 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_r3_live_at_start_p): New predicate. + (arm_compute_static_chain_stack_bytes): Use it. Tidy up. + (arm_expand_prologue): Likewise. + +2013-06-06 Teresa Johnson <tejohnson@google.com> + + PR c++/53743 + * ifcvt.c (find_if_case_1): Replace BB_COPY_PARTITION with assert + as this is now done by redirect_edge_and_branch_force. + * function.c (thread_prologue_and_epilogue_insns): Insert new bb after + barriers, and fix interaction with splitting. + * emit-rtl.c (try_split): Copy REG_CROSSING_JUMP notes. + * cfgcleanup.c (try_forward_edges): Fix early return value to properly + reflect changes made in the routine. + * bb-reorder.c (emit_barrier_after_bb): Move to cfgrtl.c. + (fix_up_fall_thru_edges): Remove incorrect check for bb layout order + since this is called in cfglayout mode, and replace partition fixup + with assert as that is now done by force_nonfallthru_and_redirect. + (add_reg_crossing_jump_notes): Handle the fact that some jumps may + already be marked with region crossing note. + (insert_section_boundary_note): Make non-static, gate on flag + has_bb_partition, rewrite to also check for multiple partitions. + (rest_of_handle_reorder_blocks): Remove call to + insert_section_boundary_note, now done later during free_cfg. + (duplicate_computed_gotos): Don't duplicate partition crossing edge. + * bb-reorder.h (insert_section_boundary_note): Declare. + * Makefile.in (cfgrtl.o): Depend on bb-reorder.h + * cfgrtl.c (rest_of_pass_free_cfg): If partitions exist + invoke insert_section_boundary_note. + (try_redirect_by_replacing_jump): Remove unnecessary + check for region crossing note. + (fixup_partition_crossing): New function. + (rtl_redirect_edge_and_branch): Fixup partition boundaries. + (emit_barrier_after_bb): Move here from bb-reorder.c, handle insertion + in non-cfglayout mode. + (force_nonfallthru_and_redirect): Fixup partition boundaries, + remove old code that tried to do this. Emit barrier correctly + when we are in cfglayout mode. + (last_bb_in_partition): New function. + (rtl_split_edge): Correctly fixup partition boundaries. + (commit_one_edge_insertion): Remove old code that tried to + fixup region crossing edge since this is now handled in + split_block, and set up insertion point correctly since + block may now end in a jump. + (verify_hot_cold_block_grouping): Guard against checking when not in + linearized RTL mode. + (rtl_verify_edges): Add checks for incorrect/missing REG_CROSSING_JUMP + notes. + (rtl_verify_flow_info_1): Move verify_hot_cold_block_grouping to + rtl_verify_flow_info, so not called in cfglayout mode. + (rtl_verify_flow_info): Move verify_hot_cold_block_grouping here. + (fixup_reorder_chain): Remove old code that attempted to fixup region + crossing note as this is now handled in force_nonfallthru_and_redirect. + (duplicate_insn_chain): Don't duplicate switch section notes. + (rtl_can_remove_branch_p): Remove unnecessary check for region crossing + note. + * basic-block.h (emit_barrier_after_bb): Declare. + +2013-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-fixed.md (add<mode>3,usadd<mode>3,ssadd<mode>3, + sub<mode>3, ussub<mode>3, sssub<mode>3, arm_ssatsihi_shift, + arm_usatsihi): Adjust alternatives for arm_restrict_it. + +2013-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-ldmstm.ml: Set "predicable_short_it" to "no" + where appropriate. + * config/arm/ldmstm.md: Regenerate. + +2013-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/sync.md (atomic_loaddi_1): + Disable predication for arm_restrict_it. + (arm_load_exclusive<mode>): Likewise. + (arm_load_exclusivesi): Likewise. + (arm_load_exclusivedi): Likewise. + (arm_load_acquire_exclusive<mode>): Likewise. + (arm_load_acquire_exclusivesi): Likewise. + (arm_load_acquire_exclusivedi): Likewise. + (arm_store_exclusive<mode>): Likewise. + (arm_store_exclusive<mode>): Likewise. + (arm_store_release_exclusivedi): Likewise. + (arm_store_release_exclusive<mode>): Likewise. + +2013-06-06 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (enum LTO_tags): Move LTO_tree_pickle_reference + after LTO_null. + (lto_tag_is_tree_code_p): Adjust. + (lto_tag_is_gimple_code_p): Likewise. + (lto_gimple_code_to_tag): Likewise. + (lto_tag_to_gimple_code): Likewise. + (lto_tree_code_to_tag): Likewise. + (lto_tag_to_tree_code): Likewise. + * data-streamer.h (streamer_write_hwi_in_range): Use + uhwi streaming to stream the normalized range. + (streamer_read_hwi_in_range): Likewise. + +2013-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (enabled_for_depr_it): New attribute. + (predicable_short_it): Likewise. + (predicated): Likewise. + (enabled): Handle above. + (define_cond_exec): Set predicated attribute to yes. + +2013-06-05 Mike Stump <mikestump@comcast.net> + + * gdbinit.in (__FUNCTION__): Add. + +2013-06-05 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_emit_conditional_move): Swap all + GE, GT, GEU and GTU compares, modulo DImode compares with zero. + +2013-06-05 Jan Hubicka <jh@suse.cz> + + * varasm.c (mark_decl_referenced): Revert the removal until targets + are fixed. + +2013-06-05 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.c (print_operand, 'z'): Use DECL_PRESERVE_P + instead of mark_decl_referenced. + +2013-06-05 Jan Hubicka <jh@suse.cz> + + * cgraph.c (cgraph_remove_node): Clear forced_by_abi. + (cgraph_node_cannot_be_local_p_1): Honnor symbol.forced_by_abi + and symtab_used_from_object_file_p. + (cgraph_make_node_local_1): Clear forced_by_abi. + (cgraph_can_remove_if_no_direct_calls_and): Use forced_by_abi + * cgraph.h (symtab_node_base): Add forced_by_abi. + (decide_is_variable_needed): Remove. + (varpool_can_remove_if_no_refs): Honnor symbol.forced_by_abi. + * cgraphunit.c (cgraph_decide_is_function_needed): Rename to .. + (decide_is_symbol_needed): ... this one; handle symbols in general; + always analyze virtuals; honnor forced_by_abi. + (cgraph_finalize_function): Update. + (varpool_finalize_decl): Update. + (symbol_defined_and_needed): Remove. + (analyze_functions): Update. + * lto-cgraph.c (lto_output_node, lto_output_varpool_node, + output_refs, input_overwrite_node): Handle forced_by_abi. + * ipa.c (cgraph_address_taken_from_non_vtable_p): Rename to ... + (address_taken_from_non_vtable_p): ... this one. + (comdat_can_be_unshared_p_1): New function. + (cgraph_comdat_can_be_unshared_p): Rename to ... + (comdat_can_be_unshared_p): ... this one; handle symbols in general. + (varpool_externally_visible_p): Use comdat_can_be_unshared_p. + (function_and_variable_visibility): Clear forced_by_abi as needed. + * trans-mem.c (ipa_tm_mark_forced_by_abi_node): New functoin. + (ipa_tm_create_version_alias, ipa_tm_create_version): Update. + * symtab.c (dump_symtab_base): Dump forced_by_abi. + * varpool.c (decide_is_variable_needed): Remove. + +2013-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (MAX_INSN_PER_IT_BLOCK): New macro. + (arm_option_override): Override arm_restrict_it where appropriate. + (thumb2_final_prescan_insn): Use MAX_INSN_PER_IT_BLOCK. + * config/arm/arm.opt (mrestrict-it): New command-line option. + * doc/invoke.texi: Document -mrestrict-it. + +2013-06-05 David Malcolm <dmalcolm@redhat.com> + + * tsan.c (tsan_atomic_table): Make const. + +2013-06-05 Richard Biener <rguenther@suse.de> + + * tree-streamer.c (streamer_tree_cache_insert_1): Update the + index associated with the tree we are supposed to replace. + * tree-streamer-out.c (pack_ts_base_value_fields): Output + TREE_ASM_WRITTEN as zero for everything but SSA names. + +2013-06-05 David Malcolm <dmalcolm@redhat.com> + + * tree-ssa-structalias.c (call_stmt_vars): Make static. + +2013-06-04 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c (get_alias_symbol): Remove weakref sanity check. + (input_node, input_varpool_node): Handle correctly external same + body aliases. + * ipa.c (symtab_remove_unreachable_nodes): Do not remove external + nodes at ltrans stage. + +2013-06-04 Jan Hubicka <jh@suse.cz> + + * ipa-inline.c (update_caller_keys): Fix availability test. + (update_callee_keys): Likewise. + * symtab.c (symtab_alias_ultimate_target): Make availaiblity logic + to follow ELF standard. + +2013-06-04 Jürgen Urban <JuergenUrban@gmx.de> + + * config.gcc (mipsr5900-*-elf*, mipsr5900el-*-elf*, mips64r5900-*-elf*) + (mips64r5900el-*-elf*): New configurations. + * config/mips/mips-cpus.def (r5900): New processor. + * config/mips/mips-tables.opt: Regenerate. + * config/mips/mips.c (mips_rtx_cost_data): Add an R5900 entry. + (mips_issue_rate): Handle PROCESSOR_R5900. + (mips_reorg_process_insns): Force reorder mode for the R5900. + * config/mips/mips.h (TARGET_MIPS5900): Define. + (ISA_HAS_CONDMOVE, ISA_HAS_PREFETCH, ISA_HAS_HILO_INTERLOCKS): Include + TARGET_MIPS5900. + (ISA_HAS_LOAD_DELAY, ISA_HAS_XFER_DELAY, ISA_HAS_FCMP_DELAY): Exclude + TARGET_MIPS5900. + * config/mips/mips.md (processor): Add r5900. + (MOVECC): Disallow CCmode conditions for TARGET_MIPS5900. + +2013-06-04 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*mov<mode>_aarch64): Call + into function to generate MOVI instruction. + * config/aarch64/aarch64.c (aarch64_simd_container_mode): New function. + (aarch64_preferred_simd_mode): Turn into wrapper. + (aarch64_output_scalar_simd_mov_immediate): New function. + * config/aarch64/aarch64-protos.h: Add prototype for above. + +2013-06-04 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (simd_immediate_info): Remove + element_char member. + (sizetochar): Return signed char. + (aarch64_simd_valid_immediate): Remove elchar and other + unnecessary variables. + (aarch64_output_simd_mov_immediate): Take rtx instead of &rtx. + Calculate element_char as required. + * config/aarch64/aarch64-protos.h: Update and move prototype + for aarch64_output_simd_mov_immediate. + * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): + Update arguments. + +2013-06-04 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (simd_immediate_info): Struct to hold + information completed by aarch64_simd_valid_immediate. + (aarch64_legitimate_constant_p): Update arguments. + (aarch64_simd_valid_immediate): Work with struct rather than many + pointers. + (aarch64_simd_scalar_immediate_valid_for_move): Update arguments. + (aarch64_simd_make_constant): Update arguments. + (aarch64_output_simd_mov_immediate): Work with struct rather than + many pointers. Output immediate directly rather than as operand. + * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate): + Update prototype. + * config/aarch64/constraints.md (Dn): Update arguments. + +2013-06-04 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): No + longer static. + (aarch64_simd_immediate_valid_for_move): Remove. + (aarch64_simd_scalar_immediate_valid_for_move): Update call. + (aarch64_simd_make_constant): Update call. + (aarch64_output_simd_mov_immediate): Update call. + * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate): + Add prototype. + * config/aarch64/constraints.md (Dn): Update call. + +2013-06-04 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Change + return type to bool for prototype. + (aarch64_legitimate_constant_p): Check for true instead of not -1. + (aarch64_simd_valid_immediate): Fix up each return to return a bool. + (aarch64_simd_immediate_valid_for_move): Update retval for bool. + +2013-06-04 Catherine Moore <clm@codesourcery.com> + + * config/mips/mips.opt (meva): New. + * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define __mips_eva. + (ASM_SPEC): Handle -meva. + * doc/invoke.texi (meva): Document. + +2013-06-04 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (output_toc): Correct little-endian float + constant output. + +2013-06-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * rtl.def: Add extra fourth optional field to define_cond_exec. + * gensupport.c (process_one_cond_exec): Process attributes from + define_cond_exec. + * doc/md.texi: Document fourth field in define_cond_exec. + +2013-06-04 Eric Botcazou <ebotcazou@adacore.com> + + * expmed.c (extract_bit_field_1): In the larger-than-a-word case, factor + out the processing order as in store_bit_field_1. + +2013-06-04 Jan Hubicka <jh@suse.cz> + + PR middle-end/57500 + * cgraphunit.c (cgraph_process_same_body_aliases): Create + non-VAR_DECL node if it does not exist yet. + +2013-06-03 Richard Sandiford <rdsandiford@googlemail.com> + + * config.gcc (mipsisa64sr71k-*-elf*, mipsisa64sb1-*-elf*) + (mipsisa64sb1el-*-elf*, mips64-*-elf*, mips64el-*-elf*) + (mips64orion-*-elf*, mips64orionel-*-elf*): Remove + target_cpu_default setting. + +2013-06-03 Teresa Johnson <tejohnson@google.com> + + * dumpfile.c (opt_info_switch_p): Change -fopt-info + default to -fopt-info=optimized instead of all. + * doc/invoke.texi: Ditto. + * tree-vectorizer.c (vectorize_loops): Emit loop vectorization + success under MSG_OPTIMIZED_LOCATIONS, and use dump_printf_loc. + (execute_vect_slp): Emit BB vectorization success under + MSG_OPTIMIZED_LOCATIONS. + * tree-vect-slp.c (vect_slp_transform_bb): Change + MSG_OPTIMIZED_LOCATIONS to MSG_NOTE. + * tree-vect-loop.c (vect_transform_loop): Ditto. + +2013-06-03 Jason Merrill <jason@redhat.com> + + PR c++/57415 + * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): + Use TARGET_EXPR for C++. + +2013-06-03 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/57268 + * sched-deps.c (sched_analyze_2): Don't flush_pending_lists + if DEBUG_INSN_P (insn). + + Reapply + 2013-05-31 Dinar Temirbulatov <dinar@kugelworks.com> + + PR rtl-optimization/57268 + * sched-deps.c (sched_analyze_2): Flush dependence lists if + the sum of the read and write lists exceeds MAX_PENDING_LIST_LENGTH. + +2013-06-03 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> + + * config/i386/i386.c (ix86_lea_outperforms): Fix formatting. + (ix86_avoid_lea_for_addr): Likewise. + (exact_dependency_1): Likewise. + (ix86_adjust_cost): Likewise. + (swap_top_of_ready_list): Fix formatting and !reload_completed check + removed. + (do_reorder_for_imul): Fix typo, formatting and + !reload_completed check removed. + (ix86_sched_reorder): Fix typo and formatting. + (fold_builtin_cpu): Move M_INTEL_SLM at the end of processor types + list. + +2013-06-03 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md (*movdi_aarch64): Define "simd" attribute. + +2013-06-03 Eric Botcazou <ebotcazou@adacore.com> + + * varasm.c (output_constant) <CONSTRUCTOR>: Minor formatting tweak. + <STRING_CST>: Likewise. + <VECTOR_CST>: Likewise. + +2013-06-01 Janus Weil <janus@gcc.gnu.org> + Mikael Morin <mikael@gcc.gnu.org> + + * configure.ac: Add AC_HEADER_TIOCGWINSZ macro. + * config.in: Regenerated. + * configure: Regenerated. + +2013-06-01 Jan Hubicka <jh@suse.cz> + + PR middle-end/57366 + * cgraphunit.c (compile): When weakref is not supported, + set up transparent aliases before final output pass. + * varasm.c (assemble_alias): Do not try to do it here. + +2013-06-01 Jan Hubicka <jh@suse.cz> + + PR middle-end/57467 + * passes.c (for_per_function): Skip unanalyzed functions. + +2013-06-01 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_symtab_merge_cgraph_nodes_1): Rename to ... + (lto_symtab_merge_symbols_1): ... this one. + (lto_symtab_merge_cgraph_nodes): Rename to ... + (lto_symtab_merge_symbols): ... this one; simplify. + * cgraph.c (same_body_aliases_done): Rename to ... + (cpp_implicit_aliases_done): ... this one. + (cgraph_create_function_alias): Update. + (cgraph_same_body_alias): Update. + (dump_cgraph_node): Remove alias dumping; simplify thunk dumping. + (verify_edge_corresponds_to_fndecl): Simplify. + * cgraph.h (symtab_node_base): Add cpp_implicit_alias, alias_target. + (cgraph_node): Remove same_body_alias. + (varpool_node): Remove alias_of and extra_name_alias. + (same_body_aliases_done): Rename to .. + (cpp_implicit_aliases_done): ... this one. + (symtab_alias_ultimate_target): Add default parameter. + (symtab_resolve_alias): New function. + (fixup_same_cpp_alias_visibility): Declare. + (cgraph_function_node): Add default parameter. + (cgraph_node_asm_name): Likewise. + (cgraph_function_or_thunk_node): Add default parameter; do + not ICE when it is NULL. + (varpool_variable_node): Likewise. + * tree-emutls.c (create_emultls_var): Update. + (ipa_lower_emutls): Update. + * cgraphunit.c (cgraph_decide_is_function_needed): Update. + (cgraph_reset_node): Reset alias info. + (cgraph_finalize_function): Update. + (fixup_same_cpp_alias_visibility): Move to symtab.c. + (analyze_function): Simplify. + (cgraph_process_same_body_aliases): Simplify. + (analyze_functions): Fixup same body aliases. + (handle_alias_pairs): Simplify. + (assemble_thunk): Update. + (assemble_thunks_and_aliases): Update. + (output_weakrefs): Rewrite. + * lto-cgraph.c (lto_output_node): Rewrite alias handling. + (lto_output_varpool_node): Likewise. + (compute_ltrans_boundary): Remve assert. + (get_alias_symbol): New functoin. + (input_node): Rewrite alias handling. + (input_varpool_node): Likewise. + * ipa-pure-const.c (propagate_pure_const): Fix formating. + * ipa.c (process_references): Handle weakrefs correctly. + (symtab_remove_unreachable_nodes): Likewise. + * trans-mem.c (get_cg_data): Update. + (ipa_tm_create_version_alias): Update. + (ipa_tm_execute): Update. + * symtab.c (dump_symtab_base): Dump aliases. + (verify_symtab_base): Verify aliases. + (symtab_node_availability): New function. + (symtab_alias_ultimate_target): Simplify. + (fixup_same_cpp_alias_visibility): Move here from cgraphunit.c; + handle all the fixup cases. + (symtab_resolve_alias): New function. + * passes.c (ipa_write_summaries): Handle weakrefs. + * varpool.c (varpool_analyze_node): Simplify. + (assemble_aliases): Update. + (varpool_create_variable_alias): Simplify. + (varpool_extra_name_alias): Simplify. + * lto-streamer.h (lto_symtab_merge_cgraph_nodes): Rename to... + (lto_symtab_merge_symbols): ... this one. + +2013-06-01 Dinar Temirbulatov <dinar@kugelworks.com> + + Revert + PR rtl-optimization/57268 + * sched-deps.c (sched_analyze_2): Flush dependence lists if + the sum of the read and write lists exceeds MAX_PENDING_LIST_LENGTH. + +2013-06-01 Tobias Burnus <burnus@net-b.de> + + Partially reverted: + 2013-05-31 Tobias Burnus <burnus@net-b.de> + + PR middle-end/57073 + * tree-ssa-math-opts.c (execute_cse_sincos): Move check + further up. + +2013-05-31 Dinar Temirbulatov <dinar@kugelworks.com> + + PR rtl-optimization/57268 + * sched-deps.c (sched_analyze_2): Flush dependence lists if + the sum of the read and write lists exceeds MAX_PENDING_LIST_LENGTH. + +2013-05-31 Eric Botcazou <ebotcazou@adacore.com> + + * config/rs6000/predicates.md (rs6000_cbranch_operator): Accept some + unordered comparison operators when -fno-trapping-math is in effect + on the e500. + * config/rs6000/rs6000.c (rs6000_generate_compare): Remove dead code + and implement unordered comparison operators properly on the e500. + +2013-05-31 Eric Botcazou <ebotcazou@adacore.com> + + * simplify-rtx.c (simplify_byte_swapping_operation): Use proper macro + for constant scalar integers. + (simplify_relational_operation_1): Likewise. + +2013-05-31 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-opts.h (enum processor_type): Reorder. + * config/rs6000/rs6000.md (cpu): Reorder. Split long line. + Fix comment. + +2013-05-31 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> + Igor Zamyatin <igor.zamyatin@intel.com> + + Silvermont (SLM) architecture performance tuning. + * config/i386/i386.h (enum ix86_tune_indices): Add + X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS. + (TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define. + + * config/i386/i386.c (initial_ix86_tune_features) + <X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS>: Initialize. + (ix86_lea_outperforms): Handle Silvermont tuning. + (ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms + call. + (ix86_use_lea_for_mov): Likewise. + (ix86_avoid_lea_for_addr): Likewise. + (ix86_lea_for_add_ok): Likewise. + (exact_dependency_1): New function. + (exact_store_load_dependency): Likewise. + (ix86_adjust_cost): Handle Silvermont tuning. + (do_reoder_for_imul): Likewise. + (swap_top_of_ready_list): New function. + (ix86_sched_reorder): Changed to handle Silvermont tuning. + + * config/i386/i386.md (peepholes that split memory operand in fp + converts): New. + +2013-05-31 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): + Remove un-necessary braces. + +2013-05-31 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_symbol): + Use SYMBOL_TINY_ABSOLUTE for AARCH64_CMODEL_TINY_PIC. + +2013-05-31 Tobias Burnus <burnus@net-b.de> + + PR middle-end/57073 + * tree-ssa-math-opts.c (execute_cse_sincos): Move check further up. + +2013-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/56315 + * config/arm/arm.c (const_ok_for_dimode_op): Handle IOR. + * config/arm/arm.md (*iordi3_insn): Change to insn_and_split. + * config/arm/neon.md (iordi3_neon): Remove. + (neon_vorr<mode>): Generate iordi3 instead of iordi3_neon. + * config/arm/predicates.md (imm_for_neon_logic_operand): + Move to earlier in the file. + (neon_logic_op2): Likewise. + (arm_iordi_operand_neon): New predicate. + +2013-05-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57478 + PR tree-optimization/57453 + * tree-vect-slp.c (vect_bb_slp_scalar_cost): Uses in PHI nodes + are life as well. + +2013-05-31 Kaushik Phatak <kaushik.phatak@kpitcummins.com> + + * config/rl78/rl78.md (mulqi3,mulhi3): New define_expands. + (*mulqi3_rl78,*mulhi3_rl78,*mulhi3_g13): New define_insns. + +2013-05-30 Tobias Burnus <burnus@net-b.de> + Thomas Koenig <tkoenig@gcc.gnu.org> + + PR middle-end/57073 + * tree-ssa-math-opts.c (execute_cse_sincos): Optimize + powi (-1.0, k) to (k & 1) ? -1.0 : 1.0. + +2013-05-30 Steven Bosscher <steven@gcc.gnu.org> + + * rtlanal.c (tablejump_p): Expect table and label to be adjacent. + +2013-05-30 Vladimir Makarov <vmakarov@redhat.com> + + * target.def (register_usage_leveling_p): New hook. + * targhooks.c (default_register_usage_leveling_p): New. + * targhooks.h (default_register_usage_leveling_p): New prototype. + * lra-assigns.c (register_usage_leveling_p): Use the hook. + * doc/tm.texi.in (TARGET_REGISTER_USAGE_LEVELING_P): New hook. + * doc/tm.texi: Update. + * config/i386/i386.c (TARGET_REGISTER_USAGE_LEVELING_P): Define. + +2013-05-30 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (insv<mode>): New define_expand. + (*insv_reg<mode>): New define_insn. + +2013-05-30 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57439 + * postreload.c (move2add_valid_value_p): Check that we have + a zero subreg_regno_offset when accessing the register in + the requested mode. + +2013-05-30 Yuri Rumyantsev <yuri.s.rumyantsev@intel.com> + Igor Zamyatin <igor.zamyatin@intel.com> + + Silvermont (SLM) architecture pipeline model, tuning and + insn selection. + * config.gcc: Add slm config options and target. + + * config/i386/slm.md: New. + + * config/i386/driver-i386.c (host_detect_local_cpu): Check movbe. + + * config/i386/i386-c.c (ix86_target_macros_internal): New case + PROCESSOR_SLM. + (ix86_target_macros_internal): Likewise. + + * config/i386/i386.c (slm_cost): New cost. + (m_SLM): New macro flag. + (initial_ix86_tune_features): Set m_SLM. + (x86_accumulate_outgoing_args): Likewise. + (x86_arch_always_fancy_math_387): Likewise. + (processor_target_table): Add slm cost. + (cpu_names): Add slm cpu name. + (x86_option_override_internal): Set SLM ISA. + (ix86_issue_rate): New case PROCESSOR_SLM. + (ia32_multipass_dfa_lookahead): Likewise. + (fold_builtin_cpu): Add slm. + + * config/i386/i386.h (TARGET_SLM): New target macro. + (target_cpu_default): Add TARGET_CPU_DEFAULT_slm. + (processor_type): Add PROCESSOR_SLM. + + * config/i386/i386.md (cpu): Add new value "slm". + (slm.md): Include slm.md. + +2013-05-30 Bernd Schmidt <bernds@codesourcery.com> + Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/arm/arm-protos.h: Add and update function protos. + * config/arm/arm.c (use_simple_return_p): New added. + (thumb2_expand_return): Check simple_return flag. + * config/arm/arm.md: Add simple_return and conditional simple_return. + * config/arm/iterators.md: Add iterator for return and simple_return. + +2013-05-30 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added. + (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes. + (arm_emit_vfp_multi_reg_pop): Likewise. + (thumb2_emit_ldrd_pop): Likewise. + (arm_expand_epilogue): Add misc REG_CFA notes. + (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE. + +2013-05-29 Lawrence Crowl <crowl@google.com> + + * config/arm/t-arm: Update for below. + + * config/arm/arm.c (arm_libcall_uses_aapcs_base::libcall_htab): + Change type to hash_table. Update dependent calls and types. + + * config/i386/t-cygming: Update for below. + + * config/i386/t-interix: Update for below. + + * config/i386/winnt.c (i386_pe_section_type_flags::htab): + Change type to hash_table. Update dependent calls and types. + (i386_find_on_wrapper_list::wrappers): Likewise. + + * config/ia64/t-ia64: Update for below. + + * config/ia64/ia64.c (bundle_state_table): + Change type to hash_table. Update dependent calls and types. + + * config/mips/mips.c (mips_reorg_process_insns::htab): + Change type to hash_table. Update dependent calls and types. + + * config/sol2.c (solaris_comdat_htab): + Change type to hash_table. Update dependent calls and types. + + * config/t-sol2: Update for above. + +2013-05-29 Teresa Johnson <tejohnson@google.com> + + * passes.c (dump_passes): Use FOR_EACH_FUNCTION since + functions are not yet marked as defined. + +2013-05-29 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * config/rs6000/vector.md (VEC_I): Add support for new power8 V2DI + instructions. + (VEC_A): Likewise. + (VEC_C): Likewise. + (vrotl<mode>3): Likewise. + (vashl<mode>3): Likewise. + (vlshr<mode>3): Likewise. + (vashr<mode>3): Likewise. + + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add + support for power8 V2DI builtins. + + * config/rs6000/rs6000-builtin.def (abs_v2di): Add support for + power8 V2DI builtins. + (vupkhsw): Likewise. + (vupklsw): Likewise. + (vaddudm): Likewise. + (vminsd): Likewise. + (vmaxsd): Likewise. + (vminud): Likewise. + (vmaxud): Likewise. + (vpkudum): Likewise. + (vpksdss): Likewise. + (vpkudus): Likewise. + (vpksdus): Likewise. + (vrld): Likewise. + (vsld): Likewise. + (vsrd): Likewise. + (vsrad): Likewise. + (vsubudm): Likewise. + (vcmpequd): Likewise. + (vcmpgtsd): Likewise. + (vcmpgtud): Likewise. + (vcmpequd_p): Likewise. + (vcmpgtsd_p): Likewise. + (vcmpgtud_p): Likewise. + (vupkhsw): Likewise. + (vupklsw): Likewise. + (vaddudm): Likewise. + (vmaxsd): Likewise. + (vmaxud): Likewise. + (vminsd): Likewise. + (vminud): Likewise. + (vpksdss): Likewise. + (vpksdus): Likewise. + (vpkudum): Likewise. + (vpkudus): Likewise. + (vrld): Likewise. + (vsld): Likewise. + (vsrad): Likewise. + (vsrd): Likewise. + (vsubudm): Likewise. + + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add + support for power8 V2DI instructions. + + * config/rs6000/altivec.md (UNSPEC_VPKUHUM): Add support for + power8 V2DI instructions. Combine pack and unpack insns to use an + iterator for each mode. Check whether a particular mode supports + Altivec instructions instead of just checking TARGET_ALTIVEC. + (UNSPEC_VPKUWUM): Likewise. + (UNSPEC_VPKSHSS): Likewise. + (UNSPEC_VPKSWSS): Likewise. + (UNSPEC_VPKUHUS): Likewise. + (UNSPEC_VPKSHUS): Likewise. + (UNSPEC_VPKUWUS): Likewise. + (UNSPEC_VPKSWUS): Likewise. + (UNSPEC_VPACK_SIGN_SIGN_SAT): Likewise. + (UNSPEC_VPACK_SIGN_UNS_SAT): Likewise. + (UNSPEC_VPACK_UNS_UNS_SAT): Likewise. + (UNSPEC_VPACK_UNS_UNS_MOD): Likewise. + (UNSPEC_VUPKHSB): Likewise. + (UNSPEC_VUNPACK_HI_SIGN): Likewise. + (UNSPEC_VUNPACK_LO_SIGN): Likewise. + (UNSPEC_VUPKHSH): Likewise. + (UNSPEC_VUPKLSB): Likewise. + (UNSPEC_VUPKLSH): Likewise. + (VI2): Likewise. + (VI_char): Likewise. + (VI_scalar): Likewise. + (VI_unit): Likewise. + (VP): Likewise. + (VP_small): Likewise. + (VP_small_lc): Likewise. + (VU_char): Likewise. + (add<mode>3): Likewise. + (altivec_vaddcuw): Likewise. + (altivec_vaddu<VI_char>s): Likewise. + (altivec_vadds<VI_char>s): Likewise. + (sub<mode>3): Likewise. + (altivec_vsubcuw): Likewise. + (altivec_vsubu<VI_char>s): Likewise. + (altivec_vsubs<VI_char>s): Likewise. + (altivec_vavgs<VI_char>): Likewise. + (altivec_vcmpbfp): Likewise. + (altivec_eq<mode>): Likewise. + (altivec_gt<mode>): Likewise. + (altivec_gtu<mode>): Likewise. + (umax<mode>3): Likewise. + (smax<mode>3): Likewise. + (umin<mode>3): Likewise. + (smin<mode>3): Likewise. + (altivec_vpkuhum): Likewise. + (altivec_vpkuwum): Likewise. + (altivec_vpkshss): Likewise. + (altivec_vpkswss): Likewise. + (altivec_vpkuhus): Likewise. + (altivec_vpkshus): Likewise. + (altivec_vpkuwus): Likewise. + (altivec_vpkswus): Likewise. + (altivec_vpks<VI_char>ss): Likewise. + (altivec_vpks<VI_char>us): Likewise. + (altivec_vpku<VI_char>us): Likewise. + (altivec_vpku<VI_char>um): Likewise. + (altivec_vrl<VI_char>): Likewise. + (altivec_vsl<VI_char>): Likewise. + (altivec_vsr<VI_char>): Likewise. + (altivec_vsra<VI_char>): Likewise. + (altivec_vsldoi_<mode>): Likewise. + (altivec_vupkhsb): Likewise. + (altivec_vupkhs<VU_char>): Likewise. + (altivec_vupkls<VU_char>): Likewise. + (altivec_vupkhsh): Likewise. + (altivec_vupklsb): Likewise. + (altivec_vupklsh): Likewise. + (altivec_vcmpequ<VI_char>_p): Likewise. + (altivec_vcmpgts<VI_char>_p): Likewise. + (altivec_vcmpgtu<VI_char>_p): Likewise. + (abs<mode>2): Likewise. + (vec_unpacks_hi_v16qi): Likewise. + (vec_unpacks_hi_v8hi): Likewise. + (vec_unpacks_lo_v16qi): Likewise. + (vec_unpacks_hi_<VP_small_lc>): Likewise. + (vec_unpacks_lo_v8hi): Likewise. + (vec_unpacks_lo_<VP_small_lc>): Likewise. + (vec_pack_trunc_v8h): Likewise. + (vec_pack_trunc_v4si): Likewise. + (vec_pack_trunc_<mode>): Likewise. + + * config/rs6000/altivec.h (vec_vaddudm): Add defines for power8 + V2DI builtins. + (vec_vmaxsd): Likewise. + (vec_vmaxud): Likewise. + (vec_vminsd): Likewise. + (vec_vminud): Likewise. + (vec_vpksdss): Likewise. + (vec_vpksdus): Likewise. + (vec_vpkudum): Likewise. + (vec_vpkudus): Likewise. + (vec_vrld): Likewise. + (vec_vsld): Likewise. + (vec_vsrad): Likewise. + (vec_vsrd): Likewise. + (vec_vsubudm): Likewise. + (vec_vupkhsw): Likewise. + (vec_vupklsw): Likewise. + +2013-05-29 Jan Hubicka <jh@suse.cz> + + * cgraph.h (symtab_node_base): Add definition, alias and analyzed + flags; reorder rest of fields in more consistent way. + (varpool_node): Remove analyzed, finalized and alias. + (cgraph_ndoe): Likewise. + (symtab_alias_ultimate_target): New function. + (cgraph_function_node): Move offline. + (cgraph_reset_node): Declare. + (cgraph_comdat_can_be_unshared_p): Remove. + (varpool_remove_initializer): Declare. + (varpool_first_defined_variable, varpool_next_defined_variable + cgraph_first_defined_function, cgraph_next_defined_function): Update. + (cgraph_function_with_gimple_body_p): Update. + (varpool_all_refs_explicit_p): Update. + (symtab_alias_target): New function. + (cgraph_alias_aliased_node, varpool_alias_aliased_node): Rename to ... + (cgraph_alias_target, varpool_alias_target): .. this one; simplify. + (cgraph_function_or_thunk_node): Simplify using + symtab_alias_ultimate_target. + (varpool_variable_node): Likewise. + * cgraph.c (cgraph_create_function_alias): Update. + (cgraph_add_thunk): Update. + (cgraph_remove_node): Update. + (dump_cgraph_node): Do not dump removed flags. + (cgraph_function_body_availability): Update. + (cgraph_propagate_frequency): Update. + (verify_cgraph_node): Check sanity of local flag. + (cgraph_function_node): Move here from cgraph.h; revamp for + cgraph_function_or_thunk_node. + * lto-symtab.c (lto_varpool_replace_node): Update. + (lto_symtab_resolve_can_prevail_p): Update. + (lto_symtab_merge_cgraph_nodes): Update. + * ipa-cp.c (determine_versionability, initialize_node_lattices, + propagate_constants_accross_call, devirtualization_time_bonus, + ipcp_propagate_stage): Update. + * tree-emutls.c (create_emultls_var, ipa_lower_emutls): Update. + * ipa-inline-transform.c (clone_inlined_nodes, + preserve_function_body_p): Update. + * ipa-reference.c (propagate): Update. + (write_node_summary_p): Update. + * toplev.c (wrapup_global_declaration_2): Update. + * cgraphunit.c (cgraph_analyze_function): Rename to ... + (analyze_function) ... this one. + (cgraph_process_new_functions): Update. + (cgraph_reset_node): Export. + (cgraph_finalize_function): Update. + (cgraph_add_new_function): Update. + (process_function_and_variable_attributes): Update. + (varpool_finalize_decl): Update. + (symbol_finalized): Remove. + (symbol_finalized_and_needed): Rename to ... + (symbol_defined_and_needed): ... update. + (cgraph_analyze_functions): Update. + (handle_alias_pairs): Update. + (mark_functions_to_output): Update. + (assemble_thunk): Update. + (output_in_order): Update. + (output_weakrefs): Update. + (finalize_compilation_unit): Update. + * lto-cgraph.c (reachable_from_other_partition_p, lto_output_node, + lto_output_varpool_node, compute_ltrans_boundary, input_overwrite_node, + input_node, input_varpool_node): Update. + * dbxout.c (dbxout_expand_expr): Update. + * cgraphclones.c (cgraph_clone_node): Update. + (cgraph_copy_node_for_versioning): Update. + (cgraph_materialize_clone): Update. + (cgraph_materialize_all_clones): Update. + * ipa-pure-const.c (analyze_function, pure_const_write_summary, + propagate_pure_const, propagate_nothrow): Update. + * lto-streamer-out.c (lto_output, write_symbol): Update. + * ipa-utils.c (ipa_reverse_postorder): Update. + * ipa-inline.c (can_inline_edge_p): Update. + (update_caller_keys, ipa_inline): Update. + * dwarf2out.c (reference_to_unused, + premark_types_used_by_global_vars_helper): Update. + * tree-eh.c (tree_could_trap_p): Update. + * ipa-split.c (consider_split, execute_split_functions): Update. + * ipa.c (cgraph_non_local_node_p_1, cgraph_local_node_p, + has_addr_references_p): Update; move ahead in file for better + readability. + (process_references): Simplify. + (symtab_remove_unreachable_nodes): Update; cleanup way function/var + bodies are removed. + (cgraph_comdat_can_be_unshared_p): Make static. + (cgraph_externally_visible_p): Update. + (varpool_externally_visible_p): Update. + (function_and_variable_visibility): Update. + * trans-mem.c (get_cg_data, ipa_tm_mayenterirr_function, + ipa_tm_mark_force_output_node): Update. + * ipa-inline-analysis.c (dump_inline_summary, initialize_inline_failed, + estimate_edge_devirt_benefit, inline_generate_summary, + inline_write_summary): Update. + * gimple-fold.c (can_refer_decl_in_current_unit_p): Update. + * ipa-prop.c (ipa_compute_jump_functions): Update. + (ipa_print_node_params, ipa_prop_read_section, + ipa_update_after_lto_read, read_replacements_section): Update. + * varasm.c (mark_decl_referenced): Update. + (assemble_alias, dump_tm_clone_pairs): Update. + * tree-inline.c (copy_bb): Update. + (estimate_num_insns, optimize_inline_calls, tree_function_versioning): + Update. + * symtab.c (dump_symtab_base): Print new flags. + (verify_symtab_base): Verify new flags. + (symtab_alias_ultimate_target): New function. + * tree-ssa-structalias.c (get_constraint_for_ssa_var, + create_variable_info_for, associate_varinfo_to_alias, ipa_pta_execute): + Update. + * passes.c (ipa_write_summaries, ipa_write_optimization_summaries): + Update. + * i386.c (ix86_get_function_versions_dispatcher, + ix86_generate_version_dispatcher_body): Update. + (fold_builtin_cpu): Use varpool_add_new_variable. + * varpool.c (varpool_remove_initializer): Break out from ... + (varpool_remove_node): ... this one. + (dump_varpool_node, varpool_node_for_asm, + cgraph_variable_initializer_availability, varpool_analyze_node, + varpool_assemble_decl, varpool_remove_unreferenced_decls, + varpool_finalize_named_section_flags, varpool_create_variable_alias): + Update. + +2013-05-29 Jan Hubicka <jh@suse.cz> + + * passes.c (init_optimization_passes): Move OMP expansion into lowering. + +2013-05-29 Easwaran Raman <eraman@google.com> + + PR tree-optimization/57442 + * tree-ssa-reassoc.c (appears_later_in_bb): Return correct value + when control exits the main loop. + +2013-05-29 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com> + + * rx/rx.h (TARGET_CPU_CPP_BUILTINS): Add macros for RX100, RX200, + and RX600. + * rx/rx.opt: Add macro for rx100 with string rx100 and value RX100. + * rx/rx-opts.h (rx_cpu_types): Add new cpu type rx100. + * rx/t-rx: Add rx100 under multi library matches option for nofpu + option. + +2013-05-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR tree-optimization/57441 + * gimple-ssa-strength-reduction.c (analyze_candidates_and_replace): + Don't limit size of incr_vec to number of candidates. + +2013-05-29 Steve Ellcey <sellcey@imgtec.com> + + * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add micromips + and mips16 directories. + * config/mips/t-mti-linux (MULTILIB_OPTIONS): Add micromips and mips16. + (MULTILIB_DIRNAMES): Ditto. + (MULTILIB_EXCEPTIONS): Add new exceptions. + * config/mips/t-mti-elf (MULTILIB_OPTIONS): Add micromips. + (MULTILIB_DIRNAMES): Ditto. + (MULTILIB_EXCEPTIONS): Add new exceptions. + +2012-05-29 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_symbol_type): Define + SYMBOL_TINY_ABSOLUTE. + * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Handle + SYMBOL_TINY_ABSOLUTE. + (aarch64_expand_mov_immediate): Likewise. + (aarch64_classify_symbol): Likewise. + (aarch64_mov_operand_p): Remove ATTRIBUTE_UNUSED. + Permit SYMBOL_TINY_ABSOLUTE. + * config/aarch64/predicates.md (aarch64_mov_operand): Permit CONST. + +2013-05-29 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_symbol): Remove comment. + Refactor if/switch. Replace gcc_assert with if. + +2013-05-29 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c (initial_ix86_tune_features): Enable + FP Reassociation for AMD bdver1 and bdver2. + +2013-05-29 Martin Jambor <mjambor@suse.cz> + + * tree-cfg.c (verify_expr): Verify that BIT_FIELD_REF, REALPART_EXPR + and IMAGPART_EXPR do not occur within other handled_components. + +2013-05-29 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_bb_slp_scalar_cost): Guard vinfo + access on whether the use is in the BB we currently try to + vectorize. + (vect_bb_vectorization_profitable_p): Pass the BB we currently + vectorize to vect_bb_slp_scalar_cost. + +2013-05-29 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_bb_slp_scalar_cost): New function + computing scalar cost offsetted by stmts that are kept live + by scalar uses. + (vect_bb_vectorization_profitable_p): Use vect_bb_slp_scalar_cost + for computation of scalar cost. + +2013-05-28 Steve Ellcey <sellcey@mips.com> + + * config/mips/mips-cpus.def (mips32r2): Change processor type. + +2013-05-28 Balaji V. Iyer <balaji.v.iyer@intel.com> + + * doc/extend.texi (C Extensions): Added documentation about Cilk Plus + array notation built-in reduction functions. + * doc/passes.texi (Passes): Added documentation about changes done + for Cilk Plus. + * doc/invoke.texi (C Dialect Options): Added documentation about + the -fcilkplus flag. + * Makefile.in (C_COMMON_OBJS): Added c-family/array-notation-common.o. + (BUILTINS_DEF): Depend on cilkplus.def. + * builtins.def: Include cilkplus.def. Define DEF_CILKPLUS_BUILTIN. + * builtin-types.def: Define BT_FN_INT_PTR_PTR_PTR. + * cilkplus.def: New file. + +2013-05-28 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57439 + * postreload.c (move2add_use_add2_insn): Use gen_lowpart_common. + +2013-05-28 Easwaran Raman <eraman@google.com> + + PR tree-optimization/57337 + * tree-ssa-reassoc.c (appears_later_in_bb): New function. + (find_insert_point): Correctly identify the insertion point + when two statements with the same UID is compared. + +2013-05-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56787 + * tree-vect-data-refs.c (vect_analyze_data_refs): Drop clobbers + from the list of data references. + * tree-vect-loop.c (vect_determine_vectorization_factor): Skip + clobbers. + (vect_analyze_loop_operations): Likewise. + (vect_transform_loop): Remove clobbers. + +2013-05-28 Martin Jambor <mjambor@suse.cz> + + * tree-cfg.c (verify_expr): Verify that BIT_FIELD_REFs, IMAGPART_EXPRs + and REALPART_EXPRs have scalar type. + +2013-05-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57411 + * tree-ssa-copy.c (may_propagate_copy): Cannot propagate + virtual operands. + * tree-ssa-dom.c (eliminate_const_or_copy): Special-case + virtual operand propagation. + +2013-05-28 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (sparc_expand_vec_perm_bmask): Use %g0 as + destination register for bmasksi_vis. + (vector_init_bshuffle): Likewise. + * config/sparc/sparc.md (vec_perm_constv8qi): Likewise. + +2013-05-28 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (SPARC Options): Document -mfix-ut699. + * builtins.c (expand_builtin_mathfn) <BUILT_IN_SQRT>: Try to widen the + mode if the instruction isn't available in the original mode. + * config/sparc/sparc.opt (mfix-ut699): New option. + * config/sparc/sparc.md (muldf3_extend): Disable if -mfix-ut699. + (divdf3): Turn into expander. + (divdf3_nofix): New insn. + (divdf3_fix): Likewise. + (divsf3): Disable if -mfix-ut699. + (sqrtdf2): Turn into expander. + (sqrtdf2_nofix): New insn. + (sqrtdf2_fix): Likewise. + (sqrtsf2): Disable if -mfix-ut699. + +2013-05-27 Richard Biener <rguenther@suse.de> + + PR middle-end/57412 + * omp-low.c (expand_omp_atomic_pipeline): Use the correct latch + block for the new loop. + +2013-05-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57343 + * tree-ssa-loop-niter.c (number_of_iterations_ne_max): Do not + use multiple_of_p if not TYPE_OVERFLOW_UNDEFINED. + (number_of_iterations_cond): Do not build the folded tree. + +2013-05-27 Richard Biener <rguenther@suse.de> + + Revert + PR middle-end/57381 + * fold-const.c (operand_equal_p): Compare FIELD_DECLs with + OEP_CONSTANT_ADDRESS_OF retained. + + PR tree-optimization/57417 + * tree-ssa-sccvn.c (vn_reference_fold_indirect): Fix test + for unchanged base. + (set_ssa_val_to): Compare addresses using + get_addr_base_and_unit_offset. + +2013-05-27 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/56833 + * postreload.c (move2add_record_mode): New function. + (move2add_record_sym_value, move2add_valid_value_p): Likewise. + (move2add_use_add2_insn): Use move2add_record_sym_value. + (move2add_use_add3_insn): Likewise. + (reload_cse_move2add): Use move2add_valid_value_p and + move2add_record_mode. Invalidate call-clobbered and REG_INC + affected regs by setting reg_mode to VOIDmode. + (move2add_note_store): Don't pretend the inside of a SUBREG is + the actual destination. Invalidate single/leading registers by + setting reg_mode to VOIDmode. + Use move2add_record_sym_value, move2add_valid_value_p and + move2add_record_mode. + +2013-05-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57396 + * tree-affine.c (double_int_constant_multiple_p): Properly + return false for val == 0 and div != 0. + +2013-05-25 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.h: Use #elif in preprocessor conditions. + +2013-05-25 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/53916 + * config/mips/constraints.md (kl): New constraint. + * config/mips/mips.md (divmod<mode>4, udivmod<mode>4): Delete. + (divmod<mode>4_internal): Rename to divmod<mode>4. Use "kl" as the + constraint for operand 0. Split after CSE for MIPS16. Emit a move + from LO for MIPS16. + (udivmod<mode>4_internal): Likewise udivmod<mode>4. + +2013-05-25 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/55777 + * config/mips/mips.c (mips_can_inline_p): New function. + (TARGET_CAN_INLINE_P): Define. + +2013-05-25 Steven Bosscher <steven@gcc.gnu.org> + + * sched-int.h (ds_t, dw_t): Make unsigned int. + Fix documentation that describes how all the ds_t bits are used. + Reserve the last bit for delayed-branch scheduling. + (BITS_PER_DEP_STATUS): Move to ds_t typedef. + (BITS_PER_DEP_WEAK): Fix definition and documentation. + (gen_dep_weak_1): Remove prototype. + * sched-deps.c (get_dep_weak_1): Make static. + * target.def (speculate_insn, needs_block_p, gen_spec_check, + get_insn_spec_ds, get_insn_checked_ds): Adjust hook prototypes. + * doc/tm.texi: Regenerate. + * config/ia64/ia64.c (ia64_needs_block_p): Update prototype. + +2013-05-24 Steven Bosscher <steven@gcc.gnu.org> + + PR debug/56950 + * haifa-sched.c (sched_extend_bb): Ignore DEBUG_INSNs. + +2013-05-24 Nathan Sidwell <nathan@codesourcery.com> + Sandra Loosemore <sandra@codesourcery.com> + + * config.gcc (powerpc-*): Allow native for with-cpu. + +2013-05-24 Jeff Law <law@redhat.com> + + PR tree-optimization/57124 + * tree-vrp.c (simplify_cond_using_ranges): Only simplify a + conversion feeding a condition if the range has an overflow + if -fstrict-overflow. Add warnings for when we do make the + transformation. + +2013-05-24 Dehao Chen <dehao@google.com> + + * tree-cfg.c (locus_discrim_map): Fix the typo. + (locus_discrim_hasher): Likewise. + (locus_discrim_hasher::hash): Likewise. + (locus_discrim_hasher::equal): Likewise. + +2013-05-24 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/57294 + * cgraph.h (ipa_record_stmt_references): Declare. + * cgraphbuild.c (ipa_record_stmt_references): New function. + (build_cgraph_edges): Use ipa_record_stmt_references. + (rebuild_cgraph_edges): Likewise. + (cgraph_rebuild_references): Likewise. + * ipa-prop.c (ipa_modify_call_arguments): Discard references + associated with the old statement and build references from the + newly built statements. + * ipa-ref.c (ipa_remove_stmt_references): New function. + * ipa-ref.h (ipa_remove_stmt_references): Declare. + +2013-05-24 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (emit_spill_move): Use smaller mode for + mem-mem moves. + (check_and_process_move): Consider mem-reg moves for secondary + too. + (curr_insn_transform): Don't lose insns emitted before for + secondary memory moves. + (inherit_in_ebb): Mark defined reg. Add usage only if it is not a + reg set up in the current insn. + +2013-05-24 Dehao Chen <dehao@google.com> + + * tree-cfg.c (locus_descrim_hasher::hash): Change discriminator + hash function. + (locus_descrim_hasher::equal): Likewise. + (build_gimple_cfg): New discriminator assignment algorithm. + (make_edges): Likewise. + (next_discriminator_for_locus): Likewise. + (same_line_p): Likewise. + (assign_discriminators): Likewise. + (make_cond_expr_edges): Likewise. + (make_gimple_switch_edges): Likewise. + (make_goto_expr_edges): Likewise. + (make_gimple_asm_edges): Likewise. + +2013-05-24 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): Change the + X format specifier to only display bottom 16 bits. + * config/aarch64/aarch64.md (insv_imm<mode>): Allow any size of + immediate to match for operand 2, since it will be masked. + +2013-05-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57287 + * tree-ssa-uninit.c (compute_uninit_opnds_pos): Disregard + all SSA names that occur in abnormal PHIs. + +2013-05-24 Alexander Ivchenko <alexander.ivchenko@intel.com> + + PR tree-ssa/57385 + * tree-ssa-sccvn.c (fully_constant_vn_reference_p): Check + that index is not negative. + +2013-05-24 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/55177 + * simplify-rtx.c (simplify_unary_operation_1) <NOT>: Deal with BSWAP. + (simplify_byte_swapping_operation): New. + (simplify_binary_operation_1): Call it for AND, IOR and XOR. + (simplify_relational_operation_1): Deal with BSWAP. + +2013-05-23 Richard Henderson <rth@redhat.com> + + PR target/56742 + * config/i386/i386.c (ix86_seh_fixup_eh_fallthru): New. + (ix86_reorg): Call it. + +2013-05-23 Uros Bizjak <ubizjak@gmail.com> + + PR target/57379 + * config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE. + * config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct + REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec. + +2013-05-23 Christian Bruel <christian.bruel@st.com> + + PR debug/57351 + * config/arm/arm.c (arm_dwarf_register_span): Do not use dbx number. + +2013-05-23 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64.md (*movdi_aarch64): Replace Usa with S. + * config/aarch64/constraints.md (Usa): Remove. + * doc/md.texi (AArch64 Usa): Remove. + +2013-05-23 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> + Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_mov_operand_p): Define. + * config/aarch64/aarch64.c (aarch64_mov_operand_p): Define. + * config/aarch64/predicates.md (aarch64_const_address): Remove. + (aarch64_mov_operand): Use aarch64_mov_operand_p. + +2013-05-23 Vidya Praveen <vidyapraveen@arm.com> + + * config/aarch64/aarch64-simd.md (clzv4si2): Support for CLZ + instruction (AdvSIMD). + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Handler for BUILT_IN_CLZ. + * config/aarch64/aarch-simd-builtins.def: Entry for CLZ. + +2013-05-23 Martin Jambor <mjambor@suse.cz> + + PR middle-end/57347 + * tree.h (contains_bitfld_component_ref_p): Declare. + * tree-sra.c (contains_bitfld_comp_ref_p): Move... + * tree.c (contains_bitfld_component_ref_p): ...here. Adjust its + caller. + * ipa-prop.c (determine_known_aggregate_parts): Check that LHS does + not access a bit-field. Assert all final offsets are byte-aligned. + +2013-05-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57380 + * tree-ssa-phiprop.c (propagate_with_phi): Do not require at + least one invariant or re-used load. + * passes.c (init_optimization_passes): Move pass_phiprop before + pass_forwprop. + +2013-05-23 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_cm<optab>di): Add clobber of CC_REGNUM to unsplit pattern. + +2013-05-23 Richard Biener <rguenther@suse.de> + + PR middle-end/57381 + * fold-const.c (operand_equal_p): Compare FIELD_DECLs with + OEP_CONSTANT_ADDRESS_OF retained. + +2013-05-23 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/57344 + * expmed.c (store_split_bit_field): If op0 is a REG or SUBREG of a REG, + don't lower unit. Handle unit not being always BITS_PER_WORD. + +2013-05-23 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/57341 + * ira.c (validate_equiv_mem_from_store): Use anti_dependence + instead of true_dependence. + +2013-05-22 David Malcolm <dmalcolm@redhat.com> + + * bb-reorder.c (branch_threshold): Make const. + (exec_threshold): Ditto. + +2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add + documentation for the power8 crypto builtins. + + * config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md. + + * config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support + macros for defining power8 builtin functions. + (BU_P8V_AV_2): Likewise. + (BU_P8V_AV_P): Likewise. + (BU_P8V_VSX_1): Likewise. + (BU_P8V_OVERLOAD_1): Likewise. + (BU_P8V_OVERLOAD_2): Likewise. + (BU_CRYPTO_1): Likewise. + (BU_CRYPTO_2): Likewise. + (BU_CRYPTO_3): Likewise. + (BU_CRYPTO_OVERLOAD_1): Likewise. + (BU_CRYPTO_OVERLOAD_2): Likewise. + (XSCVSPDP): Fix typo, point to the correct instruction. + (VCIPHER): Add power8 crypto builtins. + (VCIPHERLAST): Likewise. + (VNCIPHER): Likewise. + (VNCIPHERLAST): Likewise. + (VPMSUMB): Likewise. + (VPMSUMH): Likewise. + (VPMSUMW): Likewise. + (VPERMXOR_V2DI): Likewise. + (VPERMXOR_V4SI: Likewise. + (VPERMXOR_V8HI: Likewise. + (VPERMXOR_V16QI: Likewise. + (VSHASIGMAW): Likewise. + (VSHASIGMAD): Likewise. + (VPMSUM): Likewise. + (VPERMXOR): Likewise. + (VSHASIGMA): Likewise. + + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define + __CRYPTO__ if the crypto instructions are available. + (altivec_overloaded_builtins): Add support for overloaded power8 + builtins. + + * config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add + support for power8 crypto builtins. + (builtin_function_type): Likewise. + (altivec_init_builtins): Add support for builtins that take vector + long long (V2DI) arguments. + + * config/rs6000/crypto.md: New file, define power8 crypto + instructions. + +2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * doc/invoke.texi (Option Summary): Add power8 options. + (RS/6000 and PowerPC Options): Likewise. + + * doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use + constraints.md instead of rs6000.h. Reorder w* constraints. Add + wm, wn, wr documentation. + + * config/rs6000/constraints.md (wm): New constraint for VSX + registers if direct move instructions are enabled. + (wn): New constraint for no registers. + (wq): New constraint for quad word even GPR registers. + (wr): New constraint if 64-bit instructions are enabled. + (wv): New constraint if power8 vector instructions are enabled. + (wQ): New constraint for quad word memory locations. + + * config/rs6000/predicates.md (const_0_to_15_operand): New + constraint for 0..15 for crypto instructions. + (gpc_reg_operand): If VSX allow registers in VSX registers as well + as GPR and floating point registers. + (int_reg_operand): New predicate to match only GPR registers. + (base_reg_operand): New predicate to match base registers. + (quad_int_reg_operand): New predicate to match even GPR registers + for quad memory operations. + (vsx_reg_or_cint_operand): New predicate to allow vector logical + operations in both GPR and VSX registers. + (quad_memory_operand): New predicate for quad memory operations. + (reg_or_indexed_operand): New predicate for direct move support. + + * config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED): + Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS. + (ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8). + (POWERPC_MASKS): Add power8 options. + (power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the + various options. + + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): + Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8. + + * config/rs6000/rs6000.opt (-mvsx-timode): Add documentation. + (-mpower8-fusion): New power8 options. + (-mpower8-fusion-sign): Likewise. + (-mpower8-vector): Likewise. + (-mcrypto): Likewise. + (-mdirect-move): Likewise. + (-mquad-memory): Likewise. + + * config/rs6000/rs6000.c (power8_cost): Initial definition for power8. + (rs6000_hard_regno_mode_ok): Make PTImode only match even GPR + registers. + (rs6000_debug_reg_print): Print the base register class if -mdebug=reg. + (rs6000_debug_vector_unit): Add p8_vector. + (rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint + definitions. Also print fusion state. + (rs6000_init_hard_regno_mode_ok): Set up power8 constraints. + (rs6000_builtin_mask_calculate): Add power8 builtin support. + (rs6000_option_override_internal): Add support for power8. + (rs6000_common_init_builtins): Add debugging for skipped builtins + if -mdebug=builtin. + (rs6000_adjust_cost): Add power8 support. + (rs6000_issue_rate): Likewise. + (insn_must_be_first_in_group): Likewise. + (insn_must_be_last_in_group): Likewise. + (force_new_group): Likewise. + (rs6000_register_move_cost): Likewise. + (rs6000_opt_masks): Likewise. + + * config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a + power8 capable assembler, default to power7 options. + (TARGET_DIRECT_MOVE): Likewise. + (TARGET_CRYPTO): Likewise. + (TARGET_P8_VECTOR): Likewise. + (VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support. + (VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise. + (VECTOR_MEM_P8_VECTOR_P): Likewise. + (VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise. + (VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise. + (TARGET_XSCVDPSPN): Likewise. + (TARGET_XSCVSPDPN): Likewsie. + (TARGET_SYNC_HI_QI): Likewise. + (TARGET_SYNC_TI): Likewise. + (MASK_CRYPTO): Likewise. + (MASK_DIRECT_MOVE): Likewise. + (MASK_P8_FUSION): Likewise. + (MASK_P8_VECTOR): Likewise. + (REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the TFmode + temporary used by some of the direct move instructions to get two FP + temporary registers does not force creation of a stack frame. + (VLOGICAL_REGNO_P): Allow vector logical operations in GPRs. + (MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so + that any VSX registers are tieable, even if they are also an + Altivec vector mode. + (r6000_reg_class_enum): Add wm, wr, wv constraints. + (RS6000_BTM_P8_VECTOR): Power8 builtin support. + (RS6000_BTM_CRYPTO): Likewise. + (RS6000_BTM_COMMON): Likewise. + + * config/rs6000/rs6000.md (cpu attribute): Add power8. + * config/rs6000/rs6000-opts.h (PROCESSOR_POWER8): Likewise. + (enum rs6000_vector): Add power8 vector support. + +2013-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + PR target/57340 + * config/arm/arm.c (any_sibcall_uses_r3): Rename to .. + (any_sibcall_could_use_r3): this and handle indirect calls. + (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3. + +2013-05-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/rs6000.h (MALLOC_ABI_ALIGNMENT): New #define. + +2013-05-22 Richard Biener <rguenther@suse.de> + + PR middle-end/57349 + * profile.c (branch_prob): Do not split blocks that are + abnormally receiving from ECF_RETURNS_TWICE functions. + +2013-05-22 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * recog.c (offsettable_address_addr_space_p): Fix calculation of + address mode. Move pointer mode initialization to the same place. + +2013-05-22 Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * read-rtl.c (copy_rtx_for_iterators): Continue applying iterators + while it has any effect. + +2013-05-21 Easwaran Raman <eraman@google.com> + + PR tree-optimization/57322 + * tree-ssa-reassoc.c (build_and_add_sum): If a BB is empty, set the + UID of the statement added to the BB to be 1. + +2013-05-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57331 + * tree-vrp.c (simplify_cond_using_ranges): Don't optimize comparison + of conversion from pointer type to integral type with integer. + +2013-05-21 Martin Jambor <mjambor@suse.cz> + + PR lto/57289 + * ipa-prop.c (ipa_read_node_info): Process param_used and + controlled_uses in the same order as when writing. + +2013-05-21 Magnus Granberg <baldrick@free.fr> + + PR plugins/56754 + * Makefile.in (PLUGIN_HEADERS): Add $(TARGET_H). + +2013-05-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57318 + * tree-ssa-loop-ivcanon.c (tree_estimate_loop_size): Do not + estimate stmts with side-effects as likely eliminated. + +2013-05-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57330 + * cgraph.c (cgraph_redirect_edge_call_stmt_to_callee): Properly + preserve the call stmts fntype. + +2013-05-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57303 + * tree-ssa-sink.c (statement_sink_location): Improve killing + stmt detection and properly handle self-assignments. + +2013-05-21 Christian Bruel <christian.bruel@st.com> + + * dwarf2out.c (multiple_reg_loc_descriptor): Use dbx_reg_number for + spanning registers. LEAF_REG_REMAP is supported only for contiguous + registers. Set register size out of the PARALLEL loop. + +2013-05-20 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/56547 + * config/sh/sh.md (fmasf4): Remove empty constraints strings. + (*fmasf4, *fmasf4_media): New insns. + +2013-05-19 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.h (BASE_INSN_LENGTH, NOP_INSN_LENGTH): New macros. + * config/mips/mips.c (mips_symbol_insns, mips_address_insns) + (mips_const_insns, mips_split_const_insns, mips_load_store_insns) + (mips_idiv_insns): Update the comments to say that the returned + instruction counts are in units of BASE_INSN_LENGTH. + (mips_adjust_insn_length): Multiply the mips_load_label_num_insns + by BASE_INSN_LENGTH rather than 4. Add the jump separately, + using 2 rather than 4 as the length of indirect MIPS16 and + microMIPS jumps. Use NOP_INSN_LENGTH rather than 4 as the + length of a NOP. Don't divide MIPS16 lengths by 2. + (mips16_split_long_branches): Assume a branch is long if the + length is greater than 4 rather than 8. + * config/mips/mips.md (length): Give MIPS16 lengths directly, + rather than multiplying them by 2. Multiply instruction counts + by BASE_INSN_LENGTH rather than 4. + (*jump_mips16, tls_get_tp_mips16_<mode>) + (*tls_get_tp_mips16_call_<mode>): Divide lengths by 2. + +2013-05-19 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.md (extended_mips16): Remove branch case. + (length): Remove duplicated extended_mips16 test. + +2013-05-19 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/t-sde: Don't build 64-bit microMIPS multilibs. + +2013-05-18 Richard Sandiford <rdsandiford@googlemail.com> + + * recog.h (Recog_data): Rename to... + (recog_data_d): ...this. + (recog_data): Update accordingly. + * recog.c (recog_data): Likewise. + * reload.c (save_recog_data): Likewise. + * config/picochip/picochip.c (picochip_saved_recog_data): Likewise. + (picochip_save_recog_data, picochip_restore_recog_data): Likewise. + +2013-05-17 Julian Brown <julian@codesourcery.com> + + * gcse.c (compute_ld_motion_mems): If a non-simple MEM is + found in a REG_EQUAL note, invalidate it. + +2013-05-17 Easwaran Raman <eraman@google.com> + + * tree-ssa-reassoc.c (find_insert_point): New function. + (insert_stmt_after): Likewise. + (get_def_stmt): Likewise. + (ensure_ops_are_available): Likewise. + (not_dominated_by): Likewise. + (rewrite_expr_tree): Do not move statements beyond what is + necessary. Remove call to swap_ops_for_binary_stmt... + (reassociate_bb): ... and move it here. + (build_and_add_sum): Assign UIDs for new statements. + (linearize_expr): Likewise. + (do_reassoc): Renumber gimple statement UIDs. + +2013-05-17 Jan Hubicka <jh@suse.cz> + + * lto-symtab.c (lto_symtab_merge_cgraph_nodes): Resolve cross module + weakrefs. + * cgraph.c (dump_cgraph_node): Do not ice on unresolved alias. + * cgraphunit.c (handle_alias_pairs): Store target of unresolved + weakrefs. + (output_weakrefs): Update. + +2013-05-17 Po-Chun Chang <pchang9@cs.wisc.edu> + Martin Jambor <mjambor@suse.cz> + + PR middle-end/57276 + * ipa-cp.c (cgraph_edge_brings_all_agg_vals_for_node): Break when a + value that corresponds to the given aggval is found in values vector. + +2013-05-17 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/driver-i386.c (host_detect_local_cpu): Pass mmx, 3dnow, + sse, sse2, sse3, ssse3 and sse4a flags to options. + +2013-05-17 David Malcolm <dmalcolm@redhat.com> + + * gengtype-state.c: (s_expr_writer): New class, to handle + prettifying of output layout of s-expressions. + (state_writer): New class, to write out gtype.state. + (state_written_type_count): Move this variable into member data of + state_writer. + (s_expr_writer::s_expr_writer): New code: constructor for new class + (state_writer::state_writer(): ditto + (s_expr_writer::write_new_line): New function + (s_expr_writer::write_any_indent): ditto + (s_expr_writer::begin_s_expr): ditto + (s_expr_writer::end_s_expr): ditto + (write_state_fileloc): convert to method of state_writer... + (state_writer:: write_state_fileloc): ...and use methods of + s_expr_writer to write indentation into the gtype.state output file + to visually represent the hierarchical structure of the list + structures + (write_state_fields): ditto, renaming to... + (state_writer::write_state_fields) + (write_state_a_string): ditto, renaming to... + (state_writer::write_state_a_string) + (write_state_string_option): ditto, renaming to... + (state_writer::write_state_string_option) + (write_state_type_option): ditto, renaming to... + (state_writer::write_state_type_option) + (write_state_nested_option): ditto, renaming to... + (state_writer::write_state_nested_option) + (write_state_option): ditto, renaming to... + (state_writer::write_state_option) + (write_state_options): ditto, renaming to... + (state_writer::write_state_options) + (write_state_lang_bitmap): ditto, renaming to... + (state_writer::write_state_lang_bitmap) + (write_state_version): ditto, renaming to... + (state_writer::write_state_version) + (write_state_scalar_type): ditto, renaming to... + (state_writer::write_state_scalar_type) + (write_state_string_type): ditto, renaming to... + (state_writer::write_state_string_type) + (write_state_undefined_type): ditto, renaming to... + (state_writer::write_state_undefined_type) + (write_state_struct_union_type): ditto, renaming to... + (state_writer::write_state_struct_union_type) + (write_state_struct_type): ditto, renaming to... + (state_writer::write_state_struct_type) + (write_state_user_struct_type): ditto, renaming to... + (state_writer::write_state_user_struct_type) + (write_state_lang_struct_type): ditto, renaming to... + (state_writer::write_state_lang_struct_type) + (write_state_param_struct_type): ditto, renaming to... + (state_writer::write_state_param_struct_type) + (write_state_pointer_type): ditto, renaming to... + (state_writer::write_state_pointer_type) + (write_state_array_type): ditto, renaming to... + (state_writer::write_state_array_type) + (write_state_gc_used): ditto, renaming to... + (state_writer::write_state_gc_used) + (write_state_common_type_content): ditto, renaming to... + (state_writer::write_state_common_type_content) + (write_state_type): ditto, renaming to... + (state_writer::write_state_type) + (write_state_pair_list): ditto, renaming to... + (state_writer::write_state_pair_list) + (write_state_pair): ditto, renaming to... + (state_writer::write_state_pair) + (write_state_typedefs): ditto, renaming to... + (state_writer::write_state_typedefs) + (write_state_structures): ditto, renaming to... + (state_writer::write_state_structures) + (write_state_param_structs): ditto, renaming to... + (state_writer::write_state_param_structs) + (write_state_variables): ditto, renaming to... + (state_writer::write_state_variables) + (write_state_srcdir): ditto, renaming to... + (state_writer::write_state_srcdir) + (write_state_files_list): ditto, renaming to... + (state_writer::write_state_files_list) + (write_state_languages): ditto, renaming to... + (state_writer::write_state_languages) + (write_state): create a state_writer instance and use it when + writing out the state file + +2013-05-17 Mike Stump <mikestump@comcast.net> + + PR rtl-optimization/57304 + * web.c (union_match_dups): Ensure that DF_REF_LOC exists before + accessing DF_REF_REAL_LOC. + +2013-05-17 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/57281 + PR rtl-optimization/57300 + * config/i386/i386.md (extendsidi2_1 dead reg splitter): Remove. + (extendsidi2_1 peephole2s): Add instead 2 new peephole2s, that undo + what the other splitter did if the registers are dead. + +2013-05-17 Richard Biener <rguenther@suse.de> + + * tree-ssa-alias.c (stmt_kills_ref_p_1): Properly compare + MEM_REF offsets. + +2013-05-17 Jakub Jelinek <jakub@redhat.com> + + * gcc.c (SANITIZER_SPEC): Reject -fsanitize=address -fsanitize=thread + linking. + +2013-05-17 Marek Polacek <polacek@redhat.com> + + * tree-ssa-strlen.c (handle_char_store): Don't invalidate cached + length when doing non-zero store of storing '\0' to '\0'. + +2013-05-17 Jakub Jelinek <jakub@redhat.com> + + * tree-vect-patterns.c (vect_recog_rotate_pattern): For + vect_external_def oprnd1 with loop_vinfo, try to emit + optional cast, negation and and stmts on the loop preheader + edge instead of into the pattern def seq. + + PR tree-optimization/57051 + * fold-const.c (const_binop) <case VEC_LSHIFT_EXPR, + case VEC_RSHIFT_EXPR>: Fix BYTES_BIG_ENDIAN handling. + +2013-05-16 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78.c (rl78_attribute_table): Add naked. + (rl78_is_naked_func): New function. + (rl78_expand_prologue): Skip prologue generation for naked functions. + (rl78_expand_epilogue): Skip epilogue generation for naked functions. + * doc/extend.texi (naked): Add RL78 to the list of processors + that supports this attribute. + +2013-05-16 Jeff Law <law@redhat.com> + + * Makefile.in (tree-switch-conversion.o): Depend on $(OPTABS_H). + +2013-05-16 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/driver-i386.c (host_detect_local_cpu): Determine + cache parameters using detect_caches_amd also for CYRIX, + NSC and TM2 signatures. + +2013-05-16 Uros Bizjak <ubizjak@gmail.com> + Dzianis Kahanovich <mahatma@eu.by> + + PR target/45359 + PR target/46396 + * config/i386/driver-i386.c (host_detect_local_cpu): Detect + VIA/Centaur processors and determine their cache parameters + using detect_caches_amd. + +2013-05-16 Teresa Johnson <tejohnson@google.com> + + * cfgrtl.c (verify_hot_cold_block_grouping): Return err. + (rtl_verify_edges): New function. + (rtl_verify_bb_insns): Ditto. + (rtl_verify_bb_pointers): Ditto. + (rtl_verify_bb_insn_chain): Ditto. + (rtl_verify_fallthru): Ditto. + (rtl_verify_bb_layout): Ditto. + (rtl_verify_flow_info_1): Outline checks into new functions. + (rtl_verify_flow_info): Ditto. + +2013-05-16 Steve Ellcey <sellcey@imgtec.com> + + * cfghooks.c (copy_bbs): Add update_dominance argument. + * cfghooks.h (copy_bbs): Update prototype. + * tree-cfg.c (gimple_duplicate_sese_region): + Add update_dominance argument. + * tree-flow.h (gimple_duplicate_sese_region): Update prototype. + * tree-ssa-loop-ch.c (copy_loop_headers): Update + gimple_duplicate_sese_region call. + * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg): + Update copy_bbs call. + * cfgloopmanip.c (duplicate_loop_to_header_edge): Ditto. + * trans-mem.c (ipa_uninstrument_transaction): Ditto. + +2013-05-16 Jakub Jelinek <jakub@redhat.com> + + * tree-vectorizer.h (NUM_PATTERNS): Increment. + * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Add + vect_recog_rotate_pattern. + (vect_recog_rotate_pattern): New function. + +2013-05-16 Jason Merrill <jason@redhat.com> + + * Makefile.in (LLINKER): New variable. + (mostlyclean): Remove link mutex. + * configure.ac: Handle --enable-link-mutex. + * lock-and-run.sh: New script. + +2013-05-16 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + * config/arm/arm.c (arm_function_ok_for_sibcall): Add check + for NULL decl. + +2013-05-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * reorg.c (link_cc0_insns): Wrap in #ifdef HAVE_cc0. + +2013-05-16 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm-protos.h (gen_movmem_ldrd_strd): New declaration. + * config/arm/arm.c (next_consecutive_mem): New function. + (gen_movmem_ldrd_strd): Likewise. + * config/arm/arm.md (movmemqi): Update condition and code. + (unaligned_loaddi, unaligned_storedi): New patterns. + +2013-05-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * config.gcc: Obsolete *-*-solaris2.9*. + * doc/install.texi (Specific, *-*-solaris2*): Document it. + +2013-05-16 Richard Biener <rguenther@suse.de> + + * passes.c (init_optimization_passes): Move pass_parallelize_loops + earlier, after GRAPHITE transforms and IV canonicalization. + +2013-05-16 Jakub Jelinek <jakub@redhat.com> + + * omp-low.c (extract_omp_for_data): For collapsed loops, + if at least one of the loops is known at compile time to + iterate zero times, set count to 0. + (expand_omp_regimplify_p): New function. + (expand_omp_for_generic): For collapsed loops, if at least + one of the loops isn't known to iterate at least once, + add runtime check with setting count to 0. + (expand_omp_for_static_nochunk, expand_omp_for_static_chunk): + For unsigned types if it isn't known at compile time that + the loop will iterate at least once, add runtime check to bypass + the whole loop if initial condition isn't true. + +2013-05-16 Nathan Sidwell <nathan@codesourcery.com> + + * varasm.c (default_use_anchors_for_symbol_p): Use decl_replaceable_p. + +2013-05-16 Marc Glisse <marc.glisse@inria.fr> + + PR middle-end/57286 + * fold-const.c (fold_ternary_loc) <VEC_COND_EXPR>: Disable some + transformations to avoid an infinite loop. + +2013-05-16 Marek Polacek <polacek@redhat.com> + + * tree-scalar-evolution.c (scev_const_prop): Add more dumps. + +2013-05-15 Leif Ekblad <leif@rdos.net> + + * config/i386/i386.c (ix86_decompose_address): Use + DEFAULT_TLS_SEG_REG to access TLS segment register. + * config/i386/i386.h (DEFAULT_TLS_SEG_REG): New define. + * config/i386/rdos.h (DEFAULT_TLS_SEG_REG): Ditto. + (TARGET_TLS_DIRECT_SEG_REFS_DEFAULT): Ditto. + +2013-05-15 Richard Sandiford <rdsandiford@googlemail.com> + + PR target/57260 + * config/mips/mips.c (mips_function_ok_for_sibcall): Don't allow + sibling calls to functions that would normally be lazily bound, + unless $gp is call-clobbered. + +2013-05-15 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_option_override_internal): Update + processor_alias_table for missing PTA_PRFCHW and PTA_FXSR flags. Add + PTA_POPCNT to corei7 entry. Do not enable SSE prefetch on + non-SSE 3dNow! targets. Enable TARGET_PRFCHW for TARGET_3DNOW targets. + * config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW instead + of TARGET_3DNOW. + (*prefetch_3dnow): Enable for TARGET_PRFCHW only. + +2013-05-15 Andreas Schwab <schwab@suse.de> + + * config/m68k/m68k.md (*rotlhi3_lowpart, *rotlqi3_lowpart): Name + for rotlhi3+1 and rotlqi3+1, resp. Fix reference to non-existing + third operand. + +2013-05-15 Teresa Johnson <tejohnson@google.com> + + * loop-unroll.c (report_unroll_peel): Check decision before + emitting unroll/peel message. + +2013-05-15 Teresa Johnson <tejohnson@google.com> + + * function.h (has_bb_partition): New rtl_data flag. + (bb_reorder_complete): Ditto. + * cfgcleanup.c (try_crossjump_to_edge): Check for has_bb_partition + instead of flag_reorder_blocks_and_partition. + * cfgrtl.c (verify_hot_cold_block_grouping): Moved from bb-reorder.c, + with some enhancements. + (rtl_verify_flow_info_1): Call verify_hot_cold_block_grouping. + * bb-reorder.c (connect_traces): Check for has_bb_partition + instead of flag_reorder_blocks_and_partition. + (verify_hot_cold_block_grouping): Moved to cfgrtl.c. + (reorder_basic_blocks): Set bb_reorder_complete flag, remove call to + verify_hot_cold_block_grouping. + (partition_hot_cold_basic_blocks): Set has_bb_partition. + +2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/19599 + * config/arm/predicates.md (call_insn_operand): New predicate. + * config/arm/constraints.md ("Cs", "Ss"): New constraints. + * config/arm/arm.md (*call_insn, *call_value_insn): Match only + if insn is not a tail call. + (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through + registers. + * config/arm/arm.h (enum reg_class): New caller save register class. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling + without decls. + +2013-05-15 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_transform_loop): Use MSG_NOTE instead + of MSG_OPTIMIZED_LOCATIONS. + * tree-vect-slp.c (vect_make_slp_decision): Likewise. + (vect_slp_transform_bb): Indicate location in MSG_OPTIMIZED_LOCATIONS + message. + * tree-vectorizer.c (vectorize_loops): Use MSG_NOTE instead + of MSG_OPTIMIZED_LOCATIONS. + (execute_vect_slp): Likewise. + * tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound): Likewise. + (vect_create_cond_for_alias_checks): Likewise. + * tree-vect-patterns.c (vect_recog_dot_prod_pattern): Likewise. + (vect_recog_widen_mult_pattern): Likewise. + (vect_recog_widen_sum_pattern): Likewise. + (vect_recog_over_widening_pattern): Likewise. + (vect_recog_widen_shift_pattern): Likewise. + (vect_recog_vector_vector_shift_pattern): Likewise. + (vect_recog_divmod_pattern): Likewise. + (vect_recog_mixed_size_cond_pattern): Likewise. + (vect_recog_bool_pattern): Likewise. + (vect_pattern_recog_1): Likewise. + +2013-05-15 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.c (ipa_make_edge_direct_to_target): Redirect calls to + non-functions to builtin_unreachable. + * ipa-inline-transform.c (inline_call): Do not assert estimates were + correct when new direct edges were discovered. + +2013-05-15 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.c (ipa_print_node_jump_functions): Print symbol order in + header, print symbol order instead of node uid, print more information + about indirect edge targets. + (ipa_make_edge_direct_to_target): Print symbol order instead of node + uids. + (ipa_make_edge_direct_to_target): Likewise. + (remove_described_reference): Likewise. + (propagate_controlled_uses): Likewise. + (ipa_print_node_params): Also print symbol order. + (ipcp_transform_function): Print symbol order instead of node uids. + * cgraph.c (cgraph_redirect_edge_call_stmt_to_callee): Likewise. + (cgraph_get_create_real_symbol_node): Likewise. + * ipa-cp.c (print_lattice): Likewise. + (print_all_lattices): Likewise. + (determine_versionability): Likewise. + (initialize_node_lattices): Likewise. + (estimate_local_effects): Likewise. + (update_profiling_info): Likewise. + (create_specialized_node): Likewise. + (perhaps_add_new_callers): Likewise. + (decide_about_value): Likewise. + (decide_whether_version_node): Likewise. + (identify_dead_nodes): Likewise. + * ipa-inline-analysis.c (dump_inline_edge_summary): Likewise. + (dump_inline_summary): Likewise. + (estimate_node_size_and_time): Likewise. + (inline_analyze_function): Likewise. + * ipa-inline.c (report_inline_failed_reason): Likewise. + (want_early_inline_function_p): Likewise. + (edge_badness): Likewise. + (update_edge_key): Likewise. + (inline_small_functions): Likewise. Add dumping of order to two other + dumps. + * ipa-pure-const.c (pure_const_read_summary): Print symbol order + instead of node uids. + (propagate_pure_const): Likewise. + (propagate_pure_const): Likewise. + * ipa-utils.c (dump_cgraph_node_set): Likewise. + * lto-cgraph.c (input_node): Explicitly specify we dump uid. + * lto-symtab.c (lto_cgraph_replace_node): Print symbol order instead + of node uids. + * tree-pretty-print.c (dump_function_header): Likewise. + * tree-sra.c (convert_callers_for_node): Dump in traditional format. + Print symbol order instead of node uids. + +2013-05-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_register_move_cost): Don't impose the + FPR<->GPR move cost penalty if ldgr/lgdr can be used. + +2013-05-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57275 + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Fix + return value for fail to do runtime alias checks for gather loads. + +2013-05-15 Jan Hubicka <jh@suse.cz> + + PR lto/57038 + PR lto/47375 + * lto-symtab.c (lto_symtab_symbol_p): Add external symbol; + weakrefs are not external. + (lto_symtab_merge_decls): Fix thinko when dealing with + non-lto_symtab decls. + (lto_symtab_merge_cgraph_nodes): Use lto_symtab_symbol_p. + (lto_symtab_prevailing_decl): Get int sync with lto_symtab_symbol_p. + * varpool.c (dump_varpool_node): Dump more flags. + +2013-05-15 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c (processor_alias_table): Add instruction + FSGSBASE for AMD bdver3 architecture. + +2013-05-14 Jakub Jelinek <jakub@redhat.com> + + * tree.c (warn_deprecated_use): Print file:line using locus color. + * diagnostic.c (diagnostic_report_current_module): Print file:line + and file:line:column using locus color. + +2013-05-14 Mike Stump <mikestump@comcast.net> + + * gdbinit.in: Add __null. + +2013-05-14 Mike Stump <mikestump@comcast.net> + + * recog.h: Rename struct recog_data to Recog_data. + * recog.c: Likewise. + * reload.c (can_reload_into): Likewise. + * config/picochip/picochip.c: Likewise. + +2013-05-14 Mike Stump <mikestump@comcast.net> + + * web.c (union_match_dups): Also check DF_REF_REAL_LOC. + +2013-05-14 Steven Bosscher <steven@gcc.gnu.org> + + * resource.h (struct resources): Remove unch_memory member. + (CLEAR_RESOURCE): Don't clear unch_memory. + * resource.c (mark_referenced_resources): Don't set it. + (mark_set_resources): Likewise. + (mark_target_live_regs): Don't clear it. + (init_resource_info): Likewise. + * reorg.c (resource_conflicts_p): Don't compare it. + (redundant_insn): Don't set it. + + * rtl.h (next_label, skip_consecutive_labels, link_cc0_insns): + Remove prototypes. + * emit-rtl.c (next_label): Remove unused function. + (skip_consecutive_labels, link_cc0_insns): Move to ... + * reorg.c (skip_consecutive_labels, link_cc0_insns): ... here, the + only place where these functions are used, and make them static. + +2013-05-14 Marc Glisse <marc.glisse@inria.fr> + + * fold-const.c (fold_negate_expr): Handle vectors. + (fold_truth_not_expr): Make it static. + (fold_invert_truthvalue): New static function. + (invert_truthvalue_loc): Handle vectors. Do not call + fold_truth_not_expr directly. + (fold_unary_loc) <BIT_NOT_EXPR>: Handle comparisons. + <TRUTH_NOT_EXPR>: Do not cast to boolean. + (fold_comparison): Handle vector constants. + (fold_binary_loc) <TRUTH_XOR_EXPR>: Remove redundant code. + (fold_ternary_loc) <VEC_COND_EXPR>: Adapt more COND_EXPR optimizations. + * tree.h (fold_truth_not_expr): Remove declaration. + +2013-05-14 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_vcond_internal<mode>): Rename to... + (aarch64_vcond_internal<mode><mode>): ...This, for integer modes. + (aarch64_vcond_internal<VDQF_COND:mode><VDQF:mode>): ...This for + float modes. Clarify all iterator modes. + (vcond<mode><mode>): Use new name for vcond expanders. + (vcond<v_cmp_result><mode>): Likewise. + (vcondu<mode><mode>: Likewise. + * config/aarch64/iterators.md (VDQF_COND): New. + +2013-05-14 Marc Glisse <marc.glisse@inria.fr> + + PR bootstrap/57266 + * fold-const.c (fold_binary_loc) <shift>: Use an unsigned + variable for the shift amount. Check that we shift by non-negative + amounts. + +2013-05-14 Chung-Lin Tang <cltang@codesourcery.com> + + PR target/42017 + * config/arm/arm.h (EPILOGUE_USES): Only return true + for LR_REGNUM after epilogue_completed. + +2013-05-14 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/avr/avr.c (avr_encode_section_info): Bail out if the type + is error_mark_node. + +2013-05-14 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + PR target/57261 + * configure.ac (gcc_cv_ld_as_needed): Disable before Solaris 11 + and Solaris 11+/x86 with gld. + * configure: Regenerate. + +2013-05-14 Jakub Jelinek <jakub@redhat.com> + + * expmed.c (expand_shift_1): Canonicalize rotates by + constant bitsize / 2 to bitsize - 1. + * simplify-rtx.c (simplify_binary_operation_1) <case ROTATE, + case ROTATERT>: Likewise. + + Revert: + 2013-05-10 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.md (rotateinv): New code attr. + (*<rotate_insn><mode>3_1, *<rotate_insn>si3_1_zext, + *<rotate_insn>qi3_1_slp): Emit rorl %eax instead of + roll $31, %eax, etc. + +2013-05-14 Richard Biener <rguenther@suse.de> + + PR middle-end/57235 + * tree-eh.c (sink_clobbers): Give up for successors with + multiple predecessors and no virtual uses. + +2013-05-14 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sp64-elf.h (CPP_SUBTARGET_SPEC): Delete. + * config/sparc/openbsd64.h (CPP_SUBTARGET_SPEC): Likewise. + +2013-05-14 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/57251 + * expr.c (expand_expr_real_2) <case WIDEN_MULT_EXPR>: Handle + the case when both op0 and op1 have VOIDmode. + +2013-05-14 Kaushik Phatak <kaushik.phatak@kpitcummins.com> + + * config/rl78/rl78.md(mulsi3_g13): Add additional 'nop' required + in multiply-accumulate mode. + +2013-05-13 Guozhi Wei <carrot@google.com> + + * dwarf2asm.c (dw2_output_indirect_constant_1): Mark new decl STATIC. + +2013-05-13 Kai Tietz <ktietz@redhat.com> + + PR target/56975 + * config/i386/cygming.h (TARGET_PECOFF): Define as true. + * config/i386/i386.h (TARGET_PECOFF): Define by default as false. + (PIC_OFFSET_TABLE_REGNUM): Use TARGET_PECOFF. + * config/i386/i386.c (ix86_option_override_internal): Likewise. + (ix86_expand_prologue): Likewise. + (ix86_expand_split_stack_prologue): Likewise. + (legitimate_pic_address_disp_p): Likewise. + (legitimize_pic_address): Likewise. + (legitimize_tls_address): Likewise. + (legitimize_pe_coff_symbol): Likewise. + (output_pic_addr_const): Likewise. + (construct_plt_address): Likewise. + (ix86_expand_call): Likewise. + (x86_output_mi_thunk): Likewise. + (x86_function_profiler): Likewise. + +2013-05-13 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_mov<mode>): Group + similar switch cases. + (aarch64_simd_mov): Rename to aarch64_split_simd_mov. Update. + (aarch64_simd_mov_to_<mode>low): Delete. + (aarch64_simd_mov_to_<mode>high): Delete. + (move_lo_quad_<mode>): Add w<-r alternative. + (aarch64_simd_move_hi_quad_<mode>): Likewise. + (aarch64_simd_mov_from_*): Update type attribute. + * config/aarch64/aarch64.c (aarch64_split_simd_move): Refacror switch + statement. + +2013-05-13 Jan Hubicka <jh@suse.cz> + + * mode-switching.c (optimize_mode_switching): Set correct RTL profile. + * config/i386/i386.c (ix86_compute_frame_layout, + ix86_expand_epilogue, emit_i387_cw_initialization, + ix86_expand_vector_move_misalign, ix86_fp_comparison_strategy, + ix86_local_alignment): Fix use of size/speed predicates. + +2013-05-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/45216 + PR tree-optimization/57157 + * tree-ssa-forwprop.c (simplify_rotate): Only recognize + the (-Y) & (B - 1) variant if OP is |. + * expmed.c (expand_shift_1): For rotations by const0_rtx just + return shifted. Use (-op1) & (prec - 1) as other_amount + instead of prec - op1. + +2013-05-13 Martin Jambor <mjambor@suse.cz> + + PR middle-end/42371 + * ipa-prop.h (IPA_UNDESCRIBED_USE): New macro. + (ipa_constant_data): New type. + (ipa_jump_func): Use ipa_constant_data to hold information about + constant jump functions. + (ipa_get_jf_constant): Adjust to jump function type changes. + (ipa_get_jf_constant_rdesc): New function. + (ipa_param_descriptor): New field controlled_uses. + (ipa_get_controlled_uses): New function. + (ipa_set_controlled_uses): Likewise. + * ipa-ref.h (ipa_find_reference): Declare. + * ipa-prop.c (ipa_cst_ref_desc): New type. + (ipa_print_node_jump_functions_for_edge): Adjust for jump function type + changes. + (ipa_set_jf_constant): Likewise. Also create reference descriptions. + New parameter cs. Adjust all callers. + (ipa_analyze_params_uses): Detect uncontrolled and controlled uses. + (remove_described_reference): New function. + (jfunc_rdesc_usable): Likewise. + (try_make_edge_direct_simple_call): Decrement controlled use count, + attempt to remove reference if it hits zero. + (combine_controlled_uses_counters): New function. + (propagate_controlled_uses): Likewise. + (ipa_propagate_indirect_call_infos): Call propagate_controlled_uses. + (ipa_edge_duplication_hook): Duplicate reference descriptions. + (ipa_print_node_params): Print described use counter. + (ipa_write_jump_function): Adjust to jump function type changes. + (ipa_read_jump_function): New parameter CS, pass it to + ipa_set_jf_constant. Adjust caller. + (ipa_write_node_info): Stream controlled use count + (ipa_read_node_info): Likewise. + * cgraph.c (cgraph_mark_address_taken_node): Bail out instead of + asserting. + * ipa-cp.c (ipcp_discover_new_direct_edges): Decrement controlled use + count. Remove cloning-added reference if it reaches zero. + * ipa-ref.c (ipa_find_reference): New function. + +2013-05-13 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/i386/i386.c (processor_target_table): Modified default + alignment values for AMD BD and BT architectures. + +2013-05-13 Marc Glisse <marc.glisse@inria.fr> + + * tree-vect-generic.c (uniform_vector_p): Move ... + * tree.c (uniform_vector_p): ... here. + * tree.h (uniform_vector_p): Declare it. + * fold-const.c (fold_binary_loc) <shift>: Turn the second argument + into a scalar. + +2013-05-13 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57230 + * tree-ssa-strlen.c (handle_char_store): Record length for + array store from STRING_CST. + + PR tree-optimization/57230 + * tree-ssa-strlen.c (handle_char_store): Add missing integer_zerop + check. + +2013-05-12 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_init): Check size of + NUM_MODES_FOR_MODE_SWITCHING. + (epiphany_expand_prologue): + Remove CONFIG_REGNUM initial value handling code. + (epiphany_optimize_mode_switching): Handle EPIPHANY_MSW_ENTITY_CONFIG. + (epiphany_mode_needed, epiphany_mode_entry_exit): Likewise. + (emit_set_fp_mode, epiphany_mode_after): Likewise. + (epiphany_mode_needed) <Handle EPIPHANY_MSW_ENTITY_AND>: + Don't return 1 for FP_MODE_NONE. + * config/epiphany/epiphany.h (NUM_MODES_FOR_MODE_SWITCHING): + Add value for EPIPHANY_MSW_ENTITY_CONFIG. + (EPIPHANY_MSW_ENTITY_CONFIG, EPIPHANY_MSW_ENTITY_NUM): Define. + * config/epiphany/epiphany.md (save_config): New pattern. + +2013-05-12 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*zero_extendsidi2): Add *x->?r alternative. + +2013-05-10 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (memory): Handle sseishft1. + * config/i386/sse.md (*vec_extractv4si): Remove memory attribute. + (*vec_extractv2di_1): Ditto. + +2013-05-10 Vladimir Makarov <vmakarov@redhat.com> + + * lra-assigns.c (find_hard_regno_for): Add 1 to the cost of call + saved registers. + +2013-05-10 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib. + Add mthumb/march=armv7-a multilib. + Add mthumb/march=armv7-r multilib. + Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib. + +2013-05-10 Ralf Corsépius <ralf.corsepius@rtems.org> + + * config/v850/t-rtems: Add more multilibs. + +2013-05-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57214 + * tree-ssa-loop-ivcanon.c (propagate_constants_for_unrolling): Do + not propagate from SSA names that occur in abnormal PHI nodes. + +2013-05-10 Marc Glisse <marc.glisse@inria.fr> + + * stor-layout.c (element_precision): New function. + * machmode.h (element_precision): Declare it. + * tree.c (build_minus_one_cst): New function. + (element_precision): Likewise. + * tree.h (build_minus_one_cst): Declare new function. + (element_precision): Likewise. + * fold-const.c (operand_equal_p): Use element_precision. + (fold_binary_loc): Handle vector types. + * convert.c (convert_to_integer): Use element_precision. + * gimple.c (iterative_hash_canonical_type): Handle complex and vectors + separately. + +2013-05-10 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips-protos.h (m16_uimm3_b, m16_simm4_1, m16_nsimm4_1) + (m16_simm5_1, m16_nsimm5_1, m16_uimm5_4, m16_nuimm5_4, m16_simm8_1) + (m16_nsimm8_1, m16_uimm8_1, m16_nuimm8_1, m16_uimm8_m1_1, m16_uimm8_4) + (m16_nuimm8_4, m16_simm8_8, m16_nsimm8_8): Delete. + * config/mips/mips.c (m16_check_op, m16_uimm3_b, m16_simm4_1) + (m16_nsimm4_1, m16_simm5_1, m16_nsimm5_1, m16_uimm5_4, m16_nuimm5_4) + (m16_simm8_1, m16_nsimm8_1, m16_uimm8_1, m16_nuimm8_1, m16_uimm8_m1_1) + (m16_uimm8_4, m16_nuimm8_4, m16_simm8_8, m16_nsimm8_8): Delete. + * config/mips/constraints.md (Udb8, Usb5, Usb8, Usd8, Uub8, Uuw5) + (Uuw8): New constraints. + (Usb4): Move into alphabetical order. + * config/mips/predicates.md (db8_operand, sb5_operand, sb8_operand) + (sd8_operand, ub8_operand, uw8_operand): New predicates. + * config/mips/mips.md (*xor<mode>3, *xor<mode>3_mips16): Name + previously unnamed patterns. + (*add<mode>3_mips16, *xor<mode>3_mips16, *<optab>si3_mips16) + (*ashldi3_mips16, *ashrdi3_mips16, *lshrdi3_mips16) + (*slt<u>_<GPR:mode><GPR2:mode>_mips16) + (*sle<u>_<GPR:mode><GPR2:mode>_mips16): Use constraints instead + of set_attr_alternative/if_then_else. Use extended_mips16 instead + of specific lengths. + +2013-05-10 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.md (rotateinv): New code attr. + (*<rotate_insn><mode>3_1, *<rotate_insn>si3_1_zext, + *<rotate_insn>qi3_1_slp): Emit rorl %eax instead of + roll $31, %eax, etc. + + PR tree-optimization/45216 + PR tree-optimization/57157 + * tree-ssa-forwprop.c (simplify_rotate): New function. + (ssa_forward_propagate_and_combine): Call it. + +2013-05-10 Richard Biener <rguenther@suse.de> + + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Do not + disable peeling when we version for aliasing. + (vector_alignment_reachable_p): Honor explicit user alignment. + (vect_supportable_dr_alignment): Likewise. + * tree-vect-loop-manip.c (vect_can_advance_ivs_p): Use + STMT_VINFO_LOOP_PHI_EVOLUTION_PART instead of recomputing it. + * tree-vect-loop.c (vect_transform_loop): First apply versioning, + then peeling to arrange for the cost-model check to come first. + +2013-05-10 Alan Modra <amodra@gmail.com> + + * configure.ac (HAVE_AS_TLS): Swap powerpc64 and powerpc cases. + (HAVE_LD_LARGE_TOC): Don't mention AIX in help text. + * configure: Regenerate. + +2013-05-10 Alan Modra <amodra@gmail.com> + + PR target/55033 + * varasm.c (default_elf_select_section): Move !DECL_P check.. + (get_named_section): ..to here before calling get_section_name. + Adjust assertion. + (default_section_type_flags): Add DECL_P check. + * config/i386/winnt.c (i386_pe_section_type_flags): Likewise. + * config/rs6000/rs6000.c (rs6000_xcoff_section_type_flags): Likewise. + +2013-05-09 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_expand_prologue): + When using gen_stack_adjust_str with a register offset, add a + REG_FRAME_RELATED_EXPR note. + +2013-05-09 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*vec_extractv4si_0_zext): New pattern. + (*vec_extractv4si_zext_mem): Ditto. + (*vec_extractv2di): Add 0->x and x->x alternatives. + * config/i386/mmx.md (*vec_extractv2si_zext_mem): New pattern. + * config/i386/i386.md (*zero_extendsidi2): Add *Yj->?r alternative. + +2013-05-09 Jason Merrill <jason@redhat.com> + + N3639 C++1y VLA support + * gimplify.c (gimplify_vla_decl): Don't touch an existing + DECL_VALUE_EXPR. + + * tree.c (build_constructor_va): New. + * tree.h: Declare it. + +2013-05-09 Martin Jambor <mjambor@suse.cz> + + PR lto/57084 + * gimple-fold.c (canonicalize_constructor_val): Call + cgraph_get_create_real_symbol_node instead of cgraph_get_create_node. + +2013-05-09 Jan Hubicka <jh@suse.cz> + Richard Biener <rguenther@suse.de> + + PR lto/54095 + * symtab.c (symtab_make_decl_local): Do not add private names. + +2013-05-09 Jan Hubicka <jh@suse.cz> + + PR lto/54095 + * symtab.c (insert_to_assembler_name_hash): Handle clones. + (unlink_from_assembler_name_hash): Likewise. + (symtab_prevail_in_asm_name_hash, symtab_register_node, + symtab_unregister_node, symtab_initialize_asm_name_hash, + change_decl_assembler_name): Update. + +2013-05-09 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md: New movtf split. + (*movtf_aarch64): Update. + (aarch64_movdi_tilow): Handle TF modes and rename to + aarch64_movdi_<mode>low. + (aarch64_movdi_tihigh): Handle TF modes and rename to + aarch64_movdi_<mode>high + (aarch64_movtihigh_di): Handle TF modes and rename to + aarch64_mov<mode>high_di + (aarch64_movtilow_di): Handle TF modes and rename to + aarch64_mov<mode>low_di + (aarch64_movtilow_tilow): Remove spurious whitespace. + * config/aarch64/aarch64.c (aarch64_split_128bit_move): Handle TFmode + splits. + (aarch64_print_operand): Update. + +2013-05-09 Alan Modra <amodra@gmail.com> + + * configure.ac (HAVE_AS_TLS): Enable tests for powerpcle and + powerpc64le. + * configure: Regenerate. + +2013-05-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload + splitter preparation statements. + * config/i386/sse.md (*vec_extract* splitters): Ditto. + (*avx_vperm_broadcast_<mode>): Use adjust_address instead of + adjust_address_nv. + +2013-05-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (count_candidates): Change + return value to int. + (analyze_candidates_and_replace): Change type of length to int. + +2013-05-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (PEXTR_MODE, PEXTR_MODEx): Remove. + (*vec_extract<mode>): Use VI12_128 mode iterator. + (*vec_extract<mode>_mem): Ditto. + (*vec_extract*_mem splitters): Merge splitters using VI_128 mode + attribute. + +2013-05-08 Diego Novillo <dnovillo@google.com> + + PR bootstrap/54659 + + Revert: + 2012-08-17 Diego Novillo <dnovillo@google.com> + + PR bootstrap/54281 + * configure.ac: Add libintl.h to AC_CHECK_HEADERS list. + * config.in: Regenerate. + * configure: Regenerate. + * intl.h: Always include libintl.h if HAVE_LIBINTL_H is set. + +2013-05-08 Jan Hubicka <jh@suse.cz> + + PR lto/54095 + * cgraph.c (cgraph_make_node_local_1): Se unique_name. + * cgraph.h (symtab_node_base): Add unique_name. + * lto-cgraph.c (lto_output_node, lto_output_varpool_node, + input_overwrite_node, input_varpool_node): Stream unique_name. + * cgraphclones.c (cgraph_create_virtual_clone, + cgraph_function_versioning): Set unique_name. + * ipa.c (function_and_variable_visibility): Set unique_name. + +2013-05-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (find_phi_def): Revert former "fix." + (alloc_cand_and_find_basis): Restrict conditional candidate + processing to CAND_MULTs. + +2013-05-08 Jan Hubicka <jh@suse.cz> + + PR lto/54095 + lto-symtab.c (lto_symtab_symbol_p): New function. + (lto_symtab_resolve_can_prevail_p, lto_symtab_resolve_symbols, + lto_symtab_resolve_symbols, lto_symtab_merge_decls_2, + lto_symtab_merge_decls_1, lto_symtab_merge_cgraph_nodes_1): + Skip static symbols. + +2013-05-08 Paolo Carlini <paolo.carlini@oracle.com> + + PR tree-optimization/57200 + * tree-ssa-loop-niter.c (do_warn_aggressive_loop_optimizations): + Only call inform if the preceding warning_at returns true. + +2013-05-07 Han Shen <shenhan@google.com> + + * cfgexpand.c (record_or_union_type_has_array_p): New function. + (expand_used_vars): Add logic handling '-fstack-protector-strong'. + * common.opt (fstack-protector-strong): New option. + * doc/cpp.texi (__SSP_STRONG__): New builtin "__SSP_STRONG__". + * doc/invoke.texi (Optimization Options): Document + "-fstack-protector-strong". + * gcc.c (LINK_SSP_SPEC): Add 'fstack-protector-strong'. + +2013-05-06 Steven Bosscher <steven@gcc.gnu.org> + + * config/mips/mips.c (mips_machine_reorg2): Return 0. + +2013-05-07 Vladimir Makarov <vmakarov@redhat.com> + + * ira.c (update_equiv_regs): Add insn having equiv memory even if + it is not lhs of the insn. + (setup_reg_equiv): Remove insn having equiv memory which it is not + lhs of the insn. + * lra-constraints.c (process_address): Try to improve generation + code for address base + disp. + (lra_constraints): Make correct the code for checking insn setting + up backward equivalence. Remove insn only if it is in the init + insn list. + * lra-eliminations.c (update_reg_eliminate): Change return value. + (lra_eliminate): Use the result. + +2013-05-07 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (ssescalarnummask): New mode attribute. + (PEXTR_MODE, PEXTR_MODEx): New mode iterators. + (*vec_extract<mode>): Merge from *sse4_1_pextrb_memory and + *sse4_1_pextrw_memory using PEXTR_MODE mode iterator. Handle + register target operands. + (*vec_extractv8hi_sse2): New pattern. + (*vec_extractv16qi_zext): Rename from *sse4_1_pextrb_<mode>. + (*vec_extractv8hi_zext): Rename from *sse2_pextrw_<mode>. + (*vec_extract<mode>_mem): New insn and split pattern. + +2013-05-07 Christophe Lyon <christophe.lyon@linaro.org> + + * config/arm/arm.c (arm_asan_shadow_offset): New function. + (TARGET_ASAN_SHADOW_OFFSET): Define. + * config/arm/linux-eabi.h (ASAN_CC1_SPEC): Define. + (LINUX_OR_ANDROID_CC): Add ASAN_CC1_SPEC. + +2013-05-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (MAX_INCR_VEC_LEN): New constant. + (incr_vec_index): Return -1 if increment not found. + (create_add_on_incoming_edge): Assert if increment not found. + (record_increment): Limit number of increments recorded. + (all_phi_incrs_profitable): Return false if an increment not found. + (replace_profitable_candidates): Don't process increments that were + not recorded. + (analyze_candidates_and_replace): Limit size of incr_vec. + +2013-05-07 Richard Biener <rguenther@suse.de> + + * calls.c (special_function_p): setjmp-like functions are leaf. + * builtins.def (BUILT_IN_SETJMP): setjmp is leaf. + * tree-inline.c (update_ssa_across_abnormal_edges): Remove assert. + +2013-05-07 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): call splitter. + (aarch64_simd_mov<mode>): New expander. + (aarch64_simd_mov_to_<mode>low): New instruction pattern. + (aarch64_simd_mov_to_<mode>high): Likewise. + (aarch64_simd_mov_from_<mode>low): Likewise. + (aarch64_simd_mov_from_<mode>high): Likewise. + (aarch64_dup_lane<mode>): Update. + (aarch64_dup_lanedi): New instruction pattern. + * config/aarch64/aarch64-protos.h (aarch64_split_simd_move): New prototype. + * config/aarch64/aarch64.c (aarch64_split_simd_move): New function. + +2013-05-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (lazy_create_slsr_reg): Remove. + (replace_mult_candidate): Remove unnecessary argument; remove + unnecessary parameter from call to introduce_cast_before_cand. + (replace_unconditional_candidate): Remove unnecessary parameter + from call to replace_mult_candidate. + (replace_conditional_candidate): Likewise. + (insert_initializers): Use make_temp_ssa_name. + (introduce_cast_before_cand): Remove unnecessary argument; use + make_temp_ssa_name. + (replace_one_candidate): Remove unnecessary argument; remove + unnecessary parameter from calls to introduce_cast_before_cand. + (replace_profitable_candidates): Remove unnecessary parameters + from calls to replace_one_candidate. + +2013-05-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (find_phi_def): Don't record a + phi def as possibly hiding a basis for a CAND_ADD whose operands + have been commuted in the analysis. + (alloc_cand_and_find_basis): Add parms to call to find_phi_def. + +2013-05-07 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md + (cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the + shift value between 0-4. + +2013-05-07 Richard Biener <rguenther@suse.de> + + * double-int.h (rshift): New overload. + * double-int.c (rshift): New function. + * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Optimize. + (create_reference_ops_from_ref): Remove. + (vn_reference_insert): Use shared ops for constructing the + reference and copy it. + +2013-05-07 Richard Biener <rguenther@suse.de> + + PR middle-end/57190 + * tree-eh.c (sink_clobbers): Properly propagate + SSA_NAME_OCCURS_IN_ABNORMAL_PHI. + +2013-05-07 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57149 + * tree-ssa-uninit.c (uninit_undefined_value_p): New inline. + (can_skip_redundant_opnd, compute_uninit_opnds_pos, + collect_phi_def_edges, execute_late_warn_uninitialized): Use + uninit_undefined_value_p instead of ssa_undefined_value_p. + + PR debug/57184 + * expr.c (expand_expr_addr_expr_1): Handle COMPOUND_LITERAL_EXPR + for modifier == EXPAND_INITIALIZER. + +2013-05-07 Anton Blanchard <anton@samba.org> + + * configure.ac (HAVE_LD_LARGE_TOC): Use correct linker emulation + for powerpc64 little endian. + * configure: Regenerate. + +2013-05-06 Graham Stott <grahams@btinternet.com> + + * expmed.c (init_expmed_rtl): Remove unused fields reg_fld, plus_fld, + mult_fld, sdiv_fld1, udiv_fld1, sdiv_32_fld1, smod_32_fld1, + wide_mult_fld1, wide_lshr_fld1, shift_fld1, shift_mult_fld1, + shift_add_fld1, shift_sub0_fld1, shift_sub1_fld1. + +2013-05-06 Graham Stott <grahams@btinternet.com> + + * gensupport.c (add_predicate_code): Also exclude SCRATCH from rtx + codes which allow non-lvalues. + +2013-05-06 Marc Glisse <marc.glisse@inria.fr> + + * tree.c (integer_all_onesp) <COMPLEX_CST>: Test that both + components are all 1s. + (integer_minus_onep): New function. + * tree.h (integer_minus_onep): Declare it. + * fold-const.c (fold_binary_loc) <MULT_EXPR>: Test + integer_minus_onep instead of integer_all_onesp. + +2013-05-06 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/52933 + * config/sh/sh.md (*cmp_div0s_0, *cmp_div0s_1, *movsicc_div0s): Add + variations of these patterns. + +2013-05-06 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (isa): Add x64_sse4 member. + (enabled): Handle x64_sse4. + (*movdi_internal): Add *x->?r alternative to emit pextrq $0,%xmm,%reg + instruction for 64bit SSE4_1 targets. Update insn attributes. + (*movsi_internal): Add *x->?r alternative to emit pextrd $0,%xmm,%reg + instruction for SSE4_1 targets. Update insn attributes. + * config/i386/sse.md (*vec_extract<ssevecmodelower>_0): Merge + with *sse4_1_pextrd and *sse4_1_pextrq having const_0 selector. + (*vec_extractv2di_1): Merge with *sse4_1_pextrq having + const_1 selector. + (*vec_extractv4si): Rename from *sse4_1_pextrd. + (*vec_extractv4si_zext): Rename from *sse4_1_pextrd_zext. + (*vec_extract<ssevecmodelower>_0 splitters): Merge splitters together. + +2013-05-06 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/57108 + * config/sh/sh.md (tstsi_t_zero_extract_eq): Use QIHISIDI mode iterator. + +2013-05-06 Maxim Kuznetsov <maks.kuznetsov@gmail.com> + + * final.c (do_assembler_dialects): Don't handle curly braces and + vertical bar escaped by % as dialect delimiters. + (output_asm_insn): Print curly braces and vertical bar if escaped + by % and ASSEMBLER_DIALECT defined. + * doc/tm.texi.in (ASSEMBLER_DIALECT): Document new standard escapes. + * doc/tm.texi: Regenerated. + +2013-05-06 Steven Bosscher <steven@gcc.gnu.org> + + * config/mips/mips.c: Include tree-pass.h. + (mips_reorg): Split in pre- and post-dbr_schedule parts. + (mips_machine_reorg2): Move mips_reorg post-dbr_schedule parts here. + (pass_mips_machine_reorg2): New machine specific pass. + (insert_pass_mips_machine_reorg2): New pass plugin definition. + (mips_option_override): Register the new pass. + * rtl.h (cleanup_barriers): Remove prototype. + (dbr_schedule): Likewise. + * jump.c (cleanup_barriers): Make static. + * reorg.c (dbr_schedule): Likewise. + +2013-05-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57185 + * tree-parloops.c (add_field_for_reduction): Handle anonymous + SSA names properly. + +2013-05-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/57106 + * config/i386/i386.c (add_parameter_dependencies): Add dependence + between "first_arg" and "insn", not "last" and "insn". + +2013-05-06 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (slsr_process_phi): Re-enable. + (find_candidates_in_block): Re-enable slsr_process_phi. + (create_phi_basis): Fix double counting of candidate adjustment. + +2013-05-06 Richard Biener <rguenther@suse.de> + + PR middle-end/57147 + * tree-cfg.c (gimple_purge_dead_abnormal_call_edges): If + the edge is also fallthru, preserve it and just clear the + abnormal flag. + * tree-cfgcleanup.c (remove_fallthru_edge): If the edge is + also complex, preserve that and just clear the fallthru flag. + * tree-inline.c (update_ssa_across_abnormal_edges): Also + update virtual operands. + +2013-05-06 Alan Modra <amodra@gmail.com> + + * config/rs6000/linux.h (DEFAULT_ASM_ENDIAN): Define. + (LINK_OS_LINUX_EMUL): Use ENDIAN_SELECT. + * config/rs6000/linux64.h (DEFAULT_ASM_ENDIAN): Define. + * config/rs6000/sysv4le.h (DEFAULT_ASM_ENDIAN): Define. + (LINK_TARGET_SPEC): Use ENDIAN_SELECT. + * config/rs6000/sysv4.h (DEFAULT_ASM_ENDIAN): Define as -mbig. + +2013-05-06 Alan Modra <amodra@gmail.com> + + * config/rs6000/sysv4.h (ENDIAN_SELECT): Define, extracted from + (ASM_SPEC): ..here. Emit DEFAULT_ASM_ENDIAN too. + (DEFAULT_ASM_ENDIAN): Define. + (CC1_SPEC, LINK_TARGET_SPEC): Use ENDIAN_SELECT. + * config/rs6000/linux64.h (ASM_SPEC32): Remove endian options. + Update -K PIC clause from sysv4.h. + (ASM_SPEC_COMMON): Use ENDIAN_SELECT. + (LINK_OS_LINUX_EMUL32, LINK_OS_LINUX_EMUL64): Likewise. + +2013-05-06 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.md (bswapdi 2nd splitter): Don't swap words + twice for little-endian. + (ashrdi3_no_power, ashrdi3): Support little-endian. + +2013-05-06 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/55303 + * config/sh/sh.c (sh_rtx_costs): Handle SMIN and SMAX cases. + * config/sh/sh.md (*clips, uminsi3, *clipu, clipu_one): New insns and + related expanders. + * config/sh/iterators.md (SMIN_SMAX): New code iterator. + * config/sh/predicates.md (arith_reg_or_0_or_1_operand, + clips_min_const_int, clips_max_const_int, clipu_max_const_int): + New predicates. + +2013-05-05 Steven Bosscher <steven@gcc.gnu.org> + John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config.gcc (hppa*-*-*): Remove MASK_BIG_SWITCH from CPU default. + * config/pa/pa.opt: Make mbig-switch a no-op. + * config/pa/pa.h (TARGET_DEFAULT): Remove MASK_BIG_SWITCH. + (CASE_VECTOR_MODE): Always return SImode. + (ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Remove code + for the !TARGET_BIG_SWITCH case. + * config/pa/pa-linux.h: Likewise. + * config/pa/pa-openbsd.h: Likewise. + * config/pa/pa-hpux.h: Define TARGET_DEFAULT to 0. + * config/pa/pa.md (short_jump): Remove define_insn. + (casesi): Remove code for the !TARGET_BIG_SWITCH case. + (casesi0): Remove define_insn. + (type): Remove btable_branch. + (pa_combine_type): Likewise. + (in_nullified_branch_delay): Likewise. + (in_call_delay): Likewise. + (define_delay): Likewise. + (define_insn_reservation "Z3"): Likewise. + (define_insn_reservation "Z4"): Likewise. + * config/pa/pa.c (pa_reorg): Remove code for !TARGET_BIG_SWITCH. + (pa_adjust_insn_length): Remove adjustment for btable branches. + * doc/invoke.texi (HPPA Options): Delete documentation for mbig-switch + and mno-big-switch + +2013-05-05 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*vec_extract<ssevecmodelower>_0): Merge + from sse2_stored and *sse2_storeq_rex64 using SWI48 mode iterator. + Add m->r,x alternatives. + (*vec_extract<ssevecmodelower>_0 splitters): Merge V2DI and V4SI + splitters using SWI48x mode iterator. + (*vec_extract_v2di_0_sse): Rename from *sse2_storeq. Disable for + TARGET_64BIT. Add m->x alternative. + (*vec_extractv4si_mem): Rename from *vec_ext_v4si_mem. + Add o->x alternative. Enable for TARGET_SSE. + (sse_storeq): Remove expander. + (*vec_extractv2di_1): Enable for TARGET_SSE. Split alternatives + with memory input operand. + (*vec_extractv2di_1 splitter): New. + (*vec_extractv4sf_mem): Rename from *vec_extract_v4sf_mem. + * config/i386/i386.md (ssevecmodelower): New mode attribute. + +2013-05-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (INT_P): Reformat. Delete obsolete comment. + (INT_LOWPART): Delete. + (extract_MB): Adjust. + (extract_ME): Adjust. + (print_operand): Adjust. + +2013-05-04 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/predicates.md (reg_or_add_cint_operand, + reg_or_sub_cint_operand): Delete "HOST_BITS_PER_WIDE_INT == 32" case. + (reg_or_logical_cint_operand, easy_fp_constant, + logical_const_operand): Delete "CONST_DOUBLE" case. + * config/rs6000/rs6000.c (num_insns_constant_wide): Delete + "HOST_BITS_PER_WIDE_INT == 64" test. + (num_insns_constant): Ditto. Delete CONST_DOUBLE DImode/VOIDmode case. + (build_mask64_2_operands): Delete "HOST_BITS_PER_WIDE_INT >= 64" test. + (rs6000_emit_set_const): Delete CONST_DOUBLE case. + (rs6000_emit_set_long_const): Delete "HOST_BITS_PER_WIDE_INT >= 64" + test. + (includes_rldic_lshift_p, includes_rldicr_lshift_p): Delete + CONST_DOUBLE DImode/VOIDmode case. + (INT_P, INT_LOWPART): Delete CONST_DOUBLE case. + (print_operand): Delete "HOST_BITS_PER_WIDE_INT == 32" case. Delete + CONST_DOUBLE VOIDmode case. + (output_toc): Delete "HOST_BITS_PER_WIDE_INT == 32" case. + (rs6000_rtx_costs): Delete CONST_DOUBLE DImode/VOIDmode case. + * config/rs6000/rs6000.md (iordi3, xordi3, splitter for these): + Delete CONST_DOUBLE case. + (splitters for mov FMOVE64 const_double): Delete + "HOST_BITS_PER_WIDE_INT == 32" case. Delete + "HOST_BITS_PER_WIDE_INT >= 64" test. + (splitter for mov DI const_int): Delete "HOST_BITS_PER_WIDE_INT == 32" + case. + (mov DI const_double): Delete. + +2013-05-04 Jakub Jelinek <jakub@redhat.com> + + * combine.c (combine_simplify_rtx) <case SUBREG>: If nonzero_bits + on op shows all bits zero in mode of a lowpart subreg, return zero. + +2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57150 + * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode + to save TFmode registers and DImode to save TImode registers for + caller save operations. + (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to + mark being partially clobbered since they only use the first + double word. + + * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode + and TDmode only use the upper 64-bits of each VSX register. + +2013-05-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (slsr_process_phi): Disable. + (find_candidates_in_block): Disable slsr_process_phi. + +2013-05-03 Guozhi Wei <carrot@google.com> + + * coverage.c (coverage_obj_init): Move the construction of gcov + constructor to ... + (build_init_ctor): ... here. + +2013-05-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gimple-ssa-strength-reduction.c (cand_kind): Add CAND_PHI. + (slsr_cand_d): Redefine def_phi. + (stride_status, phi_adjust_status, count_phis_status): New enums. + (find_phi_def): New. + (find_basis_for_base_expr): New. + (find_basis_for_candidate): Handle hidden bases. + (alloc_cand_and_find_basis): Handle phi candidates. + (slsr_process_phi): New. + (create_mul_ssa_cand): Exclude phi base candidates; use integer_onep. + (create_mul_imm_cand): Likewise. + (create_add_ssa_cand): Exclude phi base candidates. + (create_add_imm_cand): Likewise. + (slsr_process_cast): Likewise. + (slsr_process_copy): Likewise. + (find_candidates_in_block): Handle phi candidates. + (dump_candidate): Likewise. + (unconditional_cands): Delete. + (unconditional_cands_with_known_stride_p): Delete. + (phi_dependent_cand_p): New. + (cand_increment): Handle phi-dependent candidates. + (replace_dependent): Delete. + (replace_mult_candidate): New. + (replace_unconditional_candidate): New. + (incr_vec_index): Move to avoid forward reference. + (create_add_on_incoming_edge): New. + (create_phi_basis): New. + (replace_dependents): Delete. + (replace_conditional_candidate): New. + (phi_add_costs): New. + (replace_uncond_cands_and_profitable_phis): New. + (record_increment): Handle phi adjustments. + (record_phi_increments): New. + (record_increments): Handle phi adjustments. + (phi_incr_cost): New. + (lowest_cost_path): Handle phis. + (total_savings): Likewise. + (analyze_increments): Likewise. + (ncd_with_phi): New. + (ncd_of_cand_and_phis): New. + (nearest_common_dominator_for_cands): Handle phi increments. + (all_phi_incrs_profitable): New. + (replace_profitable_candidates): Handle phi-dependent candidates. + (analyze_candidates_and_replace): Likewise. + +2013-05-03 Teresa Johnson <tejohnson@google.com> + + PR bootstrap/57154 + * sched-rgn.c (compute_dom_prob_ps): Ensure accumulated probabilities + do not exceed REG_BR_PROB_BASE. + +2013-05-03 Jeff Law <law@redhat.com> + + PR tree-optimization/57144 + * tree-vrp.c (simplify_cond_using_ranges): Verify the constant + operand of the condition will bit into the new type when eliminating + a cast feeding a condition. + +2013-05-03 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/57130 + * combine.c (make_compound_operation) <case SUBREG>: Pass SET instead + of COMPARE as in_code to the recursive call if needed. + +2013-05-03 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (isa): Add x64_sse4_noavx and x64_avx members. + (enabled): Handle new members. + * config/i386/sse.md (*vec_concatv2si): Merge from + *vec_concatv2si_sse2 and vec_concatv2si_sse. + (vec_concatv2di): Merge with *vec_concatv2di_rex64. + +2013-05-03 Joern Rennecke <joern.rennecke@embecosm.com> + + PR tree-optimization/57027 + * tree-ssa-math-opts.c (convert_mult_to_fma): When checking + for fnms opportunity, check we got the prerequisite kind + of tree / gimple before using accessor functions. + +2013-05-03 Richard Biener <rguenther@suse.de> + + * double-int.h (lshift): New overload without precision + and arith argument. + (operator *=, operator +=, operator -=): Move ... + * double-int.c (operator *=, operator +=, operator -=): ... here + and implement more efficiently. + (mul_double_with_sign): Remove. + (lshift_double): Adjust to take unsinged shift argument, push + dispatching code to callers. + (mul_double_wide_with_sign): Add early out for callers that + are not interested in high parts or overflow. + (lshift): New function. + (lshift, rshift, alshift, arshift, llshift, lrshift): Add + dispatch code here. + (lrotate, rrotate): Use logical shifts. + * expr.c (get_inner_reference): Use lshift. + * fixed-value.c (do_fixed_divide): Likewise. + * tree-dfa.c (get_ref_base_and_extent): Likewise. + * tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Likewise. + (indirect_refs_may_alias_p): Likewise. + (stmt_kills_ref_p_1): Likewise. + +2013-05-03 Vidya Praveen <vidyapraveen@arm.com> + + * config/aarch64/aarch64-simd.md (simd_fabd): Correct the description. + +2013-05-03 Vidya Praveen <vidyapraveen@arm.com> + + * config/aarch64/aarch64-simd.md (*fabd_scalar<mode>3): Support + scalar form of FABD instruction. + +2013-05-02 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (process_alt_operands): Add checking alt + number to choose the best alternative. + +2013-05-02 Richard Biener <rguenther@suse.de> + + * tree-eh.c (cleanup_empty_eh_merge_phis): Remove rename_virts + bitmap and its handling. + (pass_cleanup_eh): Set todo_flags_finish to TODO_verify_ssa. + +2013-05-02 Richard Biener <rguenther@suse.de> + + PR middle-end/57140 + * tree-inline.c (copy_loops): Properly handle removed loops. + (copy_cfg_body): Mark destination loops for fixup if source + loops needed fixup. + +2013-05-02 Greta Yorsh <Greta.Yorsh@arm.com> + + PR target/56732 + * config/arm/arm.c (arm_expand_epilogue): Check really_return before + generating simple_return for naked functions. + +2013-05-02 Martin Jambor <mjambor@suse.cz> + + PR middle-end/56988 + * ipa-prop.h (ipa_agg_replacement_value): New flag by_ref. + * ipa-cp.c (ipa_get_indirect_edge_target_1): Also check that by_ref + flags match. + (find_aggregate_values_for_callers_subset): Fill in the by_ref flag of + ipa_agg_replacement_value structures. + (known_aggs_to_agg_replacement_list): Likewise. + * ipa-prop.c (write_agg_replacement_chain): Stream by_ref flag. + (read_agg_replacement_chain): Likewise. + (ipcp_transform_function): Also check that by_ref flags match. + +2013-05-02 Richard Biener <rguenther@suse.de> + + * graphds.h (struct graph): Add obstack member. + * graphds.c (new_graph): Initialize obstack and allocate + vertices from it. + (add_edge): Allocate edge from the obstack. + (free_graph): Free the obstack instead of all edges and vertices. + +2013-05-02 Teresa Johnson <tejohnson@google.com> + + * loop-unswitch.c (unswitch_loop): Use helper routines with rounding + divides. + * cfg.c (update_bb_profile_for_threading): Ditto. + * tree-inline.c (copy_bb): Ditto. + (copy_edges_for_bb): Ditto. + (initialize_cfun): Ditto. + (copy_cfg_body): Ditto. + (expand_call_inline): Ditto. + * ipa-inline-analysis.c (estimate_edge_size_and_time): Ditto. + (estimate_node_size_and_time): Ditto. + (inline_merge_summary): Ditto. + * cgraphclones.c (cgraph_clone_edge): Ditto. + (cgraph_clone_node): Ditto. + * sched-rgn.c (compute_dom_prob_ps): Ditto. + (compute_trg_info): Ditto. + +2013-05-02 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (movsi_aarch64): Only allow to/from + S reg when fp attribute set. + (movdi_aarch64): Only allow to/from D reg when fp attribute set. + +2013-05-02 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*and_one_cmpl<mode>3_compare0): + New pattern. + (*and_one_cmplsi3_compare0_uxtw): Likewise. + (*and_one_cmpl_<SHIFT:optab><mode>3_compare0): Likewise. + (*and_one_cmpl_<SHIFT:optab>si3_compare0_uxtw): Likewise. + +2013-05-02 Richard Biener <rguenther@suse.de> + + * tree-scalar-evolution.c (scev_info_hasher): Remove. + (struct instantiate_cache_entry): New type. + (struct instantiate_cache_entry_hasher): New hashtable descriptor. + (struct instantiate_cache_type): New type. + (set_instantiated_value, get_instantiated_value): Remove. + (get_instantiated_value_entry): New function. + (instantiate_scev_name): Use the new cache and adjust. + (instantiate_scev_poly): Adjust. + (instantiate_scev_binary): Likewise. + (instantiate_array_ref): Likewise. + (instantiate_scev_convert): Likewise. + (instantiate_scev_not): Likewise. + (instantiate_scev_3): Likewise. + (instantiate_scev_2): Likewise. + (instantiate_scev_r): Likewise. + (instantiate_scev): Likewise. + (resolve_mixers): Likewise. + +2013-05-01 Vladimir Makarov <vmakarov@redhat.com> + + PR target/57091 + * lra-constraints.c (best_small_class_operands_num): Remove. + (process_alt_operands): Remove small_class_operands_num. Take + small classes operands into losers and only if the operand is not + matched. Modify debugging output. + (curr_insn_transform): Remove best_small_class_operands_num. + Print insn name. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_gimple_fold_builtin.c): Fold more modes for reduc_splus_. + * config/aarch64/aarch64-simd-builtins.def + (reduc_splus_): Add new modes. + (reduc_uplus_): New. + * config/aarch64/aarch64-simd.md (aarch64_addvv4sf): Remove. + (reduc_uplus_v4sf): Likewise. + (reduc_splus_v4sf): Likewise. + (aarch64_addv<mode>): Likewise. + (reduc_uplus_<mode>): Likewise. + (reduc_splus_<mode>): Likewise. + (aarch64_addvv2di): Likewise. + (reduc_uplus_v2di): Likewise. + (reduc_splus_v2di): Likewise. + (aarch64_addvv2si): Likewise. + (reduc_uplus_v2si): Likewise. + (reduc_splus_v2si): Likewise. + (reduc_<sur>plus_<mode>): New. + (reduc_<sur>plus_v2di): Likewise. + (reduc_<sur>plus_v2si): Likewise. + (reduc_<sur>plus_v4sf): Likewise. + (aarch64_addpv4sf): Likewise. + * config/aarch64/arm_neon.h + (vaddv<q>_<s,u,f><8, 16, 32, 64): Rewrite using builtins. + * config/aarch64/iterators.md (unspec): Remove UNSPEC_ADDV, + add UNSPEC_SADDV, UNSPEC_UADDV. + (SUADDV): New. + (sur): Add UNSPEC_SADDV, UNSPEC_UADDV. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (v<max,min><nm><q><v>_<sfu><8, 16, 32, 64>): Rewrite using builtins. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins + (aarch64_gimple_fold_builtin): Fold reduc_<su><maxmin>_ builtins. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def + (reduc_smax_): New. + (reduc_smin_): Likewise. + (reduc_umax_): Likewise. + (reduc_umin_): Likewise. + (reduc_smax_nan_): Likewise. + (reduc_smin_nan_): Likewise. + (fmax): Remove. + (fmin): Likewise. + (smax): Update for V2SF, V4SF and V2DF modes. + (smin): Likewise. + (smax_nan): New. + (smin_nan): Likewise. + * config/aarch64/aarch64-simd.md (<maxmin><mode>3): Rename to... + (<su><maxmin><mode>3): ...This, refactor. + (s<maxmin><mode>3): New. + (<maxmin_uns><mode>3): Likewise. + (reduc_<maxmin_uns>_<mode>): Refactor. + (reduc_<maxmin_uns>_v4sf): Likewise. + (reduc_<maxmin_uns>_v2si): Likewise. + (aarch64_<fmaxmin><mode>: Remove. + * config/aarch64/arm_neon.h (vmax<q>_f<32,64>): Rewrite to use + new builtin names. + (vmin<q>_f<32,64>): Likewise. + * config/iterators.md (unspec): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV. + (FMAXMIN): New. + (su): Add mappings for smax, smin, umax, umin. + (maxmin): New. + (FMAXMINV): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV. + (FMAXMIN): Rename as... + (FMAXMIN_UNS): ...This. + (maxminv): Remove. + (fmaxminv): Likewise. + (fmaxmin): Likewise. + (maxmin_uns): New. + (maxmin_uns_op): Likewise. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vac<ge, gt><sd>_f<32, 64>): Rename to... + (vca<ge, gt><sd>_f<32, 64>): ...this, reimpliment in C. + (vca<ge, gt, lt, le><q>_f<32, 64>): Reimpliment in C. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md (*aarch64_fac<optab><mode>): New. + * config/aarch64/iterators.md (FAC_COMPARISONS): New. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (vcond<mode>_internal): Handle special cases for constant masks. + (vcond<mode><mode>): Allow nonmemory_operands for outcome vectors. + (vcondu<mode><mode>): Likewise. + (vcond<v_cmp_result><mode>): New. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c (BUILTIN_VALLDI): Define. + (aarch64_fold_builtin): Add folding for cm<eq,ge,gt,tst>. + * config/aarch64/aarch64-simd-builtins.def + (cmeq): Update to BUILTIN_VALLDI. + (cmgt): Likewise. + (cmge): Likewise. + (cmle): Likewise. + (cmlt): Likewise. + * config/aarch64/arm_neon.h + (vc<eq, lt, le, gt, ge, tst><z><qsd>_<fpsu><8,16,32,64>): Remap + to builtins or C as appropriate. + +2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to... + (cmgeu): ...This. + (cmhi): Rename to... + (cmgtu): ...This. + * config/aarch64/aarch64-simd.md + (simd_mode): Add SF. + (aarch64_vcond_internal): Use new names for unsigned comparison insns. + (aarch64_cm<optab><mode>): Rewrite to not use UNSPECs. + * config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to... + (cstore<mode>_neg): ...This. + * config/aarch64/iterators.md + (VALLF): new. + (unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>. + (COMPARISONS): New. + (UCOMPARISONS): Likewise. + (optab): Add missing comparisons. + (n_optab): New. + (cmp_1): Likewise. + (cmp_2): Likewise. + (CMP): Likewise. + (cmp): Remove. + (VCMP_S): Likewise. + (VCMP_U): Likewise. + (V_cmp_result): Add DF, SF modes. + (v_cmp_result): Likewise. + (v): Likewise. + (vmtype): Likewise. + * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New. + +2013-05-01 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert + define_insn to define_insn_and_split. + (thumb32_umaxsi3,thumb2_uminsi3): Likewise. + (thumb2_negdi2,thumb2_abssi2,thumb2_neg_abssi2): Likewise. + (thumb2_mov_scc,thumb2_mov_negscc,thumb2_mov_notscc): Likewise. + (thumb2_movsicc_insn,thumb2_and_scc,thumb2_ior_scc): Likewise. + (thumb2_negscc): Likewise. + +2013-04-30 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/thumb2.md (thumb2_incscc, thumb2_decscc): Delete. + +2013-04-30 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/thumb2.md: Remove trailing whitespaces. + +2013-04-30 Richard Sandiford <rsandifo@linux.vnet.ibm.com> + + * explow.c (plus_constant): Pass "mode" to immed_double_int_const. + Use gen_int_mode rather than GEN_INT. + +2013-04-30 H.J. Lu <hongjiu.lu@intel.com> + + * value-prof.c (stream_in_histogram_value): Remove the strayed + debug_gimple_stmt. + +2013-04-30 Richard Biener <rguenther@suse.de> + + PR middle-end/57122 + * cfghooks.c (split_edge): Properly check for the loop latch edge. + +2013-04-30 Richard Biener <rguenther@suse.de> + + PR middle-end/57107 + * tree-eh.c (sink_clobbers): Preserve virtual SSA form. + +2013-04-30 Andrey Belevantsev <abel@ispras.ru> + + PR rtl-optimization/56957 + PR rtl-optimization/57105 + * sel-sched.c (move_op_orig_expr_found): Remove insn_emitted + variable. Use just INSN_UID for determining whether an insn + should be only disconnected from the insn stream. + * sel-sched-ir.h (EXPR_WAS_CHANGED): Remove. + +2013-04-30 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57104 + * tsan.c (instrument_expr): Don't instrument accesses to + DECL_HARD_REGISTER VAR_DECLs. + +2013-04-30 Richard Biener <rguenther@suse.de> + + * function.h (loops_for_fn): New inline function. + (set_loops_for_fn): Likewise. + * cfgloop.h (place_new_loop): Add struct function parameter. + (get_loop): Likewise. + (get_loops): Likewise. + (number_of_loops): Likewise. + (fel_next): Adjust. + (fel_init): Likewise. + * cfg.c (get_loop_copy): Adjust. + * cfgloop.c (flow_loops_dump): Likewise. + (record_loop_exits): Likewise. + (verify_loop_structure): Likewise. + * cfgloopanal.c (mark_irreducible_loops): Likewise. + (estimate_reg_pressure_cost): Likewise. + (mark_loop_exit_edges): Likewise. + * cfgloopmanip.c (place_new_loop): Likewise. + (add_loop): Likewise. + (duplicate_loop): Likewise. + * graph.c (draw_cfg_nodes): Likewise. + * graphite-clast-to-gimple.c (translate_clast_user): Likewise. + * graphite-sese-to-poly.c (build_scop_scattering): Likewise. + (extract_affine_chrec): Likewise. + (build_scop_iteration_domain): Likewise. + * graphite.c (graphite_initialize): Likewise. + * ira-build.c (create_loop_tree_nodes): Likewise. + (more_one_region_p): Likewise. + (rebuild_regno_allocno_maps): Likewise. + (mark_loops_for_removal): Likewise. + (mark_all_loops_for_removal): Likewise. + (remove_unnecessary_regions): Likewise. + (ira_build): Likewise. + * ira-emit.c (setup_entered_from_non_parent_p): Likewise. + * loop-init.c (fix_loop_structure): Likewise. + (gate_rtl_move_loop_invariants): Likewise. + (gate_rtl_unswitch): Likewise. + (gate_rtl_unroll_and_peel_loops): Likewise. + (rtl_doloop): Likewise. + * lto-streamer-in.c (input_cfg): Likewise. + * lto-streamer-out.c (output_cfg): Likewise. + * modulo-sched.c (sms_schedule): Likewise. + * predict.c (tree_estimate_probability): Likewise. + (tree_estimate_probability_driver): Likewise. + (estimate_loops): Likewise. + * tree-cfg.c (fixup_loop_arrays_after_move): Likewise. + (move_sese_region_to_fn): Likewise. + (debug_loop_num): Likewise. + * tree-chrec.c (chrec_evaluate): Likewise. + (hide_evolution_in_other_loops_than_loop): Likewise. + (chrec_component_in_loop_num): Likewise. + (reset_evolution_in_loop): Likewise. + (evolution_function_is_invariant_rec_p): Likewise. + * tree-if-conv.c (main_tree_if_conversion): Likewise. + * tree-inline.c (copy_loops): Likewise. + (copy_cfg_body): Likewise. + (tree_function_versioning): Likewise. + * tree-loop-distribution.c (rdg_flag_loop_exits): Likewise. + * tree-scalar-evolution.c (chrec_contains_symbols_defined_in_loop): + Likewise. + (add_to_evolution_1): Likewise. + (scev_const_prop): Likewise. + * tree-scalar-evolution.h (get_chrec_loop): Likewise. + * tree-ssa-loop-ch.c (copy_loop_headers): Likewise. + * tree-ssa-loop-im.c (analyze_memory_references): Likewise. + (tree_ssa_lim_initialize): Likewise. + * tree-ssa-loop-manip.c (rewrite_into_loop_closed_ssa): Likewise. + (verify_loop_closed_ssa): Likewise. + * tree-ssa-loop.c (tree_ssa_loop_init): Likewise. + (tree_ssa_loop_im): Likewise. + (tree_ssa_loop_unswitch): Likewise. + (tree_vectorize): Likewise. + (check_data_deps): Likewise. + (tree_ssa_loop_ivcanon): Likewise. + (tree_ssa_loop_bounds): Likewise. + (tree_complete_unroll): Likewise. + (tree_complete_unroll_inner): Likewise. + (tree_parallelize_loops): Likewise. + (tree_ssa_loop_prefetch): Likewise. + (tree_ssa_loop_ivopts): Likewise. + * tree-ssa.c (execute_update_addresses_taken): Liekwise. + * tree-vectorizer.c (vectorize_loops): Likewise. + +2013-04-29 Mike Frysinger <vapier@gentoo.org> + + * config/arm/bpabi.h (EABI_LINK_SPEC): Define. + (BPABI_LINK_SPEC): Use new EABI_LINK_SPEC. + * config/arm/linux-eabi.h (LINK_SPEC): Replace BE8_LINK_SPEC + with EABI_LINK_SPEC. + +2013-04-29 Uros Bizjak <ubizjak@gmail.com> + + PR target/44578 + * config/i386/i386.md (*zero_extendsidi2): Add "!" to m->?*y + alternative. + +2013-04-29 Vladimir Makarov <vmakarov@redhat.com> + + PR target/57097 + * lra-constraints.c (process_alt_operands): Discourage a bit more + using memory for pseudos. Print cost dump for alternatives. + Modify cost values for conflicts with early clobbers. + (curr_insn_transform): Spill pseudos reassigned to NO_REGS. + +2013-04-29 Uros Bizjak <ubizjak@gmail.com> + + PR target/57098 + * config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory. + +2013-04-29 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (movsi_aarch64): Support LDR/STR + from/to S register. + (movdi_aarch64): Support LDR/STR from/to D register. + +2013-04-29 Ian Bolton <ian.bolton@arm.com> + + * common/config/aarch64/aarch64-common.c: Enable REE pass at O2 + or higher by default. + +2013-04-29 Richard Biener <rguenther@suse.de> + + PR middle-end/57075 + * tree-inline.c (copy_edges_for_bb): Still split the bbs, + even if not adding abnormal edges for calls that can make + abnormal gotos. + +2013-04-29 Richard Biener <rguenther@suse.de> + + PR middle-end/57103 + * tree-cfg.c (move_stmt_op): Fix condition under which to update + TREE_BLOCK. + (move_stmt_r): Remove redundant checking. + +2013-04-29 Teresa Johnson <tejohnson@google.com> + + PR bootstrap/57077 + * basic-block.h (apply_scale): New function. + (apply_probability): Use apply_scale. + * gimple-streamer-in.c (input_bb): Ditto. + * lto-streamer-in.c (input_cfg): Ditto. + * lto-cgraph.c (merge_profile_summaries): Ditto. + * tree-optimize.c (execute_fixup_cfg): Ditto. + * tree-inline.c (copy_bb): Update comment to use apply_scale. + (copy_edges_for_bb): Ditto. + (copy_cfg_body): Ditto. + +2013-04-29 Tom de Vries <tom@codesourcery.com> + + * tree-ssa-tail-merge.c (find_same_succ_bb): Skip loop latch bbs. + (replace_block_by): Don't set LOOPS_NEED_FIXUP. + (tail_merge_optimize): Handle current_loops == NULL. + +2013-04-26 Jeff Law <law@redhat.com> + + * tree-vrp.c (range_fits_type_p): Move to earlier point in file. + (simplify_cond_using_ranges): Generalize code to simplify + COND_EXPRs where one argument is a constant and the other + is an SSA_NAME created by an integral type conversion. + +2013-04-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (store_minmaxsi): Use only when + optimize_insn_for_size_p. + +2013-04-29 Christian Bruel <christian.bruel@st.com> + + PR target/57108 + * sh.md (tstsi_t_zero_extract_eq): Set mode for operand 0. + +2013-04-29 Richard Biener <rguenther@suse.de> + + PR middle-end/57089 + * omp-low.c (expand_omp_taskreg): If the parent function had a broken + loop tree make sure to schedule a fixup for the child as well. + (expand_omp_for_generic): Properly add loops. + (expand_omp_for_static_nochunk): Likewise. + (expand_omp_for_static_chunk): Likewise. + (expand_omp_for): For the degenerate case fixup loops. + (expand_omp_sections): Fix default bb placement in loops. + (expand_omp_atomic_pipeline): Properly add loops. + +2013-04-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * predict.c: Fix typo in comment above #define PROB_VERY_UNLIKELY. + +2013-04-29 Tom de Vries <tom@codesourcery.com> + + * tree-ssa-tail-merge.c: Update header comment. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h + (vcvt<sd>_f<32,64>_s<32,64>): Rewrite in C. + (vcvt<q>_f<32,64>_s<32,64>): Rewrite using builtins. + (vcvt_<high_>_f<32,64>_f<32,64>): Likewise. + (vcvt<qsd>_<su><32,64>_f<32,64>): Likewise. + (vcvta<qsd>_<su><32,64>_f<32,64>): Likewise. + (vcvtm<qsd>_<su><32,64>_f<32,64>): Likewise. + (vcvtn<qsd>_<su><32,64>_f<32,64>): Likewise. + (vcvtp<qsd>_<su><32,64>_f<32,64>): Likewise. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (<optab><VDQF:mode><fcvt_target>2): New, maps to fix, fixuns. + (<fix_trunc_optab><VDQF:mode><fcvt_target>2): New, maps to + fix_trunc, fixuns_trunc. + (ftrunc<VDQF:mode>2): New. + * config/aarch64/iterators.md (optab): Add fix, fixuns. + (fix_trunc_optab): New. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Vectorize over ifloorf, + iceilf, lround, iroundf. + +2013-04-29 Uros Bizjak <ubizjak@gmail.com> + + PR target/54349 + * config/i386/i386.h (enum ix86_tune_indices) + <X86_TUNE_INTER_UNIT_MOVES_TO_VEC, X86_TUNE_INTER_UNIT_MOVES_FROM_VEC>: + New, split from X86_TUNE_INTER_UNIT_MOVES. + <X86_TUNE_INTER_UNIT_MOVES>: Remove. + (TARGET_INTER_UNIT_MOVES_TO_VEC): New define. + (TARGET_INTER_UNIT_MOVES_FROM_VEC): Ditto. + (TARGET_INTER_UNIT_MOVES): Remove. + * config/i386/i386.c (initial_ix86_tune_features): Update. + Disable X86_TUNE_INTER_UNIT_MOVES_FROM_VEC for m_ATHLON_K8 only. + (ix86_expand_convert_uns_didf_sse): Use + TARGET_INTER_UNIT_MOVES_TO_VEC instead of TARGET_INTER_UNIT_MOVES. + (ix86_expand_vector_init_one_nonzero): Ditto. + (ix86_expand_vector_init_interleave): Ditto. + (inline_secondary_memory_needed): Return true for moves from SSE class + registers for !TARGET_INTER_UNIT_MOVES_FROM_VEC targets and for moves + to SSE class registers for !TARGET_INTER_UNIT_MOVES_TO_VEC targets. + * config/i386/constraints.md (Yi, Ym): Depend on + TARGET_INTER_UNIT_MOVES_TO_VEC. + (Yj, Yn): New constraints. + * config/i386/i386.md (*movdi_internal): Change constraints of + operand 1 from Yi to Yj and from Ym to Yn. + (*movsi_internal): Ditto. + (*movdf_internal): Ditto. + (*movsf_internal): Ditto. + (*float<SWI48x:mode><X87MODEF:mode>2_1): Use + TARGET_INTER_UNIT_MOVES_TO_VEC instead of TARGET_INTER_UNIT_MOVES. + (*float<SWI48x:mode><X87MODEF:mode>2_1 splitters): Ditto. + (floatdi<X87MODEF:mode>2_i387_with_xmm): Ditto. + (floatdi<X87MODEF:mode>2_i387_with_xmm splitters): Ditto. + * config/i386/sse.md (movdi_to_sse): Ditto. + (sse2_stored): Change constraint of operand 1 from Yi to Yj. + Use TARGET_INTER_UNIT_MOVES_FROM_VEC instead of + TARGET_INTER_UNIT_MOVES. + (sse_storeq_rex64): Change constraint of operand 1 from Yi to Yj. + (sse_storeq_rex64 splitter): Use TARGET_INTER_UNIT_MOVES_FROM_VEC + instead of TARGET_INTER_UNIT_MOVES. + * config/i386/mmx.md (*mov<mode>_internal): Change constraint of + operand 1 from Yi to Yj and from Ym to Yn. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi_): New. + (float_truncate_hi_): Likewise. + (float_extend_lo_): Likewise. + (float_truncate_lo_): Likewise. + * config/aarch64/aarch64-simd.md (vec_unpacks_lo_v4sf): New. + (aarch64_float_extend_lo_v2df): Likewise. + (vec_unpacks_hi_v4sf): Likewise. + (aarch64_float_truncate_lo_v2sf): Likewise. + (aarch64_float_truncate_hi_v4sf): Likewise. + (vec_pack_trunc_v2df): Likewise. + (vec_pack_trunc_df): Likewise. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_fold_builtin): Fold float conversions. + * config/aarch64/aarch64-simd-builtins.def + (floatv2si, floatv4si, floatv2di): New. + (floatunsv2si, floatunsv4si, floatunsv2di): Likewise. + * config/aarch64/aarch64-simd.md + (<optab><fcvt_target><VDQF:mode>2): New, expands to float and floatuns. + * config/aarch64/iterators.md (FLOATUORS): New. + (optab): Add float, floatuns. + (su_optab): Likewise. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Use new names for + fcvt builtins. + * config/aarch64/aarch64-simd-builtins.def (fcvtzs): Split as... + (lbtruncv2sf, lbtruncv4sf, lbtruncv2df): ...This. + (fcvtzu): Split as... + (lbtruncuv2sf, lbtruncuv4sf, lbtruncuv2df): ...This. + (fcvtas): Split as... + (lroundv2sf, lroundv4sf, lroundv2df, lroundsf, lrounddf): ...This. + (fcvtau): Split as... + (lrounduv2sf, lrounduv4sf, lrounduv2df, lroundusf, lroundudf): ...This. + (fcvtps): Split as... + (lceilv2sf, lceilv4sf, lceilv2df): ...This. + (fcvtpu): Split as... + (lceiluv2sf, lceiluv4sf, lceiluv2df, lceilusf, lceiludf): ...This. + (fcvtms): Split as... + (lfloorv2sf, lfloorv4sf, lfloorv2df): ...This. + (fcvtmu): Split as... + (lflooruv2sf, lflooruv4sf, lflooruv2df, lfloorusf, lfloorudf): ...This. + (lfrintnv2sf, lfrintnv4sf, lfrintnv2df, lfrintnsf, lfrintndf): New. + (lfrintnuv2sf, lfrintnuv4sf, lfrintnuv2df): Likewise. + (lfrintnusf, lfrintnudf): Likewise. + * config/aarch64/aarch64-simd.md + (l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Convert to + define_insn. + (aarch64_fcvt<frint_suffix><su><mode>): Remove. + * config/aarch64/iterators.md (FCVT): Include UNSPEC_FRINTN. + (fcvt_pattern): Likewise. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (l<fcvt_pattern><su_optab><fcvt_target><VDQF:mode>2): Rename to... + (l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): ... This. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vrndq<a,m,n,p>_f<32, 64>): Rename to... + (vrnd<a,m,n,p>q_f<32, 64>): ...This, implement using builtin. + (vrnd<a,m,n,p>_f32): Implement using builtins. + (vrnd<i,x><q>_f<32, 64>): New. + +2013-04-29 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Fold to standard pattern names. + * config/aarch64/aarch64-simd-builtins.def (frintn): New. + (frintz): Rename to... + (btrunc): ...this. + (frintp): Rename to... + (ceil): ...this. + (frintm): Rename to... + (floor): ...this. + (frinti): Rename to... + (nearbyint): ...this. + (frintx): Rename to... + (rint): ...this. + (frinta): Rename to... + (round): ...this. + * config/aarch64/aarch64-simd.md + (aarch64_frint<frint_suffix><mode>): Delete. + (<frint_pattern><mode>2): Convert to insn. + * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRINTN. + * config/aarch64/iterators.md (FRINT): Add UNSPEC_FRINTN. + (frint_pattern): Likewise. + (frint_suffix): Likewise. + +2013-04-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57081 + * loop-init.c: Include tree-flow.h. + (loop_optimizer_finalize): Free number of iteration estimates. + * Makefile.in (loop-init.o): Add $(TREE_FLOW_H) dependency. + +2013-04-29 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57083 + * tree-vrp.c (extract_range_from_binary_expr_1): For LSHIFT_EXPR with + non-singleton shift count range, zero extend low_bound for uns case. + + * config/i386/predicates.md (general_vector_operand): New predicate. + * config/i386/i386.c (const_vector_equal_evenodd_p): New function. + (ix86_expand_mul_widen_evenodd): Force op1 resp. op2 into register + if they aren't nonimmediate operands. If their original values + satisfy const_vector_equal_evenodd_p, don't shift them. + * config/i386/sse.md (mul<mode>3): Use general_vector_operand + predicates. For the SSE4.1 case force operands[{1,2}] into registers + if not nonimmediate_operand. + (vec_widen_smult_even_v4si): Use nonimmediate_operand predicates + instead of register_operand. + (vec_widen_<s>mult_odd_<mode>): Use general_vector_operand predicates. + +2013-04-28 Eric Botcazou <ebotcazou@adacore.com> + + * stor-layout.c (finalize_size_functions): Allocate a structure and + reset cfun before dumping the functions. + +2013-04-27 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (ix86_expand_call): Make cregs_size unsigned. + + PR target/56866 + * config/i386/i386.c (ix86_expand_mul_widen_evenodd): Don't + use xop_pmacsdqh if uns_p. + * config/i386/sse.md (xop_rotr<mode>3): Fix up computation of + the immediate rotate count. + +2013-04-26 Vladimir Makarov <vmakarov@redhat.com> + + * rtl.h (struct rtx_def): Add comment for field jump. + (LRA_SUBREG_P): New macro. + * recog.c (register_operand): Check LRA_SUBREG_P. + * lra.c (lra): Add note at the end of RTL code. Align non-empty + stack frame. + * lra-spills.c (lra_spill): Align stack after spilling pseudos. + (lra_final_code_change): Skip subreg change for operators. + * lra-eliminations.c (eliminate_regs_in_insn): Make return earlier + if there are no operand changes. + * lra-constraints.c (curr_insn_set): New. + (match_reload): Set LRA_SUBREG_P. + (emit_spill_move): Ditto. + (check_and_process_move): Use curr_insn_set. Process only single + set insns. Don't initialize sec_mem_p and change_p. + (simplify_operand_subreg): Use LRA_SUBREG_P. + (reg_in_class_p): New function. + (process_alt_operands): Use it. Use #if HAVE_ATTR_enabled instead + of #ifdef. Add code to remove cycling. + (process_address): Check EXTRA_CONSTRAINT_STR. Process even if + non-null disp. Reload inner instead of disp when base and index + are null. Try to put lo_sum into register. + (EBB_PROBABILITY_CUTOFF): Redefine probability in percents. + (check_and_process_move): Move code for move cost check to + simple_move_p. Remove equiv_substitution. + (simple_move_p): New function. + (curr_insn_transform): Initialize sec_mem_p and change_p. Set up + curr_insn_set. Call check_and_process_move only for single set + insns. Use the new function. Move call of check_and_process_move + after operand equiv substitution and address process. + +2013-04-26 Jakub Jelinek <jakub@redhat.com> + + PR go/57045 + * tree-ssa-uninit.c (compute_uninit_opnds_pos): In functions + with nonlocal goto receivers or returns twice calls, ignore + unininitialized values from abnormal edges to nl goto receiver + or returns twice call. + +2013-04-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/57051 + * fold-const.c (const_binop): Handle VEC_LSHIFT_EXPR + and VEC_RSHIFT_EXPR if shift count is a multiple of element + bitsize. + +2013-04-26 Richard Biener <rguenther@suse.de> + + * omp-low.c (finalize_task_copyfn): Do not drop PROP_loops. + (expand_omp_taskreg): Likewise. Mark loops for fixup. + * tree-cfg.c (move_block_to_fn): Remap loop fathers. + (fixup_loop_arrays_after_move): New function. + (move_sese_region_to_fn): Properly outline the loop tree parts + of the SESE region. + +2013-04-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (type, unit): Fix long lines. + +2013-04-26 Richard Biener <rguenther@suse.de> + + * Makefile.in (lto-streamer-in.o): Add $(CFGLOOP_H) dependency. + (lto-streamer-out.o): Likewise. + * cfgloop.c (init_loops_structure): Export, add struct function + argument and adjust. + (flow_loops_find): Adjust. + * cfgloop.h (enum loop_estimation): Add EST_LAST. + (init_loops_structure): Declare. + * lto-streamer-in.c: Include cfgloop.h. + (input_cfg): Input the loop tree. + * lto-streamer-out.c: Include cfgloop.h. + (output_cfg): Output the loop tree. + (output_struct_function_base): Do not drop PROP_loops. + +2013-03-26 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (execute_build_cfg): Build the loop tree. + (pass_build_cfg): Provide PROP_loops. + (move_sese_region_to_fn): Remove loops that are outlined into fn + for now. + * tree-inline.c: Include cfgloop.h. + (initialize_cfun): Do not drop PROP_loops. + (copy_loops): New function. + (copy_cfg_body): Copy loop structure. + (tree_function_versioning): Initialize destination loop tree. + * tree-ssa-loop.c (pass_tree_loop_init): Do not provide PROP_loops. + (pass_parallelize_loops): Do IL verification. + * loop-init.c (loop_optimizer_init): Fixup loops if required. + * tree-optimize.c (execute_fixup_cfg): If we need to cleanup + the CFG make sure we fixup loops as well. + * tree-ssa-tail-merge.c: Include cfgloop.h. + (replace_block_by): When merging loop latches mark loops for fixup. + * lto-streamer-out.c (output_struct_function_base): Drop + PROP_loops for now. + * tree-ssa-phiopt.c: Include tree-scalar-evolution.h. + (tree_ssa_cs_elim): Initialize the loop optimizer and SCEV. + * ipa-split.c: Include cfgloop.h. + (split_function): Add the new return block to the loop tree root. + * tree-cfgcleanup.c (remove_forwarder_block_with_phi): Return + whether we have removed the forwarder block. + (merge_phi_nodes): If we removed a forwarder mark loops for fixup. + * cfgloop.h (place_new_loop): Declare. + * cfgloopmanip.c (place_new_loop): Export. + * Makefile.in (asan.o): Add $(CFGLOOP_H) dependency. + (tree-switch-conversion.o): Likewise. + (tree-complex.o): Likewise. + (tree-inline.o): Likewise. + (tree-ssa-tailmerge.o): Likewise. + (ipa-split.o): Likewise. + (tree-ssa-phiopt.o): Add $(SCEV_H) dependency. + (tree-ssa-copy.o): Likewise. + * tree-switch-conversion.c: Include cfgloop.h + (process_switch): If we emit a bit-test cascade, schedule loops + for fixup. + * tree-complex.c: Include cfgloop.h. + (expand_complex_div_wide): Properly add new basic-blocks to loops. + * asan.c: Include cfgloop.h. + (create_cond_insert_point): Properly add new basic-blocks to + loops, schedule loop fixup. + * cfgloop.c (verify_loop_structure): Check that looks are not + marked for fixup. + * omp-low.c (expand_parallel_call): Properly add new basic-blocks + to loops. + (expand_omp_for_generic): Likewise. + (expand_omp_sections): Likewise. + (expand_omp_atomic_pipeline): Schedule loops for fixup. + * tree-ssa-copy.c: Include tree-scalar-evolution.h. + (fini_copy_prop): Disable DCE in substitute_and_fold if SCEV + is initialized, not when loops are present. + * tree-parloops.c (parallelize_loops): Remove checking here. + * passes.c (init_optimization_passes): Schedule a copy-propagation + pass before complete unrolling of inner loops. + +2013-04-26 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (toplev.o): Depend on diagnostic-color.h. + * diagnostic-color.c (should_colorize): Remove _WIN32 version. + (colorize_init): Add argument to _WIN32 version. + * toplev.c: Include diagnostic-color.h. + (process_options): Default to -fdiagnostics-color=auto if + GCC_COLORS env var is in the environment. + * common.opt (fdiagnostics-color=): Add Var and Init. + * doc/invoke.texi (-fdiagnostics-color=): Document that if GCC_COLORS + env var is in the environment, the default is auto rather than never. + + * diagnostic.h (file_name_as_prefix): Add context argument. + * diagnostic.c (file_name_as_prefix): Likewise. Colorize + the string as locus. + * langhooks.c (lhd_print_error_function): Adjust caller. + +2013-04-25 Lawrence Crowl <crowl@google.com> + + * var-tracking.c (shared_hash_def::htab): + Change type to hash_table. Update dependent calls and types. + +2013-04-25 Lawrence Crowl <crowl@google.com> + + * Makefile.in: Update as needed below. + + * alloc-pool.c (static hash_table <alloc_pool_hasher> alloc_pool_hash): + Move declaration to after the type's method definitons. + + * attribs.c (htab_t scoped_attributes::attribute_hash): + Change type to hash_table. Update dependent calls and types. + + * bitmap.c (htab_t bitmap_desc_hash): + Change type to hash_table. Update dependent calls and types. + + * cselib.c (htab_t cselib_hash_table): + Change type to hash_table. Update dependent calls and types. + + * data-streamer.h (struct string_slot): Move to lto-streamer.h. + (hash_string_slot_node): Move implementation into lto-streamer.h + struct string_slot_hasher. + (eq_string_slot_node): Likewise. + + * data-streamer-out.c: Update output_block::string_hash_table + dependent calls and types. + + * dwarf2cfi.c (htab_t trace_index): + Change type to hash_table. Update dependent calls and types. + + * dwarf2out.c (htab_t break_out_includes::cu_hash_table): + Change type to hash_table. Update dependent calls and types. + (htab_t copy_decls_for_unworthy_types::decl_table): Likewise. + (htab_t optimize_external_refs::map): Likewise. + (htab_t output_comp_unit::extern_map): Likewise. + (htab_t output_comdat_type_unit::extern_map): Likewise. + (htab_t output_macinfo::macinfo_htab): Likewise. + (htab_t optimize_location_lists::htab): Likewise. + (htab_t dwarf2out_finish::comdat_type_table): Likewise. + + * except.c (htab_t ehspec_hash_type): + Change type to hash_table. Update dependent calls and types. + (assign_filter_values::ttypes): Likewise. + (assign_filter_values::ehspec): Likewise. + (sjlj_assign_call_site_values::ar_hash): Likewise. + (convert_to_eh_region_ranges::ar_hash): Likewise. + + * gcse.c (htab_t pre_ldst_table): + Change type to hash_table. Update dependent calls and types. + + * ggc-common.c (htab_t saving_htab): + Change type to hash_table. Update dependent calls and types. + (htab_t loc_hash): Likewise. + (htab_t ptr_hash): Likewise. + (call_count): Rename ggc_call_count. + (call_alloc): Rename ggc_call_alloc. + (loc_descriptor): Rename make_loc_descriptor. + (add_statistics): Rename ggc_add_statistics. + + * ggc-common.c (saving_htab): + Change type to hash_table. Update dependent calls and types. + + * gimple.h (struct gimplify_ctx): Move to gimplify-ctx.h. + (push_gimplify_context): Likewise. + (pop_gimplify_context): Likewise. + (struct gimple_temp_hash_elt): Added. + (struct gimplify_hasher): Likewise. + (struct gimplify_ctx.temp_htab): + Change type to hash_table. Update dependent calls and types. + + * gimple-fold.c: Include gimplify-ctx.h. + + * gimple-ssa-strength-reduction.c (htab_t base_cand_map): + Change type to hash_table. Update dependent calls and types. + (base_cand_dump_callback): Rename to ssa_base_cand_dump_callback to + avoid potential global name collision. + + * gimplify.c: Include gimplify-ctx.h. + (struct gimple_temp_hash_elt): Move to gimplify-ctx.h. + (htab_t gimplify_ctx::temp_htab): + Update dependent calls and types for new type hash_table. + (gimple_tree_hash): Move into gimplify_hasher in gimplify-ctx.h. + (gimple_tree_eq): Move into gimplify_hasher in gimplify-ctx.h. + + * gimplify-ctx.h: New. + (struct gimple_temp_hash_elt): Move from gimplify.c. + (class gimplify_hasher): New. + (struct gimplify_ctx): Move from gimple.h. + (htab_t gimplify_ctx::temp_htab): + Change type to hash_table. Update dependent calls and types. + + * graphite-clast-to-gimple.c: Include graphite-htab.h. + (htab_t ivs_params::newivs_index): + Change type to hash_table. Update dependent calls and types. + (htab_t ivs_params::params_index): Likewise. + (htab_t print_generated_program::params_index): Likewise. + (htab_t gloog::newivs_index): Likewise. + (htab_t gloog::params_index): Likewise. + + * graphite.c: Include graphite-htab.h. + 4htab_t graphite_transform_loops::bb_pbb_mapping): + Change type to hash_table. Update dependent calls and types. + + * graphite-clast-to-gimple.h: (extern gloog) Move to graphite-htab.h. + (bb_pbb_map_hash): Fold into bb_pbb_htab_type in graphite-htab.h. + (eq_bb_pbb_map): Fold into bb_pbb_htab_type in graphite-htab.h. + + * graphite-dependences.c: Include graphite-htab.h. + (loop_is_parallel_p): Change hash table type of parameter. + + * graphite-htab.h: New. + (typedef hash_table <bb_pbb_hasher> bb_pbb_htab_type): New. + (extern find_pbb_via_hash): Move from graphite-poly.h. + (extern loop_is_parallel_p): Move from graphite-poly.h. + (extern get_loop_body_pbbs): Move from graphite-poly.h. + + * graphite-poly.h (extern find_pbb_via_hash): Move to graphite-htab.h. + (extern loop_is_parallel_p): Move to graphite-htab.h. + (extern get_loop_body_pbbs): Move to graphite-htab.h. + + * haifa-sched.c (htab_t delay_htab): + Change type to hash_table. Update dependent calls and types. + (htab_t delay_htab_i2): Likewise. + + * ira-color.c (htab_t allocno_hard_regs_htab): + Change type to hash_table. Update dependent calls and types. + + * ira-costs.c (htab_t cost_classes_htab): + Change type to hash_table. Update dependent calls and types. + + * loop-invariant.c (htab_t merge_identical_invariants::eq): + Change type to hash_table. Update dependent calls and types. + + * loop-iv.c (htab_t bivs): + Change type to hash_table. Update dependent calls and types. + + * loop-unroll.c (htab_t opt_info::insns_to_split): + Change type to hash_table. Update dependent calls and types. + (htab_t opt_info::insns_with_var_to_expand): Likewise. + + * lto-streamer.h (struct string_slot): Move from data-streamer.h + (struct string_slot_hasher): New. + (htab_t output_block::string_hash_table): + Change type to hash_table. Update dependent calls and types. + + * lto-streamer-in.c (freeing_string_slot_hasher): New. + (htab_t file_name_hash_table): + Change type to hash_table. Update dependent calls and types. + + * lto-streamer-out.c: Update output_block::string_hash_table dependent + calls and types. + + * lto-streamer.c (htab_t tree_htab): + Change type to hash_table. Update dependent calls and types. + + * omp-low.c: Include gimplify-ctx.h. + + * passes.c (htab_t name_to_pass_map): + Change type to hash_table. Update dependent calls and types. + (pass_traverse): Rename to passes_pass_traverse. + + * plugin.c (htab_t event_tab): + Change type to hash_table. Update dependent calls and types. + + * postreload-gcse.c (htab_t expr_table): + Change type to hash_table. Update dependent calls and types. + (dump_hash_table_entry): Rename dump_expr_hash_table_entry. + + * sese.c (debug_rename_map_1): Make extern. + (htab_t copy_bb_and_scalar_dependences::rename_map): + Change type to hash_table. Update dependent calls and types. + + * sese.h (extern debug_rename_map): Move to .c file. + + * store-motion.c (htab_t store_motion_mems_table): + Change type to hash_table. Update dependent calls and types. + + * trans-mem.c (htab_t tm_new_mem_hash): + Change type to hash_table. Update dependent calls and types. + + * tree-browser.c (htab_t TB_up_ht): + Change type to hash_table. Update dependent calls and types. + + * tree-cfg.c (htab_t discriminator_per_locus): + Change type to hash_table. Update dependent calls and types. + + * tree-complex.c: Include tree-hasher.h + (htab_t complex_variable_components): + Change type to hash_table. Update dependent calls and types. + + * tree-eh.c (htab_t finally_tree): + Change type to hash_table. Update dependent calls and types. + + * tree-flow.h (extern int_tree_map_hash): Moved into tree-hasher + struct int_tree_hasher. + (extern int_tree_map_eq): Likewise. + (uid_decl_map_hash): Removed. + (extern decl_tree_map_eq): Likewise. + + * tree-hasher.h: New. + (struct int_tree_hasher): New. + (typedef int_tree_htab_type): New. + + * tree-inline.c: Include gimplify-ctx.h. + + * tree-mudflap.c: Include gimplify-ctx.h. + + * tree-parloops.c: Include tree-hasher.h. + (htab_t eliminate_local_variables_stmt::decl_address): + Change type to hash_table. Update dependent calls and types. + (htab_t separate_decls_in_region::decl_copies): Likewise. + + * tree-scalar-evolution.c (htab_t resolve_mixers::cache): + Change type to hash_table. Update dependent calls and types. + + * tree-sra.c (candidates): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa.c (int_tree_map_eq): Moved into struct int_tree_hasher + in tree-flow.h. + (int_tree_map_hash): Likewise. + + * tree-ssa-dom.c (htab_t avail_exprs): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-live.c (var_map_base_init::tree_to_index): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-loop-ivopts.c (struct ivopts_data.inv_expr_tab): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-phiopt.c (seen_ssa_names): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-strlen.c (decl_to_stridxlist_htab): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-uncprop.c (equiv): + Change type to hash_table. Update dependent calls and types. + +2013-04-25 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/57003 + * regcprop.c (copyprop_hardreg_forward_1): If ksvd.ignore_set_reg, + call note_stores with kill_clobbered_value callback again after + killing regs_invalidated_by_call. + +2013-04-25 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_simd_bsl<mode>_internal): Rewrite RTL to not use UNSPEC_BSL. + (aarch64_simd_bsl<mode>): Likewise. + * config/aarch64/iterators.md (unspec): Remove UNSPEC_BSL. + +2013-04-25 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/57066 + * builtins.c (fold_builtin_logb): Return +Inf for -Inf. + +2013-04-25 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md (neg<mode>2): Use VDQ iterator. + +2013-04-25 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_fold_builtin): New. + * config/aarch64/aarch64-protos.h (aarch64_fold_builtin): New. + * config/aarch64/aarch64.c (TARGET_FOLD_BUILTIN): Define. + * config/aarch64/aarch64-simd-builtins.def (abs): New. + * config/aarch64/arm_neon.h + (vabs<q>_<f32, 64>): Implement using __builtin_aarch64_fabs. + +2013-04-25 James Greenhalgh <james.greenhalgh@arm.com> + Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_gimple_fold_builtin): New. + * config/aarch64/aarch64-protos.h (aarch64_gimple_fold_builtin): New. + * config/aarch64/aarch64-simd-builtins.def (addv): New. + * config/aarch64/aarch64-simd.md (addpv4sf): New. + (addvv4sf): Update. + * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define. + +2013-04-25 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md + (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): New pattern. + +2013-04-25 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md (*ngc<mode>): New pattern. + (*ngcsi_uxtw): New pattern. + +2013-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + Julian Brown <julian@codesourcery.com> + + * config/arm/arm.c (neon_builtin_type_mode): Add T_V4HF. + (TB_DREG): Add T_V4HF. + (v4hf_UP): New macro. + (neon_itype): Add NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. + (arm_init_neon_builtins): Handle NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. + Handle initialisation of V4HF. Adjust initialisation of reinterpret + built-ins. + (arm_expand_neon_builtin): Handle NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW. + (arm_vector_mode_supported_p): Handle V4HF. + (arm_mangle_map): Handle V4HFmode. + * config/arm/arm.h (VALID_NEON_DREG_MODE): Add V4HF. + * config/arm/arm_neon_builtins.def: Add entries for + vcvtv4hfv4sf, vcvtv4sfv4hf. + * config/arm/neon.md (neon_vcvtv4sfv4hf): New pattern. + (neon_vcvtv4hfv4sf): Likewise. + * config/arm/neon-gen.ml: Handle half-precision floating point + features. + * config/arm/neon-testgen.ml: Handle Requires_FP_bit feature. + * config/arm/arm_neon.h: Regenerate. + * config/arm/neon.ml (type elts): Add F16. + (type vectype): Add T_float16x4, T_floatHF. + (type vecmode): Add V4HF. + (type features): Add Requires_FP_bit feature. + (elt_width): Handle F16. + (elt_class): Likewise. + (elt_of_class_width): Likewise. + (mode_of_elt): Refactor. + (type_for_elt): Handle F16, fix error messages. + (vectype_size): Handle T_float16x4. + (vcvt_sh): New function. + (ops): Add entries for vcvt_f16_f32, vcvt_f32_f16. + (string_of_vectype): Handle T_floatHF, T_float16, T_float16x4. + (string_of_mode): Handle V4HF. + * doc/arm-neon-intrinsics.texi: Regenerate. + +2013-04-25 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): Fix asm_fprintf + format specifier in 'X' case. + +2013-04-25 Alan Modra <amodra@gmail.com> + + PR target/57052 + * config/rs6000/rs6000.md (rotlsi3_internal7): Rename to + rotlsi3_internal7le and condition on !BYTES_BIG_ENDIAN. + (rotlsi3_internal8be): New BYTES_BIG_ENDIAN insn. + Repeat for many other rotate/shift and mask patterns using subregs. + Name lshiftrt insns. + (ashrdisi3_noppc64): Rename to ashrdisi3_noppc64be and condition + on WORDS_BIG_ENDIAN. + +2013-04-25 Alan Modra <amodra@gmail.com> + + * config.gcc: Support little-endian powerpc-linux targets. + * config/rs6000/linux.h (LINK_OS_LINUX_EMUL): Define. + (LINK_OS_LINUX_SPEC): Define. + * config/rs6000/linuxspe.h (TARGET_DEFAULT): + Preserve MASK_LITTLE_ENDIAN. + * config/rs6000/default64.h (TARGET_DEFAULT): Likewise. + * config/rs6000/linuxaltivec.h (TARGET_DEFAULT): Likewise. + * config/rs6000/linux64.h (OPTION_LITTLE_ENDIAN): Don't zero. + (LINK_OS_LINUX_EMUL32, LINK_OS_LINUX_EMUL64): Define. + (LINK_OS_LINUX_SPEC32, LINK_OS_LINUX_SPEC64): Use above. + * config/rs6000/rs6000.c (output_toc): Don't use .tc for TARGET_ELF. + Correct fp word order for little-endian. Don't shift toc entries + smaller than a word for little-endian. + * config/rs6000/rs6000.md (bswaphi2, bswapsi2 split): Comment. + (bswapdi2 splits): Correct low-part subreg for little-endian. + Remove wrong BYTES_BIG_ENDIAN tests, and rename vars to remove + low/high where such is correct only for be. + * config/rs6000/sysv4.h (SUBTARGET_OVERRIDE_OPTIONS): Allow + little-endian for -mcall-aixdesc. + +2013-04-25 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_secondary_reload_inner): Use + replace_equiv_address_nv. + +2013-04-25 Alan Modra <amodra@gmail.com> + + * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Tidy. + +2013-04-24 Vladimir Makarov <vmakarov@redhat.com> + + Revert: + 2013-04-24 Vladimir Makarov <vmakarov@redhat.com> + * rtl.h (struct rtx_def): ... + +2013-04-24 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimizations/57046 + * lra-constraints (split_reg): Set up lra_risky_transformations_p + for multi-reg splits. + +2013-04-24 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/x86-64.h (ASM_SPEC): Support -mx32. + +2013-04-24 Sterling Augustine <saugustine@google.com> + + * dwarf2out.c (skeleton_debug_str_hash, add_skeleton_AT_string) + (comp_dir_string, debug_str_dwo_section): New. + (DEBUG_STR_DWO_SECTION): Rename to ... + (DEBUG_DWO_STR_SECTION): ... this. + (DEBUG_NORM_STR_SECTION): Delete. + (DEBUG_STR_SECTION, DEBUG_STR_SECTION_FLAGS): Edit definitions. + (DEBUG_STR_DWO_SECTION_FLAGS): New. + (find_AT_string): Move most logic to ... + (find_AT_string_in_table): ... here. New. + (add_top_level_skeleton_die_attrs): Call comp_dir_string and + add_skeleton_AT_string. Delete logic. + (output_skeleton_debug_sections): Remove call to + add_top_level_skeleton_die_attrs. + (add_comp_dir_attribute): Move logic to comp_dir_string. + (dwarf2out_init): Initialize debug_str_dwo_section. + (output_indirect_string): Call find_string_form. + (output_indirect_strings): Rewrite. + (prune_unused_types): Empty skeleton_debug_str_hash. + Call get_skeleton_type_unit and add_top_level_skeleton_die_attrs. + (dwarf2out_finish): Call output_indirect_strings. + +2013-04-24 Paolo Carlini <paolo.carlini@oracle.com> + + * doc/cpp.texi: Remove __GXX_EXPERIMENTAL_CXX1Y__. + +2013-04-24 Vladimir Makarov <vmakarov@redhat.com> + + * rtl.h (struct rtx_def): Add comment for field jump. + (LRA_SUBREG_P): New macro. + * recog.c (register_operand): Check LRA_SUBREG_P. + * lra.c (lra): Add note at the end of RTL code. Align non-empty + stack frame. + * lra-spills.c (lra_spill): Align stack after spilling pseudos. + (lra_final_code_change): Skip subreg change for operators. + * lra-eliminations.c (eliminate_regs_in_insn): Make return earlier + if there are no operand changes. + * lra-constraints.c (curr_insn_set): New. + (match_reload): Set LRA_SUBREG_P. + (emit_spill_move): Ditto. + (check_and_process_move): Use curr_insn_set. Process only single + set insns. Don't initialize sec_mem_p and change_p. + (simplify_operand_subreg): Use LRA_SUBREG_P. + (reg_in_class_p): New function. + (process_alt_operands): Use it. Use #if HAVE_ATTR_enabled instead + of #ifdef. Add code to remove cycling. + (process_address): Check EXTRA_CONSTRAINT_STR. Process even if + non-null disp. Reload inner instead of disp when base and index + are null. Try to put lo_sum into register. + (EBB_PROBABILITY_CUTOFF): Redefine probability in percents. + (check_and_process_move): Move code for move cost check to + simple_move_p. Remove equiv_substitution. + (simple_move_p): New function. + (curr_insn_transform): Initialize sec_mem_p and change_p. Set up + curr_insn_set. Call check_and_process_move only for single set + insns. Use the new function. Move call of check_and_process_move + after operand equiv substitution and address process. + +2013-04-24 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vld1<q>_lane*): Fix constraints. + (vld1<q>_dup_<sufp><8, 16, 32, 64>): Likewise. + (vld1<q>_<sufp><8, 16, 32, 64>): Likewise. + +2013-04-24 Paolo Carlini <paolo.carlini@oracle.com> + + * doc/cpp.texi: Document __GXX_EXPERIMENTAL_CXX1Y__. + +2013-04-24 Marek Polacek <polacek@redhat.com> + + * tree-scalar-evolution.h (analyze_scalar_evolution): Remove. + * tree-scalar-evolution.c (get_exit_conditions_rec): Likewise. + (select_loops_exit_conditions): Likewise. + (number_of_iterations_for_all_loops): Likewise. + (analyze_scalar_evolution_for_all_loop_phi_nodes): Likewise. + (scev_analysis): Likewise. + +2013-04-02 Catherine Moore <clm@codesourcery.com> + Chao-ying Fu <fu@mips.com> + + * config/mips/micromips.md (jraddiusp): New pattern. + * config/mips/mips.c (mips_expand_epilogue): Use the JRADDIUSP + instruction if possible. + +2013-04-24 Alan Modra <amodra@gmail.com> + + * config/rs6000/driver-rs6000.c (elf_dcachebsize): Fix comment pasto. + +2013-04-24 Julian Brown <julian@codesourcery.com> + Chung-Lin Tang <cltang@codesourcery.com> + + * dwarf2out.c (gen_enumeration_type_die): Fix HOST_BITS_PER_WIDE_INT + dependency behavior in enumeration type DIE generation. Add TODO note + to comments about future DW_FORM_sdata/udata re-work of related code. + +2013-04-23 Lawrence Crowl <crowl@google.com> + + * Makefile.in: Update as needed below. + + * hash-table.h (class hash_table): + Correct many methods with parameter types compare_type to the correct + value_type. (Correct code was unlikely to notice the change.) + (hash_table::elements_with_deleted) New. + (class hashtable::iterator): New. + (hashtable::begin()): New. + (hashtable::end()): New. + (FOR_EACH_HASH_TABLE_ELEMENT): New. + + * statistics.c (statistics_hashes): + Change type to hash_table. Update dependent calls and types. + + * tree-into-ssa.c (var_infos): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-coalesce.c (struct coalesce_list_d.list): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-loop-im.c (struct mem_ref.refs): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-reassoc.c (undistribute_ops_list::ctable): + Change type to hash_table. Update dependent calls and types. + + * tree-ssa-sccvn.c (vn_tables_s::nary): + Change type to hash_table. Update dependent calls and types. + (vn_tables_s::phis): Likewise. + (vn_tables_s::references): Likewise. + + * tree-ssa-sccvn.h (vn_nary_op_eq): Update parameter and return types. + (vn_reference_eq): Update parameter and return types. + + * tree-ssa-structalias.c (pointer_equiv_class_table): + Change type to hash_table. Update dependent calls and types. + (location_equiv_class_table): Likewise. + + * tree-vect-data-refs.c: Consequential changes for making + peeling a hash_table. + + * tree-vect-loop.c (new_loop_vec_info): Dependent hash_table update. + (destroy_loop_vec_info): Dependent hash_table update. + + * tree-vectorizer.h (peeling_htab): + Change type to hash_table. Update dependent calls and types. + +2013-04-23 Shiva Chen <shiva0217@gmail.com> + + * lra-assigns.c (find_hard_regno_for): Use lra_reg_val_equal_p + to check the register content is equal or not. + * lra-constraints.c (match_reload): Use lra_assign_reg_val + to assign register content record. + * lra-eliminations.c (update_reg_eliminate): Use + lra_update_reg_val_offset to update register content offset. + * lra-int.h (struct lra_reg): Add offset member. + (lra_reg_val_equal_p): New static inline function. + (lra_update_reg_val_offset): New static inline function. + (lra_assign_reg_val): New static inline function. + * lra.c (lra_create_new_reg): Use lra_assign_reg_val + to assign register content record. + (initialize_lra_reg_info_element): Initial offset to zero. + +2013-04-23 Catherine Moore <clm@codesourcery.com> + + * config/mips/mips.md (*movhi_internal, *movqi_internal): New + operands. Record compression. + +2013-04-23 Xinliang David Li <davidxl@google.com> + + * cfghhooks.c (dump_bb_for_graph): Support 'slim' graph dump. + +2013-04-23 Richard Biener <rguenther@suse.de> + + PR middle-end/57036 + * tree-inline.c (copy_edges_for_bb): Add can_make_abnormal_goto + parameter, only add abnormal goto edges from the copied body + if the call could perform abnormal gotos. + (copy_cfg_body): Adjust. + +2013-04-23 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add simd attribute. + +2013-04-23 Andreas Schwab <schwab@linux-m68k.org> + + * coretypes.h (gimple_stmt_iterator): Add struct to make + compatible with C. + +2013-04-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57026 + * tree-vrp.c (simplify_conversion_using_ranges): Do not propagate + from SSA names occuring in abnormal PHI nodes. + +2013-04-22 Andi Kleen <ak@linux.intel.com> + + * lto/lto.c (print_lto_report_1): Fix LTO report names. + +2013-04-22 Andi Kleen <ak@linux.intel.com> + + * lto/lto.c (print_lto_report_1): Declare early. + (read_cgraph_and_symbols): Call print_lto_report_1 early. + +2013-04-22 Andi Kleen <ak@linux.intel.com> + + * common.opt (-flto-report-wpa): Add. + * doc/invoke.texi (-flto-report-wpa): Add. + * lto/lto.c (do_whole_program_analysis): Check for lto-report-wpa. + (lto_main): dito. + +2013-04-22 Xinliang David Li <davidxl@google.com> + + * graph.c (draw_cfg_node_succ_edges): Add branch probility as label. + * cfghhooks.c (dump_bb_for_graph): Dump profile count and frquency. + * Makefile.in: New dependency + + David Daney <ddaney.cavm@gmail.com> + + * configure.ac (gcc_cv_as_micromips_support): Use the + --fatal-warnings option. + * configure: Regenerate. + +2013-04-22 Marek Polacek <polacek@redhat.com> + + PR sanitizer/56990 + * tsan.c (instrument_expr): Don't instrument expression + in case its size is zero. + +2013-04-22 Uros Bizjak <ubizjak@gmail.com> + + PR target/57032 + Revert: + 2013-03-17 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (TARGET_LRA_P): New define. + +2013-04-22 James Greenhalgh <james.greenhalgh@arm.com> + + * coretypes.h (gimple_stmt_iterator_d): Forward declare. + (gimple_stmt_iterator): New typedef. + * gimple.h (gimple_stmt_iterator): Rename to... + (gimple_stmt_iterator_d): ... This. + * doc/tm.texi.in (TARGET_FOLD_BUILTIN): Detail restriction that + trees be valid for GIMPLE and GENERIC. + (TARGET_GIMPLE_FOLD_BUILTIN): New. + * gimple-fold.c (gimple_fold_call): Call target hook + gimple_fold_builtin. + * hooks.c (hook_bool_gsiptr_false): New. + * hooks.h (hook_bool_gsiptr_false): New. + * target.def (fold_stmt): New. + * doc/tm.texi: Regenerate. + +2013-04-22 Vladimir Makarov <vmakarov@redhat.com> + + PR target/57018 + * lra-eliminations.c (mark_not_eliminable): Prevent elimination of + a set sp if no stack realignment. + +2013-04-22 Nick Clifton <nickc@redhat.com> + + * config.gcc (tilegx-linux): Extend extra_objs rather than + overwriting it. + (tilepro-linux): Likewise. + +2013-04-22 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (CF): Remove. + (CF0, CF1, CF2, CF3, CF4, CF10): New. + (VAR<1-12>): Add MAP parameter. + (BUILTIN_*): Likewise. + * config/aarch64/aarch64-simd-builtins.def: Set MAP parameter. + * config/aarch64/aarch64-simd.md (aarch64_sshl_n<mode>): Remove. + (aarch64_ushl_n<mode>): Likewise. + (aarch64_sshr_n<mode>): Likewise. + (aarch64_ushr_n<mode>): Likewise. + (aarch64_<maxmin><mode>): Likewise. + (aarch64_sqrt<mode>): Likewise. + * config/aarch64/arm_neon.h (vshl<q>_n_*): Use new builtin names. + (vshr<q>_n_*): Likewise. + +2013-04-22 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_simd_builtin_type_mode): Handle SF types. + (sf_UP): Define. + (BUILTIN_GPF): Define. + (aarch64_init_simd_builtins): Handle SF types. + * config/aarch64/aarch64-simd-builtins.def (frecpe): Add support. + (frecps): Likewise. + (frecpx): Likewise. + * config/aarch64/aarch64-simd.md + (simd_types): Update simd_frcp<esx> to simd_frecp<esx>. + (aarch64_frecpe<mode>): New. + (aarch64_frecps<mode>): Likewise. + * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRECP<ESX>. + (v8type): Add frecp<esx>. + (aarch64_frecp<FRECP:frecp_suffix><mode>): New. + (aarch64_frecps<mode>): Likewise. + * config/aarch64/iterators.md (FRECP): New. + (frecp_suffix): Likewise. + * config/aarch64/arm_neon.h + (vrecp<esx><qsd>_<fd><32, 64>): Convert to using builtins. + +2013-04-22 Christian Bruel <christian.bruel@st.com> + + PR target/56995 + * config/sh/sh.h (enum reg_class): Remove DF_HI_REGS. + (REG_CLASS_NAMES): Idem. + (REG_CLASS_CONTENTS): Idem. + (REGCLASS_HAS_FP_REG): Idem. + * config/sh/sh.c (sh_cannot_change_mode_class): Idem. + (sh_conditional_register_usage): Idem. + +2013-04-21 Jeff Law <law@redhat.com> + + * tree-ssa-forwprop.c (simplify_conversion_from_bitmask): New function. + (ssa_forward_propagate_and_combine): Use it. + +2013-04-19 Vladimir Makarov <vmakarov@redhat.com> + + * lra.c: Update the flow chart diagram. + +2013-04-19 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56847 + * lra-constraints.c (process_alt_operands): Discourage alternative + with non-matche doffsettable memory constraint fro memory with + known offset. + +2013-04-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56982 + * builtins.def (BUILT_IN_LONGJMP): longjmp is not a leaf + function. + * gimplify.c (gimplify_call_expr): Notice special calls. + (gimplify_modify_expr): Likewise. + * tree-cfg.c (make_abnormal_goto_edges): Handle setjmp-like + abnormal control flow receivers. + (call_can_make_abnormal_goto): Handle cfun->calls_setjmp + in the same way as cfun->has_nonlocal_labels. + (gimple_purge_dead_abnormal_call_edges): Likewise. + (stmt_starts_bb_p): Make setjmp-like abnormal control flow + receivers start a basic-block. + +2013-04-19 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (struct _slp_instance): Move load_permutation + member ... + (struct _slp_tree): ... here. Make it a vector of unsigned ints. + (SLP_INSTANCE_LOAD_PERMUTATION): Remove. + (SLP_TREE_LOAD_PERMUTATION): Add. + (vect_transform_slp_perm_load): Adjust prototype. + * tree-vect-slp.c (vect_free_slp_tree): Adjust. + (vect_free_slp_instance): Likewise. + (vect_create_new_slp_node): Likewise. + (vect_supported_slp_permutation_p): Remove. + (vect_slp_rearrange_stmts): Adjust. + (vect_supported_load_permutation_p): Likewise. Inline + vect_supported_slp_permutation_p here. + (vect_analyze_slp_instance): Compute load permutations per + slp node instead of per instance. + (vect_get_slp_defs): Adjust. + (vect_transform_slp_perm_load): Likewise. + (vect_schedule_slp_instance): Remove redundant code. + (vect_schedule_slp): Remove hack for PR56270, add it ... + * tree-vect-stmts.c (vectorizable_load): ... here, do not + CSE loads for SLP. Adjust. + +2013-04-19 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.c (load_multiple_sequence, ldm_stm_operation_p): Fix + spelling in two comments. + +2013-04-19 Greta Yorsh <Greta.Yorsh@arm.com> + + PR target/56797 + * config/arm/arm.c (load_multiple_sequence): Require SP + as base register for loads if SP is in the register list. + +2013-04-19 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/56718 + * ipa-cp.c (ipa_value_from_known_type_jfunc): Moved... + * ipa-prop.c (ipa_binfo_from_known_type_jfunc): ...here, renamed + and made public. Adjusted all callers. + (ipa_intraprocedural_devirtualization): New function. + * ipa-prop.h (ipa_binfo_from_known_type_jfunc): Declare. + (ipa_intraprocedural_devirtualization): Likewise. + * Makefile.in (tree-ssa-pre.o): Add ipa-prop.h to dependencies. + +2013-04-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57000 + * tree-ssa-reassoc.c (pass_reassoc): Add TODO_update_ssa_only_virtuals. + +2013-04-19 Terry Guo <terry.guo@arm.com> + + * config/arm/cortex-m4-fpu.md (cortex_m4_v): Delete cpu unit. + Replace with ... + (cortex_m4_v_a, cortex_m4_v_b): ... new cpu units. + (cortex_m4_v, cortex_m4_exa_va, cortex_m4_exb_vb): New reservations. + (cortex_m4_fmacs): Use new reservations. + (cortex_m4_f_load, cortex_m4_f_store): Likewise. + +2013-04-18 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56999 + * lra-coalesce.c (coalescable_pseudo_p): Remove 2nd parameter and + related code. + (lra_coalesce): Remove split_origin_bitmap and related code. + * lra.c (lra): Coalesce after undoing inheritance. Recreate live + ranges if necessary. + +2013-04-18 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (x86_64_ms_sysv_extra_clobbered_registers): + New array. + (ix86_expand_call): Remove clobbered_registers array and use + x86_64_ms_sysv_extra_clobbered_registers instead. + * config/i386/i386.h (x86_64_ms_sysv_extra_clobbered_registers): + Declare here. + * config/i386/predicates.md (call_rex64_ms_sysv_operation): New + predicate. + * config/i386/i386.md (*call_rex64_ms_sysv): Use + call_rex64_ms_sysv_operation predicate. Remove explicit clobbers. + (*call_value_rex64_ms_sysv): Ditto. + +2013-04-18 Cary Coutant <ccoutant@google.com> + + * dwarf2out.c (output_pubnames): Check die_perennial_p of + parent instead of die_mark. + +2013-04-18 Diego Novillo <dnovillo@google.com> + + * gimple.c (create_gimple_tmp): New. + (get_expr_type): New. + (build_assign): New. + (build_type_cast): New. + * gimple.h (enum ssa_mode): Define. + (gimple_seq_set_location): New. + * asan.c (build_check_stmt): Change some gimple_build_* calls + to use build_assign and build_type_cast. + +2013-04-18 Richard Biener <rguenther@suse.de> + + * tree-vect-data-refs.c (vect_analyze_group_access): Properly + handle negative step. Remove redundant checks. + (vect_create_data_ref_ptr): Avoid ICEs with non-constant steps. + * tree-vect-stmts.c (vectorizable_load): Instead of asserting + for negative step and grouped loads fail to vectorize. + +2013-04-18 Steven Bosscher <steven@gcc.gnu.org> + + * emit-rtl.c (reset_insn_used_flags): New function. + (reset_all_used_flags): Use it. + (verify_insn_sharing): New function. + (verify_rtl_sharing): Fix verification for SEQUENCEs. + +2013-04-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56984 + * tree-vrp.c (register_edge_assert_for_2): For (x >> M) < N + and (x >> M) >= N don't register any assertion if N << M is the + minimum value. + +2013-04-18 Steven Bosscher <steven@gcc.gnu.org> + + * lower-subreg.c (resolve_simple_move): If called self-recursive, + do not delete_insn insns that have not yet been emitted, only + unlink them with remove_insn. + * df-scan.c (df_insn_delete): Revert r197492. + +2013-04-17 Steven Bosscher <steven@gcc.gnu.org> + + * emit-rtl.c (link_insn_into_chain): Handle chaining of SEQUENCEs. + * reorg.c (emit_delay_sequence): Simplify with emit-rtl API. + +2013-04-17 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (movsicc_insn): Convert define_insn into + define_insn_and_split. + (and_scc,ior_scc,negscc): Likewise. + (cmpsi2_addneg, subsi3_compare): Convert to named patterns. + +2013-04-17 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.c (use_return_insn): Return 0 for targets that + can benefit from using a sequence of LDRD instructions in epilogue + instead of a single LDM instruction. + +2013-04-17 Manuel López-Ibáñez <manu@gcc.gnu.org> + + PR 45688 + * doc/extend.texi: Fix typo. + +2013-04-17 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_build_slp_tree_1): Split out from ... + (vect_build_slp_tree): ... here. + (vect_build_slp_tree_1): Compute which stmts of the SLP group + match. Remove special-casing of mismatched complex loads. + (vect_build_slp_tree): Based on the result from vect_build_slp_tree_1 + re-try the match with swapped commutative operands. + (vect_supported_load_permutation_p): Remove special-casing of + mismatched complex loads. + (vect_analyze_slp_instance): Adjust. + +2013-04-17 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/56921 + * cfgloop.h (struct loop): Add simple_loop_desc member. + (struct niter_desc): Mark with GTY(()). + (simple_loop_desc): Do not use aux field but simple_loop_desc. + * loop-iv.c (get_simple_loop_desc): Likewise. + (free_simple_loop_desc): Likewise. + + Revert + 2013-04-16 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/56921 + * loop-init.c (pass_rtl_move_loop_invariants): Add + TODO_do_not_ggc_collect to todo_flags_finish. + (pass_rtl_unswitch): Same. + (pass_rtl_unroll_and_peel_loops): Same. + (pass_rtl_doloop): Same. + +2013-04-17 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): New. + (decl_refs_may_alias_p): Add REF1 and REF2 parameters. + Use nonoverlapping_component_refs_of_decl_p to disambiguate component + references. + (refs_may_alias_p_1): Adjust call to decl_refs_may_alias_p. + * tree-streamer.c (record_common_node): Adjust reference in comment. + +2013-04-17 Terry Guo <terry.guo@arm.com> + + * config/arm/cortex-m4.md: Add a new bypass. + +2013-04-16 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md (*adds_<optab><mode>_multp2): + New pattern. + (*subs_<optab><mode>_multp2): New pattern. + (*adds_<optab><ALLX:mode>_<GPI:mode>): New pattern. + (*subs_<optab><ALLX:mode>_<GPI:mode>): New pattern. + +2013-04-16 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): New pattern. + (*subs_mul_imm_<mode>): New pattern. + +2013-04-16 David Edelsohn <dje.gcc@gmail.com> + + PR target/56948 + * config/rs6000/vsx.md (vsx_mov<mode>): Add j->r alternative. + (vsx_movti_64bit): Change j->wa to O->wa. Add n->r alternative. + (vsx_movti_32bit): Change j->wa to O->wa. + +2013-04-16 Richard Biener <rguenther@suse.de> + + PR rtl-optimization/56921 + * loop-init.c (pass_rtl_move_loop_invariants): Add + TODO_do_not_ggc_collect to todo_flags_finish. + (pass_rtl_unswitch): Same. + (pass_rtl_unroll_and_peel_loops): Same. + (pass_rtl_doloop): Same. + +2013-04-16 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.c (emit_multi_reg_push): New declaration + for an existing function. + (arm_emit_strd_push): New function. + (arm_expand_prologue): Used here. + (arm_emit_ldrd_pop): New function. + (arm_expand_epilogue): Used here. + (arm_get_frame_offsets): Update condition. + (arm_emit_multi_reg_pop): Add a special case for load of a single + register with writeback. + +2013-04-16 Uros Bizjak <ubizjak@gmail.com> + + * doc/invoke.texi (i386 Option): Reword -mstack-protector-guard + description. + +2013-04-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56756 + * tree-ssa-loop-im.c (struct first_mem_ref_loc_1): New functor. + (first_mem_ref_loc): New. + (execute_sm): Place the load temporarily before a previous + access instead of in the latch edge to ensure its SSA dependencies + are defined at points dominating the load. + +2013-04-16 Steven Bosscher <steven@gcc.gnu.org> + + * cfgrtl.c (cfg_layout_merge_blocks): Revert r184005, implement + correct fix by moving header and footer insn to the footer of + the merged basic block. Clear BB_END of the merged-away block. + + PR middle-end/43631 + * emit-rtl.c (make_note_raw): New function. + (link_insn_into_chain): New static inline function. + (add_insn): Use it. + (add_insn_before, add_insn_after): Factor insn chain linking code... + (add_insn_before_nobb, add_insn_after_nobb): ...here, new functions + using link_insn_into_chain. + (note_outside_basic_block_p): New helper function for emit_note_after + and emit_note_before. + (emit_note_after): Use nobb variant of add_insn_after if the note + should not be contained in a basic block. + (emit_note_before): Use nobb variant of add_insn_before if the note + should not be contained in a basic block. + (emit_note_copy): Use make_note_raw. + (emit_note): Likewise. + * bb-reorder.c (insert_section_boundary_note): Remove hack to set + BLOCK_FOR_INSN to NULL manually for NOTE_INSN_SWITCH_TEXT_SECTIONS. + * jump.c (cleanup_barriers): Use reorder_insns_nobb to avoid making + the moved barrier the tail of the basic block it follows. + * var-tracking.c (pass_variable_tracking): Add TODO_verify_flow. + +2013-04-15 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56962 + * gimple-ssa-strength-reduction.c (record_increment): Only set + initializer if gimple_assign_rhs_code is {,POINTER_}PLUS_EXPR and + either rhs1 or rhs2 is equal to c->base_expr. + +2013-04-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56933 + * tree-vectorizer.h (struct _stmt_vec_info): Remove read_write_dep + member. + (GROUP_READ_WRITE_DEPENDENCE): Remove. + (STMT_VINFO_GROUP_READ_WRITE_DEPENDENCE): Likewise. + * tree-vect-data-refs.c (vect_analyze_group_access): Move + dependence check ... + vect_analyze_data_ref_dependence (vect_analyze_data_ref_dependence): + ... here. + * tree-vect-stmts.c (new_stmt_vec_info): Do not initialize + GROUP_READ_WRITE_DEPENDENCE. + +2013-04-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * emit-rtl.c (reset_all_used_flags): New function. + (verify_rtl_sharing): Call reset_all_used_flags before and after + performing the checks. + +2013-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (const_ok_for_dimode_op): Handle AND case. + * config/arm/arm.md (*anddi3_insn): Change to insn_and_split. + * config/arm/constraints.md (De): New constraint. + * config/arm/neon.md (anddi3_neon): Delete. + (neon_vand<mode>): Expand to standard anddi3 pattern. + * config/arm/predicates.md (imm_for_neon_inv_logic_operand): + Move earlier in the file. + (neon_inv_logic_op2): Likewise. + (arm_anddi_operand_neon): New predicate. + +2013-04-15 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (gcc_cv_ld_as_needed): Set + gcc_cv_ld_as_needed_option, gcc_cv_no_as_needed_option. + Use -z ignore, -z record on *-*-solaris2*. + (HAVE_LD_AS_NEEDED): Update comment. + (LD_AS_NEEDED_OPTION, LD_NO_AS_NEEDED_OPTION): Define. + * configure: Regenerate. + * config.in: Regenerate. + * gcc.c (init_gcc_specs) [USE_LD_AS_NEEDED]: Use + LD_AS_NEEDED_OPTION, LD_NO_AS_NEEDED_OPTION. + * config/sol2.h [HAVE_LD_AS_NEEDED] (USE_LD_AS_NEEDED): Define. + * doc/tm.texi.in (USE_LD_AS_NEEDED): Allow for --as-needed + equivalents. Fix markup. + * doc/tm.texi: Regenerate. + +2013-04-15 Andrew Hsieh <andrewhsieh.google.com> + + * config/i386/i386.opt: New option mstack-protector-guard=. + * config/i386/i386-opts.h: Add enum stack_protector_guard. + * config/i386/i386.h: Define TARGET_SSP_GLOBAL_GUARD and + TARGET_SSP_TLS_GUARD. + * config/i386/i386.c (ix86_option_override_internal): Set + ix86_stack_protector_guard. + * config/i386/i386.md (stack_protect_set): Enable for + TARGET_SSP_TLS_GUARD only. + (stack_protect_set_<mode>): Ditto. + (stack_protect_test): Ditto. + (stack_protect_test_<mode>): Ditto. + * doc/invoke.texi (i386 Option): Document. + +2013-04-15 Eric Botcazou <ebotcazou@adacore.com> + + PR target/56890 + * config/sparc/sparc.c (enum sparc_mode_class): Add H_MODE value. + (S_MODES): Set H_MODE bit. + (SF_MODES): Set only S_MODE and SF_MODE bits. + (DF_MODES): Set SF_MODES and only D_MODE and DF_MODE bits. + (sparc_init_modes) <MODE_INT>: Set H_MODE bit for sub-word modes. + <MODE_VECTOR_INT>: Do not set SF_MODE for sub-word modes. + <MODE_FLOAT>: Likewise. + +2013-04-15 Joey Ye <joey.ye@arm.com> + + * config/arm/arm.c (thumb_far_jump_used_p): Fix typo in comments. + +2013-04-15 Joey Ye <joey.ye@arm.com> + + * config/arm/arm.c (thumb1_final_prescan_insn): Assert lr save + for real far jump. + (thumb_far_jump_used_p): Count instruction size and set + far_jump_used. + +2013-04-14 Eric Botcazou <ebotcazou@adacore.com> + + * reorg.c (fill_simple_delay_slots): Reindent block of code. + * resource.c (mark_target_live_regs): Reformat conditional block. + +2013-04-13 Steven Bosscher <steven@gcc.gnu.org> + + * sched-deps.c (deps_analyze_insn): Do not check for EH_REGION insn + notes, they are emitted only just before final. + * sched-int.h: Include insn-attr.h before checking INSN_SCHEDULING. + +2013-04-13 Steven Bosscher <steven@gcc.gnu.org> + + * emit-rtl.c (remove_insn): Do not call df_insn_delete here. + * cfgrtl.c (delete_insn): Call it here instead. + * lra-spills.c (lra_final_code_change): Use delete_insn. + * haifa-sched.c (sched_remove_insn): Likewise. + * sel-sched-ir.c (return_nop_to_pool): Clear INSN_DELETED_P for nops + returning to the nop pool. + (sel_remove_insn): Simplify the only_disconnect case via remove_insn, + use delete_insn for definitive removal. Clear BLOCK_FOR_INSN. + +2013-04-12 Steven Bosscher <steven@gcc.gnu.org> + + * doc/tm.texi.in (LOOP_ALIGN): Remove loop note references. + * doc/tm.texi: Regenerated. + +2013-04-12 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_hard_regno_mode_ok): Use ANY_QI_REGNO_P in + QImode checks. + +2013-04-12 Steven Bosscher <steven@gcc.gnu.org> + + * df-core.c (df_find_def): Compare register numbers. + (df_find_use): Likewise. + +2013-04-12 Vladimir Makarov <vmakarov@redhat.com> + + PR target/56903 + * config/i386/i386.c (ix86_hard_regno_mode_ok): Add + lra_in_progress for return. + +2013-04-12 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (mov_scc,mov_negscc,mov_notscc): Convert + define_insn into define_insn_and_split and emit movsicc patterns. + +2013-04-12 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.c (gen_operands_ldrd_strd): Initialize "base". + +2013-04-12 Richard Biener <rguenther@suse.de> + + * tree-pass.h (TODO_do_not_ggc_collect): New. + * passes.c (execute_one_ipa_transform_pass): Honor + TODO_do_not_ggc_collect. + (execute_one_pass): Likewise. + + Revert + 2013-04-10 Richard Biener <rguenther@suse.de> + + * passes.c (init_optimization_passes): Remove reload pass. + * ira.c (do_reload): Merge into ... + (ira): ... this. + (rest_of_handle_reload): Remove. + (pass_reload): Likewise. + * config/i386/i386.c (ix86_option_override): Refer to ira instead + of reload for vzeroupper pass placement. + +2013-04-12 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56918 + PR tree-optimization/56920 + * fold-const.c (int_const_binop_1): Use op1.mul_with_sign (op2, ...) + instead of op1 - op2. Pass 2 * TYPE_PRECISION (type) as second + argument to rshift method. For 2 * HOST_BITS_PER_WIDE_INT precision + use wide_mul_with_sign method. + +2013-04-12 Richard Biener <rguenther@suse.de> + + * gimple.c (is_gimple_constant): Vector CONSTRUCTORs should + not be considered a gimple constant. + +2013-04-12 Marc Glisse <marc.glisse@inria.fr> + + * fold-const.c (const_binop): Handle vector shifts by a scalar. + (fold_binary_loc): Call const_binop also for mixed vector-scalar + operations. + +2013-04-12 Manuel López-Ibáñez <manu@gcc.gnu.org> + Jakub Jelinek <jakub@redhat.com> + + * opts.c: Include diagnostic-color.h. + (common_handle_option): Handle OPT_fdiagnostics_color_. + * Makefile.in (OBJS-libcommon): Add diagnostic-color.o. + (diagnostic.o, opts.o, pretty-print.o): Depend on diagnostic-color.h. + (diagnostic-color.o): New. + * common.opt (fdiagnostics-color, fdiagnostics-color=): New options. + (diagnostic_color_rule): New enum. + * dwarf2out.c (gen_producer_string): Don't print -fdiagnostics-color*. + * langhooks.c (lhd_print_error_function): Add %r "locus" and %R around + the location string. + * diagnostic.def: Add 3rd argument to DEFINE_DIAGNOSTIC_KIND macros, + either NULL, or color kind. + * diagnostic-color.c: New file. + * diagnostic-color.h: New file. + * diagnostic-core.h (DEFINE_DIAGNOSTIC_KIND): Adjust macro for 3 + arguments. + * doc/invoke.texi (-fdiagnostics-color): Document. + * pretty-print.h (pp_show_color): Define. + (struct pretty_print_info): Add show_color field. + * diagnostic.c: Include diagnostic-color.h. + (diagnostic_build_prefix): Adjust for 3 argument DEFINE_DIAGNOSTIC_KIND + macros. Colorize error:, warning: etc. strings and also the location + string. + (diagnostic_show_locus): Colorize the caret line. + * pretty-print.c: Include diagnostic-color.h. + (pp_base_format): Handle %r and %R format specifiers. Colorize strings + inside of %< %> quotes or quoted through q format modifier. + +2013-04-12 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * ifcvt.c (end_ifcvt_sequence): Mark a and b for unsharing as well. + +2013-04-11 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.c (aarch64_select_cc_mode): Allow NEG + code in CC_NZ mode. + * config/aarch64/aarch64.md (*neg_<shift><mode>3_compare0): New + pattern. + +2013-04-11 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/48184 + * params.def (PARAM_ALIGN_THRESHOLD): Increase the minimum value to 1. + +2013-04-11 Eric Botcazou <ebotcazou@adacore.com> + + * stor-layout.c (skip_simple_constant_arithmetic): Move to... + * tree.c (skip_simple_constant_arithmetic): ...here and make public. + (skip_simple_arithmetic): Tidy up. + * tree.h (skip_simple_constant_arithmetic): Declare. + +2013-04-11 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Define. + +2013-04-11 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (get_initial_def_for_induction): Properly + generate vector constants. + +2013-04-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56878 + * tree-flow.h (outermost_invariant_loop_for_expr): Declare. + * tree-ssa-loop-ivopts.c (outermost_invariant_loop_for_expr): + New function. + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): + Prefer to align the DR with the most invariant base address. + +2013-04-11 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + * opts.c (common_handle_option): Fix formatting and add FALLTHRU + comment. + +2013-04-11 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Fix + floating-point vector comparisons against 0. + +2013-04-11 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56899 + * fold-const.c (extract_muldiv_1): Apply distributive law + only if TYPE_OVERFLOW_WRAPS (ctype). + +2013-04-11 Bin Cheng <bin.cheng@arm.com> + + PR target/56124 + * ira-costs.c (scan_one_insn): Check whether the source rtx of + loading has side effect. + +2013-04-10 Steven Bosscher <steven@gcc.gnu.org> + + * config/sparc/sparc.c: Include tree-pass.h. + (TARGET_MACHINE_DEPENDENT_REORG): Do not redefine. + (sparc_reorg): Rename to sparc_do_work_around_errata. Move to + head of file. Change return type. Split off gate function. + (sparc_gate_work_around_errata): New function. + (pass_work_around_errata): New pass definition. + (insert_pass_work_around_errata) New pass insert definition to + insert pass_work_around_errata just after delayed-branch scheduling. + (sparc_option_override): Insert the pass. + * config/sparc/t-sparc (sparc.o): Add TREE_PASS_H dependence. + +2013-04-10 David S. Miller <davem@davemloft.net> + + * config/sparc/sparc.h (ASM_CPU_SPEC): Pass -Av8 if -mcpu=supersparc + or -mcpu=hypersparc. + + * target.def (cstore_mode): New hook. + * target.h: Include insn-codes.h + * targhooks.c: Likewise. + (default_cstore_mode): New function. + * targhooks.h: Declare it. + * doc/tm.texi.in: New hook slot for TARGET_CSTORE_MODE. + * doc/tm.texi: Rebuild. + * expmed.c (emit_cstore): Obtain cstore boolean result mode using + target hook, rather than inspecting the insn_data. + * config/sparc/sparc.c (sparc_cstore_mode): New function. + (TARGET_CSTORE_MODE): Redefine. + (emit_scc_insn): When TARGET_ARCH64, emit new 64-bit boolean + result patterns. + * config/sparc/predicates.md (cstore_result_operand): New special + predicate. + * config/sparc/sparc.md (cstoresi4, cstoredi4, cstore<F:mode>4): + Use it for operand 0. + (*seqsi_special): Rewrite using 'P' mode iterator on operand 0. + (*snesi_special): Likewise. + (*snesi_zero): Likewise. + (*seqsi_zero): Likewise. + (*sltu_insn): Likewise. + (*sgeu_insn): Likewise. + (*seqdi_special): Make operand 0 and comparison operation be of + DImode. + (*snedi_special): Likewise. + (*snedi_special_vis3): Likewise. + (*neg_snesi_zero): Rename to *neg_snesisi_zero. + (*neg_snesi_sign_extend): Rename to *neg_snesidi_zero. + (*snesi_zero_extend): Delete, covered by 'P' mode iterator. + (*neg_seqsi_zero): Rename to *neg_seqsisi_zero. + (*neg_seqsi_sign_extend): Rename to *neg_seqsidi_zero. + (*seqsi_zero_extend): Delete, covered by 'P' mode iterator. + (*sltu_extend_sp64): Likewise. + (*neg_sltu_insn): Rename to *neg_sltusi_insn. + (*neg_sltu_extend_sp64): Rename to *neg_sltudi_insn. + (*sgeu_extend_sp64): Delete, covered by 'P' mode iterator. + (*neg_sgeu_insn): Rename to *neg_sgeusi_insn. + (*neg_sgeu_extend_sp64): Rename to *neg_sgeudi_insn. + +2013-04-10 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_extension): New function. + (aarch64_start_file): Use the new function. + +2013-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + Jason Merrill <jason@redhat.com> + + * common.opt: Add -gdwarf. + * opts.c (common_handle_option): Handle it. + * gcc.c (ASM_DEBUG_SPEC): Don't expect "-2" for DWARF. + +2013-04-10 Richard Biener <rguenther@suse.de> + + * passes.c (execute_todo): Do not call ggc_collect conditional here. + (execute_one_ipa_transform_pass): But unconditionally here. + (execute_one_pass): And here. + (init_optimization_passes): Remove reload pass. + * tree-pass.h (TODO_ggc_collect): Remove. + (pass_reload): Likewise. + * ira.c (do_reload): Merge into ... + (ira): ... this. + (rest_of_handle_reload): Remove. + (pass_reload): Likewise. + * config/i386/i386.c (ix86_option_override): Refer to ira instead + of reload for vzeroupper pass placement. + * <everywhere>: Remove TODO_ggc_collect from todo_flags_start + and todo_flags_finish of all passes. + +2013-04-10 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (struct _slp_oprnd_info): Remove + first_const_oprnd field, rename first_def_type to first_op_type. + * tree-vect-slp.c (vect_create_oprnd_info): Adjust. + (vect_get_and_check_slp_defs): Always use the type of the + operand. Allow mixed vect_external_def, vect_constant_def types. + (vect_get_constant_vectors): Handle mixed vect_external_def, + vect_constant_def types. + +2013-04-10 Joern Rennecke <joern.rennecke@embecosm.com> + + PR tree-optimization/55524 + * tree-ssa-math-opts.c + (convert_mult_to_fma): Don't use an fms construct + when we don't have an fms operation, but fnma, and it looks + likely that we'll be able to use the latter. + +2013-04-10 Zhouyi Zhou <yizhouzhou@ict.ac.cn> + + * cif-code.def (OVERWRITABLE): Correct the comment for overwritable + function. + * ipa-inline.c (can_inline_edge_p): Let dump mechanism report the + inline fail caused by overwritable functions. + +2013-04-10 Chung-Ju Wu <jasonwucj@gmail.com> + + * combine.c (simplify_compare_const): Use GET_MODE_MASK to filter out + unnecessary bits in the constant power of two case. + +2013-04-10 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove + broken code swapping operands. + (vect_build_slp_tree): Do not compute load permutations here. + (vect_analyze_slp_instance): Compute load permutations here, + after building the SLP tree. + +2013-04-09 Christian Bruel <christian.bruel@st.com> + + * config/sh/sh.md (barrier_align): Use next/prev_active_insn instead + of next/prev_real_insn. + +2013-04-09 Jan Hubicka <jh@suse.cz> + + * ipa.c (cgraph_externally_visible_p, varpool_externally_visible_p): + Drop aliased parameter. + (function_and_variable_visibility): Do not handle alias pairs. + * cgraph.c (varpool_externally_visible_p): Update prototype. + * varpool.c (varpool_add_new_variable): Update. + +2013-04-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (minmax_arithsi_non_canon): New pattern. + +2013-04-09 Steven Bosscher <steven@gcc.gnu.org> + + * sched-vis.c (print_pattern): Print SEQUENCE of insns as insns. + + * config/sparc/sparc.md: Use define_c_enum for "unspec" and "unspecv". + +2013-04-09 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/48762 + * params.def (PARAM_MAX_CSE_INSNS): Increase the minimum value to 1. + +2013-04-09 Richard Biener <rguenther@suse.de> + + * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove code + dealing with cost. + (vect_build_slp_tree): Likewise. + (vect_analyze_slp_cost_1, vect_analyze_slp_cost): New functions + calculating the cost of a SLP instance. + (vect_analyze_slp_instance): Use it from here, after building + the SLP tree. + +2013-04-09 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56883 + * omp-low.c (expand_omp_for_generic, expand_omp_for_static_nochunk, + expand_omp_for_static_chunk): Use simple_p = true in + force_gimple_operand_gsi calls when assigning to addressable decls. + +2013-04-09 Jeff Law <law@redhat.com> + + * tree-vrp.c (simplify_cond_using_ranges): Simplify test of boolean + when the boolean was created by converting a wider object which + had a boolean range. + +2013-04-09 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (slp_void_p): Remove. + (slp_tree): Typedef before _slp_tree declaration. + (struct _slp_tree): Use a vector of slp_tree as children. + (vect_get_place_in_interleaving_chain): Remove. + * tree-vect-data-refs.c (vect_get_place_in_interleaving_chain): + Move ... + * tree-vect-slp.c (vect_get_place_in_interleaving_chain): ... here + and make static. + (vect_free_slp_tree, vect_print_slp_tree, vect_mark_slp_stmts, + vect_mark_slp_stmts_relevant, vect_slp_rearrange_stmts, + vect_detect_hybrid_slp_stmts, vect_slp_analyze_node_operations, + vect_schedule_slp_instance, vect_remove_slp_scalar_calls): + Use slp_node instead of slp_void_p and adjust. + +2013-04-09 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-manip.c (rewrite_into_loop_closed_ssa): Avoid + work that is not necessary. + +2013-04-09 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56854 + * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Don't + forward into clobber stmts if it would change MEM_REF lhs into + non-MEM_REF. + +2013-04-09 Maxim Kuvyrkov <maxim@kugelworks.com> + + * tree.c (type_hash_lookup, type_hash_add): Make static. + * tree.h (type_hash_lookup, type_hash_add): Remove global declarations. + +2013-04-09 Richard Biener <rguenther@suse.de> + + * tree.h (unsave_expr_now): Remove. + * tree-inline.c (mark_local_for_remap_r): Remove. + (unsave_expr_1): Likewise. + (unsave_r): Likewise. + (unsave_expr_now): Likewise. + * tree-ssa-copy.c (replace_exp_1): Use unshare_expr. + (propagate_tree_value): Likewise. + +2013-04-08 Steven Bosscher <steven@gcc.gnu.org> + + * doc/rtl.texi (sequence): Rewrite documentation to match the + current use of SEQUENCE rtl objects. + * rtl.def (SEQUENCE): Likewise. + + * doc/rtl.texi (NOTE_INSN_EH_REGION_BEG, NOTE_INSN_EH_REGION_END): + Update documentation. + (NOTE_INSN_LOOP_BEG, NOTE_INSN_LOOP_END, NOTE_INSN_LOOP_CONT, + NOTE_INSN_LOOP_VTOP): Remove documentation for non-existing notes. + + * reg-notes.def (REG_EH_CONTEXT): Remove unused note. + +2013-04-08 Teresa Johnson <tejohnson@google.com> + + * basic-block.h (GCOV_COMPUTE_SCALE): Define. + * ipa-inline-analysis.c (param_change_prob): Use helper rounding divide + methods. + (estimate_edge_size_and_time): Add comment to suggest using rounding + methods. + (estimate_node_size_and_time): Ditto. + (remap_edge_change_prob): Use helper rounding divide methods. + * value-prof.c (gimple_divmod_fixed_value_transform): Ditto. + (gimple_mod_pow2_value_transform): Ditto. + (gimple_mod_subtract_transform): Ditto. + (gimple_ic_transform): Ditto. + (gimple_stringops_transform): Ditto. + * stmt.c (conditional_probability): Ditto. + (emit_case_dispatch_table): Ditto. + * lto-cgraph.c (merge_profile_summaries): Ditto. + * tree-optimize.c (execute_fixup_cfg): Ditto. + * cfgcleanup.c (try_forward_edges): Ditto. + * cfgloopmanip.c (scale_loop_profile): Ditto. + (loopify): Ditto. + (duplicate_loop_to_header_edge): Ditto. + (lv_adjust_loop_entry_edge): Ditto. + * tree-vect-loop.c (vect_transform_loop): Ditto. + * profile.c (compute_branch_probabilities): Ditto. + * cfgbuild.c (compute_outgoing_frequencies): Ditto. + * lto-streamer-in.c (input_cfg): Ditto. + * gimple-streamer-in.c (input_bb): Ditto. + * ipa-cp.c (update_profiling_info): Ditto. + (update_specialized_profile): Ditto. + * tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): Ditto. + * cfg.c (update_bb_profile_for_threading): Add comment to suggest using + rounding methods. + * sched-rgn.c (compute_dom_prob_ps): Ditto. + (compute_trg_info): Ditto. + * cfgrtl.c (force_nonfallthru_and_redirect): Ditto. + (purge_dead_edges): Ditto. + * loop-unswitch.c (unswitch_loop): Ditto. + * cgraphclones.c (cgraph_clone_edge): Ditto. + (cgraph_clone_node): Ditto. + * tree-inline.c (copy_bb): Ditto. + (copy_edges_for_bb): Ditto. + (initialize_cfun): Ditto. + (copy_cfg_body): Ditto. + (expand_call_inline): Ditto. + +2013-04-08 Kai Tietz <ktietz@redhat.com> + + * config/i386/cygwin.h (EXTRA_OS_CPP_BUILTINS): Replaced + TARGET_CYGWIN64 by TARGET_64BIT. + +2013-04-08 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.md (GPR_1): New constant. + (define_expand "mov<mode>cc): FAIL if gen_compare_reg returned 0. + * config/epiphany/epiphany.c (gen_compare_reg): + For flag_finite_math_only, avoid swapping operands when r0 and/or r1 + is already in place. + Use GPR_0 / GPR_1 instead of 0/1 for r0/r1 register numbers. + Don't require being called during rtl expansion; If y operlaps r0, + return 0. + (epiphany_compute_frame_size, epiphany_expand_prologue): Use GPR_1. + (epiphany_expand_epilogue): Likewise. + + * config/epiphany/epiphany.c (epiphany_select_cc_mode): + Don't use CC_FPmode for ORDERED / UNORDERED. + * config/epiphany/epiphany.md (cmpsf_ord): Make pattern unconditional. + + * config/epiphany/constraints.md (CnL): New constraint. + * config/epiphany/epiphany.md (addsi3_i): Add r/r/CnL alternative. + * config/epiphany/predicates.md (add_operand): Allow 1024. + + * config/epiphany/epiphany.md (logical_op): New code iterator. + (op_mnc): New code attribute. + (<op_mnc>_f, mov_f, cstoresi4): New patterns. + (mov_f+1, mov_f+2): New peephole2 patterns. + + * config/epiphany/epiphany.md (mov_f+2): New peephole2 pattern. + (cstoresi4): Also allow re-use of zero result when doing a NE + comparison to a non-zero operand. + Use (clobber (scratch)) for first insn if the gpr output is not needed. + + * config/epiphany/epiphany.md (<insn_opname>v2si3): + Use gen_addsi3_i / gen_subsi3_i. + +2013-04-08 Jakub Jelinek <jakub@redhat.com> + + PR c++/34949 + PR c++/50243 + * tree-eh.c (optimize_clobbers): Only remove clobbers if bb doesn't + contain anything but clobbers, at most one __builtin_stack_restore, + optionally debug stmts and final resx, and if it has at least one + incoming EH edge. Don't check for SSA_NAME on LHS of a clobber. + (sink_clobbers): Don't check for SSA_NAME on LHS of a clobber. + Instead of moving clobbers with MEM_REF LHS with SSA_NAME address + which isn't defaut definition, remove them. + (unsplit_eh, cleanup_empty_eh): Use single_{pred,succ}_{p,edge} + instead of EDGE_COUNT comparisons or EDGE_{PRED,SUCC}. + * tree-ssa-ccp.c (execute_fold_all_builtins): Remove clobbers + with MEM_REF LHS with SSA_NAME address. + +2013-04-08 Jeff Law <law@redhat.com> + + * gimple.c (canonicalize_cond_expr_cond): Rewrite x ^ y into x != y. + +2013-04-08 Richard Biener <rguenther@suse.de> + + * gimple-pretty-print.c (debug_gimple_stmt): Do not print + extra newline. + * tree-vect-loop.c (vect_determine_vectorization_factor): Dump + determined vector type. + (vect_analyze_data_refs): Likewise. + (vect_get_new_vect_var): Adjust. + (vect_create_destination_var): Preserve SSA name versions. + * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Do + not dump anything here. + +2013-04-08 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.h (struct GTY (()) machine_function): + Add member lr_slot_known. + * config/epiphany/epiphany.md (reload_insi_ra): Compute lr_slot_offs + if necessary. + * config/epiphany/epiphany.c (epiphany_compute_frame_size): + Remove code that sets lr_slot_offset according to what a previous + version of epiphany_emit_save_restore used to do. + (epiphany_emit_save_restore): When doing an lr save or restore, + set/verify lr_slot_known and lr_slot_offset. + +2013-04-08 Xinyu Qi <xyqi@marvell.com> + + PR target/54338 + * config/arm/arm.h (REG_CLASS_CONTENTS): Include IWMMXT_GR_REGS + in ALL_REGS. + +2013-04-08 Richard Biener <rguenther@suse.de> + + * alias.c (find_base_term): Fix thinko in previous change. + +2013-04-08 Jakub Jelinek <jakub@redhat.com> + + * tree-loop-distribution.c (const_with_all_bytes_same): New function. + (generate_memset_builtin): Only handle integer_all_onesp as -1 val if + TYPE_PRECISION is equal to mode bitsize. Use const_with_all_bytes_same + if possible to compute val. + (classify_partition): Verify CONSTRUCTOR doesn't have any elts. + For QImode integers don't require anything about precision. Use + const_with_all_bytes_same to find out if the constant doesn't have + repeated bytes in it. + +2013-04-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.c (s390_expand_insv): Only accept insertions + within mode size. + +2013-04-08 Marek Polacek <polacek@redhat.com> + + PR rtl-optimization/48182 + * params.def (PARAM_MIN_CROSSJUMP_INSNS): Increase the minimum + value to 1. + +2013-04-06 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/55487 + * config/pa/pa.c (legitimize_pic_address): Before incrementing label + nuses, make sure we have a label. + +2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/56843 + * config/rs6000/rs6000.c (rs6000_emit_swdiv_high_precision): Remove. + (rs6000_emit_swdiv_low_precision): Remove. + (rs6000_emit_swdiv): Rewrite to handle between one and four + iterations of Newton-Raphson generally; modify required number of + iterations for some cases. + * config/rs6000/rs6000.h (RS6000_RECIP_HIGH_PRECISION_P): Remove. + +2013-04-05 Steven Bosscher <steven@gcc.gnu.org> + + * bb-reorder.c (fix_crossing_unconditional_branches): Remove a + set-but-unused variable. + + * cgraph.c (cgraph_release_function_body): Clear cfun->cfg to make + basic blocks of released function bodies garbage-collectable. + + * ree.c (find_and_remove_re): Do not call df_finish_pass here. + (struct rtl_opt_pass): Add TODO_df_finish. + + * rtl.def (DEFINE_SUBST, DEFINE_SUBST_ATTR): Add documentation. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/constraints.md (q): New constraint. + * config/arm/ldrdstrd.md: New file. + * config/arm/arm.md (ldrdstrd.md) New include. + (arm_movdi): Use "q" instead of "r" constraint + for double-word memory access. + (movdf_soft_insn): Likewise. + * config/arm/vfp.md (movdi_vfp): Likewise. + * config/arm/t-arm (MD_INCLUDES): Add ldrdstrd.md. + * config/arm/arm-protos.h (gen_operands_ldrd_strd): New declaration. + * config/arm/arm.c (gen_operands_ldrd_strd): New function. + (mem_ok_for_ldrd_strd): Likewise. + (output_move_double): Update assertion. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md: Comment on splitting Thumb1 patterns. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (arm_smax_insn): Convert define_insn into + define_insn_and_split. + (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (arm_ashldi3_1bit): Convert define_insn into + define_insn_and_split. + (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. + (shiftsi3_compare): New pattern. + (rrx): New pattern. + * config/arm/unspecs.md (UNSPEC_RRX): New. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (negdi_extendsidi): New pattern. + (negdi_zero_extendsidi): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (andsi_iorsi3_notsi): Convert define_insn into + define_insn_and_split. + (arm_negdi2,arm_abssi2,arm_neg_abssi2): Likewise. + (arm_cmpdi_insn,arm_cmpdi_unsigned): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (arm_subdi3): Convert define_insn into + define_insn_and_split. + (subdi_di_zesidi,subdi_di_sesidi): Likewise. + (subdi_zesidi_di,subdi_sesidi_di,subdi_zesidi_zesidi): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (subsi3_carryin): New pattern. + (subsi3_carryin_const): Likewise. + (subsi3_carryin_compare,subsi3_carryin_compare_const): Likewise. + (subsi3_carryin_shift,rsbsi3_carryin_shift): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (addsi3_carryin_<optab>): Set attribute predicable. + (addsi3_carryin_alt2_<optab>,addsi3_carryin_shift_<optab>): Likewise. + +2013-04-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_expand_builtin): Change fcode + type to unsigned int. + +2013-04-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * doc/invoke.texi (ARM Options): Document cortex-a53 support. + +2013-04-04 Ian Lance Taylor <iant@google.com> + + * doc/standards.texi (Standards): The Go frontend supports the Go 1 + language standard. + +2013-04-04 Steven Bosscher <steven@gcc.gnu.org> + + PR middle-end/56729 + * df-scan.c (df_insn_delete): Disable failing assert. + +2013-04-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-protos.h (arm_builtin_vectorized_function): + New function prototype. + * config/arm/arm.c (TARGET_VECTORIZE_BUILTINS): Define. + (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Likewise. + (arm_builtin_vectorized_function): New function. + +2013-04-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm_neon_builtins.def: New file. + * config/arm/arm.c (neon_builtin_data): Move contents to + arm_neon_builtins.def. + (enum arm_builtins): Include neon builtin definitions. + (ARM_BUILTIN_NEON_BASE): Move from enum to macro. + * config/arm/t-arm (arm.o): Add dependency on arm_neon_builtins.def. + +2013-04-04 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/48186 + * predict.c (maybe_hot_frequency_p): Return false if + HOT_BB_FREQUENCY_FRACTION is 0. + (cgraph_maybe_hot_edge_p): Likewise. + +2013-04-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56826 + * tree-vect-slp.c (vect_build_slp_tree): Compute ncopies + more accurately. + +2013-04-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56213 + * tree-vect-data-refs.c (vect_check_strided_load): Remove. + (vect_analyze_data_refs): Allow all non-nested loads as strided loads. + +2013-04-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56837 + * tree-loop-distribution.c (classify_partition): For non-zero + values require that the value has the same precision as its + mode to be useful as memset value. + +2013-04-03 Nick Clifton <nickc@redhat.com> + + * config/v850/v850e3v5.md (fmasf4): Use fmaf.s on E3V5 architectures. + (fmssf4): Use fmsf.s on E3V5 architectures. + (fnmasf4): Use fnmaf.s on E3V5 architectures. + (fnmssf4): Use fnmsf.s on E3V5 architectures. + +2013-04-03 Jeff Law <law@redhat.com> + + * Makefile.in (lra-constraints.o): Depend on $(OPTABS_H). + (lra-eliminations.o): Likewise. + +2013-04-03 Teresa Johnson <tejohnson@google.com> + + * gcov-io.c (compute_working_sets): Moved most of body of old + compute_working_sets here from profile.c. + * gcov-io.h (NUM_GCOV_WORKING_SETS): Moved here from profile.c. + (gcov_working_set_t): Moved typedef here from basic-block.h + (compute_working_set): Declare. + * profile.c (NUM_GCOV_WORKING_SETS): Moved to gcov-io.h. + (get_working_sets): Renamed from compute_working_set, + replace most of body with call to new compute_working_sets. + (get_exec_counts): Replace call to compute_working_sets + to get_working_sets. + * profile.h (get_working_sets): Renamed from compute_working_set. + * lto-cgraph.c (input_symtab): Replace call to compute_working_sets + to get_working_sets. + * basic-block.h (gcov_working_set_t): Moved to gcov-io.h. + * gcov-dump.c (dump_working_sets): New function. + +2013-04-03 Kenneth Zadeck <zadeck@naturalbridge.com> + + * hwint.c (sext_hwi, zext_hwi): New functions. + * hwint.h (HOST_BITS_PER_HALF_WIDE_INT, HOST_HALF_WIDE_INT, + HOST_HALF_WIDE_INT_PRINT, HOST_HALF_WIDE_INT_PRINT_C, + HOST_HALF_WIDE_INT_PRINT_DEC, HOST_HALF_WIDE_INT_PRINT_DEC_C, + HOST_HALF_WIDE_INT_PRINT_UNSIGNED, HOST_HALF_WIDE_INT_PRINT_HEX, + HOST_HALF_WIDE_INT_PRINT_HEX_PURE): New symbols. + (sext_hwi, zext_hwi): New functions. + +2013-04-03 Jeff Law <law@redhat.com> + + PR tree-optimization/56799 + * tree-ssa-dom.c (record_equivalences_from_incoming_edge): Bring + back test for widening conversion erroneously dropped in prior change. + +2013-04-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/56809 + * config/aarch64/aarch64.c (is_jump_table): Use next_active_insn + instead of next_real_insn. + +2013-04-03 Marek Polacek <polacek@redhat.com> + + PR sanitizer/55702 + * tsan.c (instrument_func_exit): Allow BUILT_IN_RETURN functions. + +2013-04-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/56809 + * config/arm/arm.c (is_jump_table): Use next_active_insn instead of + next_real_insn. + (thumb1_output_casesi): Likewise. + (thumb2_output_casesi): Likewise. + +2013-04-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56817 + * tree-ssa-loop-ivcanon.c (tree_unroll_loops_completely): + Split out ... + (tree_unroll_loops_completely_1): ... new function to manually + walk the loop tree, properly defering outer loops of unrolled + loops to later iterations. + +2013-04-03 Marc Glisse <marc.glisse@inria.fr> + + * tree-vect-stmts.c (vectorizable_store): Accept BIT_FIELD_REF. + (vectorizable_load): Likewise. + * tree-vect-slp.c (vect_build_slp_tree): Likewise. + * tree-vect-data-refs.c (vect_create_data_ref_ptr): Handle VECTOR_TYPE. + +2013-04-03 Marc Glisse <marc.glisse@inria.fr> + + * tree-flow-inline.h (get_addr_base_and_unit_offset_1): Handle + BIT_FIELD_REF. + +2013-04-03 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/spu/spu.c (emit_nop_for_insn): Handle JUMP_TABLE_DATA. + +2013-04-03 Bin Cheng <bin.cheng@arm.com> + + * rtl.h (AUTO_INC_DEC): Fix typo of HAVE_POST_MODIFY_DISP. + +2013-04-03 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/56790 + * fold-const.c (fold_ternary_loc) <VEC_COND_EXPR>: Add constant + folding. + +2013-04-03 Marc Glisse <marc.glisse@inria.fr> + + * simplify-rtx.c (simplify_binary_operation_1) <VEC_SELECT>: + Handle VEC_MERGE. + (simplify_ternary_operation) <VEC_MERGE>: Use unsigned HOST_WIDE_INT + for masks. Test for side effects. Handle nested VEC_MERGE. Handle + equal arguments. + +2013-04-03 Jakub Jelinek <jakub@redhat.com> + + PR c/19449 + * tree.h (force_folding_builtin_constant_p): New decl. + * builtins.c (force_folding_builtin_constant_p): New variable. + (fold_builtin_constant_p): Fold immediately also if + force_folding_builtin_constant_p. + +2013-04-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56812 + * tree-vect-data-refs.c (vect_slp_analyze_data_ref_dependence): + DRs of the same interleaving chain are independent. + +2013-04-02 Jason Merrill <jason@redhat.com> + + * gdbinit.in (pbb): Use debug fn. + +2013-04-02 Lawrence Crowl <crowl@google.com> + + * sese.h (struct ivtype_map_elt_s): Remove unused. + (extern debug_ivtype_map): Remove unused. + (extern eq_ivtype_map_elts): Remove unused. + * sese.c (debug_ivtype_map): Removed unused. + (debug_ivtype_map_1): Removed unused. + (debug_ivtype_elt): Remove unused. + (eq_ivtype_map_elts): Remove unused. + +2013-04-02 Kai Tietz <ktietz@redhat.com> + + PR target/52790 + * config/i386/cygming.h (SUB_TARGET_RECORD_STUB): New sub-target macro. + * config/i386/i386-protos.h (i386_pe_record_stub): Add new prototype. + * config/i386/i386.c (legitimize_pe_coff_extern_decl): New static + function. + (legitimize_pe_coff_symbol): Likewise. + (is_imported_p): New helper-function. + (ix86_option_override_internal): Make MEDIUM_PIC the default code-model + for Windows x64 targets. + (ix86_expand_prologue): Optimize for pe-coff targets. + (ix86_expand_split_stack_prologue): Adjust for pe-coff targets. + (legitimate_pic_address_disp_p): Adjust for x64 pe-coff to support + medium/large code-model. + (legitimize_pic_address): Likewise. + (legitimize_tls_address): Likewise. + (ix86_expand_call): Likewise. + (x86_output_mi_thunk): Likewise. + (get_dllimport_decl): Add new beimport argument. + (construct_plt_address): Don't assert for x64 pe-coff targets. + * config/i386/i386.h (PIC_OFFSET_TABLE_REGNUM): Adjust for x64 pe-coff + targets. + (SYMBOL_FLAG_STUBVAR): New macro. + (SYMBOL_REF_STUBVAR_P): Likewise. + * config/i386/winnt.c (stub_list): New structure. + (stub_head): New local variable. + (i386_pe_record_stub): New function. + (i386_pe_file_end): Emit refptr-stubs. + +2013-04-02 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/56745 + * ifcvt.c (cond_exec_find_if_block): Don't try to optimize + if then_bb has no successors and else_bb is EXIT_BLOCK_PTR. + + PR c++/34949 + * tree-ssa-alias.c (stmt_kills_ref_p_1): If base != ref->base + and both of them are MEM_REFs, just compare first argument for + equality and attempt to deal even with differing offsets. + + PR c++/34949 + * tree-cfg.c (verify_gimple_assign_single): Allow lhs + of gimple_clobber_p to be MEM_REF. + * gimplify.c (gimplify_modify_expr): Gimplify *to_p of + an assignment from TREE_CLOBBER_P. Allow it to be MEM_REF + after gimplification. + * asan.c (get_mem_ref_of_assignment): Don't instrument + gimple_clobber_p stmts. + * tree-ssa-dse.c (dse_optimize_stmt): Allow DSE of + gimple_clobber_p stmt if they have MEM_REF lhs and + are dead because of another gimple_clobber_p stmt. + * tree-ssa-live.c (clear_unused_block_pointer): Treat + gimple_clobber_p stmts like debug stmts. + (remove_unused_locals): Remove clobbers with MEM_REF lhs + that refer to unused VAR_DECLs or uninitialized values. + * tree-sra.c (sra_ipa_reset_debug_stmts): Also remove + gimple_clobber_p stmts if they refer to removed parameters. + (get_repl_default_def_ssa_name, sra_ipa_modify_expr): Fix up + formatting. + +2013-04-02 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*testqi_ext_3): Merge with *testqi_ext_3_rex64 + using SWI48 mode attribute. + +2013-04-02 Wei Mi <wmi@google.com> + + * config/i386/i386.c (ix86_rtx_costs): Set proper rtx cost for + ashl<mode>3_mask, *<shift_insn><mode>3_mask and + *<rotate_insn><mode>3_mask in i386.md. + +2013-04-02 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * config.gcc (arm*-*-linux-*): Remove duplicate t-linux-android. + +2013-04-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56778 + * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): + Runtime alias tests are not supported for gather loads. + * tree-vect-loop-manip.c (vect_loop_versioning): Insert + stmts referenced from SSA operands before updating SSA form. + +2013-04-02 Ian Caulfield <ian.caulfield@arm.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm-arches.def (armv8-a): Default to cortex-a53. + * config/arm/t-arm (MD_INCLUDES): Depend on cortex-a53.md. + * config/arm/cortex-a53.md: New file. + * config/arm/bpabi.h (BE8_LINK_SPEC): Handle cortex-a53. + * config/arm/arm.md (generic_sched, generic_vfp): Handle cortex-a53. + * config/arm/arm.c (arm_issue_rate): Likewise. + * config/arm/arm-tune.md: Regenerate + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-cores.def: Add cortex-a53. + +2013-04-02 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * config/arm/uclinux-elf.h: Add %L to LINK_GCC_C_SEQUENCE_SPEC for + non-static link. + +2013-04-02 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add variants for + scalar load/store operations using B/H registers. + (*zero_extend<SHORT:mode><GPI:mode>2_aarch64): Likewise. + +2013-04-02 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add alternatives for + scalar move. + * config/aarch64/aarch64.c + (aarch64_simd_scalar_immediate_valid_for_move): New. + * config/aarch64/aarch64-protos.h + (aarch64_simd_scalar_immediate_valid_for_move): New. + * config/aarch64/constraints.md (Dh, Dq): New. + * config/aarch64/iterators.md (hq): New. + +2013-04-02 Eric Botcazou <ebotcazou@adacore.com> + + * reorg.c (get_branch_condition): Deal with conditional returns. + (fill_simple_delay_slots): Remove dead code dealing with jumps. + +2013-04-01 Wei Mi <wmi@google.com> + + * config/i386/i386.md (*ashl<mode>3_mask): Rewrite as define_insn. + Truncate operand 2 using %b asm operand modifier. + (*<shift_insn><mode>3_mask): Ditto. + (*<rotate_insn><mode>3_mask): Ditto. + +2013-04-01 Steven Bosscher <steven@gcc.gnu.org> + + PR middle-end/56798 + * cfgbuild.c (inside_basic_block_p): Restore check broken at r197234. + +2013-03-31 Kaz Kojima <kkojima@gcc.gnu.org> + + * config/sh/sh.md (casesi_worker_1): Use next_active_insn instead + of next_real_insn. + (casesi_worker_2, casesi_shift_media, casesi_load_media): Likewise. + +2013-03-30 Lawrence Crowl <crowl@google.com> + + * dse.c (clear_alias_sets): Remove never set. + (disqualified_clear_alias_sets): Remove never set. + (clear_alias_mode_pool): Remove never set. + (dse_step0): Remove condition that is never true. + (canon_address): Remove condition that is never true. + (dse_step7): Remove condition that is never true. + (rest_of_handle_dse): Remove condition that is never true. + (rest_of_handle_dse::did_global): Remove never read from above. + (dse_step2_spill): Remove never called from above. + (dse_step5_spill): Remove never called from above. + +2013-03-30 Steven Bosscher <steven@gcc.gnu.org> + + * doc/md.texi (Standard Names) <casesi>: Update documentation for + JUMP_TABLE_DATA changes. + * doc/tm.texi.in (Dispatch Tables) <ASM_OUTPUT_CASE_LABEL>: Likewise. + * doc/rtl.texi (Flags) <INSN_DELETED_P, SCHED_GROUP_P>: Likewise. + (Insns) <jump_table_data>: New entry. + * doc/tm.texi: Regenerate. + + * cfgrtl.c (fixup_reorder_chain): Do not emit barriers to BB_FOOTER. + + * postreload-gcse.c (bb_has_well_behaved_predecessors): Correct test + for table jump at the end of a basic block using tablejump_p. + * targhooks.c (default_invalid_within_doloop): Likewise. + * config/rs6000/rs6000.c (TARGET_INVALID_WITHIN_DOLOOP): Remove + target hook implementation that is identical to the default hook. + (rs6000_invalid_within_doloop): Remove. + + * bb-reorder.c (fix_crossing_unconditional_branches): Remove set but + unused variable from tablejump_p call. + + * rtl.def (JUMP_TABLE_DATA): New RTX_INSN object. + * rtl.h (RTX_PREV, RTX_NEXT): Adjust for new JUMP_TABLE_DATA. + (INSN_DELETED_P): Likewise. + (emit_jump_table_data): New prototype. + * gengtype.c (adjust_field_rtx_def): Handle JUMP_TABLE_DATA fields + after 4th as unused. + * print-rtl.c (print_rtl): Handle JUMP_TABLE_DATA. + * sched-vis.c (print_insn): Likewise. + * emit-rtl.c (active_insn_p): Consider JUMP_TABLE_DATA an active + insn for compatibility with back ends that use next_active_insn to + identify jump table data. + (set_insn_deleted): Remove no longer useful JUMP_TABLE_DATA_P check. + (remove_insn): Likewise. + (emit_insn): Do not accept JUMP_TABLE_DATA objects in insn chains + to be emitted. + (emit_debug_insn, emit_jump_insn, emit_call_insn, emit_label): Idem. + (emit_jump_table_data): New function. + + * cfgbuild.c (inside_basic_block_p): A JUMP_INSN is always inside a + basic block, a JUMP_TABLE_DATA never is. + (control_flow_insn_p): JUMP_TABLE_DATA is not a control flow insn. + * cfgrtl.c (duplicate_insn_chain): Split handling of JUMP_TABLE_DATA + off from code handling real insns. + * final.c (get_attr_length_1): Simplify for JUMP_INSNs. + * function.c (instantiate_virtual_regs): Remove JUMP_TABLE_DATA_P + test, now redundant because JUMP_TABLE_DATA is not an INSN_P insn. + * gcse.c (insert_insn_end_basic_block): Likewise, JUMP_TABLE_DATA_P + is not a NONDEBUG_INSN_P. + * ira-costs.c (scan_one_insn): Likewise. + * jump.c (mark_all_labels): Likewise. + (mark_jump_label_1): Likewise. + * lra-eliminations.c (eliminate_regs_in_insn): Likewise. + * lra.c (get_insn_freq): Expect all insns reaching here to be in + a basic block. + (check_rtl): Remove JUMP_TABLE_DATA_P test, not a NONDEBUG_INSN_P insn. + * predict.c (expensive_function_p): Use FOR_BB_INSNS. + * reload1.c (calculate_needs_all_insns): Call set_label_offsets for + JUMP_TABLE_DATA_P insns. + (calculate_elim_costs_all_insns): Likewise. + (set_label_offsets): Recurse on the PATTERN of JUMP_TABLE_DATA insns. + (elimination_costs_in_insn): Remove redundant JUMP_TABLE_DATA_P test. + (delete_output_reload): Code style fixups. + * reorg.c (dbr_schedule): Move JUMP_TABLE_DATA_P up to avoid setting + insn flags on this non-insn. + * sched-rgn.c (add_branch_dependences): Treat JUMP_TABLE_DATA insns + as scheduling barriers, for pre-change compatibility. + * stmt.c (emit_case_dispatch_table): Emit jump table data not as + JUMP_INSN objects but instead as JUMP_TABLE_DATA objects. + + * config/alpha/alpha.c (alpha_does_function_need_gp): Remove + redundant JUMP_TABLE_DATA_P test. + * config/arm/arm.c (thumb_far_jump_used_p): Likewise. + * config/frv/frv.c (frv_function_contains_far_jump): Likewise. + (frv_for_each_packet): Likewise. + * config/i386/i386.c (min_insn_size): Likewise. + (ix86_avoid_jump_mispredicts): Likewise. + * config/m32r/m32r.c (m32r_is_insn): Likewise. + * config/mep/mep.c (mep_reorg_erepeat): Likewise. + * config/mips/mips.c (USEFUL_INSN_P): Likewise. + (mips16_insn_length): Robustify. + (mips_has_long_branch_p): Remove redundant JUMP_TABLE_DATA_P test. + (mips16_split_long_branches): Likewise. + * config/pa/pa.c (pa_combine_instructions): Likewise. + * config/rs6000/rs6000.c (get_next_active_insn): Treat + JUMP_TABLE_DATA objects as active insns, like in active_insn_p. + * config/s390/s390.c (s390_chunkify_start): Treat JUMP_TABLE_DATA + as contributing to pool range lengths. + * config/sh/sh.c (find_barrier): Restore check for ADDR_DIFF_VEC. + Remove redundant JUMP_TABLE_DATA_P test. + (sh_loop_align): Likewise. + (split_branches): Likewise. + (sh_insn_length_adjustment): Likewise. + * config/spu/spu.c (get_branch_target): Likewise. + +2013-03-29 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c (output_profile_summary, input_profile_summary): Use + gcov streaming; stream hot bb threshold to ltrans. + * predict.c (get_hot_bb_threshold): Break out from .... + (maybe_hot_count_p): ... here. + (set_hot_bb_threshold): New function. + * lto-section-in.c (lto_section_name): Add profile. + * profile.h (get_hot_bb_threshold, set_hot_bb_threshold): Declare. + * ipa.c: Include hash-table.h, tree-inline.h, profile.h, lto-streamer.h + and data-streamer.h + (histogram_entry): New structure. + (histogram, histogram_pool): New global vars. + (histogram_hash): New structure. + (histogram_hash::hash): New method. + (histogram_hash::equal): Likewise. + (account_time_size): New function. + (cmp_counts): New function. + (dump_histogram): New function. + (ipa_profile_generate_summary): New function. + (ipa_profile_write_summary): New function. + (ipa_profile_read_summary): New function. + (ipa_profile): Decide on threshold. + (pass_ipa_profile): Add ipa_profile_write_summary and + ipa_profile_read_summary. + * Makefile.in (ipa.o): Update dependencies. + * lto-streamer.h (LTO_section_ipa_profile): New section. + +2013-03-29 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * tree.h (VAR_P): New. + +2013-03-29 Paolo Carlini <paolo.carlini@oracle.com> + + PR lto/56777 + * doc/invoke.texi ([-fwhole-program]): Fix typo. + +2013-03-29 Steven Bosscher <steven@gcc.gnu.org> + + * cfgbuild.c (inside_basic_block_p): Use JUMP_TABLE_DATA_P in lieu + of tests for JUMP_P and a ADDR_DIFF_VEC or ADDR_VEC pattern. + (control_flow_insn_p): Likewise. + * cfgrtl.c (duplicate_insn_chain): Likewise. + * final.c (get_attr_length_1): Likewise. + (shorten_branches): Likewise. + (final_scan_insn): Likewise. + * function.c (instantiate_virtual_regs): Likewise. + * gcse.c (insert_insn_end_basic_block): Likewise. + * ira-costs.c (scan_one_insn): Likewise. + * lra-eliminations.c (eliminate_regs_in_insn): Likewise. + * lra.c (check_rtl): Likewise. + * reload1.c (elimination_costs_in_insn): Likewise. + * reorg.c (follow_jumps): Likewise. + + * config/arm/arm.c (is_jump_table): Use JUMP_TABLE_DATA_P in lieu + of tests for JUMP_P and a ADDR_DIFF_VEC or ADDR_VEC pattern. + (thumb_far_jump_used_p): Likewise. + * config/bfin/bfin.c (workaround_rts_anomaly): Likewise. + (workaround_speculation): Likewise. + (add_sched_insns_for_speculation): Likewise. + * config/c6x/c6x.c (reorg_emit_nops): Likewise. + * config/frv/frv.c (frv_function_contains_far_jump): Likewise. + (frv_for_each_packet): Likewise. + * config/i386/i386.c (ix86_avoid_jump_mispredicts): Likewise. + * config/ia64/ia64.c (emit_all_insn_group_barriers): Likewise. + (final_emit_insn_group_barriers): Likewise. + * config/m32r/m32r.c (m32r_is_insn): Likewise. + * config/mips/mips.c (USEFUL_INSN_P): Likewise. + (mips16_insn_length): Likewise. + * config/pa/pa.c (pa_reorg): Likewise. + (pa_combine_instructions): Likewise. + * config/rs6000/rs6000.c (rs6000_invalid_within_doloop): Likewise. + * config/sh/sh.c (fixup_addr_diff_vecs): Likewise. + (sh_reorg): Likewise. + (split_branches): Likewise. + * config/spu/spu.c (get_branch_target): Likewise. + + * config/s390/s390.c (s390_chunkify_start): Simplify logic using + JUMP_TABLE_DATA_P. + +2013-03-29 Kirill Yukhin <kirill.yukhin@intel.com> + + * config/i386/avx2intrin.h (_mm256_broadcastsi128_si256): + Fix declaration name. + +2013-03-28 Lawrence Crowl <crowl@google.com> + + * graphds.h (struct graph.indicies): Remove unused. + * graphite-poly.h (struct graph.original_pddrs): Remove unused. + (SCOP_ORIGINAL_PDDRS): Remove unused. + * sese.h (extern insert_loop_close_phis): Removed unused. + (extern insert_guard_phis): Removed unused. + (extern ivtype_map_elt_info): Removed unused. + (new_ivtype_map_elt): Removed unused. + * sese.c (ivtype_map_elt_info): Removed unused. + +2013-03-28 Lawrence Crowl <crowl@google.com> + + * Makefile.in: Add several missing include dependences. + (DUMPFILE_H): New. + (test-dump.o): New. This object is not added to any executable, + but is present for ad-hoc testing. + * bitmap.c + (debug (const bitmap_head_def &)): New. + (debug (const bitmap_head_def *)): New. + * bitmap.h + (extern debug (const bitmap_head_def &)): New. + (extern debug (const bitmap_head_def *)): New. + * cfg.c + (debug (edge_def &)): New. + (debug (edge_def *)): New. + * cfghooks.c + (debug (basic_block_def &)): New. + (debug (basic_block_def *)): New. + * dumpfile.h + (dump_node (const_tree, int, FILE *)): Correct source file. + * dwarf2out.c + (debug (die_struct &)): New. + (debug (die_struct *)): New. + * dwarf2out.h + (extern debug (die_struct &)): New. + (extern debug (die_struct *)): New. + * gimple-pretty-print.c + (debug (gimple_statement_d &)): New. + (debug (gimple_statement_d *)): New. + * gimple-pretty-print.h + (extern debug (gimple_statement_d &)): New. + (extern debug (gimple_statement_d *)): New. + * ira-build.c + (debug (ira_allocno_copy &)): New. + (debug (ira_allocno_copy *)): New. + (debug (ira_allocno &)): New. + (debug (ira_allocno *)): New. + * ira-int.h + (extern debug (ira_allocno_copy &)): New. + (extern debug (ira_allocno_copy *)): New. + (extern debug (ira_allocno &)): New. + (extern debug (ira_allocno *)): New. + * ira-lives.c + (debug (live_range &)): New. + (debug (live_range *)): New. + * lra-int.h + (debug (lra_live_range &)): New. + (debug (lra_live_range *)): New. + * lra-lives.c + (debug (lra_live_range &)): New. + (debug (lra_live_range *)): New. + * omega.c + (debug (omega_pb_d &)): New. + (debug (omega_pb_d *)): New. + * omega.h + (extern debug (omega_pb_d &)): New. + (extern debug (omega_pb_d *)): New. + * print-rtl.c + (debug (const rtx_def &)): New. + (debug (const rtx_def *)): New. + * print-tree.c + (debug_tree (tree): Move within file. + (debug_raw (const tree_node &)): New. + (debug_raw (const tree_node *)): New. + (dump_tree_via_hooks (const tree_node *, int)): New. + (debug (const tree_node &)): New. + (debug (const tree_node *)): New. + (debug_verbose (const tree_node &)): New. + (debug_verbose (const tree_node *)): New. + (debug_head (const tree_node &)): New. + (debug_head (const tree_node *)): New. + (debug_body (const tree_node &)): New. + (debug_body (const tree_node *)): New. + (debug_vec_tree (tree): Move and reimplement in terms of dump. + (debug (vec<tree, va_gc> &)): New. + (debug (vec<tree, va_gc> *)): New. + * rtl.h + (extern debug (const rtx_def &)): New. + (extern debug (const rtx_def *)): New. + * sbitmap.c + (debug_raw (simple_bitmap_def &)): New. + (debug_raw (simple_bitmap_def *)): New. + (debug (simple_bitmap_def &)): New. + (debug (simple_bitmap_def *)): New. + * sbitmap.h + (extern debug (simple_bitmap_def &)): New. + (extern debug (simple_bitmap_def *)): New. + (extern debug_raw (simple_bitmap_def &)): New. + (extern debug_raw (simple_bitmap_def *)): New. + * sel-sched-dump.c + (debug (vinsn_def &)): New. + (debug (vinsn_def *)): New. + (debug_verbose (vinsn_def &)): New. + (debug_verbose (vinsn_def *)): New. + (debug (expr_def &)): New. + (debug (expr_def *)): New. + (debug_verbose (expr_def &)): New. + (debug_verbose (expr_def *)): New. + (debug (vec<rtx> &)): New. + (debug (vec<rtx> *)): New. + * sel-sched-dump.h + (extern debug (vinsn_def &)): New. + (extern debug (vinsn_def *)): New. + (extern debug_verbose (vinsn_def &)): New. + (extern debug_verbose (vinsn_def *)): New. + (extern debug (expr_def &)): New. + (extern debug (expr_def *)): New. + (extern debug_verbose (expr_def &)): New. + (extern debug_verbose (expr_def *)): New. + (extern debug (vec<rtx> &)): New. + (extern debug (vec<rtx> *)): New. + * sel-sched-ir.h + (_list_iter_cond_expr): Make inline instead of static. + * sreal.c + (debug (sreal &)): New. + (debug (sreal *)): New. + * sreal.h + (extern debug (sreal &)): New. + (extern debug (sreal *)): New. + * tree.h + (extern debug_raw (const tree_node &)): New. + (extern debug_raw (const tree_node *)): New. + (extern debug (const tree_node &)): New. + (extern debug (const tree_node *)): New. + (extern debug_verbose (const tree_node &)): New. + (extern debug_verbose (const tree_node *)): New. + (extern debug_head (const tree_node &)): New. + (extern debug_head (const tree_node *)): New. + (extern debug_body (const tree_node &)): New. + (extern debug_body (const tree_node *)): New. + (extern debug (vec<tree, va_gc> &)): New. + (extern debug (vec<tree, va_gc> *)): New. + * tree-cfg.c + (debug (struct loop &)): New. + (debug (struct loop *)): New. + (debug_verbose (struct loop &)): New. + (debug_verbose (struct loop *)): New. + * tree-dump.c: Add header dependence. + * tree-flow.h + (extern debug (struct loop &)): New. + (extern debug (struct loop *)): New. + (extern debug_verbose (struct loop &)): New. + (extern debug_verbose (struct loop *)): New. + * tree-data-ref.c + (debug (data_reference &)): New. + (debug (data_reference *)): New. + (debug (vec<data_reference_p> &)): New. + (debug (vec<data_reference_p> *)): New. + (debug (vec<ddr_p> &)): New. + (debug (vec<ddr_p> *)): New. + * tree-data-ref.h + (extern debug (data_reference &)): New. + (extern debug (data_reference *)): New. + (extern debug (vec<data_reference_p> &)): New. + (extern debug (vec<data_reference_p> *)): New. + (extern debug (vec<ddr_p> &)): New. + (extern debug (vec<ddr_p> *)): New. + * tree-ssa-alias.c + (debug (pt_solution &)): New. + (debug (pt_solution *)): New. + * tree-ssa-alias.h + (extern debug (pt_solution &)): New. + (extern debug (pt_solution *)): New. + * tree-ssa-alias.c + (debug (_var_map &)): New. + (debug (_var_map *)): New. + (debug (tree_live_info_d &)): New. + (debug (tree_live_info_d *)): New. + * tree-ssa-alias.h + (extern debug (_var_map &)): New. + (extern debug (_var_map *)): New. + (extern debug (tree_live_info_d &)): New. + (extern debug (tree_live_info_d *)): New. + +2013-03-28 Jan Hubicka <jh@suse.cz> + + * lto-cgraph.c (merge_profile_summaries): Fix overflows. + +2013-03-28 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (aarch64_can_eliminate): Keep frame + record only when desired or required. + +2013-03-28 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*vec_extract2vdi_1): Merge with + *vec_extractv2di_1_rex64. Use x64 isa attribute. + +2013-03-28 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.md (*and<mode>3_compare0): New pattern. + (*andsi3_compare0_uxtw): New pattern. + (*and_<SHIFT:optab><mode>3_compare0): New pattern. + (*and_<SHIFT:optab>si3_compare0_uxtw): New pattern. + +2013-03-28 Jan Hubicka <jh@suse.cz> + + * data-streamer-in.c (streamer_read_gcov_count): New function. + * gimple-streamer-out.c: Include value-prof.h. + (output_gimple_stmt): Output histogram. + (output_bb): Use streamer_write_gcov_count. + * value-prof.c: Include data-streamer.h + (dump_histogram_value): Add HIST_TYPE_MAX. + (stream_out_histogram_value): New function. + (stream_in_histogram_value): New function. + * value-prof.h (enum hist_type): Add HIST_TYPE_MAX. + (stream_out_histogram_value, stream_in_histogram_value): Declare. + * data-streamer-out.c (streamer_write_gcov_count): New function. + (streamer_write_gcov_count_stream): New function. + * lto-cgraph.c (lto_output_edge): Update counter streaming. + (lto_output_node): Likewise. + (input_node, input_edge): Likewise. + * lto-streamer-out.c (output_cfg): Update streaming. + * lto-streamer-in.c (input_cfg): Likewise. + * data-streamer.h (streamer_write_gcov_count, + streamer_write_gcov_count_stream, streamer_read_gcov_count): Declare. + * gimple-streamer-in.c: Include value-prof.h + (input_gimple_stmt): Input histograms. + (input_bb): Update profile streaming. + +2013-03-28 Kenneth Zadeck <zadeck@naturalbridge.com> + + * genmodes.c (emit_max_int): New function. + (emit_insn_modes_h): Added call to emit_max_function. + * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_INT, MAX_BITSIZE_MODE_ANY_MODE): + Added doc. + * machmode.def: Fixed comment. + +2013-03-28 Kenneth Zadeck <zadeck@naturalbridge.com> + + * combine.c (try_combine): Removed useless assert. + * cselib.c (rtx_equal_for_cselib_1): Removed unnecessary parens. + +2013-03-28 Marek Polacek <polacek@redhat.com> + Richard Biener <rguenther@suse.de> + + PR tree-optimization/56695 + * tree-vect-stmts.c (vectorizable_condition): Unconditionally + build signed result of a vector comparison. + * tree-cfg.c (verify_gimple_comparison): Check that a result + of a vector comparison has signed type. + +2013-03-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/37021 + * tree-vect-slp.c (vect_build_slp_tree): When not unrolling + do not restrict gaps between groups. + * tree-vect-stmts.c (vectorizable_load): Properly account for + a gap between groups. + +2013-03-28 Eric Botcazou <ebotcazou@adacore.com> + + * toplev.c (process_options): Do not disable -fomit-frame-pointer on a + general basis if unwind info is requested and ACCUMULATE_OUTGOING_ARGS + is not enabled. + +2013-03-27 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/invoke.texi (AVR Options): Tweak link for AVR-LibC user manual. + * doc/extend.texi (Named Address Spaces): Ditto. + (Variable Attributes): Ditto. + +2013-03-27 Kai Tietz <ktietz@redhat.com> + + * config.build: Add support for cygwin x64 target. + * config.gcc: Likewise. + * config.host: Likewise. + * configure.ac: Likewise + * configure: Regenerated. + +2013-03-27 Kai Tietz <ktietz@redhat.com> + + * config/i386/cygwin-stdint.h: Add support for cygwin x64 target. + * config/i386/t-cygwin-w64: New file. + * config/i386/cygwin-w64.h: New file. + * config/i386/cygwin.h (EXTRA_OS_CPP_BUILTINS): Extend + and add support for x64-cygwin target. + (CPP_SPEC): Likewise. + (CXX_WRAP_SPEC_LIST): Undefine before define. + (LIBGCJ_SONAME): Use 15 as version. + +2013-03-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56716 + * tree-ssa-structalias.c (perform_var_substitution): Adjust + dumping for ref nodes. + +2013-03-27 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/55334 + * ipa-cp.c (initialize_node_lattices): Allow IPA-CP through and to + restricted pointers to arrays. + +2013-03-27 Gabriel Dos Reis <gdr@integrable-solutions.net> + + * Makefile.in (.SUFFIXES): Add .cc. + (.c.o): Apply same recipe for implicit rule .cc.o. + +2013-03-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/37021 + * tree-vect-data-refs.c (vect_check_strided_load): Allow + REALPART/IMAGPART_EXPRs around the supported refs. + * tree-ssa-structalias.c (find_func_aliases): Assume that + floating-point values are not used to transfer pointers. + +2013-03-27 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * target.def (TARGET_HAS_IFUNC_P): New target hook. + * doc/tm.texi.in (TARGET_HAS_IFUNC_P): New. + * doc/tm.texi: Regenerate. + * targhooks.h (default_has_ifunc_p): New. + * targhooks.c (default_has_ifunc_p): Ditto. + * config/linux-protos.h: New file. + * config/linux-android.h (TARGET_HAS_IFUNC_P): Using version of this + hook for linux which disables support of indirect functions in android. + * config/linux-android.c: New file. + * config/t-linux-android.c: Ditto. + * config.gcc: Added new object file linux-android.o. + * config/i386/i386.c (ix86_get_function_versions_dispatcher): + Using TARGET_HAS_IFUNC hook instead of HAVE_GNU_INDIRECT_FUNCTION. + * varasm.c (do_assemble_alias): Likewise. + * configure.ac: Define HAVE_GNU_INDIRECT_FUNCTION as zero if the target + doesn't support indirect functions. + * configure: Regenerate. + +2013-03-27 Bin Cheng <bin.cheng@arm.com> + + PR target/56102 + * config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix + rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with + mult-word mode. + +2013-03-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Define. + +2013-03-27 Terry Guo <terry.guo@arm.com> + + * config/arm/arm-cores.def: Added core cortex-r7. + * config/arm/arm-tune.md: Regenerated. + * config/arm/arm-tables.opt: Regenerated. + * doc/invoke.texi: Added entry for core cortex-r7. + +2013-03-27 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_expand_prologue): Avoid + double-decrement of next_scratch_regno. + +2013-03-27 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.md (insn_v1mulu): Fix predicates on + input operands. + (insn_v1mulus): Ditto. + (insn_v2muls): Ditto. + +2013-03-27 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.h (ASM_OUTPUT_ADDR_VEC_ELT): Delete extra tab. + (ASM_OUTPUT_ADDR_DIFF_ELT): Ditto. + +2013-03-27 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.md (*sibcall_insn): Fix type atribute for jr. + (*sibcall_value): Ditto. + +2013-03-27 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.md (insn_mnz_<mode>): Replaced by ... + (insn_mnz_v8qi): ... this ... + (insn_mnz_v4hi): ... and this. Replace (const_int 0) with the + vector equivalent. + (insn_v<n>mnz): Replaced by ... + (insn_v1mnz): ... this ... + (insn_v2mnz): ... and this. Replace (const_int 0) with the vector + equivalent. + (insn_mz_<mode>): Replaced by ... + (insn_mz_v8qi): ... this ... + (insn_mz_v4hi): ... and this. Replace (const_int 0) with the + vector equivalent. + (insn_v<n>mz): Replaced by ... + (insn_v1mz): ... this ... + (insn_v2mz): ... and this. Replace (const_int 0) with the vector + equivalent. + +2013-03-26 Eric Botcazou <ebotcazou@adacore.com> + + * doc/invoke.texi (SPARC options): Remove -mlittle-endian. + +2013-03-26 Roland McGrath <mcgrathr@google.com> + + * config/arm/arm.c (arm_print_operand: case 'w'): Use fputs rather + than fprintf with a non-constant, non-format string. + +2013-03-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*cmpqi_ext_1): Merge with *cmpqi_ext_1_rex64 + using nox64 isa attribute. Use nonimmediate_x86nomem_operand as + operand 0 predicate. + (*cmpqi_ext_3): Merge with *cmpqi_ext_3_rex64 using nox64 isa + attribute. Use general_x64nomem_operand as operand 1 predicate. + (*movqi_extv_1): Merge with *movqi_extv_1_rex64 using nox64 isa + attribute. Use nonimmediate_x64nomem_operand as operand 0 predicate. + (*movqi_extzv_2): Merge with *movqi_extzv_2_rex64 using nox64 isa + attribute. Use nonimmediate_x64nomem_operand as operand 0 predicate. + (mov<mode>_insv_1): Remove expander. Merge insn with + movsi_insv_1 using SWI48 mode iterator and nox64 isa attribute. + Use general_x64nomem_operand as operand 1 predicate. + (addqi_ext_1): Merge with *addqi_ext_1_rex64 using nox64 isa attribute. + (*testqi_ext_1): Merge with *testqi_ext_1_rex64 using nox64 isa + attribute. Use nonimmediate_x64nomem_operand as operand 1 predicate. + (*andqi_ext_1): Merge with *andqi_ext_1_rex64 using nox64 isa + attribute. Use nonimmediate_x64nomem_operand as operand 2 predicate. + (*<code>qi_ext_1): Merge with *<code>qi_ext_1_rex64 using nox64 isa + attribute. Use nonimmediate_x64nomem_operand as operand 1 predicate. + (*xorqi_cc_ext_1): Merge with *xorqi_cc_ext_1_rex64 using nox64 + isa attribute. Use general_x64nomem_operand as operand 2 predicate. + * config/i386/predicates.md (nonimmediate_x64nomem_operand): New. + (general_x64nomem_operand): Ditto. + +2013-03-26 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * config/rtems.opt: Add -pthread option. + +2013-03-26 Richard Biener <rguenther@suse.de> + + * alias.c (find_base_term): Avoid redundant and not used recursion. + (base_alias_check): Get the initial base term from the caller. + (true_dependence_1): Compute and pass base terms to base_alias_check. + (write_dependence_p): Likewise. + (may_alias_p): Likewise. + +2013-03-26 Sofiane Naci <sofiane.naci@arm.com> + + * config/aarch64/aarch64.c (aarch64_classify_address): Support + PC-relative load in SI modes and above only. + +2013-03-26 Xinyu Qi <xyqi@marvell.com> + + * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. + * config/arm/iwmmxt.md (WCGR0): Update. + (WCGR1, WCGR2, WCGR3): Likewise. + +2013-03-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movdfcc_1): Merge with *movdfcc_1_rex64. + Use x64 and nox64 isa attributes. + +2013-03-26 Richard Biener <rguenther@suse.de> + + * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove + alignment computations and rely on get_object_alignment_1 + for the !TYPE_P case. + Commonize DECL/COMPONENT_REF handling in the ARRAY_REF path. + +2013-03-26 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define. + * config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define. + +2013-03-25 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (record_equivalences_from_incoming_edge): Add missing + check for INTEGRAL_TYPE_P that was missing due to checking in + wrong version of prior patch. + +2013-03-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add + TILEGX_INSN_SHUFFLEBYTES1. + * config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for + shufflebytes1. + (tilegx_builtins): Ditto. + * config/tilegx/tilegx.md (insn_shufflebytes1): New pattern. + +2013-03-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.md (floatsisf2): New pattern. + (floatunssisf2): New pattern. + (floatsidf2): New pattern. + (floatunssidf2): New pattern. + +2013-03-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (expand_set_cint64_one_inst): Inline + tests for constraint J, K, N, P. + +2013-03-25 Walter Lee <walt@tilera.com> + + * config/tilegx/tilegx.c (tilegx_asm_preferred_eh_data_format): + Use indirect/pcrel encoding. + * config/tilepro/tilepro.c (tilepro_asm_preferred_eh_data_format): + Ditto. + +2013-03-25 Steve Ellcey <sellcey@mips.com> + + * config/mips/mmips-cpus.def (74kc, 74kf2_1, 74kf, 74kf, 74kf1_1, + 74kfx, 74kx, 74kf3_2): Add PTF_AVOID_IMADD. + * config/mips/mips.c (mips_option_override): Set IMADD default. + * config/mips/mips.h (PTF_AVOID_IMADD): New. + (ISA_HAS_MADD_MSUB): Remove MIPS16 check. + (GENERATE_MADD_MSUB): Remove TUNE_74K check, add MIPS16 check. + * config/mips/mips.md (mimadd): New flag for integer madd/msub. + * doc/invoke.texi (-mimadd/-mno-imadd): New. + +2013-03-25 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (record_equivalences_from_incoming_edge): Rework + slightly to avoid creating and folding useless trees. Simplify + slightly by restricting to INTEGER_CSTs and using int_fits_type_p. + +2013-03-25 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*zero_extendsidi2): Merge with + *zero_extendsidi2_rex64. Use x64 and nox64 isa attributes. + * config/i386/predicates.md (x86_64_zext_operand): Rename from + x86_64_zext_general_operand. Use nonimmediate_operand on 32bit + targets. Clarify comment. + +2013-03-25 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.c (ipa_write_jump_function): Stream simple and aritmetic + pass-through jump functions differently. + (ipa_read_jump_function): Likewise. Also use setter functions to set + up jump functions. + +2013-03-25 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (ipa_get_indirect_edge_target): Renamed to + ipa_get_indirect_edge_target_1, added parameter agg_reps and ability to + process it. + (ipa_get_indirect_edge_target): New function. + (devirtualization_time_bonus): New parameter known_aggs, pass it to + ipa_get_indirect_edge_target. Update all callers. + (ipcp_discover_new_direct_edges): New parameter aggvals. Pass it to + ipa_get_indirect_edge_target_1 instead of calling + ipa_get_indirect_edge_target. + (create_specialized_node): Pass aggvlas to + ipcp_discover_new_direct_edges. + +2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (f_sels, f_seld): New types. + (*cmov<mode>): New pattern. + * config/arm/predicates.md (arm_vsel_comparison_operator): New + predicate. + +2013-03-25 Kai Tietz <ktietz@redhat.com> + + * config/i386/xm-mingw32.h (__USE_MINGW_ANSI_STDIO): Enable + POSIX-printf for mingw-hosted builds. + +2013-03-25 Richard Biener <rguenther@suse.de> + + PR middle-end/56694 + * tree-eh.c (lower_eh_must_not_throw): Strip BLOCKs from the + must-not-throw stmt location. + +2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_emit_load_exclusive): Add acq parameter. + Emit load-acquire versions when acq is true. + (arm_emit_store_exclusive): Add rel parameter. + Emit store-release versions when rel is true. + (arm_split_compare_and_swap): Use acquire-release instructions + instead. + of barriers when appropriate. + (arm_split_atomic_op): Likewise. + * config/arm/arm.h (TARGET_HAVE_LDACQ): New macro. + * config/arm/unspecs.md (VUNSPEC_LAX): New unspec. + (VUNSPEC_SLX): Likewise. + (VUNSPEC_LDA): Likewise. + (VUNSPEC_STL): Likewise. + * config/arm/sync.md (atomic_load<mode>): New pattern. + (atomic_store<mode>): Likewise. + (arm_load_acquire_exclusive<mode>): Likewise. + (arm_load_acquire_exclusivesi): Likewise. + (arm_load_acquire_exclusivedi): Likewise. + (arm_store_release_exclusive<mode>): Likewise. + +2013-03-25 Catherine Moore <clm@codesourcery.com> + + * config/mips/constraints.md (u, Udb7 Uead, Uean, Uesp, Uib3, + Uuw6, Usb4, ZS, ZT, ZU, ZV, ZW): New constraints. + * config/mip/predicates.md (lwsp_swsp_operand, + lw16_sw16_operand, lhu16_sh16_operand, lbu16_operand, + sb16_operand, db4_operand, db7_operand, ib3_operand, + sb4_operand, ub4_operand, uh4_operand, uw4_operand, + uw5_operand, uw6_operand, addiur2_operand, addiusp_operand, + andi16_operand): New predicates. + * config/mips/mips.md (compression): New attribute. + (enabled): New attribute. + (length): Consider compression in computing length. + (shift_compression): New code attribute. + (*add<mode>3): New operands. Record compression. + (sub<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (*and<mode>3): Likewise. + (*ior<mode>3): Likewise. + (unnamed pattern for xor): Likewise. + (*zero_extend<SHORT:mode><GPR:mode>2): Likewise. + (*<optab><mode>3): Likewise. + (*mov<mode>_internal: Likewise. + * config/mips/mips-protos.h (mips_signed_immediate_p): New. + (mips_unsigned_immediate_p): New. + (umips_lwsp_swsp_address_p): New. + (m16_based_address_p): New. + * config/mips/mips-protos.h (mips_signed_immediate_p): New prototype. + (mips_unsigned_immediate_p): New prototype. + (lwsp_swsp_address_p): New prototype. + (m16_based_address_p): New prototype. + * config/mips/mips.c (mips_unsigned_immediate_p): New function. + (mips_signed_immediate_p): New function. + (m16_based_address_p): New function. + (lwsp_swsp_address_p): New function. + (mips_print_operand_punctuation): Recognize short delay slot insns + for microMIPS.add<mode>3" + +2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + PR target/56720 + * config/arm/iterators.md (v_cmp_result): New mode attribute. + * config/arm/neon.md (vcond<mode><mode>): Handle unordered cases. + +2013-03-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56689 + * tree-vrp.c (execute_vrp): Mark loops for fixup if we removed + any edge. + +2013-03-25 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (struct mem_ref): Use bitmap_head instead + of bitmap. + (memory_references): Likewise. + (outermost_indep_loop, mem_ref_alloc, mark_ref_stored, + gather_mem_refs_stmt, record_dep_loop, ref_indep_loop_p_1, + ref_indep_loop_p_2, find_refs_for_sm): Adjust. + (gather_mem_refs_in_loops): Fold into ... + (analyze_memory_references): ... this. Move initialization + to tree_ssa_lim_initialize. + (fill_always_executed_in): Rename to ... + (fill_always_executed_in_1): ... this. + (fill_always_executed_in): Move contains_call computation to + this new function from ... + (tree_ssa_lim_initialize): ... here. + (tree_ssa_lim): Call fill_always_executed_in. + +2013-03-25 Eric Botcazou <ebotcazou@adacore.com> + + * postreload.c (reload_combine): Fix code detecting returns. + +2013-03-25 Eric Botcazou <ebotcazou@adacore.com> + + * function.c (emit_use_return_register_into_block): On cc0 targets, + do not emit the sequence between cc0 setter and user. + +2013-03-25 Kai Tietz <ktietz@redhat.com> + + * config/i386/predicates.md (local_symbolic_operand): Interpret + dll-imported symbols as none-local. + +2013-03-25 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (struct depend): Remove. + (struct lim_aux_data): Make depends a vec of gimples. + (free_lim_aux_data): Adjust. + (add_dependency): Likewise. + (set_level): Likewise. + +2013-03-25 Richard Biener <rguenther@suse.de> + + PR middle-end/56434 + * calls.c (expand_call): Use MALLOC_ABI_ALIGNMENT to annotate + the pointer returned by calls with ECF_MALLOC set. + +2013-03-24 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (mov<mode>): Add ?!Ym,r and r,?!Ym alternatives. + +2013-03-24 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/mmx.md (mov<mode>): Merge with movv2sf expander + using MMXMODE mode iterator. + (*move<mode>_internal): Merge with *movv2sf_internal and + *movv2sf_internal_rex64 using MMXMODE mode iterator. + +2013-03-23 Steven Bosscher <steven@gcc.gnu.org> + + * gcse.c (oprs_unchanged_p): Respect flag_gcse_lm. + (record_last_mem_set_info): Likewise. + + * df-core.c (rest_of_handle_df_initialize): Use XCNEWVEC instead + of XNEWVEC followed by memset. + (df_worklist_dataflow): Use XNEWVEC instead of xmalloc with a cast. + +2013-03-23 Steven Bosscher <steven@gcc.gnu.org> + + * config/avr/avr.c, config/bfin/bfin.c, config/c6x/c6x.c, + config/epiphany/epiphany.c, config/frv/frv.c, config/ia64/ia64.c, + config/iq2000/iq2000.c, config/mcore/mcore.c, config/mep/mep.c, + config/mmix/mmix.c, config/pa/pa.c, config/rs6000/rs6000.c, + config/s390/s390.c, config/sparc/sparc.c, config/spu/spu.c, + config/stormy16/stormy16.c, config/v850/v850.c, config/xtensa/xtensa.c, + dwarf2out.c, hw-doloop.c, resource.c, rtl.h : Where applicable, use + the predicates NOTE_P, NONJUMP_INSN_P, JUMP_P, CALL_P, LABEL_P, and + BARRIER_P instead of GET_CODE. + +2013-03-23 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.c (sparc_emit_probe_stack_range): Fix small + inaccuracy in the probing code. + + * config/sparc/sparc.md (ctrapsi4): Add predicate for operand #3. + (ctrapdi4): Likewise. + +2013-03-23 Eric Botcazou <ebotcazou@adacore.com> + + * calls.c (expand_call): Add missing guard to code handling return + of non-BLKmode structures in MSB. + * function.c (expand_function_end): Likewise. + +2013-03-23 Eric Botcazou <ebotcazou@adacore.com> + + * combine.c (try_combine): Adjust comment. Do not add the set of + insn #0 if the destination indirectly is set or dies in insn #2. + Tidy up code to distribute a new note. + +2013-03-22 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movdi_internal): Set prefix_rex attribute + also for alternatives 16 and 17. + +2013-03-22 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*mov<mode>_internal): Merge with + *mov<mode>_internal_rex64. Use x64 and nox64 isa attributes. + Emit insn template depending on type attribute. Use + HAVE_AS_IX86_INTERUNIT_MOVQ to handle broken assemblers that require + movd instead of movq mnemonic for interunit moves. Rewrite mode + attribute calculation. Remove unit attribute calculation. + Set prefix attribute to maybe_vex for sselog1 and ssemov types. + Set prefix_data16 attribute for DImode ssemov types. + Use Ym instead of y for SSE-MMX conversion alternatives. + Reorder operand constraints. + +2013-03-22 Steven Bosscher <steven@gcc.gnu.org> + + * df.h (df_insn_delete): Adjust prototype. + * emit-rtl.c (remove_insn): Pass a basic block to df_insn_delete + and let it decide whether mark the basic block dirty. + (set_insn_deleted): Only pass INSN_P insns to df_insn_delete. + * df-scan.c (df_insn_info_delete): New helper function, split + off from df_insn_delete. + (df_scan_free_bb_info): Use it. + (df_insn_rescan, df_insn_rescan_all, df_process_deferred_rescans): + Likewise. + (df_insn_delete): Likewise. Take insn rtx as argument. Verify + that the insn is actually an insn and it has a non-NULL basic block. + Do not mark basic block dirty if only deleting a DEBUG_INSN. + +2013-03-22 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (struct mem_ref): Remove indep_ref and + dep_ref members. + (mem_ref_alloc): Do not allocate them. + (refs_independent_p): Do not query or maintain a cache. + +2013-03-22 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (memory_references): Drop all_refs_in_loop. + (gather_mem_refs_in_loops): Do not compute it. + (analyze_memory_references): Do not allocate it. + (tree_ssa_lim_finalize): Do not free it. + (for_all_locs_in_loop): Do not query all_refs_in_loop. + +2013-03-22 Richard Biener <rguenther@suse.de> + + * is-a.h (as_a): Use gcc_checking_assert. + +2013-03-22 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): New + format specifier for printing a constant in hex. + * config/aarch64/aarch64.md (insv_imm<mode>): Use the X + format specifier for printing second operand. + +2013-03-22 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (memory_references): Add refs_stored_in_loop + bitmaps. + (gather_mem_refs_in_loops): Perform store accumulation here. + (create_vop_ref_mapping_loop): Remove. + (create_vop_ref_mapping): Likewise. + (analyze_memory_references): Initialize refs_stored_in_loop. + (LOOP_DEP_BIT): New define to map to bits in (in)dep_loop bitmaps. + (record_indep_loop): Remove. + (record_dep_loop): New function. + (ref_indep_loop_p_1): Adjust to only walk over references + in the loop, not its subloops. + (ref_indep_loop_p): Rename to ... + (ref_indep_loop_p_2): ... this and recurse over the loop tree, + maintaining a more fine-grained cache. + (ref_indep_loop_p): Wrap ref_indep_loop_p_2. + (tree_ssa_lim_finalize): Free refs_stored_in_loop. + +2013-03-22 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (struct mem_ref_locs): Remove. + (struct mem_ref): Make accesses_in_loop a vec of a vec of + aggregate mem_ref_loc. + (free_mem_ref_locs): Inline into ... + (memref_free): ... this and adjust. + (mem_ref_alloc): Adjust. + (mem_ref_locs_alloc): Remove. + (record_mem_ref_loc): Adjust. + (get_all_locs_in_loop): Rewrite into ... + (for_all_locs_in_loop): ... this iterator. + (rewrite_mem_ref_loc): New functor. + (rewrite_mem_refs): Use for_all_locs_in_loop. + (sm_set_flag_if_changed): New functor. + (execute_sm_if_changed_flag_set): Use for_all_locs_in_loop. + (ref_always_accessed): New functor. + (ref_always_accessed_p): Use for_all_locs_in_loop. + +2013-03-21 Marc Glisse <marc.glisse@inria.fr> + + * tree-pass.h (PROP_gimple_lvec): New. + * passes.c (dump_properties): Handle PROP_gimple_lvec. + (init_optimization_passes): Move pass_lower_vector. + * tree-vect-generic.c (gate_expand_vector_operations_ssa): Test + PROP_gimple_lvec. + (pass_lower_vector): Provide PROP_gimple_lvec. + (pass_lower_vector_ssa): Likewise. + * cfgexpand.c (pass_expand): Require PROP_gimple_lvec. + +2013-03-21 Mark Wielaard <mjw@redhat.com> + + * dwarf2out.c (size_of_aranges): Skip DECL_IGNORED_P functions. + +2013-03-21 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movdi_internal): Disparage slightly + all MMX moves to/from memory. Use Yi instead of x for SSE-MMX + conversion alternatives. + +2013-03-21 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/48087 + * diagnostic.def (DK_WERROR): New kind. + * diagnostic.h (werrorcount): Define. + * diagnostic.c (diagnostic_report_diagnostic): For DK_WARNING + promoted to DK_ERROR, increment DK_WERROR counter instead of + DK_ERROR counter. + * toplev.c (toplev_main): Call print_ignored_options even if + just werrorcount is non-zero. Exit with FATAL_EXIT_CODE + even if just werrorcount is non-zero. + + PR debug/55608 + * dwarf2out.c (tree_add_const_value_attribute): Call ggc_free (array) + on failure. + (resolve_one_addr): Fail if referenced STRING_CST hasn't been written. + (string_cst_pool_decl): New function. + (optimize_one_addr_into_implicit_ptr): New function. + (resolve_addr_in_expr): Optimize DWARF location expression + DW_OP_addr DW_OP_stack_value where DW_OP_addr refers to some variable + which doesn't live in memory, but has DW_AT_location or + DW_AT_const_value, or refers to a string literal, into + DW_OP_GNU_implicit_pointer. + (optimize_location_into_implicit_ptr): New function. + (resolve_addr): If removing DW_AT_location of a variable because + it was DW_OP_addr of address of the variable, but the variable doesn't + live in memory, try to emit const value attribute for the initializer. + +2013-03-21 Marc Glisse <marc.glisse@inria.fr> + + * tree.h (VECTOR_TYPE_P): New macro. + (VECTOR_INTEGER_TYPE_P, VECTOR_FLOAT_TYPE_P, FLOAT_TYPE_P, + TYPE_MODE): Use it. + * fold-const.c (fold_cond_expr_with_comparison): Use build_zero_cst. + VEC_COND_EXPR cannot be lvalues. + (fold_ternary_loc) <VEC_COND_EXPR>: Merge with the COND_EXPR case. + +2013-03-21 Marc Glisse <marc.glisse@inria.fr> + + * simplify-rtx.c (simplify_binary_operation_1) <VEC_CONCAT>: + Restrict the transformation to equal modes. + +2013-03-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/39326 + * tree-ssa-loop-im.c (UNANALYZABLE_MEM_ID): New define. + (MEM_ANALYZABLE): Adjust. + (record_mem_ref_loc): Move bitmap ops ... + (gather_mem_refs_stmt): ... here. Use the shared mem-ref for + unanalyzable refs, do not record locations for it. + (analyze_memory_references): Allocate ref zero as shared + unanalyzable ref. + (refs_independent_p): Do not test for unanalyzed mems here. + (ref_indep_loop_p_1): Special-case disambiguation against + the unanalyzed ref. + (ref_indep_loop_p): Assert we are not queried for the unanalyzed mem. + +2013-03-21 Christophe Lyon <christophe.lyon@linaro.org> + + * config/arm/arm-protos.h (tune_params): Add + prefer_neon_for_64bits field. + * config/arm/arm.c (prefer_neon_for_64bits): New variable. + (arm_slowmul_tune): Default prefer_neon_for_64bits to false. + (arm_fastmul_tune, arm_strongarm_tune, arm_xscale_tune): Ditto. + (arm_9e_tune, arm_v6t2_tune, arm_cortex_tune): Ditto. + (arm_cortex_a15_tune, arm_cortex_a5_tune): Ditto. + (arm_cortex_a9_tune, arm_v6m_tune, arm_fa726te_tune): Ditto. + (arm_option_override): Handle -mneon-for-64bits new option. + * config/arm/arm.h (TARGET_PREFER_NEON_64BITS): New macro. + (prefer_neon_for_64bits): Declare new variable. + * config/arm/arm.md (arch): Rename neon_onlya8 and neon_nota8 to + avoid_neon_for_64bits and neon_for_64bits. Remove onlya8 and nota8. + (arch_enabled): Handle new arch types. Remove support for onlya8 + and nota8. + (one_cmpldi2): Use new arch names. + (zero_extend<mode>di2, extend<mode>di2): Ditto. + * config/arm/arm.opt (mneon-for-64bits): Add option. + * config/arm/neon.md (adddi3_neon, subdi3_neon, iordi3_neon) + (anddi3_neon, xordi3_neon, ashldi3_neon, <shift>di3_neon): Use + neon_for_64bits instead of nota8 and avoid_neon_for_64bits instead + of onlya8. + * doc/invoke.texi (-mneon-for-64bits): Document. + +2013-03-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/39326 + * tree-ssa-loop-im.c (bb_loop_postorder): New global static. + (sort_bbs_in_loop_postorder_cmp): New function. + (gather_mem_refs_in_loops): Assign mem-ref IDs in loop postorder. + +2013-03-21 Richard Biener <rguenther@suse.de> + + * tree-vect-data-refs.c (vect_update_interleaving_chain): Remove. + (vect_insert_into_interleaving_chain): Likewise. + (vect_drs_dependent_in_basic_block): Inline ... + (vect_slp_analyze_data_ref_dependence): ... here. New function, + split out from ... + (vect_analyze_data_ref_dependence): ... here. Simplify. + (vect_check_interleaving): Simplify. + (vect_analyze_data_ref_dependences): Likewise. Split out ... + (vect_slp_analyze_data_ref_dependences): ... this new function. + (dr_group_sort_cmp): New function. + (vect_analyze_data_ref_accesses): Compute data-reference groups + here instead of in vect_analyze_data_ref_dependence. Use + a more efficient algorithm. + * tree-vect-slp.c (vect_slp_analyze_bb_1): Use + vect_slp_analyze_data_ref_dependences. Call + vect_analyze_data_ref_accesses earlier. + * tree-vect-loop.c (vect_analyze_loop_2): Likewise. + * tree-vectorizer.h (vect_analyze_data_ref_dependences): Adjust. + (vect_slp_analyze_data_ref_dependences): New prototype. + +2013-03-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c (can_sm_ref_p): Do not test whether + ref is stored in the loop. + (find_refs_for_sm): Walk only over all stores. + (store_motion_loop): Allocate from lim_bitmap_obstack. + (store_motion): Likewise. + +2013-03-21 Richard Biener <rguenther@suse.de> + + * tree-vect-loop-manip.c (slpeel_tree_peel_loop_to_edge): + Update virtual SSA form. + +2013-03-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (gcc_cv_ld_eh_frame_ciev3): New test. + * configure: Regenerate. + * config.in: Regenerate. + * config/sol2.c (solaris_override_options): Only enforce DWARF 2 + if !HAVE_LD_EH_FRAME_CIEV3. + +2013-03-21 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (verify_expr_no_block): New function. + (verify_expr_location_1): Verify that neither DECL_DEBUG_EXPR + nor DECL_VALUE_EXPR have locations with associated blocks. + * tree-ssa-live.c (clear_unused_block_pointer_1): Remove. + (clear_unused_block_pointer): Remove code dealing with + blocks in DECL_DEBUG_EXPR locations. + +2013-03-21 Richard Biener <rguenther@suse.de> + + * tree.h (DECL_DEBUG_EXPR_IS_FROM): Rename to ... + (DECL_HAS_DEBUG_EXPR_P): ... this. Guard properly. + * tree.c (copy_node_stat): Do not copy DECL_HAS_DEBUG_EXPR_P. + * dwarf2out.c (add_var_loc_to_decl): Use DECL_HAS_DEBUG_EXPR_P + instead of DECL_DEBUG_EXPR_IS_FROM. + * gimplify.c (gimplify_modify_expr): Likewise. + * tree-cfg.c (verify_expr_location_1): Likewise. + * tree-complex.c (create_one_component_var): Likewise. + * tree-sra.c (create_access_replacement): Likewise. + * tree-ssa-live.c (clear_unused_block_pointer_1): Likewise. + (clear_unused_block_pointer): Likewise. + * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise. + * tree-streamer-out.c (pack_ts_decl_common_value_fields): Likewise. + * var-tracking.c (var_debug_decl): Likewise. + (track_expr_p): Likewise. + * tree-inline.c (add_local_variables): Likewise. Set + DECL_HAS_DEBUG_EXPR_P after copying it. + * tree-diagnostic.c (default_tree_printer): Use DECL_HAS_DEBUG_EXPR_P + instead of DECL_DEBUG_EXPR_IS_FROM. Guard properly. + +2013-03-21 Uros Bizjak <ubizjak@gmail.com> + + PR bootstrap/56656 + * configure.ac (HAVE_AS_IX86_INTERUNIT_MOVQ): New test. + * configure: Regenerate. + * config.in: Regenerate. + * config/i386/i386.md (*movdf_internal): Use + HAVE_AS_IX86_INTERUNIT_MOVQ to handle broken assemblers that require + movd instead of movq mnemonic for interunit moves. + (*movdi_internal): Ditto. + +2013-03-21 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64-simd.md (simd_fabd): New Attribute. + (abd<mode>_3): New pattern. + (aba<mode>_3): New pattern. + (fabd<mode>_3): New pattern. + +2013-03-21 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64-elf.h (REGISTER_PREFIX): Remove. + * config/aarch64/aarch64.c (aarch64_print_operand): Remove all + occurrence of REGISTER_PREFIX as its empty string. + +2013-03-20 Jeff Law <law@redhat.com> + + * tree-ssa-dom.c (record_equivalences_from_incoming_edge): Record + addititional equivalences for equality comparisons between an SSA_NAME + and a constant where the SSA_NAME was set from a widening conversion. + +2013-03-20 Walter Lee <walt@tilera.com> + + * config/tilegx/sync.md (atomic_test_and_set): New pattern. + +2013-03-20 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movoi_internal_avx): Emit insn template + depending on type attribute. + (*movti_internal): Ditto. + (*movtf_internal): Ditto. + (*movxf_internal): Ditto. + (*movdf_internal): Ditto. + (*movsf_internal): Ditto. + +2013-03-20 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movti_internal): Set prefix attribute to + maybe_vex for sselog1 and ssemov types. + (*movdi_internal): Reorder operand constraints. + (*movsi_internal): Ditto. Set prefix attribute to + maybe_vex for sselog1 and ssemov types. + (*movtf_internal): Set prefix attribute to maybe_vex + for sselog1 and ssemov types. + (*movdf_internal): Ditto. Set prefix_data16 attribute for + DImode ssemov types. Reorder operand constraints. + (*movsf_internal): Set type of alternatives 3,4 to imov. Set prefix + attribute to maybe_vex for sselog1 and ssemov types. Set prefix_data16 + attribute for SImode ssemov types. Reorder operand constraints. + +2013-03-20 Martin Jambor <mjambor@suse.cz> + + * params.def (PARAM_IPA_CP_ARRAY_INDEX_HINT_BONUS): New parameter. + * ipa-cp.c (hint_time_bonus): Add abonus for known array indices. + +2013-03-20 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/predicates.md (indexed_address, update_address_mem + update_indexed_address_mem): New predicates. + * config/rs6000/vsx.md (vsx_extract_<mode>_zero): Set correct "type" + attribute for load/store instructions. + * config/rs6000/dfp.md (movsd_store): Likewise. + (movsd_load): Likewise. + * config/rs6000/rs6000.md (zero_extend<mode>di2_internal1): Likewise. + (unnamed HI->DI extend define_insn): Likewise. + (unnamed SI->DI extend define_insn): Likewise. + (unnamed QI->SI extend define_insn): Likewise. + (unnamed QI->HI extend define_insn): Likewise. + (unnamed HI->SI extend define_insn): Likewise. + (unnamed HI->SI extend define_insn): Likewise. + (extendsfdf2_fpr): Likewise. + (movsi_internal1): Likewise. + (movsi_internal1_single): Likewise. + (movhi_internal): Likewise. + (movqi_internal): Likewise. + (movcc_internal1): Correct mnemonic for stw insn. Set correct "type" + attribute for load/store instructions. + (mov<mode>_hardfloat): Set correct "type" attribute for load/store + instructions. + (mov<mode>_softfloat): Likewise. + (mov<mode>_hardfloat32): Likewise. + (mov<mode>_hardfloat64): Likewise. + (mov<mode>_softfloat64): Likewise. + (movdi_internal32): Likewise. + (movdi_internal64): Likewise. + (probe_stack_<mode>): Likewise. + +2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/vector.md (VEC_R): Add 32-bit integer, binary + floating point, and decimal floating point to reload iterator. + + * config/rs6000/constraints.md (wl constraint): New constraints to + return FLOAT_REGS if certain options are used to reduce the number + of separate patterns that exist in the file. + (wx constraint): Likewise. + (wz constraint): Likewise. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): If + -mdebug=reg, print wg, wl, wx, and wz constraints. + (rs6000_init_hard_regno_mode_ok): Initialize new constraints. + Initialize the reload functions for 64-bit binary/decimal floating + point types. + (reg_offset_addressing_ok_p): If we are on a power7 or later, use + LFIWZX and STFIWX to load/store 32-bit decimal types, and don't + create the buffer on the stack to overcome not having a 32-bit + load and store. + (rs6000_emit_move): Likewise. + (rs6000_secondary_memory_needed_rtx): Likewise. + (rs6000_alloc_sdmode_stack_slot): Likewise. + (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f + via xxlxor, just like DFmode 0.0. + + * config/rs6000/rs6000.h (TARGET_NO_SDMODE_STACK): New macro, + define as 1 if we are running on a power7 or newer. + (enum r6000_reg_class_enum): Add new constraints. + + * config/rs6000/dfp.md (movsd): Delete, combine with binary + floating point moves in rs6000.md. Combine power6x (mfpgpr) moves + with other moves by using conditional constraits (wg). Use LFIWZX + and STFIWX for loading SDmode on power7. Use xxlxor to create 0.0f. + (movsd splitter): Likewise. + (movsd_hardfloat): Likewise. + (movsd_softfloat): Likewise. + + * config/rs6000/rs6000.md (FMOVE32): New iterators to combine + binary and decimal floating point moves. + (fmove_ok): New attributes to combine binary and decimal floating + point moves, and to combine power6x (mfpgpr) moves along normal + floating moves. + (real_value_to_target): Likewise. + (f32_lr): Likewise. + (f32_lm): Likewise. + (f32_li): Likewise. + (f32_sr): Likewise. + (f32_sm): Likewise. + (f32_si): Likewise. + (movsf): Combine binary and decimal floating point moves. Combine + power6x (mfpgpr) moves with other moves by using conditional + constraits (wg). Use LFIWZX and STFIWX for loading SDmode on power7. + (mov<mode> for SFmode/SDmode); Likewise. + (SFmode/SDmode splitters): Likewise. + (movsf_hardfloat): Likewise. + (mov<mode>_hardfloat for SFmode/SDmode): Likewise. + (movsf_softfloat): Likewise. + (mov<mode>_softfloat for SFmode/SDmode): Likewise. + + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wl, + wx and wz constraints. + + * config/rs6000/constraints.md (wg constraint): New constraint to + return FLOAT_REGS if -mmfpgpr (power6x) was used. + + * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wg + constraint. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): If + -mdebug=reg, print wg, wl, wx, and wz constraints. + (rs6000_init_hard_regno_mode_ok): Initialize new constraints. + Initialize the reload functions for 64-bit binary/decimal floating + point types. + (reg_offset_addressing_ok_p): If we are on a power7 or later, use + LFIWZX and STFIWX to load/store 32-bit decimal types, and don't + create the buffer on the stack to overcome not having a 32-bit + load and store. + (rs6000_emit_move): Likewise. + (rs6000_secondary_memory_needed_rtx): Likewise. + (rs6000_alloc_sdmode_stack_slot): Likewise. + (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f + via xxlxor, just like DFmode 0.0. + + * config/rs6000/dfp.md (movdd): Delete, combine with binary + floating point moves in rs6000.md. Combine power6x (mfpgpr) moves + with other moves by using conditional constraits (wg). Use LFIWZX + and STFIWX for loading SDmode on power7. + (movdd splitters): Likewise. + (movdd_hardfloat32): Likewise. + (movdd_softfloat32): Likewise. + (movdd_hardfloat64_mfpgpr): Likewise. + (movdd_hardfloat64): Likewise. + (movdd_softfloat64): Likewise. + + * config/rs6000/rs6000.md (FMOVE64): New iterators to combine + 64-bit binary and decimal floating point moves. + (FMOVE64X): Likewise. + (movdf): Combine 64-bit binary and decimal floating point moves. + Combine power6x (mfpgpr) moves with other moves by using + conditional constraits (wg). + (mov<mode> for DFmode/DDmode): Likewise. + (DFmode/DDmode splitters): Likewise. + (movdf_hardfloat32): Likewise. + (mov<mode>_hardfloat32 for DFmode/DDmode): Likewise. + (movdf_softfloat32): Likewise. + (movdf_hardfloat64_mfpgpr): Likewise. + (movdf_hardfloat64): Likewise. + (mov<mode>_hardfloat64 for DFmode/DDmode): Likewise. + (movdf_softfloat64): Likewise. + (mov<mode>_softfloat64 for DFmode/DDmode): Likewise. + (reload_<mode>_load): Move to later in the file so they aren't in + the middle of the floating point move insns. + (reload_<mode>_store): Likewise. + + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wg + constraint. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print out wg + constraint if -mdebug=reg. + (rs6000_initi_hard_regno_mode_ok): Enable wg constraint if -mfpgpr. + Enable using dd reload support if needed. + + * config/rs6000/dfp.md (movtd): Delete, combine with 128-bit + binary and decimal floating point moves in rs6000.md. + (movtd_internal): Likewise. + + * config/rs6000/rs6000.md (FMOVE128): Combine 128-bit binary and + decimal floating point moves. + (movtf): Likewise. + (movtf_internal): Likewise. + (mov<mode>_internal, TDmode/TFmode): Likewise. + (movtf_softfloat): Likewise. + (mov<mode>_softfloat, TDmode/TFmode): Likewise. + + * config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with + movdi_internal64, using wg constraint for move direct operations. + (movdi_internal64): Likewise. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print + MODES_TIEABLE_P for selected modes. Print the numerical value of + the various virtual registers. Use GPR/FPR first/last values, + instead of hard coding the register numbers. Print which modes + have reload functions registered. + (rs6000_option_override_internal): If -mdebug=reg, trace the options + settings before/after setting cpu, target and subtarget settings. + (rs6000_secondary_reload_trace): Improve the RTL dump for -mdebug=addr + and for secondary reload failures in rs6000_secondary_reload_inner. + (rs6000_secondary_reload_fail): Likewise. + (rs6000_secondary_reload_inner): Likewise. + + * config/rs6000/rs6000.md (FIRST_GPR_REGNO): Add convenience + macros for first/last GPR and FPR registers. + (LAST_GPR_REGNO): Likewise. + (FIRST_FPR_REGNO): Likewise. + (LAST_FPR_REGNO): Likewise. + + * config/rs6000/vector.md (mul<mode>3): Use the combined macro + VECTOR_UNIT_ALTIVEC_OR_VSX_P instead of separate calls to + VECTOR_UNIT_ALTIVEC_P and VECTOR_UNIT_VSX_P. + (vcond<mode><mode>): Likewise. + (vcondu<mode><mode>): Likewise. + (vector_gtu<mode>): Likewise. + (vector_gte<mode>): Likewise. + (xor<mode>3): Don't allow logical operations on TImode in 32-bit + to prevent the compiler from converting DImode operations to TImode. + (ior<mode>3): Likewise. + (and<mode>3): Likewise. + (one_cmpl<mode>2): Likewise. + (nor<mode>3): Likewise. + (andc<mode>3): Likewise. + + * config/rs6000/constraints.md (wt constraint): New constraint + that returns VSX_REGS if TImode is allowed in VSX registers. + + * config/rs6000/predicates.md (easy_fp_constant): 0.0f is an easy + constant under VSX. + + * config/rs6000/rs6000-modes.def (PTImode): Define, PTImode is + similar to TImode, but it is restricted to being in the GPRs. + + * config/rs6000/rs6000.opt (-mvsx-timode): New switch to allow + TImode to occupy a single VSX register. + + * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Default to + -mvsx-timode for power7/power8. + (power7 cpu): Likewise. + (power8 cpu): Likewise. + + * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Make + sure that TFmode/TDmode take up two registers if they are ever + allowed in the upper VSX registers. + (rs6000_hard_regno_mode_ok): If -mvsx-timode, allow TImode in VSX + registers. + (rs6000_init_hard_regno_mode_ok): Likewise. + (rs6000_debug_reg_global): Add debugging for PTImode and wt + constraint. Print if LRA is turned on. + (rs6000_option_override_internal): Give an error if -mvsx-timode + and VSX is not enabled. + (invalid_e500_subreg): Handle PTImode, restricting it to GPRs. If + -mvsx-timode, restrict TImode to reg+reg addressing, and PTImode + to reg+offset addressing. Use PTImode when checking offset + addresses for validity. + (reg_offset_addressing_ok_p): Likewise. + (rs6000_legitimate_offset_address_p): Likewise. + (rs6000_legitimize_address): Likewise. + (rs6000_legitimize_reload_address): Likewise. + (rs6000_legitimate_address_p): Likewise. + (rs6000_eliminate_indexed_memrefs): Likewise. + (rs6000_emit_move): Likewise. + (rs6000_secondary_reload): Likewise. + (rs6000_secondary_reload_inner): Handle PTImode. Allow 64-bit + reloads to fpr registers to continue to use reg+offset addressing, + but 64-bit reloads to altivec registers need reg+reg addressing. + Drop test for PRE_MODIFY, since VSX loads/stores no longer support + it. Treat LO_SUM like a PLUS operation. + (rs6000_secondary_reload_class): If type is 64-bit, prefer to use + FLOAT_REGS instead of VSX_RGS to allow use of reg+offset addressing. + (rs6000_cannot_change_mode_class): Do not allow TImode in VSX + registers to share a register with a smaller sized type, since VSX + puts scalars in the upper 64-bits. + (print_operand): Add support for PTImode. + (rs6000_register_move_cost): Use VECTOR_MEM_VSX_P instead of + VECTOR_UNIT_VSX_P to catch types that can be loaded in VSX + registers, but don't have arithmetic support. + (rs6000_memory_move_cost): Add test for VSX. + (rs6000_opt_masks): Add -mvsx-timode. + + * config/rs6000/vsx.md (VSm): Change to use 64-bit aligned moves + for TImode. + (VSs): Likewise. + (VSr): Use wt constraint for TImode. + (VSv): Drop TImode support. + (vsx_movti): Delete, replace with versions for 32-bit and 64-bit. + (vsx_movti_64bit): Likewise. + (vsx_movti_32bit): Likewise. + (vec_store_<mode>): Use VSX iterator instead of vector iterator. + (vsx_and<mode>3): Delete use of '?' constraint on inputs, just put + one '?' on the appropriate output constraint. Do not allow TImode + logical operations on 32-bit systems. + (vsx_ior<mode>3): Likewise. + (vsx_xor<mode>3): Likewise. + (vsx_one_cmpl<mode>2): Likewise. + (vsx_nor<mode>3): Likewise. + (vsx_andc<mode>3): Likewise. + (vsx_concat_<mode>): Likewise. + (vsx_xxpermdi_<mode>): Fix thinko for non V2DF/V2DI modes. + + * config/rs6000/rs6000.h (MASK_VSX_TIMODE): Map from + OPTION_MASK_VSX_TIMODE. + (enum rs6000_reg_class_enum): Add RS6000_CONSTRAINT_wt. + (STACK_SAVEAREA_MODE): Use PTImode instead of TImode. + + * config/rs6000/rs6000.md (INT mode attribute): Add PTImode. + (TI2 iterator): New iterator for TImode, PTImode. + (wd mode attribute): Add values for vector types. + (movti_string): Replace TI move operations with operations for TImode + and PTImode. Add support for TImode being allowed in VSX registers. + (mov<mode>_string, TImode/PTImode): Likewise. + (movti_ppc64): Likewise. + (mov<mode>_ppc64, TImode/PTImode): Likewise. + (TI mode splitters): Likewise. + + * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wt + constraint. + +2013-03-20 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/56355 + * fold-const.c (tree_binary_nonnegative_warnv_p) <MULT_EXPR>: + Also handle integers with undefined overflow. + +2013-03-20 Catherine Moore <clm@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Nathan Sidwell <nathan@codesourcery.com> + Iain Sandoe <iain@codesourcery.com> + Nathan Froyd <froydnj@codesourcery.com> + Chao-ying Fu <fu@mips.com> + + * doc/extend.texi: (micromips, nomicromips, nocompression): + Document new function attributes. + * doc/invoke.texi (minterlink-compressed, mmicromips, + m14k, m14ke, m14kec): Document new options. + (minterlink-mips16): Update documentation. + * doc/md.texi (ZC, ZD): Document new constraints. + * configure.ac (gcc_cv_as_micromips): Check if linker + supports the .set micromips directive. + * configure: Regenerate. + * config.in: Regenerate. + * config/mips/mips-tables.opt: Regenerate. + * config/mips/micromips.md: New file. + * constraints.md (ZC, ZD): New constraints. + * config/mips/predicates.md (movep_src_register): New predicate. + (movep_src_operand): New predicate. + (non_volatile_mem_operand): New predicate. + * config/mips/mips.md (multimem): New type. + (length): Differentiate between 17-bit and 18-bit branch offsets. + (MOVEP1, MOVEP2): New mode iterator. + (mov_<load>l): Use ZC constraint. + (mov_<load>r): Likewise. + (mov_<store>l): Likewise. + (mov_<store>r): Likewise. + (*branch_equality<mode>_inverted): Add microMIPS support. + (*branch_equality<mode>): Likewise. + (*jump_absolute): Likewise. + (indirect_jump_<mode>): Likewise. + (tablejump_<mode>): Likewise. + (<optab>_internal): Likewise. + (sibcall_internal): Likewise. + (sibcall_value_internal): Likewise. + (prefetch): Use constraint ZD. + * config/mips/mips.opt (minterlink-compressed): New option. + (minterlink-mips16): Now an alias for minterlink-compressed. + (mmicromips): New option. + * config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint. + (compare_and_swap_12): Likewise. + (sync_add<mode>): Likewise. + (sync_<optab>_12): Likewise. + (sync_old_<optab>_12): Likewise. + (sync_new_<optab>_12): Likewise. + (sync_nand_12): Likewise. + (sync_old_nand_12): Likewise. + (sync_new_nand_12): Likewise. + (sync_sub<mode>): Likewise. + (sync_old_add<mode>): Likewise. + (sync_old_sub<mode>): Likewise. + (sync_new_add<mode>): Likewise. + (sync_new_sub<mode>): Likewise. + (sync_<optab><mode>): Likewise. + (sync_old_<optab><mode>): Likewise. + (sync_new_<optab><mode>): Likewise. + (sync_nand<mode>): Likewise. + (sync_old_nand<mode>): Likewise. + (sync_new_nand<mode>): Likewise. + (sync_lock_test_and_set<mode>): Likewise. + (test_and_set_12): Likewise. + (atomic_compare_and_swap<mode>): Likewise. + (atomic_exchange<mode>_llsc): Likewise. + (atomic_fetch_add<mode>_llsc): Likewise. + * config/mips/mips-cpus.def (m14kc, m14k): New processors. + * config/mips/mips-protos.h (umips_output_save_restore): New prototype. + (umips_save_restore_pattern_p): Likewise. + (umips_load_store_pair_p): Likewise. + (umips_output_load_store_pair): Likewise. + (umips_movep_target_p): Likewise. + (umips_12bit_offset_address_p): Likewise. + * config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. Update all uses. + (mips_attribute_table): Add micromips, nomicromips and nocompression. + (mips_mips16_decl_p): Delete. + (mips_nomips16_decl_p): Delete. + (mips_get_compress_on_flags): New function. + (mips_get_compress_off_flags): New function. + (mips_get_compress_mode): New function. + (mips_get_compress_on_name): New function. + (mips_get_compress_off_name): New function. + (mips_insert_attributes): Support multiple compression types. + (mips_merge_decl_attributes): Likewise. + (umips_12bit_offset_address_p): New function. + (mips_start_function_definition): Emit .set micromips directive. + (mips_call_may_need_jalx_p): New function. + (mips_function_ok_for_sibcall): Add microMIPS support. + (mips_print_operand_punctuation): Support short delay slots and + compact jumps. + (umips_swm_mask, umips_swm_encoding): New. + (umips_build_save_restore): New function. + (mips_for_each_saved_gpr_and_fpr): Add microMIPS support. + (was_mips16_p): Remove. + (old_compression_mode): New. + (mips_set_compression_mode): New function. + (mips_set_current_function): Add microMIPS support. + (mips_option_override): Likewise. + (umips_save_restore_pattern_p): New function. + (umips_output_save_restore): New function. + (umips_load_store_pair_p_1): New function. + (umips_load_store_pair_p): New function. + (umips_output_load_store_pair_1): New function. + (umips_output_load_store_pair): New function. + (umips_movep_target_p) New function. + (mips_prepare_pch_save): Add microMIPS support. + * config/mips/mips.h (TARGET_COMPRESSION): New. + (TARGET_CPU_CPP_BUILTINS): Update macro + to use new compression flags and to support microMIPS. + (MIPS_ISA_LEVEL_SPEC): Add m14k processors. + (MIPS_ARCH_FLOAT_SPEC): Likewise. + (ISA_HAS_LWXS): Include TARGET_MICROMIPS. + (ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS. + (ASM_SPEC): Support mmicromips and mno-micromips. + (M16STORE_REG_P): New macro. + (MIPS_CALL): Support TARGET_MICROMIPS. + (MICROMIPS_J): New macro. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. + (UMIPS_12BIT_OFFSET_P): New macro. + * config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS. + (MULTILIB_DIRNAMES): Likewise. +2013-03-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56661 + * tree-ssa-sccvn.c (visit_use): Only value-number calls if + the result does not have to be distinct. + +2013-03-20 Richard Biener <rguenther@suse.de> + + * tree-inline.c (copy_tree_body_r): Sync MEM_REF code with + remap_gimple_op_r. + +2013-03-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + Steven Bosscher <steven@gcc.gnu.org> + + PR rtl-optimization/56605 + * loop-iv.c (implies_p): Handle equal RTXs and subregs. + +2013-03-20 Uros Bizjak <ubizjak@gmail.com> + + PR bootstrap/56656 + * config/i386/i386.md (*movdi_internal): Handle broken assemblers + that require movd instead of movq. + +2013-03-20 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (struct variable_info): Add pointer + to the first field of an aggregate with sub-vars. Make + this and the pointer to the next subfield its ID. + (vi_next): New function. + (nothing_id, anything_id, readonly_id, escaped_id, nonlocal_id, + storedanything_id, integer_id): Increment by one. + (new_var_info, get_call_vi, lookup_call_clobber_vi, + get_call_clobber_vi): Adjust. + (solution_set_expand): Simplify and speedup. + (solution_set_add): Inline into ... + (set_union_with_increment): ... this. Adjust accordingly. + (do_sd_constraint): Likewise. + (do_ds_constraint): Likewise. + (do_complex_constraint): Simplify. + (build_pred_graph): Adjust. + (solve_graph): Likewise. Simplify and speedup. + (get_constraint_for_ssa_var, get_constraint_for_ptr_offset, + get_constraint_for_component_ref, get_constraint_for_1, + first_vi_for_offset, first_or_preceding_vi_for_offset, + create_function_info_for, create_variable_info_for_1, + create_variable_info_for, intra_create_variable_infos): Adjust. + (init_base_vars): Push NULL for ID zero. + (compute_points_to_sets): Adjust. + +2013-03-20 Richard Biener <rguenther@suse.de> + + * cfgloop.c (verify_loop_structure): Streamline and avoid + ICEing on corrupt loop tree. + * graph.c (draw_cfg_nodes_for_loop): Avoid ICEing on corrupt + loop tree. + +2013-03-20 Richard Biener <rguenther@suse.de> + + * tree-vect-loop-manip.c (slpeel_can_duplicate_loop_p): Do not + check whether an SSA update is needed. + +2013-03-20 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/constraints.md (T): Rename to... + (Yf): ...this. + (U): Rename to... + (Yd): ...this. + * config/mips/mips.md (*movdi_64bit, *movdi_64bit_mips16) + (*mov<mode>_internal, *mov<mode>_mips16): Update accordingly. + +2013-03-19 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*sub<mode>3_carryin): New pattern. + (*subsi3_carryin_uxtw): Likewise. + +2013-03-19 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*ror<mode>3_insn): New pattern. + (*rorsi3_insn_uxtw): Likewise. + +2013-03-19 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md (*extr<mode>5_insn): New pattern. + (*extrsi5_insn_uxtw): Likewise. + +2013-03-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56273 + * passes.c (init_optimization_passes): Move second VRP after DOM. + +2013-03-19 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movti_internal): Merge from + *movti_internal_rex64 and *movti_internal_sse. Use x64 isa attribute. + (*movdi_internal): Merge with *movdi_internal_rex64. Use x64 and + nox64 isa attributes. + +2013-03-18 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (find): Use gcc_checking_assert. + (unite): Likewise. + (merge_node_constraints): Likewise. + (build_succ_graph): Likewise. + (valid_graph_edge): Inline into single caller. + (unify_nodes): Likewise. Use bitmap_set_bit return value + and cache varinfo. + (scc_visit): Fix formatting and variable use. + (do_sd_constraint): Use gcc_checking_assert. + (do_ds_constraint): Likewise. + (do_complex_constraint): Likewise. + (condense_visit): Likewise. Cleanup. + (dump_pred_graph): New function. + (perform_var_substitution): Dump the pred-graph before + variable substitution. + (find_equivalent_node): Use gcc_checking_assert. + (rewrite_constraints): Guard checking loop with ENABLE_CHECKING. + +2013-03-18 Richard Biener <rguenther@suse.de> + + * tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): + Remove cond_expr_stmt_list argument and do not gimplify the + built expression. + (vect_loop_versioning): Adjust. + * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): + Cleanup to use less temporaries. + (vect_create_data_ref_ptr): Cleanup. + +2013-03-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56635 + * fold-const.c (operand_equal_p): For MEM_REF and TARGET_MEM_REF, + require types_compatible_p types. + +2013-03-18 Nick Clifton <nickc@redhat.com> + + * config/stormy16/stormy16.c (xstormy16_expand_prologue): Remove + spurious backslash. + + * config/mn10300/mn10300.c (mn10300_get_live_callee_saved_regs): + Add missing line to comment describing function. + +2013-03-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56210 + * tree-ssa-structalias.c (find_func_aliases_for_builtin_call): + Handle string / character search functions. + * tree-ssa-alias.c (ref_maybe_used_by_call_p_1): Likewise. + +2013-03-18 Richard Biener <rguenther@suse.de> + + PR middle-end/56483 + * cfgexpand.c (expand_gimple_cond): Inline gimple_cond_single_var_p + and implement properly. + * gimple.h (gimple_cond_single_var_p): Remove. + +2013-03-18 Richard Biener <rguenther@suse.de> + + * tree-data-ref.h (find_data_references_in_loop): Declare. + * tree-data-ref.c (get_references_in_stmt): Use a stack + vector pre-allocated in the callers. + (find_data_references_in_stmt): Adjust. + (graphite_find_data_references_in_stmt): Likewise. + (create_rdg_vertices): Likewise. + (find_data_references_in_loop): Export. + * tree-vect-data-refs.c (vect_analyze_data_ref_dependences): + Compute dependences here... + (vect_analyze_data_refs): ...not here. When we encounter + a non-vectorizable data reference in basic-block vectorization + truncate the data reference vector. Do not bother to + fixup data-dependence information for gather loads. + * tree-vect-slp.c (vect_slp_analyze_bb_1): Check the number + of data references, as reported. + +2013-03-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/3713 + * tree-ssa-sccvn.c (visit_copy): Simplify. Always propagate + has_constants and expr. + (stmt_has_constants): Properly valueize SSA names when deciding + whether the stmt has constants. + +2013-03-18 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-manip.c (find_uses_to_rename): Do not scan the + whole function when there is nothing to do. + * tree-ssa-loop.c (pass_vectorize): Remove TODO_update_ssa. + * tree-vectorizer.c (vectorize_loops): Update virtual and + loop-closed SSA once. + * tree-vect-loop.c (vect_transform_loop): Do not update SSA here. + +2013-03-18 Richard Biener <rguenther@suse.de> + + PR middle-end/56113 + * domwalk.c (bb_postorder): New global static. + (cmp_bb_postorder): New function. + (walk_dominator_tree): Replace scheme imposing an order for + visiting dominator sons by one sorting them at the time they + are pushed on the stack. + +2013-03-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/39326 + * tree-ssa-loop-im.c (refs_independent_p): Exploit symmetry. + (struct mem_ref): Replace mem member with ao_ref typed member. + (MEM_ANALYZABLE): Adjust. + (memref_eq): Likewise. + (mem_ref_alloc): Likewise. + (gather_mem_refs_stmt): Likewise. + (mem_refs_may_alias_p): Use the ao_ref to query the alias oracle. + (execute_sm_if_changed_flag_set): Adjust. + (execute_sm): Likewise. + (ref_always_accessed_p): Likewise. + (refs_independent_p): Likewise. + (can_sm_ref_p): Likewise. + +2013-03-18 Jakub Jelinek <jakub@redhat.com> + + PR c/56566 + * tree.c (tree_int_cst_min_precision): For integer_zerop (value) + return 1 even for !unsignedp. + +2013-03-17 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (isa): Add x64 and nox64. + (enabled): Define x64 for TARGET_64BIT and nox64 for !TARGET_64BIT. + (*pushtf): Enable *roF alternative for x64 isa only. + (*pushxf): Merge with *pushxf_nointeger. Use Yx*r constraint. Set + mode attribute of integer alternatives to DImode for TARGET_64BIT. + (*pushdf): Merge with *pushdf_rex64. Use x64 and nox64 isa attributes. + (*movtf_internal): Merge from *movtf_internal_rex64 and + *movtf_internal_sse. Use x64 and nox64 isa attributes. + (*movxf_internal): Merge with *movxf_internal_rex64. Use x64 and + nox64 isa attributes. + (*movdf_internal): Merge with *movdf_internal_rex64. Use x64 and + nox64 isa attributes. + * config/i386/constraints.md (Yd): Do not set for TARGET_64BIT. + +2013-03-17 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (TARGET_LRA_P): New define. + +2013-03-17 Jakub Jelinek <jakub@redhat.com> + + PR target/56640 + * config/arm/arm.h (REG_CLASS_NAMES): Add "SFP_REG" and "AFP_REG" + class names. Remove trailing comma after "ALL_REGS". + +2013-03-16 Jan Hubicka <jh@suse.cz> + + * cgraph.h (cgraph_get_create_real_symbol_node): Declare. + * cgraph.c (cgraph_get_create_real_symbol_node): New function. + * cgrpahbuild.c: Use cgraph_get_create_real_symbol_node instead + of cgraph_get_create_node. + * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise. + +2013-03-16 Jason Merrill <jason@redhat.com> + + PR debug/49090 + * dwarf2out.c (gen_generic_params_dies): Indicate default arguments + with DW_AT_default_value. + +2013-03-16 Jakub Jelinek <jakub@redhat.com> + + * BASE-VER: Set to 4.9.0. + +2013-03-14 Andi Kleen <ak@linux.intel.com> + + PR target/56619 + * doc/extend.texi: Document __ATOMIC_HLE_ACQUIRE, + __ATOMIC_HLE_RELEASE. Document __builtin_ia32 TSX intrincs. + Document _x* TSX intrinsics. + +2013-03-14 Edgar E. Iglesias <edgar.iglesias@xilinx.com> + David Holsgrove <david.holsgrove@xilinx.com> + + * configure.ac: Add MicroBlaze TLS support detection. + * configure: Regenerate. + * config/microblaze/microblaze-protos.h + (microblaze_cannot_force_const_mem, microblaze_tls_referenced_p, + symbol_mentioned_p, label_mentioned_p): Add prototypes. + * config/microblaze/microblaze.c (microblaze_address_type): Add + ADDRESS_TLS and tls_reloc address types. + (microblaze_address_info): Add tls_reloc. + (TARGET_HAVE_TLS): Define. + (get_tls_get_addr, microblaze_tls_symbol_p, microblaze_tls_operand_p_1, + microblaze_tls_referenced_p, microblaze_cannot_force_const_mem, + symbol_mentioned_p, label_mentioned_p, tls_mentioned_p, + load_tls_operand, microblaze_call_tls_get_addr, + microblaze_legitimize_tls_address): New functions. + (microblaze_classify_unspec): Handle UNSPEC_TLS. + (get_base_reg): Use microblaze_tls_symbol_p. + (microblaze_classify_address): Handle TLS. + (microblaze_legitimate_pic_operand): Use symbol_mentioned_p, + label_mentioned_p and microblaze_tls_referenced_p. + (microblaze_legitimize_address): Handle TLS. + (microblaze_address_insns): Handle ADDRESS_TLS. + (pic_address_needs_scratch): Handle TLS. + (print_operand_address): Handle TLS. + (microblaze_expand_prologue): Check TLS_NEEDS_GOT. + (microblaze_expand_move): Handle TLS. + (microblaze_legitimate_constant_p): Check + microblaze_cannot_force_const_mem and microblaze_tls_symbol_p. + (TARGET_CANNOT_FORCE_CONST_MEM): Define. + * config/microblaze/microblaze.h (TLS_NEEDS_GOT): Define + (PIC_OFFSET_TABLE_REGNUM): Set. + * config/microblaze/linux.h (TLS_NEEDS_GOT): Define. + * config/microblaze/microblaze.md (UNSPEC_TLS): Define. + (addsi3, movsi_internal2, movdf_internal): Update constraints + * config/microblaze/predicates.md (arith_plus_operand): Define + (move_operand): Redefine as move_src_operand, + check microblaze_tls_referenced_p. + +2013-03-14 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md: (*and<mode>3nr_compare0): Use CC_NZ. + (*and_<SHIFT:optab><mode>3nr_compare0): Likewise. + +2013-03-14 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return correct + CC mode for AND. + +2013-03-14 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/53265 + * common.opt (Waggressive-loop-optimizations): New option. + * tree-ssa-loop-niter.c: Include tree-pass.h. + (do_warn_aggressive_loop_optimizations): New function. + (record_estimate): Call it. Don't add !is_exit bounds to loop->bounds + if number_of_latch_executions returned constant. + (estimate_numbers_of_iterations_loop): Call number_of_latch_executions + early. If number_of_latch_executions returned constant, set + nb_iterations_upper_bound back to it. + * cfgloop.h (struct loop): Add warned_aggressive_loop_optimizations + field. + * Makefile.in (tree-ssa-loop-niter.o): Depend on $(TREE_PASS_H). + * doc/invoke.texi (-Wno-aggressive-loop-optimizations): Document. + + * config/aarch64/t-aarch64-linux (MULTARCH_DIRNAME): Remove. + (MULTILIB_OSDIRNAMES): Set. + * genmultilib: If defaultosdirname doesn't start with :: , set + defaultosdirname2 instead, clear it and emit two . multilib_raw + entries instead of just one. + +2013-03-14 Kaz Kojima <kkojima@gcc.gnu.org> + + * config/sh/linux.h (TARGET_DEFAULT): Remove MASK_USERMODE. + (SUBTARGET_OVERRIDE_OPTIONS): Set TARGET_USERMODE as default. + * config/sh/netbsd-elf.h (TARGET_DEFAULT): Remove MASK_USERMODE. + (SUBTARGET_OVERRIDE_OPTIONS): New. + +2013-03-13 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/49880 + * config/sh/sh.opt (FPU_SINGLE_ONLY): New mask. + (musermode): Convert to Var(TARGET_USERMODE). + * config/sh/sh.h (SELECT_SH2A_SINGLE_ONLY, SELECT_SH4_SINGLE_ONLY, + MASK_ARCH): Add MASK_FPU_SINGLE_ONLY. + * config/sh/sh.c (sh_option_override): Use + TARGET_FPU_DOUBLE || TARGET_FPU_SINGLE_ONLY for call-fp case. + * config/sh/sh.md (udivsi3_i1, divsi3_i1): Remove ! TARGET_SH4 + condition. + (udivsi3_i4, divsi3_i4): Use TARGET_FPU_DOUBLE condition instead of + TARGET_SH4. + (udivsi3_i4_single, divsi3_i4_single): Use + TARGET_FPU_SINGLE_ONLY || TARGET_FPU_DOUBLE instead of TARGET_HARD_SH4. + +2013-03-13 Dave Korn <dave.korn.cygwin@gmail.com> + + * config/i386/cygwin.h (SHARED_LIBGCC_SPEC): Make shared libgcc the + default setting. + +2013-03-13 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56608 + * tree-vect-slp.c (vect_schedule_slp): Do not remove scalar + calls when vectorizing basic-blocks. + +2013-03-13 Jakub Jelinek <jakub@redhat.com> + + PR plugins/45078 + * config.gcc: On arm, mips, sh and sparc add vxworks-dummy.h to + tm_file. + +2013-03-12 Jakub Jelinek <jakub@redhat.com> + + * doc/invoke.texi (-Waddr-space-convert): Move into the table earlier. + +2013-03-11 Jan Hubicka <jh@suse.cz> + + PR lto/56557 + * lto-streamer-out.c (output_symbol_p): Skip references from + constructors of external variables. + +2013-03-11 Jan Hubicka <jh@suse.cz> + + PR middle-end/56571 + * valtrack.c (cleanup_auto_inc_dec): Unshare clobbers originating + from pseudos. + * emit-rtl.c (verify_rtx_sharing): Likewise. + (copy_insn_1): Likewise. + * rtl.c (copy_rtx): Likewise. + +2013-03-11 Georg-Johann Lay <avr@gjlay.de> + + PR target/56591 + * config/avr/avr.c (avr_print_operand): Add space after '%c' in + output_operand_lossage message. + +2013-03-11 Richard Earnshaw <rearnsha@arm.com> + + PR target/56470 + * arm.c (shift_op): Validate RTL pattern on the fly. + (arm_print_operand, case 'S'): Don't use shift_operator to validate + the RTL. + +2013-03-10 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/56347 + * config/pa/pa.md (call_value): Check for calls to powf and direct to + new call patterns that clobber %fr12. + (call_val_powf, call_val_powf_pic, call_val_powf_64bit): New insn, + split and postreload patterns. + * config/pa/pa.c (pa_conditional_register_usage): Revert marking + registers %fr12 and %fr12R as call used. + +2013-03-09 Steven Bosscher <steven@gcc.gnu.org> + + * dse.c (delete_dead_store_insn): Respect TDF_DETAILS. + (canon_address, record_store, replace_read, check_mem_read_rtx, + scan_insn, dse_step1, dse_step2_init, dse_step2_spill, + dse_step4, dse_step5_nospill, dse_step5_spill, dse_step6, + rest_of_handle_dse): Likewise. + +2013-03-09 Richard Sandiford <rdsandiford@googlemail.com> + + PR middle-end/56524 + * tree.h (tree_optimization_option): Rename target_optabs to optabs. + Add base_optabs. + (TREE_OPTIMIZATION_OPTABS): Update after previous field change. + (TREE_OPTIMIZATION_BASE_OPTABS): New macro. + (save_optabs_if_changed): Replace with... + (init_tree_optimization_optabs): ...this. + * optabs.c (save_optabs_if_changed): Rename to... + (init_tree_optimization_optabs): ...this. Take the optimization node + as argument. Do nothing if the base optabs are already correct. + Reuse the existing TREE_OPTIMIZATION_OPTABS memory if we need + to recompute optabs. + * function.h (function): Remove optabs field. + * function.c (invoke_set_current_function_hook): Call + init_tree_optimization_optabs. Use the result to initialize + this_fn_optabs. + +2013-02-27 Aldy Hernandez <aldyh@redhat.com> + + * trans-mem.c (expand_transaction): Do not set PR_INSTRUMENTEDCODE + if GTMA_HAS_NO_INSTRUMENTATION. + (generate_tm_state): Keep GTMA_HAS_NO_INSTRUMENTATION bit. + (ipa_tm_transform_transaction): Set GTMA_HAS_NO_INSTRUMENTATION. + * gimple.h (GTMA_HAS_NO_INSTRUMENTATION): Define. + * gimple-pretty-print.c (dump_gimple_transaction): Handle + GTMA_HAS_NO_INSTRUMENTATION. + +2013-03-08 Jakub Jelinek <jakub@redhat.com> + + * config/gnu-user.h (LIBTSAN_EARLY_SPEC): Don't link against + libasan_preinit.o. + +2013-03-08 Marek Polacek <polacek@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56478 + * predict.c (is_comparison_with_loop_invariant_p): Change the + type of loop_step to tree. + (predict_loops): Adjust. + (predict_iv_comparison): Perform the computations on double_ints. + +2013-03-08 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56570 + * tree-cfg.c (verify_expr_location_1): Verify locations for + DECL_DEBUG_EXPR. + * tree-sra.c (create_access_replacement): Strip locations + from DECL_DEBUG_EXPRs. + +2013-03-08 Richard Biener <rguenther@suse.de> + + * tree-inline.c (expand_call_inline): Do not associate + a BLOCK with the location in BLOCK_SOURCE_LOCATION. + * tree-cfg.c (verify_location): Verify BLOCK_SOURCE_LOCATION. + +2013-03-08 Richard Biener <rguenther@suse.de> + + * tree-ssa-ter.c (is_replaceable_p): Do not TER across location + or block changes with -Og. Fix for location / block encoding + changes and PHI arguments with locations. + +2013-03-07 Steven Bosscher <steven@gcc.gnu.org> + + * bitmap.c (struct bitmap_descriptor_d): Use unsigned HOST_WIDEST_INT + for all counters. + (struct output_info): Likewise. + (register_overhead): Remove bad gcc_assert. + (bitmap_find_bit): If there is only a single bitmap element, do not + count a miss as a search. + (print_statistics): Update for counter type changes. + (dump_bitmap_statistics): Likewise. Print headers such that they + are properly lined up with the printed counters. + +2013-03-07 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56559 + * tree-ssa-reassoc.c (zero_one_operation): When looking at rhs2, + check that it has only a single use. + +2013-03-07 Richard Biener <rguenther@suse.de> + + * doc/invoke.texi (fwhole-program): Discourage use in combination + with -flto. + +2013-03-06 Jakub Jelinek <jakub@redhat.com> + + * config/arm/t-arm (TM_H, OPTIONS_H_EXTRA): Add arm-cores.def. + + PR tree-optimization/56539 + * tree-tailcall.c (adjust_return_value_with_ops): Use GSI_SAME_STMT + instead of GSI_CONTINUE_LINKING as last argument to + force_gimple_operand_gsi. Adjust function comment. + + * config/aarch64/t-aarch64 (TM_H, OPTIONS_H_EXTRA): Add + aarch64-cores.def. + + PR middle-end/56548 + * expr.c (expand_cond_expr_using_cmove): When expanding cmove in + promoted mode, convert the result back to the original mode. + +2013-03-06 Richard Biener <rguenther@suse.de> + + PR middle-end/56294 + * tree-into-ssa.c (insert_phi_nodes_for): Add dumping. + (insert_updated_phi_nodes_compare_uids): New function. + (update_ssa): Sort symbols_to_rename after UID before + traversing it to insert PHI nodes. + +2013-03-06 Richard Biener <rguenther@suse.de> + + PR middle-end/50494 + * tree-vect-data-refs.c (vect_can_force_dr_alignment_p): + Do not adjust alignment of DECL_IN_CONSTANT_POOL decls. + + Revert + 2013-02-13 Richard Biener <rguenther@suse.de> + + PR lto/50494 + * varasm.c (output_constant_def_1): Get the decl representing + the constant as argument. + (output_constant_def): Wrap output_constant_def_1. + (make_decl_rtl): Use output_constant_def_1 with the decl + representing the constant. + (build_constant_desc): Optionally re-use a decl already + representing the constant. + (tree_output_constant_def): Adjust. + +2013-03-06 Joey Ye <joey.ye@arm.com> + + PR lto/50293 + * gcc.c (convert_white_space): New function. + (main): Handles white space in function name. + +2013-03-06 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/56529 + * config/sh/sh.c (sh_option_override): Check for TARGET_DYNSHIFT + instead of TARGET_SH2 for call-table case. Do not set sh_div_strategy + to SH_DIV_CALL_TABLE for TARGET_SH2. + * config.gcc (sh_multilibs): Add m2 and m2a to sh*-*-linux* multilib + list. + * doc/invoke.texi (SH options): Document mdiv= call-div1, call-fp, + call-table options. + +2013-03-05 Sterling Augustine <saugustine@google.com> + Cary Coutant <ccoutant@google.com> + + PR debug/55364 + * dwarf2out.c (resolve_addr): Don't call + remove_loc_list_addr_table_entries a second time for the same + expression. + +2013-03-05 Jakub Jelinek <jakub@redhat.com> + + PR debug/56510 + * cfgexpand.c (expand_debug_parm_decl): Call copy_rtx on incoming. + (avoid_complex_debug_insns): New function. + (expand_debug_locations): Call it. + + PR rtl-optimization/56484 + * ifcvt.c (noce_process_if_block): If else_bb is NULL, avoid extending + lifetimes of hard registers on small register class machines. + +2013-03-05 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze-protos.h: Rename + microblaze_is_interrupt_handler to microblaze_is_interrupt_variant. + * config/microblaze/microblaze.c (microblaze_attribute_table): Add + fast_interrupt. + (microblaze_fast_interrupt_function_p): New function. + (microblaze_is_interrupt_handler): Rename to + microblaze_is_interrupt_variant and add fast_interrupt check. + (microblaze_must_save_register): Use microblaze_is_interrupt_variant. + (save_restore_insns): Likewise. + (compute_frame_size): Likewise. + (microblaze_function_prologue): Add FAST_INTERRUPT_NAME. + (microblaze_globalize_label): Likewise. + * config/microblaze/microblaze.h: Define FAST_INTERRUPT_NAME. + * config/microblaze/microblaze.md: Use wrapper + microblaze_is_interrupt_variant. + +2013-03-05 Kai Tietz <ktietz@redhat.com> + + * sdbout.c (sdbout_one_type): Switch to current function's section + supporting cold/hot. + +2013-03-05 David Holsgrove <david.holsgrove@xilinx.com> + + * doc/invoke.texi (MicroBlaze): Add -mbig-endian, -mlittle-endian, + -mxl-reorder. + +2013-03-05 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * ggc-common.c (gt_pch_save): For ENABLE_VALGRIND_CHECKING, + if VALGRIND_GET_VBITS is defined, temporarily make object + memory all defined, and restore previous valgrind addressability + and definability afterwards. Free this_object at the end. + + PR middle-end/56461 + * lra.c (lra): Call lra_clear_live_ranges if live_p, + right before calling lra_create_live_ranges, also call it + when clearing live_p. Only call lra_clear_live_ranges + at the end if live_p. + + PR middle-end/56461 + * sched-deps.c (delete_dep_node): Free DEP_REPLACE. + +2013-03-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56521 + * tree-ssa-sccvn.c (set_value_id_for_result): Always initialize + value-id. + +2013-03-05 Steven Bosscher <steven@gcc.gnu.org> + + PR c++/55135 + * except.h (remove_unreachable_eh_regions): New prototype. + * except.c (remove_eh_handler_splicer): New function, split out + of remove_eh_handler. + (remove_eh_handler): Use remove_eh_handler_splicer. Add comment + warning about running it on many EH regions one at a time. + (remove_unreachable_eh_regions_worker): New function, walk the + EH tree in depth-first order and remove non-marked regions. + (remove_unreachable_eh_regions): New function. + * tree-eh.c (mark_reachable_handlers): New function, split out + from remove_unreachable_handlers. + (remove_unreachable_handlers): Use mark_reachable_handlers and + remove_unreachable_eh_regions. + (remove_unreachable_handlers_no_lp): Use mark_reachable_handlers + and remove_unreachable_eh_regions. + +2013-03-05 Richard Biener <rguenther@suse.de> + + PR middle-end/56525 + * loop-init.c (fix_loop_structure): Remove loops in two stages, + not freeing them until the end. + +2013-03-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * config/s390/s390.h: Define DWARF2_ASM_LINE_DEBUG_INFO. + +2013-03-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56270 + * tree-vect-slp.c (vect_schedule_slp): Clear vectorized stmts + of loads after scheduling an SLP instance. + +2013-03-05 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (dg_target_exps): Add aarch64.exp, epiphany.exp and + tic6x.exp. + (check_gcc_parallelize): Run guality.exp as a separate job from + vect.exp with unsorted.exp and $(dg_target_exps) separately from + struct-layout-1.exp with stackalign.exp. + + * alias.c (init_alias_analysis): Clear reg_known_equiv_p bitmap. + + PR middle-end/56461 + * tree-vect-slp.c (vect_supported_load_permutation_p): Free + load_index sbitmap even if some bit in it isn't set. + + PR middle-end/56461 + * tree-ssa-loop-niter.c (bb_queue): Remove typedef. + (discover_iteration_bound_by_body_walk): Change queues to + vec<vec<basic_block> > and queue to vec<basic_block>. Fix up + spelling in comment. Call safe_push on queues[bound_index] directly. + Release queues[queue_index] in every iteration unconditionally. + Release bounds vector. + + PR middle-end/56461 + * tree-vect-stmts.c (free_stmt_vec_info_vec): Call + free_stmt_vec_info on any left-over stmt_vec_info in the vector. + * tree-vect-loop.c (vect_create_epilog_for_reduction): Release + inner_phis vector. + +2013-03-05 Richard Biener <rguenther@suse.de> + + PR lto/56515 + * tree-inline.c (remap_blocks_to_null): New function. + (expand_call_inline): When expanding a call stmt without + an associated block inline remap all callee blocks to NULL. + +2013-03-05 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/56494 + * simplify-rtx.c (simplify_truncation): If C is narrower than A, + optimize (truncate:A (subreg:B (truncate:C X) 0)) into + (subreg:A (truncate:C X) 0) instead of (truncate:A X). + + PR middle-end/56461 + * sel-sched-ir.c (free_sched_pools): Release + succs_info_pool.stack[succs_info_pool.max_top] vectors too + if succs_info_pool.max_top isn't -1. + + PR bootstrap/56509 + * opts.c (opts_obstack, opts_concat): Moved to... + * opts-common.c (opts_obstack, opts_concat): ... here. + +2013-03-04 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * diagnostic.c (diagnostic_append_note): Save and restore old prefix. + +2013-03-04 Martin Jambor <mjambor@suse.cz> + + * tree-dfa.c (get_or_create_ssa_default_def): Use parameter fn in + all appropriate places. + +2013-01-04 Eric Botcazou <ebotcazou@adacore.com> + + PR tree-optimization/56424 + * ipa-split.c (split_function): Do not set the RSO flag if result is + not by reference and its type is a register type. + +2013-03-04 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.c (microblaze_valid_pic_const): New + (microblaze_legitimate_pic_operand): Likewise + * config/microblaze/microblaze.h (LEGITIMATE_PIC_OPERAND_P): calls + new function microblaze_legitimate_pic_operand + * config/microblaze/microblaze-protos.h + (microblaze_legitimate_pic_operand): Declare. + +2013-03-04 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/predicates.md (call_insn_simple_operand): + New predicate for supported rtx code types. + * config/microblaze/microblaze.md (call_internal1): Use + call_insn_simple_operand predicate. + +2013-03-04 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * tree-loop-distribution.c (ldist_gen): Call partition_free after each + partitions.ordered_remove. + + PR middle-end/56461 + * tree-vect-stmts.c (vectorizable_conversion): Don't call + vec_oprnds0.create (1) for modifier == NONE. + + PR middle-end/56461 + * tree-vect-stmts.c (vectorizable_shift): Don't call create methods + on vec_oprnds0 or vec_oprnds1 before loop, only call it on + vec_oprnds1 right before pushing anything to it for + scalar_shift_arg. + + PR middle-end/56461 + * tree-vect-loop.c (destroy_loop_vec_info): For !clean_stmts, just + set nbbs to 0 instead of having separate code path. + (vect_analyze_loop_form): Call destroy_loop_vec_info with true + instead of false as last argument if returning NULL. + +2013-03-03 Sandra Loosemore <sandra@codesourcery.com> + + * target.def (TARGET_OPTION_VALID_ATTRIBUTE_P): Update comments; + the attribute is now called "target" instead of "option". + (TARGET_OPTION_PRAGMA_PARSE): Likewise, for the pragma. + * doc/tm.texi.in (Target Attributes): Likewise document the correct + attribute/pragma name for TARGET_OPTION_VALID_P and + TARGET_OPTION_PRAGMA_PARSE. Also copy-edit and correct markup. + * doc/tm.texi: Regenerated. + +2013-03-02 David Holsgrove <david.holsgrove@xilinx.com> + + * config/microblaze/microblaze.c: + Check mcpu, pcmp requirement and set TARGET_REORDER to 0 if not met. + * config/microblaze/microblaze.h: Add -mxl-reorder to + DRIVER_SELF_SPECS. + * config/microblaze/microblaze.md: New bswapsi2 and bswaphi2. + instructions emitted if TARGET_REORDER. + * config/microblaze/microblaze.opt: New option -mxl-reorder set to 1 + or 0 for -m/-mno case, but initialises as 2 to detect default use case + separately. + +2013-03-01 Xinliang David Li <davidxl@google.com> + + * tree-ssa-uninit.c (compute_control_dep_chain): Limit post-dom + walk length. + +2013-03-01 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * tree-ssa-loop-ivcanon.c (tree_estimate_loop_size): Release path + vector even when returning true. Fix up function comment formatting. + + PR middle-end/56461 + * ira-build.c (ira_loop_nodes_count): New variable. + (create_loop_tree_nodes): Initialize it. + (finish_loop_tree_nodes): Use it instead of looking at current_loops. + + PR middle-end/56461 + * tree-vect-data-refs.c (vect_permute_store_chain): Avoid using copy + method on dr_chain and result_chain. + * tree-vect-stmts.c (vectorizable_store): Only call + result_chain.create if j == 0. + + PR middle-end/56461 + * tree-vect-stmts.c (vect_create_vectorized_promotion_stmts): Call + vec_oprnds0->release (); rather than vec_oprnds0->truncate (0) + before overwriting it. + +2013-03-01 Tobias Burnus <burnus@net-b.de> + + * doc/extended.texi (C Extensions): Change order in @menu + to match @node. + (Other MIPS Built-in Functions): Move last MIPS entry before + "picoChip Built-in Functions". + (SH Built-in Functions): Move after RX Built-in Functions. + * doc/gcc.texi (Introduction): Change order in @menu + to match @node. + * doc/md.texi (Constraints): Ditto. + * gty.texi (Type Information): Ditto. + (User-provided marking routines for template types): Make + subsection. + * doc/invoke.texi (AArch64 Options): Move before + "Adapteva Epiphany Options". + +2013-02-28 Konstantin Serebryany <konstantin.s.serebryany@gmail.com> + Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/56454 + * asan.c (gate_asan): Lookup no_sanitize_address instead of + no_address_safety_analysis attribute. + * doc/extend.texi (no_address_safety_attribute): Rename to + no_sanitize_address attribute, mention no_address_safety_analysis + attribute as deprecated alias. + +2013-02-28 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * tree-vectorizer.h (vect_get_slp_defs): Change 3rd argument + type to vec<vec<tree> > *. + * tree-vect-slp.c (vect_get_slp_defs): Likewise. Change vec_defs + to be vec<tree> instead of vec<tree> *, set vec_defs + to vNULL and call vec_defs.create (number_of_vects), adjust other + uses of vec_defs. + * tree-vect-stmts.c (vect_get_vec_defs, vectorizable_call, + vectorizable_condition): Adjust vect_get_slp_defs callers. + +2013-02-28 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.c + (aarch64_float_const_representable): Remove unused variable. + +2013-02-28 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.c (aarch64_mangle_type): Make static. + +2013-02-28 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_init_simd_builtins): Make static. + +2013-02-28 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.c + (aarch64_simd_make_constant): Make static. + +2013-02-28 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (load_assign_lhs_subreplacements): Do not put replacements + with no initialization to the RHS of debug statements. + +2013-02-28 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/56294 + * tree-sra.c (analyze_access_subtree): Create replacement declarations. + Adjust dumping. + (get_access_replacement): Do not call create_access_replacement. + Assert a replacement exists. + (get_repl_default_def_ssa_name): Create the replacement declaration + itself. + +2013-02-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm.c (arm_output_mi_thunk): Call final_start_function and + final_end_function. + +2013-02-28 Marek Polacek <polacek@redhat.com> + + PR rtl-optimization/56466 + * loop-unroll.c (unroll_and_peel_loops): Call fix_loop_structure + if we're changing a loop. + (peel_loops_completely): Likewise. + +2013-02-28 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/55813 + * doc/invoke.texi ([-Wctor-dtor-privacy]): Complete. + +2013-02-28 Georg-Johann Lay <avr@gjlay.de> + + PR target/56445 + * config/avr/avr.c (avr_init_builtins): Use 'n' instead of empty + macro parameters with: FX_FTYPE_FX, FX_FTYPE_FX_INT, INT_FTYPE_FX, + INTX_FTYPE_FX, FX_FTYPE_INTX. + * config/avr/builtins.def: Adjust respective DEF_BUILTIN. + +2013-02-28 Georg-Johann Lay <avr@gjlay.de> + + * avr/avr-mcus.def (ata5272, ata5505, attiny1634, ata6285) + (ata6286, atmega8a, atmega48pa, ata5790, ata5790n, ata5795) + (atmega164pa, atmega165pa, atmega168pa, atmega16hva, atmega16hvb) + (atmega16hvbrevb, atmega16m1, atmega16u4, atmega26hvg, atmega32a) + (atmega32a, atmega3250pa, atmega3290pa, atmega32c1, atmega32m1) + (atmega32u4, atmega32u6, atmega64a, atmega6490a, atmega6490p) + (atmega64c1, atmega64m1, atmega64rfa2, atmega64rfr2, atmega32hvb) + (atmega32hvbrevb, atmega16hva2, atmega48hvf, at90pwm161) + (atmega128a, atmega1284, atmxt112sl, atmxt224, atmxt224e) + (atmxt336s, atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4) + (atxmega32e5, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3) + (atxmega64c3, atxmega64d4, atxmega128a3u, atxmega128b1) + (atxmega128b3, atxmega128c3, atxmega128d4, atmxt540s, atmxt540sreva) + (atxmega192a3u, atxmega192c3, atxmega256a3u, atxmega256c3) + (atxmega384c3, atxmega384d3, atxmega128a4u): New AVR_MCU. + (avrxmega6): Increase max flash segments from 5 to 6. + * config/avr/t-multilib: Regenerate. + * config/avr/avr-tables.opt: Regenerate. + * doc/avr-mmcu.texi: Regenerate. + +2013-02-28 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.h (device_to_arch): Rename to device_to_ld. + (avr_device_to_arch): Rename to avr_device_to_ld. + (avr_device_to_as): New prototype. + (EXTRA_SPEC_FUNCTIONS): Add device_to_as. + (ASM_SPEC): Use device_to_as to get -mmcu= and -mno-skip-bug=. + * config/avr/driver-avr.c (avr_device_to_as): New. + (avr_device_to_arch): Rename to avr_device_to_ld. + +2013-02-27 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * tree-vect-data-refs.c (vect_permute_load_chain): Avoid using copy + method on dr_chain and result_chain. + + PR middle-end/56461 + * tree-ssa-loop-niter.c (maybe_lower_iteration_bound): Call + pointer_set_destroy on not_executed_last_iteration. + + PR middle-end/56461 + * tree-vect-loop.c (vectorizable_reduction): Release vect_defs vector. + + PR middle-end/56461 + * ipa-pure-const.c (propagate): Use FOR_EACH_FUNCTION instead of + FOR_EACH_DEFINED_FUNCTION when freeing state. + + PR middle-end/56461 + * df-scan.c (df_insn_delete): Use df_scan_free_mws_vec before + pool_free. + (df_insn_rescan_debug_internal): Use df_scan_free_mws_vec before + overwriting it. + + PR middle-end/56461 + * ipa-cp.c (decide_whether_version_node): Call vec_free on + known_aggs[i].items and release known_aggs vector. + + PR middle-end/56461 + * ipa-reference.c (propagate): Free node_info even for alias nodes. + +2013-02-27 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/microblaze.c (microblaze_emit_compare): + Use xor for EQ/NE comparisions. + * config/microblaze/microblaze.md (cstoresf4): Add constraints + (cbranchsf4): Adjust operator to comparison_operator. + +2013-02-27 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * tree-flow.h (edge_var_map_vector): Change into va_heap, vl_embed + vector. + * tree-ssa.c (redirect_edge_var_map_add): Use vec_safe_reserve and + vec_safe_push, always update *slot. + (redirect_edge_var_map_clear): Use vec_free. + (redirect_edge_var_map_dup): Use vec_safe_copy and vec_safe_reserve. + (free_var_map_entry): Use vec_free. + * tree-cfgcleanup.c (remove_forwarder_block_with_phi): Use + FOR_EACH_VEC_SAFE_ELT instead of FOR_EACH_VEC_ELT. + +2013-02-27 Andrey Belevantsev <abel@ispras.ru> + + PR middle-end/45472 + * sel-sched-ir.c (merge_expr): Also change vinsn of merged expr + when the may_trap_p bit of the exprs being merged differs. + Reorder tests for speculativeness in the logical and operator. + +2013-02-27 Jakub Jelinek <jakub@redhat.com> + + * incpath.c (add_standard_paths): Use reconcat instead of concat + where appropriate and avoid leaking memory. + + * opts.h: Include obstack.h. + (opts_concat): New prototype. + (opts_obstack): New declaration. + * opts.c (opts_concat): New function. + (opts_obstack): New variable. + (init_options_struct): Call gcc_init_obstack on opts_obstack. + (finish_options): Use opts_concat instead of concat + and XOBNEWVEC instead of XNEWVEC. + * opts-common.c (generate_canonical_option, decode_cmdline_option, + generate_option): Likewise. + * Makefile.in (OPTS_H): Depend on $(OBSTACK_H). + * lto-wrapper.c (main): Call gcc_init_obstack on opts_obstack. + + PR target/56455 + * stmt.c (expand_switch_as_decision_tree_p): If flag_pic + and ASM_OUTPUT_ADDR_DIFF_ELT isn't defined, return true. + +2013-02-26 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56461 + * lra-spills.c (lra_spill): Free spill_hard_reg at the end. + +2013-02-26 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/arm/arm.c (const_ok_for_dimode_op): Back out last change. + (arm_block_move_unaligned_straight): Likewise. + (arm_adjust_block_mem): Likewise. + +2013-02-26 Joern Rennecke <joern.rennecke@embecosm.com> + + PR target/48901 + * config/lm32/lm32.c (gen_int_relational): Remove unused variables + temp, cond and label. + * config/lm32/lm32.md (ashlsi3): Remove unused variable one. + + PR target/52500 + * config/c6x/c6x.c (dbx_register_map): Change to unsigned. + * config/c6x/c6x.h (dbx_register_map): Update declaration. + + PR target/52501 + * config/cr16/cr16-protos.h: Move end of RTX_CODE guard below end + of prologue/epilogue functions. + + PR target/52550 + * config/tilegx/tilegx.c (tilegx_expand_prologue): + Remove unused variable cfa_offset. + * config/tilepro/tilepro.c (tilepro_expand_prologue): Likewise. + + PR target/54639 + * config/mn10300/mn10300.c (mn10300_expand_epilogue): Avoid offset + type promotion to unsigned. + + PR target/54640 + * config/arm/arm.c (const_ok_for_dimode_op): Make code consistent + for HOST_WIDE_INT of 32 bit / same size as int. + (arm_block_move_unaligned_straight): Likewise. + (arm_adjust_block_mem): Likewise. + + PR target/54662 + * config/mep/t-mep (mep-pragma.o): Use ALL_COMPILERFLAGS instead of + ALL_CFLAGS. + +2013-02-26 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/56426 + * tree-ssa-loop.c (tree_ssa_loop_init): Always call scev_initialize. + +2013-02-26 Richard Biener <rguenther@suse.de> + + PR target/56444 + * config/mn10300/mn10300.c (mn10300_scan_for_setlb_lcc): Remove + unused variable loops. + +2013-02-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56448 + * fold-const.c (operand_equal_p) <case tcc_reference>: Don't look at + TREE_SIDE_EFFECTS if flags contain OEP_CONSTANT_ADDRESS_OF. + Clear OEP_CONSTANT_ADDRESS_OF from flags before recursing on second or + later operands of the references, or even first operand for + INDIRECT_REF, TARGET_MEM_REF or MEM_REF. + + PR tree-optimization/56443 + * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): For + overaligned types, pass TYPE_UNSIGNED (scalar_type) as second argument + to type_for_mode langhook. + +2013-02-25 Matt Turner <mattst88@gmail.com> + + * doc/invoke.texi: Document r4700. + +2013-02-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56175 + * tree-ssa-forwprop.c (hoist_conversion_for_bitop_p): New predicate, + split out from ... + (simplify_bitwise_binary): ... here. Also guard the conversion + of (type) X op CST to (type) (X op ((type-x) CST)) with it. + +2013-02-25 Catherine Moore <clm@codesourcery.com> + + Revert: + 2013-02-24 Catherine Moore <clm@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Nathan Sidwell <nathan@codesourcery.com> + Iain Sandoe <iain@codesourcery.com> + Nathan Froyd <froydnj@codesourcery.com> + Chao-ying Fu <fu@mips.com> + + * doc/extend.texi: (micromips, nomicromips, nocompression): + Document new function attributes. + * doc/invoke.texi (minterlink-compressed, mmicromips, + m14k, m14ke, m14kec): Document new options. + (minterlink-mips16): Update documentation. + * doc/md.texi (ZC, ZD): Document new constraints. + * configure.ac (gcc_cv_as_micromips): Check if linker + supports the .set micromips directive. + * configure: Regenerate. + * config.in: Regenerate. + * config/mips/mips-tables.opt: Regenerate. + * config/mips/micromips.md: New file. + * constraints.md (ZC, AD): New constraints. + * config/mips/predicates.md (movep_src_register): New predicate. + (movep_src_operand): New predicate. + (non_volatile_mem_operand): New predicate. + * config/mips/mips.md (multimem): New type. + (length): Differentiate between 17-bit and 18-bit branch offsets. + (MOVEP1, MOVEP2): New mode iterator. + (mov_<load>l): Use ZC constraint. + (mov_<load>r): Likewise. + (mov_<store>l): Likewise. + (mov_<store>r): Likewise. + (*branch_equality<mode>_inverted): Add microMIPS support. + (*branch_equality<mode>): Likewise. + (*jump_absolute): Likewise. + (indirect_jump_<mode>): Likewise. + (tablejump_<mode>): Likewise. + (<optab>_internal): Likewise. + (sibcall_internal): Likewise. + (sibcall_value_internal): Likewise. + (prefetch): Use constraint ZD. + * config/mips/mips.opt (minterlink-compressed): New option. + (minterlink-mips16): Now an alias for minterlink-compressed. + (mmicromips): New option. + * config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint. + (compare_and_swap_12): Likewise. + (sync_add<mode>): Likewise. + (sync_<optab>_12): Likewise. + (sync_old_<optab>_12): Likewise. + (sync_new_<optab>_12): Likewise. + (sync_nand_12): Likewise. + (sync_old_nand_12): Likewise. + (sync_new_nand_12): Likewise. + (sync_sub<mode>): Likewise. + (sync_old_add<mode>): Likewise. + (sync_old_sub<mode>): Likewise. + (sync_new_add<mode>): Likewise. + (sync_new_sub<mode>): Likewise. + (sync_<optab><mode>): Likewise. + (sync_old_<optab><mode>): Likewise. + (sync_new_<optab><mode>): Likewise. + (sync_nand<mode>): Likewise. + (sync_old_nand<mode>): Likewise. + (sync_new_nand<mode>): Likewise. + (sync_lock_test_and_set<mode>): Likewise. + (test_and_set_12): Likewise. + (atomic_compare_and_swap<mode>): Likewise. + (atomic_exchange<mode>_llsc): Likewise. + (atomic_fetch_add<mode>_llsc): Likewise. + * config/mips/mips-cpus.def (m14kc, m14k): New processors. + * config/mips/mips-protos.h (umips_output_save_restore): New prototype. + (umips_save_restore_pattern_p): Likewise. + (umips_load_store_pair_p): Likewise. + (umips_output_load_store_pair): Likewise. + (umips_movep_target_p): Likewise. + (umips_12bit_offset_address_p): Likewise. + * config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. Update all uses. + (mips_attribute_table): Add micromips, nomicromips and nocompression. + (mips_mips16_decl_p): Delete. + (mips_nomips16_decl_p): Delete. + (mips_get_compress_on_flags): New function. + (mips_get_compress_off_flags): New function. + (mips_get_compress_mode): New function. + (mips_get_compress_on_name): New function. + (mips_get_compress_off_name): New function. + (mips_insert_attributes): Support multiple compression types. + (mips_merge_decl_attributes): Likewise. + (umips_12bit_offset_address_p): New function. + (mips_start_function_definition): Emit .set micromips directive. + (mips_call_may_need_jalx_p): New function. + (mips_function_ok_for_sibcall): Add microMIPS support. + (mips_print_operand_punctuation): Support short delay slots and + compact jumps. + (umips_swm_mask, umips_swm_encoding): New. + (umips_build_save_restore): New function. + (mips_for_each_saved_gpr_and_fpr): Add microMIPS support. + (was_mips16_p): Remove. + (old_compression_mode): New. + (mips_set_compression_mode): New function. + (mips_set_current_function): Add microMIPS support. + (mips_option_override): Likewise. + (umips_save_restore_pattern_p): New function. + (umips_output_save_restore): New function. + (umips_load_store_pair_p_1): New function. + (umips_load_store_pair_p): New function. + (umips_output_load_store_pair_1): New function. + (umips_output_load_store_pair): New function. + (umips_movep_target_p) New function. + (mips_prepare_pch_save): Add microMIPS support. + * config/mips/mips.h (TARGET_COMPRESSION): New. + (TARGET_CPU_CPP_BUILTINS): Update macro + to use new compression flags and to support microMIPS. + (MIPS_ISA_LEVEL_SPEC): Add m14k processors. + (MIPS_ARCH_FLOAT_SPEC): Likewise. + (ISA_HAS_LWXS): Include TARGET_MICROMIPS. + (ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS. + (ASM_SPEC): Support mmicromips and mno-micromips. + (M16STORE_REG_P): New macro. + (MIPS_CALL): Support TARGET_MICROMIPS. + (MICROMIPS_J): New macro. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. + (UMIPS_12BIT_OFFSET_P): New macro. + * config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS. + (MULTILIB_DIRNAMES): Likewise. + +2013-02-25 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/56131 + * insn-notes.def (INSN_NOTE_BASIC_BLOCK): Update comment. + * cfgrtl.c (delete_insn): Don't reorder NOTE_INSN_DELETED_LABEL and + NOTE_INSN_BASIC_BLOCK if BLOCK_FOR_INSN == NULL. + +2013-02-25 Tobias Burnus <burnus@net-b.de> + + * doc/invoke.texi (-fsanitize=): Move from optimization + to debugging options. + +2013-02-25 Andrey Belevantsev <abel@ispras.ru> + + * sched-deps.c (sched_analyze_insn): Fix typo in comment. + +2013-02-25 Andrey Belevantsev <abel@ispras.ru> + Alexander Monakov <amonakov@ispras.ru> + + PR middle-end/56077 + * sched-deps.c (sched_analyze_insn): When reg_pending_barrier, + flush pending lists also on non-jumps. Adjust comment. + +2013-02-24 Catherine Moore <clm@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> + Tom de Vries <tom@codesourcery.com> + Nathan Sidwell <nathan@codesourcery.com> + Iain Sandoe <iain@codesourcery.com> + Nathan Froyd <froydnj@codesourcery.com> + Chao-ying Fu <fu@mips.com> + + * doc/extend.texi: (micromips, nomicromips, nocompression): + Document new function attributes. + * doc/invoke.texi (minterlink-compressed, mmicromips, + m14k, m14ke, m14kec): Document new options. + (minterlink-mips16): Update documentation. + * doc/md.texi (ZC, ZD): Document new constraints. + * configure.ac (gcc_cv_as_micromips): Check if linker + supports the .set micromips directive. + * configure: Regenerate. + * config.in: Regenerate. + * config/mips/mips-tables.opt: Regenerate. + * config/mips/micromips.md: New file. + * constraints.md (ZC, AD): New constraints. + * config/mips/predicates.md (movep_src_register): New predicate. + (movep_src_operand): New predicate. + (non_volatile_mem_operand): New predicate. + * config/mips/mips.md (multimem): New type. + (length): Differentiate between 17-bit and 18-bit branch offsets. + (MOVEP1, MOVEP2): New mode iterator. + (mov_<load>l): Use ZC constraint. + (mov_<load>r): Likewise. + (mov_<store>l): Likewise. + (mov_<store>r): Likewise. + (*branch_equality<mode>_inverted): Add microMIPS support. + (*branch_equality<mode>): Likewise. + (*jump_absolute): Likewise. + (indirect_jump_<mode>): Likewise. + (tablejump_<mode>): Likewise. + (<optab>_internal): Likewise. + (sibcall_internal): Likewise. + (sibcall_value_internal): Likewise. + (prefetch): Use constraint ZD. + * config/mips/mips.opt (minterlink-compressed): New option. + (minterlink-mips16): Now an alias for minterlink-compressed. + (mmicromips): New option. + * config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint. + (compare_and_swap_12): Likewise. + (sync_add<mode>): Likewise. + (sync_<optab>_12): Likewise. + (sync_old_<optab>_12): Likewise. + (sync_new_<optab>_12): Likewise. + (sync_nand_12): Likewise. + (sync_old_nand_12): Likewise. + (sync_new_nand_12): Likewise. + (sync_sub<mode>): Likewise. + (sync_old_add<mode>): Likewise. + (sync_old_sub<mode>): Likewise. + (sync_new_add<mode>): Likewise. + (sync_new_sub<mode>): Likewise. + (sync_<optab><mode>): Likewise. + (sync_old_<optab><mode>): Likewise. + (sync_new_<optab><mode>): Likewise. + (sync_nand<mode>): Likewise. + (sync_old_nand<mode>): Likewise. + (sync_new_nand<mode>): Likewise. + (sync_lock_test_and_set<mode>): Likewise. + (test_and_set_12): Likewise. + (atomic_compare_and_swap<mode>): Likewise. + (atomic_exchange<mode>_llsc): Likewise. + (atomic_fetch_add<mode>_llsc): Likewise. + * config/mips/mips-cpus.def (m14kc, m14k): New processors. + * config/mips/mips-protos.h (umips_output_save_restore): New prototype. + (umips_save_restore_pattern_p): Likewise. + (umips_load_store_pair_p): Likewise. + (umips_output_load_store_pair): Likewise. + (umips_movep_target_p): Likewise. + (umips_12bit_offset_address_p): Likewise. + * config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. Update all uses. + (mips_attribute_table): Add micromips, nomicromips and nocompression. + (mips_mips16_decl_p): Delete. + (mips_nomips16_decl_p): Delete. + (mips_get_compress_on_flags): New function. + (mips_get_compress_off_flags): New function. + (mips_get_compress_mode): New function. + (mips_get_compress_on_name): New function. + (mips_get_compress_off_name): New function. + (mips_insert_attributes): Support multiple compression types. + (mips_merge_decl_attributes): Likewise. + (umips_12bit_offset_address_p): New function. + (mips_start_function_definition): Emit .set micromips directive. + (mips_call_may_need_jalx_p): New function. + (mips_function_ok_for_sibcall): Add microMIPS support. + (mips_print_operand_punctuation): Support short delay slots and + compact jumps. + (umips_swm_mask, umips_swm_encoding): New. + (umips_build_save_restore): New function. + (mips_for_each_saved_gpr_and_fpr): Add microMIPS support. + (was_mips16_p): Remove. + (old_compression_mode): New. + (mips_set_compression_mode): New function. + (mips_set_current_function): Add microMIPS support. + (mips_option_override): Likewise. + (umips_save_restore_pattern_p): New function. + (umips_output_save_restore): New function. + (umips_load_store_pair_p_1): New function. + (umips_load_store_pair_p): New function. + (umips_output_load_store_pair_1): New function. + (umips_output_load_store_pair): New function. + (umips_movep_target_p) New function. + (mips_prepare_pch_save): Add microMIPS support. + * config/mips/mips.h (TARGET_COMPRESSION): New. + (TARGET_CPU_CPP_BUILTINS): Update macro + to use new compression flags and to support microMIPS. + (MIPS_ISA_LEVEL_SPEC): Add m14k processors. + (MIPS_ARCH_FLOAT_SPEC): Likewise. + (ISA_HAS_LWXS): Include TARGET_MICROMIPS. + (ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS. + (ASM_SPEC): Support mmicromips and mno-micromips. + (M16STORE_REG_P): New macro. + (MIPS_CALL): Support TARGET_MICROMIPS. + (MICROMIPS_J): New macro. + (mips_base_mips16): Rename this... + (mips_base_compression_flags): ...to this. + (UMIPS_12BIT_OFFSET_P): New macro. + * config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS. + (MULTILIB_DIRNAMES): Likewise. + +2013-02-24 Jakub Jelinek <jakub@redhat.com> + + PR target/52555 + * target-globals.c (save_target_globals): For init_reg_sets and + target_reinit remporarily set this_fn_optabs to this_target_optabs. + +2013-02-22 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Add copyright header. + * config/aarch64/t-aarch64 + (aarch64-builtins.o): Depend on aarch64-simd-builtins.def. + +2013-02-22 Vladimir Makarov <vmakarov@redhat.com> + + PR inline-asm/56148 + * lra-constraints.c (process_alt_operands): Reload operand + conflicting with earlier clobber only if no more other conflicting + operands. + +2013-02-22 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/56393 + * config/gnu-user.h (LIBASAN_EARLY_SPEC): Link in libasan_preinit.o + if not linking a shared library. + +2013-02-22 Seth LaForge <sethml@google.com> + + * config.gcc (arm*-*-eabi*): Treat arm*eb as big-endian. + +2013-02-22 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (split for extendsidi): Update condition. + (zero_extend<mode>di2,extend<mode>di2): Add an alternative. + * config/arm/iterators.md (qhs_extenddi_cstr): Likewise. + (qhs_zextenddi_cstr): Likewise. + +2013-02-21 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56420 + * expmed.c (EXACT_POWER_OF_2_OR_ZERO_P): Do subtraction in uhwi, to + avoid signed wrapping. + (expand_mult): Handle properly multiplication by + ((dword_type) -1) << (BITS_PER_WORD - 1). Improve multiplication by + ((dword_type) 1) << (BITS_PER_WORD - 1). Avoid undefined behavior + in the compiler if coeff is HOST_WIDE_INT_MIN. + (expand_divmod): Don't make ext_op1 static, change it's type to + uhwi. Avoid undefined behavior in -INTVAL (op1). + + PR rtl-optimization/50339 + * lower-subreg.h (struct lower_subreg_choices): Add splitting_ashiftrt + field. + * lower-subreg.c (compute_splitting_shift): Handle ASHIFTRT. + (compute_costs): Call compute_splitting_shift also for ASHIFTRT + into splitting_ashiftrt field. + (find_decomposable_shift_zext, resolve_shift_zext): Handle also + ASHIFTRT. + (dump_choices): Fix up printing LSHIFTRT choices, print ASHIFTRT + choices. + +2013-02-20 Aldy Hernandez <aldyh@redhat.com> + + PR middle-end/56108 + * trans-mem.c (execute_tm_mark): Do not expand transactions that + are sure to go irrevocable. + +2013-02-21 Hans-Peter Nilsson <hp@axis.com> + + * doc/rtl.texi (vec_concat, vec_duplicate): Mention that + scalars are valid operands. + +2013-02-21 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/56310 + * ipa-cp.c (agg_replacements_to_vector): New parameter index, copy + only matching indices and non-negative final offsets. + (intersect_aggregates_with_edge): Pass src_idx to + agg_replacements_to_vector. Pass src_idx insstead of index to + intersect_with_agg_replacements. + +2013-02-21 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (good_cloning_opportunity_p): Dump the real threshold + instead of hard-wired defaults. + +2013-02-21 Maciej W. Rozycki <macro@codesourcery.com> + + * doc/invoke.texi (MIPS Options): Update documentation of the + floating-point multiply-accumulate instruction restrictions. + +2013-02-21 Kostya Serebryany <kcc@google.com> + + * config/i386/i386.c (ix86_asan_shadow_offset): Use 0x7fff8000 as + asan_shadow_offset on x86_64 linux. + +2013-02-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56415 + Revert + 2013-02-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56273 + * tree-vrp.c (simplify_cond_using_ranges): Disable for the + first VRP run. + +2013-02-21 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/56258 + * doc/invoke.texi (-fdump-rtl-pro_and_epilogue): Use @item + instead of @itemx. + + PR inline-asm/56405 + * expr.c (expand_expr_real_1) <case TARGET_MEM_REF, MEM_REF>: Don't + use movmisalign or extract_bit_field for EXPAND_MEMORY modifier. + +2013-02-20 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/56265 + * ipa-prop.c (ipa_make_edge_direct_to_target): Fixup callgraph + when target is referenced for first time. + +2013-02-20 Richard Biener <rguenther@suse.de> + + * tree-call-cdce.c (tree_call_cdce): Do not remove unused locals. + * tree-ssa-forwprop.c (ssa_forward_propagate_and_combine): Likewise. + * tree-ssa-dce.c (perform_tree_ssa_dce): Likewise. + * tree-ssa-copyrename.c (copy_rename_partition_coalesce): Do + not return anything. + (rename_ssa_copies): Do not remove unused locals. + * tree-ssa-ccp.c (do_ssa_ccp): Likewise. + * tree-ssanames.c (pass_release_ssa_names): Remove unused locals first. + * passes.c (execute_function_todo): Do not schedule unused locals + removal if cleanup_tree_cfg did something. + * tree-ssa-live.c (remove_unused_locals): Dump statistics + about the number of removed locals. + +2013-02-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56398 + * tree-vect-loop-manip.c (adjust_debug_stmts): Skip SSA default defs. + +2013-02-20 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/55334 + * ipa-cp.c (initialize_node_lattices): Disable IPA-CP through and to + restricted pointers to arrays. + +2013-02-20 Richard Biener <rguenther@suse.de> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56396 + * tree-ssa-ccp.c (n_const_val): New static variable. + (get_value): Return NULL for SSA names we don't have a lattice + entry for. + (ccp_initialize): Initialize n_const_val. + * tree-ssa-copy.c (n_copy_of): New static variable. + (init_copy_prop): Initialize n_copy_of. + (get_value): Return NULL_TREE for SSA names we don't have a + lattice entry for. + +2013-02-20 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (initialize_node_lattices): Fix dumping condition. + +2013-02-20 Richard Biener <rguenther@suse.de> + + * genpreds.c (write_lookup_constraint): Do not compare first + letter of the constraint again. + +2013-02-20 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-ivopts.c (alloc_use_cost_map): Use bitmap_count_bits + and ceil_log2. + (get_use_iv_cost): Terminate hashtable walk when coming across + an empty entry. + +2013-02-20 Igor Zamyatin <igor.zamyatin@intel.com> + + * config/i386/i386.c (initial_ix86_tune_features): Turn on fp + reassociation for avx2 targets. + +2012-02-19 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/microblaze.c: microblaze_has_clz = 0 + Add version check for v8.10.a to enable microblaze_has_clz + * config/microblaze/microblaze.h: Add TARGET_HAS_CLZ as combined + version and TARGET_PATTERN_COMPARE check + * config/microblaze/microblaze.md: New clzsi2 instruction + +2012-02-19 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/microblaze.md (call_value_intern): Check symbol is + function before branching. + +2012-02-19 Andrey Belevantsev <abel@ispras.ru> + + * sel-sched-dump.c (dump_insn_rtx_flags): Explicitly set + DUMP_INSN_RTX_UID. + (dump_insn_rtx_1): Pass PATTERN (insn) to str_pattern_slim. + +2012-02-19 Andrey Belevantsev <abel@ispras.ru> + + PR middle-end/55889 + * sel-sched.c: Include ira.h. + (implicit_clobber_conflict_p): New function. + (moveup_expr): Use it. + * Makefile.in (sel-sched.o): Depend on ira.h. + +2013-02-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56384 + * tree-ssa-sccvn.h (struct vn_phi_s): Add type member. + (vn_hash_type): Split out from ... + (vn_hash_constant_with_type): ... here. + * tree-ssa-sccvn.c (vn_phi_compute_hash): Use vn_hash_type. + (vn_phi_eq): Compare types from vn_phi_s structure. + (vn_phi_lookup): Populate vn_phi_s type. + (vn_phi_insert): Likewise. + +2013-02-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56350 + * tree-vect-loop.c (vectorizable_reduction): If orig_stmt, return false + if haven't found reduction or nested cycle operand, rather than + asserting we must find it. + + PR tree-optimization/56381 + * tree-ssa-pre.c (create_expression_by_pieces): Fix up last argument + to fold_build3. + +2013-02-18 Aldy Hernandez <aldyh@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + PR target/52555 + * genopinit.c (raw_optab_handler): Use this_fn_optabs. + (swap_optab_enable): Same. + (init_all_optabs): Use argument instead of global. + * tree.h (struct tree_optimization_option): New field target_optabs. + * expr.h (init_all_optabs): Add argument to prototype. + (TREE_OPTIMIZATION_OPTABS): New. + (save_optabs_if_changed): Protoize. + * optabs.h: Declare this_fn_optabs. + * optabs.c (save_optabs_if_changed): New. + Declare this_fn_optabs. + (init_optabs): Add argument to init_all_optabs() call. + * function.c (invoke_set_current_function_hook): Handle per + function optabs. + * function.h (struct function): New field optabs. + * config/mips/mips.c (mips_set_mips16_mode): Handle when + optimization_current_node has changed. + * target-globals.h (save_target_globals_default_opts): Protoize. + * target-globals.c (save_target_globals_default_opts): New. + +2013-02-18 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/56347 + * config/pa/pa.c (pa_conditional_register_usage): On HP-UX, mark + registers %fr12 and %fr12R as call used. + + PR target/56214 + * config/pa/predicates.md (base14_operand): Except for BLKmode, QImode + and HImode, require all displacements to be an integer multiple of + their mode size. + * config/pa/pa.c (pa_legitimate_address_p): For REG+BASE addresses, + only allow QImode and HImode when reload is in progress and strict is + true. Likewise for symbolic addresses. Use base14_operand to check + displacements in REG+BASE addresses. + +2013-02-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56366 + * tree-vect-loop.c (get_initial_def_for_induction): Properly + handle sign-conversion of outer-loop initial induction value. + +2013-02-18 Richard Biener <rguenther@suse.de> + + PR middle-end/56349 + * cfghooks.c (merge_blocks): If we merge a latch into another + block adjust references to it. + * cfgloop.c (flow_loops_find): Reset latch before recomputing it. + (verify_loop_structure): Verify that a recorded latch is in fact + a latch. + +2013-02-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56321 + * tree-ssa-reassoc.c (propagate_op_to_single_use): Properly + order SSA name release and virtual operand unlinking. + +2013-02-17 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/microblaze.md (save_stack_block): Define. + (restore_stack_block): Likewise. + +2013-02-16 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/linux.h (TARGET_SUPPORTS_PIC): Define as 1. + * config/microblaze/microblaze.h (TARGET_SUPPORTS_PIC): Define as 1. + * config/microblaze/microblaze.c (microblaze_option_override): + Bail out early for PIC modes when target does not support PIC. + +2013-02-16 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/microblaze.c (microblaze_asm_trampoline_template): + Replace with a microblaze version. + (microblaze_trampoline_init): Adapt for microblaze. + * config/microblaze/microblaze.h (TRAMPOLINE_SIZE): Adapt for + microblaze. + +2013-02-16 Jakub Jelinek <jakub@redhat.com> + Dodji Seketeli <dodji@redhat.com> + + PR asan/56330 + * asan.c (get_mem_refs_of_builtin_call): White space and style cleanup. + (instrument_mem_region_access): Do not forget to always put + instrumentation of the of 'base' and 'base + len' in a "if (len != + 0) statement, even for cases where either 'base' or 'base + len' + are not instrumented -- because they have been previously + instrumented. Simplify the logic by putting all the statements + instrument 'base + len' inside a sequence, and then insert that + sequence right before the current insertion point. Then, to + instrument 'base + len', just get an iterator on that statement. + And do not forget to update the pointer to iterator the function + received as argument. + +2013-02-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56348 + * lra-assigns.c (reload_pseudo_compare_func): Prefer bigger pseudos. + +2013-02-15 Steven Bosscher <steven@gcc.gnu.org> + + * graph.c (start_graph_dump): Print dumpfile base as digraph label. + (clean_graph_dump_file): Pass base to start_graph_dump. + +2013-02-14 Richard Henderson <rth@redhat.com> + + PR target/55941 + * lower-subreg.c (simple_move): Check dest mode instead of src mode. + +2013-02-14 Steven Bosscher <steven@gcc.gnu.org> + + * collect2-aix.h: Define F_LOADONLY. + +2013-02-14 Richard Biener <rguenther@suse.de> + + PR lto/50494 + * varasm.c (output_constant_def_1): Get the decl representing + the constant as argument. + (output_constant_def): Wrap output_constant_def_1. + (make_decl_rtl): Use output_constant_def_1 with the decl + representing the constant. + (build_constant_desc): Optionally re-use a decl already + representing the constant. + (tree_output_constant_def): Adjust. + +2013-02-14 Dodji Seketeli <dodji@redhat.com> + + Fix an asan crash + * asan.c (instrument_builtin_call): Really put the length of the + second source argument into src1_len. + +2013-02-13 Jakub Jelinek <jakub@redhat.com> + + * asan.c (create_cond_insert_point): Add create_then_fallthru_edge + argument. If it is false, don't create edge from then_bb to + fallthru_bb. + (insert_if_then_before_iter): Pass true to it. + (build_check_stmt): Pass false to it. + (transform_statements): Flush hash table only on extended basic + block boundaries, rather than at the beginning of every bb. + Don't flush hash table on nonfreeing_call_p calls. + * tree-flow.h (nonfreeing_call_p): New prototype. + * tree-ssa-phiopt.c (nonfreeing_call_p): No longer static. + +2013-02-13 David S. Miller <davem@davemloft.net> + + * expmed.c (expand_shift_1): Only strip scalar integer subregs. + +2013-02-13 Vladimir Makarov <vmakarov@redhat.com> + + PR target/56184 + * ira.c (max_regno_before_ira): Move from ... + (ira): ... here. + (fix_reg_equiv_init): Use max_regno_before_ira instead of + vec_safe_length. + +2013-02-13 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.c (ix86_asan_shadow_offset): Revert last change. + +2013-02-13 Richard Biener <rguenther@suse.de> + + PR lto/56295 + * gimple-streamer-out.c (output_gimple_stmt): Undo wrapping + globals in MEM_REFs. + +2013-02-13 Richard Biener <rguenther@suse.de> + + * loop-init.c (loop_optimizer_init): Clear loop state when + re-initializing preserved loops. + * loop-unswitch.c (unswitch_single_loop): Return whether + we unswitched the loop. Do not verify loop state here. + (unswitch_loops): When we unswitched a loop discover new loops. + +2013-02-13 Kostya Serebryany <kcc@google.com> + + * config/i386/i386.c: Use 0x7fff8000 as asan_shadow_offset + on x86_64 linux. + * sanitizer.def: Rename __asan_init to __asan_init_v1. + +2013-02-12 Dodji Seketeli <dodji@redhat.com> + + Avoid instrumenting duplicated memory access in the same basic block + * Makefile.in (asan.o): Add new dependency on hash-table.h + * asan.c (struct asan_mem_ref, struct mem_ref_hasher): New types. + (asan_mem_ref_init, asan_mem_ref_get_end, get_mem_ref_hash_table) + (has_stmt_been_instrumented_p, empty_mem_ref_hash_table) + (free_mem_ref_resources, has_mem_ref_been_instrumented) + (has_stmt_been_instrumented_p, update_mem_ref_hash_table) + (get_mem_ref_of_assignment): New functions. + (get_mem_refs_of_builtin_call): Extract from + instrument_builtin_call and tweak a little bit to make it fit with + the new signature. + (instrument_builtin_call): Use the new + get_mem_refs_of_builtin_call. Use gimple_call_builtin_p instead + of is_gimple_builtin_call. + (instrument_derefs, instrument_mem_region_access): Insert the + instrumented memory reference into the hash table. + (maybe_instrument_assignment): Renamed instrument_assignment into + this, and change it to advance the iterator when instrumentation + actually happened and return true in that case. This makes it + homogeneous with maybe_instrument_assignment, and thus give a + chance to callers to be more 'regular'. + (transform_statements): Clear the memory reference hash table + whenever we enter a new BB, when we cross a function call, or when + we are done transforming statements. Use + maybe_instrument_assignment instead of instrumentation. No more + need to special case maybe_instrument_assignment and advance the + iterator after calling it; it's now handled just like + maybe_instrument_call. Update comment. + +2013-02-13 Richard Biener <rguenther@suse.de> + + * config/mn10300/mn10300.c (mn10300_scan_for_setlb_lcc): + Fix loop discovery code. + +2013-02-12 Vladimir Makarov <vmakarov@redhat.com> + + PR inline-asm/56148 + * lra-constraints.c (process_alt_operands): Match early clobber + operand with itself. Check conflicts with earlyclobber only if + the operand is not reloaded. Prefer to reload conflicting operand + if earlyclobber and matching operands are the same. + +2013-02-12 Richard Biener <rguenther@suse.de> + + PR lto/56297 + * lto-streamer-out.c (write_symbol): Do not output symbols + for hard register variables. + +2013-02-12 Georg-Johann Lay <avr@gjlay.de> + + PR target/54222 + * config/avr/avr-dimode.md (umulsidi3, mulsidi3): New expanders. + (umulsidi3_insn, mulsidi3_insn): New insns. + +2013-02-12 Christophe Lyon <christophe.lyon@linaro.org> + + * config/arm/arm-protos.h (struct cpu_vec_costs): New struct type. + (struct tune_params): Add vec_costs field. + * config/arm/arm.c (arm_builtin_vectorization_cost) + (arm_add_stmt_cost): New functions. + (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST) + (TARGET_VECTORIZE_ADD_STMT_COST): Define. + (arm_default_vec_cost): New struct of type cpu_vec_costs. + (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune) + (arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune) + (arm_cortex_a15_tune, arm_cortex_a5_tune, arm_cortex_a9_tune) + (arm_v6m_tune, arm_fa726te_tune): Define new vec_costs field. + +2013-02-12 Richard Biener <rguenther@suse.de> + + PR lto/56295 + * gimple-streamer-in.c (input_gimple_stmt): Strip MEM_REFs off + decls again if possible. + +2013-02-12 Richard Biener <rguenther@suse.de> + + PR middle-end/56288 + * tree-ssa.c (verify_ssa_name): Fix check, move + SSA_NAME_IN_FREE_LIST check up. + +2013-02-12 Jakub Jelinek <jakub@redhat.com> + Steven Bosscher <steven@gcc.gnu.org> + + PR rtl-optimization/56151 + * optabs.c (add_equal_note): Don't return 0 if target is a MEM, + equal to op0 or op1, and last_insn pattern is CODE operation + with MEM dest and one of the operands matches that MEM. + +2013-02-11 Sriraman Tallam <tmsriram@google.com> + + * doc/extend.texi: Document Function Multiversioning and "default" + parameter string to target attribute. + * config/i386/i386.c (get_builtin_code_for_version): Return 0 if + target attribute parameter is "default". + (ix86_compare_version_priority): Remove checks for target attribute. + (ix86_mangle_function_version_assembler_name): Change error to sorry. + Remove check for target attribute equal to NULL. Add assert. + (ix86_generate_version_dispatcher_body): Change error to sorry. + +2013-02-11 Iain Sandoe <iain@codesourcery.com> + Jack Howarth <howarth@bromo.med.uc.edu> + Patrick Marlier <patrick.marlier@gmail.com> + + PR libitm/55693 + * config/darwin.h: Replace ENDFILE_SPEC with TM_DESTRUCTOR and + define ENDFILE_SPEC as TM_DESTRUCTOR. + * config/i386/darwin.h (ENDFILE_SPEC): Use TM_DESTRUCTOR. + +2013-02-11 Alexander Potapenko <glider@google.com> + Jack Howarth <howarth@bromo.med.uc.edu> + Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/55617 + * config/darwin.c (cdtor_record): Rename ctor_record. + (sort_cdtor_records): Rename sort_ctor_records. + (finalize_dtors): New routine to sort destructors by + priority before use in assemble_integer. + (machopic_asm_out_destructor): Use finalize_dtors if needed. + +2013-02-11 Uros Bizjak <ubizjak@gmail.com> + + PR rtl-optimization/56275 + * simplify-rtx.c (avoid_constant_pool_reference): Check that + offset is non-negative and less than cmode size before + calling simplify_subreg. + +2013-02-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56264 + * cfgloop.h (fix_loop_structure): Adjust prototype. + * loop-init.c (fix_loop_structure): Return the number of + newly discovered loops. + * tree-cfgcleanup.c (repair_loop_structures): When new loops + are discovered, do a full loop-closed SSA rewrite. + +2013-02-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56273 + * tree-vrp.c (simplify_cond_using_ranges): Disable for the + first VRP run. + (check_array_ref): Fix missing newline in dumps. + (search_for_addr_array): Likewise. + +2013-02-09 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/aix61.h (OS_MISSING_ALTIVEC): Undefine. + +2013-02-09 Jakub Jelinek <jakub@redhat.com> + + PR target/56256 + * config/rs6000/rs6000.h (ASSEMBLER_DIALECT): Define. + +2013-02-08 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56246 + * lra-constraints.c (simplify_operand_subreg): Try to reuse + reload pseudo. + * lra.c (lra): Clear lra_optional_reload_pseudos only when all + constraints are satisfied. + +2013-02-08 Jeff Law <law@redhat.com> + + PR debug/53948 + * emit-rtl.c (reg_is_parm_p): New function. + * regs.h (reg_is_parm_p): New prototype. + * ira-conflicts.c (ira_build_conflicts): Allow parameters in + callee-clobbered registers. + +2013-02-08 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/56043 + * config/rs6000/rs6000.c (rs6000_builtin_vectorized_libmass): + If there is no implicit builtin declaration, just return NULL. + +2013-02-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (FMAMODEM): New mode iterator. + (fma<mode>4, fms<mode>4, fnma<mode>4, fnms<mode>4): Use FMAMODEM + mode iterator. Do not use TARGET_SSE_MATH in insn constraint. + +2013-02-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/gnu-user.h (TARGET_CAN_SPLIT_STACK): Define only + when HAVE_GAS_CFI_PERSONALITY_DIRECTIVE is set. + * config/i386/gnu-user64.h (TARGET_CAN_SPLIT_STACK): Ditto. + +2013-02-08 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config.gcc (microblaze*-linux*): Add TARGET_BIG_ENDIAN_DEFAULT. + (microblaze*-*-elf): Likewise. + * config/microblaze/linux.h: Add -mbig-endian / -mlittle-endian to + LINK_SPEC. + * config/microblaze/microblaze-c.c: Add builtin defines for + _LITTLE_ENDIAN and _BIG_ENDIAN. + * config/microblaze/microblaze.h: Add TARGET_ENDIAN_DEFAULT and + add to TARGET_DEFAULT flags. + Expand ASM_SPEC and LINK_SPEC. + Update BYTES_BIG_ENDIAN and WORDS_BIG_ENDIAN. + * config/microblaze/microblaze.md: Update extendsidi2 and + movdi_internal instructions to use low-order / high-order reg + print_operands. + * config/microblaze/microblaze.opt: Add mbig-endian and mlittle-endian + options and inversemask / mask of LITTLE_ENDIAN. + * config/microblaze/t-microblaze: Expand multilib options to + include mlittle-endian (le) and update exceptions patterns. + +2013-02-08 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/56195 + * lra-constraints.c (get_reload_reg): Don't reuse regs + if they have smaller mode than requested, if they have + wider mode than requested, try to return a SUBREG. + + PR tree-optimization/56250 + * fold-const.c (extract_muldiv_1) <case NEGATE_EXPR>: Don't optimize + if type is unsigned and code isn't MULT_EXPR. + +2013-02-08 Georg-Johann Lay <avr@gjlay.de> + + PR tree-optimization/56064 + * fixed-value.c (fixed_from_double_int): Sign/zero extend payload + bits according to mode. + * fixed-value.h (fixed_from_double_int) + (const_fixed_from_double_int): Adjust comments. + +2013-02-08 Richard Biener <rguenther@suse.de> + + PR lto/56231 + * lto-streamer.h (struct data_in): Remove current_file, current_line + and current_col members. + * lto-streamer-out.c (lto_output_location): Stream changed bits + en-block for efficiency. + * lto-streamer-in.c (clear_line_info): Remove. + (lto_input_location): Cache current file, line and column + globally via local statics. Read changed bits en-block. + (input_function): Do not call clear_line_info. + (lto_read_body): Likewise. + (lto_input_toplevel_asms): Likewise. + +2013-02-08 Michael Matz <matz@suse.de> + + PR tree-optimization/52448 + * tree-ssa-phiopt.c (struct name_to_bb): Add phase member. + (nt_call_phase): New static. + (add_or_mark_expr): Only mark accesses with newer phase than any + call seen. + (nonfreeing_call_p): New. + (nt_init_block): Update nt_call_phase, mark blocks as visited. + (nt_fini_block): Keep blocks marked as visited. + (get_non_trapping): Initialize nt_call_phase, and reset aux pointer. + +2013-02-08 Richard Biener <rguenther@suse.de> + + * ira.c (ira): Free broken dominator information. + +2013-02-08 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_spill_class): Use INTEGER_CLASS_P macro. + +2013-02-08 Marek Polacek <polacek@redhat.com> + + * cfgloop.c (verify_loop_structure): Add more checking of headers. + +2013-02-08 Richard Biener <rguenther@suse.de> + + PR middle-end/56181 + * cfgloop.h (flow_loops_find): Adjust. + (bb_loop_header_p): Declare. + * cfgloop.c (bb_loop_header_p): New function split out from ... + (flow_loops_find): ... here. Adjust function signature, + support incremental loop structure update. + (verify_loop_structure): Cleanup. Verify a loop is a loop. + * cfgloopmanip.c (fix_loop_structure): Move ... + * loop-init.c (fix_loop_structure): ... here. + (apply_loop_flags): Split out from ... + (loop_optimizer_init): ... here. + (fix_loop_structure): Use apply_loop_flags. Use flow_loops_find + in incremental mode, only remove dead loops here. + +2013-02-08 Georg-Johann Lay <avr@gjlay.de> + + PR target/54222 + * config/avr/avr.md (unspec) <UNSPEC_ROUND>: Add. + * config/avr/avr-fixed.md (ALL4QA, ALL124QA): New mode iterators. + (round<mode>3, round<mode>3_const): New expanders for fixed-mode. + (*round<mode>3.libgcc): New insns for fixed-modes. + * config/avr/builtins.def (ABSxx): Use a non-NULL LIBNAME. + (ROUNDxx, COUNTLSxx, BITSxx, xxBITS): New DEF_BUILTINs. + (ROUNDFX, COUNTLSFX, ABSFX): New DEF_BUILTINs. + * config/avr/stdfix.h (absFX, bitsFX, FXbits): Remove inline + implementations. Define to __builtin_avr_absFX, + __builtin_avr_bitsFX, __builtin_avr_FXbits, respectively. + (roundFX, countlsFX): Define to __builtin_avr_roundFX, + __builtin_avr_countlsFX, respectively. + * config/avr/avr-c.c (target.h): Include it. + (enum avr_builtin_id): New enum. + (avr_resolve_overloaded_builtin): New static function. + (avr_register_target_pragmas): Use it to set + targetm.resolve_overloaded_builtin. + * config/avr/avr.c (avr_init_builtins): Supply myriads of local + tree nodes used by DEF_BUILTIN. + (avr_expand_builtin) <AVR_BUILTIN_ROUNDxx>: Sanity-check them. + (avr_fold_builtin) <AVR_BUILTIN_BITSxx>: Fold to VIEW_COVERT_EXPR. + <AVR_BUILTIN_xxBITS>: Same. + +2013-02-08 Richard Biener <rguenther@suse.de> + + * cfgloop.c (verify_loop_structure): Properly handle + a loop exiting to another loop header. + * ira-int.h (ira_loops): Remove. + * ira.c (ira_loops): Remove. + (ira): Use loop_optimizer_init and loop_optimizer_finalize. + (do_reload): Use loop_optimizer_finalize. + * ira-build.c (create_loop_tree_nodes): Use get_loops and + number_of_loops to access the loop tree. + (more_one_region_p): Likewise. + (finish_loop_tree_nodes): Likewise. + (rebuild_regno_allocno_maps): Likewise. + (mark_loops_for_removal): Likewise. + (mark_all_loops_for_removal): Likewise. + (remove_unnecessary_regions): Likewise. + (ira_build): Likewise. + * ira-emit.c (setup_entered_from_non_parent_p): Likewise. + +2013-02-08 Richard Biener <rguenther@suse.de> + + * Makefile.in (tree-tailcall.o): Add $(CFGLOOP_H) dependency. + * ipa-pure-const.c (analyze_function): Avoid calling + mark_irreducible_loops twice. + * tree-tailcall.c (tree_optimize_tail_calls_1): Mark loops for fixup. + +2013-02-07 David S. Miller <davem@davemloft.net> + + * dwarf2out.c (based_loc_descr): Perform leaf register remapping + on 'reg'. + * var-tracking.c (vt_add_function_parameter): Test the presence of + HAVE_window_save properly and do not remap argument registers when + we have a leaf function. + +2013-02-07 Uros Bizjak <ubizjak@gmail.com> + + PR bootstrap/56227 + * ggc-page.c (ggc_print_statistics): Use HOST_LONG_LONG_FORMAT + instead of "ll". + * config/i386/i386.c (ix86_print_operand): Ditto. + +2013-02-07 Vladimir Makarov <vmakarov@redhat.com> + + * lra-constraints.c (process_alt_operands): Fix recently added comment. + +2013-02-07 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56225 + * lra-constraints.c (process_alt_operands): Check that reload hard + reg can hold value for strict_low_part. + +2013-02-07 Jakub Jelinek <jakub@redhat.com> + + PR debug/56154 + * dwarf2out.c (dwarf2_debug_hooks): Set end_function hook to + dwarf2out_end_function. + (in_first_function_p, maybe_at_text_label_p, + first_loclabel_num_not_at_text_label): New variables. + (dwarf2out_var_location): In the first function find out + lowest loclabel_num N where .LVLN is known not to be equal to .Ltext0. + (find_empty_loc_ranges_at_text_label, dwarf2out_end_function): New + functions. + +2013-02-07 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/56178 + * cse.c (cse_insn): Do not create a REG_EQUAL note if the source is a + SUBREG of a register. Tidy up related block of code. + * fwprop.c (forward_propagate_and_simplify): Do not create a REG_EQUAL + note if the source is a register or a SUBREG of a register. + +2013-02-07 Jakub Jelinek <jakub@redhat.com> + + PR target/56228 + * config/rs6000/rs6000.md (ptrm): New mode attr. + (call_indirect_aix<ptrsize>, call_indirect_aix<ptrsize>_nor11, + call_value_indirect_aix<pttrsize>, + call_value_indirect_aix<pttrsize>_nor11): Use <ptrm> instead of + m in constraints. + +2013-02-07 Michael Haubenwallner <michael.haubenwallner@salomon.at> + + * collect2.c (main): Set aix64_flag for -G and -bsvr4 too, disable + if -bnortl. Convert to strcmp and strncmp. + +2013-02-07 Alan Modra <amodra@gmail.com> + + PR target/54009 + * config/rs6000/rs6000.c (mem_operand_gpr): Check that LO_SUM + addresses won't wrap when offsetting. + (rs6000_secondary_reload): Provide secondary reloads needed for + wrapping LO_SUM addresses. + +2013-02-06 Thomas Schwinge <thomas@codesourcery.com> + + * config/gnu.h (GNU_USER_TARGET_OS_CPP_BUILTINS): Never define + MACH, just __MACH__. + +2013-02-06 Richard Biener <rguenther@suse.de> + + * tracer.c (tracer): Mark loops with LOOPS_NEED_FIXUP + instead of calling fix_loop_structure. + +2013-02-06 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56217 + * omp-low.c (use_pointer_for_field): Return false if + lower_send_shared_vars doesn't generate any copy-out code. + +2013-02-06 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/56131 + * cfgrtl.c (delete_insn): Use NOTE_BASIC_BLOCK instead of BLOCK_FOR_INSN + to get the bb of a NOTE_INSN_BASIC_BLOCK. Handle the case that the bb + of the label is NULL. Add comment. + +2013-02-05 Jakub Jelinek <jakub@redhat.com> + + * tree.h (struct tree_decl_with_vis): Remove thread_local field. + + PR sanitizer/55374 + * config/gnu-user.h (LIBTSAN_EARLY_SPEC): Define. + (STATIC_LIBTSAN_LIBS): Likewise. + * gcc.c (ADD_STATIC_LIBTSAN_LIBS, LIBTSAN_EARLY_SPEC): Define. + (LIBTSAN_SPEC): Add ADD_STATIC_LIBTSAN_LIBS, if LIBTSAN_EARLY_SPEC + is defined, don't add anything else beyond that. + (SANITIZER_EARLY_SPEC, SANITIZER_SPEC): Define. + (LINK_COMMAND_SPEC): Use them. + + PR tree-optimization/56205 + * tree-stdarg.c (check_all_va_list_escapes): Return true if + there are any PHI nodes that set non-va_list_escape_vars SSA_NAME + and some va_list_escape_vars SSA_NAME appears in some PHI argument. + +2013-02-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/53342 + PR tree-optimization/53185 + * tree-vectorizer.h (vect_check_strided_load): Remove. + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Do + not disallow peeling for vectorized strided loads. + (vect_check_strided_load): Make static and simplify. + (vect_analyze_data_refs): Adjust. + * tree-vect-stmts.c (vectorizable_load): Handle peeled loops + correctly when vectorizing strided loads. + +2013-02-05 Richard Biener <rguenther@suse.de> + + * doc/install.texi: Refer to ISL, not PPL. + +2013-02-05 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/55789 + * params.def (PARAM_EARLY_INLINER_MAX_ITERATIONS): Drop to 1. + +2013-02-05 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/55789 + * cgraphclones.c (cgraph_remove_node_and_inline_clones): Remove + the dead call anyway. + +2013-02-05 Eric Botcazou <ebotcazou@adacore.com> + + PR sanitizer/55374 + * config/gnu-user.h (LIBASAN_EARLY_SPEC): Add missing guard. + +2013-02-04 Alexander Potapenko <glider@google.com> + Jack Howarth <howarth@bromo.med.uc.edu> + Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/55617 + * config/darwin.c (sort_ctor_records): Stabilized qsort + on constructor priority by using original position. + (finalize_ctors): New routine to sort constructors by + priority before use in assemble_integer. + (machopic_asm_out_constructor): Use finalize_ctors if needed. + +2013-02-04 Jakub Jelinek <jakub@redhat.com> + + PR libstdc++/54314 + * config/i386/winnt.c (i386_pe_assemble_visibility): Don't warn + about visibility on artificial decls. + * config/sol2.c (solaris_assemble_visibility): Likewise. + +2013-02-04 Kai Tietz <ktietz@redhat.com> + + PR target/56186 + * config/i386/i386.c (function_value_ms_64): Add additional valtype + argument and improve checking of return-argument types for 16-byte + modes. + (ix86_function_value_1): Add additional valtype argument on call + of function_value_64. + (return_in_memory_ms_64): Sync 16-byte sized mode handling with + handling infunction_value_64 function. + +2013-02-04 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> + + * reload.c (subst_reloads): Fix DEBUG_RELOAD build issue. + +2013-02-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56188 + * tree-ssa-structalias.c (label_visit): Consider case with + initially non-empty points-to set. + (perform_var_substitution): Dump node mapping and clean up. + +2013-02-04 Richard Guenther <rguenther@suse.de> + + PR lto/56168 + * lto-symtab.c (lto_symtab_merge_decls_1): Make non-builtin + node prevail as last resort. + (lto_symtab_merge_decls): Remove guard on LTRANS here. + (lto_symtab_prevailing_decl): Builtins are their own prevailing decl. + +2013-02-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56113 + * tree-ssa-structalias.c (equiv_class_lookup, equiv_class_add): + Merge into ... + (equiv_class_lookup_or_add): ... this. + (label_visit): Adjust and fix error in previous patch. + (perform_var_substitution): Adjust. + +2013-02-03 Oleg Endo <olegendo@gcc.gnu.org> + + * config/sh/divtab.c: Fix formatting and comments throughout the file. + * config/sh/sh4-300.md: Likewise. + * config/sh/sh4a.md: Likewise. + * config/sh/constraints.md: Likewise. + * config/sh/sh.md: Likewise. + * config/sh/netbsd-elf.h: Likewise. + * config/sh/predicates.md: Likewise. + * config/sh/sh-protos.h: Likewise. + * config/sh/ushmedia.h: Likewise. + * config/sh/linux.h: Likewise. + * config/sh/sh.c: Likewise. + * config/sh/superh.h: Likewise. + * config/sh/elf.h: Likewise. + * config/sh/sh4.md: Likewise. + * config/sh/sh.h: Likewise. + +2013-02-03 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config/pa/constraints.md: Adjust unused letters. Change "T" + constraint to match_test floating_point_store_memory_operand(). + * config/pa/predicates.md (reg_plus_base_memory_operand): New. + (base14_operand): New. + (floating_point_store_memory_operand): New. + (integer_store_memory_operand): Revise to use base14_operand and + reg_plus_base_memory_operand. + (move_dest_operand): Allow symbolic_memory_operands. + (symbolic_memory_operand): Check for LO_SOM. + (symbolic_operand): Change default case to break. + * config/pa/pa.md: Remove unamed DFmode and SFmode patterns to force + CONST_DOUBLE values to be reloaded by putting them into memory when + the destination is a floating point register. + (movdf): Remove code to handle CONST_DOUBLE. + (movsf): Likewise. + (reload_indf_r1): New. + (reload_insf_r1): New. + Consistently use "Q" and "T" constraints with integer and floating + point move instructions, respectively. + (movdi): Remove FAIL. + Change predicate for source operand unamed DImode move from + general_operand to move_src_operand. + (umulsidi3): Change predicate for destination operand to + register_operand. + Likewise for similar unamed patterns. + * config/pa/pa-protos.h (pa_legitimize_reload_address): Declare. + * config/pa/pa.c (pa_symbolic_expression_p): Remove extra parenthesis. + (hppa_legitimize_address): Simplify mask calculation. + (pa_emit_move_sequence): Revised handling of secondary reloads from + REG+D addresses for floating point loads and stores. Directly handle + loading CONST0_RTX (mode) to a floating point register. + (pa_secondary_reload): Handle reloading DF and SFmode constant values + to floating point registers. Don't restrict secondary reloads to + floating point registers to integer modes. Revise some comments and + cleanup some code. + (TARGET_LEGITIMATE_ADDRESS_P): Define. + (pa_legitimate_address_p): New. + (pa_legitimize_reload_address): New. + * config/pa/pa.h (STRICT_REG_OK_FOR_INDEX_P): New. + (STRICT_REG_OK_FOR_BASE_P): New. + (GO_IF_LEGITIMATE_ADDRESS): Delete. Update some related comments. + (LEGITIMIZE_RELOAD_ADDRESS): Revise to use pa_legitimize_reload_address. + +2013-02-03 David Edelsohn <dje.gcc@gmail.com> + Andrew Dixie <andrewd@gentrack.com> + + * collect2.c (GCC_CHECK_HDR): Do not scan objects with F_LOADONLY + flag set. + +2013-02-03 Richard Sandiford <rdsandiford@googlemail.com> + + * expmed.c (extract_bit_field_1): Pass the full width of the + structure to get_best_reg_extraction_insn. + +2013-02-01 David Edelsohn <dje.gcc@gmail.com> + + PR target/54601 + * configure.ac (use_cxa_atexit): Add AIX. + * configure: Regenerate. + + * config/rs6000/aix61.h (STARTFILE_SPEC): Add crtcxa.o. + +2013-02-01 Jakub Jelinek <jakub@redhat.com> + + PR debug/54793 + * final.c (need_profile_function): New variable. + (final_start_function): Drop ATTRIBUTE_UNUSED from first argument. + If first of NOTE_INSN_BASIC_BLOCK or NOTE_INSN_FUNCTION_BEG + is only preceeded by NOTE_INSN_VAR_LOCATION or NOTE_INSN_DELETED + notes, targetm.asm_out.function_prologue doesn't emit anything, + HAVE_prologue and profiler should be emitted before prologue, + set need_profile_function instead of emitting it. + (final_scan_insn): If need_profile_function, emit + profile_function on the first NOTE_INSN_BASIC_BLOCK or + NOTE_INSN_FUNCTION_BEG note. + +2013-02-01 Richard Henderson <rth@redhat.com> + + * config/rs6000/rs6000.md (smulditi3): New. + (umulditi3): New. + + * config/alpha/alpha.md (umulditi3): New. + +2013-02-01 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2. + (ASM_OUTPUT_ALIGNED_LOCAL): New. + +2013-02-01 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56113 + * tree-ssa-structalias.c (label_visit): Reduce work for + single-predecessor nodes. + +2013-02-01 Eric Botcazou <ebotcazou@adacore.com> + + * fold-const.c (make_range_step) <TRUTH_NOT_EXPR>: Bail out if the + range isn't testing for zero. + +2013-01-31 Steven Bosscher <steven@gcc.gnu.org> + + PR middle-end/56113 + * fwprop.c (fwprop_init): Set up loops without CFG modifications. + +2013-01-31 Hiroyuki Ono <hiroyuki.ono.jc@renesas.com> + Nick Clifton <nickc@redhat.com> + + * config/v850/constraints.md (Q): Define as a memory constraint. + * config/v850/predicates.md (label_ref_operand): New predicate. + (e3v5_shift_operand): New predicate. + (ior_operator): New predicate. + * config/v850/t-v850: Add e3v5 multilib. + * config/v850/v850-protos.h (v850_adjust_insn_length): Prototype. + (v850_gen_movdi): Prototype. + * config/v850/v850.c: Add support for e3v5 architecture. + Rename all uses of TARGET_V850E || TARGET_V850E2_ALL to + TARGET_V850E_UP. + (construct_save_jarl): Add e3v5 long JARL support. + (v850_adjust_insn_length): New function. Adjust length of call + insns when using e3v5 instructions. + (v850_gen_movdi): New function: Generate instructions to move a + DImode value. + * config/v850/v850.h (TARGET_CPU_v850e3v5): Define. + (CPP_SPEC): Define __v850e3v5__ as appropriate. + (TARGET_USE_FPU): Enable for e3v5. + (CONST_OK_FOR_W): New macro. + (ADJUST_INSN_LENGTH): Define. + * config/v850/v850.md (UNSPEC_LOOP): Define. + (attr cpu): Add v850e3v5. + Rename all uses of TARGET_V850E2 to TARGET_V850E2V3_UP. + (movdi): New pattern. + (movdi_internal): New pattern. + (cbranchsf4): Conditionalize on TARGET_USE_FPU. + (cbranchdf4): Conditionalize on TARGET_USE_FPU. + (cstoresf4): Likewise. + (cstoredf4): Likewise. + (insv): New pattern. + (rotlso3_a): New pattern. + (rotlsi3_b): New pattern + (rotlsi3_v850e3v5): New pattern. + (doloop_begin): New pattern. + (fix_loop_counter): New pattern. + (doloop_end): New pattern. + (branch_normal): Add e3v5 long branch support. + (branch_invert): Likewise. + (branch_z_normal): Likewise. + (branch_z_invert): Likewise. + (branch_nz_normal): Likewise. + (branch_nz_invert): Likewise. + (call_internal_short): Add e3v5 register-indirect JARL support. + (call_internal_long): Likewise. + (call_value_internal_short): Likewise. + (call_value_internal_long): Likewise. + * config/v850/v850.opt (mv850e3v5, mv850e2v4): New options. + (mloop): New option. + * config.gcc: Add support for configuring v840e3v5 target. + * doc/invoke.texi: Document new v850 specific command line options. + +2013-01-31 Paul Koning <ni1d@arrl.net> + + PR debug/55059 + PR debug/54508 + * dwarf2out.c (prune_unused_types_mark): Mark all of parent's + children if parent is a class. + (prune_unused_types_prune): Don't add DW_AT_declaration. + +2013-01-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56157 + * tree-vect-slp.c (vect_get_slp_defs): More thoroughly try to + match up operand with SLP child. + +2013-01-31 Jason Merrill <jason@redhat.com> + + PR debug/54410 + * dwarf2out.c (gen_struct_or_union_type_die): Always schedule template + parameters the first time. + (gen_scheduled_generic_parms_dies): Check completeness here. + +2013-01-31 Richard Biener <rguenther@suse.de> + + PR middle-end/53073 + * common.opt (faggressive-loop-optimizations): New flag, + enabled by default. + * doc/invoke.texi (faggressive-loop-optimizations): Document. + * tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): Guard + infer_loop_bounds_from_undefined by it. + +2013-01-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56150 + * tree-ssa-loop-manip.c (find_uses_to_rename_stmt): Do not + visit virtual operands. + (find_uses_to_rename_bb): Likewise. + +2013-01-31 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56150 + * tree-ssa-tail-merge.c (gimple_equal_p): Properly handle + mixed store non-store stmts. + +2013-01-30 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/55374 + * gcc.c (LIBASAN_SPEC): Define just to ADD_STATIC_LIBASAN_LIBS if + LIBASAN_EARLY_SPEC is defined. + (LIBASAN_EARLY_SPEC): Define to empty string if not already defined. + (LINK_COMMAND_SPEC): Add LIBASAN_EARLY_SPEC for -fsanitize=address, + before %o. + * config/gnu-user.h (LIBASAN_EARLY_SPEC): Define. + + PR c++/55742 + * config/i386/i386.c (ix86_valid_target_attribute_inner_p): Diagnose + invalid args instead of ICEing on it. + (ix86_valid_target_attribute_tree): Return error_mark_node if + ix86_valid_target_attribute_inner_p failed. + (ix86_valid_target_attribute_p): Return false only if + ix86_valid_target_attribute_tree returned error_mark_node. Allow + target("default") attribute. + (sorted_attr_string): Change argument from const char * to tree, + merge in all target attribute arguments rather than just one. + Formatting fix. Use XNEWVEC instead of xmalloc and XDELETEVEC + instead of free. Avoid using strcat. + (ix86_mangle_function_version_assembler_name): Mangle + target("default") as if no target attribute is present. Adjust + sorted_attr_string caller. Avoid leaking memory. Use XNEWVEC + instead of xmalloc and XDELETEVEC instead of free. + (ix86_function_versions): Don't return true if one of the decls + doesn't have target attribute. If they don't and one of the decls + is DECL_FUNCTION_VERSIONED, report an error. Adjust + sorted_attr_string caller. Use XDELETEVEC instead of free. + (ix86_supports_function_versions): Remove. + (make_name): Fix up formatting. + (make_dispatcher_decl): Remove resolver_name and its initialization. + Avoid leaking memory. + (is_function_default_version): Return true if there is + target("default") attribute rather than no target attribute at all. + (make_resolver_func): Avoid leaking memory. + (ix86_generate_version_dispatcher_body): Likewise. + (TARGET_OPTION_SUPPORTS_FUNCTION_VERSIONS): Remove. + * target.def (supports_function_versions): Remove. + * doc/tm.texi.in (SUPPORTS_FUNCTION_VERSIONS): Remove. + * doc/tm.texi: Regenerated. + +2013-01-30 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56144 + * lra-constraints.c (get_reload_reg): Don't reuse reload pseudo + for values with side effects. + +2013-01-30 Richard Biener <rguenther@suse.de> + + * sparseset.h (sparseset_bit_p): Use gcc_checking_assert. + (sparseset_pop): Likewise. + * cfganal.c (compute_idf): Likewise. Increase work-stack size + to be able to use quick_push in the worker loop. + +2013-01-30 Marek Polacek <polacek@redhat.com> + + * cfgcleanup.c (cleanup_cfg): Don't mark affected BBs. + +2013-01-30 Richard Biener <rguenther@suse.de> + + PR lto/56147 + * lto-symtab.c (lto_symtab_merge_decls_1): Guard DECL_BUILT_IN check. + +2013-01-30 Georg-Johann Lay <avr@gjlay.de> + + PR tree-optimization/56064 + * fixed-value.c (fixed_from_double_int): New function. + * fixed-value.h (fixed_from_double_int): New prototype. + (const_fixed_from_double_int): New static inline function. + * fold-const.c (native_interpret_fixed): New static function. + (native_interpret_expr) <FIXED_POINT_TYPE>: Use it. + (can_native_interpret_type_p) <FIXED_POINT_TYPE>: Return true. + (native_encode_fixed): New static function. + (native_encode_expr) <FIXED_CST>: Use it. + (native_interpret_int): Move double_int worker code to... + * double-int.c (double_int::from_buffer): ...this new static method. + * double-int.h (double_int::from_buffer): Prototype it. + +2013-01-30 Richard Biener <rguenther@suse.de> + + * tree-ssa-structalias.c (final_solutions, final_solutions_obstack): + New pointer-map and obstack. + (init_alias_vars): Allocate pointer-map and obstack. + (delete_points_to_sets): Free them. + (find_what_var_points_to): Cache result. + (find_what_p_points_to): Adjust for changed interface of + find_what_var_points_to. + (compute_points_to_sets): Likewise. + (ipa_pta_execute): Likewise. + +2013-01-30 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (HAVE_AS_SPARC_NOBITS): New test. + * configure: Regenerate. + * config.in: Regenerate. + * config/sparc/sparc.c (sparc_solaris_elf_asm_named_section): Emit + #nobits/#progbits if supported. + +2013-01-29 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/56121 + * config/sh/sh.md (bclr_m2a, bset_m2a, bst_m2a, bld_m2a, bldsign_m2a, + bld_reg, *bld_regqi, band_m2a, bandreg_m2a, bor_m2a, borreg_m2a, + bxor_m2a, bxorreg_m2a): Add satisfies_constraint_K03 condition. + +2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/cortex-a7.md (cortex_a7_neon, cortex_a7_all): Remove. + (cortex_a7_idiv): Use cortex_a7_both instead of cortex_a7_all. + +2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL. + * config/arm/cortex-a7.md (cortex_a7_call): Update required units. + +2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm-protos.h (arm_mac_accumulator_is_result): New + declaration. + * config/arm/arm.c (arm_mac_accumulator_is_result): New function. + * config/arm/cortex-a7.md: New bypasses using + arm_mac_accumulator_is_result. + +2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/cortex-a7.md (cortex_a7_neon_mul): New reservation. + (cortex_a7_neon_mla): Likewise. + (cortex_a7_fpfmad): New reservation. + (cortex_a7_fpmacs): Use ffmas and update required units. + (cortex_a7_fpmuld): Update required units and latency. + (cortex_a7_fpmacd): Likewise. + (cortex_a7_fdivs, cortex_a7_fdivd): Likewise. + (cortex_a7_neon). Likewise. + (bypass) Update participating units. + +2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute. + * config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type + from fmac to ffma. + * config/arm/vfp11.md (vfp_farith): Use ffmas. + (vfp_fmul): Use ffmad. + * config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas. + (cortex_r4_fmacd): Use ffmad. + * config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas. + * config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas. + (cortex_a9_fmacd): Use ffmad. + * config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas. + (cortex_a8_vfp_macd): Use ffmad. + * config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas. + (cortex_a5_fpmacd): Use ffmad. + * config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas. + (cortex_a15_vfp_macd): Use ffmad. + * config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad. + +2013-01-29 Jason Merrill <jason@redhat.com> + + PR libstdc++/54314 + * varasm.c (default_assemble_visibility): Don't warn about + visibility on artificial decls. + +2013-01-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56113 + * tree-ssa-structalias.c (equiv_class_lookup): Also return + the bitmap leader. + (label_visit): Free duplicate bitmaps and record the leader instead. + (perform_var_substitution): Adjust. + +2013-01-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55270 + * tree-ssa-dom.c (eliminate_degenerate_phis): If we changed + the CFG, schedule loops for fixup. + +2013-01-29 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78.c (rl78_regno_mode_code_ok_for_base_p): Allow + SP_REG. + +2013-01-28 Leif Ekblad <leif@rdos.net> + + * config.gcc (i[34567]86-*-rdos*, x86_64-*-rdos*): New targets. + * config/i386/i386.h (TARGET_RDOS): New macro. + (DEFAULT_LARGE_SECTION_THRESHOLD): New macro. + * config/i386/i386.c (ix86_option_override_internal): For 64bit + TARGET_RDOS, set ix86_cmodel to CM_MEDIUM_PIC and flag_pic to 1. + * config/i386/i386.opt (mlarge-data-threshold): Initialize to + DEFAULT_LARGE_SECTION_THRESHOLD. + * config/i386/i386.md (R14_REG, R15_REG): New constants. + * config/i386/rdos.h: New file. + * config/i386/rdos64.h: New file. + +2013-01-28 Bernd Schmidt <bernds@codesourcery.com> + + PR other/54814 + * reload.c (find_valid_class_1): Use in_hard_reg_set_p instead of + TEST_HARD_REG_BIT. + +2013-01-28 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/56117 + * sched-deps.c (sched_analyze_2) <case PREFETCH>: For use_cselib + call cselib_lookup_from_insn on the MEM before calling + add_insn_mem_dependence. + +2013-01-28 Richard Biener <rguenther@suse.de> + + * tree-inline.c (remap_gimple_stmt): Do not assing a BLOCK + to a stmt that didn't have one. + (copy_phis_for_bb): Likewise for PHI arguments. + (copy_debug_stmt): Likewise for debug stmts. + +2013-01-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/56034 + * tree-loop-distribution.c (enum partition_kind): Add PKIND_REDUCTION. + (partition_builtin_p): Adjust. + (generate_code_for_partition): Handle PKIND_REDUCTION. Assert + it is the last partition. + (rdg_flag_uses): Check SSA_NAME_IS_DEFAULT_DEF before looking + up the vertex for the definition. + (classify_partition): Classify whether a partition is a + PKIND_REDUCTION, thus has uses outside of the loop. + (ldist_gen): Inherit PKIND_REDUCTION when merging partitions. + Merge all PKIND_REDUCTION partitions into the last partition. + (tree_loop_distribution): Seed partitions from reductions as well. + +2013-01-28 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56125 + * tree-ssa-math-opts.c (gimple_expand_builtin_pow): Don't optimize + pow(x,c) into sqrt(x) * powi(x, n/2) or + 1.0 / (sqrt(x) * powi(x, abs(n/2))) if c is an integer or when + optimizing for size. + Don't optimize pow(x,c) into powi(x, n/3) * powi(cbrt(x), n%3) or + 1.0 / (powi(x, abs(n)/3) * powi(cbrt(x), abs(n)%3)) if 2c is an + integer. + + PR tree-optimization/56094 + * gimplify.c (force_gimple_operand_1): Temporarily set input_location + to UNKNOWN_LOCATION while gimplifying expr. + +2013-01-27 Uros Bizjak <ubizjak@gmail.com> + + PR target/56114 + * config/i386/i386.md (*movabs<mode>_1): Add square brackets around + operand 0 in movabs insn template for -masm=intel asm alternative. + (*movabs<mode>_2): Ditto for operand 1. + +2013-01-26 David Holsgrove <david.holsgrove@xilinx.com> + + PR target/54663 + * config.gcc (microblaze*-linux*): Add tmake_file to allow building + of microblaze-c.o + +2013-01-26 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config.gcc (microblaze*-*-*): Rename microblaze*-*-elf, update + tm_file. + +2013-01-25 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.c (TARGET_FIXED_CONDITION_CODE_REGS): + Undef to avoid warning. + +2013-01-25 Michael Haubenwallner <michael.haubenwallner@salomon.at> + + * configure.ac (gcc_cv_ld_static_dynamic): Define for AIX native ld. + * configure: Regenerate. + +2013-01-25 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56098 + * tree-ssa-phiopt.c (nt_init_block): Don't call add_or_mark_expr + for stmts with volatile ops. + (cond_store_replacement): Don't optimize if assign has volatile ops. + (cond_if_else_store_replacement_1): Don't optimize if either + then_assign or else_assign have volatile ops. + (hoist_adjacent_loads): Don't optimize if either def1 or def2 have + volatile ops. + +2013-01-25 Georg-Johann Lay <avr@gjlay.de> + + * doc/invoke.texi (AVR Built-in Macros): Document __XMEGA__. + +2013-01-25 Georg-Johann Lay <avr@gjlay.de> + + * doc/extend.texi (Example of asm with clobbered asm reg): Fix + missing ':' in asm example. + +2013-01-25 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd-builtins.def: Separate sq<r>dmulh_lane + entries into lane and laneq entries. + * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh_lane<mode>): + Remove AdvSIMD scalar modes. + (aarch64_sq<r>dmulh_laneq<mode>): New. + (aarch64_sq<r>dmulh_lane<mode>): New RTL pattern for Scalar AdvSIMD + modes. + * config/aarch64/arm_neon.h: Fix all the vq<r>dmulh_lane* intrinsics' + builtin implementations to relfect changes in RTL in aarch64-simd.md. + * config/aarch64/iterators.md (VCOND): New. + (VCONQ): New. + +2013-01-25 Georg-Johann Lay <avr@gjlay.de> + + PR target/54222 + * config/avr/builtins.def (DEF_BUILTIN): Add LIBNAME argument. + Add NULL LIBNAME argument to existing definitions. + (ABSHR, ABSR, ABSLR, ABSLLR, ABSHK, ABSK, ABSLK, ABSLLK): New. + * config/avr/avr-c.c (DEF_BUILTIN): Add LIBNAME argument. + * config/avr/avr.c (DEF_BUILTIN): Same. + (avr_init_builtins): Pass down LIBNAME to add_builtin_function. + (avr_expand_builtin): Expand to a vanilla call if a libgcc + implementation is available (DECL_ASSEMBLER_NAME is set). + (avr_fold_absfx): New static function. + (avr_fold_builtin): Use it to handle: AVR_BUILTIN_ABSHR, + AVR_BUILTIN_ABSR, AVR_BUILTIN_ABSLR, AVR_BUILTIN_ABSLLR, + AVR_BUILTIN_ABSHK, AVR_BUILTIN_ABSK, AVR_BUILTIN_ABSLK, + AVR_BUILTIN_ABSLLK. + * config/avr/stdfix.h (abshr, absr, abslr, absllr) + (abshk, absk, abslk, absllk): Provide as static inline functions. + +2013-01-25 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/56035 + * cfgloopmanip.c (fix_loop_structure): Remove redundant condition. + +2012-01-24 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*movti_internal_rex64): Add (o,e) alternative. + (*movtf_internal_rex64): Add (!o,C) alternative + (*movxf_internal_rex64): Ditto. + (*movdf_internal_rex64): Add (?r,C) and (?m,C) alternatives. + +2013-01-24 Shenghou Ma <minux.ma@gmail.com> + + * doc/invoke.texi: fix typo. + * doc/objc.texi: fix typo. + +2013-01-24 Richard Sandiford <rdsandiford@googlemail.com> + + * config/mips/mips.md (*and<mode>3_mips16): Use the "W" constraint + for the first two alternatives. + +2013-01-24 Diego Novillo <dnovillo@google.com> + + * Makefile.in (GGC): Remove. Replace all instances with ggc-page.o. + (ggc-zone.o): Remove. + * configure.ac: Remove option --with-gc. + * configure: Re-generate. + * doc/install.texi: Remove documentation for --with-gc. + * gengtype.c (write_enum_defn): Remove. Update all users. + (write_Types_process_field): Remove generation of gt_e_* argument. + (output_type_enum): Remove. Update all users. + (write_enum_defn): Remove. Update all users. + (enum alloc_zone): Remove. Update all users. + (write_splay_tree_allocator_def): Remove generation of gt_e_* argument. + * ggc-common.c (ggc_splay_alloc): Remove first argument. + Update all callers. + (struct ptr_data): Remove field TYPE. Update all users. + (gt_pch_note_object): Remove argument TYPE. Update all users. + * ggc-internal.h (ggc_pch_alloc_object): Remove last argument. + Update all users. + * ggc-none.c (ggc_alloc_typed_stat): Remove. + (struct alloc_zone): Remove. + (ggc_internal_alloc_zone_stat): Remove. + (ggc_internal_cleared_alloc_zone_stat): Remove. + * ggc-page.c (ggc_alloc_typed_stat): Remove. + (ggc_pch_count_object): Remove last argument. Update all users. + (ggc_pch_alloc_object): Remove last argument. Update all users. + (struct alloc_zone): Remove. + * ggc-zone.c: Remove. + * ggc.h (gt_pch_note_object): Remove last argument. Update all users. + (struct alloc_zone): Remove. + (ggc_alloc_typed_stat): Remove. + (ggc_alloc_typed): Remove. + (ggc_splay_alloc): Remove first argument. + (rtl_zone): Remove. Update all users. + (tree_zone): Remove. Update all users. + (tree_id_zone): Remove. Update all users. + (ggc_internal_zone_alloc_stat): Remove. Update all users. + (ggc_internal_zone_cleared_alloc_stat): Remove. Update all users. + (ggc_internal_zone_vec_alloc_stat): Remove. Update all users. + * tree-ssanames.c: Remove references to zone allocator in comments. + +2013-01-24 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.c (avr_out_fract): Make register numbers that + might be outside of source operand signed. + +2013-01-24 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/constraints.md (Yf): New constraint. + * config/i386/i386.md (*movdf_internal_rex64): Use Yf*f instead + of f constraint to conditionaly disable x87 register preferences. + (*movdf_internal): Ditto. + (*movsf_internal): Ditto. + +2013-01-24 Steven Bosscher <steven@gcc.gnu.org> + + PR inline-asm/55934 + * lra-assigns.c (assign_by_spills): Throw away the pattern of asms + that have operands with impossible constraints. + Add a FIXME for a speed-up opportunity. + * lra-constraints.c (process_alt_operands): Verify that a class + selected from constraints on asms is valid for the operand mode. + (curr_insn_transform): Remove incorrect comment. + +2013-01-23 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.c (rs6000_delegitimize_address): Check that + TOC operand is a valid symbol ref in the constant pool. + +2013-01-23 Edgar E. Iglesias <edgar.iglesias@gmail.com> + + * config/microblaze/linux.h: Add TARGET_OS_CPP_BUILTINS + +2013-01-23 Georg-Johann Lay <avr@gjlay.de> + + PR target/54222 + * config/avr/stdfix.h: New file. + * t-avr (stdfix-gcc.h): New rule to build it. + (EXTRA_HEADERS): Set it to install stdfix.h, stdfix-gcc.h. + +2013-01-23 Kostya Serebryany <kcc@google.com> + + * config/darwin.h: remove dependency on + CoreFoundation (asan on Mac OS). + +2013-01-23 Jakub Jelinek <jakub@redhat.com> + + PR target/49069 + * config/arm/arm.md (cbranchdi4, cstoredi4): Use s_register_operand + instead of cmpdi_operand for first comparison operand. + Don't assert that comparison operands aren't both constants. + +2013-01-22 Jonathan Wakely <jwakely.gcc@gmail.com> + + * doc/install.texi (Downloading the Source): Update references to + downloading separate components. + +2013-01-22 Jonathan Wakely <jwakely.gcc@gmail.com> + + * doc/extend.texi (__int128): Improve grammar. + +2013-01-22 Uros Bizjak <ubizjak@gmail.com> + + PR target/56028 + * config/i386/i386.md (*movti_internal_rex64): Change (o,riF) + alternative to (o,r). + (*movdi_internal_rex64): Remove (!o,n) alternative. + (DImode immediate->memory splitter): Remove. + (DImode immediate->memory peephole2): Remove. + (movtf): Enable for TARGET_64BIT || TARGET_SSE. + (*movtf_internal_rex64): Rename from *movtf_internal. Change (!o,F*r) + alternative to (!o,*r). + (*movtf_internal_sse): New pattern. + (*movxf_internal_rex64): New pattern. + (*movxf_internal): Disable for TARGET_64BIT. + (*movdf_internal_rex64): Remove (!o,F) alternative. + +2013-01-22 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56074 + * dumpfile.c (dump_loc): Only print loc if LOCATION_LOCUS (loc) + isn't UNKNOWN_LOCATION nor BUILTINS_LOCATION. + * tree-vect-loop-manip.c (find_loop_location): Also ignore + stmt locations where LOCATION_LOCUS of the stmt location is + UNKNOWN_LOCATION or BUILTINS_LOCATION. + + PR target/55686 + * config/i386/i386.md (UNSPEC_STOS): New. + (strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1, + *strsetqi_1): Add UNSPEC_STOS. + +2013-01-22 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/56067 + * doc/invoke.texi: Remove left over -Wsynth example. + +2013-01-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56051 + * fold-const.c (fold_binary_loc): Don't fold + X < (cast) (1 << Y) into (X >> Y) != 0 if cast is either + a narrowing conversion, or widening conversion from signed + to unsigned. + +2013-01-21 Uros Bizjak <ubizjak@gmail.com> + + PR rtl-optimization/56023 + * haifa-sched.c (fix_inter_tick): Do not update ticks of instructions, + dependent on debug instruction. + +2013-01-21 Martin Jambor <mjambor@suse.cz> + + PR middle-end/56022 + * function.c (allocate_struct_function): Call + invoke_set_current_function_hook earlier. + +2013-01-21 Jakub Jelinek <jakub@redhat.com> + + * reload1.c (init_reload): Only initialize reload_obstack + during the first call. + +2013-01-21 Marek Polacek <polacek@redhat.com> + + * cfgloop.c (verify_loop_structure): Fix up grammar. + +2013-01-21 Yi-Hsiu Hsu <ahsu@marvell.com> + + * config/arm/marvell-pj4.md (pj4_shift_conds, pj4_alu_shift, + pj4_alu_shift_conds, pj4_shift): Handle simple_alu_shift. + +2013-01-21 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/56058 + * config/arm/marvell-pj4.md: Update copyright year. + Fix up use of alu to alu_reg and simple_alu_imm. + +2013-01-21 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (enabled): Do not disable fma4 for TARGET_FMA. + +2013-01-20 Vladimir Makarov <vmakarov@redhat.com> + + PR target/55433 + * lra-constraints.c (curr_insn_transform): Don't reuse original + insn for secondary memory move when memory mode should be different. + +2013-01-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config/pa/pa.md (atomic_loaddi, atomic_loaddi_1, atomic_storedi, + atomic_storedi_1): New patterns. + +2013-01-20 Venkataramanan Kumar <venkataramanan.kumar@amd.com> + + btver2 pipeline descriptions. + * config/i386/i386.c: Enable CPU_BTVER2 to use btver2 pipeline + descriptions. + * config/i386/i386.md (btver2_decode): New type attributes. + * config/i386/sse.md (btver2_decode, btver2_sse_attr): New + type attributes. + * config/i386/btver2.md: New file describing btver2 pipelines. + +2013-01-19 Andrew Pinski <apinski@cavium.com> + + PR tree-optimization/52631 + * tree-ssa-sccvn (visit_use): Before looking up the original + statement, try looking up the simplified expression. + +2013-01-19 Anthony Green <green@moxielogic.com> + + * config/moxie/moxie.c (moxie_expand_prologue): Set + current_function_static_stack_size. + +2013-01-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/56029 + * tree-phinodes.c (reserve_phi_args_for_new_edge): Set + gimple_phi_arg_location for the new arg to UNKNOWN_LOCATION. + +2013-01-18 Sharad Singhai <singhai@google.com> + + PR tree-optimization/55995 + * dumpfile.c (dump_loc): Print location only if available. + * tree-vectorizer.c (increase_alignment): Intialize vect_location. + +2013-01-18 Vladimir Makarov <vmakarov@redhat.com> + + PR target/55433 + * lra-constraints.c (curr_insn_transform): Reuse original insn for + secondary memory move. + (inherit_reload_reg): Use rclass instead of cl for + check_secondary_memory_needed_p. + +2013-01-18 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/56015 + * expr.c (expand_expr_real_2) <case COMPLEX_EXPR>: Handle + the case where writing real complex part of target modifies op1. + +2013-01-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_vcond_internal<mode>): Handle unordered cases. + * config/aarch64/iterators.md (v_cmp_result): New. + +2013-01-18 Yi-Hsiu Hsu <ahsu@marvell.com> + Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/marvell-pj4.md: New file. + * config/arm/arm.c (arm_issue_rate): Add marvell_pj4. + * config/arm/arm.md (generic_sched): Add marvell_pj4. + (generic_vfp): Likewise. + * config/arm/arm-cores.def: Add marvell-pj4. + * config/arm/arm-tune.md: Regenerate. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/bpabi.h (BE8_LINK_SPEC): Add marvell_pj4. + * doc/invoke.texi: Document marvell-pj4. + +2013-01-18 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/arm_neon.h: Map scalar types to standard types. + +2013-01-18 Alexandre Oliva <aoliva@redhat.com> + + PR debug/54114 + PR debug/54402 + PR debug/49888 + * var-tracking.c (negative_power_of_two_p): New. + (global_get_addr_cache, local_get_addr_cache): New. + (get_addr_from_global_cache, get_addr_from_local_cache): New. + (vt_canonicalize_addr): Rewrite using the above. Adjust the + heading comment. + (vt_stack_offset_p): Remove. + (vt_canon_true_dep): Always canonicalize loc's address. + (clobber_overlapping_mems): Make sure we have a MEM. + (local_get_addr_clear_given_value): New. + (val_reset): Clear local cached entries. + (compute_bb_dataflow): Create and release the local cache. + Disable duplicate MEMs clobbering. + (emit_notes_in_bb): Clobber MEMs likewise. + (vt_emit_notes): Create and release the local cache. + (vt_initialize, vt_finalize): Create and release the global + cache, respectively. + * alias.c (rtx_equal_for_memref_p): Compare operands of ENTRY_VALUEs. + +2013-01-18 Alexandre Oliva <aoliva@redhat.com> + + PR libmudflap/53359 + * tree-mudflap.c (mudflap_finish_file): Skip deferred decls + not found in the symtab. + +2013-01-18 Alexandre Oliva <aoliva@redhat.com> + + PR debug/56006 + PR rtl-optimization/55547 + PR rtl-optimization/53827 + PR debug/53671 + PR debug/49888 + * alias.c (offset_overlap_p): New, factored out of... + (memrefs_conflict_p): ... this. Use absolute sizes. Retain + the conservative special case for symbolic constants. Don't + adjust zero sizes on alignment. + +2013-01-18 Bernd Schmidt <bernds@codesourcery.com> + + PR rtl-optimization/52573 + * regrename.c (build_def_use): Ignore REG_DEAD notes if there is a + REG_UNUSED for the same register. + +2013-01-17 Richard Biener <rguenther@suse.de> + Marek Polacek <polacek@redhat.com> + + PR rtl-optimization/55833 + * loop-unswitch.c (unswitch_loops): Move loop verification... + (unswitch_single_loop): ...here. Call mark_irreducible_loops. + * cfgloopmanip.c (fix_loop_placement): Add IRRED_INVALIDATED parameter. + Set it to true when we're removing a loop from hierarchy tree in + an irreducible region. + (fix_bb_placements): Adjust caller. + (fix_loop_placements): Likewise. + +2013-01-17 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/builtins.def (DEF_BUILTIN): Factor out + "__builtin_avr_" from NAME, turn NAME to an uppercase identifier. + Factor out 'CODE_FOR_' from ICODE, use 'nothing' instead of '-1'. + Remove ID. Adjust comments. + * config/avr/avr-c.c (avr_builtin_name): Remove. + (avr_cpu_cpp_builtins): Use DEF_BUILTIN instead of for-loop. + * config/avr/avr.c (avr_tolower): New static function. + (DEF_BUILTIN): Remove parameter ID. Prefix ICODE by 'CODE_FOR_'. + Stringify NAME, prefix it with "__builtin_avr_" and lowercase it. + (avr_expand_builtin): Assert insn_code != CODE_FOR_nothing for + default expansion. + +2013-01-17 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/55273 + * loop-iv.c (iv_number_of_iterations): Consider zero iteration case. + +2013-01-17 Uros Bizjak <ubizjak@gmail.com> + + PR target/55981 + * config/i386/sync.md (atomic_store<mode>): Always generate SWImode + store through atomic_store<mode>_1. + (atomic_store<mode>_1): Macroize insn using SWI mode iterator. + +2013-01-17 Martin Jambor <mjambor@suse.cz> + + PR tree-optimizations/55264 + * ipa-inline-transform.c (can_remove_node_now_p_1): Never return true + for virtual methods. + * ipa.c (symtab_remove_unreachable_nodes): Never return true for + virtual methods before inlining is over. + * cgraph.h (cgraph_only_called_directly_or_aliased_p): Return false for + virtual functions. + * cgraphclones.c (cgraph_create_virtual_clone): Mark clones as + non-virtual. + +2013-01-16 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/56005 + * sched-deps.c (sched_analyze_2): Check deps->readonly for adding + pending reads for prefetch. + +2013-01-16 Ian Bolton <ian.bolton@arm.com> + + * config/aarch64/aarch64.md + (*cstoresi_neg_uxtw): New pattern. + (*cmovsi_insn_uxtw): New pattern. + (*<optab>si3_uxtw): New pattern. + (*<LOGICAL:optab>_<SHIFT:optab>si3_uxtw): New pattern. + (*<optab>si3_insn_uxtw): New pattern. + (*bswapsi2_uxtw): New pattern. + +2013-01-16 Richard Biener <rguenther@suse.de> + + * tree-inline.c (tree_function_versioning): Remove set but + never used variable. + +2013-01-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55964 + * tree-flow.h (rename_variables_in_loop): Remove. + (rename_variables_in_bb): Likewise. + * tree-loop-distribution.c (update_phis_for_loop_copy): Remove. + (copy_loop_before): Adjust and delete update-ssa status. + * tree-vect-loop-manip.c (rename_variables_in_bb): Make static. + (rename_variables_in_bb): Likewise. Properly walk over predecessors. + (rename_variables_in_loop): Remove. + (slpeel_update_phis_for_duplicate_loop): Likewise. + (slpeel_tree_duplicate_loop_to_edge_cfg): Handle nested loops, + use available cfg machinery instead of duplicating it. + Update PHI nodes and perform poor-mans SSA update here. + (slpeel_tree_peel_loop_to_edge): Adjust. + +2013-01-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/54767 + PR tree-optimization/53465 + * tree-vrp.c (vrp_meet_1): Revert original fix for PR53465. + (vrp_visit_phi_node): For PHI arguments coming via backedges + drop all symbolical range information. + (execute_vrp): Compute backedges. + +2013-01-16 Richard Biener <rguenther@suse.de> + + * doc/install.texi: Update CLooG and ISL requirements to + 0.18.0 and 0.11.1. + +2013-01-16 Christian Bruel <christian.bruel@st.com> + + PR target/55301 + * config/sh/sh.c (sh_expand_prologue): Postpone new_stack mem symbol. + (broken_move): Handle UNSPECV_SP_SWITCH_B. + * config/sh/sh.md (sp_switch_1): Use set (reg:SI SP_REG). + +2013-01-16 DJ Delorie <dj@redhat.com> + + * config/sh/sh.md (UNSPECV_SP_SWITCH_B): New. + (UNSPECV_SP_SWITCH_E): New. + (sp_switch_1): Change to an unspec. + (sp_switch_2): Change to an unspec. Don't use post-inc when we + replace $r15. + +2013-01-16 Uros Bizjak <ubizjak@gmail.com> + + * emit-rtl.c (need_atomic_barrier_p): Mask memory model argument + with MEMMODEL_MASK before comparing with MEMMODEL_* memory types. + * optabs.c (maybe_emit_sync_lock_test_and_set): Ditto. + (expand_mem_thread_fence): Ditto. + (expand_mem_signal_fence): Ditto. + (expand_atomic_load): Ditto. + (expand_atomic_store): Ditto. + +2013-01-16 Alexandre Oliva <aoliva@redhat.com> + + PR rtl-optimization/55547 + PR rtl-optimization/53827 + PR debug/53671 + PR debug/49888 + * alias.c (memrefs_conflict_p): Set sizes to negative after + AND adjustments. + +2013-01-15 Jakub Jelinek <jakub@redhat.com> + + PR target/55940 + * function.c (thread_prologue_and_epilogue_insns): Always + add crtl->drap_reg to set_up_by_prologue.set, even if + stack_realign_drap is false. + +2013-01-15 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/vax/vax.md (add<mode>3, sub<mode>3, mul<mode>3, div<mode>3, + and<mode>3, *and<mode>_const_int, ior<mode>3, xor<mode>3, ashrsi3, + *call): Fix indention. + +2013-01-15 Tom de Vries <tom@codesourcery.com> + + PR target/55876 + * optabs.c (widen_operand): Use gen_lowpart instead of gen_rtx_SUBREG. + Update comment. + +2013-01-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/55153 + * sched-deps.c (sched_analyze_2): Add pending reads for prefetch. + +2013-01-15 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/55920 + * tree-sra.c (analyze_access_subtree): Do not mark non-removable + accesses as grp_to_be_debug_replaced. + +2013-01-15 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/55920 + * tree-sra.c (sra_modify_assign): If for lacc->grp_to_be_debug_replaced + there is non-useless type conversion needed from debug rhs to lhs, + use build_debug_ref_for_model and/or VIEW_CONVERT_EXPR. + +2013-01-15 Joseph Myers <joseph@codesourcery.com> + Mikael Pettersson <mikpe@it.uu.se> + + PR target/43961 + * config/arm/arm.h (ADDR_VEC_ALIGN): Align SImode jump tables for + Thumb. + (ASM_OUTPUT_CASE_LABEL): Remove. + (ASM_OUTPUT_BEFORE_CASE_LABEL): Define to empty. + * final.c (shorten_branches): Update alignment of labels before + jump tables if CASE_VECTOR_SHORTEN_MODE. + +2013-01-15 Richard Biener <rguenther@suse.de> + + PR bootstrap/55961 + * system.h: Do not include gmp.h for building host tools. + +2013-01-15 Richard Biener <rguenther@suse.de> + + PR middle-end/55882 + * emit-rtl.c (set_mem_attributes_minus_bitpos): Correctly + account for bitpos when computing alignment. + +2013-01-15 Vladimir Yakovlev <vladimir.b.yakovlev@intel.com> + + * config/i386/i386-c.c (ix86_target_macros_internal): New case. + (ix86_target_macros_internal): Likewise. + + * config/i386/i386.c (m_CORE2I7): Removed. + (m_CORE_HASWELL): New macro. + (m_CORE_ALL): Likewise. + (initial_ix86_tune_features): m_CORE2I7 is replaced by m_CORE_ALL. + (initial_ix86_arch_features): Likewise. + (processor_target_table): Initializations for Core avx2. + (cpu_names): New names "core-avx2". + (ix86_option_override_internal): Changed PROCESSOR_COREI7 by + PROCESSOR_CORE_HASWELL. + (ix86_issue_rate): New case. + (ia32_multipass_dfa_lookahead): Likewise. + (ix86_sched_init_global): Likewise. + + * config/i386/i386.h (TARGET_HASWELL): New macro. + (target_cpu_default): New TARGET_CPU_DEFAULT_haswell. + (processor_type): New PROCESSOR_HASWELL. + +2013-01-15 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/55955 + * tree-vect-loop.c (vectorizable_reduction): Give up early on + *SHIFT_EXPR and *ROTATE_EXPR codes. + + PR tree-optimization/48766 + * opts.c (common_handle_option): For -fwrapv disable -ftrapv, for + -ftrapv disable -fwrapv. + +2013-01-14 Georg-Johann Lay <avr@gjlay.de> + + PR target/55974 + * config/avr/avr-c.c (avr_cpu_cpp_builtins): Define __FLASH + etc. to 1 and not to __flash. + Use LL suffix for __INT24_MAX__ with -mint8. + Use ULL suffix for __UINT24_MAX__ with -mint8. + +2013-01-14 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr-arch.h + (struct base_arch_s): Use typedef avr_arch_t instead. + (struct arch_info_s): Use typedef avr_arch_info_t instead. + (struct mcu_type_s): Use typedef avr_mcu_t instead. + * config/avr/avr.c: Same. + * config/avr/avr-devices.c: Same. + * config/avr/driver-avr.c: Same. + * config/avr/gen-avr-mmcu-texi.c: Same. + * config/avr/avr-mcus.def: Adjust comment. + +2013-01-14 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New. + * config/aarch64/iterators.md (VALLDI): New. + +2013-01-14 Uros Bizjak <ubizjak@gmail.com> + Andi Kleen <ak@linux.intel.com> + + PR target/55948 + * config/i386/sync.md (atomic_store<mode>_1): New pattern. + (atomic_store<mode>): Call atomic_store<mode>_1 for IX86_HLE_RELEASE + memmodel flag. + +2013-01-14 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr-stdint.h: Remove trailing blanks. + * config/avr/avr-log.h: Same. + * config/avr/avr-arch.h: Same. + * config/avr/avr-devices.c: Same. + * config/avr/avr-dimode.md: Same. + * config/avr/predicates.md: Same. + * config/avr/avr-c.c: Same. And fix typo. + + * config/avr/avr-protos.h: Same. And: + (function_arg_regno_p): Rename to avr_function_arg_regno_p. + (init_cumulative_args): Rename to avr_init_cumulative_args. + (expand_prologue): Rename to avr_expand_prologue. + (expand_epilogue): Rename to avr_expand_epilogue. + (adjust_insn_length): Rename to avr_adjust_insn_length. + (notice_update_cc): Rename to avr_notice_update_cc. + (final_prescan_insn): Rename to avr_final_prescan_insn. + * config/avr/avr.c: Same. + * config/avr/avr.h: Same. + * config/avr/avr.md: Remove trailing blanks. + (prologue): Use avr_expand_prologue. + (epilogue, sibcall_epilogue): Use avr_expand_epilogue. + +2013-01-14 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (verify_expr_location, verify_expr_location_1, + verify_location, collect_subblocks): New functions. + (verify_gimple_in_cfg): Verify that locations only reference + BLOCKs in the functions BLOCK tree. + +2013-01-14 Richard Biener <rguenther@suse.de> + + * tree-cfgcleanup.c (remove_forwarder_block): Unshare propagated + PHI argument. + * graphite-sese-to-poly.c (insert_out_of_ssa_copy): Properly + unshare reference. + (insert_out_of_ssa_copy_on_edge): Likewise. + (rewrite_close_phi_out_of_ssa): Likewise. + * tree-ssa.c (insert_debug_temp_for_var_def): Properly unshare + debug expressions. + * tree-ssa-pre.c (insert_into_preds_of_block): Properly unshare + propagated constants. + * tree-cfg.c (tree_node_can_be_shared): Handled component-refs + can not be shared. + +2013-01-14 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr-modes.def: Add GPL copyright notice. + +2013-01-13 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sync.md (mem_thread_fence): Mask operands[0] with + MEMMODEL_MASK to determine memory model. + (atomic_store<mode>): Ditto from operands[2]. + * config/i386/i386.c (ix86_memmodel_check): Declare "strong" as bool. + +2013-01-13 Jakub Jelinek <jakub@redhat.com> + + PR fortran/55935 + * gimple-fold.c (get_symbol_constant_value): Call unshare_expr. + (fold_gimple_assign): Don't call unshare_expr here. + (fold_ctor_reference): Call unshare_expr. + +2013-01-13 Terry Guo <terry.guo@arm.com> + + * Makefile.in (s-mlib): New argument MULTILIB_REUSE. + * doc/fragments.texi: Document MULTILIB_REUSE. + * gcc.c (multilib_reuse): New internal spec. + (set_multilib_dir): Also search multilib from multilib_reuse. + * genmultilib (tmpmultilib3): Refactor code. + (tmpmultilib4): Ditto. + (multilib_reuse): New multilib argument. + +2013-01-13 Richard Sandiford <rdsandiford@googlemail.com> + + * Makefile.in: Update copyright. + +2013-01-12 Tom de Vries <tom@codesourcery.com> + + PR middle-end/55890 + * calls.c (expand_call): Check if arg_nr is valid. + +2013-01-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + * doc/extend.texi (X86 Built-in Functions): Add whitespace in + __builtin_ia32_paddb256 and __builtin_ia32_pavgb256 + documentation. Add missing '__' in front of + __builtin_ia32_packssdw256. + +2013-01-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/55719 + * config/s390/s390.c (s390_preferred_reload_class): Do not return + NO_REGS for larl operands. + (s390_reload_larl_operand): Use s390_load_address instead of + emit_move_insn. + +2013-01-11 Richard Biener <rguenther@suse.de> + + * tree-cfg.c (verify_node_sharing_1): Split out from ... + (verify_node_sharing): ... here. + (verify_gimple_in_cfg): Use verify_node_sharing_1 for walk_tree. + +2013-01-11 Eric Botcazou <ebotcazou@adacore.com> + + * configure.ac (Tree checking): Set TREECHECKING to yes if enabled. + Substitute TREECHECKING. + * configure: Regenerate. + * Makefile.in (TREECHECKING): New. + +2013-01-11 Richard Guenther <rguenther@suse.de> + + PR tree-optimization/44061 + * tree-vrp.c (extract_range_basic): Compute zero as + value-range for __builtin_constant_p of function parameters. + +2013-01-10 Richard Sandiford <rdsandiford@googlemail.com> + + Update copyright years. + +2013-01-10 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/55672 + * lra-eliminations.c (mark_not_eliminable): Permit addition with + const to be eliminable. + +2013-01-10 David Edelsohn <dje.gcc@gmail.com> + + * configure.ac (HAVE_AS_TLS): Add check for powerpc-ibm-aix. + * configure: Regenerate. + +2013-01-10 Richard Biener <rguenther@suse.de> + + * builtins.c (expand_builtin_init_trampoline): Use set_mem_attributes. + +2013-01-10 Richard Biener <rguenther@suse.de> + + PR bootstrap/55792 + * tree-into-ssa.c (rewrite_add_phi_arguments): Do not set + locations for virtual PHI arguments. + (rewrite_update_phi_arguments): Likewise. + +2013-01-10 Joel Sherrill <joel.sherrill@OARcorp.com> + + * config/v850/rtems.h (ASM_SPEC): Pass -m8byte-align and -mgcc-abi + on to assembler. + +2013-01-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/55921 + * tree-complex.c (expand_complex_asm): New function. + (expand_complex_operations_1): Call it for GIMPLE_ASM. + +2013-01-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/55718 + * config/s390/s390.c (s390_symref_operand_p) + (s390_loadrelative_operand_p): Merge the two functions. + (s390_check_qrst_address, print_operand_address): Add parameters + to s390_loadrelative_operand_p invokation. + (s390_check_symref_alignment): Use s390_loadrelative_operand_p. + (s390_reload_larl_operand, s390_secondary_reload): Use + s390_loadrelative_operand_p instead of s390_symref_operand_p. + (legitimize_pic_address): Handle @GOTENT and @PLT + addend. + +2013-01-09 Mike Stump <mikestump@comcast.net> + + * dse.c (record_store): Remove unnecessary assert. + +2013-01-09 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/55569 + * cfgloopmanip.c (scale_loop_profile): Make ITERATION_BOUND gcov_type. + * cfgloop.h (scale_loop_profile): Likewise. + +2013-01-09 Jan Hubicka <jh@suse.cz> + + PR lto/45375 + * ipa-inline.c (ipa_inline): Remove extern inlines and virtual + functions. + * cgraphclones.c (cgraph_clone_node): Cpoy also LTO file data. + +2013-01-09 Richard Sandiford <rdsandiford@googlemail.com> + + PR middle-end/55114 + * expr.h (maybe_emit_group_store): Declare. + * expr.c (maybe_emit_group_store): New function. + * builtins.c (expand_builtin_int_roundingfn): Call it. + (expand_builtin_int_roundingfn_2): Likewise. + +2013-01-09 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/55829 + * lra-constraints.c (match_reload): Add code for absent output. + (curr_insn_transform): Add code for reloads of matched inputs + without output. + +2013-01-09 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*vec_interleave_highv2df): Change mode + attribute of movddup insn to DF. + (*vec_interleave_lowv2df): Ditto. + (vec_dupv2df): Ditto. + +2013-01-09 Jan Hubicka <jh@suse.cz> + + PR tree-optimiation/55875 + * tree-ssa-loop-niter.c (number_of_iterations_cond): Add + EVERY_ITERATION parameter. + (number_of_iterations_exit): Check if exit is executed every iteration. + (idx_infer_loop_bounds): Similarly here. + (n_of_executions_at_most): Simplify + to only test for cases where statement is dominated by the + particular bound; handle correctly the "postdominance" test. + (scev_probably_wraps_p): Use max loop iterations info + as a global bound first. + +2013-01-09 Nguyen Duy Dat <dat.nguyen.yn@rvc.renesas.com> + Nick Clifton <nickc@redhat.com> + + * config/v850/v850.md (cbranchsf4): New pattern. + (cstoresf4): New pattern. + (cbranchdf4): New pattern. + (cstoredf4): New pattern. + (movsicc): Disallow floating point comparisons. + (cmpsf_le_insn): Fix order of operators. + (cmpsf_lt_insn): Likewise. + (cmpsf_eq_insn): Likewise. + (cmpdf_le_insn): Likewise. + (cmpdf_lt_insn): Likewise. + (cmpdf_eq_insn): Likewise. + (cmpsf_ge_insn): Use LE comparison. + (cmpdf_ge_insn): Likewise. + (cmpsf_gt_insn): Use LT comparison. + (cmpdf_gt_insn): Likewise. + (cmpsf_ne_insn): Delete pattern. + (cmpdf_ne_insn): Delete pattern. + * config/v850/v850.c (v850_gen_float_compare): Use + gen_cmpdf_eq_insn for NE comparison. + (v850_float_z_comparison_operator) + (v850_float_nz_comparison_operator): Move from here ... + * config/v850/predicates.md: ... to here. Move GT and GE + comparisons into v850_float_z_comparison_operator. + * config/v850/v850-protos.h (v850_float_z_comparison_operator): + Delete prototype. + (v850_float_nz_comparison_operator): Likewise. + +2013-01-09 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config/pa/pa.c (pa_emit_move_sequence): Replace calls to gen_insv + with calls to gen_insvsi/gen_insvdi. + +2013-01-09 Venkataramanan Kumar <venkataramanan.kumar@amd.com> + + * config/i386/i386.c (initial_ix86_tune_features): Set up + X86_TUNE_AVX128_OPTIMAL for m_BTVER2. + +2013-01-09 Steven Bosscher <steven@gcc.gnu.org> + Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/48189 + * predict.c (predict_loops): If max is 0, don't call compare_tree_int. + If nitercst is 0, don't predict the exit edge. + +2013-01-08 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/aarch64/aarch64.c (aarch64_print_operand): Replace %r + in asm_fprintf with reg_names. + (aarch64_print_operand_address): Likewise. + (aarch64_return_addr): Likewise. + * config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove. + +2013-01-08 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config/pa/pa.h (VAL_U6_BITS_P): Define. + (INT_U6_BITS): Likewise. + * config/pa/predicates.md (uint6_operand): New predicate. + (shift5_operand, shift6_operand): Likewise. + * config/pa/pa.md (lshrsi3, rotrsi3): Use shift5_operand instead of + arith32_operand. + (lshrdi3): Use shift6_operand. + (shrpsi4, shrpdi4): New insn patterns. + (extzv): Delete expander. + (extzvsi, extzvdi): New expanders. Use uint5_operand and uint6_operand + predicates in unamed zero extract patterns. Tighten common constraint. + (extv): Delete expander. + (extvsi, extvdi): New expanders. Use uint5_operand and uint6_operand + predicates in unamed sign extract patterns. Tighten common constraint. + (insv): Delete expander. + (insvsi, insvdi): New expanders. Use uint5_operand and uint6_operand + predicates in unamed insert patterns. Tighten common constraint. + Change uint32_operand predicate to uint6_operand predicate in unamed + DImode pattern to insert constant values of type 1...1xxxx. + +2013-01-04 Jan Hubicka <jh@suse.cz> + + PR tree-optimization/55823 + * ipa-prop.c (update_indirect_edges_after_inlining): Fix ordering + issue. + +2013-01-08 Jakub Jelinek <jakub@redhat.com> + Uros Bizjak <ubizjak@gmail.com> + + PR rtl-optimization/55845 + * df-problems.c (can_move_insns_across): Stop scanning at + volatile_insn_p source instruction or give up if + across_from .. across_to range contains any volatile_insn_p + instructions. + +2013-01-08 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (vec_init<mode>): New. + * config/aarch64/aarch64-protos.h (aarch64_expand_vector_init): + Declare. + * config/aarch64/aarch64.c (aarch64_simd_dup_constant, + aarch64_simd_make_constant, aarch64_expand_vector_init): New. + +2013-01-08 Jakub Jelinek <jakub@redhat.com> + + PR fortran/55341 + * asan.c (asan_clear_shadow): New function. + (asan_emit_stack_protection): Use it. + +2013-01-08 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_vec_<su>mult_lo_<mode>, + aarch64_simd_vec_<su>mult_hi_<mode>): Separate instruction and operand + with tab instead of space. + +2013-01-08 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78.c (rl78_expand_prologue): Always select + register bank 0 at the start of an interrupt handler. + * config/rl78/rl78.md (mulsi3_g13): Correct values for MDBL and + MDBH registers. + +2013-01-08 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_simd_bsl<mode>_internal): Add floating-point modes. + (aarch64_simd_bsl): Likewise. + (aarch64_vcond_internal<mode>): Likewise. + (vcond<mode><mode>): Likewise. + (aarch64_cm<cmp><mode>): Fix constraints, add new modes. + * config/aarch64/iterators.md (V_cmp_result): Add V2DF. + +2013-01-08 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Handle sqrt, sqrtf. + +2013-01-08 Martin Jambor <mjambor@suse.cz> + + PR debug/55579 + * tree-sra.c (analyze_access_subtree): Return true also after + potentially creating a debug-only replacement. + +2013-01-08 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/55890 + * tree-ssa-ccp.c (evaluate_stmt): Use gimple_call_builtin_p. + + PR tree-optimization/54120 + * tree-vrp.c (range_fits_type_p): Don't allow + src_precision < precision from signed vr to unsigned_p + if vr->min or vr->max is negative. + (simplify_float_conversion_using_ranges): Test can_float_p + against CODE_FOR_nothing. + +2013-01-08 Jakub Jelinek <jakub@redhat.com> + Richard Biener <rguenther@suse.de> + + PR middle-end/55851 + * fold-const.c (int_binop_types_match_p): Allow all INTEGRAL_TYPE_P + types instead of just INTEGER_TYPE types. + +2013-01-07 Mark Kettenis <kettenis@openbsd.org> + + * config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE, LIBGCC2_TF_CEXT, + TF_SIZE): Define. + +2013-01-07 Steve Ellcey <sellcey@mips.com> + + PR target/42661 + * config/mips/mips.opt: Change mad to mmad to match documentation. + +2013-01-07 Georg-Johann Lay <avr@gjlay.de> + + PR target/55897 + * doc/extend.texi (AVR Named Address Spaces): __memx goes into + .progmemx.data now. + +2013-01-07 Georg-Johann Lay <avr@gjlay.de> + + PR target/55897 + * config/avr/avr.h (ADDR_SPACE_COUNT): New enum. + (avr_addrspace_t): Add .section_name field. + * config/avr/avr.c (progmem_section): Use ADDR_SPACE_COUNT as + array size. + (avr_addrspace): Same. Initialize .section_name. Remove last + NULL entry. Put __memx into .progmemx.data. + (progmem_section_prefix): Remove. + (avr_asm_init_sections): No need to initialize progmem_section. + (avr_asm_named_section): Use avr_addrspace[].section_name to get + section name prefix. + (avr_asm_select_section): Ditto. And use get_unnamed_section to + retrieve the progmem section. + * avr-c.c (avr_cpu_cpp_builtins): Use ADDR_SPACE_COUNT as loop + boundary to run over avr_addrspace[]. + (avr_register_target_pragmas): Ditto. + +2013-01-06 Jakub Jelinek <jakub@redhat.com> + + * varasm.c (output_constant_def_contents): For asan_protect_global + protected strings, adjust DECL_ALIGN if needed, before testing for + anchored symbols. + (place_block_symbol): Adjust size for asan protected STRING_CSTs if + TREE_CONSTANT_POOL_ADDRESS_P. Increase alignment for asan protected + normal decls. + (output_object_block): For asan protected decls, emit asan padding + after their contents. + * asan.c (asan_protect_global): Don't check TREE_ASM_WRITTEN here. + (asan_finish_file): Test it here instead. + +2013-01-07 Nick Clifton <nickc@redhat.com> + Matthias Klose <doko@debian.org> + Doug Kwan <dougkwan@google.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR driver/55470 + * collect2.c (main): Support -fuse-ld=bfd and -fuse-ld=gold. + + * common.opt: Add fuse-ld=bfd and fuse-ld=gold. + + * gcc.c (LINK_COMMAND_SPEC): Pass -fuse-ld=* to collect2. + + * opts.c (comman_handle_option): Ignore -fuse-ld=bfd and -fuse-ld=gold. + + * doc/invoke.texi: Document -fuse-ld=bfd and -fuse-ld=gold. + +2013-01-07 Georg-Johann Lay <avr@gjlay.de> + + PR target/54461 + * doc/install.texi (Cross-Compiler-Specific Options): Document + --with-avrlibc. + +2013-01-07 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/arm_neon.h (vmovn_high_is16, vmovn_high_s32, + vmovn_high_s64, vmovn_high_u16, vmovn_high_u32, vmovn_high_u64, + vqmovn_high_s16, vqmovn_high_s32, vqmovn_high_s64, vqmovn_high_u16, + vqmovn_high_u32, vqmovn_high_u64, vqmovun_high_s16, vqmovun_high_s32, + vqmovun_high_s64): Fix source operand number and update copyright. + +2013-01-07 Richard Biener <rguenther@suse.de> + + PR middle-end/55890 + * gimple.h (gimple_call_builtin_p): New overload. + * gimple.c (validate_call): New function. + (gimple_call_builtin_p): Likewise. + * tree-ssa-structalias.c (find_func_aliases_for_builtin_call): + Use gimple_call_builtin_p. + (find_func_clobbers): Likewise. + * tree-ssa-strlen.c (adjust_last_stmt): Likewise. + (strlen_optimize_stmt): Likewise. + +2013-01-07 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/arm_neon.h (vld1_dup_*): Make argument const. + (vld1q_dup_*): Likewise. + (vld1_*): Likewise. + (vld1q_*): Likewise. + (vld1_lane_*): Likewise. + (vld1q_lane_*): Likewise. + +2013-01-07 Richard Biener <rguenther@suse.de> + + * lto-streamer.h (LTO_minor_version): Bump to 2. + +2013-01-07 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-protos.h + (aarch64_const_double_zero_rtx_p): Rename to... + (aarch64_float_const_zero_rtx_p): ...this. + (aarch64_float_const_representable_p): New. + (aarch64_output_simd_mov_immediate): Likewise. + * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): Refactor + move immediate case. + * config/aarch64/aarch64.c + (aarch64_const_double_zero_rtx_p): Rename to... + (aarch64_float_const_zero_rtx_p): ...this. + (aarch64_print_operand): Allow printing of new constants. + (aarch64_valid_floating_const): New. + (aarch64_legitimate_constant_p): Check for valid floating-point + constants. + (aarch64_simd_valid_immediate): Likewise. + (aarch64_vect_float_const_representable_p): New. + (aarch64_float_const_representable_p): Likewise. + (aarch64_simd_imm_zero_p): Also allow for floating-point 0.0. + (aarch64_output_simd_mov_immediate): New. + * config/aarch64/aarch64.md (*movsf_aarch64): Add new alternative. + (*movdf_aarch64): Likewise. + * config/aarch64/constraints.md (Ufc): New. + (Y): call aarch64_float_const_zero_rtx. + * config/aarch64/predicates.md (aarch64_fp_compare_operand): New. + +2013-01-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55888 + PR tree-optimization/55862 + * tree-ssa-pre.c (phi_translate_1): Revert previous change. + (valid_in_sets): Check if a NAME has a leader in AVAIL_OUT, + not if it is contained therein. + +2013-01-07 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/t-avr: Typo. + +2013-01-07 Georg-Johann Lay <avr@gjlay.de> + + PR55243 + * config/avr/t-avr: Don't automatically rebuild + $(srcdir)/config/avr/t-multilib + $(srcdir)/config/avr/avr-tables.opt + $(srcdir)/doc/avr-mmcu.texi + (avr-mcus): New phony target to build them on request. + (s-avr-mlib, s-avr-mmcu-texi): Remove. + * avr/avr-mcus.def: Adjust comments. + +2013-01-07 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (DEFAULT_PCC_STRUCT_RETURN): Remove. + +2013-01-06 Richard Sandiford <rdsandiford@googlemail.com> + + * file-find.c, file-find.h, realmpfr.c: Add FSF as copyright holder. + +2013-01-06 Richard Sandiford <rdsandiford@googlemail.com> + + * config/tilepro/gen-mul-tables.cc: Put copyright on one line. + +2013-01-05 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/aix53.h (LIB_SPEC): Add -lpthreads when compiling + to generate profiling. + * config/rs6000/aix64.h (LIB_SPEC): Same. + +2013-01-04 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs): + New function. + (TARGET_FIXED_CONDITION_CODE_REGS): Define. + +2013-01-04 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_legitimize_address): Call convert_to_mode + unconditionally. + (ix86_expand_move): Ditto. + (ix86_zero_extend_to_Pmode): Ditto. + (ix86_expand_call): Ditto. + (ix86_expand_special_args_builtin): Ditto. + (ix86_expand_builtin): Ditto. + +2013-01-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55862 + * tree-ssa-pre.c (phi_translate_1): Valueize SSA names after + translating them through PHI nodes. + +2013-01-04 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/55755 + * tree-sra.c (sra_modify_assign): Do not check that an access has no + children when trying to avoid producing a VIEW_CONVERT_EXPR. + +2013-01-04 Marek Polacek <polacek@redhat.com> + + PR middle-end/55859 + * opts.c (default_options_optimization): Clarify error message. + +2013-01-04 Richard Biener <rguenther@suse.de> + + PR middle-end/55863 + * fold-const.c (split_tree): Undo -X - 1 to ~X folding for + reassociation. + +2013-01-03 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR target/53789 + * config/pa/pa.md (movsi): Revert previous change. + * config/pa/pa.c (pa_legitimate_constant_p): Reject all TLS symbol + references. + +2013-01-03 Richard Henderson <rth@redhat.com> + + * config/i386/i386.c (ix86_expand_move): Always assign to op1 + after eliminating TLS symbols. + +2013-01-03 Marc Glisse <marc.glisse@inria.fr> + + PR bootstrap/50167 + * graphite-interchange.c (pdr_stride_in_loop): Use gmp_fprintf. + * graphite-poly.c (debug_gmp_value): Likewise. + +2013-01-03 Uros Bizjak <ubizjak@gmail.com> + + PR target/55712 + * config/i386/i386-c.c (ix86_target_macros_internal): Depending on + selected code model, define __code_mode_small__, __code_model_medium__, + __code_model_large__, __code_model_32__ or __code_model_kernel__. + * config/i386/cpuid.h (__cpuid, __cpuid_count) [__i386__]: Prefix + xchg temporary register with %k. Declare temporary register as + early clobbered. + [__x86_64__]: For medium and large code models, preserve %rbx register. + +2013-01-03 Richard Biener <rguenther@suse.de> + + * tree-data-ref.c (dump_conflict_function): Use less vertical spacing. + (dump_subscript): Adjust. + (finalize_ddr_dependent): Do not dump redundant info. + (analyze_siv_subscript): Adjust. + (subscript_dependence_tester): Likewise. + (compute_affine_dependence): Likewise. + +2013-01-03 Richard Biener <rguenther@suse.de> + + Revert + 2013-01-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55857 + * tree-vect-stmts.c (vectorizable_load): Do not setup + re-alignment for invariant loads. + + 2013-01-02 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.c (vectorizable_load): When vectorizing an + invariant load do not generate a vector load from the scalar location. + +2013-01-03 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_analyze_loop_form): Clarify reason + for not vectorizing. + * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Do + not build INDIRECT_REFs, call get_name once only. + (vect_create_data_ref_ptr): Likewise. Dump base object kind + based on DR_BASE_OBJECT, not DR_BASE_ADDRESS. + +2013-01-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55857 + * tree-vect-stmts.c (vectorizable_load): Do not setup + re-alignment for invariant loads. + +2013-01-03 Richard Biener <rguenther@suse.de> + + PR lto/55848 + * lto-symtab.c (lto_symtab_merge_decls_1): As last resort, always + prefer a built-in decl. + +2013-01-03 Jakub Jelinek <jakub@redhat.com> + + * gcc.c (process_command): Update copyright notice dates. + * gcov.c (print_version): Likewise. + * gcov-dump.c (print_version): Likewise. + + PR rtl-optimization/55838 + * loop-iv.c (iv_number_of_iterations): Call lowpart_subreg on + iv0.step, iv1.step and step. + +2013-01-03 Jakub Jelinek <jakub@redhat.com> + Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/55832 + * fold-const.c (fold_binary_loc): For ABS_EXPR<x> >= 0 and + ABS_EXPR<x> < 0 folding use constant_boolean_node instead of + integer_{one,zero}_node. + +2013-01-03 Jakub Jelinek <jakub@redhat.com> + + PR debug/54402 + * params.def (PARAM_MAX_VARTRACK_REVERSE_OP_SIZE): New param. + * var-tracking.c (reverse_op): Don't add reverse ops to + VALUEs that have already + PARAM_VALUE (PARAM_MAX_VARTRACK_REVERSE_OP_SIZE) or longer locs list. + +2013-01-02 Gerald Pfeifer <gerald@pfeifer.com> + + * doc/contrib.texi: Note years as release manager for Mark Mitchell. + +2013-01-02 Teresa Johnson <tejohnson@google.com> + + * dumpfile.c (dump_loc): Print filename with location. + * tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Use + new location_t parameter to emit complete unroll message with + new dump framework. + (canonicalize_loop_induction_variables): Compute loops location + and pass to try_unroll_loop_completely. + * loop-unroll.c (report_unroll_peel): New function. + (peel_loops_completely): Use new dump format with location + for main dumpfile message, and invoke report_unroll_peel on success. + (decide_unrolling_and_peeling): Ditto. + (decide_peel_once_rolling): Remove old dumpfile message subsumed + by report_unroll_peel. + (decide_peel_completely): Ditto. + (decide_unroll_constant_iterations): Ditto. + (decide_unroll_runtime_iterations): Ditto. + (decide_peel_simple): Ditto. + (decide_unroll_stupid): Ditto. + * cfgloop.c (get_loop_location): New function. + * cfgloop.h (get_loop_location): Declare. + +2013-01-02 Sriraman Tallam <tmsriram@google.com> + + * config/i386/i386.c (fold_builtin_cpu): Remove unnecessary checks for + NULL. + +2013-01-02 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + PR middle-end/55198 + * expr.c (expand_expr_real_1): Don't use bitfield extraction for non + BLKmode objects when EXPAND_MEMORY is specified. + +2013-01-02 Sriraman Tallam <tmsriram@google.com> + + * config/i386/i386.c (ix86_get_function_versions_dispatcher): Fix bug + in loop predicate. + (fold_builtin_cpu): Do not share cpu model decls across statements. + +2013-01-02 Jason Merrill <jason@redhat.com> + + PR c++/55804 + * tree.c (build_array_type_1): Revert earlier change. + +2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com> + + * config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and + "cortex-a57". + * config/aarch64/aarch64-tune.md: Re-generate. + +2013-01-02 Richard Biener <rguenther@suse.de> + + * tree-vect-stmts.c (vectorizable_load): When vectorizing an + invariant load do not generate a vector load from the scalar location. + +2013-01-02 Richard Biener <rguenther@suse.de> + + PR bootstrap/55784 + * configure.ac: Add $GMPINC to CFLAGS/CXXFLAGS. + * configure: Regenerate. + +2013-01-02 Richard Sandiford <rdsandiford@googlemail.com> + + * builtins.c (expand_builtin_mathfn, expand_builtin_mathfn_2) + (expand_builtin_mathfn_ternary, expand_builtin_mathfn_3) + (expand_builtin_int_roundingfn_2): Keep the original target around + for the fallback case. + +2013-01-02 Richard Sandiford <rdsandiford@googlemail.com> + + * tree-vrp.c (range_fits_type_p): Require the MSB of the double_int + to be clear for sign changes. + +2013-01-01 Jan Hubicka <jh@suse.cz> + + * ipa-inline-analysis.c: Fix formatting. + +2013-01-01 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/55831 + * tree-vect-loop.c (get_initial_def_for_induction): Use + gsi_after_labels instead of gsi_start_bb. + +Copyright (C) 2013 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. |