diff options
Diffstat (limited to 'gcc-4.8/gcc/testsuite')
426 files changed, 18514 insertions, 251 deletions
diff --git a/gcc-4.8/gcc/testsuite/ChangeLog b/gcc-4.8/gcc/testsuite/ChangeLog index 5a0b168ba..190837dc0 100644 --- a/gcc-4.8/gcc/testsuite/ChangeLog +++ b/gcc-4.8/gcc/testsuite/ChangeLog @@ -1,3 +1,1865 @@ +2014-05-22 Release Manager + + * GCC 4.8.3 released. + +2014-05-14 Matthias Klose <doko@ubuntu.com> + + PR driver/61106 + * gcc-dg/unused-8a.c: Remove. + +2014-05-13 Peter Bergner <bergner@vnet.ibm.com> + + * lib/target-support.exp (check_dfp_hw_available): New function. + (is-effective-target): Check $arg for dfp_hw. + (is-effective-target-keyword): Likewise. + * gcc.target/powerpc/pack03.c: (dg-require-effective-target): + Change target to dfp_hw. + +2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + Backport from mainline + 2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> + + PR target/60991 + * gcc.target/avr/pr60991.c: New testcase. + +2014-05-09 Georg-Johann Lay <avr@gjlay.de> + + Backport from 2014-05-09 trunk r210267 + + PR target/61055 + * gcc.target/avr/torture/pr61055.c: New test. + +2014-05-08 Matthias Klose <doko@ubuntu.com> + + PR driver/61106 + * gcc-dg/unused-8a.c: New. + * gcc-dg/unused-8b.c: Likewise. + +2014-05-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57864 + * gcc.dg/torture/pr57864.c: New testcase. + +2014-05-06 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-04-14 Richard Biener <rguenther@suse.de> + + PR middle-end/55022 + * gcc.dg/graphite/pr55022.c: New testcase. + +2014-05-06 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-04-17 Richard Biener <rguenther@suse.de> + + PR middle-end/60849 + * g++.dg/opt/pr60849.C: New testcase. + + 2014-04-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60766 + * gcc.dg/torture/pr60766.c: New testcase. + + 2014-04-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60903 + * gcc.dg/torture/pr60903.c: New testcase. + +2014-05-05 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-04-23 Richard Biener <rguenther@suse.de> + + PR middle-end/60895 + * g++.dg/torture/pr60895.C: New testcase. + + 2014-04-07 Richard Biener <rguenther@suse.de> + + PR middle-end/60750 + * g++.dg/torture/pr60750.C: New testcase. + * gcc.dg/tree-ssa/20040517-1.c: Adjust. + + 2014-04-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59817 + PR tree-optimization/60453 + * gfortran.dg/graphite/pr59817.f: New testcase. + * gcc.dg/graphite/pr59817-1.c: Likewise. + * gcc.dg/graphite/pr59817-2.c: Likewise. + + 2014-04-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60836 + * g++.dg/vect/pr60836.cc: New testcase. + +2014-05-05 Jakub Jelinek <jakub@redhat.com> + + Backported from mainline + 2014-04-25 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/60960 + * gcc.c-torture/execute/pr60960.c: New test. + +2014-05-04 Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/pack02.c (dg-options): Add -mhard-float. + (dg-require-effective-target): Change target to powerpc_fprs. + * gcc.target/powerpc/pack03.c (dg-options): Add -mhard-dfp. + (dg-require-effective-target): Change target to dfprt. + +2014-05-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR tree-optimization/60930 + * gcc.dg/torture/pr60930.c: New test. + +2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from mainline + 2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/pack01.c: New test to test the new pack and + unpack builtin functionss for 128-bit types. + * gcc.target/powerpc/pack02.c: Likewise. + * gcc.target/powerpc/pack03.c: Likewise. + * gcc.target/powerpc/extend-divide-1.c: New test to test extended + divide builtin functionss. + * gcc.target/powerpc/extend-divide-2.c: Likewise. + * gcc.target/powerpc/bcd-1.c: New test for the new BCD builtin + functions. + * gcc.target/powerpc/bcd-2.c: Likewise. + * gcc.target/powerpc/bcd-3.c: Likewise. + * gcc.target/powerpc/dfp-builtin-1.c: New test for the new DFP + builtin functionss. + * gcc.target/powerpc/dfp-builtin-2.c: Likewise. + +2014-04-29 Pat Haugen <pthaugen@us.ibm.com> + + Backport from mainline + 2014-04-17 Pat Haugen <pthaugen@us.ibm.com> + + * gcc.target/powerpc/ti_math1.c: New. + * gcc.target/powerpc/ti_math2.c: New. + +2014-04-25 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/20140425-1.c: New test. + +2014-04-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from main line: + 2014-03-27 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/p8vector-vbpermq.c: New test to test the + vbpermq builtin. + +2014-04-23 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-04-21 Uros Bizjak <ubizjak@gmail.com> + + PR target/60909 + * gcc.target/i386/pr60909-1.c: New test. + * gcc.target/i386/pr60909-2.c: Ditto. + +2014-04-23 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-04-02 Richard Biener <rguenther@suse.de> + + PR middle-end/60729 + * g++.dg/vect/pr60729.cc: New testcase. + + 2014-04-03 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60740 + * gcc.dg/graphite/pr60740.c: New testcase. + +2014-04-23 Richard Biener <rguenther@suse.de> + + PR middle-end/60635 + * gfortran.dg/lto/pr60635_0.f90: New testcase. + * gfortran.dg/lto/pr60635_1.c: Likewise. + +2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from the trunk, subversion id 209546. + + 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60735 + * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does + not cause errors if -mspe. + +2014-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests. + * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. + +2014-04-12 Jerry DeLisle <jvdelisle@gcc.gnu> + + Backport from mainline + PR libfortran/60810 + * gfortran.dg/arrayio_13.f90: New test. + +2014-04-11 Hans-Peter Nilsson <hp@axis.com> + + * gfortran.dg/fmt_en.f90: Gate test on effective_target + fd_truncate. + +2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * gcc.target/s390/htm-nofloat-1.c: Rename to ... + * gcc.target/s390/htm-nofloat-compile-1.c: ... this one. + * gcc.target/s390/htm-nofloat-2.c: Add check for htm target and + rename to ... + * gcc.target/s390/htm-nofloat-1.c: ... this one. + * gcc.target/s390/s390.exp: Make sure the assembler supports htm + instructions as well. + +2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * gcc.target/s390/htm-builtins-compile-1.c: Replace long long with + long. + +2014-04-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * gcc.target/s390/htm-builtins-compile-1.c: Remove htm check. + * gcc.target/s390/htm-builtins-compile-2.c: Remove htm check. + +2014-04-10 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/60769 + * g++.dg/pr60769.C: New. + +2014-04-10 Jakub Jelinek <jakub@redhat.com> + + Backport from mainline + 2014-03-12 Jakub Jelinek <jakub@redhat.com> + Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/60502 + * gcc.c-torture/compile/pr60502.c: New test. + + 2014-03-28 Jakub Jelinek <jakub@redhat.com> + + PR target/60693 + * gcc.target/i386/pr60693.c: New test. + + PR c++/60689 + * c-c++-common/pr60689.c: New test. + + 2014-03-22 Jakub Jelinek <jakub@redhat.com> + + PR debug/60603 + * gcc.dg/debug/dwarf2/dwarf2-macro2.c: New test. + + 2014-03-17 Jakub Jelinek <jakub@redhat.com> + + PR target/60516 + * gcc.target/i386/pr60516.c: New test. + + 2014-03-13 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/36282 + * c-c++-common/pr36282-1.c: New test. + * c-c++-common/pr36282-2.c: New test. + * c-c++-common/pr36282-3.c: New test. + * c-c++-common/pr36282-4.c: New test. + + 2014-03-06 Jakub Jelinek <jakub@redhat.com> + + PR target/58595 + * gcc.dg/tls/pr58595.c: New test. + +2014-04-07 Martin Jambor <mjambor@suse.cz> + + PR ipa/60640 + * g++.dg/ipa/pr60640-1.C: New test. + * g++.dg/ipa/pr60640-2.C: Likewise. + * g++.dg/ipa/pr60640-3.C: Likewise. + +2014-04-06 Dominique d'Humieres <dominiq@lps.ens.fr> + Iain Sandoe <iain@codesourcery.com> + + PR target/54083 + * gcc.dg/attr-weakref-1.c: Allow the test on darwin with + the additional options -Wl,-undefined,dynamic_lookup and + -Wl,-flat_namespace + * gcc.dg/torture/pr53922.c: Additional option + -Wl,-flat_namespace for darwin[89]. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline + 2013-04-05 David Edelsohn <dje.gcc@gmail.com> + + * gcc.target/powerpc/sd-vsx.c: Skip on AIX. + * gcc.target/powerpc/sd-pwr6.c: Same. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Back port from trunk + 2014-03-12 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA + 2.07 128-bit arithmetic. + * gcc.target/powerpc/p8vector-int128-2.c: Likewise. + + * gcc.target/powerpc/timode_off.c: Restrict cpu type to power5, + due to when TImode is allowed in VSX registers, the allowable + address modes for TImode is just a single indirect address in + order for the value to be loaded and store in either GPR or VSX + registers. This affects the generated code, and it would cause + this test to fail, when such an option is used. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline r207699. + 2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60137 + * gcc.target/powerpc/pr60137.c: New file. + + Backport from mainline r207808. + 2014-02-15 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60203 + * gcc.target/powerpc/pr60203.c: New testsuite. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Little Endian Vector API Support + Backport from mainline r206590 + 2014-01-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/insert.c: New. + * gcc.dg/vmx/insert-be-order.c: New. + * gcc.dg/vmx/extract.c: New. + * gcc.dg/vmx/extract-be-order.c: New. + + Backport from mainline r206641 + 2014-01-15 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + * gcc.dg/vmx/mult-even-odd.c: New. + * gcc.dg/vmx/mult-even-odd-be-order.c: New. + + Backport from mainline r206926 + 2014-01-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/insert-vsx-be-order.c: New. + * gcc.dg/vmx/extract-vsx.c: New. + * gcc.dg/vmx/extract-vsx-be-order.c: New. + * gcc.dg/vmx/insert-vsx.c: New. + + Backport from mainline r207262 + 2014-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/merge-be-order.c: New. + * gcc.dg/vmx/merge.c: New. + * gcc.dg/vmx/merge-vsx-be-order.c: New. + * gcc.dg/vmx/merge-vsx.c: New. + + Backport from mainline r207318 + 2014-01-30 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/splat.c: New. + * gcc.dg/vmx/splat-vsx.c: New. + * gcc.dg/vmx/splat-be-order.c: New. + * gcc.dg/vmx/splat-vsx-be-order.c: New. + * gcc.dg/vmx/eg-5.c: Remove special casing for little endian. + * gcc.dg/vmx/sn7153.c: Add special casing for little endian. + + Backport from mainline r207414 + 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/vsums.c: New. + * gcc.dg/vmx/vsums-be-order.c: New. + + Backport from mainline r207415 + 2014-02-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/3b-15.c: Remove special handling for little endian. + * gcc.dg/vmx/perm.c: New. + * gcc.dg/vmx/perm-be-order.c: New. + + Backport from mainline r207520 + 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/pack.c: New. + * gcc.dg/vmx/pack-be-order.c: New. + * gcc.dg/vmx/unpack.c: New. + * gcc.dg/vmx/unpack-be-order.c: New. + + Backport from mainline r207521 + 2014-02-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/sum2s.c: New. + * gcc.dg/vmx/sum2s-be-order.c: New. + + Backport from mainline 208019 + 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/ld.c: New test. + * gcc.dg/vmx/ld-be-order.c: New test. + * gcc.dg/vmx/ld-vsx.c: New test. + * gcc.dg/vmx/ld-vsx-be-order.c: New test. + * gcc.dg/vmx/ldl.c: New test. + * gcc.dg/vmx/ldl-be-order.c: New test. + * gcc.dg/vmx/ldl-vsx.c: New test. + * gcc.dg/vmx/ldl-vsx-be-order.c: New test. + * gcc.dg/vmx/st.c: New test. + * gcc.dg/vmx/st-be-order.c: New test. + * gcc.dg/vmx/st-vsx.c: New test. + * gcc.dg/vmx/st-vsx-be-order.c: New test. + * gcc.dg/vmx/stl.c: New test. + * gcc.dg/vmx/stl-be-order.c: New test. + * gcc.dg/vmx/stl-vsx.c: New test. + * gcc.dg/vmx/stl-vsx-be-order.c: New test. + + Backport from mainline 208021 + 2014-02-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/vsums.c: Check entire result vector. + * gcc.dg/vmx/vsums-be-order.c: Likewise. + + Backport from mainline 208049 + 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/lde.c: New test. + * gcc.dg/vmx/lde-be-order.c: New test. + * gcc.dg/vmx/ste.c: New test. + * gcc.dg/vmx/ste-be-order.c: New test. + + Backport from mainline 208120 + 2014-02-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/ld-vsx.c: Don't use vec_all_eq. + * gcc.dg/vmx/ld-vsx-be-order.c: Likewise. + * gcc.dg/vmx/ldl-vsx.c: Likewise. + * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise. + * gcc.dg/vmx/merge-vsx.c: Likewise. + * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. + + Backport from mainline 208321 + 2014-03-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/extract-vsx.c: Replace "vector long" with "vector + long long" throughout. + * gcc.dg/vmx/extract-vsx-be-order.c: Likewise. + * gcc.dg/vmx/insert-vsx.c: Likewise. + * gcc.dg/vmx/insert-vsx-be-order.c: Likewise. + * gcc.dg/vmx/ld-vsx.c: Likewise. + * gcc.dg/vmx/ld-vsx-be-order.c: Likewise. + * gcc.dg/vmx/ldl-vsx.c: Likewise. + * gcc.dg/vmx/ldl-vsx-be-order.c: Likewise. + * gcc.dg/vmx/merge-vsx.c: Likewise. + * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. + * gcc.dg/vmx/st-vsx.c: Likewise. + * gcc.dg/vmx/st-vsx-be-order.c: Likewise. + * gcc.dg/vmx/stl-vsx.c: Likewise. + * gcc.dg/vmx/stl-vsx-be-order.c: Likewise. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Back port from mainline + 2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59909 + * gcc.target/powerpc/quad-atomic.c: New file to test power8 quad + word atomic functions at runtime. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline + 2013-10-23 Pat Haugen <pthaugen@us.ibm.com> + + * gcc.target/powerpc/direct-move.h: Fix header for executable tests. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline + 2013-04-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/56843 + * gcc.target/powerpc/recip-1.c: Modify expected output. + * gcc.target/powerpc/recip-3.c: Likewise. + * gcc.target/powerpc/recip-4.c: Likewise. + * gcc.target/powerpc/recip-5.c: Add expected output for iterations. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline + 2013-08-19 Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/dfp-dd-2.c: New test. + * gcc.target/powerpc/dfp-td-2.c: Likewise. + * gcc.target/powerpc/dfp-td-3.c: Likewise. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + ELFv2 ABI Support + Backport from mainline r204808: + + 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gcc.target/powerpc/ppc64-abi-1.c (stack_frame_t): Remove + compiler and linker field if _CALL_ELF == 2. + * gcc.target/powerpc/ppc64-abi-2.c (stack_frame_t): Likewise. + * gcc.target/powerpc/ppc64-abi-dfp-1.c (stack_frame_t): Likewise. + * gcc.dg/stack-usage-1.c (SIZE): Update value for _CALL_ELF == 2. + + 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gcc.target/powerpc/ppc64-abi-dfp-1.c (FUNC_START): New macro. + (WRAPPER): Use it. + * gcc.target/powerpc/no-r11-1.c: Skip on powerpc_elfv2. + * gcc.target/powerpc/no-r11-2.c: Skip on powerpc_elfv2. + * gcc.target/powerpc/no-r11-3.c: Skip on powerpc_elfv2. + + 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * lib/target-supports.exp (check_effective_target_powerpc_elfv2): + New function. + * gcc.target/powerpc/pr57949-1.c: Disable for powerpc_elfv2. + * gcc.target/powerpc/pr57949-2.c: Likewise. + + Backport from mainline r204799: + + 2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * g++.dg/eh/ppc64-sighandle-cr.C: New test. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline r201750. + Note: Default setting of -mcompat-align-parm inverted! + + 2013-08-14 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/57949 + * gcc.target/powerpc/pr57949-1.c: New. + * gcc.target/powerpc/pr57949-2.c: New. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Little Endian Vector Support + Backport from mainline r205638 + 2013-12-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c: Skip for little + endian. + + Backport from mainline r205146 + 2013-11-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.target/powerpc/pr48258-1.c: Skip for little endian. + + Backport from mainline r204862 + 2013-11-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/3b-15.c: Revise for little endian. + + Backport from mainline r204321 + 2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com> + + * gcc.dg/vmx/vec-set.c: New. + + Backport from mainline r204138 + 2013-10-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.dg/vmx/gcc-bug-i.c: Add little endian variant. + * gcc.dg/vmx/eg-5.c: Likewise. + + Backport from mainline r203930 + 2013-10-22 Bill Schmidt <wschmidt@vnet.ibm.com> + + * gcc.target/powerpc/altivec-perm-1.c: Move the two vector pack + tests into... + * gcc.target/powerpc/altivec-perm-3.c: ...this new test, which is + restricted to big-endian targets. + + Backport from mainline r203246 + 2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.target/powerpc/pr43154.c: Skip for ppc64 little endian. + * gcc.target/powerpc/fusion.c: Likewise. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline + 2013-11-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gfortran.dg/nan_7.f90: Disable for little endian PowerPC. + + Backport from mainline r205106: + + 2013-11-20 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gcc.target/powerpc/darwin-longlong.c (msw): Make endian-safe. + + Backport from mainline r205046: + + 2013-11-19 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * gcc.target/powerpc/ppc64-abi-2.c (MAKE_SLOT): New macro to + construct parameter slot value in endian-independent way. + (fcevv, fciievv, fcvevv): Use it. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Power8 HTM Support + Backport from mainline + * lib/target-supports.exp (check_effective_target_powerpc_htm_ok): New + function to test if HTM is available. + * gcc.target/powerpc/htm-xl-intrin-1.c: New test. + * gcc.target/powerpc/htm-builtin-1.c: New test. + +2014-04-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Power8 Base Support + Backport from mainline + 2013-11-22 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59054 + * gcc.target/powerpc/direct-move.h (VSX_REG_ATTR): Allow test to + specify an appropriate register class for VSX operations. + (load_vsx): Use it. + (load_gpr_to_vsx): Likewise. + (load_vsx_to_gpr): Likewise. + * gcc.target/powerpc/direct-move-vint1.c: Use an appropriate + register class for VSX registers that the type can handle. Remove + checks for explicit number of instructions generated, just check + if the instruction is generated. + * gcc.target/powerpc/direct-move-vint2.c: Likewise. + * gcc.target/powerpc/direct-move-float1.c: Likewise. + * gcc.target/powerpc/direct-move-float2.c: Likewise. + * gcc.target/powerpc/direct-move-double1.c: Likewise. + * gcc.target/powerpc/direct-move-double2.c: Likewise. + * gcc.target/powerpc/direct-move-long1.c: Likewise. + * gcc.target/powerpc/direct-move-long2.c: Likewise. + + * gcc.target/powerpc/bool3-av.c: Limit to 64-bit mode for now. + * gcc.target/powerpc/bool3-p7.c: Likewise. + * gcc.target/powerpc/bool3-p8.c: Likewise. + + * gcc.target/powerpc/p8vector-ldst.c: Just check that the + appropriate instructions are generated, don't check the count. + + 2013-11-12 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/59054 + * gcc.target/powerpc/pr59054.c: New test. + + 2013-08-22 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/pr57744.c: Declare abort. + + 2013-07-18 Pat Haugen <pthaugen@us.ibm.com> + + * gcc.target/powerpc/pr57744.c: Fix typo. + + Back port from mainline + 2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/p8vector-fp.c: New test for floating point + scalar operations when using -mupper-regs-sf and -mupper-regs-df. + * gcc.target/powerpc/ppc-target-1.c: Update tests to allow either + VSX scalar operations or the traditional floating point form of + the instruction. + * gcc.target/powerpc/ppc-target-2.c: Likewise. + * gcc.target/powerpc/recip-3.c: Likewise. + * gcc.target/powerpc/recip-5.c: Likewise. + * gcc.target/powerpc/pr72747.c: Likewise. + * gcc.target/powerpc/vsx-builtin-3.c: Likewise. + + Back port from mainline + 2013-09-27 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/p8vector-ldst.c: New test for -mupper-regs-sf + and -mupper-regs-df. + + Back port from mainline + 2013-10-17 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/58673 + * gcc.target/powerpc/pr58673-1.c: New file to test whether + -mquad-word + -mno-vsx-timode causes errors. + * gcc.target/powerpc/pr58673-2.c: Likewise. + + + Backport from trunk. + 2013-07-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/bool2.h: New file, test the code generation + of logical operations for power5, altivec, power7, and power8 systems. + * gcc.target/powerpc/bool2-p5.c: Likewise. + * gcc.target/powerpc/bool2-av.c: Likewise. + * gcc.target/powerpc/bool2-p7.c: Likewise. + * gcc.target/powerpc/bool2-p8.c: Likewise. + * gcc.target/powerpc/bool3.h: Likewise. + * gcc.target/powerpc/bool3-av.c: Likewise. + * gcc.target/powerpc/bool2-p7.c: Likewise. + * gcc.target/powerpc/bool2-p8.c: Likewise. + + Backport from trunk. + 2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/fusion.c: New file, test power8 fusion support. + + Back port from the trunk + 2013-06-28 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/57744 + * gcc.target/powerpc/pr57744.c: New test to make sure lqarx and + stqcx. get even registers. + + Back port from the trunk + + 2013-06-12 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/atomic-p7.c: New file, add tests for atomic + load/store instructions on power7, power8. + * gcc.target/powerpc/atomic-p8.c: Likewise. + + Back port from the trunk + + 2013-06-10 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/direct-move-vint1.c: New tests for power8 + direct move instructions. + * gcc.target/powerpc/direct-move-vint2.c: Likewise. + * gcc.target/powerpc/direct-move.h: Likewise. + * gcc.target/powerpc/direct-move-float1.c: Likewise. + * gcc.target/powerpc/direct-move-float2.c: Likewise. + * gcc.target/powerpc/direct-move-double1.c: Likewise. + * gcc.target/powerpc/direct-move-double2.c: Likewise. + * gcc.target/powerpc/direct-move-long1.c: Likewise. + * gcc.target/powerpc/direct-move-long2.c: Likewise. + + Backport from the trunk + + 2013-06-06 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/p8vector-builtin-1.c: New test to test + power8 builtin functions. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c: New + tests to test power8 auto-vectorization. + * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c: Likewise. + * gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c: Likewise. + + * gcc.target/powerpc/crypto-builtin-1.c: Use effective target + powerpc_p8vector_ok instead of powerpc_vsx_ok. + + * gcc.target/powerpc/bool.c: New file, add eqv, nand, nor tests. + + * lib/target-supports.exp (check_p8vector_hw_available) Add power8 + support. + (check_effective_target_powerpc_p8vector_ok): Likewise. + (is-effective-target): Likewise. + (check_vect_support_and_set_flags): Likewise. + + Backport from trunk + + 2013-05-22 Michael Meissner <meissner@linux.vnet.ibm.com> + Pat Haugen <pthaugen@us.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * gcc.target/powerpc/crypto-builtin-1.c: New file, test for power8 + crypto builtins. + + Backport from mainline + 2013-03-20 Michael Meissner <meissner@linux.vnet.ibm.com> + + * gcc.target/powerpc/mmfpgpr.c: New test. + * gcc.target/powerpc/sd-vsx.c: Likewise. + * gcc.target/powerpc/sd-pwr6.c: Likewise. + * gcc.target/powerpc/vsx-float0.c: Likewise. + +2014-04-01 Dominique d'Humieres <dominiq@lps.ens.fr> + + PR libfortran/60128 + * gfortran.dg/fmt_en.f90: Skip unsupported rounding tests. + XFAIL for i?86-*-solaris2.9* and hppa*-*-hpux*. + +2014-03-31 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline + 2014-03-31 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/60700 + * gcc.target/i386/pr60700.c: New test. + +2014-03-28 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/60700 + Backport from mainline + 2013-07-30 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * gcc.target/arm/pr57637.c: New testcase. + +2014-04-28 Thomas Koenig <tkoenig@gcc.gnu.org> + + PR fortran/60522 + * gfortran.dg/where_4.f90: New test case. + +2014-03-26 Martin Jambor <mjambor@suse.cz> + + PR ipa/60419 + * g++.dg/ipa/pr60419.C: New test. + +2014-03-26 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/20140326-1.c: New test. + +2014-03-20 Tobias Burnus <burnus@net-b.de> + + PR fortran/60543 + PR fortran/60283 + * gfortran.dg/implicit_pure_4.f90: New. + +2014-03-17 Mikael Pettersson <mikpelinux@gmail.com> + Committed by Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + Backport from mainline: + + 2013-06-16 Joern Rennecke <joern.rennecke@embecosm.com> + + PR rtl-optimization/57425 + PR rtl-optimization/57569 + * gcc.dg/torture/pr57425-1.c, gcc.dg/torture/pr57425-2.c: New files. + * gcc.dg/torture/pr57425-3.c, gcc.dg/torture/pr57569.c: Likewise. + +2014-03-17 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-03-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60429 + PR tree-optimization/60485 + * gcc.dg/pr60485-1.c: New testcase. + * gcc.dg/pr60485-2.c: Likewise. + +2014-03-15 Dominique d'Humieres <dominiq@lps.ens.fr> + + Backport from mainline + PR libfortran/60128 + * gfortran.dg/fmt_en.f90: New test. + +2014-03-15 Jerry DeLisle <jvdelisle@gcc.gnu> + + Backport from mainline + PR libfortran/58324 + * gfortran.dg/list_read_12.f90: New test. + +2014-03-13 Joey Ye <joey.ye@arm.com> + + Backport from mainline + 2014-03-12 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR tree-optimization/60454 + * gcc.c-torture/execute/pr60454.c: New test. + +2014-03-08 Janus Weil <janus@gcc.gnu.org> + + PR fortran/60450 + * gfortran.dg/shape_8.f90: New. + +2014-03-06 Jakub Jelinek <jakub@redhat.com> + + Backport from mainline + 2014-02-19 Jakub Jelinek <jakub@redhat.com> + + PR c/37743 + * g++.dg/ext/builtin-bswap1.C: New test. + * c-c++-common/pr37743.c: New test. + + PR preprocessor/58844 + * c-c++-common/cpp/pr58844-1.c: New test. + * c-c++-common/cpp/pr58844-2.c: New test. + + 2014-02-13 Jakub Jelinek <jakub@redhat.com> + + PR target/43546 + * gcc.target/i386/pr43546.c: New test. + + 2014-02-12 Jakub Jelinek <jakub@redhat.com> + + PR c/60101 + * c-c++-common/pr60101.c: New test. + + 2014-02-11 Jakub Jelinek <jakub@redhat.com> + + PR fortran/52370 + * gfortran.dg/pr52370.f90: New test. + + PR debug/59776 + * gcc.dg/guality/pr59776.c: New test. + + 2014-02-07 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/56824 + * gcc.dg/pr56824.c: New test. + + 2014-02-06 Jakub Jelinek <jakub@redhat.com> + + PR target/60062 + * gcc.c-torture/execute/pr60062.c: New test. + * gcc.c-torture/execute/pr60072.c: New test. + + 2014-02-04 Jakub Jelinek <jakub@redhat.com> + + PR ipa/60026 + * c-c++-common/torture/pr60026.c: New test. + + 2014-02-05 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/57499 + * g++.dg/torture/pr57499.C: New test. + + 2014-03-03 Jakub Jelinek <jakub@redhat.com> + + PR preprocessor/60400 + * c-c++-common/cpp/pr60400.c: New test. + * c-c++-common/cpp/pr60400-1.h: New file. + * c-c++-common/cpp/pr60400-2.h: New file. + +2014-03-04 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60382 + * gcc.dg/vect/pr60382.c: New testcase. + +2014-03-02 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/60341 + * gfortran.dg/str_comp_optimize_1.f90: New test. + +2014-02-25 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-02-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60276 + * gcc.dg/vect/pr60276.c: New testcase. + +2014-02-25 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-02-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60183 + * gcc.dg/torture/pr60183.c: New testcase. + +2014-02-24 Fabien Chêne <fabien@gcc.gnu.org> + + PR c++/37140 + * g++.dg/template/using27.C: New. + * g++.dg/template/using28.C: New. + * g++.dg/template/using29.C: New. + +2014-02-23 David Holsgrove <david.holsgrove@xilinx.com> + + * gcc/testsuite/gcc.target/microblaze/others/mem_reload.c: New test. + +2014-02-22 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/59599 + * gfortran.dg/ichar_3.f90: New test. + +2014-02-21 Steven G. Kargl <kargl@gcc.gnu.org> + + Backport from mainline + PR fortran/59700 + * gfortran.dg/pr59700.f90: New test. + +2014-02-21 Martin Jambor <mjambor@suse.cz> + + PR ipa/55260 + * gcc.dg/ipa/pr55260.c: New test. + +2014-02-19 Tobias Burnus <burnus@net-b.de> + + PR fortran/49397 + * gfortran.dg/proc_ptr_45.f90: New. + * gfortran.dg/proc_ptr_46.f90: New. + +2014-02-19 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-02-19 Uros Bizjak <ubizjak@gmail.com> + + PR target/59794 + * gcc.target/i386/pr39162.c: Add dg-prune-output. + (dg-options): Remove -Wno-psabi. + * gcc.target/i386/pr59794-2.c: Ditto. + * gcc.target/i386/sse-5.c: Ditto. + +2014-02-19 Janus Weil <janus@gcc.gnu.org> + + Backports from mainline: + 2014-02-17 Janus Weil <janus@gcc.gnu.org> + + PR fortran/55907 + * gfortran.dg/init_flag_12.f90: New. + + 2014-02-18 Janus Weil <janus@gcc.gnu.org> + + PR fortran/60231 + * gfortran.dg/typebound_generic_15.f90: New. + +2014-02-18 Kai Tietz <ktietz@redhat.com> + + PR target/60193 + * gcc.target/i386/nest-1.c: New testcase. + +2014-02-18 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/opt32.adb: New test. + +2014-02-15 Jerry DeLisle <jvdelisle@gcc.gnu> + Dominique d'Humieres <dominiq@lps.ens.fr> + + Backport from mainline + PR libfortran/59771 + PR libfortran/59774 + PR libfortran/59836 + * gfortran.dg/fmt_g_1.f90: New test. + * gfortran.dg/round_3.f08: New cases added. + +2014-02-13 Dominik Vogt <vogt@linux.vnet.ibm.com> + + * gcc.target/s390/hotpatch-compile-8.c: New test. + +2014-02-12 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/20140212-1.c: New test. + +2014-02-10 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2014-01-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59903 + * gcc.dg/torture/pr59903.c: New testcase. + + 2014-02-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/60115 + * gcc.dg/torture/pr60115.c: New testcase. + +2014-02-09 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-10-21 Tobias Burnus <burnus@net-b.de> + + PR fortran/58803 + PR fortran/59395 + * gfortran.dg/proc_ptr_comp_38.f90: New. + +2014-02-08 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/57033 + * gfortran.dg/default_initialization_7.f90: New test. + +2014-02-07 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/59906 + * gfortran.dg/elemental_subroutine_9.f90 : New test + +2014-02-04 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2014-02-02 Uros Bizjak <ubizjak@gmail.com> + + PR target/60017 + * gcc.c-torture/execute/pr60017.c: New test. + +2014-02-01 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/59414 + * gfortran.dg/allocate_class_3.f90 : New test + +2014-01-30 David Holsgrove <david.holsgrove@xilinx.com> + + Backport from mainline. + * gcc.target/microblaze/isa/fcmp4.c: New. + +2014-01-26 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/58007 + * gfortran.dg/unresolved_fixup_1.f90: New test. + * gfortran.dg/unresolved_fixup_2.f90: New test. + +2014-01-24 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline. + 2014-01-23 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59929 + * gcc.target/i386/pr59929.c: New test. + +2014-01-24 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/57524 + * g++.dg/ext/timevar2.C: New. + +2014-01-23 David Holsgrove <david.holsgrove@xilinx.com> + + Backport from mainline. + * gcc.target/microblaze/others/builtin-trap.c: New test. + +2014-01-23 Marek Polacek <polacek@redhat.com> + + Backport from mainline + 2013-10-21 Marek Polacek <polacek@redhat.com> + + PR middle-end/58809 + * gcc.dg/gomp/pr58809.c: New test. + +2014-01-23 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58809 + * c-c++-common/gomp/pr58809.c: New test. + +2014-01-22 Marek Polacek <polacek@redhat.com> + + Backport from mainline + 2014-01-22 Marek Polacek <polacek@redhat.com> + + PR c/59891 + * gcc.dg/torture/pr59891.c: New test. + +2014-01-21 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59860 + * gcc.dg/strlenopt-4.c: Expect the same counts on s390*-* as on all + other targets. + +2014-01-20 Richard Biener <rguenther@suse.de> + + PR middle-end/59860 + * gcc.dg/pr59860.c: New testcase. + +2014-01-20 Marek Polacek <polacek@redhat.com> + + Backported from mainline + 2014-01-17 Marek Polacek <polacek@redhat.com> + + PR c++/59838 + * g++.dg/diagnostic/pr59838.C: New test. + +2014-01-19 Paul Thomas <pault@gcc.gnu.org> + + Backport from mainline + 2013-12-01 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/34547 + * gfortran.dg/null_5.f90 : Include new error. + * gfortran.dg/null_6.f90 : Include new error. + +2014-01-17 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline + 2014-01-15 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59794 + * c-c++-common/convert-vec-1.c: Also prune ABI change for + Linux/x86. + * g++.dg/cpp0x/constexpr-53094-2.C: Likewise. + * g++.dg/ext/attribute-test-1.C: Likewise. + * g++.dg/ext/attribute-test-2.C: Likewise. + * g++.dg/ext/attribute-test-3.C: Likewise. + * g++.dg/ext/attribute-test-4.C: Likewise. + * g++.dg/torture/pr38565.C: Likewise. + * gcc.dg/pr53060.c: Likewise. + * c-c++-common/scal-to-vec2.c: Add -msse2 for x86. + * c-c++-common/vector-compare-2.c: Likewise. + * gcc.dg/Wstrict-aliasing-bogus-ref-all-2.c: Likewise. + * g++.dg/conversion/simd1.C: Add -msse2 for x86. Adjust + dg-message line number. + +2014-01-17 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline + 2014-01-14 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59794 + * gcc.target/i386/pr39162.c (y): New __m256i variable. + (bar): Change return type to void. Set y to x. + * gcc.target/i386/pr59794-1.c: New testcase. + * gcc.target/i386/pr59794-2.c: Likewise. + * gcc.target/i386/pr59794-3.c: Likewise. + * gcc.target/i386/pr59794-4.c: Likewise. + * gcc.target/i386/pr59794-5.c: Likewise. + * gcc.target/i386/pr59794-6.c: Likewise. + * gcc.target/i386/pr59794-7.c: Likewise. + +2014-01-17 Matthias Klose <doko@ubuntu.com> + + Backport from the trunk: + 2014-01-09 Uros Bizjak <ubizjak@gmail.com> + * go.test/go-test.exp (go-gc-tests): Don't run peano.go on systems + which don't support -fsplit-stack. Skip rotate[0123].go tests. + +2014-01-15 Kugan Vivekanandarajah <kuganv@linaro.org> + + Backport from mainline + 2014-01-15 Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> + Kugan Vivekanandarajah <kuganv@linaro.org> + + PR target/59695 + * g++.dg/pr59695.C: New testcase. + +2014-01-17 Terry Guo <terry.guo@arm.com> + + * gcc.target/arm/pr59826.c: New test. + +2014-01-16 Jakub Jelinek <jakub@redhat.com> + + PR target/59839 + * gcc.target/i386/pr59839.c: New test. + + PR debug/54694 + * gcc.target/i386/pr9771-1.c (main): Rename to... + (real_main): ... this. Add __asm name "main". + (ASMNAME, ASMNAME2, STRING): Define. + +2014-01-16 Marek Polacek <polacek@redhat.com> + + Backported from mainline + 2014-01-16 Marek Polacek <polacek@redhat.com> + + PR middle-end/59827 + * gcc.dg/pr59827.c: New test. + +2014-01-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + PR target/59803 + * gcc.c-torture/compile/pr59803.c: New testcase. + +2014-01-10 Yufeng Zhang <yufeng.zhang@arm.com> + + * gcc.target/arm/neon/vst1Q_laneu64-1.c: New test. + +2014-01-10 Hans-Peter Nilsson <hp@axis.com> + + * gcc.dg/pr46309.c: Disable for cris*-*-*. + +2014-01-10 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/56060 + PR c++/59730 + * g++.dg/cpp0x/variadic144.C: New. + * g++.dg/cpp0x/variadic145.C: Likewise. + +2014-01-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59715 + * gcc.dg/torture/pr59715.c: New testcase. + +2014-01-09 Richard Sandiford <rdsandiford@googlemail.com> + + * gcc.target/mips/bswap-1.c, gcc.target/mips/bswap-2.c, + gcc.target/mips/bswap-3.c, gcc.target/mips/bswap-4.c, + gcc.target/mips/bswap-5.c, gcc.target/mips/bswap-6.c: New tests. + +2014-01-09 Richard Sandiford <rdsandiford@googlemail.com> + + PR rtl-optimization/59137 + * gcc.target/mips/pr59137.c: New test. + +2014-01-09 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-11-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59125 + PR tree-optimization/54570 + * gcc.dg/builtin-object-size-8.c: Un-xfail. + * gcc.dg/builtin-object-size-14.c: New testcase. + * gcc.dg/strlenopt-14gf.c: Adjust. + * gcc.dg/strlenopt-1f.c: Likewise. + * gcc.dg/strlenopt-4gf.c: Likewise. + + 2013-12-03 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59362 + * gcc.c-torture/compile/pr59362.c: New test. + +2014-01-09 Richard Earnshaw <rearnsha@arm.com> + + PR rtl-optimization/54300 + * gcc.target/arm/pr54300.C: New test. + +2014-01-08 Martin Jambor <mjambor@suse.cz> + + PR ipa/59610 + * gcc.dg/ipa/pr59610.c: New test. + +2014-01-07 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58668 + * gcc.dg/pr58668.c: New test. + + Backported from mainline + 2013-12-16 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58956 + PR middle-end/59470 + * gcc.target/i386/pr59470.c: New test. + +2014-01-04 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2014-01-02 Janus Weil <janus@gcc.gnu.org> + + PR fortran/59654 + * gfortran.dg/dynamic_dispatch_12.f90: New. + +2014-01-03 Joseph Myers <joseph@codesourcery.com> + + * gcc.target/powerpc/rs6000-ldouble-3.c: New test. + +2014-01-03 Jakub Jelinek <jakub@redhat.com> + + PR target/59625 + * gcc.target/i386/pr59625.c: New test. + +2014-01-01 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/59647 + * g++.dg/opt/pr59647.C: New test. + +2013-12-31 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-12-30 Janus Weil <janus@gcc.gnu.org> + + PR fortran/58998 + * gfortran.dg/generic_28.f90: New. + +2013-12-20 Jakub Jelinek <jakub@redhat.com> + + PR c++/59255 + * g++.dg/tree-prof/pr59255.C: New test. + +2013-12-19 James Greenhalgh <james.greenhalgh@arm.com> + + Backport from Mainline + 2013-05-01 James Greenhalgh <james.greenhalgh@arm.com> + + * gcc.target/aarch64/scalar_intrinsics.c (force_simd): New. + (test_vceqd_s64): Force arguments to SIMD registers. + (test_vceqzd_s64): Likewise. + (test_vcged_s64): Likewise. + (test_vcled_s64): Likewise. + (test_vcgezd_s64): Likewise. + (test_vcged_u64): Likewise. + (test_vcgtd_s64): Likewise. + (test_vcltd_s64): Likewise. + (test_vcgtzd_s64): Likewise. + (test_vcgtd_u64): Likewise. + (test_vclezd_s64): Likewise. + (test_vcltzd_s64): Likewise. + (test_vtst_s64): Likewise. + (test_vtst_u64): Likewise. + +2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com> + Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + Backport from mainline + 2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com> + * gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test + * gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test + +2013-12-18 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-12-15 Janus Weil <janus@gcc.gnu.org> + + PR fortran/59493 + * gfortran.dg/unlimited_polymorphic_15.f90: New. + +2013-12-15 Uros Bizjak <ubizjak@gmail.com> + + PR testsuite/58630 + * gcc.target/i386/pr43662.c (dg-options): + Add -maccumulate-outgoing-args. + * gcc.target/i386/pr43869.c (dg-options): Ditto. + * gcc.target/i386/pr57003.c (dg-options): Ditto. + * gcc.target/i386/avx-vzeroupper-16.c (dg-options): + Remove -mtune=generic and add -maccumulate-outgoing-args instead. + * gcc.target/i386/avx-vzeroupper-17.c (dg-options): Ditto. + * gcc.target/i386/avx-vzeroupper-18.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/func-1.c (dg-options): + Add -maccumulate-outgoing-args. + * gcc.target/x86_64/abi/callabi/func-2a.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/func-2b.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/func-indirect.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/func-indirect-2a.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/func-indirect-2b.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/leaf-1.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/leaf-2.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/pr38891.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-1.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-2.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-3.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-4a.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-4b.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-5a.c (dg-options): Ditto. + * gcc.target/x86_64/abi/callabi/vaarg-5b.c (dg-options): Ditto. + +2013-12-12 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59470 + * g++.dg/opt/pr59470.C: New test. + + PR libgomp/59467 + * gfortran.dg/gomp/pr59467.f90: New test. + * c-c++-common/gomp/pr59467.c: New test. + +2013-12-12 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-12-12 Ryan Mansfield <rmansfield@qnx.com> + + PR testsuite/59442 + * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes. + * gcc.target/i386/sse2-movapd-2.c: Likewise. + * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. + * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. + +2013-12-08 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-12-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/59405 + * gcc.target/i386/pr59405.c: New test. + +2013-12-06 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59388 + * gcc.c-torture/execute/pr59388.c: New test. + +2013-12-06 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-11-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59330 + * gcc.dg/torture/pr59330.c: New testcase. + +2013-12-06 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59288 + * gcc.dg/torture/pr59288.c: New testcase. + + 2013-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59164 + * gcc.dg/torture/pr59164.c: New testcase. + + 2013-09-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58137 + * gcc.target/i386/pr58137.c: New testcase. + +2013-12-06 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/51244 + PR target/59343 + * gcc.target/sh/pr51244-19.c: Adjust test case. + +2013-12-05 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-11-19 Richard Biener <rguenther@suse.de> + + PR middle-end/58956 + * gcc.dg/torture/pr58956.c: New testcase. + +2013-12-04 Jakub Jelinek <jakub@redhat.com> + + PR c++/59268 + * g++.dg/cpp0x/constexpr-template6.C: New test. + + PR rtl-optimization/58726 + * gcc.c-torture/execute/pr58726.c: New test. + + PR target/59163 + * g++.dg/torture/pr59163.C: New test. + +2013-12-03 Marek Polacek <polacek@redhat.com> + + Backport from mainline + 2013-12-03 Marek Polacek <polacek@redhat.com> + + PR c/59351 + * gcc.dg/pr59351.c: New test. + +2013-12-03 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/59011 + * gcc.dg/pr59011.c: New test. + + PR target/58864 + * g++.dg/opt/pr58864.C: New test. + +2013-12-02 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59358 + * gcc.c-torture/execute/pr59358.c: New test. + +2013-12-02 Richard Biener <rguenther@suse.de> + + PR tree-optimization/59139 + * gcc.dg/torture/pr59139.c: New testcase. + +2013-11-27 Tom de Vries <tom@codesourcery.com> + Marc Glisse <marc.glisse@inria.fr> + + PR c++/59032 + * c-c++-common/pr59032.c: New testcase. + +2013-11-27 Tom de Vries <tom@codesourcery.com> + Marc Glisse <marc.glisse@inria.fr> + + PR middle-end/59037 + * c-c++-common/pr59037.c: New testcase. + +2013-11-30 Paul Thomas <pault@gcc.gnu.org> + + Backport from mainline + 2013-11-04 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/57445 + * gfortran.dg/optional_class_1.f90 : New test + +2013-11-29 Jakub Jelinek <jakub@redhat.com> + + PR c/59280 + * c-c++-common/pr59280.c: New test. + +2013-11-28 Jakub Jelinek <jakub@redhat.com> + + PR c++/59297 + * g++.dg/gomp/pr59297.C: New test. + +2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + Backport from mainline + 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/arm/vrinta-ce.c: New testcase. + +2013-11-28 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-11-23 Uros Bizjak <ubizjak@gmail.com> + + PR target/56788 + * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>: + Declare as MULTI_ARG_1_SF instruction. + <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction. + * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename + from *xop_vmfrcz_<mode>. + * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss + to merge scalar result with __A. + (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar + result with __A. + +2013-11-28 Terry Guo <terry.guo@arm.com> + + Backport mainline r205391 + 2013-11-26 Terry Guo <terry.guo@arm.com> + + * gcc.target/arm/thumb1-pic-high-reg.c: New case. + * gcc.target/arm/thumb1-pic-single-base.c: New case. + +2013-11-27 Jakub Jelinek <jakub@redhat.com> + + Backported from mainline + 2013-11-27 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59014 + * gcc.c-torture/execute/pr59014-2.c: New test. + + 2013-11-26 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/59014 + * gcc.c-torture/execute/pr59014.c: New test. + +2013-11-27 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/20131127-1.c: New test. + +2013-11-25 Vidya Praveen <vidyapraveen@arm.com> + + Backport from mainline + 2013-10-21 Vidya Praveen <vidyapraveen@arm.com> + + * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort(). + * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit(). + +2013-11-20 Dominik Vogt <vogt@linux.vnet.ibm.com> + + Backport from mainline + * gcc.target/s390/htm-1.c: Rename to ... + * gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c: ... this + one. + * gcc.target/s390/htm-xl-intrin-1.c: Rename to ... + * gcc.target/s390/htm-builtins-compile-3.c: ... this one. + * gcc.target/s390/htm-builtins-compile-2.c: New testcase. + * gcc.target/s390/htm-builtins-1.c: New testcase. + * gcc.target/s390/htm-builtins-2.c: New testcase. + * gcc.target/s390/s390.exp: Add check for htm machine. + +2013-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57517 + * gfortran.fortran-torture/compile/pr57517.f90: New testcase. + * gcc.dg/torture/pr57517.c: Likewise. + +2013-11-19 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-11-05 Richard Biener <rguenther@suse.de> + + PR middle-end/58941 + * gcc.dg/torture/pr58941.c: New testcase. + +2013-11-18 Richard Biener <rguenther@suse.de> + + Backport from mainline + 2013-10-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58794 + * c-c++-common/torture/pr58794-1.c: New testcase. + * c-c++-common/torture/pr58794-2.c: Likewise. + + 2013-10-21 Richard Biener <rguenther@suse.de> + + PR middle-end/58742 + * c-c++-common/fold-divmul-1.c: New testcase. + + 2013-11-06 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58653 + * gcc.dg/tree-ssa/predcom-6.c: New testcase. + * gcc.dg/tree-ssa/predcom-7.c: Likewise. + + PR tree-optimization/59047 + * gcc.dg/torture/pr59047.c: New testcase. + + 2013-10-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/58143 + * gcc.dg/torture/pr58143-1.c: New testcase. + * gcc.dg/torture/pr58143-2.c: Likewise. + * gcc.dg/torture/pr58143-3.c: Likewise. + +2013-11-17 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-11-07 Janus Weil <janus@gcc.gnu.org> + + PR fortran/58471 + * gfortran.dg/constructor_9.f90: New. + +2013-11-16 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-09-20 Janus Weil <janus@gcc.gnu.org> + + PR fortran/58099 + * gfortran.dg/proc_ptr_43.f90: New. + +2013-11-16 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/58771 + * gfortran.dg/derived_external_function_1.f90 : New test + +2013-11-14 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-11-06 Uros Bizjak <ubizjak@gmail.com> + + PR target/59021 + * gcc.target/i386/pr59021.c: New test. + +2013-11-14 Jakub Jelinek <jakub@redhat.com> + + PR target/59101 + * gcc.c-torture/execute/pr59101.c: New test. + +2013-11-11 Jakub Jelinek <jakub@redhat.com> + + Backported from mainline + 2013-11-06 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/58970 + * gcc.c-torture/compile/pr58970-1.c: New test. + * gcc.c-torture/compile/pr58970-2.c: New test. + + 2013-11-05 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/58997 + * gcc.c-torture/compile/pr58997.c: New test. + +2013-11-10 Wei Mi <wmi@google.com> + + * gcc.dg/pr57518.c: Backport regex fix from r200720. + +2013-11-07 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline + 2013-11-07 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59034 + * gcc.target/i386/pr59034-1.c: New test. + * gcc.target/i386/pr59034-2.c: Likewise. + +2013-11-06 Wei Mi <wmi@google.com> + + PR regression/58985 + * gcc.dg/pr57518.c: Add subreg in regexp pattern. + +2013-11-05 Steven G. Kargl <kargl@gcc.gnu.org> + + PR fortran/58989 + * gfortran.dg/reshape_6.f90: New test. + +2013-11-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/58984 + * gcc.c-torture/execute/pr58984.c: New test. + +2013-11-04 Marek Polacek <polacek@redhat.com> + + Backport from mainline + 2013-11-04 Marek Polacek <polacek@redhat.com> + + PR c++/58979 + * g++.dg/diagnostic/pr58979.C: New test. + +2013-11-03 H.J. Lu <hongjiu.lu@intel.com> + + Backport from mainline + 2013-10-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/58690 + * gcc.target/i386/pr58690.c: New test + +2013-11-02 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline + 2013-09-23 Janus Weil <janus@gcc.gnu.org> + + PR fortran/58355 + * gfortran.dg/extends_15.f90: New. + +2013-10-29 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-08-08 Richard Sandiford <rdsandiford@googlemail.com> + + PR rtl-optimization/58079 + * gcc.dg/torture/pr58079.c: New test. + +2013-10-28 Tom de Vries <tom@codesourcery.com> + + * gcc.target/arm/require-pic-register-loc.c: New test. + +2013-10-26 Uros Bizjak <ubizjak@gmail.com> + + Backport from mainline + 2013-10-22 Uros Bizjak <ubizjak@gmail.com> + + PR target/58779 + * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY + and MINUSCCZEXT defines. Update scan-assembler dg directive. + * gcc.dg/torture/pr58779.c: New test. + +2013-10-25 Richard Henderson <rth@redhat.com> + + PR rtl/58542 + * gcc.dg/atomic-store-6.c: New. + +2013-10-25 Tom de Vries <tom@codesourcery.com> + + PR c++/58282 + * g++.dg/tm/noexcept-6.C: New test. + +2013-10-25 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.c-torture/execute/pr58831.c: New test. + +2013-10-23 Tom de Vries <tom@codesourcery.com> + + PR tree-optimization/58805 + * gcc.dg/pr58805.c: New test. + +2013-10-23 Richard Biener <rguenther@suse.de> + + * gcc.dg/torture/pr58830.c: New testcase. + + Backport from mainline + 2013-06-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/57488 + * gcc.dg/torture/pr57488.c: New testcase. + +2013-10-19 Oleg Endo <olegendo@gcc.gnu.org> + + * gcc.target/sh/pr54089-3.c: Fix test for load of constant 31. + +2013-10-17 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58596 + * g++.dg/cpp0x/lambda/lambda-nsdmi5.C: New + +2013-10-16 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58633 + * g++.dg/cpp0x/decltype57.C: New. + * g++.dg/cpp0x/enum18.C: Revert r174385 changes. + 2013-10-16 Release Manager * GCC 4.8.2 released. @@ -494,7 +2356,7 @@ 2013-06-19 Wei Mi <wmi@google.com> PR rtl-optimization/57518 - * testsuite/gcc.dg/pr57518.c: New test. + * gcc.dg/pr57518.c: New test. 2013-06-11 Tobias Burnus <burnus@net-b.de> @@ -1102,7 +2964,7 @@ 2013-03-29 Tobias Burnus <burnus@net-b.de> PR fortran/56737 - * testsuite/gfortran.dg/fmt_cache_3.f90: New. + * gfortran.dg/fmt_cache_3.f90: New. 2013-04-02 Richard Biener <rguenther@suse.de> @@ -1636,7 +3498,7 @@ 2013-02-20 Jan Hubicka <jh@suse.cz> PR tree-optimization/56265 - * testsuite/g++.dg/ipa/devirt-11.C: New testcase. + * g++.dg/ipa/devirt-11.C: New testcase. 2013-02-20 Richard Biener <rguenther@suse.de> @@ -1823,11 +3685,9 @@ Avoid instrumenting duplicated memory access in the same basic block * c-c++-common/asan/no-redundant-instrumentation-1.c: New test. - * testsuite/c-c++-common/asan/no-redundant-instrumentation-2.c: - Likewise. - * testsuite/c-c++-common/asan/no-redundant-instrumentation-3.c: - Likewise. - * testsuite/c-c++-common/asan/inc.c: Likewise. + * c-c++-common/asan/no-redundant-instrumentation-2.c: Likewise. + * c-c++-common/asan/no-redundant-instrumentation-3.c: Likewise. + * c-c++-common/asan/inc.c: Likewise. 2013-02-12 Vladimir Makarov <vmakarov@redhat.com> diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-1.c b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-1.c new file mode 100644 index 000000000..3abf8a768 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-1.c @@ -0,0 +1,8 @@ +/* PR preprocessor/58844 */ +/* { dg-do compile } */ +/* { dg-options "-ftrack-macro-expansion=0" } */ + +#define A x######x +int A = 1; +#define A x######x /* { dg-message "previous definition" } */ +#define A x##x /* { dg-warning "redefined" } */ diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-2.c b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-2.c new file mode 100644 index 000000000..1e219152f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr58844-2.c @@ -0,0 +1,8 @@ +/* PR preprocessor/58844 */ +/* { dg-do compile } */ +/* { dg-options "-ftrack-macro-expansion=2" } */ + +#define A x######x +int A = 1; +#define A x######x /* { dg-message "previous definition" } */ +#define A x##x /* { dg-warning "redefined" } */ diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-1.h b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-1.h new file mode 100644 index 000000000..3e32175fe --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-1.h @@ -0,0 +1,3 @@ +??=ifndef PR60400_1_H +??=define PR60400_1_H +??=endif diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-2.h b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-2.h new file mode 100644 index 000000000..d9a590636 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400-2.h @@ -0,0 +1,4 @@ +??=ifndef PR60400_2_H +??=define PR60400_2_H +??=include "pr60400-1.h" +??=endif diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400.c b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400.c new file mode 100644 index 000000000..fc3e0d9f4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/cpp/pr60400.c @@ -0,0 +1,13 @@ +/* PR preprocessor/60400 */ +/* { dg-do compile } */ +/* { dg-options "-trigraphs -Wtrigraphs" } */ + +??=include "pr60400-1.h" +??=include "pr60400-2.h" + +/* { dg-warning "trigraph" "" { target *-*-* } 1 } */ +/* { dg-warning "trigraph" "" { target *-*-* } 2 } */ +/* { dg-warning "trigraph" "" { target *-*-* } 3 } */ +/* { dg-warning "trigraph" "" { target *-*-* } 4 } */ +/* { dg-warning "trigraph" "" { target *-*-* } 5 } */ +/* { dg-warning "trigraph" "" { target *-*-* } 6 } */ diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/fold-divmul-1.c b/gcc-4.8/gcc/testsuite/c-c++-common/fold-divmul-1.c new file mode 100644 index 000000000..5c867923d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/fold-divmul-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-fdump-tree-original" } */ + +int * +fx (int *b, int *e) +{ + return b + (e - b); +} + +/* { dg-final { scan-tree-dump-not "/\\\[ex\\\]" "original" } } */ +/* { dg-final { cleanup-tree-dump "original" } } */ diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr58809.c b/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr58809.c new file mode 100644 index 000000000..d1ea51b99 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr58809.c @@ -0,0 +1,31 @@ +/* PR middle-end/58809 */ +/* { dg-do compile } */ +/* { dg-options "-fopenmp" } */ + +_Complex int j; +_Complex double d; + +void +foo (void) +{ + #pragma omp parallel reduction (&:j) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (|:j) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (^:j) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (min:j) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (max:j) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (&:d) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (|:d) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (^:d) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (min:d) /* { dg-error "has invalid type for" } */ + ; + #pragma omp parallel reduction (max:d) /* { dg-error "has invalid type for" } */ + ; +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr59467.c b/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr59467.c new file mode 100644 index 000000000..475182a62 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/gomp/pr59467.c @@ -0,0 +1,68 @@ +/* PR libgomp/59467 */ + +int v; + +void +foo (void) +{ + int x = 0, y = 0; + #pragma omp parallel + { + int z; + #pragma omp single copyprivate (x) /* { dg-error "is not threadprivate or private in outer context" } */ + { + #pragma omp atomic write + x = 6; + } + #pragma omp atomic read + z = x; + #pragma omp atomic + y += z; + } + #pragma omp parallel + { + int z; + #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */ + { + #pragma omp atomic write + v = 6; + } + #pragma omp atomic read + z = v; + #pragma omp atomic + y += z; + } + #pragma omp parallel private (x) + { + int z; + #pragma omp single copyprivate (x) + { + #pragma omp atomic write + x = 6; + } + #pragma omp atomic read + z = x; + #pragma omp atomic + y += z; + } + x = 0; + #pragma omp parallel reduction (+:x) + { + #pragma omp single copyprivate (x) + { + #pragma omp atomic write + x = 6; + } + #pragma omp atomic + y += x; + } + #pragma omp single copyprivate (x) + { + x = 7; + } + #pragma omp single copyprivate (v) /* { dg-error "is not threadprivate or private in outer context" } */ + { + #pragma omp atomic write + v = 6; + } +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-1.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-1.c new file mode 100644 index 000000000..abe11e7ec --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-1.c @@ -0,0 +1,12 @@ +/* PR middle-end/36282 */ +/* { dg-do compile } */ + +#pragma weak bar + +extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n); +extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */ + +void +foo (void) +{ +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-2.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-2.c new file mode 100644 index 000000000..86d3ad657 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-2.c @@ -0,0 +1,10 @@ +/* PR middle-end/36282 */ +/* { dg-do compile } */ + +extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n); +extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */ + +void +foo (void) +{ +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-3.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-3.c new file mode 100644 index 000000000..8982470c0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-3.c @@ -0,0 +1,13 @@ +/* PR middle-end/36282 */ +/* { dg-do compile } */ + +void bar (void); +#pragma weak bar + +extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n); +extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */ + +void +foo (void) +{ +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-4.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-4.c new file mode 100644 index 000000000..f6f40f8e4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr36282-4.c @@ -0,0 +1,13 @@ +/* PR middle-end/36282 */ +/* { dg-do compile } */ + +#pragma weak bar +void bar (void); + +extern void *baz (void *dest, const void *src, __SIZE_TYPE__ n); +extern __typeof (baz) baz __asm("bazfn"); /* { dg-bogus "asm declaration ignored due to conflict with previous rename" } */ + +void +foo (void) +{ +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr37743.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr37743.c new file mode 100644 index 000000000..2ea678e09 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr37743.c @@ -0,0 +1,13 @@ +/* PR c/37743 */ +/* This needs to be run only on targets where __UINT32_TYPE__ is defined + to unsigned int. */ +/* { dg-do compile { target *-*-linux-gnu* } } */ +/* { dg-options "-Wformat" } */ + +int foo (const char *, ...) __attribute__ ((format (printf, 1, 2))); + +void +bar (unsigned int x) +{ + foo ("%x", __builtin_bswap32 (x)); +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr59032.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr59032.c new file mode 100644 index 000000000..327f5aeb6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr59032.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void +foo() +{ + float v __attribute__((vector_size(8))); + v++; +} + +void +foo2 () +{ + float v __attribute__((vector_size(8))); + ++v; +} + +void +foo3 () +{ + float v __attribute__((vector_size(8))); + v--; +} + +void +foo4 () +{ + float v __attribute__((vector_size(8))); + --v; +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr59037.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr59037.c new file mode 100644 index 000000000..fae13c2fa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr59037.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +typedef int v4si __attribute__ ((vector_size (16))); + +int +main (int argc, char** argv) +{ + v4si x = {0,1,2,3}; + x = (v4si) {(x)[3], (x)[2], (x)[1], (x)[0]}; + return x[4]; +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr59280.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr59280.c new file mode 100644 index 000000000..779f0fb85 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr59280.c @@ -0,0 +1,4 @@ +/* PR c/59280 */ +/* { dg-do compile } */ + +void bar (char *) __attribute__((constructor(foo))); /* { dg-error "constructor priorities must be integers|was not declared|constructor priorities are not supported" } */ diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr60101.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr60101.c new file mode 100644 index 000000000..b1634c49f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr60101.c @@ -0,0 +1,112 @@ +/* PR c/60101 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wall" } */ + +extern int *a, b, *c, *d; + +void +foo (double _Complex *x, double _Complex *y, double _Complex *z, unsigned int l, int w) +{ + unsigned int e = (unsigned int) a[3]; + double _Complex (*v)[l][4][e][l][4] = (double _Complex (*)[l][4][e][l][4]) z; + double _Complex (*f)[l][b][l] = (double _Complex (*)[l][b][l]) y; + unsigned int g = c[0] * c[1] * c[2]; + unsigned int h = d[0] + c[0] * (d[1] + c[1] * d[2]); + unsigned int i; + + for (i = 0; i < e; i++) + { + int j = e * d[3] + i; + + unsigned int n0, n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11; + float _Complex s = 0.; + unsigned int t = 0; + + for (n0 = 0; n0 < l; n0++) + for (n1 = 0; n1 < l; n1++) + for (n2 = 0; n2 < l; n2++) + for (n3 = 0; n3 < l; n3++) + for (n4 = 0; n4 < l; n4++) + for (n5 = 0; n5 < l; n5++) + for (n6 = 0; n6 < l; n6++) + for (n7 = 0; n7 < l; n7++) + for (n8 = 0; n8 < l; n8++) + for (n9 = 0; n9 < l; n9++) + for (n10 = 0; n10 < l; n10++) + for (n11 = 0; n11 < l; n11++) + { + if (t % g == h) + s + += f[n0][n4][j][n8] * f[n1][n5][j][n9] * ~(f[n2][n6][w][n10]) * ~(f[n3][n7][w][n11]) + * (+0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.25 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + - 0.5 * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0] + - 0.5 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + + 0.25 * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] + - 0.5 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + + 0.25 * v[0][n3][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n10][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] + + 0.25 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + - 0.5 * v[0][n3][0][i][n9][1] * v[0][n10][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0] + + 0.25 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 1. * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n2][0][i][n5][1] * v[0][n3][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] + + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n6][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] + + 0.25 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n11][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n6][1][i][n0][0] + - 0.5 * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n6][1][i][n1][0] * v[0][n7][1][i][n0][0] + + 1. * v[0][n10][0][i][n9][1] * v[0][n3][0][i][n5][1] * v[0][n2][0][i][n4][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n6][1][i][n0][0] + + 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n8][0] + - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n11][1][i][n1][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n8][0] + - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n10][0][i][n1][0] + + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n1][0] * v[0][n10][0][i][n0][0] + + 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n0][0] * v[0][n10][0][i][n1][0] + - 0.5 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n3][0][i][n5][1] + * v[0][n11][1][i][n8][0] * v[0][n7][1][i][n1][0] * v[0][n10][0][i][n0][0] + - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] + * v[0][n7][1][i][n1][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n8][0] + - 0.25 * v[0][n6][1][i][n4][1] * v[0][n2][0][i][n9][1] * v[0][n10][0][i][n5][1] + * v[0][n7][1][i][n8][0] * v[0][n11][1][i][n0][0] * v[0][n3][0][i][n1][0]); + t++; + } + int u = (j - w + b) % b; + int q = (j >= w ? +1 : -1); + int r = q; + x[u] += r * s; + } +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/pr60689.c b/gcc-4.8/gcc/testsuite/c-c++-common/pr60689.c new file mode 100644 index 000000000..9475bd835 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/pr60689.c @@ -0,0 +1,10 @@ +/* PR c++/60689 */ +/* { dg-do compile } */ + +struct S { char x[9]; }; + +void +foo (struct S *x, struct S *y, struct S *z) +{ + __atomic_exchange (x, y, z, __ATOMIC_SEQ_CST); +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-1.c b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-1.c new file mode 100644 index 000000000..175629fec --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-1.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ + +struct S0 +{ + int f; +}; + +struct S1 +{ + struct S0 f1; + volatile int f2; +}; + +struct S2 +{ + struct S1 g; +} a, b; + +static int *c[1][2] = {{0, (int *)&a.g.f2}}; +static int d; + +int +main () +{ + for (d = 0; d < 1; d++) + for (b.g.f1.f = 0; b.g.f1.f < 1; b.g.f1.f++) + *c[b.g.f1.f][d + 1] = 0; + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-2.c b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-2.c new file mode 100644 index 000000000..767798806 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr58794-2.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ + +struct S +{ + volatile int f; +} a; + +unsigned int b; + +static int *c[1][2] = {{0, (int *)&a.f}}; +static unsigned int d; + +int +main () +{ + for (; d < 1; d++) + for (; b < 1; b++) + *c[b][d + 1] = 0; + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr60026.c b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr60026.c new file mode 100644 index 000000000..1cc5f55a4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/c-c++-common/torture/pr60026.c @@ -0,0 +1,28 @@ +/* PR ipa/60026 */ +/* { dg-do compile } */ + +struct S { int f; } a; + +__attribute__((optimize (0))) +struct S foo (int x, struct S y) +{ + int b = y.f; + return a; +} + +void +bar () +{ + while (a.f) + { + struct S c = {0}; + foo (0, c); + } +} + +int +main () +{ + bar (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/access02.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/access02.C new file mode 100644 index 000000000..74960a66a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/access02.C @@ -0,0 +1,39 @@ +// PR c++/58954 +// { dg-require-effective-target c++11 } + +template<class T> +T&& declval(); + +template<class T> +struct foo_argument +{ + template<class Ret, class C, class Arg> + static Arg test(Ret (C::*)(Arg)); + + typedef decltype(test(&T::template foo<>)) type; +}; + +template<class T, class> +struct dependent { typedef T type; }; + +template<class T> +struct base +{ + template<class Ignore = void> + auto foo(int i) -> decltype(declval< + typename dependent<T&, Ignore>::type + >().foo_impl(i)); +}; + +struct derived : base<derived> +{ + friend struct base<derived>; +private: + int foo_impl(int i); +}; + +int main() +{ + foo_argument<derived>::type var = 0; + return var; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C new file mode 100644 index 000000000..c444217b0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/alias-decl-41.C @@ -0,0 +1,18 @@ +// PR c++/60182 +// { dg-require-effective-target c++11 } + +class B {}; +template <typename> using __allocator_base = B; +template <typename> class F : __allocator_base<int> {}; +class C {}; +template <typename, typename = F<int> > class G : C {}; +template <typename> class D; +class A { + using Container = G<D<char>>; + A(); + A(D<char> const &); + Container m_elements; +}; +template <template <class, class> class C, class A = F<D<int>>> +void doSomething(C<D<char>, A> &); +A::A(D<char> const &) : A() { doSomething(m_elements); } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/auto42.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/auto42.C new file mode 100644 index 000000000..fea4c28d8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/auto42.C @@ -0,0 +1,9 @@ +// PR c++/60628 +// { dg-do compile { target c++11 } } + +#include <initializer_list> + +void foo(int i) +{ + auto x[1] = { 0 }; // { dg-error "array of .auto" } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C new file mode 100644 index 000000000..eac6004ae --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/constexpr-template6.C @@ -0,0 +1,20 @@ +// PR c++/59268 +// { dg-do compile } +// { dg-options "-std=c++11" } + +template <typename> +struct A +{ + constexpr A (int) {} + virtual void foo () + { + constexpr A<void> a (0); + } +}; + +void +bar () +{ + A<int> a (3); + a.foo (); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/decltype57.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/decltype57.C new file mode 100644 index 000000000..353cc72c3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/decltype57.C @@ -0,0 +1,8 @@ +// PR c++/58633 +// { dg-do compile { target c++11 } } + +void foo(int i) +{ + typedef int I; + decltype(i.I::~I())* p; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/defaulted48.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/defaulted48.C new file mode 100644 index 000000000..727afc5ca --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/defaulted48.C @@ -0,0 +1,17 @@ +// PR c++/60108 +// { dg-require-effective-target c++11 } + +template<int> struct A +{ + virtual ~A(); +}; + +template<typename> struct B : A<0>, A<1> +{ + ~B() = default; +}; + +struct C : B<bool> +{ + C() {} +}; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/deleted3.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/deleted3.C new file mode 100644 index 000000000..67836773a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/deleted3.C @@ -0,0 +1,11 @@ +// PR c++/60216 +// { dg-require-effective-target c++11 } + +struct A +{ + template<typename T> A(T) = delete; +}; + +template<> A::A<int>(int) {} + +A a(0); diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/enum_base2.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/enum_base2.C new file mode 100644 index 000000000..8c6a9011d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/enum_base2.C @@ -0,0 +1,9 @@ +// PR c++/60187 +// { dg-require-effective-target c++11 } + +template<typename... T> struct A +{ + enum E : T {}; // { dg-error "parameter pack" } +}; + +A<int> a; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist76.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist76.C new file mode 100644 index 000000000..ac419dde8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist76.C @@ -0,0 +1,5 @@ +// PR c++/58812 +// { dg-require-effective-target c++11 } + +int i; +int&& j{{ i }}; // { dg-error "too many braces" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist78.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist78.C new file mode 100644 index 000000000..648ec5307 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist78.C @@ -0,0 +1,12 @@ +// PR c++/58639 +// { dg-require-effective-target c++11 } + +struct node { + node &parent; +}; + +struct vector { + node n; +}; + +vector v({}); // { dg-error "" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist79.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist79.C new file mode 100644 index 000000000..5a1914dda --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist79.C @@ -0,0 +1,8 @@ +// PR c++/59646 +// { dg-require-effective-target c++11 } + +#include <initializer_list> + +struct A {}; + +std::initializer_list<volatile A> x = {{}}; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist81.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist81.C new file mode 100644 index 000000000..5978c6388 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist81.C @@ -0,0 +1,25 @@ +// PR c++/60713 +// { dg-options "-O" } +// { dg-do compile { target c++11 } } + +template < class x0, class x1, class x2, class x3, class x4 > +int *x5 (x0 *, x2 (x1::*)(x3, x4)); + +class x6 +{ + void x7 (); + struct x8 + { + int *x9; + }; + void x10 (x8); + void x11 (int *, int *); +}; + +void +x6::x7 () +{ + x10 ({ + x5 (this, &x6::x11) + }); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist82.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist82.C new file mode 100644 index 000000000..3b9ccad66 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/initlist82.C @@ -0,0 +1,20 @@ +// PR c++/60708 +// { dg-do compile { target c++11 } } + +template <class T, class U> struct mypair { + mypair(T, U) {} +}; + +template<typename T> struct S { + mypair<T *, int> get_pair() noexcept { + return mypair<T*,int>(nullptr, 0); + } +}; + +static void foo(const mypair<char *, int> (&a)[2]) noexcept { } + +int main() +{ + S<char> s; + foo({s.get_pair(), s.get_pair()}); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C new file mode 100644 index 000000000..1d2778fb5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nsdmi5.C @@ -0,0 +1,7 @@ +// PR c++/58596 +// { dg-do compile { target c++11 } } + +struct A +{ + int i = [] { return decltype(i)(); }(); +}; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/noexcept22.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/noexcept22.C new file mode 100644 index 000000000..7aab0f43c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/noexcept22.C @@ -0,0 +1,21 @@ +// PR c++/60046 +// { dg-require-effective-target c++11 } + +constexpr bool foo () { return noexcept (true); } +template <typename T> +struct V +{ + void bar (V &) noexcept (foo ()) {} +}; +template <typename T> +struct W : public V <int> +{ + void bar (W &x) { V <int>::bar (x); } +}; + +int +main () +{ + W <int> a, b; + a.bar (b); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C new file mode 100644 index 000000000..35f6509df --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi-union3.C @@ -0,0 +1,10 @@ +// PR c++/58965 +// { dg-require-effective-target c++11 } + +void foo() +{ + static union + { + int i = i; + }; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C new file mode 100644 index 000000000..febe0ecac --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/nsdmi9.C @@ -0,0 +1,13 @@ +// PR c++/58162 +// { dg-require-effective-target c++11 } + +struct A { + A(); + A(A&&); +}; + +struct B { + A const a = A(); +}; + +B b; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/static_assert9.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/static_assert9.C new file mode 100644 index 000000000..fccaa449c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/static_assert9.C @@ -0,0 +1,7 @@ +// PR c++/58837 +// { dg-require-effective-target c++11 } + +void f(); +static_assert(f, ""); +struct A {}; +static_assert(A::~A, ""); // { dg-error "non-static member function" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic144.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic144.C new file mode 100644 index 000000000..5d05d3d52 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic144.C @@ -0,0 +1,15 @@ +// PR c++/56060 +// { dg-do compile { target c++11 } } + +template<typename T> struct baz { }; +template<typename T> T bar(); + +template<typename T, typename ... U> +baz<decltype(bar<T>()(bar<U> ...))> // { dg-error "cannot be used" } +foo(); + +int main() +{ + foo<int>(); // { dg-error "no matching" } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic145.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic145.C new file mode 100644 index 000000000..65edda59f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic145.C @@ -0,0 +1,13 @@ +// PR c++/59730 +// { dg-do compile { target c++11 } } + +template <typename> void declval(); +template <typename> void forward(); +template <typename> class D; +template <typename _Functor, typename... _Bound_args> +class D <_Functor(_Bound_args...)> { + template <typename... _Args, decltype(declval<_Functor>)> + void operator()(...) { + 0(forward<_Args>...); + } +}; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic147.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic147.C new file mode 100644 index 000000000..7f606d84a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic147.C @@ -0,0 +1,10 @@ +// PR c++/58466 +// { dg-require-effective-target c++11 } + +template<char, char...> struct A; + +template<typename> struct B; + +template<char... C> struct B<A<C...>> {}; + +B<A<'X'>> b; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic148.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic148.C new file mode 100644 index 000000000..a4ee63533 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic148.C @@ -0,0 +1,6 @@ +// PR c++/59989 +// { dg-require-effective-target c++11 } + +template<typename T> struct X {}; +template<template<typename...> class D, typename ...U> int test(D<U...>*); +int n = test<X, int>(0); // { dg-error "no match" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic149.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic149.C new file mode 100644 index 000000000..a250e7c29 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic149.C @@ -0,0 +1,11 @@ +// PR c++/60248 +// { dg-options "-std=c++11 -g -fabi-version=2" } + +template<int...> struct A {}; + +template<> struct A<0> +{ + typedef enum { e } B; +}; + +A<0> a; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic150.C b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic150.C new file mode 100644 index 000000000..6a30efed9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/cpp0x/variadic150.C @@ -0,0 +1,9 @@ +// PR c++/60219 +// { dg-require-effective-target c++11 } + +template<typename..., int> void foo(); + +void bar() +{ + foo<0>; // { dg-error "" } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pedantic.C b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pedantic.C new file mode 100644 index 000000000..450a0fac6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pedantic.C @@ -0,0 +1,11 @@ +// { dg-do compile } +// { dg-options "-pedantic" } +typedef void F(void); + +void foo() +{ + void* p = 0; + F* f1 = reinterpret_cast<F*>(p); // { dg-warning "ISO" } +#pragma GCC diagnostic ignored "-pedantic" + F* f2 = reinterpret_cast<F*>(p); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr58979.C b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr58979.C new file mode 100644 index 000000000..6be3f1436 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr58979.C @@ -0,0 +1,4 @@ +// PR c++/58979 +// { dg-do compile } + +int i = 0->*0; // { dg-error "invalid type argument of" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr59838.C b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr59838.C new file mode 100644 index 000000000..d1cf2c7fa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/diagnostic/pr59838.C @@ -0,0 +1,4 @@ +// PR c++/59838 +// { dg-do compile } + +enum E { a, b = (E) a }; // { dg-error "conversion to incomplete type" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C b/gcc-4.8/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C new file mode 100644 index 000000000..325617360 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/eh/ppc64-sighandle-cr.C @@ -0,0 +1,54 @@ +// { dg-do run { target { powerpc64*-*-linux* } } } +// { dg-options "-fexceptions -fnon-call-exceptions" } + +#include <signal.h> +#include <stdlib.h> +#include <fenv.h> + +#define SET_CR(R,V) __asm__ __volatile__ ("mtcrf %0,%1" : : "n" (1<<(7-R)), "r" (V<<(4*(7-R))) : "cr" #R) +#define GET_CR(R) ({ int tmp; __asm__ __volatile__ ("mfcr %0" : "=r" (tmp)); (tmp >> 4*(7-R)) & 15; }) + +void sighandler (int signo, siginfo_t * si, void * uc) +{ + SET_CR(2, 3); + SET_CR(3, 2); + SET_CR(4, 1); + + throw 0; +} + +float test (float a, float b) __attribute__ ((__noinline__)); +float test (float a, float b) +{ + float x; + asm ("mtcrf %1,%2" : "=f" (x) : "n" (1 << (7-3)), "r" (0), "0" (b) : "cr3"); + return a / x; +} + +int main () +{ + struct sigaction sa; + int status; + + sa.sa_sigaction = sighandler; + sa.sa_flags = SA_SIGINFO; + + status = sigaction (SIGFPE, & sa, NULL); + + feenableexcept (FE_DIVBYZERO); + + SET_CR(2, 6); + SET_CR(3, 9); + SET_CR(4, 12); + + try { + test (1, 0); + } + catch (...) { + return GET_CR(2) != 6 || GET_CR(3) != 9 || GET_CR(4) != 12; + } + + return 1; +} + + diff --git a/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught1.C b/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught1.C index afbf5af4d..e96af334a 100644 --- a/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught1.C +++ b/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught1.C @@ -13,7 +13,7 @@ struct Check { static Check const data[] = { { 0, 0, false }, // construct [0] - { 1, 0, true }, // [1] = [0] + { 1, 0, false }, // [1] = [0] { 0, 0, true }, // destruct [0] { 2, 1, true }, // [2] = [1] { 2, 2, true }, // destruct [2] diff --git a/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught4.C b/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught4.C new file mode 100644 index 000000000..227d11b33 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/eh/uncaught4.C @@ -0,0 +1,29 @@ +// PR c++/41174 +// { dg-do run } + +#include <exception> + +#define assert(E) if (!(E)) __builtin_abort(); + +struct e { + e() + { + assert( !std::uncaught_exception() ); + try { + throw 1; + } catch (int i) { + assert( !std::uncaught_exception() ); + throw; + } + } +}; + +int main() +{ + try { + throw e(); + } catch (int i) { + assert( !std::uncaught_exception() ); + } + assert( !std::uncaught_exception() ); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/attrib48.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/attrib48.C new file mode 100644 index 000000000..19a995910 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/attrib48.C @@ -0,0 +1,6 @@ +// PR c++/54652 + +typedef unsigned L __attribute__ ((aligned)); +typedef unsigned L __attribute__ ((aligned)); + +L l; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/builtin-bswap1.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/builtin-bswap1.C new file mode 100644 index 000000000..787ecba43 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/builtin-bswap1.C @@ -0,0 +1,22 @@ +// PR c/37743 +// { dg-do compile } + +#if defined(__UINT32_TYPE__) && defined(__INT32_TYPE__) + +void foo (__UINT32_TYPE__); +void foo (__INT32_TYPE__); + +void +bar (__UINT32_TYPE__ x) +{ + foo (__builtin_bswap32 (x)); +} + +#else + +void +bar () +{ +} + +#endif diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/stmtexpr15.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/stmtexpr15.C new file mode 100644 index 000000000..83a831cdd --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/stmtexpr15.C @@ -0,0 +1,7 @@ +// PR c++/59097 +// { dg-options "" } + +void foo() +{ + int x[({ return; })]; // { dg-error "non-integral" } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/timevar2.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/timevar2.C new file mode 100644 index 000000000..74c4fc8cf --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/timevar2.C @@ -0,0 +1,14 @@ +// PR c++/57524 +// { dg-options "-ftime-report" } +// { dg-prune-output "wall" } +// { dg-prune-output "times" } +// { dg-prune-output "TOTAL" } +// { dg-prune-output "checks" } + +namespace detail { +namespace indirect_traits {} +using namespace indirect_traits; +void fn1() { +using namespace detail; +} +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/traits1.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/traits1.C new file mode 100644 index 000000000..24099e53c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/traits1.C @@ -0,0 +1,4 @@ +// PR c++/58504 + +template<bool = __has_nothrow_assign(void)> struct A {}; +A<> a; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/vector25.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/vector25.C new file mode 100644 index 000000000..6c1f5d098 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/vector25.C @@ -0,0 +1,6 @@ +volatile int i __attribute__((vector_size(8))); + +void foo() +{ + i += i; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ext/vector27.C b/gcc-4.8/gcc/testsuite/g++.dg/ext/vector27.C new file mode 100644 index 000000000..288e13c55 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ext/vector27.C @@ -0,0 +1,7 @@ +// PR c++/58845 + +void foo() +{ + int v __attribute__((vector_size(8))); + v = v || v; // { dg-bogus "" "" { xfail *-*-* } } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/gomp/for-20.C b/gcc-4.8/gcc/testsuite/g++.dg/gomp/for-20.C new file mode 100644 index 000000000..7b57b16b8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/gomp/for-20.C @@ -0,0 +1,16 @@ +// PR c++/60146 +// { dg-do compile } +// { dg-options -fopenmp } + +int foo() { return 0; } + +template<typename T> void bar() +{ +#pragma omp parallel for + for (T i = foo(); i < 8; ++i) {} +} + +void baz() +{ + bar<int>(); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/gomp/pr59297.C b/gcc-4.8/gcc/testsuite/g++.dg/gomp/pr59297.C new file mode 100644 index 000000000..330ed2e00 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/gomp/pr59297.C @@ -0,0 +1,25 @@ +// PR c++/59297 +// { dg-do compile } +// { dg-options "-fopenmp" } + +template <typename T> +struct A +{ + ~A (); + const T &operator[] (int) const; +}; + +struct B +{ + int &operator () (A <int>); +}; + +void +foo (B &x, int &z) +{ + A<A<int> > y; + #pragma omp atomic + x (y[0]) += 1; + #pragma omp atomic + z += x(y[1]); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/inherit/virtual11.C b/gcc-4.8/gcc/testsuite/g++.dg/inherit/virtual11.C new file mode 100644 index 000000000..04c241293 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/inherit/virtual11.C @@ -0,0 +1,17 @@ +// PR c++/59031 +// { dg-do compile } +// { dg-options "-fdump-tree-gimple " } +class B { + public: + virtual int add (int a, int b) {return a+ b;} +}; + +class D : public B { +}; + +int foo (int a, int b) { + D d; + return d.add(a, b); +} +// { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "gimple" } } +// { dg-final { cleanup-tree-dump "gimple" } } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60419.C b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60419.C new file mode 100644 index 000000000..84461f3ac --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60419.C @@ -0,0 +1,80 @@ +// PR middle-end/60419 +// { dg-do compile } +// { dg-options "-O2" } + +struct C +{ +}; + +struct I : C +{ + I (); +}; + +struct J +{ + void foo (); + J (); + virtual void foo (int &, int); +}; + +template <class> +struct D +{ + virtual void foo (I &) const; + void bar () + { + I p; + foo (p); + } +}; + +struct K : J, public D<int> +{ +}; + +struct F +{ + K *operator->(); +}; + +struct N : public K +{ + void foo (int &, int); + I n; + void foo (I &) const {} +}; + +struct L : J +{ + F l; +}; + +struct M : F +{ + L *operator->(); +}; + +struct G +{ + G (); +}; + +M h; + +G::G () +try +{ + N f; + f.bar (); + throw; +} +catch (int) +{ +} + +void +baz () +{ + h->l->bar (); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-1.C b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-1.C new file mode 100644 index 000000000..7a0b91893 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-1.C @@ -0,0 +1,50 @@ +// { dg-do compile } +// { dg-options "-O3" } + +class ASN1Object +{ +public: + virtual ~ASN1Object (); +}; +class A +{ + virtual unsigned m_fn1 () const; +}; +class B +{ +public: + ASN1Object Element; + virtual unsigned m_fn1 (bool) const; +}; +template <class BASE> class C : public BASE +{ +}; + +class D : ASN1Object, public B +{ +}; +class G : public D +{ + unsigned m_fn1 (bool) const {} +}; +class F : A +{ +public: + F (A); + unsigned m_fn1 () const + { + int a; + a = m_fn2 ().m_fn1 (0); + return a; + } + const B &m_fn2 () const { return m_groupParameters; } + C<G> m_groupParameters; +}; +template <class D> void BenchMarkKeyAgreement (int *, int *, int) +{ + A f; + D d (f); +} + +void BenchmarkAll2 () { BenchMarkKeyAgreement<F>(0, 0, 0); } + diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-2.C b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-2.C new file mode 100644 index 000000000..c6e614cc0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-2.C @@ -0,0 +1,15 @@ +// { dg-do compile } +// { dg-options "-O3" } + +struct B { virtual unsigned f () const; }; +struct C { virtual void f (); }; +struct F { virtual unsigned f (bool) const; ~F (); }; +struct J : C, F {}; +struct G : J { unsigned f (bool) const { return 0; } }; +struct H : B +{ + H (int); + unsigned f () const { return ((const F &) h).f (0); } + G h; +}; +H h (0); diff --git a/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-3.C b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-3.C new file mode 100644 index 000000000..21b1f58a0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/ipa/pr60640-3.C @@ -0,0 +1,81 @@ +// { dg-do run } +// { dg-options "-O3" } + +struct Distraction +{ + char fc[8]; + virtual Distraction * return_self () + { return this; } +}; + +namespace { + +struct A; +static A * __attribute__ ((noinline, noclone)) get_an_A (); + +static int go; + +struct A +{ + int fi; + + A () : fi(777) {} + A (int pi) : fi (pi) {} + virtual A * foo (int p) = 0; +}; + +struct B; +static B * __attribute__ ((noinline, noclone)) get_a_B (); + +struct B : public Distraction, A +{ + B () : Distraction(), A() { } + B (int pi) : Distraction (), A (pi) {} + virtual B * foo (int p) + { + int o = fi; + for (int i = 0; i < p; i++) + o += i + i * i; + go = o; + + return get_a_B (); + } +}; + + +struct B gb1 (1111), gb2 (2); +static B * __attribute__ ((noinline, noclone)) +get_a_B () +{ + return &gb1; +} + +static A * __attribute__ ((noinline, noclone)) +get_an_A () +{ + return &gb2; +} + +} + +static int __attribute__ ((noinline, noclone)) +get_a_number () +{ + return 5; +} + +extern "C" void abort (void); + +int main (int argc, char *argv[]) +{ + for (int i = 0; i < get_a_number (); i++) + { + struct A *p = get_an_A (); + struct A *r = p->foo (4); + if (r->fi != 1111) + abort (); + if (go != 22) + abort (); + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/opt/pr58864.C b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr58864.C new file mode 100644 index 000000000..b8587f298 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr58864.C @@ -0,0 +1,21 @@ +// PR target/58864 +// { dg-do compile } +// { dg-options "-Os" } +// { dg-additional-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } + +struct A { A (); ~A (); }; +struct B { B (); }; + +float d, e; + +void +foo () +{ + A a; + float c = d; + while (1) + { + B b; + e = c ? -c : 0; + } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59470.C b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59470.C new file mode 100644 index 000000000..4698ab717 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59470.C @@ -0,0 +1,188 @@ +// PR middle-end/59470 +// { dg-do run } +// { dg-options "-O2 -fstack-protector" } +// { dg-additional-options "-fPIC" { target fpic } } +// { dg-require-effective-target fstack_protector } + +struct A +{ + int a1; + A () throw () : a1 (0) {} +}; + +struct B +{ + unsigned int b1 () throw (); +}; + +__attribute__((noinline, noclone)) unsigned int +B::b1 () throw () +{ + asm volatile ("" : : : "memory"); + return 0; +} + +struct C +{ + const A **c1; + void c2 (const A *, unsigned int); +}; + +__attribute__((noinline, noclone)) void +C::c2 (const A *, unsigned int) +{ + asm volatile ("" : : : "memory"); +} + +struct D +{ + C *d1; +}; + +struct E +{ + int e1; + int e2; + D e3; +}; + +struct F +{ + virtual int f1 (const char * s, int n); +}; + +struct G +{ + F *g1; + bool g2; + G & g3 (const char * ws, int len) + { + if (__builtin_expect (!g2, true) + && __builtin_expect (this->g1->f1 (ws, len) != len, false)) + g2 = true; + return *this; + } +}; + +struct H : public A +{ + const char *h1; + unsigned int h2; + bool h3; + const char *h4; + char h5; + char h6; + char h7[31]; + bool h8; + H () : h1 (0), h2 (0), h4 (0), h5 (0), h6 (0), h8 (false) {} + void h9 (const D &) __attribute__((noinline, noclone)); +}; + +void +H::h9 (const D &) +{ + h3 = true; + __builtin_memset (h7, 0, sizeof (h7)); + asm volatile ("" : : : "memory"); +}; + +B b; + +inline const H * +foo (const D &x) +{ + const unsigned int i = b.b1 (); + const A **j = x.d1->c1; + if (!j[i]) + { + H *k = 0; + try + { + k = new H; + k->h9 (x); + } + catch (...) + { + } + x.d1->c2 (k, i); + } + return static_cast <const H *>(j[i]); +} + +__attribute__((noinline, noclone)) int +bar (char *x, unsigned long v, const char *y, int z, bool w) +{ + asm volatile ("" : : "r" (x), "r" (v), "r" (y) : "memory"); + asm volatile ("" : : "r" (z), "r" (w) : "memory"); + return 8; +} + +__attribute__((noinline, noclone)) void +baz (void *z, const char *g, unsigned int h, char s, E &e, char *n, char *c, int &l) +{ + asm volatile ("" : : "r" (z), "r" (g), "r" (h) : "memory"); + asm volatile ("" : : "r" (s), "r" (&e), "r" (n) : "memory"); + asm volatile ("" : : "r" (c), "r" (&l) : "memory"); + if (n == c) + __builtin_abort (); + int i = 0; + asm ("" : "+r" (i)); + if (i == 0) + __builtin_exit (0); +} + +__attribute__((noinline, noclone)) G +test (void *z, G s, E &x, char, long v) +{ + const D &d = x.e3; + const H *h = foo (d); + const char *q = h->h7; + const int f = x.e2; + const int i = 5 * sizeof (long); + char *c = static_cast <char *>(__builtin_alloca (i)); + const int b = f & 74; + const bool e = (b != 64 && b != 8); + const unsigned long u = ((v > 0 || !e) ? (unsigned long) v : -(unsigned long) v); + int l = bar (c + i, u, q, f, e); + c += i - l; + if (h->h3) + { + char *c2 = static_cast <char *>(__builtin_alloca ((l + 1) * 2)); + baz (z, h->h1, h->h2, h->h6, x, c2 + 2, c, l); + c = c2 + 2; + } + if (__builtin_expect (e, true)) + { + } + else if ((f & 4096) && v) + { + { + const bool m = f & 176; + *--c = q[m]; + *--c = q[1]; + } + } + const int w = x.e1; + if (w > l) + { + char * c3 = static_cast <char *>(__builtin_alloca (w)); + c = c3; + } + return s.g3 (c, l); +} + +int +main () +{ + H h; + const A *j[1]; + C c; + G g; + E e; + h.h9 (e.e3); + j[0] = &h; + c.c1 = j; + e.e3.d1 = &c; + test (0, g, e, 0, 0); + __builtin_abort (); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59647.C b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59647.C new file mode 100644 index 000000000..1fc5067d8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr59647.C @@ -0,0 +1,32 @@ +// PR rtl-optimization/59647 +// { dg-do compile } +// { dg-options "-O2 -fno-tree-vrp" } +// { dg-additional-options "-msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } + +void f1 (int); +void f2 (); +double f3 (int); + +struct A +{ + int f4 () const + { + if (a == 0) + return 1; + return 0; + } + unsigned f5 () + { + if (!f4 ()) + f2 (); + return a; + } + int a; +}; + +void +f6 (A *x) +{ + unsigned b = x->f5 (); + f1 (b - 1 - f3 (x->f5 () - 1U)); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/opt/pr60849.C b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr60849.C new file mode 100644 index 000000000..52d8826b0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/opt/pr60849.C @@ -0,0 +1,13 @@ +// { dg-do compile } +// { dg-options "-O2" } + +int g; + +extern "C" int isnan (); + +void foo(float a) { + int (*xx)(...); + xx = isnan; + if (xx(a)) + g++; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/overload/defarg8.C b/gcc-4.8/gcc/testsuite/g++.dg/overload/defarg8.C new file mode 100644 index 000000000..b3ddfbb76 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/overload/defarg8.C @@ -0,0 +1,22 @@ +// PR c++/60367 +// { dg-do run { target c++11 } } + +extern "C" int printf (const char *, ...); +extern "C" void abort(); + +void *p; +struct foo { + foo() { p = this; } + foo (const foo &) { abort(); } + ~foo() { if (p != this) abort(); } +}; + +void do_something( foo f = {} ) +{ + if (&f != p) abort(); +} + +int main() +{ + do_something(); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/pr60769.C b/gcc-4.8/gcc/testsuite/g++.dg/pr60769.C new file mode 100644 index 000000000..4c896c699 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/pr60769.C @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +template <class T> void fun(T); +struct B {}; +struct R { + int *x; + B f; +}; +R v(int &, R); +void rfun(R &); +struct A { + void m_fn2(R p1) { + R a = p1; + rfun(p1); + fun(this); + fun(a); + } +}; +struct J { + A ep; + A ap; + int c2a; + void m_fn1(R &p2) { + R d, e, b; + v(c2a, p2); + e = v(c2a, b); + ap.m_fn2(e); + v(c2a, p2); + d = v(c2a, b); + ep.m_fn2(d); + } +}; +struct N { + int &p_; + J cfo; +}; +void fn3(N&n) { + R h; + n.cfo.m_fn1(h); +} +extern N &c; +void fn1() { fn3(c); } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/partial15.C b/gcc-4.8/gcc/testsuite/g++.dg/template/partial15.C new file mode 100644 index 000000000..357bb05fa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/partial15.C @@ -0,0 +1,19 @@ +// PR c++/57043 +// { dg-do link } + +template<typename D> struct complex { }; + +template<typename Tp> +complex<Tp> +pow(const complex<Tp>& x, const complex<Tp>& y) { return complex<Tp>(); } + +template<typename T, typename U> +struct promote_2 { typedef T type; }; + +template<typename Tp, typename Up> +complex<typename promote_2<Tp, Up>::type> +pow(const complex<Tp>& x, const complex<Up>& y); + +complex<double> (*powcc)(const complex<double>&, const complex<double>&) = pow; + +int main() {} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/ref7.C b/gcc-4.8/gcc/testsuite/g++.dg/template/ref7.C new file mode 100644 index 000000000..432929272 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/ref7.C @@ -0,0 +1,16 @@ +// PR c++/60274 + +typedef const char *const& ProtocolIdType; + +template <ProtocolIdType protocolId> +struct C { + typedef int ProtocolVersion; + struct D { + ProtocolVersion GetProtocolVersion(); + }; +}; +template <ProtocolIdType protocolId> +typename C<protocolId>::ProtocolVersion C<protocolId>::D::GetProtocolVersion() +{ + return 1; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/shadow1.C b/gcc-4.8/gcc/testsuite/g++.dg/template/shadow1.C new file mode 100644 index 000000000..6eb30d094 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/shadow1.C @@ -0,0 +1,4 @@ +// PR c++/58632 + +template<template<int I> class A> // { dg-message "shadows" } +class A {}; // { dg-error "declaration" } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/using27.C b/gcc-4.8/gcc/testsuite/g++.dg/template/using27.C new file mode 100644 index 000000000..f1835e171 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/using27.C @@ -0,0 +1,33 @@ +// PR c++/37140 + +struct X +{ + typedef int nested_type; +}; + +template <class T> +struct A +{ + typedef X type; +}; + +template <class T> +struct B : A<T> +{ + using typename A<T>::type; + typename type::nested_type x; +}; + +template <class T> +struct C : B<T> +{ + using typename B<T>::type; + typename type::nested_type y; +}; + +struct D : C<int> +{ + using C<int>::type; + type::nested_type z; +}; + diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/using28.C b/gcc-4.8/gcc/testsuite/g++.dg/template/using28.C new file mode 100644 index 000000000..52f68cfe4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/using28.C @@ -0,0 +1,17 @@ +// PR c++/37140 + +struct C +{ + static const int block_size = 1; +}; + +template <typename T> struct A { + typedef C type; +}; + +template <typename T> struct B : public A<T> { + using typename A<T>::type; + static const int block_size = type::block_size; +}; + +template class B<int>; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/template/using29.C b/gcc-4.8/gcc/testsuite/g++.dg/template/using29.C new file mode 100644 index 000000000..8726547ef --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/template/using29.C @@ -0,0 +1,21 @@ +// PR c++/58047 + +template <int N> +struct print_arg { }; + +struct const_holder { + static const int CONSTANT = 42; +}; + +template <typename T> +struct identity { + typedef T type; +}; + +template <class T> +struct test_case : public identity<T> { + using typename identity<T>::type; + print_arg<type::CONSTANT> printer; +}; + +template struct test_case<const_holder>; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local-ice2.C b/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local-ice2.C new file mode 100644 index 000000000..53bc29780 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local-ice2.C @@ -0,0 +1,11 @@ +// PR c++/58672 +// { dg-options "-std=c++11" } +// { dg-require-effective-target tls } + +struct A +{ + A(int); + i; // { dg-error "" } +}; + +thread_local A a(0); diff --git a/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local8.C b/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local8.C new file mode 100644 index 000000000..9b91a6b9a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/tls/thread_local8.C @@ -0,0 +1,12 @@ +// PR c++/55800 +// { dg-options "-std=c++11" } +// { dg-require-alias "" } +// { dg-require-effective-target tls } +// { dg-final { scan-assembler "_ZTH12foo_instance" { target tls_native } } } + +struct foo +{ + foo(); +}; + +thread_local foo foo_instance; diff --git a/gcc-4.8/gcc/testsuite/g++.dg/tm/noexcept-6.C b/gcc-4.8/gcc/testsuite/g++.dg/tm/noexcept-6.C new file mode 100644 index 000000000..4391159e2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/tm/noexcept-6.C @@ -0,0 +1,23 @@ +// { dg-do compile } +// { dg-options "-fno-exceptions -fgnu-tm -O -std=c++0x -fdump-tree-tmlower" } + +struct TrueFalse +{ + static constexpr bool v() { return true; } +}; + +int global; + +template<typename T> int foo() +{ + return __transaction_atomic noexcept(T::v()) (global + 1); +} + +int f1() +{ + return foo<TrueFalse>(); +} + +/* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */ +/* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */ +/* { dg-final { cleanup-tree-dump "tmlower" } } */ diff --git a/gcc-4.8/gcc/testsuite/g++.dg/tm/pr60004.C b/gcc-4.8/gcc/testsuite/g++.dg/tm/pr60004.C new file mode 100644 index 000000000..b8c2c0e03 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/tm/pr60004.C @@ -0,0 +1,10 @@ +// { dg-do compile } +// { dg-options "-fgnu-tm" } + +int a; +int f() { + __transaction_atomic { + if (a == 5) + return 1; + } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/torture/pr57499.C b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr57499.C new file mode 100644 index 000000000..fd985a199 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr57499.C @@ -0,0 +1,14 @@ +// PR middle-end/57499 +// { dg-do compile } + +struct S +{ + ~S () __attribute__ ((noreturn)) {} // { dg-warning "function does return" } +}; + +void +foo () +{ + S s; + throw 1; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/torture/pr59163.C b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr59163.C new file mode 100644 index 000000000..2f9a99970 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr59163.C @@ -0,0 +1,30 @@ +// PR target/59163 +// { dg-do run } + +struct A { float a[4]; }; +struct B { int b; A a; }; + +__attribute__((noinline, noclone)) void +bar (A &a) +{ + if (a.a[0] != 36.0f || a.a[1] != 42.0f || a.a[2] != 48.0f || a.a[3] != 54.0f) + __builtin_abort (); +} + +__attribute__((noinline, noclone)) void +foo (A &a) +{ + int i; + A c = a; + for (i = 0; i < 4; i++) + c.a[i] *= 6.0f; + a = c; + bar (a); +} + +int +main () +{ + B b = { 5, { 6, 7, 8, 9 } }; + foo (b.a); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60609.C b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60609.C new file mode 100644 index 000000000..9ddec0b60 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60609.C @@ -0,0 +1,252 @@ +/* { dg-do assemble } */ + +class exception +{ +}; +class bad_alloc:exception +{ +}; +class logic_error:exception +{ +}; +class domain_error:logic_error +{ +}; +class invalid_argument:logic_error +{ +}; +class length_error:logic_error +{ +}; +class overflow_error:exception +{ +}; +typedef int mpz_t[]; +template < class > class __gmp_expr; +template <> class __gmp_expr < mpz_t > +{ + ~__gmp_expr (); +}; + +class PIP_Solution_Node; +class internal_exception +{ + ~internal_exception (); +}; +class not_an_integer:internal_exception +{ +}; +class not_a_variable:internal_exception +{ +}; +class not_an_optimization_mode:internal_exception +{ +}; +class not_a_bounded_integer_type_width:internal_exception +{ +}; +class not_a_bounded_integer_type_representation:internal_exception +{ +}; +class not_a_bounded_integer_type_overflow:internal_exception +{ +}; +class not_a_complexity_class:internal_exception +{ +}; +class not_a_control_parameter_name:internal_exception +{ +}; +class not_a_control_parameter_value:internal_exception +{ +}; +class not_a_pip_problem_control_parameter_name:internal_exception +{ +}; +class not_a_pip_problem_control_parameter_value:internal_exception +{ +}; +class not_a_relation:internal_exception +{ +}; +class ppl_handle_mismatch:internal_exception +{ +}; +class timeout_exception +{ + ~timeout_exception (); +}; +class deterministic_timeout_exception:timeout_exception +{ +}; +void __assert_fail (const char *, const char *, int, int *) +__attribute__ ((__noreturn__)); +void PL_get_pointer (void *); +int Prolog_is_address (); +inline int +Prolog_get_address (void **p1) +{ + Prolog_is_address ()? static_cast < + void >(0) : __assert_fail ("Prolog_is_address", "./swi_cfli.hh", 0, 0); + PL_get_pointer (p1); + return 0; +} + +class non_linear:internal_exception +{ +}; +class not_unsigned_integer:internal_exception +{ +}; +class not_universe_or_empty:internal_exception +{ +}; +class not_a_nil_terminated_list:internal_exception +{ +}; +class PPL_integer_out_of_range +{ + __gmp_expr < mpz_t > n; +}; +void handle_exception (); +template < typename T > T * term_to_handle (int, const char *) +{ + if (Prolog_is_address ()) + { + void *p; + Prolog_get_address (&p); + return static_cast < T * >(0); + } + throw; +} + +void +ppl_new_MIP_Problem_from_MIP_Problem () +try +{ + term_to_handle < int >(0, "ppl_new_MIP_Problem_from_MIP_Problem/2"); +} + +catch (exception &) +{ +} + +int +ppl_PIP_Tree_Node_parametric_values () +{ + try + { + PIP_Solution_Node *a = term_to_handle < PIP_Solution_Node > (0, 0); + (void)a; + return 1; + } + catch (internal_exception &) + { + } + catch (not_unsigned_integer &) + { + handle_exception (); + } + catch (non_linear &) + { + handle_exception (); + } + catch (not_a_variable &) + { + handle_exception (); + } + catch (not_an_integer &) + { + handle_exception (); + } + catch (ppl_handle_mismatch &) + { + handle_exception (); + } + catch (not_an_optimization_mode &) + { + handle_exception (); + } + catch (not_a_complexity_class &) + { + handle_exception (); + } + catch (not_a_bounded_integer_type_width &) + { + handle_exception (); + } + catch (not_a_bounded_integer_type_representation &) + { + handle_exception (); + } + catch (not_a_bounded_integer_type_overflow &) + { + handle_exception (); + } + catch (not_a_control_parameter_name &) + { + handle_exception (); + } + catch (not_a_control_parameter_value &) + { + handle_exception (); + } + catch (not_a_pip_problem_control_parameter_name &) + { + handle_exception (); + } + catch (not_a_pip_problem_control_parameter_value &) + { + handle_exception (); + } + catch (not_universe_or_empty &) + { + handle_exception (); + } + catch (not_a_relation &) + { + handle_exception (); + } + catch (not_a_nil_terminated_list &) + { + handle_exception (); + } + catch (PPL_integer_out_of_range &) + { + handle_exception (); + } + catch (int &) + { + } catch (timeout_exception &) + { + handle_exception (); + } catch (deterministic_timeout_exception &) + { + handle_exception (); + } catch (overflow_error &) + { + handle_exception (); + } catch (domain_error &) + { + handle_exception (); + } catch (length_error &) + { + handle_exception (); + } catch (invalid_argument &) + { + handle_exception (); + } catch (logic_error &) + { + handle_exception (); + } catch (bad_alloc &) + { + handle_exception (); + } catch (exception &) + { + handle_exception (); + } catch ( ...) + { + handle_exception (); + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60750.C b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60750.C new file mode 100644 index 000000000..a344bd764 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60750.C @@ -0,0 +1,21 @@ +// { dg-do run } +// { dg-options "-std=c++11" } + +#include <string> +#include <stdexcept> + +const std::string err_prefix = "Problem: "; +void thrower (std::string msg) +{ + throw std::runtime_error(err_prefix + std::move(msg)); +} + +int main(int argc, char **argv) +{ + try { + std::string base = "hello"; + thrower(std::move(base)); + } catch (const std::runtime_error &e) { + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60895.C b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60895.C new file mode 100644 index 000000000..0edd36ada --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/torture/pr60895.C @@ -0,0 +1,32 @@ +// { dg-do compile } + +struct C +{ + double elems[3]; +}; + +C +foo () +{ + C a; + double *f = a.elems; + int b; + for (; b;) + { + *f = 0; + ++f; + } + return a; +} + +struct J +{ + C c; + __attribute__((always_inline)) J () : c (foo ()) {} +}; + +void +bar () +{ + J (); +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/tree-prof/pr59255.C b/gcc-4.8/gcc/testsuite/g++.dg/tree-prof/pr59255.C new file mode 100644 index 000000000..eb2b51f7e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/tree-prof/pr59255.C @@ -0,0 +1,29 @@ +// PR c++/59255 +// { dg-options "-O2 -std=c++11" } + +struct S +{ + __attribute__((noinline, noclone)) ~S () noexcept (true) + { + if (fn) + fn (1); + } + void (*fn) (int); +}; + +__attribute__((noinline, noclone)) void +foo (int x) +{ + if (x != 1) + throw 1; +} + +int +main () +{ + for (int i = 0; i < 100; i++) + { + S s; + s.fn = foo; + } +} diff --git a/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60729.cc b/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60729.cc new file mode 100644 index 000000000..fd472c50a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60729.cc @@ -0,0 +1,10 @@ +// { dg-do compile } +// { dg-additional-options "-ftrapv" } + +void doSomething(int dim, double *Y, double *A) +{ + for (int k=0; k<dim; k++) + Y[k] += __builtin_fabs (A[k]); +} + +// { dg-final { cleanup-tree-dump "vect" } } diff --git a/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60836.cc b/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60836.cc new file mode 100644 index 000000000..83bb18375 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/g++.dg/vect/pr60836.cc @@ -0,0 +1,39 @@ +// { dg-do compile } + +int a, b; +typedef double (*NormFunc) (const int &); +int & +max (int &p1, int &p2) +{ + if (p1 < p2) + return p2; + return p1; +} + +struct A +{ + int operator () (int p1, int p2) + { + return max (p1, p2); + } +}; +template < class, class > double +norm_ (const int &) +{ + char c, d; + A e; + for (; a; a++) + { + b = e (b, d); + b = e (b, c); + } +} + +void +norm () +{ + static NormFunc f = norm_ < int, A >; + f = 0; +} + +// { dg-final { cleanup-tree-dump "vect" } } diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c new file mode 100644 index 000000000..45aad2b2e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-1.c @@ -0,0 +1,11 @@ +/* PR middle-end/58970 */ + +struct T { int b : 1; }; +struct S { struct T t[1]; }; + +void +foo (int x, struct S *s) +{ + if (x == -1) + s->t[x].b = 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c new file mode 100644 index 000000000..3103b31e1 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58970-2.c @@ -0,0 +1,11 @@ +/* PR middle-end/58970 */ + +struct T { char a : 8; char b : 1; }; +struct S { char x; struct T t[1]; }; + +void +foo (int x, struct S *s) +{ + if (x == -1) + s->t[x].b = 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58997.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58997.c new file mode 100644 index 000000000..2c7a0f82c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr58997.c @@ -0,0 +1,19 @@ +/* PR rtl-optimization/58997 */ + +int a, b, c, e; +short d; +char h; + +void +foo () +{ + while (b) + { + d = a ? c : 1 % a; + c = d; + h = d; + if (!h) + while (e) + ; + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59362.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59362.c new file mode 100644 index 000000000..3e78f76bc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59362.c @@ -0,0 +1,21 @@ +/* PR tree-optimization/59362 */ + +char * +foo (char *r, int s) +{ + r = __builtin___stpcpy_chk (r, "abc", __builtin_object_size (r, 1)); + if (s) + r = __builtin___stpcpy_chk (r, "d", __builtin_object_size (r, 1)); + return r; +} + +char *a; +long int b; + +void +bar (void) +{ + b = __builtin_object_size (0, 0); + a = __builtin___stpcpy_chk (0, "", b); + b = __builtin_object_size (a, 0); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59803.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59803.c new file mode 100644 index 000000000..d2b5d2098 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr59803.c @@ -0,0 +1,27 @@ +/* PR target/59803 */ + +extern void baz (void) __attribute__ ((__noreturn__)); +struct A { int g, h; }; +extern struct A a; +struct B { unsigned char i, j, k, l, m; }; +int c, d, e; +static int f; + +void +foo (void) +{ + f = 1; +} + +void +bar (struct B *x) +{ + x->i = e; + x->k = c; + x->l = d; + x->j = a.h; + x->m = f; + if (x->i != e) baz (); + if (x->k != c) baz (); + if (x->j != a.h) baz (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr60502.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr60502.c new file mode 100644 index 000000000..8dd2de44d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/compile/pr60502.c @@ -0,0 +1,18 @@ +/* PR tree-optimization/60502 */ + +typedef signed char v16i8 __attribute__ ((vector_size (16))); +typedef unsigned char v16u8 __attribute__ ((vector_size (16))); + +void +foo (v16i8 *x) +{ + v16i8 m1 = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; + *x |= *x ^ m1; +} + +void +bar (v16u8 *x) +{ + v16u8 m1 = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; + *x |= *x ^ m1; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20131127-1.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20131127-1.c new file mode 100644 index 000000000..8ec496577 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20131127-1.c @@ -0,0 +1,34 @@ +/* PR middle-end/59138 */ +/* Testcase by John Regehr <regehr@cs.utah.edu> */ + +extern void abort (void); + +#pragma pack(1) + +struct S0 { + int f0; + int f1; + int f2; + short f3; +}; + +short a = 1; + +struct S0 b = { 1 }, c, d, e; + +struct S0 fn1() { return c; } + +void fn2 (void) +{ + b = fn1 (); + a = 0; + d = e; +} + +int main (void) +{ + fn2 (); + if (a != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140212-1.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140212-1.c new file mode 100644 index 000000000..8f1f84f3e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140212-1.c @@ -0,0 +1,37 @@ +/* PR rtl-optimization/60116 */ +/* Reported by Zhendong Su <su@cs.ucdavis.edu> */ + +extern void abort (void); + +int a, b, c, d = 1, e, f = 1, h, i, k; +char g, j; + +void +fn1 (void) +{ + int l; + e = 0; + c = 0; + for (;;) + { + k = a && b; + j = k * 54; + g = j * 147; + l = ~g + (long long) e && 1; + if (d) + c = l; + else + h = i = l * 9UL; + if (f) + return; + } +} + +int +main (void) +{ + fn1 (); + if (c != 1) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140326-1.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140326-1.c new file mode 100644 index 000000000..552e21891 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140326-1.c @@ -0,0 +1,10 @@ +int a; + +int +main (void) +{ + char e[2] = { 0, 0 }, f = 0; + if (a == 131072) + f = e[a]; + return f; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140425-1.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140425-1.c new file mode 100644 index 000000000..c447ef95b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/20140425-1.c @@ -0,0 +1,23 @@ +/* PR target/60941 */ +/* Reported by Martin Husemann <martin@netbsd.org> */ + +extern void abort (void); + +static void __attribute__((noinline)) +set (unsigned long *l) +{ + *l = 31; +} + +int main (void) +{ + unsigned long l; + int i; + + set (&l); + i = (int) l; + l = (unsigned long)(2U << i); + if (l != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58726.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58726.c new file mode 100644 index 000000000..9fa8b6953 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58726.c @@ -0,0 +1,26 @@ +/* PR rtl-optimization/58726 */ + +int a, c; +union { int f1; int f2 : 1; } b; + +short +foo (short p) +{ + return p < 0 ? p : a; +} + +int +main () +{ + if (sizeof (short) * __CHAR_BIT__ != 16 + || sizeof (int) * __CHAR_BIT__ != 32) + return 0; + b.f1 = 56374; + unsigned short d; + int e = b.f2; + d = e == 0 ? b.f1 : 0; + c = foo (d); + if (c != (short) 56374) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58831.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58831.c new file mode 100644 index 000000000..a40cd54d2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58831.c @@ -0,0 +1,40 @@ +#include <assert.h> + +int a, *b, c, d, f, **i, p, q, *r; +short o, j; + +static int __attribute__((noinline, noclone)) +fn1 (int *p1, int **p2) +{ + int **e = &b; + for (; p; p++) + *p1 = 1; + *e = *p2 = &d; + + assert (r); + + return c; +} + +static int ** __attribute__((noinline, noclone)) +fn2 (void) +{ + for (f = 0; f != 42; f++) + { + int *g[3] = {0, 0, 0}; + for (o = 0; o; o--) + for (; a > 1;) + { + int **h[1] = { &g[2] }; + } + } + return &r; +} + +int +main (void) +{ + i = fn2 (); + fn1 (b, i); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58984.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58984.c new file mode 100644 index 000000000..e0f7669c7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr58984.c @@ -0,0 +1,57 @@ +/* PR tree-optimization/58984 */ + +struct S { int f0 : 8; int : 6; int f1 : 5; }; +struct T { char f0; int : 6; int f1 : 5; }; + +int a, *c = &a, e, n, b, m; + +static int +foo (struct S p) +{ + const unsigned short *f[36]; + for (; e < 2; e++) + { + const unsigned short **i = &f[0]; + *c ^= 1; + if (p.f1) + { + *i = 0; + return b; + } + } + return 0; +} + +static int +bar (struct T p) +{ + const unsigned short *f[36]; + for (; e < 2; e++) + { + const unsigned short **i = &f[0]; + *c ^= 1; + if (p.f1) + { + *i = 0; + return b; + } + } + return 0; +} + +int +main () +{ + struct S o = { 1, 1 }; + foo (o); + m = n || o.f0; + if (a != 1) + __builtin_abort (); + e = 0; + struct T p = { 1, 1 }; + bar (p); + m |= n || p.f0; + if (a != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c new file mode 100644 index 000000000..18da0059e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014-2.c @@ -0,0 +1,23 @@ +/* PR tree-optimization/59014 */ + +__attribute__((noinline, noclone)) long long int +foo (long long int x, long long int y) +{ + if (((int) x | (int) y) != 0) + return 6; + return x + y; +} + +int +main () +{ + if (sizeof (long long) == sizeof (int)) + return 0; + int shift_half = sizeof (int) * __CHAR_BIT__ / 2; + long long int x = (3LL << shift_half) << shift_half; + long long int y = (5LL << shift_half) << shift_half; + long long int z = foo (x, y); + if (z != ((8LL << shift_half) << shift_half)) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014.c new file mode 100644 index 000000000..10bf81a46 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59014.c @@ -0,0 +1,25 @@ +/* PR tree-optimization/59014 */ + +int a = 2, b, c, d; + +int +foo () +{ + for (;; c++) + if ((b > 0) | (a & 1)) + ; + else + { + d = a; + return 0; + } +} + +int +main () +{ + foo (); + if (d != 2) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59101.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59101.c new file mode 100644 index 000000000..ed6a7e8fa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59101.c @@ -0,0 +1,15 @@ +/* PR target/59101 */ + +__attribute__((noinline, noclone)) int +foo (int a) +{ + return (~a & 4102790424LL) > 0 | 6; +} + +int +main () +{ + if (foo (0) != 7) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59358.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59358.c new file mode 100644 index 000000000..674026d62 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59358.c @@ -0,0 +1,44 @@ +/* PR tree-optimization/59358 */ + +__attribute__((noinline, noclone)) int +foo (int *x, int y) +{ + int z = *x; + if (y > z && y <= 16) + while (y > z) + z *= 2; + return z; +} + +int +main () +{ + int i; + for (i = 1; i < 17; i++) + { + int j = foo (&i, 16); + int k; + if (i >= 8 && i <= 15) + k = 16 + (i - 8) * 2; + else if (i >= 4 && i <= 7) + k = 16 + (i - 4) * 4; + else if (i == 3) + k = 24; + else + k = 16; + if (j != k) + __builtin_abort (); + j = foo (&i, 7); + if (i >= 7) + k = i; + else if (i >= 4) + k = 8 + (i - 4) * 2; + else if (i == 3) + k = 12; + else + k = 8; + if (j != k) + __builtin_abort (); + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59388.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59388.c new file mode 100644 index 000000000..de3648a00 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr59388.c @@ -0,0 +1,11 @@ +/* PR tree-optimization/59388 */ + +int a; +struct S { unsigned int f:1; } b; + +int +main () +{ + a = (0 < b.f) | b.f; + return a; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60017.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60017.c new file mode 100644 index 000000000..d72c12c8a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60017.c @@ -0,0 +1,33 @@ +/* PR target/60017 */ + +extern void abort (void); + +struct S0 +{ + short m0; + short m1; +}; + +struct S1 +{ + unsigned m0:1; + char m1[2][2]; + struct S0 m2[2]; +}; + +struct S1 x = { 1, {{2, 3}, {4, 5}}, {{6, 7}, {8, 9}} }; + +struct S1 func (void) +{ + return x; +} + +int main (void) +{ + struct S1 ret = func (); + + if (ret.m2[1].m1 != 9) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60062.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60062.c new file mode 100644 index 000000000..62973d458 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60062.c @@ -0,0 +1,25 @@ +/* PR target/60062 */ + +int a; + +static void +foo (const char *p1, int p2) +{ + if (__builtin_strcmp (p1, "hello") != 0) + __builtin_abort (); +} + +static void +bar (const char *p1) +{ + if (__builtin_strcmp (p1, "hello") != 0) + __builtin_abort (); +} + +__attribute__((optimize (0))) int +main () +{ + foo ("hello", a); + bar ("hello"); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60072.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60072.c new file mode 100644 index 000000000..566874d63 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60072.c @@ -0,0 +1,16 @@ +/* PR target/60072 */ + +int c = 1; + +__attribute__ ((optimize (1))) +static int *foo (int *p) +{ + return p; +} + +int +main () +{ + *foo (&c) = 2; + return c - 2; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60454.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60454.c new file mode 100644 index 000000000..ceec45e69 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60454.c @@ -0,0 +1,31 @@ +#ifdef __UINT32_TYPE__ +typedef __UINT32_TYPE__ uint32_t; +#else +typedef unsigned uint32_t; +#endif + +#define __fake_const_swab32(x) ((uint32_t)( \ + (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \ + (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \ + (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 8) | \ + (((uint32_t)(x) & (uint32_t)0x0000ff00UL) ) | \ + (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24))) + +/* Previous version of bswap optimization would detect byte swap when none + happen. This test aims at catching such wrong detection to avoid + regressions. */ + +__attribute__ ((noinline, noclone)) uint32_t +fake_swap32 (uint32_t in) +{ + return __fake_const_swab32 (in); +} + +int main(void) +{ + if (sizeof (uint32_t) * __CHAR_BIT__ != 32) + return 0; + if (fake_swap32 (0x12345678UL) != 0x78567E12UL) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60960.c b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60960.c new file mode 100644 index 000000000..b4f08d4c5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.c-torture/execute/pr60960.c @@ -0,0 +1,38 @@ +/* PR tree-optimization/60960 */ + +typedef unsigned char v4qi __attribute__ ((vector_size (4))); + +__attribute__((noinline, noclone)) v4qi +f1 (v4qi v) +{ + return v / 2; +} + +__attribute__((noinline, noclone)) v4qi +f2 (v4qi v) +{ + return v / (v4qi) { 2, 2, 2, 2 }; +} + +__attribute__((noinline, noclone)) v4qi +f3 (v4qi x, v4qi y) +{ + return x / y; +} + +int +main () +{ + v4qi x = { 5, 5, 5, 5 }; + v4qi y = { 2, 2, 2, 2 }; + v4qi z = f1 (x); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + z = f2 (x); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + z = f3 (x, y); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/20050922-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/20050922-1.c index ed5a3c63e..982f82011 100644 --- a/gcc-4.8/gcc/testsuite/gcc.dg/20050922-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.dg/20050922-1.c @@ -4,7 +4,7 @@ /* { dg-do run } */ /* { dg-options "-O1 -std=c99" } */ -#include <stdlib.h> +extern void abort (void); #if __INT_MAX__ == 2147483647 typedef unsigned int uint32_t; diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/20050922-2.c b/gcc-4.8/gcc/testsuite/gcc.dg/20050922-2.c index c2974d03d..2e8db829e 100644 --- a/gcc-4.8/gcc/testsuite/gcc.dg/20050922-2.c +++ b/gcc-4.8/gcc/testsuite/gcc.dg/20050922-2.c @@ -4,7 +4,8 @@ /* { dg-do run } */ /* { dg-options "-O1 -std=c99" } */ -#include <stdlib.h> +extern void abort (void); +extern void exit (int); #if __INT_MAX__ == 2147483647 typedef unsigned int uint32_t; diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/atomic-store-6.c b/gcc-4.8/gcc/testsuite/gcc.dg/atomic-store-6.c new file mode 100644 index 000000000..81499cd71 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/atomic-store-6.c @@ -0,0 +1,13 @@ +/* { dg-do run } */ +/* { dg-require-effective-target sync_int_128_runtime } */ +/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */ + +__int128_t i; + +int main() +{ + __atomic_store_16(&i, -1, 0); + if (i != -1) + __builtin_abort(); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/builtin-object-size-14.c b/gcc-4.8/gcc/testsuite/gcc.dg/builtin-object-size-14.c new file mode 100644 index 000000000..085011eda --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/builtin-object-size-14.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +extern void abort (void); +extern char *strncpy(char *, const char *, __SIZE_TYPE__); + +union u { + struct { + char vi[8]; + char pi[16]; + }; + char all[8+16+4]; +}; + +void __attribute__((noinline,noclone)) +f(union u *u) +{ + char vi[8+1]; + __builtin_strncpy(vi, u->vi, sizeof(u->vi)); + if (__builtin_object_size (u->all, 1) != -1) + abort (); +} +int main() +{ + union u u; + f (&u); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c b/gcc-4.8/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c new file mode 100644 index 000000000..7b3316653 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf2-macro2.c @@ -0,0 +1,7 @@ +/* Test to make sure the macro info includes the predefined macros with line number 0. */ +/* { dg-do compile } */ +/* { dg-options "-g3 -gdwarf-2 -dA -fverbose-asm" } */ +/* { dg-final { scan-assembler "At line number 0" } } */ + +#define FOO 1 +int i; diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/gomp/pr58809.c b/gcc-4.8/gcc/testsuite/gcc.dg/gomp/pr58809.c new file mode 100644 index 000000000..5dc02f65a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/gomp/pr58809.c @@ -0,0 +1,13 @@ +/* PR middle-end/58809 */ +/* { dg-do compile } */ +/* { dg-options "-fopenmp -O" } */ + +int i; +#pragma omp threadprivate (i) + +void foo() +{ + _Complex int j; +#pragma omp parallel copyin (i) reduction (&&:j) + ; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr55022.c b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr55022.c new file mode 100644 index 000000000..c631c0e23 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr55022.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fgraphite-identity" } */ + +extern void abort (void); + +void __attribute__((noinline,noclone)) +f(int *limit, int minLen, int maxLen) +{ + int i; + + for (i = minLen; i <= maxLen; i++) { + limit[i] = i; + } +} + +int main() +{ + int limit[256], i; + f (limit, 0, 255); + for (i = 0; i < 256; ++i) + { + if (limit[i] != i) + abort (); + __asm__ volatile ("" : : : "memory"); + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-1.c new file mode 100644 index 000000000..175fa16fd --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -floop-interchange" } */ + +int kd; + +void +n2(void) +{ + static int so; + static short int i5; + int wj; + int *il; + int *nk = &so; + for (wj = 0; wj < 2; ++wj) + *nk = ((i5 += *il) || kd ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-2.c b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-2.c new file mode 100644 index 000000000..139500768 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr59817-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -floop-interchange" } */ + +void +xl(void) +{ + static int j3; + for (j3 = 0; j3 < 1; ++j3) { + static int f2; + static int w7; + short int b5; + int ok; + f2 = (b5 += ok) ? (w7 = 0): (w7 ? 0 : (f2 = ok)); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr60740.c b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr60740.c new file mode 100644 index 000000000..5b7c18022 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/graphite/pr60740.c @@ -0,0 +1,16 @@ +/* { dg-options "-O2 -floop-interchange" } */ + +int **db6 = 0; + +void +k26(void) +{ + static int geb = 0; + int *a22 = &geb; + int **l30 = &a22; + int *c4b; + int ndf; + for (ndf = 0; ndf <= 1; ++ndf) + *c4b = (db6 == l30) && (*a22)--; +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/guality/pr59776.c b/gcc-4.8/gcc/testsuite/gcc.dg/guality/pr59776.c new file mode 100644 index 000000000..382abb622 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/guality/pr59776.c @@ -0,0 +1,29 @@ +/* PR debug/59776 */ +/* { dg-do run } */ +/* { dg-options "-g" } */ + +#include "../nop.h" + +struct S { float f, g; }; + +__attribute__((noinline, noclone)) void +foo (struct S *p) +{ + struct S s1, s2; /* { dg-final { gdb-test pr59776.c:17 "s1.f" "5.0" } } */ + s1 = *p; /* { dg-final { gdb-test pr59776.c:17 "s1.g" "6.0" } } */ + s2 = s1; /* { dg-final { gdb-test pr59776.c:17 "s2.f" "0.0" } } */ + *(int *) &s2.f = 0; /* { dg-final { gdb-test pr59776.c:17 "s2.g" "6.0" } } */ + asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.f" "5.0" } } */ + asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s1.g" "6.0" } } */ + s2 = s1; /* { dg-final { gdb-test pr59776.c:20 "s2.f" "5.0" } } */ + asm volatile (NOP : : : "memory"); /* { dg-final { gdb-test pr59776.c:20 "s2.g" "6.0" } } */ + asm volatile (NOP : : : "memory"); +} + +int +main () +{ + struct S x = { 5.0f, 6.0f }; + foo (&x); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr55260.c b/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr55260.c new file mode 100644 index 000000000..ef151b0a2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr55260.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-inline -fipa-cp-clone" } */ + +typedef struct { + int *ptr; + int len; +} string; +typedef struct { + string nantstr; + int *nant; +} malv; +typedef struct { + int *nor; +} list_heads; +int b; +list_heads *fn1(string, int *, unsigned); +void fn2(malv *p1, list_heads *p2, unsigned p3) { + string a = p1->nantstr; + fn1(a, p1->nant, p3); +} + +void fn3(unsigned p1) { fn2(0, 0, p1); } + +list_heads *fn1(string p1, int *p2, unsigned p3) { + while (1) { + if (p3) + fn3(1); + if (b) + return 0; + fn3(1); + } +} + +void fn5() { + list_heads c; + c.nor = 0; + fn2(0, &c, 1); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr59610.c b/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr59610.c new file mode 100644 index 000000000..fc0933441 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/ipa/pr59610.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +struct A { int a; }; +extern void *y; + +__attribute__((optimize (0))) void +foo (void *p, struct A x) +{ + foo (y, x); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr56824.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr56824.c new file mode 100644 index 000000000..d682d0a81 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr56824.c @@ -0,0 +1,18 @@ +/* PR preprocessor/56824 */ +/* { dg-do compile } */ +/* { dg-options "-Waggregate-return" } */ + +struct S { int i; }; +struct S foo (void); + +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Waggregate-return" + +int +main () +{ + foo (); + return 0; +} + +#pragma GCC diagnostic pop diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr58668.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr58668.c new file mode 100644 index 000000000..3e09508dc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr58668.c @@ -0,0 +1,25 @@ +/* PR rtl-optimization/58668 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-mthumb" { target { { arm*-*-* } && arm_thumb2_ok } } } */ + +void *fn1 (void *); +void *fn2 (void *, const char *); +void fn3 (void *); +void fn4 (void *, int); + +void * +test (void *x) +{ + void *a, *b; + if (!(a = fn1 (x))) + return (void *) 0; + if (!(b = fn2 (a, "w"))) + { + fn3 (a); + return (void *) 0; + } + fn3 (a); + fn4 (b, 1); + return b; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr58805.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr58805.c new file mode 100644 index 000000000..dda0e4bdf --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr58805.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-tail-merge -fdump-tree-pre" } */ + +/* Type that matches the 'p' constraint. */ +#define TYPE void * + +static inline +void bar (TYPE *r) +{ + TYPE t; + __asm__ ("" : "=&p" (t), "=p" (*r)); +} + +void +foo (int n, TYPE *x, TYPE *y) +{ + if (n == 0) + bar (x); + else + bar (y); +} + +/* { dg-final { scan-tree-dump-times "__asm__" 2 "pre"} } */ +/* { dg-final { cleanup-tree-dump "pre" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr59011.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr59011.c new file mode 100644 index 000000000..2fb8187ad --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr59011.c @@ -0,0 +1,22 @@ +/* PR middle-end/59011 */ +/* { dg-do compile } */ +/* { dg-options "-std=gnu99" } */ + +void +foo (int m) +{ + int a[m]; + void + bar (void) + { + { + int + baz (void) + { + return a[0]; + } + } + a[0] = 42; + } + bar (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr59351.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr59351.c new file mode 100644 index 000000000..384058f40 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr59351.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c99 -Wpedantic" } */ + +unsigned int +foo (void) +{ + return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr59827.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr59827.c new file mode 100644 index 000000000..77e1e9ca2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr59827.c @@ -0,0 +1,15 @@ +/* PR middle-end/59827 */ +/* { dg-do compile } */ + +int +foo (int p[2][]) /* { dg-error "array type has incomplete element type" } */ +{ + return p[0][0]; +} + +void +bar (void) +{ + int p[2][1]; + foo (p); /* { dg-error "type of formal parameter 1 is incomplete" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr59860.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr59860.c new file mode 100644 index 000000000..6807d9c84 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr59860.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +extern __inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) __attribute__ ((__artificial__)) char * __attribute__ ((__nothrow__ , __leaf__)) +strcat (char *__restrict __dest, const char *__restrict __src) +{ + return __builtin___strcat_chk (__dest, __src, __builtin_object_size (__dest, 2 > 1)); +} +static char raw_decode; +void foo (char **argv, char *outfilename) +{ + if (**argv == 'r') + raw_decode = 1; + strcat (outfilename, raw_decode ? ".raw" : ".wav"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-1.c new file mode 100644 index 000000000..2e5c2e5bf --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-1.c @@ -0,0 +1,29 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +extern void abort (void); +struct S { + int *i[4]; + int *p1; + int *p2; + int *p3; + int *p4; +}; +int **b; +int main() +{ + int i = 1; + struct S s; + s.p3 = &i; + int **p; + if (b) + p = b; + else + p = &s.i[2]; + p += 4; + if (!b) + **p = 0; + if (i != 0) + abort (); + return i; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-2.c b/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-2.c new file mode 100644 index 000000000..767e61d1c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/pr60485-2.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +extern void abort (void); +struct S { + int *i[4]; + int *p1; + int *p2; + int *p3; + int *p4; + int **x; +}; +int **b; +int main() +{ + int i = 1; + struct S s; + s.p3 = &i; + int **p; + if (b) + p = b; + else + p = &s.i[2]; + p += 4; + /* prevert fowrprop from creating an offsetted sd constraint and + preserve the pointer offsetting constraint. */ + s.x = p; + p = s.x; + if (!b) + { + int *z = *p; + /* z should point to i (and non-local/escaped). */ + *z = 0; + } + if (i != 0) + abort (); + return i; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/stack-usage-1.c index b6524f9a1..78aaef08b 100644 --- a/gcc-4.8/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -38,7 +38,11 @@ # endif #elif defined (__powerpc64__) || defined (__ppc64__) || defined (__POWERPC64__) \ || defined (__PPC64__) +# if _CALL_ELF == 2 +# define SIZE 208 +# else # define SIZE 180 +# endif #elif defined (__powerpc__) || defined (__PPC__) || defined (__ppc__) \ || defined (__POWERPC__) || defined (PPC) || defined (_IBMR2) # if defined (__ALTIVEC__) diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/tls/pr58595.c b/gcc-4.8/gcc/testsuite/gcc.dg/tls/pr58595.c new file mode 100644 index 000000000..d830e76d4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/tls/pr58595.c @@ -0,0 +1,28 @@ +/* PR target/58595 */ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-fpic" { target fpic } } */ +/* { dg-require-effective-target tls } */ +/* { dg-require-effective-target sync_int_long } */ + +struct S { unsigned long a, b; }; +__thread struct S s; +void bar (unsigned long *); + +__attribute__((noinline)) void +foo (void) +{ + int i; + for (i = 0; i < 10; i++) + __sync_fetch_and_add (&s.b, 1L); +} + +int +main () +{ + s.b = 12; + foo (); + if (s.b != 22) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-1.c new file mode 100644 index 000000000..8ca85cafe --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-1.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ + +extern void abort (void) __attribute__((noreturn)); + +union setconflict +{ + int a[20]; + long b[10]; +}; + +int +main () +{ + int sum = 0; + { + union setconflict a; + int *c; + c = a.a; + asm ("": "=r" (c):"0" (c)); + *c = 0; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + { + union setconflict a; + long *c; + c = a.b; + asm ("": "=r" (c):"0" (c)); + *c = 1; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + + if (sum != 1) + abort(); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-2.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-2.c new file mode 100644 index 000000000..ccb546e0e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-2.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ + +extern void abort (void) __attribute__((noreturn)); + +int +main () +{ + int sum = 0; + { + int a[20]; + int *c; + c = a; + asm ("": "=r" (c):"0" (c)); + *c = 0; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + { + long b[10]; + long *c; + c = b; + asm ("": "=r" (c):"0" (c)); + *c = 1; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + + if (sum != 1) + abort(); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-3.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-3.c new file mode 100644 index 000000000..8e0c7fe2d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57425-3.c @@ -0,0 +1,31 @@ +/* { dg-do run } */ + +extern void abort (void) __attribute__((noreturn)); + +int +main () +{ + int sum = 0; + { + long a[20]; + long *c; + c = a; + asm ("": "=r" (c):"0" (c)); + *c = 0; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + { + long long b[10]; + long long *c; + c = b; + asm ("": "=r" (c):"0" (c)); + *c = 1; + asm ("": "=r" (c):"0" (c)); + sum += *c; + } + + if (sum != 1) + abort(); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57488.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57488.c new file mode 100644 index 000000000..7eda36476 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57488.c @@ -0,0 +1,58 @@ +/* { dg-do run } */ + +extern void abort (void); + +int i, j, *pj = &j, **ppj = &pj; +int x, *px = &x; + +short s, *ps = &s, k; + +unsigned short u, *pu = &u, **ppu = &pu; + +char c, *pc = &c; + +unsigned char v = 48; + +static int +bar (int p) +{ + p = k; + *px = **ppu = i; + *ppj = &p; + if (**ppj) + *pj = p; + return p; +} + +void __attribute__((noinline)) +foo () +{ + for (; i <= 3; i++) + for (; j; j--); + + u ^= bar (*pj); + + for (k = 1; k >= 0; k--) + { + int l; + bar (0); + for (l = 1; l < 5; l++) + { + int m; + for (m = 6; m; m--) + { + v--; + *ps = *pc; + } + } + } +} + +int +main () +{ + foo (); + if (v != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57517.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57517.c new file mode 100644 index 000000000..2422d8ee6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57517.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ + +int x[1024], y[1024], z[1024], w[1024]; +void foo (void) +{ + int i; + for (i = 1; i < 1024; ++i) + { + int a = x[i]; + int b = y[i]; + int c = x[i-1]; + int d = y[i-1]; + if (w[i]) + z[i] = (a + b) + (c + d); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57569.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57569.c new file mode 100644 index 000000000..f036d559d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57569.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ + +extern void abort (void) __attribute__((noreturn)); + +struct S { int f0; } a; + +int b, e, *d = &b, f; + +void +fn1 () +{ + int **g[9][6]; + int ***h = &g[6][3]; + for (; e < 9; e++) { + f = 0; + for (; f < 6; f++) + g[e][f] = &d; + } + ***h = 0; +} + +void +fn2 () +{ + fn1 (); + struct S c[4][10] = {}; + a = c[3][9]; +} + +int +main () +{ + fn2 (); + if (a.f0 != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57864.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57864.c new file mode 100644 index 000000000..93962c20e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr57864.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ + +union U { + double val; + union U *ptr; +}; + +union U *d; +double a; +int b; +int c; + +static void fn1(union U *p1, int p2, _Bool p3) +{ + union U *e; + + if (p2 == 0) + a = ((union U*)((unsigned long)p1 & ~1))->val; + + if (b) { + e = p1; + } else if (c) { + e = ((union U*)((unsigned long)p1 & ~1))->ptr; + d = e; + } else { + e = 0; + d = ((union U*)0)->ptr; + } + + fn1 (e, 0, 0); + fn1 (0, 0, p3); +} + +void fn2 (void) +{ + fn1 (0, 0, 0); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58079.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58079.c new file mode 100644 index 000000000..99a30181f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58079.c @@ -0,0 +1,107 @@ +/* { dg-options "-mlong-calls" { target mips*-*-* } } */ + +typedef unsigned char u8; +typedef unsigned short u16; +typedef unsigned int __kernel_size_t; +typedef __kernel_size_t size_t; +struct list_head { + struct list_head *next; +}; + +struct dmx_ts_feed { + int is_filtering; +}; +struct dmx_section_feed { + u16 secbufp; + u16 seclen; + u16 tsfeedp; +}; + +typedef int (*dmx_ts_cb) ( + const u8 * buffer1, + size_t buffer1_length, + const u8 * buffer2, + size_t buffer2_length +); + +struct dvb_demux_feed { + union { + struct dmx_ts_feed ts; + struct dmx_section_feed sec; + } feed; + union { + dmx_ts_cb ts; + } cb; + int type; + u16 pid; + int ts_type; + struct list_head list_head; +}; + +struct dvb_demux { + int (*stop_feed)(struct dvb_demux_feed *feed); + struct list_head feed_list; +}; + + +static +inline +__attribute__((always_inline)) +u8 +payload(const u8 *tsp) +{ + if (tsp[3] & 0x20) { + return 184 - 1 - tsp[4]; + } + return 184; +} + +static +inline +__attribute__((always_inline)) +int +dvb_dmx_swfilter_payload(struct dvb_demux_feed *feed, const u8 *buf) +{ + int count = payload(buf); + int p; + if (count == 0) + return -1; + return feed->cb.ts(&buf[p], count, ((void *)0), 0); +} + +static +inline +__attribute__((always_inline)) +void +dvb_dmx_swfilter_packet_type(struct dvb_demux_feed *feed, const u8 *buf) +{ + switch (feed->type) { + case 0: + if (feed->ts_type & 1) { + dvb_dmx_swfilter_payload(feed, buf); + } + if (dvb_dmx_swfilter_section_packet(feed, buf) < 0) + feed->feed.sec.seclen = feed->feed.sec.secbufp = 0; + } +} + +static +void +dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf) +{ + struct dvb_demux_feed *feed; + int dvr_done = 0; + + for (feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = ((&demux->feed_list)->next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );}); __builtin_prefetch(feed->list_head.next), &feed->list_head != (&demux->feed_list); feed = ({ const typeof( ((typeof(*feed) *)0)->list_head ) *__mptr = (feed->list_head.next); (typeof(*feed) *)( (char *)__mptr - __builtin_offsetof(typeof(*feed),list_head) );})) { + if (((((feed)->type == 0) && ((feed)->feed.ts.is_filtering) && (((feed)->ts_type & (1 | 8)) == 1))) && (dvr_done++)) + dvb_dmx_swfilter_packet_type(feed, buf); + else if (feed->pid == 0x2000) + feed->cb.ts(buf, 188, ((void *)0), 0); + } +} +void dvb_dmx_swfilter_packets(struct dvb_demux *demux, const u8 *buf, size_t count) +{ + while (count--) { + dvb_dmx_swfilter_packet(demux, buf); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-1.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-1.c new file mode 100644 index 000000000..855515edb --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-1.c @@ -0,0 +1,51 @@ +/* { dg-do run } */ +/* { dg-additional-options "-fstrict-overflow" } */ + +extern void abort (void); + +int a, b, c, d, e, f, g, h = 1, i; + +int foo (int p) +{ + return p < 0 && a < - __INT_MAX__ - 1 - p ? 0 : 1; +} + +int *bar () +{ + int j; + i = h ? 0 : 1 % h; + for (j = 0; j < 1; j++) + for (d = 0; d; d++) + for (e = 1; e;) + return 0; + return 0; +} + +int baz () +{ + for (; b >= 0; b--) + for (c = 1; c >= 0; c--) + { + int *k = &c; + for (;;) + { + for (f = 0; f < 1; f++) + { + g = foo (*k); + bar (); + } + if (*k) + break; + return 0; + } + } + return 0; +} + +int main () +{ + baz (); + if (b != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-2.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-2.c new file mode 100644 index 000000000..dd0dae1ef --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-2.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-additional-options "-fstrict-overflow" } */ + +int a, b, d, e, f, *g, h, i; +volatile int c; + +char foo (unsigned char p) +{ + return p + 1; +} + +int bar () +{ + for (h = 0; h < 3; h = foo (h)) + { + c; + for (f = 0; f < 1; f++) + { + i = a && 0 < -__INT_MAX__ - h ? 0 : 1; + if (e) + for (; d;) + b = 0; + else + g = 0; + } + } + return 0; +} + +int main () +{ + bar (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-3.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-3.c new file mode 100644 index 000000000..23ae9cd39 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58143-3.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-additional-options "-fstrict-overflow" } */ + +int a, b, c, d, e; + +int +main () +{ + for (b = 4; b > -30; b--) + for (; c;) + for (;;) + { + e = a > __INT_MAX__ - b; + if (d) + break; + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58779.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58779.c new file mode 100644 index 000000000..b0c0c8695 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58779.c @@ -0,0 +1,12 @@ +/* { dg-do run } */ + +int a, c; + +int main () +{ + int e = -1; + short d = (c <= 0) ^ e; + if ((unsigned int) a - (a || d) <= (unsigned int) a) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58830.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58830.c new file mode 100644 index 000000000..8081f8b2c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58830.c @@ -0,0 +1,42 @@ +/* { dg-do run } */ +/* { dg-additional-options "-ftree-pre -ftree-partial-pre" } */ + +extern void abort (void); + +int b, c, d, f, g, h, i, j[6], *l = &b, *m, n, *o, r; +char k; + +static int +foo () +{ + char *p = &k; + + for (; d; d++) + if (i) + h = 0; + else + h = c || (r = 0); + + for (f = 0; f < 2; f++) + { + unsigned int q; + *l = 0; + if (n) + *m = g; + if (g) + o = 0; + for (q = -8; q >= 5; q++) + (*p)--; + } + + return 0; +} + +int +main () +{ + foo (); + if (j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[j[0]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]] ^ (k & 15)] != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58941.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58941.c new file mode 100644 index 000000000..c0eea0731 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58941.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ + +extern void abort (void); + +typedef struct { + int msgLength; + unsigned char data[1000]; +} SMsg; + +typedef struct { + int dummy; + int d[0]; +} SData; + +int condition = 3; + +int main() +{ + SMsg msg; + SData *pData = (SData*)(msg.data); + unsigned int i = 0; + for (i = 0; i < 1; i++) + { + pData->d[i] = 0; + if(condition & 1) + pData->d[i] |= 0x55; + if(condition & 2) + pData->d[i] |= 0xaa; + } + if (pData->d[0] != 0xff) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58956.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58956.c new file mode 100644 index 000000000..7576ba7fb --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr58956.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ + +extern void abort (void); + +struct S +{ + int f0; +} a = {1}, b, g, *c = &b, **f = &c; + +int *d, **e = &d, h; + +struct S +foo () +{ + *e = &h; + if (!d) + __builtin_unreachable (); + *f = &g; + return a; +} + +int +main () +{ + struct S *i = c; + *i = foo (); + if (b.f0 != 1) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59047.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59047.c new file mode 100644 index 000000000..fcedfcba8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59047.c @@ -0,0 +1,39 @@ +/* { dg-do run } */ + +extern void abort (void); + +struct +{ + int f0; + int f1:1; + int f2:2; +} a = {0, 0, 1}; + +int b, c, *d, e, f; + +int +fn1 () +{ + for (; b < 1; ++b) + { + for (e = 0; e < 1; e = 1) + { + int **g = &d; + *g = &c; + } + *d = 0; + f = a.f1; + if (f) + return 0; + } + return 0; +} + +int +main () +{ + fn1 (); + if (b != 1) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59139.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59139.c new file mode 100644 index 000000000..4ec9177ff --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59139.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ + +int a, b, c, d, e; +int fn1(p1, p2) { return p2 == 0 ? p1 : 1 % p2; } + +void fn2() +{ + c = 0; + for (;; c = (unsigned short)c) + { + b = 2; + for (; b; b = a) + { + e = fn1(2, c && 1); + d = c == 0 ? e : c; + if (d) + return; + } + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59164.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59164.c new file mode 100644 index 000000000..1ec69610c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59164.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ + +int a, d, e; +long b[10]; +int c[10][8]; + +int fn1(p1) +{ + return 1 >> p1; +} + +void fn2(void) +{ + int f; + for (a=1; a <= 4; a++) + { + f = fn1(0 < c[a][0]); + if (f || d) + e = b[a] = 1; + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59288.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59288.c new file mode 100644 index 000000000..8331e7328 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59288.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ + +void +baz (int *d) +{ + long int i, j, k; + for (i = 0, j = 0, k = 0; i < 512; i = (int) i + 1, j = (int) j + 1, k = (int) k + 3) + d[i] = j ^ (i * 3) ^ (2 * k + 2); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59330.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59330.c new file mode 100644 index 000000000..74b832ea3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59330.c @@ -0,0 +1,17 @@ +/* { dg-do run } */ + +void free(void *ptr) +{ +} + +void *foo(void) +{ + return 0; +} + +int main(void) +{ + void *p = foo(); + free(p); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59715.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59715.c new file mode 100644 index 000000000..19c09de55 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59715.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ + +extern void abort (void); + +int a = 2, b; + +int +main () +{ + int c; + if (!b) + { + b = a; + c = a == 0 ? 1 : 1 % a; + if (c) + b = 0; + } + if (b != 0) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59891.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59891.c new file mode 100644 index 000000000..1562acccf --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59891.c @@ -0,0 +1,9 @@ +/* PR c/59891 */ + +unsigned int a; + +int +main () +{ + return (0 ? a : 0) ? : 0 % 0; /* { dg-warning "division by zero" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59903.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59903.c new file mode 100644 index 000000000..01772df61 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr59903.c @@ -0,0 +1,56 @@ +/* { dg-do compile } */ + +int a, b, c, d, e, f, g, h, i[3], l, m, n, o, p, q, r; + +struct S0 +{ + int f0; + int f1; + int f2; + int f3; +} j; + +static int +fn1 (int p1) +{ + return p1 || ((p1 > 0) > (e << 1)); +} + +static struct S0 +fn2 (struct S0 p1) +{ + char s; + struct S0 t = {0,0,0,0}; + int u = 2; + for (;;) + { + if (i[0]) + break; + for (m = 0; m < 4; m++) + for (p1.f0 = 0; p1.f0 < 3; p1.f0++) + { + j = t; + t.f3 = i[p1.f0]; + o = b || 1 >> b ? 0 : a < 0; + q = 1 % d; + if ((g < fn1 ((1 ^ (q & 1)) | n)) ^ u) + j.f3 |= p % 2; + s = j.f3 > 0 ? j.f3 : j.f3 << 1; + r = l = s && p1.f1 * c; + h = p1.f1; + } + } + return p1; +} + +int +main () +{ + for (;f;) + { + struct S0 v = {0,0,0,0}; + fn2 (v); + j.f3 = 0; + } + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60115.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60115.c new file mode 100644 index 000000000..cf7f45dfb --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60115.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ + +int a, b[2]; + +int +main () +{ +lbl: + for (; a; a--) + if (b[10000]) + goto lbl; + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60183.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60183.c new file mode 100644 index 000000000..d37b4b80a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60183.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ + +/* Large so an out-of-bound read will crash. */ +unsigned char c[0x30001] = { 1 }; +int j = 2; + +static void +foo (unsigned long *x, unsigned char *y) +{ + int i; + unsigned long w = x[0]; + for (i = 0; i < j; i++) + { + w += *y; + y += 0x10000; + w += *y; + y += 0x10000; + } + x[1] = w; +} + +__attribute__ ((noinline, noclone)) void +bar (unsigned long *x) +{ + foo (x, c); +} + +int +main () +{ + unsigned long a[2] = { 0, -1UL }; + asm volatile (""::"r" (c):"memory"); + c[0] = 0; + bar (a); + if (a[1] != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60766.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60766.c new file mode 100644 index 000000000..6f16e3b74 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60766.c @@ -0,0 +1,15 @@ +/* { dg-do run } */ + +int m = 9; + +int main() +{ + int n, x; + + n = m; + for (x = 0; x <= n; x++) + if (n == x + (x + 1) + (x + 2)) + return 0; + + __builtin_abort(); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60903.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60903.c new file mode 100644 index 000000000..5d93ae3ee --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60903.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ + +extern int a, b, k, q; + +void +foo () +{ + if (a) + { + while (q) + { + lbl: + if (a) + { + a = 0; + goto lbl; + } + } + b = k; + } + goto lbl; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60930.c b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60930.c new file mode 100644 index 000000000..5e35f1988 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/torture/pr60930.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ + +int x = 1; + +__attribute__((noinline, noclone)) void +foo (unsigned long long t) +{ + asm volatile ("" : : "r" (&t)); + if (t == 1) + __builtin_abort (); +} + +int +main () +{ +#if __SIZEOF_LONG_LONG__ >= 8 + unsigned long long t = 0xffffffffffffffffULL * (0xffffffffUL * x); + if (t != 0xffffffff00000001ULL) + foo (t);; +#endif + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c b/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c new file mode 100644 index 000000000..0af243814 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-6.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-options "-O3" } */ + +int a, c, e[5][2]; +unsigned int d; + +int +main () +{ + for (d = 0; d < 2; d++) + if (a ? 0 : e[c + 3][d] & e[c + 4][d]) + break; + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c b/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c new file mode 100644 index 000000000..e7ae87ccc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -fdump-tree-pcom-details" } */ + +int b, f, d[5][2]; +unsigned int c; + +int +main () +{ + for (c = 0; c < 2; c++) + if (d[b + 3][c] & d[b + 4][c]) + if (f) + break; + return 0; +} + +/* { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } } */ +/* { dg-final { cleanup-tree-dump "pcom" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/unused-8b.c b/gcc-4.8/gcc/testsuite/gcc.dg/unused-8b.c new file mode 100644 index 000000000..5b4b89493 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/unused-8b.c @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-Wall -Wno-unused -Wextra" } */ + +void foo(int x) { } diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60276.c b/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60276.c new file mode 100644 index 000000000..d4ad21980 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60276.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ + +extern void abort (void); + +static void +foo (int *out, const int *lp, unsigned samples) +{ + int x, target; + for (x = 0, target = 0; x < (int)samples; x += 2, target++) + { + out[x] = lp[target]; + out[x - 1] = out[x - 2] + out[x]; + } +} + +static void +foo_novec (int *out, const int *lp, unsigned samples) +{ + int x, target; + for (x = 0, target = 0; x < (int)samples; x += 2, target++) + { + out[x] = lp[target]; + out[x - 1] = out[x - 2] + out[x]; + __asm__ volatile ("" : : : "memory"); + } +} + +int main(void) +{ + const int lp[25] = { + 0, 2, 4, 6, 8, + 10, 12, 14, 16, + 18, 20, 22, 24, + 26, 28, 30, 32, + 34, 36, 38, 40, + 42, 44, 46, 48, + }; + int out[49] = {0}; + int out2[49] = {0}; + int s; + + foo (out + 2, lp + 1, 48); + foo_novec (out2 + 2, lp + 1, 48); + + for (s = 0; s < 49; s++) + if (out[s] != out2[s]) + abort (); + + return 0; +} + +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60382.c b/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60382.c new file mode 100644 index 000000000..a28c6313c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vect/pr60382.c @@ -0,0 +1,32 @@ +#include "tree-vect.h" + +int a, b, c, e, f; + +void +foo () +{ + for (b = 0; b < 3; b++) + if (e) + { + for (c = 0; c < 4; c++) + { + if (b) + continue; + f = 1; + for (a = 0; a < 2; a++) + f |= 1; + } + for (;;) + ; + } +} + +int +main () +{ + check_vect (); + foo (); + return 0; +} + +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-be-order.c new file mode 100644 index 000000000..5c09471d9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-be-order.c @@ -0,0 +1,33 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vc = {0,1,2,3,4,5,6,7}; + vector signed short vd = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int ve = {0,1,2,3}; + vector signed int vf = {-2,-1,0,1}; + vector float vg = {-2.0f,-1.0f,0.0f,1.0f}; + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + check (vec_extract (va, 5) == 10, "vec_extract (va, 5)"); + check (vec_extract (vb, 0) == 7, "vec_extract (vb, 0)"); + check (vec_extract (vc, 7) == 0, "vec_extract (vc, 7)"); + check (vec_extract (vd, 3) == 0, "vec_extract (vd, 3)"); + check (vec_extract (ve, 2) == 1, "vec_extract (ve, 2)"); + check (vec_extract (vf, 1) == 0, "vec_extract (vf, 1)"); + check (vec_extract (vg, 0) == 1.0f, "vec_extract (vg, 0)"); +#else + check (vec_extract (va, 5) == 5, "vec_extract (va, 5)"); + check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)"); + check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)"); + check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)"); + check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)"); + check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)"); + check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)"); +#endif +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c new file mode 100644 index 000000000..6428ea5d8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c @@ -0,0 +1,19 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static void test() +{ + vector long long vl = {0, 1}; + vector double vd = {0.0, 1.0}; + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + check (vec_extract (vl, 0) == 1, "vl, 0"); + check (vec_extract (vd, 1) == 0.0, "vd, 1"); +#else + check (vec_extract (vl, 0) == 0, "vl, 0"); + check (vec_extract (vd, 1) == 1.0, "vd, 1"); +#endif +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx.c new file mode 100644 index 000000000..cd34a2ae3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract-vsx.c @@ -0,0 +1,16 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static void test() +{ + vector long long vl = {0, 1}; + vector double vd = {0.0, 1.0}; + + check (vec_extract (vl, 0) == 0, "vec_extract, vl, 0"); + check (vec_extract (vd, 1) == 1.0, "vec_extract, vd, 1"); + check (vl[0] == 0, "[], vl, 0"); + check (vd[1] == 1.0, "[], vd, 0"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract.c new file mode 100644 index 000000000..6fc472557 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/extract.c @@ -0,0 +1,21 @@ +#include "harness.h" + +static void test() +{ + vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vc = {0,1,2,3,4,5,6,7}; + vector signed short vd = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int ve = {0,1,2,3}; + vector signed int vf = {-2,-1,0,1}; + vector float vg = {-2.0f,-1.0f,0.0f,1.0f}; + + check (vec_extract (va, 5) == 5, "vec_extract (va, 5)"); + check (vec_extract (vb, 0) == -8, "vec_extract (vb, 0)"); + check (vec_extract (vc, 7) == 7, "vec_extract (vc, 7)"); + check (vec_extract (vd, 3) == -1, "vec_extract (vd, 3)"); + check (vec_extract (ve, 2) == 2, "vec_extract (ve, 2)"); + check (vec_extract (vf, 1) == -1, "vec_extract (vf, 1)"); + check (vec_extract (vg, 0) == -2.0f, "vec_extract (vg, 0)"); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c index 97ef14488..3e0e6a079 100644 --- a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/gcc-bug-i.c @@ -13,12 +13,27 @@ #define DO_INLINE __attribute__ ((always_inline)) #define DONT_INLINE __attribute__ ((noinline)) +#ifdef __LITTLE_ENDIAN__ +static inline DO_INLINE int inline_me(vector signed short data) +{ + union {vector signed short v; signed short s[8];} u; + signed short x; + unsigned char x1, x2; + + u.v = data; + x = u.s[7]; + x1 = (x >> 8) & 0xff; + x2 = x & 0xff; + return ((x2 << 8) | x1); +} +#else static inline DO_INLINE int inline_me(vector signed short data) { union {vector signed short v; signed short s[8];} u; u.v = data; return u.s[7]; } +#endif static DONT_INLINE int foo(vector signed short data) { diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-be-order.c new file mode 100644 index 000000000..592ef28c0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-be-order.c @@ -0,0 +1,65 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vc = {0,1,2,3,4,5,6,7}; + vector signed short vd = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int ve = {0,1,2,3}; + vector signed int vf = {-2,-1,0,1}; + vector float vg = {-2.0f,-1.0f,0.0f,1.0f}; + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + check (vec_all_eq (vec_insert (16, va, 5), + ((vector unsigned char) + {0,1,2,3,4,5,6,7,8,9,16,11,12,13,14,15})), + "vec_insert (va LE)"); + check (vec_all_eq (vec_insert (-16, vb, 0), + ((vector signed char) + {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,-16})), + "vec_insert (vb LE)"); + check (vec_all_eq (vec_insert (16, vc, 7), + ((vector unsigned short){16,1,2,3,4,5,6,7})), + "vec_insert (vc LE)"); + check (vec_all_eq (vec_insert (-16, vd, 3), + ((vector signed short){-4,-3,-2,-1,-16,1,2,3})), + "vec_insert (vd LE)"); + check (vec_all_eq (vec_insert (16, ve, 2), + ((vector unsigned int){0,16,2,3})), + "vec_insert (ve LE)"); + check (vec_all_eq (vec_insert (-16, vf, 1), + ((vector signed int){-2,-1,-16,1})), + "vec_insert (vf LE)"); + check (vec_all_eq (vec_insert (-16.0f, vg, 0), + ((vector float){-2.0f,-1.0f,0.0f,-16.0f})), + "vec_insert (vg LE)"); +#else + check (vec_all_eq (vec_insert (16, va, 5), + ((vector unsigned char) + {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})), + "vec_insert (va BE)"); + check (vec_all_eq (vec_insert (-16, vb, 0), + ((vector signed char) + {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})), + "vec_insert (vb BE)"); + check (vec_all_eq (vec_insert (16, vc, 7), + ((vector unsigned short){0,1,2,3,4,5,6,16})), + "vec_insert (vc BE)"); + check (vec_all_eq (vec_insert (-16, vd, 3), + ((vector signed short){-4,-3,-2,-16,0,1,2,3})), + "vec_insert (vd BE)"); + check (vec_all_eq (vec_insert (16, ve, 2), + ((vector unsigned int){0,1,16,3})), + "vec_insert (ve BE)"); + check (vec_all_eq (vec_insert (-16, vf, 1), + ((vector signed int){-2,-16,0,1})), + "vec_insert (vf BE)"); + check (vec_all_eq (vec_insert (-16.0f, vg, 0), + ((vector float){-16.0f,-1.0f,0.0f,1.0f})), + "vec_insert (vg BE)"); +#endif +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c new file mode 100644 index 000000000..672fc449e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c @@ -0,0 +1,34 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static int vec_long_long_eq (vector long long x, vector long long y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static int vec_dbl_eq (vector double x, vector double y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static void test() +{ + vector long long vl = {0, 1}; + vector double vd = {0.0, 1.0}; + vector long long vlr = vec_insert (2, vl, 0); + vector double vdr = vec_insert (2.0, vd, 1); + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector long long vler = {0, 2}; + vector double vder = {2.0, 1.0}; +#else + vector long long vler = {2, 1}; + vector double vder = {0.0, 2.0}; +#endif + + check (vec_long_long_eq (vlr, vler), "vl"); + check (vec_dbl_eq (vdr, vder), "vd"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx.c new file mode 100644 index 000000000..afb9c7016 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert-vsx.c @@ -0,0 +1,28 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static int vec_long_long_eq (vector long long x, vector long long y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static int vec_dbl_eq (vector double x, vector double y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static void test() +{ + vector long long vl = {0, 1}; + vector double vd = {0.0, 1.0}; + vector long long vlr = vec_insert (2, vl, 0); + vector double vdr = vec_insert (2.0, vd, 1); + vector long long vler = {2, 1}; + vector double vder = {0.0, 2.0}; + + check (vec_long_long_eq (vlr, vler), "vl"); + check (vec_dbl_eq (vdr, vder), "vd"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert.c new file mode 100644 index 000000000..39cd75d87 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/insert.c @@ -0,0 +1,37 @@ +#include "harness.h" + +static void test() +{ + vector unsigned char va = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vb = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vc = {0,1,2,3,4,5,6,7}; + vector signed short vd = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int ve = {0,1,2,3}; + vector signed int vf = {-2,-1,0,1}; + vector float vg = {-2.0f,-1.0f,0.0f,1.0f}; + + check (vec_all_eq (vec_insert (16, va, 5), + ((vector unsigned char) + {0,1,2,3,4,16,6,7,8,9,10,11,12,13,14,15})), + "vec_insert (va)"); + check (vec_all_eq (vec_insert (-16, vb, 0), + ((vector signed char) + {-16,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7})), + "vec_insert (vb)"); + check (vec_all_eq (vec_insert (16, vc, 7), + ((vector unsigned short){0,1,2,3,4,5,6,16})), + "vec_insert (vc)"); + check (vec_all_eq (vec_insert (-16, vd, 3), + ((vector signed short){-4,-3,-2,-16,0,1,2,3})), + "vec_insert (vd)"); + check (vec_all_eq (vec_insert (16, ve, 2), + ((vector unsigned int){0,1,16,3})), + "vec_insert (ve)"); + check (vec_all_eq (vec_insert (-16, vf, 1), + ((vector signed int){-2,-16,0,1})), + "vec_insert (vf)"); + check (vec_all_eq (vec_insert (-16.0f, vg, 0), + ((vector float){-16.0f,-1.0f,0.0f,1.0f})), + "vec_insert (vg)"); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-be-order.c new file mode 100644 index 000000000..903b997c9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-be-order.c @@ -0,0 +1,107 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + svuc[i] = i; + svsc[i] = i - 8; + svbc[i] = (i % 2) ? 0xff : 0; + } + for (i = 0; i < 8; ++i) + { + svus[i] = i; + svss[i] = i - 4; + svbs[i] = (i % 2) ? 0xffff : 0; + svp[i] = i; + } + for (i = 0; i < 4; ++i) + { + svui[i] = i; + svsi[i] = i - 2; + svbi[i] = (i % 2) ? 0xffffffff : 0; + svf[i] = i * 1.0f; + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; + vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8}; + vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0}; + vector unsigned short evus = {7,6,5,4,3,2,1,0}; + vector signed short evss = {3,2,1,0,-1,-2,-3,-4}; + vector bool short evbs = {65535,0,65535,0,65535,0,65535,0}; + vector pixel evp = {7,6,5,4,3,2,1,0}; + vector unsigned int evui = {3,2,1,0}; + vector signed int evsi = {1,0,-1,-2}; + vector bool int evbi = {0xffffffff,0,0xffffffff,0}; + vector float evf = {3.0,2.0,1.0,0.0}; +#else + vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short evus = {0,1,2,3,4,5,6,7}; + vector signed short evss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short evbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel evp = {0,1,2,3,4,5,6,7}; + vector unsigned int evui = {0,1,2,3}; + vector signed int evsi = {-2,-1,0,1}; + vector bool int evbi = {0,0xffffffff,0,0xffffffff}; + vector float evf = {0.0,1.0,2.0,3.0}; +#endif + + vector unsigned char vuc; + vector signed char vsc; + vector bool char vbc; + vector unsigned short vus; + vector signed short vss; + vector bool short vbs; + vector pixel vp; + vector unsigned int vui; + vector signed int vsi; + vector bool int vbi; + vector float vf; + + init (); + + vuc = vec_ld (0, (vector unsigned char *)svuc); + vsc = vec_ld (0, (vector signed char *)svsc); + vbc = vec_ld (0, (vector bool char *)svbc); + vus = vec_ld (0, (vector unsigned short *)svus); + vss = vec_ld (0, (vector signed short *)svss); + vbs = vec_ld (0, (vector bool short *)svbs); + vp = vec_ld (0, (vector pixel *)svp); + vui = vec_ld (0, (vector unsigned int *)svui); + vsi = vec_ld (0, (vector signed int *)svsi); + vbi = vec_ld (0, (vector bool int *)svbi); + vf = vec_ld (0, (vector float *)svf); + + check (vec_all_eq (vuc, evuc), "vuc"); + check (vec_all_eq (vsc, evsc), "vsc"); + check (vec_all_eq (vbc, evbc), "vbc"); + check (vec_all_eq (vus, evus), "vus"); + check (vec_all_eq (vss, evss), "vss"); + check (vec_all_eq (vbs, evbs), "vbs"); + check (vec_all_eq (vp, evp ), "vp" ); + check (vec_all_eq (vui, evui), "vui"); + check (vec_all_eq (vsi, evsi), "vsi"); + check (vec_all_eq (vbi, evbi), "vbi"); + check (vec_all_eq (vf, evf ), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c new file mode 100644 index 000000000..fc81beb0d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c @@ -0,0 +1,44 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + svul[i] = i; + svd[i] = i * 1.0; + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned long long evul = {1,0}; + vector double evd = {1.0,0.0}; +#else + vector unsigned long long evul = {0,1}; + vector double evd = {0.0,1.0}; +#endif + + vector unsigned long long vul; + vector double vd; + unsigned i; + + init (); + + vul = vec_ld (0, (vector unsigned long long *)svul); + vd = vec_ld (0, (vector double *)svd); + + for (i = 0; i < 2; ++i) + { + check (vul[i] == evul[i], "vul"); + check (vd[i] == evd[i], "vd" ); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx.c new file mode 100644 index 000000000..9d2a529f8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld-vsx.c @@ -0,0 +1,39 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + svul[i] = i; + svd[i] = i * 1.0; + } +} + +static void test () +{ + vector unsigned long long evul = {0,1}; + vector double evd = {0.0,1.0}; + + vector unsigned long long vul; + vector double vd; + unsigned i; + + init (); + + vul = vec_ld (0, (vector unsigned long long *)svul); + vd = vec_ld (0, (vector double *)svd); + + for (i = 0; i < 2; ++i) + { + check (vul[i] == evul[i], "vul"); + check (vd[i] == evd[i], "vd" ); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld.c new file mode 100644 index 000000000..851fbd58a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ld.c @@ -0,0 +1,91 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + svuc[i] = i; + svsc[i] = i - 8; + svbc[i] = (i % 2) ? 0xff : 0; + } + for (i = 0; i < 8; ++i) + { + svus[i] = i; + svss[i] = i - 4; + svbs[i] = (i % 2) ? 0xffff : 0; + svp[i] = i; + } + for (i = 0; i < 4; ++i) + { + svui[i] = i; + svsi[i] = i - 2; + svbi[i] = (i % 2) ? 0xffffffff : 0; + svf[i] = i * 1.0f; + } +} + +static void test () +{ + vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short evus = {0,1,2,3,4,5,6,7}; + vector signed short evss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short evbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel evp = {0,1,2,3,4,5,6,7}; + vector unsigned int evui = {0,1,2,3}; + vector signed int evsi = {-2,-1,0,1}; + vector bool int evbi = {0,0xffffffff,0,0xffffffff}; + vector float evf = {0.0,1.0,2.0,3.0}; + + vector unsigned char vuc; + vector signed char vsc; + vector bool char vbc; + vector unsigned short vus; + vector signed short vss; + vector bool short vbs; + vector pixel vp; + vector unsigned int vui; + vector signed int vsi; + vector bool int vbi; + vector float vf; + + init (); + + vuc = vec_ld (0, (vector unsigned char *)svuc); + vsc = vec_ld (0, (vector signed char *)svsc); + vbc = vec_ld (0, (vector bool char *)svbc); + vus = vec_ld (0, (vector unsigned short *)svus); + vss = vec_ld (0, (vector signed short *)svss); + vbs = vec_ld (0, (vector bool short *)svbs); + vp = vec_ld (0, (vector pixel *)svp); + vui = vec_ld (0, (vector unsigned int *)svui); + vsi = vec_ld (0, (vector signed int *)svsi); + vbi = vec_ld (0, (vector bool int *)svbi); + vf = vec_ld (0, (vector float *)svf); + + check (vec_all_eq (vuc, evuc), "vuc"); + check (vec_all_eq (vsc, evsc), "vsc"); + check (vec_all_eq (vbc, evbc), "vbc"); + check (vec_all_eq (vus, evus), "vus"); + check (vec_all_eq (vss, evss), "vss"); + check (vec_all_eq (vbs, evbs), "vbs"); + check (vec_all_eq (vp, evp ), "vp" ); + check (vec_all_eq (vui, evui), "vui"); + check (vec_all_eq (vsi, evsi), "vsi"); + check (vec_all_eq (vbi, evbi), "vbi"); + check (vec_all_eq (vf, evf ), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde-be-order.c new file mode 100644 index 000000000..9a6d5bae5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde-be-order.c @@ -0,0 +1,73 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + int i; +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + for (i = 15; i >= 0; --i) +#else + for (i = 0; i < 16; ++i) +#endif + { + svuc[i] = i; + svsc[i] = i - 8; + } +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + for (i = 7; i >= 0; --i) +#else + for (i = 0; i < 8; ++i) +#endif + { + svus[i] = i; + svss[i] = i - 4; + } +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + for (i = 3; i >= 0; --i) +#else + for (i = 0; i < 4; ++i) +#endif + { + svui[i] = i; + svsi[i] = i - 2; + svf[i] = i * 1.0f; + } +} + +static void test () +{ + vector unsigned char vuc; + vector signed char vsc; + vector unsigned short vus; + vector signed short vss; + vector unsigned int vui; + vector signed int vsi; + vector float vf; + + init (); + + vuc = vec_lde (9*1, (unsigned char *)svuc); + vsc = vec_lde (14*1, (signed char *)svsc); + vus = vec_lde (7*2, (unsigned short *)svus); + vss = vec_lde (1*2, (signed short *)svss); + vui = vec_lde (3*4, (unsigned int *)svui); + vsi = vec_lde (2*4, (signed int *)svsi); + vf = vec_lde (0*4, (float *)svf); + + check (vec_extract (vuc, 9) == 9, "vuc"); + check (vec_extract (vsc, 14) == 6, "vsc"); + check (vec_extract (vus, 7) == 7, "vus"); + check (vec_extract (vss, 1) == -3, "vss"); + check (vec_extract (vui, 3) == 3, "vui"); + check (vec_extract (vsi, 2) == 0, "vsi"); + check (vec_extract (vf, 0) == 0.0, "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde.c new file mode 100644 index 000000000..5594963c7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/lde.c @@ -0,0 +1,59 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + svuc[i] = i; + svsc[i] = i - 8; + } + for (i = 0; i < 8; ++i) + { + svus[i] = i; + svss[i] = i - 4; + } + for (i = 0; i < 4; ++i) + { + svui[i] = i; + svsi[i] = i - 2; + svf[i] = i * 1.0f; + } +} + +static void test () +{ + vector unsigned char vuc; + vector signed char vsc; + vector unsigned short vus; + vector signed short vss; + vector unsigned int vui; + vector signed int vsi; + vector float vf; + + init (); + + vuc = vec_lde (9*1, (unsigned char *)svuc); + vsc = vec_lde (14*1, (signed char *)svsc); + vus = vec_lde (7*2, (unsigned short *)svus); + vss = vec_lde (1*2, (signed short *)svss); + vui = vec_lde (3*4, (unsigned int *)svui); + vsi = vec_lde (2*4, (signed int *)svsi); + vf = vec_lde (0*4, (float *)svf); + + check (vec_extract (vuc, 9) == 9, "vuc"); + check (vec_extract (vsc, 14) == 6, "vsc"); + check (vec_extract (vus, 7) == 7, "vus"); + check (vec_extract (vss, 1) == -3, "vss"); + check (vec_extract (vui, 3) == 3, "vui"); + check (vec_extract (vsi, 2) == 0, "vsi"); + check (vec_extract (vf, 0) == 0.0, "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c new file mode 100644 index 000000000..397849fe1 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-be-order.c @@ -0,0 +1,107 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + svuc[i] = i; + svsc[i] = i - 8; + svbc[i] = (i % 2) ? 0xff : 0; + } + for (i = 0; i < 8; ++i) + { + svus[i] = i; + svss[i] = i - 4; + svbs[i] = (i % 2) ? 0xffff : 0; + svp[i] = i; + } + for (i = 0; i < 4; ++i) + { + svui[i] = i; + svsi[i] = i - 2; + svbi[i] = (i % 2) ? 0xffffffff : 0; + svf[i] = i * 1.0f; + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char evuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; + vector signed char evsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8}; + vector bool char evbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0}; + vector unsigned short evus = {7,6,5,4,3,2,1,0}; + vector signed short evss = {3,2,1,0,-1,-2,-3,-4}; + vector bool short evbs = {65535,0,65535,0,65535,0,65535,0}; + vector pixel evp = {7,6,5,4,3,2,1,0}; + vector unsigned int evui = {3,2,1,0}; + vector signed int evsi = {1,0,-1,-2}; + vector bool int evbi = {0xffffffff,0,0xffffffff,0}; + vector float evf = {3.0,2.0,1.0,0.0}; +#else + vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short evus = {0,1,2,3,4,5,6,7}; + vector signed short evss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short evbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel evp = {0,1,2,3,4,5,6,7}; + vector unsigned int evui = {0,1,2,3}; + vector signed int evsi = {-2,-1,0,1}; + vector bool int evbi = {0,0xffffffff,0,0xffffffff}; + vector float evf = {0.0,1.0,2.0,3.0}; +#endif + + vector unsigned char vuc; + vector signed char vsc; + vector bool char vbc; + vector unsigned short vus; + vector signed short vss; + vector bool short vbs; + vector pixel vp; + vector unsigned int vui; + vector signed int vsi; + vector bool int vbi; + vector float vf; + + init (); + + vuc = vec_ldl (0, (vector unsigned char *)svuc); + vsc = vec_ldl (0, (vector signed char *)svsc); + vbc = vec_ldl (0, (vector bool char *)svbc); + vus = vec_ldl (0, (vector unsigned short *)svus); + vss = vec_ldl (0, (vector signed short *)svss); + vbs = vec_ldl (0, (vector bool short *)svbs); + vp = vec_ldl (0, (vector pixel *)svp); + vui = vec_ldl (0, (vector unsigned int *)svui); + vsi = vec_ldl (0, (vector signed int *)svsi); + vbi = vec_ldl (0, (vector bool int *)svbi); + vf = vec_ldl (0, (vector float *)svf); + + check (vec_all_eq (vuc, evuc), "vuc"); + check (vec_all_eq (vsc, evsc), "vsc"); + check (vec_all_eq (vbc, evbc), "vbc"); + check (vec_all_eq (vus, evus), "vus"); + check (vec_all_eq (vss, evss), "vss"); + check (vec_all_eq (vbs, evbs), "vbs"); + check (vec_all_eq (vp, evp ), "vp" ); + check (vec_all_eq (vui, evui), "vui"); + check (vec_all_eq (vsi, evsi), "vsi"); + check (vec_all_eq (vbi, evbi), "vbi"); + check (vec_all_eq (vf, evf ), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c new file mode 100644 index 000000000..1dd0ca33e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c @@ -0,0 +1,44 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + svul[i] = i; + svd[i] = i * 1.0; + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned long long evul = {1,0}; + vector double evd = {1.0,0.0}; +#else + vector unsigned long long evul = {0,1}; + vector double evd = {0.0,1.0}; +#endif + + vector unsigned long long vul; + vector double vd; + unsigned i; + + init (); + + vul = vec_ldl (0, (vector unsigned long long *)svul); + vd = vec_ldl (0, (vector double *)svd); + + for (i = 0; i < 2; ++i) + { + check (vul[i] == evul[i], "vul"); + check (vd[i] == evd[i], "vd" ); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c new file mode 100644 index 000000000..4bf3224f6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c @@ -0,0 +1,39 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + svul[i] = i; + svd[i] = i * 1.0; + } +} + +static void test () +{ + vector unsigned long long evul = {0,1}; + vector double evd = {0.0,1.0}; + + vector unsigned long long vul; + vector double vd; + unsigned i; + + init (); + + vul = vec_ldl (0, (vector unsigned long long *)svul); + vd = vec_ldl (0, (vector double *)svd); + + for (i = 0; i < 2; ++i) + { + check (vul[i] == evul[i], "vul"); + check (vd[i] == evd[i], "vd" ); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl.c new file mode 100644 index 000000000..3f9a603e3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ldl.c @@ -0,0 +1,91 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void init () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + svuc[i] = i; + svsc[i] = i - 8; + svbc[i] = (i % 2) ? 0xff : 0; + } + for (i = 0; i < 8; ++i) + { + svus[i] = i; + svss[i] = i - 4; + svbs[i] = (i % 2) ? 0xffff : 0; + svp[i] = i; + } + for (i = 0; i < 4; ++i) + { + svui[i] = i; + svsi[i] = i - 2; + svbi[i] = (i % 2) ? 0xffffffff : 0; + svf[i] = i * 1.0f; + } +} + +static void test () +{ + vector unsigned char evuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char evsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char evbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short evus = {0,1,2,3,4,5,6,7}; + vector signed short evss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short evbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel evp = {0,1,2,3,4,5,6,7}; + vector unsigned int evui = {0,1,2,3}; + vector signed int evsi = {-2,-1,0,1}; + vector bool int evbi = {0,0xffffffff,0,0xffffffff}; + vector float evf = {0.0,1.0,2.0,3.0}; + + vector unsigned char vuc; + vector signed char vsc; + vector bool char vbc; + vector unsigned short vus; + vector signed short vss; + vector bool short vbs; + vector pixel vp; + vector unsigned int vui; + vector signed int vsi; + vector bool int vbi; + vector float vf; + + init (); + + vuc = vec_ldl (0, (vector unsigned char *)svuc); + vsc = vec_ldl (0, (vector signed char *)svsc); + vbc = vec_ldl (0, (vector bool char *)svbc); + vus = vec_ldl (0, (vector unsigned short *)svus); + vss = vec_ldl (0, (vector signed short *)svss); + vbs = vec_ldl (0, (vector bool short *)svbs); + vp = vec_ldl (0, (vector pixel *)svp); + vui = vec_ldl (0, (vector unsigned int *)svui); + vsi = vec_ldl (0, (vector signed int *)svsi); + vbi = vec_ldl (0, (vector bool int *)svbi); + vf = vec_ldl (0, (vector float *)svf); + + check (vec_all_eq (vuc, evuc), "vuc"); + check (vec_all_eq (vsc, evsc), "vsc"); + check (vec_all_eq (vbc, evbc), "vbc"); + check (vec_all_eq (vus, evus), "vus"); + check (vec_all_eq (vss, evss), "vss"); + check (vec_all_eq (vbs, evbs), "vbs"); + check (vec_all_eq (vp, evp ), "vp" ); + check (vec_all_eq (vui, evui), "vui"); + check (vec_all_eq (vsi, evsi), "vsi"); + check (vec_all_eq (vbi, evbi), "vbi"); + check (vec_all_eq (vf, evf ), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-be-order.c new file mode 100644 index 000000000..2de888fa4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-be-order.c @@ -0,0 +1,96 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb + = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31}; + vector signed char vsca + = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + + /* Result vectors. */ + vector unsigned char vuch, vucl; + vector signed char vsch, vscl; + vector unsigned short vush, vusl; + vector signed short vssh, vssl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vucrh = {24,8,25,9,26,10,27,11,28,12,29,13,30,14,31,15}; + vector unsigned char vucrl = {16,0,17,1,18,2,19,3,20,4,21,5,22,6,23,7}; + vector signed char vscrh = {8,-8,9,-7,10,-6,11,-5,12,-4,13,-3,14,-2,15,-1}; + vector signed char vscrl = {0,-16,1,-15,2,-14,3,-13,4,-12,5,-11,6,-10,7,-9}; + vector unsigned short vusrh = {12,4,13,5,14,6,15,7}; + vector unsigned short vusrl = {8,0,9,1,10,2,11,3}; + vector signed short vssrh = {4,-4,5,-3,6,-2,7,-1}; + vector signed short vssrl = {0,-8,1,-7,2,-6,3,-5}; + vector unsigned int vuirh = {6,2,7,3}; + vector unsigned int vuirl = {4,0,5,1}; + vector signed int vsirh = {2,-2,3,-1}; + vector signed int vsirl = {0,-4,1,-3}; + vector float vfrh = {2.0,-2.0,3.0,-1.0}; + vector float vfrl = {0.0,-4.0,1.0,-3.0}; +#else + vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23}; + vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31}; + vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7}; + vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15}; + vector unsigned short vusrh = {0,8,1,9,2,10,3,11}; + vector unsigned short vusrl = {4,12,5,13,6,14,7,15}; + vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3}; + vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; +#endif + + vuch = vec_mergeh (vuca, vucb); + vucl = vec_mergel (vuca, vucb); + vsch = vec_mergeh (vsca, vscb); + vscl = vec_mergel (vsca, vscb); + vush = vec_mergeh (vusa, vusb); + vusl = vec_mergel (vusa, vusb); + vssh = vec_mergeh (vssa, vssb); + vssl = vec_mergel (vssa, vssb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); + + check (vec_all_eq (vuch, vucrh), "vuch"); + check (vec_all_eq (vucl, vucrl), "vucl"); + check (vec_all_eq (vsch, vscrh), "vsch"); + check (vec_all_eq (vscl, vscrl), "vscl"); + check (vec_all_eq (vush, vusrh), "vush"); + check (vec_all_eq (vusl, vusrl), "vusl"); + check (vec_all_eq (vssh, vssrh), "vssh"); + check (vec_all_eq (vssl, vssrl), "vssl"); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c new file mode 100644 index 000000000..56e0b0e6c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c @@ -0,0 +1,84 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static int vec_long_long_eq (vector long long x, vector long long y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static int vec_double_eq (vector double x, vector double y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static void test() +{ + /* Input vectors. */ + vector long long vla = {-2,-1}; + vector long long vlb = {0,1}; + vector double vda = {-2.0,-1.0}; + vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + + /* Result vectors. */ + vector long long vlh, vll; + vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector long long vlrh = {1,-1}; + vector long long vlrl = {0,-2}; + vector double vdrh = {1.0,-1.0}; + vector double vdrl = {0.0,-2.0}; + vector unsigned int vuirh = {6,2,7,3}; + vector unsigned int vuirl = {4,0,5,1}; + vector signed int vsirh = {2,-2,3,-1}; + vector signed int vsirl = {0,-4,1,-3}; + vector float vfrh = {2.0,-2.0,3.0,-1.0}; + vector float vfrl = {0.0,-4.0,1.0,-3.0}; +#else + vector long long vlrh = {-2,0}; + vector long long vlrl = {-1,1}; + vector double vdrh = {-2.0,0.0}; + vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; +#endif + + vlh = vec_mergeh (vla, vlb); + vll = vec_mergel (vla, vlb); + vdh = vec_mergeh (vda, vdb); + vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); + + check (vec_long_long_eq (vlh, vlrh), "vlh"); + check (vec_long_long_eq (vll, vlrl), "vll"); + check (vec_double_eq (vdh, vdrh), "vdh" ); + check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx.c new file mode 100644 index 000000000..40693e95b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge-vsx.c @@ -0,0 +1,71 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static int vec_long_long_eq (vector long long x, vector long long y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static int vec_double_eq (vector double x, vector double y) +{ + return (x[0] == y[0] && x[1] == y[1]); +} + +static void test() +{ + /* Input vectors. */ + vector long long vla = {-2,-1}; + vector long long vlb = {0,1}; + vector double vda = {-2.0,-1.0}; + vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + + /* Result vectors. */ + vector long long vlh, vll; + vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; + + /* Expected result vectors. */ + vector long long vlrh = {-2,0}; + vector long long vlrl = {-1,1}; + vector double vdrh = {-2.0,0.0}; + vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; + + vlh = vec_mergeh (vla, vlb); + vll = vec_mergel (vla, vlb); + vdh = vec_mergeh (vda, vdb); + vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); + + check (vec_long_long_eq (vlh, vlrh), "vlh"); + check (vec_long_long_eq (vll, vlrl), "vll"); + check (vec_double_eq (vdh, vdrh), "vdh" ); + check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge.c new file mode 100644 index 000000000..84b14fea7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/merge.c @@ -0,0 +1,77 @@ +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb + = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31}; + vector signed char vsca + = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + + /* Result vectors. */ + vector unsigned char vuch, vucl; + vector signed char vsch, vscl; + vector unsigned short vush, vusl; + vector signed short vssh, vssl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; + + /* Expected result vectors. */ + vector unsigned char vucrh = {0,16,1,17,2,18,3,19,4,20,5,21,6,22,7,23}; + vector unsigned char vucrl = {8,24,9,25,10,26,11,27,12,28,13,29,14,30,15,31}; + vector signed char vscrh = {-16,0,-15,1,-14,2,-13,3,-12,4,-11,5,-10,6,-9,7}; + vector signed char vscrl = {-8,8,-7,9,-6,10,-5,11,-4,12,-3,13,-2,14,-1,15}; + vector unsigned short vusrh = {0,8,1,9,2,10,3,11}; + vector unsigned short vusrl = {4,12,5,13,6,14,7,15}; + vector signed short vssrh = {-8,0,-7,1,-6,2,-5,3}; + vector signed short vssrl = {-4,4,-3,5,-2,6,-1,7}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; + + vuch = vec_mergeh (vuca, vucb); + vucl = vec_mergel (vuca, vucb); + vsch = vec_mergeh (vsca, vscb); + vscl = vec_mergel (vsca, vscb); + vush = vec_mergeh (vusa, vusb); + vusl = vec_mergel (vusa, vusb); + vssh = vec_mergeh (vssa, vssb); + vssl = vec_mergel (vssa, vssb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); + + check (vec_all_eq (vuch, vucrh), "vuch"); + check (vec_all_eq (vucl, vucrl), "vucl"); + check (vec_all_eq (vsch, vscrh), "vsch"); + check (vec_all_eq (vscl, vscrl), "vscl"); + check (vec_all_eq (vush, vusrh), "vush"); + check (vec_all_eq (vusl, vusrl), "vusl"); + check (vec_all_eq (vssh, vssrh), "vssh"); + check (vec_all_eq (vssl, vssrl), "vssl"); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c new file mode 100644 index 000000000..ff3047486 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd-be-order.c @@ -0,0 +1,64 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3}; + vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3}; + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {2,3,2,3,2,3,2,3}; + vector signed short vssa = {-4,-3,-2,-1,0,1,2,3}; + vector signed short vssb = {2,-3,2,-3,2,-3,2,-3}; + vector unsigned short vuse, vuso; + vector signed short vsse, vsso; + vector unsigned int vuie, vuio; + vector signed int vsie, vsio; + + vuse = vec_mule (vuca, vucb); + vuso = vec_mulo (vuca, vucb); + vsse = vec_mule (vsca, vscb); + vsso = vec_mulo (vsca, vscb); + vuie = vec_mule (vusa, vusb); + vuio = vec_mulo (vusa, vusb); + vsie = vec_mule (vssa, vssb); + vsio = vec_mulo (vssa, vssb); + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + check (vec_all_eq (vuse, + ((vector unsigned short){3,9,15,21,27,33,39,45})), + "vuse"); + check (vec_all_eq (vuso, + ((vector unsigned short){0,4,8,12,16,20,24,28})), + "vuso"); + check (vec_all_eq (vsse, + ((vector signed short){21,15,9,3,-3,-9,-15,-21})), + "vsse"); + check (vec_all_eq (vsso, + ((vector signed short){-16,-12,-8,-4,0,4,8,12})), + "vsso"); + check (vec_all_eq (vuie, ((vector unsigned int){3,9,15,21})), "vuie"); + check (vec_all_eq (vuio, ((vector unsigned int){0,4,8,12})), "vuio"); + check (vec_all_eq (vsie, ((vector signed int){9,3,-3,-9})), "vsie"); + check (vec_all_eq (vsio, ((vector signed int){-8,-4,0,4})), "vsio"); +#else + check (vec_all_eq (vuse, + ((vector unsigned short){0,4,8,12,16,20,24,28})), + "vuse"); + check (vec_all_eq (vuso, + ((vector unsigned short){3,9,15,21,27,33,39,45})), + "vuso"); + check (vec_all_eq (vsse, + ((vector signed short){-16,-12,-8,-4,0,4,8,12})), + "vsse"); + check (vec_all_eq (vsso, + ((vector signed short){21,15,9,3,-3,-9,-15,-21})), + "vsso"); + check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie"); + check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio"); + check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie"); + check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio"); +#endif +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c new file mode 100644 index 000000000..34b72e900 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/mult-even-odd.c @@ -0,0 +1,43 @@ +#include "harness.h" + +static void test() +{ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb = {2,3,2,3,2,3,2,3,2,3,2,3,2,3,2,3}; + vector signed char vsca = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector signed char vscb = {2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3,2,-3}; + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {2,3,2,3,2,3,2,3}; + vector signed short vssa = {-4,-3,-2,-1,0,1,2,3}; + vector signed short vssb = {2,-3,2,-3,2,-3,2,-3}; + vector unsigned short vuse, vuso; + vector signed short vsse, vsso; + vector unsigned int vuie, vuio; + vector signed int vsie, vsio; + + vuse = vec_mule (vuca, vucb); + vuso = vec_mulo (vuca, vucb); + vsse = vec_mule (vsca, vscb); + vsso = vec_mulo (vsca, vscb); + vuie = vec_mule (vusa, vusb); + vuio = vec_mulo (vusa, vusb); + vsie = vec_mule (vssa, vssb); + vsio = vec_mulo (vssa, vssb); + + check (vec_all_eq (vuse, + ((vector unsigned short){0,4,8,12,16,20,24,28})), + "vuse"); + check (vec_all_eq (vuso, + ((vector unsigned short){3,9,15,21,27,33,39,45})), + "vuso"); + check (vec_all_eq (vsse, + ((vector signed short){-16,-12,-8,-4,0,4,8,12})), + "vsse"); + check (vec_all_eq (vsso, + ((vector signed short){21,15,9,3,-3,-9,-15,-21})), + "vsso"); + check (vec_all_eq (vuie, ((vector unsigned int){0,4,8,12})), "vuie"); + check (vec_all_eq (vuio, ((vector unsigned int){3,9,15,21})), "vuio"); + check (vec_all_eq (vsie, ((vector signed int){-8,-4,0,4})), "vsie"); + check (vec_all_eq (vsio, ((vector signed int){9,3,-3,-9})), "vsio"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack-be-order.c new file mode 100644 index 000000000..c400fc882 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack-be-order.c @@ -0,0 +1,136 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +#define BIG 4294967295 + +static void test() +{ + /* Input vectors. */ + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector bool short vbsa = {0,65535,65535,0,0,0,65535,0}; + vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector bool int vbia = {0,BIG,BIG,BIG}; + vector bool int vbib = {BIG,0,0,0}; + vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3), + (1<<24) + (5<<19) + (6<<11) + (7<<3), + (0<<24) + (8<<19) + (9<<11) + (10<<3), + (1<<24) + (11<<19) + (12<<11) + (13<<3)}; + vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3), + (0<<24) + (17<<19) + (18<<11) + (19<<3), + (1<<24) + (20<<19) + (21<<11) + (22<<3), + (0<<24) + (23<<19) + (24<<11) + (25<<3)}; + vector unsigned short vusc = {0,256,1,257,2,258,3,259}; + vector unsigned short vusd = {4,260,5,261,6,262,7,263}; + vector signed short vssc = {-1,-128,0,127,-2,-129,1,128}; + vector signed short vssd = {-3,-130,2,129,-4,-131,3,130}; + vector unsigned int vuic = {0,65536,1,65537}; + vector unsigned int vuid = {2,65538,3,65539}; + vector signed int vsic = {-1,-32768,0,32767}; + vector signed int vsid = {-2,-32769,1,32768}; + + /* Result vectors. */ + vector unsigned char vucr; + vector signed char vscr; + vector bool char vbcr; + vector unsigned short vusr; + vector signed short vssr; + vector bool short vbsr; + vector pixel vpr; + vector unsigned char vucsr; + vector signed char vscsr; + vector unsigned short vussr; + vector signed short vsssr; + vector unsigned char vucsur1, vucsur2; + vector unsigned short vussur1, vussur2; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vucer = {8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7}; + vector signed char vscer = {0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1}; + vector bool char vbcer = {255,0,0,255,255,255,0,255,0,255,255,0,0,0,255,0}; + vector unsigned short vuser = {4,5,6,7,0,1,2,3}; + vector signed short vsser = {0,1,2,3,-4,-3,-2,-1}; + vector bool short vbser = {65535,0,0,0,0,65535,65535,65535}; + vector pixel vper = {(1<<15) + (14<<10) + (15<<5) + 16, + (0<<15) + (17<<10) + (18<<5) + 19, + (1<<15) + (20<<10) + (21<<5) + 22, + (0<<15) + (23<<10) + (24<<5) + 25, + (0<<15) + (2<<10) + (3<<5) + 4, + (1<<15) + (5<<10) + (6<<5) + 7, + (0<<15) + (8<<10) + (9<<5) + 10, + (1<<15) + (11<<10) + (12<<5) + 13}; + vector unsigned char vucser = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255}; + vector signed char vscser = {-3,-128,2,127,-4,-128,3,127, + -1,-128,0,127,-2,-128,1,127}; + vector unsigned short vusser = {2,65535,3,65535,0,65535,1,65535}; + vector signed short vssser = {-2,-32768,1,32767,-1,-32768,0,32767}; + vector unsigned char vucsuer1 = {4,255,5,255,6,255,7,255,0,255,1,255,2,255,3,255}; + vector unsigned char vucsuer2 = {0,0,2,129,0,0,3,130,0,0,0,127,0,0,1,128}; + vector unsigned short vussuer1 = {2,65535,3,65535,0,65535,1,65535}; + vector unsigned short vussuer2 = {0,0,1,32768,0,0,0,32767}; +#else + vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255}; + vector unsigned short vuser = {0,1,2,3,4,5,6,7}; + vector signed short vsser = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbser = {0,65535,65535,65535,65535,0,0,0}; + vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4, + (1<<15) + (5<<10) + (6<<5) + 7, + (0<<15) + (8<<10) + (9<<5) + 10, + (1<<15) + (11<<10) + (12<<5) + 13, + (1<<15) + (14<<10) + (15<<5) + 16, + (0<<15) + (17<<10) + (18<<5) + 19, + (1<<15) + (20<<10) + (21<<5) + 22, + (0<<15) + (23<<10) + (24<<5) + 25}; + vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255}; + vector signed char vscser = {-1,-128,0,127,-2,-128,1,127, + -3,-128,2,127,-4,-128,3,127}; + vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535}; + vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767}; + vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255}; + vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130}; + vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535}; + vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768}; +#endif + + vucr = vec_pack (vusa, vusb); + vscr = vec_pack (vssa, vssb); + vbcr = vec_pack (vbsa, vbsb); + vusr = vec_pack (vuia, vuib); + vssr = vec_pack (vsia, vsib); + vbsr = vec_pack (vbia, vbib); + vpr = vec_packpx (vipa, vipb); + vucsr = vec_packs (vusc, vusd); + vscsr = vec_packs (vssc, vssd); + vussr = vec_packs (vuic, vuid); + vsssr = vec_packs (vsic, vsid); + vucsur1 = vec_packsu (vusc, vusd); + vucsur2 = vec_packsu (vssc, vssd); + vussur1 = vec_packsu (vuic, vuid); + vussur2 = vec_packsu (vsic, vsid); + + check (vec_all_eq (vucr, vucer), "vucr"); + check (vec_all_eq (vscr, vscer), "vscr"); + check (vec_all_eq (vbcr, vbcer), "vbcr"); + check (vec_all_eq (vusr, vuser), "vusr"); + check (vec_all_eq (vssr, vsser), "vssr"); + check (vec_all_eq (vbsr, vbser), "vbsr"); + check (vec_all_eq (vpr, vper ), "vpr" ); + check (vec_all_eq (vucsr, vucser), "vucsr"); + check (vec_all_eq (vscsr, vscser), "vscsr"); + check (vec_all_eq (vussr, vusser), "vussr"); + check (vec_all_eq (vsssr, vssser), "vsssr"); + check (vec_all_eq (vucsur1, vucsuer1), "vucsur1"); + check (vec_all_eq (vucsur2, vucsuer2), "vucsur2"); + check (vec_all_eq (vussur1, vussuer1), "vussur1"); + check (vec_all_eq (vussur2, vussuer2), "vussur2"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack.c new file mode 100644 index 000000000..d1b49f0a6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/pack.c @@ -0,0 +1,108 @@ +#include "harness.h" + +#define BIG 4294967295 + +static void test() +{ + /* Input vectors. */ + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector bool short vbsa = {0,65535,65535,0,0,0,65535,0}; + vector bool short vbsb = {65535,0,0,65535,65535,65535,0,65535}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector bool int vbia = {0,BIG,BIG,BIG}; + vector bool int vbib = {BIG,0,0,0}; + vector unsigned int vipa = {(0<<24) + (2<<19) + (3<<11) + (4<<3), + (1<<24) + (5<<19) + (6<<11) + (7<<3), + (0<<24) + (8<<19) + (9<<11) + (10<<3), + (1<<24) + (11<<19) + (12<<11) + (13<<3)}; + vector unsigned int vipb = {(1<<24) + (14<<19) + (15<<11) + (16<<3), + (0<<24) + (17<<19) + (18<<11) + (19<<3), + (1<<24) + (20<<19) + (21<<11) + (22<<3), + (0<<24) + (23<<19) + (24<<11) + (25<<3)}; + vector unsigned short vusc = {0,256,1,257,2,258,3,259}; + vector unsigned short vusd = {4,260,5,261,6,262,7,263}; + vector signed short vssc = {-1,-128,0,127,-2,-129,1,128}; + vector signed short vssd = {-3,-130,2,129,-4,-131,3,130}; + vector unsigned int vuic = {0,65536,1,65537}; + vector unsigned int vuid = {2,65538,3,65539}; + vector signed int vsic = {-1,-32768,0,32767}; + vector signed int vsid = {-2,-32769,1,32768}; + + /* Result vectors. */ + vector unsigned char vucr; + vector signed char vscr; + vector bool char vbcr; + vector unsigned short vusr; + vector signed short vssr; + vector bool short vbsr; + vector pixel vpr; + vector unsigned char vucsr; + vector signed char vscsr; + vector unsigned short vussr; + vector signed short vsssr; + vector unsigned char vucsur1, vucsur2; + vector unsigned short vussur1, vussur2; + + /* Expected result vectors. */ + vector unsigned char vucer = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vscer = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbcer = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255}; + vector unsigned short vuser = {0,1,2,3,4,5,6,7}; + vector signed short vsser = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbser = {0,65535,65535,65535,65535,0,0,0}; + vector pixel vper = {(0<<15) + (2<<10) + (3<<5) + 4, + (1<<15) + (5<<10) + (6<<5) + 7, + (0<<15) + (8<<10) + (9<<5) + 10, + (1<<15) + (11<<10) + (12<<5) + 13, + (1<<15) + (14<<10) + (15<<5) + 16, + (0<<15) + (17<<10) + (18<<5) + 19, + (1<<15) + (20<<10) + (21<<5) + 22, + (0<<15) + (23<<10) + (24<<5) + 25}; + vector unsigned char vucser = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255}; + vector signed char vscser = {-1,-128,0,127,-2,-128,1,127, + -3,-128,2,127,-4,-128,3,127}; + vector unsigned short vusser = {0,65535,1,65535,2,65535,3,65535}; + vector signed short vssser = {-1,-32768,0,32767,-2,-32768,1,32767}; + vector unsigned char vucsuer1 = {0,255,1,255,2,255,3,255,4,255,5,255,6,255,7,255}; + vector unsigned char vucsuer2 = {0,0,0,127,0,0,1,128,0,0,2,129,0,0,3,130}; + vector unsigned short vussuer1 = {0,65535,1,65535,2,65535,3,65535}; + vector unsigned short vussuer2 = {0,0,0,32767,0,0,1,32768}; + + vucr = vec_pack (vusa, vusb); + vscr = vec_pack (vssa, vssb); + vbcr = vec_pack (vbsa, vbsb); + vusr = vec_pack (vuia, vuib); + vssr = vec_pack (vsia, vsib); + vbsr = vec_pack (vbia, vbib); + vpr = vec_packpx (vipa, vipb); + vucsr = vec_packs (vusc, vusd); + vscsr = vec_packs (vssc, vssd); + vussr = vec_packs (vuic, vuid); + vsssr = vec_packs (vsic, vsid); + vucsur1 = vec_packsu (vusc, vusd); + vucsur2 = vec_packsu (vssc, vssd); + vussur1 = vec_packsu (vuic, vuid); + vussur2 = vec_packsu (vsic, vsid); + + check (vec_all_eq (vucr, vucer), "vucr"); + check (vec_all_eq (vscr, vscer), "vscr"); + check (vec_all_eq (vbcr, vbcer), "vbcr"); + check (vec_all_eq (vusr, vuser), "vusr"); + check (vec_all_eq (vssr, vsser), "vssr"); + check (vec_all_eq (vbsr, vbser), "vbsr"); + check (vec_all_eq (vpr, vper ), "vpr" ); + check (vec_all_eq (vucsr, vucser), "vucsr"); + check (vec_all_eq (vscsr, vscser), "vscsr"); + check (vec_all_eq (vussr, vusser), "vussr"); + check (vec_all_eq (vsssr, vssser), "vsssr"); + check (vec_all_eq (vucsur1, vucsuer1), "vucsur1"); + check (vec_all_eq (vucsur2, vucsuer2), "vucsur2"); + check (vec_all_eq (vussur1, vussuer1), "vussur1"); + check (vec_all_eq (vussur2, vussuer2), "vussur2"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm-be-order.c new file mode 100644 index 000000000..604f63dc9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm-be-order.c @@ -0,0 +1,74 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31}; + vector signed char vsca = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vucp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23}; + vector unsigned char vscp = {15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23}; + vector unsigned char vusp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22}; + vector unsigned char vssp = {15,14,17,16,13,12,19,18,11,10,21,20,9,8,23,22}; + vector unsigned char vuip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20}; + vector unsigned char vsip = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20}; + vector unsigned char vfp = {15,14,13,12,19,18,17,16,11,10,9,8,23,22,21,20}; +#else + vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25}; + vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25}; + vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; + vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; + vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; +#endif + + /* Result vectors. */ + vector unsigned char vuc; + vector signed char vsc; + vector unsigned short vus; + vector signed short vss; + vector unsigned int vui; + vector signed int vsi; + vector float vf; + + /* Expected result vectors. */ + vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8}; + vector unsigned short vusr = {0,15,1,14,2,13,3,12}; + vector signed short vssr = {-8,7,-7,6,-6,5,-5,4}; + vector unsigned int vuir = {0,7,1,6}; + vector signed int vsir = {-4,3,-3,2}; + vector float vfr = {-4.0,3.0,-3.0,2.0}; + + vuc = vec_perm (vuca, vucb, vucp); + vsc = vec_perm (vsca, vscb, vscp); + vus = vec_perm (vusa, vusb, vusp); + vss = vec_perm (vssa, vssb, vssp); + vui = vec_perm (vuia, vuib, vuip); + vsi = vec_perm (vsia, vsib, vsip); + vf = vec_perm (vfa, vfb, vfp ); + + check (vec_all_eq (vuc, vucr), "vuc"); + check (vec_all_eq (vsc, vscr), "vsc"); + check (vec_all_eq (vus, vusr), "vus"); + check (vec_all_eq (vss, vssr), "vss"); + check (vec_all_eq (vui, vuir), "vui"); + check (vec_all_eq (vsi, vsir), "vsi"); + check (vec_all_eq (vf, vfr), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm.c new file mode 100644 index 000000000..be6bf3422 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/perm.c @@ -0,0 +1,69 @@ +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuca = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vucb + = {16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31}; + vector unsigned char vucp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + + vector signed char vsca + = {-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed char vscb = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector unsigned char vscp = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + + vector unsigned short vusa = {0,1,2,3,4,5,6,7}; + vector unsigned short vusb = {8,9,10,11,12,13,14,15}; + vector unsigned char vusp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25}; + + vector signed short vssa = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vssb = {0,1,2,3,4,5,6,7}; + vector unsigned char vssp = {0,1,30,31,2,3,28,29,4,5,26,27,6,7,24,25}; + + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector unsigned char vuip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; + + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector unsigned char vsip = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; + + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; + vector unsigned char vfp = {0,1,2,3,28,29,30,31,4,5,6,7,24,25,26,27}; + + /* Result vectors. */ + vector unsigned char vuc; + vector signed char vsc; + vector unsigned short vus; + vector signed short vss; + vector unsigned int vui; + vector signed int vsi; + vector float vf; + + /* Expected result vectors. */ + vector unsigned char vucr = {0,31,1,30,2,29,3,28,4,27,5,26,6,25,7,24}; + vector signed char vscr = {-16,15,-15,14,-14,13,-13,12,-12,11,-11,10,-10,9,-9,8}; + vector unsigned short vusr = {0,15,1,14,2,13,3,12}; + vector signed short vssr = {-8,7,-7,6,-6,5,-5,4}; + vector unsigned int vuir = {0,7,1,6}; + vector signed int vsir = {-4,3,-3,2}; + vector float vfr = {-4.0,3.0,-3.0,2.0}; + + vuc = vec_perm (vuca, vucb, vucp); + vsc = vec_perm (vsca, vscb, vscp); + vus = vec_perm (vusa, vusb, vusp); + vss = vec_perm (vssa, vssb, vssp); + vui = vec_perm (vuia, vuib, vuip); + vsi = vec_perm (vsia, vsib, vsip); + vf = vec_perm (vfa, vfb, vfp ); + + check (vec_all_eq (vuc, vucr), "vuc"); + check (vec_all_eq (vsc, vscr), "vsc"); + check (vec_all_eq (vus, vusr), "vus"); + check (vec_all_eq (vss, vssr), "vss"); + check (vec_all_eq (vui, vuir), "vui"); + check (vec_all_eq (vsi, vsir), "vsi"); + check (vec_all_eq (vf, vfr), "vf" ); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sn7153.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sn7153.c index a498a8620..2381a891c 100644 --- a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sn7153.c +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sn7153.c @@ -34,7 +34,11 @@ main() void validate_sat() { +#ifdef __LITTLE_ENDIAN__ + if (vec_any_ne(vec_splat(vec_mfvscr(), 0), ((vector unsigned short){1,1,1,1,1,1,1,1}))) +#else if (vec_any_ne(vec_splat(vec_mfvscr(), 7), ((vector unsigned short){1,1,1,1,1,1,1,1}))) +#endif { union {vector unsigned short v; unsigned short s[8];} u; u.v = vec_mfvscr(); diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-be-order.c new file mode 100644 index 000000000..e265ae4be --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-be-order.c @@ -0,0 +1,59 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {-2.0,-1.0,0.0,1.0}; + + /* Result vectors. */ + vector unsigned char vucr; + vector signed char vscr; + vector unsigned short vusr; + vector signed short vssr; + vector unsigned int vuir; + vector signed int vsir; + vector float vfr; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vucer = {14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14}; + vector signed char vscer = {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1}; + vector unsigned short vuser = {0,0,0,0,0,0,0,0}; + vector signed short vsser = {3,3,3,3,3,3,3,3}; + vector unsigned int vuier = {1,1,1,1}; + vector signed int vsier = {-2,-2,-2,-2}; + vector float vfer = {0.0,0.0,0.0,0.0}; +#else + vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}; + vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + vector unsigned short vuser = {7,7,7,7,7,7,7,7}; + vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4}; + vector unsigned int vuier = {2,2,2,2}; + vector signed int vsier = {1,1,1,1}; + vector float vfer = {-1.0,-1.0,-1.0,-1.0}; +#endif + + vucr = vec_splat (vuc, 1); + vscr = vec_splat (vsc, 8); + vusr = vec_splat (vus, 7); + vssr = vec_splat (vss, 0); + vuir = vec_splat (vui, 2); + vsir = vec_splat (vsi, 3); + vfr = vec_splat (vf, 1); + + check (vec_all_eq (vucr, vucer), "vuc"); + check (vec_all_eq (vscr, vscer), "vsc"); + check (vec_all_eq (vusr, vuser), "vus"); + check (vec_all_eq (vssr, vsser), "vss"); + check (vec_all_eq (vuir, vuier), "vui"); + check (vec_all_eq (vsir, vsier), "vsi"); + check (vec_all_eq (vfr, vfer ), "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c new file mode 100644 index 000000000..cd389bd0f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c @@ -0,0 +1,37 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {-2.0,-1.0,0.0,1.0}; + + /* Result vectors. */ + vector unsigned int vuir; + vector signed int vsir; + vector float vfr; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned int vuier = {1,1,1,1}; + vector signed int vsier = {-2,-2,-2,-2}; + vector float vfer = {0.0,0.0,0.0,0.0}; +#else + vector unsigned int vuier = {2,2,2,2}; + vector signed int vsier = {1,1,1,1}; + vector float vfer = {-1.0,-1.0,-1.0,-1.0}; +#endif + + vuir = vec_splat (vui, 2); + vsir = vec_splat (vsi, 3); + vfr = vec_splat (vf, 1); + + check (vec_all_eq (vuir, vuier), "vui"); + check (vec_all_eq (vsir, vsier), "vsi"); + check (vec_all_eq (vfr, vfer ), "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx.c new file mode 100644 index 000000000..5a6e7dfe4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat-vsx.c @@ -0,0 +1,31 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {-2.0,-1.0,0.0,1.0}; + + /* Result vectors. */ + vector unsigned int vuir; + vector signed int vsir; + vector float vfr; + + /* Expected result vectors. */ + vector unsigned int vuier = {2,2,2,2}; + vector signed int vsier = {1,1,1,1}; + vector float vfer = {-1.0,-1.0,-1.0,-1.0}; + + vuir = vec_splat (vui, 2); + vsir = vec_splat (vsi, 3); + vfr = vec_splat (vf, 1); + + check (vec_all_eq (vuir, vuier), "vui"); + check (vec_all_eq (vsir, vsier), "vsi"); + check (vec_all_eq (vfr, vfer ), "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat.c new file mode 100644 index 000000000..e45974ac9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/splat.c @@ -0,0 +1,47 @@ +#include "harness.h" + +static void test() +{ + /* Input vectors. */ + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {-2.0,-1.0,0.0,1.0}; + + /* Result vectors. */ + vector unsigned char vucr; + vector signed char vscr; + vector unsigned short vusr; + vector signed short vssr; + vector unsigned int vuir; + vector signed int vsir; + vector float vfr; + + /* Expected result vectors. */ + vector unsigned char vucer = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1}; + vector signed char vscer = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + vector unsigned short vuser = {7,7,7,7,7,7,7,7}; + vector signed short vsser = {-4,-4,-4,-4,-4,-4,-4,-4}; + vector unsigned int vuier = {2,2,2,2}; + vector signed int vsier = {1,1,1,1}; + vector float vfer = {-1.0,-1.0,-1.0,-1.0}; + + vucr = vec_splat (vuc, 1); + vscr = vec_splat (vsc, 8); + vusr = vec_splat (vus, 7); + vssr = vec_splat (vss, 0); + vuir = vec_splat (vui, 2); + vsir = vec_splat (vsi, 3); + vfr = vec_splat (vf, 1); + + check (vec_all_eq (vucr, vucer), "vuc"); + check (vec_all_eq (vscr, vscer), "vsc"); + check (vec_all_eq (vusr, vuser), "vus"); + check (vec_all_eq (vssr, vsser), "vss"); + check (vec_all_eq (vuir, vuier), "vui"); + check (vec_all_eq (vsir, vsier), "vsi"); + check (vec_all_eq (vfr, vfer ), "vf"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-be-order.c new file mode 100644 index 000000000..1a7b01bb5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-be-order.c @@ -0,0 +1,83 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + check (svuc[i] == i, "svuc"); + check (svsc[i] == i - 8, "svsc"); + check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc"); + } + for (i = 0; i < 8; ++i) + { + check (svus[i] == i, "svus"); + check (svss[i] == i - 4, "svss"); + check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs"); + check (svp[i] == i, "svp"); + } + for (i = 0; i < 4; ++i) + { + check (svui[i] == i, "svui"); + check (svsi[i] == i - 2, "svsi"); + check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi"); + check (svf[i] == i * 1.0f, "svf"); + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; + vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8}; + vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0}; + vector unsigned short vus = {7,6,5,4,3,2,1,0}; + vector signed short vss = {3,2,1,0,-1,-2,-3,-4}; + vector bool short vbs = {65535,0,65535,0,65535,0,65535,0}; + vector pixel vp = {7,6,5,4,3,2,1,0}; + vector unsigned int vui = {3,2,1,0}; + vector signed int vsi = {1,0,-1,-2}; + vector bool int vbi = {0xffffffff,0,0xffffffff,0}; + vector float vf = {3.0,2.0,1.0,0.0}; +#else + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel vp = {0,1,2,3,4,5,6,7}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector bool int vbi = {0,0xffffffff,0,0xffffffff}; + vector float vf = {0.0,1.0,2.0,3.0}; +#endif + + vec_st (vuc, 0, (vector unsigned char *)svuc); + vec_st (vsc, 0, (vector signed char *)svsc); + vec_st (vbc, 0, (vector bool char *)svbc); + vec_st (vus, 0, (vector unsigned short *)svus); + vec_st (vss, 0, (vector signed short *)svss); + vec_st (vbs, 0, (vector bool short *)svbs); + vec_st (vp, 0, (vector pixel *)svp); + vec_st (vui, 0, (vector unsigned int *)svui); + vec_st (vsi, 0, (vector signed int *)svsi); + vec_st (vbi, 0, (vector bool int *)svbi); + vec_st (vf, 0, (vector float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c new file mode 100644 index 000000000..a2688fab5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c @@ -0,0 +1,34 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + check (svul[i] == i, "svul"); + check (svd[i] == i * 1.0, "svd"); + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned long long vul = {1,0}; + vector double vd = {1.0,0.0}; +#else + vector unsigned long long vul = {0,1}; + vector double vd = {0.0,1.0}; +#endif + + vec_st (vul, 0, (vector unsigned long long *)svul); + vec_st (vd, 0, (vector double *)svd); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx.c new file mode 100644 index 000000000..ef67de0ba --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st-vsx.c @@ -0,0 +1,29 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + check (svul[i] == i, "svul"); + check (svd[i] == i * 1.0, "svd"); + } +} + +static void test () +{ + vector unsigned long long vul = {0,1}; + vector double vd = {0.0,1.0}; + + vec_st (vul, 0, (vector unsigned long long *)svul); + vec_st (vd, 0, (vector double *)svd); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st.c new file mode 100644 index 000000000..3339b7283 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/st.c @@ -0,0 +1,67 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + check (svuc[i] == i, "svuc"); + check (svsc[i] == i - 8, "svsc"); + check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc"); + } + for (i = 0; i < 8; ++i) + { + check (svus[i] == i, "svus"); + check (svss[i] == i - 4, "svss"); + check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs"); + check (svp[i] == i, "svp"); + } + for (i = 0; i < 4; ++i) + { + check (svui[i] == i, "svui"); + check (svsi[i] == i - 2, "svsi"); + check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi"); + check (svf[i] == i * 1.0f, "svf"); + } +} + +static void test () +{ + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel vp = {0,1,2,3,4,5,6,7}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector bool int vbi = {0,0xffffffff,0,0xffffffff}; + vector float vf = {0.0,1.0,2.0,3.0}; + + vec_st (vuc, 0, (vector unsigned char *)svuc); + vec_st (vsc, 0, (vector signed char *)svsc); + vec_st (vbc, 0, (vector bool char *)svbc); + vec_st (vus, 0, (vector unsigned short *)svus); + vec_st (vss, 0, (vector signed short *)svss); + vec_st (vbs, 0, (vector bool short *)svbs); + vec_st (vp, 0, (vector pixel *)svp); + vec_st (vui, 0, (vector unsigned int *)svui); + vec_st (vsi, 0, (vector signed int *)svsi); + vec_st (vbi, 0, (vector bool int *)svbi); + vec_st (vf, 0, (vector float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste-be-order.c new file mode 100644 index 000000000..75f2004f3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste-be-order.c @@ -0,0 +1,53 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + check (svuc[9] == 9, "svuc"); + check (svsc[14] == 6, "svsc"); + check (svus[7] == 7, "svus"); + check (svss[1] == -3, "svss"); + check (svui[3] == 3, "svui"); + check (svsi[2] == 0, "svsi"); + check (svf[0] == 0.0, "svf"); +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; + vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8}; + vector unsigned short vus = {7,6,5,4,3,2,1,0}; + vector signed short vss = {3,2,1,0,-1,-2,-3,-4}; + vector unsigned int vui = {3,2,1,0}; + vector signed int vsi = {1,0,-1,-2}; + vector float vf = {3.0,2.0,1.0,0.0}; +#else + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {0.0,1.0,2.0,3.0}; +#endif + + vec_ste (vuc, 9*1, (unsigned char *)svuc); + vec_ste (vsc, 14*1, (signed char *)svsc); + vec_ste (vus, 7*2, (unsigned short *)svus); + vec_ste (vss, 1*2, (signed short *)svss); + vec_ste (vui, 3*4, (unsigned int *)svui); + vec_ste (vsi, 2*4, (signed int *)svsi); + vec_ste (vf, 0*4, (float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste.c new file mode 100644 index 000000000..9bbda3b32 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/ste.c @@ -0,0 +1,41 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + check (svuc[9] == 9, "svuc"); + check (svsc[14] == 6, "svsc"); + check (svus[7] == 7, "svus"); + check (svss[1] == -3, "svss"); + check (svui[3] == 3, "svui"); + check (svsi[2] == 0, "svsi"); + check (svf[0] == 0.0, "svf"); +} + +static void test () +{ + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector float vf = {0.0,1.0,2.0,3.0}; + + vec_ste (vuc, 9*1, (unsigned char *)svuc); + vec_ste (vsc, 14*1, (signed char *)svsc); + vec_ste (vus, 7*2, (unsigned short *)svus); + vec_ste (vss, 1*2, (signed short *)svss); + vec_ste (vui, 3*4, (unsigned int *)svui); + vec_ste (vsi, 2*4, (signed int *)svsi); + vec_ste (vf, 0*4, (float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-be-order.c new file mode 100644 index 000000000..7f00a0364 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-be-order.c @@ -0,0 +1,83 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + check (svuc[i] == i, "svuc"); + check (svsc[i] == i - 8, "svsc"); + check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc"); + } + for (i = 0; i < 8; ++i) + { + check (svus[i] == i, "svus"); + check (svss[i] == i - 4, "svss"); + check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs"); + check (svp[i] == i, "svp"); + } + for (i = 0; i < 4; ++i) + { + check (svui[i] == i, "svui"); + check (svsi[i] == i - 2, "svsi"); + check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi"); + check (svf[i] == i * 1.0f, "svf"); + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; + vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8}; + vector bool char vbc = {255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0}; + vector unsigned short vus = {7,6,5,4,3,2,1,0}; + vector signed short vss = {3,2,1,0,-1,-2,-3,-4}; + vector bool short vbs = {65535,0,65535,0,65535,0,65535,0}; + vector pixel vp = {7,6,5,4,3,2,1,0}; + vector unsigned int vui = {3,2,1,0}; + vector signed int vsi = {1,0,-1,-2}; + vector bool int vbi = {0xffffffff,0,0xffffffff,0}; + vector float vf = {3.0,2.0,1.0,0.0}; +#else + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel vp = {0,1,2,3,4,5,6,7}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector bool int vbi = {0,0xffffffff,0,0xffffffff}; + vector float vf = {0.0,1.0,2.0,3.0}; +#endif + + vec_stl (vuc, 0, (vector unsigned char *)svuc); + vec_stl (vsc, 0, (vector signed char *)svsc); + vec_stl (vbc, 0, (vector bool char *)svbc); + vec_stl (vus, 0, (vector unsigned short *)svus); + vec_stl (vss, 0, (vector signed short *)svss); + vec_stl (vbs, 0, (vector bool short *)svbs); + vec_stl (vp, 0, (vector pixel *)svp); + vec_stl (vui, 0, (vector unsigned int *)svui); + vec_stl (vsi, 0, (vector signed int *)svsi); + vec_stl (vbi, 0, (vector bool int *)svbi); + vec_stl (vf, 0, (vector float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c new file mode 100644 index 000000000..26f2c2772 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c @@ -0,0 +1,34 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + check (svul[i] == i, "svul"); + check (svd[i] == i * 1.0, "svd"); + } +} + +static void test () +{ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector unsigned long long vul = {1,0}; + vector double vd = {1.0,0.0}; +#else + vector unsigned long long vul = {0,1}; + vector double vd = {0.0,1.0}; +#endif + + vec_stl (vul, 0, (vector unsigned long long *)svul); + vec_stl (vd, 0, (vector double *)svd); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx.c new file mode 100644 index 000000000..9a1cce6f8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl-vsx.c @@ -0,0 +1,29 @@ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ + +#include "harness.h" + +static unsigned long long svul[2] __attribute__ ((aligned (16))); +static double svd[2] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 2; ++i) + { + check (svul[i] == i, "svul"); + check (svd[i] == i * 1.0, "svd"); + } +} + +static void test () +{ + vector unsigned long long vul = {0,1}; + vector double vd = {0.0,1.0}; + + vec_stl (vul, 0, (vector unsigned long long *)svul); + vec_stl (vd, 0, (vector double *)svd); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl.c new file mode 100644 index 000000000..9ebd8782a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/stl.c @@ -0,0 +1,67 @@ +#include "harness.h" + +static unsigned char svuc[16] __attribute__ ((aligned (16))); +static signed char svsc[16] __attribute__ ((aligned (16))); +static unsigned char svbc[16] __attribute__ ((aligned (16))); +static unsigned short svus[8] __attribute__ ((aligned (16))); +static signed short svss[8] __attribute__ ((aligned (16))); +static unsigned short svbs[8] __attribute__ ((aligned (16))); +static unsigned short svp[8] __attribute__ ((aligned (16))); +static unsigned int svui[4] __attribute__ ((aligned (16))); +static signed int svsi[4] __attribute__ ((aligned (16))); +static unsigned int svbi[4] __attribute__ ((aligned (16))); +static float svf[4] __attribute__ ((aligned (16))); + +static void check_arrays () +{ + unsigned int i; + for (i = 0; i < 16; ++i) + { + check (svuc[i] == i, "svuc"); + check (svsc[i] == i - 8, "svsc"); + check (svbc[i] == ((i % 2) ? 0xff : 0), "svbc"); + } + for (i = 0; i < 8; ++i) + { + check (svus[i] == i, "svus"); + check (svss[i] == i - 4, "svss"); + check (svbs[i] == ((i % 2) ? 0xffff : 0), "svbs"); + check (svp[i] == i, "svp"); + } + for (i = 0; i < 4; ++i) + { + check (svui[i] == i, "svui"); + check (svsi[i] == i - 2, "svsi"); + check (svbi[i] == ((i % 2) ? 0xffffffff : 0), "svbi"); + check (svf[i] == i * 1.0f, "svf"); + } +} + +static void test () +{ + vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,0,255,0,255,0,255,0,255,0,255,0,255,0,255}; + vector unsigned short vus = {0,1,2,3,4,5,6,7}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,0,65535,0,65535,0,65535}; + vector pixel vp = {0,1,2,3,4,5,6,7}; + vector unsigned int vui = {0,1,2,3}; + vector signed int vsi = {-2,-1,0,1}; + vector bool int vbi = {0,0xffffffff,0,0xffffffff}; + vector float vf = {0.0,1.0,2.0,3.0}; + + vec_stl (vuc, 0, (vector unsigned char *)svuc); + vec_stl (vsc, 0, (vector signed char *)svsc); + vec_stl (vbc, 0, (vector bool char *)svbc); + vec_stl (vus, 0, (vector unsigned short *)svus); + vec_stl (vss, 0, (vector signed short *)svss); + vec_stl (vbs, 0, (vector bool short *)svbs); + vec_stl (vp, 0, (vector pixel *)svp); + vec_stl (vui, 0, (vector unsigned int *)svui); + vec_stl (vsi, 0, (vector signed int *)svsi); + vec_stl (vbi, 0, (vector bool int *)svbi); + vec_stl (vf, 0, (vector float *)svf); + + check_arrays (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c new file mode 100644 index 000000000..0981cc1d5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s-be-order.c @@ -0,0 +1,19 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector signed int vsia = {-10,1,2,3}; + vector signed int vsib = {100,101,102,-103}; + vector signed int vsir; +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector signed int vsier = {91,0,107,0}; +#else + vector signed int vsier = {0,92,0,-98}; +#endif + + vsir = vec_sum2s (vsia, vsib); + + check (vec_all_eq (vsir, vsier), "vsir"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s.c new file mode 100644 index 000000000..ded05be84 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/sum2s.c @@ -0,0 +1,13 @@ +#include "harness.h" + +static void test() +{ + vector signed int vsia = {-10,1,2,3}; + vector signed int vsib = {100,101,102,-103}; + vector signed int vsir; + vector signed int vsier = {0,92,0,-98}; + + vsir = vec_sum2s (vsia, vsib); + + check (vec_all_eq (vsir, vsier), "vsir"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c new file mode 100644 index 000000000..e174433dd --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack-be-order.c @@ -0,0 +1,88 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +#define BIG 4294967295 + +static void test() +{ + /* Input vectors. */ + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255}; + vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3, + (1<<15) + (4<<10) + (5<<5) + 6, + (0<<15) + (7<<10) + (8<<5) + 9, + (1<<15) + (10<<10) + (11<<5) + 12, + (1<<15) + (13<<10) + (14<<5) + 15, + (0<<15) + (16<<10) + (17<<5) + 18, + (1<<15) + (19<<10) + (20<<5) + 21, + (0<<15) + (22<<10) + (23<<5) + 24}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,65535,0,0,0,65535,0}; + + /* Result vectors. */ + vector signed short vsch, vscl; + vector bool short vbsh, vbsl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector bool int vbih, vbil; + + /* Expected result vectors. */ +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector signed short vschr = {0,1,2,3,4,5,6,7}; + vector signed short vsclr = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector bool short vbshr = {65535,0,0,65535,65535,65535,0,65535}; + vector bool short vbslr = {0,65535,65535,0,0,0,65535,0}; + vector unsigned int vuihr = {(65535<<24) + (13<<16) + (14<<8) + 15, + (0<<24) + (16<<16) + (17<<8) + 18, + (65535<<24) + (19<<16) + (20<<8) + 21, + (0<<24) + (22<<16) + (23<<8) + 24}; + vector unsigned int vuilr = {(0<<24) + (1<<16) + (2<<8) + 3, + (65535<<24) + (4<<16) + (5<<8) + 6, + (0<<24) + (7<<16) + (8<<8) + 9, + (65535<<24) + (10<<16) + (11<<8) + 12}; + vector signed int vsihr = {0,1,2,3}; + vector signed int vsilr = {-4,-3,-2,-1}; + vector bool int vbihr = {0,0,BIG,0}; + vector bool int vbilr = {0,BIG,BIG,0}; +#else + vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vsclr = {0,1,2,3,4,5,6,7}; + vector bool short vbshr = {0,65535,65535,0,0,0,65535,0}; + vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535}; + vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3, + (65535<<24) + (4<<16) + (5<<8) + 6, + (0<<24) + (7<<16) + (8<<8) + 9, + (65535<<24) + (10<<16) + (11<<8) + 12}; + vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15, + (0<<24) + (16<<16) + (17<<8) + 18, + (65535<<24) + (19<<16) + (20<<8) + 21, + (0<<24) + (22<<16) + (23<<8) + 24}; + vector signed int vsihr = {-4,-3,-2,-1}; + vector signed int vsilr = {0,1,2,3}; + vector bool int vbihr = {0,BIG,BIG,0}; + vector bool int vbilr = {0,0,BIG,0}; +#endif + + vsch = vec_unpackh (vsc); + vscl = vec_unpackl (vsc); + vbsh = vec_unpackh (vbc); + vbsl = vec_unpackl (vbc); + vuih = vec_unpackh (vp); + vuil = vec_unpackl (vp); + vsih = vec_unpackh (vss); + vsil = vec_unpackl (vss); + vbih = vec_unpackh (vbs); + vbil = vec_unpackl (vbs); + + check (vec_all_eq (vsch, vschr), "vsch"); + check (vec_all_eq (vscl, vsclr), "vscl"); + check (vec_all_eq (vbsh, vbshr), "vbsh"); + check (vec_all_eq (vbsl, vbslr), "vbsl"); + check (vec_all_eq (vuih, vuihr), "vuih"); + check (vec_all_eq (vuil, vuilr), "vuil"); + check (vec_all_eq (vsih, vsihr), "vsih"); + check (vec_all_eq (vsil, vsilr), "vsil"); + check (vec_all_eq (vbih, vbihr), "vbih"); + check (vec_all_eq (vbil, vbilr), "vbil"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack.c new file mode 100644 index 000000000..3c13163cb --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/unpack.c @@ -0,0 +1,67 @@ +#include "harness.h" + +#define BIG 4294967295 + +static void test() +{ + /* Input vectors. */ + vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7}; + vector bool char vbc = {0,255,255,0,0,0,255,0,255,0,0,255,255,255,0,255}; + vector pixel vp = {(0<<15) + (1<<10) + (2<<5) + 3, + (1<<15) + (4<<10) + (5<<5) + 6, + (0<<15) + (7<<10) + (8<<5) + 9, + (1<<15) + (10<<10) + (11<<5) + 12, + (1<<15) + (13<<10) + (14<<5) + 15, + (0<<15) + (16<<10) + (17<<5) + 18, + (1<<15) + (19<<10) + (20<<5) + 21, + (0<<15) + (22<<10) + (23<<5) + 24}; + vector signed short vss = {-4,-3,-2,-1,0,1,2,3}; + vector bool short vbs = {0,65535,65535,0,0,0,65535,0}; + + /* Result vectors. */ + vector signed short vsch, vscl; + vector bool short vbsh, vbsl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector bool int vbih, vbil; + + /* Expected result vectors. */ + vector signed short vschr = {-8,-7,-6,-5,-4,-3,-2,-1}; + vector signed short vsclr = {0,1,2,3,4,5,6,7}; + vector bool short vbshr = {0,65535,65535,0,0,0,65535,0}; + vector bool short vbslr = {65535,0,0,65535,65535,65535,0,65535}; + vector unsigned int vuihr = {(0<<24) + (1<<16) + (2<<8) + 3, + (65535<<24) + (4<<16) + (5<<8) + 6, + (0<<24) + (7<<16) + (8<<8) + 9, + (65535<<24) + (10<<16) + (11<<8) + 12}; + vector unsigned int vuilr = {(65535<<24) + (13<<16) + (14<<8) + 15, + (0<<24) + (16<<16) + (17<<8) + 18, + (65535<<24) + (19<<16) + (20<<8) + 21, + (0<<24) + (22<<16) + (23<<8) + 24}; + vector signed int vsihr = {-4,-3,-2,-1}; + vector signed int vsilr = {0,1,2,3}; + vector bool int vbihr = {0,BIG,BIG,0}; + vector bool int vbilr = {0,0,BIG,0}; + + vsch = vec_unpackh (vsc); + vscl = vec_unpackl (vsc); + vbsh = vec_unpackh (vbc); + vbsl = vec_unpackl (vbc); + vuih = vec_unpackh (vp); + vuil = vec_unpackl (vp); + vsih = vec_unpackh (vss); + vsil = vec_unpackl (vss); + vbih = vec_unpackh (vbs); + vbil = vec_unpackl (vbs); + + check (vec_all_eq (vsch, vschr), "vsch"); + check (vec_all_eq (vscl, vsclr), "vscl"); + check (vec_all_eq (vbsh, vbshr), "vbsh"); + check (vec_all_eq (vbsl, vbslr), "vbsl"); + check (vec_all_eq (vuih, vuihr), "vuih"); + check (vec_all_eq (vuil, vuilr), "vuil"); + check (vec_all_eq (vsih, vsihr), "vsih"); + check (vec_all_eq (vsil, vsilr), "vsil"); + check (vec_all_eq (vbih, vbihr), "vbih"); + check (vec_all_eq (vbil, vbilr), "vbil"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vec-set.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vec-set.c new file mode 100644 index 000000000..fa11c47a1 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vec-set.c @@ -0,0 +1,14 @@ +#include "harness.h" + +vector short +vec_set (short m) +{ + return (vector short){m, 0, 0, 0, 0, 0, 0, 0}; +} + +static void test() +{ + check (vec_all_eq (vec_set (7), + ((vector short){7, 0, 0, 0, 0, 0, 0, 0})), + "vec_set"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c new file mode 100644 index 000000000..e4a34e9f9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c @@ -0,0 +1,20 @@ +/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */ + +#include "harness.h" + +static void test() +{ + vector signed int va = {-7,11,-13,17}; + +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ + vector signed int vb = {128,0,0,0}; + vector signed int evd = {136,0,0,0}; +#else + vector signed int vb = {0,0,0,128}; + vector signed int evd = {0,0,0,136}; +#endif + + vector signed int vd = vec_sums (va, vb); + + check (vec_all_eq (vd, evd), "sums"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums.c b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums.c new file mode 100644 index 000000000..d678aceec --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.dg/vmx/vsums.c @@ -0,0 +1,12 @@ +#include "harness.h" + +static void test() +{ + vector signed int va = {-7,11,-13,17}; + vector signed int vb = {0,0,0,128}; + vector signed int evd = {0,0,0,136}; + + vector signed int vd = vec_sums (va, vb); + + check (vec_all_eq (vd, evd), "sums"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c b/gcc-4.8/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c index 1b8530843..cad70ab62 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c @@ -1,7 +1,13 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ -#include "../../../config/aarch64/arm_neon.h" +#include <arm_neon.h> + +/* Used to force a variable to a SIMD register. */ +#define force_simd(V1) asm volatile ("mov %d0, %1.d[0]" \ + : "=w"(V1) \ + : "w"(V1) \ + : /* No clobbers */); /* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */ @@ -31,7 +37,12 @@ test_vaddd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d) uint64x1_t test_vceqd_s64 (int64x1_t a, int64x1_t b) { - return vceqd_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vceqd_s64 (a, b); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ @@ -39,7 +50,11 @@ test_vceqd_s64 (int64x1_t a, int64x1_t b) uint64x1_t test_vceqzd_s64 (int64x1_t a) { - return vceqzd_s64 (a); + uint64x1_t res; + force_simd (a); + res = vceqzd_s64 (a); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ @@ -47,21 +62,36 @@ test_vceqzd_s64 (int64x1_t a) uint64x1_t test_vcged_s64 (int64x1_t a, int64x1_t b) { - return vcged_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcged_s64 (a, b); + force_simd (res); + return res; } uint64x1_t test_vcled_s64 (int64x1_t a, int64x1_t b) { - return vcled_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcled_s64 (a, b); + force_simd (res); + return res; } -/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ +/* Idiom recognition will cause this testcase not to generate + the expected cmge instruction, so do not check for it. */ uint64x1_t test_vcgezd_s64 (int64x1_t a) { - return vcgezd_s64 (a); + uint64x1_t res; + force_simd (a); + res = vcgezd_s64 (a); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ @@ -69,7 +99,12 @@ test_vcgezd_s64 (int64x1_t a) uint64x1_t test_vcged_u64 (uint64x1_t a, uint64x1_t b) { - return vcged_u64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcged_u64 (a, b); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ @@ -77,13 +112,23 @@ test_vcged_u64 (uint64x1_t a, uint64x1_t b) uint64x1_t test_vcgtd_s64 (int64x1_t a, int64x1_t b) { - return vcgtd_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcgtd_s64 (a, b); + force_simd (res); + return res; } uint64x1_t test_vcltd_s64 (int64x1_t a, int64x1_t b) { - return vcltd_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcltd_s64 (a, b); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ @@ -91,7 +136,11 @@ test_vcltd_s64 (int64x1_t a, int64x1_t b) uint64x1_t test_vcgtzd_s64 (int64x1_t a) { - return vcgtzd_s64 (a); + uint64x1_t res; + force_simd (a); + res = vcgtzd_s64 (a); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ @@ -99,7 +148,12 @@ test_vcgtzd_s64 (int64x1_t a) uint64x1_t test_vcgtd_u64 (uint64x1_t a, uint64x1_t b) { - return vcgtd_u64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vcgtd_u64 (a, b); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ @@ -107,15 +161,24 @@ test_vcgtd_u64 (uint64x1_t a, uint64x1_t b) uint64x1_t test_vclezd_s64 (int64x1_t a) { - return vclezd_s64 (a); + uint64x1_t res; + force_simd (a); + res = vclezd_s64 (a); + force_simd (res); + return res; } -/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ +/* Idiom recognition will cause this testcase not to generate + the expected cmlt instruction, so do not check for it. */ uint64x1_t test_vcltzd_s64 (int64x1_t a) { - return vcltzd_s64 (a); + uint64x1_t res; + force_simd (a); + res = vcltzd_s64 (a); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */ @@ -179,13 +242,23 @@ test_vdupd_lane_u64 (uint64x2_t a) int64x1_t test_vtst_s64 (int64x1_t a, int64x1_t b) { - return vtstd_s64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vtstd_s64 (a, b); + force_simd (res); + return res; } uint64x1_t test_vtst_u64 (uint64x1_t a, uint64x1_t b) { - return vtstd_u64 (a, b); + uint64x1_t res; + force_simd (a); + force_simd (b); + res = vtstd_s64 (a, b); + force_simd (res); + return res; } /* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */ @@ -722,7 +795,10 @@ test_vrshld_u64 (uint64x1_t a, uint64x1_t b) return vrshld_u64 (a, b); } -/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */ +/* Other intrinsics can generate an asr instruction (vcltzd, vcgezd), + so we cannot check scan-assembler-times. */ + +/* { dg-final { scan-assembler "\\tasr\\tx\[0-9\]+" } } */ int64x1_t test_vshrd_n_s64 (int64x1_t a) diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c new file mode 100644 index 000000000..5f4c927b6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c @@ -0,0 +1,25 @@ +/* Test the `vst1Q_laneu64' ARM Neon intrinsic. */ + +/* Detect ICE in the case of unaligned memory address. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" + +unsigned char dummy_store[1000]; + +void +foo (char* addr) +{ + uint8x16_t vdata = vld1q_u8 (addr); + vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0); +} + +uint64_t +bar (uint64x2_t vdata) +{ + vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0); + return vgetq_lane_u64 (vdata, 0); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/pr54300.C b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr54300.C new file mode 100644 index 000000000..eb1a74e36 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr54300.C @@ -0,0 +1,61 @@ +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_neon } */ + +#include <arm_neon.h> +#include <stdlib.h> + +struct __attribute__ ((aligned(8))) _v16u8_ { + uint8x16_t val; + _v16u8_( const int16x8_t &src) { val = vreinterpretq_u8_s16(src); } + operator int16x8_t () const { return vreinterpretq_s16_u8(val); } +}; +typedef struct _v16u8_ v16u8; + +struct __attribute__ ((aligned(4))) _v8u8_ { + uint8x8_t val; + _v8u8_( const uint8x8_t &src) { val = src; } + operator int16x4_t () const { return vreinterpret_s16_u8(val); } +}; +typedef struct _v8u8_ v8u8; + +typedef v16u8 v8i16; +typedef int32x4_t v4i32; +typedef const short cv1i16; +typedef const unsigned char cv1u8; +typedef const v8i16 cv8i16; + +static inline __attribute__((always_inline)) v8u8 zero_64(){ return vdup_n_u8( 0 ); } + +static inline __attribute__((always_inline)) v8i16 loadlo_8i16( cv8i16* p ){ + return vcombine_s16( vld1_s16( (cv1i16 *)p ), zero_64() ); +} +static inline __attribute__((always_inline)) v8i16 _loadlo_8i16( cv8i16* p, int offset ){ + return loadlo_8i16( (cv8i16*)(&((cv1u8*)p)[offset]) ); +} + +void __attribute__((noinline)) +test(unsigned short *_Inp, int32_t *_Out, + unsigned int s1v, unsigned int dv0, + unsigned int smask_v) +{ + int32x4_t c = vdupq_n_s32(0); + + for(unsigned int sv=0 ; sv!=dv0 ; sv=(sv+s1v)&smask_v ) + { + int32x4_t s; + s = vmovl_s16( vget_low_s16( _loadlo_8i16( (cv8i16*) _Inp, sv ) ) ); + c = vaddq_s32( c, s ); + } + vst1q_s32( _Out, c ); +} + +main() +{ + unsigned short a[4] = {1, 2, 3, 4}; + int32_t b[4] = {0, 0, 0, 0}; + test(a, b, 1, 1, ~0); + if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4) + abort(); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/pr57637.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr57637.c new file mode 100644 index 000000000..2b9bfdded --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr57637.c @@ -0,0 +1,206 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fno-inline" } */ + +typedef struct _GtkCssStyleProperty GtkCssStyleProperty; + +struct _GtkCssStyleProperty +{ + int *initial_value; + unsigned int id; + unsigned int inherit :1; + unsigned int animated :1; + unsigned int affects_size :1; + unsigned int affects_font :1; + + int * parse_value; + int * query_value; + int * assign_value; +}; + +void +g_assertion_message_expr (const char *domain, + const char *file, + int line, + const char *func, + const char *expr) __attribute__((__noreturn__)); + +void +g_assertion_message_expr (const char *domain, + const char *file, + int line, + const char *func, + const char *expr) +{ + __builtin_abort (); +} +int +get_id (GtkCssStyleProperty *property) +{ + return 1; +} +int +_gtk_css_style_property_get_type () +{ + return 1; +} + +GtkCssStyleProperty * +g_object_new (int object_type, + const char *first_property_name, + ...) +{ + return (GtkCssStyleProperty *) __builtin_malloc (sizeof (GtkCssStyleProperty)); +} + +typedef enum { + INHERIT = (1 << 0), + ANIMATED = (1 << 1), + RESIZE = (1 << 2), + FONT = (1 << 3) +} GtkStylePropertyFlags; + +int t = 0; +void +gtk_css_style_property_register (const char * name, + int expected_id, + int value_type, + int flags, + int *parse_value, + int *query_value, + int *assign_value, + int *initial_value) +{ + GtkCssStyleProperty *node; + + do + { + if (__builtin_expect (__extension__ ( + { + int _g_boolean_var_; + if (initial_value != ((void *)0)) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 1)) + ; + else + g_assertion_message_expr ("Gtk", + "gtkcssstylepropertyimpl.c", + 85, + ((const char*) (__PRETTY_FUNCTION__)), + "initial_value != NULL"); + } while (0); + + do + { + if (__builtin_expect (__extension__ ( + { + int _g_boolean_var_; + if (parse_value != ((void *)0)) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 1)) + ; + else + g_assertion_message_expr ("Gtk", + "gtkcssstylepropertyimpl.c", + 86, + ((const char*) (__PRETTY_FUNCTION__)), + "parse_value != NULL"); + } while (0); + + do + { + if (__builtin_expect (__extension__ ( + { + int _g_boolean_var_; + if (value_type == ((int) ((1) << (2))) + || query_value != ((void *)0)) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 1)) + ; + else + g_assertion_message_expr ("Gtk", + "gtkcssstylepropertyimpl.c", + 87, ((const char*) (__PRETTY_FUNCTION__)), + "value_type == NONE || query_value != NULL"); + } while (0); + + /* FLAGS is changed in a cond_exec instruction with pr57637. */ + if (flags == 15) + t = 15; + + do + { + if (__builtin_expect (__extension__ ( + { + int _g_boolean_var_; + if (value_type == ((1) << (2)) + || assign_value != ((void *)0)) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 1)) + ; + else + g_assertion_message_expr ("Gtk", + "gtkcssstylepropertyimpl.c", + 88, ((const char*) (__PRETTY_FUNCTION__)), + "value_type == NONE || assign_value != NULL"); + } while (0); + + node = g_object_new ((_gtk_css_style_property_get_type ()), + "value-type", value_type, + "affects-size", (flags & RESIZE) ? (0) : (!(0)), + "affects-font", (flags & FONT) ? (!(0)) : (0), + "animated", (flags & ANIMATED) ? (!(0)) : (0), + "inherit", (flags & INHERIT) ? (!(0)) : (0), + "initial-value", initial_value, + "name", name, + ((void *)0)); + + node->parse_value = parse_value; + node->query_value = query_value; + node->assign_value = assign_value; + + do + { + if (__builtin_expect (__extension__ ( + { + int _g_boolean_var_; + if (get_id (node) == expected_id) + _g_boolean_var_ = 1; + else + _g_boolean_var_ = 0; + _g_boolean_var_; + }), + 1)) + ; + else + g_assertion_message_expr ("Gtk", + "gtkcssstylepropertyimpl.c", + 106, + ((const char*) (__PRETTY_FUNCTION__)), + "get_id (node) == expected_id"); + } while (0); +} + +int main () +{ + gtk_css_style_property_register ("test", 1, 4, 15, &t, &t, &t, &t); + + if (t != 15) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/pr59826.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr59826.c new file mode 100644 index 000000000..b7053e426 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/pr59826.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-mthumb -mcpu=cortex-m4 -fprefetch-loop-arrays -O2" } */ + +typedef struct genxWriter_rec * genxWriter; +typedef unsigned char * utf8; +typedef const unsigned char * constUtf8; + +int genxScrubText(genxWriter w, constUtf8 in, utf8 out) +{ + int problems = 0; + constUtf8 last = in; + + while (*in) + { + int c = genxNextUnicodeChar(&in); + if (c == -1) + { + problems++; + last = in; + continue; + } + + if (!isXMLChar(w, c)) + { + problems++; + last = in; + continue; + } + + while (last < in) + *out++ = *last++; + } + *out = 0; + return problems; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c new file mode 100644 index 000000000..bd85e8640 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/require-pic-register-loc.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-g -fPIC" } */ + +void *v; +void a (void *x) { } +void b (void) { } + /* line 7. */ +int /* line 8. */ +main (int argc) /* line 9. */ +{ /* line 10. */ + if (argc == 12345) /* line 11. */ + { + a (v); + return 1; + } + b (); + + return 0; +} + +/* { dg-final { scan-assembler-not "\.loc 1 7 0" } } */ +/* { dg-final { scan-assembler-not "\.loc 1 8 0" } } */ +/* { dg-final { scan-assembler-not "\.loc 1 9 0" } } */ + +/* The loc at the start of the prologue. */ +/* { dg-final { scan-assembler-times "\.loc 1 10 0" 1 } } */ + +/* The loc at the end of the prologue, with the first user line. */ +/* { dg-final { scan-assembler-times "\.loc 1 11 0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c new file mode 100644 index 000000000..df269fc84 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-high-reg.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-options "-mthumb -fpic -mpic-register=9" } */ + +int g_test; + +int +foo (int par) +{ + g_test = par; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c new file mode 100644 index 000000000..6e9b2570a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/thumb1-pic-single-base.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-options "-mthumb -fpic -msingle-pic-base" } */ + +int g_test; + +int +foo (int par) +{ + g_test = par; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/arm/vrinta-ce.c b/gcc-4.8/gcc/testsuite/gcc.target/arm/vrinta-ce.c new file mode 100644 index 000000000..71c5b3b0e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/arm/vrinta-ce.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_vfp_ok } */ +/* { dg-options "-O2 -marm -march=armv8-a" } */ +/* { dg-add-options arm_v8_vfp } */ + +double foo (double a) +{ + if (a > 3.0) + return __builtin_round (a); + + return 0.0; +} + +/* { dg-final { scan-assembler-times "vrinta.f64\td\[0-9\]+" 1 } } */ + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/avr/pr60991.c b/gcc-4.8/gcc/testsuite/gcc.target/avr/pr60991.c new file mode 100644 index 000000000..a09f42a62 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/avr/pr60991.c @@ -0,0 +1,21 @@ +/* { dg-do run } */ +/* { dg-options "-O1" } */ + +/* This testcase (simplified from the original bug report) exposes + PR60991. The code generated for writing the __int24 value corrupts + the frame pointer if the offset is <= 63 + MAX_LD_OFFSET */ + +#include <stdlib.h> + +int main(void) +{ + volatile char junk[62]; + junk[0] = 5; + volatile __int24 staticConfig = 0; + + if (junk[0] != 5) + abort(); + + exit(0); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/avr/torture/pr61055.c b/gcc-4.8/gcc/testsuite/gcc.target/avr/torture/pr61055.c new file mode 100644 index 000000000..9dd1f427d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/avr/torture/pr61055.c @@ -0,0 +1,88 @@ +/* { dg-do run } */ +/* { dg-options { -fno-peephole2 } } */ + +#include <stdlib.h> + +typedef __UINT16_TYPE__ uint16_t; +typedef __INT16_TYPE__ int16_t; +typedef __UINT8_TYPE__ uint8_t; + +uint8_t __attribute__((noinline,noclone)) +fun_inc (uint8_t c0) +{ + register uint8_t c asm ("r15") = c0; + + /* Force target value into R15 (lower register) */ + asm ("" : "+l" (c)); + + c++; + if (c >= 0x80) + c = 0; + + asm ("" : "+l" (c)); + + return c; +} + +uint8_t __attribute__((noinline,noclone)) +fun_dec (uint8_t c0) +{ + register uint8_t c asm ("r15") = c0; + + /* Force target value into R15 (lower register) */ + asm ("" : "+l" (c)); + + c--; + if (c < 0x80) + c = 0; + + asm ("" : "+l" (c)); + + return c; +} + + +uint8_t __attribute__((noinline,noclone)) +fun_neg (uint8_t c0) +{ + register uint8_t c asm ("r15") = c0; + + c = -c; + if (c >= 0x80) + c = 0; + + return c; +} + +uint16_t __attribute__((noinline,noclone)) +fun_adiw (uint16_t c0) +{ + register uint16_t c asm ("r24") = c0; + + /* Force target value into R24 (for ADIW) */ + asm ("" : "+r" (c)); + + c += 2; + if (c >= 0x8000) + c = 0; + + asm ("" : "+r" (c)); + + return c; +} + + +int main() +{ + if (fun_inc (0x7f) != 0) + abort(); + + if (fun_neg (0x80) != 0) + abort(); + + if (fun_adiw (0x7ffe) != 0) + abort(); + + exit (0); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c index d91212283..cc524c8a6 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c @@ -15,7 +15,7 @@ void static avx_test (void) { union256d u; - double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576}; + double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576}; u.x = test (e); diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c index 96a664ac1..9224484ca 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c @@ -15,7 +15,7 @@ void static avx_test (void) { union256d u; - double e [4] __attribute__ ((aligned (8))) = {0.0}; + double e [4] __attribute__ ((aligned (32))) = {0.0}; u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/nest-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/nest-1.c new file mode 100644 index 000000000..ba75350fb --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/nest-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target llp64 } } */ +/* { dg-options "" } */ + +void foo (int i) +{ + void nested (void) + { + char arr[(1U << 31) + 4U]; + arr[i] = 0; + } + + nested (); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr30315.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr30315.c index 998d5071e..557b4f751 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr30315.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr30315.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ -/* { dg-final { scan-assembler-times "cmp" 4 } } */ +/* { dg-final { scan-assembler-not "cmp" } } */ extern void abort (void); int c; @@ -34,39 +34,10 @@ void pluscconly##t##C (T a, T b) \ } #define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b) -#define MINUSCC(T, t) \ -T minuscc##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - abort (); \ - return difference; \ -} - -#define DECCC(T, t) \ -T deccc##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - c --; \ - return difference; \ -} - -#define MINUSCCONLY(T, t) \ -void minuscconly##t (T a, T b) \ -{ \ - T difference = a - b; \ - if (difference > a) \ - abort (); \ -} - #define TEST(T, t) \ PLUSCC(T, t) \ PLUSCCONLY(T, t) \ - INCCC(T, t) \ - MINUSCC(T, t) \ - MINUSCCONLY(T, t) \ - DECCC(T, t) + INCCC(T, t) TEST (unsigned long, l) TEST (unsigned int, i) @@ -84,14 +55,3 @@ unsigned long pluscczext##C (unsigned int a, unsigned int b) \ PLUSCCZEXT(a) PLUSCCZEXT(b) - -#define MINUSCCZEXT \ -unsigned long minuscczext (unsigned int a, unsigned int b) \ -{ \ - unsigned int difference = a - b; \ - if (difference > a) \ - abort (); \ - return difference; \ -} - -MINUSCCZEXT diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr39162.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr39162.c index c549106ad..efb46deae 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr39162.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr39162.c @@ -1,11 +1,14 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Wno-psabi -msse2 -mno-avx" } */ +/* { dg-prune-output "ABI for passing parameters" } */ +/* { dg-options "-O2 -msse2 -mno-avx" } */ /* { dg-additional-options "-mabi=sysv" { target x86_64-*-mingw* } } */ typedef long long __m256i __attribute__ ((__vector_size__ (32), __may_alias__)); -__m256i +extern __m256i y; + +void bar (__m256i x) /* { dg-warning "AVX" "" } */ { - return x; + y = x; } diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr43546.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr43546.c new file mode 100644 index 000000000..53cb3a07f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr43546.c @@ -0,0 +1,12 @@ +/* PR target/43546 */ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ +/* { dg-additional-options "-mpreferred-stack-boundary=2 -msseregparm -msse" { target ia32 } } */ + +extern void bar (double); + +void +foo (void) +{ + bar (1.0); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr54694.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr54694.c new file mode 100644 index 000000000..bcf82c2a1 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr54694.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +register void *hfp __asm__("%ebp"); /* { dg-message "note: for" } */ + +extern void g(void *); + +void f(int x) /* { dg-error "frame pointer required" } */ +{ + g(__builtin_alloca(x)); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58137.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58137.c new file mode 100644 index 000000000..0a7daf83c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58137.c @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx2" } */ + +typedef unsigned int U32; + +struct sv { + void* sv_any; + U32 sv_refcnt; + U32 sv_flags; +}; +typedef struct sv SV; + +struct xrv { + SV * xrv_rv; +}; +typedef struct xrv XRV; + +extern XRV * PL_xrv_root; + +void +more_xrv (void) +{ + register XRV* xrv; + register XRV* xrvend; + xrv = PL_xrv_root; + xrvend = &xrv[200 / sizeof (XRV) - 1]; + while (xrv < xrvend) + { + xrv->xrv_rv = (SV*)(xrv + 1); + xrv++; + } + xrv->xrv_rv = 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58690.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58690.c new file mode 100644 index 000000000..87a87cc9c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58690.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ +/* { dg-options "-O2 -mx32 -maddress-mode=short" } */ + +struct gomp_thread +{ + char foo[41]; +}; +extern __thread struct gomp_thread gomp_tls_data; +void +foo (void) +{ + __builtin_memset (&gomp_tls_data, '\0', sizeof (gomp_tls_data)); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59021.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59021.c new file mode 100644 index 000000000..a1df27b10 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59021.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx -mvzeroupper" } */ + +extern void abort (void); + +struct S { + int i1; + int i2; + int i3; +}; + +typedef double v4df __attribute__ ((vector_size (32))); + +extern int foo (v4df, int i1, int i2, int i3, int i4, int i5, struct S s); + +void bar (v4df v, struct S s) +{ + int r = foo (v, 1, 2, 3, 4, 5, s); + if (r) + abort (); +} + +/* { dg-final { scan-assembler-not "vzeroupper" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-1.c new file mode 100644 index 000000000..1f4c4e04a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ +/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=short" } */ + +extern int foo(int, ...); +int bar(void) { + long double l = 1.2345E6; + foo(0, l); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-2.c new file mode 100644 index 000000000..14e594ba6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59034-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ +/* { dg-options "-O -mx32 -mtune=corei7 -maddress-mode=long" } */ + +extern int foo(int, ...); +int bar(void) { + long double l = 1.2345E6; + foo(0, l); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59405.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59405.c new file mode 100644 index 000000000..1136e2e45 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59405.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-options "-mmmx -mfpmath=387" } */ + +#include "mmx-check.h" + +#include <mmintrin.h> + +typedef float float32x2_t __attribute__ ((vector_size (8))); + +float +foo32x2_be (float32x2_t x) +{ + _mm_empty (); + return x[1]; +} + +static void +mmx_test (void) +{ + float32x2_t b = { 0.0f, 1.0f }; + + if (foo32x2_be (b) != 1.0f) + abort (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59470.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59470.c new file mode 100644 index 000000000..0d9952fb4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59470.c @@ -0,0 +1,17 @@ +/* PR middle-end/58956 */ +/* PR middle-end/59470 */ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +int a, b, d[1024]; + +int +main () +{ + int c = a; + asm ("{movl $6, (%2); movl $1, %0|mov dword ptr [%2], 6; mov %0, 1}" + : "=r" (d[c]) : "rm" (b), "r" (&a) : "memory"); + if (d[0] != 1 || d[6] != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59625.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59625.c new file mode 100644 index 000000000..8e1a7794b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59625.c @@ -0,0 +1,36 @@ +/* PR target/59625 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mtune=atom" } */ + +int +foo (void) +{ + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + asm goto ("" : : : : lab); + return 0; +lab: + return 1; +} + +/* Verify we don't consider asm goto as a jump for four jumps limit + optimization. asm goto doesn't have to contain a jump at all, + the branching to labels can happen through different means. */ +/* { dg-final { scan-assembler-not "(p2align\[^\n\r\]*\[\n\r]*\[^\n\r\]*){8}p2align" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-1.c new file mode 100644 index 000000000..46bff0181 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-1.c @@ -0,0 +1,15 @@ +/* PR target/59794 */ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -mno-mmx" } */ +/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */ + +typedef int __v2si __attribute__ ((__vector_size__ (8))); + +extern __v2si x; + +extern void bar (__v2si); +void +foo (void) +{ + bar (x); /* { dg-message "warning: MMX vector argument without MMX enabled changes the ABI" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-2.c new file mode 100644 index 000000000..f13998214 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-2.c @@ -0,0 +1,15 @@ +/* PR target/59794 */ +/* { dg-prune-output "ABI for passing parameters" } */ +/* { dg-options "-O2 -mno-sse" } */ +/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */ + +typedef double __v2df __attribute__ ((__vector_size__ (16))); + +extern __v2df x; + +extern void bar (__v2df); +void +foo (void) +{ + bar (x); /* { dg-message "warning: SSE vector argument without SSE enabled changes the ABI" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-3.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-3.c new file mode 100644 index 000000000..a65893c63 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-3.c @@ -0,0 +1,15 @@ +/* PR target/59794 */ +/* { dg-prune-output "ABI for passing parameters" } */ +/* { dg-options "-O2 -mno-avx" } */ +/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */ + +typedef int __v8si __attribute__ ((__vector_size__ (32))); + +extern __v8si x; + +extern void bar (__v8si); +void +foo (void) +{ + bar (x); /* { dg-message "warning: AVX vector argument without AVX enabled changes the ABI" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-4.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-4.c new file mode 100644 index 000000000..5ad0b070a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-4.c @@ -0,0 +1,14 @@ +/* PR target/59794 */ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -mno-mmx" } */ +/* { dg-skip-if "no MMX vector" { *-*-mingw* } } */ + +typedef int __v2si __attribute__ ((__vector_size__ (8))); + +extern __v2si x; + +__v2si +foo (void) +{ /* { dg-warning "MMX vector return without MMX enabled changes the ABI" } */ + return x; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-5.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-5.c new file mode 100644 index 000000000..24c88be09 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-5.c @@ -0,0 +1,14 @@ +/* PR target/59794 */ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -mno-sse" } */ +/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */ + +typedef int __v4si __attribute__ ((__vector_size__ (16))); + +extern __v4si x; + +__v4si +foo (void) +{ /* { dg-warning "SSE vector return without SSE enabled changes the ABI" } */ + return x; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-6.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-6.c new file mode 100644 index 000000000..c809f9579 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-6.c @@ -0,0 +1,14 @@ +/* PR target/59794 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mno-sse" } */ +/* { dg-skip-if "no SSE vector" { *-*-mingw* } } */ + +typedef int __v4si __attribute__ ((__vector_size__ (16))); + +extern __v4si x; + +__v4si +foo (void) +{ /* { dg-error "SSE register return with SSE disabled" } */ + return x; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-7.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-7.c new file mode 100644 index 000000000..57fd3d276 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59794-7.c @@ -0,0 +1,13 @@ +/* PR target/59794 */ +/* { dg-options "-O2 -mno-avx" } */ +/* { dg-skip-if "no AVX vector" { *-*-mingw* } } */ + +typedef int __v8si __attribute__ ((__vector_size__ (32))); + +extern __v8si x; + +__v8si +foo (void) +{ /* { dg-warning "AVX vector return without AVX enabled changes the ABI" } */ + return x; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59839.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59839.c new file mode 100644 index 000000000..dfb89456f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59839.c @@ -0,0 +1,12 @@ +/* PR target/59839 */ +/* { dg-do compile } */ +/* { dg-options "-O0 -mavx2" } */ + +#include <x86intrin.h> + +void +test (const float *x) +{ + __m256i i = _mm256_set1_epi32 (1); + __m256 d = _mm256_i32gather_ps (x, i, 1); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59929.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59929.c new file mode 100644 index 000000000..4591dc4d6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr59929.c @@ -0,0 +1,55 @@ +/* { dg-do run } */ +/* { dg-options "-O0 -mno-accumulate-outgoing-args" } */ +/* { dg-options "-O0 -mno-accumulate-outgoing-args -mx32 -maddress-mode=short" { target x32 } } */ + +void +__attribute__ ((noinline)) +test (float x1, float x2, float x3, float x4, float x5, float x6, + float x7, float x8, float x9, float x10, float x11, float x12, + float x13, float x14, float x15, float x16) +{ + if (x1 != 91 + || x2 != 92 + || x3 != 93 + || x4 != 94 + || x5 != 95 + || x6 != 96 + || x7 != 97 + || x8 != 98 + || x9 != 99 + || x10 != 100 + || x11 != 101 + || x12 != 102 + || x13 != 103 + || x14 != 104 + || x15 != 105 + || x16 != 106) + __builtin_abort (); +} + +float x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, + x14, x15, x16; + +int +main () +{ + x1 = 91; + x2 = 92; + x3 = 93; + x4 = 94; + x5 = 95; + x6 = 96; + x7 = 97; + x8 = 98; + x9 = 99; + x10 = 100; + x11 = 101; + x12 = 102; + x13 = 103; + x14 = 104; + x15 = 105; + x16 = 106; + test (x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, + x14, x15, x16); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60516.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60516.c new file mode 100644 index 000000000..575c8b61d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60516.c @@ -0,0 +1,20 @@ +/* PR target/60516 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +struct S { char c[65536]; }; + +__attribute__((ms_abi, thiscall)) void +foo (void *x, struct S y) +{ +} + +__attribute__((ms_abi, fastcall)) void +bar (void *x, void *y, struct S z) +{ +} + +__attribute__((ms_abi, stdcall)) void +baz (struct S x) +{ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60693.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60693.c new file mode 100644 index 000000000..e6033a783 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60693.c @@ -0,0 +1,13 @@ +/* PR target/60693 */ +/* { dg-do compile } */ +/* { dg-options "-O0" } */ + +void bar (char *); + +void +foo (void) +{ + char buf[4096]; + __builtin_memcpy (buf, (void *) 0x8000, 4096); + bar (buf); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60700.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60700.c new file mode 100644 index 000000000..5428f3616 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60700.c @@ -0,0 +1,59 @@ +/* PR rtl-optimization/60700 */ +/* { dg-do run { target ia32 } } */ +/* { dg-options "-O3 -march=i686" } */ + +int +__attribute__((noinline)) +foo (void) +{ + return 0; +} + +void *g = (void *)1; + +struct st { + char data[36]; /* must be greater than 32. */ +}; + +int +__attribute__((noinline)) +repro(struct st **out) +{ + int status = 0; + + *out = 0; + + status = foo(); + if (status != 0) { + return status; + } + + if (0 == g) { + status = 999; + return status; + } + + *out = (struct st *)__builtin_malloc(sizeof(struct st)); + if (0 == *out) { + status = 42; + return status; + } + + __builtin_memset(*out, 0, sizeof(struct st)); + + return status; +} + +int +main () +{ + struct st *p; + int ret = repro (&p); + unsigned int i; + + for (i = 0; i < sizeof (p->data)/sizeof (p->data[0]); i++) + if (p->data[i] != 0) + __builtin_abort (); + + return ret; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-1.c new file mode 100644 index 000000000..5a1ac3c0f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mrdrnd" } */ + +extern void bar (int); + +void +foo (unsigned *u) +{ + int i = __builtin_ia32_rdrand32_step (u); + bar (i); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-2.c new file mode 100644 index 000000000..dd356685b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr60909-2.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mrdseed" } */ + +extern void bar (int); + +void +foo (unsigned *u) +{ + int i = __builtin_ia32_rdseed_si_step (u); + bar (i); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr9771-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr9771-1.c index 38586fe97..daad319c3 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr9771-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr9771-1.c @@ -45,7 +45,17 @@ void test(void) exit(0); } -int main() +/* main usually performs dynamic realignment of the stack in case + _start would fail to properly align the stack, but for dynamic + stack realignment we need frame pointer which is incompatible + with -ffixed-ebp and the global register var. So, cheat here + and hide from the compiler that main is really main. */ +#define ASMNAME(cname) ASMNAME2 (__USER_LABEL_PREFIX__, cname) +#define ASMNAME2(prefix, cname) STRING (prefix) cname +#define STRING(x) #x +int real_main() __asm (ASMNAME ("main")); + +int real_main() { test(); return 0; diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c index b8b9dba0c..55d9f594f 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c @@ -25,7 +25,7 @@ static void TEST (void) { union128d u; - double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654}; + double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654}; u.x = test (e); diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c index 8298551ba..87da33277 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c @@ -25,7 +25,7 @@ static void TEST (void) { union128d u; - double e[2] __attribute__ ((aligned (8))) = {0.0}; + double e[2] __attribute__ ((aligned (16))) = {0.0}; u.x = _mm_set_pd (2134.3343,1234.635654); diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/xop-frczX.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/xop-frczX.c new file mode 100644 index 000000000..931b5ce39 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/xop-frczX.c @@ -0,0 +1,60 @@ +/* { dg-do run } */ +/* { dg-require-effective-target xop } */ +/* { dg-options "-O2 -mxop" } */ + +#include "xop-check.h" + +#include <x86intrin.h> + +void +check_mm_vmfrcz_sd (__m128d __A, __m128d __B) +{ + union128d a, b, c; + double d[2]; + + a.x = __A; + b.x = __B; + c.x = _mm_frcz_sd (__A, __B); + d[0] = b.a[0] - (int)b.a[0] ; + d[1] = a.a[1]; + if (check_union128d (c, d)) + abort (); +} + +void +check_mm_vmfrcz_ss (__m128 __A, __m128 __B) +{ + union128 a, b, c; + float f[4]; + + a.x = __A; + b.x = __B; + c.x = _mm_frcz_ss (__A, __B); + f[0] = b.a[0] - (int)b.a[0] ; + f[1] = a.a[1]; + f[2] = a.a[2]; + f[3] = a.a[3]; + if (check_union128 (c, f)) + abort (); +} + +static void +xop_test (void) +{ + union128 a, b; + union128d c,d; + int i; + + for (i = 0; i < 4; i++) + { + a.a[i] = i + 3.5; + b.a[i] = i + 7.9; + } + for (i = 0; i < 2; i++) + { + c.a[i] = i + 3.5; + d.a[i] = i + 7.987654321; + } + check_mm_vmfrcz_ss (a.x, b.x); + check_mm_vmfrcz_sd (c.x, d.x); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c new file mode 100644 index 000000000..79cc5f9dd --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c @@ -0,0 +1,9 @@ +/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float" } */ + +void float_func(float f1, float f2, float f3) +{ + /* { dg-final { scan-assembler "fcmp\.eq\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ + /* { dg-final { scan-assembler "fcmp\.le\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ + if(f1==f2 && f1<=f3) + print ("f1 eq f2 && f1 le f3"); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c new file mode 100644 index 000000000..fdcde1fa7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ + +void trap () +{ + __builtin_trap (); +} + +/* { dg-final { scan-assembler "brki\tr0,-1" } } */
\ No newline at end of file diff --git a/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c new file mode 100644 index 000000000..e285fb821 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/microblaze/others/mem_reload.c @@ -0,0 +1,74 @@ +/* { dg-options "-O2 -fPIC" } */ + +typedef struct test_struct +{ + unsigned long long h[8]; + unsigned long long Nl,Nh; + union { + unsigned long long d[16]; + unsigned char p[(16*8)]; + } u; + unsigned int num,md_len; +} TEST_STRUCT; + +static const unsigned long long K512[12] = { + 0x428a2f98d728ae22,0x7137449123ef65cd, + 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc, + 0x3956c25bf348b538,0x59f111f1b605d019, + 0x923f82a4af194f9b,0xab1c5ed5da6d8118, + 0xd807aa98a3030242,0x12835b0145706fbe, + 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2}; + +#define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) +#define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39)) +#define Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41)) +#define Ch(x,y,z) (((x) & (y)) ^ ((~(x)) & (z))) +#define Maj(x,y,z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z))) + +#define ROUND_00_15(i,a,b,c,d,e,f,g,h) do { \ + T1 += h + Sigma1(e) + Ch(e,f,g) + K512[i]; \ + h = Sigma0(a) + Maj(a,b,c); \ + d += T1; h += T1; } while (0) + +#define ROUND_16_80(i,a,b,c,d,e,f,g,h,X) do { \ + T1 = X[(i)&0x0f] += s0 + s1 + X[(i+9)&0x0f]; \ + ROUND_00_15(i,a,b,c,d,e,f,g,h); } while (0) + +static void testfunc1 (TEST_STRUCT *ctx, const void *in, unsigned int num) +{ + const unsigned long long *W=in; + unsigned long long a,b,c,d,e,f,g,h,s0,s1,T1; + unsigned long long X[16]; + int i; + + while (num--) { + + T1 = X[0] = W[0]; ROUND_00_15(0,a,b,c,d,e,f,g,h); + T1 = X[1] = W[1]; ROUND_00_15(1,h,a,b,c,d,e,f,g); + T1 = X[2] = W[2]; ROUND_00_15(2,g,h,a,b,c,d,e,f); + T1 = X[3] = W[3]; ROUND_00_15(3,f,g,h,a,b,c,d,e); + T1 = X[4] = W[4]; ROUND_00_15(4,e,f,g,h,a,b,c,d); + T1 = X[5] = W[5]; ROUND_00_15(5,d,e,f,g,h,a,b,c); + T1 = X[6] = W[6]; ROUND_00_15(6,c,d,e,f,g,h,a,b); + T1 = X[7] = W[7]; ROUND_00_15(7,b,c,d,e,f,g,h,a); + T1 = X[8] = W[8]; ROUND_00_15(8,a,b,c,d,e,f,g,h); + T1 = X[9] = W[9]; ROUND_00_15(9,h,a,b,c,d,e,f,g); + + for (i=16;i<80;i+=8) + { + ROUND_16_80(i+0,a,b,c,d,e,f,g,h,X); + } + + ctx->h[4] += e; ctx->h[5] += f; ctx->h[6] += g; ctx->h[7] += h; + } +} + +int testfunc2 (TEST_STRUCT *c, const void *_data, unsigned int len) +{ + const unsigned char *data=(const unsigned char *)_data; + + unsigned char *p=(unsigned char *)c->u.p; + + testfunc1 (c,p,0); + testfunc1 (c,data,len/sizeof(c->u)); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-1.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-1.c new file mode 100644 index 000000000..24016f269 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-1.c @@ -0,0 +1,10 @@ +/* { dg-options "isa_rev>=2" } */ +/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */ + +NOMIPS16 unsigned short +foo (unsigned short x) +{ + return ((x << 8) & 0xff00) | ((x >> 8) & 0xff); +} + +/* { dg-final { scan-assembler "\twsbh\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-2.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-2.c new file mode 100644 index 000000000..e0ca496b6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-2.c @@ -0,0 +1,9 @@ +/* { dg-options "isa_rev>=2" } */ + +NOMIPS16 unsigned short +foo (unsigned short x) +{ + return __builtin_bswap16 (x); +} + +/* { dg-final { scan-assembler "\twsbh\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-3.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-3.c new file mode 100644 index 000000000..5d2086fd3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-3.c @@ -0,0 +1,14 @@ +/* { dg-options "isa_rev>=2" } */ +/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */ + +NOMIPS16 unsigned int +foo (unsigned int x) +{ + return (((x << 24) & 0xff000000) + | ((x << 8) & 0xff0000) + | ((x >> 8) & 0xff00) + | ((x >> 24) & 0xff)); +} + +/* { dg-final { scan-assembler "\twsbh\t" } } */ +/* { dg-final { scan-assembler "\tror\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-4.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-4.c new file mode 100644 index 000000000..ac37a0114 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-4.c @@ -0,0 +1,10 @@ +/* { dg-options "isa_rev>=2" } */ + +NOMIPS16 unsigned int +foo (unsigned int x) +{ + return __builtin_bswap32 (x); +} + +/* { dg-final { scan-assembler "\twsbh\t" } } */ +/* { dg-final { scan-assembler "\tror\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-5.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-5.c new file mode 100644 index 000000000..45520e4ab --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-5.c @@ -0,0 +1,20 @@ +/* { dg-options "isa_rev>=2 -mgp64" } */ +/* { dg-skip-if "bswap recognition needs expensive optimizations" { *-*-* } { "-O0" "-O1" } { "" } } */ + +typedef unsigned long long uint64_t; + +NOMIPS16 uint64_t +foo (uint64_t x) +{ + return (((x << 56) & 0xff00000000000000ull) + | ((x << 40) & 0xff000000000000ull) + | ((x << 24) & 0xff0000000000ull) + | ((x << 8) & 0xff00000000ull) + | ((x >> 8) & 0xff000000) + | ((x >> 24) & 0xff0000) + | ((x >> 40) & 0xff00) + | ((x >> 56) & 0xff)); +} + +/* { dg-final { scan-assembler "\tdsbh\t" } } */ +/* { dg-final { scan-assembler "\tdshd\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-6.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-6.c new file mode 100644 index 000000000..1145357fe --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/bswap-6.c @@ -0,0 +1,12 @@ +/* { dg-options "isa_rev>=2 -mgp64" } */ + +typedef unsigned long long uint64_t; + +NOMIPS16 uint64_t +foo (uint64_t x) +{ + return __builtin_bswap64 (x); +} + +/* { dg-final { scan-assembler "\tdsbh\t" } } */ +/* { dg-final { scan-assembler "\tdshd\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/mips/pr59137.c b/gcc-4.8/gcc/testsuite/gcc.target/mips/pr59137.c new file mode 100644 index 000000000..898650656 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/mips/pr59137.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-options "-mno-plt" } */ + +extern void abort (void); + +struct lispstruct +{ + int e; + int t; +}; + +struct lispstruct Cnil_body; +struct lispstruct Ct_body; +int nvalues; + +struct lispstruct * __attribute__ ((noinline)) +fLlistp (struct lispstruct *x0) +{ + if (x0 == &Cnil_body + || (((unsigned long) x0 >= 0x80000000) ? 0 + : (!x0->e ? (x0 != &Cnil_body) : x0->t))) + x0 = &Ct_body; + else + x0 = &Cnil_body; + nvalues = 1; + return x0; +} + +int main () +{ + if (fLlistp ((struct lispstruct *) 0xa0000001) != &Cnil_body) + abort (); + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c index ee5c5eee9..c3cf67e44 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-1.c @@ -19,19 +19,6 @@ V b4(V x) return __builtin_shuffle(x, (V){ 4,5,6,7, 4,5,6,7, 4,5,6,7, 4,5,6,7, }); } -V p2(V x, V y) -{ - return __builtin_shuffle(x, y, - (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 }); - -} - -V p4(V x, V y) -{ - return __builtin_shuffle(x, y, - (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 }); -} - V h1(V x, V y) { return __builtin_shuffle(x, y, @@ -72,5 +59,3 @@ V l4(V x, V y) /* { dg-final { scan-assembler "vspltb" } } */ /* { dg-final { scan-assembler "vsplth" } } */ /* { dg-final { scan-assembler "vspltw" } } */ -/* { dg-final { scan-assembler "vpkuhum" } } */ -/* { dg-final { scan-assembler "vpkuwum" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c new file mode 100644 index 000000000..d0b671eac --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-options "-O -maltivec -mno-vsx" } */ + +typedef unsigned char V __attribute__((vector_size(16))); + +V p2(V x, V y) +{ + return __builtin_shuffle(x, y, + (V){ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31 }); + +} + +V p4(V x, V y) +{ + return __builtin_shuffle(x, y, + (V){ 2, 3, 6, 7, 10, 11, 14, 15, 18, 19, 22, 23, 26, 27, 30, 31 }); +} + +/* { dg-final { scan-assembler-not "vperm" } } */ +/* { dg-final { scan-assembler "vpkuhum" } } */ +/* { dg-final { scan-assembler "vpkuwum" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p7.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p7.c new file mode 100644 index 000000000..3442bfba4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p7.c @@ -0,0 +1,207 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-not "lbarx" } } */ +/* { dg-final { scan-assembler-not "lharx" } } */ +/* { dg-final { scan-assembler-times "lwarx" 18 } } */ +/* { dg-final { scan-assembler-times "ldarx" 6 } } */ +/* { dg-final { scan-assembler-not "lqarx" } } */ +/* { dg-final { scan-assembler-not "stbcx" } } */ +/* { dg-final { scan-assembler-not "sthcx" } } */ +/* { dg-final { scan-assembler-times "stwcx" 18 } } */ +/* { dg-final { scan-assembler-times "stdcx" 6 } } */ +/* { dg-final { scan-assembler-not "stqcx" } } */ +/* { dg-final { scan-assembler-times "bl __atomic" 6 } } */ +/* { dg-final { scan-assembler-times "isync" 12 } } */ +/* { dg-final { scan-assembler-times "lwsync" 8 } } */ +/* { dg-final { scan-assembler-not "mtvsrd" } } */ +/* { dg-final { scan-assembler-not "mtvsrwa" } } */ +/* { dg-final { scan-assembler-not "mtvsrwz" } } */ +/* { dg-final { scan-assembler-not "mfvsrd" } } */ +/* { dg-final { scan-assembler-not "mfvsrwz" } } */ + +/* Test for the byte atomic operations on power8 using lbarx/stbcx. */ +char +char_fetch_add_relaxed (char *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +char +char_fetch_sub_consume (char *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +char +char_fetch_and_acquire (char *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +char +char_fetch_ior_release (char *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +char +char_fetch_xor_acq_rel (char *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +char +char_fetch_nand_seq_cst (char *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +/* Test for the half word atomic operations on power8 using lharx/sthcx. */ +short +short_fetch_add_relaxed (short *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +short +short_fetch_sub_consume (short *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +short +short_fetch_and_acquire (short *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +short +short_fetch_ior_release (short *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +short +short_fetch_xor_acq_rel (short *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +short +short_fetch_nand_seq_cst (short *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +/* Test for the word atomic operations on power8 using lwarx/stwcx. */ +int +int_fetch_add_relaxed (int *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +int +int_fetch_sub_consume (int *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +int +int_fetch_and_acquire (int *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +int +int_fetch_ior_release (int *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +int +int_fetch_xor_acq_rel (int *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +int +int_fetch_nand_seq_cst (int *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +/* Test for the double word atomic operations on power8 using ldarx/stdcx. */ +long +long_fetch_add_relaxed (long *ptr, long value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +long +long_fetch_sub_consume (long *ptr, long value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +long +long_fetch_and_acquire (long *ptr, long value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +long +long_fetch_ior_release (long *ptr, long value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +long +long_fetch_xor_acq_rel (long *ptr, long value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +long +long_fetch_nand_seq_cst (long *ptr, long value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */ +__int128_t +quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +__int128_t +quad_fetch_sub_consume (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +__int128_t +quad_fetch_and_acquire (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +__int128_t +quad_fetch_ior_release (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +__int128_t +quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +__int128_t +quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p8.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p8.c new file mode 100644 index 000000000..17460ac4c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic-p8.c @@ -0,0 +1,237 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "lbarx" 7 } } */ +/* { dg-final { scan-assembler-times "lharx" 7 } } */ +/* { dg-final { scan-assembler-times "lwarx" 7 } } */ +/* { dg-final { scan-assembler-times "ldarx" 7 } } */ +/* { dg-final { scan-assembler-times "lqarx" 7 } } */ +/* { dg-final { scan-assembler-times "stbcx" 7 } } */ +/* { dg-final { scan-assembler-times "sthcx" 7 } } */ +/* { dg-final { scan-assembler-times "stwcx" 7 } } */ +/* { dg-final { scan-assembler-times "stdcx" 7 } } */ +/* { dg-final { scan-assembler-times "stqcx" 7 } } */ +/* { dg-final { scan-assembler-not "bl __atomic" } } */ +/* { dg-final { scan-assembler-times "isync" 20 } } */ +/* { dg-final { scan-assembler-times "lwsync" 10 } } */ +/* { dg-final { scan-assembler-not "mtvsrd" } } */ +/* { dg-final { scan-assembler-not "mtvsrwa" } } */ +/* { dg-final { scan-assembler-not "mtvsrwz" } } */ +/* { dg-final { scan-assembler-not "mfvsrd" } } */ +/* { dg-final { scan-assembler-not "mfvsrwz" } } */ + +/* Test for the byte atomic operations on power8 using lbarx/stbcx. */ +char +char_fetch_add_relaxed (char *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +char +char_fetch_sub_consume (char *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +char +char_fetch_and_acquire (char *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +char +char_fetch_ior_release (char *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +char +char_fetch_xor_acq_rel (char *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +char +char_fetch_nand_seq_cst (char *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +void +char_val_compare_and_swap (char *p, int i, int j, char *q) +{ + *q = __sync_val_compare_and_swap (p, i, j); +} + +/* Test for the half word atomic operations on power8 using lharx/sthcx. */ +short +short_fetch_add_relaxed (short *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +short +short_fetch_sub_consume (short *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +short +short_fetch_and_acquire (short *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +short +short_fetch_ior_release (short *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +short +short_fetch_xor_acq_rel (short *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +short +short_fetch_nand_seq_cst (short *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +void +short_val_compare_and_swap (short *p, int i, int j, short *q) +{ + *q = __sync_val_compare_and_swap (p, i, j); +} + +/* Test for the word atomic operations on power8 using lwarx/stwcx. */ +int +int_fetch_add_relaxed (int *ptr, int value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +int +int_fetch_sub_consume (int *ptr, int value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +int +int_fetch_and_acquire (int *ptr, int value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +int +int_fetch_ior_release (int *ptr, int value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +int +int_fetch_xor_acq_rel (int *ptr, int value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +int +int_fetch_nand_seq_cst (int *ptr, int value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +void +int_val_compare_and_swap (int *p, int i, int j, int *q) +{ + *q = __sync_val_compare_and_swap (p, i, j); +} + +/* Test for the double word atomic operations on power8 using ldarx/stdcx. */ +long +long_fetch_add_relaxed (long *ptr, long value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +long +long_fetch_sub_consume (long *ptr, long value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +long +long_fetch_and_acquire (long *ptr, long value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +long +long_fetch_ior_release (long *ptr, long value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +long +long_fetch_xor_acq_rel (long *ptr, long value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +long +long_fetch_nand_seq_cst (long *ptr, long value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +void +long_val_compare_and_swap (long *p, long i, long j, long *q) +{ + *q = __sync_val_compare_and_swap (p, i, j); +} + +/* Test for the quad word atomic operations on power8 using ldarx/stdcx. */ +__int128_t +quad_fetch_add_relaxed (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_RELAXED); +} + +__int128_t +quad_fetch_sub_consume (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_sub (ptr, value, __ATOMIC_CONSUME); +} + +__int128_t +quad_fetch_and_acquire (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +__int128_t +quad_fetch_ior_release (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_RELEASE); +} + +__int128_t +quad_fetch_xor_acq_rel (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_xor (ptr, value, __ATOMIC_ACQ_REL); +} + +__int128_t +quad_fetch_nand_seq_cst (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_nand (ptr, value, __ATOMIC_SEQ_CST); +} + +void +quad_val_compare_and_swap (__int128_t *p, __int128_t i, __int128_t j, __int128_t *q) +{ + *q = __sync_val_compare_and_swap (p, i, j); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c new file mode 100644 index 000000000..8a5cbfaa3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c @@ -0,0 +1,22 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "lq" 1 } } */ +/* { dg-final { scan-assembler-times "stq" 1 } } */ +/* { dg-final { scan-assembler-not "bl __atomic" } } */ +/* { dg-final { scan-assembler-not "lqarx" } } */ +/* { dg-final { scan-assembler-not "stqcx" } } */ + +__int128 +atomic_load_128_relaxed (__int128 *ptr) +{ + return __atomic_load_n (ptr, __ATOMIC_RELAXED); +} + +void +atomic_store_128_relaxed (__int128 *ptr, __int128 val) +{ + __atomic_store_n (ptr, val, __ATOMIC_RELAXED); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-1.c new file mode 100644 index 000000000..c7496c235 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "cdtbcd " 1 } } */ +/* { dg-final { scan-assembler-times "cbcdtd " 1 } } */ +/* { dg-final { scan-assembler-times "addg6s " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +unsigned int +to_bcd (unsigned int a) +{ + return __builtin_cdtbcd (a); +} + +unsigned int +from_bcd (unsigned int a) +{ + return __builtin_cbcdtd (a); +} + +unsigned int +bcd_arith (unsigned int a, unsigned int b) +{ + return __builtin_addg6s (a, b); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-2.c new file mode 100644 index 000000000..d330b7423 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-2.c @@ -0,0 +1,44 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "bcdadd\[.\] " 2 } } */ +/* { dg-final { scan-assembler-times "bcdsub\[.\] " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "mtvsr" } } */ +/* { dg-final { scan-assembler-not "mfvsr" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stvx" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +vector_128_t +do_add_0 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdadd (a, b, 0); +} + +vector_128_t +do_add_1 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdadd (a, b, 1); +} + +vector_128_t +do_sub_0 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdsub (a, b, 0); +} + +vector_128_t +do_sub_1 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdsub (a, b, 1); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-3.c new file mode 100644 index 000000000..436cecf6f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bcd-3.c @@ -0,0 +1,103 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "bcdadd\[.\] " 4 } } */ +/* { dg-final { scan-assembler-times "bcdsub\[.\] " 4 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "mtvsr" } } */ +/* { dg-final { scan-assembler-not "mfvsr" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stvx" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +/* Test whether the peephole works to allow folding a bcdadd, with a + bcdadd_<test> into a single instruction. */ + +vector_128_t +do_add_lt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_lt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_eq (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_eq (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_gt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_gt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_ov (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_ov (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_lt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_lt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_eq (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_eq (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_gt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_gt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_ov (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_ov (a, b, 0)) + *p = 1; + + return ret; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool.c new file mode 100644 index 000000000..f007db4b5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler "eqv" } } */ +/* { dg-final { scan-assembler "nand" } } */ +/* { dg-final { scan-assembler "nor" } } */ + +#ifndef TYPE +#define TYPE unsigned long +#endif + +TYPE op1 (TYPE a, TYPE b) { return ~(a ^ b); } /* eqv */ +TYPE op2 (TYPE a, TYPE b) { return ~(a & b); } /* nand */ +TYPE op3 (TYPE a, TYPE b) { return ~(a | b); } /* nor */ + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-av.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-av.c new file mode 100644 index 000000000..fc56ce261 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-av.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-O2 -mcpu=power6 -maltivec" } */ +/* { dg-final { scan-assembler-not "\[ \t\]and " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]or " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */ +/* { dg-final { scan-assembler "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +#ifndef TYPE +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif + +#include "bool2.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p5.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p5.c new file mode 100644 index 000000000..e4810d00d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p5.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-O2 -mcpu=power5 -mabi=altivec -mno-altivec -mno-vsx" } */ +/* { dg-final { scan-assembler "\[ \t\]and " } } */ +/* { dg-final { scan-assembler "\[ \t\]or " } } */ +/* { dg-final { scan-assembler "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler "\[ \t\]eqv " } } */ +/* { dg-final { scan-assembler "\[ \t\]orc " } } */ +/* { dg-final { scan-assembler "\[ \t\]nand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +#ifndef TYPE +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif + +#include "bool2.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p7.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p7.c new file mode 100644 index 000000000..274fcb090 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p7.c @@ -0,0 +1,31 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power7" } */ +/* { dg-final { scan-assembler-not "\[ \t\]and " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]or " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +#ifndef TYPE +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif + +#include "bool2.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p8.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p8.c new file mode 100644 index 000000000..34f4d2df8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2-p8.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O2 -mcpu=power8" } */ +/* { dg-final { scan-assembler-not "\[ \t\]and " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]or " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]eqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]orc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]nand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler "\[ \t\]xxlnand " } } */ + +#ifndef TYPE +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif + +#include "bool2.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2.h b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2.h new file mode 100644 index 000000000..4513944c2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool2.h @@ -0,0 +1,29 @@ +/* Test various logical operations. */ + +TYPE arg1 (TYPE p, TYPE q) { return p & q; } /* AND */ +TYPE arg2 (TYPE p, TYPE q) { return p | q; } /* OR */ +TYPE arg3 (TYPE p, TYPE q) { return p ^ q; } /* XOR */ +TYPE arg4 (TYPE p) { return ~ p; } /* NOR */ +TYPE arg5 (TYPE p, TYPE q) { return ~(p & q); } /* NAND */ +TYPE arg6 (TYPE p, TYPE q) { return ~(p | q); } /* NOR */ +TYPE arg7 (TYPE p, TYPE q) { return ~(p ^ q); } /* EQV */ +TYPE arg8 (TYPE p, TYPE q) { return (~p) & q; } /* ANDC */ +TYPE arg9 (TYPE p, TYPE q) { return (~p) | q; } /* ORC */ +TYPE arg10(TYPE p, TYPE q) { return (~p) ^ q; } /* EQV */ +TYPE arg11(TYPE p, TYPE q) { return p & (~q); } /* ANDC */ +TYPE arg12(TYPE p, TYPE q) { return p | (~q); } /* ORC */ +TYPE arg13(TYPE p, TYPE q) { return p ^ (~q); } /* EQV */ + +void ptr1 (TYPE *p) { p[0] = p[1] & p[2]; } /* AND */ +void ptr2 (TYPE *p) { p[0] = p[1] | p[2]; } /* OR */ +void ptr3 (TYPE *p) { p[0] = p[1] ^ p[2]; } /* XOR */ +void ptr4 (TYPE *p) { p[0] = ~p[1]; } /* NOR */ +void ptr5 (TYPE *p) { p[0] = ~(p[1] & p[2]); } /* NAND */ +void ptr6 (TYPE *p) { p[0] = ~(p[1] | p[2]); } /* NOR */ +void ptr7 (TYPE *p) { p[0] = ~(p[1] ^ p[2]); } /* EQV */ +void ptr8 (TYPE *p) { p[0] = ~(p[1]) & p[2]; } /* ANDC */ +void ptr9 (TYPE *p) { p[0] = (~p[1]) | p[2]; } /* ORC */ +void ptr10(TYPE *p) { p[0] = (~p[1]) ^ p[2]; } /* EQV */ +void ptr11(TYPE *p) { p[0] = p[1] & (~p[2]); } /* ANDC */ +void ptr12(TYPE *p) { p[0] = p[1] | (~p[2]); } /* ORC */ +void ptr13(TYPE *p) { p[0] = p[1] ^ (~p[2]); } /* EQV */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-av.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-av.c new file mode 100644 index 000000000..d4aac786b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-av.c @@ -0,0 +1,37 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-O2 -mcpu=power6 -mabi=altivec -maltivec -mno-vsx" } */ +/* { dg-final { scan-assembler "\[ \t\]and " } } */ +/* { dg-final { scan-assembler "\[ \t\]or " } } */ +/* { dg-final { scan-assembler "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +/* On altivec, for 128-bit types, ORC/ANDC/EQV might not show up, since the + vector unit doesn't support these, so the appropriate combine patterns may + not be generated. */ + +#ifndef TYPE +#ifdef _ARCH_PPC64 +#define TYPE __int128_t +#else +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif +#endif + +#include "bool3.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p7.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p7.c new file mode 100644 index 000000000..34e3c9e79 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p7.c @@ -0,0 +1,37 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power7" } */ +/* { dg-final { scan-assembler "\[ \t\]and " } } */ +/* { dg-final { scan-assembler "\[ \t\]or " } } */ +/* { dg-final { scan-assembler "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +/* On power7, for 128-bit types, ORC/ANDC/EQV might not show up, since the + vector unit doesn't support these, so the appropriate combine patterns may + not be generated. */ + +#ifndef TYPE +#ifdef _ARCH_PPC64 +#define TYPE __int128_t +#else +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif +#endif + +#include "bool3.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p8.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p8.c new file mode 100644 index 000000000..e1b2dfa7e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3-p8.c @@ -0,0 +1,36 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O2 -mcpu=power8" } */ +/* { dg-final { scan-assembler "\[ \t\]and " } } */ +/* { dg-final { scan-assembler "\[ \t\]or " } } */ +/* { dg-final { scan-assembler "\[ \t\]xor " } } */ +/* { dg-final { scan-assembler "\[ \t\]nor " } } */ +/* { dg-final { scan-assembler "\[ \t\]andc " } } */ +/* { dg-final { scan-assembler "\[ \t\]eqv " } } */ +/* { dg-final { scan-assembler "\[ \t\]orc " } } */ +/* { dg-final { scan-assembler "\[ \t\]nand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vand " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]vnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxland " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlxor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnor " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlandc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxleqv " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlorc " } } */ +/* { dg-final { scan-assembler-not "\[ \t\]xxlnand " } } */ + +#ifndef TYPE +#ifdef _ARCH_PPC64 +#define TYPE __int128_t +#else +typedef int v4si __attribute__ ((vector_size (16))); +#define TYPE v4si +#endif +#endif + +#include "bool3.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3.h b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3.h new file mode 100644 index 000000000..7b99a4a61 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/bool3.h @@ -0,0 +1,186 @@ +/* Test forcing 128-bit logical types into GPR registers. */ + +#if defined(NO_ASM) +#define FORCE_REG1(X) +#define FORCE_REG2(X,Y) + +#else +#if defined(USE_ALTIVEC) +#define REG_CLASS "+v" +#define PRINT_REG1 "# altivec reg %0" +#define PRINT_REG2 "# altivec reg %0, %1" + +#elif defined(USE_FPR) +#define REG_CLASS "+d" +#define PRINT_REG1 "# fpr reg %0" +#define PRINT_REG2 "# fpr reg %0, %1" + +#elif defined(USE_VSX) +#define REG_CLASS "+wa" +#define PRINT_REG1 "# vsx reg %x0" +#define PRINT_REG2 "# vsx reg %x0, %x1" + +#else +#define REG_CLASS "+r" +#define PRINT_REG1 "# gpr reg %0" +#define PRINT_REG2 "# gpr reg %0, %1" +#endif + +#define FORCE_REG1(X) __asm__ (PRINT_REG1 : REG_CLASS (X)) +#define FORCE_REG2(X,Y) __asm__ (PRINT_REG2 : REG_CLASS (X), REG_CLASS (Y)) +#endif + +void ptr1 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a & b; /* AND */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr2 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a | b; /* OR */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr3 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a ^ b; /* XOR */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr4 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b; + + FORCE_REG1 (a); + b = ~a; /* NOR */ + FORCE_REG1 (b); + p[0] = b; +} + +void ptr5 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = ~(a & b); /* NAND */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr6 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = ~(a | b); /* AND */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr7 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = ~(a ^ b); /* EQV */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr8 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = (~a) & b; /* ANDC */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr9 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = (~a) | b; /* ORC */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr10 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = (~a) ^ b; /* EQV */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr11 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a & (~b); /* ANDC */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr12 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a | (~b); /* ORC */ + FORCE_REG1 (c); + p[0] = c; +} + +void ptr13 (TYPE *p) +{ + TYPE a = p[1]; + TYPE b = p[2]; + TYPE c; + + FORCE_REG2 (a, b); + c = a ^ (~b); /* AND */ + FORCE_REG1 (c); + p[0] = c; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c new file mode 100644 index 000000000..87291954e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c @@ -0,0 +1,130 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +typedef vector unsigned long long crypto_t; +typedef vector unsigned long long v2di_t; +typedef vector unsigned int v4si_t; +typedef vector unsigned short v8hi_t; +typedef vector unsigned char v16qi_t; + +crypto_t crpyto1 (crypto_t a) +{ + return __builtin_crypto_vsbox (a); +} + +crypto_t crypto2 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vcipher (a, b); +} + +crypto_t crypto3 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vcipherlast (a, b); +} + +crypto_t crypto4 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vncipher (a, b); +} + +crypto_t crypto5 (crypto_t a, crypto_t b) +{ + return __builtin_crypto_vncipherlast (a, b); +} + +v16qi_t crypto6a (v16qi_t a, v16qi_t b, v16qi_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v8hi_t crypto6b (v8hi_t a, v8hi_t b, v8hi_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v4si_t crypto6c (v4si_t a, v4si_t b, v4si_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v2di_t crypto6d (v2di_t a, v2di_t b, v2di_t c) +{ + return __builtin_crypto_vpermxor (a, b, c); +} + +v16qi_t crypto7a (v16qi_t a, v16qi_t b) +{ + return __builtin_crypto_vpmsumb (a, b); +} + +v16qi_t crypto7b (v16qi_t a, v16qi_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v8hi_t crypto7c (v8hi_t a, v8hi_t b) +{ + return __builtin_crypto_vpmsumh (a, b); +} + +v8hi_t crypto7d (v8hi_t a, v8hi_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v4si_t crypto7e (v4si_t a, v4si_t b) +{ + return __builtin_crypto_vpmsumw (a, b); +} + +v4si_t crypto7f (v4si_t a, v4si_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v2di_t crypto7g (v2di_t a, v2di_t b) +{ + return __builtin_crypto_vpmsumd (a, b); +} + +v2di_t crypto7h (v2di_t a, v2di_t b) +{ + return __builtin_crypto_vpmsum (a, b); +} + +v2di_t crypto8a (v2di_t a) +{ + return __builtin_crypto_vshasigmad (a, 0, 8); +} + +v2di_t crypto8b (v2di_t a) +{ + return __builtin_crypto_vshasigma (a, 0, 8); +} + +v4si_t crypto8c (v4si_t a) +{ + return __builtin_crypto_vshasigmaw (a, 1, 15); +} + +v4si_t crypto8d (v4si_t a) +{ + return __builtin_crypto_vshasigma (a, 1, 15); +} + +/* Note space is used after the instruction so that vcipherlast does not match + vcipher. */ +/* { dg-final { scan-assembler-times "vcipher " 1 } } */ +/* { dg-final { scan-assembler-times "vcipherlast " 1 } } */ +/* { dg-final { scan-assembler-times "vncipher " 1 } } */ +/* { dg-final { scan-assembler-times "vncipherlast " 1 } } */ +/* { dg-final { scan-assembler-times "vpermxor " 4 } } */ +/* { dg-final { scan-assembler-times "vpmsumb " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumd " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumh " 2 } } */ +/* { dg-final { scan-assembler-times "vpmsumw " 2 } } */ +/* { dg-final { scan-assembler-times "vsbox " 1 } } */ +/* { dg-final { scan-assembler-times "vshasigmad " 2 } } */ +/* { dg-final { scan-assembler-times "vshasigmaw " 2 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c index 0692b3d80..14b56d082 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/darwin-longlong.c @@ -11,7 +11,11 @@ int msw(long long in) int i[2]; } ud; ud.ll = in; +#ifdef __LITTLE_ENDIAN__ + return ud.i[1]; +#else return ud.i[0]; +#endif } int main() diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c new file mode 100644 index 000000000..614f27264 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c @@ -0,0 +1,88 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "ddedpd " 4 } } */ +/* { dg-final { scan-assembler-times "denbcd " 2 } } */ +/* { dg-final { scan-assembler-times "dxex " 1 } } */ +/* { dg-final { scan-assembler-times "diex " 1 } } */ +/* { dg-final { scan-assembler-times "dscli " 2 } } */ +/* { dg-final { scan-assembler-times "dscri " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "dctqpq" } } */ +/* { dg-final { scan-assembler-not "drdpq" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ + +_Decimal64 +do_dedpd_0 (_Decimal64 a) +{ + return __builtin_ddedpd (0, a); +} + +_Decimal64 +do_dedpd_1 (_Decimal64 a) +{ + return __builtin_ddedpd (1, a); +} + +_Decimal64 +do_dedpd_2 (_Decimal64 a) +{ + return __builtin_ddedpd (2, a); +} + +_Decimal64 +do_dedpd_3 (_Decimal64 a) +{ + return __builtin_ddedpd (3, a); +} + +_Decimal64 +do_enbcd_0 (_Decimal64 a) +{ + return __builtin_denbcd (0, a); +} + +_Decimal64 +do_enbcd_1 (_Decimal64 a) +{ + return __builtin_denbcd (1, a); +} + +_Decimal64 +do_xex (_Decimal64 a) +{ + return __builtin_dxex (a); +} + +_Decimal64 +do_iex (_Decimal64 a, _Decimal64 b) +{ + return __builtin_diex (a, b); +} + +_Decimal64 +do_scli_1 (_Decimal64 a) +{ + return __builtin_dscli (a, 1); +} + +_Decimal64 +do_scli_10 (_Decimal64 a) +{ + return __builtin_dscli (a, 10); +} + +_Decimal64 +do_scri_1 (_Decimal64 a) +{ + return __builtin_dscri (a, 1); +} + +_Decimal64 +do_scri_10 (_Decimal64 a) +{ + return __builtin_dscri (a, 10); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c new file mode 100644 index 000000000..189bc9ad6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c @@ -0,0 +1,88 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "ddedpdq " 4 } } */ +/* { dg-final { scan-assembler-times "denbcdq " 2 } } */ +/* { dg-final { scan-assembler-times "dxexq " 1 } } */ +/* { dg-final { scan-assembler-times "diexq " 1 } } */ +/* { dg-final { scan-assembler-times "dscliq " 2 } } */ +/* { dg-final { scan-assembler-times "dscriq " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "dctqpq" } } */ +/* { dg-final { scan-assembler-not "drdpq" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ + +_Decimal128 +do_dedpdq_0 (_Decimal128 a) +{ + return __builtin_ddedpdq (0, a); +} + +_Decimal128 +do_dedpdq_1 (_Decimal128 a) +{ + return __builtin_ddedpdq (1, a); +} + +_Decimal128 +do_dedpdq_2 (_Decimal128 a) +{ + return __builtin_ddedpdq (2, a); +} + +_Decimal128 +do_dedpdq_3 (_Decimal128 a) +{ + return __builtin_ddedpdq (3, a); +} + +_Decimal128 +do_enbcdq_0 (_Decimal128 a) +{ + return __builtin_denbcdq (0, a); +} + +_Decimal128 +do_enbcdq_1 (_Decimal128 a) +{ + return __builtin_denbcdq (1, a); +} + +_Decimal128 +do_xexq (_Decimal128 a) +{ + return __builtin_dxexq (a); +} + +_Decimal128 +do_iexq (_Decimal128 a, _Decimal128 b) +{ + return __builtin_diexq (a, b); +} + +_Decimal128 +do_scliq_1 (_Decimal128 a) +{ + return __builtin_dscliq (a, 1); +} + +_Decimal128 +do_scliq_10 (_Decimal128 a) +{ + return __builtin_dscliq (a, 10); +} + +_Decimal128 +do_scriq_1 (_Decimal128 a) +{ + return __builtin_dscriq (a, 1); +} + +_Decimal128 +do_scriq_10 (_Decimal128 a) +{ + return __builtin_dscriq (a, 10); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c new file mode 100644 index 000000000..fcb72bdff --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-dd-2.c @@ -0,0 +1,26 @@ +/* Test generation of DFP instructions for POWER6. */ +/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */ +/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */ + +/* { dg-final { scan-assembler-times "fneg" 1 } } */ +/* { dg-final { scan-assembler-times "fabs" 1 } } */ +/* { dg-final { scan-assembler-times "fnabs" 1 } } */ +/* { dg-final { scan-assembler-times "fmr" 0 } } */ + +_Decimal64 +func1 (_Decimal64 a, _Decimal64 b) +{ + return -b; +} + +_Decimal64 +func2 (_Decimal64 a, _Decimal64 b) +{ + return __builtin_fabsd64 (b); +} + +_Decimal64 +func3 (_Decimal64 a, _Decimal64 b) +{ + return - __builtin_fabsd64 (b); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c new file mode 100644 index 000000000..a078cc469 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-2.c @@ -0,0 +1,29 @@ +/* Test generation of DFP instructions for POWER6. */ +/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */ +/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */ + +/* { dg-final { scan-assembler-times "fneg" 1 } } */ +/* { dg-final { scan-assembler-times "fabs" 1 } } */ +/* { dg-final { scan-assembler-times "fnabs" 1 } } */ +/* { dg-final { scan-assembler-times "fmr" 0 } } */ + +/* These tests verify we only generate fneg, fabs and fnabs + instructions and no fmr's since these are done in place. */ + +_Decimal128 +func1 (_Decimal128 a) +{ + return -a; +} + +_Decimal128 +func2 (_Decimal128 a) +{ + return __builtin_fabsd128 (a); +} + +_Decimal128 +func3 (_Decimal128 a) +{ + return - __builtin_fabsd128 (a); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c new file mode 100644 index 000000000..e825e5cad --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/dfp-td-3.c @@ -0,0 +1,29 @@ +/* Test generation of DFP instructions for POWER6. */ +/* { dg-do compile { target { powerpc*-*-linux* && powerpc_fprs } } } */ +/* { dg-options "-std=gnu99 -O1 -mcpu=power6" } */ + +/* { dg-final { scan-assembler-times "fneg" 1 } } */ +/* { dg-final { scan-assembler-times "fabs" 1 } } */ +/* { dg-final { scan-assembler-times "fnabs" 1 } } */ +/* { dg-final { scan-assembler-times "fmr" 3 } } */ + +/* These tests verify we generate fneg, fabs and fnabs and + associated fmr's since these are not done in place. */ + +_Decimal128 +func1 (_Decimal128 a, _Decimal128 b) +{ + return -b; +} + +_Decimal128 +func2 (_Decimal128 a, _Decimal128 b) +{ + return __builtin_fabsd128 (b); +} + +_Decimal128 +func3 (_Decimal128 a, _Decimal128 b) +{ + return - __builtin_fabsd128 (b); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c new file mode 100644 index 000000000..2569ac843 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler "mtvsrd" } } */ +/* { dg-final { scan-assembler "mfvsrd" } } */ + +/* Check code generation for direct move for double types. */ + +#define TYPE double +#define IS_FLOAT 1 +#define NO_ALTIVEC 1 +#define VSX_REG_ATTR "ws" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c new file mode 100644 index 000000000..c8702204b --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +/* Check whether we get the right bits for direct move at runtime. */ + +#define TYPE double +#define IS_FLOAT 1 +#define NO_ALTIVEC 1 +#define DO_MAIN +#define VSX_REG_ATTR "ws" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c new file mode 100644 index 000000000..524c0eead --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler "mtvsrd" } } */ +/* { dg-final { scan-assembler "mfvsrd" } } */ +/* { dg-final { scan-assembler "xscvdpspn" } } */ +/* { dg-final { scan-assembler "xscvspdpn" } } */ + +/* Check code generation for direct move for float types. */ + +#define TYPE float +#define IS_FLOAT 1 +#define NO_ALTIVEC 1 +#define VSX_REG_ATTR "ww" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c new file mode 100644 index 000000000..352e76166 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +/* Check whether we get the right bits for direct move at runtime. */ + +#define TYPE float +#define IS_FLOAT 1 +#define NO_ALTIVEC 1 +#define DO_MAIN +#define VSX_REG_ATTR "ww" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c new file mode 100644 index 000000000..0a78f9cb2 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler "mtvsrd" } } */ +/* { dg-final { scan-assembler "mfvsrd" } } */ + +/* Check code generation for direct move for long types. */ + +#define TYPE long +#define IS_INT 1 +#define NO_ALTIVEC 1 +#define VSX_REG_ATTR "d" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c new file mode 100644 index 000000000..cee9e0e0f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +/* Check whether we get the right bits for direct move at runtime. */ + +#define TYPE long +#define IS_INT 1 +#define NO_ALTIVEC 1 +#define DO_MAIN +#define VSX_REG_ATTR "d" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c new file mode 100644 index 000000000..3067b9a8e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler "mtvsrd" } } */ +/* { dg-final { scan-assembler "mfvsrd" } } */ + +/* Check code generation for direct move for vector types. */ + +#define TYPE vector int +#define VSX_REG_ATTR "wa" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c new file mode 100644 index 000000000..0d8264faf --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c @@ -0,0 +1,13 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +/* Check whether we get the right bits for direct move at runtime. */ + +#define TYPE vector int +#define DO_MAIN +#define VSX_REG_ATTR "wa" + +#include "direct-move.h" diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move.h b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move.h new file mode 100644 index 000000000..6a5b7ba18 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/direct-move.h @@ -0,0 +1,188 @@ +/* Test functions for direct move support. */ + +#include <math.h> +extern void abort (void); + +#ifndef VSX_REG_ATTR +#define VSX_REG_ATTR "wa" +#endif + +void __attribute__((__noinline__)) +copy (TYPE *a, TYPE *b) +{ + *b = *a; +} + +#ifndef NO_GPR +void __attribute__((__noinline__)) +load_gpr (TYPE *a, TYPE *b) +{ + TYPE c = *a; + __asm__ ("# gpr, reg = %0" : "+b" (c)); + *b = c; +} +#endif + +#ifndef NO_FPR +void __attribute__((__noinline__)) +load_fpr (TYPE *a, TYPE *b) +{ + TYPE c = *a; + __asm__ ("# fpr, reg = %0" : "+d" (c)); + *b = c; +} +#endif + +#ifndef NO_ALTIVEC +void __attribute__((__noinline__)) +load_altivec (TYPE *a, TYPE *b) +{ + TYPE c = *a; + __asm__ ("# altivec, reg = %0" : "+v" (c)); + *b = c; +} +#endif + +#ifndef NO_VSX +void __attribute__((__noinline__)) +load_vsx (TYPE *a, TYPE *b) +{ + TYPE c = *a; + __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c)); + *b = c; +} +#endif + +#ifndef NO_GPR_TO_VSX +void __attribute__((__noinline__)) +load_gpr_to_vsx (TYPE *a, TYPE *b) +{ + TYPE c = *a; + TYPE d; + __asm__ ("# gpr, reg = %0" : "+b" (c)); + d = c; + __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (d)); + *b = d; +} +#endif + +#ifndef NO_VSX_TO_GPR +void __attribute__((__noinline__)) +load_vsx_to_gpr (TYPE *a, TYPE *b) +{ + TYPE c = *a; + TYPE d; + __asm__ ("# vsx, reg = %x0" : "+" VSX_REG_ATTR (c)); + d = c; + __asm__ ("# gpr, reg = %0" : "+b" (d)); + *b = d; +} +#endif + +#ifdef DO_MAIN +typedef void (fn_type (TYPE *, TYPE *)); + +struct test_struct { + fn_type *func; + const char *name; +}; + +const struct test_struct test_functions[] = { + { copy, "copy" }, +#ifndef NO_GPR + { load_gpr, "load_gpr" }, +#endif +#ifndef NO_FPR + { load_fpr, "load_fpr" }, +#endif +#ifndef NO_ALTIVEC + { load_altivec, "load_altivec" }, +#endif +#ifndef NO_VSX + { load_vsx, "load_vsx" }, +#endif +#ifndef NO_GPR_TO_VSX + { load_gpr_to_vsx, "load_gpr_to_vsx" }, +#endif +#ifndef NO_VSX_TO_GPR + { load_vsx_to_gpr, "load_vsx_to_gpr" }, +#endif +}; + +/* Test a given value for each of the functions. */ +void __attribute__((__noinline__)) +test_value (TYPE a) +{ + long i; + + for (i = 0; i < sizeof (test_functions) / sizeof (test_functions[0]); i++) + { + TYPE b; + + test_functions[i].func (&a, &b); + if (memcmp ((void *)&a, (void *)&b, sizeof (TYPE)) != 0) + abort (); + } +} + +/* Main program. */ +int +main (void) +{ + long i,j; + union { + TYPE value; + unsigned char bytes[sizeof (TYPE)]; + } u; + +#if IS_INT + TYPE value = (TYPE)-5; + for (i = 0; i < 12; i++) + { + test_value (value); + value++; + } + + for (i = 0; i < 8*sizeof (TYPE); i++) + test_value (((TYPE)1) << i); + +#elif IS_UNS + TYPE value = (TYPE)0; + for (i = 0; i < 10; i++) + { + test_value (value); + test_value (~ value); + value++; + } + + for (i = 0; i < 8*sizeof (TYPE); i++) + test_value (((TYPE)1) << i); + +#elif IS_FLOAT + TYPE value = (TYPE)-5; + for (i = 0; i < 12; i++) + { + test_value (value); + value++; + } + + test_value ((TYPE)3.1415926535); + test_value ((TYPE)1.23456); + test_value ((TYPE)(-0.0)); + test_value ((TYPE)NAN); + test_value ((TYPE)+INFINITY); + test_value ((TYPE)-INFINITY); +#else + + for (j = 0; j < 10; j++) + { + for (i = 0; i < sizeof (TYPE); i++) + u.bytes[i] = (unsigned char) (random () >> 4); + + test_value (u.value); + } +#endif + + return 0; +} +#endif diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c new file mode 100644 index 000000000..5f948b721 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "divwe " 1 } } */ +/* { dg-final { scan-assembler-times "divweo " 1 } } */ +/* { dg-final { scan-assembler-times "divweu " 1 } } */ +/* { dg-final { scan-assembler-times "divweuo " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +int +div_we (int a, int b) +{ + return __builtin_divwe (a, b); +} + +int +div_weo (int a, int b) +{ + return __builtin_divweo (a, b); +} + +unsigned int +div_weu (unsigned int a, unsigned int b) +{ + return __builtin_divweu (a, b); +} + +unsigned int +div_weuo (unsigned int a, unsigned int b) +{ + return __builtin_divweuo (a, b); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c new file mode 100644 index 000000000..8ee6c8cf7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c @@ -0,0 +1,34 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "divde " 1 } } */ +/* { dg-final { scan-assembler-times "divdeo " 1 } } */ +/* { dg-final { scan-assembler-times "divdeu " 1 } } */ +/* { dg-final { scan-assembler-times "divdeuo " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +long +div_de (long a, long b) +{ + return __builtin_divde (a, b); +} + +long +div_deo (long a, long b) +{ + return __builtin_divdeo (a, b); +} + +unsigned long +div_deu (unsigned long a, unsigned long b) +{ + return __builtin_divdeu (a, b); +} + +unsigned long +div_deuo (unsigned long a, unsigned long b) +{ + return __builtin_divdeuo (a, b); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/fusion.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/fusion.c new file mode 100644 index 000000000..60e635972 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/fusion.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */ + +#define LARGE 0x12345 + +int fusion_uchar (unsigned char *p){ return p[LARGE]; } +int fusion_schar (signed char *p){ return p[LARGE]; } +int fusion_ushort (unsigned short *p){ return p[LARGE]; } +int fusion_short (short *p){ return p[LARGE]; } +int fusion_int (int *p){ return p[LARGE]; } +unsigned fusion_uns (unsigned *p){ return p[LARGE]; } + +vector double fusion_vector (vector double *p) { return p[2]; } + +/* { dg-final { scan-assembler-times "gpr load fusion" 6 } } */ +/* { dg-final { scan-assembler-times "vector load fusion" 1 } } */ +/* { dg-final { scan-assembler-times "lbz" 2 } } */ +/* { dg-final { scan-assembler-times "extsb" 1 } } */ +/* { dg-final { scan-assembler-times "lhz" 2 } } */ +/* { dg-final { scan-assembler-times "extsh" 1 } } */ +/* { dg-final { scan-assembler-times "lwz" 2 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c new file mode 100644 index 000000000..e58816a7f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c @@ -0,0 +1,51 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_htm_ok } */ +/* { dg-options "-O2 -mhtm" } */ + +/* { dg-final { scan-assembler-times "tbegin\\." 1 } } */ +/* { dg-final { scan-assembler-times "tend\\." 2 } } */ +/* { dg-final { scan-assembler-times "tabort\\." 2 } } */ +/* { dg-final { scan-assembler-times "tabortdc\\." 1 } } */ +/* { dg-final { scan-assembler-times "tabortdci\\." 1 } } */ +/* { dg-final { scan-assembler-times "tabortwc\\." 1 } } */ +/* { dg-final { scan-assembler-times "tabortwci\\." 2 } } */ +/* { dg-final { scan-assembler-times "tcheck\\." 1 } } */ +/* { dg-final { scan-assembler-times "trechkpt\\." 1 } } */ +/* { dg-final { scan-assembler-times "treclaim\\." 1 } } */ +/* { dg-final { scan-assembler-times "tsr\\." 3 } } */ +/* { dg-final { scan-assembler-times "mfspr" 4 } } */ +/* { dg-final { scan-assembler-times "mtspr" 4 } } */ + +void use_builtins (long *p, char code, long *a, long *b) +{ + p[0] = __builtin_tbegin (0); + p[1] = __builtin_tend (0); + p[2] = __builtin_tendall (); + p[3] = __builtin_tabort (0); + p[4] = __builtin_tabort (code); + + p[5] = __builtin_tabortdc (0xf, a[5], b[5]); + p[6] = __builtin_tabortdci (0xf, a[6], 13); + p[7] = __builtin_tabortwc (0xf, a[7], b[7]); + p[8] = __builtin_tabortwci (0xf, a[8], 13); + + p[9] = __builtin_tcheck (5); + p[10] = __builtin_trechkpt (); + p[11] = __builtin_treclaim (0); + p[12] = __builtin_tresume (); + p[13] = __builtin_tsuspend (); + p[14] = __builtin_tsr (0); + p[15] = __builtin_ttest (); /* This expands to a tabortwci. */ + + + p[16] = __builtin_get_texasr (); + p[17] = __builtin_get_texasru (); + p[18] = __builtin_get_tfhar (); + p[19] = __builtin_get_tfiar (); + + __builtin_set_texasr (a[20]); + __builtin_set_texasru (a[21]); + __builtin_set_tfhar (a[22]); + __builtin_set_tfiar (a[23]); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c new file mode 100644 index 000000000..5e92814b7 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c @@ -0,0 +1,32 @@ +/* This checks the availability of the XL compiler intrinsics for + transactional execution with the expected prototypes. */ + +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_htm_ok } */ +/* { dg-options "-O2 -mhtm" } */ + +#include <htmxlintrin.h> + +void +foo (void *TM_buff, long *result, unsigned char *code) +{ + *result++ = __TM_simple_begin (); + *result++ = __TM_begin (TM_buff); + *result++ = __TM_end (); + __TM_abort (); + __TM_named_abort (*code); + __TM_resume (); + __TM_suspend (); + *result++ = __TM_is_user_abort (TM_buff); + *result++ = __TM_is_named_user_abort (TM_buff, code); + *result++ = __TM_is_illegal (TM_buff); + *result++ = __TM_is_footprint_exceeded (TM_buff); + *result++ = __TM_nesting_depth (TM_buff); + *result++ = __TM_is_nested_too_deep (TM_buff); + *result++ = __TM_is_conflict (TM_buff); + *result++ = __TM_is_failure_persistent (TM_buff); + *result++ = __TM_failure_address (TM_buff); + *result++ = __TM_failure_code (TM_buff); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c new file mode 100644 index 000000000..7f2d3d3ef --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c @@ -0,0 +1,22 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power6x -mmfpgpr" } */ +/* { dg-final { scan-assembler "mffgpr" } } */ +/* { dg-final { scan-assembler "mftgpr" } } */ + +/* Test that we generate the instructions to move between the GPR and FPR + registers under power6x. */ + +extern long return_long (void); +extern double return_double (void); + +double return_double2 (void) +{ + return (double) return_long (); +} + +long return_long2 (void) +{ + return (long) return_double (); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c new file mode 100644 index 000000000..6fd3acc2a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c @@ -0,0 +1,65 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#ifndef TYPE +#define TYPE long long +#endif + +#ifndef SIGN_TYPE +#define SIGN_TYPE signed TYPE +#endif + +#ifndef UNS_TYPE +#define UNS_TYPE unsigned TYPE +#endif + +typedef vector SIGN_TYPE v_sign; +typedef vector UNS_TYPE v_uns; + +v_sign sign_add (v_sign a, v_sign b) +{ + return a + b; +} + +v_sign sign_sub (v_sign a, v_sign b) +{ + return a - b; +} + +v_sign sign_shift_left (v_sign a, v_sign b) +{ + return a << b; +} + +v_sign sign_shift_right (v_sign a, v_sign b) +{ + return a >> b; +} + +v_uns uns_add (v_uns a, v_uns b) +{ + return a + b; +} + +v_uns uns_sub (v_uns a, v_uns b) +{ + return a - b; +} + +v_uns uns_shift_left (v_uns a, v_uns b) +{ + return a << b; +} + +v_uns uns_shift_right (v_uns a, v_uns b) +{ + return a >> b; +} + +/* { dg-final { scan-assembler-times "vaddudm" 2 } } */ +/* { dg-final { scan-assembler-times "vsubudm" 2 } } */ +/* { dg-final { scan-assembler-times "vsld" 2 } } */ +/* { dg-final { scan-assembler-times "vsrad" 1 } } */ +/* { dg-final { scan-assembler-times "vsrd" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c new file mode 100644 index 000000000..412040bfa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c @@ -0,0 +1,204 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#include <altivec.h> + +typedef vector long long v_sign; +typedef vector unsigned long long v_uns; +typedef vector bool long long v_bool; + +v_sign sign_add_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vaddudm (a, b); +} + +v_sign sign_add_2 (v_sign a, v_sign b) +{ + return vec_add (a, b); +} + +v_sign sign_add_3 (v_sign a, v_sign b) +{ + return vec_vaddudm (a, b); +} + +v_sign sign_sub_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vsubudm (a, b); +} + +v_sign sign_sub_2 (v_sign a, v_sign b) +{ + return vec_sub (a, b); +} + + +v_sign sign_sub_3 (v_sign a, v_sign b) +{ + return vec_vsubudm (a, b); +} + +v_sign sign_min_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vminsd (a, b); +} + +v_sign sign_min_2 (v_sign a, v_sign b) +{ + return vec_min (a, b); +} + +v_sign sign_min_3 (v_sign a, v_sign b) +{ + return vec_vminsd (a, b); +} + +v_sign sign_max_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vmaxsd (a, b); +} + +v_sign sign_max_2 (v_sign a, v_sign b) +{ + return vec_max (a, b); +} + +v_sign sign_max_3 (v_sign a, v_sign b) +{ + return vec_vmaxsd (a, b); +} + +v_sign sign_abs (v_sign a) +{ + return vec_abs (a); /* xor, vsubudm, vmaxsd. */ +} + +v_bool sign_eq (v_sign a, v_sign b) +{ + return vec_cmpeq (a, b); +} + +v_bool sign_lt (v_sign a, v_sign b) +{ + return vec_cmplt (a, b); +} + +v_uns uns_add_2 (v_uns a, v_uns b) +{ + return vec_add (a, b); +} + +v_uns uns_add_3 (v_uns a, v_uns b) +{ + return vec_vaddudm (a, b); +} + +v_uns uns_sub_2 (v_uns a, v_uns b) +{ + return vec_sub (a, b); +} + +v_uns uns_sub_3 (v_uns a, v_uns b) +{ + return vec_vsubudm (a, b); +} + +v_uns uns_min_2 (v_uns a, v_uns b) +{ + return vec_min (a, b); +} + +v_uns uns_min_3 (v_uns a, v_uns b) +{ + return vec_vminud (a, b); +} + +v_uns uns_max_2 (v_uns a, v_uns b) +{ + return vec_max (a, b); +} + +v_uns uns_max_3 (v_uns a, v_uns b) +{ + return vec_vmaxud (a, b); +} + +v_bool uns_eq (v_uns a, v_uns b) +{ + return vec_cmpeq (a, b); +} + +v_bool uns_lt (v_uns a, v_uns b) +{ + return vec_cmplt (a, b); +} + +v_sign sign_rl_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vrld (a, b); +} + +v_sign sign_rl_2 (v_sign a, v_uns b) +{ + return vec_rl (a, b); +} + +v_uns uns_rl_2 (v_uns a, v_uns b) +{ + return vec_rl (a, b); +} + +v_sign sign_sl_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vsld (a, b); +} + +v_sign sign_sl_2 (v_sign a, v_uns b) +{ + return vec_sl (a, b); +} + +v_sign sign_sl_3 (v_sign a, v_uns b) +{ + return vec_vsld (a, b); +} + +v_uns uns_sl_2 (v_uns a, v_uns b) +{ + return vec_sl (a, b); +} + +v_uns uns_sl_3 (v_uns a, v_uns b) +{ + return vec_vsld (a, b); +} + +v_sign sign_sra_1 (v_sign a, v_sign b) +{ + return __builtin_altivec_vsrad (a, b); +} + +v_sign sign_sra_2 (v_sign a, v_uns b) +{ + return vec_sra (a, b); +} + +v_sign sign_sra_3 (v_sign a, v_uns b) +{ + return vec_vsrad (a, b); +} + +/* { dg-final { scan-assembler-times "vaddudm" 5 } } */ +/* { dg-final { scan-assembler-times "vsubudm" 6 } } */ +/* { dg-final { scan-assembler-times "vmaxsd" 4 } } */ +/* { dg-final { scan-assembler-times "vminsd" 3 } } */ +/* { dg-final { scan-assembler-times "vmaxud" 2 } } */ +/* { dg-final { scan-assembler-times "vminud" 2 } } */ +/* { dg-final { scan-assembler-times "vcmpequd" 2 } } */ +/* { dg-final { scan-assembler-times "vcmpgtsd" 1 } } */ +/* { dg-final { scan-assembler-times "vcmpgtud" 1 } } */ +/* { dg-final { scan-assembler-times "vrld" 3 } } */ +/* { dg-final { scan-assembler-times "vsld" 5 } } */ +/* { dg-final { scan-assembler-times "vsrad" 3 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c new file mode 100644 index 000000000..b3f725f2d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c @@ -0,0 +1,104 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */ + +#include <altivec.h> + +typedef vector long long vll_sign; +typedef vector unsigned long long vll_uns; +typedef vector bool long long vll_bool; + +typedef vector int vi_sign; +typedef vector unsigned int vi_uns; +typedef vector bool int vi_bool; + +typedef vector short vs_sign; +typedef vector unsigned short vs_uns; +typedef vector bool short vs_bool; + +typedef vector signed char vc_sign; +typedef vector unsigned char vc_uns; +typedef vector bool char vc_bool; + + +vi_sign vi_pack_1 (vll_sign a, vll_sign b) +{ + return __builtin_altivec_vpkudum (a, b); +} + +vi_sign vi_pack_2 (vll_sign a, vll_sign b) +{ + return vec_pack (a, b); +} + +vi_sign vi_pack_3 (vll_sign a, vll_sign b) +{ + return vec_vpkudum (a, b); +} + +vs_sign vs_pack_1 (vi_sign a, vi_sign b) +{ + return __builtin_altivec_vpkuwum (a, b); +} + +vs_sign vs_pack_2 (vi_sign a, vi_sign b) +{ + return vec_pack (a, b); +} + +vs_sign vs_pack_3 (vi_sign a, vi_sign b) +{ + return vec_vpkuwum (a, b); +} + +vc_sign vc_pack_1 (vs_sign a, vs_sign b) +{ + return __builtin_altivec_vpkuhum (a, b); +} + +vc_sign vc_pack_2 (vs_sign a, vs_sign b) +{ + return vec_pack (a, b); +} + +vc_sign vc_pack_3 (vs_sign a, vs_sign b) +{ + return vec_vpkuhum (a, b); +} + +vll_sign vll_unpack_hi_1 (vi_sign a) +{ + return __builtin_altivec_vupkhsw (a); +} + +vll_sign vll_unpack_hi_2 (vi_sign a) +{ + return vec_unpackh (a); +} + +vll_sign vll_unpack_hi_3 (vi_sign a) +{ + return __builtin_vec_vupkhsw (a); +} + +vll_sign vll_unpack_lo_1 (vi_sign a) +{ + return vec_vupklsw (a); +} + +vll_sign vll_unpack_lo_2 (vi_sign a) +{ + return vec_unpackl (a); +} + +vll_sign vll_unpack_lo_3 (vi_sign a) +{ + return vec_vupklsw (a); +} + +/* { dg-final { scan-assembler-times "vpkudum" 3 } } */ +/* { dg-final { scan-assembler-times "vpkuwum" 3 } } */ +/* { dg-final { scan-assembler-times "vpkuhum" 3 } } */ +/* { dg-final { scan-assembler-times "vupklsw" 3 } } */ +/* { dg-final { scan-assembler-times "vupkhsw" 3 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c new file mode 100644 index 000000000..518a6aa5e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c @@ -0,0 +1,249 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model" } */ + +#include <altivec.h> + +typedef vector long long vll_sign; +typedef vector unsigned long long vll_uns; +typedef vector bool long long vll_bool; + +typedef vector int vi_sign; +typedef vector unsigned int vi_uns; +typedef vector bool int vi_bool; + +typedef vector short vs_sign; +typedef vector unsigned short vs_uns; +typedef vector bool short vs_bool; + +typedef vector signed char vc_sign; +typedef vector unsigned char vc_uns; +typedef vector bool char vc_bool; + +vll_sign vll_clz_1 (vll_sign a) +{ + return __builtin_altivec_vclzd (a); +} + +vll_sign vll_clz_2 (vll_sign a) +{ + return vec_vclz (a); +} + +vll_sign vll_clz_3 (vll_sign a) +{ + return vec_vclzd (a); +} + +vll_uns vll_clz_4 (vll_uns a) +{ + return vec_vclz (a); +} + +vll_uns vll_clz_5 (vll_uns a) +{ + return vec_vclzd (a); +} + +vi_sign vi_clz_1 (vi_sign a) +{ + return __builtin_altivec_vclzw (a); +} + +vi_sign vi_clz_2 (vi_sign a) +{ + return vec_vclz (a); +} + +vi_sign vi_clz_3 (vi_sign a) +{ + return vec_vclzw (a); +} + +vi_uns vi_clz_4 (vi_uns a) +{ + return vec_vclz (a); +} + +vi_uns vi_clz_5 (vi_uns a) +{ + return vec_vclzw (a); +} + +vs_sign vs_clz_1 (vs_sign a) +{ + return __builtin_altivec_vclzh (a); +} + +vs_sign vs_clz_2 (vs_sign a) +{ + return vec_vclz (a); +} + +vs_sign vs_clz_3 (vs_sign a) +{ + return vec_vclzh (a); +} + +vs_uns vs_clz_4 (vs_uns a) +{ + return vec_vclz (a); +} + +vs_uns vs_clz_5 (vs_uns a) +{ + return vec_vclzh (a); +} + +vc_sign vc_clz_1 (vc_sign a) +{ + return __builtin_altivec_vclzb (a); +} + +vc_sign vc_clz_2 (vc_sign a) +{ + return vec_vclz (a); +} + +vc_sign vc_clz_3 (vc_sign a) +{ + return vec_vclzb (a); +} + +vc_uns vc_clz_4 (vc_uns a) +{ + return vec_vclz (a); +} + +vc_uns vc_clz_5 (vc_uns a) +{ + return vec_vclzb (a); +} + +vll_sign vll_popcnt_1 (vll_sign a) +{ + return __builtin_altivec_vpopcntd (a); +} + +vll_sign vll_popcnt_2 (vll_sign a) +{ + return vec_vpopcnt (a); +} + +vll_sign vll_popcnt_3 (vll_sign a) +{ + return vec_vpopcntd (a); +} + +vll_uns vll_popcnt_4 (vll_uns a) +{ + return vec_vpopcnt (a); +} + +vll_uns vll_popcnt_5 (vll_uns a) +{ + return vec_vpopcntd (a); +} + +vi_sign vi_popcnt_1 (vi_sign a) +{ + return __builtin_altivec_vpopcntw (a); +} + +vi_sign vi_popcnt_2 (vi_sign a) +{ + return vec_vpopcnt (a); +} + +vi_sign vi_popcnt_3 (vi_sign a) +{ + return vec_vpopcntw (a); +} + +vi_uns vi_popcnt_4 (vi_uns a) +{ + return vec_vpopcnt (a); +} + +vi_uns vi_popcnt_5 (vi_uns a) +{ + return vec_vpopcntw (a); +} + +vs_sign vs_popcnt_1 (vs_sign a) +{ + return __builtin_altivec_vpopcnth (a); +} + +vs_sign vs_popcnt_2 (vs_sign a) +{ + return vec_vpopcnt (a); +} + +vs_sign vs_popcnt_3 (vs_sign a) +{ + return vec_vpopcnth (a); +} + +vs_uns vs_popcnt_4 (vs_uns a) +{ + return vec_vpopcnt (a); +} + +vs_uns vs_popcnt_5 (vs_uns a) +{ + return vec_vpopcnth (a); +} + +vc_sign vc_popcnt_1 (vc_sign a) +{ + return __builtin_altivec_vpopcntb (a); +} + +vc_sign vc_popcnt_2 (vc_sign a) +{ + return vec_vpopcnt (a); +} + +vc_sign vc_popcnt_3 (vc_sign a) +{ + return vec_vpopcntb (a); +} + +vc_uns vc_popcnt_4 (vc_uns a) +{ + return vec_vpopcnt (a); +} + +vc_uns vc_popcnt_5 (vc_uns a) +{ + return vec_vpopcntb (a); +} + +vc_uns vc_gbb_1 (vc_uns a) +{ + return __builtin_altivec_vgbbd (a); +} + +vc_sign vc_gbb_2 (vc_sign a) +{ + return vec_vgbbd (a); +} + +vc_uns vc_gbb_3 (vc_uns a) +{ + return vec_vgbbd (a); +} + +/* { dg-final { scan-assembler-times "vclzd" 5 } } */ +/* { dg-final { scan-assembler-times "vclzw" 5 } } */ +/* { dg-final { scan-assembler-times "vclzh" 5 } } */ +/* { dg-final { scan-assembler-times "vclzb" 5 } } */ + +/* { dg-final { scan-assembler-times "vpopcntd" 5 } } */ +/* { dg-final { scan-assembler-times "vpopcntw" 5 } } */ +/* { dg-final { scan-assembler-times "vpopcnth" 5 } } */ +/* { dg-final { scan-assembler-times "vpopcntb" 5 } } */ + +/* { dg-final { scan-assembler-times "vgbbd" 3 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c new file mode 100644 index 000000000..2e64551ff --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c @@ -0,0 +1,105 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#include <altivec.h> + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#ifndef ATTR_ALIGN +#define ATTR_ALIGN __attribute__((__aligned__(ALIGN))) +#endif + +#define DOIT(TYPE, PREFIX) \ +TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \ +{ \ + return vec_eqv (a, b); \ +} \ + \ +TYPE PREFIX ## _eqv_arith (TYPE a, TYPE b) \ +{ \ + return ~(a ^ b); \ +} \ + \ +TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \ +{ \ + return vec_nand (a, b); \ +} \ + \ +TYPE PREFIX ## _nand_arith1 (TYPE a, TYPE b) \ +{ \ + return ~(a & b); \ +} \ + \ +TYPE PREFIX ## _nand_arith2 (TYPE a, TYPE b) \ +{ \ + return (~a) | (~b); \ +} \ + \ +TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \ +{ \ + return vec_orc (a, b); \ +} \ + \ +TYPE PREFIX ## _orc_arith1 (TYPE a, TYPE b) \ +{ \ + return (~ a) | b; \ +} \ + \ +TYPE PREFIX ## _orc_arith2 (TYPE a, TYPE b) \ +{ \ + return a | (~ b); \ +} + +#define DOIT_FLOAT(TYPE, PREFIX) \ +TYPE PREFIX ## _eqv_builtin (TYPE a, TYPE b) \ +{ \ + return vec_eqv (a, b); \ +} \ + \ +TYPE PREFIX ## _nand_builtin (TYPE a, TYPE b) \ +{ \ + return vec_nand (a, b); \ +} \ + \ +TYPE PREFIX ## _orc_builtin (TYPE a, TYPE b) \ +{ \ + return vec_orc (a, b); \ +} + +typedef vector signed char sign_char_vec; +typedef vector short sign_short_vec; +typedef vector int sign_int_vec; +typedef vector long long sign_llong_vec; + +typedef vector unsigned char uns_char_vec; +typedef vector unsigned short uns_short_vec; +typedef vector unsigned int uns_int_vec; +typedef vector unsigned long long uns_llong_vec; + +typedef vector float float_vec; +typedef vector double double_vec; + +DOIT(sign_char_vec, sign_char) +DOIT(sign_short_vec, sign_short) +DOIT(sign_int_vec, sign_int) +DOIT(sign_llong_vec, sign_llong) + +DOIT(uns_char_vec, uns_char) +DOIT(uns_short_vec, uns_short) +DOIT(uns_int_vec, uns_int) +DOIT(uns_llong_vec, uns_llong) + +DOIT_FLOAT(float_vec, float) +DOIT_FLOAT(double_vec, double) + +/* { dg-final { scan-assembler-times "xxleqv" 18 } } */ +/* { dg-final { scan-assembler-times "xxlnand" 26 } } */ +/* { dg-final { scan-assembler-times "xxlorc" 26 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c new file mode 100644 index 000000000..8b81781c6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +vector float dbl_to_float_p8 (double x) { return __builtin_vsx_xscvdpspn (x); } +double float_to_dbl_p8 (vector float x) { return __builtin_vsx_xscvspdpn (x); } + +/* { dg-final { scan-assembler "xscvdpspn" } } */ +/* { dg-final { scan-assembler "xscvspdpn" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c new file mode 100644 index 000000000..45a300fb9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +#include <altivec.h> + +typedef vector int v_sign; +typedef vector unsigned int v_uns; + +v_sign even_sign (v_sign a, v_sign b) +{ + return vec_vmrgew (a, b); +} + +v_uns even_uns (v_uns a, v_uns b) +{ + return vec_vmrgew (a, b); +} + +v_sign odd_sign (v_sign a, v_sign b) +{ + return vec_vmrgow (a, b); +} + +v_uns odd_uns (v_uns a, v_uns b) +{ + return vec_vmrgow (a, b); +} + +/* { dg-final { scan-assembler-times "vmrgew" 2 } } */ +/* { dg-final { scan-assembler-times "vmrgow" 2 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c new file mode 100644 index 000000000..3cfd8161d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c @@ -0,0 +1,139 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf -fno-math-errno" } */ + +float abs_sf (float *p) +{ + float f = *p; + __asm__ ("# reg %x0" : "+v" (f)); + return __builtin_fabsf (f); +} + +float nabs_sf (float *p) +{ + float f = *p; + __asm__ ("# reg %x0" : "+v" (f)); + return - __builtin_fabsf (f); +} + +float neg_sf (float *p) +{ + float f = *p; + __asm__ ("# reg %x0" : "+v" (f)); + return - f; +} + +float add_sf (float *p, float *q) +{ + float f1 = *p; + float f2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2)); + return f1 + f2; +} + +float sub_sf (float *p, float *q) +{ + float f1 = *p; + float f2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2)); + return f1 - f2; +} + +float mul_sf (float *p, float *q) +{ + float f1 = *p; + float f2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2)); + return f1 * f2; +} + +float div_sf (float *p, float *q) +{ + float f1 = *p; + float f2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (f1), "+v" (f2)); + return f1 / f2; +} + +float sqrt_sf (float *p) +{ + float f = *p; + __asm__ ("# reg %x0" : "+v" (f)); + return __builtin_sqrtf (f); +} + + +double abs_df (double *p) +{ + double d = *p; + __asm__ ("# reg %x0" : "+v" (d)); + return __builtin_fabs (d); +} + +double nabs_df (double *p) +{ + double d = *p; + __asm__ ("# reg %x0" : "+v" (d)); + return - __builtin_fabs (d); +} + +double neg_df (double *p) +{ + double d = *p; + __asm__ ("# reg %x0" : "+v" (d)); + return - d; +} + +double add_df (double *p, double *q) +{ + double d1 = *p; + double d2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2)); + return d1 + d2; +} + +double sub_df (double *p, double *q) +{ + double d1 = *p; + double d2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2)); + return d1 - d2; +} + +double mul_df (double *p, double *q) +{ + double d1 = *p; + double d2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2)); + return d1 * d2; +} + +double div_df (double *p, double *q) +{ + double d1 = *p; + double d2 = *q; + __asm__ ("# reg %x0, %x1" : "+v" (d1), "+v" (d2)); + return d1 / d2; +} + +double sqrt_df (float *p) +{ + double d = *p; + __asm__ ("# reg %x0" : "+v" (d)); + return __builtin_sqrt (d); +} + +/* { dg-final { scan-assembler "xsabsdp" } } */ +/* { dg-final { scan-assembler "xsadddp" } } */ +/* { dg-final { scan-assembler "xsaddsp" } } */ +/* { dg-final { scan-assembler "xsdivdp" } } */ +/* { dg-final { scan-assembler "xsdivsp" } } */ +/* { dg-final { scan-assembler "xsmuldp" } } */ +/* { dg-final { scan-assembler "xsmulsp" } } */ +/* { dg-final { scan-assembler "xsnabsdp" } } */ +/* { dg-final { scan-assembler "xsnegdp" } } */ +/* { dg-final { scan-assembler "xssqrtdp" } } */ +/* { dg-final { scan-assembler "xssqrtsp" } } */ +/* { dg-final { scan-assembler "xssubdp" } } */ +/* { dg-final { scan-assembler "xssubsp" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c new file mode 100644 index 000000000..86bde3241 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c @@ -0,0 +1,85 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -mvsx-timode" } */ + +#include <altivec.h> + +#ifndef TYPE +#define TYPE vector __int128_t +#endif + +TYPE +do_addcuq (TYPE p, TYPE q) +{ + return __builtin_vec_vaddcuq (p, q); +} + +TYPE +do_adduqm (TYPE p, TYPE q) +{ + return __builtin_vec_add (p, q); +} + +TYPE +do_addeuqm (TYPE p, TYPE q, TYPE r) +{ + return __builtin_vec_vaddeuqm (p, q, r); +} + +TYPE +do_addecuq (TYPE p, TYPE q, TYPE r) +{ + return __builtin_vec_vaddecuq (p, q, r); +} + +TYPE +do_subeuqm (TYPE p, TYPE q, TYPE r) +{ + return __builtin_vec_vsubeuqm (p, q, r); +} + +TYPE +do_subecuq (TYPE p, TYPE q, TYPE r) +{ + return __builtin_vec_vsubecuq (p, q, r); +} + +TYPE +do_subcuq (TYPE p, TYPE q) +{ + return __builtin_vec_vsubcuq (p, q); +} + +TYPE +do_subuqm (TYPE p, TYPE q) +{ + return __builtin_vec_vsubuqm (p, q); +} + +TYPE +do_zero (void) +{ + return (TYPE) { 0 }; +} + +TYPE +do_minus_one (void) +{ + return (TYPE) { -1 }; +} + +/* { dg-final { scan-assembler "vaddcuq" } } */ +/* { dg-final { scan-assembler "vadduqm" } } */ +/* { dg-final { scan-assembler "vaddecuq" } } */ +/* { dg-final { scan-assembler "vaddeuqm" } } */ +/* { dg-final { scan-assembler "vsubecuq" } } */ +/* { dg-final { scan-assembler "vsubeuqm" } } */ +/* { dg-final { scan-assembler "vsubcuq" } } */ +/* { dg-final { scan-assembler "vsubuqm" } } */ +/* { dg-final { scan-assembler-not "mtvsrd" } } */ +/* { dg-final { scan-assembler-not "mfvsrd" } } */ +/* { dg-final { scan-assembler-not "ori 2,2,0" } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c new file mode 100644 index 000000000..1064894dc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c @@ -0,0 +1,177 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +#include <stddef.h> +#include <stdlib.h> +#include <altivec.h> + +#ifdef DEBUG +#include <stdio.h> +#define UNUSED + +#ifdef __LITTLE_ENDIAN__ +#define HI_WORD 1 +#define LO_WORD 0 +#else +#define HI_WORD 0 +#define LO_WORD 1 +#endif + +#else +#define UNUSED __attribute__((__unused__)) +#endif + +#ifndef S_TYPE +#define S_TYPE __uint128_t +#endif + +#ifndef V_TYPE +#define V_TYPE vector S_TYPE +#endif + +static int compare (S_TYPE, V_TYPE, const char *, const char *) + __attribute__((__noinline__)); + +static int +compare (S_TYPE scalar, + V_TYPE vect, + const char *nl UNUSED, + const char *which UNUSED) +{ + unsigned long scalar_lo = (unsigned long) scalar; + unsigned long scalar_hi = (unsigned long) (scalar >> 64); + unsigned long vect_lo; + unsigned long vect_hi; + vector long long tmp; + int ret; + + __asm__ ("mfvsrd %0,%x3\n\t" + "xxpermdi %x2,%x3,%x3,3\n\t" + "mfvsrd %1,%x2" + : "=r" (vect_hi), + "=r" (vect_lo), + "=wa" (tmp) + : "wa" (vect)); + + ret = (scalar_lo != vect_lo) || (scalar_hi != vect_hi); + +#ifdef DEBUG + printf ("%s%s: 0x%.16lx %.16lx %s 0x%.16lx %.16lx\n", + nl, which, + scalar_hi, scalar_lo, + (ret) ? "!=" : "==", + vect_hi, vect_lo); + + fflush (stdout); +#endif + + return ret; +} + +static void convert_via_mem (V_TYPE *, S_TYPE *) + __attribute__((__noinline__)); + +static void +convert_via_mem (V_TYPE *v, S_TYPE *s) +{ + *v = (V_TYPE) { *s }; + __asm__ volatile ("nop" + : "+m" (*s), "+m" (*v) + : + : "memory"); + +} + + +/* Check if vadduqm returns the same values as normal 128-bit add. */ + +/* Values to add together. */ +const static struct { + unsigned long hi_1; + unsigned long lo_1; + unsigned long hi_2; + unsigned long lo_2; +} values[] = { + { 0x0000000000000000UL, 0xfffffffffffffffeUL, + 0x0000000000000000UL, 0x0000000000000002UL }, + { 0x0000000000000000UL, 0x0000000000000002UL, + 0x0000000000000000UL, 0xfffffffffffffffeUL }, + { 0xffffffffffffffffUL, 0xfffffffffffffffeUL, + 0x0000000000000000UL, 0x0000000000000002UL }, + { 0xfffffffffffffff2UL, 0xffffffffffffffffUL, + 0x0000000000000002UL, 0x0000000000000000UL }, + { 0x7fffffffffffffffUL, 0xfffffffffffffffeUL, + 0x0000000000000000UL, 0x0000000000000002UL }, + { 0x7ffffffffffffff2UL, 0xffffffffffffffffUL, + 0x0000000000000002UL, 0x0000000000000000UL }, +}; + +int +main (void) +{ + int reg_errors = 0; + int mem_errors = 0; + size_t i; + const char *nl = ""; + + for (i = 0; i < sizeof (values) / sizeof (values[0]); i++) + { + S_TYPE s_reg_res, s_reg_in1, s_reg_in2, s_mem_res, s_mem_in1, s_mem_in2; + V_TYPE v_reg_res, v_reg_in1, v_reg_in2, v_mem_res, v_mem_in1, v_mem_in2; + + s_reg_in1 = ((((S_TYPE)values[i].hi_1 << 64)) + ((S_TYPE)values[i].lo_1)); + reg_errors += compare (s_reg_in1, (V_TYPE) { s_reg_in1 }, nl, "reg, in1"); + + s_reg_in2 = ((((S_TYPE)values[i].hi_2 << 64)) + ((S_TYPE)values[i].lo_2)); + reg_errors += compare (s_reg_in2, (V_TYPE) { s_reg_in2 }, "", "reg, in2"); + + s_reg_res = s_reg_in1 + s_reg_in2; + + v_reg_in1 = (V_TYPE) { s_reg_in1 }; + v_reg_in2 = (V_TYPE) { s_reg_in2 }; + v_reg_res = vec_vadduqm (v_reg_in1, v_reg_in2); + reg_errors += compare (s_reg_res, v_reg_res, "", "reg, res"); + + s_mem_in1 = s_reg_in1; + convert_via_mem (&v_mem_in1, &s_mem_in1); + mem_errors += compare (s_mem_in1, (V_TYPE) { s_mem_in1 }, "\n", "mem, in1"); + + s_mem_in2 = s_reg_in2; + convert_via_mem (&v_mem_in2, &s_mem_in2); + mem_errors += compare (s_mem_in2, (V_TYPE) { s_mem_in2 }, "", "mem, in2"); + + s_mem_res = s_mem_in1 + s_mem_in2; + v_mem_res = vec_vadduqm (v_mem_in1, v_mem_in2); + mem_errors += compare (s_mem_res, v_mem_res, "", "mem, res"); + + nl = "\n"; + } + +#ifdef DEBUG + putchar ('\n'); + + if (!reg_errors) + fputs ("no errors found on register operations\n", stdout); + else + printf ("%d error%s found on register operations\n", + reg_errors, + (reg_errors == 1) ? "s" : ""); + + if (!mem_errors) + fputs ("no errors found on memory operations\n", stdout); + else + printf ("%d error%s found on memory operations\n", + mem_errors, + (mem_errors == 1) ? "s" : ""); + + fflush (stdout); +#endif + + if ((reg_errors + mem_errors) != 0) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c new file mode 100644 index 000000000..33f19991f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c @@ -0,0 +1,42 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf" } */ + +float load_sf (float *p) +{ + float f = *p; + __asm__ ("# reg %x0" : "+v" (f)); + return f; +} + +double load_df (double *p) +{ + double d = *p; + __asm__ ("# reg %x0" : "+v" (d)); + return d; +} + +double load_dfsf (float *p) +{ + double d = (double) *p; + __asm__ ("# reg %x0" : "+v" (d)); + return d; +} + +void store_sf (float *p, float f) +{ + __asm__ ("# reg %x0" : "+v" (f)); + *p = f; +} + +void store_df (double *p, double d) +{ + __asm__ ("# reg %x0" : "+v" (d)); + *p = d; +} + +/* { dg-final { scan-assembler "lxsspx" } } */ +/* { dg-final { scan-assembler "lxsdx" } } */ +/* { dg-final { scan-assembler "stxsspx" } } */ +/* { dg-final { scan-assembler "stxsdx" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c new file mode 100644 index 000000000..d1664985a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-O3 -mcpu=power8" } */ +/* { dg-final { scan-assembler "vbpermq" } } */ +/* { dg-final { scan-assembler "mfvsrd" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ + +#include <altivec.h> + +#if __LITTLE_ENDIAN__ +#define OFFSET 1 +#else +#define OFFSET 0 +#endif + +long foos (vector signed char a, vector signed char b) +{ + return vec_extract (vec_vbpermq (a, b), OFFSET); +} + +long foou (vector unsigned char a, vector unsigned char b) +{ + return vec_extract (vec_vbpermq (a, b), OFFSET); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c new file mode 100644 index 000000000..9a975bd6f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c @@ -0,0 +1,200 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#ifndef TYPE +#define TYPE long long +#endif + +#ifndef SIGN_TYPE +#define SIGN_TYPE signed TYPE +#endif + +#ifndef UNS_TYPE +#define UNS_TYPE unsigned TYPE +#endif + +#define ALIGN_ATTR __attribute__((__aligned__(ALIGN))) + +SIGN_TYPE sa[SIZE] ALIGN_ATTR; +SIGN_TYPE sb[SIZE] ALIGN_ATTR; +SIGN_TYPE sc[SIZE] ALIGN_ATTR; + +UNS_TYPE ua[SIZE] ALIGN_ATTR; +UNS_TYPE ub[SIZE] ALIGN_ATTR; +UNS_TYPE uc[SIZE] ALIGN_ATTR; + +void +sign_add (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = sb[i] + sc[i]; +} + +void +sign_sub (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = sb[i] - sc[i]; +} + +void +sign_shift_left (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = sb[i] << sc[i]; +} + +void +sign_shift_right (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = sb[i] >> sc[i]; +} + +void +sign_max (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] > sc[i]) ? sb[i] : sc[i]; +} + +void +sign_min (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] < sc[i]) ? sb[i] : sc[i]; +} + +void +sign_abs (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] < 0) ? -sb[i] : sb[i]; /* xor, vsubudm, vmaxsd. */ +} + +void +sign_eq (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] == sc[i]) ? val1 : val2; +} + +void +sign_lt (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] < sc[i]) ? val1 : val2; +} + +void +uns_add (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = ub[i] + uc[i]; +} + +void +uns_sub (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = ub[i] - uc[i]; +} + +void +uns_shift_left (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = ub[i] << uc[i]; +} + +void +uns_shift_right (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = ub[i] >> uc[i]; +} + +void +uns_max (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] > uc[i]) ? ub[i] : uc[i]; +} + +void +uns_min (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] < uc[i]) ? ub[i] : uc[i]; +} + +void +uns_eq (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] == uc[i]) ? val1 : val2; +} + +void +uns_lt (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] < uc[i]) ? val1 : val2; +} + +/* { dg-final { scan-assembler-times "\[\t \]vaddudm\[\t \]" 2 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vsubudm\[\t \]" 3 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vmaxsd\[\t \]" 2 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vmaxud\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vminsd\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vminud\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vsld\[\t \]" 2 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vsrad\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vsrd\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vcmpequd\[\t \]" 2 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vcmpgtsd\[\t \]" 1 } } */ +/* { dg-final { scan-assembler-times "\[\t \]vcmpgtud\[\t \]" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c new file mode 100644 index 000000000..8feba0a13 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c @@ -0,0 +1,30 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */ + +#include <stddef.h> + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#define ALIGN_ATTR __attribute__((__aligned__(ALIGN))) + +long long sign_ll[SIZE] ALIGN_ATTR; +int sign_i [SIZE] ALIGN_ATTR; + +void copy_int_to_long_long (void) +{ + size_t i; + + for (i = 0; i < SIZE; i++) + sign_ll[i] = sign_i[i]; +} + +/* { dg-final { scan-assembler "vupkhsw" } } */ +/* { dg-final { scan-assembler "vupklsw" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c new file mode 100644 index 000000000..570f2e599 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c @@ -0,0 +1,29 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model" } */ + +#include <stddef.h> + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#define ALIGN_ATTR __attribute__((__aligned__(ALIGN))) + +long long sign_ll[SIZE] ALIGN_ATTR; +int sign_i [SIZE] ALIGN_ATTR; + +void copy_long_long_to_int (void) +{ + size_t i; + + for (i = 0; i < SIZE; i++) + sign_i[i] = sign_ll[i]; +} + +/* { dg-final { scan-assembler "vpkudum" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c new file mode 100644 index 000000000..90df88680 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c @@ -0,0 +1,69 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#define ALIGN_ATTR __attribute__((__aligned__(ALIGN))) + +#define DO_BUILTIN(PREFIX, TYPE, CLZ, POPCNT) \ +TYPE PREFIX ## _a[SIZE] ALIGN_ATTR; \ +TYPE PREFIX ## _b[SIZE] ALIGN_ATTR; \ + \ +void \ +PREFIX ## _clz (void) \ +{ \ + unsigned long i; \ + \ + for (i = 0; i < SIZE; i++) \ + PREFIX ## _a[i] = CLZ (PREFIX ## _b[i]); \ +} \ + \ +void \ +PREFIX ## _popcnt (void) \ +{ \ + unsigned long i; \ + \ + for (i = 0; i < SIZE; i++) \ + PREFIX ## _a[i] = POPCNT (PREFIX ## _b[i]); \ +} + +#if !defined(DO_LONG_LONG) && !defined(DO_LONG) && !defined(DO_INT) && !defined(DO_SHORT) && !defined(DO_CHAR) +#define DO_INT 1 +#endif + +#if DO_LONG_LONG +/* At the moment, only int is auto vectorized. */ +DO_BUILTIN (sll, long long, __builtin_clzll, __builtin_popcountll) +DO_BUILTIN (ull, unsigned long long, __builtin_clzll, __builtin_popcountll) +#endif + +#if defined(_ARCH_PPC64) && DO_LONG +DO_BUILTIN (sl, long, __builtin_clzl, __builtin_popcountl) +DO_BUILTIN (ul, unsigned long, __builtin_clzl, __builtin_popcountl) +#endif + +#if DO_INT +DO_BUILTIN (si, int, __builtin_clz, __builtin_popcount) +DO_BUILTIN (ui, unsigned int, __builtin_clz, __builtin_popcount) +#endif + +#if DO_SHORT +DO_BUILTIN (ss, short, __builtin_clz, __builtin_popcount) +DO_BUILTIN (us, unsigned short, __builtin_clz, __builtin_popcount) +#endif + +#if DO_CHAR +DO_BUILTIN (sc, signed char, __builtin_clz, __builtin_popcount) +DO_BUILTIN (uc, unsigned char, __builtin_clz, __builtin_popcount) +#endif + +/* { dg-final { scan-assembler-times "vclzw" 2 } } */ +/* { dg-final { scan-assembler-times "vpopcntw" 2 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c new file mode 100644 index 000000000..17563bf47 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c @@ -0,0 +1,87 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#ifndef ATTR_ALIGN +#define ATTR_ALIGN __attribute__((__aligned__(ALIGN))) +#endif + +#ifndef TYPE +#define TYPE unsigned int +#endif + +TYPE in1 [SIZE] ATTR_ALIGN; +TYPE in2 [SIZE] ATTR_ALIGN; +TYPE eqv [SIZE] ATTR_ALIGN; +TYPE nand1[SIZE] ATTR_ALIGN; +TYPE nand2[SIZE] ATTR_ALIGN; +TYPE orc1 [SIZE] ATTR_ALIGN; +TYPE orc2 [SIZE] ATTR_ALIGN; + +void +do_eqv (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + { + eqv[i] = ~(in1[i] ^ in2[i]); + } +} + +void +do_nand1 (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + { + nand1[i] = ~(in1[i] & in2[i]); + } +} + +void +do_nand2 (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + { + nand2[i] = (~in1[i]) | (~in2[i]); + } +} + +void +do_orc1 (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + { + orc1[i] = (~in1[i]) | in2[i]; + } +} + +void +do_orc2 (void) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + { + orc1[i] = in1[i] | (~in2[i]); + } +} + +/* { dg-final { scan-assembler-times "xxleqv" 1 } } */ +/* { dg-final { scan-assembler-times "xxlnand" 2 } } */ +/* { dg-final { scan-assembler-times "xxlorc" 2 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack01.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack01.c new file mode 100644 index 000000000..efac4087c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack01.c @@ -0,0 +1,91 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +#include <stddef.h> +#include <stdlib.h> +#include <altivec.h> + +#ifdef DEBUG +#include <stdio.h> +#endif + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +volatile scalar_64_t one = 1; +volatile scalar_64_t two = 2; + +int +main (void) +{ + scalar_128_t a = (((scalar_128_t)one) << 64) | ((scalar_128_t)two); + vector_128_t v1 = (vector_128_t) { a }; + vector_128_t v2 = __builtin_pack_vector_int128 (one, two); + scalar_64_t x0 = __builtin_unpack_vector_int128 (v1, 0); + scalar_64_t x1 = __builtin_unpack_vector_int128 (v1, 1); + vector_128_t v3 = __builtin_pack_vector_int128 (x0, x1); + + size_t i; + union { + scalar_128_t i128; + vector_128_t v128; + scalar_64_t u64; + unsigned char uc[sizeof (scalar_128_t)]; + char c[sizeof (scalar_128_t)]; + } u, u2; + +#ifdef DEBUG + { + printf ("a = 0x"); + u.i128 = a; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv1 = 0x"); + u.v128 = v1; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv2 = 0x"); + u.v128 = v2; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv3 = 0x"); + u.v128 = v3; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx0 = 0x"); + u.u64 = x0; + for (i = 0; i < sizeof (scalar_64_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx1 = 0x"); + u.u64 = x1; + for (i = 0; i < sizeof (scalar_64_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\n"); + } +#endif + + u2.i128 = a; + u.v128 = v1; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + u.v128 = v2; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + u.v128 = v3; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack02.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack02.c new file mode 100644 index 000000000..584d6c292 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack02.c @@ -0,0 +1,95 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_fprs } */ +/* { dg-options "-O2 -mhard-float" } */ + +#include <stddef.h> +#include <stdlib.h> +#include <math.h> + +#ifdef DEBUG +#include <stdio.h> +#endif + +int +main (void) +{ + double high = pow (2.0, 60); + double low = 2.0; + long double a = ((long double)high) + ((long double)low); + double x0 = __builtin_unpack_longdouble (a, 0); + double x1 = __builtin_unpack_longdouble (a, 1); + long double b = __builtin_pack_longdouble (x0, x1); + +#ifdef DEBUG + { + size_t i; + union { + long double ld; + double d; + unsigned char uc[sizeof (long double)]; + char c[sizeof (long double)]; + } u; + + printf ("a = 0x"); + u.ld = a; + for (i = 0; i < sizeof (long double); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", a); + + printf ("b = 0x"); + u.ld = b; + for (i = 0; i < sizeof (long double); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", b); + + printf ("hi = 0x"); + u.d = high; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", high); + + printf ("lo = 0x"); + u.d = low; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", low); + + printf ("x0 = 0x"); + u.d = x0; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x0); + + printf ("x1 = 0x"); + u.d = x1; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x1); + } +#endif + + if (high != x0) + abort (); + + if (low != x1) + abort (); + + if (a != b) + abort (); + + if (x0 != high) + abort (); + + if (x1 != low) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack03.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack03.c new file mode 100644 index 000000000..dfaf2efa0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pack03.c @@ -0,0 +1,88 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target dfp_hw } */ +/* { dg-options "-O2 -mhard-dfp" } */ + +#include <stddef.h> +#include <stdlib.h> +#include <math.h> + +#ifdef DEBUG +#include <stdio.h> +#endif + +int +main (void) +{ + _Decimal128 one = (_Decimal128)1.0; + _Decimal128 two = (_Decimal128)2.0; + _Decimal128 ten = (_Decimal128)10.0; + _Decimal128 a = one; + _Decimal128 b; + _Decimal128 c; + unsigned long long x0; + unsigned long long x1; + size_t i; + + for (i = 0; i < 25; i++) + a *= ten; + + a += two; + + x0 = __builtin_unpack_dec128 (a, 0); + x1 = __builtin_unpack_dec128 (a, 1); + b = __builtin_pack_dec128 (x0, x1); + c = __builtin_dscliq (one, 25) + two; + +#ifdef DEBUG + { + union { + _Decimal128 d; + unsigned long long ull; + unsigned char uc[sizeof (_Decimal128)]; + } u; + + printf ("a = 0x"); + u.d = a; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)a); + + printf ("b = 0x"); + u.d = b; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)b); + + printf ("c = 0x"); + u.d = c; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)c); + + printf ("x0 = 0x"); + u.ull = x0; + for (i = 0; i < sizeof (unsigned long long); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx1 = 0x"); + u.ull = x1; + for (i = 0; i < sizeof (unsigned long long); i++) + printf ("%.2x", u.uc[i]); + + printf ("\n"); + } +#endif + + if (a != b) + abort (); + + if (a != c) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c index 8fcb7fd7f..9dc730e0d 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c @@ -89,8 +89,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif parm_t slot[100]; } stack_frame_t; diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c index a9883d9e3..e4825973b 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-2.c @@ -107,8 +107,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif parm_t slot[100]; } stack_frame_t; @@ -119,6 +121,12 @@ typedef union vector int v; } vector_int_t; +#ifdef __LITTLE_ENDIAN__ +#define MAKE_SLOT(x, y) ((long)x | ((long)y << 32)) +#else +#define MAKE_SLOT(x, y) ((long)y | ((long)x << 32)) +#endif + /* Paramter passing. s : gpr 3 v : vpr 2 @@ -226,8 +234,8 @@ fcevv (char *s, ...) sp = __builtin_frame_address(0); sp = sp->backchain; - if (sp->slot[2].l != 0x100000002ULL - || sp->slot[4].l != 0x500000006ULL) + if (sp->slot[2].l != MAKE_SLOT (1, 2) + || sp->slot[4].l != MAKE_SLOT (5, 6)) abort(); } @@ -268,8 +276,8 @@ fciievv (char *s, int i, int j, ...) sp = __builtin_frame_address(0); sp = sp->backchain; - if (sp->slot[4].l != 0x100000002ULL - || sp->slot[6].l != 0x500000006ULL) + if (sp->slot[4].l != MAKE_SLOT (1, 2) + || sp->slot[6].l != MAKE_SLOT (5, 6)) abort(); } @@ -296,8 +304,8 @@ fcvevv (char *s, vector int x, ...) sp = __builtin_frame_address(0); sp = sp->backchain; - if (sp->slot[4].l != 0x100000002ULL - || sp->slot[6].l != 0x500000006ULL) + if (sp->slot[4].l != MAKE_SLOT (1, 2) + || sp->slot[6].l != MAKE_SLOT (5, 6)) abort(); } diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c index eb54a653b..9bd5e28e0 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c @@ -33,15 +33,27 @@ reg_parms_t gparms; /* Wrapper to save the GPRs and FPRs and then jump to the real function. */ -#define WRAPPER(NAME) \ -__asm__ ("\t.globl\t" #NAME "_asm\n\t" \ +#if _CALL_ELF != 2 +#define FUNC_START(NAME) \ + "\t.globl\t" NAME "\n\t" \ ".section \".opd\",\"aw\"\n\t" \ ".align 3\n" \ - #NAME "_asm:\n\t" \ - ".quad .L." #NAME "_asm,.TOC.@tocbase,0\n\t" \ + NAME ":\n\t" \ + ".quad .L." NAME ",.TOC.@tocbase,0\n\t" \ + ".text\n\t" \ + ".type " NAME ", @function\n" \ + ".L." NAME ":\n\t" +#else +#define FUNC_START(NAME) \ + "\t.globl\t" NAME "\n\t" \ ".text\n\t" \ - ".type " #NAME "_asm, @function\n" \ - ".L." #NAME "_asm:\n\t" \ + NAME ":\n" \ + "0:\taddis 2,12,(.TOC.-0b)@ha\n\t" \ + "addi 2,2,(.TOC.-0b)@l\n\t" \ + ".localentry " NAME ",.-" NAME "\n\t" +#endif +#define WRAPPER(NAME) \ +__asm__ (FUNC_START (#NAME "_asm") \ "ld 11,gparms@got(2)\n\t" \ "std 3,0(11)\n\t" \ "std 4,8(11)\n\t" \ @@ -75,8 +87,10 @@ typedef struct sf long a1; long a2; long a3; +#if _CALL_ELF != 2 long a4; long a5; +#endif unsigned long slot[100]; } stack_frame_t; diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57744.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57744.c new file mode 100644 index 000000000..222fd6abd --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57744.c @@ -0,0 +1,39 @@ +/* { dg-do run { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +void abort (void); + +typedef unsigned U_16 __attribute__((mode(TI))); + +extern int libat_compare_exchange_16 (U_16 *, U_16 *, U_16, int, int) + __attribute__((__noinline__)); + +/* PR 57744: lqarx/stqcx needs even/odd register pairs. The assembler will + complain if the compiler gets an odd/even register pair. Create a function + which has the 16 byte compare and exchange instructions, but don't actually + execute it, so that we can detect these failures on older machines. */ + +int +libat_compare_exchange_16 (U_16 *mptr, U_16 *eptr, U_16 newval, + int smodel, int fmodel __attribute__((unused))) +{ + if (((smodel) == 0)) + return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 0, 0); + else if (((smodel) != 5)) + return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 4, 0); + else + return __atomic_compare_exchange_n (mptr, eptr, newval, 0, 5, 0); +} + +U_16 a = 1, b = 1, c = -2; +volatile int do_test = 0; + +int main (void) +{ + if (do_test && !libat_compare_exchange_16 (&a, &b, c, 0, 0)) + abort (); + + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-1.c new file mode 100644 index 000000000..dac305a01 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-options "-O2 -mcpu=power7 -mno-compat-align-parm" } */ + +/* Verify that vs is 16-byte aligned with -mcompat-align-parm. */ + +typedef float v4sf __attribute__ ((vector_size (16))); +struct s { long m; v4sf v; }; +long n; +v4sf ve; + +void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6, + long d7, long d8, long d9, struct s vs) { + n = vs.m; + ve = vs.v; +} + +/* { dg-final { scan-assembler "li \.\*,144" } } */ +/* { dg-final { scan-assembler "ld \.\*,128\\(1\\)" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-2.c new file mode 100644 index 000000000..39a24d9e4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr57949-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-options "-O2 -mcpu=power7" } */ + +/* Verify that vs is not 16-byte aligned in the absence of -mno-compat-align-parm. */ + +typedef float v4sf __attribute__ ((vector_size (16))); +struct s { long m; v4sf v; }; +long n; +v4sf ve; + +void pr57949 (long d1, long d2, long d3, long d4, long d5, long d6, + long d7, long d8, long d9, struct s vs) { + n = vs.m; + ve = vs.v; +} + +/* { dg-final { scan-assembler "ld .\*,136\\(1\\)" } } */ +/* { dg-final { scan-assembler "ld .\*,120\\(1\\)" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-1.c new file mode 100644 index 000000000..6f7838f8d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-1.c @@ -0,0 +1,78 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -m64 -O1" } */ + +enum typecode +{ + QIcode, QUcode, HIcode, HUcode, SIcode, SUcode, DIcode, DUcode, SFcode, + DFcode, XFcode, Pcode, Tcode, LAST_AND_UNUSED_TYPECODE +}; +enum bytecode_opcode +{ + neverneverland, drop, duplicate, over, setstackSI, adjstackSI, constQI, + constHI, constSI, constDI, constSF, constDF, constXF, constP, loadQI, + loadHI, loadSI, loadDI, loadSF, loadDF, loadXF, loadP, storeQI, storeHI, + storeSI, storeDI, storeSF, storeDF, storeXF, storeP, storeBLK, clearBLK, + addconstPSI, newlocalSI, localP, argP, convertQIHI, convertHISI, + convertSIDI, convertQISI, convertQUHU, convertHUSU, convertSUDU, + convertQUSU, convertSFDF, convertDFXF, convertHIQI, convertSIHI, + convertDISI, convertSIQI, convertSUQU, convertDFSF, convertXFDF, + convertSISF, convertSIDF, convertSIXF, convertSUSF, convertSUDF, + convertSUXF, convertDISF, convertDIDF, convertDIXF, convertDUSF, + convertDUDF, convertDUXF, convertSFSI, convertDFSI, convertXFSI, + convertSFSU, convertDFSU, convertXFSU, convertSFDI, convertDFDI, + convertXFDI, convertSFDU, convertDFDU, convertXFDU, convertPSI, + convertSIP, convertSIT, convertDIT, convertSFT, convertDFT, convertXFT, + convertPT, zxloadBI, sxloadBI, sstoreBI, addSI, addDI, addSF, addDF, + addXF, addPSI, subSI, subDI, subSF, subDF, subXF, subPP, mulSI, mulDI, + mulSU, mulDU, mulSF, mulDF, mulXF, divSI, divDI, divSU, divDU, divSF, + divDF, divXF, modSI, modDI, modSU, modDU, andSI, andDI, iorSI, iorDI, + xorSI, xorDI, lshiftSI, lshiftSU, lshiftDI, lshiftDU, rshiftSI, rshiftSU, + rshiftDI, rshiftDU, ltSI, ltSU, ltDI, ltDU, ltSF, ltDF, ltXF, ltP, leSI, + leSU, leDI, leDU, leSF, leDF, leXF, leP, geSI, geSU, geDI, geDU, geSF, + geDF, geXF, geP, gtSI, gtSU, gtDI, gtDU, gtSF, gtDF, gtXF, gtP, eqSI, + eqDI, eqSF, eqDF, eqXF, eqP, neSI, neDI, neSF, neDF, neXF, neP, negSI, + negDI, negSF, negDF, negXF, notSI, notDI, notT, predecQI, predecHI, + predecSI, predecDI, predecP, predecSF, predecDF, predecXF, predecBI, + preincQI, preincHI, preincSI, preincDI, preincP, preincSF, preincDF, + preincXF, preincBI, postdecQI, postdecHI, postdecSI, postdecDI, postdecP, + postdecSF, postdecDF, postdecXF, postdecBI, postincQI, postincHI, + postincSI, postincDI, postincP, postincSF, postincDF, postincXF, + postincBI, xjumpif, xjumpifnot, jump, jumpP, caseSI, caseSU, caseDI, + caseDU, call, returnP, ret, linenote, LAST_AND_UNUSED_OPCODE +}; +struct binary_operator +{ + enum bytecode_opcode opcode; + enum typecode arg0; +}; +static struct conversion_recipe +{ + unsigned char *opcodes; + int cost; +} +conversion_recipe[((int) LAST_AND_UNUSED_TYPECODE)][((int) + LAST_AND_UNUSED_TYPECODE)]; +static struct conversion_recipe +deduce_conversion (from, to) + enum typecode from, to; +{ + (conversion_recipe[(int) from][(int) to]. + opcodes ? 0 : (conversion_recipe[(int) from][(int) to] = + deduce_conversion (from, to), 0)); +} + +void +bc_expand_binary_operation (optab, resulttype, arg0, arg1) + struct binary_operator optab[]; +{ + int i, besti, cost, bestcost; + enum typecode resultcode, arg0code; + for (i = 0; optab[i].opcode != -1; ++i) + { + (conversion_recipe[(int) arg0code][(int) optab[i].arg0]. + opcodes ? 0 : (conversion_recipe[(int) arg0code][(int) optab[i].arg0] = + deduce_conversion (arg0code, optab[i].arg0), 0)); + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-2.c new file mode 100644 index 000000000..b70d2eed8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr58673-2.c @@ -0,0 +1,217 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -m64 -funroll-loops" } */ + +#include <stddef.h> +#include <stdlib.h> +#include <math.h> +#include <string.h> + +typedef long unsigned int size_t; +typedef struct _IO_FILE FILE; +typedef float real; +typedef real rvec[3]; +typedef real matrix[3][3]; +typedef real tensor[3][3]; +enum +{ + F_BONDS, F_G96BONDS, F_MORSE, F_CUBICBONDS, F_CONNBONDS, F_HARMONIC, + F_ANGLES, F_G96ANGLES, F_PDIHS, F_RBDIHS, F_IDIHS, F_LJ14, F_COUL14, F_LJ, + F_BHAM, F_LJLR, F_DISPCORR, F_SR, F_LR, F_WPOL, F_POSRES, F_DISRES, + F_DISRESVIOL, F_ORIRES, F_ORIRESDEV, F_ANGRES, F_ANGRESZ, F_SHAKE, + F_SHAKENC, F_SETTLE, F_DUMMY2, F_DUMMY3, F_DUMMY3FD, F_DUMMY3FAD, + F_DUMMY3OUT, F_DUMMY4FD, F_EQM, F_EPOT, F_EKIN, F_ETOT, F_TEMP, F_PRES, + F_DVDL, F_DVDLKIN, F_NRE +}; +typedef union +{ + struct + { + } + bham; + struct + { + real rA, krA, rB, krB; + } + harmonic; +} +t_iparams; +typedef struct +{ + t_iparams *iparams; +} +t_idef; +typedef struct +{ +} +t_inputrec; +typedef struct +{ +} +t_commrec; +typedef struct +{ +} +t_forcerec; +typedef struct +{ +} +t_mdatoms; +typedef struct +{ +} +t_filenm; +enum +{ + eoPres, eoEpot, eoVir, eoDist, eoMu, eoForce, eoFx, eoFy, eoFz, eoPx, eoPy, + eoPz, eoPolarizability, eoDipole, eoObsNR, eoMemory = + eoObsNR, eoInter, eoUseVirial, eoNR +}; +extern char *eoNames[eoNR]; +typedef struct +{ + int bPrint; +} +t_coupl_LJ; +typedef struct +{ + int eObs; + t_iparams xi; +} +t_coupl_iparams; +typedef struct +{ + real act_value[eoObsNR]; + real av_value[eoObsNR]; + real ref_value[eoObsNR]; + int bObsUsed[eoObsNR]; + int nLJ, nBU, nQ, nIP; + t_coupl_LJ *tcLJ; +} +t_coupl_rec; +static void +pr_ff (t_coupl_rec * tcr, real time, t_idef * idef, t_commrec * cr, int nfile, + t_filenm fnm[]) +{ + static FILE *prop; + static FILE **out = ((void *) 0); + static FILE **qq = ((void *) 0); + static FILE **ip = ((void *) 0); + char buf[256]; + char *leg[] = { + "C12", "C6" + }; + char **raleg; + int i, j, index; + if ((prop == ((void *) 0)) && (out == ((void *) 0)) && (qq == ((void *) 0)) + && (ip == ((void *) 0))) + { + for (i = j = 0; (i < eoObsNR); i++) + { + if (tcr->bObsUsed[i]) + { + raleg[j++] = + (__extension__ + (__builtin_constant_p (eoNames[i]) + && ((size_t) (const void *) ((eoNames[i]) + 1) - + (size_t) (const void *) (eoNames[i]) == + 1) ? (((const char *) (eoNames[i]))[0] == + '\0' ? (char *) calloc ((size_t) 1, + (size_t) 1) : ( + { + size_t + __len + = + strlen + (eoNames + [i]) + + + 1; + char + *__retval + = + (char + *) + malloc + (__len); + __retval;} + )): __strdup (eoNames[i]))); + raleg[j++] = + (__extension__ + (__builtin_constant_p (buf) + && ((size_t) (const void *) ((buf) + 1) - + (size_t) (const void *) (buf) == + 1) ? (((const char *) (buf))[0] == + '\0' ? (char *) calloc ((size_t) 1, + (size_t) 1) : ( + { + size_t + __len + = + strlen + (buf) + + + 1; + char + *__retval + = + (char + *) + malloc + (__len); + __retval;} + )): __strdup (buf))); + } + } + if (tcr->nLJ) + { + for (i = 0; (i < tcr->nLJ); i++) + { + if (tcr->tcLJ[i].bPrint) + { + xvgr_legend (out[i], (sizeof (leg) / sizeof ((leg)[0])), + leg); + } + } + } + } +} + +void +do_coupling (FILE * log, int nfile, t_filenm fnm[], t_coupl_rec * tcr, real t, + int step, real ener[], t_forcerec * fr, t_inputrec * ir, + int bMaster, t_mdatoms * md, t_idef * idef, real mu_aver, + int nmols, t_commrec * cr, matrix box, tensor virial, + tensor pres, rvec mu_tot, rvec x[], rvec f[], int bDoIt) +{ + int i, j, ati, atj, atnr2, type, ftype; + real deviation[eoObsNR], prdev[eoObsNR], epot0, dist, rmsf; + real ff6, ff12, ffa, ffb, ffc, ffq, factor, dt, mu_ind; + int bTest, bPrint; + t_coupl_iparams *tip; + if (bPrint) + { + pr_ff (tcr, t, idef, cr, nfile, fnm); + } + for (i = 0; (i < eoObsNR); i++) + { + deviation[i] = + calc_deviation (tcr->av_value[i], tcr->act_value[i], + tcr->ref_value[i]); + prdev[i] = tcr->ref_value[i] - tcr->act_value[i]; + } + if (bPrint) + pr_dev (tcr, t, prdev, cr, nfile, fnm); + for (i = 0; (i < atnr2); i++) + { + factor = dt * deviation[tip->eObs]; + switch (ftype) + { + case F_BONDS: + if (fabs (tip->xi.harmonic.krA) > 1.2e-38) + idef->iparams[type].harmonic.krA *= + (1 + factor / tip->xi.harmonic.krA); + } + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr59054.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr59054.c new file mode 100644 index 000000000..ab2ff6dea --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr59054.c @@ -0,0 +1,9 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O0 -m64" } */ + +long foo (void) { return 0; } + +/* { dg-final { scan-assembler-not "xxlor" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60137.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60137.c new file mode 100644 index 000000000..4777a5382 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60137.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */ + +/* target/60137, compiler got a 'could not split insn error'. */ + +extern int target_flags; +extern char fixed_regs[53]; +extern char call_used_regs[53]; + +void init_reg_sets_1(void) +{ + int i; + for (i = 0; i < 53; i++) + fixed_regs[i] = call_used_regs[i] = (call_used_regs[i] &((target_flags & 0x02000000) ? 2 : 1)) != 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60203.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60203.c new file mode 100644 index 000000000..6a4b4fa1d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60203.c @@ -0,0 +1,40 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3" } */ + +union u_ld { long double ld; double d[2]; }; + +long double +pack (double a, double aa) +{ + union u_ld u; + u.d[0] = a; + u.d[1] = aa; + return u.ld; +} + +double +unpack_0 (long double x) +{ + union u_ld u; + u.ld = x; + return u.d[0]; +} + +double +unpack_1 (long double x) +{ + union u_ld u; + u.ld = x; + return u.d[1]; +} + +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ +/* { dg-final { scan-assembler-not "lxsdx" } } */ +/* { dg-final { scan-assembler-not "stxsdx" } } */ +/* { dg-final { scan-assembler-not "mfvsrd" } } */ +/* { dg-final { scan-assembler-not "mtvsrd" } } */ + + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60735.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60735.c new file mode 100644 index 000000000..9bac30b51 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/pr60735.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ + +/* In PR60735, the type _Decimal64 generated an insn not found message. */ + +void +pr60735 (_Decimal64 *p, _Decimal64 *q) +{ + *p = *q; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/quad-atomic.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/quad-atomic.c new file mode 100644 index 000000000..6cf278852 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/quad-atomic.c @@ -0,0 +1,67 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +/* Test whether we get the right bits for quad word atomic instructions. */ +#include <stdlib.h> + +static __int128_t quad_fetch_and (__int128_t *, __int128_t value) __attribute__((__noinline__)); +static __int128_t quad_fetch_or (__int128_t *, __int128_t value) __attribute__((__noinline__)); +static __int128_t quad_fetch_add (__int128_t *, __int128_t value) __attribute__((__noinline__)); + +static __int128_t +quad_fetch_and (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_and (ptr, value, __ATOMIC_ACQUIRE); +} + +static __int128_t +quad_fetch_or (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_or (ptr, value, __ATOMIC_ACQUIRE); +} + +static __int128_t +quad_fetch_add (__int128_t *ptr, __int128_t value) +{ + return __atomic_fetch_add (ptr, value, __ATOMIC_ACQUIRE); +} + +int +main (void) +{ + __int128_t result; + __int128_t value; + __int128_t and_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL)); + __int128_t and_value = ((((__int128_t) 0xfffffffffffffff0ULL) << 64) | ((__int128_t) 0xfffffffffffffff0ULL)); + __int128_t and_exp = ((((__int128_t) 0x1234567890abcde0ULL) << 64) | ((__int128_t) 0xfedcba0987654320ULL)); + + __int128_t or_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL)); + __int128_t or_value = ((((__int128_t) 0x0000000000000010ULL) << 64) | ((__int128_t) 0x000000000000000eULL)); + __int128_t or_exp = ((((__int128_t) 0x1234567890abcdffULL) << 64) | ((__int128_t) 0xfedcba098765432fULL)); + + __int128_t add_input = ((((__int128_t) 0x1234567890abcdefULL) << 64) | ((__int128_t) 0xfedcba0987654321ULL)); + __int128_t add_value = ((((__int128_t) 0x0000000001000000ULL) << 64) | ((__int128_t) 0x0000001000000000ULL)); + __int128_t add_exp = ((((__int128_t) 0x1234567891abcdefULL) << 64) | ((__int128_t) 0xfedcba1987654321ULL)); + + + value = and_input; + result = quad_fetch_and (&value, and_value); + if (result != and_input || value != and_exp) + abort (); + + value = or_input; + result = quad_fetch_or (&value, or_value); + if (result != or_input || value != or_exp) + abort (); + + value = add_input; + result = quad_fetch_add (&value, add_value); + if (result != add_input || value != add_exp) + abort (); + + return 0; +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c new file mode 100644 index 000000000..1c78052e6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c @@ -0,0 +1,21 @@ +/* Test accuracy of long double division (glibc bug 15396). */ +/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */ +/* { dg-options "-mlong-double-128" } */ + +extern void exit (int); +extern void abort (void); + +volatile long double a = 0x1p-1024L; +volatile long double b = 0x3p-53L; +volatile long double r; +volatile long double expected = 0x1.55555555555555555555555555p-973L; + +int +main (void) +{ + r = a / b; + /* Allow error up to 2ulp. */ + if (__builtin_fabsl (r - expected) > 0x1p-1073L) + abort (); + exit (0); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c new file mode 100644 index 000000000..98f7615da --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power6 -mhard-dfp" } */ +/* { dg-final { scan-assembler-not "lfiwzx" } } */ +/* { dg-final { scan-assembler-times "lfd" 2 } } */ +/* { dg-final { scan-assembler-times "dctdp" 2 } } */ +/* { dg-final { scan-assembler-times "dadd" 1 } } */ +/* { dg-final { scan-assembler-times "drsp" 1 } } */ + +/* Test that for power6 we need to use a bounce buffer on the stack to load + SDmode variables because the power6 does not have a way to directly load + 32-bit values from memory. */ +_Decimal32 a; + +void inc_dec32 (void) +{ + a += (_Decimal32) 1.0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-vsx.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-vsx.c new file mode 100644 index 000000000..7a3c6d877 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/sd-vsx.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power7 -mhard-dfp" } */ +/* { dg-final { scan-assembler-times "lfiwzx" 2 } } */ +/* { dg-final { scan-assembler-times "stfiwx" 1 } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-times "dctdp" 2 } } */ +/* { dg-final { scan-assembler-times "dadd" 1 } } */ +/* { dg-final { scan-assembler-times "drsp" 1 } } */ + +/* Test that power7 can directly load/store SDmode variables without using a + bounce buffer. */ +_Decimal32 a; + +void inc_dec32 (void) +{ + a += (_Decimal32) 1.0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math1.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math1.c new file mode 100644 index 000000000..cdf925100 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times "addc" 1 } } */ +/* { dg-final { scan-assembler-times "adde" 1 } } */ +/* { dg-final { scan-assembler-times "subfc" 1 } } */ +/* { dg-final { scan-assembler-times "subfe" 1 } } */ +/* { dg-final { scan-assembler-not "subf " } } */ + +__int128 +add_128 (__int128 *ptr, __int128 val) +{ + return (*ptr + val); +} + +__int128 +sub_128 (__int128 *ptr, __int128 val) +{ + return (*ptr - val); +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math2.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math2.c new file mode 100644 index 000000000..b9c03300d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/ti_math2.c @@ -0,0 +1,73 @@ +/* { dg-do run { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2 -fno-inline" } */ + +union U { + __int128 i128; + struct { + long l1; + long l2; + } s; +}; + +union U u1,u2; + +__int128 +create_128 (long most_sig, long least_sig) +{ + union U u; + +#if __LITTLE_ENDIAN__ + u.s.l1 = least_sig; + u.s.l2 = most_sig; +#else + u.s.l1 = most_sig; + u.s.l2 = least_sig; +#endif + return u.i128; +} + +long most_sig (union U * u) +{ +#if __LITTLE_ENDIAN__ + return (*u).s.l2; +#else + return (*u).s.l1; +#endif +} + +long least_sig (union U * u) +{ +#if __LITTLE_ENDIAN__ + return (*u).s.l1; +#else + return (*u).s.l2; +#endif +} + +__int128 +add_128 (__int128 *ptr, __int128 val) +{ + return (*ptr + val); +} + +__int128 +sub_128 (__int128 *ptr, __int128 val) +{ + return (*ptr - val); +} + +int +main (void) +{ + /* Do a simple add/sub to make sure carry is happening between the dwords + and that dwords are in correct endian order. */ + u1.i128 = create_128 (1, -1); + u2.i128 = add_128 (&u1.i128, 1); + if ((most_sig (&u2) != 2) || (least_sig (&u2) != 0)) + __builtin_abort (); + u2.i128 = sub_128 (&u2.i128, 1); + if ((most_sig (&u2) != 1) || (least_sig (&u2) != -1)) + __builtin_abort (); + return 0; +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/powerpc/vsx-float0.c b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/vsx-float0.c new file mode 100644 index 000000000..7e4fea689 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/powerpc/vsx-float0.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-O2 -mcpu=power7" } */ +/* { dg-final { scan-assembler "xxlxor" } } */ + +/* Test that we generate xxlor to clear a SFmode register. */ + +float sum (float *p, unsigned long n) +{ + float sum = 0.0f; /* generate xxlxor instead of load */ + while (n-- > 0) + sum += *p++; + + return sum; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-1.c new file mode 100644 index 000000000..b9d6139b0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-1.c @@ -0,0 +1,20 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-10.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-10.c new file mode 100644 index 000000000..b91b3478e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-10.c @@ -0,0 +1,21 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mno-hotpatch --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch(2))) +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-11.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-11.c new file mode 100644 index 000000000..491677342 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-11.c @@ -0,0 +1,20 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch -mno-hotpatch --save-temps" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-not "nopr\t%r7" } } */ +/* { dg-final { scan-assembler-not "nop\t0" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-12.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-12.c new file mode 100644 index 000000000..b3e9427d4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-12.c @@ -0,0 +1,20 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mno-hotpatch -mhotpatch=1 --save-temps" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-2.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-2.c new file mode 100644 index 000000000..6cc29447d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-2.c @@ -0,0 +1,20 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-3.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-3.c new file mode 100644 index 000000000..9f0b2b756 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-3.c @@ -0,0 +1,20 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch=0 --save-temps" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-not "nopr\t%r7" } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-4.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-4.c new file mode 100644 index 000000000..c1dba20a3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-4.c @@ -0,0 +1,26 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +inline void hp1(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((always_inline)) +void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-not "nopr\t%r7" } } */ +/* { dg-final { scan-assembler-not "nop\t0" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-5.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-5.c new file mode 100644 index 000000000..ec267d65a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-5.c @@ -0,0 +1,21 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch)) +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 12 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-6.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-6.c new file mode 100644 index 000000000..5af090d03 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-6.c @@ -0,0 +1,21 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch(1))) +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-7.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-7.c new file mode 100644 index 000000000..e73a510b4 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-7.c @@ -0,0 +1,21 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch(0))) +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-not "nopr\t%r7" } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-8.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-8.c new file mode 100644 index 000000000..399aa7260 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-8.c @@ -0,0 +1,28 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch)) +inline void hp1(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch)) +__attribute__ ((always_inline)) +void hp2(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp2' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-not "nopr\t%r7" } } */ +/* { dg-final { scan-assembler-not "nop\t0" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-9.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-9.c new file mode 100644 index 000000000..5da675866 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-9.c @@ -0,0 +1,21 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch=1 --save-temps" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch(2))) +void hp1(void) +{ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} + +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "nopr\t%r7" 2 } } */ +/* { dg-final { scan-assembler-times "nop\t0" 1 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c new file mode 100644 index 000000000..45a2cc5dc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c @@ -0,0 +1,27 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +inline void hp2(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((always_inline)) +void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c new file mode 100644 index 000000000..5947f564f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c @@ -0,0 +1,27 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch=0" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +inline void hp2(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((always_inline)) +void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c new file mode 100644 index 000000000..e0c7f6f52 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c @@ -0,0 +1,27 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch=1" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +inline void hp2(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((always_inline)) +void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c new file mode 100644 index 000000000..d9f13425a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c @@ -0,0 +1,11 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -mhotpatch=-1" } */ + +int main (void) +{ + return 0; +} + +/* { dg-excess-errors "argument to '-mhotpatch=' should be a non-negative integer" } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c new file mode 100644 index 000000000..53f7eac9e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c @@ -0,0 +1,28 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -mhotpatch=1000000" } */ + +#include <stdio.h> + +void hp1(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(1000000))) +void hp2(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(1000001))) +void hp3(void) +{ /* { dg-error "requested 'hotpatch' attribute is not a non-negative integer constant or too large .max. 1000000." } */ + printf("hello, world!\n"); +} + +int main (void) +{ + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c new file mode 100644 index 000000000..cb10b66f0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c @@ -0,0 +1,11 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -mhotpatch=1000001" } */ + +int main (void) +{ + return 0; +} + +/* { dg-excess-errors "argument to '-mhotpatch=' is too large .max. 1000000." } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c new file mode 100644 index 000000000..98ccb42c0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c @@ -0,0 +1,68 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mno-hotpatch" } */ + +#include <stdio.h> + +__attribute__ ((hotpatch)) +void hp1(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch)) +inline void hp2(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch)) +__attribute__ ((always_inline)) +void hp3(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp3' with the 'always_inline' attribute is not hotpatchable" } */ + +__attribute__ ((hotpatch(0))) +void hp4(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(0))) +inline void hp5(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(0))) +__attribute__ ((always_inline)) +void hp6(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp6' with the 'always_inline' attribute is not hotpatchable" } */ + +__attribute__ ((hotpatch(1))) +void hp7(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(1))) +inline void hp8(void) +{ + printf("hello, world!\n"); +} + +__attribute__ ((hotpatch(1))) +__attribute__ ((always_inline)) +void hp9(void) /* { dg-warning "always_inline function might not be inlinable" } */ +{ + printf("hello, world!\n"); +} /* { dg-warning "function 'hp9' with the 'always_inline' attribute is not hotpatchable" } */ + +int main (void) +{ + return 0; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c new file mode 100644 index 000000000..489fc5dd9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/hotpatch-compile-8.c @@ -0,0 +1,23 @@ +/* Functional tests for the function hotpatching feature. */ + +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -mhotpatch" } */ + +#include <stdio.h> + +int hp1(void) +{ + int nested1(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */ + { return 1; } + + __attribute__ ((hotpatch)) + int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */ + { return 1; } + + return nested1() - nested2(); +} + +int main (void) +{ + return hp1(); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-1.c deleted file mode 100644 index 245ba2c7e..000000000 --- a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-1.c +++ /dev/null @@ -1,73 +0,0 @@ -/* This checks the availability of the low-level builtins introduced - for transactional execution. */ - -/* { dg-do compile } */ -/* { dg-options "-O3 -march=zEC12 -mzarch" } */ - -#include <stdint.h> -#include <htmintrin.h> - -int global = 0; -uint64_t g; -struct __htm_tdb global_tdb; - -int -foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64) -{ - - int cc; - int n; - - cc = __builtin_tbegin (0); - cc = __builtin_tbegin (tdb); - cc = __builtin_tbegin (&global_tdb); - - cc = __builtin_tbegin_nofloat (0); - cc = __builtin_tbegin_nofloat (&global_tdb); - - cc = __builtin_tbegin_retry (0, 42); - cc = __builtin_tbegin_retry (0, reg); - cc = __builtin_tbegin_retry (0, *mem); - cc = __builtin_tbegin_retry (0, global); - cc = __builtin_tbegin_retry (tdb, 42); - cc = __builtin_tbegin_retry (&global_tdb, 42); - - cc = __builtin_tbegin_retry_nofloat (0, 42); - cc = __builtin_tbegin_retry_nofloat (0, reg); - cc = __builtin_tbegin_retry_nofloat (0, *mem); - cc = __builtin_tbegin_retry_nofloat (0, global); - cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42); - - __builtin_tbeginc (); - - n = __builtin_tx_nesting_depth(); - - __builtin_non_tx_store(&g, 23); - __builtin_non_tx_store(mem64, 23); - __builtin_non_tx_store(&g, reg); - __builtin_non_tx_store(&g, *mem); - __builtin_non_tx_store(&g, global); - - __builtin_tabort (42 + 255); - __builtin_tabort (reg); - /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */ - __builtin_tabort (reg + 255); - __builtin_tabort (*mem); - __builtin_tabort (global); - /* Here global + 255 gets reloaded into a reg. Better would be to - just reload global or *mem and get the +255 for free as address - arithmetic. */ - __builtin_tabort (*mem + 255); - __builtin_tabort (global + 255); - - __builtin_tend(); - - __builtin_tx_assist (23); - __builtin_tx_assist (reg); - __builtin_tx_assist (*mem); - __builtin_tx_assist (global); -} - -/* Make sure the tdb NULL argument ends up as immediate value in the - instruction. */ -/* { dg-final { scan-assembler-times "tbegin\t0," 10 } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-1.c new file mode 100644 index 000000000..c90490faa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-1.c @@ -0,0 +1,1073 @@ +/* Functional tests of the htm __builtin_... macros. */ + +/* { dg-do run } */ +/* { dg-require-effective-target htm } */ +/* { dg-options "-O3 -march=zEC12 -mzarch" } */ + +/* ---------------------------- included header files ---------------------- */ + +#include <stdio.h> +#include <string.h> +#include <stdint.h> +#include <htmintrin.h> + +/* ---------------------------- local definitions -------------------------- */ + +#define DEFAULT_MAX_REPETITIONS 5 +#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1) +#define NUM_WARMUP_RUNS 10 + +/* ---------------------------- local macros ------------------------------- */ + +#define TEST_DF_REP(name) \ + { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM } +#define TEST_NO_REP(name) { #name, name, 1, 1 } + +/* ---------------------------- local types -------------------------------- */ + +typedef int (*test_func_t)(void); + +typedef struct +{ + const char *name; + test_func_t test_func; + int max_repetitions; + int required_quorum; +} test_table_entry_t; + +/* ---------------------------- local variables ---------------------------- */ + +__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256; +static struct __htm_tdb local_tdb; +static int do_dump_tdb = 0; + +/* ---------------------------- exported variables (globals) --------------- */ + +__attribute__ ((aligned(256))) struct +{ + float float_1; + float float_2; + float float_3; +} global = { 1.0, 2.5, 0.0 }; + +__attribute__ ((aligned(256))) struct +{ + volatile uint64_t c1; + volatile uint64_t c2; + volatile uint64_t c3; +} counters = { 0, 0, 0 }; + +/* ---------------------------- local helper functions --------------------- */ + +static void dump_tdb (struct __htm_tdb *tdb) +{ + unsigned char *p; + int i; + int j; + + if (do_dump_tdb == 0) + { + return; + } + p = (unsigned char *)tdb; + for (i = 0; i < 16; i++) + { + fprintf (stderr, "0x%02x ", i * 16); + for (j = 0; j < 16; j++) + { + fprintf (stderr, "%02x", (int)p[i * 16 + j]); + if (j < 15) + { + fprintf (stderr, " "); + } + if (j == 7) + { + fprintf (stderr, " "); + } + } + fprintf (stderr, "\n"); + } + + return; +} + +/* ---------------------------- local test functions ----------------------- */ + +/* Check values of the constants defined in htmintrin.h. */ +static int test_constants (void) +{ + if (_HTM_TBEGIN_STARTED != 0) + { + return 100 * _HTM_TBEGIN_STARTED + 1; + } + if (_HTM_TBEGIN_INDETERMINATE != 1) + { + return 100 * _HTM_TBEGIN_INDETERMINATE + 2; + } + if (_HTM_TBEGIN_TRANSIENT != 2) + { + return 100 * _HTM_TBEGIN_TRANSIENT + 3; + } + if (_HTM_TBEGIN_PERSISTENT != 3) + { + return 100 * _HTM_TBEGIN_PERSISTENT + 4; + } + + return 0; +} + +static int test_tbegin_ntstg_tend (void) +{ + int rc; + + counters.c1 = 0; + counters.c2 = 0; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + __builtin_non_tx_store ((uint64_t *)&counters.c1, 1); + counters.c2 = 2; + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 5; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 2) + { + return 100 * counters.c2 + 3; + } + } + else + { + return 100 * rc + 4; + } + + return 0; +} + +static int test_tbegin_ntstg_tabort (void) +{ + float f; + + counters.c1 = 0; + counters.c2 = 0; + f = 0; + if (__builtin_tbegin ((void *)0) == 0) + { + __builtin_non_tx_store ((uint64_t *)&counters.c1, 1); + counters.c2 = 2; + f = 1; + __builtin_tabort (256); + return 1; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 0) + { + return 100 * counters.c2 + 3; + } + if (f != 0) + { + return 100 * f + 4; + } + + return 0; +} + +static int test_tbegin_nofloat (void) +{ + int rc; + + counters.c1 = 0; + counters.c2 = 0; + if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0) + { + __builtin_non_tx_store ((uint64_t *)&counters.c1, 1); + counters.c2 = 2; + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 5; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 2) + { + return 100 * counters.c2 + 3; + } + } + else + { + return 100 * rc + 4; + } + + return 0; +} + +static int test_tbegin_retry (void) +{ + int rc; + + counters.c1 = 0; + counters.c2 = 0; + counters.c3 = 0; + if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0) + { + int do_abort; + + do_abort = (counters.c1 == 0) ? 1 : 0; + __builtin_non_tx_store ( + (uint64_t *)&counters.c1, counters.c1 + 1); + if (do_abort == 1) + { + __builtin_tabort (256); + } + counters.c2 = counters.c2 + 10; + __builtin_non_tx_store ((uint64_t *)&counters.c3, 3); + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 5; + } + if (counters.c1 != 2) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 10) + { + return 100 * counters.c2 + 3; + } + if (counters.c3 != 3) + { + return 100 * counters.c3 + 6; + } + } + else + { + return 100 * rc + 4; + } + + return 0; +} + +static int test_tbegin_retry_nofloat (void) +{ + int rc; + + counters.c1 = 0; + counters.c2 = 0; + counters.c3 = 0; + if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, 5)) == 0) + { + int do_abort; + + do_abort = (counters.c1 == 0) ? 1 : 0; + __builtin_non_tx_store ( + (uint64_t *)&counters.c1, counters.c1 + 1); + if (do_abort == 1) + { + __builtin_tabort (256); + } + counters.c2 = counters.c2 + 10; + __builtin_non_tx_store ((uint64_t *)&counters.c3, 3); + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 5; + } + if (counters.c1 != 2) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 10) + { + return 100 * counters.c2 + 3; + } + if (counters.c3 != 3) + { + return 100 * counters.c3 + 6; + } + } + else + { + return 100 * rc + 4; + } + + return 0; +} + +static int test_tbegin_aborts (void) +{ + float f; + int rc; + + f = 77; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + f = 88; + __builtin_tabort (256); + return 2; + } + else if (rc != 2) + { + return 3; + } + if (f != 77) + { + return 4; + } + f = 66; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + f = 99; + __builtin_tabort (257); + return 5; + } + else if (rc != 3) + { + return 100 * rc + 6; + } + if (f != 66) + { + return 100 * f + 7; + } + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + global.float_3 = global.float_1 + global.float_2; + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 8; + } + } + else + { + return 100 * rc + 9; + } + if (global.float_3 != global.float_1 + global.float_2) + { + return 100 * rc + 10; + } + + return 0; +} + +static __attribute__((noinline)) void indirect_abort(int abort_code) +{ + __builtin_tabort (abort_code); + + return; +} + +static int test_tbegin_indirect_aborts (void) +{ + float f; + int rc; + + f = 77; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + f = 88; + indirect_abort(256); + return 2; + } + else if (rc != 2) + { + return 100 * rc + 3; + } + if (f != 77) + { + return 100 * rc + 4; + } + f = 66; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + f = 99; + indirect_abort(257); + return 5; + } + else if (rc != 3) + { + return 100 * rc + 6; + } + if (f != 66) + { + return 100 * f + 7; + } + + return 0; +} + +static int test_tbegin_nofloat_aborts (void) +{ + int rc; + + if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0) + { + __builtin_tabort (256); + return 2; + } + if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0) + { + __builtin_tabort (257); + return 1005; + } + else if (rc != 3) + { + return 1000 * rc + 6; + } + + return 0; +} + +static int test_tbegin_nofloat_indirect_aborts (void) +{ + int rc; + + if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0) + { + indirect_abort (256); + return 2; + } + if ((rc = __builtin_tbegin_nofloat ((void *)0)) == 0) + { + indirect_abort (257); + return 1005; + } + else if (rc != 3) + { + return 1000 * rc + 6; + } + + return 0; +} + +static +int _test_tbegin_retry_aborts (int retries, uint64_t abort_code) +{ + int rc; + + counters.c1 = 0; + if ((rc = __builtin_tbegin_retry ((void *)0, retries)) == 0) + { + __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1); + __builtin_tabort (abort_code); + return 2; + } + else + { + if ((abort_code & 1) == 0) + { + if (rc != 2) + { + return 100 * rc + 2003; + } + else if (counters.c1 != (uint64_t)retries + 1) + { + return 1000 * counters.c1 + 100 * retries + 4; + } + } + else + { + if (rc != 3) + { + return 100 * rc + 3005; + } + else if (counters.c1 != 1) + { + return 1000 * counters.c1 + 100 * retries + 6; + } + } + } + + return 0; +} + +static int test_tbegin_retry_aborts (void) +{ + int rc; + int retries; + + for (retries = 1; retries <= 3; retries++) + { + rc = _test_tbegin_retry_aborts (retries, 256); + if (rc != 0) + { + return 10000 + rc; + } + } + for (retries = 1; retries <= 3; retries++) + { + rc = _test_tbegin_retry_aborts (retries, 257); + if (rc != 0) + { + return 20000 + rc; + } + } + if ((rc = __builtin_tbegin_retry ((void *)0, 5)) == 0) + { + global.float_3 = global.float_1 + global.float_2; + rc = __builtin_tend (); + if (rc != 0) + { + return 30000 + 100 * rc + 6; + } + } + else + { + return 30000 + 100 * rc + 7; + } + + return 0; +} + +static int _test_tbegin_retry_nofloat_aborts (int retries, uint64_t abort_code) +{ + int rc; + + counters.c1 = 0; + if ((rc = __builtin_tbegin_retry_nofloat ((void *)0, retries)) == 0) + { + __builtin_non_tx_store ((uint64_t *)&counters.c1, counters.c1 + 1); + __builtin_tabort (abort_code); + return 2; + } + else + { + if ((abort_code & 1) == 0) + { + if (rc != 2) + { + return 100 * rc + 2003; + } + else if (counters.c1 != (uint64_t)retries + 1) + { + return 1000 * counters.c1 + 100 * retries + 4; + } + } + else + { + if (rc != 3) + { + return 100 * rc + 3005; + } + else if (counters.c1 != 1) + { + return 1000 * counters.c1 + 100 * retries + 6; + } + } + } + + return 0; +} + +static int test_tbegin_retry_nofloat_aborts (void) +{ + int rc; + int retries; + + for (retries = 1; retries <= 3; retries++) + { + rc = _test_tbegin_retry_nofloat_aborts (retries, 256); + if (rc != 0) + { + return 10 * retries + rc; + } + } + for (retries = 1; retries <= 3; retries++) + { + rc = _test_tbegin_retry_nofloat_aborts (retries, 257); + if (rc != 0) + { + return 10000 + 10 * retries + rc; + } + } + + return 0; +} + +static int test_tbegin_tdb (void) +{ + int rc; + + local_tdb.format = 0; + if ((rc = __builtin_tbegin (&local_tdb)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 1; + } + if (local_tdb.format != 0) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 2; + } + } + else + { + return 100 * rc + 3; + } + local_tdb.format = 0; + if ((rc = __builtin_tbegin (&local_tdb)) == 0) + { + __builtin_tabort (257); + return 4; + } + else + { + if (rc != 3) + { + return 100 * rc + 5; + } + if (local_tdb.format != 1) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 6; + } + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin (&local_tdb256)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 1100 * rc + 1; + } + if (local_tdb256.format != 0) + { + dump_tdb (&local_tdb256); + return 1100 * local_tdb256.format + 2; + } + } + else + { + return 1100 * rc + 3; + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin (&local_tdb256)) == 0) + { + __builtin_tabort (257); + return 2004; + } + else + { + if (rc != 3) + { + return 2100 * rc + 5; + } + if (local_tdb256.format != 1) + { + dump_tdb (&local_tdb256); + return 2100 * local_tdb256.format + 6; + } + } + + return 0; +} + +static int test_tbegin_nofloat_tdb (void) +{ + int rc; + + local_tdb.format = 0; + if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 1; + } + if (local_tdb.format != 0) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 2; + } + } + else + { + return 3; + } + local_tdb.format = 0; + if ((rc = __builtin_tbegin_nofloat (&local_tdb)) == 0) + { + __builtin_tabort (257); + return 4; + } + else + { + if (rc != 3) + { + return 100 * rc + 5; + } + if (local_tdb.format != 1) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 6; + } + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 1100 * rc + 1; + } + if (local_tdb256.format != 0) + { + dump_tdb (&local_tdb256); + return 1100 * local_tdb256.format + 2; + } + } + else + { + return 1003; + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_nofloat (&local_tdb256)) == 0) + { + __builtin_tabort (257); + return 2004; + } + else + { + if (rc != 3) + { + return 2100 * rc + 5; + } + if (local_tdb256.format != 1) + { + dump_tdb (&local_tdb256); + return 2100 * local_tdb256.format + 6; + } + } + + return 0; +} + +static int test_tbegin_retry_tdb (void) +{ + int rc; + + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 1100 * rc + 1; + } + if (local_tdb256.format != 0) + { + dump_tdb (&local_tdb256); + return 1100 * local_tdb256.format + 2; + } + } + else + { + return 1003; + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_retry (&local_tdb256, 2)) == 0) + { + __builtin_tabort (257); + return 2004; + } + else + { + if (rc != 3) + { + return 2100 * rc + 5; + } + if (local_tdb256.format != 1) + { + dump_tdb (&local_tdb256); + return 2100 * local_tdb256.format + 6; + } + } + + return 0; +} + +static int test_tbegin_retry_nofloat_tdb (void) +{ + int rc; + + local_tdb.format = 0; + if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 100 * rc + 1; + } + if (local_tdb.format != 0) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 2; + } + } + else + { + return 100 * rc + 3; + } + local_tdb.format = 0; + if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb, 2)) == 0) + { + __builtin_tabort (257); + return 4; + } + else + { + if (rc != 3) + { + return 100 * rc + 5; + } + if (local_tdb.format != 1) + { + dump_tdb (&local_tdb); + return 100 * local_tdb.format + 6; + } + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0) + { + rc = __builtin_tend (); + if (rc != 0) + { + return 1100 * rc + 1; + } + if (local_tdb256.format != 0) + { + dump_tdb (&local_tdb256); + return 1100 * local_tdb256.format + 2; + } + } + else + { + return 1100 * rc + 3; + } + local_tdb256.format = 0; + if ((rc = __builtin_tbegin_retry_nofloat (&local_tdb256, 2)) == 0) + { + __builtin_tabort (257); + return 2004; + } + else + { + if (rc != 3) + { + return 2100 * rc + 5; + } + if (local_tdb256.format != 1) + { + dump_tdb (&local_tdb256); + return 2100 * local_tdb256.format + 6; + } + } + + return 0; +} + +static int test_etnd (void) +{ + int rc; + + counters.c1 = 0; + counters.c2 = 0; + counters.c3 = 0; + if ((rc = __builtin_tbegin ((void *)0)) == 0) + { + counters.c1 = __builtin_tx_nesting_depth (); + if (__builtin_tbegin ((void *)0) == 0) + { + counters.c2 = __builtin_tx_nesting_depth (); + if (__builtin_tbegin ((void *)0) == 0) + { + counters.c3 = __builtin_tx_nesting_depth (); + __builtin_tend (); + } + __builtin_tend (); + } + __builtin_tend (); + } + else + { + return 100 * rc + 1; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 2) + { + return 100 * counters.c2 + 3; + } + if (counters.c3 != 3) + { + return 100 * counters.c3 + 4; + } + + return 0; +} + +static int test_tbeginc (void) +{ + int rc; + + counters.c1 = 0; + __builtin_tbeginc (); + counters.c1 = 1; + rc = __builtin_tend (); + if (rc != 0) + { + return 10000 * rc + 1; + } + if (counters.c1 != 1) + { + return 100000 * counters.c1 + 3; + } + + return 0; +} + +/* ---------------------------- local testing framework functions ---------- */ + +static int run_one_test (const test_table_entry_t *test_entry) +{ + int do_print_passes; + int succeeded; + int rc; + int i; + + /* Warmup run to get all necessary data and instruction pages into the page + * tables. */ + { + int run; + + do_dump_tdb = 0; + for (run = 0; run < NUM_WARMUP_RUNS; run++) + { + test_entry->test_func (); + } + do_dump_tdb = 1; + } + do_print_passes = ( + test_entry->required_quorum != 1 || + test_entry->max_repetitions != 1); + printf ("RRR RUN %s\n", test_entry->name); + if (do_print_passes == 1) + { + printf ( + " (requires %d successful out of %d runs)\n", + test_entry->required_quorum, + test_entry->max_repetitions); + } + succeeded = 0; + rc = 0; + for (rc = 0, i = 0; i < test_entry->max_repetitions; i++) + { + if (do_print_passes == 1) + { + if (i == 0) + { + printf (" "); + } + else + { + printf (","); + } + } + rc = test_entry->test_func (); + if (rc == 0) + { + if (do_print_passes == 1) + { + printf (" success"); + } + succeeded++; + if (succeeded >= test_entry->required_quorum) + { + break; + } + } + else + { + printf (" failed (rc = %d)", rc); + } + } + if (do_print_passes == 1 || rc != 0) + { + printf ("\n"); + } + if (succeeded >= test_entry->required_quorum) + { + printf ("+++ OK %s\n", test_entry->name); + + return 0; + } + else + { + printf ("--- FAIL %s\n", test_entry->name); + + return (rc != 0) ? rc : -1; + } +} + +static int run_all_tests (const test_table_entry_t *test_table) +{ + const test_table_entry_t *test; + int rc; + + for ( + rc = 0, test = &test_table[0]; + test->test_func != NULL && rc == 0; test++) + { + rc = run_one_test (test); + } + + return rc; +} + +/* ---------------------------- interface functions ------------------------ */ + +int main (void) +{ + const test_table_entry_t test_table[] = { + TEST_NO_REP (test_constants), + TEST_DF_REP (test_tbegin_ntstg_tend), + TEST_DF_REP (test_tbegin_ntstg_tabort), + TEST_DF_REP (test_tbegin_nofloat), + TEST_NO_REP (test_tbegin_retry), + TEST_NO_REP (test_tbegin_retry_nofloat), + TEST_DF_REP (test_tbegin_aborts), + TEST_DF_REP (test_tbegin_indirect_aborts), + TEST_DF_REP (test_tbegin_nofloat_aborts), + TEST_DF_REP (test_tbegin_nofloat_indirect_aborts), + TEST_NO_REP (test_tbegin_retry_aborts), + TEST_NO_REP (test_tbegin_retry_nofloat_aborts), + TEST_DF_REP (test_tbegin_tdb), + TEST_DF_REP (test_tbegin_nofloat_tdb), + TEST_NO_REP (test_tbegin_retry_tdb), + TEST_NO_REP (test_tbegin_retry_nofloat_tdb), + TEST_DF_REP (test_etnd), + TEST_DF_REP (test_tbeginc), + { (void *)0, 0, 0 } + }; + + { + int rc; + + rc = run_all_tests (test_table); + + return rc; + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-2.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-2.c new file mode 100644 index 000000000..15b0d12ae --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-2.c @@ -0,0 +1,682 @@ +/* Functional tests of the htm __TM_... macros. */ + +/* { dg-do run } */ +/* { dg-require-effective-target htm } */ +/* { dg-options "-O3 -march=zEC12 -mzarch" } */ + +/* ---------------------------- included header files ---------------------- */ + +#include <stdio.h> +#include <string.h> +#include <inttypes.h> +#include <htmxlintrin.h> + +/* ---------------------------- local definitions -------------------------- */ + +#define DEFAULT_MAX_REPETITIONS 5 +#define DEFAULT_REQUIRED_QUORUM ((DEFAULT_MAX_REPETITIONS) - 1) +#define DEFAULT_ABORT_ADDRESS (0x12345678u) + +/* ---------------------------- local macros ------------------------------- */ + +#define TEST_DF_REP(name) \ + { #name, name, DEFAULT_MAX_REPETITIONS, DEFAULT_REQUIRED_QUORUM } +#define TEST_NO_REP(name) { #name, name, 1, 1 } + +/* ---------------------------- local types -------------------------------- */ + +typedef int (*test_func_t)(void); + +typedef struct +{ + const char *name; + test_func_t test_func; + int max_repetitions; + int required_quorum; +} test_table_entry_t; + +typedef enum +{ + ABORT_T_SYSTEM = 0, + ABORT_T_USER = 1, +} abort_user_t; + +typedef enum +{ + ABORT_T_NONE = 0, + ABORT_T_ILLEGAL, + ABORT_T_FOOTPRINT_EXCEEDED, + ABORT_T_NESTED_TOO_DEEP, + ABORT_T_CONFLICT, + + ABORT_T_INVALID_ABORT_CODE +} abort_t; + +/* ---------------------------- local variables ---------------------------- */ + +__attribute__ ((aligned(256))) static struct __htm_tdb local_tdb256; +static struct __htm_tdb local_tdb; + +static abort_t const abort_classes[] = +{ + ABORT_T_INVALID_ABORT_CODE, + ABORT_T_NONE, + ABORT_T_NONE, + ABORT_T_NONE, + + ABORT_T_ILLEGAL, + ABORT_T_NONE, + ABORT_T_NONE, + ABORT_T_FOOTPRINT_EXCEEDED, + + ABORT_T_FOOTPRINT_EXCEEDED, + ABORT_T_CONFLICT, + ABORT_T_CONFLICT, + ABORT_T_ILLEGAL, + + ABORT_T_NONE, + ABORT_T_NESTED_TOO_DEEP, + ABORT_T_NONE, + ABORT_T_NONE, + + ABORT_T_NONE +}; + +static size_t num_abort_classes = sizeof(abort_classes) / sizeof(abort_t); + +/* ---------------------------- exported variables (globals) --------------- */ + +int global_int = 0; +uint64_t global_u64 = 0; +float global_float_1 = 1.0; +float global_float_2 = 2.5; +float global_float_3 = 0.0; +__attribute__ ((aligned(256))) struct +{ + volatile uint64_t c1; + volatile uint64_t c2; + volatile uint64_t c3; +} counters = { 0, 0, 0 }; + +/* ---------------------------- local helper functions --------------------- */ + +static void dump_tdb(struct __htm_tdb *tdb) +{ + unsigned char *p; + int i; + int j; + + p = (unsigned char *)tdb; + for (i = 0; i < 16; i++) + { + fprintf(stderr, "0x%02x ", i * 16); + for (j = 0; j < 16; j++) + { + fprintf(stderr, "%02x", (int)p[i * 16 + j]); + if (j < 15) + { + fprintf(stderr, " "); + } + if (j == 7) + { + fprintf(stderr, " "); + } + } + fprintf(stderr, "\n"); + } + + return; +} + +static void make_fake_tdb(struct __htm_tdb *tdb) +{ + memset(tdb, 0, sizeof(*tdb)); + tdb->format = 1; + tdb->nesting_depth = 1; + tdb->atia = DEFAULT_ABORT_ADDRESS; + tdb->abort_code = 11; + + return; +} + +static int check_abort_code_in_tdb(struct __htm_tdb *tdb, uint64_t abort_code) +{ + long expect_rc; + long rc; + + if (abort_code != 0) + { + long addr; + + addr = __TM_failure_address(&local_tdb); + if (addr != DEFAULT_ABORT_ADDRESS) + { + return 11; + } + } + { + long long tdb_abort_code; + + tdb_abort_code = __TM_failure_code(tdb); + if ((uint64_t)tdb_abort_code != abort_code) + { + fprintf( + stderr, "tm_ac %" PRIu64 ", ac %" PRIu64 + ", tdb_ac %" PRIu64 "\n", + (uint64_t)tdb_abort_code, abort_code, + (uint64_t)tdb->abort_code); + return 10; + } + } + expect_rc = (abort_code >= 256) ? 1 : 0; + rc = __TM_is_user_abort(tdb); + if (rc != expect_rc) + { + fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc); + return 1; + } + { + unsigned char code; + + code = 0xffu; + rc = __TM_is_named_user_abort(tdb, &code); + if (rc != expect_rc) + { + fprintf( + stderr, "rc %ld, expect_rc %ld\n", rc, + expect_rc); + return 2; + } + if (expect_rc == 1 && code != abort_code - 256) + { + return 3; + } + } + if (abort_code > (uint64_t)num_abort_classes) + { + abort_code = (uint64_t)num_abort_classes; + } + expect_rc = (abort_classes[abort_code] == ABORT_T_ILLEGAL) ? 1 : 0; + rc = __TM_is_illegal(tdb); + if (rc != expect_rc) + { + dump_tdb(tdb); + fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc); + return 4; + } + expect_rc = + (abort_classes[abort_code] == ABORT_T_FOOTPRINT_EXCEEDED) ? + 1 : 0; + rc = __TM_is_footprint_exceeded(tdb); + if (rc != expect_rc) + { + dump_tdb(tdb); + fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc); + return 5; + } + expect_rc = + (abort_classes[abort_code] == ABORT_T_NESTED_TOO_DEEP) ? 1 : 0; + rc = __TM_is_nested_too_deep(tdb); + if (rc != expect_rc) + { + dump_tdb(tdb); + fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc); + return 6; + } + expect_rc = (abort_classes[abort_code] == ABORT_T_CONFLICT) ? 1 : 0; + rc = __TM_is_conflict(tdb); + if (rc != expect_rc) + { + dump_tdb(tdb); + fprintf(stderr, "rc %ld, expect_rc %ld\n", rc, expect_rc); + return 7; + } + + return 0; +} + +/* ---------------------------- local test functions ----------------------- */ + +/* Not a test; make sure that the involved global cachelines are reserved for + * writing. */ +static int init_cache(void) +{ + make_fake_tdb(&local_tdb); + make_fake_tdb(&local_tdb256); + global_int = 0; + global_u64 = 0; + global_float_1 = 1.0; + global_float_2 = 2.5; + global_float_3 = 0.0; + counters.c1 = 0; + counters.c2 = 0; + counters.c3 = 0; + + return 0; +} + +static int test_abort_classification(void) +{ + int i; + + make_fake_tdb(&local_tdb); + for (i = 0; i <= 256; i++) + { + int rc; + + local_tdb.abort_code = (uint64_t)i; + rc = check_abort_code_in_tdb(&local_tdb, (uint64_t)i); + if (rc != 0) + { + return 100 * i + rc; + } + } + + return 0; +} + +static int test_cc_classification(void) +{ + long rc; + + rc = __TM_is_failure_persistent(0); + if (rc != 0) + { + return 1; + } + rc = __TM_is_failure_persistent(1); + if (rc != 0) + { + return 2; + } + rc = __TM_is_failure_persistent(2); + if (rc != 0) + { + return 3; + } + rc = __TM_is_failure_persistent(3); + if (rc != 1) + { + return 4; + } + + return 0; +} + +static int test_tbegin_ntstg_tend(void) +{ + long rc; + + counters.c1 = 0; + counters.c2 = 0; + if ((rc = __TM_simple_begin()) == 0) + { + __TM_non_transactional_store((uint64_t *)&counters.c1, 1); + counters.c2 = 2; + rc = __TM_end(); + if (rc != 0) + { + return 100 * rc + 5; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 2) + { + return 100 * counters.c2 + 3; + } + } + else + { + return 100 * rc + 4; + } + + return 0; +} + +static int test_tbegin_ntstg_tabort(void) +{ + register float f; + + counters.c1 = 0; + counters.c2 = 0; + f = 0; + if (__TM_simple_begin() == 0) + { + __TM_non_transactional_store((uint64_t *)&counters.c1, 1); + counters.c2 = 2; + f = 1; + __TM_named_abort(0); + return 1; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 0) + { + return 100 * counters.c2 + 3; + } + if (f != 0) + { + return 100 * f + 4; + } + + return 0; +} + +static int test_tbegin_aborts(void) +{ + float f; + long rc; + + f = 77; + if ((rc = __TM_simple_begin()) == 0) + { + f = 88; + __TM_abort(); + return 2; + } + else if (rc != 2) + { + return 3; + } + if (f != 77) + { + return 4; + } + f = 66; + if ((rc = __TM_simple_begin()) == 0) + { + f = 99; + __TM_named_abort(3); + return 5; + } + else if (rc != 3) + { + return 100 * rc + 6; + } + if (f != 66) + { + return 100 * f + 7; + } + if ((rc = __TM_simple_begin()) == 0) + { + global_float_3 = global_float_1 + global_float_2; + rc = __TM_end(); + if (rc != 0) + { + return 100 * rc + 8; + } + } + else + { + return 100 * rc + 9; + } + if (global_float_3 != global_float_1 + global_float_2) + { + return 100 * rc + 10; + } + + return 0; +} + +static int test_tbegin_tdb(void) +{ + long rc; + + local_tdb.format = 0; + if ((rc = __TM_begin(&local_tdb)) == 0) + { + rc = __TM_end(); + if (rc != 0) + { + return 100 * rc + 1; + } + if (local_tdb.format != 0) + { + dump_tdb(&local_tdb); + return 100 * local_tdb.format + 2; + } + } + else + { + return 100 * rc + 3; + } + local_tdb.format = 0; + if ((rc = __TM_begin(&local_tdb)) == 0) + { + __TM_named_abort(1); + return 4; + } + else + { + if (rc != 3) + { + return 100 * rc + 5; + } + if (local_tdb.format != 1) + { + dump_tdb(&local_tdb); + return 100 * local_tdb.format + 6; + } + } + local_tdb256.format = 0; + if ((rc = __TM_begin(&local_tdb256)) == 0) + { + rc = __TM_end(); + if (rc != 0) + { + return 1100 * rc + 1; + } + if (local_tdb256.format != 0) + { + dump_tdb(&local_tdb256); + return 1100 * local_tdb256.format + 2; + } + } + else + { + return 1100 * rc + 3; + } +#if 1 /*!!!does not work*/ + local_tdb256.format = 0; + if ((rc = __TM_begin(&local_tdb256)) == 0) + { + __TM_named_abort(1); + return 2004; + } + else + { + if (rc != 3) + { + return 2100 * rc + 5; + } + if (local_tdb256.format != 1) + { + dump_tdb(&local_tdb256); + return 2100 * local_tdb256.format + 6; + } + } +#endif + + return 0; +} + +static int test_etnd(void) +{ + long rc; + + { + long nd; + + make_fake_tdb(&local_tdb); + local_tdb.nesting_depth = 0; + nd = __TM_nesting_depth(&local_tdb); + if (nd != 0) + { + return 1; + } + local_tdb.nesting_depth = 7; + nd = __TM_nesting_depth(&local_tdb); + if (nd != 7) + { + return 7; + } + local_tdb.format = 0; + nd = __TM_nesting_depth(&local_tdb); + if (nd != 0) + { + return 2; + } + } + counters.c1 = 0; + counters.c1 = 0; + counters.c2 = 0; + counters.c3 = 0; + if ((rc = __TM_simple_begin()) == 0) + { + counters.c1 = __TM_nesting_depth(0); + if (__TM_simple_begin() == 0) + { + counters.c2 = __TM_nesting_depth(0); + if (__TM_simple_begin() == 0) + { + counters.c3 = __TM_nesting_depth(0); + __TM_end(); + } + __TM_end(); + } + __TM_end(); + } + else + { + return 100 * rc + 1; + } + if (counters.c1 != 1) + { + return 100 * counters.c1 + 2; + } + if (counters.c2 != 2) + { + return 100 * counters.c2 + 3; + } + if (counters.c3 != 3) + { + return 100 * counters.c3 + 4; + } + + return 0; +} + +/* ---------------------------- local testing framework functions ---------- */ + +static int run_one_test(const test_table_entry_t *test_entry) +{ + int do_print_passes; + int succeeded; + int rc; + int i; + + do_print_passes = ( + test_entry->required_quorum != 1 || + test_entry->max_repetitions != 1); + printf("RRR RUN %s\n", test_entry->name); + if (do_print_passes == 1) + { + printf( + " (requires %d successful out of %d runs)\n", + test_entry->required_quorum, + test_entry->max_repetitions); + } + succeeded = 0; + rc = 0; + for (rc = 0, i = 0; i < test_entry->max_repetitions; i++) + { + if (do_print_passes == 1) + { + if (i == 0) + { + printf(" "); + } + else + { + printf(","); + } + } + rc = test_entry->test_func(); + if (rc == 0) + { + if (do_print_passes == 1) + { + printf(" success"); + } + succeeded++; + if (succeeded >= test_entry->required_quorum) + { + break; + } + } + else + { + printf(" failed (rc = %d)", rc); + } + } + if (do_print_passes == 1 || rc != 0) + { + printf("\n"); + } + if (succeeded >= test_entry->required_quorum) + { + printf("+++ OK %s\n", test_entry->name); + + return 0; + } + else + { + printf("--- FAIL %s\n", test_entry->name); + + return (rc != 0) ? rc : -1; + } +} + +static int run_all_tests(const test_table_entry_t *test_table) +{ + const test_table_entry_t *test; + int rc; + + for ( + rc = 0, test = &test_table[0]; + test->test_func != NULL && rc == 0; test++) + { + rc = run_one_test(test); + } + + return rc; +} + +/* ---------------------------- interface functions ------------------------ */ + +int main(void) +{ + const test_table_entry_t test_table[] = { + TEST_NO_REP(init_cache), + TEST_NO_REP(test_abort_classification), + TEST_NO_REP(test_cc_classification), + TEST_DF_REP(test_tbegin_ntstg_tend), + TEST_DF_REP(test_tbegin_ntstg_tabort), + TEST_DF_REP(test_tbegin_aborts), + TEST_DF_REP(test_tbegin_tdb), + TEST_DF_REP(test_etnd), + { (void *)0, 0, 0 } + }; + + { + int rc; + + rc = run_all_tests(test_table); + + return rc; + } +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c new file mode 100644 index 000000000..982a7483d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-1.c @@ -0,0 +1,164 @@ +/* This checks the availability of the low-level builtins introduced + for transactional execution. */ + +/* { dg-do compile } */ +/* { dg-options "-O3 -march=zEC12 -mzarch" } */ + +#include <stdint.h> +#include <htmintrin.h> + +int global = 0; +uint64_t g; +struct __htm_tdb global_tdb; + +int +foo (struct __htm_tdb* tdb, int reg, int *mem, uint64_t *mem64) +{ + + int cc; + int n; + + __builtin_tbegin ((void *)0); + __builtin_tbegin ((void *)-99999); + __builtin_tbegin ((void *)99999); + while (__builtin_tbegin ((void *)0) != 0) + { + } + cc = __builtin_tbegin ((void *)0x12345678); + cc = __builtin_tbegin (tdb); + cc = __builtin_tbegin (&global_tdb); + cc = __builtin_tbegin ((void *)(long)(reg + 0x12345678)); + cc = __builtin_tbegin ((void *)(long)(reg)); + + __builtin_tbegin_nofloat ((void *)0); + __builtin_tbegin_nofloat ((void *)-99999); + __builtin_tbegin_nofloat ((void *)99999); + cc = __builtin_tbegin_nofloat ((void *)0x12345678); + cc = __builtin_tbegin_nofloat (tdb); + cc = __builtin_tbegin_nofloat (&global_tdb); + cc = __builtin_tbegin_nofloat ((void *)(long)(reg + 0x12345678)); + cc = __builtin_tbegin_nofloat ((void *)(long)(reg)); + + __builtin_tbegin_retry ((void *)0, 0); + cc = __builtin_tbegin_retry ((void *)0, 1); + cc = __builtin_tbegin_retry ((void *)0, -1); + cc = __builtin_tbegin_retry ((void *)0, 42); + cc = __builtin_tbegin_retry ((void *)0, reg); + cc = __builtin_tbegin_retry ((void *)0, *mem); + cc = __builtin_tbegin_retry ((void *)0, global); + cc = __builtin_tbegin_retry (tdb, 42); + cc = __builtin_tbegin_retry (&global_tdb, 42); + cc = __builtin_tbegin_retry ((void *)0x12345678, global); + cc = __builtin_tbegin_retry ( + (void *)(long) (reg + 0x12345678), global + 1); + cc = __builtin_tbegin_retry ( + (void *)(long)(reg), global - 1); + + __builtin_tbegin_retry_nofloat ((void *)0, 0); + cc = __builtin_tbegin_retry_nofloat ((void *)0, 1); + cc = __builtin_tbegin_retry_nofloat ((void *)0, -1); + cc = __builtin_tbegin_retry_nofloat ((void *)0, 42); + cc = __builtin_tbegin_retry_nofloat ((void *)0, reg); + cc = __builtin_tbegin_retry_nofloat ((void *)0, *mem); + cc = __builtin_tbegin_retry_nofloat ((void *)0, global); + cc = __builtin_tbegin_retry_nofloat (tdb, 42); + cc = __builtin_tbegin_retry_nofloat (&global_tdb, 42); + cc = __builtin_tbegin_retry_nofloat ((void *)0x12345678, global); + cc = __builtin_tbegin_retry_nofloat ( + (void *)(long) (reg + 0x12345678), global + 1); + cc = __builtin_tbegin_retry_nofloat ( + (void *)(long)(reg), global - 1); + + __builtin_tbeginc (); + + __builtin_tx_nesting_depth (); + n = __builtin_tx_nesting_depth (); + + __builtin_non_tx_store (mem64, 0); + { + const uint64_t val_var = 0x1122334455667788; + + __builtin_non_tx_store (mem64, val_var); + } + __builtin_non_tx_store (mem64, (uint64_t)reg); + __builtin_non_tx_store (mem64, g); + __builtin_non_tx_store ((uint64_t *)0, 0); + __builtin_non_tx_store ((uint64_t *)0x12345678, 0); + __builtin_non_tx_store (&g, 23); + __builtin_non_tx_store (&g, reg); + __builtin_non_tx_store (&g, *mem); + __builtin_non_tx_store (&g, global); + + __builtin_tend(); + + __builtin_tx_assist (0); + __builtin_tx_assist (1); + __builtin_tx_assist (reg); + __builtin_tx_assist (*mem); + __builtin_tx_assist (global); +} + +/* The taborts must go into separate function since they are + "noreturn". */ + +void +tabort1 () +{ + __builtin_tabort (256); +} + +void +tabort2 (int reg) +{ + __builtin_tabort (reg); +} + +void +tabort3 (int reg) +{ + /* { dg-final { scan-assembler-times "tabort\t255" 1 } } */ + __builtin_tabort (reg + 255); +} + +void +tabort4 (int *mem) +{ + __builtin_tabort (*mem); +} + +void +tabort5 () +{ + __builtin_tabort (global); +} + +void +tabort6 (int *mem) +{ + /* Here global + 255 gets reloaded into a reg. Better would be to + just reload global or *mem and get the +255 for free as address + arithmetic. */ + __builtin_tabort (*mem + 255); +} + +void +tabort7 () +{ + __builtin_tabort (global + 255); +} + +void +tabort8 () +{ + __builtin_tabort (-1); +} + + +/* Make sure the tdb NULL argument ends up as immediate value in the + instruction. */ +/* { dg-final { scan-assembler-times "tbegin\t0," 17 } } */ +/* { dg-final { scan-assembler-times "tbegin\t" 41 } } */ +/* Check number of occurences of certain instructions. */ +/* { dg-final { scan-assembler-times "tbeginc\t" 1 } } */ +/* { dg-final { scan-assembler-times "tabort\t" 8 } } */ +/* { dg-final { scan-assembler "ppa\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c new file mode 100644 index 000000000..67d76a6d3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=zEC12 -mzarch" } */ + +void must_not_compile1 (void) +{ + __builtin_tabort (0); /* { dg-error "Invalid transaction abort code:" } */ +} + +void must_not_compile2 (void) +{ + __builtin_tabort (255); /* { dg-error "Invalid transaction abort code:" } */ +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c index 77ceeb770..77ceeb770 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-xl-intrin-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-builtins-compile-3.c diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c index df7e2bac8..6022efb97 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c @@ -1,12 +1,50 @@ -/* { dg-do compile } */ -/* { dg-options "-O3 -march=zEC12 -mzarch" } */ +/* { dg-do run } */ +/* { dg-require-effective-target htm } */ +/* { dg-options "-O3 -march=zEC12 -mzarch --save-temps" } */ -int -foo () +/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin + instruction does not automatically preserves them. If the + transaction body is fully contained in a function the backend tries + after reload to get rid of the FPR save/restore operations + triggered by the clobbers. This testcase failed since the backend + was able to get rid of all FPR saves/restores and since these were + the only stack operations also of the entire stack space. So even + the save/restore of the stack pointer was omitted in the end. + However, since the frame layout has been fixed before, the prologue + still generated the stack pointer decrement making foo return with + a modified stack pointer. */ + +void abort(void); + +void __attribute__((noinline)) +foo (int a) +{ + if (__builtin_tbegin (0) == 0) + __builtin_tend (); +} + +#ifdef __s390x__ +#define GET_STACK_POINTER(SP) \ + asm volatile ("stg %%r15, %0" : "=QRST" (SP)); +#else +#define GET_STACK_POINTER(SP) \ + asm volatile ("st %%r15, %0" : "=QR" (SP)); +#endif + +int main(void) { - __builtin_tbegin_nofloat (0); - __builtin_tbegin_retry_nofloat (0, 42); + unsigned long new_sp, old_sp; + + GET_STACK_POINTER (old_sp); + foo(42); + GET_STACK_POINTER (new_sp); + + if (old_sp != new_sp) + abort (); + + return 0; } + /* Make sure no FPR saves/restores are emitted. */ -/* { dg-final { scan-assembler-not "std" } } */ -/* { dg-final { scan-assembler-not "ld" } } */ +/* { dg-final { scan-assembler-not "\tstd\t" } } */ +/* { dg-final { scan-assembler-not "\tld\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c deleted file mode 100644 index 59621a4c1..000000000 --- a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-2.c +++ /dev/null @@ -1,55 +0,0 @@ -/* { dg-do run } */ -/* { dg-options "-O3 -mhtm -Wa,-march=zEC12,-mzarch --save-temps" } */ - -/* __builtin_tbegin has to emit clobbers for all FPRs since the tbegin - instruction does not automatically preserves them. If the - transaction body is fully contained in a function the backend tries - after reload to get rid of the FPR save/restore operations - triggered by the clobbers. This testcase failed since the backend - was able to get rid of all FPR saves/restores and since these were - the only stack operations also of the entire stack space. So even - the save/restore of the stack pointer was omitted in the end. - However, since the frame layout has been fixed before, the prologue - still generated the stack pointer decrement making foo return with - a modified stack pointer. */ - -void abort(void); - -void __attribute__((noinline)) -foo (int a) -{ - /* This is just to prevent the tbegin code from actually being - executed. That way the test may even run on machines prior to - zEC12. */ - if (a == 42) - return; - - if (__builtin_tbegin (0) == 0) - __builtin_tend (); -} - -#ifdef __s390x__ -#define GET_STACK_POINTER(SP) \ - asm volatile ("stg %%r15, %0" : "=QRST" (SP)); -#else -#define GET_STACK_POINTER(SP) \ - asm volatile ("st %%r15, %0" : "=QR" (SP)); -#endif - -int main(void) -{ - unsigned long new_sp, old_sp; - - GET_STACK_POINTER (old_sp); - foo(42); - GET_STACK_POINTER (new_sp); - - if (old_sp != new_sp) - abort (); - - return 0; -} - -/* Make sure no FPR saves/restores are emitted. */ -/* { dg-final { scan-assembler-not "\tstd\t" } } */ -/* { dg-final { scan-assembler-not "\tld\t" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c new file mode 100644 index 000000000..df7e2bac8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/htm-nofloat-compile-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=zEC12 -mzarch" } */ + +int +foo () +{ + __builtin_tbegin_nofloat (0); + __builtin_tbegin_retry_nofloat (0, 42); +} +/* Make sure no FPR saves/restores are emitted. */ +/* { dg-final { scan-assembler-not "std" } } */ +/* { dg-final { scan-assembler-not "ld" } } */ diff --git a/gcc-4.8/gcc/testsuite/gcc.target/s390/s390.exp b/gcc-4.8/gcc/testsuite/gcc.target/s390/s390.exp index a4a6609cb..141c0eef2 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/s390/s390.exp +++ b/gcc-4.8/gcc/testsuite/gcc.target/s390/s390.exp @@ -24,6 +24,19 @@ if ![istarget s390*-*-*] then { # Load support procs. load_lib gcc-dg.exp +# Return 1 if htm (etnd - extract nesting depth) instructions are +# understood by the assembler and can be executed. +proc check_effective_target_htm { } { + if { ![check_runtime s390_check_htm [subst { + int main (void) + { + unsigned int nd; + asm ("etnd %0" : "=d" (nd)); + return nd; + } + }] "-march=zEC12 -mzarch" ] } { return 0 } else { return 1 } +} + # If a testcase doesn't have special options, use these. global DEFAULT_CFLAGS if ![info exists DEFAULT_CFLAGS] then { diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/allocate_class_3.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/allocate_class_3.f90 new file mode 100644 index 000000000..ddc7e2328 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/allocate_class_3.f90 @@ -0,0 +1,107 @@ +! { dg-do run } +! Tests the fix for PR59414, comment #3, in which the allocate +! expressions were not correctly being stripped to provide the +! vpointer as an lhs to the pointer assignment of the vptr from +! the SOURCE expression. +! +! Contributed by Antony Lewis <antony@cosmologist.info> +! +module ObjectLists + implicit none + + type :: t + integer :: i + end type + + type Object_array_pointer + class(t), pointer :: p(:) + end type + +contains + + subroutine AddArray1 (P, Pt) + class(t) :: P(:) + class(Object_array_pointer) :: Pt + + select type (Pt) + class is (Object_array_pointer) + if (associated (Pt%P)) deallocate (Pt%P) + allocate(Pt%P(1:SIZE(P)), source=P) + end select + end subroutine + + subroutine AddArray2 (P, Pt) + class(t) :: P(:) + class(Object_array_pointer) :: Pt + + select type (Pt) + type is (Object_array_pointer) + if (associated (Pt%P)) deallocate (Pt%P) + allocate(Pt%P(1:SIZE(P)), source=P) + end select + end subroutine + + subroutine AddArray3 (P, Pt) + class(t) :: P + class(Object_array_pointer) :: Pt + + select type (Pt) + class is (Object_array_pointer) + if (associated (Pt%P)) deallocate (Pt%P) + allocate(Pt%P(1:4), source=P) + end select + end subroutine + + subroutine AddArray4 (P, Pt) + type(t) :: P(:) + class(Object_array_pointer) :: Pt + + select type (Pt) + class is (Object_array_pointer) + if (associated (Pt%P)) deallocate (Pt%P) + allocate(Pt%P(1:SIZE(P)), source=P) + end select + end subroutine +end module + + use ObjectLists + type(Object_array_pointer), pointer :: Pt + class(t), pointer :: P(:) + + allocate (P(2), source = [t(1),t(2)]) + allocate (Pt, source = Object_array_pointer(NULL())) + call AddArray1 (P, Pt) + select type (x => Pt%p) + type is (t) + if (any (x%i .ne. [1,2])) call abort + end select + deallocate (P) + deallocate (pt) + + allocate (P(3), source = [t(3),t(4),t(5)]) + allocate (Pt, source = Object_array_pointer(NULL())) + call AddArray2 (P, Pt) + select type (x => Pt%p) + type is (t) + if (any (x%i .ne. [3,4,5])) call abort + end select + deallocate (P) + deallocate (pt) + + allocate (Pt, source = Object_array_pointer(NULL())) + call AddArray3 (t(6), Pt) + select type (x => Pt%p) + type is (t) + if (any (x%i .ne. [6,6,6,6])) call abort + end select + deallocate (pt) + + allocate (Pt, source = Object_array_pointer(NULL())) + call AddArray4 ([t(7), t(8)], Pt) + select type (x => Pt%p) + type is (t) + if (any (x%i .ne. [7,8])) call abort + end select + deallocate (pt) + end + diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/arrayio_13.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/arrayio_13.f90 new file mode 100644 index 000000000..92a856bc8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/arrayio_13.f90 @@ -0,0 +1,14 @@ +! { dg-do run } +! PR60810 Bogus end-of-file +program readstrlist + character(len=80), dimension(2) :: ver + integer :: a, b, c + a = 1 + b = 2 + c = 3 + ver(1) = '285 383' + ver(2) = '985' + read( ver, *) a, b, c + if (a /= 285 .or. b /= 383 .or. c /= 985) call abort + !write ( *, *) a, b, c +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/constructor_9.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/constructor_9.f90 new file mode 100644 index 000000000..519670303 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/constructor_9.f90 @@ -0,0 +1,22 @@ +! { dg-do compile } +! { dg-options "-Wall" } +! +! PR 58471: [4.8/4.9 Regression] ICE on invalid with missing type constructor and -Wall +! +! Contributed by Andrew Benson <abensonca@gmail.com> + +module cf + implicit none + type :: cfmde + end type + interface cfmde + module procedure mdedc ! { dg-error "is neither function nor subroutine" } + end interface +contains + subroutine cfi() + type(cfmde), pointer :: cfd + cfd=cfmde() ! { dg-error "Can't convert" } + end subroutine +end module + +! { dg-final { cleanup-modules "cf" } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/default_initialization_7.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/default_initialization_7.f90 new file mode 100644 index 000000000..fc8be98b1 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/default_initialization_7.f90 @@ -0,0 +1,22 @@ +! { dg-do compile } +! +! PR fortran/57033 +! ICE on a structure constructor of an extended derived type whose parent +! type last component has a default initializer +! +! Contributed by Tilo Schwarz <tilo@tilo-schwarz.de> + +program ice + +type m + integer i + logical :: f = .false. +end type m + +type, extends(m) :: me +end type me + +type(me) meo + +meo = me(1) ! ICE +end program ice diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 new file mode 100644 index 000000000..7421c4c0f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 @@ -0,0 +1,27 @@ +! { dg-do run } +! +! PR fortran/58771 +! +! Contributed by Vittorio Secca <zeccav@gmail.com> +! +! ICEd on the write statement with f() because the derived type backend +! declaration not built. +! +module m + type t + integer(4) g + end type +end + +type(t) function f() result(ff) + use m + ff%g = 42 +end + + use m + character (20) :: line1, line2 + type(t) f + write (line1, *) f() + write (line2, *) 42_4 + if (line1 .ne. line2) call abort +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 new file mode 100644 index 000000000..d37e1f6a9 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/dynamic_dispatch_12.f90 @@ -0,0 +1,74 @@ +! { dg-do run } +! +! PR 59654: [4.8/4.9 Regression] [OOP] Broken function table with complex OO use case +! +! Contributed by Thomas Clune <Thomas.L.Clune@nasa.gov> + +module TestResult_mod + implicit none + + type TestResult + integer :: numRun = 0 + contains + procedure :: run + procedure, nopass :: getNumRun + end type + +contains + + subroutine run (this) + class (TestResult) :: this + this%numRun = this%numRun + 1 + end subroutine + + subroutine getNumRun() + end subroutine + +end module + + +module BaseTestRunner_mod + implicit none + + type :: BaseTestRunner + contains + procedure, nopass :: norun + end type + +contains + + function norun () result(result) + use TestResult_mod, only: TestResult + type (TestResult) :: result + end function + +end module + + +module TestRunner_mod + use BaseTestRunner_mod, only: BaseTestRunner + implicit none +end module + + +program main + use TestRunner_mod, only: BaseTestRunner + use TestResult_mod, only: TestResult + implicit none + + type (TestResult) :: result + + call runtest (result) + +contains + + subroutine runtest (result) + use TestResult_mod, only: TestResult + class (TestResult) :: result + call result%run() + if (result%numRun /= 1) call abort() + end subroutine + +end + +! { dg-final { cleanup-modules "TestResult_mod BaseTestRunner_mod TestRunner_mod" } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 new file mode 100644 index 000000000..8f574bf59 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 @@ -0,0 +1,39 @@ +! { dg-do run } +! +! PR fortran/59906 +! +! Contributed by H Anlauf <anlauf@gmx.de> +! +! Failed generate character scalar for scalarized loop for elemantal call. +! +program x + implicit none + call y('bbb') +contains + + subroutine y(str) + character(len=*), intent(in) :: str + character(len=len_trim(str)) :: str_aux + character(len=3) :: str3 = 'abc' + + str_aux = str + + ! Compiled but did not give correct result + if (any (str_cmp((/'aaa','bbb'/), str) .neqv. [.FALSE.,.TRUE.])) call abort + + ! Did not compile + if (any (str_cmp((/'bbb', 'aaa'/), str_aux) .neqv. [.TRUE.,.FALSE.])) call abort + + ! Verify patch + if (any (str_cmp((/'bbb', 'aaa'/), str3) .neqv. [.FALSE.,.FALSE.])) call abort + if (any (str_cmp((/'bbb', 'aaa'/), 'aaa') .neqv. [.FALSE.,.TRUE.])) call abort + + end subroutine y + + elemental logical function str_cmp(str1, str2) + character(len=*), intent(in) :: str1 + character(len=*), intent(in) :: str2 + str_cmp = (str1 == str2) + end function str_cmp + +end program x diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/extends_15.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/extends_15.f90 new file mode 100644 index 000000000..06c31799a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/extends_15.f90 @@ -0,0 +1,16 @@ +! { dg-do compile } +! +! PR 58355: [4.7/4.8/4.9 Regression] [F03] ICE with TYPE, EXTENDS before parent TYPE defined +! +! Contributed by Andrew Benson <abensonca@gmail.com> + +module ct + public :: t1 + + type, extends(t1) :: t2 ! { dg-error "has not been previously defined" } + + type :: t1 + end type +end + +! { dg-final { cleanup-modules "ct" } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_en.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_en.f90 new file mode 100644 index 000000000..d0aed23d8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_en.f90 @@ -0,0 +1,186 @@ +! { dg-do run { target fd_truncate } } +! PR60128 Invalid outputs with EN descriptors +! Test case provided by Walt Brainerd. +program pr60128 +use ISO_FORTRAN_ENV + implicit none + integer, parameter :: j(size(real_kinds)+4)=[REAL_KINDS, [4, 4, 4, 4]] + logical :: l_skip(4) = .false. + integer :: i + integer :: n_tst = 0, n_cnt = 0, n_skip = 0 + character(len=20) :: s, s1 + + open (unit = 10, file = 'fmt_en.res') +! Check that the default rounding mode is to nearest and to even on tie. + do i=1,size(real_kinds) + if (i == 1) then + write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(1)), & + real(9.49999905,kind=j(1)), & + real(9.5,kind=j(1)), real(8.5,kind=j(1)) + write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(1)), & + real(98765.0,kind=j(1)) + else if (i == 2) then + write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(2)), & + real(9.49999905,kind=j(2)), & + real(9.5,kind=j(2)), real(8.5,kind=j(2)) + write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(2)), & + real(98765.0,kind=j(2)) + else if (i == 3) then + write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(3)), & + real(9.49999905,kind=j(3)), & + real(9.5,kind=j(3)), real(8.5,kind=j(3)) + write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(3)), & + real(98765.0,kind=j(3)) + else if (i == 4) then + write(s, '(2F4.1,2F4.0)') real(-9.49999905,kind=j(4)), & + real(9.49999905,kind=j(4)), & + real(9.5,kind=j(4)), real(8.5,kind=j(4)) + write(s1, '(3PE10.3,2PE10.3)') real(987350.,kind=j(4)), & + real(98765.0,kind=j(4)) + end if + if (s /= '-9.5 9.5 10. 8.' .or. s1 /= ' 987.4E+03 98.76E+03') then + l_skip(i) = .true. +! print "('Unsupported rounding for real(',i0,')')", j(i) + end if + end do + + +! Original test. + call checkfmt("(en15.2)", -.44444, " -444.44E-03") + +! Test for the bug in comment 6. + call checkfmt("(en15.0)", 1.0, " 1.E+00") + call checkfmt("(en15.0)", 1.00000012, " 1.E+00") + call checkfmt("(en15.0)", 0.99999994, " 1.E+00") + call checkfmt("(en15.0)", 10.0, " 10.E+00") + call checkfmt("(en15.0)", 10.0000010, " 10.E+00") + call checkfmt("(en15.0)", 9.99999905, " 10.E+00") + call checkfmt("(en15.0)", 100.0, " 100.E+00") + call checkfmt("(en15.0)", 100.000008, " 100.E+00") + call checkfmt("(en15.0)", 99.9999924, " 100.E+00") + call checkfmt("(en15.0)", 1000.0, " 1.E+03") + call checkfmt("(en15.0)", 1000.00006, " 1.E+03") + call checkfmt("(en15.0)", 999.999939, " 1.E+03") + call checkfmt("(en15.0)", 9.5, " 10.E+00") + call checkfmt("(en15.0)", 9.50000095, " 10.E+00") + call checkfmt("(en15.0)", 9.49999905, " 9.E+00") + call checkfmt("(en15.0)", 99.5, " 100.E+00") + call checkfmt("(en15.0)", 99.5000076, " 100.E+00") + call checkfmt("(en15.0)", 99.4999924, " 99.E+00") + call checkfmt("(en15.0)", 999.5, " 1.E+03") + call checkfmt("(en15.0)", 999.500061, " 1.E+03") + call checkfmt("(en15.0)", 999.499939, " 999.E+00") + call checkfmt("(en15.0)", 9500.0, " 10.E+03") + call checkfmt("(en15.0)", 9500.00098, " 10.E+03") + call checkfmt("(en15.0)", 9499.99902, " 9.E+03") + call checkfmt("(en15.1)", 9950.0, " 10.0E+03") + call checkfmt("(en15.2)", 9995.0, " 10.00E+03") + call checkfmt("(en15.3)", 9999.5, " 10.000E+03") + call checkfmt("(en15.1)", 9.5, " 9.5E+00") + call checkfmt("(en15.1)", 9.50000095, " 9.5E+00") + call checkfmt("(en15.1)", 9.49999905, " 9.5E+00") + call checkfmt("(en15.1)", 0.099951, " 100.0E-03") + call checkfmt("(en15.1)", 0.009951, " 10.0E-03") + call checkfmt("(en15.1)", 0.000999951," 1.0E-03") + + call checkfmt("(en15.0)", -1.0, " -1.E+00") + call checkfmt("(en15.0)", -1.00000012, " -1.E+00") + call checkfmt("(en15.0)", -0.99999994, " -1.E+00") + call checkfmt("(en15.0)", -10.0, " -10.E+00") + call checkfmt("(en15.0)", -10.0000010, " -10.E+00") + call checkfmt("(en15.0)", -9.99999905, " -10.E+00") + call checkfmt("(en15.0)", -100.0, " -100.E+00") + call checkfmt("(en15.0)", -100.000008, " -100.E+00") + call checkfmt("(en15.0)", -99.9999924, " -100.E+00") + call checkfmt("(en15.0)", -1000.0, " -1.E+03") + call checkfmt("(en15.0)", -1000.00006, " -1.E+03") + call checkfmt("(en15.0)", -999.999939, " -1.E+03") + call checkfmt("(en15.0)", -9.5, " -10.E+00") + call checkfmt("(en15.0)", -9.50000095, " -10.E+00") + call checkfmt("(en15.0)", -9.49999905, " -9.E+00") + call checkfmt("(en15.0)", -99.5, " -100.E+00") + call checkfmt("(en15.0)", -99.5000076, " -100.E+00") + call checkfmt("(en15.0)", -99.4999924, " -99.E+00") + call checkfmt("(en15.0)", -999.5, " -1.E+03") + call checkfmt("(en15.0)", -999.500061, " -1.E+03") + call checkfmt("(en15.0)", -999.499939, " -999.E+00") + call checkfmt("(en15.0)", -9500.0, " -10.E+03") + call checkfmt("(en15.0)", -9500.00098, " -10.E+03") + call checkfmt("(en15.0)", -9499.99902, " -9.E+03") + call checkfmt("(en15.1)", -9950.0, " -10.0E+03") + call checkfmt("(en15.2)", -9995.0, " -10.00E+03") + call checkfmt("(en15.3)", -9999.5, " -10.000E+03") + call checkfmt("(en15.1)", -9.5, " -9.5E+00") + call checkfmt("(en15.1)", -9.50000095, " -9.5E+00") + call checkfmt("(en15.1)", -9.49999905, " -9.5E+00") + call checkfmt("(en15.1)", -0.099951, " -100.0E-03") + call checkfmt("(en15.1)", -0.009951, " -10.0E-03") + call checkfmt("(en15.1)", -0.000999951," -1.0E-03") + + call checkfmt("(en15.1)", 987350., " 987.4E+03") + call checkfmt("(en15.2)", 98735., " 98.74E+03") + call checkfmt("(en15.3)", 9873.5, " 9.874E+03") + call checkfmt("(en15.1)", 987650., " 987.6E+03") + call checkfmt("(en15.2)", 98765., " 98.76E+03") + call checkfmt("(en15.3)", 9876.5, " 9.876E+03") + call checkfmt("(en15.1)", 3.125E-02, " 31.2E-03") + call checkfmt("(en15.1)", 9.375E-02, " 93.8E-03") + call checkfmt("(en15.2)", 1.5625E-02, " 15.62E-03") + call checkfmt("(en15.2)", 4.6875E-02, " 46.88E-03") + call checkfmt("(en15.3)", 7.8125E-03, " 7.812E-03") + call checkfmt("(en15.3)", 2.34375E-02, " 23.438E-03") + call checkfmt("(en15.3)", 9.765625E-04," 976.562E-06") + call checkfmt("(en15.6)", 2.9296875E-03," 2.929688E-03") + + call checkfmt("(en15.1)", -987350., " -987.4E+03") + call checkfmt("(en15.2)", -98735., " -98.74E+03") + call checkfmt("(en15.3)", -9873.5, " -9.874E+03") + call checkfmt("(en15.1)", -987650., " -987.6E+03") + call checkfmt("(en15.2)", -98765., " -98.76E+03") + call checkfmt("(en15.3)", -9876.5, " -9.876E+03") + call checkfmt("(en15.1)", -3.125E-02, " -31.2E-03") + call checkfmt("(en15.1)", -9.375E-02, " -93.8E-03") + call checkfmt("(en15.2)", -1.5625E-02, " -15.62E-03") + call checkfmt("(en15.2)", -4.6875E-02, " -46.88E-03") + call checkfmt("(en15.3)", -7.8125E-03, " -7.812E-03") + call checkfmt("(en15.3)", -2.34375E-02, " -23.438E-03") + call checkfmt("(en15.3)", -9.765625E-04," -976.562E-06") + call checkfmt("(en15.6)", -2.9296875E-03," -2.929688E-03") + + ! print *, n_tst, n_cnt, n_skip + if (n_cnt /= 0) call abort + if (all(.not. l_skip)) write (10, *) "All kinds rounded to nearest" + close (10) + +contains + subroutine checkfmt(fmt, x, cmp) + implicit none + integer :: i + character(len=*), intent(in) :: fmt + real, intent(in) :: x + character(len=*), intent(in) :: cmp + do i=1,size(real_kinds) + if (i == 1) then + write(s, fmt) real(x,kind=j(1)) + else if (i == 2) then + write(s, fmt) real(x,kind=j(2)) + else if (i == 3) then + write(s, fmt) real(x,kind=j(3)) + else if (i == 4) then + write(s, fmt) real(x,kind=j(4)) + end if + n_tst = n_tst + 1 + if (s /= cmp) then + if (l_skip(i)) then + n_skip = n_skip + 1 + else + print "(a,1x,a,' expected: ',1x,a)", fmt, s, cmp + n_cnt = n_cnt + 1 + end if + end if + end do + + end subroutine +end program +! { dg-final { scan-file fmt_en.res "All kinds rounded to nearest" { xfail { i?86-*-solaris2.9* hppa*-*-hpux* } } } } +! { dg-final { cleanup-saved-temps } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_g_1.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_g_1.f90 new file mode 100644 index 000000000..715df0dfc --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/fmt_g_1.f90 @@ -0,0 +1,11 @@ +! { dg-do run } +! PR59771 Cleanup handling of Gw.0 and Gw.0Ee format +! Test case prepared by Dominique d'Humieres <dominiq@lps.ens.fr> + PROGRAM FOO + character(len=60) :: buffer, buffer1 + + write (buffer ,'(6(1X,1PG9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0 + write (buffer1,'(6(1X,1PE9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0 + + if (buffer /= buffer1) call abort + end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/generic_28.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/generic_28.f90 new file mode 100644 index 000000000..5ddc9798f --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/generic_28.f90 @@ -0,0 +1,18 @@ +! { dg-do compile } +! +! PR 58998: [4.8/4.9 Regression] Generic interface problem with gfortran +! +! Contributed by Paul van Delst + + interface iargc + procedure iargc_8 + end interface + +contains + + integer(8) function iargc_8() + integer(4) iargc + iargc_8 = iargc() + end function + +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 new file mode 100644 index 000000000..e69c9eb49 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/gomp/pr59467.f90 @@ -0,0 +1,24 @@ +! PR libgomp/59467 +! { dg-do compile } +! { dg-options "-fopenmp" } + FUNCTION t() + INTEGER :: a, b, t + a = 0 + b = 0 + !$OMP PARALLEL REDUCTION(+:b) + !$OMP SINGLE ! { dg-error "is not threadprivate or private in outer context" } + !$OMP ATOMIC WRITE + a = 6 + !$OMP END SINGLE COPYPRIVATE (a) + b = a + !$OMP END PARALLEL + t = b + b = 0 + !$OMP PARALLEL REDUCTION(+:b) + !$OMP SINGLE + !$OMP ATOMIC WRITE + b = 6 + !$OMP END SINGLE COPYPRIVATE (b) + !$OMP END PARALLEL + t = t + b + END FUNCTION diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/graphite/pr59817.f b/gcc-4.8/gcc/testsuite/gfortran.dg/graphite/pr59817.f new file mode 100644 index 000000000..a9ee8f19d --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/graphite/pr59817.f @@ -0,0 +1,14 @@ +! { dg-do compile } +! { dg-options "-O2 -floop-interchange" } + SUBROUTINE PREPD(ICAST,ICAS,ICASX,ICAS1,ICAS2,NDET,NM,III,IMP, + * CASMIN) + LOGICAL CASMIN + DIMENSION ICAST(NDET,NM),IMP(NM) + IF(CASMIN) THEN + DO K=1,NDET + DO L=1,NM + IF(L.EQ.K-1) ICAST(K,L) = 1 + END DO + END DO + END IF + END SUBROUTINE diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/ichar_3.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/ichar_3.f90 new file mode 100644 index 000000000..d0f5c8b8c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/ichar_3.f90 @@ -0,0 +1,13 @@ +! { dg-do compile } +! +! PR fortran/59599 +! The call to ichar was triggering an ICE. +! +! Original testcase from Fran Martinez Fadrique <fmartinez@gmv.com> + +character(1) cpk(2) +integer res(2) +cpk = 'a' +res = ichar( cpk, kind=1 ) +print *, ichar( cpk, kind=1 ) +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 new file mode 100644 index 000000000..8563dd721 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/implicit_pure_4.f90 @@ -0,0 +1,22 @@ +! { dg-do compile } +! +! PR fortran/60543 +! PR fortran/60283 +! +module m +contains + REAL(8) FUNCTION random() + CALL RANDOM_NUMBER(random) + END FUNCTION random + REAL(8) FUNCTION random2() + block + block + block + CALL RANDOM_NUMBER(random2) + end block + end block + end block + END FUNCTION random2 +end module m + +! { dg-final { scan-module-absence "m" "IMPLICIT_PURE" } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/init_flag_12.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/init_flag_12.f90 new file mode 100644 index 000000000..5844398d5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/init_flag_12.f90 @@ -0,0 +1,13 @@ +! { dg-do compile } +! { dg-options "-fno-automatic -finit-local-zero" } +! +! PR 55907: [4.7/4.8/4.9 Regression] ICE with -fno-automatic -finit-local-zero +! +! Contributed by J.R. Garcia <garcia.espinosa.jr@gmail.com> + +subroutine cchaine (i) + implicit none + integer :: i + character(len=i) :: chaine + write(*,*) chaine +end subroutine diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/list_read_12.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/list_read_12.f90 new file mode 100644 index 000000000..811ef152a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/list_read_12.f90 @@ -0,0 +1,11 @@ +! { dg-do run } +! PR58324 Bogus end of file condition +integer :: i, ios +open(99, access='stream', form='unformatted') +write(99) "5 a" +close(99) + +open(99, access='sequential', form='formatted') +read(99, *, iostat=ios) i +if (ios /= 0) call abort +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 new file mode 100644 index 000000000..e12187985 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_0.f90 @@ -0,0 +1,16 @@ +! { dg-lto-do link } +program test + use iso_fortran_env + + interface + integer(int16) function bigendc16(x) bind(C) + import + integer(int16), intent(in) :: x + end function + end interface + + integer(int16) :: x16 = 12345 + x16 = bigendc16(x16) + print *,x16 +end program + diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_1.c b/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_1.c new file mode 100644 index 000000000..eddc569e6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/lto/pr60635_1.c @@ -0,0 +1,14 @@ +#include <stdint.h> +#include <stdbool.h> + +static bool littleendian=true; + +uint16_t bigendc16(union{uint16_t * n;uint8_t* b;}x){ + + if (!littleendian) return *x.n; + + uint16_t res = ((uint16_t)(x.b[1])<<0) | + ((uint16_t)(x.b[0])<<8); + return res; +} + diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/nan_7.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/nan_7.f90 index 12c7b3ce4..4c2f62eea 100644 --- a/gcc-4.8/gcc/testsuite/gfortran.dg/nan_7.f90 +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/nan_7.f90 @@ -2,6 +2,7 @@ ! { dg-options "-fno-range-check" } ! { dg-require-effective-target fortran_real_16 } ! { dg-require-effective-target fortran_integer_16 } +! { dg-skip-if "" { "powerpc*le-*-*" } { "*" } { "" } } ! PR47293 NAN not correctly read character(len=200) :: str real(16) :: r diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/null_5.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/null_5.f90 index 886a6a1ff..50b41c3e8 100644 --- a/gcc-4.8/gcc/testsuite/gfortran.dg/null_5.f90 +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/null_5.f90 @@ -34,7 +34,7 @@ subroutine test_PR34547_1 () end subroutine test_PR34547_1 subroutine test_PR34547_2 () - print *, null () ! { dg-error "in data transfer statement requires MOLD" } + print *, null () ! { dg-error "Invalid context" } end subroutine test_PR34547_2 subroutine test_PR34547_3 () diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/null_6.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/null_6.f90 index dd517cfa3..6b8f21e63 100644 --- a/gcc-4.8/gcc/testsuite/gfortran.dg/null_6.f90 +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/null_6.f90 @@ -30,5 +30,5 @@ end subroutine test_PR50375_2 subroutine test_PR34547_3 () integer, allocatable :: i(:) - print *, NULL(i) + print *, NULL(i) ! { dg-error "Invalid context for NULL" } end subroutine test_PR34547_3 diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/optional_class_1.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/optional_class_1.f90 new file mode 100644 index 000000000..589fc6023 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/optional_class_1.f90 @@ -0,0 +1,45 @@ +! { dg-do run } +! +! PR fortran/57445 +! +! Contributed by Tobias Burnus <burnus@gcc.gnu.org> +! +! Spurious assert was added at revision 192495 +! +module m + implicit none + type t + integer :: i + end type t +contains + subroutine opt(xa, xc, xaa, xca) + type(t), allocatable, intent(out), optional :: xa + class(t), allocatable, intent(out), optional :: xc + type(t), allocatable, intent(out), optional :: xaa(:) + class(t), allocatable, intent(out), optional :: xca(:) + if (present (xca)) call foo_opt(xca=xca) + end subroutine opt + subroutine foo_opt(xa, xc, xaa, xca) + type(t), allocatable, intent(out), optional :: xa + class(t), allocatable, intent(out), optional :: xc + type(t), allocatable, intent(out), optional :: xaa(:) + class(t), allocatable, intent(out), optional :: xca(:) + if (present (xca)) then + if (allocated (xca)) deallocate (xca) + allocate (xca(3), source = [t(9),t(99),t(999)]) + end if + end subroutine foo_opt +end module m + use m + class(t), allocatable :: xca(:) + allocate (xca(1), source = t(42)) + select type (xca) + type is (t) + if (any (xca%i .ne. [42])) call abort + end select + call opt (xca = xca) + select type (xca) + type is (t) + if (any (xca%i .ne. [9,99,999])) call abort + end select +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/pr52370.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/pr52370.f90 new file mode 100644 index 000000000..66a6fe2b8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/pr52370.f90 @@ -0,0 +1,21 @@ +! PR fortran/52370 +! { dg-do compile } +! { dg-options "-O1 -Wall" } + +module pr52370 +contains + subroutine foo(a,b) + real, intent(out) :: a + real, dimension(:), optional, intent(out) :: b + a=0.5 + if (present(b)) then + b=1.0 + end if + end subroutine foo +end module pr52370 + +program prg52370 + use pr52370 + real :: a + call foo(a) +end program prg52370 diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/pr59700.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/pr59700.f90 new file mode 100644 index 000000000..579d8a48c --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/pr59700.f90 @@ -0,0 +1,40 @@ +! { dg-do run } +! PR59700 Test case by Steve Kargl +program foo + + implicit none + + character(len=80) msg + integer, parameter :: fd = 10 + integer i1, i2, i3, i4 + real x1, x2, x3, x4 + complex c1, c2 + logical a + + open(unit=fd, status='scratch') + write(fd, '(A)') '1 2 3.4 q' + + rewind(fd) + msg = 'ok' + read(fd, *, err=10, iomsg=msg) i1, i2, i3, i4 +10 if (msg /= 'Bad integer for item 3 in list input') call abort + rewind(fd) + msg = 'ok' + read(fd, *, err=20, iomsg=msg) x1, x2, x3, x4 +20 if (msg /= 'Bad real number in item 4 of list input') call abort + rewind(fd) + msg = 'ok' + read(fd, *, err=30, iomsg=msg) i1, x2, x1, a +30 if (msg /= 'Bad logical value while reading item 4') call abort + rewind(fd) + read(fd, *, err=31, iomsg=msg) i1, x2, a, x1 +31 if (msg /= 'Bad repeat count in item 3 of list input') call abort + close(fd) + open(unit=fd, status='scratch') + write(fd, '(A)') '(1, 2) (3.4, q)' + rewind(fd) + msg = 'ok' + read(fd, *, err=40, iomsg=msg) c1, c2 +40 if (msg /= 'Bad floating point number for item 2') call abort + close(fd) +end program foo diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 new file mode 100644 index 000000000..b1f77a06e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_43.f90 @@ -0,0 +1,19 @@ +! { dg-do compile } +! +! PR 58099: [4.8/4.9 Regression] [F03] over-zealous procedure-pointer error checking +! +! Contributed by Daniel Price <daniel.price@monash.edu> + + implicit none + procedure(real), pointer :: wfunc + + wfunc => w_cubic + +contains + + pure real function w_cubic(q2) + real, intent(in) :: q2 + w_cubic = 0. + end function + +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 new file mode 100644 index 000000000..a506473ad --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_45.f90 @@ -0,0 +1,24 @@ +! { dg-do compile } +! +! PR fortran/49397 +! +! Valid per IR F08/0060 and F2008Corr2, C729 +! +Program m5 + Print *,f() +Contains + Subroutine s + Procedure(Real),Pointer :: p + Print *,g() + p => f ! (1) + Print *,p() + p => g ! (2) + Print *,p() + End Subroutine +End Program +Function f() + f = 1 +End Function +Function g() + g = 2 +End Function diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 new file mode 100644 index 000000000..2c05f59d8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_46.f90 @@ -0,0 +1,14 @@ +! { dg-do compile } +! +! PR fortran/49397 +! +! Invalid per IR F08/0060 and F2008Corr2, C729 +! + +! Print *,f() ! << Valid when uncommented +Contains + Subroutine s + Procedure(Real),Pointer :: p + p => f ! { dg-error "Procedure pointer target 'f' at .1. must be either an intrinsic, host or use associated, referenced or have the EXTERNAL attribute" } + End Subroutine +End diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 new file mode 100644 index 000000000..2a71ca052 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/proc_ptr_comp_38.f90 @@ -0,0 +1,12 @@ +! { dg-do compile } +! +! PR fortran/58803 +! +! Contributed by Vittorio Zecca +! +! Was before ICEing due to a double free +! + type t + procedure(real), pointer, nopass :: f1, f2 + end type + end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/reshape_6.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/reshape_6.f90 new file mode 100644 index 000000000..149f31efe --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/reshape_6.f90 @@ -0,0 +1,19 @@ +! { dg-do compile } +! PR fortran/58989 +! +program test + + real(8), dimension(4,4) :: fluxes + real(8), dimension(2,2,2,2) :: f + integer, dimension(3) :: dmmy + integer, parameter :: indx(4)=(/2,2,2,2/) + + fluxes = 1 + + dmmy = (/2,2,2/) + + f = reshape(fluxes,(/dmmy,2/)) ! Caused an ICE + f = reshape(fluxes,(/2,2,2,2/)) ! Works as expected + f = reshape(fluxes,indx) ! Works as expected + +end program test diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/round_3.f08 b/gcc-4.8/gcc/testsuite/gfortran.dg/round_3.f08 index 8b03ce562..62da1eae6 100644 --- a/gcc-4.8/gcc/testsuite/gfortran.dg/round_3.f08 +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/round_3.f08 @@ -16,8 +16,33 @@ program pr48615 call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05") + call checkfmt("(RC,G10.2)", 99.5, " 0.10E+03") ! pr59774 + call checkfmt("(RC,G10.2)", 995., " 0.10E+04") ! pr59774 + call checkfmt("(RC,G10.3)", 999.5, " 0.100E+04") ! pr59774 + call checkfmt("(RC,G10.3)", 9995., " 0.100E+05") ! pr59774 + call checkfmt("(RU,G10.2)", .099, " 0.10 ") ! pr59774 + call checkfmt("(RC,G10.1)", .095, " 0.1 ") ! pr59774 + call checkfmt("(RU,G10.3)", .0999, " 0.100 ") ! pr59774 + call checkfmt("(RC,G10.2)", .0995, " 0.10 ") ! pr59774 + + call checkfmt("(RU,G9.3)", 891.1, " 892.") ! pr59836 + call checkfmt("(RD,G9.3)", -891.1, "-892.") ! pr59836 + + call checkfmt("(RU,F6.4)", 0.00006, "0.0001")! 0. + call checkfmt("(RU,F5.3)", 0.0007, "0.001") ! 0. + call checkfmt("(RU,F4.2)", 0.008, "0.01") ! 0. + call checkfmt("(RU,F3.1)", 0.09, "0.1") ! 0. + call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0. call checkfmt("(RD,F3.0)", -0.09, "-1.") ! -0. + call checkfmt("(RU,F2.0)", 0.9, "1.") ! pr59836 + call checkfmt("(RC,F2.0)", 0.4, "0.") ! pr59836 + call checkfmt("(RC,F2.0)", 0.5, "1.") ! pr59836 + call checkfmt("(RC,F2.0)", 0.6, "1.") ! pr59836 + call checkfmt("(RD,F3.0)", -0.9, "-1.") ! pr59836 + call checkfmt("(RC,F3.0)", -0.4, "-0.") ! pr59836 + call checkfmt("(RC,F3.0)", -0.5, "-1.") ! pr59836 + call checkfmt("(RC,F3.0)", -0.6, "-1.") ! pr59836 call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3. call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3. call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001 diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/shape_8.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/shape_8.f90 new file mode 100644 index 000000000..edeb5fd8e --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/shape_8.f90 @@ -0,0 +1,10 @@ +! { dg-do compile } +! +! PR 60450: [4.7/4.8 Regression] ICE with SHAPE intrinsic +! +! Contributed by Dave Allured <dave.allured@noaa.gov> + + real, allocatable :: x(:,:) + allocate (x(3,2), source=99.) + print *, shape (x / 10.0) +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 new file mode 100644 index 000000000..84287b475 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 @@ -0,0 +1,22 @@ +! { dg-do compile } +! { dg-options "-ffrontend-optimize" } +! +! PR fortran/60341 +! An unguarded union access was wrongly enabling a frontend optimization on a +! string comparison, leading to an ICE. +! +! Original testcase from Steve Chapel <steve.chapel@a2pg.com>. +! Reduced by Steven G. Kargl <kargl@gcc.gnu.org>. +! + + subroutine modelg(ncm) + implicit none + integer, parameter :: pc = 30, pm = pc - 1 + integer i + character*4 catt(pm,2) + integer ncm,iatt(pm,pc) + do i=1,ncm + if (catt(i,1)//catt(i,2).eq.'central') exit + end do + iatt(i,4)=1 + end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 new file mode 100644 index 000000000..f71ffd9e8 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/typebound_generic_15.f90 @@ -0,0 +1,18 @@ +! { dg-do compile } +! +! PR 60231: [4.8/4.9 Regression] ICE on undefined generic +! +! Contributed by Antony Lewis <antony@cosmologist.info> + +module Objects + + Type TObjectList + contains + procedure :: Add1 ! { dg-error "must be a module procedure" } + procedure :: Add2 ! { dg-error "must be a module procedure" } + generic :: Add => Add1, Add2 ! { dg-error "are ambiguous" } + end Type + +end module + +! { dg-final { cleanup-modules "Objects" } } diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 new file mode 100644 index 000000000..1dfebdce3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/unlimited_polymorphic_15.f90 @@ -0,0 +1,17 @@ +! { dg-do compile } +! +! PR 59493: [OOP] ICE: Segfault on Class(*) pointer association +! +! Contributed by Hossein Talebi <talebi.hossein@gmail.com> + + implicit none + + type ty_mytype1 + end type + + class(ty_mytype1), allocatable, target:: cla1 + class(*), pointer :: ptr + + ptr => cla1 + +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 new file mode 100644 index 000000000..07fbce3d5 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 @@ -0,0 +1,44 @@ +! { dg-do compile } +! +! PR fortran/58007 +! Unresolved fixup while loading a module. +! +! This tests that the specification expression A%MAX_DEGREE in module BSR is +! correctly loaded and resolved in program MAIN. +! +! Original testcase from Daniel Shapiro <shapero@uw.edu> +! Reduced by Tobias Burnus <burnus@net-b.de> and Janus Weil <janus@gcc.gnu.org> + +module matrix + type :: sparse_matrix + integer :: max_degree + end type +contains + subroutine init_interface (A) + class(sparse_matrix), intent(in) :: A + end subroutine + real function get_value_interface() + end function +end module + +module ellpack + use matrix +end module + +module bsr + use matrix + type, extends(sparse_matrix) :: bsr_matrix + contains + procedure :: get_neighbors + end type +contains + function get_neighbors (A) + class(bsr_matrix), intent(in) :: A + integer :: get_neighbors(A%max_degree) + end function +end module + +program main + use ellpack + use bsr +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 new file mode 100644 index 000000000..ca0a05a62 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 @@ -0,0 +1,36 @@ +! { dg-do compile } +! +! PR fortran/58007 +! Unresolved fiixup while loading a module. +! +! This tests that the specification expression A%MAX_DEGREE in module BSR is +! correctly loaded and resolved in program MAIN. +! +! Original testcase from Daniel Shapiro <shapero@uw.edu> + +module matrix + type :: sparse_matrix + integer :: max_degree + end type +end module + +module bsr + use matrix + + type, extends(sparse_matrix) :: bsr_matrix + end type + + integer :: i1 + integer :: i2 + integer :: i3 +contains + function get_neighbors (A) + type(bsr_matrix), intent(in) :: A + integer :: get_neighbors(A%max_degree) + end function +end module + +program main + use matrix + use bsr +end diff --git a/gcc-4.8/gcc/testsuite/gfortran.dg/where_4.f90 b/gcc-4.8/gcc/testsuite/gfortran.dg/where_4.f90 new file mode 100644 index 000000000..1ff2e4ca3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.dg/where_4.f90 @@ -0,0 +1,18 @@ +! { dg-do compile } +! PR 60522 - this used to ICE. +! Original test case Roger Ferrer Ibanez +subroutine foo(a, b) + implicit none + integer, dimension(:), intent(inout) :: a + integer, dimension(:), intent(in) :: b + + where (b(:) > 0) + where (b(:) > 100) + a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1)) - 100 + elsewhere + a(lbound(a, 1):ubound(a, 1)) = b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1)) + end where + elsewhere + a(lbound(a, 1):ubound(a, 1)) = - b(lbound(b, 1):ubound(b, 1)) * b(lbound(b, 1):ubound(b, 1)) + end where +end subroutine foo diff --git a/gcc-4.8/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 b/gcc-4.8/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 new file mode 100644 index 000000000..f32698aa3 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 @@ -0,0 +1,13 @@ +SUBROUTINE cal_helicity (uh, ph, phb, wavg, ims, ime, its, ite) + INTEGER, INTENT( IN ) :: ims, ime, its, ite + REAL, DIMENSION( ims:ime), INTENT( IN ) :: ph, phb, wavg + REAL, DIMENSION( ims:ime), INTENT( INOUT ) :: uh + INTEGER :: i + REAL :: zu + DO i = its, ite + zu = (ph(i ) + phb(i)) + (ph(i-1) + phb(i-1)) + IF (wavg(i) .GT. 0) THEN + uh(i) = uh(i) + zu + ENDIF + END DO +END SUBROUTINE cal_helicity diff --git a/gcc-4.8/gcc/testsuite/gnat.dg/opt32.adb b/gcc-4.8/gcc/testsuite/gnat.dg/opt32.adb new file mode 100644 index 000000000..93f31c2ca --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gnat.dg/opt32.adb @@ -0,0 +1,37 @@ +-- { dg-do compile } +-- { dg-options "-O2" } + +with Ada.Containers; use Ada.Containers; +with Ada.Containers.Vectors; + +function Opt32 return Natural is + + package My_Vectors + is new Vectors (Index_Type => Natural, Element_Type => Integer); + use My_Vectors; + + V : Vector; + + function Sign_Changes return Natural is + Cur : Cursor := To_Cursor (V, 0); + R : Natural := 0; + Negative : Boolean; + begin + Negative := Element (Cur) < 0; + + loop + Cur := Next (Cur); + exit when R > 100; + + if (Element (Cur) < 0) /= Negative then + Negative := not Negative; + R := R + 1; + end if; + end loop; + + return R; + end; + +begin + return Sign_Changes; +end; diff --git a/gcc-4.8/gcc/testsuite/go.test/go-test.exp b/gcc-4.8/gcc/testsuite/go.test/go-test.exp index 6f397343e..4c8c36e3e 100644 --- a/gcc-4.8/gcc/testsuite/go.test/go-test.exp +++ b/gcc-4.8/gcc/testsuite/go.test/go-test.exp @@ -333,17 +333,16 @@ proc go-gc-tests { } { } if { ( [file tail $test] == "select2.go" \ - || [file tail $test] == "stack.go" ) \ + || [file tail $test] == "stack.go" \ + || [file tail $test] == "peano.go" ) \ && ! [check_effective_target_split_stack] } { - # chan/select2.go fails on targets without split stack, - # because they allocate a large stack segment that blows - # out the memory calculations. + # These tests fails on targets without split stack. untested $name continue } - if { [file tail $test] == "rotate.go" } { - # This test produces a temporary file that takes too long + if [string match "*go.test/test/rotate\[0123\].go" $test] { + # These tests produces a temporary file that takes too long # to compile--5 minutes on my laptop without optimization. # When compiling without optimization it tests nothing # useful, since the point of the test is to see whether diff --git a/gcc-4.8/gcc/testsuite/lib/target-supports.exp b/gcc-4.8/gcc/testsuite/lib/target-supports.exp index a146f1732..f32cd0483 100644 --- a/gcc-4.8/gcc/testsuite/lib/target-supports.exp +++ b/gcc-4.8/gcc/testsuite/lib/target-supports.exp @@ -1311,6 +1311,32 @@ proc check_effective_target_avx_runtime { } { return 0 } +# Return 1 if the target supports executing power8 vector instructions, 0 +# otherwise. Cache the result. + +proc check_p8vector_hw_available { } { + return [check_cached_effective_target p8vector_hw_available { + # Some simulators are known to not support VSX/power8 instructions. + # For now, disable on Darwin + if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} { + expr 0 + } else { + set options "-mpower8-vector" + check_runtime_nocache p8vector_hw_available { + int main() + { + #ifdef __MACH__ + asm volatile ("xxlorc vs0,vs0,vs0"); + #else + asm volatile ("xxlorc 0,0,0"); + #endif + return 0; + } + } $options + } + }] +} + # Return 1 if the target supports executing VSX instructions, 0 # otherwise. Cache the result. @@ -1858,6 +1884,32 @@ proc check_effective_target_dfprt { } { }] } +# Return 1 if the target supports executing DFP hardware instructions, +# 0 otherwise. Cache the result. + +proc check_dfp_hw_available { } { + return [check_cached_effective_target dfp_hw_available { + # For now, disable on Darwin + if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} { + expr 0 + } else { + check_runtime_nocache dfp_hw_available { + volatile _Decimal64 r; + volatile _Decimal64 a = 4.0DD; + volatile _Decimal64 b = 2.0DD; + int main() + { + asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b)); + asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b)); + asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b)); + asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b)); + return 0; + } + } "-mcpu=power6 -mhard-float" + } + }] +} + # Return 1 if the target supports compiling and assembling UCN, 0 otherwise. proc check_effective_target_ucn_nocache { } { @@ -2672,6 +2724,33 @@ proc check_effective_target_powerpc_altivec_ok { } { } } +# Return 1 if this is a PowerPC target supporting -mpower8-vector + +proc check_effective_target_powerpc_p8vector_ok { } { + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) + || [istarget rs6000-*-*] } { + # AltiVec is not supported on AIX before 5.3. + if { [istarget powerpc*-*-aix4*] + || [istarget powerpc*-*-aix5.1*] + || [istarget powerpc*-*-aix5.2*] } { + return 0 + } + return [check_no_compiler_messages powerpc_p8vector_ok object { + int main (void) { +#ifdef __MACH__ + asm volatile ("xxlorc vs0,vs0,vs0"); +#else + asm volatile ("xxlorc 0,0,0"); +#endif + return 0; + } + } "-mpower8-vector"] + } else { + return 0 + } +} + # Return 1 if this is a PowerPC target supporting -mvsx proc check_effective_target_powerpc_vsx_ok { } { @@ -2699,6 +2778,27 @@ proc check_effective_target_powerpc_vsx_ok { } { } } +# Return 1 if this is a PowerPC target supporting -mhtm + +proc check_effective_target_powerpc_htm_ok { } { + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) + || [istarget rs6000-*-*] } { + # HTM is not supported on AIX yet. + if { [istarget powerpc*-*-aix*] } { + return 0 + } + return [check_no_compiler_messages powerpc_htm_ok object { + int main (void) { + asm volatile ("tbegin. 0"); + return 0; + } + } "-mhtm"] + } else { + return 0 + } +} + # Return 1 if this is a PowerPC target supporting -mcpu=cell. proc check_effective_target_powerpc_ppu_ok { } { @@ -2794,6 +2894,22 @@ proc check_effective_target_powerpc_405_nocache { } { } } +# Return 1 if this is a PowerPC target using the ELFv2 ABI. + +proc check_effective_target_powerpc_elfv2 { } { + if { [istarget powerpc*-*-*] } { + return [check_no_compiler_messages powerpc_elfv2 object { + #if _CALL_ELF != 2 + #error not ELF v2 ABI + #else + int dummy; + #endif + }] + } else { + return 0 + } +} + # Return 1 if this is a SPU target with a toolchain that # supports automatic overlay generation. @@ -4499,7 +4615,9 @@ proc is-effective-target { arg } { switch $arg { "vmx_hw" { set selected [check_vmx_hw_available] } "vsx_hw" { set selected [check_vsx_hw_available] } + "p8vector_hw" { set selected [check_p8vector_hw_available] } "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] } + "dfp_hw" { set selected [check_dfp_hw_available] } "named_sections" { set selected [check_named_sections_available] } "gc_sections" { set selected [check_gc_sections_available] } "cxa_atexit" { set selected [check_cxa_atexit_available] } @@ -4520,7 +4638,9 @@ proc is-effective-target-keyword { arg } { switch $arg { "vmx_hw" { return 1 } "vsx_hw" { return 1 } + "p8vector_hw" { return 1 } "ppc_recip_hw" { return 1 } + "dfp_hw" { return 1 } "named_sections" { return 1 } "gc_sections" { return 1 } "cxa_atexit" { return 1 } @@ -5077,7 +5197,9 @@ proc check_vect_support_and_set_flags { } { } lappend DEFAULT_VECTCFLAGS "-maltivec" - if [check_vsx_hw_available] { + if [check_p8vector_hw_available] { + lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign" + } elseif [check_vsx_hw_available] { lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign" } |