diff options
Diffstat (limited to 'gcc-4.8/gcc/testsuite/gcc.target/i386')
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-1.c | 44 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-2.c | 44 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c | 31 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c | 31 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/movabs-1.c | 10 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/pr57459.c | 60 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/pr57655.c | 10 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/pr57736.c | 41 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/pr57777.c | 13 | ||||
-rw-r--r-- | gcc-4.8/gcc/testsuite/gcc.target/i386/pr58218.c | 5 |
10 files changed, 277 insertions, 12 deletions
diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-1.c index dc964ba3d..c66a9d83b 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-1.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-1.c @@ -1,11 +1,11 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mbmi " } */ -/* { dg-final { scan-assembler "andn\[^\\n]*(%|)eax" } } */ -/* { dg-final { scan-assembler "bextr\[^\\n]*(%|)eax" } } */ -/* { dg-final { scan-assembler "blsi\[^\\n]*(%|)eax" } } */ -/* { dg-final { scan-assembler "blsmsk\[^\\n]*(%|)eax" } } */ -/* { dg-final { scan-assembler "blsr\[^\\n]*(%|)eax" } } */ -/* { dg-final { scan-assembler "tzcntl\[^\\n]*(%|)eax" } } */ +/* { dg-final { scan-assembler "andn\[^\\n]*eax" } } */ +/* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*eax" 2 } } */ +/* { dg-final { scan-assembler-times "blsi\[^\\n]*eax" 2 } } */ +/* { dg-final { scan-assembler-times "blsmsk\[^\\n]*eax" 2 } } */ +/* { dg-final { scan-assembler-times "blsr\[^\\n]*eax" 2 } } */ +/* { dg-final { scan-assembler-times "tzcntl\[^\\n]*eax" 2 } } */ #include <x86intrin.h> @@ -22,25 +22,57 @@ func_bextr32 (unsigned int X, unsigned int Y) } unsigned int +func_bextr32_3args (unsigned int X, + unsigned int Y, + unsigned int Z) +{ + return _bextr_u32(X, Y, Z); +} + +unsigned int func_blsi32 (unsigned int X) { return __blsi_u32(X); } unsigned int +func_blsi32_2 (unsigned int X) +{ + return _blsi_u32(X); +} + +unsigned int func_blsmsk32 (unsigned int X) { return __blsmsk_u32(X); } unsigned int +func_blsmsk32_2 (unsigned int X) +{ + return _blsmsk_u32(X); +} + +unsigned int func_blsr32 (unsigned int X) { return __blsr_u32(X); } unsigned int +func_blsr32_2 (unsigned int X) +{ + return _blsr_u32(X); +} + +unsigned int func_tzcnt32 (unsigned int X) { return __tzcnt_u32(X); } + +unsigned int +func_tzcnt32_2 (unsigned int X) +{ + return _tzcnt_u32(X); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-2.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-2.c index 56f73876d..6eea66aa0 100644 --- a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-2.c +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-2.c @@ -1,11 +1,11 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-options "-O2 -mbmi " } */ -/* { dg-final { scan-assembler "andn\[^\\n]*(%|)rax" } } */ -/* { dg-final { scan-assembler "bextr\[^\\n]*(%|)rax" } } */ -/* { dg-final { scan-assembler "blsi\[^\\n]*(%|)rax" } } */ -/* { dg-final { scan-assembler "blsmsk\[^\\n]*(%|)rax" } } */ -/* { dg-final { scan-assembler "blsr\[^\\n]*(%|)rax" } } */ -/* { dg-final { scan-assembler "tzcntq\[^\\n]*(%|)rax" } } */ +/* { dg-final { scan-assembler "andn\[^\\n]*rax" } } */ +/* { dg-final { scan-assembler-times "bextr\[ \\t]+\[^\\n]*rax" 2 } } */ +/* { dg-final { scan-assembler-times "blsi\[^\\n]*rax" 2 } } */ +/* { dg-final { scan-assembler-times "blsmsk\[^\\n]*rax" 2 } } */ +/* { dg-final { scan-assembler-times "blsr\[^\\n]*rax" 2 } } */ +/* { dg-final { scan-assembler-times "tzcntq\[^\\n]*rax" 2 } } */ #include <x86intrin.h> @@ -22,25 +22,57 @@ func_bextr64 (unsigned long long X, unsigned long long Y) } unsigned long long +func_bextr64_3args (unsigned long long X, + unsigned long long Y, + unsigned long long Z) +{ + return _bextr_u64 (X, Y, Z); +} + +unsigned long long func_blsi64 (unsigned long long X) { return __blsi_u64 (X); } unsigned long long +func_blsi64_2 (unsigned long long X) +{ + return _blsi_u64 (X); +} + +unsigned long long func_blsmsk64 (unsigned long long X) { return __blsmsk_u64 (X); } unsigned long long +func_blsmsk64_2 (unsigned long long X) +{ + return _blsmsk_u64 (X); +} + +unsigned long long func_blsr64 (unsigned long long X) { return __blsr_u64 (X); } unsigned long long +func_blsr64_2 (unsigned long long X) +{ + return _blsr_u64 (X); +} + +unsigned long long func_tzcnt64 (unsigned long long X) { return __tzcnt_u64 (X); } + +unsigned long long +func_tzcnt64_2 (unsigned long long X) +{ + return _tzcnt_u64 (X); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c new file mode 100644 index 000000000..fe342b9e0 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi-bextr-3.c @@ -0,0 +1,31 @@ +/* PR target/57623 */ +/* { dg-do assemble { target bmi } } */ +/* { dg-options "-O2 -mbmi" } */ + +#include <x86intrin.h> + +unsigned int +f1 (unsigned int x, unsigned int *y) +{ + return __bextr_u32 (x, *y); +} + +unsigned int +f2 (unsigned int *x, unsigned int y) +{ + return __bextr_u32 (*x, y); +} + +#ifdef __x86_64__ +unsigned long long +f3 (unsigned long long x, unsigned long long *y) +{ + return __bextr_u64 (x, *y); +} + +unsigned long long +f4 (unsigned long long *x, unsigned long long y) +{ + return __bextr_u64 (*x, y); +} +#endif diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c new file mode 100644 index 000000000..42e002d06 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c @@ -0,0 +1,31 @@ +/* PR target/57623 */ +/* { dg-do assemble { target bmi2 } } */ +/* { dg-options "-O2 -mbmi2" } */ + +#include <x86intrin.h> + +unsigned int +f1 (unsigned int x, unsigned int *y) +{ + return _bzhi_u32 (x, *y); +} + +unsigned int +f2 (unsigned int *x, unsigned int y) +{ + return _bzhi_u32 (*x, y); +} + +#ifdef __x86_64__ +unsigned long long +f3 (unsigned long long x, unsigned long long *y) +{ + return _bzhi_u64 (x, *y); +} + +unsigned long long +f4 (unsigned long long *x, unsigned long long y) +{ + return _bzhi_u64 (*x, y); +} +#endif diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/movabs-1.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/movabs-1.c new file mode 100644 index 000000000..75ef8d2a6 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/movabs-1.c @@ -0,0 +1,10 @@ +/* { dg-do assemble } */ +/* { dg-options "-O2 -masm=intel" } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-require-effective-target masm_intel } */ + +void +foo (void) +{ + *(volatile long*)0xFFFF800000000000 = -1; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57459.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57459.c new file mode 100644 index 000000000..75101145a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57459.c @@ -0,0 +1,60 @@ +/* PR rtl-optimization/57459 */ +/* { dg-do run } */ +/* { dg-options "-fno-inline -O2 -minline-all-stringops -fno-omit-frame-pointer" } */ + +int total1[10], total2[10], total3[10], total4[10], total5[10], a[20]; +int len; + +void stackclean() { + void *ptr = __builtin_alloca(20000); + __builtin_memset(ptr, 0, 20000); +} + +void foo(const char *s) { + int r1 = a[1]; + int r2 = a[2]; + int r3 = a[3]; + int r4 = a[4]; + int r5 = a[5]; + + len = __builtin_strlen(s); + + if (s != 0) + return; + + while (r1) { + total1[r1] = r1; + r1--; + } + + while (r2) { + total2[r2] = r2; + r2--; + } + + while (r3) { + total3[r3] = r3; + r3--; + } + + while (r4) { + total4[r4] = r4; + r4--; + } + + while (r5) { + total5[r5] = r5; + r5--; + } +} + +extern void abort (void); + +int main() { + stackclean(); + foo("abcdefgh"); + if (len != 8) + abort (); + return 0; +} + diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57655.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57655.c new file mode 100644 index 000000000..586d33862 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57655.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx -mvzeroupper -mno-fp-ret-in-387" } + +/* { dg-error "x87 register return with x87 disabled" "" { target { ! ia32 } } 8 } */ + +long double +foo (long double x) +{ + return __builtin_ilogbl (x); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57736.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57736.c new file mode 100644 index 000000000..120e5dc3a --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57736.c @@ -0,0 +1,41 @@ +/* PR target/57736 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <x86intrin.h> + +unsigned long long +f1 (void) +{ + return __rdtsc (); +} + +unsigned long long +f2 (unsigned int *x) +{ + return __rdtscp (x); +} + +unsigned long long +f3 (unsigned int x) +{ + return __rdpmc (x); +} + +void +f4 (void) +{ + __rdtsc (); +} + +void +f5 (unsigned int *x) +{ + __rdtscp (x); +} + +void +f6 (unsigned int x) +{ + __rdpmc (x); +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57777.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57777.c new file mode 100644 index 000000000..9c1a392aa --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr57777.c @@ -0,0 +1,13 @@ +/* PR target/57777 */ +/* { dg-do assemble { target avx2 } } */ +/* { dg-options "-O3 -mavx2" } */ +/* { dg-additional-options "-fpic" { target fpic } } */ + +void +foo (unsigned long *x, int *y) +{ + static unsigned long b[2] = { 0x0UL, 0x9908b0dfUL }; + int c; + for (c = 0; c < 512; c++) + x[c] = b[x[c] & 1UL]; +} diff --git a/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58218.c b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58218.c new file mode 100644 index 000000000..414524205 --- /dev/null +++ b/gcc-4.8/gcc/testsuite/gcc.target/i386/pr58218.c @@ -0,0 +1,5 @@ +/* PR target/58218 */ +/* { dg-do assemble { target lp64 } } */ +/* { dg-options "-mcmodel=medium" } */ + +struct { float x[16385]; } a = { { 0.f, } }; |