diff options
Diffstat (limited to 'gcc-4.8/gcc/doc/md.texi')
-rw-r--r-- | gcc-4.8/gcc/doc/md.texi | 52 |
1 files changed, 46 insertions, 6 deletions
diff --git a/gcc-4.8/gcc/doc/md.texi b/gcc-4.8/gcc/doc/md.texi index 63ec92f6b..dacb83a70 100644 --- a/gcc-4.8/gcc/doc/md.texi +++ b/gcc-4.8/gcc/doc/md.texi @@ -2055,7 +2055,7 @@ Any constant whose absolute value is no greater than 4-bits. @end table -@item PowerPC and IBM RS6000---@file{config/rs6000/rs6000.h} +@item PowerPC and IBM RS6000---@file{config/rs6000/constraints.md} @table @code @item b Address base register @@ -2069,17 +2069,57 @@ Floating point register (containing 32-bit value) @item v Altivec vector register +@item wa +Any VSX register if the -mvsx option was used or NO_REGS. + @item wd -VSX vector register to hold vector double data +VSX vector register to hold vector double data or NO_REGS. @item wf -VSX vector register to hold vector float data +VSX vector register to hold vector float data or NO_REGS. + +@item wg +If @option{-mmfpgpr} was used, a floating point register or NO_REGS. + +@item wl +Floating point register if the LFIWAX instruction is enabled or NO_REGS. + +@item wm +VSX register if direct move instructions are enabled, or NO_REGS. + +@item wn +No register (NO_REGS). + +@item wr +General purpose register if 64-bit instructions are enabled or NO_REGS. @item ws -VSX vector register to hold scalar float data +VSX vector register to hold scalar double values or NO_REGS. -@item wa -Any VSX register +@item wt +VSX vector register to hold 128 bit integer or NO_REGS. + +@item wu +Altivec register to use for float/32-bit int loads/stores or NO_REGS. + +@item wv +Altivec register to use for double loads/stores or NO_REGS. + +@item ww +FP or VSX register to perform float operations under @option{-mvsx} or NO_REGS. + +@item wx +Floating point register if the STFIWX instruction is enabled or NO_REGS. + +@item wy +VSX vector register to hold scalar float values or NO_REGS. + +@item wz +Floating point register if the LFIWZX instruction is enabled or NO_REGS. + +@item wQ +A memory address that will work with the @code{lq} and @code{stq} +instructions. @item h @samp{MQ}, @samp{CTR}, or @samp{LINK} register |